pandory500/oleavr-rgl-a500-mini-linux-3.10
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Ole André Vadla Ravnås 2022-05-07 01:01:45 +02:00
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arch/powerpc/boot/dts/klondike.dts Normal file
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/*
* Device Tree for Klondike (APM8018X) board.
*
* Copyright (c) 2010, Applied Micro Circuits Corporation
* Author: Tanmay Inamdar <tinamdar@apm.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
/dts-v1/;
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "apm,klondike";
compatible = "apm,klondike";
dcr-parent = <&{/cpus/cpu@0}>;
aliases {
ethernet0 = &EMAC0;
ethernet1 = &EMAC1;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
model = "PowerPC,apm8018x";
reg = <0x00000000>;
clock-frequency = <300000000>; /* Filled in by U-Boot */
timebase-frequency = <300000000>; /* Filled in by U-Boot */
i-cache-line-size = <32>;
d-cache-line-size = <32>;
i-cache-size = <16384>; /* 16 kB */
d-cache-size = <16384>; /* 16 kB */
dcr-controller;
dcr-access-method = "native";
};
};
memory {
device_type = "memory";
reg = <0x00000000 0x20000000>; /* Filled in by U-Boot */
};
UIC0: interrupt-controller {
compatible = "ibm,uic";
interrupt-controller;
cell-index = <0>;
dcr-reg = <0x0c0 0x010>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
};
UIC1: interrupt-controller1 {
compatible = "ibm,uic";
interrupt-controller;
cell-index = <1>;
dcr-reg = <0x0d0 0x010>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
UIC2: interrupt-controller2 {
compatible = "ibm,uic";
interrupt-controller;
cell-index = <2>;
dcr-reg = <0x0e0 0x010>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
interrupts = <0x0a 0x4 0x0b 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
UIC3: interrupt-controller3 {
compatible = "ibm,uic";
interrupt-controller;
cell-index = <3>;
dcr-reg = <0x0f0 0x010>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
plb {
compatible = "ibm,plb4";
#address-cells = <1>;
#size-cells = <1>;
ranges;
clock-frequency = <0>; /* Filled in by U-Boot */
SDRAM0: memory-controller {
compatible = "ibm,sdram-apm8018x";
dcr-reg = <0x010 0x002>;
};
MAL0: mcmal {
compatible = "ibm,mcmal2";
dcr-reg = <0x180 0x062>;
num-tx-chans = <2>;
num-rx-chans = <16>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-parent = <&UIC1>;
interrupts = </*TXEOB*/ 0x6 0x4
/*RXEOB*/ 0x7 0x4
/*SERR*/ 0x1 0x4
/*TXDE*/ 0x2 0x4
/*RXDE*/ 0x3 0x4>;
};
POB0: opb {
compatible = "ibm,opb";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x20000000 0x20000000 0x30000000
0x50000000 0x50000000 0x10000000
0x60000000 0x60000000 0x10000000
0xFE000000 0xFE000000 0x00010000>;
dcr-reg = <0x100 0x020>;
clock-frequency = <300000000>; /* Filled in by U-Boot */
RGMII0: emac-rgmii@400a2000 {
compatible = "ibm,rgmii";
reg = <0x400a2000 0x00000010>;
has-mdio;
};
TAH0: emac-tah@400a3000 {
compatible = "ibm,tah";
reg = <0x400a3000 0x100>;
};
TAH1: emac-tah@400a4000 {
compatible = "ibm,tah";
reg = <0x400a4000 0x100>;
};
EMAC0: ethernet@400a0000 {
compatible = "ibm,emac4", "ibm-emac4sync";
interrupt-parent = <&EMAC0>;
interrupts = <0x0>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = </*Status*/ 0x0 &UIC0 0x13 0x4>;
reg = <0x400a0000 0x00000100>;
local-mac-address = [000000000000]; /* Filled in by U-Boot */
mal-device = <&MAL0>;
mal-tx-channel = <0x0>;
mal-rx-channel = <0x0>;
cell-index = <0>;
max-frame-size = <9000>;
rx-fifo-size = <4096>;
tx-fifo-size = <2048>;
phy-mode = "rgmii";
phy-address = <0x2>;
turbo = "no";
phy-map = <0x00000000>;
rgmii-device = <&RGMII0>;
rgmii-channel = <0>;
tah-device = <&TAH0>;
tah-channel = <0>;
has-inverted-stacr-oc;
has-new-stacr-staopc;
};
EMAC1: ethernet@400a1000 {
compatible = "ibm,emac4", "ibm-emac4sync";
status = "disabled";
interrupt-parent = <&EMAC1>;
interrupts = <0x0>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-map = </*Status*/ 0x0 &UIC0 0x14 0x4>;
reg = <0x400a1000 0x00000100>;
local-mac-address = [000000000000]; /* Filled in by U-Boot */
mal-device = <&MAL0>;
mal-tx-channel = <1>;
mal-rx-channel = <8>;
cell-index = <1>;
max-frame-size = <9000>;
rx-fifo-size = <4096>;
tx-fifo-size = <2048>;
phy-mode = "rgmii";
phy-address = <0x3>;
turbo = "no";
phy-map = <0x00000000>;
rgmii-device = <&RGMII0>;
rgmii-channel = <1>;
tah-device = <&TAH1>;
tah-channel = <0>;
has-inverted-stacr-oc;
has-new-stacr-staopc;
mdio-device = <&EMAC0>;
};
};
};
chosen {
linux,stdout-path = "/plb/opb/serial@50001000";
};
};