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drivers/media/platform/sunxi-vin/vin-csi/bsp_csi.h
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drivers/media/platform/sunxi-vin/vin-csi/bsp_csi.h
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/*
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* linux-3.10/drivers/media/platform/sunxi-vin/vin-csi/bsp_csi.h
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*
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* Copyright (c) 2007-2017 Allwinnertech Co., Ltd.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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/*
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* sunxi csi bsp header file
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* Author:raymonxiu
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*/
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#ifndef __BSP__CSI__H__
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#define __BSP__CSI__H__
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#include "csi_reg.h"
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#include "../utility/bsp_common.h"
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#define MAX_CH_NUM 4
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#define CSI_ALIGN_4K(x) (((x) + (4095)) & ~(4095))
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#define CSI_ALIGN_32B(x) (((x) + (31)) & ~(31))
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#define CSI_ALIGN_16B(x) (((x) + (15)) & ~(15))
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#define CSI_ALIGN_8B(x) (((x) + (7)) & ~(7))
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enum ref_pol {
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ACTIVE_LOW, /* active low */
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ACTIVE_HIGH, /* active high */
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};
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enum edge_pol {
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FALLING, /* active falling */
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RISING, /* active rising */
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};
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/*
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* the same define as enum csi_input_seq
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*/
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enum bus_fmt_seq {
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/* only when input is yuv422 */
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YUYV = 0,
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YVYU,
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UYVY,
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VYUY,
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/* only when input is byer */
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RGRG = 0, /* first line sequence is RGRG... */
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GRGR, /* first line sequence is GRGR... */
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BGBG, /* first line sequence is BGBG... */
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GBGB, /* first line sequence is GBGB... */
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};
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struct bus_timing {
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enum ref_pol href_pol;
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enum ref_pol vref_pol;
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enum edge_pol pclk_sample;
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enum ref_pol field_even_pol; /*field 0/1 0:odd 1:even*/
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};
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struct bus_info {
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enum v4l2_mbus_type bus_if;
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struct bus_timing bus_tmg;
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enum v4l2_mbus_pixelcode bus_ch_fmt[MAX_CH_NUM]; /* define the same as V4L2 */
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unsigned int ch_total_num;
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};
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struct frame_size {
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unsigned int width; /* in pixel unit */
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unsigned int height; /* in pixel unit */
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};
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struct frame_offset {
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unsigned int hoff; /* in pixel unit */
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unsigned int voff; /* in pixel unit */
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};
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/*
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* frame arrangement
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* Indicate that how the channel images are put together into one buffer
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*/
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struct frame_arrange {
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unsigned char column;
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unsigned char row;
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};
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struct frame_info {
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struct frame_arrange arrange;
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struct frame_size ch_size[MAX_CH_NUM];
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struct frame_offset ch_offset[MAX_CH_NUM];
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unsigned int pix_ch_fmt[MAX_CH_NUM];
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enum v4l2_field ch_field[MAX_CH_NUM]; /* define the same as V4L2 */
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unsigned int frm_byte_size;
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};
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extern int bsp_csi_set_base_addr(unsigned int sel, unsigned long addr);
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extern void bsp_csi_enable(unsigned int sel);
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extern void bsp_csi_disable(unsigned int sel);
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extern void bsp_csi_reset(unsigned int sel);
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extern int bsp_csi_set_fmt(unsigned int sel, struct bus_info *bus_info,
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struct frame_info *frame_info);
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extern int bsp_csi_set_size(unsigned int sel, struct bus_info *bus_info,
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struct frame_info *frame_info);
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void bsp_csi_set_addr(unsigned int sel, u64 buf_base_addr, u64 buf_base_addr_y,
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u64 buf_base_addr_u, u64 buf_base_addr_v);
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extern void bsp_csi_cap_start(unsigned int sel, unsigned int ch_total_num,
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enum csi_cap_mode csi_cap_mode);
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extern void bsp_csi_cap_stop(unsigned int sel, unsigned int ch_total_num,
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enum csi_cap_mode csi_cap_mode);
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extern void bsp_csi_int_enable(unsigned int sel, unsigned int ch,
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enum csi_int_sel interrupt);
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extern void bsp_csi_int_disable(unsigned int sel, unsigned int ch,
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enum csi_int_sel interrupt);
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extern void bsp_csi_int_get_status(unsigned int sel, unsigned int ch,
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struct csi_int_status *status);
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extern void bsp_csi_int_clear_status(unsigned int sel, unsigned int ch,
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enum csi_int_sel interrupt);
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#endif /* __BSP__CSI__H__ */
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