Initial commit
This commit is contained in:
commit
169c65d57e
51358 changed files with 23120455 additions and 0 deletions
28
drivers/scsi/aic7xxx_old/aic7xxx.h
Normal file
28
drivers/scsi/aic7xxx_old/aic7xxx.h
Normal file
|
@ -0,0 +1,28 @@
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|||
/*+M*************************************************************************
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||||
* Adaptec AIC7xxx device driver for Linux.
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||||
*
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||||
* Copyright (c) 1994 John Aycock
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||||
* The University of Calgary Department of Computer Science.
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||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2, or (at your option)
|
||||
* any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; see the file COPYING. If not, write to
|
||||
* the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
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||||
*
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||||
* $Id: aic7xxx.h,v 3.2 1996/07/23 03:37:26 deang Exp $
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||||
*-M*************************************************************************/
|
||||
#ifndef _aic7xxx_h
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||||
#define _aic7xxx_h
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||||
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||||
#define AIC7XXX_H_VERSION "5.2.0"
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||||
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||||
#endif /* _aic7xxx_h */
|
1401
drivers/scsi/aic7xxx_old/aic7xxx.reg
Normal file
1401
drivers/scsi/aic7xxx_old/aic7xxx.reg
Normal file
File diff suppressed because it is too large
Load diff
1539
drivers/scsi/aic7xxx_old/aic7xxx.seq
Normal file
1539
drivers/scsi/aic7xxx_old/aic7xxx.seq
Normal file
File diff suppressed because it is too large
Load diff
270
drivers/scsi/aic7xxx_old/aic7xxx_proc.c
Normal file
270
drivers/scsi/aic7xxx_old/aic7xxx_proc.c
Normal file
|
@ -0,0 +1,270 @@
|
|||
/*+M*************************************************************************
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||||
* Adaptec AIC7xxx device driver proc support for Linux.
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||||
*
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||||
* Copyright (c) 1995, 1996 Dean W. Gehnert
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||||
*
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||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2, or (at your option)
|
||||
* any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; see the file COPYING. If not, write to
|
||||
* the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
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||||
*
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||||
* ----------------------------------------------------------------
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||||
* o Modified from the EATA-DMA /proc support.
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||||
* o Additional support for device block statistics provided by
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||||
* Matthew Jacob.
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||||
* o Correction of overflow by Heinz Mauelshagen
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||||
* o Adittional corrections by Doug Ledford
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||||
*
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||||
* Dean W. Gehnert, deang@teleport.com, 05/01/96
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*
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* $Id: aic7xxx_proc.c,v 4.1 1997/06/97 08:23:42 deang Exp $
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||||
*-M*************************************************************************/
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||||
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||||
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#define HDRB \
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" 0 - 4K 4 - 16K 16 - 64K 64 - 256K 256K - 1M 1M+"
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||||
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||||
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||||
/*+F*************************************************************************
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||||
* Function:
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||||
* aic7xxx_show_info
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||||
*
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||||
* Description:
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||||
* Return information to handle /proc support for the driver.
|
||||
*-F*************************************************************************/
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||||
int
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||||
aic7xxx_show_info(struct seq_file *m, struct Scsi_Host *HBAptr)
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||||
{
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||||
struct aic7xxx_host *p;
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||||
struct aic_dev_data *aic_dev;
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||||
struct scsi_device *sdptr;
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||||
unsigned char i;
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||||
unsigned char tindex;
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||||
|
||||
for(p=first_aic7xxx; p && p->host != HBAptr; p=p->next)
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||||
;
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||||
|
||||
if (!p)
|
||||
{
|
||||
seq_printf(m, "Can't find adapter for host number %d\n", HBAptr->host_no);
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||||
return 0;
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||||
}
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||||
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||||
p = (struct aic7xxx_host *) HBAptr->hostdata;
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||||
|
||||
seq_printf(m, "Adaptec AIC7xxx driver version: ");
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||||
seq_printf(m, "%s/", AIC7XXX_C_VERSION);
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||||
seq_printf(m, "%s", AIC7XXX_H_VERSION);
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||||
seq_printf(m, "\n");
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||||
seq_printf(m, "Adapter Configuration:\n");
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||||
seq_printf(m, " SCSI Adapter: %s\n",
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||||
board_names[p->board_name_index]);
|
||||
if (p->flags & AHC_TWIN)
|
||||
seq_printf(m, " Twin Channel Controller ");
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||||
else
|
||||
{
|
||||
char *channel = "";
|
||||
char *ultra = "";
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||||
char *wide = "Narrow ";
|
||||
if (p->flags & AHC_MULTI_CHANNEL)
|
||||
{
|
||||
channel = " Channel A";
|
||||
if (p->flags & (AHC_CHNLB|AHC_CHNLC))
|
||||
channel = (p->flags & AHC_CHNLB) ? " Channel B" : " Channel C";
|
||||
}
|
||||
if (p->features & AHC_WIDE)
|
||||
wide = "Wide ";
|
||||
if (p->features & AHC_ULTRA3)
|
||||
{
|
||||
switch(p->chip & AHC_CHIPID_MASK)
|
||||
{
|
||||
case AHC_AIC7892:
|
||||
case AHC_AIC7899:
|
||||
ultra = "Ultra-160/m LVD/SE ";
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||||
break;
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||||
default:
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||||
ultra = "Ultra-3 LVD/SE ";
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||||
break;
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||||
}
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||||
}
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||||
else if (p->features & AHC_ULTRA2)
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||||
ultra = "Ultra-2 LVD/SE ";
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||||
else if (p->features & AHC_ULTRA)
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||||
ultra = "Ultra ";
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||||
seq_printf(m, " %s%sController%s ",
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||||
ultra, wide, channel);
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||||
}
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||||
switch(p->chip & ~AHC_CHIPID_MASK)
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||||
{
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||||
case AHC_VL:
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||||
seq_printf(m, "at VLB slot %d\n", p->pci_device_fn);
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||||
break;
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||||
case AHC_EISA:
|
||||
seq_printf(m, "at EISA slot %d\n", p->pci_device_fn);
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||||
break;
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||||
default:
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||||
seq_printf(m, "at PCI %d/%d/%d\n", p->pci_bus,
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||||
PCI_SLOT(p->pci_device_fn), PCI_FUNC(p->pci_device_fn));
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||||
break;
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||||
}
|
||||
if( !(p->maddr) )
|
||||
{
|
||||
seq_printf(m, " Programmed I/O Base: %lx\n", p->base);
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||||
}
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||||
else
|
||||
{
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||||
seq_printf(m, " PCI MMAPed I/O Base: 0x%lx\n", p->mbase);
|
||||
}
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||||
if( (p->chip & (AHC_VL | AHC_EISA)) )
|
||||
{
|
||||
seq_printf(m, " BIOS Memory Address: 0x%08x\n", p->bios_address);
|
||||
}
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||||
seq_printf(m, " Adapter SEEPROM Config: %s\n",
|
||||
(p->flags & AHC_SEEPROM_FOUND) ? "SEEPROM found and used." :
|
||||
((p->flags & AHC_USEDEFAULTS) ? "SEEPROM not found, using defaults." :
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||||
"SEEPROM not found, using leftover BIOS values.") );
|
||||
seq_printf(m, " Adaptec SCSI BIOS: %s\n",
|
||||
(p->flags & AHC_BIOS_ENABLED) ? "Enabled" : "Disabled");
|
||||
seq_printf(m, " IRQ: %d\n", HBAptr->irq);
|
||||
seq_printf(m, " SCBs: Active %d, Max Active %d,\n",
|
||||
p->activescbs, p->max_activescbs);
|
||||
seq_printf(m, " Allocated %d, HW %d, "
|
||||
"Page %d\n", p->scb_data->numscbs, p->scb_data->maxhscbs,
|
||||
p->scb_data->maxscbs);
|
||||
if (p->flags & AHC_EXTERNAL_SRAM)
|
||||
seq_printf(m, " Using External SCB SRAM\n");
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||||
seq_printf(m, " Interrupts: %ld", p->isr_count);
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||||
if (p->chip & AHC_EISA)
|
||||
{
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||||
seq_printf(m, " %s\n",
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||||
(p->pause & IRQMS) ? "(Level Sensitive)" : "(Edge Triggered)");
|
||||
}
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||||
else
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||||
{
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||||
seq_printf(m, "\n");
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||||
}
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||||
seq_printf(m, " BIOS Control Word: 0x%04x\n",
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||||
p->bios_control);
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||||
seq_printf(m, " Adapter Control Word: 0x%04x\n",
|
||||
p->adapter_control);
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||||
seq_printf(m, " Extended Translation: %sabled\n",
|
||||
(p->flags & AHC_EXTEND_TRANS_A) ? "En" : "Dis");
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||||
seq_printf(m, "Disconnect Enable Flags: 0x%04x\n", p->discenable);
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||||
if (p->features & (AHC_ULTRA | AHC_ULTRA2))
|
||||
{
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||||
seq_printf(m, " Ultra Enable Flags: 0x%04x\n", p->ultraenb);
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||||
}
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||||
seq_printf(m, "Default Tag Queue Depth: %d\n", aic7xxx_default_queue_depth);
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||||
seq_printf(m, " Tagged Queue By Device array for aic7xxx host "
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||||
"instance %d:\n", p->instance);
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||||
seq_printf(m, " {");
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||||
for(i=0; i < (MAX_TARGETS - 1); i++)
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||||
seq_printf(m, "%d,",aic7xxx_tag_info[p->instance].tag_commands[i]);
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||||
seq_printf(m, "%d}\n",aic7xxx_tag_info[p->instance].tag_commands[i]);
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||||
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||||
seq_printf(m, "\n");
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||||
seq_printf(m, "Statistics:\n\n");
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||||
list_for_each_entry(aic_dev, &p->aic_devs, list)
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||||
{
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||||
sdptr = aic_dev->SDptr;
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||||
tindex = sdptr->channel << 3 | sdptr->id;
|
||||
seq_printf(m, "(scsi%d:%d:%d:%d)\n",
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||||
p->host_no, sdptr->channel, sdptr->id, sdptr->lun);
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||||
seq_printf(m, " Device using %s/%s",
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||||
(aic_dev->cur.width == MSG_EXT_WDTR_BUS_16_BIT) ?
|
||||
"Wide" : "Narrow",
|
||||
(aic_dev->cur.offset != 0) ?
|
||||
"Sync transfers at " : "Async transfers.\n" );
|
||||
if (aic_dev->cur.offset != 0)
|
||||
{
|
||||
struct aic7xxx_syncrate *sync_rate;
|
||||
unsigned char options = aic_dev->cur.options;
|
||||
int period = aic_dev->cur.period;
|
||||
int rate = (aic_dev->cur.width ==
|
||||
MSG_EXT_WDTR_BUS_16_BIT) ? 1 : 0;
|
||||
|
||||
sync_rate = aic7xxx_find_syncrate(p, &period, 0, &options);
|
||||
if (sync_rate != NULL)
|
||||
{
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||||
seq_printf(m, "%s MByte/sec, offset %d\n",
|
||||
sync_rate->rate[rate],
|
||||
aic_dev->cur.offset );
|
||||
}
|
||||
else
|
||||
{
|
||||
seq_printf(m, "3.3 MByte/sec, offset %d\n",
|
||||
aic_dev->cur.offset );
|
||||
}
|
||||
}
|
||||
seq_printf(m, " Transinfo settings: ");
|
||||
seq_printf(m, "current(%d/%d/%d/%d), ",
|
||||
aic_dev->cur.period,
|
||||
aic_dev->cur.offset,
|
||||
aic_dev->cur.width,
|
||||
aic_dev->cur.options);
|
||||
seq_printf(m, "goal(%d/%d/%d/%d), ",
|
||||
aic_dev->goal.period,
|
||||
aic_dev->goal.offset,
|
||||
aic_dev->goal.width,
|
||||
aic_dev->goal.options);
|
||||
seq_printf(m, "user(%d/%d/%d/%d)\n",
|
||||
p->user[tindex].period,
|
||||
p->user[tindex].offset,
|
||||
p->user[tindex].width,
|
||||
p->user[tindex].options);
|
||||
if(sdptr->simple_tags)
|
||||
{
|
||||
seq_printf(m, " Tagged Command Queueing Enabled, Ordered Tags %s, Depth %d/%d\n", sdptr->ordered_tags ? "Enabled" : "Disabled", sdptr->queue_depth, aic_dev->max_q_depth);
|
||||
}
|
||||
if(aic_dev->barrier_total)
|
||||
seq_printf(m, " Total transfers %ld:\n (%ld/%ld/%ld/%ld reads/writes/REQ_BARRIER/Ordered Tags)\n",
|
||||
aic_dev->r_total+aic_dev->w_total, aic_dev->r_total, aic_dev->w_total,
|
||||
aic_dev->barrier_total, aic_dev->ordered_total);
|
||||
else
|
||||
seq_printf(m, " Total transfers %ld:\n (%ld/%ld reads/writes)\n",
|
||||
aic_dev->r_total+aic_dev->w_total, aic_dev->r_total, aic_dev->w_total);
|
||||
seq_printf(m, "%s\n", HDRB);
|
||||
seq_printf(m, " Reads:");
|
||||
for (i = 0; i < ARRAY_SIZE(aic_dev->r_bins); i++)
|
||||
{
|
||||
seq_printf(m, " %10ld", aic_dev->r_bins[i]);
|
||||
}
|
||||
seq_printf(m, "\n");
|
||||
seq_printf(m, " Writes:");
|
||||
for (i = 0; i < ARRAY_SIZE(aic_dev->w_bins); i++)
|
||||
{
|
||||
seq_printf(m, " %10ld", aic_dev->w_bins[i]);
|
||||
}
|
||||
seq_printf(m, "\n");
|
||||
seq_printf(m, "\n\n");
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Overrides for Emacs so that we follow Linus's tabbing style.
|
||||
* Emacs will notice this stuff at the end of the file and automatically
|
||||
* adjust the settings for this buffer only. This must remain at the end
|
||||
* of the file.
|
||||
* ---------------------------------------------------------------------------
|
||||
* Local variables:
|
||||
* c-indent-level: 2
|
||||
* c-brace-imaginary-offset: 0
|
||||
* c-brace-offset: -2
|
||||
* c-argdecl-indent: 2
|
||||
* c-label-offset: -2
|
||||
* c-continued-statement-offset: 2
|
||||
* c-continued-brace-offset: 0
|
||||
* indent-tabs-mode: nil
|
||||
* tab-width: 8
|
||||
* End:
|
||||
*/
|
629
drivers/scsi/aic7xxx_old/aic7xxx_reg.h
Normal file
629
drivers/scsi/aic7xxx_old/aic7xxx_reg.h
Normal file
|
@ -0,0 +1,629 @@
|
|||
/*
|
||||
* DO NOT EDIT - This file is automatically generated.
|
||||
*/
|
||||
|
||||
#define SCSISEQ 0x00
|
||||
#define TEMODE 0x80
|
||||
#define ENSELO 0x40
|
||||
#define ENSELI 0x20
|
||||
#define ENRSELI 0x10
|
||||
#define ENAUTOATNO 0x08
|
||||
#define ENAUTOATNI 0x04
|
||||
#define ENAUTOATNP 0x02
|
||||
#define SCSIRSTO 0x01
|
||||
|
||||
#define SXFRCTL0 0x01
|
||||
#define DFON 0x80
|
||||
#define DFPEXP 0x40
|
||||
#define FAST20 0x20
|
||||
#define CLRSTCNT 0x10
|
||||
#define SPIOEN 0x08
|
||||
#define SCAMEN 0x04
|
||||
#define CLRCHN 0x02
|
||||
|
||||
#define SXFRCTL1 0x02
|
||||
#define BITBUCKET 0x80
|
||||
#define SWRAPEN 0x40
|
||||
#define ENSPCHK 0x20
|
||||
#define STIMESEL 0x18
|
||||
#define ENSTIMER 0x04
|
||||
#define ACTNEGEN 0x02
|
||||
#define STPWEN 0x01
|
||||
|
||||
#define SCSISIGO 0x03
|
||||
#define CDO 0x80
|
||||
#define IOO 0x40
|
||||
#define MSGO 0x20
|
||||
#define ATNO 0x10
|
||||
#define SELO 0x08
|
||||
#define BSYO 0x04
|
||||
#define REQO 0x02
|
||||
#define ACKO 0x01
|
||||
|
||||
#define SCSISIGI 0x03
|
||||
#define ATNI 0x10
|
||||
#define SELI 0x08
|
||||
#define BSYI 0x04
|
||||
#define REQI 0x02
|
||||
#define ACKI 0x01
|
||||
|
||||
#define SCSIRATE 0x04
|
||||
#define WIDEXFER 0x80
|
||||
#define SXFR_ULTRA2 0x7f
|
||||
#define SXFR 0x70
|
||||
#define SOFS 0x0f
|
||||
|
||||
#define SCSIID 0x05
|
||||
#define SCSIOFFSET 0x05
|
||||
#define SOFS_ULTRA2 0x7f
|
||||
|
||||
#define SCSIDATL 0x06
|
||||
|
||||
#define SCSIDATH 0x07
|
||||
|
||||
#define STCNT 0x08
|
||||
|
||||
#define OPTIONMODE 0x08
|
||||
#define AUTORATEEN 0x80
|
||||
#define AUTOACKEN 0x40
|
||||
#define ATNMGMNTEN 0x20
|
||||
#define BUSFREEREV 0x10
|
||||
#define EXPPHASEDIS 0x08
|
||||
#define SCSIDATL_IMGEN 0x04
|
||||
#define AUTO_MSGOUT_DE 0x02
|
||||
#define DIS_MSGIN_DUALEDGE 0x01
|
||||
|
||||
#define CLRSINT0 0x0b
|
||||
#define CLRSELDO 0x40
|
||||
#define CLRSELDI 0x20
|
||||
#define CLRSELINGO 0x10
|
||||
#define CLRSWRAP 0x08
|
||||
#define CLRSPIORDY 0x02
|
||||
|
||||
#define SSTAT0 0x0b
|
||||
#define TARGET 0x80
|
||||
#define SELDO 0x40
|
||||
#define SELDI 0x20
|
||||
#define SELINGO 0x10
|
||||
#define IOERR 0x08
|
||||
#define SWRAP 0x08
|
||||
#define SDONE 0x04
|
||||
#define SPIORDY 0x02
|
||||
#define DMADONE 0x01
|
||||
|
||||
#define CLRSINT1 0x0c
|
||||
#define CLRSELTIMEO 0x80
|
||||
#define CLRATNO 0x40
|
||||
#define CLRSCSIRSTI 0x20
|
||||
#define CLRBUSFREE 0x08
|
||||
#define CLRSCSIPERR 0x04
|
||||
#define CLRPHASECHG 0x02
|
||||
#define CLRREQINIT 0x01
|
||||
|
||||
#define SSTAT1 0x0c
|
||||
#define SELTO 0x80
|
||||
#define ATNTARG 0x40
|
||||
#define SCSIRSTI 0x20
|
||||
#define PHASEMIS 0x10
|
||||
#define BUSFREE 0x08
|
||||
#define SCSIPERR 0x04
|
||||
#define PHASECHG 0x02
|
||||
#define REQINIT 0x01
|
||||
|
||||
#define SSTAT2 0x0d
|
||||
#define OVERRUN 0x80
|
||||
#define SHVALID 0x40
|
||||
#define WIDE_RES 0x20
|
||||
#define SFCNT 0x1f
|
||||
#define EXP_ACTIVE 0x10
|
||||
#define CRCVALERR 0x08
|
||||
#define CRCENDERR 0x04
|
||||
#define CRCREQERR 0x02
|
||||
#define DUAL_EDGE_ERROR 0x01
|
||||
|
||||
#define SSTAT3 0x0e
|
||||
#define SCSICNT 0xf0
|
||||
#define OFFCNT 0x0f
|
||||
|
||||
#define SCSIID_ULTRA2 0x0f
|
||||
#define OID 0x0f
|
||||
|
||||
#define SIMODE0 0x10
|
||||
#define ENSELDO 0x40
|
||||
#define ENSELDI 0x20
|
||||
#define ENSELINGO 0x10
|
||||
#define ENIOERR 0x08
|
||||
#define ENSWRAP 0x08
|
||||
#define ENSDONE 0x04
|
||||
#define ENSPIORDY 0x02
|
||||
#define ENDMADONE 0x01
|
||||
|
||||
#define SIMODE1 0x11
|
||||
#define ENSELTIMO 0x80
|
||||
#define ENATNTARG 0x40
|
||||
#define ENSCSIRST 0x20
|
||||
#define ENPHASEMIS 0x10
|
||||
#define ENBUSFREE 0x08
|
||||
#define ENSCSIPERR 0x04
|
||||
#define ENPHASECHG 0x02
|
||||
#define ENREQINIT 0x01
|
||||
|
||||
#define SCSIBUSL 0x12
|
||||
|
||||
#define SCSIBUSH 0x13
|
||||
|
||||
#define SHADDR 0x14
|
||||
|
||||
#define SELTIMER 0x18
|
||||
#define STAGE6 0x20
|
||||
#define STAGE5 0x10
|
||||
#define STAGE4 0x08
|
||||
#define STAGE3 0x04
|
||||
#define STAGE2 0x02
|
||||
#define STAGE1 0x01
|
||||
|
||||
#define SELID 0x19
|
||||
#define SELID_MASK 0xf0
|
||||
#define ONEBIT 0x08
|
||||
|
||||
#define SPIOCAP 0x1b
|
||||
#define SOFT1 0x80
|
||||
#define SOFT0 0x40
|
||||
#define SOFTCMDEN 0x20
|
||||
#define HAS_BRDCTL 0x10
|
||||
#define SEEPROM 0x08
|
||||
#define EEPROM 0x04
|
||||
#define ROM 0x02
|
||||
#define SSPIOCPS 0x01
|
||||
|
||||
#define BRDCTL 0x1d
|
||||
#define BRDDAT7 0x80
|
||||
#define BRDDAT6 0x40
|
||||
#define BRDDAT5 0x20
|
||||
#define BRDDAT4 0x10
|
||||
#define BRDSTB 0x10
|
||||
#define BRDCS 0x08
|
||||
#define BRDDAT3 0x08
|
||||
#define BRDDAT2 0x04
|
||||
#define BRDRW 0x04
|
||||
#define BRDRW_ULTRA2 0x02
|
||||
#define BRDCTL1 0x02
|
||||
#define BRDSTB_ULTRA2 0x01
|
||||
#define BRDCTL0 0x01
|
||||
|
||||
#define SEECTL 0x1e
|
||||
#define EXTARBACK 0x80
|
||||
#define EXTARBREQ 0x40
|
||||
#define SEEMS 0x20
|
||||
#define SEERDY 0x10
|
||||
#define SEECS 0x08
|
||||
#define SEECK 0x04
|
||||
#define SEEDO 0x02
|
||||
#define SEEDI 0x01
|
||||
|
||||
#define SBLKCTL 0x1f
|
||||
#define DIAGLEDEN 0x80
|
||||
#define DIAGLEDON 0x40
|
||||
#define AUTOFLUSHDIS 0x20
|
||||
#define ENAB40 0x08
|
||||
#define ENAB20 0x04
|
||||
#define SELWIDE 0x02
|
||||
#define XCVR 0x01
|
||||
|
||||
#define SRAM_BASE 0x20
|
||||
|
||||
#define TARG_SCSIRATE 0x20
|
||||
|
||||
#define ULTRA_ENB 0x30
|
||||
|
||||
#define DISC_DSB 0x32
|
||||
|
||||
#define MSG_OUT 0x34
|
||||
|
||||
#define DMAPARAMS 0x35
|
||||
#define PRELOADEN 0x80
|
||||
#define WIDEODD 0x40
|
||||
#define SCSIEN 0x20
|
||||
#define SDMAENACK 0x10
|
||||
#define SDMAEN 0x10
|
||||
#define HDMAEN 0x08
|
||||
#define HDMAENACK 0x08
|
||||
#define DIRECTION 0x04
|
||||
#define FIFOFLUSH 0x02
|
||||
#define FIFORESET 0x01
|
||||
|
||||
#define SEQ_FLAGS 0x36
|
||||
#define IDENTIFY_SEEN 0x80
|
||||
#define SCBPTR_VALID 0x20
|
||||
#define DPHASE 0x10
|
||||
#define AMTARGET 0x08
|
||||
#define WIDE_BUS 0x02
|
||||
#define TWIN_BUS 0x01
|
||||
|
||||
#define SAVED_TCL 0x37
|
||||
|
||||
#define SG_COUNT 0x38
|
||||
|
||||
#define SG_NEXT 0x39
|
||||
|
||||
#define LASTPHASE 0x3d
|
||||
#define P_MESGIN 0xe0
|
||||
#define PHASE_MASK 0xe0
|
||||
#define P_STATUS 0xc0
|
||||
#define P_MESGOUT 0xa0
|
||||
#define P_COMMAND 0x80
|
||||
#define CDI 0x80
|
||||
#define IOI 0x40
|
||||
#define P_DATAIN 0x40
|
||||
#define MSGI 0x20
|
||||
#define P_BUSFREE 0x01
|
||||
#define P_DATAOUT 0x00
|
||||
|
||||
#define WAITING_SCBH 0x3e
|
||||
|
||||
#define DISCONNECTED_SCBH 0x3f
|
||||
|
||||
#define FREE_SCBH 0x40
|
||||
|
||||
#define HSCB_ADDR 0x41
|
||||
|
||||
#define SCBID_ADDR 0x45
|
||||
|
||||
#define TMODE_CMDADDR 0x49
|
||||
|
||||
#define KERNEL_QINPOS 0x4d
|
||||
|
||||
#define QINPOS 0x4e
|
||||
|
||||
#define QOUTPOS 0x4f
|
||||
|
||||
#define TMODE_CMDADDR_NEXT 0x50
|
||||
|
||||
#define ARG_1 0x51
|
||||
#define RETURN_1 0x51
|
||||
#define SEND_MSG 0x80
|
||||
#define SEND_SENSE 0x40
|
||||
#define SEND_REJ 0x20
|
||||
#define MSGOUT_PHASEMIS 0x10
|
||||
|
||||
#define ARG_2 0x52
|
||||
#define RETURN_2 0x52
|
||||
|
||||
#define LAST_MSG 0x53
|
||||
|
||||
#define PREFETCH_CNT 0x54
|
||||
|
||||
#define SCSICONF 0x5a
|
||||
#define TERM_ENB 0x80
|
||||
#define RESET_SCSI 0x40
|
||||
#define HWSCSIID 0x0f
|
||||
#define HSCSIID 0x07
|
||||
|
||||
#define HOSTCONF 0x5d
|
||||
|
||||
#define HA_274_BIOSCTRL 0x5f
|
||||
#define BIOSMODE 0x30
|
||||
#define BIOSDISABLED 0x30
|
||||
#define CHANNEL_B_PRIMARY 0x08
|
||||
|
||||
#define SEQCTL 0x60
|
||||
#define PERRORDIS 0x80
|
||||
#define PAUSEDIS 0x40
|
||||
#define FAILDIS 0x20
|
||||
#define FASTMODE 0x10
|
||||
#define BRKADRINTEN 0x08
|
||||
#define STEP 0x04
|
||||
#define SEQRESET 0x02
|
||||
#define LOADRAM 0x01
|
||||
|
||||
#define SEQRAM 0x61
|
||||
|
||||
#define SEQADDR0 0x62
|
||||
|
||||
#define SEQADDR1 0x63
|
||||
#define SEQADDR1_MASK 0x01
|
||||
|
||||
#define ACCUM 0x64
|
||||
|
||||
#define SINDEX 0x65
|
||||
|
||||
#define DINDEX 0x66
|
||||
|
||||
#define ALLONES 0x69
|
||||
|
||||
#define ALLZEROS 0x6a
|
||||
|
||||
#define NONE 0x6a
|
||||
|
||||
#define FLAGS 0x6b
|
||||
#define ZERO 0x02
|
||||
#define CARRY 0x01
|
||||
|
||||
#define SINDIR 0x6c
|
||||
|
||||
#define DINDIR 0x6d
|
||||
|
||||
#define FUNCTION1 0x6e
|
||||
|
||||
#define STACK 0x6f
|
||||
|
||||
#define TARG_OFFSET 0x70
|
||||
|
||||
#define BCTL 0x84
|
||||
#define ACE 0x08
|
||||
#define ENABLE 0x01
|
||||
|
||||
#define DSCOMMAND0 0x84
|
||||
#define INTSCBRAMSEL 0x08
|
||||
#define RAMPS 0x04
|
||||
#define USCBSIZE32 0x02
|
||||
#define CIOPARCKEN 0x01
|
||||
|
||||
#define DSCOMMAND 0x84
|
||||
#define CACHETHEN 0x80
|
||||
#define DPARCKEN 0x40
|
||||
#define MPARCKEN 0x20
|
||||
#define EXTREQLCK 0x10
|
||||
|
||||
#define BUSTIME 0x85
|
||||
#define BOFF 0xf0
|
||||
#define BON 0x0f
|
||||
|
||||
#define BUSSPD 0x86
|
||||
#define DFTHRSH 0xc0
|
||||
#define STBOFF 0x38
|
||||
#define STBON 0x07
|
||||
|
||||
#define DSPCISTATUS 0x86
|
||||
#define DFTHRSH_100 0xc0
|
||||
|
||||
#define HCNTRL 0x87
|
||||
#define POWRDN 0x40
|
||||
#define SWINT 0x10
|
||||
#define IRQMS 0x08
|
||||
#define PAUSE 0x04
|
||||
#define INTEN 0x02
|
||||
#define CHIPRST 0x01
|
||||
#define CHIPRSTACK 0x01
|
||||
|
||||
#define HADDR 0x88
|
||||
|
||||
#define HCNT 0x8c
|
||||
|
||||
#define SCBPTR 0x90
|
||||
|
||||
#define INTSTAT 0x91
|
||||
#define SEQINT_MASK 0xf1
|
||||
#define DATA_OVERRUN 0xe1
|
||||
#define MSGIN_PHASEMIS 0xd1
|
||||
#define TRACEPOINT2 0xc1
|
||||
#define SEQ_SG_FIXUP 0xb1
|
||||
#define AWAITING_MSG 0xa1
|
||||
#define RESIDUAL 0x81
|
||||
#define BAD_STATUS 0x71
|
||||
#define REJECT_MSG 0x61
|
||||
#define WIDE_RESIDUE 0x51
|
||||
#define EXTENDED_MSG 0x41
|
||||
#define NO_MATCH 0x31
|
||||
#define NO_IDENT 0x21
|
||||
#define SEND_REJECT 0x11
|
||||
#define INT_PEND 0x0f
|
||||
#define BRKADRINT 0x08
|
||||
#define SCSIINT 0x04
|
||||
#define CMDCMPLT 0x02
|
||||
#define BAD_PHASE 0x01
|
||||
#define SEQINT 0x01
|
||||
|
||||
#define CLRINT 0x92
|
||||
#define CLRPARERR 0x10
|
||||
#define CLRBRKADRINT 0x08
|
||||
#define CLRSCSIINT 0x04
|
||||
#define CLRCMDINT 0x02
|
||||
#define CLRSEQINT 0x01
|
||||
|
||||
#define ERROR 0x92
|
||||
#define CIOPARERR 0x80
|
||||
#define PCIERRSTAT 0x40
|
||||
#define MPARERR 0x20
|
||||
#define DPARERR 0x10
|
||||
#define SQPARERR 0x08
|
||||
#define ILLOPCODE 0x04
|
||||
#define DSCTMOUT 0x02
|
||||
#define ILLSADDR 0x02
|
||||
#define ILLHADDR 0x01
|
||||
|
||||
#define DFCNTRL 0x93
|
||||
|
||||
#define DFSTATUS 0x94
|
||||
#define PRELOAD_AVAIL 0x80
|
||||
#define DWORDEMP 0x20
|
||||
#define MREQPEND 0x10
|
||||
#define HDONE 0x08
|
||||
#define DFTHRESH 0x04
|
||||
#define FIFOFULL 0x02
|
||||
#define FIFOEMP 0x01
|
||||
|
||||
#define DFDAT 0x99
|
||||
|
||||
#define SCBCNT 0x9a
|
||||
#define SCBAUTO 0x80
|
||||
#define SCBCNT_MASK 0x1f
|
||||
|
||||
#define QINFIFO 0x9b
|
||||
|
||||
#define QINCNT 0x9c
|
||||
|
||||
#define SCSIDATL_IMG 0x9c
|
||||
|
||||
#define QOUTFIFO 0x9d
|
||||
|
||||
#define CRCCONTROL1 0x9d
|
||||
#define CRCONSEEN 0x80
|
||||
#define CRCVALCHKEN 0x40
|
||||
#define CRCENDCHKEN 0x20
|
||||
#define CRCREQCHKEN 0x10
|
||||
#define TARGCRCENDEN 0x08
|
||||
#define TARGCRCCNTEN 0x04
|
||||
|
||||
#define SCSIPHASE 0x9e
|
||||
#define SP_STATUS 0x20
|
||||
#define SP_COMMAND 0x10
|
||||
#define SP_MSG_IN 0x08
|
||||
#define SP_MSG_OUT 0x04
|
||||
#define SP_DATA_IN 0x02
|
||||
#define SP_DATA_OUT 0x01
|
||||
|
||||
#define QOUTCNT 0x9e
|
||||
|
||||
#define SFUNCT 0x9f
|
||||
#define ALT_MODE 0x80
|
||||
|
||||
#define SCB_CONTROL 0xa0
|
||||
#define MK_MESSAGE 0x80
|
||||
#define DISCENB 0x40
|
||||
#define TAG_ENB 0x20
|
||||
#define DISCONNECTED 0x04
|
||||
#define SCB_TAG_TYPE 0x03
|
||||
|
||||
#define SCB_BASE 0xa0
|
||||
|
||||
#define SCB_TCL 0xa1
|
||||
#define TID 0xf0
|
||||
#define SELBUSB 0x08
|
||||
#define LID 0x07
|
||||
|
||||
#define SCB_TARGET_STATUS 0xa2
|
||||
|
||||
#define SCB_SGCOUNT 0xa3
|
||||
|
||||
#define SCB_SGPTR 0xa4
|
||||
|
||||
#define SCB_RESID_SGCNT 0xa8
|
||||
|
||||
#define SCB_RESID_DCNT 0xa9
|
||||
|
||||
#define SCB_DATAPTR 0xac
|
||||
|
||||
#define SCB_DATACNT 0xb0
|
||||
|
||||
#define SCB_CMDPTR 0xb4
|
||||
|
||||
#define SCB_CMDLEN 0xb8
|
||||
|
||||
#define SCB_TAG 0xb9
|
||||
|
||||
#define SCB_NEXT 0xba
|
||||
|
||||
#define SCB_PREV 0xbb
|
||||
|
||||
#define SCB_BUSYTARGETS 0xbc
|
||||
|
||||
#define SEECTL_2840 0xc0
|
||||
#define CS_2840 0x04
|
||||
#define CK_2840 0x02
|
||||
#define DO_2840 0x01
|
||||
|
||||
#define STATUS_2840 0xc1
|
||||
#define EEPROM_TF 0x80
|
||||
#define BIOS_SEL 0x60
|
||||
#define ADSEL 0x1e
|
||||
#define DI_2840 0x01
|
||||
|
||||
#define CCHADDR 0xe0
|
||||
|
||||
#define CCHCNT 0xe8
|
||||
|
||||
#define CCSGRAM 0xe9
|
||||
|
||||
#define CCSGADDR 0xea
|
||||
|
||||
#define CCSGCTL 0xeb
|
||||
#define CCSGDONE 0x80
|
||||
#define CCSGEN 0x08
|
||||
#define FLAG 0x02
|
||||
#define CCSGRESET 0x01
|
||||
|
||||
#define CCSCBRAM 0xec
|
||||
|
||||
#define CCSCBADDR 0xed
|
||||
|
||||
#define CCSCBCTL 0xee
|
||||
#define CCSCBDONE 0x80
|
||||
#define ARRDONE 0x40
|
||||
#define CCARREN 0x10
|
||||
#define CCSCBEN 0x08
|
||||
#define CCSCBDIR 0x04
|
||||
#define CCSCBRESET 0x01
|
||||
|
||||
#define CCSCBCNT 0xef
|
||||
|
||||
#define CCSCBPTR 0xf1
|
||||
|
||||
#define HNSCB_QOFF 0xf4
|
||||
|
||||
#define HESCB_QOFF 0xf5
|
||||
|
||||
#define SNSCB_QOFF 0xf6
|
||||
|
||||
#define SESCB_QOFF 0xf7
|
||||
|
||||
#define SDSCB_QOFF 0xf8
|
||||
|
||||
#define QOFF_CTLSTA 0xfa
|
||||
#define ESTABLISH_SCB_AVAIL 0x80
|
||||
#define SCB_AVAIL 0x40
|
||||
#define SNSCB_ROLLOVER 0x20
|
||||
#define SDSCB_ROLLOVER 0x10
|
||||
#define SESCB_ROLLOVER 0x08
|
||||
#define SCB_QSIZE 0x07
|
||||
#define SCB_QSIZE_256 0x06
|
||||
|
||||
#define DFF_THRSH 0xfb
|
||||
#define WR_DFTHRSH 0x70
|
||||
#define WR_DFTHRSH_MAX 0x70
|
||||
#define WR_DFTHRSH_90 0x60
|
||||
#define WR_DFTHRSH_85 0x50
|
||||
#define WR_DFTHRSH_75 0x40
|
||||
#define WR_DFTHRSH_63 0x30
|
||||
#define WR_DFTHRSH_50 0x20
|
||||
#define WR_DFTHRSH_25 0x10
|
||||
#define RD_DFTHRSH_MAX 0x07
|
||||
#define RD_DFTHRSH 0x07
|
||||
#define RD_DFTHRSH_90 0x06
|
||||
#define RD_DFTHRSH_85 0x05
|
||||
#define RD_DFTHRSH_75 0x04
|
||||
#define RD_DFTHRSH_63 0x03
|
||||
#define RD_DFTHRSH_50 0x02
|
||||
#define RD_DFTHRSH_25 0x01
|
||||
#define WR_DFTHRSH_MIN 0x00
|
||||
#define RD_DFTHRSH_MIN 0x00
|
||||
|
||||
#define SG_CACHEPTR 0xfc
|
||||
#define SG_USER_DATA 0xfc
|
||||
#define LAST_SEG 0x02
|
||||
#define LAST_SEG_DONE 0x01
|
||||
|
||||
|
||||
#define CMD_GROUP2_BYTE_DELTA 0xfa
|
||||
#define MAX_OFFSET_8BIT 0x0f
|
||||
#define BUS_16_BIT 0x01
|
||||
#define QINFIFO_OFFSET 0x02
|
||||
#define CMD_GROUP5_BYTE_DELTA 0x0b
|
||||
#define CMD_GROUP_CODE_SHIFT 0x05
|
||||
#define MAX_OFFSET_ULTRA2 0x7f
|
||||
#define MAX_OFFSET_16BIT 0x08
|
||||
#define BUS_8_BIT 0x00
|
||||
#define QOUTFIFO_OFFSET 0x01
|
||||
#define UNTAGGEDSCB_OFFSET 0x00
|
||||
#define CCSGRAM_MAXSEGS 0x10
|
||||
#define SCB_LIST_NULL 0xff
|
||||
#define SG_SIZEOF 0x08
|
||||
#define CMD_GROUP4_BYTE_DELTA 0x04
|
||||
#define CMD_GROUP0_BYTE_DELTA 0xfc
|
||||
#define HOST_MSG 0xff
|
||||
#define BUS_32_BIT 0x02
|
||||
#define CCSGADDR_MAX 0x80
|
||||
|
||||
|
||||
/* Downloaded Constant Definitions */
|
||||
#define TMODE_NUMCMDS 0x00
|
817
drivers/scsi/aic7xxx_old/aic7xxx_seq.c
Normal file
817
drivers/scsi/aic7xxx_old/aic7xxx_seq.c
Normal file
|
@ -0,0 +1,817 @@
|
|||
/*
|
||||
* DO NOT EDIT - This file is automatically generated.
|
||||
*/
|
||||
static unsigned char seqprog[] = {
|
||||
0xff, 0x6a, 0x06, 0x08,
|
||||
0x7f, 0x02, 0x04, 0x08,
|
||||
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|
||||
0x00, 0x65, 0x80, 0x5c,
|
||||
0x00, 0x65, 0xbc, 0x40,
|
||||
0x41, 0x6a, 0x22, 0x01,
|
||||
0x00, 0x65, 0xaa, 0x40,
|
||||
0x04, 0xa0, 0x40, 0x01,
|
||||
0x00, 0x65, 0x98, 0x5c,
|
||||
0x00, 0x65, 0xbc, 0x40,
|
||||
0x10, 0x36, 0x50, 0x7a,
|
||||
0x05, 0x38, 0x46, 0x31,
|
||||
0x04, 0x14, 0x58, 0x31,
|
||||
0x03, 0xa9, 0x60, 0x31,
|
||||
0xa3, 0x6a, 0xcc, 0x00,
|
||||
0x38, 0x6a, 0xcc, 0x5b,
|
||||
0xac, 0x6a, 0xcc, 0x00,
|
||||
0x14, 0x6a, 0xce, 0x5b,
|
||||
0xa9, 0x6a, 0xd0, 0x5b,
|
||||
0x00, 0x65, 0x50, 0x42,
|
||||
0xef, 0x36, 0x6c, 0x08,
|
||||
0x00, 0x65, 0x50, 0x42,
|
||||
0x0f, 0x64, 0xc8, 0x08,
|
||||
0x07, 0x64, 0xc8, 0x08,
|
||||
0x00, 0x37, 0x6e, 0x00,
|
||||
0xff, 0x6a, 0xa4, 0x00,
|
||||
0x00, 0x65, 0x60, 0x5b,
|
||||
0xff, 0x51, 0xbc, 0x72,
|
||||
0x20, 0x36, 0xc6, 0x7a,
|
||||
0x00, 0x90, 0x4e, 0x5b,
|
||||
0x00, 0x65, 0xc8, 0x42,
|
||||
0xff, 0x06, 0xd4, 0x08,
|
||||
0x00, 0x65, 0xba, 0x5b,
|
||||
0xe0, 0x3d, 0xe2, 0x62,
|
||||
0x20, 0x12, 0xe2, 0x62,
|
||||
0x51, 0x6a, 0xf6, 0x5a,
|
||||
0x00, 0x65, 0x48, 0x5b,
|
||||
0xff, 0x37, 0xc8, 0x08,
|
||||
0x00, 0xa1, 0xda, 0x62,
|
||||
0x04, 0xa0, 0xda, 0x7a,
|
||||
0xfb, 0xa0, 0x40, 0x09,
|
||||
0x80, 0x36, 0x6c, 0x00,
|
||||
0x80, 0xa0, 0x50, 0x7a,
|
||||
0x7f, 0xa0, 0x40, 0x09,
|
||||
0xff, 0x6a, 0xf2, 0x5a,
|
||||
0x00, 0x65, 0x50, 0x42,
|
||||
0x04, 0xa0, 0xe0, 0x7a,
|
||||
0x00, 0x65, 0x98, 0x5c,
|
||||
0x00, 0x65, 0xe2, 0x42,
|
||||
0x00, 0x65, 0x80, 0x5c,
|
||||
0x31, 0x6a, 0x22, 0x01,
|
||||
0x0c, 0x6a, 0xf2, 0x5a,
|
||||
0x00, 0x65, 0x50, 0x42,
|
||||
0x61, 0x6a, 0x22, 0x01,
|
||||
0x00, 0x65, 0x50, 0x42,
|
||||
0x51, 0x6a, 0xf6, 0x5a,
|
||||
0x51, 0x6a, 0x22, 0x01,
|
||||
0x00, 0x65, 0x50, 0x42,
|
||||
0x10, 0x3d, 0x06, 0x00,
|
||||
0xff, 0x65, 0x68, 0x0c,
|
||||
0xff, 0x06, 0xd4, 0x08,
|
||||
0x01, 0x0c, 0xf8, 0x7a,
|
||||
0x04, 0x0c, 0xfa, 0x6a,
|
||||
0xe0, 0x03, 0x7a, 0x08,
|
||||
0xe0, 0x3d, 0x06, 0x63,
|
||||
0xff, 0x65, 0xcc, 0x08,
|
||||
0xff, 0x12, 0xda, 0x0c,
|
||||
0xff, 0x06, 0xd4, 0x0c,
|
||||
0xd1, 0x6a, 0x22, 0x01,
|
||||
0x00, 0x65, 0xaa, 0x40,
|
||||
0xff, 0x65, 0x26, 0x09,
|
||||
0x01, 0x0b, 0x1a, 0x6b,
|
||||
0x10, 0x0c, 0x0c, 0x7b,
|
||||
0x04, 0x0b, 0x14, 0x6b,
|
||||
0xff, 0x6a, 0xca, 0x08,
|
||||
0x04, 0x93, 0x18, 0x6b,
|
||||
0x01, 0x94, 0x16, 0x7b,
|
||||
0x10, 0x94, 0x18, 0x6b,
|
||||
0x80, 0x3d, 0x1e, 0x73,
|
||||
0x0f, 0x04, 0x22, 0x6b,
|
||||
0x02, 0x03, 0x22, 0x7b,
|
||||
0x11, 0x0c, 0x1e, 0x7b,
|
||||
0xc7, 0x93, 0x26, 0x09,
|
||||
0xff, 0x99, 0xd4, 0x08,
|
||||
0x38, 0x93, 0x24, 0x6b,
|
||||
0xff, 0x6a, 0xd4, 0x0c,
|
||||
0x80, 0x36, 0x28, 0x6b,
|
||||
0x21, 0x6a, 0x22, 0x05,
|
||||
0xff, 0x65, 0x20, 0x09,
|
||||
0xff, 0x51, 0x36, 0x63,
|
||||
0xff, 0x37, 0xc8, 0x08,
|
||||
0xa1, 0x6a, 0x42, 0x43,
|
||||
0xff, 0x51, 0xc8, 0x08,
|
||||
0xb9, 0x6a, 0x42, 0x43,
|
||||
0xff, 0x90, 0xa4, 0x08,
|
||||
0xff, 0xba, 0x46, 0x73,
|
||||
0xff, 0xba, 0x20, 0x09,
|
||||
0xff, 0x65, 0xca, 0x18,
|
||||
0x00, 0x6c, 0x3a, 0x63,
|
||||
0xff, 0x90, 0xca, 0x0c,
|
||||
0xff, 0x6a, 0xca, 0x04,
|
||||
0x20, 0x36, 0x5a, 0x7b,
|
||||
0x00, 0x90, 0x2e, 0x5b,
|
||||
0xff, 0x65, 0x5a, 0x73,
|
||||
0xff, 0x52, 0x58, 0x73,
|
||||
0xff, 0xba, 0xcc, 0x08,
|
||||
0xff, 0x52, 0x20, 0x09,
|
||||
0xff, 0x66, 0x74, 0x09,
|
||||
0xff, 0x65, 0x20, 0x0d,
|
||||
0xff, 0xba, 0x7e, 0x0c,
|
||||
0x00, 0x6a, 0x86, 0x5c,
|
||||
0x0d, 0x6a, 0x6a, 0x00,
|
||||
0x00, 0x51, 0xe6, 0x43,
|
||||
0xff, 0x3f, 0xb4, 0x73,
|
||||
0xff, 0x6a, 0xa2, 0x00,
|
||||
0x00, 0x3f, 0x2e, 0x5b,
|
||||
0xff, 0x65, 0xb4, 0x73,
|
||||
0x20, 0x36, 0x6c, 0x00,
|
||||
0x20, 0xa0, 0x6e, 0x6b,
|
||||
0xff, 0xb9, 0xa2, 0x0c,
|
||||
0xff, 0x6a, 0xa2, 0x04,
|
||||
0xff, 0x65, 0xa4, 0x08,
|
||||
0xe0, 0x6a, 0xcc, 0x00,
|
||||
0x45, 0x6a, 0xda, 0x5b,
|
||||
0x01, 0x6a, 0xd0, 0x01,
|
||||
0x09, 0x6a, 0xd6, 0x01,
|
||||
0x80, 0xeb, 0x7a, 0x7b,
|
||||
0x01, 0x6a, 0xd6, 0x01,
|
||||
0x01, 0xe9, 0xa4, 0x34,
|
||||
0x88, 0x6a, 0xcc, 0x00,
|
||||
0x45, 0x6a, 0xda, 0x5b,
|
||||
0x01, 0x6a, 0x18, 0x01,
|
||||
0xff, 0x6a, 0x1a, 0x09,
|
||||
0xff, 0x6a, 0x1c, 0x09,
|
||||
0x0d, 0x6a, 0x26, 0x01,
|
||||
0x00, 0x65, 0x78, 0x5c,
|
||||
0xff, 0x99, 0xa4, 0x0c,
|
||||
0xff, 0x65, 0xa4, 0x08,
|
||||
0xe0, 0x6a, 0xcc, 0x00,
|
||||
0x45, 0x6a, 0xda, 0x5b,
|
||||
0x01, 0x6a, 0xd0, 0x01,
|
||||
0x01, 0x6a, 0xdc, 0x05,
|
||||
0x88, 0x6a, 0xcc, 0x00,
|
||||
0x45, 0x6a, 0xda, 0x5b,
|
||||
0x01, 0x6a, 0x18, 0x01,
|
||||
0xff, 0x6a, 0x1a, 0x09,
|
||||
0xff, 0x6a, 0x1c, 0x09,
|
||||
0x01, 0x6a, 0x26, 0x05,
|
||||
0x01, 0x65, 0xd8, 0x31,
|
||||
0x09, 0xee, 0xdc, 0x01,
|
||||
0x80, 0xee, 0xaa, 0x7b,
|
||||
0xff, 0x6a, 0xdc, 0x0d,
|
||||
0xff, 0x65, 0x32, 0x09,
|
||||
0x0a, 0x93, 0x26, 0x01,
|
||||
0x00, 0x65, 0x78, 0x44,
|
||||
0xff, 0x37, 0xc8, 0x08,
|
||||
0x00, 0x6a, 0x70, 0x5b,
|
||||
0xff, 0x52, 0xa2, 0x0c,
|
||||
0x01, 0x0c, 0xba, 0x7b,
|
||||
0x04, 0x0c, 0xba, 0x6b,
|
||||
0xe0, 0x03, 0x06, 0x08,
|
||||
0xe0, 0x03, 0x7a, 0x0c,
|
||||
0xff, 0x8c, 0x10, 0x08,
|
||||
0xff, 0x8d, 0x12, 0x08,
|
||||
0xff, 0x8e, 0x14, 0x0c,
|
||||
0xff, 0x6c, 0xda, 0x08,
|
||||
0xff, 0x6c, 0xda, 0x08,
|
||||
0xff, 0x6c, 0xda, 0x08,
|
||||
0xff, 0x6c, 0xda, 0x08,
|
||||
0xff, 0x6c, 0xda, 0x08,
|
||||
0xff, 0x6c, 0xda, 0x08,
|
||||
0xff, 0x6c, 0xda, 0x0c,
|
||||
0x3d, 0x64, 0xa4, 0x28,
|
||||
0x55, 0x64, 0xc8, 0x28,
|
||||
0x00, 0x6c, 0xda, 0x18,
|
||||
0xff, 0x52, 0xc8, 0x08,
|
||||
0x00, 0x6c, 0xda, 0x20,
|
||||
0xff, 0x6a, 0xc8, 0x08,
|
||||
0x00, 0x6c, 0xda, 0x20,
|
||||
0x00, 0x6c, 0xda, 0x24,
|
||||
0xff, 0x65, 0xc8, 0x08,
|
||||
0xe0, 0x6a, 0xcc, 0x00,
|
||||
0x41, 0x6a, 0xd6, 0x5b,
|
||||
0xff, 0x90, 0xe2, 0x09,
|
||||
0x20, 0x6a, 0xd0, 0x01,
|
||||
0x04, 0x35, 0xf8, 0x7b,
|
||||
0x1d, 0x6a, 0xdc, 0x01,
|
||||
0xdc, 0xee, 0xf4, 0x63,
|
||||
0x00, 0x65, 0x0e, 0x44,
|
||||
0x01, 0x6a, 0xdc, 0x01,
|
||||
0x20, 0xa0, 0xd8, 0x31,
|
||||
0x09, 0xee, 0xdc, 0x01,
|
||||
0x80, 0xee, 0xfe, 0x7b,
|
||||
0x11, 0x6a, 0xdc, 0x01,
|
||||
0x50, 0xee, 0x02, 0x64,
|
||||
0x20, 0x6a, 0xd0, 0x01,
|
||||
0x09, 0x6a, 0xdc, 0x01,
|
||||
0x88, 0xee, 0x08, 0x64,
|
||||
0x19, 0x6a, 0xdc, 0x01,
|
||||
0xd8, 0xee, 0x0c, 0x64,
|
||||
0xff, 0x6a, 0xdc, 0x09,
|
||||
0x18, 0xee, 0x10, 0x6c,
|
||||
0xff, 0x6a, 0xd4, 0x0c,
|
||||
0x88, 0x6a, 0xcc, 0x00,
|
||||
0x41, 0x6a, 0xd6, 0x5b,
|
||||
0x20, 0x6a, 0x18, 0x01,
|
||||
0xff, 0x6a, 0x1a, 0x09,
|
||||
0xff, 0x6a, 0x1c, 0x09,
|
||||
0xff, 0x35, 0x26, 0x09,
|
||||
0x04, 0x35, 0x3c, 0x6c,
|
||||
0xa0, 0x6a, 0xca, 0x00,
|
||||
0x20, 0x65, 0xc8, 0x18,
|
||||
0xff, 0x6c, 0x32, 0x09,
|
||||
0xff, 0x6c, 0x32, 0x09,
|
||||
0xff, 0x6c, 0x32, 0x09,
|
||||
0xff, 0x6c, 0x32, 0x09,
|
||||
0xff, 0x6c, 0x32, 0x09,
|
||||
0xff, 0x6c, 0x32, 0x09,
|
||||
0xff, 0x6c, 0x32, 0x09,
|
||||
0xff, 0x6c, 0x32, 0x09,
|
||||
0x00, 0x65, 0x26, 0x64,
|
||||
0x0a, 0x93, 0x26, 0x01,
|
||||
0x00, 0x65, 0x78, 0x44,
|
||||
0xa0, 0x6a, 0xcc, 0x00,
|
||||
0xe8, 0x6a, 0xc8, 0x00,
|
||||
0x01, 0x94, 0x40, 0x6c,
|
||||
0x10, 0x94, 0x42, 0x6c,
|
||||
0x08, 0x94, 0x54, 0x6c,
|
||||
0x08, 0x94, 0x54, 0x6c,
|
||||
0x08, 0x94, 0x54, 0x6c,
|
||||
0x00, 0x65, 0x68, 0x5c,
|
||||
0x08, 0x64, 0xc8, 0x18,
|
||||
0x00, 0x8c, 0xca, 0x18,
|
||||
0x00, 0x65, 0x4a, 0x4c,
|
||||
0x00, 0x65, 0x40, 0x44,
|
||||
0xf7, 0x93, 0x26, 0x09,
|
||||
0x08, 0x93, 0x56, 0x6c,
|
||||
0x00, 0x65, 0x68, 0x5c,
|
||||
0x08, 0x64, 0xc8, 0x18,
|
||||
0x08, 0x64, 0x58, 0x64,
|
||||
0xff, 0x6a, 0xd4, 0x0c,
|
||||
0x00, 0x65, 0x78, 0x5c,
|
||||
0x00, 0x65, 0x68, 0x5c,
|
||||
0x00, 0x65, 0x68, 0x5c,
|
||||
0x00, 0x65, 0x68, 0x5c,
|
||||
0xff, 0x99, 0xda, 0x08,
|
||||
0xff, 0x99, 0xda, 0x08,
|
||||
0xff, 0x99, 0xda, 0x08,
|
||||
0xff, 0x99, 0xda, 0x08,
|
||||
0xff, 0x99, 0xda, 0x08,
|
||||
0xff, 0x99, 0xda, 0x08,
|
||||
0xff, 0x99, 0xda, 0x08,
|
||||
0xff, 0x99, 0xda, 0x0c,
|
||||
0x08, 0x94, 0x78, 0x7c,
|
||||
0xf7, 0x93, 0x26, 0x09,
|
||||
0x08, 0x93, 0x7c, 0x6c,
|
||||
0xff, 0x6a, 0xd4, 0x0c,
|
||||
0xff, 0x40, 0x74, 0x09,
|
||||
0xff, 0x90, 0x80, 0x08,
|
||||
0xff, 0x6a, 0x72, 0x05,
|
||||
0xff, 0x40, 0x94, 0x64,
|
||||
0xff, 0x3f, 0x8c, 0x64,
|
||||
0xff, 0x6a, 0xca, 0x04,
|
||||
0xff, 0x3f, 0x20, 0x09,
|
||||
0x01, 0x6a, 0x6a, 0x00,
|
||||
0x00, 0xb9, 0xe6, 0x5b,
|
||||
0xff, 0xba, 0x7e, 0x0c,
|
||||
0xff, 0x40, 0x20, 0x09,
|
||||
0xff, 0xba, 0x80, 0x0c,
|
||||
0xff, 0x3f, 0x74, 0x09,
|
||||
0xff, 0x90, 0x7e, 0x0c,
|
||||
};
|
||||
|
||||
static int aic7xxx_patch15_func(struct aic7xxx_host *p);
|
||||
|
||||
static int
|
||||
aic7xxx_patch15_func(struct aic7xxx_host *p)
|
||||
{
|
||||
return ((p->bugs & AHC_BUG_SCBCHAN_UPLOAD) != 0);
|
||||
}
|
||||
|
||||
static int aic7xxx_patch14_func(struct aic7xxx_host *p);
|
||||
|
||||
static int
|
||||
aic7xxx_patch14_func(struct aic7xxx_host *p)
|
||||
{
|
||||
return ((p->bugs & AHC_BUG_PCI_2_1_RETRY) != 0);
|
||||
}
|
||||
|
||||
static int aic7xxx_patch13_func(struct aic7xxx_host *p);
|
||||
|
||||
static int
|
||||
aic7xxx_patch13_func(struct aic7xxx_host *p)
|
||||
{
|
||||
return ((p->features & AHC_WIDE) != 0);
|
||||
}
|
||||
|
||||
static int aic7xxx_patch12_func(struct aic7xxx_host *p);
|
||||
|
||||
static int
|
||||
aic7xxx_patch12_func(struct aic7xxx_host *p)
|
||||
{
|
||||
return ((p->bugs & AHC_BUG_AUTOFLUSH) != 0);
|
||||
}
|
||||
|
||||
static int aic7xxx_patch11_func(struct aic7xxx_host *p);
|
||||
|
||||
static int
|
||||
aic7xxx_patch11_func(struct aic7xxx_host *p)
|
||||
{
|
||||
return ((p->features & AHC_ULTRA2) == 0);
|
||||
}
|
||||
|
||||
static int aic7xxx_patch10_func(struct aic7xxx_host *p);
|
||||
|
||||
static int
|
||||
aic7xxx_patch10_func(struct aic7xxx_host *p)
|
||||
{
|
||||
return ((p->features & AHC_CMD_CHAN) == 0);
|
||||
}
|
||||
|
||||
static int aic7xxx_patch9_func(struct aic7xxx_host *p);
|
||||
|
||||
static int
|
||||
aic7xxx_patch9_func(struct aic7xxx_host *p)
|
||||
{
|
||||
return ((p->chip & AHC_CHIPID_MASK) == AHC_AIC7895);
|
||||
}
|
||||
|
||||
static int aic7xxx_patch8_func(struct aic7xxx_host *p);
|
||||
|
||||
static int
|
||||
aic7xxx_patch8_func(struct aic7xxx_host *p)
|
||||
{
|
||||
return ((p->features & AHC_ULTRA) != 0);
|
||||
}
|
||||
|
||||
static int aic7xxx_patch7_func(struct aic7xxx_host *p);
|
||||
|
||||
static int
|
||||
aic7xxx_patch7_func(struct aic7xxx_host *p)
|
||||
{
|
||||
return ((p->features & AHC_ULTRA2) != 0);
|
||||
}
|
||||
|
||||
static int aic7xxx_patch6_func(struct aic7xxx_host *p);
|
||||
|
||||
static int
|
||||
aic7xxx_patch6_func(struct aic7xxx_host *p)
|
||||
{
|
||||
return ((p->flags & AHC_PAGESCBS) == 0);
|
||||
}
|
||||
|
||||
static int aic7xxx_patch5_func(struct aic7xxx_host *p);
|
||||
|
||||
static int
|
||||
aic7xxx_patch5_func(struct aic7xxx_host *p)
|
||||
{
|
||||
return ((p->flags & AHC_PAGESCBS) != 0);
|
||||
}
|
||||
|
||||
static int aic7xxx_patch4_func(struct aic7xxx_host *p);
|
||||
|
||||
static int
|
||||
aic7xxx_patch4_func(struct aic7xxx_host *p)
|
||||
{
|
||||
return ((p->features & AHC_QUEUE_REGS) != 0);
|
||||
}
|
||||
|
||||
static int aic7xxx_patch3_func(struct aic7xxx_host *p);
|
||||
|
||||
static int
|
||||
aic7xxx_patch3_func(struct aic7xxx_host *p)
|
||||
{
|
||||
return ((p->features & AHC_TWIN) != 0);
|
||||
}
|
||||
|
||||
static int aic7xxx_patch2_func(struct aic7xxx_host *p);
|
||||
|
||||
static int
|
||||
aic7xxx_patch2_func(struct aic7xxx_host *p)
|
||||
{
|
||||
return ((p->features & AHC_QUEUE_REGS) == 0);
|
||||
}
|
||||
|
||||
static int aic7xxx_patch1_func(struct aic7xxx_host *p);
|
||||
|
||||
static int
|
||||
aic7xxx_patch1_func(struct aic7xxx_host *p)
|
||||
{
|
||||
return ((p->features & AHC_CMD_CHAN) != 0);
|
||||
}
|
||||
|
||||
static int aic7xxx_patch0_func(struct aic7xxx_host *p);
|
||||
|
||||
static int
|
||||
aic7xxx_patch0_func(struct aic7xxx_host *p)
|
||||
{
|
||||
return (0);
|
||||
}
|
||||
|
||||
struct sequencer_patch {
|
||||
int (*patch_func)(struct aic7xxx_host *);
|
||||
unsigned int begin :10,
|
||||
skip_instr :10,
|
||||
skip_patch :12;
|
||||
} sequencer_patches[] = {
|
||||
{ aic7xxx_patch1_func, 3, 2, 1 },
|
||||
{ aic7xxx_patch2_func, 7, 1, 1 },
|
||||
{ aic7xxx_patch2_func, 8, 1, 1 },
|
||||
{ aic7xxx_patch3_func, 11, 4, 1 },
|
||||
{ aic7xxx_patch4_func, 16, 3, 2 },
|
||||
{ aic7xxx_patch0_func, 19, 4, 1 },
|
||||
{ aic7xxx_patch5_func, 23, 1, 1 },
|
||||
{ aic7xxx_patch6_func, 26, 1, 1 },
|
||||
{ aic7xxx_patch1_func, 29, 1, 2 },
|
||||
{ aic7xxx_patch0_func, 30, 3, 1 },
|
||||
{ aic7xxx_patch3_func, 39, 4, 1 },
|
||||
{ aic7xxx_patch7_func, 43, 3, 2 },
|
||||
{ aic7xxx_patch0_func, 46, 3, 1 },
|
||||
{ aic7xxx_patch8_func, 52, 7, 1 },
|
||||
{ aic7xxx_patch3_func, 60, 3, 1 },
|
||||
{ aic7xxx_patch7_func, 63, 2, 1 },
|
||||
{ aic7xxx_patch7_func, 102, 1, 2 },
|
||||
{ aic7xxx_patch0_func, 103, 2, 1 },
|
||||
{ aic7xxx_patch7_func, 107, 2, 1 },
|
||||
{ aic7xxx_patch9_func, 109, 1, 1 },
|
||||
{ aic7xxx_patch10_func, 110, 2, 1 },
|
||||
{ aic7xxx_patch7_func, 113, 1, 2 },
|
||||
{ aic7xxx_patch0_func, 114, 1, 1 },
|
||||
{ aic7xxx_patch1_func, 118, 1, 1 },
|
||||
{ aic7xxx_patch1_func, 121, 3, 3 },
|
||||
{ aic7xxx_patch11_func, 123, 1, 1 },
|
||||
{ aic7xxx_patch0_func, 124, 5, 1 },
|
||||
{ aic7xxx_patch7_func, 132, 1, 1 },
|
||||
{ aic7xxx_patch9_func, 133, 1, 1 },
|
||||
{ aic7xxx_patch10_func, 134, 3, 1 },
|
||||
{ aic7xxx_patch7_func, 137, 3, 2 },
|
||||
{ aic7xxx_patch0_func, 140, 2, 1 },
|
||||
{ aic7xxx_patch7_func, 142, 5, 2 },
|
||||
{ aic7xxx_patch0_func, 147, 3, 1 },
|
||||
{ aic7xxx_patch7_func, 150, 1, 2 },
|
||||
{ aic7xxx_patch0_func, 151, 2, 1 },
|
||||
{ aic7xxx_patch1_func, 153, 15, 4 },
|
||||
{ aic7xxx_patch11_func, 166, 1, 2 },
|
||||
{ aic7xxx_patch0_func, 167, 1, 1 },
|
||||
{ aic7xxx_patch0_func, 168, 10, 1 },
|
||||
{ aic7xxx_patch7_func, 181, 1, 2 },
|
||||
{ aic7xxx_patch0_func, 182, 2, 1 },
|
||||
{ aic7xxx_patch7_func, 184, 18, 1 },
|
||||
{ aic7xxx_patch1_func, 202, 3, 3 },
|
||||
{ aic7xxx_patch7_func, 204, 1, 1 },
|
||||
{ aic7xxx_patch0_func, 205, 4, 1 },
|
||||
{ aic7xxx_patch7_func, 210, 2, 1 },
|
||||
{ aic7xxx_patch7_func, 215, 13, 3 },
|
||||
{ aic7xxx_patch12_func, 218, 1, 1 },
|
||||
{ aic7xxx_patch12_func, 219, 4, 1 },
|
||||
{ aic7xxx_patch1_func, 229, 3, 3 },
|
||||
{ aic7xxx_patch11_func, 231, 1, 1 },
|
||||
{ aic7xxx_patch0_func, 232, 5, 1 },
|
||||
{ aic7xxx_patch11_func, 237, 1, 2 },
|
||||
{ aic7xxx_patch0_func, 238, 9, 1 },
|
||||
{ aic7xxx_patch13_func, 254, 1, 2 },
|
||||
{ aic7xxx_patch0_func, 255, 1, 1 },
|
||||
{ aic7xxx_patch4_func, 316, 1, 2 },
|
||||
{ aic7xxx_patch0_func, 317, 1, 1 },
|
||||
{ aic7xxx_patch2_func, 320, 1, 1 },
|
||||
{ aic7xxx_patch1_func, 330, 3, 2 },
|
||||
{ aic7xxx_patch0_func, 333, 5, 1 },
|
||||
{ aic7xxx_patch13_func, 341, 1, 2 },
|
||||
{ aic7xxx_patch0_func, 342, 1, 1 },
|
||||
{ aic7xxx_patch5_func, 347, 1, 1 },
|
||||
{ aic7xxx_patch11_func, 389, 15, 2 },
|
||||
{ aic7xxx_patch14_func, 402, 1, 1 },
|
||||
{ aic7xxx_patch1_func, 441, 7, 2 },
|
||||
{ aic7xxx_patch0_func, 448, 8, 1 },
|
||||
{ aic7xxx_patch1_func, 457, 4, 2 },
|
||||
{ aic7xxx_patch0_func, 461, 6, 1 },
|
||||
{ aic7xxx_patch1_func, 467, 4, 2 },
|
||||
{ aic7xxx_patch0_func, 471, 3, 1 },
|
||||
{ aic7xxx_patch10_func, 481, 10, 1 },
|
||||
{ aic7xxx_patch1_func, 500, 22, 5 },
|
||||
{ aic7xxx_patch11_func, 508, 4, 1 },
|
||||
{ aic7xxx_patch7_func, 512, 7, 3 },
|
||||
{ aic7xxx_patch15_func, 512, 5, 2 },
|
||||
{ aic7xxx_patch0_func, 517, 2, 1 },
|
||||
{ aic7xxx_patch10_func, 522, 50, 3 },
|
||||
{ aic7xxx_patch14_func, 543, 17, 2 },
|
||||
{ aic7xxx_patch0_func, 560, 4, 1 },
|
||||
{ aic7xxx_patch10_func, 572, 4, 1 },
|
||||
{ aic7xxx_patch5_func, 576, 2, 1 },
|
||||
{ aic7xxx_patch5_func, 579, 9, 1 },
|
||||
|
||||
};
|
49
drivers/scsi/aic7xxx_old/scsi_message.h
Normal file
49
drivers/scsi/aic7xxx_old/scsi_message.h
Normal file
|
@ -0,0 +1,49 @@
|
|||
/* Messages (1 byte) */ /* I/T (M)andatory or (O)ptional */
|
||||
#define MSG_CMDCOMPLETE 0x00 /* M/M */
|
||||
#define MSG_EXTENDED 0x01 /* O/O */
|
||||
#define MSG_SAVEDATAPOINTER 0x02 /* O/O */
|
||||
#define MSG_RESTOREPOINTERS 0x03 /* O/O */
|
||||
#define MSG_DISCONNECT 0x04 /* O/O */
|
||||
#define MSG_INITIATOR_DET_ERR 0x05 /* M/M */
|
||||
#define MSG_ABORT 0x06 /* O/M */
|
||||
#define MSG_MESSAGE_REJECT 0x07 /* M/M */
|
||||
#define MSG_NOOP 0x08 /* M/M */
|
||||
#define MSG_PARITY_ERROR 0x09 /* M/M */
|
||||
#define MSG_LINK_CMD_COMPLETE 0x0a /* O/O */
|
||||
#define MSG_LINK_CMD_COMPLETEF 0x0b /* O/O */
|
||||
#define MSG_BUS_DEV_RESET 0x0c /* O/M */
|
||||
#define MSG_ABORT_TAG 0x0d /* O/O */
|
||||
#define MSG_CLEAR_QUEUE 0x0e /* O/O */
|
||||
#define MSG_INIT_RECOVERY 0x0f /* O/O */
|
||||
#define MSG_REL_RECOVERY 0x10 /* O/O */
|
||||
#define MSG_TERM_IO_PROC 0x11 /* O/O */
|
||||
|
||||
/* Messages (2 byte) */
|
||||
#define MSG_SIMPLE_Q_TAG 0x20 /* O/O */
|
||||
#define MSG_HEAD_OF_Q_TAG 0x21 /* O/O */
|
||||
#define MSG_ORDERED_Q_TAG 0x22 /* O/O */
|
||||
#define MSG_IGN_WIDE_RESIDUE 0x23 /* O/O */
|
||||
|
||||
/* Identify message */ /* M/M */
|
||||
#define MSG_IDENTIFYFLAG 0x80
|
||||
#define MSG_IDENTIFY_DISCFLAG 0x40
|
||||
#define MSG_IDENTIFY(lun, disc) (((disc) ? 0xc0 : MSG_IDENTIFYFLAG) | (lun))
|
||||
#define MSG_ISIDENTIFY(m) ((m) & MSG_IDENTIFYFLAG)
|
||||
|
||||
/* Extended messages (opcode and length) */
|
||||
#define MSG_EXT_SDTR 0x01
|
||||
#define MSG_EXT_SDTR_LEN 0x03
|
||||
|
||||
#define MSG_EXT_WDTR 0x03
|
||||
#define MSG_EXT_WDTR_LEN 0x02
|
||||
#define MSG_EXT_WDTR_BUS_8_BIT 0x00
|
||||
#define MSG_EXT_WDTR_BUS_16_BIT 0x01
|
||||
#define MSG_EXT_WDTR_BUS_32_BIT 0x02
|
||||
|
||||
#define MSG_EXT_PPR 0x04
|
||||
#define MSG_EXT_PPR_LEN 0x06
|
||||
#define MSG_EXT_PPR_OPTION_ST 0x00
|
||||
#define MSG_EXT_PPR_OPTION_DT_CRC 0x02
|
||||
#define MSG_EXT_PPR_OPTION_DT_UNITS 0x03
|
||||
#define MSG_EXT_PPR_OPTION_DT_CRC_QUICK 0x04
|
||||
#define MSG_EXT_PPR_OPTION_DT_UNITS_QUICK 0x05
|
135
drivers/scsi/aic7xxx_old/sequencer.h
Normal file
135
drivers/scsi/aic7xxx_old/sequencer.h
Normal file
|
@ -0,0 +1,135 @@
|
|||
/*
|
||||
* Instruction formats for the sequencer program downloaded to
|
||||
* Aic7xxx SCSI host adapters
|
||||
*
|
||||
* Copyright (c) 1997, 1998 Justin T. Gibbs.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions, and the following disclaimer,
|
||||
* without modification, immediately at the beginning of the file.
|
||||
* 2. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* Where this Software is combined with software released under the terms of
|
||||
* the GNU General Public License ("GPL") and the terms of the GPL would require the
|
||||
* combined work to also be released under the terms of the GPL, the terms
|
||||
* and conditions of this License will apply in addition to those of the
|
||||
* GPL with the exception of any terms or conditions of this License that
|
||||
* conflict with, or are expressly prohibited by, the GPL.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $Id: sequencer.h,v 1.3 1997/09/27 19:37:31 gibbs Exp $
|
||||
*/
|
||||
|
||||
#ifdef __LITTLE_ENDIAN_BITFIELD
|
||||
struct ins_format1 {
|
||||
unsigned int
|
||||
immediate : 8,
|
||||
source : 9,
|
||||
destination : 9,
|
||||
ret : 1,
|
||||
opcode : 4,
|
||||
parity : 1;
|
||||
};
|
||||
|
||||
struct ins_format2 {
|
||||
unsigned int
|
||||
shift_control : 8,
|
||||
source : 9,
|
||||
destination : 9,
|
||||
ret : 1,
|
||||
opcode : 4,
|
||||
parity : 1;
|
||||
};
|
||||
|
||||
struct ins_format3 {
|
||||
unsigned int
|
||||
immediate : 8,
|
||||
source : 9,
|
||||
address : 10,
|
||||
opcode : 4,
|
||||
parity : 1;
|
||||
};
|
||||
#elif defined(__BIG_ENDIAN_BITFIELD)
|
||||
struct ins_format1 {
|
||||
unsigned int
|
||||
parity : 1,
|
||||
opcode : 4,
|
||||
ret : 1,
|
||||
destination : 9,
|
||||
source : 9,
|
||||
immediate : 8;
|
||||
};
|
||||
|
||||
struct ins_format2 {
|
||||
unsigned int
|
||||
parity : 1,
|
||||
opcode : 4,
|
||||
ret : 1,
|
||||
destination : 9,
|
||||
source : 9,
|
||||
shift_control : 8;
|
||||
};
|
||||
|
||||
struct ins_format3 {
|
||||
unsigned int
|
||||
parity : 1,
|
||||
opcode : 4,
|
||||
address : 10,
|
||||
source : 9,
|
||||
immediate : 8;
|
||||
};
|
||||
#endif
|
||||
|
||||
union ins_formats {
|
||||
struct ins_format1 format1;
|
||||
struct ins_format2 format2;
|
||||
struct ins_format3 format3;
|
||||
unsigned char bytes[4];
|
||||
unsigned int integer;
|
||||
};
|
||||
struct instruction {
|
||||
union ins_formats format;
|
||||
unsigned int srcline;
|
||||
struct symbol *patch_label;
|
||||
struct {
|
||||
struct instruction *stqe_next;
|
||||
} links;
|
||||
};
|
||||
|
||||
#define AIC_OP_OR 0x0
|
||||
#define AIC_OP_AND 0x1
|
||||
#define AIC_OP_XOR 0x2
|
||||
#define AIC_OP_ADD 0x3
|
||||
#define AIC_OP_ADC 0x4
|
||||
#define AIC_OP_ROL 0x5
|
||||
#define AIC_OP_BMOV 0x6
|
||||
|
||||
#define AIC_OP_JMP 0x8
|
||||
#define AIC_OP_JC 0x9
|
||||
#define AIC_OP_JNC 0xa
|
||||
#define AIC_OP_CALL 0xb
|
||||
#define AIC_OP_JNE 0xc
|
||||
#define AIC_OP_JNZ 0xd
|
||||
#define AIC_OP_JE 0xe
|
||||
#define AIC_OP_JZ 0xf
|
||||
|
||||
/* Pseudo Ops */
|
||||
#define AIC_OP_SHL 0x10
|
||||
#define AIC_OP_SHR 0x20
|
||||
#define AIC_OP_ROR 0x30
|
Loading…
Add table
Add a link
Reference in a new issue