/{
clocks {
	compatible = "allwinner,sunxi-clk-init";
	device_type = "clocks";
	#address-cells = <2>;
	#size-cells = <2>;
	ranges;
	reg = <0x0 0x01c20000 0x0 0x02d0>;   /*cpux space*/

/* register fixed rate clock*/
		clk_losc: losc {
			#clock-cells = <0>;
			compatible = "allwinner,fixed-clock";
			clock-frequency = <32768>;
			clock-output-names = "losc";
		};

		clk_hosc: hosc {
			#clock-cells = <0>;
			compatible = "allwinner,fixed-clock";
			clock-frequency = <24000000>;
			clock-output-names = "hosc";
		};

/* register allwinner,sunxi-pll-clock */
		clk_pll_cpu: pll_cpu {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-pll-clock";
			lock-mode = "none";
			assigned-clock-rates = <528000000>;
			clock-output-names = "pll_cpu";
		};
		clk_pll_audio: pll_audio {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-pll-clock";
			lock-mode = "none";
			clock-output-names = "pll_audio";
		};
		clk_pll_video: pll_video {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-pll-clock";
			lock-mode = "none";
			assigned-clock-rates = <297000000>;
			clock-output-names = "pll_video";
		};
		clk_pll_ve: pll_ve {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-pll-clock";
			lock-mode = "none";
			clock-output-names = "pll_ve";
		};
		clk_pll_ddr: pll_ddr {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-pll-clock";
			lock-mode = "none";
			assigned-clock-rates = <312000000>;	/* 156MHZ */
			clock-output-names = "pll_ddr";
		};
		clk_pll_periph: pll_periph {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-pll-clock";
			lock-mode = "none";
			clock-output-names = "pll_periph";
		};

/* register fixed factor clock*/
		clk_pll_audiox8: pll_audiox8 {
			#clock-cells = <0>;
			compatible = "allwinner,fixed-factor-clock";
			clocks = <&clk_pll_audio>;
			clock-mult = <8>;
			clock-div = <1>;
			clock-output-names = "pll_audiox8";
		};
		clk_pll_audiox4: pll_audiox4 {
			#clock-cells = <0>;
			compatible = "allwinner,fixed-factor-clock";
			clocks = <&clk_pll_audio>;
			clock-mult = <8>;
			clock-div = <2>;
			clock-output-names = "pll_audiox4";
		};
		clk_pll_audiox2: pll_audiox2 {
			#clock-cells = <0>;
			compatible = "allwinner,fixed-factor-clock";
			clocks = <&clk_pll_audio>;
			clock-mult = <8>;
			clock-div = <4>;
			clock-output-names = "pll_audiox2";
		};
		clk_pll_videox2: pll_videox2 {
			#clock-cells = <0>;
			compatible = "allwinner,fixed-factor-clock";
			clocks = <&clk_pll_video>;
			clock-mult = <2>;
			clock-div = <1>;
			clock-output-names = "pll_videox2";
		};
		clk_pll_periphx2: pll_periphx2 {
			#clock-cells = <0>;
			compatible = "allwinner,fixed-factor-clock";
			clocks = <&clk_pll_periph>;
			clock-mult = <2>;
			clock-div = <1>;
			clock-output-names = "pll_periphx2";
		};

/* register allwinner,sunxi-periph-clock */
		clk_cpu: cpu {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "cpu";
		};
		clk_pll_periphahb: pll_periphahb {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "pll_periphahb";
		};
		clk_ahb1: ahb1 {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "ahb1";
		};
		clk_apb1: apb1 {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "apb1";
		};
		clk_sdmmc0_mod: sdmmc0_mod {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "sdmmc0_mod";
		};
		clk_sdmmc0_bus: sdmmc0_bus {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "sdmmc0_bus";
		};
		clk_sdmmc0_rst: sdmmc0_rst {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "sdmmc0_rst";
		};
		clk_sdmmc1_mod: sdmmc1_mod {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "sdmmc1_mod";
		};
		clk_sdmmc1_bus: sdmmc1_bus {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "sdmmc1_bus";
		};
		clk_sdmmc1_rst: sdmmc1_rst {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "sdmmc1_rst";
		};
		clk_spi0: spi0 {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "spi0";
		};
		clk_spi1: spi1 {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "spi1";
		};
		clk_usbphy0: usbphy0 {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "usbphy0";
		};
		clk_usbotg: usbotg {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "usbotg";
		};
		clk_audio: audio {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "audio";
		};
		clk_avs: avs {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "avs";
		};
		clk_codec: codec {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "codec";
		};
		clk_spdif: spdif {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "spdif";
		};
		clk_debe: debe {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "debe";
		};
		clk_defe: defe {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "defe";
		};
		clk_tcon: tcon {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "tcon";
		};
		clk_deinterlace: deinterlace {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "deinterlace";
		};
		clk_tve_clk2: tve_clk2 {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "tve_clk2";
		};
		clk_tve_clk1: tve_clk1 {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "tve_clk1";
		};
		clk_tvd: tvd {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "tvd";
		};
		clk_csi_m: csi_m {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "csi_m";
		};
		clk_ve: ve {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "ve";
		};
		clk_sdram: sdram {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "sdram";
		};
		clk_dma: dma {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "dma";
		};
		clk_pio: pio {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "pio";
		};
		clk_uart0: uart0 {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "uart0";
		};
		clk_uart1: uart1 {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "uart1";
		};
		clk_uart2: uart2 {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "uart2";
		};
		clk_twi0: twi0 {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "twi0";
		};
		clk_twi1: twi1 {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "twi1";
		};
		clk_twi2: twi2 {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "twi2";
		};
		clk_rsb: rsb {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "rsb";
		};
		clk_cir: cir {
			#clock-cells = <0>;
			compatible = "allwinner,sunxi-periph-clock";
			clock-output-names = "cir";
		};
	};
};