206 lines
5.6 KiB
C
206 lines
5.6 KiB
C
/*
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* Copyright (c) 2007-2017 Allwinnertech Co., Ltd.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include "pm_i.h"
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static __mem_tmr_reg_t *TmrReg;
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static __u32 WatchDog1_Config_Reg_Bak, WatchDog1_Mod_Reg_Bak,
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WatchDog1_Irq_En_Bak;
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/*
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*********************************************************************************************************
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* TIMER save
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*
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* Description: save timer for mem.
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*
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* Arguments : none
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*
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* Returns : EPDK_TRUE/EPDK_FALSE;
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*********************************************************************************************************
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*/
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__s32 mem_tmr_save(__mem_tmr_reg_t *ptmr_state)
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{
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/* set timer register base */
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TmrReg = (__mem_tmr_reg_t *) IO_ADDRESS(SUNXI_TIMER_PBASE);
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/* backup timer registers */
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ptmr_state->IntCtl = TmrReg->IntCtl;
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ptmr_state->Tmr0Ctl = TmrReg->Tmr0Ctl;
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ptmr_state->Tmr0IntVal = TmrReg->Tmr0IntVal;
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ptmr_state->Tmr0CntVal = TmrReg->Tmr0CntVal;
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ptmr_state->Tmr1Ctl = TmrReg->Tmr1Ctl;
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ptmr_state->Tmr1IntVal = TmrReg->Tmr1IntVal;
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ptmr_state->Tmr1CntVal = TmrReg->Tmr1CntVal;
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return 0;
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}
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/*
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*********************************************************************************************************
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* TIMER restore
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*
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* Description: restore timer for mem.
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*
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* Arguments : none
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*
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* Returns : EPDK_TRUE/EPDK_FALSE;
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*********************************************************************************************************
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*/
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__s32 mem_tmr_restore(__mem_tmr_reg_t *ptmr_state)
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{
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/* restore timer0 parameters */
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TmrReg->Tmr0IntVal = ptmr_state->Tmr0IntVal;
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TmrReg->Tmr0CntVal = ptmr_state->Tmr0CntVal;
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TmrReg->Tmr0Ctl = ptmr_state->Tmr0Ctl;
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TmrReg->Tmr1IntVal = ptmr_state->Tmr1IntVal;
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TmrReg->Tmr1CntVal = ptmr_state->Tmr1CntVal;
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TmrReg->Tmr1Ctl = ptmr_state->Tmr1Ctl;
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TmrReg->IntCtl = ptmr_state->IntCtl;
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return 0;
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}
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/*=================================================use for normal standby ============================*/
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/*
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*********************************************************************************************************
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* TIMER INIT
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*
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* Description: initialise timer for mem.
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*
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* Arguments : none
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*
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* Returns : EPDK_TRUE/EPDK_FALSE;
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*********************************************************************************************************
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*/
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__s32 mem_tmr_init(void)
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{
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/* set timer register base */
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TmrReg = (__mem_tmr_reg_t *) (IO_ADDRESS(SUNXI_TIMER_PBASE));
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WatchDog1_Config_Reg_Bak = (TmrReg->WDog1_Cfg_Reg);
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WatchDog1_Mod_Reg_Bak = (TmrReg->WDog1_Mode_Reg);
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WatchDog1_Irq_En_Bak = (TmrReg->WDog1_Irq_En);
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return 0;
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}
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/*
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*********************************************************************************************************
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* TIMER EXIT
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*
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* Description: exit timer for mem.
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*
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* Arguments : none
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*
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* Returns : EPDK_TRUE/EPDK_FALSE;
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*********************************************************************************************************
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*/
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__s32 mem_tmr_exit(void)
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{
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(TmrReg->WDog1_Cfg_Reg) = WatchDog1_Config_Reg_Bak;
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(TmrReg->WDog1_Mode_Reg) = WatchDog1_Mod_Reg_Bak;
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(TmrReg->WDog1_Irq_En) = WatchDog1_Irq_En_Bak;
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return 0;
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}
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/*
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*********************************************************************************************************
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* mem_tmr_enable_watchdog
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*
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*Description: enable watch-dog.
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*
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*Arguments : none.
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*
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*Return : none;
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*
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*Notes :
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*
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*********************************************************************************************************
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*/
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void mem_tmr_enable_watchdog(void)
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{
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/* set watch-dog reset to whole system */
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(TmrReg->WDog1_Cfg_Reg) &= ~(0x3);
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(TmrReg->WDog1_Cfg_Reg) |= 0x1;
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/* timeout is 16 seconds */
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(TmrReg->WDog1_Mode_Reg) = (0xb << 4);
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/* enable watch-dog interrupt */
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(TmrReg->WDog1_Irq_En) |= (1 << 0);
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/* enable watch-dog */
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(TmrReg->WDog1_Mode_Reg) |= (1 << 0);
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return;
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}
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/*
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*********************************************************************************************************
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* mem_tmr_disable_watchdog
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*
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*Description: disable watch-dog.
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*
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*Arguments : none.
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*
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*Return : none;
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*
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*Notes :
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*
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*********************************************************************************************************
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*/
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void mem_tmr_disable_watchdog(void)
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{
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/* disable watch-dog reset: only intterupt */
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(TmrReg->WDog1_Cfg_Reg) &= ~(0x3);
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(TmrReg->WDog1_Cfg_Reg) |= 0x2;
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/* disable watch-dog intterupt */
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(TmrReg->WDog1_Irq_En) &= ~(1 << 0);
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/* disable watch-dog */
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TmrReg->WDog1_Mode_Reg &= ~(1 << 0);
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}
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/*
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*********************************************************************************************************
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* mem_tmr_set
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*
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*Description: set timer for wakeup system.
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*
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*Arguments : second time value for wakeup system.
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*
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*Return : result, 0 - successed, -1 - failed;
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*
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*Notes :
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*
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*********************************************************************************************************
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*/
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__s32 mem_tmr_set(__u32 second)
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{
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/* config timer interrrupt */
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TmrReg->IntSta = 1;
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TmrReg->IntCtl = 1;
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/* config timer0 for mem */
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TmrReg->Tmr0Ctl = 0;
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TmrReg->Tmr0IntVal = second << 10;
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TmrReg->Tmr0Ctl = (1 << 7) | (5 << 4);
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TmrReg->Tmr0Ctl |= (1 << 1);
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TmrReg->Tmr0Ctl |= (1 << 0);
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return 0;
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}
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