111 lines
2.9 KiB
C
111 lines
2.9 KiB
C
/*
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* Copyright (C) 2016
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* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __DMA_SUN8IW10__
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#define __DMA_SUN8IW10__
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#define DRQSRC_SRAM 0
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#define DRQSRC_SDRAM 0
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#define DRQSRC_SPDIFRX 2
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#define DRQSRC_OWARX DRQSRC_SPDIFRX
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#define DRQSRC_DAUDIO_0_RX 3
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#define DRQSRC_DAI0_RX DRQSRC_DAUDIO_0_RX
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#define DRQSRC_DAUDIO_1_RX 4
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#define DRQSRC_DAI1_RX DRQSRC_DAUDIO_1_RX
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#define DRQSRC_AC97 5
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#define DRQSRC_DAUDIO_2_RX 6
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#define DRQSRC_DAI2_RX DRQSRC_DAUDIO_2_RX
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#define DRQSRC_NAND0 7
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#define DRQSRC_UART0RX 8
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#define DRQSRC_UART1RX 9
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#define DRQSRC_UART2RX 10
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#define DRQSRC_UART3RX 11
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#define DRQSRC_UART4RX 12
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#define DRQSRC_UART5RX 13
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#define DRQSRC_UART6RX 14
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#define DRQSRC_UART7RX 15
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/* #define DRQSRC_RESEVER 16 */
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#define DRQSRC_OTG_EP1 17
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/* #define DRQSRC_RESEVER 18 */
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#define DRQSRC_AUDIO_CODEC 19
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#define DRQSRC_CODEC DRQSRC_AUDIO_CODEC
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#define DRQSRC_CODEC_ADC DRQSRC_AUDIO_CODEC
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#define DRQSRC_IR0RX 20
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#define DRQSRC_IR1RX 21
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#define DRQSRC_EMAC 22
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#define DRQSRC_TP 23
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#define DRQSRC_TPRX DRQSRC_TP
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#define DRQSRC_SPI0RX 24
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#define DRQSRC_SPI1RX 25
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#define DRQSRC_SPI2RX 26
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#define DRQSRC_SPI3RX 27
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#define DRQSRC_OTG_EP2 28
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#define DRQSRC_OTG_EP3 29
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#define DRQSRC_OTG_EP4 30
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#define DRQSRC_OTG_EP5 31
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/*
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* The destination DRQ type and port corresponding relation
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*
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*/
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#define DRQDST_SRAM 0
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#define DRQDST_SDRAM 0
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#define DRQDST_SPDIFTX 2
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#define DRQDST_OWATX DRQDST_SPDIFTX
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#define DRQDST_DAUDIO_0_TX 3
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#define DRQDST_DAI0_TX DRQDST_DAUDIO_0_TX
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#define DRQDST_DAUDIO_1_TX 4
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#define DRQDST_DAI1_TX DRQDST_DAUDIO_1_TX
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#define DRQDST_AC97 5
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#define DRQDST_DAUDIO_2_TX 6
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#define DRQDST_DAI2_TX DRQDST_DAUDIO_2_TX
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#define DRQDST_NAND0 7
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#define DRQDST_UART0TX 8
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#define DRQDST_UART1TX 9
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#define DRQDST_UART2TX 10
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#define DRQDST_UART3TX 11
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#define DRQDST_UART4TX 12
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#define DRQDST_UART5TX 13
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#define DRQDST_UART6TX 14
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#define DRQDST_UART7TX 15
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/* #define DRQDST_RESEVER 16 */
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#define DRQDST_OTG_EP1 17
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/* #define DRQDST_RESEVER 18 */
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#define DRQDST_AUDIO_CODEC 19
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#define DRQDST_CODEC DRQDST_AUDIO_CODEC
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#define DRQDST_CODEC_ADC DRQDST_AUDIO_CODEC
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#define DRQDST_IR0TX 20
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#define DRQDST_IR1TX 21
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#define DRQDST_EMAC 22
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/* #define DRQDST_RESEVER 23 */
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#define DRQDST_SPI0TX 24
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#define DRQDST_SPI1TX 25
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#define DRQDST_SPI2TX 26
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#define DRQDST_SPI3TX 27
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#define DRQDST_OTG_EP2 28
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#define DRQDST_OTG_EP3 29
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#define DRQDST_OTG_EP4 30
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#define DRQDST_OTG_EP5 31
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#endif /*__DMA_SUN8IW11__ */
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