198 lines
5.8 KiB
C
198 lines
5.8 KiB
C
#ifndef __LINUX_AXP_CFG_H_
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#define __LINUX_AXP_CFG_H_
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#include <asm/types.h>
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#include <linux/math64.h>
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#define AXP22 (22)
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#define AXP15 (15)
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#define AXP20 (20)
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#define BATRDC 100
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#define ABS(x) ((x) > 0 ? (x) : -(x))
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#define INTCHGCUR 300000 /* set initial charging current limite */
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#define SUSCHGCUR 1000000 /* set suspend charging current limite */
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#define RESCHGCUR INTCHGCUR /* set resume charging current limite */
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#define CLSCHGCUR SUSCHGCUR /* set shutdown charging current limite */
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#define INTCHGVOL 4200000 /* set initial charing target voltage */
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#define INTCHGENDRATE 10 /* set initial charing end current rate */
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#define INTCHGENABLED 1 /* set initial charing enabled */
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#define INTADCFREQ 25 /* set initial adc frequency */
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#define INTADCFREQC 100 /* set initial coulomb adc coufrequency */
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#define INTCHGPRETIME 50 /* set initial pre-charging time */
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#define INTCHGCSTTIME 480 /* set initial pre-charging time */
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#define BATMAXVOL 4200000 /* set battery max design volatge */
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#define BATMINVOL 3500000 /* set battery min design volatge */
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#define OCVREG0 0x00 /* 2.99V */
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#define OCVREG1 0x00 /* 3.13V */
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#define OCVREG2 0x00 /* 3.27V */
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#define OCVREG3 0x00 /* 3.34V */
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#define OCVREG4 0x00 /* 3.41V */
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#define OCVREG5 0x00 /* 3.48V */
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#define OCVREG6 0x00 /* 3.52V */
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#define OCVREG7 0x00 /* 3.55V */
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#define OCVREG8 0x04 /* 3.57V */
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#define OCVREG9 0x05 /* 3.59V */
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#define OCVREGA 0x06 /* 3.61V */
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#define OCVREGB 0x07 /* 3.63V */
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#define OCVREGC 0x0a /* 3.64V */
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#define OCVREGD 0x0d /* 3.66V */
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#define OCVREGE 0x1a /* 3.7V */
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#define OCVREGF 0x24 /* 3.73V */
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#define OCVREG10 0x29 /* 3.77V */
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#define OCVREG11 0x2e /* 3.78V */
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#define OCVREG12 0x32 /* 3.8V */
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#define OCVREG13 0x35 /* 3.84V */
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#define OCVREG14 0x39 /* 3.85V */
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#define OCVREG15 0x3d /* 3.87V */
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#define OCVREG16 0x43 /* 3.91V */
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#define OCVREG17 0x49 /* 3.94V */
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#define OCVREG18 0x4f /* 3.98V */
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#define OCVREG19 0x54 /* 4.01V */
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#define OCVREG1A 0x58 /* 4.05V */
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#define OCVREG1B 0x5c /* 4.08V */
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#define OCVREG1C 0x5e /* 4.1V */
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#define OCVREG1D 0x60 /* 4.12V */
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#define OCVREG1E 0x62 /* 4.14V */
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#define OCVREG1F 0x64 /* 4.15V */
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struct axp_config_info {
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u32 pmu_used;
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u32 pmu_twi_addr;
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u32 pmu_twi_id;
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u32 pmu_irq_id;
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u32 pmu_battery_rdc;
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u32 pmu_battery_cap;
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u32 pmu_batdeten;
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u32 pmu_chg_ic_temp;
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u32 pmu_runtime_chgcur;
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u32 pmu_suspend_chgcur;
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u32 pmu_shutdown_chgcur;
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u32 pmu_init_chgvol;
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u32 pmu_init_chgend_rate;
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u32 pmu_init_chg_enabled;
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u32 pmu_init_bc_en;
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u32 pmu_init_adc_freq;
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u32 pmu_init_adcts_freq;
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u32 pmu_init_chg_pretime;
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u32 pmu_init_chg_csttime;
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u32 pmu_batt_cap_correct;
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u32 pmu_chg_end_on_en;
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u32 ocv_coulumb_100;
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u32 pmu_bat_para1;
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u32 pmu_bat_para2;
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u32 pmu_bat_para3;
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u32 pmu_bat_para4;
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u32 pmu_bat_para5;
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u32 pmu_bat_para6;
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u32 pmu_bat_para7;
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u32 pmu_bat_para8;
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u32 pmu_bat_para9;
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u32 pmu_bat_para10;
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u32 pmu_bat_para11;
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u32 pmu_bat_para12;
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u32 pmu_bat_para13;
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u32 pmu_bat_para14;
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u32 pmu_bat_para15;
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u32 pmu_bat_para16;
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u32 pmu_bat_para17;
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u32 pmu_bat_para18;
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u32 pmu_bat_para19;
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u32 pmu_bat_para20;
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u32 pmu_bat_para21;
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u32 pmu_bat_para22;
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u32 pmu_bat_para23;
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u32 pmu_bat_para24;
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u32 pmu_bat_para25;
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u32 pmu_bat_para26;
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u32 pmu_bat_para27;
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u32 pmu_bat_para28;
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u32 pmu_bat_para29;
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u32 pmu_bat_para30;
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u32 pmu_bat_para31;
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u32 pmu_bat_para32;
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u32 pmu_ac_vol;
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u32 pmu_ac_cur;
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u32 pmu_usbpc_vol;
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u32 pmu_usbpc_cur;
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u32 pmu_pwroff_vol;
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u32 pmu_pwron_vol;
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u32 pmu_powkey_off_time;
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u32 pmu_powkey_off_en;
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u32 pmu_powkey_off_delay_time;
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u32 pmu_powkey_off_func;
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u32 pmu_powkey_long_time;
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u32 pmu_powkey_on_time;
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u32 pmu_pwrok_time;
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u32 pmu_reset_shutdown_en;
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u32 pmu_battery_warning_level1;
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u32 pmu_battery_warning_level2;
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u32 pmu_restvol_adjust_time;
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u32 pmu_ocv_cou_adjust_time;
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u32 pmu_chgled_func;
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u32 pmu_chgled_type;
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u32 pmu_vbusen_func;
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u32 pmu_reset;
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u32 pmu_IRQ_wakeup;
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u32 pmu_hot_shutdown;
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u32 pmu_inshort;
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int power_start;
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u32 pmu_bat_temp_enable;
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u32 pmu_bat_charge_ltf;
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u32 pmu_bat_charge_htf;
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u32 pmu_bat_shutdown_ltf;
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u32 pmu_bat_shutdown_htf;
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u32 pmu_bat_temp_para1;
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u32 pmu_bat_temp_para2;
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u32 pmu_bat_temp_para3;
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u32 pmu_bat_temp_para4;
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u32 pmu_bat_temp_para5;
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u32 pmu_bat_temp_para6;
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u32 pmu_bat_temp_para7;
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u32 pmu_bat_temp_para8;
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u32 pmu_bat_temp_para9;
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u32 pmu_bat_temp_para10;
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u32 pmu_bat_temp_para11;
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u32 pmu_bat_temp_para12;
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u32 pmu_bat_temp_para13;
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u32 pmu_bat_temp_para14;
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u32 pmu_bat_temp_para15;
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u32 pmu_bat_temp_para16;
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};
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enum {
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DEBUG_SPLY = 1U << 0,
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DEBUG_REGU = 1U << 1,
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DEBUG_INT = 1U << 2,
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DEBUG_CHG = 1U << 3,
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};
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#define AXP_LDOIO_ID_START 30
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#define AXP_DCDC_ID_START 40
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#ifdef CONFIG_AXP_NMI_USED
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extern void clear_nmi_status(void);
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extern void disable_nmi(void);
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extern void enable_nmi(void);
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extern void set_nmi_trigger(u32 trigger);
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#endif
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#define DBG_PSY_MSG(level_mask, fmt, arg...) \
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{ if (unlikely(axp_debug & level_mask)) \
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printk(KERN_DEBUG fmt , ## arg); }
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#ifdef CONFIG_AW_AXP81X
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extern s32 axp_debug;
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extern void axp81x_power_off(void);
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#endif
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extern s32 axp_fetch_sysconfig_para(char *pmu_type,
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struct axp_config_info *axp_config);
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extern s32 axp_device_tree_parse(char *pmu_type,
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struct axp_config_info *axp_config);
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#endif
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