201 lines
8 KiB
C
201 lines
8 KiB
C
/*
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* Copyright (c) 2011-2020 yanggq.young@allwinnertech.com
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*/
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#include "pm_types.h"
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#include "pm_i.h"
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static int i;
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/*
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*********************************************************************************************************
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* MEM CCU INITIALISE
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*
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* Description: mem interrupt initialise.
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*
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* Arguments : none.
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*
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* Returns : 0/-1;
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*********************************************************************************************************
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*/
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__s32 mem_ccu_save(struct ccm_state *ccm_reg)
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{
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ccm_reg->ccm_reg = (__ccmu_reg_list_t *) IO_ADDRESS(AW_CCM_BASE);
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i = 1;
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while (i < 11) {
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if (0 != i && 4 != i && 5 != i && 6 != i) {
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/*donot need care pll1 & pll5 & pll6, it is dangerous to */
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/*write the reg after enable the pllx. */
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/*pll7 bias ctrl does not exist. */
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ccm_reg->ccm_reg_backup.PllxBias[i] =
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ccm_reg->ccm_reg->PllxBias[i];
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}
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i++;
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}
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/*ccm_reg->ccm_reg_backup.Pll1Tun = ccm_reg->ccm_reg->Pll1Tun; */
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/*ccm_reg->ccm_reg_backup.Pll5Tun = ccm_reg->ccm_reg->Pll5Tun; */
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ccm_reg->ccm_reg_backup.MipiPllTun = ccm_reg->ccm_reg->MipiPllTun;
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/*ccm_reg->ccm_reg_backup.Pll1Ctl = ccm_reg->ccm_reg->Pll1Ctl; */
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ccm_reg->ccm_reg_backup.Pll2Ctl = ccm_reg->ccm_reg->Pll2Ctl;
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ccm_reg->ccm_reg_backup.Pll3Ctl = ccm_reg->ccm_reg->Pll3Ctl;
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ccm_reg->ccm_reg_backup.Pll4Ctl = ccm_reg->ccm_reg->Pll4Ctl;
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/*ccm_reg->ccm_reg_backup.Pll6Ctl = ccm_reg->ccm_reg->Pll6Ctl; */
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ccm_reg->ccm_reg_backup.Pll8Ctl = ccm_reg->ccm_reg->Pll8Ctl;
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ccm_reg->ccm_reg_backup.MipiPllCtl = ccm_reg->ccm_reg->MipiPllCtl;
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ccm_reg->ccm_reg_backup.Pll9Ctl = ccm_reg->ccm_reg->Pll9Ctl;
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ccm_reg->ccm_reg_backup.Pll10Ctl = ccm_reg->ccm_reg->Pll10Ctl;
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ccm_reg->ccm_reg_backup.SysClkDiv = ccm_reg->ccm_reg->SysClkDiv;
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ccm_reg->ccm_reg_backup.Ahb1Div = ccm_reg->ccm_reg->Ahb1Div;
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ccm_reg->ccm_reg_backup.Apb2Div = ccm_reg->ccm_reg->Apb2Div;
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/*actually, the gating & reset ctrl reg
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** should not affect corresponding module's recovery.
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*/
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ccm_reg->ccm_reg_backup.AhbGate0 = ccm_reg->ccm_reg->AhbGate0;
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ccm_reg->ccm_reg_backup.AhbGate1 = ccm_reg->ccm_reg->AhbGate1;
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ccm_reg->ccm_reg_backup.Apb1Gate = ccm_reg->ccm_reg->Apb1Gate;
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ccm_reg->ccm_reg_backup.Apb2Gate = ccm_reg->ccm_reg->Apb2Gate;
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ccm_reg->ccm_reg_backup.Nand0 = ccm_reg->ccm_reg->Nand0;
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ccm_reg->ccm_reg_backup.Sd0 = ccm_reg->ccm_reg->Sd0;
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ccm_reg->ccm_reg_backup.Sd1 = ccm_reg->ccm_reg->Sd1;
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ccm_reg->ccm_reg_backup.Sd2 = ccm_reg->ccm_reg->Sd2;
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ccm_reg->ccm_reg_backup.Spi0 = ccm_reg->ccm_reg->Spi0;
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ccm_reg->ccm_reg_backup.Spi1 = ccm_reg->ccm_reg->Spi1;
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ccm_reg->ccm_reg_backup.I2s0 = ccm_reg->ccm_reg->I2s0;
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ccm_reg->ccm_reg_backup.I2s1 = ccm_reg->ccm_reg->I2s1;
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ccm_reg->ccm_reg_backup.Usb = ccm_reg->ccm_reg->Usb;
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ccm_reg->ccm_reg_backup.DramCfg = ccm_reg->ccm_reg->DramCfg;
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ccm_reg->ccm_reg_backup.DramGate = ccm_reg->ccm_reg->DramGate;
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ccm_reg->ccm_reg_backup.Be0 = ccm_reg->ccm_reg->Be0;
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ccm_reg->ccm_reg_backup.Fe0 = ccm_reg->ccm_reg->Fe0;
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ccm_reg->ccm_reg_backup.Lcd0Ch0 = ccm_reg->ccm_reg->Lcd0Ch0;
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ccm_reg->ccm_reg_backup.Lcd0Ch1 = ccm_reg->ccm_reg->Lcd0Ch1;
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ccm_reg->ccm_reg_backup.Csi0 = ccm_reg->ccm_reg->Csi0;
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ccm_reg->ccm_reg_backup.Ve = ccm_reg->ccm_reg->Ve;
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ccm_reg->ccm_reg_backup.Adda = ccm_reg->ccm_reg->Adda;
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ccm_reg->ccm_reg_backup.Avs = ccm_reg->ccm_reg->Avs;
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/*ccm_reg->ccm_reg_backup.MBus0 = ccm_reg->ccm_reg->MBus0; */
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ccm_reg->ccm_reg_backup.MipiDsi = ccm_reg->ccm_reg->MipiDsi;
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ccm_reg->ccm_reg_backup.IepDrc0 = ccm_reg->ccm_reg->IepDrc0;
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ccm_reg->ccm_reg_backup.GpuCore = ccm_reg->ccm_reg->GpuCore;
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ccm_reg->ccm_reg_backup.GpuMem = ccm_reg->ccm_reg->GpuMem;
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ccm_reg->ccm_reg_backup.GpuHyd = ccm_reg->ccm_reg->GpuHyd;
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ccm_reg->ccm_reg_backup.PllLock = ccm_reg->ccm_reg->PllLock;
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ccm_reg->ccm_reg_backup.Pll1Lock = ccm_reg->ccm_reg->Pll1Lock;
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ccm_reg->ccm_reg_backup.AhbReset0 = ccm_reg->ccm_reg->AhbReset0;
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ccm_reg->ccm_reg_backup.AhbReset1 = ccm_reg->ccm_reg->AhbReset1;
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ccm_reg->ccm_reg_backup.AhbReset2 = ccm_reg->ccm_reg->AhbReset2;
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ccm_reg->ccm_reg_backup.Apb1Reset = ccm_reg->ccm_reg->Apb1Reset;
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ccm_reg->ccm_reg_backup.Apb2Reset = ccm_reg->ccm_reg->Apb2Reset;
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return 0;
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}
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__s32 mem_ccu_restore(struct ccm_state *ccm_reg)
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{
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i = 1;
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while (i < 11) {
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if (0 != i && 4 != i && 5 != i && 6 != i) {
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/*donot need care pll1 & pll5 & pll6, it is dangerous to */
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/*write the reg after enable the pllx. */
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/*pll7 bias ctrl does not exist. */
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ccm_reg->ccm_reg->PllxBias[i] =
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ccm_reg->ccm_reg_backup.PllxBias[i];
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}
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i++;
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}
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/*ccm_reg->ccm_reg->Pll1Tun = ccm_reg->ccm_reg_backup.Pll1Tun; */
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/*ccm_reg->ccm_reg->Pll5Tun = ccm_reg->ccm_reg_backup.Pll5Tun; */
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ccm_reg->ccm_reg->MipiPllTun = ccm_reg->ccm_reg_backup.MipiPllTun;
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/*ccm_reg->ccm_reg->Pll1Ctl = ccm_reg->ccm_reg_backup.Pll1Ctl; */
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ccm_reg->ccm_reg->Pll2Ctl = ccm_reg->ccm_reg_backup.Pll2Ctl;
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ccm_reg->ccm_reg->Pll3Ctl = ccm_reg->ccm_reg_backup.Pll3Ctl;
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ccm_reg->ccm_reg->Pll4Ctl = ccm_reg->ccm_reg_backup.Pll4Ctl;
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/*ccm_reg->ccm_reg->Pll6Ctl = ccm_reg->ccm_reg_backup.Pll6Ctl; */
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ccm_reg->ccm_reg->Pll8Ctl = ccm_reg->ccm_reg_backup.Pll8Ctl;
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ccm_reg->ccm_reg->MipiPllCtl = ccm_reg->ccm_reg_backup.MipiPllCtl;
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ccm_reg->ccm_reg->Pll9Ctl = ccm_reg->ccm_reg_backup.Pll9Ctl;
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ccm_reg->ccm_reg->Pll10Ctl = ccm_reg->ccm_reg_backup.Pll10Ctl;
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ccm_reg->ccm_reg->SysClkDiv = ccm_reg->ccm_reg_backup.SysClkDiv;
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ccm_reg->ccm_reg->Ahb1Div = ccm_reg->ccm_reg_backup.Ahb1Div;
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change_runtime_env();
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delay_us(1);
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ccm_reg->ccm_reg->Apb2Div = ccm_reg->ccm_reg_backup.Apb2Div;
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/*actually, the gating & reset ctrl reg
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** should not affect corresponding module's recovery.
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*/
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/*first, reset, then, gating. */
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ccm_reg->ccm_reg->AhbReset0 = ccm_reg->ccm_reg_backup.AhbReset0;
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ccm_reg->ccm_reg->AhbReset1 = ccm_reg->ccm_reg_backup.AhbReset1;
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ccm_reg->ccm_reg->AhbReset2 = ccm_reg->ccm_reg_backup.AhbReset2;
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ccm_reg->ccm_reg->Apb1Reset = ccm_reg->ccm_reg_backup.Apb1Reset;
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ccm_reg->ccm_reg->Apb2Reset = ccm_reg->ccm_reg_backup.Apb2Reset;
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ccm_reg->ccm_reg->Nand0 = ccm_reg->ccm_reg_backup.Nand0;
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ccm_reg->ccm_reg->Sd0 = ccm_reg->ccm_reg_backup.Sd0;
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ccm_reg->ccm_reg->Sd1 = ccm_reg->ccm_reg_backup.Sd1;
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ccm_reg->ccm_reg->Sd2 = ccm_reg->ccm_reg_backup.Sd2;
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ccm_reg->ccm_reg->Spi0 = ccm_reg->ccm_reg_backup.Spi0;
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ccm_reg->ccm_reg->Spi1 = ccm_reg->ccm_reg_backup.Spi1;
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ccm_reg->ccm_reg->I2s0 = ccm_reg->ccm_reg_backup.I2s0;
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ccm_reg->ccm_reg->I2s1 = ccm_reg->ccm_reg_backup.I2s1;
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ccm_reg->ccm_reg->Usb = ccm_reg->ccm_reg_backup.Usb;
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ccm_reg->ccm_reg->DramCfg = ccm_reg->ccm_reg_backup.DramCfg;
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ccm_reg->ccm_reg->DramGate = ccm_reg->ccm_reg_backup.DramGate;
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ccm_reg->ccm_reg->Be0 = ccm_reg->ccm_reg_backup.Be0;
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ccm_reg->ccm_reg->Fe0 = ccm_reg->ccm_reg_backup.Fe0;
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ccm_reg->ccm_reg->Lcd0Ch0 = ccm_reg->ccm_reg_backup.Lcd0Ch0;
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ccm_reg->ccm_reg->Lcd0Ch1 = ccm_reg->ccm_reg_backup.Lcd0Ch1;
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ccm_reg->ccm_reg->Csi0 = ccm_reg->ccm_reg_backup.Csi0;
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ccm_reg->ccm_reg->Ve = ccm_reg->ccm_reg_backup.Ve;
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ccm_reg->ccm_reg->Adda = ccm_reg->ccm_reg_backup.Adda;
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ccm_reg->ccm_reg->Avs = ccm_reg->ccm_reg_backup.Avs;
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/*ccm_reg->ccm_reg->MBus0 = ccm_reg->ccm_reg_backup.MBus0; */
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ccm_reg->ccm_reg->MipiDsi = ccm_reg->ccm_reg_backup.MipiDsi;
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ccm_reg->ccm_reg->IepDrc0 = ccm_reg->ccm_reg_backup.IepDrc0;
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ccm_reg->ccm_reg->GpuCore = ccm_reg->ccm_reg_backup.GpuCore;
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ccm_reg->ccm_reg->GpuMem = ccm_reg->ccm_reg_backup.GpuMem;
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ccm_reg->ccm_reg->GpuHyd = ccm_reg->ccm_reg_backup.GpuHyd;
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ccm_reg->ccm_reg->PllLock = ccm_reg->ccm_reg_backup.PllLock;
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ccm_reg->ccm_reg->Pll1Lock = ccm_reg->ccm_reg_backup.Pll1Lock;
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change_runtime_env();
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delay_us(1);
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ccm_reg->ccm_reg->AhbGate0 = ccm_reg->ccm_reg_backup.AhbGate0;
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ccm_reg->ccm_reg->AhbGate1 = ccm_reg->ccm_reg_backup.AhbGate1;
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ccm_reg->ccm_reg->Apb1Gate = ccm_reg->ccm_reg_backup.Apb1Gate;
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ccm_reg->ccm_reg->Apb2Gate = ccm_reg->ccm_reg_backup.Apb2Gate;
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return 0;
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}
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