201 lines
9.3 KiB
C
201 lines
9.3 KiB
C
/*
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* Copyright (c) 2011-2020 yanggq.young@allwinnertech.com
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*/
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#include "pm_types.h"
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#include "pm_i.h"
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/*
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*********************************************************************************************************
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* MEM CCU INITIALISE
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*
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* Description: mem interrupt initialise.
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*
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* Arguments : none.
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*
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* Returns : 0/-1;
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*********************************************************************************************************
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*/
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__s32 mem_ccu_save(struct ccm_state *ccm_reg)
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{
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ccm_reg->ccm_reg = (__ccmu_reg_list_t *) IO_ADDRESS(AW_CCM_BASE);
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ccm_reg->ccm_mod_reg =
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(__ccmu_mod_reg_list_t *) IO_ADDRESS(SUNXI_CCM_MOD_PBASE);
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/*module regs */
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ccm_reg->ccm_mod_reg_backup.nand0_sclk0_cfg =
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ccm_reg->ccm_mod_reg->nand0_sclk0_cfg;
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ccm_reg->ccm_mod_reg_backup.nand0_sclk1_cfg =
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ccm_reg->ccm_mod_reg->nand0_sclk1_cfg;
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ccm_reg->ccm_mod_reg_backup.nand1_sclk0_cfg =
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ccm_reg->ccm_mod_reg->nand1_sclk0_cfg;
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ccm_reg->ccm_mod_reg_backup.nand1_sclk1_cfg =
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ccm_reg->ccm_mod_reg->nand1_sclk1_cfg;
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ccm_reg->ccm_mod_reg_backup.sd0_clk = ccm_reg->ccm_mod_reg->sd0_clk;
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ccm_reg->ccm_mod_reg_backup.sd1_clk = ccm_reg->ccm_mod_reg->sd1_clk;
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ccm_reg->ccm_mod_reg_backup.sd2_clk = ccm_reg->ccm_mod_reg->sd2_clk;
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ccm_reg->ccm_mod_reg_backup.sd3_clk = ccm_reg->ccm_mod_reg->sd3_clk;
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ccm_reg->ccm_mod_reg_backup.ts_clk = ccm_reg->ccm_mod_reg->ts_clk;
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ccm_reg->ccm_mod_reg_backup.ss_clk = ccm_reg->ccm_mod_reg->ss_clk;
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ccm_reg->ccm_mod_reg_backup.spi0_clk = ccm_reg->ccm_mod_reg->spi0_clk;
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ccm_reg->ccm_mod_reg_backup.spi1_clk = ccm_reg->ccm_mod_reg->spi1_clk;
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ccm_reg->ccm_mod_reg_backup.spi2_clk = ccm_reg->ccm_mod_reg->spi2_clk;
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ccm_reg->ccm_mod_reg_backup.spi3_clk = ccm_reg->ccm_mod_reg->spi3_clk;
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ccm_reg->ccm_mod_reg_backup.daudio0_clk =
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ccm_reg->ccm_mod_reg->daudio0_clk;
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ccm_reg->ccm_mod_reg_backup.daudio1_clk =
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ccm_reg->ccm_mod_reg->daudio1_clk;
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ccm_reg->ccm_mod_reg_backup.spdif_clk = ccm_reg->ccm_mod_reg->spdif_clk;
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ccm_reg->ccm_mod_reg_backup.usbphy0_cfg =
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ccm_reg->ccm_mod_reg->usbphy0_cfg;
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ccm_reg->ccm_mod_reg_backup.mdfs_clk = ccm_reg->ccm_mod_reg->mdfs_clk;
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ccm_reg->ccm_mod_reg_backup.dram_cfg = ccm_reg->ccm_mod_reg->dram_cfg;
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ccm_reg->ccm_mod_reg_backup.de_sclk_cfg =
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ccm_reg->ccm_mod_reg->de_sclk_cfg;
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ccm_reg->ccm_mod_reg_backup.edp_sclk_cfg =
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ccm_reg->ccm_mod_reg->edp_sclk_cfg;
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ccm_reg->ccm_mod_reg_backup.mp_clk = ccm_reg->ccm_mod_reg->mp_clk;
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ccm_reg->ccm_mod_reg_backup.lcd0_clk = ccm_reg->ccm_mod_reg->lcd0_clk;
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ccm_reg->ccm_mod_reg_backup.lcd1_clk = ccm_reg->ccm_mod_reg->lcd1_clk;
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ccm_reg->ccm_mod_reg_backup.mipi_dsi_clk0 =
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ccm_reg->ccm_mod_reg->mipi_dsi_clk0;
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ccm_reg->ccm_mod_reg_backup.mipi_dsi_clk1 =
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ccm_reg->ccm_mod_reg->mipi_dsi_clk1;
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ccm_reg->ccm_mod_reg_backup.hdmi_sclk = ccm_reg->ccm_mod_reg->hdmi_sclk;
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ccm_reg->ccm_mod_reg_backup.hdmi_slow_clk0 =
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ccm_reg->ccm_mod_reg->hdmi_slow_clk0;
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ccm_reg->ccm_mod_reg_backup.mipi_csi_cfg =
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ccm_reg->ccm_mod_reg->mipi_csi_cfg;
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ccm_reg->ccm_mod_reg_backup.csi_isp_clk =
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ccm_reg->ccm_mod_reg->csi_isp_clk;
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ccm_reg->ccm_mod_reg_backup.csi0_mclk = ccm_reg->ccm_mod_reg->csi0_mclk;
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ccm_reg->ccm_mod_reg_backup.csi1_mclk = ccm_reg->ccm_mod_reg->csi1_mclk;
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ccm_reg->ccm_mod_reg_backup.fd_clk = ccm_reg->ccm_mod_reg->fd_clk;
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ccm_reg->ccm_mod_reg_backup.ve_clk = ccm_reg->ccm_mod_reg->ve_clk;
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ccm_reg->ccm_mod_reg_backup.avs_clk = ccm_reg->ccm_mod_reg->avs_clk;
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ccm_reg->ccm_mod_reg_backup.gpu_core_clk =
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ccm_reg->ccm_mod_reg->gpu_core_clk;
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ccm_reg->ccm_mod_reg_backup.gpu_mem_clk =
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ccm_reg->ccm_mod_reg->gpu_mem_clk;
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ccm_reg->ccm_mod_reg_backup.gpu_axi_clk =
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ccm_reg->ccm_mod_reg->gpu_axi_clk;
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ccm_reg->ccm_mod_reg_backup.sata_clk = ccm_reg->ccm_mod_reg->sata_clk;
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ccm_reg->ccm_mod_reg_backup.ac97_clk = ccm_reg->ccm_mod_reg->ac97_clk;
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ccm_reg->ccm_mod_reg_backup.mipi_hsi_clk =
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ccm_reg->ccm_mod_reg->mipi_hsi_clk;
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ccm_reg->ccm_mod_reg_backup.gp_adc = ccm_reg->ccm_mod_reg->gp_adc;
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ccm_reg->ccm_mod_reg_backup.cir_tx_clk =
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ccm_reg->ccm_mod_reg->cir_tx_clk;
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/*module clk */
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ccm_reg->ccm_mod_reg_backup.ahb0_gating =
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ccm_reg->ccm_mod_reg->ahb0_gating;
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ccm_reg->ccm_mod_reg_backup.ahb1_gating =
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ccm_reg->ccm_mod_reg->ahb1_gating;
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ccm_reg->ccm_mod_reg_backup.ahb2_gating =
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ccm_reg->ccm_mod_reg->ahb2_gating;
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ccm_reg->ccm_mod_reg_backup.apb0_gating =
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ccm_reg->ccm_mod_reg->apb0_gating;
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ccm_reg->ccm_mod_reg_backup.apb1_gating =
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ccm_reg->ccm_mod_reg->apb1_gating;
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ccm_reg->ccm_mod_reg_backup.ahb0_rst = ccm_reg->ccm_mod_reg->ahb0_rst;
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ccm_reg->ccm_mod_reg_backup.ahb1_rst = ccm_reg->ccm_mod_reg->ahb1_rst;
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ccm_reg->ccm_mod_reg_backup.ahb2_rst = ccm_reg->ccm_mod_reg->ahb2_rst;
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ccm_reg->ccm_mod_reg_backup.apb0_rst = ccm_reg->ccm_mod_reg->apb0_rst;
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ccm_reg->ccm_mod_reg_backup.apb1_rst = ccm_reg->ccm_mod_reg->apb1_rst;
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return 0;
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}
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__s32 mem_ccu_restore(struct ccm_state *ccm_reg)
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{
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/*first, reset, then, gating. */
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ccm_reg->ccm_mod_reg->ahb0_rst = ccm_reg->ccm_mod_reg_backup.ahb0_rst;
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ccm_reg->ccm_mod_reg->ahb1_rst = ccm_reg->ccm_mod_reg_backup.ahb1_rst;
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ccm_reg->ccm_mod_reg->ahb2_rst = ccm_reg->ccm_mod_reg_backup.ahb2_rst;
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ccm_reg->ccm_mod_reg->apb0_rst = ccm_reg->ccm_mod_reg_backup.apb0_rst;
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ccm_reg->ccm_mod_reg->apb1_rst = ccm_reg->ccm_mod_reg_backup.apb1_rst;
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ccm_reg->ccm_mod_reg->nand0_sclk0_cfg =
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ccm_reg->ccm_mod_reg_backup.nand0_sclk0_cfg;
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ccm_reg->ccm_mod_reg->nand0_sclk1_cfg =
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ccm_reg->ccm_mod_reg_backup.nand0_sclk1_cfg;
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ccm_reg->ccm_mod_reg->nand1_sclk0_cfg =
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ccm_reg->ccm_mod_reg_backup.nand1_sclk0_cfg;
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ccm_reg->ccm_mod_reg->nand1_sclk1_cfg =
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ccm_reg->ccm_mod_reg_backup.nand1_sclk1_cfg;
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ccm_reg->ccm_mod_reg->sd0_clk = ccm_reg->ccm_mod_reg_backup.sd0_clk;
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ccm_reg->ccm_mod_reg->sd1_clk = ccm_reg->ccm_mod_reg_backup.sd1_clk;
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ccm_reg->ccm_mod_reg->sd2_clk = ccm_reg->ccm_mod_reg_backup.sd2_clk;
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ccm_reg->ccm_mod_reg->sd3_clk = ccm_reg->ccm_mod_reg_backup.sd3_clk;
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ccm_reg->ccm_mod_reg->ts_clk = ccm_reg->ccm_mod_reg_backup.ts_clk;
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ccm_reg->ccm_mod_reg->ss_clk = ccm_reg->ccm_mod_reg_backup.ss_clk;
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ccm_reg->ccm_mod_reg->spi0_clk = ccm_reg->ccm_mod_reg_backup.spi0_clk;
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ccm_reg->ccm_mod_reg->spi1_clk = ccm_reg->ccm_mod_reg_backup.spi1_clk;
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ccm_reg->ccm_mod_reg->spi2_clk = ccm_reg->ccm_mod_reg_backup.spi2_clk;
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ccm_reg->ccm_mod_reg->spi3_clk = ccm_reg->ccm_mod_reg_backup.spi3_clk;
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ccm_reg->ccm_mod_reg->daudio0_clk =
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ccm_reg->ccm_mod_reg_backup.daudio0_clk;
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ccm_reg->ccm_mod_reg->daudio1_clk =
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ccm_reg->ccm_mod_reg_backup.daudio1_clk;
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ccm_reg->ccm_mod_reg->spdif_clk = ccm_reg->ccm_mod_reg_backup.spdif_clk;
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ccm_reg->ccm_mod_reg->usbphy0_cfg =
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ccm_reg->ccm_mod_reg_backup.usbphy0_cfg;
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ccm_reg->ccm_mod_reg->mdfs_clk = ccm_reg->ccm_mod_reg_backup.mdfs_clk;
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/*ccm_reg->ccm_mod_reg->dram_cfg = ccm_reg->ccm_mod_reg_backup.dram_cfg ; */
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ccm_reg->ccm_mod_reg->de_sclk_cfg =
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ccm_reg->ccm_mod_reg_backup.de_sclk_cfg;
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ccm_reg->ccm_mod_reg->edp_sclk_cfg =
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ccm_reg->ccm_mod_reg_backup.edp_sclk_cfg;
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ccm_reg->ccm_mod_reg->mp_clk = ccm_reg->ccm_mod_reg_backup.mp_clk;
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ccm_reg->ccm_mod_reg->lcd0_clk = ccm_reg->ccm_mod_reg_backup.lcd0_clk;
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ccm_reg->ccm_mod_reg->lcd1_clk = ccm_reg->ccm_mod_reg_backup.lcd1_clk;
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ccm_reg->ccm_mod_reg->mipi_dsi_clk0 =
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ccm_reg->ccm_mod_reg_backup.mipi_dsi_clk0;
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ccm_reg->ccm_mod_reg->mipi_dsi_clk1 =
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ccm_reg->ccm_mod_reg_backup.mipi_dsi_clk1;
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ccm_reg->ccm_mod_reg->hdmi_sclk = ccm_reg->ccm_mod_reg_backup.hdmi_sclk;
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ccm_reg->ccm_mod_reg->hdmi_slow_clk0 =
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ccm_reg->ccm_mod_reg_backup.hdmi_slow_clk0;
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ccm_reg->ccm_mod_reg->mipi_csi_cfg =
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ccm_reg->ccm_mod_reg_backup.mipi_csi_cfg;
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ccm_reg->ccm_mod_reg->csi_isp_clk =
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ccm_reg->ccm_mod_reg_backup.csi_isp_clk;
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ccm_reg->ccm_mod_reg->csi0_mclk = ccm_reg->ccm_mod_reg_backup.csi0_mclk;
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ccm_reg->ccm_mod_reg->csi1_mclk = ccm_reg->ccm_mod_reg_backup.csi1_mclk;
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ccm_reg->ccm_mod_reg->fd_clk = ccm_reg->ccm_mod_reg_backup.fd_clk;
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ccm_reg->ccm_mod_reg->ve_clk = ccm_reg->ccm_mod_reg_backup.ve_clk;
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ccm_reg->ccm_mod_reg->avs_clk = ccm_reg->ccm_mod_reg_backup.avs_clk;
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ccm_reg->ccm_mod_reg->gpu_core_clk =
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ccm_reg->ccm_mod_reg_backup.gpu_core_clk;
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ccm_reg->ccm_mod_reg->gpu_mem_clk =
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ccm_reg->ccm_mod_reg_backup.gpu_mem_clk;
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ccm_reg->ccm_mod_reg->gpu_axi_clk =
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ccm_reg->ccm_mod_reg_backup.gpu_axi_clk;
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ccm_reg->ccm_mod_reg->sata_clk = ccm_reg->ccm_mod_reg_backup.sata_clk;
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ccm_reg->ccm_mod_reg->ac97_clk = ccm_reg->ccm_mod_reg_backup.ac97_clk;
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ccm_reg->ccm_mod_reg->mipi_hsi_clk =
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ccm_reg->ccm_mod_reg_backup.mipi_hsi_clk;
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ccm_reg->ccm_mod_reg->gp_adc = ccm_reg->ccm_mod_reg_backup.gp_adc;
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ccm_reg->ccm_mod_reg->cir_tx_clk =
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ccm_reg->ccm_mod_reg_backup.cir_tx_clk;
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/*second, module clk related. */
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change_runtime_env();
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delay_us(1);
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ccm_reg->ccm_mod_reg->ahb0_gating =
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ccm_reg->ccm_mod_reg_backup.ahb0_gating;
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ccm_reg->ccm_mod_reg->ahb1_gating =
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ccm_reg->ccm_mod_reg_backup.ahb1_gating;
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ccm_reg->ccm_mod_reg->ahb2_gating =
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ccm_reg->ccm_mod_reg_backup.ahb2_gating;
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ccm_reg->ccm_mod_reg->apb0_gating =
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ccm_reg->ccm_mod_reg_backup.apb0_gating;
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ccm_reg->ccm_mod_reg->apb1_gating =
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ccm_reg->ccm_mod_reg_backup.apb1_gating;
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return 0;
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}
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