77 lines
2.8 KiB
C
77 lines
2.8 KiB
C
/*
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* Copyright (c) 2007-2017 Allwinnertech Co., Ltd.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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/*
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*********************************************************************************************************
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* LINUX-KERNEL
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* AllWinner Linux Platform Develop Kits
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* Kernel Module
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*
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* (c) Copyright 2006-2011, kevin.z China
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* All Rights Reserved
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*
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* File : standby_clock.h
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* By : kevin.z
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* Version : v1.0
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* Date : 2011-5-31 21:05
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* Descript:
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* Update : date auther ver notes
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*********************************************************************************************************
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*/
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#ifndef __STANDBY_CLOCK_H__
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#define __STANDBY_CLOCK_H__
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#include "../pm.h"
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struct standby_clk_div_t {
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__u32 cpu_div:4; /* division of cpu clock, divide core_pll */
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__u32 axi_div:4; /* division of axi clock, */
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__u32 ahb_div:4; /* division of ahb clock, */
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__u32 ahb_pre_div:4; /* division of ahb clock, */
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__u32 apb_div:4; /* division of apb clock, */
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__u32 apb_pre_div:4; /* division of apb clock, */
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__u32 apb2_div:4; /* division of apb2 clock, */
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__u32 apb2_pre_div:4; /* division of apb2 clock, */
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};
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#define PLL_CTRL_REG0_OFFSET (0x40)
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#define PLL_CTRL_REG1_OFFSET (0x44)
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__s32 standby_clk_init(void);
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__s32 standby_clk_exit(void);
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void standby_clk_set_keyfield(void);
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void standby_clk_unset_keyfield(void);
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__s32 standby_clk_core2losc(void);
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__s32 standby_clk_core2hosc(void);
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__s32 standby_clk_core2pll(void);
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__s32 standby_clk_plldisable(void);
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__s32 standby_clk_pllenable(void);
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__s32 standby_clk_hoscdisable(void);
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__s32 standby_clk_hoscenable(void);
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__s32 standby_clk_setdiv(struct standby_clk_div_t *clk_div);
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__s32 standby_clk_getdiv(struct standby_clk_div_t *clk_div);
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__s32 standby_clk_set_pll_factor(struct pll_factor_t *pll_factor);
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__s32 standby_clk_get_pll_factor(struct pll_factor_t *pll_factor);
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__s32 standby_clk_apbinit(void);
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__s32 standby_clk_apbexit(void);
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__s32 standby_clk_apb2losc(void);
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__s32 standby_clk_apb2hosc(void);
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__s32 standby_clk_bus_src_backup(void);
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__s32 standby_clk_bus_src_set(void);
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__s32 standby_clk_bus_src_restore(void);
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void standby_clk_dramgating(int onoff);
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__u32 standby_clk_get_cpu_freq(void);
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extern __u32 cpu_ms_loopcnt;
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#endif /* __STANDBY_CLOCK_H__ */
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