182 lines
5.5 KiB
C
182 lines
5.5 KiB
C
/*
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* Copyright (c) 2007-2017 Allwinnertech Co., Ltd.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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/*
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*********************************************************************************************************
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* LINUX-KERNEL
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* AllWinner Linux Platform Develop Kits
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* Kernel Module
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*
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* (c) Copyright 2006-2011, kevin.z China
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* All Rights Reserved
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*
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* File : mem_int.c
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* By : gq.yang
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* Version : v1.0
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* Date : 2012-11-3 20:13
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* Descript: interrupt for platform mem
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* Update : date auther ver notes
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*********************************************************************************************************
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*/
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#include "pm_i.h"
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static void *GicDDisc;
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static void *GicCDisc;
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/*
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*********************************************************************************************************
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* STANDBY INTERRUPT INITIALISE
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*
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* Description: mem interrupt initialise.
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*
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* Arguments : none.
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*
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* Returns : 0/-1;
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*********************************************************************************************************
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*/
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__s32 mem_int_init(void)
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{
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__u32 i = 0;
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GicDDisc = (void *)IO_ADDRESS(SUNXI_GIC_DIST_PBASE);
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GicCDisc = (void *)IO_ADDRESS(SUNXI_GIC_CPU_PBASE);
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/* printk("gic iar == 0x%x. \n", *(volatile __u32 *)(IO_ADDRESS(SUNXI_GIC_CPU_PBASE)+0x0c)); */
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/* initialise interrupt enable and mask for mem */
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/*
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* Disable all interrupts. Leave the PPI and SGIs alone
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* as these enables are banked registers.
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*/
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for (i = 4; i < (GIC_400_ENABLE_LEN); i += 4)
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*(volatile __u32 *)(GicDDisc + GIC_DIST_ENABLE_CLEAR + i) =
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0xffffffff;
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/*config cpu interface */
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#if 0
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*(volatile __u32 *)(GicCDisc + GIC_CPU_PRIMASK) = 0xf0;
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*(volatile __u32 *)(GicCDisc + GIC_CPU_CTRL) = 0x1;
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#endif
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#if 1
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/* clear external irq pending: needed */
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for (i = 4; i < (GIC_400_ENABLE_LEN); i += 4)
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*(volatile __u32 *)(GicDDisc + GIC_DIST_PENDING_CLEAR + i) =
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0xffffffff;
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#endif
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/* the print info just to check the pending state, actually, after u read iar, u need to access end of interrupt reg; */
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i = *(volatile __u32 *)(GicCDisc + 0x0c);
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if (i != 0x3ff) {
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/* u need to */
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*(volatile __u32 *)(GicCDisc + 0x10) = i;
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printk("notice: gic iar == 0x%x. \n", i);
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}
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return 0;
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}
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/*
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*********************************************************************************************************
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* STANDBY INTERRUPT INITIALISE
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*
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* Description: mem interrupt exit.
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*
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* Arguments : none.
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*
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* Returns : 0/-1;
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*********************************************************************************************************
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*/
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__s32 mem_int_exit(void)
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{
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int i = 0;
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volatile __u32 enable_bit = 0;
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/* all the disable-int-src pending, need to be clear */
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for (i = 0; i < GIC_400_ENABLE_LEN; i += 4) {
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enable_bit =
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*(volatile __u32 *)(GicDDisc + GIC_DIST_ENABLE_SET + i);
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*(volatile __u32 *)(GicDDisc + GIC_DIST_PENDING_CLEAR + i) &=
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(~enable_bit);
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}
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return 0;
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}
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/*
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*********************************************************************************************************
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* QUERY INTERRUPT
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*
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* Description: enable interrupt.
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*
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* Arguments : src interrupt source number.
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*
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* Returns : 0/-1;
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*********************************************************************************************************
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*/
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__s32 mem_enable_int(enum interrupt_source_e src)
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{
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__u32 tmpGrp = (__u32) src >> 5;
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__u32 tmpSrc = (__u32) src & 0x1f;
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GicDDisc = (void *)IO_ADDRESS(SUNXI_GIC_DIST_PBASE);
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GicCDisc = (void *)IO_ADDRESS(SUNXI_GIC_CPU_PBASE);
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if (0 == src) {
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return -1;
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}
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/* enable interrupt source */
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*(volatile __u32 *)(GicDDisc + GIC_DIST_ENABLE_SET + tmpGrp * 4) |=
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(1 << tmpSrc);
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/* printk("GicDDisc + GIC_DIST_ENABLE_SET + tmpGrp*4 = 0x%x. tmpGrp = 0x%x.\n", GicDDisc + GIC_DIST_ENABLE_SET + tmpGrp*4, tmpGrp); */
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/* printk("tmpSrc = 0x%x. \n", tmpSrc); */
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/* need to care mask or priority? */
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return 0;
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}
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/*
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*********************************************************************************************************
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* QUERY INTERRUPT
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*
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* Description: query interrupt.
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*
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* Arguments : src interrupt source number.
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*
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* Returns : 0/-1;
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*********************************************************************************************************
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*/
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__s32 mem_query_int(enum interrupt_source_e src)
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{
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__s32 result = 0;
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__u32 tmpGrp = (__u32) src >> 5;
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__u32 tmpSrc = (__u32) src & 0x1f;
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GicDDisc = (void *)IO_ADDRESS(SUNXI_GIC_DIST_PBASE);
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GicCDisc = (void *)IO_ADDRESS(SUNXI_GIC_CPU_PBASE);
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if (0 == src) {
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return -1;
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}
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result =
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*(volatile __u32 *)(GicDDisc + GIC_DIST_PENDING_SET +
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tmpGrp * 4) & (1 << tmpSrc);
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/* printk("GicDDisc + GIC_DIST_PENDING_SET + tmpGrp*4 = 0x%x. tmpGrp = 0x%x.\n", GicDDisc + GIC_DIST_PENDING_SET + tmpGrp*4, tmpGrp); */
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/* printk("tmpSrc = 0x%x. result = 0x%x. \n", tmpSrc, result); */
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return result ? 0 : -1;
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}
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