138 lines
3.9 KiB
C
138 lines
3.9 KiB
C
/*
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* Copyright (c) 2007-2017 Allwinnertech Co., Ltd.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/power/aw_pm.h>
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#include "pm_types.h"
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#include "./pm.h"
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void save_mmu_state(struct mmu_state *saved_mmu_state)
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{
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/* CR0 */
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asm volatile ("mrc p15, 2, %0, c0, c0, 0" : "=r" (saved_mmu_state->cssr));
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/* CR1 */
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asm volatile ("mrc p15, 0, %0, c1, c0, 2" : "=r" (saved_mmu_state->cacr));
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/* CR3 */
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asm volatile ("mrc p15, 0, %0, c3, c0, 0" : "=r" (saved_mmu_state->dacr));
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/* save ttb */
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/* CR2 */
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/* busy_waiting(); */
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asm volatile ("mrc p15, 0, %0, c2, c0, 0" : "=r"
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(saved_mmu_state->ttb_0r));
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asm volatile ("mrc p15, 0, %0, c2, c0, 1" : "=r"
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(saved_mmu_state->ttb_1r));
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asm volatile ("mrc p15, 0, %0, c2, c0, 2" : "=r"
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(saved_mmu_state->ttbcr));
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/* CR1 */
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/* busy_waiting(); */
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asm volatile ("mrc p15, 0, %0, c1, c0, 0" : "=r" (saved_mmu_state->cr)); /* will effect visible addr space */
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return;
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}
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void restore_secure_mmu_state(struct mmu_state *saved_mmu_state)
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{
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/* busy_waiting(); */
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/* CR0 */
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asm volatile ("mcr p15, 2, %0, c0, c0, 0" : : "r" (saved_mmu_state->cssr));
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/* CR1 */
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asm volatile ("mcr p15, 0, %0, c1, c0, 2" : : "r" (saved_mmu_state->cacr));
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/* CR3 */
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asm volatile ("mcr p15, 0, %0, c3, c0, 0" : : "r" (saved_mmu_state->dacr));
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/* CR2 */
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/*when translate 0x0000,0000, use ttb0, while ttb0 shoudbe the same with ttb1 */
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asm volatile ("mcr p15, 0, %0, c2, c0, 0" : : "r"
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(saved_mmu_state->ttb_0r));
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asm volatile ("mcr p15, 0, %0, c2, c0, 1" : : "r"
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(saved_mmu_state->ttb_1r));
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asm volatile ("mcr p15, 0, %0, c2, c0, 2" : : "r"
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(saved_mmu_state->ttbcr));
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/* CR1 */
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/*cr: will effect visible addr space */
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#ifndef CONFIG_SUNXI_TRUSTZONE
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asm volatile ("mcr p15, 0, %0, c1, c0, 0" : : "r" (saved_mmu_state->cr));
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#endif
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/*read id reg */
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asm volatile ("mrc p15, 0, r3, c0, c0, 0" : : );
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asm("mov r3, r3");
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asm("mov r3, r3");
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asm("isb");
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return;
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}
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void restore_mmu_state(struct mmu_state *saved_mmu_state)
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{
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/* busy_waiting(); */
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/* CR0 */
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asm volatile ("mcr p15, 2, %0, c0, c0, 0" : : "r" (saved_mmu_state->cssr));
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/* CR1 */
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asm volatile ("mcr p15, 0, %0, c1, c0, 2" : : "r" (saved_mmu_state->cacr));
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/* CR3 */
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asm volatile ("mcr p15, 0, %0, c3, c0, 0" : : "r" (saved_mmu_state->dacr));
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/* CR2 */
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/*when translate 0x0000,0000, use ttb0, while ttb0 shoudbe the same with ttb1 */
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asm volatile ("mcr p15, 0, %0, c2, c0, 0" : : "r"
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(saved_mmu_state->ttb_1r));
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asm volatile ("mcr p15, 0, %0, c2, c0, 1" : : "r"
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(saved_mmu_state->ttb_1r));
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asm volatile ("mcr p15, 0, %0, c2, c0, 2" : : "r"
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(saved_mmu_state->ttbcr));
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asm("b __turn_mmu_on");
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asm(".align 5");
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asm(".type __turn_mmu_on, %function");
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asm("__turn_mmu_on:");
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asm("mov r0, r0");
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/* CR1 */
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/*cr: will effect visible addr space */
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asm volatile ("mcr p15, 0, %0, c1, c0, 0" : : "r" (saved_mmu_state->cr));
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/*read id reg */
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asm volatile ("mrc p15, 0, r3, c0, c0, 0" : : );
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asm("mov r3, r3");
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asm("mov r3, r3");
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asm("isb");
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return;
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}
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#if 0
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void disable_mmu(void)
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{
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__u32 c1format = 0;
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asm volatile ("mrc p15,0,%0,c1,c0,0" : "=r" (c1format) : );
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c1format &= ~0x1007;
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c1format |= 0;
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asm volatile ("mcr p15,0,%0,c1,c0,0" : : "r" (c1format));
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/*read id reg */
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asm volatile ("mrc p15, 0, r3, c0, c0, 0" : : );
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asm("mov r3, r3");
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asm("mov r3, r3");
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asm("isb");
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return;
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}
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#endif
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/* */
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/* void jump_to_resume(void* pointer) */
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/* { */
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/* asm("mov lr, r0"); */
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/* asm("mov pc, lr"); */
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/* return; */
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/* } */
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