210 lines
8.1 KiB
C
Executable file
210 lines
8.1 KiB
C
Executable file
/*
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* drivers/usb/sunxi_usb/misc/sunxi_usb_debug.c
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* (C) Copyright 2010-2015
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* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
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* javen, 2010-12-20, create this file
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*
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* usb debug.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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*/
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#include "../include/sunxi_usb_config.h"
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void print_usb_reg_by_ep(spinlock_t *lock, void __iomem *usbc_base, __s32 ep_index, char *str)
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{
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__u32 old_ep_index = 0;
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DMSG_INFO("\n");
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DMSG_INFO("--------------------------ep%d: %s--------------------------\n", ep_index, str);
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if (ep_index >= 0) {
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old_ep_index = USBC_Readw(usbc_base + USBC_REG_o_EPIND);
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USBC_Writew(ep_index, (usbc_base + USBC_REG_o_EPIND));
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DMSG_INFO("old_ep_index = %d, ep_index = %d\n", old_ep_index, ep_index);
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}
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DMSG_INFO("USBC_REG_o_FADDR = 0x%x\n", USBC_Readb(usbc_base + USBC_REG_o_FADDR));
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DMSG_INFO("USBC_REG_o_PCTL = 0x%x\n", USBC_Readb(usbc_base + USBC_REG_o_PCTL));
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DMSG_INFO("USBC_REG_o_INTTx = 0x%x\n", USBC_Readw(usbc_base + USBC_REG_o_INTTx));
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DMSG_INFO("USBC_REG_o_INTRx = 0x%x\n", USBC_Readw(usbc_base + USBC_REG_o_INTRx));
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DMSG_INFO("USBC_REG_o_INTTxE = 0x%x\n", USBC_Readw(usbc_base + USBC_REG_o_INTTxE));
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DMSG_INFO("USBC_REG_o_INTRxE = 0x%x\n", USBC_Readw(usbc_base + USBC_REG_o_INTRxE));
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DMSG_INFO("USBC_REG_o_INTUSB = 0x%x\n", USBC_Readb(usbc_base + USBC_REG_o_INTUSB));
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DMSG_INFO("USBC_REG_o_INTUSBE = 0x%x\n", USBC_Readb(usbc_base + USBC_REG_o_INTUSBE));
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DMSG_INFO("USBC_REG_o_EPIND = 0x%x\n", USBC_Readw(usbc_base + USBC_REG_o_EPIND));
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DMSG_INFO("USBC_REG_o_TXMAXP = 0x%x\n", USBC_Readw(usbc_base + USBC_REG_o_TXMAXP));
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DMSG_INFO("USBC_REG_o_CSR0 = 0x%x\n", USBC_Readw(usbc_base + USBC_REG_o_CSR0));
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DMSG_INFO("USBC_REG_o_TXCSR = 0x%x\n", USBC_Readw(usbc_base + USBC_REG_o_TXCSR));
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DMSG_INFO("USBC_REG_o_RXMAXP = 0x%x\n", USBC_Readw(usbc_base + USBC_REG_o_RXMAXP));
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DMSG_INFO("USBC_REG_o_RXCSR = 0x%x\n", USBC_Readw(usbc_base + USBC_REG_o_RXCSR));
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DMSG_INFO("USBC_REG_o_COUNT0 = 0x%x\n", USBC_Readw(usbc_base + USBC_REG_o_COUNT0));
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DMSG_INFO("USBC_REG_o_RXCOUNT = 0x%x\n", USBC_Readw(usbc_base + USBC_REG_o_RXCOUNT));
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DMSG_INFO("USBC_REG_o_TXTYPE = 0x%x\n", USBC_Readb(usbc_base + USBC_REG_o_TXTYPE));
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DMSG_INFO("USBC_REG_o_NAKLIMIT0 = 0x%x\n", USBC_Readb(usbc_base + USBC_REG_o_NAKLIMIT0));
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DMSG_INFO("USBC_REG_o_TXINTERVAL = 0x%x\n", USBC_Readb(usbc_base + USBC_REG_o_TXINTERVAL));
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DMSG_INFO("USBC_REG_o_RXTYPE = 0x%x\n", USBC_Readb(usbc_base + USBC_REG_o_RXTYPE));
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DMSG_INFO("USBC_REG_o_RXINTERVAL = 0x%x\n", USBC_Readb(usbc_base + USBC_REG_o_RXINTERVAL));
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DMSG_INFO("USBC_REG_o_CONFIGDATA = 0x%x\n", USBC_Readb(usbc_base + USBC_REG_o_CONFIGDATA));
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DMSG_INFO("USBC_REG_o_DEVCTL = 0x%x\n", USBC_Readb(usbc_base + USBC_REG_o_DEVCTL));
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DMSG_INFO("USBC_REG_o_TXFIFOSZ = 0x%x\n", USBC_Readb(usbc_base + USBC_REG_o_TXFIFOSZ));
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DMSG_INFO("USBC_REG_o_RXFIFOSZ = 0x%x\n", USBC_Readb(usbc_base + USBC_REG_o_RXFIFOSZ));
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DMSG_INFO("USBC_REG_o_TXFIFOAD = 0x%x\n", USBC_Readw(usbc_base + USBC_REG_o_TXFIFOAD));
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DMSG_INFO("USBC_REG_o_RXFIFOAD = 0x%x\n", USBC_Readw(usbc_base + USBC_REG_o_RXFIFOAD));
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DMSG_INFO("USBC_REG_o_VEND0 = 0x%x\n", USBC_Readb(usbc_base + USBC_REG_o_VEND0));
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DMSG_INFO("USBC_REG_o_VEND1 = 0x%x\n", USBC_Readb(usbc_base + USBC_REG_o_VEND1));
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DMSG_INFO("TXFADDRx(%d) = 0x%x\n", ep_index, USBC_Readb(usbc_base + USBC_REG_o_TXFADDRx));
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DMSG_INFO("TXHADDRx(%d = 0x%x\n", ep_index, USBC_Readb(usbc_base + USBC_REG_o_TXHADDRx));
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DMSG_INFO("TXHPORTx(%d) = 0x%x\n", ep_index, USBC_Readb(usbc_base + USBC_REG_o_TXHPORTx));
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DMSG_INFO("RXFADDRx(%d) = 0x%x\n", ep_index, USBC_Readb(usbc_base + USBC_REG_o_RXFADDRx));
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DMSG_INFO("RXHADDRx(%d) = 0x%x\n", ep_index, USBC_Readb(usbc_base + USBC_REG_o_RXHADDRx));
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DMSG_INFO("RXHPORTx(%d) = 0x%x\n", ep_index, USBC_Readb(usbc_base + USBC_REG_o_RXHPORTx));
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DMSG_INFO("RPCOUNTx(%d) = 0x%x\n", ep_index, (u32)USBC_Readl(usbc_base + USBC_REG_o_RPCOUNT));
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DMSG_INFO("USBC_REG_o_ISCR = 0x%x\n", (u32)USBC_Readl(usbc_base + USBC_REG_o_ISCR));
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DMSG_INFO("USBC_REG_o_PHYCTL = 0x%x\n", (u32)USBC_Readl(usbc_base + USBC_REG_o_PHYCTL));
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DMSG_INFO("USBC_REG_o_PHYBIST = 0x%x\n", (u32)USBC_Readl(usbc_base + USBC_REG_o_PHYBIST));
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if (ep_index >= 0) {
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USBC_Writew(old_ep_index, (usbc_base + USBC_REG_o_EPIND));
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}
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DMSG_INFO("---------------------------------------------------------------------------\n");
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DMSG_INFO("\n");
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return;
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}
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void print_all_usb_reg(spinlock_t *lock, void __iomem *usbc_base, __s32 ep_start, __u32 ep_end, char *str)
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{
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__u32 i = 0;
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__u32 old_ep_index = 0;
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unsigned long flags = 0;
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if (lock) {
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spin_lock_irqsave(lock, flags);
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DMSG_INFO("\n");
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DMSG_INFO("-------------------print_all_usb_reg: %s----------------\n", str);
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old_ep_index = USBC_Readw(usbc_base + USBC_REG_o_EPIND);
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for(i = ep_start; i <= ep_end; i++) {
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print_usb_reg_by_ep(lock, usbc_base, i, str);
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}
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USBC_Writew(old_ep_index, (usbc_base + USBC_REG_o_EPIND));
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DMSG_INFO("---------------------------------------------------------------------------\n");
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DMSG_INFO("\n");
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spin_unlock_irqrestore(lock, flags);
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}else{
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DMSG_INFO("\n");
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DMSG_INFO("-------------------print_all_usb_reg: %s----------------\n", str);
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old_ep_index = USBC_Readw(usbc_base + USBC_REG_o_EPIND);
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for(i = ep_start; i <= ep_end; i++) {
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print_usb_reg_by_ep(lock, usbc_base, i, str);
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}
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USBC_Writew(old_ep_index, (usbc_base + USBC_REG_o_EPIND));
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DMSG_INFO("---------------------------------------------------------------------------\n");
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DMSG_INFO("\n");
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}
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return;
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}
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void clear_usb_reg(void __iomem *usb_base)
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{
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__u32 reg_val = 0;
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__u32 i = 0;
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/* global control and status */
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reg_val = USBC_Readl(USBC_REG_EX_USB_GCS(usb_base));
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reg_val = 0x20;
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USBC_Writel(reg_val, USBC_REG_EX_USB_GCS(usb_base));
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/* endpoint interrupt flag */
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reg_val = USBC_Readl(USBC_REG_EX_USB_EPINTF(usb_base));
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reg_val = 0x44;
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USBC_Writel(reg_val, USBC_REG_EX_USB_EPINTF(usb_base));
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/* endpoint interrupt enable */
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reg_val = USBC_Readl(USBC_REG_EX_USB_EPINTE(usb_base));
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reg_val = 0x48;
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USBC_Writel(reg_val, USBC_REG_EX_USB_EPINTE(usb_base));
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/* bus interrupt flag */
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reg_val = USBC_Readl(USBC_REG_EX_USB_BUSINTF(usb_base));
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reg_val = 0x4c;
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USBC_Writel(reg_val, USBC_REG_EX_USB_BUSINTF(usb_base));
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/* bus interrupt enable */
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reg_val = USBC_Readl(USBC_REG_EX_USB_BUSINTE(usb_base));
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reg_val = 0x50;
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USBC_Writel(reg_val, USBC_REG_EX_USB_BUSINTE(usb_base));
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/* endpoint control status */
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for(i = 0; i < USBC_MAX_EP_NUM; i++) {
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USBC_Writeb(i, USBC_REG_EPIND(usb_base));
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/* endpoint control status */
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if (i == 0) {
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reg_val = USBC_Readl(USBC_REG_EX_USB_CSR0(usb_base));
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reg_val = 0x00;
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USBC_Writel(reg_val, USBC_REG_EX_USB_CSR0(usb_base));
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} else {
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/* TX endpoint control status */
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reg_val = USBC_Readl(USBC_REG_EX_USB_TXCSR(usb_base));
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reg_val = 0x00;
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USBC_Writel(reg_val, USBC_REG_EX_USB_TXCSR(usb_base));
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/* RX endpoint control status */
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reg_val = USBC_Readl(USBC_REG_EX_USB_RXCSR(usb_base));
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reg_val = 0x00;
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USBC_Writel(reg_val, USBC_REG_EX_USB_RXCSR(usb_base));
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}
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/* TX fifo seting */
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reg_val = USBC_Readl(USBC_REG_EX_USB_TXFIFO(usb_base));
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reg_val = 0x90;
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USBC_Writel(reg_val, USBC_REG_EX_USB_TXFIFO(usb_base));
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/* RX fifo seting */
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reg_val = USBC_Readl(USBC_REG_EX_USB_RXFIFO(usb_base));
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reg_val = 0x94;
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USBC_Writel(reg_val, USBC_REG_EX_USB_RXFIFO(usb_base));
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/* function address */
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reg_val = USBC_Readl(USBC_REG_EX_USB_FADDR(usb_base));
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reg_val = 0x00;
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USBC_Writel(reg_val, USBC_REG_EX_USB_FADDR(usb_base));
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}
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USBC_Writeb(0x00, USBC_REG_EPIND(usb_base));
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return;
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}
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void fpga_config_use_otg(void __iomem *sram_vbase)
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{
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__u32 reg_value = 0;
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reg_value = USBC_Readl(sram_vbase + 0x04);
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reg_value |= 0x01;
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USBC_Writel(reg_value, (sram_vbase + 0x04));
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return ;
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}
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