2019-08-31 17:30:51 +02:00
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/*
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* UAE - The Un*x Amiga Emulator
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*
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* custom chip support
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*
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* (c) 1995 Bernd Schmidt
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*/
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2016-11-30 22:25:43 +01:00
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#ifndef UAE_CUSTOM_H
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#define UAE_CUSTOM_H
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2015-05-13 18:47:23 +00:00
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2017-12-04 15:49:40 +01:00
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#include "uae/types.h"
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2016-12-09 19:18:42 +01:00
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#include "machdep/rpt.h"
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2016-04-24 09:45:29 +00:00
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2015-05-13 18:47:23 +00:00
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/* These are the masks that are ORed together in the chipset_mask option.
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2019-08-31 17:30:51 +02:00
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* If CSMASK_AGA is set, the ECS bits are guaranteed to be set as well. */
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2015-05-13 18:47:23 +00:00
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#define CSMASK_ECS_AGNUS 1
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#define CSMASK_ECS_DENISE 2
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#define CSMASK_AGA 4
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2016-04-24 09:45:29 +00:00
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#define CSMASK_MASK (CSMASK_ECS_AGNUS | CSMASK_ECS_DENISE | CSMASK_AGA)
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2015-05-13 18:47:23 +00:00
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2016-08-27 20:39:53 +02:00
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#define CHIPSET_CLOCK_PAL 3546895
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#define CHIPSET_CLOCK_NTSC 3579545
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2016-11-30 22:25:43 +01:00
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#define MAXHPOS_ROWS 256
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#define MAXVPOS_LINES_ECS 2048
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#define MAXVPOS_LINES_OCS 512
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#define HPOS_SHIFT 3
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2017-12-04 15:49:40 +01:00
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extern int custom_init (void);
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extern void custom_prepare (void);
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extern void custom_reset (bool hardreset, bool keyboardreset);
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extern int intlev (void);
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2017-03-30 21:21:31 +02:00
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2017-12-04 15:49:40 +01:00
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extern void do_copper (void);
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2015-05-13 18:47:23 +00:00
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2017-12-04 15:49:40 +01:00
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extern void notice_new_xcolors (void);
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2018-11-29 20:29:27 +01:00
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extern void notice_screen_contents_lost();
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2017-12-04 15:49:40 +01:00
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extern void init_row_map (void);
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extern void init_hz_normal (void);
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extern void init_custom (void);
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2015-05-13 18:47:23 +00:00
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2017-12-04 15:49:40 +01:00
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extern unsigned long int hsync_counter;
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2015-05-13 18:47:23 +00:00
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extern uae_u16 dmacon;
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2017-12-04 15:49:40 +01:00
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extern uae_u16 intreq;
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2017-03-30 21:21:31 +02:00
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2018-11-25 20:27:15 +01:00
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extern int vpos, lof_store;
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2015-05-13 18:47:23 +00:00
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2017-12-04 15:49:40 +01:00
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STATIC_INLINE int dmaen (unsigned int dmamask)
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2016-04-24 09:45:29 +00:00
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{
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2016-11-30 22:25:43 +01:00
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return (dmamask & dmacon) && (dmacon & 0x200);
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2016-04-24 09:45:29 +00:00
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}
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2015-05-13 18:47:23 +00:00
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#define SPCFLAG_STOP 2
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#define SPCFLAG_COPPER 4
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#define SPCFLAG_INT 8
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#define SPCFLAG_BRK 16
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2019-01-12 17:39:42 +01:00
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#define SPCFLAG_UAEINT 32
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2015-05-13 18:47:23 +00:00
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#define SPCFLAG_TRACE 64
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#define SPCFLAG_DOTRACE 128
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2015-11-16 22:32:10 +01:00
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#define SPCFLAG_DOINT 256 /* arg, JIT fails without this.. */
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2015-05-13 18:47:23 +00:00
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#define SPCFLAG_BLTNASTY 512
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#define SPCFLAG_EXEC 1024
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#define SPCFLAG_ACTION_REPLAY 2048
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2019-01-12 17:39:42 +01:00
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#define SPCFLAG_TRAP 4096 /* enforcer-hack */
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2015-05-13 18:47:23 +00:00
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#define SPCFLAG_MODE_CHANGE 8192
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2016-08-27 20:39:53 +02:00
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#ifdef JIT
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2015-05-13 18:47:23 +00:00
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#define SPCFLAG_END_COMPILE 16384
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2016-08-27 20:39:53 +02:00
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#endif
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2017-03-30 21:21:31 +02:00
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#define SPCFLAG_CHECK 32768
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2015-05-13 18:47:23 +00:00
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extern uae_u16 adkcon;
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2019-01-12 17:39:42 +01:00
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extern unsigned int joy0dir, joy1dir;
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extern int joy0button, joy1button;
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2017-12-04 15:49:40 +01:00
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extern void INTREQ (uae_u16);
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extern bool INTREQ_0 (uae_u16);
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extern void INTREQ_f (uae_u16);
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STATIC_INLINE void send_interrupt (int num)
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{
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INTREQ_0 (0x8000 | (1 << num));
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}
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2017-03-30 21:21:31 +02:00
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extern void rethink_uae_int(void);
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2019-08-31 17:30:51 +02:00
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STATIC_INLINE uae_u16 INTREQR (void)
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{
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return intreq;
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}
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2015-05-13 18:47:23 +00:00
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2019-02-10 02:30:07 +01:00
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STATIC_INLINE void safe_interrupt_set(bool i6)
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{
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uae_u16 v = i6 ? 0x2000 : 0x0008;
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if (!(intreq & v)) {
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INTREQ_0(0x8000 | v);
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}
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}
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2015-05-13 18:47:23 +00:00
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/* maximums for statically allocated tables */
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2019-01-12 17:53:40 +01:00
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#ifdef UAE_MINI
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2019-01-12 17:39:42 +01:00
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/* absolute minimums for basic A500/A1200-emulation */
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2015-05-13 18:47:23 +00:00
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#define MAXHPOS 227
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2019-01-12 17:39:42 +01:00
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#define MAXVPOS 312
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#else
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#define MAXHPOS 256
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#define MAXVPOS 592
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#endif
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2015-05-13 18:47:23 +00:00
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/* PAL/NTSC values */
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#define MAXHPOS_PAL 227
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#define MAXHPOS_NTSC 227
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2016-11-30 22:25:43 +01:00
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// short field maxvpos
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2015-05-13 18:47:23 +00:00
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#define MAXVPOS_PAL 312
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#define MAXVPOS_NTSC 262
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2016-11-30 22:25:43 +01:00
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// following endlines = first visible line
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2015-11-16 22:32:10 +01:00
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#define VBLANK_ENDLINE_PAL 26
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#define VBLANK_ENDLINE_NTSC 21
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2016-11-30 22:25:43 +01:00
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// line when sprite DMA fetches first control words
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2015-05-13 18:47:23 +00:00
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#define VBLANK_SPRITE_PAL 25
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#define VBLANK_SPRITE_NTSC 20
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#define VBLANK_HZ_PAL 50
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#define VBLANK_HZ_NTSC 60
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2016-11-30 22:25:43 +01:00
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#define VSYNC_ENDLINE_PAL 5
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#define VSYNC_ENDLINE_NTSC 6
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2016-04-24 09:45:29 +00:00
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#define EQU_ENDLINE_PAL 8
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#define EQU_ENDLINE_NTSC 10
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2015-05-13 18:47:23 +00:00
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2019-01-12 17:39:42 +01:00
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extern int maxhpos, maxhpos_short;
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2016-11-30 22:25:43 +01:00
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extern int maxvpos, maxvpos_nom, maxvpos_display;
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2019-01-12 14:42:06 +01:00
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extern int hsyncstartpos, hsyncendpos;
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2019-01-12 17:39:42 +01:00
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extern int minfirstline, vblank_endline, numscrlines;
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2019-01-26 22:48:59 +01:00
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extern float vblank_hz, fake_vblank_hz;
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extern float hblank_hz;
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2019-01-12 17:39:42 +01:00
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extern int vblank_skip, doublescan;
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2019-01-12 14:42:06 +01:00
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extern bool programmedmode;
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2015-05-13 18:47:23 +00:00
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#define DMA_AUD0 0x0001
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#define DMA_AUD1 0x0002
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#define DMA_AUD2 0x0004
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#define DMA_AUD3 0x0008
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#define DMA_DISK 0x0010
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#define DMA_SPRITE 0x0020
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#define DMA_BLITTER 0x0040
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#define DMA_COPPER 0x0080
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#define DMA_BITPLANE 0x0100
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#define DMA_MASTER 0x0200
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#define DMA_BLITPRI 0x0400
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2019-01-12 17:39:42 +01:00
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#define CYCLE_REFRESH 1
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#define CYCLE_STROBE 2
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#define CYCLE_MISC 3
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#define CYCLE_SPRITE 4
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#define CYCLE_COPPER 5
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#define CYCLE_BLITTER 6
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#define CYCLE_CPU 7
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#define CYCLE_CPUNASTY 8
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#define CYCLE_COPPER_SPECIAL 0x10
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#define CYCLE_MASK 0x0f
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extern unsigned long frametime, timeframes;
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extern uae_u16 htotal, vtotal, beamcon0;
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2017-03-30 21:21:31 +02:00
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2015-05-13 18:47:23 +00:00
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/* 100 words give you 1600 horizontal pixels. Should be more than enough for
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2019-08-31 17:30:51 +02:00
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* superhires. Don't forget to update the definition in genp2c.c as well.
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* needs to be larger for superhires support */
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#ifdef CUSTOM_SIMPLE
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#define MAX_WORDS_PER_LINE 50
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#else
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2015-05-13 18:47:23 +00:00
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#define MAX_WORDS_PER_LINE 100
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2019-08-31 17:30:51 +02:00
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#endif
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2015-05-13 18:47:23 +00:00
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2019-01-12 17:39:42 +01:00
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extern uae_u32 hirestab_h[256][2];
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extern uae_u32 lorestab_h[256][4];
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extern uae_u32 hirestab_l[256][1];
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extern uae_u32 lorestab_l[256][2];
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#ifdef AGA
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2015-05-13 18:47:23 +00:00
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/* AGA mode color lookup tables */
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extern unsigned int xredcolors[256], xgreencolors[256], xbluecolors[256];
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2019-01-12 17:39:42 +01:00
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#endif
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extern int xredcolor_s, xredcolor_b, xredcolor_m;
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extern int xgreencolor_s, xgreencolor_b, xgreencolor_m;
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extern int xbluecolor_s, xbluecolor_b, xbluecolor_m;
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2015-05-13 18:47:23 +00:00
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#define RES_LORES 0
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#define RES_HIRES 1
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#define RES_SUPERHIRES 2
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2015-11-16 22:32:10 +01:00
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#define RES_MAX 2
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2017-02-28 01:20:30 +01:00
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#define VRES_NONDOUBLE 0
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#define VRES_DOUBLE 1
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2019-01-12 17:39:42 +01:00
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#define VRES_QUAD 2
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2017-02-28 01:20:30 +01:00
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#define VRES_MAX 1
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2015-05-13 18:47:23 +00:00
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2019-01-12 17:39:42 +01:00
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/* calculate shift depending on resolution (replaced "decided_hires ? 4 : 8") */
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#define RES_SHIFT(res) ((res) == RES_LORES ? 8 : (res) == RES_HIRES ? 4 : 2)
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2015-05-13 18:47:23 +00:00
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/* get resolution from bplcon0 */
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2019-08-31 17:30:51 +02:00
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STATIC_INLINE int GET_RES_DENISE (uae_u16 con0)
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2016-04-24 09:45:29 +00:00
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{
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2019-01-12 17:39:42 +01:00
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if (!(currprefs.chipset_mask & CSMASK_ECS_DENISE))
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con0 &= ~0x40; // SUPERHIRES
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return ((con0) & 0x40) ? RES_SUPERHIRES : ((con0) & 0x8000) ? RES_HIRES : RES_LORES;
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2016-04-24 09:45:29 +00:00
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}
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2019-08-31 17:30:51 +02:00
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STATIC_INLINE int GET_RES_AGNUS (uae_u16 con0)
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2016-04-24 09:45:29 +00:00
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{
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2019-01-12 17:39:42 +01:00
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if (!(currprefs.chipset_mask & CSMASK_ECS_AGNUS))
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con0 &= ~0x40; // SUPERHIRES
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return ((con0) & 0x40) ? RES_SUPERHIRES : ((con0) & 0x8000) ? RES_HIRES : RES_LORES;
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2016-04-24 09:45:29 +00:00
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}
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2015-05-13 18:47:23 +00:00
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/* get sprite width from FMODE */
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#define GET_SPRITEWIDTH(FMODE) ((((FMODE) >> 2) & 3) == 3 ? 64 : (((FMODE) >> 2) & 3) == 0 ? 16 : 32)
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/* Compute the number of bitplanes from a value written to BPLCON0 */
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2016-04-24 09:45:29 +00:00
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STATIC_INLINE int GET_PLANES(uae_u16 bplcon0)
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{
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2019-01-12 17:39:42 +01:00
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if ((bplcon0 & 0x0010) && (bplcon0 & 0x7000))
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return 0; // >8 planes = 0 planes
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if (bplcon0 & 0x0010)
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return 8; // AGA 8-planes bit
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return (bplcon0 >> 12) & 7; // normal planes bits
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2016-04-24 09:45:29 +00:00
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}
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2015-05-13 18:47:23 +00:00
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2017-12-04 15:49:40 +01:00
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extern void fpscounter_reset (void);
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2017-03-30 21:21:31 +02:00
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extern unsigned long idletime;
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2019-09-20 23:20:45 +02:00
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//extern int lightpen_x[2], lightpen_y[2];
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//extern int lightpen_cx[2], lightpen_cy[2], lightpen_active, lightpen_enabled, lightpen_enabled2;
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2017-12-04 15:49:40 +01:00
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2019-01-12 17:39:42 +01:00
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struct customhack {
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uae_u16 v;
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int vpos, hpos;
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};
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void customhack_put(struct customhack *ch, uae_u16 v, int hpos);
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uae_u16 customhack_get(struct customhack *ch, int hpos);
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extern void alloc_cycle_ext(int, int);
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extern void alloc_cycle_blitter(int hpos, uaecptr *ptr, int);
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extern bool ispal(void);
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extern bool isvga(void);
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2017-12-04 15:49:40 +01:00
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extern int current_maxvpos (void);
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2019-02-10 02:30:07 +01:00
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extern struct chipset_refresh *get_chipset_refresh(struct uae_prefs*);
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2019-01-12 14:42:06 +01:00
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extern void compute_framesync(void);
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2019-08-31 17:30:51 +02:00
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//extern void getsyncregisters(uae_u16 *phsstrt, uae_u16 *phsstop, uae_u16 *pvsstrt, uae_u16 *pvsstop);
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2019-01-12 17:39:42 +01:00
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void custom_cpuchange(void);
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struct custom_store
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{
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uae_u16 value;
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uae_u32 pc;
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};
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extern struct custom_store custom_storage[256];
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2017-03-30 21:21:31 +02:00
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#endif /* UAE_CUSTOM_H */
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