Merge from Pandora (26 Sept 2016)
This commit is contained in:
Dimitris Panokostas
parent
7b89bfb04a
commit
13df0bcfa8
105 changed files with 219753 additions and 294921 deletions
|
|
@ -2,7 +2,7 @@
|
|||
* newcpu.h - CPU emulation
|
||||
*
|
||||
* Copyright (c) 2009 ARAnyM dev team (see AUTHORS)
|
||||
*
|
||||
*
|
||||
* Inspired by Christian Bauer's Basilisk II
|
||||
*
|
||||
* This file is part of the ARAnyM project which builds a new and powerful
|
||||
|
|
@ -22,13 +22,16 @@
|
|||
* along with ARAnyM; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
/*
|
||||
* UAE - The Un*x Amiga Emulator
|
||||
*
|
||||
* MC68000 emulation
|
||||
*
|
||||
* Copyright 1995 Bernd Schmidt
|
||||
*/
|
||||
/*
|
||||
* UAE - The Un*x Amiga Emulator
|
||||
*
|
||||
* MC68000 emulation
|
||||
*
|
||||
* Copyright 1995 Bernd Schmidt
|
||||
*/
|
||||
|
||||
#ifndef _NEWCPU_H
|
||||
#define _NEWCPU_H
|
||||
|
||||
#include "readcpu.h"
|
||||
#include "md-pandora/m68k.h"
|
||||
|
|
@ -46,13 +49,10 @@ extern int fpp_movem_index2[256];
|
|||
extern int fpp_movem_next[256];
|
||||
#endif
|
||||
|
||||
struct regstruct;
|
||||
typedef uae_u32 REGPARAM3 cpuop_func (uae_u32) REGPARAM;
|
||||
typedef void REGPARAM3 cpuop_func_ce (uae_u32) REGPARAM;
|
||||
|
||||
typedef uae_u32 REGPARAM3 cpuop_func (uae_u32, struct regstruct ®s) REGPARAM;
|
||||
typedef void REGPARAM3 cpuop_func_ce (uae_u32, struct regstruct ®s) REGPARAM;
|
||||
|
||||
struct cputbl
|
||||
{
|
||||
struct cputbl {
|
||||
cpuop_func *handler;
|
||||
uae_u16 opcode;
|
||||
};
|
||||
|
|
@ -60,26 +60,19 @@ struct cputbl
|
|||
#ifdef JIT
|
||||
typedef uae_u32 REGPARAM3 compop_func (uae_u32) REGPARAM;
|
||||
|
||||
struct comptbl
|
||||
{
|
||||
compop_func *handler;
|
||||
uae_u32 specific;
|
||||
uae_u32 opcode;
|
||||
struct comptbl {
|
||||
compop_func *handler;
|
||||
uae_u32 specific;
|
||||
uae_u32 opcode;
|
||||
};
|
||||
#endif
|
||||
|
||||
#define op_illg(op) _op_illg(op, regs)
|
||||
extern uae_u32 REGPARAM3 _op_illg (uae_u32, struct regstruct ®s) REGPARAM;
|
||||
#define op_unimpl() _op_unimpl(regs)
|
||||
extern void REGPARAM3 _op_unimpl (struct regstruct ®s) REGPARAM;
|
||||
extern uae_u32 REGPARAM3 op_illg (uae_u32) REGPARAM;
|
||||
extern void REGPARAM3 op_unimpl (uae_u16) REGPARAM;
|
||||
|
||||
typedef uae_u8 flagtype;
|
||||
|
||||
#ifdef FPUEMU
|
||||
/* You can set this to long double to be more accurate. However, the
|
||||
resulting alignment issues will cost a lot of performance in some
|
||||
apps */
|
||||
#define USE_LONG_DOUBLE 0
|
||||
|
||||
#if USE_LONG_DOUBLE
|
||||
typedef long double fptype;
|
||||
|
|
@ -90,51 +83,68 @@ typedef double fptype;
|
|||
#endif
|
||||
#endif
|
||||
|
||||
typedef struct
|
||||
{
|
||||
fptype fp;
|
||||
#ifdef USE_SOFT_LONG_DOUBLE
|
||||
bool fpx;
|
||||
uae_u32 fpm;
|
||||
uae_u64 fpe;
|
||||
#endif
|
||||
} fpdata;
|
||||
|
||||
struct regstruct
|
||||
{
|
||||
uae_u32 regs[16];
|
||||
struct flag_struct ccrflags;
|
||||
uae_u32 regs[16];
|
||||
struct flag_struct ccrflags;
|
||||
|
||||
uae_u32 pc;
|
||||
uae_u8 *pc_p;
|
||||
uae_u8 *pc_oldp;
|
||||
uae_u32 instruction_pc;
|
||||
uae_u32 pc;
|
||||
uae_u8 *pc_p;
|
||||
uae_u8 *pc_oldp;
|
||||
uae_u32 instruction_pc;
|
||||
|
||||
uae_u16 irc, ir;
|
||||
uae_u32 spcflags;
|
||||
|
||||
uae_u16 irc, ir;
|
||||
uae_u32 spcflags;
|
||||
uaecptr usp, isp, msp;
|
||||
uae_u16 sr;
|
||||
flagtype t1;
|
||||
flagtype t0;
|
||||
flagtype s;
|
||||
flagtype m;
|
||||
flagtype x;
|
||||
flagtype stopped;
|
||||
int halted;
|
||||
int intmask;
|
||||
|
||||
uaecptr usp, isp, msp;
|
||||
uae_u16 sr;
|
||||
flagtype t1;
|
||||
flagtype t0;
|
||||
flagtype s;
|
||||
flagtype m;
|
||||
flagtype x;
|
||||
flagtype stopped;
|
||||
int intmask;
|
||||
|
||||
uae_u32 vbr,sfc,dfc;
|
||||
uae_u32 vbr,sfc,dfc;
|
||||
|
||||
#ifdef FPUEMU
|
||||
fptype fp[8];
|
||||
fptype fp_result;
|
||||
|
||||
uae_u32 fpcr,fpsr, fpiar;
|
||||
uae_u32 fpsr_highbyte;
|
||||
fpdata fp[8];
|
||||
fpdata fp_result;
|
||||
uae_u32 fp_result_status;
|
||||
uae_u32 fpcr,fpsr, fpiar;
|
||||
uae_u32 fpu_state;
|
||||
uae_u32 fpu_exp_state;
|
||||
fpdata exp_src1, exp_src2;
|
||||
uae_u32 exp_pack[3];
|
||||
uae_u16 exp_opcode, exp_extra, exp_type;
|
||||
bool fp_exception;
|
||||
#endif
|
||||
#ifndef CPUEMU_68000_ONLY
|
||||
uae_u32 cacr, caar;
|
||||
uae_u32 itt0, itt1, dtt0, dtt1;
|
||||
uae_u32 tcr, mmusr, urp, srp, buscr;
|
||||
uae_u32 cacr, caar;
|
||||
uae_u32 itt0, itt1, dtt0, dtt1;
|
||||
uae_u32 tcr, mmusr, urp, srp, buscr;
|
||||
#endif
|
||||
|
||||
uae_u32 pcr;
|
||||
uae_u32 address_space_mask;
|
||||
uae_u32 pcr;
|
||||
uae_u32 address_space_mask;
|
||||
|
||||
uae_u8 panic;
|
||||
uae_u32 panic_pc, panic_addr;
|
||||
signed long pissoff;
|
||||
uae_u8 panic;
|
||||
uae_u32 panic_pc, panic_addr;
|
||||
signed long pissoff;
|
||||
};
|
||||
|
||||
extern unsigned long nextevent, is_syncline, currcycle;
|
||||
|
||||
extern struct regstruct regs;
|
||||
|
|
@ -147,99 +157,146 @@ STATIC_INLINE uae_u32 munge24(uae_u32 x)
|
|||
}
|
||||
|
||||
extern int cpu_cycles;
|
||||
extern bool m68k_pc_indirect;
|
||||
|
||||
#define set_special(x) _set_special(regs, x)
|
||||
STATIC_INLINE void _set_special (struct regstruct ®s, uae_u32 x)
|
||||
STATIC_INLINE void set_special (uae_u32 x)
|
||||
{
|
||||
regs.spcflags |= x;
|
||||
cycles_do_special(regs);
|
||||
regs.spcflags |= x;
|
||||
cycles_do_special();
|
||||
}
|
||||
|
||||
#define unset_special(x) _unset_special(regs, x)
|
||||
STATIC_INLINE void _unset_special (struct regstruct ®s, uae_u32 x)
|
||||
STATIC_INLINE void unset_special (uae_u32 x)
|
||||
{
|
||||
regs.spcflags &= ~x;
|
||||
regs.spcflags &= ~x;
|
||||
}
|
||||
|
||||
#define m68k_dreg(r,num) ((r).regs[(num)])
|
||||
#define m68k_areg(r,num) (((r).regs + 8)[(num)])
|
||||
|
||||
#define m68k_setpc(newpc) _m68k_setpc(regs, newpc)
|
||||
STATIC_INLINE void _m68k_setpc (struct regstruct ®s, uaecptr newpc)
|
||||
|
||||
/* direct (regs.pc_p) access */
|
||||
|
||||
STATIC_INLINE void m68k_setpc (uaecptr newpc)
|
||||
{
|
||||
regs.pc_p = regs.pc_oldp = get_real_address (newpc);
|
||||
regs.instruction_pc = regs.pc = newpc;
|
||||
regs.pc_p = regs.pc_oldp = get_real_address (newpc);
|
||||
regs.instruction_pc = regs.pc = newpc;
|
||||
}
|
||||
|
||||
#define m68k_getpc() _m68k_getpc(regs)
|
||||
STATIC_INLINE uaecptr _m68k_getpc (struct regstruct ®s)
|
||||
STATIC_INLINE uaecptr m68k_getpc (void)
|
||||
{
|
||||
return (uaecptr)(regs.pc + ((uae_u8*)regs.pc_p - (uae_u8*)regs.pc_oldp));
|
||||
return (uaecptr)(regs.pc + ((uae_u8*)regs.pc_p - (uae_u8*)regs.pc_oldp));
|
||||
}
|
||||
#define M68K_GETPC _m68k_getpc(regs)
|
||||
#define M68K_GETPC m68k_getpc()
|
||||
|
||||
#define m68k_incpc(o) ((regs).pc_p += (o))
|
||||
|
||||
#define m68k_do_rts() _m68k_do_rts(regs)
|
||||
STATIC_INLINE void _m68k_do_rts (struct regstruct ®s)
|
||||
#define get_dibyte(o) do_get_mem_byte((uae_u8 *)((regs).pc_p + (o) + 1))
|
||||
#define get_diword(o) do_get_mem_word((uae_u16 *)((regs).pc_p + (o)))
|
||||
#define get_dilong(o) do_get_mem_long((uae_u32 *)((regs).pc_p + (o)))
|
||||
|
||||
STATIC_INLINE uae_u32 next_diword (void)
|
||||
{
|
||||
uae_u32 newpc = get_long (m68k_areg (regs, 7));
|
||||
m68k_setpc (newpc);
|
||||
m68k_areg(regs, 7) += 4;
|
||||
uae_u32 r = do_get_mem_word((uae_u16 *)((regs).pc_p));
|
||||
m68k_incpc (2);
|
||||
return r;
|
||||
}
|
||||
STATIC_INLINE uae_u32 next_dilong (void)
|
||||
{
|
||||
uae_u32 r = do_get_mem_long((uae_u32 *)((regs).pc_p));
|
||||
m68k_incpc (4);
|
||||
return r;
|
||||
}
|
||||
|
||||
STATIC_INLINE void m68k_do_bsr (struct regstruct ®s, uaecptr oldpc, uae_s32 offset)
|
||||
STATIC_INLINE void m68k_do_bsr (uaecptr oldpc, uae_s32 offset)
|
||||
{
|
||||
m68k_areg(regs, 7) -= 4;
|
||||
put_long(m68k_areg(regs, 7), oldpc);
|
||||
m68k_incpc (offset);
|
||||
m68k_areg(regs, 7) -= 4;
|
||||
put_long(m68k_areg(regs, 7), oldpc);
|
||||
m68k_incpc (offset);
|
||||
}
|
||||
|
||||
#define get_ibyte(o) do_get_mem_byte((uae_u8 *)((regs).pc_p + (o) + 1))
|
||||
#define get_iword(o) do_get_mem_word((uae_u16 *)((regs).pc_p + (o)))
|
||||
#define get_ilong(o) do_get_mem_long((uae_u32 *)((regs).pc_p + (o)))
|
||||
|
||||
#define get_iword2(regs,o) do_get_mem_word((uae_u16 *)((regs).pc_p + (o)))
|
||||
|
||||
/* These are only used by the 68020/68881 code, and therefore don't
|
||||
* need to handle prefetch. */
|
||||
STATIC_INLINE uae_u32 next_iword (struct regstruct ®s)
|
||||
STATIC_INLINE void m68k_do_rts (void)
|
||||
{
|
||||
uae_u32 r = get_iword (0);
|
||||
m68k_incpc (2);
|
||||
return r;
|
||||
uae_u32 newpc = get_long (m68k_areg (regs, 7));
|
||||
m68k_setpc (newpc);
|
||||
m68k_areg(regs, 7) += 4;
|
||||
}
|
||||
STATIC_INLINE uae_u32 next_ilong (struct regstruct ®s)
|
||||
|
||||
/* indirect (regs.pc) access */
|
||||
|
||||
#define m68k_setpci(newpc) (regs.instruction_pc = regs.pc = newpc)
|
||||
STATIC_INLINE uaecptr m68k_getpci(void)
|
||||
{
|
||||
uae_u32 r = get_ilong (0);
|
||||
m68k_incpc (4);
|
||||
return r;
|
||||
return regs.pc;
|
||||
}
|
||||
#define m68k_incpci(o) (regs.pc += (o))
|
||||
|
||||
STATIC_INLINE void m68k_do_bsri(uaecptr oldpc, uae_s32 offset)
|
||||
{
|
||||
m68k_areg(regs, 7) -= 4;
|
||||
put_long(m68k_areg(regs, 7), oldpc);
|
||||
m68k_incpci(offset);
|
||||
}
|
||||
STATIC_INLINE void m68k_do_rtsi(void)
|
||||
{
|
||||
uae_u32 newpc = get_long(m68k_areg(regs, 7));
|
||||
m68k_setpci(newpc);
|
||||
m68k_areg(regs, 7) += 4;
|
||||
}
|
||||
|
||||
/* common access */
|
||||
|
||||
STATIC_INLINE void m68k_incpc_normal(int o)
|
||||
{
|
||||
if (m68k_pc_indirect)
|
||||
m68k_incpci(o);
|
||||
else
|
||||
m68k_incpc(o);
|
||||
}
|
||||
|
||||
STATIC_INLINE void m68k_setpc_normal(uaecptr pc)
|
||||
{
|
||||
if (m68k_pc_indirect) {
|
||||
regs.pc_p = regs.pc_oldp = 0;
|
||||
m68k_setpci(pc);
|
||||
}
|
||||
else {
|
||||
m68k_setpc(pc);
|
||||
}
|
||||
}
|
||||
|
||||
#define x_get_word get_word
|
||||
#define x_get_long get_long
|
||||
#define x_put_byte put_byte
|
||||
#define x_put_word put_word
|
||||
#define x_put_long put_long
|
||||
#define x_next_iword() next_iword(regs)
|
||||
#define x_next_ilong() next_ilong(regs)
|
||||
|
||||
#define x_cp_put_long put_long
|
||||
#define x_cp_put_word put_word
|
||||
#define x_cp_put_byte put_byte
|
||||
#define x_cp_get_long get_long
|
||||
#define x_cp_get_word get_word
|
||||
#define x_cp_get_byte get_byte
|
||||
#define x_cp_next_iword() next_diword()
|
||||
#define x_cp_next_ilong() next_dilong()
|
||||
#define x_cp_get_disp_ea_020(base,idx) _get_disp_ea_020(base)
|
||||
|
||||
#define x_do_cycles(c) do_cycles(c)
|
||||
|
||||
extern void m68k_setstopped (void);
|
||||
extern void m68k_resumestopped (void);
|
||||
|
||||
#define x_get_disp_ea_020(base,dp) _get_disp_ea_020(regs, base, dp)
|
||||
#define get_disp_ea_020(base,dp) _get_disp_ea_020(regs, base, dp)
|
||||
extern uae_u32 REGPARAM3 _get_disp_ea_020 (struct regstruct ®s, uae_u32 base, uae_u32 dp) REGPARAM;
|
||||
#define get_disp_ea_020(base,idx) _get_disp_ea_020(base)
|
||||
extern uae_u32 REGPARAM3 _get_disp_ea_020 (uae_u32 base) REGPARAM;
|
||||
|
||||
extern uae_u32 REGPARAM3 get_bitfield (uae_u32 src, uae_u32 bdata[2], uae_s32 offset, int width) REGPARAM;
|
||||
extern void REGPARAM3 put_bitfield (uae_u32 dst, uae_u32 bdata[2], uae_u32 val, uae_s32 offset, int width) REGPARAM;
|
||||
|
||||
extern int get_cpu_model(void);
|
||||
|
||||
extern void REGPARAM3 MakeSR (struct regstruct ®s) REGPARAM;
|
||||
extern void REGPARAM3 MakeFromSR (struct regstruct ®s) REGPARAM;
|
||||
#define Exception(nr) _Exception(nr, regs)
|
||||
extern void REGPARAM3 _Exception (int, struct regstruct ®s) REGPARAM;
|
||||
extern void set_cpu_caches (bool flush);
|
||||
extern void REGPARAM3 MakeSR (void) REGPARAM;
|
||||
extern void REGPARAM3 MakeFromSR (void) REGPARAM;
|
||||
extern void REGPARAM3 Exception (int) REGPARAM;
|
||||
extern void doint (void);
|
||||
extern void dump_counts (void);
|
||||
extern int m68k_move2c (int, uae_u32 *);
|
||||
|
|
@ -248,43 +305,46 @@ extern void m68k_divl (uae_u32, uae_u32, uae_u16);
|
|||
extern void m68k_mull (uae_u32, uae_u32, uae_u16);
|
||||
extern void init_m68k (void);
|
||||
extern void m68k_go (int);
|
||||
extern void m68k_reset (int);
|
||||
extern int getDivu68kCycles(uae_u32 dividend, uae_u16 divisor);
|
||||
extern int getDivs68kCycles(uae_s32 dividend, uae_s16 divisor);
|
||||
extern void protect_roms (bool);
|
||||
|
||||
STATIC_INLINE int bitset_count16(uae_u16 data)
|
||||
{
|
||||
unsigned int const MASK1 = 0x5555;
|
||||
unsigned int const MASK2 = 0x3333;
|
||||
unsigned int const MASK4 = 0x0f0f;
|
||||
unsigned int const MASK6 = 0x003f;
|
||||
unsigned int const MASK1 = 0x5555;
|
||||
unsigned int const MASK2 = 0x3333;
|
||||
unsigned int const MASK4 = 0x0f0f;
|
||||
unsigned int const MASK6 = 0x003f;
|
||||
|
||||
unsigned int const w = (data & MASK1) + ((data >> 1) & MASK1);
|
||||
unsigned int const x = (w & MASK2) + ((w >> 2) & MASK2);
|
||||
unsigned int const y = ((x + (x >> 4)) & MASK4);
|
||||
unsigned int const z = (y + (y >> 8)) & MASK6;
|
||||
unsigned int const w = (data & MASK1) + ((data >> 1) & MASK1);
|
||||
unsigned int const x = (w & MASK2) + ((w >> 2) & MASK2);
|
||||
unsigned int const y = ((x + (x >> 4)) & MASK4);
|
||||
unsigned int const z = (y + (y >> 8)) & MASK6;
|
||||
|
||||
return z;
|
||||
return z;
|
||||
}
|
||||
|
||||
extern void mmu_op (uae_u32, struct regstruct ®s, uae_u32);
|
||||
extern void mmu_op30 (uaecptr, uae_u32, struct regstruct ®s, uae_u16, uaecptr);
|
||||
extern void mmu_op (uae_u32, uae_u32);
|
||||
extern void mmu_op30 (uaecptr, uae_u32, uae_u16, uaecptr);
|
||||
|
||||
extern void fpuop_arithmetic(uae_u32, struct regstruct ®s, uae_u16);
|
||||
extern void fpuop_dbcc(uae_u32, struct regstruct ®s, uae_u16);
|
||||
extern void fpuop_scc(uae_u32, struct regstruct ®s, uae_u16);
|
||||
extern void fpuop_trapcc(uae_u32, struct regstruct ®s, uaecptr, uae_u16);
|
||||
extern void fpuop_bcc(uae_u32, struct regstruct ®s, uaecptr, uae_u32);
|
||||
extern void fpuop_save(uae_u32, struct regstruct ®s);
|
||||
extern void fpuop_restore(uae_u32, struct regstruct ®s);
|
||||
extern void fpuop_arithmetic(uae_u32, uae_u16);
|
||||
extern void fpuop_dbcc(uae_u32, uae_u16);
|
||||
extern void fpuop_scc(uae_u32, uae_u16);
|
||||
extern void fpuop_trapcc(uae_u32, uaecptr, uae_u16);
|
||||
extern void fpuop_bcc(uae_u32, uaecptr, uae_u32);
|
||||
extern void fpuop_save(uae_u32);
|
||||
extern void fpuop_restore(uae_u32);
|
||||
extern void fpu_reset (void);
|
||||
extern bool fpu_get_constant(fpdata *fp, int cr);
|
||||
extern int fpp_cond(int condition);
|
||||
|
||||
extern void exception3 (uae_u32 opcode, uaecptr addr);
|
||||
extern void exception3i (uae_u32 opcode, uaecptr addr);
|
||||
extern void exception3 (uae_u32 opcode, uaecptr addr, int w, int i, uaecptr pc);
|
||||
extern void exception3b (uae_u32 opcode, uaecptr addr, bool w, bool i, uaecptr pc);
|
||||
extern void exception2 (uaecptr addr);
|
||||
extern void exception2_fake (uaecptr addr);
|
||||
extern void cpureset (void);
|
||||
extern void cpu_halt (int id);
|
||||
|
||||
extern void fill_prefetch (void);
|
||||
|
||||
|
|
@ -298,9 +358,10 @@ extern const struct cputbl op_smalltbl_2_ff[];
|
|||
extern const struct cputbl op_smalltbl_3_ff[];
|
||||
/* 68010 */
|
||||
extern const struct cputbl op_smalltbl_4_ff[];
|
||||
extern const struct cputbl op_smalltbl_11_ff[]; // prefetch
|
||||
/* 68000 */
|
||||
extern const struct cputbl op_smalltbl_5_ff[];
|
||||
extern const struct cputbl op_smalltbl_11_ff[]; // prefetch
|
||||
extern const struct cputbl op_smalltbl_12_ff[]; // prefetch
|
||||
|
||||
extern cpuop_func *cpufunctbl[65536] ASM_SYM_FOR_FUNC ("cpufunctbl");
|
||||
|
||||
|
|
@ -313,3 +374,5 @@ extern bool check_prefs_changed_comp (void);
|
|||
#endif
|
||||
|
||||
extern int movec_illg (int regno);
|
||||
|
||||
#endif /* _NEWCPU_H */
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue