First renames after merge
Renamed folders Updated Makefile contents Removed obsolete files/folders
This commit is contained in:
Dimitris Panokostas
parent
247acd0575
commit
348281d36a
72 changed files with 55 additions and 976 deletions
294
src/machdep/m68k.h
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294
src/machdep/m68k.h
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/*
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* m68k.h - machine dependent bits
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*
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* Copyright (c) 2001-2004 Milan Jurik of ARAnyM dev team (see AUTHORS)
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*
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* Inspired by Christian Bauer's Basilisk II
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*
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* This file is part of the ARAnyM project which builds a new and powerful
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* TOS/FreeMiNT compatible virtual machine running on almost any hardware.
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*
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* ARAnyM is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* ARAnyM is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with ARAnyM; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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/*
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* UAE - The Un*x Amiga Emulator
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*
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* MC68000 emulation - machine dependent bits
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*
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* Copyright 1996 Bernd Schmidt
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* Copyright 2004-2005 Richard Drummond
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*/
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#if (defined(CPU_i386) && defined(X86_ASSEMBLY)) || (defined(CPU_x86_64) && defined(X86_64_ASSEMBLY))
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/*
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* Machine dependent structure for holding the 68k CCR flags
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*/
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struct flag_struct
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{
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unsigned int cznv;
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unsigned int x;
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};
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/*
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* The bits in the cznv field in the above structure are assigned to
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* allow the easy mirroring of the x86 condition flags. (For example,
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* from the AX register - the x86 overflow flag can be copied to AL
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* with a setto %AL instr and the other flags copied to AH with an
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* lahf instr).
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*
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* The 68k CZNV flags are thus assinged in cznv as:
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*
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* <--AL--> <--AH-->
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* 76543210 FEDCBA98 --------- ---------
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* xxxxxxxV NZxxxxxC xxxxxxxxx xxxxxxxxx
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*/
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#define FLAGBIT_N 15
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#define FLAGBIT_Z 14
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#define FLAGBIT_C 8
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#define FLAGBIT_V 0
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#define FLAGBIT_X 8
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#define FLAGVAL_N (1 << FLAGBIT_N)
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#define FLAGVAL_Z (1 << FLAGBIT_Z)
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#define FLAGVAL_C (1 << FLAGBIT_C)
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#define FLAGVAL_V (1 << FLAGBIT_V)
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#define FLAGVAL_X (1 << FLAGBIT_X)
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#define SET_ZFLG(y) (regs.ccrflags.cznv = (regs.ccrflags.cznv & ~FLAGVAL_Z) | (((y) ? 1 : 0) << FLAGBIT_Z))
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#define SET_CFLG(y) (regs.ccrflags.cznv = (regs.ccrflags.cznv & ~FLAGVAL_C) | (((y) ? 1 : 0) << FLAGBIT_C))
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#define SET_VFLG(y) (regs.ccrflags.cznv = (regs.ccrflags.cznv & ~FLAGVAL_V) | (((y) ? 1 : 0) << FLAGBIT_V))
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#define SET_NFLG(y) (regs.ccrflags.cznv = (regs.ccrflags.cznv & ~FLAGVAL_N) | (((y) ? 1 : 0) << FLAGBIT_N))
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#define SET_XFLG(y) (regs.ccrflags.x = ((y) ? 1 : 0) << FLAGBIT_X)
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#define GET_ZFLG() ((regs.ccrflags.cznv >> FLAGBIT_Z) & 1)
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#define GET_CFLG() ((regs.ccrflags.cznv >> FLAGBIT_C) & 1)
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#define GET_VFLG() ((regs.ccrflags.cznv >> FLAGBIT_V) & 1)
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#define GET_NFLG() ((regs.ccrflags.cznv >> FLAGBIT_N) & 1)
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#define GET_XFLG() ((regs.ccrflags.x >> FLAGBIT_X) & 1)
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#define CLEAR_CZNV() (regs.ccrflags.cznv = 0)
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#define GET_CZNV() (regs.ccrflags.cznv)
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#define IOR_CZNV(X) (regs.ccrflags.cznv |= (X))
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#define SET_CZNV(X) (regs.ccrflags.cznv = (X))
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#define COPY_CARRY() (regs.ccrflags.x = regs.ccrflags.cznv)
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/*
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* Test CCR condition
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*/
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STATIC_INLINE int cctrue (struct flag_struct &flags, int cc)
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{
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uae_u32 cznv = flags.cznv;
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switch (cc)
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{
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case 0:
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return 1; /* T */
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case 1:
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return 0; /* F */
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case 2:
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return (cznv & (FLAGVAL_C | FLAGVAL_Z)) == 0; /* !CFLG && !ZFLG HI */
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case 3:
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return (cznv & (FLAGVAL_C | FLAGVAL_Z)) != 0; /* CFLG || ZFLG LS */
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case 4:
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return (cznv & FLAGVAL_C) == 0; /* !CFLG CC */
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case 5:
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return (cznv & FLAGVAL_C) != 0; /* CFLG CS */
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case 6:
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return (cznv & FLAGVAL_Z) == 0; /* !ZFLG NE */
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case 7:
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return (cznv & FLAGVAL_Z) != 0; /* ZFLG EQ */
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case 8:
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return (cznv & FLAGVAL_V) == 0; /* !VFLG VC */
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case 9:
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return (cznv & FLAGVAL_V) != 0; /* VFLG VS */
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case 10:
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return (cznv & FLAGVAL_N) == 0; /* !NFLG PL */
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case 11:
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return (cznv & FLAGVAL_N) != 0; /* NFLG MI */
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case 12:
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return (((cznv << (FLAGBIT_N - FLAGBIT_V)) ^ cznv) & FLAGVAL_N) == 0; /* NFLG == VFLG GE */
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case 13:
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return (((cznv << (FLAGBIT_N - FLAGBIT_V)) ^ cznv) & FLAGVAL_N) != 0; /* NFLG != VFLG LT */
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case 14:
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cznv &= (FLAGVAL_N | FLAGVAL_Z | FLAGVAL_V); /* ZFLG && (NFLG == VFLG) GT */
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return (((cznv << (FLAGBIT_N - FLAGBIT_V)) ^ cznv) & (FLAGVAL_N | FLAGVAL_Z)) == 0;
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case 15:
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cznv &= (FLAGVAL_N | FLAGVAL_Z | FLAGVAL_V); /* ZFLG && (NFLG != VFLG) LE */
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return (((cznv << (FLAGBIT_N - FLAGBIT_V)) ^ cznv) & (FLAGVAL_N | FLAGVAL_Z)) != 0;
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}
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return 0;
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}
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#elif defined(CPU_arm) && defined(ARMV6_ASSEMBLY)
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struct flag_struct
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{
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uae_u32 nzcv;
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uae_u32 x;
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};
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#define FLAGVAL_Q 0x08000000
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#define FLAGVAL_V 0x10000000
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#define FLAGVAL_C 0x20000000
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#define FLAGVAL_Z 0x40000000
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#define FLAGVAL_N 0x80000000
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#define SET_NFLG(y) (regs.ccrflags.nzcv = (regs.ccrflags.nzcv & ~0x80000000) | (((y) ? 1 : 0) << 31))
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#define SET_ZFLG(y) (regs.ccrflags.nzcv = (regs.ccrflags.nzcv & ~0x40000000) | (((y) ? 1 : 0) << 30))
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#define SET_CFLG(y) (regs.ccrflags.nzcv = (regs.ccrflags.nzcv & ~0x20000000) | (((y) ? 1 : 0) << 29))
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#define SET_VFLG(y) (regs.ccrflags.nzcv = (regs.ccrflags.nzcv & ~0x10000000) | (((y) ? 1 : 0) << 28))
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#define SET_XFLG(y) (regs.ccrflags.x = ((y) ? 1 : 0))
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#define GET_NFLG() ((regs.ccrflags.nzcv >> 31) & 1)
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#define GET_ZFLG() ((regs.ccrflags.nzcv >> 30) & 1)
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#define GET_CFLG() ((regs.ccrflags.nzcv >> 29) & 1)
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#define GET_VFLG() ((regs.ccrflags.nzcv >> 28) & 1)
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#define GET_XFLG() (regs.ccrflags.x & 1)
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#define CLEAR_CZNV() (regs.ccrflags.nzcv = 0)
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#define GET_CZNV() (regs.ccrflags.nzcv)
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#define IOR_CZNV(X) (regs.ccrflags.nzcv |= (X))
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#define SET_CZNV(X) (regs.ccrflags.nzcv = (X))
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#define COPY_CARRY() (regs.ccrflags.x = ((regs.ccrflags.nzcv >> 29) & 1))
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STATIC_INLINE int cctrue(struct flag_struct &flags, int cc)
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{
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unsigned int nzcv = flags.nzcv;
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switch(cc)
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{
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case 0:
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return 1; /* T */
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case 1:
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return 0; /* F */
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case 2:
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return (nzcv & 0x60000000) == 0; /* !GET_CFLG && !GET_ZFLG; HI */
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case 3:
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return (nzcv & 0x60000000) != 0; /* GET_CFLG || GET_ZFLG; LS */
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case 4:
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return (nzcv & 0x20000000) == 0; /* !GET_CFLG; CC */
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case 5:
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return (nzcv & 0x20000000) != 0; /* GET_CFLG; CS */
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case 6:
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return (nzcv & 0x40000000) == 0; /* !GET_ZFLG; NE */
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case 7:
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return (nzcv & 0x40000000) != 0; /* GET_ZFLG; EQ */
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case 8:
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return (nzcv & 0x10000000) == 0; /* !GET_VFLG; VC */
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case 9:
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return (nzcv & 0x10000000) != 0; /* GET_VFLG; VS */
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case 10:
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return (nzcv & 0x80000000) == 0; /* !GET_NFLG; PL */
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case 11:
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return (nzcv & 0x80000000) != 0; /* GET_NFLG; MI */
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case 12:
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return (((nzcv << 3) ^ nzcv) & 0x80000000) == 0; /* GET_NFLG == GET_VFLG; GE */
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case 13:
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return (((nzcv << 3) ^ nzcv) & 0x80000000) != 0; /* GET_NFLG != GET_VFLG; LT */
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case 14:
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nzcv &= 0xd0000000;
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return (((nzcv << 3) ^ nzcv) & 0xc0000000) == 0; /* !GET_ZFLG && (GET_NFLG == GET_VFLG); GT */
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case 15:
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nzcv &= 0xd0000000;
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return (((nzcv << 3) ^ nzcv) & 0xc0000000) != 0; /* GET_ZFLG || (GET_NFLG != GET_VFLG); LE */
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}
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return 0;
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}
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#else
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struct flag_struct
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{
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unsigned int c;
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unsigned int z;
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unsigned int n;
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unsigned int v;
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unsigned int x;
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};
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#define ZFLG (regs.ccrflags.z)
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#define NFLG (regs.ccrflags.n)
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#define CFLG (regs.ccrflags.c)
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#define VFLG (regs.ccrflags.v)
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#define XFLG (regs.ccrflags.x)
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#define SET_CFLG(x) (CFLG = (x))
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#define SET_NFLG(x) (NFLG = (x))
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#define SET_VFLG(x) (VFLG = (x))
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#define SET_ZFLG(x) (ZFLG = (x))
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#define SET_XFLG(x) (XFLG = (x))
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#define GET_CFLG() CFLG
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#define GET_NFLG() NFLG
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#define GET_VFLG() VFLG
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#define GET_ZFLG() ZFLG
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#define GET_XFLG() XFLG
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#define CLEAR_CZNV() do { \
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SET_CFLG (0); \
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SET_ZFLG (0); \
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SET_NFLG (0); \
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SET_VFLG (0); \
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} while (0)
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#define COPY_CARRY() (regs.ccrflags.x = regs.ccrflags.c)
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STATIC_INLINE int cctrue(struct flag_struct &flags, const int cc)
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{
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switch(cc)
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{
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case 0:
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return 1; /* T */
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case 1:
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return 0; /* F */
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case 2:
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return !CFLG && !ZFLG; /* HI */
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case 3:
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return CFLG || ZFLG; /* LS */
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case 4:
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return !CFLG; /* CC */
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case 5:
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return CFLG; /* CS */
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case 6:
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return !ZFLG; /* NE */
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case 7:
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return ZFLG; /* EQ */
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case 8:
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return !VFLG; /* VC */
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case 9:
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return VFLG; /* VS */
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case 10:
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return !NFLG; /* PL */
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case 11:
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return NFLG; /* MI */
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case 12:
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return NFLG == VFLG; /* GE */
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case 13:
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return NFLG != VFLG; /* LT */
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case 14:
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return !ZFLG && (NFLG == VFLG); /* GT */
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case 15:
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return ZFLG || (NFLG != VFLG); /* LE */
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}
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return 0;
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}
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#endif
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109
src/machdep/maccess.h
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109
src/machdep/maccess.h
Normal file
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@ -0,0 +1,109 @@
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/*
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* UAE - The Un*x Amiga Emulator
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*
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* Memory access functions
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*
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* Copyright 1996 Bernd Schmidt
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*/
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#ifndef MACCESS_UAE_H
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#define MACCESS_UAE_H
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#ifdef ARMV6_ASSEMBLY
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STATIC_INLINE uae_u16 do_get_mem_word(uae_u16 *_GCCRES_ a)
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{
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uae_u16 v;
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__asm__ (
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"ldrh %[v], [%[a]] \n\t"
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"rev16 %[v], %[v] \n\t"
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: [v] "=r" (v) : [a] "r" (a) );
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return v;
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}
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#else
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STATIC_INLINE uae_u16 do_get_mem_word(uae_u16 *_GCCRES_ a)
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{
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uae_u8 *b = (uae_u8 *)a;
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return (*b << 8) | (*(b+1));
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}
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#endif
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#ifdef ARMV6_ASSEMBLY
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STATIC_INLINE uae_u32 do_get_mem_long(uae_u32 *a)
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{
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uae_u32 v;
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__asm__ (
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"ldr %[v], [%[a]] \n\t"
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"rev %[v], %[v] \n\t"
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: [v] "=r" (v) : [a] "r" (a) );
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return v;
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}
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#else
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STATIC_INLINE uae_u32 do_get_mem_long(uae_u32 *_GCCRES_ a)
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{
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uae_u8 *b = (uae_u8 *)a;
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return (*b << 24) | (*(b+1) << 16) | (*(b+2) << 8) | (*(b+3));
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}
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#endif
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STATIC_INLINE uae_u8 do_get_mem_byte(uae_u8 *_GCCRES_ a)
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{
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return *a;
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}
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#ifdef ARMV6_ASSEMBLY
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STATIC_INLINE void do_put_mem_word(uae_u16 *_GCCRES_ a, uae_u16 v)
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{
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__asm__ (
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"rev16 r2, %[v] \n\t"
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"strh r2, [%[a]] \n\t"
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: : [v] "r" (v), [a] "r" (a) : "r2", "memory" );
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}
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#else
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STATIC_INLINE void do_put_mem_word(uae_u16 *_GCCRES_ a, uae_u16 v)
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{
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uae_u8 *b = (uae_u8 *)a;
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*b = v >> 8;
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*(b+1) = v;
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}
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#endif
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#ifdef ARMV6_ASSEMBLY
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STATIC_INLINE void do_put_mem_long(uae_u32 *_GCCRES_ a, uae_u32 v)
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{
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__asm__ (
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"rev r2, %[v] \n\t"
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"str r2, [%[a]] \n\t"
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: : [v] "r" (v), [a] "r" (a) : "r2", "memory" );
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}
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#else
|
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STATIC_INLINE void do_put_mem_long(uae_u32 *_GCCRES_ a, uae_u32 v)
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{
|
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uae_u8 *b = (uae_u8 *)a;
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|
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*b = v >> 24;
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*(b+1) = v >> 16;
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*(b+2) = v >> 8;
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*(b+3) = v;
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}
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#endif
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|
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STATIC_INLINE void do_put_mem_byte(uae_u8 *_GCCRES_ a, uae_u8 v)
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{
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*a = v;
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}
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#define call_mem_get_func(func, addr) ((*func)(addr))
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#define call_mem_put_func(func, addr, v) ((*func)(addr, v))
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|
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#undef MD_HAVE_MEM_1_FUNCS
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#define ALIGN_POINTER_TO32(p) ((~(unsigned long)(p)) & 3)
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|
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#endif
|
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131
src/machdep/md-fpp.h
Normal file
131
src/machdep/md-fpp.h
Normal file
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@ -0,0 +1,131 @@
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/*
|
||||
* UAE - The Un*x Amiga Emulator
|
||||
*
|
||||
* MC68881 emulation
|
||||
* Support functions for IEEE 754-compatible host CPUs.
|
||||
* These functions use a GCC extension (type punning through unions) and
|
||||
* should only be compiled with compilers that support this.
|
||||
*
|
||||
* Copyright 1999 Sam Jordan
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||||
* Copyright 2007 Richard Drummond
|
||||
*/
|
||||
|
||||
#define FPCR_ROUNDING_MODE 0x00000030
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#define FPCR_ROUND_NEAR 0x00000000
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||||
#define FPCR_ROUND_ZERO 0x00000010
|
||||
#define FPCR_ROUND_MINF 0x00000020
|
||||
#define FPCR_ROUND_PINF 0x00000030
|
||||
|
||||
#define FPCR_ROUNDING_PRECISION 0x000000c0
|
||||
#define FPCR_PRECISION_SINGLE 0x00000040
|
||||
#define FPCR_PRECISION_DOUBLE 0x00000080
|
||||
#define FPCR_PRECISION_EXTENDED 0x00000000
|
||||
|
||||
STATIC_INLINE void exten_zeronormalize(uae_u32 *pwrd1, uae_u32 *pwrd2, uae_u32 *pwrd3)
|
||||
{
|
||||
uae_u32 wrd1 = *pwrd1;
|
||||
uae_u32 wrd2 = *pwrd2;
|
||||
uae_u32 wrd3 = *pwrd3;
|
||||
int exp = (wrd1 >> 16) & 0x7fff;
|
||||
// Force zero if mantissa is zero but exponent is non-zero
|
||||
// M68k FPU automatically convert them to plain zeros.
|
||||
// x86 FPU considers them invalid values
|
||||
if (exp != 0 && exp != 0x7fff && !wrd2 && !wrd3) {
|
||||
*pwrd1 = (wrd1 & 0x80000000);
|
||||
}
|
||||
}
|
||||
|
||||
STATIC_INLINE double to_single (uae_u32 value)
|
||||
{
|
||||
union {
|
||||
float f;
|
||||
uae_u32 u;
|
||||
} val;
|
||||
|
||||
val.u = value;
|
||||
return val.f;
|
||||
}
|
||||
|
||||
STATIC_INLINE uae_u32 from_single (double src)
|
||||
{
|
||||
union {
|
||||
float f;
|
||||
uae_u32 u;
|
||||
} val;
|
||||
|
||||
val.f = (float) src;
|
||||
return val.u;
|
||||
}
|
||||
|
||||
STATIC_INLINE double to_double (uae_u32 wrd1, uae_u32 wrd2)
|
||||
{
|
||||
union {
|
||||
double d;
|
||||
uae_u32 u[2];
|
||||
} val;
|
||||
|
||||
val.u[0] = wrd2; // little endian
|
||||
val.u[1] = wrd1;
|
||||
return val.d;
|
||||
}
|
||||
|
||||
STATIC_INLINE void from_double (double src, uae_u32 * wrd1, uae_u32 * wrd2)
|
||||
{
|
||||
uae_u32 *longarray = (uae_u32 *)&src;
|
||||
|
||||
*wrd1 = longarray[1]; // little endian
|
||||
*wrd2 = longarray[0];
|
||||
}
|
||||
|
||||
static const double twoto32 = 4294967296.0;
|
||||
STATIC_INLINE void to_exten(fpdata *fpd, uae_u32 wrd1, uae_u32 wrd2, uae_u32 wrd3)
|
||||
{
|
||||
double frac;
|
||||
|
||||
exten_zeronormalize(&wrd1, &wrd2, &wrd3);
|
||||
if ((wrd1 & 0x7fff0000) == 0 && wrd2 == 0 && wrd3 == 0) {
|
||||
fpd->fp = (wrd1 & 0x80000000) ? -0.0 : +0.0;
|
||||
return;
|
||||
}
|
||||
frac = ((double)wrd2 + ((double)wrd3 / twoto32)) / 2147483648.0;
|
||||
if (wrd1 & 0x80000000)
|
||||
frac = -frac;
|
||||
fpd->fp = ldexp (frac, ((wrd1 >> 16) & 0x7fff) - 16383);
|
||||
}
|
||||
|
||||
STATIC_INLINE void from_exten(fpdata *fpd, uae_u32 * wrd1, uae_u32 * wrd2, uae_u32 * wrd3)
|
||||
{
|
||||
int expon;
|
||||
double frac;
|
||||
fptype v;
|
||||
|
||||
v = fpd->fp;
|
||||
if (v == 0.0) {
|
||||
*wrd1 = signbit(v) ? 0x80000000 : 0;
|
||||
*wrd2 = 0;
|
||||
*wrd3 = 0;
|
||||
return;
|
||||
}
|
||||
if (v < 0) {
|
||||
*wrd1 = 0x80000000;
|
||||
v = -v;
|
||||
} else {
|
||||
*wrd1 = 0;
|
||||
}
|
||||
frac = frexp (v, &expon);
|
||||
frac += 0.5 / (twoto32 * twoto32);
|
||||
if (frac >= 1.0) {
|
||||
frac /= 2.0;
|
||||
expon++;
|
||||
}
|
||||
*wrd1 |= (((expon + 16383 - 1) & 0x7fff) << 16);
|
||||
*wrd2 = (uae_u32) (frac * twoto32);
|
||||
*wrd3 = (uae_u32) ((frac * twoto32 - *wrd2) * twoto32);
|
||||
}
|
||||
|
||||
#define HAVE_from_double
|
||||
#define HAVE_to_double
|
||||
#define HAVE_from_exten
|
||||
#define HAVE_to_exten
|
||||
#define HAVE_from_single
|
||||
#define HAVE_to_single
|
||||
41
src/machdep/rpt.h
Normal file
41
src/machdep/rpt.h
Normal file
|
|
@ -0,0 +1,41 @@
|
|||
/*
|
||||
* UAE - The Un*x Amiga Emulator
|
||||
*
|
||||
* Definitions for accessing cycle counters on a given machine, if possible.
|
||||
*
|
||||
* Copyright 1998 Bernd Schmidt
|
||||
*/
|
||||
|
||||
#ifndef _RPT_H_
|
||||
#define _RPT_H_
|
||||
|
||||
typedef unsigned long frame_time_t;
|
||||
|
||||
extern int64_t g_uae_epoch;
|
||||
|
||||
/* Returns elapsed time in microseconds since start of emulator. */
|
||||
static __inline__ frame_time_t read_processor_time (void)
|
||||
{
|
||||
int64_t time;
|
||||
struct timespec ts;
|
||||
|
||||
clock_gettime (CLOCK_MONOTONIC, &ts);
|
||||
|
||||
time = (((int64_t) ts.tv_sec) * 1000000) + (ts.tv_nsec / 1000);
|
||||
return time - g_uae_epoch;
|
||||
}
|
||||
|
||||
|
||||
static __inline__ int64_t read_processor_time_ns (void)
|
||||
{
|
||||
int64_t time;
|
||||
struct timespec ts;
|
||||
|
||||
clock_gettime (CLOCK_MONOTONIC, &ts);
|
||||
|
||||
time = (((int64_t) ts.tv_sec) * 1000000 * 1000) + (ts.tv_nsec);
|
||||
return time;
|
||||
}
|
||||
|
||||
#endif /* _RPT_H_ */
|
||||
|
||||
35
src/machdep/support.cpp
Normal file
35
src/machdep/support.cpp
Normal file
|
|
@ -0,0 +1,35 @@
|
|||
#include "config.h"
|
||||
#include "sysconfig.h"
|
||||
|
||||
#include <stdlib.h>
|
||||
#include <stdarg.h>
|
||||
#include <signal.h>
|
||||
|
||||
#include "sysdeps.h"
|
||||
#include "options.h"
|
||||
#include "memory.h"
|
||||
#include "newcpu.h"
|
||||
#include "custom.h"
|
||||
|
||||
extern int screen_is_picasso;
|
||||
|
||||
int64_t g_uae_epoch = 0;
|
||||
|
||||
|
||||
int machdep_init (void)
|
||||
{
|
||||
picasso_requested_on = 0;
|
||||
picasso_on = 0;
|
||||
screen_is_picasso = 0;
|
||||
|
||||
// Initialize timebase
|
||||
g_uae_epoch = read_processor_time();
|
||||
syncbase = 1000000; // Microseconds
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
||||
void machdep_free (void)
|
||||
{
|
||||
}
|
||||
Loading…
Add table
Add a link
Reference in a new issue