Minor Custom improvements
Enabled custom_line and magic_sprite_mask
This commit is contained in:
Dimitris Panokostas
parent
2af3b99e24
commit
35df876edf
3 changed files with 137 additions and 40 deletions
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@ -58,9 +58,9 @@ static uaecptr blit_waitpc;
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static int blit_maxcyclecounter, blit_slowdown, blit_totalcyclecounter;
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static int blit_startcycles, blit_misscyclecounter;
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#ifdef CPUEMU_13
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//#ifdef CPUEMU_13
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extern uae_u8 cycle_line[256];
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#endif
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//#endif
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static long blit_firstline_cycles;
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static long blit_first_cycle;
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@ -313,6 +313,18 @@ int blitter_channel_state (void)
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return channel_state (blit_cyclecounter);
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}
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STATIC_INLINE int canblit(int hpos)
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{
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if (!dmaen(DMA_BLITTER))
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return -1;
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if (is_bitplane_dma(hpos))
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return 0;
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if (cycle_line[hpos] & CYCLE_MASK) {
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return 0;
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}
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return 1;
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}
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static void reset_channel_mods (void)
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{
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if (bltptxpos < 0)
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@ -877,7 +889,20 @@ static void blitter_force_finish(void)
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*/
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odmacon = dmacon;
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dmacon |= DMA_MASTER | DMA_BLITTER;
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actually_do_blit();
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if (blitter_cycle_exact && !immediate_blits) {
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int rounds = 10000;
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while (bltstate != BLT_done && rounds > 0) {
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memset(cycle_line, 0, sizeof cycle_line);
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decide_blitter(-1);
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rounds--;
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}
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if (rounds == 0)
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write_log(_T("blitter froze!?\n"));
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blit_startcycles = 0;
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}
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else {
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actually_do_blit();
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}
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blitter_done(current_hpos());
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dmacon = odmacon;
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}
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145
src/custom.cpp
145
src/custom.cpp
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@ -45,6 +45,10 @@
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#define SPRBORDER 0
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#ifdef AMIBERRY
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int debug_sprite_mask = 0xff;
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#endif
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STATIC_INLINE bool nocustom (void)
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{
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struct amigadisplay *ad = &adisplays;
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@ -221,7 +225,7 @@ static bool sprite_ignoreverticaluntilnextline;
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uaecptr sprite_0;
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int sprite_0_width, sprite_0_height, sprite_0_doubled;
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uae_u32 sprite_0_colors[4];
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//static uae_u8 magic_sprite_mask = 0xff;
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static uae_u8 magic_sprite_mask = 0xff;
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static int sprite_vblank_endline = VBLANK_SPRITE_PAL;
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@ -230,9 +234,9 @@ static int sprite_width, sprres;
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static int sprite_sprctlmask;
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int sprite_buffer_res;
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#ifdef CPUEMU_13
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//#ifdef CPUEMU_13
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uae_u8 cycle_line[256 + 1];
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#endif
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//#endif
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static bool bpl1dat_written, bpl1dat_written_at_least_once;
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static bool bpldmawasactive;
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@ -458,7 +462,7 @@ STATIC_INLINE int ecsshres(void)
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STATIC_INLINE int nodraw(void)
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{
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struct amigadisplay *ad = &adisplays;
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return ad->framecnt != 0;
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return !currprefs.cpu_memory_cycle_exact && ad->framecnt != 0;
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}
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static int doflickerfix (void)
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@ -495,6 +499,37 @@ STATIC_INLINE void setclr (uae_u16 *p, uae_u16 val)
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*p &= ~val;
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}
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STATIC_INLINE void alloc_cycle (int hpos, int type)
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{
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//#ifdef CPUEMU_13
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cycle_line[hpos] = type;
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//#endif
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}
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STATIC_INLINE void alloc_cycle_maybe (int hpos, int type)
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{
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if ((cycle_line[hpos] & CYCLE_MASK) == 0)
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alloc_cycle (hpos, type);
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}
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void alloc_cycle_ext (int hpos, int type)
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{
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alloc_cycle (hpos, type);
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}
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void alloc_cycle_blitter (int hpos, uaecptr *ptr, int chnum)
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{
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if (cycle_line[hpos] & CYCLE_COPPER_SPECIAL) {
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if ((currprefs.cs_hacks & 1) && currprefs.cpu_model == 68000) {
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uaecptr srcptr = cop_state.strobe == 1 ? cop1lc : cop2lc;
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//if (currprefs.cpu_model == 68000 && currprefs.cpu_cycle_exact && currprefs.blitter_cycle_exact) {
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// batman group / batman vuelve triggers this incorrectly. More testing needed.
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*ptr = srcptr;
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//activate_debugger();
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}
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}
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alloc_cycle (hpos, CYCLE_BLITTER);
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}
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static int expand_sprres(uae_u16 con0, uae_u16 con3)
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{
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int res;
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@ -1028,7 +1063,21 @@ STATIC_INLINE int isocs7planes (void)
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return !(currprefs.chipset_mask & CSMASK_AGA) && bplcon0_res == 0 && bplcon0_planes == 7;
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}
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STATIC_INLINE int is_bitplane_dma (int hpos)
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int is_bitplane_dma(int hpos)
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{
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if (hpos < bpl_hstart || fetch_state == fetch_not_started || plf_state == plf_wait) {
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if (bitplane_overrun && hpos < bitplane_overrun_hpos) {
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return curr_diagram[(hpos - bitplane_overrun_cycle_diagram_shift) & fetchstart_mask];
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}
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return 0;
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}
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if ((plf_state >= plf_end && hpos >= thisline_decision.plfright)
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|| hpos >= estimated_last_fetch_cycle)
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return 0;
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return curr_diagram[(hpos - cycle_diagram_shift) & fetchstart_mask];
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}
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STATIC_INLINE int is_bitplane_dma_inline(int hpos)
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{
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if (hpos < bpl_hstart || fetch_state == fetch_not_started || plf_state == plf_wait) {
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if (bitplane_overrun && hpos < bitplane_overrun_hpos) {
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@ -1162,10 +1211,8 @@ static void setup_fmodes (int hpos)
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thisline_decision.nr_planes = bplcon0_planes;
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}
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#ifdef CPUEMU_13
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if (is_bitplane_dma (hpos - 1))
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cycle_line[hpos - 1] = 1;
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#endif
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curr_diagram = cycle_diagram_table[fetchmode][bplcon0_res][bplcon0_planes_limit];
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estimate_last_fetch_cycle (hpos);
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bpldmasetuphpos = -1;
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@ -3789,6 +3836,9 @@ static void decide_sprites(int hpos, bool usepointx, bool quick)
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if (xpos < 0)
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continue;
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if (!((debug_sprite_mask & magic_sprite_mask) & (1 << i)))
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continue;
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if (! spr[i].armed)
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continue;
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@ -4308,6 +4358,9 @@ void compute_framesync(void)
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v = cr->rate;
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if (v > 0) {
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changed_prefs.chipset_refreshrate = currprefs.chipset_refreshrate = v;
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cfgfile_parse_lines (&changed_prefs, cr->commands, -1);
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if (cr->commands[0])
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write_log (_T("CMD2: '%s'\n"), cr->commands);
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}
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}
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else {
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@ -4640,6 +4693,11 @@ static void init_hz (bool checkvposw)
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compute_framesync ();
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//devices_syncchange();
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#ifdef PICASSO96
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init_hz_p96();
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#endif
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//if (vblank_hz != ovblank)
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// updatedisplayarea();
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inputdevice_tablet_strobe ();
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}
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@ -6070,7 +6128,7 @@ static void SPRxDATB_1(uae_u16 v, int num, int hpos)
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// cycle is DMA fetch: sprite's first 32 pixels get replaced with bitplane data.
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static void sprite_get_bpl_data(int hpos, struct sprite *s, uae_u16 *dat)
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{
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int nr = is_bitplane_dma(hpos + 1);
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int nr = is_bitplane_dma_inline(hpos + 1);
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uae_u32 v = (fmode & 3) ? fetched_aga[nr] : fetched_aga_spr[nr];
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dat[0] = v >> 16;
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dat[1] = uae_u16(v);
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@ -6100,7 +6158,7 @@ static void SPRxDATA (int hpos, uae_u16 v, int num)
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// - first 16 pixel part: previous chipset bus data
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// - following 16 pixel parts: written data
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if (fmode & 8) {
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if ((fmode & 4) && is_bitplane_dma(hpos - 1)) {
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if ((fmode & 4) && is_bitplane_dma_inline(hpos - 1)) {
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sprite_get_bpl_data(hpos, s, &s->data[0]);
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} else {
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s->data[0] = last_custom_value2;
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@ -6114,7 +6172,7 @@ static void SPRxDATB (int hpos, uae_u16 v, int num)
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SPRxDATB_1(v, num, hpos);
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// See above
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if (fmode & 8) {
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if ((fmode & 4) && is_bitplane_dma(hpos - 1)) {
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if ((fmode & 4) && is_bitplane_dma_inline(hpos - 1)) {
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sprite_get_bpl_data(hpos, s, &s->datb[0]);
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} else {
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s->datb[0] = last_custom_value2;
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@ -6350,7 +6408,7 @@ STATIC_INLINE int copper_cant_read(int hpos)
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if ((hpos == maxhpos - 3) && (maxhpos & 1)) {
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return -1;
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}
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return is_bitplane_dma(hpos);
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return is_bitplane_dma_inline(hpos);
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}
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#ifdef AMIBERRY
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@ -6706,6 +6764,7 @@ static void update_copper (int until_hpos)
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// If Blitter uses this cycle = Copper's PC gets copied to blitter DMA pointer..
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if (copper_cant_read (old_hpos))
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continue;
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cycle_line[old_hpos] |= CYCLE_COPPER_SPECIAL;
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cop_state.state = COP_read1;
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// Next cycle finally reads from new pointer
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if (cop_state.strobe == 1)
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@ -7041,12 +7100,12 @@ static void cursorsprite (void)
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sprite_0_colors[3] = xcolors[current_colors.color_regs_ecs[19]];
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}
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sprite_0_width = sprite_width;
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//if (currprefs.input_tablet && (currprefs.input_mouse_untrap & MOUSEUNTRAP_MAGIC)) {
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// if (currprefs.input_magic_mouse_cursor == MAGICMOUSE_HOST_ONLY && mousehack_alive())
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// magic_sprite_mask &= ~1;
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// else
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// magic_sprite_mask |= 1;
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//}
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if (currprefs.input_tablet && (currprefs.input_mouse_untrap & MOUSEUNTRAP_MAGIC)) {
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if (currprefs.input_magic_mouse_cursor == MAGICMOUSE_HOST_ONLY && mousehack_alive ())
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magic_sprite_mask &= ~1;
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else
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magic_sprite_mask |= 1;
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}
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}
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static uae_u16 sprite_fetch(struct sprite *s, uaecptr pt, bool dma, int hpos, int cycle, int mode)
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@ -7492,12 +7551,26 @@ static bool framewait(void)
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int vstb = vsynctimebase;
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if (currprefs.m68k_speed < 0) {
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if (currprefs.m68k_speed < 0 && !cpu_sleepmode && !currprefs.cpu_memory_cycle_exact) {
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if (!frame_rendered && !ad->picasso_on)
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frame_rendered = render_screen(false);
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curr_time = read_processor_time();
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if (currprefs.m68k_speed_throttle) {
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// this delay can safely overshoot frame time by 1-2 ms, following code will compensate for it.
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for (;;) {
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curr_time = read_processor_time ();
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if ((int)vsyncwaittime - (int)curr_time <= 0 || (int)vsyncwaittime - (int)curr_time > 2 * vsynctimebase)
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break;
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//rtg_vsynccheck ();
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if (cpu_sleep_millis(1) < 0) {
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curr_time = read_processor_time();
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break;
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}
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}
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} else {
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curr_time = read_processor_time ();
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}
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int max;
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int adjust = 0;
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@ -7629,8 +7702,7 @@ static void vsync_handler_pre (void)
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if (regs.stopped) {
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if (cpu_last_stop_vpos >= 0) {
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cpu_stopped_lines += maxvpos - cpu_last_stop_vpos;
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}
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else {
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} else {
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cpu_stopped_lines = 0;
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}
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}
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@ -7646,12 +7718,10 @@ static void vsync_handler_pre (void)
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//write_log(_T("sleep\n"));
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}
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}
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}
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else {
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} else {
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reset_cpu_idle();
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}
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}
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else {
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} else {
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reset_cpu_idle();
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}
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}
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@ -8151,11 +8221,11 @@ STATIC_INLINE bool is_last_line (void)
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static void hsync_handler_post (bool onvsync)
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{
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last_copper_hpos = 0;
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#ifdef CPUEMU_13
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//#ifdef CPUEMU_13
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if (currprefs.cpu_memory_cycle_exact || currprefs.blitter_cycle_exact) {
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memset (cycle_line, 0, sizeof cycle_line);
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}
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#endif
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//#endif
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// genlock active:
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// vertical: interlaced = toggles every other field, non-interlaced = both fields (normal)
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@ -8322,9 +8392,7 @@ static void hsync_handler_post (bool onvsync)
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is_syncline_end = read_processor_time() + vsynctimebase; /* far enough in future, we never wait that long */
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is_syncline = -12;
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}
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}
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else {
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} else {
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static int linecounter;
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/* end of scanline, run cpu emulation as long as we still have time */
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vsyncmintime += vsynctimeperline;
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@ -8351,8 +8419,8 @@ static void hsync_handler_post (bool onvsync)
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}
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}
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}
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}
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else if (!currprefs.cpu_thread) {
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} else if (!currprefs.cpu_thread) {
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// the rest
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static int nextwaitvpos;
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@ -8993,7 +9061,7 @@ writeonly:
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v = last_custom_value1;
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SET_LINE_CYCLEBASED;
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if (!noput) {
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int bmdma;
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int r, c, bmdma;
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uae_u16 l;
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if (currprefs.chipset_mask & CSMASK_AGA) {
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@ -9015,15 +9083,18 @@ writeonly:
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// - if last cycle was DMA cycle: DMA cycle data
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// - if last cycle was not DMA cycle: FFFF or some ANDed old data.
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//
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c = cycle_line[hpos] & CYCLE_MASK;
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bmdma = is_bitplane_dma(hpos);
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if (currprefs.chipset_mask & CSMASK_AGA) {
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if (bmdma) {
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if (bmdma || (c > CYCLE_REFRESH && c < CYCLE_CPU)) {
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v = last_custom_value1;
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} else if (c == CYCLE_CPU) {
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v = regs.db;
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} else {
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v = last_custom_value1 >> ((addr & 2) ? 0 : 16);
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}
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} else {
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if (bmdma) {
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if (bmdma || (c > CYCLE_REFRESH && c < CYCLE_CPU)) {
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v = last_custom_value1;
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} else {
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// refresh checked because refresh cycles do not always
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@ -9042,7 +9113,7 @@ static uae_u32 custom_wget2(uaecptr addr, bool byte)
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uae_u32 v;
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int hpos = current_hpos ();
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sync_copper_with_cpu (hpos, 1, addr);
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sync_copper_with_cpu (hpos, 1, addr);
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v = custom_wget_1 (hpos, addr, 0);
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#ifdef ACTION_REPLAY
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#ifdef ACTION_REPLAY_COMMON
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@ -9455,7 +9526,7 @@ uae_u8 *restore_custom (uae_u8 *src)
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ddfstop = RW; /* 094 DDFSTOP */
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dmacon = RW & ~(0x2000|0x4000); /* 096 DMACON */
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CLXCON (RW); /* 098 CLXCON */
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intena = RW; /* 09A INTENA */
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intena = RW; /* 09A INTENA */
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intreq = RW; /* 09C INTREQ */
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adkcon = RW; /* 09E ADKCON */
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for (i = 0; i < 8; i++)
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@ -241,6 +241,7 @@ extern int current_maxvpos (void);
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extern struct chipset_refresh *get_chipset_refresh(struct uae_prefs*);
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extern void compute_framesync(void);
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//extern void getsyncregisters(uae_u16 *phsstrt, uae_u16 *phsstop, uae_u16 *pvsstrt, uae_u16 *pvsstop);
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int is_bitplane_dma(int hpos);
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void custom_cpuchange(void);
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struct custom_store
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