Formatting cleanup
This commit is contained in:
Dimitris Panokostas
parent
ec06c1ecaa
commit
3e214e6ed7
2 changed files with 167 additions and 147 deletions
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@ -107,16 +107,16 @@ STATIC_INLINE void set_cycles (unsigned long int x)
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eventtab[ev_hsync].oldcycles = x;
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}
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STATIC_INLINE int current_hpos (void)
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STATIC_INLINE int current_hpos(void)
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{
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int hp = (get_cycles () - eventtab[ev_hsync].oldcycles) / CYCLE_UNIT;
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return hp;
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const int hp = (get_cycles() - eventtab[ev_hsync].oldcycles) / CYCLE_UNIT;
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return hp;
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}
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STATIC_INLINE bool cycles_in_range (unsigned long endcycles)
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{
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signed long c = get_cycles ();
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return (signed long)endcycles - c > 0;
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const signed long c = get_cycles ();
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return static_cast<signed long>(endcycles) - c > 0;
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}
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extern void MISC_handler (void);
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@ -125,7 +125,7 @@ extern void event2_newevent_x_replace(evt t, uae_u32 data, evfunc2 func);
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STATIC_INLINE void event2_newevent_x (int no, evt t, uae_u32 data, evfunc2 func)
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{
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if (((int)t) <= 0) {
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if (static_cast<int>(t) <= 0) {
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func (data);
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return;
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}
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@ -143,7 +143,7 @@ STATIC_INLINE void event2_newevent2 (evt t, uae_u32 data, evfunc2 func)
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STATIC_INLINE void event2_remevent (int no)
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{
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eventtab2[no].active = 0;
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eventtab2[no].active = false;
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}
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#endif /* UAE_EVENTS_H */
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@ -1,4 +1,4 @@
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/*
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/*
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* UAE - The Un*x Amiga Emulator
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*
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* MC68000 emulation
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@ -20,12 +20,13 @@ extern int movem_index1[256];
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extern int movem_index2[256];
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extern int movem_next[256];
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typedef uae_u32 REGPARAM3 cpuop_func (uae_u32) REGPARAM;
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typedef void REGPARAM3 cpuop_func_ce (uae_u32) REGPARAM;
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typedef uae_u32 REGPARAM3 cpuop_func(uae_u32) REGPARAM;
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typedef void REGPARAM3 cpuop_func_ce(uae_u32) REGPARAM;
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struct cputbl {
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cpuop_func *handler;
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uae_u16 opcode;
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struct cputbl
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{
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cpuop_func* handler;
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uae_u16 opcode;
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uae_s8 length;
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uae_s8 disp020[2];
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uae_u8 branch;
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@ -34,7 +35,7 @@ struct cputbl {
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#ifdef JIT
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#define MIN_JIT_CACHE 128
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#define MAX_JIT_CACHE 16384
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typedef uae_u32 REGPARAM3 compop_func (uae_u32) REGPARAM;
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typedef uae_u32 REGPARAM3 compop_func(uae_u32) REGPARAM;
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#define COMP_OPCODE_ISJUMP 0x0001
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#define COMP_OPCODE_LONG_OPCODE 0x0002
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@ -43,17 +44,18 @@ typedef uae_u32 REGPARAM3 compop_func (uae_u32) REGPARAM;
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#define COMP_OPCODE_ISCJUMP 0x0010
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#define COMP_OPCODE_USES_FPU 0x0020
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struct comptbl {
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compop_func *handler;
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uae_u32 specific;
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uae_u32 opcode;
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struct comptbl
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{
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compop_func* handler;
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uae_u32 specific;
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uae_u32 opcode;
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};
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#else
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#define MIN_JIT_CACHE 0
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#define MAX_JIT_CACHE 0
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#endif
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extern uae_u32 REGPARAM3 op_illg (uae_u32) REGPARAM;
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extern uae_u32 REGPARAM3 op_illg(uae_u32) REGPARAM;
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typedef uae_u8 flagtype;
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@ -64,9 +66,10 @@ typedef double fptype;
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struct mmufixup
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{
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int reg;
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uae_u32 value;
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int reg;
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uae_u32 value;
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};
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extern struct mmufixup mmufixup[1];
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typedef struct
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@ -81,37 +84,37 @@ typedef struct
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struct regstruct
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{
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uae_u32 regs[16];
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struct flag_struct ccrflags;
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uae_u32 regs[16];
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struct flag_struct ccrflags;
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uae_u32 pc;
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uae_u8 *pc_p;
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uae_u8 *pc_oldp;
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uae_u32 pc;
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uae_u8* pc_p;
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uae_u8* pc_oldp;
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uae_u16 opcode;
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uae_u32 instruction_pc;
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uae_u16 irc, ir, db;
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volatile uae_atomic spcflags;
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uaecptr usp, isp, msp;
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uae_u16 sr;
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flagtype t1;
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flagtype t0;
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flagtype s;
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flagtype m;
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flagtype x;
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flagtype stopped;
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int halted;
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int intmask;
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uae_u32 instruction_pc;
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uae_u32 vbr,sfc,dfc;
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uae_u16 irc, ir, db;
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volatile uae_atomic spcflags;
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uaecptr usp, isp, msp;
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uae_u16 sr;
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flagtype t1;
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flagtype t0;
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flagtype s;
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flagtype m;
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flagtype x;
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flagtype stopped;
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int halted;
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int intmask;
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uae_u32 vbr, sfc, dfc;
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#ifdef FPUEMU
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fpdata fp[8];
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#ifdef JIT
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fpdata fp_result;
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#endif
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uae_u32 fpcr,fpsr, fpiar;
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uae_u32 fpcr, fpsr, fpiar;
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uae_u32 fpu_state;
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uae_u32 fpu_exp_state;
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uaecptr fp_ea;
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@ -121,27 +124,27 @@ struct regstruct
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bool fp_exception;
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bool fp_branch;
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#endif
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uae_u32 cacr, caar;
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uae_u32 itt0, itt1, dtt0, dtt1;
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uae_u32 tcr, mmusr, urp, srp, buscr;
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uae_u32 cacr, caar;
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uae_u32 itt0, itt1, dtt0, dtt1;
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uae_u32 tcr, mmusr, urp, srp, buscr;
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uae_u32 pcr;
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uae_u32 address_space_mask;
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uae_u32 pcr;
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uae_u32 address_space_mask;
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uae_s32 pissoff;
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uae_s32 pissoff;
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uae_u8* natmem_offset;
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#ifdef JIT
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/* store scratch regs also in this struct to avoid load of mem pointer */
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uae_u32 scratchregs[VREGS - S1];
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fpu_register scratchfregs[VFREGS - 8];
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uae_u32 jit_exception;
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/* pointer to real arrays/structs for easier access in JIT */
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uae_u32 *raw_cputbl_count;
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uintptr mem_banks;
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uintptr cache_tags;
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#endif
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/* store scratch regs also in this struct to avoid load of mem pointer */
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uae_u32 scratchregs[VREGS - S1];
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fpu_register scratchfregs[VFREGS - 8];
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uae_u32 jit_exception;
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/* pointer to real arrays/structs for easier access in JIT */
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uae_u32* raw_cputbl_count;
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uintptr mem_banks;
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uintptr cache_tags;
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#endif
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};
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extern struct regstruct regs;
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@ -152,7 +155,7 @@ extern struct regstruct regs;
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STATIC_INLINE uae_u32 munge24(uae_u32 x)
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{
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return x & regs.address_space_mask;
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return x & regs.address_space_mask;
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}
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extern int cpu_cycles;
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@ -162,13 +165,14 @@ STATIC_INLINE void set_special_exter(uae_u32 x)
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{
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atomic_or(®s.spcflags, x);
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}
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STATIC_INLINE void set_special (uae_u32 x)
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STATIC_INLINE void set_special(uae_u32 x)
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{
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atomic_or(®s.spcflags, x);
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cycles_do_special();
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cycles_do_special();
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}
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STATIC_INLINE void unset_special (uae_u32 x)
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STATIC_INLINE void unset_special(uae_u32 x)
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{
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atomic_and(®s.spcflags, ~x);
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}
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@ -176,12 +180,12 @@ STATIC_INLINE void unset_special (uae_u32 x)
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#define m68k_dreg(r,num) ((r).regs[(num)])
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#define m68k_areg(r,num) (((r).regs + 8)[(num)])
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extern uae_u32(*x_get_byte)(uaecptr addr);
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extern uae_u32(*x_get_word)(uaecptr addr);
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extern uae_u32(*x_get_long)(uaecptr addr);
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extern void(*x_put_byte)(uaecptr addr, uae_u32 v);
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extern void(*x_put_word)(uaecptr addr, uae_u32 v);
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extern void(*x_put_long)(uaecptr addr, uae_u32 v);
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extern uae_u32 (*x_get_byte)(uaecptr addr);
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extern uae_u32 (*x_get_word)(uaecptr addr);
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extern uae_u32 (*x_get_long)(uaecptr addr);
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extern void (*x_put_byte)(uaecptr addr, uae_u32 v);
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extern void (*x_put_word)(uaecptr addr, uae_u32 v);
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extern void (*x_put_long)(uaecptr addr, uae_u32 v);
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#define x_cp_get_byte x_get_byte
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#define x_cp_get_word x_get_word
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@ -196,20 +200,23 @@ extern void(*x_put_long)(uaecptr addr, uae_u32 v);
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/* direct (regs.pc_p) access */
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STATIC_INLINE void m68k_setpc (uaecptr newpc)
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STATIC_INLINE void m68k_setpc(uaecptr newpc)
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{
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regs.pc_p = regs.pc_oldp = get_real_address (newpc);
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regs.instruction_pc = regs.pc = newpc;
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regs.pc_p = regs.pc_oldp = get_real_address(newpc);
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regs.instruction_pc = regs.pc = newpc;
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}
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STATIC_INLINE void m68k_setpc_j(uaecptr newpc)
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{
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regs.pc_p = regs.pc_oldp = get_real_address(newpc);
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regs.pc = newpc;
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}
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STATIC_INLINE uaecptr m68k_getpc (void)
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STATIC_INLINE uaecptr m68k_getpc(void)
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{
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return (uaecptr)(regs.pc + ((uae_u8*)regs.pc_p - (uae_u8*)regs.pc_oldp));
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return static_cast<uaecptr>(regs.pc + (static_cast<uae_u8*>(regs.pc_p) - static_cast<uae_u8*>(regs.pc_oldp)));
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}
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#define M68K_GETPC m68k_getpc()
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STATIC_INLINE void m68k_incpc(int o)
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{
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@ -218,40 +225,45 @@ STATIC_INLINE void m68k_incpc(int o)
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STATIC_INLINE uae_u32 get_dibyte(int o)
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{
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return do_get_mem_byte((uae_u8 *)((regs).pc_p + (o) + 1));
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}
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STATIC_INLINE uae_u32 get_diword(int o)
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{
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return do_get_mem_word((uae_u16 *)((regs).pc_p + (o)));
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}
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STATIC_INLINE uae_u32 get_dilong(int o)
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{
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return do_get_mem_long((uae_u32 *)((regs).pc_p + (o)));
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}
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STATIC_INLINE uae_u32 next_diword (void)
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{
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uae_u32 r = do_get_mem_word((uae_u16 *)((regs).pc_p));
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m68k_incpc (2);
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return r;
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}
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STATIC_INLINE uae_u32 next_dilong (void)
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{
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uae_u32 r = do_get_mem_long((uae_u32 *)((regs).pc_p));
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m68k_incpc (4);
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return r;
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return do_get_mem_byte(static_cast<uae_u8*>((regs).pc_p + (o) + 1));
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}
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STATIC_INLINE void m68k_do_bsr (uaecptr oldpc, uae_s32 offset)
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STATIC_INLINE uae_u32 get_diword(int o)
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{
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m68k_areg(regs, 7) -= 4;
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put_long(m68k_areg(regs, 7), oldpc);
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m68k_incpc (offset);
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return do_get_mem_word((uae_u16*)((regs).pc_p + (o)));
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}
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STATIC_INLINE void m68k_do_rts (void)
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STATIC_INLINE uae_u32 get_dilong(int o)
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{
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uae_u32 newpc = get_long (m68k_areg (regs, 7));
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m68k_setpc (newpc);
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m68k_areg(regs, 7) += 4;
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return do_get_mem_long((uae_u32*)((regs).pc_p + (o)));
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}
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STATIC_INLINE uae_u32 next_diword(void)
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{
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uae_u32 r = do_get_mem_word((uae_u16*)((regs).pc_p));
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m68k_incpc(2);
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return r;
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}
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STATIC_INLINE uae_u32 next_dilong(void)
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{
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uae_u32 r = do_get_mem_long((uae_u32*)((regs).pc_p));
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m68k_incpc(4);
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return r;
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}
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STATIC_INLINE void m68k_do_bsr(uaecptr oldpc, uae_s32 offset)
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{
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m68k_areg(regs, 7) -= 4;
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put_long(m68k_areg(regs, 7), oldpc);
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m68k_incpc(offset);
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}
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STATIC_INLINE void m68k_do_rts(void)
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{
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uae_u32 newpc = get_long(m68k_areg(regs, 7));
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m68k_setpc(newpc);
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m68k_areg(regs, 7) += 4;
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}
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/* indirect (regs.pc) access */
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@ -260,14 +272,17 @@ STATIC_INLINE void m68k_setpci(uaecptr newpc)
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{
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regs.instruction_pc = regs.pc = newpc;
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}
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STATIC_INLINE void m68k_setpci_j(uaecptr newpc)
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{
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regs.pc = newpc;
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}
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STATIC_INLINE uaecptr m68k_getpci(void)
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{
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return regs.pc;
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}
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STATIC_INLINE void m68k_incpci(int o)
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{
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regs.pc += o;
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@ -279,6 +294,7 @@ STATIC_INLINE void m68k_do_bsri(uaecptr oldpc, uae_s32 offset)
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x_put_long(m68k_areg(regs, 7), oldpc);
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m68k_incpci(offset);
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}
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STATIC_INLINE void m68k_do_rtsi(void)
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{
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uae_u32 newpc = x_get_long(m68k_areg(regs, 7));
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@ -298,10 +314,13 @@ STATIC_INLINE void m68k_incpc_normal(int o)
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STATIC_INLINE void m68k_setpc_normal(uaecptr pc)
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{
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if (m68k_pc_indirect > 0) {
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regs.pc_p = regs.pc_oldp = 0;
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if (m68k_pc_indirect > 0)
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{
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regs.pc_p = regs.pc_oldp = nullptr;
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m68k_setpci(pc);
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} else {
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}
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else
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{
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m68k_setpc(pc);
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}
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}
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@ -310,44 +329,45 @@ extern void check_t0_trace(void);
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#define x_do_cycles(c) do_cycles(c)
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extern void m68k_setstopped (void);
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extern void m68k_setstopped(void);
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extern void m68k_resumestopped(void);
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extern void m68k_cancel_idle(void);
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#define get_disp_ea_020(base,idx) _get_disp_ea_020(base)
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extern uae_u32 REGPARAM3 _get_disp_ea_020 (uae_u32 base) REGPARAM;
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extern uae_u32 REGPARAM3 _get_disp_ea_020(uae_u32 base) REGPARAM;
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extern uae_u32 REGPARAM3 get_bitfield (uae_u32 src, uae_u32 bdata[2], uae_s32 offset, int width) REGPARAM;
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extern void REGPARAM3 put_bitfield (uae_u32 dst, uae_u32 bdata[2], uae_u32 val, uae_s32 offset, int width) REGPARAM;
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extern int get_cpu_model (void);
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extern uae_u32 REGPARAM3 get_bitfield(uae_u32 src, uae_u32 bdata[2], uae_s32 offset, int width) REGPARAM;
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extern void REGPARAM3 put_bitfield(uae_u32 dst, uae_u32 bdata[2], uae_u32 val, uae_s32 offset, int width) REGPARAM;
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extern int get_cpu_model(void);
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extern void set_cpu_caches (bool flush);
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extern void set_cpu_caches(bool flush);
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extern void flush_cpu_caches_040(uae_u16 opcode);
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extern void REGPARAM3 MakeSR (void) REGPARAM;
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||||
extern void REGPARAM3 MakeFromSR (void) REGPARAM;
|
||||
extern void REGPARAM3 MakeSR(void) REGPARAM;
|
||||
extern void REGPARAM3 MakeFromSR(void) REGPARAM;
|
||||
extern void REGPARAM3 MakeFromSR_T0(void) REGPARAM;
|
||||
extern void REGPARAM3 Exception (int) REGPARAM;
|
||||
extern void REGPARAM3 Exception(int) REGPARAM;
|
||||
extern void REGPARAM3 Exception_cpu(int) REGPARAM;
|
||||
extern void NMI (void);
|
||||
extern void doint (void);
|
||||
extern void dump_counts (void);
|
||||
extern int m68k_move2c (int, uae_u32 *);
|
||||
extern int m68k_movec2 (int, uae_u32 *);
|
||||
extern void m68k_divl (uae_u32, uae_u32, uae_u16);
|
||||
extern void m68k_mull (uae_u32, uae_u32, uae_u16);
|
||||
extern void init_m68k (void);
|
||||
extern void m68k_go (int);
|
||||
extern void NMI(void);
|
||||
extern void doint(void);
|
||||
extern void dump_counts(void);
|
||||
extern int m68k_move2c(int, uae_u32*);
|
||||
extern int m68k_movec2(int, uae_u32*);
|
||||
extern void m68k_divl(uae_u32, uae_u32, uae_u16);
|
||||
extern void m68k_mull(uae_u32, uae_u32, uae_u16);
|
||||
extern void init_m68k(void);
|
||||
extern void m68k_go(int);
|
||||
extern int getDivu68kCycles(uae_u32 dividend, uae_u16 divisor);
|
||||
extern int getDivs68kCycles(uae_s32 dividend, uae_s16 divisor);
|
||||
extern void divbyzero_special (bool issigned, uae_s32 dst);
|
||||
extern void divbyzero_special(bool issigned, uae_s32 dst);
|
||||
extern void setdivuoverflowflags(uae_u32 dividend, uae_u16 divisor);
|
||||
extern void setdivsoverflowflags(uae_s32 dividend, uae_s16 divisor);
|
||||
extern void setchkundefinedflags(uae_s32 src, uae_s32 dst, int size);
|
||||
extern void setchk2undefinedflags(uae_u32 lower, uae_u32 upper, uae_u32 val, int size);
|
||||
extern void protect_roms (bool);
|
||||
extern void protect_roms(bool);
|
||||
extern void Exception_build_stack_frame_common(uae_u32 oldpc, uae_u32 currpc, int nr);
|
||||
extern void Exception_build_stack_frame(uae_u32 oldpc, uae_u32 currpc, uae_u32 ssw, int nr, int format);
|
||||
extern void Exception_build_68000_address_error_stack_frame(uae_u16 mode, uae_u16 opcode, uaecptr fault_addr, uaecptr pc);
|
||||
extern void Exception_build_68000_address_error_stack_frame(uae_u16 mode, uae_u16 opcode, uaecptr fault_addr,
|
||||
uaecptr pc);
|
||||
extern uae_u32 exception_pc(int nr);
|
||||
|
||||
void ccr_68000_long_move_ae_LZN(uae_s32 src);
|
||||
|
|
@ -358,21 +378,21 @@ void ccr_68000_word_move_ae_normal(uae_s16 src);
|
|||
|
||||
STATIC_INLINE int bitset_count16(uae_u16 data)
|
||||
{
|
||||
unsigned int const MASK1 = 0x5555;
|
||||
unsigned int const MASK2 = 0x3333;
|
||||
unsigned int const MASK4 = 0x0f0f;
|
||||
unsigned int const MASK6 = 0x003f;
|
||||
unsigned int const MASK1 = 0x5555;
|
||||
unsigned int const MASK2 = 0x3333;
|
||||
unsigned int const MASK4 = 0x0f0f;
|
||||
unsigned int const MASK6 = 0x003f;
|
||||
|
||||
unsigned int const w = (data & MASK1) + ((data >> 1) & MASK1);
|
||||
unsigned int const x = (w & MASK2) + ((w >> 2) & MASK2);
|
||||
unsigned int const y = ((x + (x >> 4)) & MASK4);
|
||||
unsigned int const z = (y + (y >> 8)) & MASK6;
|
||||
unsigned int const w = (data & MASK1) + ((data >> 1) & MASK1);
|
||||
unsigned int const x = (w & MASK2) + ((w >> 2) & MASK2);
|
||||
unsigned int const y = ((x + (x >> 4)) & MASK4);
|
||||
unsigned int const z = (y + (y >> 8)) & MASK6;
|
||||
|
||||
return z;
|
||||
return z;
|
||||
}
|
||||
|
||||
extern void mmu_op (uae_u32, uae_u32);
|
||||
extern bool mmu_op30 (uaecptr, uae_u32, uae_u16, uaecptr);
|
||||
extern void mmu_op(uae_u32, uae_u32);
|
||||
extern bool mmu_op30(uaecptr, uae_u32, uae_u16, uaecptr);
|
||||
|
||||
extern void fpuop_arithmetic(uae_u32, uae_u16);
|
||||
extern void fpuop_dbcc(uae_u32, uae_u16);
|
||||
|
|
@ -381,18 +401,18 @@ extern void fpuop_trapcc(uae_u32, uaecptr, uae_u16);
|
|||
extern void fpuop_bcc(uae_u32, uaecptr, uae_u32);
|
||||
extern void fpuop_save(uae_u32);
|
||||
extern void fpuop_restore(uae_u32);
|
||||
extern void fpu_reset (void);
|
||||
extern void fpu_reset(void);
|
||||
|
||||
extern void exception3_read(uae_u32 opcode, uaecptr addr);
|
||||
extern void exception3_write(uae_u32 opcode, uaecptr addr);
|
||||
extern void exception3i (uae_u32 opcode, uaecptr addr);
|
||||
extern void exception3b (uae_u32 opcode, uaecptr addr, bool w, bool i, uaecptr pc);
|
||||
extern void exception2 (uaecptr addr, bool read, int size, uae_u32 fc);
|
||||
extern void cpureset (void);
|
||||
extern void cpu_halt (int id);
|
||||
extern void exception3i(uae_u32 opcode, uaecptr addr);
|
||||
extern void exception3b(uae_u32 opcode, uaecptr addr, bool w, bool i, uaecptr pc);
|
||||
extern void exception2(uaecptr addr, bool read, int size, uae_u32 fc);
|
||||
extern void cpureset(void);
|
||||
extern void cpu_halt(int id);
|
||||
extern int cpu_sleep_millis(int ms);
|
||||
|
||||
extern void fill_prefetch (void);
|
||||
extern void fill_prefetch(void);
|
||||
|
||||
#define CPU_OP_NAME(a) op ## a
|
||||
|
||||
|
|
@ -414,7 +434,7 @@ extern const struct cputbl op_smalltbl_5_ff[];
|
|||
extern const struct cputbl op_smalltbl_45_ff[];
|
||||
extern const struct cputbl op_smalltbl_12_ff[]; // prefetch
|
||||
|
||||
extern cpuop_func *cpufunctbl[65536] ASM_SYM_FOR_FUNC ("cpufunctbl");
|
||||
extern cpuop_func* cpufunctbl[65536] ASM_SYM_FOR_FUNC("cpufunctbl");
|
||||
|
||||
#ifdef JIT
|
||||
extern void flush_icache(int);
|
||||
|
|
@ -424,7 +444,7 @@ extern void compemu_reset(void);
|
|||
#define flush_icache(int) do {} while (0)
|
||||
#define flush_icache_hard(int) do {} while (0)
|
||||
#endif
|
||||
bool check_prefs_changed_comp (bool);
|
||||
bool check_prefs_changed_comp(bool);
|
||||
|
||||
#define CPU_HALT_BUS_ERROR_DOUBLE_FAULT 1
|
||||
#define CPU_HALT_DOUBLE_FAULT 2
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue