Code formatting
Harmonized code formatting for better readability
This commit is contained in:
Dimitris Panokostas
parent
427c08f137
commit
81c0f83641
218 changed files with 333765 additions and 243396 deletions
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@ -2,7 +2,7 @@
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* compiler/codegen_arm.h - IA-32 and AMD64 code generator
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*
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* Copyright (c) 2013 Jens Heitmann of ARAnyM dev team (see AUTHORS)
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*
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*
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* Inspired by Christian Bauer's Basilisk II
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*
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* This file is part of the ARAnyM project which builds a new and powerful
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@ -174,29 +174,31 @@
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/* Branch instructions */
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#ifndef __ANDROID__
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enum {
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_B, _BL, _BLX, _BX, _BXJ
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enum
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{
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_B, _BL, _BLX, _BX, _BXJ
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};
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#endif
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/* Data processing instructions */
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enum {
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_AND = 0,
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_EOR,
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_SUB,
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_RSB,
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_ADD,
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_ADC,
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_SBC,
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_RSC,
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_TST,
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_TEQ,
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_CMP,
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_CMN,
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_ORR,
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_MOV,
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_BIC,
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_MVN
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enum
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{
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_AND = 0,
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_EOR,
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_SUB,
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_RSB,
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_ADD,
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_ADC,
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_SBC,
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_RSC,
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_TST,
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_TEQ,
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_CMP,
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_CMN,
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_ORR,
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_MOV,
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_BIC,
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_MVN
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};
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/* Single instruction Multiple Data (SIMD) instructions */
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127096
src/jit/compemu.cpp
127096
src/jit/compemu.cpp
File diff suppressed because it is too large
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@ -2,7 +2,7 @@
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* compiler/compemu.h - Public interface and definitions
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*
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* Copyright (c) 2001-2004 Milan Jurik of ARAnyM dev team (see AUTHORS)
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*
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*
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* Inspired by Christian Bauer's Basilisk II
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*
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* This file is part of the ARAnyM project which builds a new and powerful
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@ -45,13 +45,15 @@ extern uae_u32 start_pc;
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struct blockinfo_t;
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typedef struct {
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uae_u16* location;
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uae_u8 cycles;
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uae_u8 specmem;
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typedef struct
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{
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uae_u16* location;
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uae_u8 cycles;
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uae_u8 specmem;
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} cpu_history;
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typedef union {
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typedef union
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{
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cpuop_func* handler;
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struct blockinfo_t* bi;
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} cacheline;
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@ -164,39 +166,42 @@ extern void* pushall_call_handler;
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#define UNDEF 4
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#define ISCONST 5
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typedef struct {
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uae_u32* mem;
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uae_u32 val;
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uae_u8 status;
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uae_s8 realreg; /* gb-- realreg can hold -1 */
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uae_u8 realind; /* The index in the holds[] array */
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uae_u8 validsize;
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uae_u8 dirtysize;
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typedef struct
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{
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uae_u32* mem;
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uae_u32 val;
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uae_u8 status;
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uae_s8 realreg; /* gb-- realreg can hold -1 */
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uae_u8 realind; /* The index in the holds[] array */
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uae_u8 validsize;
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uae_u8 dirtysize;
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} reg_status;
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#ifdef USE_JIT_FPU
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typedef struct {
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uae_u32* mem;
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double val;
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uae_u8 status;
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uae_s8 realreg; /* gb-- realreg can hold -1 */
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uae_u8 realind;
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uae_u8 needflush;
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typedef struct
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{
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uae_u32* mem;
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double val;
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uae_u8 status;
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uae_s8 realreg; /* gb-- realreg can hold -1 */
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uae_u8 realind;
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uae_u8 needflush;
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} freg_status;
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#endif
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typedef struct {
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typedef struct
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{
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uae_u8 use_flags;
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uae_u8 set_flags;
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uae_u8 is_addx;
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uae_u8 cflow;
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uae_u8 cflow;
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} op_properties;
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extern op_properties prop[65536];
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STATIC_INLINE int end_block(uae_u16 opcode)
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{
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return (prop[opcode].cflow & fl_end_block);
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return (prop[opcode].cflow & fl_end_block);
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}
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#define PC_P 16
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@ -221,19 +226,21 @@ STATIC_INLINE int end_block(uae_u16 opcode)
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#define FS2 10
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#define FS3 11
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typedef struct {
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uae_u32 touched;
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uae_s8 holds[VREGS];
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uae_u8 nholds;
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uae_u8 locked;
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typedef struct
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{
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uae_u32 touched;
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uae_s8 holds[VREGS];
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uae_u8 nholds;
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uae_u8 locked;
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} n_status;
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#ifdef USE_JIT_FPU
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typedef struct {
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uae_u32 touched;
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uae_s8 holds[VFREGS];
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uae_u8 nholds;
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uae_u8 locked;
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typedef struct
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{
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uae_u32 touched;
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uae_s8 holds[VFREGS];
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uae_u8 nholds;
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uae_u8 locked;
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} fn_status;
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#endif
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@ -247,7 +254,8 @@ typedef struct {
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#define NF_TOMEM 1
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#define NF_HANDLER 2
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typedef struct {
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typedef struct
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{
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/* Integer part */
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reg_status state[VREGS];
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n_status nat[N_REGS];
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@ -261,10 +269,11 @@ typedef struct {
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#endif
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} bigstate;
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typedef struct {
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typedef struct
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{
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/* Integer part */
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uae_s8 virt[VREGS];
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uae_s8 nat[N_REGS];
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uae_s8 virt[VREGS];
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uae_s8 nat[N_REGS];
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} smallstate;
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extern int touchcnt;
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@ -334,21 +343,24 @@ extern void register_branch(uae_u32 not_taken, uae_u32 taken, uae_u8 cond);
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struct blockinfo_t;
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typedef struct dep_t {
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uae_u32* jmp_off;
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struct blockinfo_t* target;
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struct blockinfo_t* source;
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struct dep_t** prev_p;
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struct dep_t* next;
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typedef struct dep_t
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{
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uae_u32* jmp_off;
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struct blockinfo_t* target;
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struct blockinfo_t* source;
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struct dep_t** prev_p;
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struct dep_t* next;
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} dependency;
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typedef struct checksum_info_t {
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uae_u8 *start_p;
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uae_u32 length;
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struct checksum_info_t *next;
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typedef struct checksum_info_t
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{
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uae_u8 *start_p;
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uae_u32 length;
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struct checksum_info_t *next;
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} checksum_info;
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typedef struct blockinfo_t {
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typedef struct blockinfo_t
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{
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uae_s32 count;
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cpuop_func* direct_handler_to_use;
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cpuop_func* handler_to_use;
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@ -386,8 +398,8 @@ typedef struct blockinfo_t {
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smallstate env;
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#ifdef JIT_DEBUG
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/* (gb) size of the compiled block (direct handler) */
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uae_u32 direct_handler_size;
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/* (gb) size of the compiled block (direct handler) */
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uae_u32 direct_handler_size;
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#endif
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} blockinfo;
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@ -1,30 +1,31 @@
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/*
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* UAE - The Un*x Amiga Emulator
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*
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* MC68881 emulation
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*
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* Copyright 1996 Herman ten Brugge
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* Adapted for JIT compilation (c) Bernd Meyer, 2000
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* Modified 2005 Peter Keunecke
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*/
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#include <math.h>
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#include "sysconfig.h"
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#include "sysdeps.h"
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#include "options.h"
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#include "memory.h"
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#include "newcpu.h"
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#include "custom.h"
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#include "ersatz.h"
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#include "compemu.h"
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#if defined(JIT)
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uae_u32 temp_fp[] = {0,0,0}; /* To convert between FP and <EA> */
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/* 128 words, indexed through the low byte of the 68k fpu control word */
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static const uae_u16 x86_fpucw[]={
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/*
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* UAE - The Un*x Amiga Emulator
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*
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* MC68881 emulation
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*
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* Copyright 1996 Herman ten Brugge
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* Adapted for JIT compilation (c) Bernd Meyer, 2000
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* Modified 2005 Peter Keunecke
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*/
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#include <math.h>
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#include "sysconfig.h"
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#include "sysdeps.h"
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#include "options.h"
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#include "include/memory.h"
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#include "newcpu.h"
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#include "custom.h"
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#include "ersatz.h"
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#include "compemu.h"
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#if defined(JIT)
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uae_u32 temp_fp[] = {0,0,0}; /* To convert between FP and <EA> */
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/* 128 words, indexed through the low byte of the 68k fpu control word */
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static const uae_u16 x86_fpucw[]=
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{
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0x137f, 0x137f, 0x137f, 0x137f, 0x137f, 0x137f, 0x137f, 0x137f, /* E-RN */
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0x1f7f, 0x1f7f, 0x1f7f, 0x1f7f, 0x1f7f, 0x1f7f, 0x1f7f, 0x1f7f, /* E-RZ */
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0x177f, 0x177f, 0x177f, 0x177f, 0x177f, 0x177f, 0x177f, 0x177f, /* E-RD */
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@ -45,62 +46,62 @@ static const uae_u16 x86_fpucw[]={
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0x177f, 0x177f, 0x177f, 0x177f, 0x177f, 0x177f, 0x177f, 0x177f, /* ?-RD */
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0x1b7f, 0x1b7f, 0x1b7f, 0x1b7f, 0x1b7f, 0x1b7f, 0x1b7f, 0x1b7f /* ?-RU */
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};
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static const int sz1[8] = { 4, 4, 12, 12, 2, 8, 1, 0 };
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static const int sz2[8] = { 4, 4, 12, 12, 2, 8, 2, 0 };
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/* return the required floating point precision or -1 for failure, 0=E, 1=S, 2=D */
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STATIC_INLINE int comp_fp_get (uae_u32 opcode, uae_u16 extra, int treg)
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{
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printf("comp_fp_get not yet implemented\n");
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return -1;
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}
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/* return of -1 means failure, >=0 means OK */
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STATIC_INLINE int comp_fp_put (uae_u32 opcode, uae_u16 extra)
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{
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printf("comp_fp_put not yet implemented\n");
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return -1;
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}
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/* return -1 for failure, or register number for success */
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STATIC_INLINE int comp_fp_adr (uae_u32 opcode)
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{
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printf("comp_fp_adr not yet implemented\n");
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return -1;
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}
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void comp_fdbcc_opp (uae_u32 opcode, uae_u16 extra)
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{
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printf("comp_fdbcc_opp not yet implemented\n");
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}
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void comp_fscc_opp (uae_u32 opcode, uae_u16 extra)
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{
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printf("comp_fscc_opp not yet implemented\n");
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}
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void comp_ftrapcc_opp (uae_u32 opcode, uaecptr oldpc)
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{
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printf("comp_ftrapcc_opp not yet implemented\n");
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}
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void comp_fbcc_opp (uae_u32 opcode)
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{
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printf("comp_fbcc_opp not yet implemented\n");
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}
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void comp_fsave_opp (uae_u32 opcode)
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{
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printf("comp_fsave_opp not yet implemented\n");
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}
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void comp_frestore_opp (uae_u32 opcode)
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{
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printf("comp_frestore_opp not yet implemented\n");
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}
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void comp_fpp_opp (uae_u32 opcode, uae_u16 extra)
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{
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printf("comp_fpp_opp not yet implemented\n");
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}
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#endif
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static const int sz1[8] = { 4, 4, 12, 12, 2, 8, 1, 0 };
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static const int sz2[8] = { 4, 4, 12, 12, 2, 8, 2, 0 };
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/* return the required floating point precision or -1 for failure, 0=E, 1=S, 2=D */
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STATIC_INLINE int comp_fp_get (uae_u32 opcode, uae_u16 extra, int treg)
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{
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printf("comp_fp_get not yet implemented\n");
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return -1;
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}
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/* return of -1 means failure, >=0 means OK */
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STATIC_INLINE int comp_fp_put (uae_u32 opcode, uae_u16 extra)
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{
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printf("comp_fp_put not yet implemented\n");
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return -1;
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}
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/* return -1 for failure, or register number for success */
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STATIC_INLINE int comp_fp_adr (uae_u32 opcode)
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{
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printf("comp_fp_adr not yet implemented\n");
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return -1;
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}
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void comp_fdbcc_opp (uae_u32 opcode, uae_u16 extra)
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{
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printf("comp_fdbcc_opp not yet implemented\n");
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}
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void comp_fscc_opp (uae_u32 opcode, uae_u16 extra)
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{
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printf("comp_fscc_opp not yet implemented\n");
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}
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void comp_ftrapcc_opp (uae_u32 opcode, uaecptr oldpc)
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{
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printf("comp_ftrapcc_opp not yet implemented\n");
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}
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void comp_fbcc_opp (uae_u32 opcode)
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{
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printf("comp_fbcc_opp not yet implemented\n");
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}
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void comp_fsave_opp (uae_u32 opcode)
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{
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printf("comp_fsave_opp not yet implemented\n");
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}
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void comp_frestore_opp (uae_u32 opcode)
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{
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printf("comp_frestore_opp not yet implemented\n");
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}
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void comp_fpp_opp (uae_u32 opcode, uae_u16 extra)
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{
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printf("comp_fpp_opp not yet implemented\n");
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}
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#endif
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@ -54,339 +54,358 @@
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MIDFUNC(0,live_flags,(void))
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{
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live.flags_on_stack = TRASH;
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live.flags_in_flags = VALID;
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live.flags_are_important = 1;
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live.flags_on_stack = TRASH;
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live.flags_in_flags = VALID;
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live.flags_are_important = 1;
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}
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MENDFUNC(0,live_flags,(void))
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MIDFUNC(0,dont_care_flags,(void))
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{
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live.flags_are_important = 0;
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live.flags_are_important = 0;
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}
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MENDFUNC(0,dont_care_flags,(void))
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MIDFUNC(0,make_flags_live,(void))
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{
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make_flags_live_internal();
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make_flags_live_internal();
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}
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MENDFUNC(0,make_flags_live,(void))
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MIDFUNC(2,mov_l_mi,(IMM d, IMM s))
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{
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raw_mov_l_mi(d, s);
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raw_mov_l_mi(d, s);
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}
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MENDFUNC(2,mov_l_mi,(IMM d, IMM s))
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MIDFUNC(2,shll_l_ri,(RW4 r, IMM i))
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{
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// Only used in calc_disp_ea_020() -> flags not relevant and never modified
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if (!i)
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return;
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if (isconst(r)) {
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live.state[r].val<<=i;
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return;
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}
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// Only used in calc_disp_ea_020() -> flags not relevant and never modified
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if (!i)
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return;
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if (isconst(r))
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{
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live.state[r].val<<=i;
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return;
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}
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r = rmw(r, 4, 4);
|
||||
raw_shll_l_ri(r, i);
|
||||
unlock2(r);
|
||||
r = rmw(r, 4, 4);
|
||||
raw_shll_l_ri(r, i);
|
||||
unlock2(r);
|
||||
}
|
||||
MENDFUNC(2,shll_l_ri,(RW4 r, IMM i))
|
||||
|
||||
MIDFUNC(2,sign_extend_16_rr,(W4 d, RR2 s))
|
||||
{
|
||||
// Only used in calc_disp_ea_020() -> flags not relevant and never modified
|
||||
int isrmw;
|
||||
// Only used in calc_disp_ea_020() -> flags not relevant and never modified
|
||||
int isrmw;
|
||||
|
||||
if (isconst(s)) {
|
||||
set_const(d, (uae_s32)(uae_s16)live.state[s].val);
|
||||
return;
|
||||
}
|
||||
if (isconst(s))
|
||||
{
|
||||
set_const(d, (uae_s32)(uae_s16)live.state[s].val);
|
||||
return;
|
||||
}
|
||||
|
||||
isrmw = (s == d);
|
||||
if (!isrmw) {
|
||||
s = readreg(s, 2);
|
||||
d = writereg(d, 4);
|
||||
}
|
||||
else { /* If we try to lock this twice, with different sizes, we are int trouble! */
|
||||
s = d = rmw(s, 4, 2);
|
||||
}
|
||||
SIGNED16_REG_2_REG(d, s);
|
||||
if (!isrmw) {
|
||||
unlock2(d);
|
||||
unlock2(s);
|
||||
}
|
||||
else {
|
||||
unlock2(s);
|
||||
}
|
||||
isrmw = (s == d);
|
||||
if (!isrmw)
|
||||
{
|
||||
s = readreg(s, 2);
|
||||
d = writereg(d, 4);
|
||||
}
|
||||
else /* If we try to lock this twice, with different sizes, we are int trouble! */
|
||||
{
|
||||
s = d = rmw(s, 4, 2);
|
||||
}
|
||||
SIGNED16_REG_2_REG(d, s);
|
||||
if (!isrmw)
|
||||
{
|
||||
unlock2(d);
|
||||
unlock2(s);
|
||||
}
|
||||
else
|
||||
{
|
||||
unlock2(s);
|
||||
}
|
||||
}
|
||||
MENDFUNC(2,sign_extend_16_rr,(W4 d, RR2 s))
|
||||
|
||||
MIDFUNC(2,mov_b_rr,(W1 d, RR1 s))
|
||||
{
|
||||
if (d == s)
|
||||
return;
|
||||
if (isconst(s)) {
|
||||
COMPCALL(mov_b_ri)(d, (uae_u8)live.state[s].val);
|
||||
return;
|
||||
}
|
||||
if (d == s)
|
||||
return;
|
||||
if (isconst(s))
|
||||
{
|
||||
COMPCALL(mov_b_ri)(d, (uae_u8)live.state[s].val);
|
||||
return;
|
||||
}
|
||||
|
||||
s = readreg(s, 1);
|
||||
d = writereg(d, 1);
|
||||
raw_mov_b_rr(d, s);
|
||||
unlock2(d);
|
||||
unlock2(s);
|
||||
s = readreg(s, 1);
|
||||
d = writereg(d, 1);
|
||||
raw_mov_b_rr(d, s);
|
||||
unlock2(d);
|
||||
unlock2(s);
|
||||
}
|
||||
MENDFUNC(2,mov_b_rr,(W1 d, RR1 s))
|
||||
|
||||
MIDFUNC(2,mov_w_rr,(W2 d, RR2 s))
|
||||
{
|
||||
if (d == s)
|
||||
return;
|
||||
if (isconst(s)) {
|
||||
COMPCALL(mov_w_ri)(d, (uae_u16)live.state[s].val);
|
||||
return;
|
||||
}
|
||||
if (d == s)
|
||||
return;
|
||||
if (isconst(s))
|
||||
{
|
||||
COMPCALL(mov_w_ri)(d, (uae_u16)live.state[s].val);
|
||||
return;
|
||||
}
|
||||
|
||||
s = readreg(s, 2);
|
||||
d = writereg(d, 2);
|
||||
raw_mov_w_rr(d, s);
|
||||
unlock2(d);
|
||||
unlock2(s);
|
||||
s = readreg(s, 2);
|
||||
d = writereg(d, 2);
|
||||
raw_mov_w_rr(d, s);
|
||||
unlock2(d);
|
||||
unlock2(s);
|
||||
}
|
||||
MENDFUNC(2,mov_w_rr,(W2 d, RR2 s))
|
||||
|
||||
MIDFUNC(3,lea_l_brr,(W4 d, RR4 s, IMM offset))
|
||||
{
|
||||
if (isconst(s)) {
|
||||
COMPCALL(mov_l_ri)(d, live.state[s].val+offset);
|
||||
return;
|
||||
}
|
||||
if (isconst(s))
|
||||
{
|
||||
COMPCALL(mov_l_ri)(d, live.state[s].val+offset);
|
||||
return;
|
||||
}
|
||||
|
||||
s = readreg(s, 4);
|
||||
d = writereg(d, 4);
|
||||
raw_lea_l_brr(d, s, offset);
|
||||
unlock2(d);
|
||||
unlock2(s);
|
||||
s = readreg(s, 4);
|
||||
d = writereg(d, 4);
|
||||
raw_lea_l_brr(d, s, offset);
|
||||
unlock2(d);
|
||||
unlock2(s);
|
||||
}
|
||||
MENDFUNC(3,lea_l_brr,(W4 d, RR4 s, IMM offset))
|
||||
|
||||
MIDFUNC(5,lea_l_brr_indexed,(W4 d, RR4 s, RR4 index, IMM factor, IMM offset))
|
||||
{
|
||||
if (!offset) {
|
||||
COMPCALL(lea_l_rr_indexed)(d, s, index, factor);
|
||||
return;
|
||||
}
|
||||
|
||||
s = readreg(s, 4);
|
||||
index = readreg(index, 4);
|
||||
d = writereg(d, 4);
|
||||
raw_lea_l_brr_indexed(d, s, index, factor, offset);
|
||||
unlock2(d);
|
||||
unlock2(index);
|
||||
unlock2(s);
|
||||
if (!offset)
|
||||
{
|
||||
COMPCALL(lea_l_rr_indexed)(d, s, index, factor);
|
||||
return;
|
||||
}
|
||||
|
||||
s = readreg(s, 4);
|
||||
index = readreg(index, 4);
|
||||
d = writereg(d, 4);
|
||||
raw_lea_l_brr_indexed(d, s, index, factor, offset);
|
||||
unlock2(d);
|
||||
unlock2(index);
|
||||
unlock2(s);
|
||||
}
|
||||
MENDFUNC(5,lea_l_brr_indexed,(W4 d, RR4 s, RR4 index, IMM factor, IMM offset))
|
||||
|
||||
MIDFUNC(4,lea_l_rr_indexed,(W4 d, RR4 s, RR4 index, IMM factor))
|
||||
{
|
||||
s = readreg(s, 4);
|
||||
index = readreg(index, 4);
|
||||
d = writereg(d, 4);
|
||||
raw_lea_l_rr_indexed(d, s, index, factor);
|
||||
unlock2(d);
|
||||
unlock2(index);
|
||||
unlock2(s);
|
||||
s = readreg(s, 4);
|
||||
index = readreg(index, 4);
|
||||
d = writereg(d, 4);
|
||||
raw_lea_l_rr_indexed(d, s, index, factor);
|
||||
unlock2(d);
|
||||
unlock2(index);
|
||||
unlock2(s);
|
||||
}
|
||||
MENDFUNC(4,lea_l_rr_indexed,(W4 d, RR4 s, RR4 index, IMM factor))
|
||||
|
||||
MIDFUNC(2,mov_l_rr,(W4 d, RR4 s))
|
||||
{
|
||||
int olds;
|
||||
int olds;
|
||||
|
||||
if (d == s) { /* How pointless! */
|
||||
return;
|
||||
}
|
||||
if (isconst(s)) {
|
||||
COMPCALL(mov_l_ri)(d, live.state[s].val);
|
||||
return;
|
||||
}
|
||||
olds = s;
|
||||
disassociate(d);
|
||||
s = readreg(s, 4);
|
||||
live.state[d].realreg = s;
|
||||
live.state[d].realind = live.nat[s].nholds;
|
||||
live.state[d].val = live.state[olds].val;
|
||||
live.state[d].validsize = 4;
|
||||
live.state[d].dirtysize = 4;
|
||||
set_status(d, DIRTY);
|
||||
if (d == s) /* How pointless! */
|
||||
{
|
||||
return;
|
||||
}
|
||||
if (isconst(s))
|
||||
{
|
||||
COMPCALL(mov_l_ri)(d, live.state[s].val);
|
||||
return;
|
||||
}
|
||||
olds = s;
|
||||
disassociate(d);
|
||||
s = readreg(s, 4);
|
||||
live.state[d].realreg = s;
|
||||
live.state[d].realind = live.nat[s].nholds;
|
||||
live.state[d].val = live.state[olds].val;
|
||||
live.state[d].validsize = 4;
|
||||
live.state[d].dirtysize = 4;
|
||||
set_status(d, DIRTY);
|
||||
|
||||
live.nat[s].holds[live.nat[s].nholds] = d;
|
||||
live.nat[s].nholds++;
|
||||
D2(panicbug("Added %d to nreg %d(%d), now holds %d regs", d, s, live.state[d].realind, live.nat[s].nholds));
|
||||
unlock2(s);
|
||||
live.nat[s].holds[live.nat[s].nholds] = d;
|
||||
live.nat[s].nholds++;
|
||||
D2(panicbug("Added %d to nreg %d(%d), now holds %d regs", d, s, live.state[d].realind, live.nat[s].nholds));
|
||||
unlock2(s);
|
||||
}
|
||||
MENDFUNC(2,mov_l_rr,(W4 d, RR4 s))
|
||||
|
||||
MIDFUNC(2,mov_l_mr,(IMM d, RR4 s))
|
||||
{
|
||||
if (isconst(s)) {
|
||||
COMPCALL(mov_l_mi)(d, live.state[s].val);
|
||||
return;
|
||||
}
|
||||
|
||||
s = readreg(s, 4);
|
||||
raw_mov_l_mr(d, s);
|
||||
unlock2(s);
|
||||
if (isconst(s))
|
||||
{
|
||||
COMPCALL(mov_l_mi)(d, live.state[s].val);
|
||||
return;
|
||||
}
|
||||
|
||||
s = readreg(s, 4);
|
||||
raw_mov_l_mr(d, s);
|
||||
unlock2(s);
|
||||
}
|
||||
MENDFUNC(2,mov_l_mr,(IMM d, RR4 s))
|
||||
|
||||
MIDFUNC(2,mov_l_ri,(W4 d, IMM s))
|
||||
{
|
||||
set_const(d, s);
|
||||
return;
|
||||
set_const(d, s);
|
||||
return;
|
||||
}
|
||||
MENDFUNC(2,mov_l_ri,(W4 d, IMM s))
|
||||
|
||||
MIDFUNC(2,mov_w_ri,(W2 d, IMM s))
|
||||
{
|
||||
d = writereg(d, 2);
|
||||
raw_mov_w_ri(d, s);
|
||||
unlock2(d);
|
||||
d = writereg(d, 2);
|
||||
raw_mov_w_ri(d, s);
|
||||
unlock2(d);
|
||||
}
|
||||
MENDFUNC(2,mov_w_ri,(W2 d, IMM s))
|
||||
|
||||
MIDFUNC(2,mov_b_ri,(W1 d, IMM s))
|
||||
{
|
||||
d = writereg(d, 1);
|
||||
raw_mov_b_ri(d, s);
|
||||
unlock2(d);
|
||||
d = writereg(d, 1);
|
||||
raw_mov_b_ri(d, s);
|
||||
unlock2(d);
|
||||
}
|
||||
MENDFUNC(2,mov_b_ri,(W1 d, IMM s))
|
||||
|
||||
MIDFUNC(2,add_l,(RW4 d, RR4 s))
|
||||
{
|
||||
if (isconst(s)) {
|
||||
COMPCALL(add_l_ri)(d, live.state[s].val);
|
||||
return;
|
||||
}
|
||||
if (isconst(s))
|
||||
{
|
||||
COMPCALL(add_l_ri)(d, live.state[s].val);
|
||||
return;
|
||||
}
|
||||
|
||||
s = readreg(s, 4);
|
||||
d = rmw(d, 4, 4);
|
||||
raw_add_l(d, s);
|
||||
unlock2(d);
|
||||
unlock2(s);
|
||||
s = readreg(s, 4);
|
||||
d = rmw(d, 4, 4);
|
||||
raw_add_l(d, s);
|
||||
unlock2(d);
|
||||
unlock2(s);
|
||||
}
|
||||
MENDFUNC(2,add_l,(RW4 d, RR4 s))
|
||||
|
||||
MIDFUNC(2,sub_l_ri,(RW4 d, IMM i))
|
||||
{
|
||||
if (!i)
|
||||
return;
|
||||
if (isconst(d)) {
|
||||
live.state[d].val -= i;
|
||||
return;
|
||||
}
|
||||
if (!i)
|
||||
return;
|
||||
if (isconst(d))
|
||||
{
|
||||
live.state[d].val -= i;
|
||||
return;
|
||||
}
|
||||
|
||||
d = rmw(d, 4, 4);
|
||||
raw_sub_l_ri(d, i);
|
||||
unlock2(d);
|
||||
d = rmw(d, 4, 4);
|
||||
raw_sub_l_ri(d, i);
|
||||
unlock2(d);
|
||||
}
|
||||
MENDFUNC(2,sub_l_ri,(RW4 d, IMM i))
|
||||
|
||||
MIDFUNC(2,sub_w_ri,(RW2 d, IMM i))
|
||||
{
|
||||
// Caller needs flags...
|
||||
clobber_flags();
|
||||
// Caller needs flags...
|
||||
clobber_flags();
|
||||
|
||||
d = rmw(d, 2, 2);
|
||||
raw_sub_w_ri(d, i);
|
||||
unlock2(d);
|
||||
d = rmw(d, 2, 2);
|
||||
raw_sub_w_ri(d, i);
|
||||
unlock2(d);
|
||||
}
|
||||
MENDFUNC(2,sub_w_ri,(RW2 d, IMM i))
|
||||
|
||||
MIDFUNC(2,add_l_ri,(RW4 d, IMM i))
|
||||
{
|
||||
if (!i)
|
||||
return;
|
||||
if (isconst(d)) {
|
||||
live.state[d].val += i;
|
||||
return;
|
||||
}
|
||||
if (!i)
|
||||
return;
|
||||
if (isconst(d))
|
||||
{
|
||||
live.state[d].val += i;
|
||||
return;
|
||||
}
|
||||
|
||||
d = rmw(d, 4, 4);
|
||||
raw_add_l_ri(d, i);
|
||||
unlock2(d);
|
||||
d = rmw(d, 4, 4);
|
||||
raw_add_l_ri(d, i);
|
||||
unlock2(d);
|
||||
}
|
||||
MENDFUNC(2,add_l_ri,(RW4 d, IMM i))
|
||||
|
||||
MIDFUNC(5,call_r_02,(RR4 r, RR4 in1, RR4 in2, IMM isize1, IMM isize2))
|
||||
{
|
||||
clobber_flags();
|
||||
in1 = readreg_specific(in1, isize1, REG_PAR1);
|
||||
in2 = readreg_specific(in2, isize2, REG_PAR2);
|
||||
r = readreg(r, 4);
|
||||
prepare_for_call_1();
|
||||
unlock2(r);
|
||||
unlock2(in1);
|
||||
unlock2(in2);
|
||||
prepare_for_call_2();
|
||||
compemu_raw_call_r(r);
|
||||
clobber_flags();
|
||||
in1 = readreg_specific(in1, isize1, REG_PAR1);
|
||||
in2 = readreg_specific(in2, isize2, REG_PAR2);
|
||||
r = readreg(r, 4);
|
||||
prepare_for_call_1();
|
||||
unlock2(r);
|
||||
unlock2(in1);
|
||||
unlock2(in2);
|
||||
prepare_for_call_2();
|
||||
compemu_raw_call_r(r);
|
||||
}
|
||||
MENDFUNC(5,call_r_02,(RR4 r, RR4 in1, RR4 in2, IMM isize1, IMM isize2))
|
||||
|
||||
MIDFUNC(5,call_r_11,(W4 out1, RR4 r, RR4 in1, IMM osize, IMM isize))
|
||||
{
|
||||
clobber_flags();
|
||||
if (osize == 4) {
|
||||
if (out1 != in1 && out1 != r) {
|
||||
COMPCALL(forget_about)(out1);
|
||||
clobber_flags();
|
||||
if (osize == 4)
|
||||
{
|
||||
if (out1 != in1 && out1 != r)
|
||||
{
|
||||
COMPCALL(forget_about)(out1);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
tomem_c(out1);
|
||||
}
|
||||
}
|
||||
else {
|
||||
tomem_c(out1);
|
||||
}
|
||||
|
||||
in1 = readreg_specific(in1, isize, REG_PAR1);
|
||||
r = readreg(r, 4);
|
||||
prepare_for_call_1();
|
||||
in1 = readreg_specific(in1, isize, REG_PAR1);
|
||||
r = readreg(r, 4);
|
||||
prepare_for_call_1();
|
||||
|
||||
unlock2(in1);
|
||||
unlock2(r);
|
||||
unlock2(in1);
|
||||
unlock2(r);
|
||||
|
||||
prepare_for_call_2();
|
||||
compemu_raw_call_r(r);
|
||||
prepare_for_call_2();
|
||||
compemu_raw_call_r(r);
|
||||
|
||||
live.nat[REG_RESULT].holds[0] = out1;
|
||||
live.nat[REG_RESULT].nholds = 1;
|
||||
live.nat[REG_RESULT].touched = touchcnt++;
|
||||
live.nat[REG_RESULT].holds[0] = out1;
|
||||
live.nat[REG_RESULT].nholds = 1;
|
||||
live.nat[REG_RESULT].touched = touchcnt++;
|
||||
|
||||
live.state[out1].realreg = REG_RESULT;
|
||||
live.state[out1].realind = 0;
|
||||
live.state[out1].val = 0;
|
||||
live.state[out1].validsize = osize;
|
||||
live.state[out1].dirtysize = osize;
|
||||
set_status(out1, DIRTY);
|
||||
live.state[out1].realreg = REG_RESULT;
|
||||
live.state[out1].realind = 0;
|
||||
live.state[out1].val = 0;
|
||||
live.state[out1].validsize = osize;
|
||||
live.state[out1].dirtysize = osize;
|
||||
set_status(out1, DIRTY);
|
||||
}
|
||||
MENDFUNC(5,call_r_11,(W4 out1, RR4 r, RR4 in1, IMM osize, IMM isize))
|
||||
|
||||
/* forget_about() takes a mid-layer register */
|
||||
MIDFUNC(1,forget_about,(W4 r))
|
||||
{
|
||||
if (isinreg(r))
|
||||
disassociate(r);
|
||||
live.state[r].val = 0;
|
||||
set_status(r, UNDEF);
|
||||
if (isinreg(r))
|
||||
disassociate(r);
|
||||
live.state[r].val = 0;
|
||||
set_status(r, UNDEF);
|
||||
}
|
||||
MENDFUNC(1,forget_about,(W4 r))
|
||||
|
||||
#ifdef USE_JIT_FPU
|
||||
MIDFUNC(1,f_forget_about,(FW r))
|
||||
{
|
||||
if (f_isinreg(r))
|
||||
f_disassociate(r);
|
||||
live.fate[r].status=UNDEF;
|
||||
if (f_isinreg(r))
|
||||
f_disassociate(r);
|
||||
live.fate[r].status=UNDEF;
|
||||
}
|
||||
MENDFUNC(1,f_forget_about,(FW r))
|
||||
#endif
|
||||
|
|
@ -396,68 +415,75 @@ MENDFUNC(1,f_forget_about,(FW r))
|
|||
|
||||
MIDFUNC(2,arm_ADD_l,(RW4 d, RR4 s))
|
||||
{
|
||||
if (isconst(s)) {
|
||||
COMPCALL(arm_ADD_l_ri)(d,live.state[s].val);
|
||||
return;
|
||||
}
|
||||
if (isconst(s))
|
||||
{
|
||||
COMPCALL(arm_ADD_l_ri)(d,live.state[s].val);
|
||||
return;
|
||||
}
|
||||
|
||||
s = readreg(s, 4);
|
||||
d = rmw(d, 4, 4);
|
||||
raw_ADD_l_rr(d, s);
|
||||
unlock2(d);
|
||||
unlock2(s);
|
||||
s = readreg(s, 4);
|
||||
d = rmw(d, 4, 4);
|
||||
raw_ADD_l_rr(d, s);
|
||||
unlock2(d);
|
||||
unlock2(s);
|
||||
}
|
||||
MENDFUNC(2,arm_ADD_l,(RW4 d, RR4 s))
|
||||
|
||||
MIDFUNC(2,arm_ADD_l_ri,(RW4 d, IMM i))
|
||||
{
|
||||
if (!i)
|
||||
return;
|
||||
if (isconst(d)) {
|
||||
live.state[d].val += i;
|
||||
return;
|
||||
}
|
||||
if (!i)
|
||||
return;
|
||||
if (isconst(d))
|
||||
{
|
||||
live.state[d].val += i;
|
||||
return;
|
||||
}
|
||||
|
||||
d = rmw(d, 4, 4);
|
||||
d = rmw(d, 4, 4);
|
||||
|
||||
if(CHECK32(i)) {
|
||||
raw_ADD_l_rri(d, d, i);
|
||||
} else {
|
||||
raw_LDR_l_ri(REG_WORK1, i);
|
||||
raw_ADD_l_rr(d, REG_WORK1);
|
||||
}
|
||||
|
||||
unlock2(d);
|
||||
if(CHECK32(i))
|
||||
{
|
||||
raw_ADD_l_rri(d, d, i);
|
||||
}
|
||||
else
|
||||
{
|
||||
raw_LDR_l_ri(REG_WORK1, i);
|
||||
raw_ADD_l_rr(d, REG_WORK1);
|
||||
}
|
||||
|
||||
unlock2(d);
|
||||
}
|
||||
MENDFUNC(2,arm_ADD_l_ri,(RW4 d, IMM i))
|
||||
|
||||
MIDFUNC(2,arm_ADD_l_ri8,(RW4 d, IMM i))
|
||||
{
|
||||
if (!i)
|
||||
return;
|
||||
if (isconst(d)) {
|
||||
live.state[d].val += i;
|
||||
return;
|
||||
}
|
||||
if (!i)
|
||||
return;
|
||||
if (isconst(d))
|
||||
{
|
||||
live.state[d].val += i;
|
||||
return;
|
||||
}
|
||||
|
||||
d = rmw(d, 4, 4);
|
||||
raw_ADD_l_rri(d, d, i);
|
||||
unlock2(d);
|
||||
d = rmw(d, 4, 4);
|
||||
raw_ADD_l_rri(d, d, i);
|
||||
unlock2(d);
|
||||
}
|
||||
MENDFUNC(2,arm_ADD_l_ri8,(RW4 d, IMM i))
|
||||
|
||||
MIDFUNC(2,arm_SUB_l_ri8,(RW4 d, IMM i))
|
||||
{
|
||||
if (!i)
|
||||
return;
|
||||
if (isconst(d)) {
|
||||
live.state[d].val -= i;
|
||||
return;
|
||||
}
|
||||
if (!i)
|
||||
return;
|
||||
if (isconst(d))
|
||||
{
|
||||
live.state[d].val -= i;
|
||||
return;
|
||||
}
|
||||
|
||||
d = rmw(d, 4, 4);
|
||||
raw_SUB_l_rri(d, d, i);
|
||||
unlock2(d);
|
||||
d = rmw(d, 4, 4);
|
||||
raw_SUB_l_rri(d, d, i);
|
||||
unlock2(d);
|
||||
}
|
||||
MENDFUNC(2,arm_SUB_l_ri8,(RW4 d, IMM i))
|
||||
|
||||
|
|
@ -465,26 +491,28 @@ MENDFUNC(2,arm_SUB_l_ri8,(RW4 d, IMM i))
|
|||
// Other
|
||||
STATIC_INLINE void flush_cpu_icache(void *start, void *stop)
|
||||
{
|
||||
register void *_beg __asm ("a1") = start;
|
||||
register void *_end __asm ("a2") = stop;
|
||||
register void *_flg __asm ("a3") = 0;
|
||||
#ifdef __ARM_EABI__
|
||||
register unsigned long _scno __asm ("r7") = 0xf0002;
|
||||
__asm __volatile ("swi 0x0 @ sys_cacheflush"
|
||||
: "=r" (_beg)
|
||||
: "0" (_beg), "r" (_end), "r" (_flg), "r" (_scno));
|
||||
#else
|
||||
__asm __volatile ("swi 0x9f0002 @ sys_cacheflush"
|
||||
: "=r" (_beg)
|
||||
: "0" (_beg), "r" (_end), "r" (_flg));
|
||||
#endif
|
||||
register void *_beg __asm ("a1") = start;
|
||||
register void *_end __asm ("a2") = stop;
|
||||
register void *_flg __asm ("a3") = 0;
|
||||
#ifdef __ARM_EABI__
|
||||
register unsigned long _scno __asm ("r7") = 0xf0002;
|
||||
__asm __volatile ("swi 0x0 @ sys_cacheflush"
|
||||
: "=r" (_beg)
|
||||
: "0" (_beg), "r" (_end), "r" (_flg), "r" (_scno));
|
||||
#else
|
||||
__asm __volatile ("swi 0x9f0002 @ sys_cacheflush"
|
||||
: "=r" (_beg)
|
||||
: "0" (_beg), "r" (_end), "r" (_flg));
|
||||
#endif
|
||||
}
|
||||
|
||||
STATIC_INLINE void write_jmp_target(uae_u32* jmpaddr, cpuop_func* a) {
|
||||
*(jmpaddr) = (uae_u32)a;
|
||||
STATIC_INLINE void write_jmp_target(uae_u32* jmpaddr, cpuop_func* a)
|
||||
{
|
||||
*(jmpaddr) = (uae_u32)a;
|
||||
flush_cpu_icache((void *)jmpaddr, (void *)&jmpaddr[1]);
|
||||
}
|
||||
|
||||
STATIC_INLINE void emit_jmp_target(uae_u32 a) {
|
||||
emit_long((uae_u32)a);
|
||||
STATIC_INLINE void emit_jmp_target(uae_u32 a)
|
||||
{
|
||||
emit_long((uae_u32)a);
|
||||
}
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
7496
src/jit/compstbl.cpp
7496
src/jit/compstbl.cpp
File diff suppressed because it is too large
Load diff
File diff suppressed because it is too large
Load diff
Loading…
Add table
Add a link
Reference in a new issue