From 97082274cf645917c8f0d2fa444a8a805f68bdff Mon Sep 17 00:00:00 2001 From: Chips-fr Date: Wed, 9 Sep 2015 21:49:41 +0200 Subject: [PATCH] Align with latest TomB version --- Makefile | 31 +- src/archivers/7z/7zAlloc.cpp | 70 + src/archivers/7z/7zAlloc.h | 20 + src/archivers/7z/7zBuffer.cpp | 29 + src/archivers/7z/7zBuffer.h | 19 + src/archivers/7z/7zCrc.cpp | 76 + src/archivers/7z/7zCrc.h | 24 + src/archivers/7z/7zDecode.cpp | 151 + src/archivers/7z/7zDecode.h | 21 + src/archivers/7z/7zExtract.cpp | 116 + src/archivers/7z/7zExtract.h | 40 + src/archivers/7z/7zHeader.cpp | 5 + src/archivers/7z/7zHeader.h | 55 + src/archivers/7z/7zIn.cpp | 1281 + src/archivers/7z/7zIn.h | 55 + src/archivers/7z/7zItem.cpp | 133 + src/archivers/7z/7zItem.h | 90 + src/archivers/7z/7zMain.cpp | 225 + src/archivers/7z/7zMethodID.cpp | 14 + src/archivers/7z/7zMethodID.h | 18 + src/archivers/7z/7zTypes.h | 67 + src/archivers/7z/LzmaDecode.cpp | 584 + src/archivers/7z/LzmaDecode.h | 113 + src/archivers/7z/LzmaTypes.h | 45 + src/archivers/dms/cdata.h | 80 + src/archivers/dms/crc_csum.cpp | 69 + src/archivers/dms/crc_csum.h | 4 + src/archivers/dms/getbits.cpp | 34 + src/archivers/dms/getbits.h | 10 + src/archivers/dms/maketbl.cpp | 92 + src/archivers/dms/maketbl.h | 5 + src/archivers/dms/pfile.cpp | 464 + src/archivers/dms/pfile.h | 48 + src/archivers/dms/tables.cpp | 87 + src/archivers/dms/tables.h | 3 + src/archivers/dms/u_deep.cpp | 207 + src/archivers/dms/u_deep.h | 7 + src/archivers/dms/u_heavy.cpp | 175 + src/archivers/dms/u_heavy.h | 6 + src/archivers/dms/u_init.cpp | 31 + src/archivers/dms/u_init.h | 3 + src/archivers/dms/u_medium.cpp | 58 + src/archivers/dms/u_medium.h | 5 + src/archivers/dms/u_quick.cpp | 47 + src/archivers/dms/u_quick.h | 5 + src/archivers/dms/u_rle.cpp | 42 + src/archivers/dms/u_rle.h | 3 + src/archivers/lha/crcio.cpp | 323 + src/archivers/lha/dhuf.cpp | 341 + src/archivers/lha/header.cpp | 703 + src/archivers/lha/huf.cpp | 485 + src/archivers/lha/larc.cpp | 85 + src/archivers/lha/lha.h | 322 + src/archivers/lha/lha_macro.h | 357 + src/archivers/lha/lhamaketbl.cpp | 94 + src/archivers/lha/lharc.cpp | 252 + src/archivers/lha/shuf.cpp | 215 + src/archivers/lha/slide.cpp | 459 + src/archivers/lha/uae_lha.cpp | 90 + src/archivers/lha/util.cpp | 237 + src/archivers/lzx/unlzx.c | 828 + src/archivers/wrp/warp.cpp | 481 + src/archivers/wrp/warp.h | 2 + src/archivers/xfd/xfd.c | 415 + src/archivers/xfd/xfdmaster.h | 504 + src/{ => archivers/zip}/unzip.cpp | 1 - src/{include => archivers/zip}/unzip.h | 0 src/audio.cpp | 117 +- src/autoconf.cpp | 48 +- src/blitter.cpp | 36 +- src/cfgfile.cpp | 697 +- src/cia.cpp | 171 +- src/codegen_arm.cpp | 417 +- src/compemu.cpp | 84 +- src/compemu_support.cpp | 34 +- src/compstbl.cpp | 44 + src/config.h | 1 - src/cpudefs.cpp | 32 +- src/cpuemu_0.cpp | 6237 ++--- src/{cpuemu_5.cpp => cpuemu_11.cpp} | 23750 ++++++++++--------- src/cpustbl.cpp | 6290 +++-- src/crc32.cpp | 303 + src/custom.cpp | 671 +- src/disk.cpp | 243 +- src/drawing.cpp | 125 +- src/ersatz.cpp | 5 +- src/expansion.cpp | 253 +- src/filesys.asm | 702 +- src/filesys.cpp | 2789 ++- src/filesys_bootrom.c | 744 +- src/fpp.cpp | 1369 +- src/fsdb_unix.cpp | 8 +- src/genblitter.c | 270 + src/gencomp.c | 3126 +++ src/gencomp_arm.c | 8 +- src/gencpu.c | 186 +- src/hardfile.cpp | 117 +- src/include/audio.h | 14 + src/include/autoconf.h | 52 +- src/include/blitter.h | 2 +- src/include/cia.h | 2 + src/include/codegen_arm.h | 3 + src/include/compemu.h | 6 +- src/include/cpu_prefetch.h | 42 +- src/include/cputbl.h | 7396 +++--- src/include/crc32.h | 3 + src/include/custom.h | 7 +- src/include/disk.h | 2 +- src/include/drawing.h | 11 +- src/include/events.h | 32 +- src/include/filesys.h | 33 +- src/include/fsdb.h | 11 + src/include/gui.h | 3 +- src/include/memory.h | 106 +- src/include/native2amiga.h | 3 +- src/include/newcpu.h | 152 +- src/include/options.h | 90 +- src/include/picasso96.h | 3 +- src/include/readcpu.h | 2 +- src/include/savestate.h | 8 +- src/include/sysdeps.h | 7 +- src/include/traps.h | 1 + src/include/uae.h | 1 + src/include/xwin.h | 2 +- src/include/zarchive.h | 102 + src/include/zfile.h | 21 + src/inputdevice.cpp | 5 +- src/linetoscr.h | 6 +- src/main.cpp | 124 +- src/md-pandora/m68k.h | 20 +- src/md-pandora/maccess.h | 20 +- src/md-pandora/md-fpp.h | 10 - src/md-pandora/support.cpp | 4 +- src/memory.cpp | 1899 +- src/missing.cpp | 6 - src/native2amiga.cpp | 2 +- src/newcpu.cpp | 807 +- src/od-pandora/gui/EditFilesysHardfile.cpp | 66 +- src/od-pandora/gui/EditFilesysVirtual.cpp | 36 +- src/od-pandora/gui/Navigation.cpp | 26 +- src/od-pandora/gui/PanelCPU.cpp | 86 +- src/od-pandora/gui/PanelFloppy.cpp | 2 +- src/od-pandora/gui/PanelHD.cpp | 49 +- src/od-pandora/gui/PanelSavestate.cpp | 2 +- src/od-pandora/gui/PanelSound.cpp | 6 +- src/od-pandora/menu/menu_config.cpp | 44 +- src/od-pandora/neon_helper.s | 1 - src/od-pandora/pandora.cpp | 17 +- src/od-pandora/pandora_filesys.cpp | 26 +- src/od-pandora/pandora_gfx.cpp | 309 +- src/od-pandora/pandora_gui.cpp | 69 +- src/od-pandora/pandora_mem.cpp | 12 +- src/od-pandora/picasso96.cpp | 989 +- src/od-pandora/sysconfig.h | 4 + src/od-rasp/rasp_gfx.cpp | 23 +- src/readcpu.cpp | 8 +- src/savestate.cpp | 480 +- src/sd-sdl/sound_sdl_new.cpp | 2 +- src/sinctable.c | 1247 +- src/sysconfig.h | 1 - src/table68k | 43 +- src/target.h | 1 - src/td-sdl/thread.h | 11 +- src/traps.cpp | 15 +- src/uaelib.cpp | 42 +- src/zfile.cpp | 1159 +- src/zfile_archive.cpp | 873 + 167 files changed, 50559 insertions(+), 25948 deletions(-) create mode 100644 src/archivers/7z/7zAlloc.cpp create mode 100644 src/archivers/7z/7zAlloc.h create mode 100644 src/archivers/7z/7zBuffer.cpp create mode 100644 src/archivers/7z/7zBuffer.h create mode 100644 src/archivers/7z/7zCrc.cpp create mode 100644 src/archivers/7z/7zCrc.h create mode 100644 src/archivers/7z/7zDecode.cpp create mode 100644 src/archivers/7z/7zDecode.h create mode 100644 src/archivers/7z/7zExtract.cpp create mode 100644 src/archivers/7z/7zExtract.h create mode 100644 src/archivers/7z/7zHeader.cpp create mode 100644 src/archivers/7z/7zHeader.h create mode 100644 src/archivers/7z/7zIn.cpp create mode 100644 src/archivers/7z/7zIn.h create mode 100644 src/archivers/7z/7zItem.cpp create mode 100644 src/archivers/7z/7zItem.h create mode 100644 src/archivers/7z/7zMain.cpp create mode 100644 src/archivers/7z/7zMethodID.cpp create mode 100644 src/archivers/7z/7zMethodID.h create mode 100644 src/archivers/7z/7zTypes.h create mode 100644 src/archivers/7z/LzmaDecode.cpp create mode 100644 src/archivers/7z/LzmaDecode.h create mode 100644 src/archivers/7z/LzmaTypes.h create mode 100644 src/archivers/dms/cdata.h create mode 100644 src/archivers/dms/crc_csum.cpp create mode 100644 src/archivers/dms/crc_csum.h create mode 100644 src/archivers/dms/getbits.cpp create mode 100644 src/archivers/dms/getbits.h create mode 100644 src/archivers/dms/maketbl.cpp create mode 100644 src/archivers/dms/maketbl.h create mode 100644 src/archivers/dms/pfile.cpp create mode 100644 src/archivers/dms/pfile.h create mode 100644 src/archivers/dms/tables.cpp create mode 100644 src/archivers/dms/tables.h create mode 100644 src/archivers/dms/u_deep.cpp create mode 100644 src/archivers/dms/u_deep.h create mode 100644 src/archivers/dms/u_heavy.cpp create mode 100644 src/archivers/dms/u_heavy.h create mode 100644 src/archivers/dms/u_init.cpp create mode 100644 src/archivers/dms/u_init.h create mode 100644 src/archivers/dms/u_medium.cpp create mode 100644 src/archivers/dms/u_medium.h create mode 100644 src/archivers/dms/u_quick.cpp create mode 100644 src/archivers/dms/u_quick.h create mode 100644 src/archivers/dms/u_rle.cpp create mode 100644 src/archivers/dms/u_rle.h create mode 100644 src/archivers/lha/crcio.cpp create mode 100644 src/archivers/lha/dhuf.cpp create mode 100644 src/archivers/lha/header.cpp create mode 100644 src/archivers/lha/huf.cpp create mode 100644 src/archivers/lha/larc.cpp create mode 100644 src/archivers/lha/lha.h create mode 100644 src/archivers/lha/lha_macro.h create mode 100644 src/archivers/lha/lhamaketbl.cpp create mode 100644 src/archivers/lha/lharc.cpp create mode 100644 src/archivers/lha/shuf.cpp create mode 100644 src/archivers/lha/slide.cpp create mode 100644 src/archivers/lha/uae_lha.cpp create mode 100644 src/archivers/lha/util.cpp create mode 100644 src/archivers/lzx/unlzx.c create mode 100644 src/archivers/wrp/warp.cpp create mode 100644 src/archivers/wrp/warp.h create mode 100644 src/archivers/xfd/xfd.c create mode 100644 src/archivers/xfd/xfdmaster.h rename src/{ => archivers/zip}/unzip.cpp (99%) rename src/{include => archivers/zip}/unzip.h (100%) delete mode 120000 src/config.h rename src/{cpuemu_5.cpp => cpuemu_11.cpp} (82%) create mode 100644 src/genblitter.c create mode 100644 src/gencomp.c create mode 100644 src/include/zarchive.h delete mode 120000 src/sysconfig.h delete mode 120000 src/target.h create mode 100644 src/zfile_archive.cpp diff --git a/Makefile b/Makefile index 93f67933..adca97d8 100644 --- a/Makefile +++ b/Makefile @@ -27,7 +27,7 @@ MORE_CFLAGS += -I/opt/vc/include -I/opt/vc/include/interface/vmcs_host/linux -I/ MORE_CFLAGS += -DJIT -DCPU_arm -DARM_ASSEMBLY -MORE_CFLAGS += -Isrc -Isrc/gp2x -Isrc/threaddep -Isrc/menu -Isrc/include -Isrc/gp2x/menu -fomit-frame-pointer -Wno-unused -Wno-format -DUSE_SDL -DGCCCONSTFUNC="__attribute__((const))" -DUSE_UNDERSCORE -DUNALIGNED_PROFITABLE -DOPTIMIZED_FLAGS +MORE_CFLAGS += -Isrc -Isrc/od-pandora -Isrc/gp2x -Isrc/threaddep -Isrc/menu -Isrc/include -Isrc/gp2x/menu -fomit-frame-pointer -Wno-unused -Wno-format -DUSE_SDL -DGCCCONSTFUNC="__attribute__((const))" -DUSE_UNDERSCORE -DUNALIGNED_PROFITABLE -DOPTIMIZED_FLAGS LDFLAGS += -lSDL_ttf -lguichan_sdl -lguichan -lbcm_host -L/opt/vc/lib MORE_CFLAGS += -fexceptions -fpermissive @@ -49,7 +49,7 @@ endif ASFLAGS += -mfloat-abi=hard -mfpu=neon CFLAGS = $(DEFAULT_CFLAGS) $(MORE_CFLAGS) -CFLAGS+= -DCPUEMU_0 -DCPUEMU_5 -DFPUEMU +CFLAGS+= -DCPUEMU_0 -DCPUEMU_11 -DFPUEMU OBJS = \ src/audio.o \ @@ -82,8 +82,31 @@ OBJS = \ src/scsi-none.o \ src/traps.o \ src/uaelib.o \ - src/unzip.o \ src/zfile.o \ + src/zfile_archive.o \ + src/archivers/7z/7zAlloc.o \ + src/archivers/7z/7zBuffer.o \ + src/archivers/7z/7zCrc.o \ + src/archivers/7z/7zDecode.o \ + src/archivers/7z/7zExtract.o \ + src/archivers/7z/7zHeader.o \ + src/archivers/7z/7zIn.o \ + src/archivers/7z/7zItem.o \ + src/archivers/7z/7zMethodID.o \ + src/archivers/7z/LzmaDecode.o \ + src/archivers/dms/crc_csum.o \ + src/archivers/dms/getbits.o \ + src/archivers/dms/maketbl.o \ + src/archivers/dms/pfile.o \ + src/archivers/dms/tables.o \ + src/archivers/dms/u_deep.o \ + src/archivers/dms/u_heavy.o \ + src/archivers/dms/u_init.o \ + src/archivers/dms/u_medium.o \ + src/archivers/dms/u_quick.o \ + src/archivers/dms/u_rle.o \ + src/archivers/wrp/warp.o \ + src/archivers/zip/unzip.o \ src/md-pandora/support.o \ src/od-pandora/neon_helper.o \ src/od-pandora/fsdb_host.o \ @@ -135,7 +158,7 @@ OBJS += src/readcpu.o OBJS += src/cpudefs.o OBJS += src/cpustbl.o OBJS += src/cpuemu_0.o -OBJS += src/cpuemu_5.o +OBJS += src/cpuemu_11.o OBJS += src/compemu.o OBJS += src/compemu_fpp.o OBJS += src/compstbl.o diff --git a/src/archivers/7z/7zAlloc.cpp b/src/archivers/7z/7zAlloc.cpp new file mode 100644 index 00000000..d5da81b1 --- /dev/null +++ b/src/archivers/7z/7zAlloc.cpp @@ -0,0 +1,70 @@ +/* 7zAlloc.c */ + +#include +#include "7zAlloc.h" + +/* #define _SZ_ALLOC_DEBUG */ +/* use _SZ_ALLOC_DEBUG to debug alloc/free operations */ + +#ifdef _SZ_ALLOC_DEBUG + +#ifdef _WIN32 +#include +#endif +#include +int g_allocCount = 0; +int g_allocCountTemp = 0; +#endif + +void *SzAlloc(size_t size) +{ + if (size == 0) + return 0; + #ifdef _SZ_ALLOC_DEBUG + fprintf(stderr, "\nAlloc %10d bytes; count = %10d", size, g_allocCount); + g_allocCount++; + #endif + return malloc(size); +} + +void SzFree(void *address) +{ + #ifdef _SZ_ALLOC_DEBUG + if (address != 0) + { + g_allocCount--; + fprintf(stderr, "\nFree; count = %10d", g_allocCount); + } + #endif + free(address); +} + +void *SzAllocTemp(size_t size) +{ + if (size == 0) + return 0; + #ifdef _SZ_ALLOC_DEBUG + fprintf(stderr, "\nAlloc_temp %10d bytes; count = %10d", size, g_allocCountTemp); + g_allocCountTemp++; + #ifdef _WIN32 + return HeapAlloc(GetProcessHeap(), 0, size); + #endif + #endif + return malloc(size); +} + +void SzFreeTemp(void *address) +{ + #ifdef _SZ_ALLOC_DEBUG + if (address != 0) + { + g_allocCountTemp--; + fprintf(stderr, "\nFree_temp; count = %10d", g_allocCountTemp); + } + #ifdef _WIN32 + HeapFree(GetProcessHeap(), 0, address); + return; + #endif + #endif + free(address); +} diff --git a/src/archivers/7z/7zAlloc.h b/src/archivers/7z/7zAlloc.h new file mode 100644 index 00000000..b02c1dea --- /dev/null +++ b/src/archivers/7z/7zAlloc.h @@ -0,0 +1,20 @@ +/* 7zAlloc.h */ + +#ifndef __7Z_ALLOC_H +#define __7Z_ALLOC_H + +#include + +typedef struct _ISzAlloc +{ + void *(*Alloc)(size_t size); + void (*Free)(void *address); /* address can be 0 */ +} ISzAlloc; + +void *SzAlloc(size_t size); +void SzFree(void *address); + +void *SzAllocTemp(size_t size); +void SzFreeTemp(void *address); + +#endif diff --git a/src/archivers/7z/7zBuffer.cpp b/src/archivers/7z/7zBuffer.cpp new file mode 100644 index 00000000..8bc8e067 --- /dev/null +++ b/src/archivers/7z/7zBuffer.cpp @@ -0,0 +1,29 @@ +/* 7zBuffer.c */ + +#include "7zBuffer.h" +#include "7zAlloc.h" + +void SzByteBufferInit(CSzByteBuffer *buffer) +{ + buffer->Capacity = 0; + buffer->Items = 0; +} + +int SzByteBufferCreate(CSzByteBuffer *buffer, size_t newCapacity, void * (*allocFunc)(size_t size)) +{ + buffer->Capacity = newCapacity; + if (newCapacity == 0) + { + buffer->Items = 0; + return 1; + } + buffer->Items = (Byte *)allocFunc(newCapacity); + return (buffer->Items != 0); +} + +void SzByteBufferFree(CSzByteBuffer *buffer, void (*freeFunc)(void *)) +{ + freeFunc(buffer->Items); + buffer->Items = 0; + buffer->Capacity = 0; +} diff --git a/src/archivers/7z/7zBuffer.h b/src/archivers/7z/7zBuffer.h new file mode 100644 index 00000000..afea3ca8 --- /dev/null +++ b/src/archivers/7z/7zBuffer.h @@ -0,0 +1,19 @@ +/* 7zBuffer.h */ + +#ifndef __7Z_BUFFER_H +#define __7Z_BUFFER_H + +#include +#include "7zTypes.h" + +typedef struct _CSzByteBuffer +{ + size_t Capacity; + Byte *Items; +}CSzByteBuffer; + +void SzByteBufferInit(CSzByteBuffer *buffer); +int SzByteBufferCreate(CSzByteBuffer *buffer, size_t newCapacity, void * (*allocFunc)(size_t size)); +void SzByteBufferFree(CSzByteBuffer *buffer, void (*freeFunc)(void *)); + +#endif diff --git a/src/archivers/7z/7zCrc.cpp b/src/archivers/7z/7zCrc.cpp new file mode 100644 index 00000000..6dc7dd32 --- /dev/null +++ b/src/archivers/7z/7zCrc.cpp @@ -0,0 +1,76 @@ +/* 7zCrc.c */ + +#include "7zCrc.h" + +#define kCrcPoly 0xEDB88320 + +UInt32 g_CrcTable[256]; + +void InitCrcTable() +{ + UInt32 i; + for (i = 0; i < 256; i++) + { + UInt32 r = i; + int j; + for (j = 0; j < 8; j++) + if (r & 1) + r = (r >> 1) ^ kCrcPoly; + else + r >>= 1; + g_CrcTable[i] = r; + } +} + +void CrcInit(UInt32 *crc) { *crc = 0xFFFFFFFF; } +UInt32 CrcGetDigest(UInt32 *crc) { return *crc ^ 0xFFFFFFFF; } + +void CrcUpdateByte(UInt32 *crc, Byte b) +{ + *crc = g_CrcTable[((Byte)(*crc)) ^ b] ^ (*crc >> 8); +} + +void CrcUpdateUInt16(UInt32 *crc, UInt16 v) +{ + CrcUpdateByte(crc, (Byte)v); + CrcUpdateByte(crc, (Byte)(v >> 8)); +} + +void CrcUpdateUInt32(UInt32 *crc, UInt32 v) +{ + int i; + for (i = 0; i < 4; i++) + CrcUpdateByte(crc, (Byte)(v >> (8 * i))); +} + +void CrcUpdateUInt64(UInt32 *crc, UInt64 v) +{ + int i; + for (i = 0; i < 8; i++) + { + CrcUpdateByte(crc, (Byte)(v)); + v >>= 8; + } +} + +void CrcUpdate(UInt32 *crc, const void *data, size_t size) +{ + UInt32 v = *crc; + const Byte *p = (const Byte *)data; + for (; size > 0 ; size--, p++) + v = g_CrcTable[((Byte)(v)) ^ *p] ^ (v >> 8); + *crc = v; +} + +UInt32 CrcCalculateDigest(const void *data, size_t size) +{ + UInt32 crc; + CrcInit(&crc); + CrcUpdate(&crc, data, size); + return CrcGetDigest(&crc); +} + +int CrcVerifyDigest(UInt32 digest, const void *data, size_t size) +{ + return (CrcCalculateDigest(data, size) == digest); +} diff --git a/src/archivers/7z/7zCrc.h b/src/archivers/7z/7zCrc.h new file mode 100644 index 00000000..bac26b14 --- /dev/null +++ b/src/archivers/7z/7zCrc.h @@ -0,0 +1,24 @@ +/* 7zCrc.h */ + +#ifndef __7Z_CRC_H +#define __7Z_CRC_H + +#include + +#include "7zTypes.h" + +extern UInt32 g_CrcTable[256]; +void InitCrcTable(); + +void CrcInit(UInt32 *crc); +UInt32 CrcGetDigest(UInt32 *crc); +void CrcUpdateByte(UInt32 *crc, Byte v); +void CrcUpdateUInt16(UInt32 *crc, UInt16 v); +void CrcUpdateUInt32(UInt32 *crc, UInt32 v); +void CrcUpdateUInt64(UInt32 *crc, UInt64 v); +void CrcUpdate(UInt32 *crc, const void *data, size_t size); + +UInt32 CrcCalculateDigest(const void *data, size_t size); +int CrcVerifyDigest(UInt32 digest, const void *data, size_t size); + +#endif diff --git a/src/archivers/7z/7zDecode.cpp b/src/archivers/7z/7zDecode.cpp new file mode 100644 index 00000000..188ea848 --- /dev/null +++ b/src/archivers/7z/7zDecode.cpp @@ -0,0 +1,151 @@ +/* 7zDecode.c */ + +#include "7zDecode.h" +#define _SZ_ONE_DIRECTORY +#ifdef _SZ_ONE_DIRECTORY +#include "LzmaDecode.h" +#else +#include "../../Compress/LZMA_C/LzmaDecode.h" +#endif + +CMethodID k_Copy = { { 0x0 }, 1 }; +CMethodID k_LZMA = { { 0x3, 0x1, 0x1 }, 3 }; + +#ifdef _LZMA_IN_CB + +typedef struct _CLzmaInCallbackImp +{ + ILzmaInCallback InCallback; + ISzInStream *InStream; + size_t Size; +} CLzmaInCallbackImp; + +int LzmaReadImp(void *object, const unsigned char **buffer, SizeT *size) +{ + CLzmaInCallbackImp *cb = (CLzmaInCallbackImp *)object; + size_t processedSize; + SZ_RESULT res; + *size = 0; + res = cb->InStream->Read((void *)cb->InStream, (void **)buffer, cb->Size, &processedSize); + *size = (SizeT)processedSize; + if (processedSize > cb->Size) + return (int)SZE_FAIL; + cb->Size -= processedSize; + if (res == SZ_OK) + return 0; + return (int)res; +} + +#endif + +SZ_RESULT SzDecode(const CFileSize *packSizes, const CFolder *folder, + #ifdef _LZMA_IN_CB + ISzInStream *inStream, + #else + const Byte *inBuffer, + #endif + Byte *outBuffer, size_t outSize, + size_t *outSizeProcessed, ISzAlloc *allocMain) +{ + UInt32 si; + size_t inSize = 0; + CCoderInfo *coder; + if (folder->NumPackStreams != 1) + return SZE_NOTIMPL; + if (folder->NumCoders != 1) + return SZE_NOTIMPL; + coder = folder->Coders; + *outSizeProcessed = 0; + + for (si = 0; si < folder->NumPackStreams; si++) + inSize += (size_t)packSizes[si]; + + if (AreMethodsEqual(&coder->MethodID, &k_Copy)) + { + size_t i; + if (inSize != outSize) + return SZE_DATA_ERROR; + #ifdef _LZMA_IN_CB + for (i = 0; i < inSize;) + { + size_t j; + Byte *inBuffer; + size_t bufferSize; + RINOK(inStream->Read((void *)inStream, (void **)&inBuffer, inSize - i, &bufferSize)); + if (bufferSize == 0) + return SZE_DATA_ERROR; + if (bufferSize > inSize - i) + return SZE_FAIL; + *outSizeProcessed += bufferSize; + for (j = 0; j < bufferSize && i < inSize; j++, i++) + outBuffer[i] = inBuffer[j]; + } + #else + for (i = 0; i < inSize; i++) + outBuffer[i] = inBuffer[i]; + *outSizeProcessed = inSize; + #endif + return SZ_OK; + } + + if (AreMethodsEqual(&coder->MethodID, &k_LZMA)) + { + #ifdef _LZMA_IN_CB + CLzmaInCallbackImp lzmaCallback; + #else + SizeT inProcessed; + #endif + + CLzmaDecoderState state; /* it's about 24-80 bytes structure, if int is 32-bit */ + int result; + SizeT outSizeProcessedLoc; + + #ifdef _LZMA_IN_CB + lzmaCallback.Size = inSize; + lzmaCallback.InStream = inStream; + lzmaCallback.InCallback.Read = LzmaReadImp; + #endif + + if (LzmaDecodeProperties(&state.Properties, coder->Properties.Items, + coder->Properties.Capacity) != LZMA_RESULT_OK) + return SZE_FAIL; + + state.Probs = (CProb *)allocMain->Alloc(LzmaGetNumProbs(&state.Properties) * sizeof(CProb)); + if (state.Probs == 0) + return SZE_OUTOFMEMORY; + + #ifdef _LZMA_OUT_READ + if (state.Properties.DictionarySize == 0) + state.Dictionary = 0; + else + { + state.Dictionary = (unsigned char *)allocMain->Alloc(state.Properties.DictionarySize); + if (state.Dictionary == 0) + { + allocMain->Free(state.Probs); + return SZE_OUTOFMEMORY; + } + } + LzmaDecoderInit(&state); + #endif + + result = LzmaDecode(&state, + #ifdef _LZMA_IN_CB + &lzmaCallback.InCallback, + #else + inBuffer, (SizeT)inSize, &inProcessed, + #endif + outBuffer, (SizeT)outSize, &outSizeProcessedLoc); + *outSizeProcessed = (size_t)outSizeProcessedLoc; + allocMain->Free(state.Probs); + #ifdef _LZMA_OUT_READ + allocMain->Free(state.Dictionary); + #endif + if (result == LZMA_RESULT_DATA_ERROR) + return SZE_DATA_ERROR; + if (result != LZMA_RESULT_OK) + return SZE_FAIL; + return SZ_OK; + } + return SZE_NOTIMPL; +} diff --git a/src/archivers/7z/7zDecode.h b/src/archivers/7z/7zDecode.h new file mode 100644 index 00000000..432b7ce3 --- /dev/null +++ b/src/archivers/7z/7zDecode.h @@ -0,0 +1,21 @@ +/* 7zDecode.h */ + +#ifndef __7Z_DECODE_H +#define __7Z_DECODE_H + +#include "7zItem.h" +#include "7zAlloc.h" +#ifdef _LZMA_IN_CB +#include "7zIn.h" +#endif + +SZ_RESULT SzDecode(const CFileSize *packSizes, const CFolder *folder, + #ifdef _LZMA_IN_CB + ISzInStream *stream, + #else + const Byte *inBuffer, + #endif + Byte *outBuffer, size_t outSize, + size_t *outSizeProcessed, ISzAlloc *allocMain); + +#endif diff --git a/src/archivers/7z/7zExtract.cpp b/src/archivers/7z/7zExtract.cpp new file mode 100644 index 00000000..21fb0131 --- /dev/null +++ b/src/archivers/7z/7zExtract.cpp @@ -0,0 +1,116 @@ +/* 7zExtract.c */ + +#include "7zExtract.h" +#include "7zDecode.h" +#include "7zCrc.h" + +SZ_RESULT SzExtract( + ISzInStream *inStream, + CArchiveDatabaseEx *db, + UInt32 fileIndex, + UInt32 *blockIndex, + Byte **outBuffer, + size_t *outBufferSize, + size_t *offset, + size_t *outSizeProcessed, + ISzAlloc *allocMain, + ISzAlloc *allocTemp) +{ + UInt32 folderIndex = db->FileIndexToFolderIndexMap[fileIndex]; + SZ_RESULT res = SZ_OK; + *offset = 0; + *outSizeProcessed = 0; + if (folderIndex == (UInt32)-1) + { + allocMain->Free(*outBuffer); + *blockIndex = folderIndex; + *outBuffer = 0; + *outBufferSize = 0; + return SZ_OK; + } + + if (*outBuffer == 0 || *blockIndex != folderIndex) + { + CFolder *folder = db->Database.Folders + folderIndex; + CFileSize unPackSize = SzFolderGetUnPackSize(folder); + #ifndef _LZMA_IN_CB + CFileSize packSize = SzArDbGetFolderFullPackSize(db, folderIndex); + Byte *inBuffer = 0; + size_t processedSize; + #endif + *blockIndex = folderIndex; + allocMain->Free(*outBuffer); + *outBuffer = 0; + + RINOK(inStream->Seek(inStream, SzArDbGetFolderStreamPos(db, folderIndex, 0))); + + #ifndef _LZMA_IN_CB + if (packSize != 0) + { + inBuffer = (Byte *)allocTemp->Alloc((size_t)packSize); + if (inBuffer == 0) + return SZE_OUTOFMEMORY; + } + res = inStream->Read(inStream, inBuffer, (size_t)packSize, &processedSize); + if (res == SZ_OK && processedSize != (size_t)packSize) + res = SZE_FAIL; + #endif + if (res == SZ_OK) + { + *outBufferSize = (size_t)unPackSize; + if (unPackSize != 0) + { + *outBuffer = (Byte *)allocMain->Alloc((size_t)unPackSize); + if (*outBuffer == 0) + res = SZE_OUTOFMEMORY; + } + if (res == SZ_OK) + { + size_t outRealSize; + res = SzDecode(db->Database.PackSizes + + db->FolderStartPackStreamIndex[folderIndex], folder, + #ifdef _LZMA_IN_CB + inStream, + #else + inBuffer, + #endif + *outBuffer, (size_t)unPackSize, &outRealSize, allocTemp); + if (res == SZ_OK) + { + if (outRealSize == (size_t)unPackSize) + { + if (folder->UnPackCRCDefined) + { + if (!CrcVerifyDigest(folder->UnPackCRC, *outBuffer, (size_t)unPackSize)) + res = SZE_FAIL; + } + } + else + res = SZE_FAIL; + } + } + } + #ifndef _LZMA_IN_CB + allocTemp->Free(inBuffer); + #endif + } + if (res == SZ_OK) + { + UInt32 i; + CFileItem *fileItem = db->Database.Files + fileIndex; + *offset = 0; + for(i = db->FolderStartFileIndex[folderIndex]; i < fileIndex; i++) + *offset += (UInt32)db->Database.Files[i].Size; + *outSizeProcessed = (size_t)fileItem->Size; + if (*offset + *outSizeProcessed > *outBufferSize) + return SZE_FAIL; + { + if (fileItem->IsFileCRCDefined) + { + if (!CrcVerifyDigest(fileItem->FileCRC, *outBuffer + *offset, *outSizeProcessed)) + res = SZE_FAIL; + } + } + } + return res; +} diff --git a/src/archivers/7z/7zExtract.h b/src/archivers/7z/7zExtract.h new file mode 100644 index 00000000..4ae2a056 --- /dev/null +++ b/src/archivers/7z/7zExtract.h @@ -0,0 +1,40 @@ +/* 7zExtract.h */ + +#ifndef __7Z_EXTRACT_H +#define __7Z_EXTRACT_H + +#include "7zIn.h" + +/* + SzExtract extracts file from archive + + *outBuffer must be 0 before first call for each new archive. + + Extracting cache: + If you need to decompress more than one file, you can send + these values from previous call: + *blockIndex, + *outBuffer, + *outBufferSize + You can consider "*outBuffer" as cache of solid block. If your archive is solid, + it will increase decompression speed. + + If you use external function, you can declare these 3 cache variables + (blockIndex, outBuffer, outBufferSize) as static in that external function. + + Free *outBuffer and set *outBuffer to 0, if you want to flush cache. +*/ + +SZ_RESULT SzExtract( + ISzInStream *inStream, + CArchiveDatabaseEx *db, + UInt32 fileIndex, /* index of file */ + UInt32 *blockIndex, /* index of solid block */ + Byte **outBuffer, /* pointer to pointer to output buffer (allocated with allocMain) */ + size_t *outBufferSize, /* buffer size for output buffer */ + size_t *offset, /* offset of stream for required file in *outBuffer */ + size_t *outSizeProcessed, /* size of file in *outBuffer */ + ISzAlloc *allocMain, + ISzAlloc *allocTemp); + +#endif diff --git a/src/archivers/7z/7zHeader.cpp b/src/archivers/7z/7zHeader.cpp new file mode 100644 index 00000000..e26c0143 --- /dev/null +++ b/src/archivers/7z/7zHeader.cpp @@ -0,0 +1,5 @@ +/* 7zHeader.c */ + +#include "7zHeader.h" + +Byte k7zSignature[k7zSignatureSize] = {'7', 'z', 0xBC, 0xAF, 0x27, 0x1C}; diff --git a/src/archivers/7z/7zHeader.h b/src/archivers/7z/7zHeader.h new file mode 100644 index 00000000..7edf640f --- /dev/null +++ b/src/archivers/7z/7zHeader.h @@ -0,0 +1,55 @@ +/* 7zHeader.h */ + +#ifndef __7Z_HEADER_H +#define __7Z_HEADER_H + +#include "7zTypes.h" + +#define k7zSignatureSize 6 +extern Byte k7zSignature[k7zSignatureSize]; + +#define k7zMajorVersion 0 + +#define k7zStartHeaderSize 0x20 + +enum EIdEnum +{ + k7zIdEnd, + + k7zIdHeader, + + k7zIdArchiveProperties, + + k7zIdAdditionalStreamsInfo, + k7zIdMainStreamsInfo, + k7zIdFilesInfo, + + k7zIdPackInfo, + k7zIdUnPackInfo, + k7zIdSubStreamsInfo, + + k7zIdSize, + k7zIdCRC, + + k7zIdFolder, + + k7zIdCodersUnPackSize, + k7zIdNumUnPackStream, + + k7zIdEmptyStream, + k7zIdEmptyFile, + k7zIdAnti, + + k7zIdName, + k7zIdCreationTime, + k7zIdLastAccessTime, + k7zIdLastWriteTime, + k7zIdWinAttributes, + k7zIdComment, + + k7zIdEncodedHeader, + + k7zIdStartPos +}; + +#endif diff --git a/src/archivers/7z/7zIn.cpp b/src/archivers/7z/7zIn.cpp new file mode 100644 index 00000000..b3e9ea27 --- /dev/null +++ b/src/archivers/7z/7zIn.cpp @@ -0,0 +1,1281 @@ +/* 7zIn.c */ + +#include "7zIn.h" +#include "7zCrc.h" +#include "7zDecode.h" + +#define RINOM(x) { if((x) == 0) return SZE_OUTOFMEMORY; } + +void SzArDbExInit(CArchiveDatabaseEx *db) +{ + SzArchiveDatabaseInit(&db->Database); + db->FolderStartPackStreamIndex = 0; + db->PackStreamStartPositions = 0; + db->FolderStartFileIndex = 0; + db->FileIndexToFolderIndexMap = 0; +} + +void SzArDbExFree(CArchiveDatabaseEx *db, void (*freeFunc)(void *)) +{ + freeFunc(db->FolderStartPackStreamIndex); + freeFunc(db->PackStreamStartPositions); + freeFunc(db->FolderStartFileIndex); + freeFunc(db->FileIndexToFolderIndexMap); + SzArchiveDatabaseFree(&db->Database, freeFunc); + SzArDbExInit(db); +} + +/* +CFileSize GetFolderPackStreamSize(int folderIndex, int streamIndex) const +{ + return PackSizes[FolderStartPackStreamIndex[folderIndex] + streamIndex]; +} + +CFileSize GetFilePackSize(int fileIndex) const +{ + int folderIndex = FileIndexToFolderIndexMap[fileIndex]; + if (folderIndex >= 0) + { + const CFolder &folderInfo = Folders[folderIndex]; + if (FolderStartFileIndex[folderIndex] == fileIndex) + return GetFolderFullPackSize(folderIndex); + } + return 0; +} +*/ + +#define MY_ALLOC(T, p, size, allocFunc) { if ((size) == 0) p = 0; else \ + if ((p = (T *)allocFunc((size) * sizeof(T))) == 0) return SZE_OUTOFMEMORY; } + +SZ_RESULT SzArDbExFill(CArchiveDatabaseEx *db, void * (*allocFunc)(size_t size)) +{ + UInt32 startPos = 0; + CFileSize startPosSize = 0; + UInt32 i; + UInt32 folderIndex = 0; + UInt32 indexInFolder = 0; + MY_ALLOC(UInt32, db->FolderStartPackStreamIndex, db->Database.NumFolders, allocFunc); + for(i = 0; i < db->Database.NumFolders; i++) + { + db->FolderStartPackStreamIndex[i] = startPos; + startPos += db->Database.Folders[i].NumPackStreams; + } + + MY_ALLOC(CFileSize, db->PackStreamStartPositions, db->Database.NumPackStreams, allocFunc); + + for(i = 0; i < db->Database.NumPackStreams; i++) + { + db->PackStreamStartPositions[i] = startPosSize; + startPosSize += db->Database.PackSizes[i]; + } + + MY_ALLOC(UInt32, db->FolderStartFileIndex, db->Database.NumFolders, allocFunc); + MY_ALLOC(UInt32, db->FileIndexToFolderIndexMap, db->Database.NumFiles, allocFunc); + + for (i = 0; i < db->Database.NumFiles; i++) + { + CFileItem *file = db->Database.Files + i; + int emptyStream = !file->HasStream; + if (emptyStream && indexInFolder == 0) + { + db->FileIndexToFolderIndexMap[i] = (UInt32)-1; + continue; + } + if (indexInFolder == 0) + { + /* + v3.13 incorrectly worked with empty folders + v4.07: Loop for skipping empty folders + */ + while(1) + { + if (folderIndex >= db->Database.NumFolders) + return SZE_ARCHIVE_ERROR; + db->FolderStartFileIndex[folderIndex] = i; + if (db->Database.Folders[folderIndex].NumUnPackStreams != 0) + break; + folderIndex++; + } + } + db->FileIndexToFolderIndexMap[i] = folderIndex; + if (emptyStream) + continue; + indexInFolder++; + if (indexInFolder >= db->Database.Folders[folderIndex].NumUnPackStreams) + { + folderIndex++; + indexInFolder = 0; + } + } + return SZ_OK; +} + + +CFileSize SzArDbGetFolderStreamPos(CArchiveDatabaseEx *db, UInt32 folderIndex, UInt32 indexInFolder) +{ + return db->ArchiveInfo.DataStartPosition + + db->PackStreamStartPositions[db->FolderStartPackStreamIndex[folderIndex] + indexInFolder]; +} + +CFileSize SzArDbGetFolderFullPackSize(CArchiveDatabaseEx *db, UInt32 folderIndex) +{ + UInt32 packStreamIndex = db->FolderStartPackStreamIndex[folderIndex]; + CFolder *folder = db->Database.Folders + folderIndex; + CFileSize size = 0; + UInt32 i; + for (i = 0; i < folder->NumPackStreams; i++) + size += db->Database.PackSizes[packStreamIndex + i]; + return size; +} + + +/* +SZ_RESULT SzReadTime(const CObjectVector &dataVector, + CObjectVector &files, UInt64 type) +{ + CBoolVector boolVector; + RINOK(ReadBoolVector2(files.Size(), boolVector)) + + CStreamSwitch streamSwitch; + RINOK(streamSwitch.Set(this, &dataVector)); + + for(int i = 0; i < files.Size(); i++) + { + CFileItem &file = files[i]; + CArchiveFileTime fileTime; + bool defined = boolVector[i]; + if (defined) + { + UInt32 low, high; + RINOK(SzReadUInt32(low)); + RINOK(SzReadUInt32(high)); + fileTime.dwLowDateTime = low; + fileTime.dwHighDateTime = high; + } + switch(type) + { + case k7zIdCreationTime: + file.IsCreationTimeDefined = defined; + if (defined) + file.CreationTime = fileTime; + break; + case k7zIdLastWriteTime: + file.IsLastWriteTimeDefined = defined; + if (defined) + file.LastWriteTime = fileTime; + break; + case k7zIdLastAccessTime: + file.IsLastAccessTimeDefined = defined; + if (defined) + file.LastAccessTime = fileTime; + break; + } + } + return SZ_OK; +} +*/ + +SZ_RESULT SafeReadDirect(ISzInStream *inStream, Byte *data, size_t size) +{ + #ifdef _LZMA_IN_CB + while (size > 0) + { + Byte *inBuffer; + size_t processedSize; + RINOK(inStream->Read(inStream, (void **)&inBuffer, size, &processedSize)); + if (processedSize == 0 || processedSize > size) + return SZE_FAIL; + size -= processedSize; + do + { + *data++ = *inBuffer++; + } + while (--processedSize != 0); + } + #else + size_t processedSize; + RINOK(inStream->Read(inStream, data, size, &processedSize)); + if (processedSize != size) + return SZE_FAIL; + #endif + return SZ_OK; +} + +SZ_RESULT SafeReadDirectByte(ISzInStream *inStream, Byte *data) +{ + return SafeReadDirect(inStream, data, 1); +} + +SZ_RESULT SafeReadDirectUInt32(ISzInStream *inStream, UInt32 *value) +{ + int i; + *value = 0; + for (i = 0; i < 4; i++) + { + Byte b; + RINOK(SafeReadDirectByte(inStream, &b)); + *value |= ((UInt32)b << (8 * i)); + } + return SZ_OK; +} + +SZ_RESULT SafeReadDirectUInt64(ISzInStream *inStream, UInt64 *value) +{ + int i; + *value = 0; + for (i = 0; i < 8; i++) + { + Byte b; + RINOK(SafeReadDirectByte(inStream, &b)); + *value |= ((UInt32)b << (8 * i)); + } + return SZ_OK; +} + +int TestSignatureCandidate(Byte *testBytes) +{ + size_t i; + for (i = 0; i < k7zSignatureSize; i++) + if (testBytes[i] != k7zSignature[i]) + return 0; + return 1; +} + +typedef struct _CSzState +{ + Byte *Data; + size_t Size; +}CSzData; + +SZ_RESULT SzReadByte(CSzData *sd, Byte *b) +{ + if (sd->Size == 0) + return SZE_ARCHIVE_ERROR; + sd->Size--; + *b = *sd->Data++; + return SZ_OK; +} + +SZ_RESULT SzReadBytes(CSzData *sd, Byte *data, size_t size) +{ + size_t i; + for (i = 0; i < size; i++) + { + RINOK(SzReadByte(sd, data + i)); + } + return SZ_OK; +} + +SZ_RESULT SzReadUInt32(CSzData *sd, UInt32 *value) +{ + int i; + *value = 0; + for (i = 0; i < 4; i++) + { + Byte b; + RINOK(SzReadByte(sd, &b)); + *value |= ((UInt32)(b) << (8 * i)); + } + return SZ_OK; +} + +SZ_RESULT SzReadNumber(CSzData *sd, UInt64 *value) +{ + Byte firstByte; + Byte mask = 0x80; + int i; + RINOK(SzReadByte(sd, &firstByte)); + *value = 0; + for (i = 0; i < 8; i++) + { + Byte b; + if ((firstByte & mask) == 0) + { + UInt64 highPart = firstByte & (mask - 1); + *value += (highPart << (8 * i)); + return SZ_OK; + } + RINOK(SzReadByte(sd, &b)); + *value |= ((UInt64)b << (8 * i)); + mask >>= 1; + } + return SZ_OK; +} + +SZ_RESULT SzReadSize(CSzData *sd, CFileSize *value) +{ + UInt64 value64; + RINOK(SzReadNumber(sd, &value64)); + *value = (CFileSize)value64; + return SZ_OK; +} + +SZ_RESULT SzReadNumber32(CSzData *sd, UInt32 *value) +{ + UInt64 value64; + RINOK(SzReadNumber(sd, &value64)); + if (value64 >= 0x80000000) + return SZE_NOTIMPL; + if (value64 >= ((UInt64)(1) << ((sizeof(size_t) - 1) * 8 + 2))) + return SZE_NOTIMPL; + *value = (UInt32)value64; + return SZ_OK; +} + +SZ_RESULT SzReadID(CSzData *sd, UInt64 *value) +{ + return SzReadNumber(sd, value); +} + +SZ_RESULT SzSkeepDataSize(CSzData *sd, UInt64 size) +{ + if (size > sd->Size) + return SZE_ARCHIVE_ERROR; + sd->Size -= (size_t)size; + sd->Data += (size_t)size; + return SZ_OK; +} + +SZ_RESULT SzSkeepData(CSzData *sd) +{ + UInt64 size; + RINOK(SzReadNumber(sd, &size)); + return SzSkeepDataSize(sd, size); +} + +SZ_RESULT SzReadArchiveProperties(CSzData *sd) +{ + while(1) + { + UInt64 type; + RINOK(SzReadID(sd, &type)); + if (type == k7zIdEnd) + break; + SzSkeepData(sd); + } + return SZ_OK; +} + +SZ_RESULT SzWaitAttribute(CSzData *sd, UInt64 attribute) +{ + while(1) + { + UInt64 type; + RINOK(SzReadID(sd, &type)); + if (type == attribute) + return SZ_OK; + if (type == k7zIdEnd) + return SZE_ARCHIVE_ERROR; + RINOK(SzSkeepData(sd)); + } +} + +SZ_RESULT SzReadBoolVector(CSzData *sd, size_t numItems, Byte **v, void * (*allocFunc)(size_t size)) +{ + Byte b = 0; + Byte mask = 0; + size_t i; + MY_ALLOC(Byte, *v, numItems, allocFunc); + for(i = 0; i < numItems; i++) + { + if (mask == 0) + { + RINOK(SzReadByte(sd, &b)); + mask = 0x80; + } + (*v)[i] = (Byte)(((b & mask) != 0) ? 1 : 0); + mask >>= 1; + } + return SZ_OK; +} + +SZ_RESULT SzReadBoolVector2(CSzData *sd, size_t numItems, Byte **v, void * (*allocFunc)(size_t size)) +{ + Byte allAreDefined; + size_t i; + RINOK(SzReadByte(sd, &allAreDefined)); + if (allAreDefined == 0) + return SzReadBoolVector(sd, numItems, v, allocFunc); + MY_ALLOC(Byte, *v, numItems, allocFunc); + for(i = 0; i < numItems; i++) + (*v)[i] = 1; + return SZ_OK; +} + +SZ_RESULT SzReadHashDigests( + CSzData *sd, + size_t numItems, + Byte **digestsDefined, + UInt32 **digests, + void * (*allocFunc)(size_t size)) +{ + size_t i; + RINOK(SzReadBoolVector2(sd, numItems, digestsDefined, allocFunc)); + MY_ALLOC(UInt32, *digests, numItems, allocFunc); + for(i = 0; i < numItems; i++) + if ((*digestsDefined)[i]) + { + RINOK(SzReadUInt32(sd, (*digests) + i)); + } + return SZ_OK; +} + +SZ_RESULT SzReadPackInfo( + CSzData *sd, + CFileSize *dataOffset, + UInt32 *numPackStreams, + CFileSize **packSizes, + Byte **packCRCsDefined, + UInt32 **packCRCs, + void * (*allocFunc)(size_t size)) +{ + UInt32 i; + RINOK(SzReadSize(sd, dataOffset)); + RINOK(SzReadNumber32(sd, numPackStreams)); + + RINOK(SzWaitAttribute(sd, k7zIdSize)); + + MY_ALLOC(CFileSize, *packSizes, (size_t)*numPackStreams, allocFunc); + + for(i = 0; i < *numPackStreams; i++) + { + RINOK(SzReadSize(sd, (*packSizes) + i)); + } + + while(1) + { + UInt64 type; + RINOK(SzReadID(sd, &type)); + if (type == k7zIdEnd) + break; + if (type == k7zIdCRC) + { + RINOK(SzReadHashDigests(sd, (size_t)*numPackStreams, packCRCsDefined, packCRCs, allocFunc)); + continue; + } + RINOK(SzSkeepData(sd)); + } + if (*packCRCsDefined == 0) + { + MY_ALLOC(Byte, *packCRCsDefined, (size_t)*numPackStreams, allocFunc); + MY_ALLOC(UInt32, *packCRCs, (size_t)*numPackStreams, allocFunc); + for(i = 0; i < *numPackStreams; i++) + { + (*packCRCsDefined)[i] = 0; + (*packCRCs)[i] = 0; + } + } + return SZ_OK; +} + +SZ_RESULT SzReadSwitch(CSzData *sd) +{ + Byte external; + RINOK(SzReadByte(sd, &external)); + return (external == 0) ? SZ_OK: SZE_ARCHIVE_ERROR; +} + +SZ_RESULT SzGetNextFolderItem(CSzData *sd, CFolder *folder, void * (*allocFunc)(size_t size)) +{ + UInt32 numCoders; + UInt32 numBindPairs; + UInt32 numPackedStreams; + UInt32 i; + UInt32 numInStreams = 0; + UInt32 numOutStreams = 0; + RINOK(SzReadNumber32(sd, &numCoders)); + folder->NumCoders = numCoders; + + MY_ALLOC(CCoderInfo, folder->Coders, (size_t)numCoders, allocFunc); + + for (i = 0; i < numCoders; i++) + SzCoderInfoInit(folder->Coders + i); + + for (i = 0; i < numCoders; i++) + { + Byte mainByte; + CCoderInfo *coder = folder->Coders + i; + { + RINOK(SzReadByte(sd, &mainByte)); + coder->MethodID.IDSize = (Byte)(mainByte & 0xF); + RINOK(SzReadBytes(sd, coder->MethodID.ID, coder->MethodID.IDSize)); + if ((mainByte & 0x10) != 0) + { + RINOK(SzReadNumber32(sd, &coder->NumInStreams)); + RINOK(SzReadNumber32(sd, &coder->NumOutStreams)); + } + else + { + coder->NumInStreams = 1; + coder->NumOutStreams = 1; + } + if ((mainByte & 0x20) != 0) + { + UInt64 propertiesSize = 0; + RINOK(SzReadNumber(sd, &propertiesSize)); + if (!SzByteBufferCreate(&coder->Properties, (size_t)propertiesSize, allocFunc)) + return SZE_OUTOFMEMORY; + RINOK(SzReadBytes(sd, coder->Properties.Items, (size_t)propertiesSize)); + } + } + while ((mainByte & 0x80) != 0) + { + RINOK(SzReadByte(sd, &mainByte)); + RINOK(SzSkeepDataSize(sd, (mainByte & 0xF))); + if ((mainByte & 0x10) != 0) + { + UInt32 n; + RINOK(SzReadNumber32(sd, &n)); + RINOK(SzReadNumber32(sd, &n)); + } + if ((mainByte & 0x20) != 0) + { + UInt64 propertiesSize = 0; + RINOK(SzReadNumber(sd, &propertiesSize)); + RINOK(SzSkeepDataSize(sd, propertiesSize)); + } + } + numInStreams += (UInt32)coder->NumInStreams; + numOutStreams += (UInt32)coder->NumOutStreams; + } + + numBindPairs = numOutStreams - 1; + folder->NumBindPairs = numBindPairs; + + + MY_ALLOC(CBindPair, folder->BindPairs, (size_t)numBindPairs, allocFunc); + + for (i = 0; i < numBindPairs; i++) + { + CBindPair *bindPair = folder->BindPairs + i;; + RINOK(SzReadNumber32(sd, &bindPair->InIndex)); + RINOK(SzReadNumber32(sd, &bindPair->OutIndex)); + } + + numPackedStreams = numInStreams - (UInt32)numBindPairs; + + folder->NumPackStreams = numPackedStreams; + MY_ALLOC(UInt32, folder->PackStreams, (size_t)numPackedStreams, allocFunc); + + if (numPackedStreams == 1) + { + UInt32 j; + UInt32 pi = 0; + for (j = 0; j < numInStreams; j++) + if (SzFolderFindBindPairForInStream(folder, j) < 0) + { + folder->PackStreams[pi++] = j; + break; + } + } + else + for(i = 0; i < numPackedStreams; i++) + { + RINOK(SzReadNumber32(sd, folder->PackStreams + i)); + } + return SZ_OK; +} + +SZ_RESULT SzReadUnPackInfo( + CSzData *sd, + UInt32 *numFolders, + CFolder **folders, /* for allocFunc */ + void * (*allocFunc)(size_t size), + ISzAlloc *allocTemp) +{ + UInt32 i; + RINOK(SzWaitAttribute(sd, k7zIdFolder)); + RINOK(SzReadNumber32(sd, numFolders)); + { + RINOK(SzReadSwitch(sd)); + + MY_ALLOC(CFolder, *folders, (size_t)*numFolders, allocFunc); + + for(i = 0; i < *numFolders; i++) + SzFolderInit((*folders) + i); + + for(i = 0; i < *numFolders; i++) + { + RINOK(SzGetNextFolderItem(sd, (*folders) + i, allocFunc)); + } + } + + RINOK(SzWaitAttribute(sd, k7zIdCodersUnPackSize)); + + for(i = 0; i < *numFolders; i++) + { + UInt32 j; + CFolder *folder = (*folders) + i; + UInt32 numOutStreams = SzFolderGetNumOutStreams(folder); + + MY_ALLOC(CFileSize, folder->UnPackSizes, (size_t)numOutStreams, allocFunc); + + for(j = 0; j < numOutStreams; j++) + { + RINOK(SzReadSize(sd, folder->UnPackSizes + j)); + } + } + + while(1) + { + UInt64 type; + RINOK(SzReadID(sd, &type)); + if (type == k7zIdEnd) + return SZ_OK; + if (type == k7zIdCRC) + { + SZ_RESULT res; + Byte *crcsDefined = 0; + UInt32 *crcs = 0; + res = SzReadHashDigests(sd, *numFolders, &crcsDefined, &crcs, allocTemp->Alloc); + if (res == SZ_OK) + { + for(i = 0; i < *numFolders; i++) + { + CFolder *folder = (*folders) + i; + folder->UnPackCRCDefined = crcsDefined[i]; + folder->UnPackCRC = crcs[i]; + } + } + allocTemp->Free(crcs); + allocTemp->Free(crcsDefined); + RINOK(res); + continue; + } + RINOK(SzSkeepData(sd)); + } +} + +SZ_RESULT SzReadSubStreamsInfo( + CSzData *sd, + UInt32 numFolders, + CFolder *folders, + UInt32 *numUnPackStreams, + CFileSize **unPackSizes, + Byte **digestsDefined, + UInt32 **digests, + ISzAlloc *allocTemp) +{ + UInt64 type = 0; + UInt32 i; + UInt32 si = 0; + UInt32 numDigests = 0; + + for(i = 0; i < numFolders; i++) + folders[i].NumUnPackStreams = 1; + *numUnPackStreams = numFolders; + + while(1) + { + RINOK(SzReadID(sd, &type)); + if (type == k7zIdNumUnPackStream) + { + *numUnPackStreams = 0; + for(i = 0; i < numFolders; i++) + { + UInt32 numStreams; + RINOK(SzReadNumber32(sd, &numStreams)); + folders[i].NumUnPackStreams = numStreams; + *numUnPackStreams += numStreams; + } + continue; + } + if (type == k7zIdCRC || type == k7zIdSize) + break; + if (type == k7zIdEnd) + break; + RINOK(SzSkeepData(sd)); + } + + if (*numUnPackStreams == 0) + { + *unPackSizes = 0; + *digestsDefined = 0; + *digests = 0; + } + else + { + *unPackSizes = (CFileSize *)allocTemp->Alloc((size_t)*numUnPackStreams * sizeof(CFileSize)); + RINOM(*unPackSizes); + *digestsDefined = (Byte *)allocTemp->Alloc((size_t)*numUnPackStreams * sizeof(Byte)); + RINOM(*digestsDefined); + *digests = (UInt32 *)allocTemp->Alloc((size_t)*numUnPackStreams * sizeof(UInt32)); + RINOM(*digests); + } + + for(i = 0; i < numFolders; i++) + { + /* + v3.13 incorrectly worked with empty folders + v4.07: we check that folder is empty + */ + CFileSize sum = 0; + UInt32 j; + UInt32 numSubstreams = folders[i].NumUnPackStreams; + if (numSubstreams == 0) + continue; + if (type == k7zIdSize) + for (j = 1; j < numSubstreams; j++) + { + CFileSize size; + RINOK(SzReadSize(sd, &size)); + (*unPackSizes)[si++] = size; + sum += size; + } + (*unPackSizes)[si++] = SzFolderGetUnPackSize(folders + i) - sum; + } + if (type == k7zIdSize) + { + RINOK(SzReadID(sd, &type)); + } + + for(i = 0; i < *numUnPackStreams; i++) + { + (*digestsDefined)[i] = 0; + (*digests)[i] = 0; + } + + + for(i = 0; i < numFolders; i++) + { + UInt32 numSubstreams = folders[i].NumUnPackStreams; + if (numSubstreams != 1 || !folders[i].UnPackCRCDefined) + numDigests += numSubstreams; + } + + + si = 0; + while(1) + { + if (type == k7zIdCRC) + { + int digestIndex = 0; + Byte *digestsDefined2 = 0; + UInt32 *digests2 = 0; + SZ_RESULT res = SzReadHashDigests(sd, numDigests, &digestsDefined2, &digests2, allocTemp->Alloc); + if (res == SZ_OK) + { + for (i = 0; i < numFolders; i++) + { + CFolder *folder = folders + i; + UInt32 numSubstreams = folder->NumUnPackStreams; + if (numSubstreams == 1 && folder->UnPackCRCDefined) + { + (*digestsDefined)[si] = 1; + (*digests)[si] = folder->UnPackCRC; + si++; + } + else + { + UInt32 j; + for (j = 0; j < numSubstreams; j++, digestIndex++) + { + (*digestsDefined)[si] = digestsDefined2[digestIndex]; + (*digests)[si] = digests2[digestIndex]; + si++; + } + } + } + } + allocTemp->Free(digestsDefined2); + allocTemp->Free(digests2); + RINOK(res); + } + else if (type == k7zIdEnd) + return SZ_OK; + else + { + RINOK(SzSkeepData(sd)); + } + RINOK(SzReadID(sd, &type)); + } +} + + +SZ_RESULT SzReadStreamsInfo( + CSzData *sd, + CFileSize *dataOffset, + CArchiveDatabase *db, + UInt32 *numUnPackStreams, + CFileSize **unPackSizes, /* allocTemp */ + Byte **digestsDefined, /* allocTemp */ + UInt32 **digests, /* allocTemp */ + void * (*allocFunc)(size_t size), + ISzAlloc *allocTemp) +{ + while(1) + { + UInt64 type; + RINOK(SzReadID(sd, &type)); + if ((UInt64)(int)type != type) + return SZE_FAIL; + switch((int)type) + { + case k7zIdEnd: + return SZ_OK; + case k7zIdPackInfo: + { + RINOK(SzReadPackInfo(sd, dataOffset, &db->NumPackStreams, + &db->PackSizes, &db->PackCRCsDefined, &db->PackCRCs, allocFunc)); + break; + } + case k7zIdUnPackInfo: + { + RINOK(SzReadUnPackInfo(sd, &db->NumFolders, &db->Folders, allocFunc, allocTemp)); + break; + } + case k7zIdSubStreamsInfo: + { + RINOK(SzReadSubStreamsInfo(sd, db->NumFolders, db->Folders, + numUnPackStreams, unPackSizes, digestsDefined, digests, allocTemp)); + break; + } + default: + return SZE_FAIL; + } + } +} + +Byte kUtf8Limits[5] = { 0xC0, 0xE0, 0xF0, 0xF8, 0xFC }; + +SZ_RESULT SzReadFileNames(CSzData *sd, UInt32 numFiles, CFileItem *files, + void * (*allocFunc)(size_t size)) +{ + UInt32 i; + for(i = 0; i < numFiles; i++) + { + UInt32 len = 0; + UInt32 pos = 0; + CFileItem *file = files + i; + while(pos + 2 <= sd->Size) + { + int numAdds; + UInt32 value = (UInt32)(sd->Data[pos] | (((UInt32)sd->Data[pos + 1]) << 8)); + pos += 2; + len++; + if (value == 0) + break; + if (value < 0x80) + continue; + if (value >= 0xD800 && value < 0xE000) + { + UInt32 c2; + if (value >= 0xDC00) + return SZE_ARCHIVE_ERROR; + if (pos + 2 > sd->Size) + return SZE_ARCHIVE_ERROR; + c2 = (UInt32)(sd->Data[pos] | (((UInt32)sd->Data[pos + 1]) << 8)); + pos += 2; + if (c2 < 0xDC00 || c2 >= 0xE000) + return SZE_ARCHIVE_ERROR; + value = ((value - 0xD800) << 10) | (c2 - 0xDC00); + } + for (numAdds = 1; numAdds < 5; numAdds++) + if (value < (((UInt32)1) << (numAdds * 5 + 6))) + break; + len += numAdds; + } + + MY_ALLOC(char, file->Name, (size_t)len, allocFunc); + + len = 0; + while(2 <= sd->Size) + { + int numAdds; + UInt32 value = (UInt32)(sd->Data[0] | (((UInt32)sd->Data[1]) << 8)); + SzSkeepDataSize(sd, 2); + if (value < 0x80) + { + file->Name[len++] = (char)value; + if (value == 0) + break; + continue; + } + if (value >= 0xD800 && value < 0xE000) + { + UInt32 c2 = (UInt32)(sd->Data[0] | (((UInt32)sd->Data[1]) << 8)); + SzSkeepDataSize(sd, 2); + value = ((value - 0xD800) << 10) | (c2 - 0xDC00); + } + for (numAdds = 1; numAdds < 5; numAdds++) + if (value < (((UInt32)1) << (numAdds * 5 + 6))) + break; + file->Name[len++] = (char)(kUtf8Limits[numAdds - 1] + (value >> (6 * numAdds))); + do + { + numAdds--; + file->Name[len++] = (char)(0x80 + ((value >> (6 * numAdds)) & 0x3F)); + } + while(numAdds > 0); + + len += numAdds; + } + } + return SZ_OK; +} + +SZ_RESULT SzReadHeader2( + CSzData *sd, + CArchiveDatabaseEx *db, /* allocMain */ + CFileSize **unPackSizes, /* allocTemp */ + Byte **digestsDefined, /* allocTemp */ + UInt32 **digests, /* allocTemp */ + Byte **emptyStreamVector, /* allocTemp */ + Byte **emptyFileVector, /* allocTemp */ + ISzAlloc *allocMain, + ISzAlloc *allocTemp) +{ + UInt64 type; + UInt32 numUnPackStreams = 0; + UInt32 numFiles = 0; + CFileItem *files = 0; + UInt32 numEmptyStreams = 0; + UInt32 i; + + RINOK(SzReadID(sd, &type)); + + if (type == k7zIdArchiveProperties) + { + RINOK(SzReadArchiveProperties(sd)); + RINOK(SzReadID(sd, &type)); + } + + + if (type == k7zIdMainStreamsInfo) + { + RINOK(SzReadStreamsInfo(sd, + &db->ArchiveInfo.DataStartPosition, + &db->Database, + &numUnPackStreams, + unPackSizes, + digestsDefined, + digests, allocMain->Alloc, allocTemp)); + db->ArchiveInfo.DataStartPosition += db->ArchiveInfo.StartPositionAfterHeader; + RINOK(SzReadID(sd, &type)); + } + + if (type == k7zIdEnd) + return SZ_OK; + if (type != k7zIdFilesInfo) + return SZE_ARCHIVE_ERROR; + + RINOK(SzReadNumber32(sd, &numFiles)); + db->Database.NumFiles = numFiles; + + MY_ALLOC(CFileItem, files, (size_t)numFiles, allocMain->Alloc); + + db->Database.Files = files; + for(i = 0; i < numFiles; i++) + SzFileInit(files + i); + + while(1) + { + UInt64 type; + UInt64 size; + RINOK(SzReadID(sd, &type)); + if (type == k7zIdEnd) + break; + RINOK(SzReadNumber(sd, &size)); + + if ((UInt64)(int)type != type) + { + RINOK(SzSkeepDataSize(sd, size)); + } + else + switch((int)type) + { + case k7zIdName: + { + RINOK(SzReadSwitch(sd)); + RINOK(SzReadFileNames(sd, numFiles, files, allocMain->Alloc)) + break; + } + case k7zIdEmptyStream: + { + RINOK(SzReadBoolVector(sd, numFiles, emptyStreamVector, allocTemp->Alloc)); + numEmptyStreams = 0; + for (i = 0; i < numFiles; i++) + if ((*emptyStreamVector)[i]) + numEmptyStreams++; + break; + } + case k7zIdEmptyFile: + { + RINOK(SzReadBoolVector(sd, numEmptyStreams, emptyFileVector, allocTemp->Alloc)); + break; + } + default: + { + RINOK(SzSkeepDataSize(sd, size)); + } + } + } + + { + UInt32 emptyFileIndex = 0; + UInt32 sizeIndex = 0; + for(i = 0; i < numFiles; i++) + { + CFileItem *file = files + i; + file->IsAnti = 0; + if (*emptyStreamVector == 0) + file->HasStream = 1; + else + file->HasStream = (Byte)((*emptyStreamVector)[i] ? 0 : 1); + if(file->HasStream) + { + file->IsDirectory = 0; + file->Size = (*unPackSizes)[sizeIndex]; + file->FileCRC = (*digests)[sizeIndex]; + file->IsFileCRCDefined = (Byte)(*digestsDefined)[sizeIndex]; + sizeIndex++; + } + else + { + if (*emptyFileVector == 0) + file->IsDirectory = 1; + else + file->IsDirectory = (Byte)((*emptyFileVector)[emptyFileIndex] ? 0 : 1); + emptyFileIndex++; + file->Size = 0; + file->IsFileCRCDefined = 0; + } + } + } + return SzArDbExFill(db, allocMain->Alloc); +} + +SZ_RESULT SzReadHeader( + CSzData *sd, + CArchiveDatabaseEx *db, + ISzAlloc *allocMain, + ISzAlloc *allocTemp) +{ + CFileSize *unPackSizes = 0; + Byte *digestsDefined = 0; + UInt32 *digests = 0; + Byte *emptyStreamVector = 0; + Byte *emptyFileVector = 0; + SZ_RESULT res = SzReadHeader2(sd, db, + &unPackSizes, &digestsDefined, &digests, + &emptyStreamVector, &emptyFileVector, + allocMain, allocTemp); + allocTemp->Free(unPackSizes); + allocTemp->Free(digestsDefined); + allocTemp->Free(digests); + allocTemp->Free(emptyStreamVector); + allocTemp->Free(emptyFileVector); + return res; +} + +SZ_RESULT SzReadAndDecodePackedStreams2( + ISzInStream *inStream, + CSzData *sd, + CSzByteBuffer *outBuffer, + CFileSize baseOffset, + CArchiveDatabase *db, + CFileSize **unPackSizes, + Byte **digestsDefined, + UInt32 **digests, + #ifndef _LZMA_IN_CB + Byte **inBuffer, + #endif + ISzAlloc *allocTemp) +{ + + UInt32 numUnPackStreams = 0; + CFileSize dataStartPos; + CFolder *folder; + #ifndef _LZMA_IN_CB + CFileSize packSize = 0; + UInt32 i = 0; + #endif + CFileSize unPackSize; + size_t outRealSize; + SZ_RESULT res; + + RINOK(SzReadStreamsInfo(sd, &dataStartPos, db, + &numUnPackStreams, unPackSizes, digestsDefined, digests, + allocTemp->Alloc, allocTemp)); + + dataStartPos += baseOffset; + if (db->NumFolders != 1) + return SZE_ARCHIVE_ERROR; + + folder = db->Folders; + unPackSize = SzFolderGetUnPackSize(folder); + + RINOK(inStream->Seek(inStream, dataStartPos)); + + #ifndef _LZMA_IN_CB + for (i = 0; i < db->NumPackStreams; i++) + packSize += db->PackSizes[i]; + + MY_ALLOC(Byte, *inBuffer, (size_t)packSize, allocTemp->Alloc); + + RINOK(SafeReadDirect(inStream, *inBuffer, (size_t)packSize)); + #endif + + if (!SzByteBufferCreate(outBuffer, (size_t)unPackSize, allocTemp->Alloc)) + return SZE_OUTOFMEMORY; + + res = SzDecode(db->PackSizes, folder, + #ifdef _LZMA_IN_CB + inStream, + #else + *inBuffer, + #endif + outBuffer->Items, (size_t)unPackSize, + &outRealSize, allocTemp); + RINOK(res) + if (outRealSize != (UInt32)unPackSize) + return SZE_FAIL; + if (folder->UnPackCRCDefined) + if (!CrcVerifyDigest(folder->UnPackCRC, outBuffer->Items, (size_t)unPackSize)) + return SZE_FAIL; + return SZ_OK; +} + +SZ_RESULT SzReadAndDecodePackedStreams( + ISzInStream *inStream, + CSzData *sd, + CSzByteBuffer *outBuffer, + CFileSize baseOffset, + ISzAlloc *allocTemp) +{ + CArchiveDatabase db; + CFileSize *unPackSizes = 0; + Byte *digestsDefined = 0; + UInt32 *digests = 0; + #ifndef _LZMA_IN_CB + Byte *inBuffer = 0; + #endif + SZ_RESULT res; + SzArchiveDatabaseInit(&db); + res = SzReadAndDecodePackedStreams2(inStream, sd, outBuffer, baseOffset, + &db, &unPackSizes, &digestsDefined, &digests, + #ifndef _LZMA_IN_CB + &inBuffer, + #endif + allocTemp); + SzArchiveDatabaseFree(&db, allocTemp->Free); + allocTemp->Free(unPackSizes); + allocTemp->Free(digestsDefined); + allocTemp->Free(digests); + #ifndef _LZMA_IN_CB + allocTemp->Free(inBuffer); + #endif + return res; +} + +SZ_RESULT SzArchiveOpen2( + ISzInStream *inStream, + CArchiveDatabaseEx *db, + ISzAlloc *allocMain, + ISzAlloc *allocTemp) +{ + Byte signature[k7zSignatureSize]; + Byte version; + UInt32 crcFromArchive; + UInt64 nextHeaderOffset; + UInt64 nextHeaderSize; + UInt32 nextHeaderCRC; + UInt32 crc; + CFileSize pos = 0; + CSzByteBuffer buffer; + CSzData sd; + SZ_RESULT res; + + RINOK(SafeReadDirect(inStream, signature, k7zSignatureSize)); + + if (!TestSignatureCandidate(signature)) + return SZE_ARCHIVE_ERROR; + + /* + db.Clear(); + db.ArchiveInfo.StartPosition = _arhiveBeginStreamPosition; + */ + RINOK(SafeReadDirectByte(inStream, &version)); + if (version != k7zMajorVersion) + return SZE_ARCHIVE_ERROR; + RINOK(SafeReadDirectByte(inStream, &version)); + + RINOK(SafeReadDirectUInt32(inStream, &crcFromArchive)); + + CrcInit(&crc); + RINOK(SafeReadDirectUInt64(inStream, &nextHeaderOffset)); + CrcUpdateUInt64(&crc, nextHeaderOffset); + RINOK(SafeReadDirectUInt64(inStream, &nextHeaderSize)); + CrcUpdateUInt64(&crc, nextHeaderSize); + RINOK(SafeReadDirectUInt32(inStream, &nextHeaderCRC)); + CrcUpdateUInt32(&crc, nextHeaderCRC); + + pos = k7zStartHeaderSize; + db->ArchiveInfo.StartPositionAfterHeader = pos; + + if (CrcGetDigest(&crc) != crcFromArchive) + return SZE_ARCHIVE_ERROR; + + if (nextHeaderSize == 0) + return SZ_OK; + + RINOK(inStream->Seek(inStream, (CFileSize)(pos + nextHeaderOffset))); + + if (!SzByteBufferCreate(&buffer, (size_t)nextHeaderSize, allocTemp->Alloc)) + return SZE_OUTOFMEMORY; + + res = SafeReadDirect(inStream, buffer.Items, (size_t)nextHeaderSize); + if (res == SZ_OK) + { + if (CrcVerifyDigest(nextHeaderCRC, buffer.Items, (UInt32)nextHeaderSize)) + { + while (1) + { + UInt64 type; + sd.Data = buffer.Items; + sd.Size = buffer.Capacity; + res = SzReadID(&sd, &type); + if (res != SZ_OK) + break; + if (type == k7zIdHeader) + { + res = SzReadHeader(&sd, db, allocMain, allocTemp); + break; + } + if (type != k7zIdEncodedHeader) + { + res = SZE_ARCHIVE_ERROR; + break; + } + { + CSzByteBuffer outBuffer; + res = SzReadAndDecodePackedStreams(inStream, &sd, &outBuffer, + db->ArchiveInfo.StartPositionAfterHeader, + allocTemp); + if (res != SZ_OK) + { + SzByteBufferFree(&outBuffer, allocTemp->Free); + break; + } + SzByteBufferFree(&buffer, allocTemp->Free); + buffer.Items = outBuffer.Items; + buffer.Capacity = outBuffer.Capacity; + } + } + } + } + SzByteBufferFree(&buffer, allocTemp->Free); + return res; +} + +SZ_RESULT SzArchiveOpen( + ISzInStream *inStream, + CArchiveDatabaseEx *db, + ISzAlloc *allocMain, + ISzAlloc *allocTemp) +{ + SZ_RESULT res = SzArchiveOpen2(inStream, db, allocMain, allocTemp); + if (res != SZ_OK) + SzArDbExFree(db, allocMain->Free); + return res; +} diff --git a/src/archivers/7z/7zIn.h b/src/archivers/7z/7zIn.h new file mode 100644 index 00000000..8ded0ecc --- /dev/null +++ b/src/archivers/7z/7zIn.h @@ -0,0 +1,55 @@ +/* 7zIn.h */ + +#ifndef __7Z_IN_H +#define __7Z_IN_H + +#include "7zHeader.h" +#include "7zItem.h" +#include "7zAlloc.h" + +typedef struct _CInArchiveInfo +{ + CFileSize StartPositionAfterHeader; + CFileSize DataStartPosition; +}CInArchiveInfo; + +typedef struct _CArchiveDatabaseEx +{ + CArchiveDatabase Database; + CInArchiveInfo ArchiveInfo; + UInt32 *FolderStartPackStreamIndex; + CFileSize *PackStreamStartPositions; + UInt32 *FolderStartFileIndex; + UInt32 *FileIndexToFolderIndexMap; +}CArchiveDatabaseEx; + +void SzArDbExInit(CArchiveDatabaseEx *db); +void SzArDbExFree(CArchiveDatabaseEx *db, void (*freeFunc)(void *)); +CFileSize SzArDbGetFolderStreamPos(CArchiveDatabaseEx *db, UInt32 folderIndex, UInt32 indexInFolder); +CFileSize SzArDbGetFolderFullPackSize(CArchiveDatabaseEx *db, UInt32 folderIndex); + +typedef struct _ISzInStream +{ + #ifdef _LZMA_IN_CB + SZ_RESULT (*Read)( + void *object, /* pointer to ISzInStream itself */ + void **buffer, /* out: pointer to buffer with data */ + size_t maxRequiredSize, /* max required size to read */ + size_t *processedSize); /* real processed size. + processedSize can be less than maxRequiredSize. + If processedSize == 0, then there are no more + bytes in stream. */ + #else + SZ_RESULT (*Read)(void *object, void *buffer, size_t size, size_t *processedSize); + #endif + SZ_RESULT (*Seek)(void *object, CFileSize pos); +} ISzInStream; + + +int SzArchiveOpen( + ISzInStream *inStream, + CArchiveDatabaseEx *db, + ISzAlloc *allocMain, + ISzAlloc *allocTemp); + +#endif diff --git a/src/archivers/7z/7zItem.cpp b/src/archivers/7z/7zItem.cpp new file mode 100644 index 00000000..5f9a37f6 --- /dev/null +++ b/src/archivers/7z/7zItem.cpp @@ -0,0 +1,133 @@ +/* 7zItem.c */ + +#include "7zItem.h" +#include "7zAlloc.h" + +void SzCoderInfoInit(CCoderInfo *coder) +{ + SzByteBufferInit(&coder->Properties); +} + +void SzCoderInfoFree(CCoderInfo *coder, void (*freeFunc)(void *p)) +{ + SzByteBufferFree(&coder->Properties, freeFunc); + SzCoderInfoInit(coder); +} + +void SzFolderInit(CFolder *folder) +{ + folder->NumCoders = 0; + folder->Coders = 0; + folder->NumBindPairs = 0; + folder->BindPairs = 0; + folder->NumPackStreams = 0; + folder->PackStreams = 0; + folder->UnPackSizes = 0; + folder->UnPackCRCDefined = 0; + folder->UnPackCRC = 0; + folder->NumUnPackStreams = 0; +} + +void SzFolderFree(CFolder *folder, void (*freeFunc)(void *p)) +{ + UInt32 i; + for (i = 0; i < folder->NumCoders; i++) + SzCoderInfoFree(&folder->Coders[i], freeFunc); + freeFunc(folder->Coders); + freeFunc(folder->BindPairs); + freeFunc(folder->PackStreams); + freeFunc(folder->UnPackSizes); + SzFolderInit(folder); +} + +UInt32 SzFolderGetNumOutStreams(CFolder *folder) +{ + UInt32 result = 0; + UInt32 i; + for (i = 0; i < folder->NumCoders; i++) + result += folder->Coders[i].NumOutStreams; + return result; +} + +int SzFolderFindBindPairForInStream(CFolder *folder, UInt32 inStreamIndex) +{ + UInt32 i; + for(i = 0; i < folder->NumBindPairs; i++) + if (folder->BindPairs[i].InIndex == inStreamIndex) + return i; + return -1; +} + + +int SzFolderFindBindPairForOutStream(CFolder *folder, UInt32 outStreamIndex) +{ + UInt32 i; + for(i = 0; i < folder->NumBindPairs; i++) + if (folder->BindPairs[i].OutIndex == outStreamIndex) + return i; + return -1; +} + +CFileSize SzFolderGetUnPackSize(CFolder *folder) +{ + int i = (int)SzFolderGetNumOutStreams(folder); + if (i == 0) + return 0; + for (i--; i >= 0; i--) + if (SzFolderFindBindPairForOutStream(folder, i) < 0) + return folder->UnPackSizes[i]; + /* throw 1; */ + return 0; +} + +/* +int FindPackStreamArrayIndex(int inStreamIndex) const +{ + for(int i = 0; i < PackStreams.Size(); i++) + if (PackStreams[i] == inStreamIndex) + return i; + return -1; +} +*/ + +void SzFileInit(CFileItem *fileItem) +{ + fileItem->IsFileCRCDefined = 0; + fileItem->HasStream = 1; + fileItem->IsDirectory = 0; + fileItem->IsAnti = 0; + fileItem->Name = 0; +} + +void SzFileFree(CFileItem *fileItem, void (*freeFunc)(void *p)) +{ + freeFunc(fileItem->Name); + SzFileInit(fileItem); +} + +void SzArchiveDatabaseInit(CArchiveDatabase *db) +{ + db->NumPackStreams = 0; + db->PackSizes = 0; + db->PackCRCsDefined = 0; + db->PackCRCs = 0; + db->NumFolders = 0; + db->Folders = 0; + db->NumFiles = 0; + db->Files = 0; +} + +void SzArchiveDatabaseFree(CArchiveDatabase *db, void (*freeFunc)(void *)) +{ + UInt32 i; + for (i = 0; i < db->NumFolders; i++) + SzFolderFree(&db->Folders[i], freeFunc); + for (i = 0; i < db->NumFiles; i++) + SzFileFree(&db->Files[i], freeFunc); + freeFunc(db->PackSizes); + freeFunc(db->PackCRCsDefined); + freeFunc(db->PackCRCs); + freeFunc(db->Folders); + freeFunc(db->Files); + SzArchiveDatabaseInit(db); +} diff --git a/src/archivers/7z/7zItem.h b/src/archivers/7z/7zItem.h new file mode 100644 index 00000000..e59b73f0 --- /dev/null +++ b/src/archivers/7z/7zItem.h @@ -0,0 +1,90 @@ +/* 7zItem.h */ + +#ifndef __7Z_ITEM_H +#define __7Z_ITEM_H + +#include "7zMethodID.h" +#include "7zHeader.h" +#include "7zBuffer.h" + +typedef struct _CCoderInfo +{ + UInt32 NumInStreams; + UInt32 NumOutStreams; + CMethodID MethodID; + CSzByteBuffer Properties; +}CCoderInfo; + +void SzCoderInfoInit(CCoderInfo *coder); +void SzCoderInfoFree(CCoderInfo *coder, void (*freeFunc)(void *p)); + +typedef struct _CBindPair +{ + UInt32 InIndex; + UInt32 OutIndex; +}CBindPair; + +typedef struct _CFolder +{ + UInt32 NumCoders; + CCoderInfo *Coders; + UInt32 NumBindPairs; + CBindPair *BindPairs; + UInt32 NumPackStreams; + UInt32 *PackStreams; + CFileSize *UnPackSizes; + int UnPackCRCDefined; + UInt32 UnPackCRC; + + UInt32 NumUnPackStreams; +}CFolder; + +void SzFolderInit(CFolder *folder); +CFileSize SzFolderGetUnPackSize(CFolder *folder); +int SzFolderFindBindPairForInStream(CFolder *folder, UInt32 inStreamIndex); +UInt32 SzFolderGetNumOutStreams(CFolder *folder); +CFileSize SzFolderGetUnPackSize(CFolder *folder); + +/* #define CArchiveFileTime UInt64 */ + +typedef struct _CFileItem +{ + /* + CArchiveFileTime LastWriteTime; + CFileSize StartPos; + UInt32 Attributes; + */ + CFileSize Size; + UInt32 FileCRC; + char *Name; + + Byte IsFileCRCDefined; + Byte HasStream; + Byte IsDirectory; + Byte IsAnti; + /* + int AreAttributesDefined; + int IsLastWriteTimeDefined; + int IsStartPosDefined; + */ +}CFileItem; + +void SzFileInit(CFileItem *fileItem); + +typedef struct _CArchiveDatabase +{ + UInt32 NumPackStreams; + CFileSize *PackSizes; + Byte *PackCRCsDefined; + UInt32 *PackCRCs; + UInt32 NumFolders; + CFolder *Folders; + UInt32 NumFiles; + CFileItem *Files; +}CArchiveDatabase; + +void SzArchiveDatabaseInit(CArchiveDatabase *db); +void SzArchiveDatabaseFree(CArchiveDatabase *db, void (*freeFunc)(void *)); + + +#endif diff --git a/src/archivers/7z/7zMain.cpp b/src/archivers/7z/7zMain.cpp new file mode 100644 index 00000000..a8444a78 --- /dev/null +++ b/src/archivers/7z/7zMain.cpp @@ -0,0 +1,225 @@ +/* +7zMain.c +Test application for 7z Decoder +LZMA SDK 4.43 Copyright (c) 1999-2006 Igor Pavlov (2006-06-04) +*/ + +#include +#include +#include + +#include "7zCrc.h" +#include "7zIn.h" +#include "7zExtract.h" + +typedef struct _CFileInStream +{ + ISzInStream InStream; + FILE *File; +} CFileInStream; + +#ifdef _LZMA_IN_CB + +#define kBufferSize (1 << 12) +Byte g_Buffer[kBufferSize]; + +SZ_RESULT SzFileReadImp(void *object, void **buffer, size_t maxRequiredSize, size_t *processedSize) +{ + CFileInStream *s = (CFileInStream *)object; + size_t processedSizeLoc; + if (maxRequiredSize > kBufferSize) + maxRequiredSize = kBufferSize; + processedSizeLoc = fread(g_Buffer, 1, maxRequiredSize, s->File); + *buffer = g_Buffer; + if (processedSize != 0) + *processedSize = processedSizeLoc; + return SZ_OK; +} + +#else + +SZ_RESULT SzFileReadImp(void *object, void *buffer, size_t size, size_t *processedSize) +{ + CFileInStream *s = (CFileInStream *)object; + size_t processedSizeLoc = fread(buffer, 1, size, s->File); + if (processedSize != 0) + *processedSize = processedSizeLoc; + return SZ_OK; +} + +#endif + +SZ_RESULT SzFileSeekImp(void *object, CFileSize pos) +{ + CFileInStream *s = (CFileInStream *)object; + int res = fseek(s->File, (long)pos, SEEK_SET); + if (res == 0) + return SZ_OK; + return SZE_FAIL; +} + +void PrintError(char *sz) +{ + printf("\nERROR: %s\n", sz); +} + +int main(int numargs, char *args[]) +{ + CFileInStream archiveStream; + CArchiveDatabaseEx db; + SZ_RESULT res; + ISzAlloc allocImp; + ISzAlloc allocTempImp; + + printf("\n7z ANSI-C Decoder 4.43 Copyright (c) 1999-2006 Igor Pavlov 2006-06-04\n"); + if (numargs == 1) + { + printf( + "\nUsage: 7zDec \n\n" + "\n" + " e: Extract files from archive\n" + " l: List contents of archive\n" + " t: Test integrity of archive\n"); + return 0; + } + if (numargs < 3) + { + PrintError("incorrect command"); + return 1; + } + + archiveStream.File = fopen(args[2], "rb"); + if (archiveStream.File == 0) + { + PrintError("can not open input file"); + return 1; + } + + archiveStream.InStream.Read = SzFileReadImp; + archiveStream.InStream.Seek = SzFileSeekImp; + + allocImp.Alloc = SzAlloc; + allocImp.Free = SzFree; + + allocTempImp.Alloc = SzAllocTemp; + allocTempImp.Free = SzFreeTemp; + + InitCrcTable(); + SzArDbExInit(&db); + res = SzArchiveOpen(&archiveStream.InStream, &db, &allocImp, &allocTempImp); + if (res == SZ_OK) + { + char *command = args[1]; + int listCommand = 0; + int testCommand = 0; + int extractCommand = 0; + if (strcmp(command, "l") == 0) + listCommand = 1; + if (strcmp(command, "t") == 0) + testCommand = 1; + else if (strcmp(command, "e") == 0) + extractCommand = 1; + + if (listCommand) + { + UInt32 i; + for (i = 0; i < db.Database.NumFiles; i++) + { + CFileItem *f = db.Database.Files + i; + printf("%10d %s\n", (int)f->Size, f->Name); + } + } + else if (testCommand || extractCommand) + { + UInt32 i; + + /* + if you need cache, use these 3 variables. + if you use external function, you can make these variable as static. + */ + UInt32 blockIndex = 0xFFFFFFFF; /* it can have any value before first call (if outBuffer = 0) */ + Byte *outBuffer = 0; /* it must be 0 before first call for each new archive. */ + size_t outBufferSize = 0; /* it can have any value before first call (if outBuffer = 0) */ + + printf("\n"); + for (i = 0; i < db.Database.NumFiles; i++) + { + size_t offset; + size_t outSizeProcessed; + CFileItem *f = db.Database.Files + i; + if (f->IsDirectory) + printf("Directory "); + else + printf(testCommand ? + "Testing ": + "Extracting"); + printf(" %s", f->Name); + if (f->IsDirectory) + { + printf("\n"); + continue; + } + res = SzExtract(&archiveStream.InStream, &db, i, + &blockIndex, &outBuffer, &outBufferSize, + &offset, &outSizeProcessed, + &allocImp, &allocTempImp); + if (res != SZ_OK) + break; + if (!testCommand) + { + FILE *outputHandle; + UInt32 processedSize; + char *fileName = f->Name; + size_t nameLen = strlen(f->Name); + for (; nameLen > 0; nameLen--) + if (f->Name[nameLen - 1] == '/') + { + fileName = f->Name + nameLen; + break; + } + + outputHandle = fopen(fileName, "wb+"); + if (outputHandle == 0) + { + PrintError("can not open output file"); + res = SZE_FAIL; + break; + } + processedSize = fwrite(outBuffer + offset, 1, outSizeProcessed, outputHandle); + if (processedSize != outSizeProcessed) + { + PrintError("can not write output file"); + res = SZE_FAIL; + break; + } + if (fclose(outputHandle)) + { + PrintError("can not close output file"); + res = SZE_FAIL; + break; + } + } + printf("\n"); + } + allocImp.Free(outBuffer); + } + else + { + PrintError("incorrect command"); + res = SZE_FAIL; + } + } + SzArDbExFree(&db, allocImp.Free); + + fclose(archiveStream.File); + if (res == SZ_OK) + { + printf("\nEverything is Ok\n"); + return 0; + } + if (res == SZE_OUTOFMEMORY) + PrintError("can not allocate memory"); + else + printf("\nERROR #%d\n", res); + return 1; +} diff --git a/src/archivers/7z/7zMethodID.cpp b/src/archivers/7z/7zMethodID.cpp new file mode 100644 index 00000000..9daf39c2 --- /dev/null +++ b/src/archivers/7z/7zMethodID.cpp @@ -0,0 +1,14 @@ +/* 7zMethodID.c */ + +#include "7zMethodID.h" + +int AreMethodsEqual(CMethodID *a1, CMethodID *a2) +{ + int i; + if (a1->IDSize != a2->IDSize) + return 0; + for (i = 0; i < a1->IDSize; i++) + if (a1->ID[i] != a2->ID[i]) + return 0; + return 1; +} diff --git a/src/archivers/7z/7zMethodID.h b/src/archivers/7z/7zMethodID.h new file mode 100644 index 00000000..4d886899 --- /dev/null +++ b/src/archivers/7z/7zMethodID.h @@ -0,0 +1,18 @@ +/* 7zMethodID.h */ + +#ifndef __7Z_METHOD_ID_H +#define __7Z_METHOD_ID_H + +#include "7zTypes.h" + +#define kMethodIDSize 15 + +typedef struct _CMethodID +{ + Byte ID[kMethodIDSize]; + Byte IDSize; +} CMethodID; + +int AreMethodsEqual(CMethodID *a1, CMethodID *a2); + +#endif diff --git a/src/archivers/7z/7zTypes.h b/src/archivers/7z/7zTypes.h new file mode 100644 index 00000000..817d9215 --- /dev/null +++ b/src/archivers/7z/7zTypes.h @@ -0,0 +1,67 @@ +/* 7zTypes.h */ + +#ifndef __COMMON_TYPES_H +#define __COMMON_TYPES_H + +#ifndef _7ZIP_BYTE_DEFINED +#define _7ZIP_BYTE_DEFINED +typedef unsigned char Byte; +#endif + +#ifndef _7ZIP_UINT16_DEFINED +#define _7ZIP_UINT16_DEFINED +typedef unsigned short UInt16; +#endif + +#ifndef _7ZIP_UINT32_DEFINED +#define _7ZIP_UINT32_DEFINED +#ifdef _LZMA_UINT32_IS_ULONG +typedef unsigned long UInt32; +#else +typedef unsigned int UInt32; +#endif +#endif + +/* #define _SZ_NO_INT_64 */ +/* define it your compiler doesn't support long long int */ + +#ifndef _7ZIP_UINT64_DEFINED +#define _7ZIP_UINT64_DEFINED +#ifdef _SZ_NO_INT_64 +typedef unsigned long UInt64; +#else +#ifdef _MSC_VER +typedef unsigned __int64 UInt64; +#else +typedef unsigned long long int UInt64; +#endif +#endif +#endif + + +/* #define _SZ_FILE_SIZE_64 */ +/* Use _SZ_FILE_SIZE_64 if you need support for files larger than 4 GB*/ + +#ifndef CFileSize +#ifdef _SZ_FILE_SIZE_64 +typedef UInt64 CFileSize; +#else +typedef UInt32 CFileSize; +#endif +#endif + +#define SZ_RESULT int + +#define SZ_OK (0) +#define SZE_DATA_ERROR (1) +#define SZE_OUTOFMEMORY (2) +#define SZE_CRC_ERROR (3) + +#define SZE_NOTIMPL (4) +#define SZE_FAIL (5) + +#define SZE_ARCHIVE_ERROR (6) + +#define RINOK(x) { int __result_ = (x); if(__result_ != 0) return __result_; } + +#endif diff --git a/src/archivers/7z/LzmaDecode.cpp b/src/archivers/7z/LzmaDecode.cpp new file mode 100644 index 00000000..71c62c47 --- /dev/null +++ b/src/archivers/7z/LzmaDecode.cpp @@ -0,0 +1,584 @@ +/* + LzmaDecode.c + LZMA Decoder (optimized for Speed version) + + LZMA SDK 4.40 Copyright (c) 1999-2006 Igor Pavlov (2006-05-01) + http://www.7-zip.org/ + + LZMA SDK is licensed under two licenses: + 1) GNU Lesser General Public License (GNU LGPL) + 2) Common Public License (CPL) + It means that you can select one of these two licenses and + follow rules of that license. + + SPECIAL EXCEPTION: + Igor Pavlov, as the author of this Code, expressly permits you to + statically or dynamically link your Code (or bind by name) to the + interfaces of this file without subjecting your linked Code to the + terms of the CPL or GNU LGPL. Any modifications or additions + to this file, however, are subject to the LGPL or CPL terms. +*/ + +#include "LzmaDecode.h" + +#define kNumTopBits 24 +#define kTopValue ((UInt32)1 << kNumTopBits) + +#define kNumBitModelTotalBits 11 +#define kBitModelTotal (1 << kNumBitModelTotalBits) +#define kNumMoveBits 5 + +#define RC_READ_BYTE (*Buffer++) + +#define RC_INIT2 Code = 0; Range = 0xFFFFFFFF; \ + { int i; for(i = 0; i < 5; i++) { RC_TEST; Code = (Code << 8) | RC_READ_BYTE; }} + +#ifdef _LZMA_IN_CB + +#define RC_TEST { if (Buffer == BufferLim) \ + { SizeT size; int result = InCallback->Read(InCallback, &Buffer, &size); if (result != LZMA_RESULT_OK) return result; \ + BufferLim = Buffer + size; if (size == 0) return LZMA_RESULT_DATA_ERROR; }} + +#define RC_INIT Buffer = BufferLim = 0; RC_INIT2 + +#else + +#define RC_TEST { if (Buffer == BufferLim) return LZMA_RESULT_DATA_ERROR; } + +#define RC_INIT(buffer, bufferSize) Buffer = buffer; BufferLim = buffer + bufferSize; RC_INIT2 + +#endif + +#define RC_NORMALIZE if (Range < kTopValue) { RC_TEST; Range <<= 8; Code = (Code << 8) | RC_READ_BYTE; } + +#define IfBit0(p) RC_NORMALIZE; bound = (Range >> kNumBitModelTotalBits) * *(p); if (Code < bound) +#define UpdateBit0(p) Range = bound; *(p) += (kBitModelTotal - *(p)) >> kNumMoveBits; +#define UpdateBit1(p) Range -= bound; Code -= bound; *(p) -= (*(p)) >> kNumMoveBits; + +#define RC_GET_BIT2(p, mi, A0, A1) IfBit0(p) \ + { UpdateBit0(p); mi <<= 1; A0; } else \ + { UpdateBit1(p); mi = (mi + mi) + 1; A1; } + +#define RC_GET_BIT(p, mi) RC_GET_BIT2(p, mi, ; , ;) + +#define RangeDecoderBitTreeDecode(probs, numLevels, res) \ + { int i = numLevels; res = 1; \ + do { CProb *p = probs + res; RC_GET_BIT(p, res) } while(--i != 0); \ + res -= (1 << numLevels); } + + +#define kNumPosBitsMax 4 +#define kNumPosStatesMax (1 << kNumPosBitsMax) + +#define kLenNumLowBits 3 +#define kLenNumLowSymbols (1 << kLenNumLowBits) +#define kLenNumMidBits 3 +#define kLenNumMidSymbols (1 << kLenNumMidBits) +#define kLenNumHighBits 8 +#define kLenNumHighSymbols (1 << kLenNumHighBits) + +#define LenChoice 0 +#define LenChoice2 (LenChoice + 1) +#define LenLow (LenChoice2 + 1) +#define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits)) +#define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits)) +#define kNumLenProbs (LenHigh + kLenNumHighSymbols) + + +#define kNumStates 12 +#define kNumLitStates 7 + +#define kStartPosModelIndex 4 +#define kEndPosModelIndex 14 +#define kNumFullDistances (1 << (kEndPosModelIndex >> 1)) + +#define kNumPosSlotBits 6 +#define kNumLenToPosStates 4 + +#define kNumAlignBits 4 +#define kAlignTableSize (1 << kNumAlignBits) + +#define kMatchMinLen 2 + +#define IsMatch 0 +#define IsRep (IsMatch + (kNumStates << kNumPosBitsMax)) +#define IsRepG0 (IsRep + kNumStates) +#define IsRepG1 (IsRepG0 + kNumStates) +#define IsRepG2 (IsRepG1 + kNumStates) +#define IsRep0Long (IsRepG2 + kNumStates) +#define PosSlot (IsRep0Long + (kNumStates << kNumPosBitsMax)) +#define SpecPos (PosSlot + (kNumLenToPosStates << kNumPosSlotBits)) +#define Align (SpecPos + kNumFullDistances - kEndPosModelIndex) +#define LenCoder (Align + kAlignTableSize) +#define RepLenCoder (LenCoder + kNumLenProbs) +#define Literal (RepLenCoder + kNumLenProbs) + +#if Literal != LZMA_BASE_SIZE +StopCompilingDueBUG +#endif + +int LzmaDecodeProperties(CLzmaProperties *propsRes, const unsigned char *propsData, int size) +{ + unsigned char prop0; + if (size < LZMA_PROPERTIES_SIZE) + return LZMA_RESULT_DATA_ERROR; + prop0 = propsData[0]; + if (prop0 >= (9 * 5 * 5)) + return LZMA_RESULT_DATA_ERROR; + { + for (propsRes->pb = 0; prop0 >= (9 * 5); propsRes->pb++, prop0 -= (9 * 5)); + for (propsRes->lp = 0; prop0 >= 9; propsRes->lp++, prop0 -= 9); + propsRes->lc = prop0; + /* + unsigned char remainder = (unsigned char)(prop0 / 9); + propsRes->lc = prop0 % 9; + propsRes->pb = remainder / 5; + propsRes->lp = remainder % 5; + */ + } + + #ifdef _LZMA_OUT_READ + { + int i; + propsRes->DictionarySize = 0; + for (i = 0; i < 4; i++) + propsRes->DictionarySize += (UInt32)(propsData[1 + i]) << (i * 8); + if (propsRes->DictionarySize == 0) + propsRes->DictionarySize = 1; + } + #endif + return LZMA_RESULT_OK; +} + +#define kLzmaStreamWasFinishedId (-1) + +int LzmaDecode(CLzmaDecoderState *vs, + #ifdef _LZMA_IN_CB + ILzmaInCallback *InCallback, + #else + const unsigned char *inStream, SizeT inSize, SizeT *inSizeProcessed, + #endif + unsigned char *outStream, SizeT outSize, SizeT *outSizeProcessed) +{ + CProb *p = vs->Probs; + SizeT nowPos = 0; + Byte previousByte = 0; + UInt32 posStateMask = (1 << (vs->Properties.pb)) - 1; + UInt32 literalPosMask = (1 << (vs->Properties.lp)) - 1; + int lc = vs->Properties.lc; + + #ifdef _LZMA_OUT_READ + + UInt32 Range = vs->Range; + UInt32 Code = vs->Code; + #ifdef _LZMA_IN_CB + const Byte *Buffer = vs->Buffer; + const Byte *BufferLim = vs->BufferLim; + #else + const Byte *Buffer = inStream; + const Byte *BufferLim = inStream + inSize; + #endif + int state = vs->State; + UInt32 rep0 = vs->Reps[0], rep1 = vs->Reps[1], rep2 = vs->Reps[2], rep3 = vs->Reps[3]; + int len = vs->RemainLen; + UInt32 globalPos = vs->GlobalPos; + UInt32 distanceLimit = vs->DistanceLimit; + + Byte *dictionary = vs->Dictionary; + UInt32 dictionarySize = vs->Properties.DictionarySize; + UInt32 dictionaryPos = vs->DictionaryPos; + + Byte tempDictionary[4]; + + #ifndef _LZMA_IN_CB + *inSizeProcessed = 0; + #endif + *outSizeProcessed = 0; + if (len == kLzmaStreamWasFinishedId) + return LZMA_RESULT_OK; + + if (dictionarySize == 0) + { + dictionary = tempDictionary; + dictionarySize = 1; + tempDictionary[0] = vs->TempDictionary[0]; + } + + if (len == kLzmaNeedInitId) + { + { + UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (lc + vs->Properties.lp)); + UInt32 i; + for (i = 0; i < numProbs; i++) + p[i] = kBitModelTotal >> 1; + rep0 = rep1 = rep2 = rep3 = 1; + state = 0; + globalPos = 0; + distanceLimit = 0; + dictionaryPos = 0; + dictionary[dictionarySize - 1] = 0; + #ifdef _LZMA_IN_CB + RC_INIT; + #else + RC_INIT(inStream, inSize); + #endif + } + len = 0; + } + while(len != 0 && nowPos < outSize) + { + UInt32 pos = dictionaryPos - rep0; + if (pos >= dictionarySize) + pos += dictionarySize; + outStream[nowPos++] = dictionary[dictionaryPos] = dictionary[pos]; + if (++dictionaryPos == dictionarySize) + dictionaryPos = 0; + len--; + } + if (dictionaryPos == 0) + previousByte = dictionary[dictionarySize - 1]; + else + previousByte = dictionary[dictionaryPos - 1]; + + #else /* if !_LZMA_OUT_READ */ + + int state = 0; + UInt32 rep0 = 1, rep1 = 1, rep2 = 1, rep3 = 1; + int len = 0; + const Byte *Buffer; + const Byte *BufferLim; + UInt32 Range; + UInt32 Code; + + #ifndef _LZMA_IN_CB + *inSizeProcessed = 0; + #endif + *outSizeProcessed = 0; + + { + UInt32 i; + UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (lc + vs->Properties.lp)); + for (i = 0; i < numProbs; i++) + p[i] = kBitModelTotal >> 1; + } + + #ifdef _LZMA_IN_CB + RC_INIT; + #else + RC_INIT(inStream, inSize); + #endif + + #endif /* _LZMA_OUT_READ */ + + while(nowPos < outSize) + { + CProb *prob; + UInt32 bound; + int posState = (int)( + (nowPos + #ifdef _LZMA_OUT_READ + + globalPos + #endif + ) + & posStateMask); + + prob = p + IsMatch + (state << kNumPosBitsMax) + posState; + IfBit0(prob) + { + int symbol = 1; + UpdateBit0(prob) + prob = p + Literal + (LZMA_LIT_SIZE * + ((( + (nowPos + #ifdef _LZMA_OUT_READ + + globalPos + #endif + ) + & literalPosMask) << lc) + (previousByte >> (8 - lc)))); + + if (state >= kNumLitStates) + { + int matchByte; + #ifdef _LZMA_OUT_READ + UInt32 pos = dictionaryPos - rep0; + if (pos >= dictionarySize) + pos += dictionarySize; + matchByte = dictionary[pos]; + #else + matchByte = outStream[nowPos - rep0]; + #endif + do + { + int bit; + CProb *probLit; + matchByte <<= 1; + bit = (matchByte & 0x100); + probLit = prob + 0x100 + bit + symbol; + RC_GET_BIT2(probLit, symbol, if (bit != 0) break, if (bit == 0) break) + } + while (symbol < 0x100); + } + while (symbol < 0x100) + { + CProb *probLit = prob + symbol; + RC_GET_BIT(probLit, symbol) + } + previousByte = (Byte)symbol; + + outStream[nowPos++] = previousByte; + #ifdef _LZMA_OUT_READ + if (distanceLimit < dictionarySize) + distanceLimit++; + + dictionary[dictionaryPos] = previousByte; + if (++dictionaryPos == dictionarySize) + dictionaryPos = 0; + #endif + if (state < 4) state = 0; + else if (state < 10) state -= 3; + else state -= 6; + } + else + { + UpdateBit1(prob); + prob = p + IsRep + state; + IfBit0(prob) + { + UpdateBit0(prob); + rep3 = rep2; + rep2 = rep1; + rep1 = rep0; + state = state < kNumLitStates ? 0 : 3; + prob = p + LenCoder; + } + else + { + UpdateBit1(prob); + prob = p + IsRepG0 + state; + IfBit0(prob) + { + UpdateBit0(prob); + prob = p + IsRep0Long + (state << kNumPosBitsMax) + posState; + IfBit0(prob) + { + #ifdef _LZMA_OUT_READ + UInt32 pos; + #endif + UpdateBit0(prob); + + #ifdef _LZMA_OUT_READ + if (distanceLimit == 0) + #else + if (nowPos == 0) + #endif + return LZMA_RESULT_DATA_ERROR; + + state = state < kNumLitStates ? 9 : 11; + #ifdef _LZMA_OUT_READ + pos = dictionaryPos - rep0; + if (pos >= dictionarySize) + pos += dictionarySize; + previousByte = dictionary[pos]; + dictionary[dictionaryPos] = previousByte; + if (++dictionaryPos == dictionarySize) + dictionaryPos = 0; + #else + previousByte = outStream[nowPos - rep0]; + #endif + outStream[nowPos++] = previousByte; + #ifdef _LZMA_OUT_READ + if (distanceLimit < dictionarySize) + distanceLimit++; + #endif + + continue; + } + else + { + UpdateBit1(prob); + } + } + else + { + UInt32 distance; + UpdateBit1(prob); + prob = p + IsRepG1 + state; + IfBit0(prob) + { + UpdateBit0(prob); + distance = rep1; + } + else + { + UpdateBit1(prob); + prob = p + IsRepG2 + state; + IfBit0(prob) + { + UpdateBit0(prob); + distance = rep2; + } + else + { + UpdateBit1(prob); + distance = rep3; + rep3 = rep2; + } + rep2 = rep1; + } + rep1 = rep0; + rep0 = distance; + } + state = state < kNumLitStates ? 8 : 11; + prob = p + RepLenCoder; + } + { + int numBits, offset; + CProb *probLen = prob + LenChoice; + IfBit0(probLen) + { + UpdateBit0(probLen); + probLen = prob + LenLow + (posState << kLenNumLowBits); + offset = 0; + numBits = kLenNumLowBits; + } + else + { + UpdateBit1(probLen); + probLen = prob + LenChoice2; + IfBit0(probLen) + { + UpdateBit0(probLen); + probLen = prob + LenMid + (posState << kLenNumMidBits); + offset = kLenNumLowSymbols; + numBits = kLenNumMidBits; + } + else + { + UpdateBit1(probLen); + probLen = prob + LenHigh; + offset = kLenNumLowSymbols + kLenNumMidSymbols; + numBits = kLenNumHighBits; + } + } + RangeDecoderBitTreeDecode(probLen, numBits, len); + len += offset; + } + + if (state < 4) + { + int posSlot; + state += kNumLitStates; + prob = p + PosSlot + + ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) << + kNumPosSlotBits); + RangeDecoderBitTreeDecode(prob, kNumPosSlotBits, posSlot); + if (posSlot >= kStartPosModelIndex) + { + int numDirectBits = ((posSlot >> 1) - 1); + rep0 = (2 | ((UInt32)posSlot & 1)); + if (posSlot < kEndPosModelIndex) + { + rep0 <<= numDirectBits; + prob = p + SpecPos + rep0 - posSlot - 1; + } + else + { + numDirectBits -= kNumAlignBits; + do + { + RC_NORMALIZE + Range >>= 1; + rep0 <<= 1; + if (Code >= Range) + { + Code -= Range; + rep0 |= 1; + } + } + while (--numDirectBits != 0); + prob = p + Align; + rep0 <<= kNumAlignBits; + numDirectBits = kNumAlignBits; + } + { + int i = 1; + int mi = 1; + do + { + CProb *prob3 = prob + mi; + RC_GET_BIT2(prob3, mi, ; , rep0 |= i); + i <<= 1; + } + while(--numDirectBits != 0); + } + } + else + rep0 = posSlot; + if (++rep0 == (UInt32)(0)) + { + /* it's for stream version */ + len = kLzmaStreamWasFinishedId; + break; + } + } + + len += kMatchMinLen; + #ifdef _LZMA_OUT_READ + if (rep0 > distanceLimit) + #else + if (rep0 > nowPos) + #endif + return LZMA_RESULT_DATA_ERROR; + + #ifdef _LZMA_OUT_READ + if (dictionarySize - distanceLimit > (UInt32)len) + distanceLimit += len; + else + distanceLimit = dictionarySize; + #endif + + do + { + #ifdef _LZMA_OUT_READ + UInt32 pos = dictionaryPos - rep0; + if (pos >= dictionarySize) + pos += dictionarySize; + previousByte = dictionary[pos]; + dictionary[dictionaryPos] = previousByte; + if (++dictionaryPos == dictionarySize) + dictionaryPos = 0; + #else + previousByte = outStream[nowPos - rep0]; + #endif + len--; + outStream[nowPos++] = previousByte; + } + while(len != 0 && nowPos < outSize); + } + } + RC_NORMALIZE; + + #ifdef _LZMA_OUT_READ + vs->Range = Range; + vs->Code = Code; + vs->DictionaryPos = dictionaryPos; + vs->GlobalPos = globalPos + (UInt32)nowPos; + vs->DistanceLimit = distanceLimit; + vs->Reps[0] = rep0; + vs->Reps[1] = rep1; + vs->Reps[2] = rep2; + vs->Reps[3] = rep3; + vs->State = state; + vs->RemainLen = len; + vs->TempDictionary[0] = tempDictionary[0]; + #endif + + #ifdef _LZMA_IN_CB + vs->Buffer = Buffer; + vs->BufferLim = BufferLim; + #else + *inSizeProcessed = (SizeT)(Buffer - inStream); + #endif + *outSizeProcessed = nowPos; + return LZMA_RESULT_OK; +} diff --git a/src/archivers/7z/LzmaDecode.h b/src/archivers/7z/LzmaDecode.h new file mode 100644 index 00000000..8382fa85 --- /dev/null +++ b/src/archivers/7z/LzmaDecode.h @@ -0,0 +1,113 @@ +/* + LzmaDecode.h + LZMA Decoder interface + + LZMA SDK 4.40 Copyright (c) 1999-2006 Igor Pavlov (2006-05-01) + http://www.7-zip.org/ + + LZMA SDK is licensed under two licenses: + 1) GNU Lesser General Public License (GNU LGPL) + 2) Common Public License (CPL) + It means that you can select one of these two licenses and + follow rules of that license. + + SPECIAL EXCEPTION: + Igor Pavlov, as the author of this code, expressly permits you to + statically or dynamically link your code (or bind by name) to the + interfaces of this file without subjecting your linked code to the + terms of the CPL or GNU LGPL. Any modifications or additions + to this file, however, are subject to the LGPL or CPL terms. +*/ + +#ifndef __LZMADECODE_H +#define __LZMADECODE_H + +#include "LzmaTypes.h" + +/* #define _LZMA_IN_CB */ +/* Use callback for input data */ + +/* #define _LZMA_OUT_READ */ +/* Use read function for output data */ + +/* #define _LZMA_PROB32 */ +/* It can increase speed on some 32-bit CPUs, + but memory usage will be doubled in that case */ + +/* #define _LZMA_LOC_OPT */ +/* Enable local speed optimizations inside code */ + +#ifdef _LZMA_PROB32 +#define CProb UInt32 +#else +#define CProb UInt16 +#endif + +#define LZMA_RESULT_OK 0 +#define LZMA_RESULT_DATA_ERROR 1 + +#ifdef _LZMA_IN_CB +typedef struct _ILzmaInCallback +{ + int (*Read)(void *object, const unsigned char **buffer, SizeT *bufferSize); +} ILzmaInCallback; +#endif + +#define LZMA_BASE_SIZE 1846 +#define LZMA_LIT_SIZE 768 + +#define LZMA_PROPERTIES_SIZE 5 + +typedef struct _CLzmaProperties +{ + int lc; + int lp; + int pb; + #ifdef _LZMA_OUT_READ + UInt32 DictionarySize; + #endif +}CLzmaProperties; + +int LzmaDecodeProperties(CLzmaProperties *propsRes, const unsigned char *propsData, int size); + +#define LzmaGetNumProbs(Properties) (LZMA_BASE_SIZE + (LZMA_LIT_SIZE << ((Properties)->lc + (Properties)->lp))) + +#define kLzmaNeedInitId (-2) + +typedef struct _CLzmaDecoderState +{ + CLzmaProperties Properties; + CProb *Probs; + + #ifdef _LZMA_IN_CB + const unsigned char *Buffer; + const unsigned char *BufferLim; + #endif + + #ifdef _LZMA_OUT_READ + unsigned char *Dictionary; + UInt32 Range; + UInt32 Code; + UInt32 DictionaryPos; + UInt32 GlobalPos; + UInt32 DistanceLimit; + UInt32 Reps[4]; + int State; + int RemainLen; + unsigned char TempDictionary[4]; + #endif +} CLzmaDecoderState; + +#ifdef _LZMA_OUT_READ +#define LzmaDecoderInit(vs) { (vs)->RemainLen = kLzmaNeedInitId; } +#endif + +int LzmaDecode(CLzmaDecoderState *vs, + #ifdef _LZMA_IN_CB + ILzmaInCallback *inCallback, + #else + const unsigned char *inStream, SizeT inSize, SizeT *inSizeProcessed, + #endif + unsigned char *outStream, SizeT outSize, SizeT *outSizeProcessed); + +#endif diff --git a/src/archivers/7z/LzmaTypes.h b/src/archivers/7z/LzmaTypes.h new file mode 100644 index 00000000..4a1f7db4 --- /dev/null +++ b/src/archivers/7z/LzmaTypes.h @@ -0,0 +1,45 @@ +/* +LzmaTypes.h + +Types for LZMA Decoder + +This file written and distributed to public domain by Igor Pavlov. +This file is part of LZMA SDK 4.40 (2006-05-01) +*/ + +#ifndef __LZMATYPES_H +#define __LZMATYPES_H + +#ifndef _7ZIP_BYTE_DEFINED +#define _7ZIP_BYTE_DEFINED +typedef unsigned char Byte; +#endif + +#ifndef _7ZIP_UINT16_DEFINED +#define _7ZIP_UINT16_DEFINED +typedef unsigned short UInt16; +#endif + +#ifndef _7ZIP_UINT32_DEFINED +#define _7ZIP_UINT32_DEFINED +#ifdef _LZMA_UINT32_IS_ULONG +typedef unsigned long UInt32; +#else +typedef unsigned int UInt32; +#endif +#endif + +/* #define _LZMA_SYSTEM_SIZE_T */ +/* Use system's size_t. You can use it to enable 64-bit sizes supporting */ + +#ifndef _7ZIP_SIZET_DEFINED +#define _7ZIP_SIZET_DEFINED +#ifdef _LZMA_SYSTEM_SIZE_T +#include +typedef size_t SizeT; +#else +typedef UInt32 SizeT; +#endif +#endif + +#endif diff --git a/src/archivers/dms/cdata.h b/src/archivers/dms/cdata.h new file mode 100644 index 00000000..b5e77e09 --- /dev/null +++ b/src/archivers/dms/cdata.h @@ -0,0 +1,80 @@ + +/* + * xDMS v1.3 - Portable DMS archive unpacker - Public Domain + * Written by Andre Rodrigues de la Rocha + * + * Main types of variables used in xDMS, some implementation + * dependant features and other global stuff + */ + + +#ifndef UCHAR +#define UCHAR unsigned char +#endif + +#ifndef USHORT +#define USHORT unsigned short +#endif + +#ifndef SHORT +#define SHORT short +#endif + +#ifndef ULONG +#define ULONG unsigned long +#endif + + + +#ifndef INLINE + #ifdef __cplusplus + #define INLINE inline + #else + #ifdef __GNUC__ + #define INLINE inline + #else + #ifdef __SASC + #define INLINE __inline + #else + #define INLINE static + #endif + #endif + #endif +#endif + + +#ifndef UNDER_DOS + #ifdef __MSDOS__ + #define UNDER_DOS + #else + #ifdef __MSDOS + #define UNDER_DOS + #else + #ifdef _OS2 + #define UNDER_DOS + #else + #ifdef _QC + #define UNDER_DOS + #endif + #endif + #endif + #endif +#endif + + +#ifndef DIR_CHAR + #ifdef UNDER_DOS + /* running under MSDOS or DOS-like OS */ + #define DIR_CHAR '\\' + #else + #define DIR_CHAR '/' + #endif +#endif + + +#define DIR_SEPARATORS ":\\/" + + +extern UCHAR *text; + + diff --git a/src/archivers/dms/crc_csum.cpp b/src/archivers/dms/crc_csum.cpp new file mode 100644 index 00000000..70337c62 --- /dev/null +++ b/src/archivers/dms/crc_csum.cpp @@ -0,0 +1,69 @@ + +/* + * xDMS v1.3 - Portable DMS archive unpacker - Public Domain + * Written by Andre Rodrigues de la Rocha + * + * CRC16 & CheckSum16 calculation functions + * CreateCRC was written (aparently) by Bjorn Stenberg + * + */ + + +#include "cdata.h" +#include "crc_csum.h" + + + +USHORT Calc_CheckSum(UCHAR *mem, ULONG size){ + USHORT u=0; + + while(size--) u += *mem++; + return (USHORT)(u & 0xffff); +} + + + +USHORT CreateCRC(UCHAR* mem, ULONG size ){ + static USHORT CRCTab[256]={ + 0x0000,0xC0C1,0xC181,0x0140,0xC301,0x03C0,0x0280,0xC241, + 0xC601,0x06C0,0x0780,0xC741,0x0500,0xC5C1,0xC481,0x0440, + 0xCC01,0x0CC0,0x0D80,0xCD41,0x0F00,0xCFC1,0xCE81,0x0E40, + 0x0A00,0xCAC1,0xCB81,0x0B40,0xC901,0x09C0,0x0880,0xC841, + 0xD801,0x18C0,0x1980,0xD941,0x1B00,0xDBC1,0xDA81,0x1A40, + 0x1E00,0xDEC1,0xDF81,0x1F40,0xDD01,0x1DC0,0x1C80,0xDC41, + 0x1400,0xD4C1,0xD581,0x1540,0xD701,0x17C0,0x1680,0xD641, + 0xD201,0x12C0,0x1380,0xD341,0x1100,0xD1C1,0xD081,0x1040, + 0xF001,0x30C0,0x3180,0xF141,0x3300,0xF3C1,0xF281,0x3240, + 0x3600,0xF6C1,0xF781,0x3740,0xF501,0x35C0,0x3480,0xF441, + 0x3C00,0xFCC1,0xFD81,0x3D40,0xFF01,0x3FC0,0x3E80,0xFE41, + 0xFA01,0x3AC0,0x3B80,0xFB41,0x3900,0xF9C1,0xF881,0x3840, + 0x2800,0xE8C1,0xE981,0x2940,0xEB01,0x2BC0,0x2A80,0xEA41, + 0xEE01,0x2EC0,0x2F80,0xEF41,0x2D00,0xEDC1,0xEC81,0x2C40, + 0xE401,0x24C0,0x2580,0xE541,0x2700,0xE7C1,0xE681,0x2640, + 0x2200,0xE2C1,0xE381,0x2340,0xE101,0x21C0,0x2080,0xE041, + 0xA001,0x60C0,0x6180,0xA141,0x6300,0xA3C1,0xA281,0x6240, + 0x6600,0xA6C1,0xA781,0x6740,0xA501,0x65C0,0x6480,0xA441, + 0x6C00,0xACC1,0xAD81,0x6D40,0xAF01,0x6FC0,0x6E80,0xAE41, + 0xAA01,0x6AC0,0x6B80,0xAB41,0x6900,0xA9C1,0xA881,0x6840, + 0x7800,0xB8C1,0xB981,0x7940,0xBB01,0x7BC0,0x7A80,0xBA41, + 0xBE01,0x7EC0,0x7F80,0xBF41,0x7D00,0xBDC1,0xBC81,0x7C40, + 0xB401,0x74C0,0x7580,0xB541,0x7700,0xB7C1,0xB681,0x7640, + 0x7200,0xB2C1,0xB381,0x7340,0xB101,0x71C0,0x7080,0xB041, + 0x5000,0x90C1,0x9181,0x5140,0x9301,0x53C0,0x5280,0x9241, + 0x9601,0x56C0,0x5780,0x9741,0x5500,0x95C1,0x9481,0x5440, + 0x9C01,0x5CC0,0x5D80,0x9D41,0x5F00,0x9FC1,0x9E81,0x5E40, + 0x5A00,0x9AC1,0x9B81,0x5B40,0x9901,0x59C0,0x5880,0x9841, + 0x8801,0x48C0,0x4980,0x8941,0x4B00,0x8BC1,0x8A81,0x4A40, + 0x4E00,0x8EC1,0x8F81,0x4F40,0x8D01,0x4DC0,0x4C80,0x8C41, + 0x4400,0x84C1,0x8581,0x4540,0x8701,0x47C0,0x4680,0x8641, + 0x8201,0x42C0,0x4380,0x8341,0x4100,0x81C1,0x8081,0x4040 + }; + register USHORT CRC = 0; + + while(size--) + CRC = (USHORT) (CRCTab[((CRC ^ *mem++) & 255)] ^ ((CRC >> 8) & 255)); + + return CRC; +} + + diff --git a/src/archivers/dms/crc_csum.h b/src/archivers/dms/crc_csum.h new file mode 100644 index 00000000..0fa92f50 --- /dev/null +++ b/src/archivers/dms/crc_csum.h @@ -0,0 +1,4 @@ + +USHORT Calc_CheckSum(UCHAR *, ULONG); +USHORT CreateCRC(UCHAR *, ULONG); + diff --git a/src/archivers/dms/getbits.cpp b/src/archivers/dms/getbits.cpp new file mode 100644 index 00000000..bfaa835c --- /dev/null +++ b/src/archivers/dms/getbits.cpp @@ -0,0 +1,34 @@ + +/* + * xDMS v1.3 - Portable DMS archive unpacker - Public Domain + * Written by Andre Rodrigues de la Rocha + * Functions/macros to get a variable number of bits + * + */ + +#include "cdata.h" +#include "getbits.h" + + +ULONG mask_bits[]={ + 0x000000L,0x000001L,0x000003L,0x000007L,0x00000fL,0x00001fL, + 0x00003fL,0x00007fL,0x0000ffL,0x0001ffL,0x0003ffL,0x0007ffL, + 0x000fffL,0x001fffL,0x003fffL,0x007fffL,0x00ffffL,0x01ffffL, + 0x03ffffL,0x07ffffL,0x0fffffL,0x1fffffL,0x3fffffL,0x7fffffL, + 0xffffffL +}; + + +UCHAR *indata, bitcount; +ULONG bitbuf; + + + +void initbitbuf(UCHAR *in){ + bitbuf = 0; + bitcount = 0; + indata = in; + DROPBITS(0); +} + + diff --git a/src/archivers/dms/getbits.h b/src/archivers/dms/getbits.h new file mode 100644 index 00000000..f0c5adde --- /dev/null +++ b/src/archivers/dms/getbits.h @@ -0,0 +1,10 @@ + +extern ULONG mask_bits[], bitbuf; +extern UCHAR *indata, bitcount; + +#define GETBITS(n) ((USHORT)(bitbuf >> (bitcount-(n)))) +#define DROPBITS(n) {bitbuf &= mask_bits[bitcount-=(n)]; while (bitcount<16) {bitbuf = (bitbuf << 8) | *indata++; bitcount += 8;}} + + +void initbitbuf(UCHAR *); + diff --git a/src/archivers/dms/maketbl.cpp b/src/archivers/dms/maketbl.cpp new file mode 100644 index 00000000..c735988c --- /dev/null +++ b/src/archivers/dms/maketbl.cpp @@ -0,0 +1,92 @@ + +/* + * xDMS v1.3 - Portable DMS archive unpacker - Public Domain + * Written by Andre Rodrigues de la Rocha + * + * Makes decoding table for Heavy LZH decompression + * From UNIX LHA made by Masaru Oki + * + */ + + +#include "cdata.h" +#include "maketbl.h" + + +static SHORT c; +static USHORT n, tblsiz, len, depth, maxdepth, avail; +static USHORT codeword, bit, *tbl, TabErr; +static UCHAR *blen; + + +static USHORT mktbl(void); + + + +USHORT make_table(USHORT nchar, UCHAR bitlen[],USHORT tablebits, USHORT table[]){ + n = avail = nchar; + blen = bitlen; + tbl = table; + tblsiz = (USHORT) (1U << tablebits); + bit = (USHORT) (tblsiz / 2); + maxdepth = (USHORT)(tablebits + 1); + depth = len = 1; + c = -1; + codeword = 0; + TabErr = 0; + mktbl(); /* left subtree */ + if (TabErr) return TabErr; + mktbl(); /* right subtree */ + if (TabErr) return TabErr; + if (codeword != tblsiz) return 5; + return 0; +} + + + +static USHORT mktbl(void){ + USHORT i=0; + + if (TabErr) return 0; + + if (len == depth) { + while (++c < n) + if (blen[c] == len) { + i = codeword; + codeword += bit; + if (codeword > tblsiz) { + TabErr=1; + return 0; + } + while (i < codeword) tbl[i++] = (USHORT)c; + return (USHORT)c; + } + c = -1; + len++; + bit >>= 1; + } + depth++; + if (depth < maxdepth) { + mktbl(); + mktbl(); + } else if (depth > 32) { + TabErr = 2; + return 0; + } else { + if ((i = avail++) >= 2 * n - 1) { + TabErr = 3; + return 0; + } + left[i] = mktbl(); + right[i] = mktbl(); + if (codeword >= tblsiz) { + TabErr = 4; + return 0; + } + if (depth == maxdepth) tbl[codeword++] = i; + } + depth--; + return i; +} + + diff --git a/src/archivers/dms/maketbl.h b/src/archivers/dms/maketbl.h new file mode 100644 index 00000000..42abc3e7 --- /dev/null +++ b/src/archivers/dms/maketbl.h @@ -0,0 +1,5 @@ + +extern USHORT left[], right[]; + +USHORT make_table(USHORT nchar, UCHAR bitlen[], USHORT tablebits, USHORT table[]); + diff --git a/src/archivers/dms/pfile.cpp b/src/archivers/dms/pfile.cpp new file mode 100644 index 00000000..540d47e0 --- /dev/null +++ b/src/archivers/dms/pfile.cpp @@ -0,0 +1,464 @@ + +/* + * xDMS v1.3 - Portable DMS archive unpacker - Public Domain + * Written by Andre Rodrigues de la Rocha + * + * Handles the processing of a single DMS archive + * + */ + + +#define HEADLEN 56 +#define THLEN 20 +#define TRACK_BUFFER_LEN 32000 +#define TEMP_BUFFER_LEN 32000 + + +#include +#include +#include +#include + +#include "sysconfig.h" +#include "sysdeps.h" +#include "zfile.h" + +#include "cdata.h" +#include "u_init.h" +#include "u_rle.h" +#include "u_quick.h" +#include "u_medium.h" +#include "u_deep.h" +#include "u_heavy.h" +#include "crc_csum.h" +#include "pfile.h" + + + +static USHORT Process_Track(struct zfile *, struct zfile *, UCHAR *, UCHAR *, USHORT, USHORT, USHORT); +static USHORT Unpack_Track(UCHAR *, UCHAR *, USHORT, USHORT, UCHAR, UCHAR, USHORT, USHORT, USHORT); +static void printbandiz(UCHAR *, USHORT); + +static int passfound, passretries; + +static char modes[7][7]={"NOCOMP","SIMPLE","QUICK ","MEDIUM","DEEP ","HEAVY1","HEAVY2"}; +static USHORT PWDCRC; + +UCHAR *text; + +static void log_error(int track) +{ + write_log ("DMS: Ignored error on track %d!\n", track); +} + +USHORT DMS_Process_File(struct zfile *fi, struct zfile *fo, USHORT cmd, USHORT opt, USHORT PCRC, USHORT pwd){ + USHORT from, to, geninfo, c_version, cmode, hcrc, disktype, pv, ret; + ULONG pkfsize, unpkfsize; + UCHAR *b1, *b2; + time_t date; + + + passfound = 0; + passretries = 2; + b1 = (UCHAR *)calloc((size_t)TRACK_BUFFER_LEN,1); + if (!b1) return ERR_NOMEMORY; + b2 = (UCHAR *)calloc((size_t)TRACK_BUFFER_LEN,1); + if (!b2) { + free(b1); + return ERR_NOMEMORY; + } + text = (UCHAR *)calloc((size_t)TEMP_BUFFER_LEN,1); + if (!text) { + free(b1); + free(b2); + return ERR_NOMEMORY; + } + + /* if iname is NULL, input is stdin; if oname is NULL, output is stdout */ + + if (zfile_fread(b1,1,HEADLEN,fi) != HEADLEN) { + free(b1); + free(b2); + free(text); + return ERR_SREAD; + } + + if ( (b1[0] != 'D') || (b1[1] != 'M') || (b1[2] != 'S') || (b1[3] != '!') ) { + /* Check the first 4 bytes of file to see if it is "DMS!" */ + free(b1); + free(b2); + free(text); + return ERR_NOTDMS; + } + + hcrc = (USHORT)((b1[HEADLEN-2]<<8) | b1[HEADLEN-1]); + /* Header CRC */ + + if (hcrc != CreateCRC(b1+4,(ULONG)(HEADLEN-6))) { + free(b1); + free(b2); + free(text); + return ERR_HCRC; + } + + geninfo = (USHORT) ((b1[10]<<8) | b1[11]); /* General info about archive */ + date = (time_t) ((((ULONG)b1[12])<<24) | (((ULONG)b1[13])<<16) | (((ULONG)b1[14])<<8) | (ULONG)b1[15]); /* date in standard UNIX/ANSI format */ + from = (USHORT) ((b1[16]<<8) | b1[17]); /* Lowest track in archive. May be incorrect if archive is "appended" */ + to = (USHORT) ((b1[18]<<8) | b1[19]); /* Highest track in archive. May be incorrect if archive is "appended" */ + + pkfsize = (ULONG) ((((ULONG)b1[21])<<16) | (((ULONG)b1[22])<<8) | (ULONG)b1[23]); /* Length of total packed data as in archive */ + unpkfsize = (ULONG) ((((ULONG)b1[25])<<16) | (((ULONG)b1[26])<<8) | (ULONG)b1[27]); /* Length of unpacked data. Usually 901120 bytes */ + + c_version = (USHORT) ((b1[46]<<8) | b1[47]); /* version of DMS used to generate it */ + disktype = (USHORT) ((b1[50]<<8) | b1[51]); /* Type of compressed disk */ + cmode = (USHORT) ((b1[52]<<8) | b1[53]); /* Compression mode mostly used in this archive */ + + PWDCRC = PCRC; + + if ( (cmd == CMD_VIEW) || (cmd == CMD_VIEWFULL) ) { + + pv = (USHORT)(c_version/100); + write_log(" Created with DMS version %d.%02d ",pv,c_version-pv*100); + if (geninfo & 0x80) + write_log("Registered\n"); + else + write_log("Evaluation\n"); + + write_log(" Creation date : %s",ctime(&date)); + write_log(" Lowest track in archive : %d\n",from); + write_log(" Highest track in archive : %d\n",to); + write_log(" Packed data size : %lu\n",pkfsize); + write_log(" Unpacked data size : %lu\n",unpkfsize); + write_log(" Disk type of archive : "); + + /* The original DMS from SDS software (DMS up to 1.11) used other values */ + /* in disk type to indicate formats as MS-DOS, AMax and Mac, but it was */ + /* not suported for compression. It was for future expansion and was never */ + /* used. The newer versions of DMS made by ParCon Software changed it to */ + /* add support for new Amiga disk types. */ + switch (disktype) { + case 0: + case 1: + /* Can also be a non-dos disk */ + write_log("AmigaOS 1.0 OFS\n"); + break; + case 2: + write_log("AmigaOS 2.0 FFS\n"); + break; + case 3: + write_log("AmigaOS 3.0 OFS / International\n"); + break; + case 4: + write_log("AmigaOS 3.0 FFS / International\n"); + break; + case 5: + write_log("AmigaOS 3.0 OFS / Dir Cache\n"); + break; + case 6: + write_log("AmigaOS 3.0 FFS / Dir Cache\n"); + break; + case 7: + write_log("FMS Amiga System File\n"); + break; + default: + write_log("Unknown\n"); + } + + write_log(" Compression mode used : "); + if (cmode>6) + write_log("Unknown !\n"); + else + write_log("%s\n",modes[cmode]); + + write_log(" General info : "); + if ((geninfo==0)||(geninfo==0x80)) write_log("None"); + if (geninfo & 1) write_log("NoZero "); + if (geninfo & 2) write_log("Encrypted "); + if (geninfo & 4) write_log("Appends "); + if (geninfo & 8) write_log("Banner "); + if (geninfo & 16) write_log("HD "); + if (geninfo & 32) write_log("MS-DOS "); + if (geninfo & 64) write_log("DMS_DEV_Fixed "); + if (geninfo & 256) write_log("FILEID.DIZ"); + write_log("\n"); + + write_log(" Info Header CRC : %04X\n\n",hcrc); + + } + + if (disktype == 7) { + /* It's not a DMS compressed disk image, but a FMS archive */ + free(b1); + free(b2); + free(text); + return ERR_FMS; + } + + + if (cmd == CMD_VIEWFULL) { + write_log(" Track Plength Ulength Cmode USUM HCRC DCRC Cflag\n"); + write_log(" ------ ------- ------- ------ ---- ---- ---- -----\n"); + } + +// if (((cmd==CMD_UNPACK) || (cmd==CMD_SHOWBANNER)) && (geninfo & 2) && (!pwd)) +// return ERR_NOPASSWD; + + ret=NO_PROBLEM; + + Init_Decrunchers(); + + if (cmd != CMD_VIEW) { + if (cmd == CMD_SHOWBANNER) /* Banner is in the first track */ + ret = Process_Track(fi,NULL,b1,b2,cmd,opt,(geninfo & 2)?pwd:0); + else { + while ( (ret=Process_Track(fi,fo,b1,b2,cmd,opt,(geninfo & 2)?pwd:0)) == NO_PROBLEM ) ; + } + } + + if ((cmd == CMD_VIEWFULL) || (cmd == CMD_SHOWDIZ) || (cmd == CMD_SHOWBANNER)) write_log("\n"); + + if (ret == DMS_FILE_END) ret = NO_PROBLEM; + + + /* Used to give an error message, but I have seen some DMS */ + /* files with texts or zeros at the end of the valid data */ + /* So, when we find something that is not a track header, */ + /* we suppose that the valid data is over. And say it's ok. */ + if (ret == ERR_NOTTRACK) ret = NO_PROBLEM; + + + free(b1); + free(b2); + free(text); + + return ret; +} + + + +static USHORT Process_Track(struct zfile *fi, struct zfile *fo, UCHAR *b1, UCHAR *b2, USHORT cmd, USHORT opt, USHORT pwd){ + USHORT hcrc, dcrc, usum, number, pklen1, pklen2, unpklen, l; + UCHAR cmode, flags; + int crcerr = 0; + + + l = (USHORT)zfile_fread(b1,1,THLEN,fi); + + if (l != THLEN) { + if (l==0) + return DMS_FILE_END; + else + return ERR_SREAD; + } + + /* "TR" identifies a Track Header */ + if ((b1[0] != 'T')||(b1[1] != 'R')) return ERR_NOTTRACK; + + /* Track Header CRC */ + hcrc = (USHORT)((b1[THLEN-2] << 8) | b1[THLEN-1]); + + if (CreateCRC(b1,(ULONG)(THLEN-2)) != hcrc) return ERR_THCRC; + + number = (USHORT)((b1[2] << 8) | b1[3]); /* Number of track */ + pklen1 = (USHORT)((b1[6] << 8) | b1[7]); /* Length of packed track data as in archive */ + pklen2 = (USHORT)((b1[8] << 8) | b1[9]); /* Length of data after first unpacking */ + unpklen = (USHORT)((b1[10] << 8) | b1[11]); /* Length of data after subsequent rle unpacking */ + flags = b1[12]; /* control flags */ + cmode = b1[13]; /* compression mode used */ + usum = (USHORT)((b1[14] << 8) | b1[15]); /* Track Data CheckSum AFTER unpacking */ + dcrc = (USHORT)((b1[16] << 8) | b1[17]); /* Track Data CRC BEFORE unpacking */ + + if (cmd == CMD_VIEWFULL) { + if (number==80) + write_log(" FileID "); + else if (number==0xffff) + write_log(" Banner "); + else if ((number==0) && (unpklen==1024)) + write_log(" FakeBB "); + else + write_log(" %2d ",(short)number); + + write_log("%5d %5d %s %04X %04X %04X %0d\n", pklen1, unpklen, modes[cmode], usum, hcrc, dcrc, flags); + } + + if ((pklen1 > TRACK_BUFFER_LEN) || (pklen2 >TRACK_BUFFER_LEN) || (unpklen > TRACK_BUFFER_LEN)) return ERR_BIGTRACK; + + if (zfile_fread(b1,1,(size_t)pklen1,fi) != pklen1) return ERR_SREAD; + + if (CreateCRC(b1,(ULONG)pklen1) != dcrc) { + log_error (number); + crcerr = 1; + } + /* track 80 is FILEID.DIZ, track 0xffff (-1) is Banner */ + /* and track 0 with 1024 bytes only is a fake boot block with more advertising */ + /* FILE_ID.DIZ is never encrypted */ + + //if (pwd && (number!=80)) dms_decrypt(b1,pklen1); + + if ((cmd == CMD_UNPACK) && (number<80) && (unpklen>2048)) { + memset(b2, 0, unpklen); + if (!crcerr) + Unpack_Track(b1, b2, pklen2, unpklen, cmode, flags, number, pklen1, usum); + if (zfile_fwrite(b2,1,(size_t)unpklen,fo) != unpklen) return ERR_CANTWRITE; + } + + if (crcerr) + return NO_PROBLEM; + + if ((cmd == CMD_SHOWBANNER) && (number == 0xffff)){ + Unpack_Track(b1, b2, pklen2, unpklen, cmode, flags, number, pklen1, usum); + printbandiz(b2,unpklen); + } + + if ((cmd == CMD_SHOWDIZ) && (number == 80)) { + Unpack_Track(b1, b2, pklen2, unpklen, cmode, flags, number, pklen1, usum); + printbandiz(b2,unpklen); + } + + return NO_PROBLEM; + +} + + + +static USHORT Unpack_Track_2(UCHAR *b1, UCHAR *b2, USHORT pklen2, USHORT unpklen, UCHAR cmode, UCHAR flags){ + switch (cmode){ + case 0: + /* No Compression */ + memcpy(b2,b1,(size_t)unpklen); + break; + case 1: + /* Simple Compression */ + if (Unpack_RLE(b1,b2,unpklen)) return ERR_BADDECR; + break; + case 2: + /* Quick Compression */ + if (Unpack_QUICK(b1,b2,pklen2)) return ERR_BADDECR; + if (Unpack_RLE(b2,b1,unpklen)) return ERR_BADDECR; + memcpy(b2,b1,(size_t)unpklen); + break; + case 3: + /* Medium Compression */ + if (Unpack_MEDIUM(b1,b2,pklen2)) return ERR_BADDECR; + if (Unpack_RLE(b2,b1,unpklen)) return ERR_BADDECR; + memcpy(b2,b1,(size_t)unpklen); + break; + case 4: + /* Deep Compression */ + if (Unpack_DEEP(b1,b2,pklen2)) return ERR_BADDECR; + if (Unpack_RLE(b2,b1,unpklen)) return ERR_BADDECR; + memcpy(b2,b1,(size_t)unpklen); + break; + case 5: + case 6: + /* Heavy Compression */ + if (cmode==5) { + /* Heavy 1 */ + if (Unpack_HEAVY(b1,b2,flags & 7,pklen2)) return ERR_BADDECR; + } else { + /* Heavy 2 */ + if (Unpack_HEAVY(b1,b2,flags | 8,pklen2)) return ERR_BADDECR; + } + if (flags & 4) { + /* Unpack with RLE only if this flag is set */ + if (Unpack_RLE(b2,b1,unpklen)) return ERR_BADDECR; + memcpy(b2,b1,(size_t)unpklen); + } + break; + default: + return ERR_UNKNMODE; + } + + if (!(flags & 1)) Init_Decrunchers(); + + return NO_PROBLEM; + +} + +/* DMS uses a lame encryption */ +static void dms_decrypt(UCHAR *p, USHORT len, UCHAR *src){ + USHORT t; + + while (len--){ + t = (USHORT) *src++; + *p++ = t ^ (UCHAR)PWDCRC; + PWDCRC = (USHORT)((PWDCRC >> 1) + t); + } +} + +static USHORT Unpack_Track(UCHAR *b1, UCHAR *b2, USHORT pklen2, USHORT unpklen, UCHAR cmode, UCHAR flags, USHORT number, USHORT pklen1, USHORT usum1) +{ + USHORT r, err = NO_PROBLEM; + static USHORT pass; + int maybeencrypted; + int pwrounds; + UCHAR *tmp; + USHORT prevpass = 0; + + if (passfound) { + if (number != 80) + dms_decrypt(b1, pklen1, b1); + r = Unpack_Track_2(b1, b2, pklen2, unpklen, cmode, flags); + if (r == NO_PROBLEM) { + if (usum1 == Calc_CheckSum(b2,(ULONG)unpklen)) + return NO_PROBLEM; + } + log_error(number); + if (passretries <= 0) + return ERR_CSUM; + } + + passretries--; + pwrounds = 0; + maybeencrypted = 0; + tmp = (unsigned char*)malloc (pklen1); + memcpy (tmp, b1, pklen1); + memset(b2, 0, unpklen); + for (;;) { + r = Unpack_Track_2(b1, b2, pklen2, unpklen, cmode, flags); + if (r == NO_PROBLEM) { + if (usum1 == Calc_CheckSum(b2,(ULONG)unpklen)) { + passfound = maybeencrypted; + if (passfound) + write_log("DMS: decryption key = 0x%04.4X\n", pass); + err = NO_PROBLEM; + pass = prevpass; + break; + } + } + if (number == 80) { + err = ERR_CSUM; + break; + } + maybeencrypted = 1; + prevpass = pass; + PWDCRC = pass; + pass++; + dms_decrypt(b1, pklen1, tmp); + pwrounds++; + if (pwrounds == 65536) { + err = ERR_CSUM; + passfound = 0; + break; + } + } + free (tmp); + return err; +} + + +static void printbandiz(UCHAR *m, USHORT len){ + UCHAR *i,*j; + + i=j=m; + while (i + * + * Tables used in Medium and Deep compression modes + * + */ + + +#include "cdata.h" +#include "tables.h" + + +UCHAR d_code[256] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, + 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, + 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, + 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, + 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, + 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, + 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, + 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, + 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, + 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, + 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, + 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, + 0x0B, 0x0B, 0x0B, 0x0B, 0x0B, 0x0B, 0x0B, 0x0B, + 0x0C, 0x0C, 0x0C, 0x0C, 0x0D, 0x0D, 0x0D, 0x0D, + 0x0E, 0x0E, 0x0E, 0x0E, 0x0F, 0x0F, 0x0F, 0x0F, + 0x10, 0x10, 0x10, 0x10, 0x11, 0x11, 0x11, 0x11, + 0x12, 0x12, 0x12, 0x12, 0x13, 0x13, 0x13, 0x13, + 0x14, 0x14, 0x14, 0x14, 0x15, 0x15, 0x15, 0x15, + 0x16, 0x16, 0x16, 0x16, 0x17, 0x17, 0x17, 0x17, + 0x18, 0x18, 0x19, 0x19, 0x1A, 0x1A, 0x1B, 0x1B, + 0x1C, 0x1C, 0x1D, 0x1D, 0x1E, 0x1E, 0x1F, 0x1F, + 0x20, 0x20, 0x21, 0x21, 0x22, 0x22, 0x23, 0x23, + 0x24, 0x24, 0x25, 0x25, 0x26, 0x26, 0x27, 0x27, + 0x28, 0x28, 0x29, 0x29, 0x2A, 0x2A, 0x2B, 0x2B, + 0x2C, 0x2C, 0x2D, 0x2D, 0x2E, 0x2E, 0x2F, 0x2F, + 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, + 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F, +}; + + + +UCHAR d_len[256] = { + 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, + 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, + 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, + 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, + 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, + 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, + 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, + 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, + 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, + 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, + 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, + 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, + 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, + 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, + 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, + 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, + 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, + 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, + 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, + 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, + 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, + 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, + 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, + 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, + 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, + 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, +}; + + diff --git a/src/archivers/dms/tables.h b/src/archivers/dms/tables.h new file mode 100644 index 00000000..9d557c39 --- /dev/null +++ b/src/archivers/dms/tables.h @@ -0,0 +1,3 @@ + +extern UCHAR d_code[], d_len[]; + diff --git a/src/archivers/dms/u_deep.cpp b/src/archivers/dms/u_deep.cpp new file mode 100644 index 00000000..e1e5dcaf --- /dev/null +++ b/src/archivers/dms/u_deep.cpp @@ -0,0 +1,207 @@ + +/* + * xDMS v1.3 - Portable DMS archive unpacker - Public Domain + * Written by Andre Rodrigues de la Rocha + * + * Lempel-Ziv-DynamicHuffman decompression functions used in Deep + * mode. + * Most routines ripped from LZHUF written by Haruyasu Yoshizaki + * + */ + +#include + +#include "cdata.h" +#include "tables.h" +#include "u_deep.h" +#include "getbits.h" + + +INLINE USHORT DecodeChar(void); +INLINE USHORT DecodePosition(void); +INLINE void update(USHORT c); +static void reconst(void); + + +USHORT deep_text_loc; +int init_deep_tabs=1; + + + +#define DBITMASK 0x3fff /* uses 16Kb dictionary */ + +#define F 60 /* lookahead buffer size */ +#define THRESHOLD 2 +#define N_CHAR (256 - THRESHOLD + F) /* kinds of characters (character code = 0..N_CHAR-1) */ +#define T (N_CHAR * 2 - 1) /* size of table */ +#define R (T - 1) /* position of root */ +#define MAX_FREQ 0x8000 /* updates tree when the */ + + +USHORT freq[T + 1]; /* frequency table */ + +USHORT prnt[T + N_CHAR]; /* pointers to parent nodes, except for the */ + /* elements [T..T + N_CHAR - 1] which are used to get */ + /* the positions of leaves corresponding to the codes. */ + +USHORT son[T]; /* pointers to child nodes (son[], son[] + 1) */ + + + +void Init_DEEP_Tabs(void){ + USHORT i, j; + + for (i = 0; i < N_CHAR; i++) { + freq[i] = 1; + son[i] = (USHORT)(i + T); + prnt[i + T] = i; + } + i = 0; j = N_CHAR; + while (j <= R) { + freq[j] = (USHORT) (freq[i] + freq[i + 1]); + son[j] = i; + prnt[i] = prnt[i + 1] = j; + i += 2; j++; + } + freq[T] = 0xffff; + prnt[R] = 0; + + init_deep_tabs = 0; +} + + + +USHORT Unpack_DEEP(UCHAR *in, UCHAR *out, USHORT origsize){ + USHORT i, j, c; + UCHAR *outend; + + initbitbuf(in); + + if (init_deep_tabs) Init_DEEP_Tabs(); + + outend = out+origsize; + while (out < outend) { + c = DecodeChar(); + if (c < 256) { + *out++ = text[deep_text_loc++ & DBITMASK] = (UCHAR)c; + } else { + j = (USHORT) (c - 255 + THRESHOLD); + i = (USHORT) (deep_text_loc - DecodePosition() - 1); + while (j--) *out++ = text[deep_text_loc++ & DBITMASK] = text[i++ & DBITMASK]; + } + } + + deep_text_loc = (USHORT)((deep_text_loc+60) & DBITMASK); + + return 0; +} + + + +INLINE USHORT DecodeChar(void){ + USHORT c; + + c = son[R]; + + /* travel from root to leaf, */ + /* choosing the smaller child node (son[]) if the read bit is 0, */ + /* the bigger (son[]+1} if 1 */ + while (c < T) { + c = son[c + GETBITS(1)]; + DROPBITS(1); + } + c -= T; + update(c); + return c; +} + + + +INLINE USHORT DecodePosition(void){ + USHORT i, j, c; + + i = GETBITS(8); DROPBITS(8); + c = (USHORT) (d_code[i] << 8); + j = d_len[i]; + i = (USHORT) (((i << j) | GETBITS(j)) & 0xff); DROPBITS(j); + + return (USHORT) (c | i) ; +} + + + +/* reconstruction of tree */ + +static void reconst(void){ + USHORT i, j, k, f, l; + + /* collect leaf nodes in the first half of the table */ + /* and replace the freq by (freq + 1) / 2. */ + j = 0; + for (i = 0; i < T; i++) { + if (son[i] >= T) { + freq[j] = (USHORT) ((freq[i] + 1) / 2); + son[j] = son[i]; + j++; + } + } + /* begin constructing tree by connecting sons */ + for (i = 0, j = N_CHAR; j < T; i += 2, j++) { + k = (USHORT) (i + 1); + f = freq[j] = (USHORT) (freq[i] + freq[k]); + for (k = (USHORT)(j - 1); f < freq[k]; k--); + k++; + l = (USHORT)((j - k) * 2); + memmove(&freq[k + 1], &freq[k], (size_t)l); + freq[k] = f; + memmove(&son[k + 1], &son[k], (size_t)l); + son[k] = i; + } + /* connect prnt */ + for (i = 0; i < T; i++) { + if ((k = son[i]) >= T) { + prnt[k] = i; + } else { + prnt[k] = prnt[k + 1] = i; + } + } +} + + + +/* increment frequency of given code by one, and update tree */ + +INLINE void update(USHORT c){ + USHORT i, j, k, l; + + if (freq[R] == MAX_FREQ) { + reconst(); + } + c = prnt[c + T]; + do { + k = ++freq[c]; + + /* if the order is disturbed, exchange nodes */ + if (k > freq[l = (USHORT)(c + 1)]) { + while (k > freq[++l]); + l--; + freq[c] = freq[l]; + freq[l] = k; + + i = son[c]; + prnt[i] = l; + if (i < T) prnt[i + 1] = l; + + j = son[l]; + son[l] = i; + + prnt[j] = c; + if (j < T) prnt[j + 1] = c; + son[c] = j; + + c = l; + } + } while ((c = prnt[c]) != 0); /* repeat up to root */ +} + + diff --git a/src/archivers/dms/u_deep.h b/src/archivers/dms/u_deep.h new file mode 100644 index 00000000..d87be1d9 --- /dev/null +++ b/src/archivers/dms/u_deep.h @@ -0,0 +1,7 @@ + + +USHORT Unpack_DEEP(UCHAR *, UCHAR *, USHORT); + +extern int init_deep_tabs; +extern USHORT deep_text_loc; + diff --git a/src/archivers/dms/u_heavy.cpp b/src/archivers/dms/u_heavy.cpp new file mode 100644 index 00000000..8b456cb4 --- /dev/null +++ b/src/archivers/dms/u_heavy.cpp @@ -0,0 +1,175 @@ + +/* + * xDMS v1.3 - Portable DMS archive unpacker - Public Domain + * Written by Andre Rodrigues de la Rocha + * + * Lempel-Ziv-Huffman decompression functions used in Heavy 1 & 2 + * compression modes. Based on LZH decompression functions from + * UNIX LHA made by Masaru Oki + * + */ + + +#include "cdata.h" +#include "u_heavy.h" +#include "getbits.h" +#include "maketbl.h" + + +#define NC 510 +#define NPT 20 +#define N1 510 +#define OFFSET 253 + +USHORT left[2 * NC - 1], right[2 * NC - 1 + 9]; +static UCHAR c_len[NC], pt_len[NPT]; +static USHORT c_table[4096], pt_table[256]; +USHORT lastlen, np; +USHORT heavy_text_loc; + + +static USHORT read_tree_c(void); +static USHORT read_tree_p(void); +INLINE USHORT decode_c(void); +INLINE USHORT decode_p(void); + + + +USHORT Unpack_HEAVY(UCHAR *in, UCHAR *out, UCHAR flags, USHORT origsize){ + USHORT j, i, c, bitmask; + UCHAR *outend; + + /* Heavy 1 uses a 4Kb dictionary, Heavy 2 uses 8Kb */ + + if (flags & 8) { + np = 15; + bitmask = 0x1fff; + } else { + np = 14; + bitmask = 0x0fff; + } + + initbitbuf(in); + + if (flags & 2) { + if (read_tree_c()) return 1; + if (read_tree_p()) return 2; + } + + outend = out+origsize; + + while (out>= 1; + } while (j >= N1); + DROPBITS(c_len[j] - 12); + } + return j; +} + + + +INLINE USHORT decode_p(void){ + USHORT i, j, m; + + j = pt_table[GETBITS(8)]; + if (j < np) { + DROPBITS(pt_len[j]); + } else { + DROPBITS(8); + i = GETBITS(16); + m = 0x8000; + do { + if (i & m) j = right[j]; + else j = left [j]; + m >>= 1; + } while (j >= np); + DROPBITS(pt_len[j] - 8); + } + + if (j != np-1) { + if (j > 0) { + j = (USHORT)(GETBITS(i=(USHORT)(j-1)) | (1U << (j-1))); + DROPBITS(i); + } + lastlen=j; + } + + return lastlen; + +} + + + +static USHORT read_tree_c(void){ + USHORT i,n; + + n = GETBITS(9); + DROPBITS(9); + if (n>0){ + for (i=0; i0){ + for (i=0; i + * + * Decruncher reinitialization + * + */ + +#include + +#include "cdata.h" +#include "u_init.h" +#include "u_quick.h" +#include "u_medium.h" +#include "u_deep.h" +#include "u_heavy.h" + +extern USHORT lastlen, np; + +void Init_Decrunchers(void){ + quick_text_loc = 251; + medium_text_loc = 0x3fbe; + heavy_text_loc = 0; + deep_text_loc = 0x3fc4; + init_deep_tabs = 1; + memset(text,0,0x3fc8); + lastlen = 0; + np = 0; +} + diff --git a/src/archivers/dms/u_init.h b/src/archivers/dms/u_init.h new file mode 100644 index 00000000..9a74d581 --- /dev/null +++ b/src/archivers/dms/u_init.h @@ -0,0 +1,3 @@ + +void Init_Decrunchers(void); + diff --git a/src/archivers/dms/u_medium.cpp b/src/archivers/dms/u_medium.cpp new file mode 100644 index 00000000..cc3e8678 --- /dev/null +++ b/src/archivers/dms/u_medium.cpp @@ -0,0 +1,58 @@ + +/* + * xDMS v1.3 - Portable DMS archive unpacker - Public Domain + * Written by Andre Rodrigues de la Rocha + * + * Main decompression functions used in MEDIUM mode + * + */ + + +#include + +#include "cdata.h" +#include "u_medium.h" +#include "getbits.h" +#include "tables.h" + + +#define MBITMASK 0x3fff + + +USHORT medium_text_loc; + + + +USHORT Unpack_MEDIUM(UCHAR *in, UCHAR *out, USHORT origsize){ + USHORT i, j, c; + UCHAR u, *outend; + + + initbitbuf(in); + + outend = out+origsize; + while (out < outend) { + if (GETBITS(1)!=0) { + DROPBITS(1); + *out++ = text[medium_text_loc++ & MBITMASK] = (UCHAR)GETBITS(8); + DROPBITS(8); + } else { + DROPBITS(1); + c = GETBITS(8); DROPBITS(8); + j = (USHORT) (d_code[c]+3); + u = d_len[c]; + c = (USHORT) (((c << u) | GETBITS(u)) & 0xff); DROPBITS(u); + u = d_len[c]; + c = (USHORT) ((d_code[c] << 8) | (((c << u) | GETBITS(u)) & 0xff)); DROPBITS(u); + i = (USHORT) (medium_text_loc - c - 1); + + while(j--) *out++ = text[medium_text_loc++ & MBITMASK] = text[i++ & MBITMASK]; + + } + } + medium_text_loc = (USHORT)((medium_text_loc+66) & MBITMASK); + + return 0; +} + + diff --git a/src/archivers/dms/u_medium.h b/src/archivers/dms/u_medium.h new file mode 100644 index 00000000..3c1b4fc2 --- /dev/null +++ b/src/archivers/dms/u_medium.h @@ -0,0 +1,5 @@ + +USHORT Unpack_MEDIUM(UCHAR *, UCHAR *, USHORT); + +extern USHORT medium_text_loc; + diff --git a/src/archivers/dms/u_quick.cpp b/src/archivers/dms/u_quick.cpp new file mode 100644 index 00000000..74131c26 --- /dev/null +++ b/src/archivers/dms/u_quick.cpp @@ -0,0 +1,47 @@ + +/* + * xDMS v1.3 - Portable DMS archive unpacker - Public Domain + * Written by Andre Rodrigues de la Rocha + * + * + */ + + +#include + +#include "cdata.h" +#include "u_quick.h" +#include "getbits.h" + + +#define QBITMASK 0xff + + +USHORT quick_text_loc; + + +USHORT Unpack_QUICK(UCHAR *in, UCHAR *out, USHORT origsize){ + USHORT i, j; + UCHAR *outend; + + initbitbuf(in); + + outend = out+origsize; + while (out < outend) { + if (GETBITS(1)!=0) { + DROPBITS(1); + *out++ = text[quick_text_loc++ & QBITMASK] = (UCHAR)GETBITS(8); DROPBITS(8); + } else { + DROPBITS(1); + j = (USHORT) (GETBITS(2)+2); DROPBITS(2); + i = (USHORT) (quick_text_loc - GETBITS(8) - 1); DROPBITS(8); + while(j--) { + *out++ = text[quick_text_loc++ & QBITMASK] = text[i++ & QBITMASK]; + } + } + } + quick_text_loc = (USHORT)((quick_text_loc+5) & QBITMASK); + + return 0; +} + diff --git a/src/archivers/dms/u_quick.h b/src/archivers/dms/u_quick.h new file mode 100644 index 00000000..9518815b --- /dev/null +++ b/src/archivers/dms/u_quick.h @@ -0,0 +1,5 @@ + +USHORT Unpack_QUICK(UCHAR *, UCHAR *, USHORT); + +extern USHORT quick_text_loc; + diff --git a/src/archivers/dms/u_rle.cpp b/src/archivers/dms/u_rle.cpp new file mode 100644 index 00000000..ff46c561 --- /dev/null +++ b/src/archivers/dms/u_rle.cpp @@ -0,0 +1,42 @@ + +/* + * xDMS v1.3 - Portable DMS archive unpacker - Public Domain + * Written by Andre Rodrigues de la Rocha + * + * Run Length Encoding decompression function used in most + * modes after decompression by other algorithm + * + */ + +#include +#include "cdata.h" +#include "u_rle.h" + + + +USHORT Unpack_RLE(UCHAR *in, UCHAR *out, USHORT origsize){ + USHORT n; + UCHAR a,b, *outend; + + outend = out+origsize; + while (out outend) return 1; + memset(out,a,(size_t) n); + out += n; + } + } + return 0; +} + + diff --git a/src/archivers/dms/u_rle.h b/src/archivers/dms/u_rle.h new file mode 100644 index 00000000..0cf24938 --- /dev/null +++ b/src/archivers/dms/u_rle.h @@ -0,0 +1,3 @@ + +USHORT Unpack_RLE(UCHAR *, UCHAR *, USHORT); + diff --git a/src/archivers/lha/crcio.cpp b/src/archivers/lha/crcio.cpp new file mode 100644 index 00000000..25314d2a --- /dev/null +++ b/src/archivers/lha/crcio.cpp @@ -0,0 +1,323 @@ +/* ------------------------------------------------------------------------ */ +/* LHa for UNIX */ +/* crcio.c -- crc input / output */ +/* */ +/* Modified Nobutaka Watazaki */ +/* */ +/* Ver. 1.14 Source All chagned 1995.01.14 N.Watazaki */ +/* ------------------------------------------------------------------------ */ +#include "lha.h" + +/* ------------------------------------------------------------------------ */ +static unsigned short crctable[UCHAR_MAX + 1]; +static unsigned char subbitbuf, bitcount; +#ifdef EUC +static int putc_euc_cache; +#endif +static int getc_euc_cache; + +/* ------------------------------------------------------------------------ */ +void +make_crctable( /* void */ ) +{ + unsigned int i, j, r; + + for (i = 0; i <= UCHAR_MAX; i++) { + r = i; + for (j = 0; j < CHAR_BIT; j++) + if (r & 1) + r = (r >> 1) ^ CRCPOLY; + else + r >>= 1; + crctable[i] = r; + } +} + +/* ------------------------------------------------------------------------ */ +#ifdef NEED_INCREMENTAL_INDICATOR +static void +put_indicator(long int count) +{ + if (!quiet && indicator_threshold) { + while (count > indicator_count) { + putchar('o'); + fflush(stdout); + indicator_count += indicator_threshold; + } + } +} +#endif + +/* ------------------------------------------------------------------------ */ +unsigned short +calccrc(unsigned char *p, unsigned int n) +{ + reading_size += n; +#ifdef NEED_INCREMENTAL_INDICATOR + put_indicator(reading_size); +#endif + while (n-- > 0) + UPDATE_CRC(*p++); + return crc; +} + +/* ------------------------------------------------------------------------ */ +void +fillbuf(unsigned char n) /* Shift bitbuf n bits left, read n bits */ +{ + while (n > bitcount) { + n -= bitcount; + lhabitbuf = (lhabitbuf << bitcount) + (subbitbuf >> (CHAR_BIT - bitcount)); + if (compsize != 0) { + compsize--; + subbitbuf = (unsigned char) zfile_getc(infile); + } + else + subbitbuf = 0; + bitcount = CHAR_BIT; + } + bitcount -= n; + lhabitbuf = (lhabitbuf << n) + (subbitbuf >> (CHAR_BIT - n)); + subbitbuf <<= n; +} + +/* ------------------------------------------------------------------------ */ +unsigned short +getbits(unsigned char n) +{ + unsigned short x; + + x = lhabitbuf >> (2 * CHAR_BIT - n); + fillbuf(n); + return x; +} +#if 0 +/* ------------------------------------------------------------------------ */ +void +putcode(unsigned char n, unsigned short x) /* Write rightmost n bits of x */ +{ + while (n >= bitcount) { + n -= bitcount; + subbitbuf += x >> (USHRT_BIT - bitcount); + x <<= bitcount; + if (compsize < origsize) { + if (fwrite(&subbitbuf, 1, 1, outfile) == 0) { + /* fileerror(WTERR, outfile); */ + fatal_error("Write error in crcio.c(putcode)\n"); + /* exit(errno); */ + } + compsize++; + } + else + unpackable = 1; + subbitbuf = 0; + bitcount = CHAR_BIT; + } + subbitbuf += x >> (USHRT_BIT - bitcount); + bitcount -= n; +} + +/* ------------------------------------------------------------------------ */ +void +putbits(unsigned char n, unsigned short x) /* Write rightmost n bits of x */ +{ + x <<= USHRT_BIT - n; + while (n >= bitcount) { + n -= bitcount; + subbitbuf += x >> (USHRT_BIT - bitcount); + x <<= bitcount; + if (compsize < origsize) { + if (fwrite(&subbitbuf, 1, 1, outfile) == 0) { + /* fileerror(WTERR, outfile); */ + fatal_error("Write error in crcio.c(putbits)\n"); + /* exit(errno); */ + } + compsize++; + } + else + unpackable = 1; + subbitbuf = 0; + bitcount = CHAR_BIT; + } + subbitbuf += x >> (USHRT_BIT - bitcount); + bitcount -= n; +} +#endif +/* ------------------------------------------------------------------------ */ +int +fread_crc(unsigned char *p, int n, struct zfile *fp) +{ + n = zfile_fread(p, 1, n, fp); + + calccrc(p, n); + return n; +} + +/* ------------------------------------------------------------------------ */ +void +fwrite_crc(unsigned char *p, int n, struct zfile *fp) +{ + calccrc(p, n); + if (verify_mode) + return; + + if (fp) { + zfile_fwrite(p, 1, n, fp); + } +} + +/* ------------------------------------------------------------------------ */ +void +init_code_cache( /* void */ ) +{ /* called from copyfile() in util.c */ +#ifdef EUC + putc_euc_cache = EOF; +#endif + getc_euc_cache = EOF; +} + +void +init_getbits( /* void */ ) +{ + lhabitbuf = 0; + subbitbuf = 0; + bitcount = 0; + fillbuf(2 * CHAR_BIT); +#ifdef EUC + putc_euc_cache = EOF; +#endif +} + +/* ------------------------------------------------------------------------ */ +void +init_putbits( /* void */ ) +{ + bitcount = CHAR_BIT; + subbitbuf = 0; + getc_euc_cache = EOF; +} + +/* ------------------------------------------------------------------------ */ +#ifdef EUC +void +putc_euc(int c, FILE *fd) +{ + int d; + + if (putc_euc_cache == EOF) { + if (!euc_mode || c < 0x81 || c > 0xFC) { + putc(c, fd); + return; + } + if (c >= 0xA0 && c < 0xE0) { + putc(0x8E, fd); /* single shift */ + putc(c, fd); + return; + } + putc_euc_cache = c; /* save first byte */ + return; + } + d = putc_euc_cache; + putc_euc_cache = EOF; + if (d >= 0xA0) + d -= 0xE0 - 0xA0; + if (c > 0x9E) { + c = c - 0x9F + 0x21; + d = (d - 0x81) * 2 + 0x22; + } + else { + if (c > 0x7E) + c--; + c -= 0x1F; + d = (d - 0x81) * 2 + 0x21; + } + putc(0x80 | d, fd); + putc(0x80 | c, fd); +} +#endif + +/* ------------------------------------------------------------------------ */ +int +fwrite_txt(unsigned char *p, int n, FILE *fp) +{ + while (--n >= 0) { + if (*p != '\015' && *p != '\032') { +#ifdef EUC + putc_euc(*p, fp); +#else + putc(*p, fp); +#endif + } + + prev_char = *p++; + } + return (ferror(fp)); +} + +/* ------------------------------------------------------------------------ */ +int +fread_txt(unsigned char *p, int n, FILE *fp) +{ + int c; + int cnt = 0; + + while (cnt < n) { + if (getc_euc_cache != EOF) { + c = getc_euc_cache; + getc_euc_cache = EOF; + } + else { + if ((c = fgetc(fp)) == EOF) + break; + if (c == '\n') { + getc_euc_cache = c; + ++origsize; + c = '\r'; + } +#ifdef EUC + else if (euc_mode && (c == 0x8E || 0xA0 < c && c < 0xFF)) { + int d = fgetc(fp); + if (d == EOF) { + *p++ = c; + cnt++; + break; + } + if (c == 0x8E) { /* single shift (KANA) */ + if ((0x20 < d && d < 0x7F) || (0xA0 < d && d < 0xFF)) + c = d | 0x80; + else + getc_euc_cache = d; + } + else { + if (0xA0 < d && d < 0xFF) { /* if GR */ + c &= 0x7F; /* convert to MS-kanji */ + d &= 0x7F; + if (!(c & 1)) { + c--; + d += 0x7F - 0x21; + } + if ((d += 0x40 - 0x21) > 0x7E) + d++; + if ((c = (c >> 1) + 0x71) >= 0xA0) + c += 0xE0 - 0xA0; + } + getc_euc_cache = d; + } + } +#endif + } + *p++ = c; + cnt++; + } + return cnt; +} + +/* ------------------------------------------------------------------------ */ +unsigned short +calc_header_crc(unsigned char *p, unsigned int n) /* Thanks T.Okamoto */ +{ + crc = 0; + while (n-- > 0) + UPDATE_CRC(*p++); + return crc; +} diff --git a/src/archivers/lha/dhuf.cpp b/src/archivers/lha/dhuf.cpp new file mode 100644 index 00000000..301c944f --- /dev/null +++ b/src/archivers/lha/dhuf.cpp @@ -0,0 +1,341 @@ +/* ------------------------------------------------------------------------ */ +/* LHa for UNIX */ +/* dhuf.c -- Dynamic Hufffman routine */ +/* */ +/* Modified H.Yoshizaki */ +/* */ +/* Ver. 1.14 Source All chagned 1995.01.14 N.Watazaki */ +/* ------------------------------------------------------------------------ */ +#include "lha.h" + +/* ------------------------------------------------------------------------ */ +static short child[TREESIZE], parent[TREESIZE], block[TREESIZE], edge[TREESIZE], stock[TREESIZE], + s_node[TREESIZE / 2]; /* Changed N.Watazaki */ +/* node[..] -> s_node[..] */ + +static unsigned short freq[TREESIZE]; + +static unsigned short total_p; +static int avail, n1; +static int most_p, nn; +static unsigned long nextcount; +/* ------------------------------------------------------------------------ */ +void +start_c_dyn( /* void */ ) +{ + int i, j, f; + + n1 = (n_max >= 256 + maxmatch - THRESHOLD + 1) ? 512 : n_max - 1; + for (i = 0; i < TREESIZE_C; i++) { + stock[i] = i; + block[i] = 0; + } + for (i = 0, j = n_max * 2 - 2; i < n_max; i++, j--) { + freq[j] = 1; + child[j] = ~i; + s_node[i] = j; + block[j] = 1; + } + avail = 2; + edge[1] = n_max - 1; + i = n_max * 2 - 2; + while (j >= 0) { + f = freq[j] = freq[i] + freq[i - 1]; + child[j] = i; + parent[i] = parent[i - 1] = j; + if (f == freq[j + 1]) { + edge[block[j] = block[j + 1]] = j; + } + else { + edge[block[j] = stock[avail++]] = j; + } + i -= 2; + j--; + } +} + +/* ------------------------------------------------------------------------ */ +static void +start_p_dyn( /* void */ ) +{ + freq[ROOT_P] = 1; + child[ROOT_P] = ~(N_CHAR); + s_node[N_CHAR] = ROOT_P; + edge[block[ROOT_P] = stock[avail++]] = ROOT_P; + most_p = ROOT_P; + total_p = 0; + nn = 1 << dicbit; + nextcount = 64; +} + +/* ------------------------------------------------------------------------ */ +void +decode_start_dyn( /* void */ ) +{ + n_max = 286; + maxmatch = MAXMATCH; + init_getbits(); + start_c_dyn(); + start_p_dyn(); +} + +/* ------------------------------------------------------------------------ */ +static void +reconst(int start, int end) +{ + int i, j, k, l, b; + unsigned int f, g; + + for (i = j = start; i < end; i++) { + if ((k = child[i]) < 0) { + freq[j] = (freq[i] + 1) / 2; + child[j] = k; + j++; + } + if (edge[b = block[i]] == i) { + stock[--avail] = b; + } + } + j--; + i = end - 1; + l = end - 2; + while (i >= start) { + while (i >= l) { + freq[i] = freq[j]; + child[i] = child[j]; + i--, j--; + } + f = freq[l] + freq[l + 1]; + for (k = start; f < freq[k]; k++); + while (j >= k) { + freq[i] = freq[j]; + child[i] = child[j]; + i--, j--; + } + freq[i] = f; + child[i] = l + 1; + i--; + l -= 2; + } + f = 0; + for (i = start; i < end; i++) { + if ((j = child[i]) < 0) + s_node[~j] = i; + else + parent[j] = parent[j - 1] = i; + if ((g = freq[i]) == f) { + block[i] = b; + } + else { + edge[b = block[i] = stock[avail++]] = i; + f = g; + } + } +} + +/* ------------------------------------------------------------------------ */ +static int +swap_inc(int p) +{ + int b, q, r, s; + + b = block[p]; + if ((q = edge[b]) != p) { /* swap for leader */ + r = child[p]; + s = child[q]; + child[p] = s; + child[q] = r; + if (r >= 0) + parent[r] = parent[r - 1] = q; + else + s_node[~r] = q; + if (s >= 0) + parent[s] = parent[s - 1] = p; + else + s_node[~s] = p; + p = q; + goto Adjust; + } + else if (b == block[p + 1]) { +Adjust: + edge[b]++; + if (++freq[p] == freq[p - 1]) { + block[p] = block[p - 1]; + } + else { + edge[block[p] = stock[avail++]] = p; /* create block */ + } + } + else if (++freq[p] == freq[p - 1]) { + stock[--avail] = b; /* delete block */ + block[p] = block[p - 1]; + } + return parent[p]; +} + +/* ------------------------------------------------------------------------ */ +static void +update_c(int p) +{ + int q; + + if (freq[ROOT_C] == 0x8000) { + reconst(0, n_max * 2 - 1); + } + freq[ROOT_C]++; + q = s_node[p]; + do { + q = swap_inc(q); + } while (q != ROOT_C); +} + +/* ------------------------------------------------------------------------ */ +static void +update_p(int p) +{ + int q; + + if (total_p == 0x8000) { + reconst(ROOT_P, most_p + 1); + total_p = freq[ROOT_P]; + freq[ROOT_P] = 0xffff; + } + q = s_node[p + N_CHAR]; + while (q != ROOT_P) { + q = swap_inc(q); + } + total_p++; +} + +/* ------------------------------------------------------------------------ */ +static void +make_new_node(int p) +{ + int q, r; + + r = most_p + 1; + q = r + 1; + s_node[~(child[r] = child[most_p])] = r; + child[q] = ~(p + N_CHAR); + child[most_p] = q; + freq[r] = freq[most_p]; + freq[q] = 0; + block[r] = block[most_p]; + if (most_p == ROOT_P) { + freq[ROOT_P] = 0xffff; + edge[block[ROOT_P]]++; + } + parent[r] = parent[q] = most_p; + edge[block[q] = stock[avail++]] = s_node[p + N_CHAR] = most_p = q; + update_p(p); +} + +#if 0 +/* ------------------------------------------------------------------------ */ +static void +encode_c_dyn(unsigned int c) +{ + unsigned int bits; + int p, d, cnt; + + d = c - n1; + if (d >= 0) { + c = n1; + } + cnt = bits = 0; + p = s_node[c]; + do { + bits >>= 1; + if (p & 1) { + bits |= 0x8000; + } + if (++cnt == 16) { + putcode(16, bits); + cnt = bits = 0; + } + } while ((p = parent[p]) != ROOT_C); + putcode(cnt, bits); + if (d >= 0) + putbits(8, d); + update_c(c); +} +#endif +/* ------------------------------------------------------------------------ */ +unsigned short +decode_c_dyn( /* void */ ) +{ + int c; + short buf, cnt; + + c = child[ROOT_C]; + buf = lhabitbuf; + cnt = 0; + do { + c = child[c - (buf < 0)]; + buf <<= 1; + if (++cnt == 16) { + fillbuf(16); + buf = lhabitbuf; + cnt = 0; + } + } while (c > 0); + fillbuf(cnt); + c = ~c; + update_c(c); + if (c == n1) + c += getbits(8); + return c; +} + +/* ------------------------------------------------------------------------ */ +unsigned short +decode_p_dyn( /* void */ ) +{ + int c; + short buf, cnt; + + while (count > nextcount) { + make_new_node(nextcount / 64); + if ((nextcount += 64) >= nn) + nextcount = 0xffffffff; + } + c = child[ROOT_P]; + buf = lhabitbuf; + cnt = 0; + while (c > 0) { + c = child[c - (buf < 0)]; + buf <<= 1; + if (++cnt == 16) { + fillbuf(16); + buf = lhabitbuf; + cnt = 0; + } + } + fillbuf(cnt); + c = (~c) - N_CHAR; + update_p(c); + + return (c << 6) + getbits(6); +} +#if 0 +/* ------------------------------------------------------------------------ */ +void +output_dyn(unsigned int code, unsigned int pos) +{ + encode_c_dyn(code); + if (code >= 0x100) { + encode_p_st0(pos); + } +} + +/* ------------------------------------------------------------------------ */ +void +encode_end_dyn( /* void */ ) +{ + putcode(7, 0); +} +#endif +/* Local Variables: */ +/* mode:c */ +/* tab-width:4 */ +/* End: */ diff --git a/src/archivers/lha/header.cpp b/src/archivers/lha/header.cpp new file mode 100644 index 00000000..6e81b8d8 --- /dev/null +++ b/src/archivers/lha/header.cpp @@ -0,0 +1,703 @@ +/* ------------------------------------------------------------------------ */ +/* LHa for UNIX */ +/* header.c -- header manipulate functions */ +/* */ +/* Modified Nobutaka Watazaki */ +/* */ +/* Original Y.Tagawa */ +/* modified 1991.12.16 M.Oki */ +/* Ver. 1.10 Symbolic Link added 1993.10.01 N.Watazaki */ +/* Ver. 1.13b Symbolic Link Bug Fix 1994.08.22 N.Watazaki */ +/* Ver. 1.14 Source All chagned 1995.01.14 N.Watazaki */ +/* Ver. 1.14i bug fixed 2000.10.06 t.okamoto */ +/* ------------------------------------------------------------------------ */ +#include "lha.h" + +/* ------------------------------------------------------------------------ */ +static char *get_ptr; +/* ------------------------------------------------------------------------ */ +int +calc_sum(register char *p, register int len) +{ + register int sum; + + for (sum = 0; len; len--) + sum += *p++; + + return sum & 0xff; +} + +/* ------------------------------------------------------------------------ */ +static unsigned short +get_word() +{ + int b0, b1; + + b0 = get_byte(); + b1 = get_byte(); + return (b1 << 8) + b0; +} + +/* ------------------------------------------------------------------------ */ +static void +put_word(unsigned int v) +{ + put_byte(v); + put_byte(v >> 8); +} + +/* ------------------------------------------------------------------------ */ +static long +get_longword() +{ + long b0, b1, b2, b3; + + b0 = get_byte(); + b1 = get_byte(); + b2 = get_byte(); + b3 = get_byte(); + return (b3 << 24) + (b2 << 16) + (b1 << 8) + b0; +} + +/* ------------------------------------------------------------------------ */ +static void +put_longword(long v) +{ + put_byte(v); + put_byte(v >> 8); + put_byte(v >> 16); + put_byte(v >> 24); +} + +/* ------------------------------------------------------------------------ */ +static void +msdos_to_unix_filename(register char *name, register int len) +{ + register int i; + +#ifdef MULTIBYTE_CHAR + for (i = 0; i < len; i++) { + if (MULTIBYTE_FIRST_P(name[i]) && + MULTIBYTE_SECOND_P(name[i + 1])) + i++; + else if (name[i] == '\\') + name[i] = '/'; + else if (!noconvertcase && isupper(name[i])) + name[i] = tolower(name[i]); + } +#else + for (i = 0; i < len; i++) { + if (name[i] == '\\') + name[i] = '/'; + else if (!noconvertcase && isupper(name[i])) + name[i] = tolower(name[i]); + } +#endif +} + +/* ------------------------------------------------------------------------ */ +static void +generic_to_unix_filename(register char *name, register int len) +{ + register int i; + boolean lower_case_used = FALSE; + +#ifdef MULTIBYTE_CHAR + for (i = 0; i < len; i++) { + if (MULTIBYTE_FIRST_P(name[i]) && + MULTIBYTE_SECOND_P(name[i + 1])) + i++; + else if (islower(name[i])) { + lower_case_used = TRUE; + break; + } + } + for (i = 0; i < len; i++) { + if (MULTIBYTE_FIRST_P(name[i]) && + MULTIBYTE_SECOND_P(name[i + 1])) + i++; + else if (name[i] == '\\') + name[i] = '/'; + else if (!noconvertcase && !lower_case_used && isupper(name[i])) + name[i] = tolower(name[i]); + } +#else + for (i = 0; i < len; i++) + if (islower(name[i])) { + lower_case_used = TRUE; + break; + } + for (i = 0; i < len; i++) { + if (name[i] == '\\') + name[i] = '/'; + else if (!noconvertcase && !lower_case_used && isupper(name[i])) + name[i] = tolower(name[i]); + } +#endif +} + +/* ------------------------------------------------------------------------ */ +static void +macos_to_unix_filename(register char *name, register int len) +{ + register int i; + + for (i = 0; i < len; i++) { + if (name[i] == ':') + name[i] = '/'; + else if (name[i] == '/') + name[i] = ':'; + } +} + +/* ------------------------------------------------------------------------ */ +static void +unix_to_generic_filename(register char *name, register int len) +{ + register int i; + + for (i = 0; i < len; i++) { + if (name[i] == '/') + name[i] = '\\'; + else if (islower(name[i])) + name[i] = toupper(name[i]); + } +} + +/* ------------------------------------------------------------------------ */ +/* */ +/* Generic stamp format: */ +/* */ +/* 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 */ +/* |<-------- year ------->|<- month ->|<-- day -->| */ +/* */ +/* 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 */ +/* |<--- hour --->|<---- minute --->|<- second*2 ->| */ +/* */ +/* ------------------------------------------------------------------------ */ + +/* + * NOTE : If you don't have `gettimeofday(2)', or your gettimeofday(2) + * returns bogus timezone information, try FTIME, MKTIME, TIMELOCAL or TZSET. + */ + +/* choose one */ +#if defined(MKTIME) +#ifdef TIMELOCAL +#undef TIMELOCAL +#endif +#endif /* defined(MKTIME) */ + +#if defined(MKTIME) || defined(TIMELOCAL) +#ifdef TZSET +#undef TZSET +#endif +#endif /* defined(MKTIME) || defined(TIMELOCAL) */ + +#if defined(MKTIME) || defined(TIMELOCAL) || defined(TZSET) +#ifdef FTIME +#undef FTIME +#endif +#endif + +#if defined(MKTIME) || defined(TIMELOCAL) || defined(TZSET) || defined(FTIME) +#ifdef GETTIMEOFDAY +#undef GETTIMEOFDAY +#endif +#else +#ifndef GETTIMEOFDAY +#define GETTIMEOFDAY /* use gettimeofday() */ +#endif +#endif + +#ifdef FTIME +#include +#endif + +/* + * You may define as : #define TIMEZONE_HOOK \ extern long + * timezone ; \ extern void tzset(); + */ +#ifdef TIMEZONE_HOOK +TIMEZONE_HOOK +/* Which do you like better, `TIMEZONE_HOOK' or `TIMEZONE_HOOK;' ? */ +#endif + +#if defined(TZSET) && defined(_MINIX) +extern long timezone; /* not defined in time.h */ +#endif + +/* ------------------------------------------------------------------------ */ +#if defined(FTIME) || defined(GETTIMEOFDAY) || defined(TZSET) +static long +gettz() +#ifdef TZSET +{ + tzset(); + return timezone; +} +#endif + +/* ------------------------------------------------------------------------ */ +#if !defined(TZSET) && defined(FTIME) +{ + struct timeb buf; + + ftime(&buf); + return buf.timezone * 60L; +} +#endif + +/* ------------------------------------------------------------------------ */ +#if !defined(TZSET) && !defined(FTIME) /* maybe defined(GETTIMEOFDAY) */ +{ +#ifdef HAVE_TM_ZONE + time_t tt; + + time(&tt); + return -localtime(&tt)->tm_gmtoff; +#else /* HAVE_TM_ZONE */ + struct timeval tp; + struct timezone tzp; + gettimeofday(&tp, &tzp);/* specific to 4.3BSD */ + /* + * return (tzp.tz_minuteswest * 60L + (tzp.tz_dsttime != 0 ? 60L * + * 60L : 0)); + */ + return (tzp.tz_minuteswest * 60L); +#endif /* HAVE_TM_ZONE */ +} +#endif +#endif /* defined(FTIME) || defined(GETTIMEOFDAY) || + * defined(TZSET) */ + +/* ------------------------------------------------------------------------ */ +#ifdef NOT_USED +static struct tm * +msdos_to_unix_stamp_tm(long a) +{ + static struct tm t; + + t.tm_sec = (a & 0x1f) * 2; + t.tm_min = (a >> 5) & 0x3f; + t.tm_hour = (a >> 11) & 0x1f; + t.tm_mday = (a >> 16) & 0x1f; + t.tm_mon = ((a >> 16 + 5) & 0x0f) - 1; + t.tm_year = ((a >> 16 + 9) & 0x7f) + 80; + return &t; +} +#endif + +/* ------------------------------------------------------------------------ */ +static time_t +generic_to_unix_stamp(long t) +#if defined(MKTIME) || defined(TIMELOCAL) +{ + struct tm dostm; + + /* + * special case: if MSDOS format date and time were zero, then we + * set time to be zero here too. + */ + if (t == 0) + return (time_t) 0; + + dostm.tm_sec = (t & 0x1f) * 2; + dostm.tm_min = t >> 5 & 0x3f; + dostm.tm_hour = t >> 11 & 0x1f; + dostm.tm_mday = t >> 16 & 0x1f; + dostm.tm_mon = (t >> 16 + 5 & 0x0f) - 1; /* 0..11 */ + dostm.tm_year = (t >> 16 + 9 & 0x7f) + 80; +#if 0 + dostm.tm_isdst = 0; /* correct? */ +#endif + dostm.tm_isdst = -1; /* correct? */ +#ifdef MKTIME + return (time_t) mktime(&dostm); +#else /* maybe defined(TIMELOCAL) */ + return (time_t) timelocal(&dostm); +#endif +} + +#else /* defined(MKTIME) || defined(TIMELOCAL) */ +{ + int year, month, day, hour, min, sec; + long longtime; + static unsigned int dsboy[12] = {0, 31, 59, 90, 120, 151, + 181, 212, 243, 273, 304, 334}; + unsigned int days; + + /* + * special case: if MSDOS format date and time were zero, then we + * set time to be zero here too. + */ + if (t == 0) + return (time_t) 0; + + year = ((int) ((t >> 16) + 9) & 0x7f) + 1980; + month = (int) ((t >> 16) + 5) & 0x0f; /* 1..12 means Jan..Dec */ + day = (int) (t >> 16) & 0x1f; /* 1..31 means 1st,...31st */ + + hour = ((int) t >> 11) & 0x1f; + min = ((int) t >> 5) & 0x3f; + sec = ((int) t & 0x1f) * 2; + + /* Calculate days since 1970.01.01 */ + days = (365 * (year - 1970) + /* days due to whole years */ + (year - 1970 + 1) / 4 + /* days due to leap years */ + dsboy[month - 1] + /* days since beginning of this year */ + day - 1); /* days since beginning of month */ + + if ((year % 4 == 0) && + (year % 100 != 0 || year % 400 == 0) && /* 1999.5.24 t.oka */ + (month >= 3)) /* if this is a leap year and month */ + days++; /* is March or later, add a day */ + + /* Knowing the days, we can find seconds */ + longtime = (((days * 24) + hour) * 60 + min) * 60 + sec; + longtime += gettz(); /* adjust for timezone */ + + /* LONGTIME is now the time in seconds, since 1970/01/01 00:00:00. */ + return (time_t) longtime; +} +#endif /* defined(MKTIME) || defined(TIMELOCAL) */ + +/* ------------------------------------------------------------------------ */ +static long +unix_to_generic_stamp(time_t t) +{ + struct tm *tm = localtime(&t); + + return ((((long) (tm->tm_year - 80)) << 25) + + (((long) (tm->tm_mon + 1)) << 21) + + (((long) tm->tm_mday) << 16) + + (long) ((tm->tm_hour << 11) + + (tm->tm_min << 5) + + (tm->tm_sec / 2))); +} + +/* ------------------------------------------------------------------------ */ +/* build header functions */ +/* ------------------------------------------------------------------------ */ +boolean +get_header(struct zfile *fp, register LzHeader *hdr) +{ + int header_size; + int name_length; + char data[LZHEADER_STRAGE]; + char dirname[FILENAME_LENGTH]; + int dir_length = 0; + int checksum; + int i; + char *ptr; + int extend_size; + int dmy; + + bzero(hdr, sizeof(LzHeader)); + + if (((header_size = zfile_getc(fp)) == EOF) || (header_size == 0)) { + return FALSE; /* finish */ + } + + if (zfile_fread(data + I_HEADER_CHECKSUM, + sizeof(char), header_size - 1, fp) < header_size - 1) { + fatal_error("Invalid header (LHarc file ?)"); + return FALSE; /* finish */ + } + setup_get(data + I_HEADER_LEVEL); + hdr->header_level = get_byte(); + if (hdr->header_level != 2 && + zfile_fread(data + header_size, sizeof(char), 2, fp) < 2) { + fatal_error("Invalid header (LHarc file ?)"); + return FALSE; /* finish */ + } + + if (hdr->header_level >= 3) { + fatal_error("Unknown level header"); + return FALSE; + } + + setup_get(data + I_HEADER_CHECKSUM); + checksum = get_byte(); + + if (hdr->header_level == 2) { + hdr->header_size = header_size + checksum*256; + } else { + hdr->header_size = header_size; + } + bcopy(data + I_METHOD, hdr->method, METHOD_TYPE_STRAGE); + setup_get(data + I_PACKED_SIZE); + hdr->packed_size = get_longword(); + hdr->original_size = get_longword(); + hdr->last_modified_stamp = get_longword(); + hdr->attribute = get_byte(); + + if ((hdr->header_level = get_byte()) != 2) { + if (calc_sum(data + I_METHOD, header_size) != checksum) + warning("Checksum error (LHarc file?)", ""); + name_length = get_byte(); + for (i = 0; i < name_length; i++) + hdr->name[i] = (char) get_byte(); + hdr->name[name_length] = '\0'; + } + else { + hdr->unix_last_modified_stamp = hdr->last_modified_stamp; + name_length = 0; + } + + /* defaults for other type */ + hdr->unix_mode = UNIX_FILE_REGULAR | UNIX_RW_RW_RW; + hdr->unix_gid = 0; + hdr->unix_uid = 0; + + if (hdr->header_level == 0) { + extend_size = header_size - name_length -22; + if (extend_size < 0) { + if (extend_size == -2) { + hdr->extend_type = EXTEND_GENERIC; + hdr->has_crc = FALSE; + } else { + fatal_error("Unkonwn header (lha file?)"); + return FALSE; + } + } else { + hdr->has_crc = TRUE; + hdr->crc = get_word(); + } + + if (extend_size >= 1) { + hdr->extend_type = get_byte(); + extend_size--; + } + if (hdr->extend_type == EXTEND_UNIX || hdr->extend_type == EXTEND_AMIGAOS) { + if (extend_size >= 11) { + hdr->minor_version = get_byte(); + hdr->unix_last_modified_stamp = (time_t) get_longword(); + hdr->unix_mode = get_word(); + hdr->unix_uid = get_word(); + hdr->unix_gid = get_word(); + extend_size -= 11; + } else { + hdr->extend_type = EXTEND_GENERIC; + } + } + while (extend_size-- > 0) + dmy = get_byte(); + if (hdr->extend_type == EXTEND_UNIX) + return TRUE; + } else if (hdr->header_level == 1) { + hdr->has_crc = TRUE; + extend_size = header_size - name_length-25; + hdr->crc = get_word(); + hdr->extend_type = get_byte(); + while (extend_size-- > 0) + dmy = get_byte(); + } else { /* level 2 */ + hdr->has_crc = TRUE; + hdr->crc = get_word(); + hdr->extend_type = get_byte(); + } + + if (hdr->header_level > 0) { + /* Extend Header */ + if (hdr->header_level != 2) + setup_get(data + hdr->header_size); + ptr = get_ptr; + while ((header_size = get_word()) != 0) { + if (hdr->header_level != 2 && + ((data + LZHEADER_STRAGE - get_ptr < header_size) || + zfile_fread(get_ptr, sizeof(char), header_size, fp) < header_size)) { + fatal_error("Invalid header (LHa file ?)"); + return FALSE; + } + switch (get_byte()) { + case 0: + /* + * header crc + */ + setup_get(get_ptr + header_size - 3); + break; + case 1: + /* + * filename + */ + if (header_size >= 256) + return FALSE; + for (i = 0; i < header_size - 3; i++) + hdr->name[i] = (char) get_byte(); + hdr->name[header_size - 3] = '\0'; + name_length = header_size - 3; + break; + case 2: + /* + * directory + */ + if (header_size >= FILENAME_LENGTH) + return FALSE; + for (i = 0; i < header_size - 3; i++) + dirname[i] = (char) get_byte(); + dirname[header_size - 3] = '\0'; + convdelim((unsigned char *)dirname, DELIM); + dir_length = header_size - 3; + break; + case 0x40: + /* + * MS-DOS attribute + */ + if (hdr->extend_type == EXTEND_MSDOS || + hdr->extend_type == EXTEND_HUMAN || + hdr->extend_type == EXTEND_AMIGAOS || + hdr->extend_type == EXTEND_GENERIC) + hdr->attribute = get_word(); + break; + case 0x50: + /* + * UNIX permission + */ + if (hdr->extend_type == EXTEND_UNIX) + hdr->unix_mode = get_word(); + break; + case 0x51: + /* + * UNIX gid and uid + */ + if (hdr->extend_type == EXTEND_UNIX) { + hdr->unix_gid = get_word(); + hdr->unix_uid = get_word(); + } + break; + case 0x52: + /* + * UNIX group name + */ + setup_get(get_ptr + header_size - 3); + break; + case 0x53: + /* + * UNIX user name + */ + setup_get(get_ptr + header_size - 3); + break; + case 0x54: + /* + * UNIX last modified time + */ + if (hdr->extend_type == EXTEND_UNIX || hdr->extend_type == EXTEND_AMIGAOS) + hdr->unix_last_modified_stamp = (time_t) get_longword(); + break; + default: + /* + * other headers + */ + setup_get(get_ptr + header_size - 3); + break; + } + } + if (hdr->header_level != 2 && get_ptr - ptr != 2) { + hdr->packed_size -= get_ptr - ptr - 2; + hdr->header_size += get_ptr - ptr - 2; + } + } + + switch (hdr->extend_type) { + case EXTEND_MSDOS: + msdos_to_unix_filename(hdr->name, name_length); + msdos_to_unix_filename(dirname, dir_length); + case EXTEND_HUMAN: + if (hdr->header_level == 2) + hdr->unix_last_modified_stamp = hdr->last_modified_stamp; + else + hdr->unix_last_modified_stamp = + generic_to_unix_stamp(hdr->last_modified_stamp); + break; + +#ifdef OSK + case EXTEND_OS68K: + case EXTEND_XOSK: +#endif + case EXTEND_AMIGAOS: + case EXTEND_UNIX: + break; + + case EXTEND_MACOS: + macos_to_unix_filename(hdr->name, name_length); + /* macos_to_unix_filename(dirname, dir_length); */ + hdr->unix_last_modified_stamp = + generic_to_unix_stamp(hdr->last_modified_stamp); + break; + + default: + generic_to_unix_filename(hdr->name, name_length); + generic_to_unix_filename(dirname, dir_length); + if (hdr->header_level == 2) + hdr->unix_last_modified_stamp = hdr->last_modified_stamp; + else + hdr->unix_last_modified_stamp = + generic_to_unix_stamp(hdr->last_modified_stamp); + } + + if (dir_length) { + strcat(dirname, hdr->name); + strcpy(hdr->name, dirname); + name_length += dir_length; + } + + return TRUE; +} + +/* ------------------------------------------------------------------------ */ +void +init_header(char *name, struct stat *v_stat, LzHeader *hdr) +{ + int len; + + if (compress_method == LZHUFF5_METHOD_NUM) /* Changed N.Watazaki */ + bcopy(LZHUFF5_METHOD, hdr->method, METHOD_TYPE_STRAGE); + else if (compress_method) + bcopy(LZHUFF1_METHOD, hdr->method, METHOD_TYPE_STRAGE); + else + bcopy(LZHUFF0_METHOD, hdr->method, METHOD_TYPE_STRAGE); + + hdr->packed_size = 0; + hdr->original_size = v_stat->st_size; + hdr->last_modified_stamp = unix_to_generic_stamp(v_stat->st_mtime); + hdr->attribute = GENERIC_ATTRIBUTE; + hdr->header_level = header_level; + strcpy(hdr->name, name); + len = strlen(name); + hdr->crc = 0x0000; + hdr->extend_type = EXTEND_UNIX; + hdr->unix_last_modified_stamp = v_stat->st_mtime; + /* since 00:00:00 JAN.1.1970 */ +#ifdef NOT_COMPATIBLE_MODE + /* Please need your modification in this space. */ +#else + hdr->unix_mode = v_stat->st_mode; +#endif + + hdr->unix_uid = v_stat->st_uid; + hdr->unix_gid = v_stat->st_gid; + + if (is_directory(v_stat)) { + bcopy(LZHDIRS_METHOD, hdr->method, METHOD_TYPE_STRAGE); + hdr->attribute = GENERIC_DIRECTORY_ATTRIBUTE; + hdr->original_size = 0; + if (len > 0 && hdr->name[len - 1] != '/') + strcpy(&hdr->name[len++], "/"); + } + +#ifdef S_IFLNK + if (is_symlink(v_stat)) { + char lkname[257]; + int len; + bcopy(LZHDIRS_METHOD, hdr->method, METHOD_TYPE_STRAGE); + hdr->attribute = GENERIC_DIRECTORY_ATTRIBUTE; + hdr->original_size = 0; + len = readlink(name, lkname, 256); + lkname[len] = (char)'\0'; + sprintf(hdr->name, "%s|%s", hdr->name, lkname); + } +#endif + if (generic_format) + unix_to_generic_filename(hdr->name, len); +} diff --git a/src/archivers/lha/huf.cpp b/src/archivers/lha/huf.cpp new file mode 100644 index 00000000..50f7c62e --- /dev/null +++ b/src/archivers/lha/huf.cpp @@ -0,0 +1,485 @@ +/* ------------------------------------------------------------------------ */ +/* LHa for UNIX */ +/* huf.c -- new static Huffman */ +/* */ +/* Modified Nobutaka Watazaki */ +/* */ +/* Ver. 1.14 Source All chagned 1995.01.14 N.Watazaki */ +/* Ver. 1.14i Support LH7 & Bug Fixed 2000.10. 6 t.okamoto */ +/* ------------------------------------------------------------------------ */ +#include "lha.h" + +#ifdef sony_news +#include +#endif + +#if defined(__STDC__) || defined(NEWSOS) +#include +#endif + +/* ------------------------------------------------------------------------ */ +unsigned short lha_left[2 * NC - 1], lha_right[2 * NC - 1]; +unsigned char c_len[NC], pt_len[NPT]; +unsigned short c_freq[2 * NC - 1], c_table[4096], c_code[NC], p_freq[2 * NP - 1], + pt_table[256], pt_code[NPT], t_freq[2 * NT - 1]; + +static unsigned char *buf; +static unsigned int bufsiz; +static unsigned short blocksize; +static unsigned short output_pos, output_mask; +static int pbit; +static int np; +/* ------------------------------------------------------------------------ */ +/* Encording */ +/* ------------------------------------------------------------------------ */ +static void +count_t_freq(/*void*/) +{ + short i, k, n, count; + + for (i = 0; i < NT; i++) + t_freq[i] = 0; + n = NC; + while (n > 0 && c_len[n - 1] == 0) + n--; + i = 0; + while (i < n) { + k = c_len[i++]; + if (k == 0) { + count = 1; + while (i < n && c_len[i] == 0) { + i++; + count++; + } + if (count <= 2) + t_freq[0] += count; + else if (count <= 18) + t_freq[1]++; + else if (count == 19) { + t_freq[0]++; + t_freq[1]++; + } + else + t_freq[2]++; + } else + t_freq[k + 2]++; + } +} + +/* ------------------------------------------------------------------------ */ +#if 0 +static void +write_pt_len(short n, short nbit, short i_special) +{ + short i, k; + + while (n > 0 && pt_len[n - 1] == 0) + n--; + putbits(nbit, n); + i = 0; + while (i < n) { + k = pt_len[i++]; + if (k <= 6) + putbits(3, k); + else + putbits(k - 3, USHRT_MAX << 1); + if (i == i_special) { + while (i < 6 && pt_len[i] == 0) + i++; + putbits(2, i - 3); + } + } +} +/* ------------------------------------------------------------------------ */ +static void +write_c_len(/*void*/) +{ + short i, k, n, count; + + n = NC; + while (n > 0 && c_len[n - 1] == 0) + n--; + putbits(CBIT, n); + i = 0; + while (i < n) { + k = c_len[i++]; + if (k == 0) { + count = 1; + while (i < n && c_len[i] == 0) { + i++; + count++; + } + if (count <= 2) { + for (k = 0; k < count; k++) + putcode(pt_len[0], pt_code[0]); + } + else if (count <= 18) { + putcode(pt_len[1], pt_code[1]); + putbits(4, count - 3); + } + else if (count == 19) { + putcode(pt_len[0], pt_code[0]); + putcode(pt_len[1], pt_code[1]); + putbits(4, 15); + } + else { + putcode(pt_len[2], pt_code[2]); + putbits(CBIT, count - 20); + } + } + else + putcode(pt_len[k + 2], pt_code[k + 2]); + } +} + +/* ------------------------------------------------------------------------ */ +static void +encode_c(short c) +{ + putcode(c_len[c], c_code[c]); +} + +/* ------------------------------------------------------------------------ */ +static void +encode_p(unsigned short p) +{ + unsigned short c, q; + + c = 0; + q = p; + while (q) { + q >>= 1; + c++; + } + putcode(pt_len[c], pt_code[c]); + if (c > 1) + putbits(c - 1, p); +} + +/* ------------------------------------------------------------------------ */ +static void +send_block( /* void */ ) +{ + unsigned char flags; + unsigned short i, k, root, pos, size; + + root = make_tree(NC, c_freq, c_len, c_code); + size = c_freq[root]; + putbits(16, size); + if (root >= NC) { + count_t_freq(); + root = make_tree(NT, t_freq, pt_len, pt_code); + if (root >= NT) { + write_pt_len(NT, TBIT, 3); + } else { + putbits(TBIT, 0); + putbits(TBIT, root); + } + write_c_len(); + } else { + putbits(TBIT, 0); + putbits(TBIT, 0); + putbits(CBIT, 0); + putbits(CBIT, root); + } + root = make_tree(np, p_freq, pt_len, pt_code); + if (root >= np) { + write_pt_len(np, pbit, -1); + } + else { + putbits(pbit, 0); + putbits(pbit, root); + } + pos = 0; + for (i = 0; i < size; i++) { + if (i % CHAR_BIT == 0) + flags = buf[pos++]; + else + flags <<= 1; + if (flags & (1 << (CHAR_BIT - 1))) { + encode_c(buf[pos++] + (1 << CHAR_BIT)); + k = buf[pos++] << CHAR_BIT; + k += buf[pos++]; + encode_p(k); + } else + encode_c(buf[pos++]); + if (unpackable) + return; + } + for (i = 0; i < NC; i++) + c_freq[i] = 0; + for (i = 0; i < np; i++) + p_freq[i] = 0; +} +/* ------------------------------------------------------------------------ */ +void +output_st1(unsigned short c, unsigned short p) +{ + static unsigned short cpos; + + output_mask >>= 1; + if (output_mask == 0) { + output_mask = 1 << (CHAR_BIT - 1); + if (output_pos >= bufsiz - 3 * CHAR_BIT) { + send_block(); + if (unpackable) + return; + output_pos = 0; + } + cpos = output_pos++; + buf[cpos] = 0; + } + buf[output_pos++] = (unsigned char) c; + c_freq[c]++; + if (c >= (1 << CHAR_BIT)) { + buf[cpos] |= output_mask; + buf[output_pos++] = (unsigned char) (p >> CHAR_BIT); + buf[output_pos++] = (unsigned char) p; + c = 0; + while (p) { + p >>= 1; + c++; + } + p_freq[c]++; + } +} +#endif + +/* ------------------------------------------------------------------------ */ +unsigned char * +alloc_buf( /* void */ ) +{ + bufsiz = 16 * 1024 *2; /* 65408U; */ /* t.okamoto */ + while ((buf = (unsigned char *) malloc(bufsiz)) == NULL) { + bufsiz = (bufsiz / 10) * 9; + if (bufsiz < 4 * 1024) + break; + } + return buf; +} + +/* ------------------------------------------------------------------------ */ +#if 0 +void +encode_start_st1( /* void */ ) +{ + int i; + +#if 0 + if (dicbit <= (MAX_DICBIT - 2)) { + pbit = 4; /* lh4,5 etc. */ + np = 14; + } else { + pbit = 5; /* lh6 */ + np = 16; + } +#endif + + if (dicbit <= 13) { + pbit = 4; /* lh4,5 etc. */ + np = 14; + } else { + pbit = 5; /* lh6,7 */ + if (dicbit == 16) + np = 17; + else + np = 16; + } + + for (i = 0; i < NC; i++) + c_freq[i] = 0; + for (i = 0; i < np; i++) + p_freq[i] = 0; + output_pos = output_mask = 0; + init_putbits(); + buf[0] = 0; +} + +/* ------------------------------------------------------------------------ */ +void +encode_end_st1( /* void */ ) +{ + if (!unpackable) { + send_block(); + putbits(CHAR_BIT - 1, 0); /* flush remaining bits */ + } +} +#endif +/* ------------------------------------------------------------------------ */ +/* decoding */ +/* ------------------------------------------------------------------------ */ +static void +read_pt_len(short nn, short nbit, short i_special) +{ + int i, c, n; + + n = getbits(nbit); + if (n == 0) { + c = getbits(nbit); + for (i = 0; i < nn; i++) + pt_len[i] = 0; + for (i = 0; i < 256; i++) + pt_table[i] = c; + } + else { + i = 0; + while (i < n) { + c = lhabitbuf >> (16 - 3); + if (c == 7) { + unsigned short mask = 1 << (16 - 4); + while (mask & lhabitbuf) { + mask >>= 1; + c++; + } + } + fillbuf((c < 7) ? 3 : c - 3); + pt_len[i++] = c; + if (i == i_special) { + c = getbits(2); + while (--c >= 0) + pt_len[i++] = 0; + } + } + while (i < nn) + pt_len[i++] = 0; + lha_make_table(nn, pt_len, 8, pt_table); + } +} + +/* ------------------------------------------------------------------------ */ +static void +read_c_len( /* void */ ) +{ + short i, c, n; + + n = getbits(CBIT); + if (n == 0) { + c = getbits(CBIT); + for (i = 0; i < NC; i++) + c_len[i] = 0; + for (i = 0; i < 4096; i++) + c_table[i] = c; + } else { + i = 0; + while (i < n) { + c = pt_table[lhabitbuf >> (16 - 8)]; + if (c >= NT) { + unsigned short mask = 1 << (16 - 9); + do { + if (lhabitbuf & mask) + c = lha_right[c]; + else + c = lha_left[c]; + mask >>= 1; + } while (c >= NT); + } + fillbuf(pt_len[c]); + if (c <= 2) { + if (c == 0) + c = 1; + else if (c == 1) + c = getbits(4) + 3; + else + c = getbits(CBIT) + 20; + while (--c >= 0) + c_len[i++] = 0; + } + else + c_len[i++] = c - 2; + } + while (i < NC) + c_len[i++] = 0; + lha_make_table(NC, c_len, 12, c_table); + } +} + +/* ------------------------------------------------------------------------ */ +unsigned short +decode_c_st1( /*void*/ ) +{ + unsigned short j, mask; + + if (blocksize == 0) { + blocksize = getbits(16); + read_pt_len(NT, TBIT, 3); + read_c_len(); + read_pt_len(np, pbit, -1); + } + blocksize--; + j = c_table[lhabitbuf >> 4]; + if (j < NC) + fillbuf(c_len[j]); + else { + fillbuf(12); + mask = 1 << (16 - 1); + do { + if (lhabitbuf & mask) + j = lha_right[j]; + else + j = lha_left[j]; + mask >>= 1; + } while (j >= NC); + fillbuf(c_len[j] - 12); + } + return j; +} + +/* ------------------------------------------------------------------------ */ +unsigned short +decode_p_st1( /* void */ ) +{ + unsigned short j, mask; + + j = pt_table[lhabitbuf >> (16 - 8)]; + if (j < np) + fillbuf(pt_len[j]); + else { + fillbuf(8); + mask = 1 << (16 - 1); + do { + if (lhabitbuf & mask) + j = lha_right[j]; + else + j = lha_left[j]; + mask >>= 1; + } while (j >= np); + fillbuf(pt_len[j] - 8); + } + if (j != 0) + j = (1 << (j - 1)) + getbits(j - 1); + return j; +} + +/* ------------------------------------------------------------------------ */ +void +decode_start_st1( /* void */ ) +{ + if (dicbit <= 13) { + np = 14; + pbit = 4; + } else { + if (dicbit == 16) { + np = 17; /* for -lh7- */ + } else { + np = 16; + } + pbit = 5; + } + +#if 0 + if (dicbit <= 13) { /* 13 ... Changed N.Watazaki */ + np = 14; + pbit = 4; + } else { + np = 16; + pbit = 5; + } +#endif + init_getbits(); + blocksize = 0; +} + +/* Local Variables: */ +/* mode:c */ +/* tab-width:4 */ +/* End: */ diff --git a/src/archivers/lha/larc.cpp b/src/archivers/lha/larc.cpp new file mode 100644 index 00000000..057bd002 --- /dev/null +++ b/src/archivers/lha/larc.cpp @@ -0,0 +1,85 @@ +/* ------------------------------------------------------------------------ */ +/* LHa for UNIX */ +/* larc.c -- extra *.lzs */ +/* */ +/* Modified Nobutaka Watazaki */ +/* */ +/* Ver. 1.14 Source All chagned 1995.01.14 N.Watazaki */ +/* ------------------------------------------------------------------------ */ +#include "lha.h" + +/* ------------------------------------------------------------------------ */ +static int flag, flagcnt, matchpos; +/* ------------------------------------------------------------------------ */ +unsigned short +decode_c_lzs( /*void*/ ) +{ + if (getbits(1)) { + return getbits(8); + } + else { + matchpos = getbits(11); + return getbits(4) + 0x100; + } +} + +/* ------------------------------------------------------------------------ */ +unsigned short +decode_p_lzs( /*void*/ ) +{ + return (loc - matchpos - MAGIC0) & 0x7ff; +} + +/* ------------------------------------------------------------------------ */ +void +decode_start_lzs( /*void*/ ) +{ + init_getbits(); +} + +/* ------------------------------------------------------------------------ */ +unsigned short +decode_c_lz5( /*void*/ ) +{ + int c; + + if (flagcnt == 0) { + flagcnt = 8; + flag = zfile_getc(infile); + } + flagcnt--; + c = zfile_getc(infile); + if ((flag & 1) == 0) { + matchpos = c; + c = zfile_getc(infile); + matchpos += (c & 0xf0) << 4; + c &= 0x0f; + c += 0x100; + } + flag >>= 1; + return c; +} + +/* ------------------------------------------------------------------------ */ +unsigned short +decode_p_lz5( /*void*/ ) +{ + return (loc - matchpos - MAGIC5) & 0xfff; +} + +/* ------------------------------------------------------------------------ */ +void +decode_start_lz5( /*void*/ ) +{ + int i; + + flagcnt = 0; + for (i = 0; i < 256; i++) + memset(&lha_text[i * 13 + 18], i, 13); + for (i = 0; i < 256; i++) + lha_text[256 * 13 + 18 + i] = i; + for (i = 0; i < 256; i++) + lha_text[256 * 13 + 256 + 18 + i] = 255 - i; + memset(&lha_text[256 * 13 + 512 + 18], 0, 128); + memset(&lha_text[256 * 13 + 512 + 128 + 18], ' ', 128 - 18); +} diff --git a/src/archivers/lha/lha.h b/src/archivers/lha/lha.h new file mode 100644 index 00000000..8a0e133a --- /dev/null +++ b/src/archivers/lha/lha.h @@ -0,0 +1,322 @@ +#include "sysconfig.h" +#include "sysdeps.h" +#include "zfile.h" + +#define SYSTIME_HAS_NO_TM +#define NODIRECTORY +#define FTIME +#define NOBSTRING +#define NOINDEX + +/* ------------------------------------------------------------------------ */ +/* LHa for UNIX Archiver Driver */ +/* */ +/* Modified Nobutaka Watazaki */ +/* */ +/* Ver. 1.14 Soruce All chagned 1995.01.14 N.Watazaki */ +/* Ver. 1.14i Modified and bug fixed 2000.10.06 t.okamoto */ +/* ------------------------------------------------------------------------ */ +/* + Included... + lharc.h interface.h slidehuf.h +*/ +#include +#include +#include +#include +#include + +#include + +#include "lha_macro.h" + +struct encode_option { +#if 1 || defined(__STDC__) || defined(AIX) + void (*output) (); + void (*encode_start) (); + void (*encode_end) (); +#else + int (*output) (); + int (*encode_start) (); + int (*encode_end) (); +#endif +}; + +struct decode_option { + unsigned short (*decode_c) (); + unsigned short (*decode_p) (); +#if 1 || defined(__STDC__) || defined(AIX) + void (*decode_start) (); +#else + int (*decode_start) (); +#endif +}; + +/* ------------------------------------------------------------------------ */ +/* LHa File Type Definition */ +/* ------------------------------------------------------------------------ */ +struct string_pool { + int used; + int size; + int n; + char *buffer; +}; + +typedef struct LzHeader { + unsigned char header_size; + char method[METHOD_TYPE_STRAGE]; + long packed_size; + long original_size; + long last_modified_stamp; + unsigned char attribute; + unsigned char header_level; + char name[256]; + unsigned short crc; + boolean has_crc; + unsigned char extend_type; + unsigned char minor_version; + + /* extend_type == EXTEND_UNIX and convert from other type. */ + time_t unix_last_modified_stamp; + unsigned short unix_mode; + unsigned short unix_uid; + unsigned short unix_gid; +} LzHeader; + +struct interfacing { + struct zfile *infile; + struct zfile *outfile; + unsigned long original; + unsigned long packed; + int dicbit; + int method; +}; + + +/* ------------------------------------------------------------------------ */ +/* Option switch variable */ +/* ------------------------------------------------------------------------ */ +/* command line options (common options) */ +EXTERN boolean quiet; +EXTERN boolean text_mode; +EXTERN boolean verbose; +EXTERN boolean noexec; /* debugging option */ +EXTERN boolean force; +EXTERN boolean prof; +EXTERN boolean delete_after_append; +EXTERN int compress_method; +EXTERN int header_level; +/* EXTERN int quiet_mode; */ /* 1996.8.13 t.okamoto */ +#ifdef EUC +EXTERN boolean euc_mode; +#endif + +/* list command flags */ +EXTERN boolean verbose_listing; + +/* extract/print command flags */ +EXTERN boolean output_to_stdout; + +/* add/update/delete command flags */ +EXTERN boolean new_archive; +EXTERN boolean update_if_newer; +EXTERN boolean generic_format; + +EXTERN boolean remove_temporary_at_error; +EXTERN boolean recover_archive_when_interrupt; +EXTERN boolean remove_extracting_file_when_interrupt; +EXTERN boolean get_filename_from_stdin; +EXTERN boolean ignore_directory; +EXTERN boolean verify_mode; + +/* Indicator flag */ +EXTERN int quiet_mode; + +/* ------------------------------------------------------------------------ */ +/* Globale Variable */ +/* ------------------------------------------------------------------------ */ +EXTERN char **cmd_filev; +EXTERN int cmd_filec; + +EXTERN char *archive_name; +EXTERN char expanded_archive_name[FILENAME_LENGTH]; +EXTERN char temporary_name[FILENAME_LENGTH]; +EXTERN char backup_archive_name[FILENAME_LENGTH]; + +EXTERN char *reading_filename, *writting_filename; + +/* 1996.8.13 t.okamoto */ +#if 0 +EXTERN boolean remove_temporary_at_error; +EXTERN boolean recover_archive_when_interrupt; +EXTERN boolean remove_extracting_file_when_interrupt; +#endif + +EXTERN int archive_file_mode; +EXTERN int archive_file_gid; + +EXTERN node *next; +/* EXTERN unsigned short crc; */ /* 1996.8.13 t.okamoto */ + +EXTERN int noconvertcase; /* 2000.10.6 */ + +/* slide.c */ +EXTERN int unpackable; +EXTERN unsigned long origsize, compsize; +EXTERN unsigned short dicbit; +EXTERN unsigned short maxmatch; +EXTERN unsigned long count; +EXTERN unsigned long loc; /* short -> long .. Changed N.Watazaki */ +EXTERN unsigned char *lha_text; +EXTERN int prev_char; + +/* huf.c */ +#ifndef LHA_MAIN_SRC /* t.okamoto 96/2/20 */ +EXTERN unsigned short lha_left[], lha_right[]; +EXTERN unsigned char c_len[], pt_len[]; +EXTERN unsigned short c_freq[], c_table[], c_code[]; +EXTERN unsigned short p_freq[], pt_table[], pt_code[], t_freq[]; +#endif + +/* append.c */ +#ifdef NEED_INCREMENTAL_INDICATOR +EXTERN long indicator_count; +EXTERN long indicator_threshold; +#endif + +/* crcio.c */ +EXTERN struct zfile *infile, *outfile; +EXTERN unsigned short crc, lhabitbuf; +EXTERN int dispflg; +EXTERN long reading_size; + +/* from dhuf.c */ +EXTERN unsigned int n_max; + +/* lhadd.c */ +EXTERN FILE *temporary_fp; + +/* ------------------------------------------------------------------------ */ +/* Functions */ +/* ------------------------------------------------------------------------ */ +/* from lharc.c */ +extern int patmatch(); + +extern void interrupt(); + +extern void message(); +extern void warning(); +extern void error(); +extern void fatal_error(); + +extern boolean need_file(); +extern int inquire(); +extern FILE *xfopen(); + +extern boolean find_files(); +extern void free_files(); + +extern void init_sp(); +extern void add_sp(); +extern void finish_sp(); +extern void free_sp(); +extern void cleaning_files(); + +extern void build_temporary_name(); +extern void build_backup_file_name(); +extern void build_standard_archive_name(); + +extern FILE *open_old_archive(); +extern void init_header(); +extern boolean get_header(struct zfile *, register LzHeader *); +extern boolean archive_is_msdos_sfx1(); +extern boolean skip_msdos_sfx1_code(); +extern void write_header(); +extern void write_archive_tail(); +extern void copy_old_one(); +extern unsigned char *convdelim(unsigned char *path, unsigned char delim); +extern long copyfile(); + +extern void cmd_list(), cmd_extract(), cmd_add(), cmd_delete(); + +extern char *extract_directory; + +/* from slide.c */ + +extern int encode_alloc(); +extern void encode(); +extern int decode(struct interfacing *); + +/* from append.c */ +extern void start_indicator(); +extern void finish_indicator(); +extern void finish_indicator2(); + +/* slide.c */ +extern void output_st1(); +extern unsigned char *alloc_buf(); +extern void encode_start_st1(); +extern void encode_end_st1(); +extern unsigned short decode_c_st1(); +extern unsigned short decode_p_st1(); +extern void decode_start_st1(); + +/* from shuf.c */ +extern void decode_start_st0(); +extern void encode_p_st0( /* unsigned short j */ ); +extern void encode_start_fix(); +extern void decode_start_fix(); +extern unsigned short decode_c_st0(); +extern unsigned short decode_p_st0(); + +/* from dhuf.c */ +extern void start_c_dyn(); +extern void decode_start_dyn(); +extern unsigned short decode_c_dyn(); +extern unsigned short decode_p_dyn(); +extern void output_dyn( /* int code, unsigned int pos */ ); +extern void encode_end_dyn(); + +extern int decode_lzhuf(); + +/* from larc.c */ + +extern unsigned short decode_c_lzs(); +extern unsigned short decode_p_lzs(); +extern unsigned short decode_c_lz5(); +extern unsigned short decode_p_lz5(); +extern void decode_start_lzs(); +extern void decode_start_lz5(); + +extern void lha_make_table(short nchar, unsigned char bitlen[], short tablebits, unsigned short table[]); + +/* from maketree.c */ +/* + * void make_code(short n, uchar len[], ushort code[]); short make_tree(short + * nparm, ushort freqparm[], uchar lenparm[], ushort codeparam[]); + */ +extern void make_code( /* int n, uchar len[], ushort code[] */ ); +extern short make_tree( /* int nparm, ushort freqparm[], uchar lenparm[], + ushort codeparam[] */ ); + +/* from crcio.c */ +extern void make_crctable(); +extern unsigned short calccrc(unsigned char *p, unsigned int n); +extern void fillbuf(unsigned char n); +extern unsigned short getbits(unsigned char n); +extern void putcode(unsigned char n, unsigned short x); +extern void putbits(unsigned char n, unsigned short x); +extern int fread_crc(unsigned char *p, int n, struct zfile *f); +extern void fwrite_crc(unsigned char *p, int n, struct zfile *f); +extern void init_getbits(); +extern void init_putbits(); +extern void make_crctable(); +extern unsigned short calccrc(); + +/* from lhadd.c */ +extern int encode_lzhuf(); +extern int encode_stored_crc(); + +#define warning write_log +#define fatal_error write_log +#define error write_log diff --git a/src/archivers/lha/lha_macro.h b/src/archivers/lha/lha_macro.h new file mode 100644 index 00000000..a227a810 --- /dev/null +++ b/src/archivers/lha/lha_macro.h @@ -0,0 +1,357 @@ +/* ------------------------------------------------------------------------ */ +/* LHa for UNIX Archiver Driver macro define */ +/* */ +/* Modified Nobutaka Watazaki */ +/* */ +/* Ver. 1.14 Soruce All chagned 1995.01.14 N.Watazaki */ +/* Ver. 1.14g modified 2000.05.06 T.OKAMOTO */ +/* ------------------------------------------------------------------------ */ + +/* external variables */ +extern int errno; + +/* used by qsort() for alphabetic-sort */ +#define STRING_COMPARE(a,b) strcmp((a),(b)) + +#define FILENAME_LENGTH 1024 + +/* ------------------------------------------------------------------------ */ +/* YOUR CUSTOMIZIES */ +/* ------------------------------------------------------------------------ */ + +#ifndef ARCHIVENAME_EXTENTION +#define ARCHIVENAME_EXTENTION ".lzh" +#endif +#ifndef BACKUPNAME_EXTENTION +#define BACKUPNAME_EXTENTION ".bak" +#endif +#ifndef TMP_FILENAME_TEMPLATE +#define TMP_FILENAME_TEMPLATE "/tmp/lhXXXXXX" +#endif + +#define SJC_FIRST_P(c) \ + (((unsigned char)(c) >= 0x80) && \ + (((unsigned char)(c) < 0xa0) || \ + ((unsigned char)(c) >= 0xe0) && \ + ((unsigned char)(c) < 0xfd))) +#define SJC_SECOND_P(c) \ + (((unsigned char)(c) >= 0x40) && \ + ((unsigned char)(c) < 0xfd) && \ + ((unsigned char)(c) != 0x7f)) + +#ifdef MULTIBYTE_CHAR +#define MULTIBYTE_FIRST_P SJC_FIRST_P +#define MULTIBYTE_SECOND_P SJC_SECOND_P +#endif /* MULTIBYTE_CHAR */ + +/* ------------------------------------------------------------------------ */ +/* LHa File Definitions */ +/* ------------------------------------------------------------------------ */ +#ifdef S_IFLNK +#define GETSTAT lstat +#else +#define GETSTAT stat +#endif + +#ifdef LHA_MAIN_SRC +#define EXTERN +#else +#define EXTERN extern +#endif /* LHA_MAIN_SRC */ + +#define LZHUFF0_METHOD "-lh0-" +#define LZHUFF1_METHOD "-lh1-" +#define LZHUFF2_METHOD "-lh2-" +#define LZHUFF3_METHOD "-lh3-" +#define LZHUFF4_METHOD "-lh4-" +#define LZHUFF5_METHOD "-lh5-" +#define LZHUFF6_METHOD "-lh6-" +#define LZHUFF7_METHOD "-lh7-" +#define LARC_METHOD "-lzs-" +#define LARC5_METHOD "-lz5-" +#define LARC4_METHOD "-lz4-" +#define LZHDIRS_METHOD "-lhd-" + +#define METHOD_TYPE_STRAGE 5 + +/* Added N.Watazaki ..V */ +#define LZHUFF0_METHOD_NUM 0 +#define LZHUFF1_METHOD_NUM 1 +#define LZHUFF2_METHOD_NUM 2 +#define LZHUFF3_METHOD_NUM 3 +#define LZHUFF4_METHOD_NUM 4 +#define LZHUFF5_METHOD_NUM 5 +#define LZHUFF6_METHOD_NUM 6 +#define LZHUFF7_METHOD_NUM 7 +#define LARC_METHOD_NUM 8 +#define LARC5_METHOD_NUM 9 +#define LARC4_METHOD_NUM 10 +#define LZHDIRS_METHOD_NUM 11 +/* Added N.Watazaki ..^ */ + +#define I_HEADER_SIZE 0 +#define I_HEADER_CHECKSUM 1 +#define I_METHOD 2 +#define I_PACKED_SIZE 7 +#define I_ORIGINAL_SIZE 11 +#define I_LAST_MODIFIED_STAMP 15 +#define I_ATTRIBUTE 19 +#define I_HEADER_LEVEL 20 +#define I_NAME_LENGTH 21 +#define I_NAME 22 + +#define I_CRC 22 /* + name_length */ +#define I_EXTEND_TYPE 24 /* + name_length */ +#define I_MINOR_VERSION 25 /* + name_length */ +#define I_UNIX_LAST_MODIFIED_STAMP 26 /* + name_length */ +#define I_UNIX_MODE 30 /* + name_length */ +#define I_UNIX_UID 32 /* + name_length */ +#define I_UNIX_GID 34 /* + name_length */ +#define I_UNIX_EXTEND_BOTTOM 36 /* + name_length */ + +#define I_GENERIC_HEADER_BOTTOM I_EXTEND_TYPE + +#define EXTEND_GENERIC 0 +#define EXTEND_UNIX 'U' +#define EXTEND_MSDOS 'M' +#define EXTEND_MACOS 'm' +#define EXTEND_OS9 '9' +#define EXTEND_OS2 '2' +#define EXTEND_OS68K 'K' +#define EXTEND_OS386 '3' /* OS-9000??? */ +#define EXTEND_HUMAN 'H' +#define EXTEND_CPM 'C' +#define EXTEND_FLEX 'F' +#define EXTEND_RUNSER 'R' +#define EXTEND_AMIGAOS 'A' + +/* this OS type is not official */ + +#define EXTEND_TOWNSOS 'T' +#define EXTEND_XOSK 'X' + +/*---------------------------------------------------------------------------*/ + +#define GENERIC_ATTRIBUTE 0x20 +#define GENERIC_DIRECTORY_ATTRIBUTE 0x10 +#define HEADER_LEVEL0 0x00 +#define HEADER_LEVEL1 0x01 +#define HEADER_LEVEL2 0x02 + +#define CURRENT_UNIX_MINOR_VERSION 0x00 + +#define DELIM ('/') +#define DELIM2 (0xff) +#define DELIMSTR "/" + +#define OSK_RW_RW_RW 0000033 +#define OSK_FILE_REGULAR 0000000 +#define OSK_DIRECTORY_PERM 0000200 +#define OSK_SHARED_PERM 0000100 +#define OSK_OTHER_EXEC_PERM 0000040 +#define OSK_OTHER_WRITE_PERM 0000020 +#define OSK_OTHER_READ_PERM 0000010 +#define OSK_OWNER_EXEC_PERM 0000004 +#define OSK_OWNER_WRITE_PERM 0000002 +#define OSK_OWNER_READ_PERM 0000001 + +#define UNIX_FILE_TYPEMASK 0170000 +#define UNIX_FILE_REGULAR 0100000 +#define UNIX_FILE_DIRECTORY 0040000 +#define UNIX_FILE_SYMLINK 0120000 +#define UNIX_SETUID 0004000 +#define UNIX_SETGID 0002000 +#define UNIX_STYCKYBIT 0001000 +#define UNIX_OWNER_READ_PERM 0000400 +#define UNIX_OWNER_WRITE_PERM 0000200 +#define UNIX_OWNER_EXEC_PERM 0000100 +#define UNIX_GROUP_READ_PERM 0000040 +#define UNIX_GROUP_WRITE_PERM 0000020 +#define UNIX_GROUP_EXEC_PERM 0000010 +#define UNIX_OTHER_READ_PERM 0000004 +#define UNIX_OTHER_WRITE_PERM 0000002 +#define UNIX_OTHER_EXEC_PERM 0000001 +#define UNIX_RW_RW_RW 0000666 + +#define LZHEADER_STRAGE 4096 + +#define MAX_INDICATOR_COUNT 64 + +typedef short node; + +/* ------------------------------------------------------------------------ */ +/* Slide relation */ +/* ------------------------------------------------------------------------ */ +#if defined(__STDC__) || defined(AIX) + +#include + +#else + +#ifndef CHAR_BIT +#define CHAR_BIT 8 +#endif + +#ifndef UCHAR_MAX +#define UCHAR_MAX ((1<<(sizeof(unsigned char)*8))-1) +#endif + +#ifndef USHRT_MAX +#define USHRT_MAX ((1<<(sizeof(unsigned short)*8))-1) +#endif + +#ifndef SHRT_MAX +#define SHRT_MAX ((1<<(sizeof(short)*8-1))-1) +#endif + +#ifndef SHRT_MIN +#define SHRT_MIN (SHRT_MAX-USHRT_MAX) +#endif + +#ifndef ULONG_MAX +#define ULONG_MAX ((1<<(sizeof(unsigned long)*8))-1) +#endif + +#ifndef LONG_MAX +#define LONG_MAX ((1<<(sizeof(long)*8-1))-1) +#endif + +#ifndef LONG_MIN +#define LONG_MIN (LONG_MAX-ULONG_MAX) +#endif + +#endif /* not __STDC__ */ + +/* ------------------------------------------------------------------------ */ +/* FILE Attribute */ +/* ------------------------------------------------------------------------ */ +#define is_directory(statp) (((statp)->st_mode & S_IFMT) == S_IFDIR) +#define is_symlink(statp) (((statp)->st_mode & S_IFMT) == S_IFLNK) +#define is_regularfile(statp) (((statp)->st_mode & S_IFMT) == S_IFREG) + +#ifdef MSDOS +#define WRITE_BINARY "wb" +#define READ_BINARY "rb" +#else +#define WRITE_BINARY "w" +#define READ_BINARY "r" +#endif + +/* ------------------------------------------------------------------------ */ +/* Memory and String function */ +/* ------------------------------------------------------------------------ */ +#include + +#ifdef NOINDEX +#define index strchr +#define rindex strrchr +#endif /* NOINDEX */ + +#ifdef NOBSTRING +#define bcmp(a,b,n) memcmp ((a),(b),(n)) +#define bzero(d,n) memset((d),0,(n)) +#define bcopy(s,d,n) memmove((d),(s),(n)) +#endif /* NOBSTRING */ + +#ifdef USESTRCASECMP +#define strucmp(p,q) strcasecmp((p),(q)) +#endif + +/* ------------------------------------------------------------------------ */ +/* Individual macro define */ +/* ------------------------------------------------------------------------ */ + +/* from crcio.c */ +#define CRCPOLY 0xA001 /* CRC-16 */ +#define UPDATE_CRC(c) crc = crctable[(crc ^ (c)) & 0xFF] ^ (crc >> CHAR_BIT) + +/* dhuf.c */ +#define N_CHAR (256 + 60 - THRESHOLD + 1) +#define TREESIZE_C (N_CHAR * 2) +#define TREESIZE_P (128 * 2) +#define TREESIZE (TREESIZE_C + TREESIZE_P) +#define ROOT_C 0 +#define ROOT_P TREESIZE_C + +/* header.c */ +#define setup_get(PTR) (get_ptr = (PTR)) +#define get_byte() (*get_ptr++ & 0xff) +#define put_ptr get_ptr +#define setup_put(PTR) (put_ptr = (PTR)) +#define put_byte(c) (*put_ptr++ = (char)(c)) + +/* huf.c */ +#define NP (MAX_DICBIT + 1) +#define NT (USHRT_BIT + 3) +#if 0 +#define PBIT 4 /* smallest integer such that (1 << PBIT) > * NP */ +#define TBIT 5 /* smallest integer such that (1 << TBIT) > * NT */ +#endif + +#define PBIT 5 /* smallest integer such that (1 << PBIT) > * NP */ +#define TBIT 5 /* smallest integer such that (1 << TBIT) > * NT */ + +#define NC (UCHAR_MAX + MAXMATCH + 2 - THRESHOLD) + +/* #if NT > NP #define NPT NT #else #define NPT NP #endif */ +#define NPT 0x80 + +/* larc.c */ +#define MAGIC0 18 +#define MAGIC5 19 + +/* lharc.c */ +#define CMD_UNKNOWN 0 +#define CMD_EXTRACT 1 +#define CMD_ADD 2 +#define CMD_LIST 3 +#define CMD_DELETE 4 + +#define STREQU(a,b) (((a)[0] == (b)[0]) ? (strcmp ((a),(b)) == 0) : FALSE) + +/* shuf.c */ +#define N1 286 /* alphabet size */ +#define N2 (2 * N1 - 1) /* # of nodes in Huffman tree */ +#define EXTRABITS 8 /* >= log2(F-THRESHOLD+258-N1) */ +#define BUFBITS 16 /* >= log2(MAXBUF) */ +#define LENFIELD 4 /* bit size of length field for tree output */ + +/* util.c */ +#define BUFFERSIZE 2048 +#define MAXSFXCODE 1024*64 + +#ifndef NULL +#define NULL (char *)0 +#endif + +/* slide.c */ +/* +#define PERCOLATE 1 +#define NIL 0 +#define HASH(p, c) ((p) + ((c) << hash1) + hash2) +*/ + +/* slide.c */ +#ifdef SUPPORT_LH7 +#define MAX_DICBIT 16 /* lh7 use 16bits */ +#endif + +#ifndef SUPPORT_LH7 +#define MAX_DICBIT 15 /* lh6 use 15bits */ +#endif + +#define MAX_DICSIZ (1 << MAX_DICBIT) +#define MATCHBIT 8 /* bits for MAXMATCH - THRESHOLD */ +#define MAXMATCH 256 /* formerly F (not more than UCHAR_MAX + 1) */ +#define THRESHOLD 3 /* choose optimal value */ + +/* from huf.c */ + +/* alphabet = {0, 1, 2, ..., NC - 1} */ +#define CBIT 9 /* $\lfloor \log_2 NC \rfloor + 1$ */ +#define USHRT_BIT 16 /* (CHAR_BIT * sizeof(ushort)) */ + +/* Local Variables: */ +/* mode:c */ +/* tab-width:4 */ +/* End: */ diff --git a/src/archivers/lha/lhamaketbl.cpp b/src/archivers/lha/lhamaketbl.cpp new file mode 100644 index 00000000..b577aa43 --- /dev/null +++ b/src/archivers/lha/lhamaketbl.cpp @@ -0,0 +1,94 @@ +/* ------------------------------------------------------------------------ */ +/* LHa for UNIX */ +/* maketbl.c -- makes decoding table */ +/* */ +/* Modified Nobutaka Watazaki */ +/* */ +/* Ver. 1.14 Source All chagned 1995.01.14 N.Watazaki */ +/* ------------------------------------------------------------------------ */ +#include "lha.h" + +void +lha_make_table(short nchar, unsigned char bitlen[], short tablebits, unsigned short table[]) +{ + unsigned short count[17]; /* count of bitlen */ + unsigned short weight[17]; /* 0x10000ul >> bitlen */ + unsigned short start[17]; /* first code of bitlen */ + unsigned short total; + unsigned int i, l; + int j, k, m, n, avail; + unsigned short *p; + + avail = nchar; + + /* initialize */ + for (i = 1; i <= 16; i++) { + count[i] = 0; + weight[i] = 1 << (16 - i); + } + + /* count */ + for (i = 0; i < nchar; i++) + count[bitlen[i]]++; + + /* calculate first code */ + total = 0; + for (i = 1; i <= 16; i++) { + start[i] = total; + total += weight[i] * count[i]; + } + if ((total & 0xffff) != 0) + error("make_table()", "Bad table (5)\n"); + + /* shift data for make table. */ + m = 16 - tablebits; + for (i = 1; i <= tablebits; i++) { + start[i] >>= m; + weight[i] >>= m; + } + + /* initialize */ + j = start[tablebits + 1] >> m; + k = 1 << tablebits; + if (j != 0) + for (i = j; i < k; i++) + table[i] = 0; + + /* create table and tree */ + for (j = 0; j < nchar; j++) { + k = bitlen[j]; + if (k == 0) + continue; + l = start[k] + weight[k]; + if (k <= tablebits) { + /* code in table */ + for (i = start[k]; i < l; i++) + table[i] = j; + } + else { + /* code not in table */ + p = &table[(i = start[k]) >> m]; + i <<= tablebits; + n = k - tablebits; + /* make tree (n length) */ + while (--n >= 0) { + if (*p == 0) { + lha_right[avail] = lha_left[avail] = 0; + *p = avail++; + } + if (i & 0x8000) + p = &lha_right[*p]; + else + p = &lha_left[*p]; + i <<= 1; + } + *p = j; + } + start[k] = l; + } +} + +/* Local Variables: */ +/* mode:c */ +/* tab-width:4 */ +/* End: */ diff --git a/src/archivers/lha/lharc.cpp b/src/archivers/lha/lharc.cpp new file mode 100644 index 00000000..fdd9ebaa --- /dev/null +++ b/src/archivers/lha/lharc.cpp @@ -0,0 +1,252 @@ +/* ------------------------------------------------------------------------ */ +/* LHa for UNIX */ +/* lharc.c -- append to archive */ +/* */ +/* Copyright (C) MCMLXXXIX Yooichi.Tagawa */ +/* Modified Nobutaka Watazaki */ +/* Thanks to H.Yoshizaki. (MS-DOS LHarc) */ +/* */ +/* Ver. 0.00 Original 1988.05.23 Y.Tagawa */ +/* Ver. 0.01 Alpha Version (for 4.2BSD) 1989.05.28 Y.Tagawa */ +/* Ver. 0.02 Alpha Version Rel.2 1989.05.29 Y.Tagawa */ +/* Ver. 0.03 Release #3 Beta Version 1989.07.02 Y.Tagawa */ +/* Ver. 0.03a Debug 1989.07.03 Y.Tagawa */ +/* Ver. 0.03b Modified 1989.07.13 Y.Tagawa */ +/* Ver. 0.03c Debug (Thanks to void@rena.dit.junet) */ +/* 1989.08.09 Y.Tagawa */ +/* Ver. 0.03d Modified (quiet and verbose) 1989.09.14 Y.Tagawa */ +/* V1.00 Fixed 1989.09.22 Y.Tagawa */ +/* V1.01 Bug Fixed 1989.12.25 Y.Tagawa */ +/* */ +/* DOS-Version Original LHx V C2.01 (C) H.Yohizaki */ +/* */ +/* V2.00 UNIX Lharc + DOS LHx -> OSK LHx 1990.11.01 Momozou */ +/* V2.01 Minor Modified 1990.11.24 Momozou */ +/* */ +/* Ver. 0.02 LHx for UNIX 1991.11.18 M.Oki */ +/* Ver. 0.03 LHa for UNIX 1991.12.17 M.Oki */ +/* Ver. 0.04 LHa for UNIX beta version 1992.01.20 M.Oki */ +/* Ver. 1.00 LHa for UNIX Fixed 1992.03.19 M.Oki */ +/* */ +/* Ver. 1.10 for Symblic Link 1993.06.25 N.Watazaki */ +/* Ver. 1.11 for Symblic Link Bug Fixed 1993.08.18 N.Watazaki */ +/* Ver. 1.12 for File Date Check 1993.10.28 N.Watazaki */ +/* Ver. 1.13 Bug Fixed (Idicator calcurate) 1994.02.21 N.Watazaki */ +/* Ver. 1.13a Bug Fixed (Sym. Link delete) 1994.03.11 N.Watazaki */ +/* Ver. 1.13b Bug Fixed (Sym. Link delete) 1994.07.29 N.Watazaki */ +/* Ver. 1.14 Source All chagned 1995.01.14 N.Watazaki */ +/* Ver. 1.14b,c Bug Fixed 1996.03.07 t.okamoto */ +/* Ver. 1.14d Version up 1997.01.12 t.okamoto */ +/* Ver. 1.14g Bug Fixed 2000.05.06 t.okamoto */ +/* Ver. 1.14i Modified 2000.10.06 t.okamoto */ +/* ------------------------------------------------------------------------ */ +#define LHA_MAIN_SRC + +#include "lha.h" + +/* ------------------------------------------------------------------------ */ +/* PROGRAM */ +/* ------------------------------------------------------------------------ */ +static int cmd = CMD_UNKNOWN; + +/* 1996.8.13 t.okamoto */ +#if 0 +char **cmd_filev; +int cmd_filec; + +char *archive_name; +char expanded_archive_name[FILENAME_LENGTH]; +char temporary_name[FILENAME_LENGTH]; +char backup_archive_name[FILENAME_LENGTH]; +#endif + +/* static functions */ +static void sort_files(); +static void print_version(); + +char *extract_directory = NULL; +char **xfilev; +int xfilec = 257; + +/* 1996.8.13 t.okamoto */ +#if 0 +char *writting_filename; +char *reading_filename; + +int archive_file_mode; +int archive_file_gid; +#endif +/* ------------------------------------------------------------------------ */ +static void +init_variable() /* Added N.Watazaki */ +{ +/* options */ + quiet = FALSE; + text_mode = FALSE; + verbose = FALSE; + noexec = FALSE; /* debugging option */ + force = FALSE; + prof = FALSE; +#ifndef SUPPORT_LH7 + compress_method = LZHUFF5_METHOD_NUM; +#endif +#ifdef SUPPORT_LH7 + compress_method = LZHUFF7_METHOD_NUM; +#endif + + header_level = HEADER_LEVEL1; + quiet_mode = 0; + +#ifdef EUC + euc_mode = FALSE; +#endif + +/* view command flags */ + verbose_listing = FALSE; + +/* extract command flags */ + output_to_stdout = FALSE; + +/* append command flags */ + new_archive = FALSE; + update_if_newer = FALSE; + delete_after_append = FALSE; + generic_format = FALSE; + + remove_temporary_at_error = FALSE; + recover_archive_when_interrupt = FALSE; + remove_extracting_file_when_interrupt = FALSE; + get_filename_from_stdin = FALSE; + ignore_directory = FALSE; + verify_mode = FALSE; + + noconvertcase = FALSE; + + extract_directory = NULL; + xfilec = 257; +} + +/* ------------------------------------------------------------------------ */ +/* */ +/* ------------------------------------------------------------------------ */ +static int +sort_by_ascii(char **a, char **b) +{ + register char *p, *q; + register int c1, c2; + + p = *a, q = *b; + if (generic_format) { + do { + c1 = *(unsigned char *) p++; + c2 = *(unsigned char *) q++; + if (!c1 || !c2) + break; + if (islower(c1)) + c1 = toupper(c1); + if (islower(c2)) + c2 = toupper(c2); + } + while (c1 == c2); + return c1 - c2; + } + else { + while (*p == *q && *p != '\0') + p++, q++; + return *(unsigned char *) p - *(unsigned char *) q; + } +} + +/* ------------------------------------------------------------------------ */ +char * +xrealloc(char *old, int size) +{ + char *p = (char *) realloc(old, size); + if (!p) + fatal_error("Not enough memory"); + return p; +} + +/* ------------------------------------------------------------------------ */ +/* STRING POOL */ +/* ------------------------------------------------------------------------ */ +/* + string pool : + +-------------+-------------+------+-------------+----------+ + | N A M E 1 \0| N A M E 2 \0| .... | N A M E n \0| | + +-------------+-------------+------+-------------+----------+ + ^ ^ ^ buffer+0 buffer+used buffer+size + + vector : + +---------------+---------------+------------- -----------------+ + | pointer to | pointer to | pointer to ... pointer to | + | stringpool | N A M E 1 | N A M E 2 ... N A M E n | + +---------------+---------------+------------- -------------+ + ^ malloc base returned +*/ + +/* ------------------------------------------------------------------------ */ +void +init_sp(struct string_pool *sp) +{ + sp->size = 1024 - 8; /* any ( >=0 ) */ + sp->used = 0; + sp->n = 0; + sp->buffer = (char *) xmalloc(sp->size * sizeof(char)); +} + +/* ------------------------------------------------------------------------ */ +void +add_sp(struct string_pool *sp, char *name, int len) +{ + while (sp->used + len > sp->size) { + sp->size *= 2; + sp->buffer = (char *) xrealloc(sp->buffer, sp->size * sizeof(char)); + } + bcopy(name, sp->buffer + sp->used, len); + sp->used += len; + sp->n++; +} + +/* ------------------------------------------------------------------------ */ +void +finish_sp(register struct string_pool *sp, int *v_count, char ***v_vector) +{ + int i; + register char *p; + char **v; + + v = (char **) xmalloc((sp->n + 1) * sizeof(char *)); + *v++ = sp->buffer; + *v_vector = v; + *v_count = sp->n; + p = sp->buffer; + for (i = sp->n; i; i--) { + *v++ = p; + if (i - 1) + p += strlen(p) + 1; + } +} + +/* ------------------------------------------------------------------------ */ +void +free_sp(char **vector) +{ + vector--; + free(*vector); /* free string pool */ + free(vector); +} + + +/* ------------------------------------------------------------------------ */ +/* READ DIRECTORY FILES */ +/* ------------------------------------------------------------------------ */ +static boolean +include_path_p(char *path, char *name) +{ + char *n = name; + while (*path) + if (*path++ != *n++) + return (path[-1] == '/' && *n == '\0'); + return (*n == '/' || (n != name && path[-1] == '/' && n[-1] == '/')); +} diff --git a/src/archivers/lha/shuf.cpp b/src/archivers/lha/shuf.cpp new file mode 100644 index 00000000..dd971604 --- /dev/null +++ b/src/archivers/lha/shuf.cpp @@ -0,0 +1,215 @@ +/* ------------------------------------------------------------------------ */ +/* LHa for UNIX */ +/* shuf.c -- extract static Huffman coding */ +/* */ +/* Modified Nobutaka Watazaki */ +/* */ +/* Ver. 1.14 Source All chagned 1995.01.14 N.Watazaki */ +/* ------------------------------------------------------------------------ */ +#include "lha.h" + +/* ------------------------------------------------------------------------ */ +#undef NP +#undef NP2 + +#define NP (8 * 1024 / 64) +#define NP2 (NP * 2 - 1) +/* ------------------------------------------------------------------------ */ +static unsigned int np; +int fixed[2][16] = { + {3, 0x01, 0x04, 0x0c, 0x18, 0x30, 0}, /* old compatible */ + {2, 0x01, 0x01, 0x03, 0x06, 0x0D, 0x1F, 0x4E, 0} /* 8K buf */ +}; +/* ------------------------------------------------------------------------ */ +void +decode_start_st0( /*void*/ ) +{ + n_max = 286; + maxmatch = MAXMATCH; + init_getbits(); +#ifdef SUPPORT_LH7 + np = 1 << (MAX_DICBIT - 7); +#endif +#ifndef SUPPORT_LH7 + np = 1 << (MAX_DICBIT - 6); +#endif + +} +#if 0 +/* ------------------------------------------------------------------------ */ +void +encode_p_st0(unsigned short j) +{ + unsigned short i; + + i = j >> 6; + putcode(pt_len[i], pt_code[i]); + putbits(6, j & 0x3f); +} +#endif +/* ------------------------------------------------------------------------ */ +static void +ready_made(int method) +{ + int i, j; + unsigned int code, weight; + int *tbl; + + tbl = fixed[method]; + j = *tbl++; + weight = 1 << (16 - j); + code = 0; + for (i = 0; i < np; i++) { + while (*tbl == i) { + j++; + tbl++; + weight >>= 1; + } + pt_len[i] = j; + pt_code[i] = code; + code += weight; + } +} + +/* ------------------------------------------------------------------------ */ +#if 0 +void +encode_start_fix( /*void*/ ) +{ + n_max = 314; + maxmatch = 60; + np = 1 << (12 - 6); + init_putbits(); + start_c_dyn(); + ready_made(0); +} +#endif +/* ------------------------------------------------------------------------ */ +static void +read_tree_c( /*void*/ ) +{ /* read tree from file */ + int i, c; + + i = 0; + while (i < N1) { + if (getbits(1)) + c_len[i] = getbits(LENFIELD) + 1; + else + c_len[i] = 0; + if (++i == 3 && c_len[0] == 1 && c_len[1] == 1 && c_len[2] == 1) { + c = getbits(CBIT); + for (i = 0; i < N1; i++) + c_len[i] = 0; + for (i = 0; i < 4096; i++) + c_table[i] = c; + return; + } + } + lha_make_table(N1, c_len, 12, c_table); +} + +/* ------------------------------------------------------------------------ */ +static void +read_tree_p(/*void*/) +{ /* read tree from file */ + int i, c; + + i = 0; + while (i < NP) { + pt_len[i] = getbits(LENFIELD); + if (++i == 3 && pt_len[0] == 1 && pt_len[1] == 1 && pt_len[2] == 1) { +#ifdef SUPPORT_LH7 + c = getbits(MAX_DICBIT - 7); +#else + c = getbits(MAX_DICBIT - 6); +#endif + for (i = 0; i < NP; i++) + c_len[i] = 0; + for (i = 0; i < 256; i++) + c_table[i] = c; + return; + } + } +} + +/* ------------------------------------------------------------------------ */ +void +decode_start_fix(/*void*/) +{ + n_max = 314; + maxmatch = 60; + init_getbits(); + np = 1 << (12 - 6); + start_c_dyn(); + ready_made(0); + lha_make_table(np, pt_len, 8, pt_table); +} + +/* ------------------------------------------------------------------------ */ +unsigned short +decode_c_st0(/*void*/) +{ + int i, j; + static unsigned short blocksize = 0; + + if (blocksize == 0) { /* read block head */ + blocksize = getbits(BUFBITS); /* read block blocksize */ + read_tree_c(); + if (getbits(1)) { + read_tree_p(); + } + else { + ready_made(1); + } + lha_make_table(NP, pt_len, 8, pt_table); + } + blocksize--; + j = c_table[lhabitbuf >> 4]; + if (j < N1) + fillbuf(c_len[j]); + else { + fillbuf(12); + i = lhabitbuf; + do { + if ((short) i < 0) + j = lha_right[j]; + else + j = lha_left[j]; + i <<= 1; + } while (j >= N1); + fillbuf(c_len[j] - 12); + } + if (j == N1 - 1) + j += getbits(EXTRABITS); + return j; +} + +/* ------------------------------------------------------------------------ */ +unsigned short +decode_p_st0(/*void*/) +{ + int i, j; + + j = pt_table[lhabitbuf >> 8]; + if (j < np) { + fillbuf(pt_len[j]); + } + else { + fillbuf(8); + i = lhabitbuf; + do { + if ((short) i < 0) + j = lha_right[j]; + else + j = lha_left[j]; + i <<= 1; + } while (j >= np); + fillbuf(pt_len[j] - 8); + } + return (j << 6) + getbits(6); +} + +/* Local Variables: */ +/* mode:c */ +/* tab-width:4 */ +/* End: */ diff --git a/src/archivers/lha/slide.cpp b/src/archivers/lha/slide.cpp new file mode 100644 index 00000000..5fea177d --- /dev/null +++ b/src/archivers/lha/slide.cpp @@ -0,0 +1,459 @@ +/* ------------------------------------------------------------------------ */ +/* LHa for UNIX */ +/* slice.c -- sliding dictionary with percolating update */ +/* */ +/* Modified Nobutaka Watazaki */ +/* */ +/* Ver. 1.14d Exchanging a search algorithm 1997.01.11 T.Okamoto */ +/* ------------------------------------------------------------------------ */ + +#if 0 +#define DEBUG 1 +#endif + +#include "lha.h" + + +#ifdef DEBUG +FILE *fout = NULL; +static int noslide = 1; +#endif + +/* ------------------------------------------------------------------------ */ + +static unsigned long encoded_origsize; + +/* ------------------------------------------------------------------------ */ + +static unsigned int *hash; +static unsigned int *prev; + +/* static unsigned char *lha_text; */ +unsigned char *too_flag; + +#if 0 +static struct encode_option encode_define[2] = { +#if 1 || defined(__STDC__) || defined(AIX) + /* lh1 */ + {(void (*) ()) output_dyn, + (void (*) ()) encode_start_fix, + (void (*) ()) encode_end_dyn}, + /* lh4, 5,6 */ + {(void (*) ()) output_st1, + (void (*) ()) encode_start_st1, + (void (*) ()) encode_end_st1} +#else + /* lh1 */ + {(int (*) ()) output_dyn, + (int (*) ()) encode_start_fix, + (int (*) ()) encode_end_dyn}, + /* lh4, 5,6 */ + {(int (*) ()) output_st1, + (int (*) ()) encode_start_st1, + (int (*) ()) encode_end_st1} +#endif +}; +#endif + +static struct decode_option decode_define[] = { + /* lh1 */ + {decode_c_dyn, decode_p_st0, decode_start_fix}, + /* lh2 */ + {decode_c_dyn, decode_p_dyn, decode_start_dyn}, + /* lh3 */ + {decode_c_st0, decode_p_st0, decode_start_st0}, + /* lh4 */ + {decode_c_st1, decode_p_st1, decode_start_st1}, + /* lh5 */ + {decode_c_st1, decode_p_st1, decode_start_st1}, + /* lh6 */ + {decode_c_st1, decode_p_st1, decode_start_st1}, + /* lh7 */ + {decode_c_st1, decode_p_st1, decode_start_st1}, + /* lzs */ + {decode_c_lzs, decode_p_lzs, decode_start_lzs}, + /* lz5 */ + {decode_c_lz5, decode_p_lz5, decode_start_lz5} +}; + +static struct encode_option encode_set; +static struct decode_option decode_set; + +#if 0 +static node pos, matchpos, avail, *position, *parent, *prev; +static int remainder, matchlen; +static unsigned char *level, *childcount; +static unsigned long dicsiz; /* t.okamoto */ +static unsigned short max_hash_val; +static unsigned short hash1, hash2; +#endif + +#ifdef SUPPORT_LH7 +#define DICSIZ (1L << 16) +#define TXTSIZ (DICSIZ * 2L + MAXMATCH) +#else +#define DICSIZ (((unsigned long)1) << 15) +#define TXTSIZ (DICSIZ * 2 + MAXMATCH) +#endif + +#define HSHSIZ (((unsigned long)1) <<15) +#define NIL 0 +#define LIMIT 0x100 /* chain ŤΠlimit */ + +static unsigned int txtsiz; + +static unsigned long dicsiz; + +static unsigned int hval; +static int matchlen; +static unsigned int matchpos; +static unsigned int pos; +static unsigned int remainder; + +#if 0 +/* ------------------------------------------------------------------------ */ +int +encode_alloc(int method) +{ + if (method == LZHUFF1_METHOD_NUM) { /* Changed N.Watazaki */ + encode_set = encode_define[0]; + maxmatch = 60; + dicbit = 12; /* 12 Changed N.Watazaki */ + } else { /* method LH4(12),LH5(13),LH6(15) */ + encode_set = encode_define[1]; + maxmatch = MAXMATCH; + if (method == LZHUFF7_METHOD_NUM) + dicbit = MAX_DICBIT; /* 16 bits */ + else if (method == LZHUFF6_METHOD_NUM) + dicbit = MAX_DICBIT-1; /* 15 bits */ + else /* LH5 LH4 is not used */ + dicbit = MAX_DICBIT - 3; /* 13 bits */ + } + + dicsiz = (((unsigned long)1) << dicbit); + txtsiz = dicsiz*2+maxmatch; + + if (hash) return method; + + if (alloc_buf() == NULL) exit(207); /* I don't know this 207. */ + + hash = (unsigned int*)malloc(HSHSIZ * sizeof(unsigned int)); + prev = (unsigned int*)malloc(DICSIZ * sizeof(unsigned int)); + lha_text = (unsigned char*)malloc(TXTSIZ); + too_flag = (unsigned char*)malloc(HSHSIZ); + + if (hash == NULL || prev == NULL || lha_text == NULL || too_flag == NULL) + exit(207); + + return method; +} + +/* ------------------------------------------------------------------------ */ +/* ¥Ý¥¤¥ó¥¿¤Î½é´ü²½ */ + +static void init_slide() +{ + unsigned int i; + + for (i = 0; i < HSHSIZ; i++) { + hash[i] = NIL; + too_flag[i] = 0; + } + /* + for (i = 0; i < DICSIZ; i++) { + prev[i] = NIL; + } + */ +} + +/* ¼­½ñ¤ò DICSIZ ʬ Á°¤Ë¤º¤é¤¹ */ + +static void update() +{ + unsigned int i, j; + unsigned int k; + long n; + +#if 0 + memmove(&lha_text[0], &text[dicsiz], (unsigned)(txtsiz - dicsiz)); +#else + { + int m; + i = 0; j = dicsiz; m = txtsiz-dicsiz; + while (m-- > 0) { + lha_text[i++] = lha_text[j++]; + } + } +#endif + n = fread_crc(&lha_text[(unsigned)(txtsiz - dicsiz)], + (unsigned)dicsiz, infile); + + remainder += n; + encoded_origsize += n; + + pos -= dicsiz; + for (i = 0; i < HSHSIZ; i++) { + j = hash[i]; + hash[i] = (j > dicsiz) ? j - dicsiz : NIL; + too_flag[i] = 0; + } + for (i = 0; i < dicsiz; i++) { + j = prev[i]; + prev[i] = (j > dicsiz) ? j - dicsiz : NIL; + } +} + + +/* ¸½ºß¤Îʸ»úÎó¤ò¥Á¥§¡¼¥ó¤ËÄɲ乤ë */ + +static void insert() +{ + prev[pos & (dicsiz - 1)] = hash[hval]; + hash[hval] = pos; +} + + +/* ¸½ºß¤Îʸ»úÎó¤ÈºÇĹ°ìÃפ¹¤ëʸ»úÎó¤ò¸¡º÷¤·¡¢¥Á¥§¡¼¥ó¤ËÄɲ乤ë */ + +static void match_insert() +{ + unsigned int scan_pos, scan_end, len; + unsigned char *a, *b; + unsigned int chain, off, h, max; + + max = maxmatch; /* MAXMATCH; */ + if (matchlen < THRESHOLD - 1) matchlen = THRESHOLD - 1; + matchpos = pos; + + off = 0; + for (h = hval; too_flag[h] && off < maxmatch - THRESHOLD; ) { + h = ((h << 5) ^ lha_text[pos + (++off) + 2]) & (unsigned)(HSHSIZ - 1); + } + if (off == maxmatch - THRESHOLD) off = 0; + for (;;) { + chain = 0; + scan_pos = hash[h]; + scan_end = (pos > dicsiz) ? pos + off - dicsiz : off; + while (scan_pos > scan_end) { + chain++; + + if (lha_text[scan_pos + matchlen - off] == lha_text[pos + matchlen]) { + { + a = lha_text + scan_pos - off; b = lha_text + pos; + for (len = 0; len < max && *a++ == *b++; len++); + } + + if (len > matchlen) { + matchpos = scan_pos - off; + if ((matchlen = len) == max) { + break; + } +#ifdef DEBUG + if (noslide) { + if (matchpos < dicsiz) { + printf("matchpos=%u scan_pos=%u dicsiz=%u\n" + ,matchpos, scan_pos, dicsiz); + } + } +#endif + } + } + scan_pos = prev[scan_pos & (dicsiz - 1)]; + } + + if (chain >= LIMIT) + too_flag[h] = 1; + + if (matchlen > off + 2 || off == 0) + break; + max = off + 2; + off = 0; + h = hval; + } + prev[pos & (dicsiz - 1)] = hash[hval]; + hash[hval] = pos; +} + + +/* ¥Ý¥¤¥ó¥¿¤ò¿Ê¤á¡¢¼­½ñ¤ò¹¹¿·¤·¡¢¥Ï¥Ã¥·¥åÃͤò¹¹¿·¤¹¤ë */ + +static void get_next() +{ + remainder--; + if (++pos >= txtsiz - maxmatch) { + update(); +#ifdef DEBUG + noslide = 0; +#endif + } + hval = ((hval << 5) ^ lha_text[pos + 2]) & (unsigned)(HSHSIZ - 1); +} + +void encode(struct interfacing *lhinterface) +{ + int lastmatchlen; + unsigned int lastmatchoffset; + +#ifdef DEBUG + unsigned int addr; + + addr = 0; + + fout = fopen("en", "wt"); + if (fout == NULL) exit(1); +#endif + infile = lhinterface->infile; + outfile = lhinterface->outfile; + origsize = lhinterface->original; + compsize = count = 0L; + crc = unpackable = 0; + + /* encode_alloc(); */ /* allocate_memory(); */ + init_slide(); + + encode_set.encode_start(); + memset(&lha_text[0], ' ', (long)TXTSIZ); + + remainder = fread_crc(&lha_text[dicsiz], txtsiz-dicsiz, infile); + encoded_origsize = remainder; + matchlen = THRESHOLD - 1; + + pos = dicsiz; + + if (matchlen > remainder) matchlen = remainder; + hval = ((((lha_text[dicsiz] << 5) ^ lha_text[dicsiz + 1]) << 5) + ^ lha_text[dicsiz + 2]) & (unsigned)(HSHSIZ - 1); + + insert(); + while (remainder > 0 && ! unpackable) { + lastmatchlen = matchlen; lastmatchoffset = pos - matchpos - 1; + --matchlen; + get_next(); match_insert(); + if (matchlen > remainder) matchlen = remainder; + if (matchlen > lastmatchlen || lastmatchlen < THRESHOLD) { + encode_set.output(lha_text[pos - 1], 0); +#ifdef DEBUG + fprintf(fout, "%u C %02X\n", addr, lha_text[pos-1]); + addr++; +#endif + count++; + } else { + encode_set.output(lastmatchlen + (UCHAR_MAX + 1 - THRESHOLD), + (lastmatchoffset) & (dicsiz-1) ); + --lastmatchlen; + +#ifdef DEBUG + fprintf(fout, "%u M %u %u ", addr, + lastmatchoffset & (dicsiz-1), lastmatchlen+1); + addr += lastmatchlen +1 ; + + { + int t,cc; + for (t=0; t 0) { + get_next(); insert(); + count++; + } + get_next(); + matchlen = THRESHOLD - 1; + match_insert(); + if (matchlen > remainder) matchlen = remainder; + } + } + encode_set.encode_end(); + + interface->packed = compsize; + interface->original = encoded_origsize; +} + +/* ------------------------------------------------------------------------ */ + +#endif + +int +decode(struct interfacing *lhinterface) +{ + unsigned int i, j, k, c; + unsigned int dicsiz1, offset; + unsigned char *dtext; + + +#ifdef DEBUG + fout = fopen("de", "wt"); + if (fout == NULL) exit(1); +#endif + + infile = lhinterface->infile; + outfile = lhinterface->outfile; + dicbit = lhinterface->dicbit; + origsize = lhinterface->original; + compsize = lhinterface->packed; + decode_set = decode_define[lhinterface->method - 1]; + + crc = 0; + prev_char = -1; + dicsiz = 1L << dicbit; + dtext = (unsigned char *) malloc(dicsiz); + if (dtext == NULL) + return 0; + for (i=0; imethod == LARC_METHOD_NUM) ? 0x100 - 2 : 0x100 - 3; + count = 0; + loc = 0; + while (count < origsize) { + c = decode_set.decode_c(); + if (c <= UCHAR_MAX) { +#ifdef DEBUG + fprintf(fout, "%u C %02X\n", count, c); +#endif + dtext[loc++] = c; + if (loc == dicsiz) { + fwrite_crc(dtext, dicsiz, outfile); + loc = 0; + } + count++; + } + else { + j = c - offset; + i = (loc - decode_set.decode_p() - 1) & dicsiz1; +#ifdef DEBUG + fprintf(fout, "%u M %u %u ", count, (loc-1-i) & dicsiz1, j); +#endif + count += j; + for (k = 0; k < j; k++) { + c = dtext[(i + k) & dicsiz1]; + +#ifdef DEBUG + fprintf(fout, "%02X ", c & 0xff); +#endif + dtext[loc++] = c; + if (loc == dicsiz) { + fwrite_crc(dtext, dicsiz, outfile); + loc = 0; + } + } +#ifdef DEBUG + fprintf(fout, "\n"); +#endif + } + } + if (loc != 0) { + fwrite_crc(dtext, loc, outfile); + } + + free(dtext); + return 1; +} + +/* Local Variables: */ +/* mode:c */ +/* tab-width:4 */ +/* End: */ diff --git a/src/archivers/lha/uae_lha.cpp b/src/archivers/lha/uae_lha.cpp new file mode 100644 index 00000000..d553f7db --- /dev/null +++ b/src/archivers/lha/uae_lha.cpp @@ -0,0 +1,90 @@ +#include +#include +#include +#include + +#include "sysconfig.h" +#include "sysdeps.h" +#include "zfile.h" +#include "zarchive.h" + +#include "lha.h" + +static char *methods[] = +{ + LZHUFF0_METHOD, LZHUFF1_METHOD, LZHUFF2_METHOD, LZHUFF3_METHOD, + LZHUFF4_METHOD, LZHUFF5_METHOD, LZHUFF6_METHOD, LZHUFF7_METHOD, + LARC_METHOD, LARC5_METHOD, LARC4_METHOD, + LZHDIRS_METHOD, + NULL +}; + +struct zvolume *archive_directory_lha(struct zfile *zf) +{ + struct zvolume *zv; + struct zarchive_info zai; + LzHeader hdr; + int i; + + tzset(); + zv = zvolume_alloc(zf, ArchiveFormatLHA, NULL); + while (get_header(zf, &hdr)) { + struct znode *zn; + memset(&zai, 0, sizeof zai); + zai.name = hdr.name; + zai.size = hdr.original_size; + zai.flags = hdr.attribute; + zai.t = hdr.unix_last_modified_stamp -= timezone; + if (hdr.name[strlen(hdr.name) + 1] != 0) + zai.comment = &hdr.name[strlen(hdr.name) + 1]; + zn = zvolume_addfile_abs(zv, &zai); + zn->offset = zfile_ftell(zf); + zn->packedsize = hdr.packed_size; + for (i = 0; methods[i]; i++) { + if (!strcmp(methods[i], hdr.method)) + zn->method = i; + } + zfile_fseek(zf, hdr.packed_size, SEEK_CUR); + + } + return zv; +} + +struct zfile *archive_access_lha(struct znode *zn) +{ + struct zfile *zf = zn->volume->archive; + struct zfile *out = zfile_fopen_empty (zn->name, zn->size); + struct interfacing lhinterface; + + zfile_fseek(zf, zn->offset, SEEK_SET); + + lhinterface.method = zn->method; + lhinterface.dicbit = 13; /* method + 8; -lh5- */ + lhinterface.infile = zf; + lhinterface.outfile = out; + lhinterface.original = zn->size; + lhinterface.packed = zn->packedsize; + + switch (zn->method) { + case LZHUFF0_METHOD_NUM: + case LARC4_METHOD_NUM: + zfile_fread(out->data, zn->size, 1, zf); + break; + case LARC_METHOD_NUM: /* -lzs- */ + lhinterface.dicbit = 11; + decode(&lhinterface); + break; + case LZHUFF1_METHOD_NUM: /* -lh1- */ + case LZHUFF4_METHOD_NUM: /* -lh4- */ + case LARC5_METHOD_NUM: /* -lz5- */ + lhinterface.dicbit = 12; + decode(&lhinterface); + break; + case LZHUFF6_METHOD_NUM: /* -lh6- */ /* Added N.Watazaki (^_^) */ + case LZHUFF7_METHOD_NUM: /* -lh7- */ + lhinterface.dicbit = (zn->method - LZHUFF6_METHOD_NUM) + 15; + default: + decode(&lhinterface); + } + return out; +} diff --git a/src/archivers/lha/util.cpp b/src/archivers/lha/util.cpp new file mode 100644 index 00000000..6c0c68c2 --- /dev/null +++ b/src/archivers/lha/util.cpp @@ -0,0 +1,237 @@ +/* ------------------------------------------------------------------------ */ +/* LHa for UNIX */ +/* util.c -- LHarc Util */ +/* */ +/* Modified Nobutaka Watazaki */ +/* */ +/* Ver. 1.14 Source All chagned 1995.01.14 N.Watazaki */ +/* Ver. 1.14e Support for sfx archives 1999.05.28 T.Okamoto */ +/* ------------------------------------------------------------------------ */ +#include "lha.h" +/* + * util.c - part of LHa for UNIX Feb 26 1992 modified by Masaru Oki Mar 4 + * 1992 modified by Masaru Oki #ifndef USESTRCASECMP added. Mar 31 1992 + * modified by Masaru Oki #ifdef NOMEMSET added. + */ + +/* ------------------------------------------------------------------------ */ +extern unsigned short crc; + +/* ------------------------------------------------------------------------ */ +/* convert path delimit + erreturns *filename */ +/* ------------------------------------------------------------------------ */ +unsigned char * +convdelim(unsigned char *path, unsigned char delim) +{ + unsigned char c; + unsigned char *p; +#ifdef MULTIBYTE_CHAR + int kflg; + + kflg = 0; +#endif + for (p = path; (c = *p) != 0; p++) { +#ifdef MULTIBYTE_CHAR + if (kflg) { + kflg = 0; + } + else if (MULTIBYTE_FIRST_P(c)) { + kflg = 1; + } + else +#endif + if (c == '\\' || c == DELIM || c == DELIM2) { + *p = delim; + path = p + 1; + } + } + return path; +} + + +/* + * strdup(3) + */ + +/* ------------------------------------------------------------------------ */ +#ifdef NOSTRDUP +char * +strdup(char *buf) +{ + char *p; + + if ((p = (char *) malloc(strlen(buf) + 1)) == NULL) + return NULL; + strcpy(p, buf); + return p; +} +#endif + +/* + * memmove( char *dst , char *src , size_t cnt ) + */ + +/* ------------------------------------------------------------------------ */ +#if defined(NOBSTRING) && !defined(__STDC__) +void * +memmove(register char *dst, register char *src, register int cnt) +{ + if (dst == src) + return dst; + if (src > dst) { + while (--cnt >= 0) + *dst++ = *src++; + } + else { + dst += cnt; + src += cnt; + while (--cnt >= 0) + *--dst = *--src; + } + return dst; +} +#endif + +/* + * rename - change the name of file 91.11.02 by Tomohiro Ishikawa + * (ishikawa@gaia.cow.melco.CO.JP) 92.01.20 little modified (added #ifdef) by + * Masaru Oki 92.01.28 added mkdir() and rmdir() by Tomohiro Ishikawa + */ + +#if defined(NOFTRUNCATE) && !defined(_MINIX) + +/* ------------------------------------------------------------------------ */ +int +rename(char *from, char *to) +{ + struct stat s1, s2; + extern int errno; + + if (stat(from, &s1) < 0) + return (-1); + /* is 'FROM' file a directory? */ + if ((s1.st_mode & S_IFMT) == S_IFDIR) { + errno = ENOTDIR; + return (-1); + } + if (stat(to, &s2) >= 0) { /* 'TO' exists! */ + /* is 'TO' file a directory? */ + if ((s2.st_mode & S_IFMT) == S_IFDIR) { + errno = EISDIR; + return (-1); + } + if (unlink(to) < 0) + return (-1); + } + if (link(from, to) < 0) + return (-1); + if (unlink(from) < 0) + return (-1); + return (0); +} +#endif /* NOFTRUNCATE */ +/* ------------------------------------------------------------------------ */ + +#ifdef NOMKDIR +#ifndef MKDIRPATH +#define MKDIRPATH "/bin/mkdir" +#endif +#ifndef RMDIRPATH +#define RMDIRPATH "/bin/rmdir" +#endif +int +rmdir(char *path) +{ + int stat, rtn = 0; + char *cmdname; + if ((cmdname = (char *) malloc(strlen(RMDIRPATH) + 1 + strlen(path) + 1)) + == 0) + return (-1); + strcpy(cmdname, RMDIRPATH); + *(cmdname + strlen(RMDIRPATH)) = ' '; + strcpy(cmdname + strlen(RMDIRPATH) + 1, path); + if ((stat = system(cmdname)) < 0) + rtn = -1; /* fork or exec error */ + else if (stat) { /* RMDIR command error */ + errno = EIO; + rtn = -1; + } + free(cmdname); + return (rtn); +} + +/* ------------------------------------------------------------------------ */ +int +mkdir(char *path, int mode) +{ + int child, stat; + char *cmdname, *cmdpath = MKDIRPATH; + if ((cmdname = (char *) strrchr(cmdpath, '/')) == (char *) 0) + cmdname = cmdpath; + if ((child = fork()) < 0) + return (-1); /* fork error */ + else if (child) { /* parent process */ + while (child != wait(&stat)) /* ignore signals */ + continue; + } + else { /* child process */ + int maskvalue; + maskvalue = umask(0); /* get current umask() value */ + umask(maskvalue | (0777 & ~mode)); /* set it! */ + execl(cmdpath, cmdname, path, (char *) 0); + /* never come here except execl is error */ + return (-1); + } + if (stat != 0) { + errno = EIO; /* cannot get error num. */ + return (-1); + } + return (0); +} +#endif + +/* + * strucmp modified: Oct 29 1991 by Masaru Oki + */ + +#ifndef USESTRCASECMP +static int +my_toupper(register int n) +{ + if (n >= 'a' && n <= 'z') + return n & (~('a' - 'A')); + return n; +} + +/* ------------------------------------------------------------------------ */ +int +strucmp(register char *s, register char *t) +{ + while (my_toupper(*s++) == my_toupper(*t++)) + if (!*s || !*t) + break; + if (!*s && !*t) + return 0; + return 1; +} +#endif + +/* ------------------------------------------------------------------------ */ +#ifdef NOMEMSET +/* Public Domain memset(3) */ +char * +memset(char *s, int c, int n) +{ + char *p = s; + while (n--) + *p++ = (char) c; + return s; +} +#endif + +/* Local Variables: */ +/* mode:c */ +/* tab-width:4 */ +/* compile-command:"gcc -c util.c" */ +/* End: */ diff --git a/src/archivers/lzx/unlzx.c b/src/archivers/lzx/unlzx.c new file mode 100644 index 00000000..c7e17dca --- /dev/null +++ b/src/archivers/lzx/unlzx.c @@ -0,0 +1,828 @@ +/* $VER: unlzx.c 1.0 (22.2.98) */ +/* Created: 11.2.98 */ +/* Added Pipe support to read from stdin (03.4.01, Erik Meusel) */ + +/* LZX Extract in (supposedly) portable C. */ + +/* ********************* WINDOWS PORTING NOTES STARTS *********************/ + +/* Ported to Windows Platform by Stefano Coletta on 22.5.02 */ +/* creator@mindcreations.com or visit http://creator.mindcreations.com */ + +/* Changes to original code include: */ +/* - Using #include to substitute the mkdir() function call */ +/* - Added #include "getopt.h" to support getopt() function */ + +/* Compile with: */ +/* Microsoft Visual Studio 6.0 SP5 using supplied project file */ + +/* ********************** WINDOWS PORTING NOTES END ***********************/ + + +/* Thanks to Dan Fraser for decoding the coredumps and helping me track */ +/* down some HIDEOUSLY ANNOYING bugs. */ + +/* Everything is accessed as unsigned char's to try and avoid problems */ +/* with byte order and alignment. Most of the decrunch functions */ +/* encourage overruns in the buffers to make things as fast as possible. */ +/* All the time is taken up in crc_calc() and decrunch() so they are */ +/* pretty damn optimized. Don't try to understand this program. */ + +/* ---------------------------------------------------------------------- */ + +/* - minimal UAE specific version 13-14.06.2007 by Toni Wilen */ + +#include +#include + +#include "sysconfig.h" +#include "sysdeps.h" + +#include "zfile.h" +#include "zarchive.h" + +/* ---------------------------------------------------------------------- */ + +static unsigned char *source; +static unsigned char *destination; +static unsigned char *source_end; +static unsigned char *destination_end; + +static unsigned int decrunch_method; +static unsigned int decrunch_length; +static unsigned int last_offset; +static unsigned int global_control; +static int global_shift; + +static unsigned char offset_len[8]; +static unsigned short offset_table[128]; +static unsigned char huffman20_len[20]; +static unsigned short huffman20_table[96]; +static unsigned char literal_len[768]; +static unsigned short literal_table[5120]; + +/* ---------------------------------------------------------------------- */ + +static unsigned int sum; + +static const unsigned int crc_table[256]= +{ + 0x00000000,0x77073096,0xEE0E612C,0x990951BA,0x076DC419,0x706AF48F, + 0xE963A535,0x9E6495A3,0x0EDB8832,0x79DCB8A4,0xE0D5E91E,0x97D2D988, + 0x09B64C2B,0x7EB17CBD,0xE7B82D07,0x90BF1D91,0x1DB71064,0x6AB020F2, + 0xF3B97148,0x84BE41DE,0x1ADAD47D,0x6DDDE4EB,0xF4D4B551,0x83D385C7, + 0x136C9856,0x646BA8C0,0xFD62F97A,0x8A65C9EC,0x14015C4F,0x63066CD9, + 0xFA0F3D63,0x8D080DF5,0x3B6E20C8,0x4C69105E,0xD56041E4,0xA2677172, + 0x3C03E4D1,0x4B04D447,0xD20D85FD,0xA50AB56B,0x35B5A8FA,0x42B2986C, + 0xDBBBC9D6,0xACBCF940,0x32D86CE3,0x45DF5C75,0xDCD60DCF,0xABD13D59, + 0x26D930AC,0x51DE003A,0xC8D75180,0xBFD06116,0x21B4F4B5,0x56B3C423, + 0xCFBA9599,0xB8BDA50F,0x2802B89E,0x5F058808,0xC60CD9B2,0xB10BE924, + 0x2F6F7C87,0x58684C11,0xC1611DAB,0xB6662D3D,0x76DC4190,0x01DB7106, + 0x98D220BC,0xEFD5102A,0x71B18589,0x06B6B51F,0x9FBFE4A5,0xE8B8D433, + 0x7807C9A2,0x0F00F934,0x9609A88E,0xE10E9818,0x7F6A0DBB,0x086D3D2D, + 0x91646C97,0xE6635C01,0x6B6B51F4,0x1C6C6162,0x856530D8,0xF262004E, + 0x6C0695ED,0x1B01A57B,0x8208F4C1,0xF50FC457,0x65B0D9C6,0x12B7E950, + 0x8BBEB8EA,0xFCB9887C,0x62DD1DDF,0x15DA2D49,0x8CD37CF3,0xFBD44C65, + 0x4DB26158,0x3AB551CE,0xA3BC0074,0xD4BB30E2,0x4ADFA541,0x3DD895D7, + 0xA4D1C46D,0xD3D6F4FB,0x4369E96A,0x346ED9FC,0xAD678846,0xDA60B8D0, + 0x44042D73,0x33031DE5,0xAA0A4C5F,0xDD0D7CC9,0x5005713C,0x270241AA, + 0xBE0B1010,0xC90C2086,0x5768B525,0x206F85B3,0xB966D409,0xCE61E49F, + 0x5EDEF90E,0x29D9C998,0xB0D09822,0xC7D7A8B4,0x59B33D17,0x2EB40D81, + 0xB7BD5C3B,0xC0BA6CAD,0xEDB88320,0x9ABFB3B6,0x03B6E20C,0x74B1D29A, + 0xEAD54739,0x9DD277AF,0x04DB2615,0x73DC1683,0xE3630B12,0x94643B84, + 0x0D6D6A3E,0x7A6A5AA8,0xE40ECF0B,0x9309FF9D,0x0A00AE27,0x7D079EB1, + 0xF00F9344,0x8708A3D2,0x1E01F268,0x6906C2FE,0xF762575D,0x806567CB, + 0x196C3671,0x6E6B06E7,0xFED41B76,0x89D32BE0,0x10DA7A5A,0x67DD4ACC, + 0xF9B9DF6F,0x8EBEEFF9,0x17B7BE43,0x60B08ED5,0xD6D6A3E8,0xA1D1937E, + 0x38D8C2C4,0x4FDFF252,0xD1BB67F1,0xA6BC5767,0x3FB506DD,0x48B2364B, + 0xD80D2BDA,0xAF0A1B4C,0x36034AF6,0x41047A60,0xDF60EFC3,0xA867DF55, + 0x316E8EEF,0x4669BE79,0xCB61B38C,0xBC66831A,0x256FD2A0,0x5268E236, + 0xCC0C7795,0xBB0B4703,0x220216B9,0x5505262F,0xC5BA3BBE,0xB2BD0B28, + 0x2BB45A92,0x5CB36A04,0xC2D7FFA7,0xB5D0CF31,0x2CD99E8B,0x5BDEAE1D, + 0x9B64C2B0,0xEC63F226,0x756AA39C,0x026D930A,0x9C0906A9,0xEB0E363F, + 0x72076785,0x05005713,0x95BF4A82,0xE2B87A14,0x7BB12BAE,0x0CB61B38, + 0x92D28E9B,0xE5D5BE0D,0x7CDCEFB7,0x0BDBDF21,0x86D3D2D4,0xF1D4E242, + 0x68DDB3F8,0x1FDA836E,0x81BE16CD,0xF6B9265B,0x6FB077E1,0x18B74777, + 0x88085AE6,0xFF0F6A70,0x66063BCA,0x11010B5C,0x8F659EFF,0xF862AE69, + 0x616BFFD3,0x166CCF45,0xA00AE278,0xD70DD2EE,0x4E048354,0x3903B3C2, + 0xA7672661,0xD06016F7,0x4969474D,0x3E6E77DB,0xAED16A4A,0xD9D65ADC, + 0x40DF0B66,0x37D83BF0,0xA9BCAE53,0xDEBB9EC5,0x47B2CF7F,0x30B5FFE9, + 0xBDBDF21C,0xCABAC28A,0x53B39330,0x24B4A3A6,0xBAD03605,0xCDD70693, + 0x54DE5729,0x23D967BF,0xB3667A2E,0xC4614AB8,0x5D681B02,0x2A6F2B94, + 0xB40BBE37,0xC30C8EA1,0x5A05DF1B,0x2D02EF8D +}; + +/* ---------------------------------------------------------------------- */ + +static const unsigned char table_one[32]= +{ + 0,0,0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,8,8,9,9,10,10,11,11,12,12,13,13,14,14 +}; + +static const unsigned int table_two[32]= +{ + 0,1,2,3,4,6,8,12,16,24,32,48,64,96,128,192,256,384,512,768,1024, + 1536,2048,3072,4096,6144,8192,12288,16384,24576,32768,49152 +}; + +static const unsigned int table_three[16]= +{ + 0,1,3,7,15,31,63,127,255,511,1023,2047,4095,8191,16383,32767 +}; + +static const unsigned char table_four[34]= +{ + 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16, + 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16 +}; + +/* ---------------------------------------------------------------------- */ + +/* Possible problems with 64 bit machines here. It kept giving warnings */ +/* for people so I changed back to ~. */ + +static void crc_calc(unsigned char *memory, unsigned int length) +{ + register unsigned int temp; + + if(length) + { + temp = ~sum; /* was (sum ^ 4294967295) */ + do + { + temp = crc_table[(*memory++ ^ temp) & 255] ^ (temp >> 8); + } while(--length); + sum = ~temp; /* was (temp ^ 4294967295) */ + } +} + +/* ---------------------------------------------------------------------- */ + +/* Build a fast huffman decode table from the symbol bit lengths. */ +/* There is an alternate algorithm which is faster but also more complex. */ + +static int make_decode_table(int number_symbols, int table_size, + unsigned char *length, unsigned short *table) +{ + register unsigned char bit_num = 0; + register int symbol; + unsigned int leaf; /* could be a register */ + unsigned int table_mask, bit_mask, pos, fill, next_symbol, reverse; + int abort = 0; + + pos = 0; /* consistantly used as the current position in the decode table */ + + bit_mask = table_mask = 1 << table_size; + + bit_mask >>= 1; /* don't do the first number */ + bit_num++; + + while((!abort) && (bit_num <= table_size)) + { + for(symbol = 0; symbol < number_symbols; symbol++) + { + if(length[symbol] == bit_num) + { + reverse = pos; /* reverse the order of the position's bits */ + leaf = 0; + fill = table_size; + do /* reverse the position */ + { + leaf = (leaf << 1) + (reverse & 1); + reverse >>= 1; + } while(--fill); + if((pos += bit_mask) > table_mask) + { + abort = 1; + break; /* we will overrun the table! abort! */ + } + fill = bit_mask; + next_symbol = 1 << bit_num; + do + { + table[leaf] = symbol; + leaf += next_symbol; + } while(--fill); + } + } + bit_mask >>= 1; + bit_num++; + } + + if((!abort) && (pos != table_mask)) + { + for(symbol = pos; symbol < table_mask; symbol++) /* clear the rest of the table */ + { + reverse = symbol; /* reverse the order of the position's bits */ + leaf = 0; + fill = table_size; + do /* reverse the position */ + { + leaf = (leaf << 1) + (reverse & 1); + reverse >>= 1; + } while(--fill); + table[leaf] = 0; + } + next_symbol = table_mask >> 1; + pos <<= 16; + table_mask <<= 16; + bit_mask = 32768; + + while((!abort) && (bit_num <= 16)) + { + for(symbol = 0; symbol < number_symbols; symbol++) + { + if(length[symbol] == bit_num) + { + reverse = pos >> 16; /* reverse the order of the position's bits */ + leaf = 0; + fill = table_size; + do /* reverse the position */ + { + leaf = (leaf << 1) + (reverse & 1); + reverse >>= 1; + } while(--fill); + for(fill = 0; fill < bit_num - table_size; fill++) + { + if(table[leaf] == 0) + { + table[(next_symbol << 1)] = 0; + table[(next_symbol << 1) + 1] = 0; + table[leaf] = next_symbol++; + } + leaf = table[leaf] << 1; + leaf += (pos >> (15 - fill)) & 1; + } + table[leaf] = symbol; + if((pos += bit_mask) > table_mask) + { + abort = 1; + break; /* we will overrun the table! abort! */ + } + } + } + bit_mask >>= 1; + bit_num++; + } + } + if(pos != table_mask) abort = 1; /* the table is incomplete! */ + + return(abort); +} + +/* ---------------------------------------------------------------------- */ + +/* Read and build the decrunch tables. There better be enough data in the */ +/* source buffer or it's stuffed. */ + +static int read_literal_table() +{ + register unsigned int control; + register int shift; + unsigned int temp; /* could be a register */ + unsigned int symbol, pos, count, fix, max_symbol; + int abort = 0; + + control = global_control; + shift = global_shift; + + if(shift < 0) /* fix the control word if necessary */ + { + shift += 16; + control += *source++ << (8 + shift); + control += *source++ << shift; + } + +/* read the decrunch method */ + + decrunch_method = control & 7; + control >>= 3; + if((shift -= 3) < 0) + { + shift += 16; + control += *source++ << (8 + shift); + control += *source++ << shift; + } + +/* Read and build the offset huffman table */ + + if((!abort) && (decrunch_method == 3)) + { + for(temp = 0; temp < 8; temp++) + { + offset_len[temp] = control & 7; + control >>= 3; + if((shift -= 3) < 0) + { + shift += 16; + control += *source++ << (8 + shift); + control += *source++ << shift; + } + } + abort = make_decode_table(8, 7, offset_len, offset_table); + } + +/* read decrunch length */ + + if(!abort) + { + decrunch_length = (control & 255) << 16; + control >>= 8; + if((shift -= 8) < 0) + { + shift += 16; + control += *source++ << (8 + shift); + control += *source++ << shift; + } + decrunch_length += (control & 255) << 8; + control >>= 8; + if((shift -= 8) < 0) + { + shift += 16; + control += *source++ << (8 + shift); + control += *source++ << shift; + } + decrunch_length += (control & 255); + control >>= 8; + if((shift -= 8) < 0) + { + shift += 16; + control += *source++ << (8 + shift); + control += *source++ << shift; + } + } + +/* read and build the huffman literal table */ + + if((!abort) && (decrunch_method != 1)) + { + pos = 0; + fix = 1; + max_symbol = 256; + + do + { + for(temp = 0; temp < 20; temp++) + { + huffman20_len[temp] = control & 15; + control >>= 4; + if((shift -= 4) < 0) + { + shift += 16; + control += *source++ << (8 + shift); + control += *source++ << shift; + } + } + abort = make_decode_table(20, 6, huffman20_len, huffman20_table); + + if(abort) break; /* argh! table is corrupt! */ + + do + { + if((symbol = huffman20_table[control & 63]) >= 20) + { + do /* symbol is longer than 6 bits */ + { + symbol = huffman20_table[((control >> 6) & 1) + (symbol << 1)]; + if(!shift--) + { + shift += 16; + control += *source++ << 24; + control += *source++ << 16; + } + control >>= 1; + } while(symbol >= 20); + temp = 6; + } + else + { + temp = huffman20_len[symbol]; + } + control >>= temp; + if((shift -= temp) < 0) + { + shift += 16; + control += *source++ << (8 + shift); + control += *source++ << shift; + } + switch(symbol) + { + case 17: + case 18: + { + if(symbol == 17) + { + temp = 4; + count = 3; + } + else /* symbol == 18 */ + { + temp = 6 - fix; + count = 19; + } + count += (control & table_three[temp]) + fix; + control >>= temp; + if((shift -= temp) < 0) + { + shift += 16; + control += *source++ << (8 + shift); + control += *source++ << shift; + } + while((pos < max_symbol) && (count--)) + literal_len[pos++] = 0; + break; + } + case 19: + { + count = (control & 1) + 3 + fix; + if(!shift--) + { + shift += 16; + control += *source++ << 24; + control += *source++ << 16; + } + control >>= 1; + if((symbol = huffman20_table[control & 63]) >= 20) + { + do /* symbol is longer than 6 bits */ + { + symbol = huffman20_table[((control >> 6) & 1) + (symbol << 1)]; + if(!shift--) + { + shift += 16; + control += *source++ << 24; + control += *source++ << 16; + } + control >>= 1; + } while(symbol >= 20); + temp = 6; + } + else + { + temp = huffman20_len[symbol]; + } + control >>= temp; + if((shift -= temp) < 0) + { + shift += 16; + control += *source++ << (8 + shift); + control += *source++ << shift; + } + symbol = table_four[literal_len[pos] + 17 - symbol]; + while((pos < max_symbol) && (count--)) + literal_len[pos++] = symbol; + break; + } + default: + { + symbol = table_four[literal_len[pos] + 17 - symbol]; + literal_len[pos++] = symbol; + break; + } + } + } while(pos < max_symbol); + fix--; + max_symbol += 512; + } while(max_symbol == 768); + + if(!abort) + abort = make_decode_table(768, 12, literal_len, literal_table); + } + + global_control = control; + global_shift = shift; + + return(abort); +} + +/* ---------------------------------------------------------------------- */ + +/* Fill up the decrunch buffer. Needs lots of overrun for both destination */ +/* and source buffers. Most of the time is spent in this routine so it's */ +/* pretty damn optimized. */ + +static void decrunch(void) +{ + register unsigned int control; + register int shift; + unsigned int temp; /* could be a register */ + unsigned int symbol, count; + unsigned char *string; + + control = global_control; + shift = global_shift; + + do + { + if((symbol = literal_table[control & 4095]) >= 768) + { + control >>= 12; + if((shift -= 12) < 0) + { + shift += 16; + control += *source++ << (8 + shift); + control += *source++ << shift; + } + do /* literal is longer than 12 bits */ + { + symbol = literal_table[(control & 1) + (symbol << 1)]; + if(!shift--) + { + shift += 16; + control += *source++ << 24; + control += *source++ << 16; + } + control >>= 1; + } while(symbol >= 768); + } + else + { + temp = literal_len[symbol]; + control >>= temp; + if((shift -= temp) < 0) + { + shift += 16; + control += *source++ << (8 + shift); + control += *source++ << shift; + } + } + if(symbol < 256) + { + *destination++ = symbol; + } + else + { + symbol -= 256; + count = table_two[temp = symbol & 31]; + temp = table_one[temp]; + if((temp >= 3) && (decrunch_method == 3)) + { + temp -= 3; + count += ((control & table_three[temp]) << 3); + control >>= temp; + if((shift -= temp) < 0) + { + shift += 16; + control += *source++ << (8 + shift); + control += *source++ << shift; + } + count += (temp = offset_table[control & 127]); + temp = offset_len[temp]; + } + else + { + count += control & table_three[temp]; + if(!count) count = last_offset; + } + control >>= temp; + if((shift -= temp) < 0) + { + shift += 16; + control += *source++ << (8 + shift); + control += *source++ << shift; + } + last_offset = count; + + count = table_two[temp = (symbol >> 5) & 15] + 3; + temp = table_one[temp]; + count += (control & table_three[temp]); + control >>= temp; + if((shift -= temp) < 0) + { + shift += 16; + control += *source++ << (8 + shift); + control += *source++ << shift; + } + string = destination - last_offset; + do + { + *destination++ = *string++; + } while(--count); + } + } while((destination < destination_end) && (source < source_end)); + + global_control = control; + global_shift = shift; +} + +struct zfile *archive_access_lzx (struct znode *zn) +{ + unsigned int startpos; + struct znode *znfirst, *znlast; + struct zfile *zf = zn->volume->archive; + struct zfile *dstf, *newzf; + uae_u8 *buf, *dbuf; + unsigned int compsize, unpsize; + + dstf = NULL; + buf = dbuf = NULL; + newzf = NULL; + + /* find first file in compressed block */ + unpsize = 0; + znfirst = zn; + while (znfirst->prev) { + struct znode *zt = znfirst->prev; + if (!zt || zt->offset != 0) + break; + znfirst = zt; + unpsize += znfirst->size; + } + /* find last file in compressed block */ + znlast = zn; + while (znlast) { + unpsize += znlast->size; + if (znlast->offset != 0) + break; + znlast = znlast->next; + } + if (!znlast) + return NULL; + /* start offset to compressed block */ + startpos = znlast->offset; + compsize = znlast->packedsize; + zfile_fseek (zf, startpos, SEEK_SET); + buf = xmalloc(compsize); + zfile_fread (buf, compsize, 1, zf); + dbuf = xcalloc (unpsize, 1); + + /* unpack complete block */ + memset(offset_len, 0, sizeof offset_len); + memset(literal_len, 0, sizeof literal_len); + sum = 0; + source = buf; + source_end = buf + compsize; + global_control = 0; + global_shift = -16; + last_offset = 1; + destination = dbuf; + if (compsize == unpsize) { + memcpy (dbuf, buf, unpsize); + } else { + while (unpsize > 0) { + uae_u8 *pdest = destination; + if (!read_literal_table()) { + destination_end = destination + decrunch_length; + decrunch(); + unpsize -= decrunch_length; + crc_calc (pdest, decrunch_length); + } else { + write_log ("LZX corrupt compressed data %s\n", zn->name); + goto end; + } + } + } + /* pre-cache all files we just decompressed */ + for (;;) { + if (znfirst->size && !znfirst->f) { + dstf = zfile_fopen_empty (znfirst->name, znfirst->size); + zfile_fwrite(dbuf + znfirst->offset2, znfirst->size, 1, dstf); + znfirst->f = dstf; + if (znfirst == zn) + newzf = zfile_dup (dstf); + } + if (znfirst == znlast) + break; + znfirst = znfirst->next; + } +end: + xfree(buf); + xfree(dbuf); + return newzf; +} + +struct zvolume *archive_directory_lzx (struct zfile *in_file) +{ + unsigned int temp; + unsigned int total_pack = 0; + unsigned int total_unpack = 0; + unsigned int total_files = 0; + unsigned int merge_size = 0; + int actual; + int abort; + int result = 1; /* assume an error */ + struct zvolume *zv; + struct znode *zn; + struct zarchive_info zai; + struct tm tm; + unsigned int crc; + unsigned int pack_size; + unsigned int unpack_size; + unsigned char archive_header[31]; + unsigned char header_filename[256]; + unsigned char header_comment[256]; + + if (zfile_fread(archive_header, 1, 10, in_file) != 10) + return 0; + if (memcmp(archive_header, "LZX", 3)) + return 0; + zv = zvolume_alloc(in_file, ArchiveFormatLZX, NULL); + + do + { + abort = 1; /* assume an error */ + actual = zfile_fread(archive_header, 1, 31, in_file); + if(!zfile_ferror(in_file)) + { + if(actual) /* 0 is normal and means EOF */ + { + if(actual == 31) + { + sum = 0; /* reset CRC */ + crc = (archive_header[29] << 24) + (archive_header[28] << 16) + (archive_header[27] << 8) + archive_header[26]; + archive_header[29] = 0; /* Must set the field to 0 before calculating the crc */ + archive_header[28] = 0; + archive_header[27] = 0; + archive_header[26] = 0; + crc_calc(archive_header, 31); + temp = archive_header[30]; /* filename length */ + actual = zfile_fread(header_filename, 1, temp, in_file); + if(!zfile_ferror(in_file)) + { + if(actual == temp) + { + header_filename[temp] = 0; + crc_calc(header_filename, temp); + temp = archive_header[14]; /* comment length */ + actual = zfile_fread(header_comment, 1, temp, in_file); + if(!zfile_ferror(in_file)) + { + if(actual == temp) + { + header_comment[temp] = 0; + crc_calc(header_comment, temp); + if(sum == crc) + { + unsigned int year, month, day; + unsigned int hour, minute, second; + unsigned char attributes; + attributes = archive_header[0]; /* file protection modes */ + unpack_size = (archive_header[5] << 24) + (archive_header[4] << 16) + (archive_header[3] << 8) + archive_header[2]; /* unpack size */ + pack_size = (archive_header[9] << 24) + (archive_header[8] << 16) + (archive_header[7] << 8) + archive_header[6]; /* packed size */ + temp = (archive_header[18] << 24) + (archive_header[19] << 16) + (archive_header[20] << 8) + archive_header[21]; /* date */ + year = ((temp >> 17) & 63) + 1970; + month = (temp >> 23) & 15; + day = (temp >> 27) & 31; + hour = (temp >> 12) & 31; + minute = (temp >> 6) & 63; + second = temp & 63; + + memset(&zai, 0, sizeof zai); + zai.name = header_filename; + if (header_comment[0]) + zai.comment = header_comment; + zai.flags |= (attributes & 32) ? 0x80 : 0; + zai.flags |= (attributes & 64) ? 0x40 : 0; + zai.flags |= (attributes & 128) ? 0x20 : 0; + zai.flags |= (attributes & 16) ? 0x10 : 0; + zai.flags |= (attributes & 1) ? 0x08 : 0; + zai.flags |= (attributes & 2) ? 0x04 : 0; + zai.flags |= (attributes & 8) ? 0x02 : 0; + zai.flags |= (attributes & 4) ? 0x01 : 0; + zai.flags ^= 15; + memset(&tm, 0, sizeof tm); + tm.tm_hour = hour; + tm.tm_min = minute; + tm.tm_sec = second; + tm.tm_year = year - 1900; + tm.tm_mon = month; + tm.tm_mday = day; + zai.t = mktime(&tm); + zai.size = unpack_size; + zn = zvolume_addfile_abs(zv, &zai); + zn->offset2 = merge_size; + + total_pack += pack_size; + total_unpack += unpack_size; + total_files++; + merge_size += unpack_size; + + if(pack_size) /* seek past the packed data */ + { + merge_size = 0; + zn->offset = zfile_ftell(in_file); + zn->packedsize = pack_size; + if(!zfile_fseek(in_file, pack_size, SEEK_CUR)) + { + abort = 0; /* continue */ + } + } + else + abort = 0; /* continue */ + //write_log ("unp=%6d mrg=%6d pack=%6d off=%6d %s\n", unpack_size, merge_size, pack_size, zn->offset, zai.name); + } + } + } + } + } + } + } + else + { + result = 0; /* normal termination */ + } + } + } while(!abort); + + return zv; +} diff --git a/src/archivers/wrp/warp.cpp b/src/archivers/wrp/warp.cpp new file mode 100644 index 00000000..eafee93d --- /dev/null +++ b/src/archivers/wrp/warp.cpp @@ -0,0 +1,481 @@ + + +#include +#include +#include +#include + +#include "sysconfig.h" +#include "sysdeps.h" +#include "zfile.h" +#include "crc32.h" + +/* based on http://libxad.cvs.sourceforge.net/libxad/libxad/portable/clients/ by Dirk Stoecker */ + +#define XADERR_ILLEGALDATA 1 +#define XADERR_DECRUNCH 2 +#define XADERR_NOMEMORY 3 + +struct rledata { + uae_u32 rledata; +}; + +struct fout { + struct zfile *zf; + int xio_BitNum; + int xio_BitBuf; + int err; +}; + + +static void putrle (uae_u8 data, struct zfile *out, struct rledata *rled) +{ + int num; + uae_u32 a; + + if (!rled) { + zfile_putc (data, out); + return; + } + a = rled->rledata; + if (a & 0x100) /* was RLE mode */ + { + if (!data || (data == 1 && (a & 0x80000000))) { + a = 0x90; num = 1; + } else { + a &= 0xFF; num = data - 1; + } + } else if (data == 0x90) { + num = 0; a |= 0x100; + } else { + num = 1; a = data; + } + rled->rledata = a; + while (num--) + zfile_putc (a, out); +} + +static uae_u32 xadIOGetBitsLow(struct fout *io, uae_u8 bits) +{ + uae_u32 x; + + io->err = 0; + while(io->xio_BitNum < bits) + { + int v = zfile_getc (io->zf); + if (v == -1) { + io->err = 1; + return 0; + } + io->xio_BitBuf |= v << io->xio_BitNum; + io->xio_BitNum += 8; + } + x = io->xio_BitBuf & ((1<xio_BitBuf >>= bits; + io->xio_BitNum -= bits; + return x; +} + +#define ARCSQSPEOF 256 /* special endfile token */ +#define ARCSQNUMVALS 257 /* 256 data values plus SPEOF */ + +static uae_s32 ARCunsqueeze(struct zfile *in, struct zfile *out, struct rledata *rled) +{ + uae_s32 err = 0; + uae_s32 i, numnodes; + uae_s16 *node; + struct fout io; + + io.zf = in; + io.xio_BitBuf = 0; + io.xio_BitNum = 0; + io.err = 0; + + if((node = (uae_s16 *) xcalloc(2*2*ARCSQNUMVALS, 1))) + { + numnodes = xadIOGetBitsLow(&io, 16); + + if(numnodes < 0 || numnodes >= ARCSQNUMVALS) + err = XADERR_DECRUNCH; + else + { /* initialize for possible empty tree (SPEOF only) */ + node[0] = node[1] = -(ARCSQSPEOF + 1); + + numnodes *= 2; i = 0; + while(i < numnodes && !io.err) /* get decoding tree from file */ + { + node[i++] = xadIOGetBitsLow(&io, 16); + node[i++] = xadIOGetBitsLow(&io, 16); + } + + do + { + /* follow bit stream in tree to a leaf */ + i = 0; + while(i >= 0 && !io.err) + i = node[2*i + xadIOGetBitsLow(&io, 1)]; + + i = -(i + 1); /* decode fake node index to original data value */ + + if(i != ARCSQSPEOF) + putrle (i, out, rled); + } while(i != ARCSQSPEOF); + } + xfree(node); + } + else + err = XADERR_NOMEMORY; + + return err; +} + + + + +#define UCOMPMAXCODE(n) (((uae_u32) 1 << (n)) - 1) +#define UCOMPBITS 16 +#define UCOMPSTACKSIZE 8000 +#define UCOMPFIRST 257 /* first free entry */ +#define UCOMPCLEAR 256 /* table clear output code */ +#define UCOMPINIT_BITS 9 /* initial number of bits/code */ +#define UCOMPBIT_MASK 0x1f +#define UCOMPBLOCK_MASK 0x80 + +struct UCompData { + uae_s16 clear_flg; + uae_u16 n_bits; /* number of bits/code */ + uae_u16 maxbits; /* user settable max # bits/code */ + uae_u32 maxcode; /* maximum code, given n_bits */ + uae_u32 maxmaxcode; + uae_s32 free_ent; + uae_s32 offset; + uae_s32 size; + uae_u16 *tab_prefixof; + uae_u8 *tab_suffixof; + uae_u8 stack[UCOMPSTACKSIZE]; + uae_u8 buf[UCOMPBITS]; + int insize; + struct rledata *rled; +}; + + +/* Read one code from input. If EOF, return -1. */ +static uae_s32 UCompgetcode(struct zfile *in, struct UCompData *cd) +{ + uae_s32 code, r_off, bits; + uae_u8 *bp = cd->buf; + + if(cd->clear_flg > 0 || cd->offset >= cd->size || cd->free_ent > cd->maxcode) + { + /* + * If the next entry will be too big for the current code + * size, then we must increase the size. This implies reading + * a new buffer full, too. + */ + if(cd->free_ent > cd->maxcode) + { + if(++cd->n_bits == cd->maxbits) + cd->maxcode = cd->maxmaxcode; /* won't get any bigger now */ + else + cd->maxcode = UCOMPMAXCODE(cd->n_bits); + } + if(cd->clear_flg > 0) + { + cd->maxcode = UCOMPMAXCODE(cd->n_bits = UCOMPINIT_BITS); + cd->clear_flg = 0; + } + + /* This reads maximum n_bits characters into buf */ + cd->size = 0; + while(cd->size < cd->n_bits) { + int v; + if (cd->insize == 0) + break; + v = zfile_getc (in); + if (v == -1) + break; + cd->insize--; + cd->buf[cd->size++] = v; + } + if(cd->size <= 0) + return -1; + + cd->offset = 0; + /* Round size down to integral number of codes */ + cd->size = (cd->size << 3) - (cd->n_bits - 1); + } + + r_off = cd->offset; + bits = cd->n_bits; + + /* Get to the first byte. */ + bp += (r_off >> 3); + r_off &= 7; + + /* Get first part (low order bits) */ + code = (*bp++ >> r_off); + bits -= (8 - r_off); + r_off = 8 - r_off; /* now, offset into code word */ + + /* Get any 8 bit parts in the middle (<=1 for up to 16 bits). */ + if(bits >= 8) + { + code |= *bp++ << r_off; + r_off += 8; + bits -= 8; + } + + /* high order bits. */ + code |= (*bp & ((1<offset += cd->n_bits; + + return code; +} + +static uae_u32 xadIO_Compress(struct zfile *in, struct zfile *out, int insize, struct rledata *rled, uae_u8 bitinfo) +{ + int err = 0; + struct UCompData *cd; + + if((bitinfo & UCOMPBIT_MASK) < UCOMPINIT_BITS) + return XADERR_ILLEGALDATA; + + if((cd = (struct UCompData *) xcalloc(sizeof(struct UCompData), 1))) + { + int finchar, code, oldcode, incode, blockcomp; + uae_u8 *stackp, *stack, *stackend; + + stackp = stack = cd->stack; + stackend = stack + UCOMPSTACKSIZE; + cd->maxbits = bitinfo & UCOMPBIT_MASK; + blockcomp = bitinfo & UCOMPBLOCK_MASK; + cd->maxmaxcode = 1 << cd->maxbits; + cd->maxcode = UCOMPMAXCODE(cd->n_bits = UCOMPINIT_BITS); + cd->free_ent = blockcomp ? UCOMPFIRST : 256; + cd->insize = insize; + cd->rled = rled; + + if((cd->tab_prefixof = (uae_u16 *) xcalloc(sizeof(uae_u16) * cd->maxmaxcode, 1))) + { + if((cd->tab_suffixof = (uae_u8 *)xcalloc(cd->maxmaxcode, 1))) + { + /* Initialize the first 256 entries in the table. */ + for(code = 255; code >= 0; code--) + cd->tab_suffixof[code] = code; + + if((finchar = oldcode = UCompgetcode(in, cd)) == -1) + err = XADERR_DECRUNCH; + else + { + putrle (finchar, out, cd->rled); /* first code must be 8 bits = uae_u8 */ + + while((code = UCompgetcode(in, cd)) > -1) + { + if((code == UCOMPCLEAR) && blockcomp) + { + for(code = 255; code >= 0; code--) + cd->tab_prefixof[code] = 0; + cd->clear_flg = 1; + cd->free_ent = UCOMPFIRST - 1; + if((code = UCompgetcode(in, cd)) == -1) + break; /* O, untimely death! */ + } + incode = code; + + /* Special case for KwKwK string. */ + if(code >= cd->free_ent) + { + if(code > cd->free_ent) + { + err = XADERR_ILLEGALDATA; + break; + } + *stackp++ = finchar; + code = oldcode; + } + + /* Generate output characters in reverse order */ + while(stackp < stackend && code >= 256) + { + *stackp++ = cd->tab_suffixof[code]; + code = cd->tab_prefixof[code]; + } + if(stackp >= stackend) + { + err = XADERR_ILLEGALDATA; + break; + } + *(stackp++) = finchar = cd->tab_suffixof[code]; + + /* And put them out in forward order */ + do + { + putrle (*(--stackp), out, cd->rled); + } while(stackp > stack); + + /* Generate the new entry. */ + if((code = cd->free_ent) < cd->maxmaxcode) + { + cd->tab_prefixof[code] = (uae_u16) oldcode; + cd->tab_suffixof[code] = finchar; + cd->free_ent = code+1; + } + /* Remember previous code. */ + oldcode = incode; + } + } + xfree (cd->tab_suffixof); + } + else + err = XADERR_NOMEMORY; + xfree(cd->tab_prefixof); + } + else + err = XADERR_NOMEMORY; + xfree(cd); + } + else + err = XADERR_NOMEMORY; + + return err; +} + +static void MakeCRC16(uae_u16 *buf, uae_u16 ID) +{ + uae_u16 i, j, k; + + for(i = 0; i < 256; ++i) + { + k = i; + + for(j = 0; j < 8; ++j) + { + if(k & 1) + k = (k >> 1) ^ ID; + else + k >>= 1; + } + buf[i] = k; + } +} + +static uae_u16 wrpcrc16 (uae_u16 *tab, uae_u8 *buf, int len) +{ + uae_u16 crc = 0; + while (len-- > 0) + crc = tab[(crc ^ *buf++) & 0xFF] ^ (crc >> 8); + return crc; +} + +static int iswrp (uae_u8 *data) +{ + if(data[0] == 'W' && data[1] == 'a' && data[2] == 'r' && data[3] == 'p' + && data[4] == ' ' && data[5] == 'v' && data[6] == '1' && data[7] == '.' + && data[8] == '1' && !data[9] && !data[18] && data[19] <= 3) + return 1; + return 0; +} + +#define COMPBUF 30000 + +struct zfile *unwarp(struct zfile *zf) +{ + int err = 0; + uae_u8 buf[26] = { 0 }; + int algo, side, track; + int pos, dstpos, olddstpos; + uae_u16 crc; + uae_u32 size; + struct zfile *nf = NULL, *tmpf = NULL; + uae_u8 *zero, *data; + int outsize = 11 * 512; + int outsize2 = 11 * (512 + 16); + struct rledata rled; + uae_u16 wrpcrc16table[256]; + + MakeCRC16 (wrpcrc16table, 0xa001); + + zero = (uae_u8 *) xcalloc (outsize2, 1); + olddstpos = 0; + for (;;) { + if (zfile_fread (buf, sizeof buf, 1, zf) == 0) + break; + if (!iswrp (buf)) + break; + if (!nf) { + nf = zfile_fopen_empty ("zipped.wrp", 1760 * 512); + tmpf = zfile_fopen_empty ("tmp", outsize2); + } + track = (buf[10] << 8) | buf[11]; + algo = buf[19]; + side = -1; + if (!memcmp (buf + 12, "BOT\0", 4)) + side = 1; + if (!memcmp (buf + 12, "TOP\0", 4)) + side = 0; + crc = (buf[20] << 8) | buf[21]; + pos = zfile_ftell (zf); + dstpos = -1; + if (side >= 0 && track >= 0 && track <= 79) + dstpos = track * 22 * 512 + (side * 11 * 512); + zfile_fseek (tmpf, 0, SEEK_SET); + zfile_fwrite (zero, outsize2, 1, tmpf); + zfile_fseek (tmpf, 0, SEEK_SET); + size = (buf[22] << 24) | (buf[23] << 16) | (buf[24] << 8) | buf[25]; + err = 0; + memset (&rled, 0, sizeof rled); + + switch (algo) + { + case 1: + if (zfile_getc (zf) != 12) + err = XADERR_ILLEGALDATA; + else + err = xadIO_Compress (zf, tmpf, size - 1, &rled, 12 | UCOMPBLOCK_MASK); + break; + case 2: + err = ARCunsqueeze (zf, tmpf, &rled); + break; + case 0: + case 3: + { + int i; + for (i = 0; i < size; i++) { + uae_u8 v = zfile_getc (zf); + putrle (v, tmpf, algo == 3 ? &rled : NULL); + } + } + break; + default: + write_log ("WRP unknown compression method %d, track=%d,size=%d\n", algo, track, side); + goto end; + break; + } + if (err) { + write_log ("WRP corrupt data, track=%d,side=%d,err=%d\n", track, side, err); + } else { + uae_u16 crc2; + int os = zfile_ftell (tmpf); + data = (uae_u8 *) zfile_getdata (tmpf, 0, os); + crc2 = wrpcrc16 (wrpcrc16table, data, os); + if (crc != crc2) + write_log ("WRP crc error %04x<>%04x, track=%d,side=%d\n", crc, crc2, track, side); + xfree (data); + } + if (dstpos >= 0) { + zfile_fseek (nf, dstpos, SEEK_SET); + data = (uae_u8 *) zfile_getdata (tmpf, 0, outsize); + zfile_fwrite (data, outsize, 1, nf); + } + zfile_fseek (zf, pos + size, SEEK_SET); + } +end: + xfree (zero); + zfile_fclose (tmpf); + if (nf) { + zfile_fclose (zf); + zf = nf; + } + return zf; +} + diff --git a/src/archivers/wrp/warp.h b/src/archivers/wrp/warp.h new file mode 100644 index 00000000..965d4ec5 --- /dev/null +++ b/src/archivers/wrp/warp.h @@ -0,0 +1,2 @@ + +extern struct zfile *unwarp(struct zfile*); diff --git a/src/archivers/xfd/xfd.c b/src/archivers/xfd/xfd.c new file mode 100644 index 00000000..679acda2 --- /dev/null +++ b/src/archivers/xfd/xfd.c @@ -0,0 +1,415 @@ + /* + * UAE - The Un*x Amiga Emulator + * + * Emulate very basic Amiga-like environment for XFD slaves + * + * All this only because there is no portable XFD replacement.. + * + * (c) 2007 Toni Wilen + * + */ + +#include +#include +#include +#include + +#include "sysconfig.h" +#include "sysdeps.h" +#include "zfile.h" +#include "fsdb.h" +#include "uae.h" +#include "custom.h" +#include "memory.h" +#include "newcpu.h" + +/* memory structure + * + * 0x000676 execbase + * 0x000ffc current start of free memory + * 0x001000 allocmem code (exec) + * 0x001080 freemem code, dummy (exec) + * 0x001f00 XFD buffer info + * 0x002000 first XFD slave + * 0x?????? next XFD slave + * .... + * 0x?????? decrunched data + * 0x?????? free memory (available for slave) + * 0xxxf000 end of decompression buffer + * end stack + */ + +static uaecptr exec = 0x676; +static uaecptr freememaddr = 0x0ffc; +static uaecptr allocmem = 0x1000; +static uaecptr freemem = 0x1080; +static uaecptr bufferinfo = 0x1f00; +static uaecptr stacksize = 0x1000; +struct xfdslave +{ + struct xfdslave *next; + uaecptr start; + char *name; +}; + +static struct xfdslave *xfdslaves; + +#define FAKEMEM_SIZE 524288 + +static uae_u32 gl(uae_u8 *p) +{ + uae_u32 v; + + v = p[0] << 24; + v |= p[1] << 16; + v |= p[2] << 8; + v |= p[3] << 0; + return v; +} +static uae_u16 gw(uae_u8 *p) +{ + uae_u16 v; + + v = p[0] << 8; + v |= p[1] << 0; + return v; +} +static void pl(uae_u8 *p, uae_u32 v) +{ + p[0] = v >> 24; + p[1] = v >> 16; + p[2] = v >> 8; + p[3] = v >> 0; +} + +static uae_u8 *codeptr, *xfdmemory; +static uaecptr codememory; +static uae_u32 xfdmem_mask; + +static int load_xfd(char *path) +{ + struct zfile *z; + uae_u8 *buf, *p; + int size; + int first, last, numhunks; + int hunksize; + uae_u8 *prevhunk; + int i, j; + uaecptr hunks[10]; + uaecptr startaddr; + + z = zfile_fopen(path, "rb"); + if (!z) + return 0; + zfile_fseek(z, 0, SEEK_END); + size = zfile_ftell(z); + zfile_fseek(z, 0, SEEK_SET); + buf = xmalloc(size); + zfile_fread(buf, size, 1, z); + zfile_fclose(z); + p = buf; + if (gl(p) != 0x3f3) + goto end; + p += 4 + 8; + first = gl(p); + p += 4; + last = gl(p); + p += 4; + numhunks = last - first + 1; + prevhunk = 0; + startaddr = codememory; + + for (i = 0; i < numhunks; i++) { + uaecptr out = codememory; + hunksize = gl(p) * 4; + p += 4; + pl(codeptr + out, hunksize); + if (prevhunk) { + pl(prevhunk, out); + prevhunk = codeptr + out; + } + hunks[i] = out + 8; + codememory += hunksize + 8; + } + for (i = 0; i < numhunks; i++) { + uae_u32 htype = gl(p); + uae_u32 hsize = gl(p + 4) * 4; + uaecptr haddr = hunks[i]; + uaecptr srchunk; + uae_u32 relocnum, relochunknum; + + p += 8; + if (htype == 0x3e9 || htype == 0x3ea) { + memcpy (codeptr + haddr, p, hsize); + p += hsize; + } else if (htype != 0x3eb) { + write_log("RELOC: unknown hunk %08X\n", htype); + goto end; + } + htype = gl(p); + p += 4; + if (htype == 0x3f2) + continue; + if (htype != 0x3ec) { + write_log("RELOC: expected 000003EC but got %08X\n", htype); + goto end; + } + relocnum = gl(p); + p += 4; + relochunknum = gl(p); + p += 4; + srchunk = hunks[relochunknum]; + for (j = 0; j < relocnum; j++) { + uae_u32 off = gl(p); + p += 4; + pl(codeptr + haddr + off, gl(codeptr + haddr + off) + srchunk); + } + } + write_log("XFD slave '%s' loaded and relocated @%08X (%d bytes) succesfully\n", path, startaddr, codememory - startaddr); + p = codeptr + startaddr + 8; + if (gl(p + 4) != 'XFDF') { + write_log("XFD header corrupt\n"); + goto end; + } + p = codeptr + gl(p + 20); + for (;;) { + int version = gw(p + 4); + int mversion = gw(p + 6); + uaecptr name = gl(p + 8); + int flags = gw(p + 12); + int minsize = gl(p + 28); + uae_u8 *nameptr = codeptr + name; + struct xfdslave *xfds; + + write_log("- '%s' ver %d, master ver %d, minsize %d\n", + nameptr, version, mversion, minsize); + xfds = xcalloc(sizeof(struct xfdslave), 1); + xfds->name = nameptr; + xfds->start = p - codeptr; + if (!xfdslaves) { + xfdslaves = xfds; + } else { + struct xfdslave *x = xfdslaves; + while(x->next) + x = x->next; + x->next = xfds; + } + if (!gl(p)) + break; + p = codeptr + gl(p); + } + return 1; +end: + return 0; +} + +static void initexec(void) +{ + + pl(codeptr + 4, exec); + + // fake memory allocation functions + pl(codeptr + exec - 198, allocmem); + pl(codeptr + exec - 210, freemem); + + // lea -4(pc),a0 + pl(codeptr + allocmem + 0, 0x41fafffa); + // move.l (a0),d1; add.l d0,(a0) + pl(codeptr + allocmem + 4, 0x2210d190); + // move.l d1,d0; rts + pl(codeptr + allocmem + 8, 0x20014e75); + + pl(codeptr + freemem, 0x4e750000); // rts +} + +int init_xfd(void) +{ + static int init; + char tmp[MAX_DPATH]; + void *d; + + if (init > 0) + return 1; + if (init < 0) + return 0; + init = -1; + + codememory = 0x2000; + codeptr = malloc (FAKEMEM_SIZE); + sprintf (tmp, "%splugins%cxfd", start_path_data, FSDB_DIR_SEPARATOR); + d = my_opendir(tmp); + if (d) { + while(my_readdir(d, tmp)) { + char tmp2[MAX_DPATH]; + sprintf (tmp2, "%splugins%cxfd%c%s", start_path_data, FSDB_DIR_SEPARATOR, FSDB_DIR_SEPARATOR, tmp); + load_xfd(tmp2); + } + my_closedir(d); + } + initexec(); + codeptr = realloc(codeptr, codememory); + xfdmemory = malloc (FAKEMEM_SIZE); + init = 1; + return 1; +} + +static void execute68k(struct regstruct *r) +{ + uaecptr stack = m68k_areg(r, 7); + m68k_areg(r, 7) = stack - 4; + for (;;) { + uae_u32 opcode = get_iword (r, 0); + (*cpufunctbl[opcode])(opcode, r); + if (m68k_areg(r, 7) >= stack) + break; + } +} + +static struct zfile *decomp(struct zfile *zf, struct xfdslave *xfds, uae_u32 size, struct regstruct *regs) +{ + uae_u8 *p; + uae_u32 decompsize; + uaecptr decompaddr; + struct zfile *zfout; + + p = xfdmemory + bufferinfo; + memset(p, 0, 20 * 4); + regs->regs[8] = bufferinfo; // A0 + decompsize = gl (p + 16 * 4); + decompaddr = FAKEMEM_SIZE - stacksize - decompsize; + pl (p + 6 * 4, decompaddr); // TargetBuffer + pl (p + 8 * 4, decompsize); + execute68k(regs); + if (!regs->regs[0]) + return 0; + decompsize = gl (p + 16 * 4); + zfout = zfile_fopen_empty (zfile_getname(zf), decompsize); + zfile_fwrite (xfdmemory + decompaddr, decompsize, 1, zf); + return zfout; +} + +static struct regstruct backregs; +static addrbank **back_mem_banks; + + +static uae_u32 REGPARAM3 xfdmem_lget (uaecptr) REGPARAM; +static uae_u32 REGPARAM3 xfdmem_wget (uaecptr) REGPARAM; +static uae_u32 REGPARAM3 xfdmem_bget (uaecptr) REGPARAM; +static void REGPARAM3 xfdmem_lput (uaecptr, uae_u32) REGPARAM; +static void REGPARAM3 xfdmem_wput (uaecptr, uae_u32) REGPARAM; +static void REGPARAM3 xfdmem_bput (uaecptr, uae_u32) REGPARAM; + +static uae_u32 REGPARAM2 xfdmem_lget (uaecptr addr) +{ + uae_u32 *m; + addr &= xfdmem_mask; + m = (uae_u32 *)(xfdmemory + addr); + return do_get_mem_long (m); +} +static uae_u32 REGPARAM2 xfdmem_wget (uaecptr addr) +{ + uae_u16 *m; + addr &= xfdmem_mask; + m = (uae_u16 *)(xfdmemory + addr); + return do_get_mem_word (m); +} +static uae_u32 REGPARAM2 xfdmem_bget (uaecptr addr) +{ + addr &= xfdmem_mask; + return xfdmemory[addr]; +} +static void REGPARAM2 xfdmem_lput (uaecptr addr, uae_u32 l) +{ + uae_u32 *m; + addr &= xfdmem_mask; + m = (uae_u32 *)(xfdmemory + addr); + do_put_mem_long (m, l); +} +static void REGPARAM2 xfdmem_wput (uaecptr addr, uae_u32 w) +{ + uae_u16 *m; + addr &= xfdmem_mask; + m = (uae_u16 *)(xfdmemory + addr); + do_put_mem_word (m, w); +} +static void REGPARAM2 xfdmem_bput (uaecptr addr, uae_u32 b) +{ + addr &= xfdmem_mask; + xfdmemory[addr] = b; +} +static addrbank xfdmem_bank = { + xfdmem_lget, xfdmem_wget, xfdmem_bget, + xfdmem_lput, xfdmem_wput, xfdmem_bput, + NULL, NULL, NULL, "XFDFAKE", + xfdmem_lget, xfdmem_wget, ABFLAG_RAM +}; + +static void store_state(void) +{ + int i; + + memcpy (&backregs, ®s, sizeof (struct regstruct)); + back_mem_banks = xmalloc(MEMORY_BANKS * sizeof (addrbank*)); + memcpy (back_mem_banks, mem_banks, MEMORY_BANKS * sizeof (addrbank*)); + for (i = 0; i < MEMORY_BANKS; i++) + mem_banks[bankindex(i * 65536)] = &xfdmem_bank; +} + +static void restore_state(void) +{ + memcpy (mem_banks, back_mem_banks, MEMORY_BANKS * sizeof (addrbank*)); + xfree(back_mem_banks); + memcpy (®s, &backregs, sizeof (struct regstruct)); +} + +struct zfile *decompress_zfd(struct zfile *z) +{ + unsigned int size; + uae_u8 *p; + struct xfdslave *xfds; + struct zfile *zfout = NULL; + + if (!init_xfd()) + return z; + memset (xfdmemory, 0, FAKEMEM_SIZE); + memcpy (xfdmemory, codeptr, codememory); + xfdmem_mask = FAKEMEM_SIZE - 1; + + p = codeptr + codememory; + zfile_fseek (z, 0, SEEK_END); + size = zfile_ftell (z); + zfile_fseek (z, 0, SEEK_SET); + zfile_fread (p, size, 1, z); + + store_state(); + + xfds = xfdslaves; + while (xfds) { + uaecptr start = xfds->start; + memset(®s, 0, sizeof regs); + pl(codeptr + freememaddr, codememory + size); // reset start of "free memory" + regs.regs[0] = size; // D0 + regs.regs[8] = codememory; // A0 + regs.regs[9] = bufferinfo; // A1 + regs.regs[15] = FAKEMEM_SIZE; // A7 + pl(xfdmemory + bufferinfo + 0x00, codememory); // SourceBuffer + pl(xfdmemory + bufferinfo + 0x04, size); // SourceBufLen + m68k_setpc(®s, gl(xfdmemory + start + 16)); // recog code + if (regs.pc) { + execute68k(®s); + if (regs.regs[0]) { + write_log("XFD slave '%s' recognised the compressed data\n", xfds->name); + m68k_setpc(®s, gl(xfdmemory + start + 20)); // decomp code + if (regs.pc) + zfout = decomp(z, xfds, size, ®s); + if (zfout) + break; + } + } + xfds = xfds->next; + } + + restore_state(); + + return zfout; +} diff --git a/src/archivers/xfd/xfdmaster.h b/src/archivers/xfd/xfdmaster.h new file mode 100644 index 00000000..61b5367f --- /dev/null +++ b/src/archivers/xfd/xfdmaster.h @@ -0,0 +1,504 @@ +#ifndef LIBRARIES_XFDMASTER_H +#define LIBRARIES_XFDMASTER_H + +/* +** $VER: xfdmaster.h 39.5 (31.08.2002) +** +** Copyright © 1994-2002 by Georg Hörmann, Dirk Stöcker +** All Rights Reserved. +*/ + +#ifndef EXEC_LIBRARIES_H +#include +#endif + +/********************* +* * +* Library Base * +* * +*********************/ + +struct xfdMasterBase { + struct Library LibNode; + ULONG xfdm_SegList; /* PRIVATE! */ + struct DosLibrary * xfdm_DosBase; /* May be used for I/O etc. */ + struct xfdSlave * xfdm_FirstSlave; /* List of available slaves */ + struct xfdForeMan * xfdm_FirstForeMan; /* PRIVATE! */ + ULONG xfdm_MinBufferSize;/* (V36) Min. BufSize for xfdRecogBuffer() */ + ULONG xfdm_MinLinkerSize;/* (V36) Min. BufSize for xfdRecogLinker() */ + struct ExecBase * xfdm_ExecBase; /* (V38.2) Cached for fast access */ +}; + +#define XFDM_VERSION 39 /* for OpenLibrary() */ +#define XFDM_NAME "xfdmaster.library" + +/*************************** +* * +* Object Types (V36) * +* * +***************************/ + +#define XFDOBJ_BUFFERINFO 1 /* xfdBufferInfo structure */ +#define XFDOBJ_SEGMENTINFO 2 /* xfdSegmentInfo structure */ +#define XFDOBJ_LINKERINFO 3 /* xfdLinkerInfo structure */ +#define XFDOBJ_SCANNODE 4 /* (V37) xfdScanNode structure */ +#define XFDOBJ_SCANHOOK 5 /* (V37) xfdScanHook structure */ +#define XFDOBJ_MAX 5 /* PRIVATE! */ + +/******************** +* * +* Buffer Info * +* * +********************/ + +struct xfdBufferInfo { + APTR xfdbi_SourceBuffer; /* Pointer to source buffer */ + ULONG xfdbi_SourceBufLen; /* Length of source buffer */ + struct xfdSlave *xfdbi_Slave; /* PRIVATE! */ + STRPTR xfdbi_PackerName; /* Name of recognized packer */ + UWORD xfdbi_PackerFlags; /* Flags for recognized packer */ + UWORD xfdbi_Error; /* Error return code */ + APTR xfdbi_TargetBuffer; /* Pointer to target buffer */ + ULONG xfdbi_TargetBufMemType;/* Memtype of target buffer */ + ULONG xfdbi_TargetBufLen; /* Full length of buffer */ + ULONG xfdbi_TargetBufSaveLen;/* Used length of buffer */ + ULONG xfdbi_DecrAddress; /* Address to load decrunched file */ + ULONG xfdbi_JmpAddress; /* Address to jump in file */ + APTR xfdbi_Special; /* Special decrunch info (eg. password) */ + UWORD xfdbi_Flags; /* (V37) Flags to influence recog/decr */ + UWORD xfdbi_Reserved0; /* (V38) PRIVATE! */ + ULONG xfdbi_MinTargetLen; /* (V38) Required length of target buffer */ + ULONG xfdbi_FinalTargetLen; /* (V38) Final length of decrunched file */ + APTR xfdbi_UserTargetBuf; /* (V38) Target buffer allocated by user */ + ULONG xfdbi_UserTargetBufLen;/* (V38) Target buffer length */ + ULONG xfdbi_MinSourceLen; /* (V39) minimum source length (tested by + master library */ +}; + +#define xfdbi_MaxSpecialLen xfdbi_Error /* Max. length of special info */ + +/********************* +* * +* Segment Info * +* * +*********************/ + +struct xfdSegmentInfo { + ULONG xfdsi_SegList; /* BPTR to segment list */ + struct xfdSlave *xfdsi_Slave; /* PRIVATE! */ + STRPTR xfdsi_PackerName; /* Name of recognized packer */ + UWORD xfdsi_PackerFlags; /* Flags for recognized packer */ + UWORD xfdsi_Error; /* Error return code */ + APTR xfdsi_Special; /* Special decrunch info (eg. password) */ + UWORD xfdsi_RelMode; /* (V34) Relocation mode */ + UWORD xfdsi_Flags; /* (V37) Flags to influence recog/decr */ +}; + +#define xfdsi_MaxSpecialLen xfdsi_Error /* Max. length of special info */ + +/************************** +* * +* Linker Info (V36) * +* * +**************************/ + +struct xfdLinkerInfo { + APTR xfdli_Buffer; /* Pointer to buffer */ + ULONG xfdli_BufLen; /* Length of buffer */ + STRPTR xfdli_LinkerName; /* Name of recognized linker */ + APTR xfdli_Unlink; /* PRIVATE! */ + UWORD xfdli_Reserved; /* Set to NULL */ + UWORD xfdli_Error; /* Error return code */ + ULONG xfdli_Hunk1; /* PRIVATE! */ + ULONG xfdli_Hunk2; /* PRIVATE! */ + ULONG xfdli_Amount1; /* PRIVATE! */ + ULONG xfdli_Amount2; /* PRIVATE! */ + APTR xfdli_Save1; /* Pointer to first unlinked file */ + APTR xfdli_Save2; /* Pointer to second unlinked file */ + ULONG xfdli_SaveLen1; /* Length of first unlinked file */ + ULONG xfdli_SaveLen2; /* Length of second unlinked file */ +}; + +/************************ +* * +* Scan Node (V37) * +* * +************************/ + +struct xfdScanNode { + struct xfdScanNode *xfdsn_Next; /* Pointer to next xfdScanNode or NULL */ + APTR xfdsn_Save; /* Pointer to data */ + ULONG xfdsn_SaveLen; /* Length of data */ + STRPTR xfdsn_PackerName; /* Name of recognized packer */ + UWORD xfdsn_PackerFlags;/* Flags for recognized packer */ +}; + +/************************ +* * +* Scan Hook (V37) * +* * +************************/ + +struct xfdScanHook { + BOOL (* xfdsh_Entry)(); /* Entrypoint of hook code */ + APTR xfdsh_Data; /* Private data of hook */ + ULONG xfdsh_ToDo; /* Bytes still to scan (READ ONLY) */ + ULONG xfdsh_ScanNode; /* Found data right now (or NULL) (READ ONLY) */ +}; + +/******************** +* * +* Error Codes * +* * +********************/ + +#define XFDERR_OK 0x0000 /* No errors */ + +#define XFDERR_NOMEMORY 0x0001 /* Error allocating memory */ +#define XFDERR_NOSLAVE 0x0002 /* No slave entry in info structure */ +#define XFDERR_NOTSUPPORTED 0x0003 /* Slave doesn't support called function */ +#define XFDERR_UNKNOWN 0x0004 /* Unknown file */ +#define XFDERR_NOSOURCE 0x0005 /* No sourcebuffer/seglist specified */ +#define XFDERR_WRONGPASSWORD 0x0006 /* Wrong password for decrunching */ +#define XFDERR_BADHUNK 0x0007 /* Bad hunk structure */ +#define XFDERR_CORRUPTEDDATA 0x0008 /* Crunched data is corrupted */ +#define XFDERR_MISSINGRESOURCE 0x0009 /* (V34) Missing resource (eg. library) */ +#define XFDERR_WRONGKEY 0x000a /* (V35) Wrong 16/32 bit key */ +#define XFDERR_BETTERCPU 0x000b /* (V37) Better CPU required */ +#define XFDERR_HOOKBREAK 0x000c /* (V37) Hook caused break */ +#define XFDERR_DOSERROR 0x000d /* (V37) Dos error */ +#define XFDERR_NOTARGET 0x000e /* (V38) No user target given */ +#define XFDERR_TARGETTOOSMALL 0x000f /* (V38) User target is too small */ +#define XFDERR_TARGETNOTSUPPORTED 0x0010 /* (V38) User target not supported */ + +#define XFDERR_UNDEFINEDHUNK 0x1000 /* (V34) Undefined hunk type */ +#define XFDERR_NOHUNKHEADER 0x1001 /* (V34) File is not executable */ +#define XFDERR_BADEXTTYPE 0x1002 /* (V34) Bad hunk_ext type */ +#define XFDERR_BUFFERTRUNCATED 0x1003 /* (V34) Unexpected end of file */ +#define XFDERR_WRONGHUNKAMOUNT 0x1004 /* (V34) Wrong amount of hunks */ +#define XFDERR_NOOVERLAYS 0x1005 /* (V36) Overlays not allowed */ + +#define XFDERR_UNSUPPORTEDHUNK 0x2000 /* (V34) Hunk type not supported */ +#define XFDERR_BADRELMODE 0x2001 /* (V34) Unknown XFDREL_#? mode */ + +/******************************* +* * +* Relocation Modes (V34) * +* * +*******************************/ + +#define XFDREL_DEFAULT 0x0000 /* Use memory types given by hunk_header */ +#define XFDREL_FORCECHIP 0x0001 /* Force all hunks to chip ram */ +#define XFDREL_FORCEFAST 0x0002 /* Force all hunks to fast ram */ + +/************************************* +* * +* Values for xfd??_PackerFlags * +* * +*************************************/ + +/* Bit numbers */ +#define XFDPFB_RELOC 0 /* Relocatible file packer */ +#define XFDPFB_ADDR 1 /* Absolute address file packer */ +#define XFDPFB_DATA 2 /* Data file packer */ + +#define XFDPFB_PASSWORD 4 /* Packer requires password */ +#define XFDPFB_RELMODE 5 /* (V34) Decruncher supports xfdsi_RelMode */ +#define XFDPFB_KEY16 6 /* (V35) Packer requires 16 bit key */ +#define XFDPFB_KEY32 7 /* (V35) Packer requires 32 bit key */ + +#define XFDPFB_RECOGLEN 8 /* (V38) slave recognizes target lengths */ +#define XFDPFB_USERTARGET 9 /* (V38) slave supports user target buffer */ + +#define XFDPFB_EXTERN 15 /* (V37) PRIVATE */ + +/* Bit masks */ +#define XFDPFF_RELOC (1<pfile_in_zip_read!=NULL) unzCloseCurrentFile(file); - zfile_fclose(s->file); TRYFREE(s); return UNZ_OK; } diff --git a/src/include/unzip.h b/src/archivers/zip/unzip.h similarity index 100% rename from src/include/unzip.h rename to src/archivers/zip/unzip.h diff --git a/src/audio.cpp b/src/audio.cpp index 5f14bc63..be4e4b76 100644 --- a/src/audio.cpp +++ b/src/audio.cpp @@ -21,9 +21,9 @@ #include "newcpu.h" #include "autoconf.h" #include "gensound.h" +#include "audio.h" #include "sd-pandora/sound.h" #include "events.h" -#include "audio.h" #include "savestate.h" #include "gui.h" @@ -63,7 +63,7 @@ struct audio_channel_data{ uae_u16 dat, dat2; int request_word, request_word_skip; int sample_accum, sample_accum_time; - int output_state; + int sinc_output_state; sinc_queue_t sinc_queue[SINC_QUEUE_LENGTH]; int sinc_queue_length; }; @@ -84,7 +84,7 @@ void init_sound_table16 (void) for (i = 0; i < 256; i++) for (j = 0; j < 64; j++) - sound_table[j][i] = j * (uae_s8)i * (currprefs.sound_stereo ? 2 : 1); + sound_table[j][i] = j * (uae_s8)i * get_audio_ismono() ? 1 : 2; } #define MULTIPLICATION_PROFITABLE @@ -101,13 +101,10 @@ typedef uae_u8 sample8_t; #define FINISH_DATA(data,b,logn) #endif -/* Always put the right word before the left word. */ -#define MAX_DELAY_BUFFER 1024 -static uae_u32 right_word_saved[MAX_DELAY_BUFFER]; -static uae_u32 left_word_saved[MAX_DELAY_BUFFER]; +static uae_u32 right_word_saved[SOUND_MAX_DELAY_BUFFER]; +static uae_u32 left_word_saved[SOUND_MAX_DELAY_BUFFER]; static int saved_ptr; -#define MIXED_STEREO_MAX 32 static int mixed_on, mixed_stereo_size, mixed_mul1, mixed_mul2; static int led_filter_forced, sound_use_filter, sound_use_filter_sinc, led_filter_on; @@ -193,6 +190,8 @@ static int filter(int input, struct filter_state *fs) return o; } +/* Always put the right word before the left word. */ + STATIC_INLINE void put_sound_word_right (uae_u32 w) { if (mixed_on) { @@ -214,12 +213,12 @@ STATIC_INLINE void put_sound_word_left (uae_u32 w) saved_ptr = (saved_ptr + 1) & mixed_stereo_size; lold = left_word_saved[saved_ptr] - SOUND16_BASE_VAL; - tmp = (rnew * mixed_mul1 + lold * mixed_mul2) / MIXED_STEREO_MAX; + tmp = (rnew * mixed_mul2 + lold * mixed_mul1) / MIXED_STEREO_SCALE; tmp += SOUND16_BASE_VAL; PUT_SOUND_WORD_RIGHT (tmp); rold = right_word_saved[saved_ptr] - SOUND16_BASE_VAL; - w = (lnew * mixed_mul1 + rold * mixed_mul2) / MIXED_STEREO_MAX; + w = (lnew * mixed_mul2 + rold * mixed_mul1) / MIXED_STEREO_SCALE; } PUT_SOUND_WORD_LEFT (w); } @@ -270,7 +269,7 @@ static void sinc_prehandler(unsigned long best_evtime) /* if output state changes, record the state change and also * write data into sinc queue for mixing in the BLEP */ - if (acd->output_state != output) { + if (acd->sinc_output_state != output) { if (acd->sinc_queue_length > SINC_QUEUE_LENGTH - 1) { //write_log("warning: sinc queue truncated. Last age: %d.\n", acd->sinc_queue[SINC_QUEUE_LENGTH-1].age); acd->sinc_queue_length = SINC_QUEUE_LENGTH - 1; @@ -280,8 +279,8 @@ static void sinc_prehandler(unsigned long best_evtime) sizeof(acd->sinc_queue[0]) * acd->sinc_queue_length); acd->sinc_queue_length += 1; acd->sinc_queue[0].age = best_evtime; - acd->sinc_queue[0].output = output - acd->output_state; - acd->output_state = output; + acd->sinc_queue[0].output = output - acd->sinc_output_state; + acd->sinc_output_state = output; } } } @@ -307,7 +306,7 @@ STATIC_INLINE void samplexx_sinc_handler (int *datasp) int j, v; struct audio_channel_data *acd = &audio_channel[i]; /* The sum rings with harmonic components up to infinity... */ - int sum = acd->output_state << 17; + int sum = acd->sinc_output_state << 17; /* ...but we cancel them through mixing in BLEPs instead */ for (j = 0; j < acd->sinc_queue_length; j += 1) sum -= winsinc[acd->sinc_queue[j].age] * acd->sinc_queue[j].output; @@ -691,6 +690,27 @@ static void sample16si_rh_handler (void) static int audio_work_to_do; +STATIC_INLINE void zerostate(struct audio_channel_data *cdp) +{ + cdp->state = 0; + cdp->evtime = MAX_EV; + cdp->request_word = 0; +} + +static void audio_event_reset(void) +{ + int i; + + last_cycles = get_cycles () - 1; + next_sample_evtime = scaled_sample_evtime; + for (i = 0; i < 4; i++) { + struct audio_channel_data *cdp = audio_channel + i; + zerostate(cdp); + } + schedule_audio (); + events_schedule (); +} + static void audio_deactivate(void) { if (!currprefs.sound_auto) @@ -698,6 +718,7 @@ static void audio_deactivate(void) gui_data.sndbuf_status = 3; gui_data.sndbuf = 0; clear_sound_buffers(); + audio_event_reset(); } int audio_activate(void) @@ -706,6 +727,7 @@ int audio_activate(void) if (!audio_work_to_do) { restart_sound_buffer(); ret = 1; + audio_event_reset(); } audio_work_to_do = 4 * maxvpos * 50; return ret; @@ -772,7 +794,7 @@ STATIC_INLINE void state23 (struct audio_channel_data *cdp) } } -static void audio_handler (int nr, int timed) +static void audio_handler (int nr) { struct audio_channel_data *cdp = audio_channel + nr; @@ -786,24 +808,26 @@ static void audio_handler (int nr, int timed) switch (cdp->state) { case 0: - cdp->request_word = 0; - cdp->request_word_skip = 0; cdp->intreq2 = 0; if (cdp->dmaen) { cdp->state = 1; cdp->wlen = cdp->len; /* there are too many stupid sound routines that fail on "too" fast cpus.. */ - if (currprefs.cpu_level > 1) + if (currprefs.cpu_model >= 68020) cdp->pt = cdp->lc; - audio_handler (nr, timed); + cdp->request_word = 0; + cdp->request_word_skip = 0; + audio_handler (nr); return; } else if (!cdp->dmaen && cdp->request_word < 0 && !isirq (nr)) { cdp->evtime = 0; cdp->state = 2; setirq (nr); - audio_handler (nr, timed); + audio_handler (nr); return; } + cdp->request_word = 0; + cdp->request_word_skip = 0; return; case 1: @@ -842,9 +866,7 @@ static void audio_handler (int nr, int timed) cdp->per = PERIOD_MAX; if (!cdp->dmaen && isirq (nr) && (evtime == 0 || evtime == MAX_EV || evtime == cdp->per)) { - cdp->state = 0; - cdp->evtime = MAX_EV; - cdp->request_word = 0; + zerostate (cdp); return; } @@ -943,7 +965,7 @@ STATIC_INLINE int sound_prefs_changed (void) return (changed_prefs.produce_sound != currprefs.produce_sound || changed_prefs.sound_stereo != currprefs.sound_stereo || changed_prefs.sound_stereo_separation != currprefs.sound_stereo_separation - || changed_prefs.sound_mixed_stereo != currprefs.sound_mixed_stereo + || changed_prefs.sound_mixed_stereo_delay != currprefs.sound_mixed_stereo_delay || changed_prefs.sound_freq != currprefs.sound_freq || changed_prefs.sound_auto != currprefs.sound_auto || changed_prefs.sound_interpol != currprefs.sound_interpol @@ -982,12 +1004,15 @@ void check_prefs_changed_audio (void) void set_audio(void) { - close_sound (); + int old_mixed_on = mixed_on; + int old_mixed_size = mixed_stereo_size; + int sep, delay; + close_sound (); currprefs.produce_sound = changed_prefs.produce_sound; currprefs.sound_stereo = changed_prefs.sound_stereo; currprefs.sound_stereo_separation = changed_prefs.sound_stereo_separation; - currprefs.sound_mixed_stereo = changed_prefs.sound_mixed_stereo; + currprefs.sound_mixed_stereo_delay = changed_prefs.sound_mixed_stereo_delay; currprefs.sound_auto = changed_prefs.sound_auto; currprefs.sound_interpol = changed_prefs.sound_interpol; currprefs.sound_freq = changed_prefs.sound_freq; @@ -1005,14 +1030,20 @@ void set_audio(void) } } } - last_cycles = get_cycles () - 1; next_sample_evtime = scaled_sample_evtime; + last_cycles = get_cycles () - 1; compute_vsynctime (); - mixed_mul1 = MIXED_STEREO_MAX / 2 - ((currprefs.sound_stereo_separation * 3) / 2); - mixed_mul2 = MIXED_STEREO_MAX / 2 + ((currprefs.sound_stereo_separation * 3) / 2); - mixed_stereo_size = currprefs.sound_mixed_stereo > 0 ? (1 << (currprefs.sound_mixed_stereo - 1)) - 1 : 0; - mixed_on = (currprefs.sound_stereo_separation > 0 || currprefs.sound_mixed_stereo > 0) ? 1 : 0; + sep = (currprefs.sound_stereo_separation = changed_prefs.sound_stereo_separation) * 3 / 2; + delay = currprefs.sound_mixed_stereo_delay = changed_prefs.sound_mixed_stereo_delay; + mixed_mul1 = MIXED_STEREO_SCALE / 2 - sep; + mixed_mul2 = MIXED_STEREO_SCALE / 2 + sep; + mixed_stereo_size = delay > 0 ? (1 << (delay - 1)) - 1 : 0; + mixed_on = (sep > 0 && sep < MIXED_STEREO_MAX) || mixed_stereo_size > 0; + if (mixed_on && old_mixed_size != mixed_stereo_size) { + saved_ptr = 0; + memset (right_word_saved, 0, sizeof right_word_saved); + } led_filter_forced = -1; // always off sound_use_filter = sound_use_filter_sinc = 0; @@ -1064,6 +1095,8 @@ void set_audio(void) sample_prehandler = anti_prehandler; } + audio_activate (); + if (currprefs.produce_sound == 0) { eventtab[ev_audio].active = 0; events_schedule (); @@ -1106,8 +1139,8 @@ void update_audio (void) audio_channel[2].evtime -= best_evtime; if (audio_channel[3].evtime != MAX_EV) audio_channel[3].evtime -= best_evtime; - n_cycles -= best_evtime; + n_cycles -= best_evtime; if (currprefs.produce_sound > 1) { next_sample_evtime -= best_evtime; if (sample_prehandler) @@ -1118,13 +1151,13 @@ void update_audio (void) } } if (audio_channel[0].evtime == 0) - audio_handler (0, 1); + audio_handler (0); if (audio_channel[1].evtime == 0) - audio_handler (1, 1); + audio_handler (1); if (audio_channel[2].evtime == 0) - audio_handler (2, 1); + audio_handler (2); if (audio_channel[3].evtime == 0) - audio_handler (3, 1); + audio_handler (3); } end: last_cycles = get_cycles () - n_cycles; @@ -1196,7 +1229,7 @@ void audio_hsync (int dmaaction) handle2 = 1; } if (handle2) - audio_handler (nr, 0); + audio_handler (nr); handle |= handle2; } if (handle) { @@ -1219,9 +1252,14 @@ void AUDxDAT (int nr, uae_u16 v) cdp->dat2 = v; cdp->request_word = -1; cdp->request_word_skip = 0; - if (cdp->state == 0) { + /* cpu >= 68020: another "too fast" memory/CPU hack */ + if (cdp->state == 0 || currprefs.cpu_model >= 68020) { cdp->state = 2; - audio_handler (nr, 0); + cdp->wlen = cdp->len; + cdp->pt = cdp->lc; + if (currprefs.cpu_model >= 68020) + INTREQ (0x80 << nr); + audio_handler (nr); schedule_audio (); events_schedule (); } @@ -1254,6 +1292,7 @@ void AUDxPER (int nr, uae_u16 v) if (per < maxhpos * CYCLE_UNIT / 2 && currprefs.produce_sound < 3) per = maxhpos * CYCLE_UNIT / 2; else if (per < 4 * CYCLE_UNIT) + /* smaller value would cause extremely high cpu usage */ per = 4 * CYCLE_UNIT; if (audio_channel[nr].per == PERIOD_MAX - 1 && per != PERIOD_MAX - 1) { diff --git a/src/autoconf.cpp b/src/autoconf.cpp index 21af032f..ee6c9dfc 100644 --- a/src/autoconf.cpp +++ b/src/autoconf.cpp @@ -29,6 +29,7 @@ uaecptr EXPANSION_bootcode, EXPANSION_nullfunc; /* ROM tag area memory access */ uae_u8 *rtarea; +uaecptr rtarea_base; static uae_u32 REGPARAM3 rtarea_lget (uaecptr) REGPARAM; static uae_u32 REGPARAM3 rtarea_wget (uaecptr) REGPARAM; @@ -37,20 +38,28 @@ static void REGPARAM3 rtarea_lput (uaecptr, uae_u32) REGPARAM; static void REGPARAM3 rtarea_wput (uaecptr, uae_u32) REGPARAM; static void REGPARAM3 rtarea_bput (uaecptr, uae_u32) REGPARAM; static uae_u8 *REGPARAM3 rtarea_xlate (uaecptr) REGPARAM; +static int REGPARAM3 rtarea_check (uaecptr addr, uae_u32 size) REGPARAM; addrbank rtarea_bank = { rtarea_lget, rtarea_wget, rtarea_bget, rtarea_lput, rtarea_wput, rtarea_bput, - rtarea_xlate, default_check, NULL, "UAE Boot ROM" + rtarea_xlate, rtarea_check, NULL, "UAE Boot ROM", + rtarea_lget, rtarea_wget, ABFLAG_ROMIN }; -uae_u8 *REGPARAM2 rtarea_xlate (uaecptr addr) +static uae_u8 *REGPARAM2 rtarea_xlate (uaecptr addr) { addr &= 0xFFFF; return rtarea + addr; } -uae_u32 REGPARAM2 rtarea_lget (uaecptr addr) +static int REGPARAM2 rtarea_check (uaecptr addr, uae_u32 size) +{ + addr &= 0xFFFF; + return (addr + size) <= 0xFFFF; +} + +static uae_u32 REGPARAM2 rtarea_lget (uaecptr addr) { #ifdef JIT special_mem |= S_READ; @@ -59,7 +68,7 @@ uae_u32 REGPARAM2 rtarea_lget (uaecptr addr) return (uae_u32)(rtarea_wget (addr) << 16) + rtarea_wget (addr+2); } -uae_u32 REGPARAM2 rtarea_wget (uaecptr addr) +static uae_u32 REGPARAM2 rtarea_wget (uaecptr addr) { #ifdef JIT special_mem |= S_READ; @@ -68,7 +77,7 @@ uae_u32 REGPARAM2 rtarea_wget (uaecptr addr) return (rtarea[addr]<<8) + rtarea[addr+1]; } -uae_u32 REGPARAM2 rtarea_bget (uaecptr addr) +static uae_u32 REGPARAM2 rtarea_bget (uaecptr addr) { #ifdef JIT special_mem |= S_READ; @@ -77,21 +86,21 @@ uae_u32 REGPARAM2 rtarea_bget (uaecptr addr) return rtarea[addr]; } -void REGPARAM2 rtarea_lput (uaecptr addr, uae_u32 value) +static void REGPARAM2 rtarea_lput (uaecptr addr, uae_u32 value) { #ifdef JIT special_mem |= S_WRITE; #endif } -void REGPARAM2 rtarea_wput (uaecptr addr, uae_u32 value) +static void REGPARAM2 rtarea_wput (uaecptr addr, uae_u32 value) { #ifdef JIT special_mem |= S_WRITE; #endif } -void REGPARAM2 rtarea_bput (uaecptr addr, uae_u32 value) +static void REGPARAM2 rtarea_bput (uaecptr addr, uae_u32 value) { #ifdef JIT special_mem |= S_WRITE; @@ -107,7 +116,7 @@ static int rt_straddr; uae_u32 addr (int ptr) { - return (uae_u32)ptr + RTAREA_BASE; + return (uae_u32)ptr + rtarea_base; } void db (uae_u8 data) @@ -134,8 +143,11 @@ void dl (uae_u32 data) uae_u32 ds (const char *str) { - int len = strlen (str) + 1; + int len; + if (!str) + return addr (rt_straddr); + len = strlen (str) + 1; rt_straddr -= len; int i; @@ -152,7 +164,7 @@ void calltrap (uae_u32 n) void org (uae_u32 a) { - rt_addr = a - RTAREA_BASE; + rt_addr = a & 0xffff; } uae_u32 here (void) @@ -219,13 +231,13 @@ void rtarea_init (void) a = here(); /* Dummy trap - removing this breaks the filesys emulation. */ - org (RTAREA_BASE + 0xFF00); + org (rtarea_base + 0xFF00); calltrap (deftrap2 (nullfunc, TRAPFLAG_NO_RETVAL, "")); - org (RTAREA_BASE + 0xFF80); + org (rtarea_base + 0xFF80); calltrap (deftrap2 (getchipmemsize, TRAPFLAG_DORET, "")); - org (RTAREA_BASE + 0xFF10); + org (rtarea_base + 0xFF10); calltrap (deftrap2 (uae_puts, TRAPFLAG_NO_RETVAL, "")); dw (RTS); @@ -235,6 +247,7 @@ void rtarea_init (void) filesys_install_code (); #endif + uae_boot_rom_size = here() - rtarea_base; init_extended_traps(); } @@ -242,9 +255,14 @@ volatile int uae_int_requested = 0; void set_uae_int_flag (void) { - rtarea[0xFFFB] = uae_int_requested; + rtarea[0xFFFB] = uae_int_requested & 1; } void rtarea_setup(void) { + uaecptr base = need_uae_boot_rom (); + if (base) { + write_log ("RTAREA located at %08X\n", base); + rtarea_base = base; + } } diff --git a/src/blitter.cpp b/src/blitter.cpp index 92ae8e3d..282e4fa9 100644 --- a/src/blitter.cpp +++ b/src/blitter.cpp @@ -188,7 +188,7 @@ static __inline__ void blitter_done (void) bltstate = BLT_done; blitter_done_notify (); INTREQ(0x8040); - eventtab[ev_blitter].active = 0; + event2_remevent(ev2_blitter); unset_special (®s, SPCFLAG_BLTNASTY); #ifdef BLITTER_DEBUG write_log ("vpos=%d, cycles %d\n", vpos, blit_cyclecounter); @@ -505,14 +505,12 @@ static __inline__ void blitter_doit(void) blitter_done(); } -void blitter_handler(void) +void blitter_handler(uae_u32 data) { static int blitter_stuck; if (!dmaen (DMA_BLITTER)) { - eventtab[ev_blitter].active = 1; - eventtab[ev_blitter].oldcycles = get_cycles (); - eventtab[ev_blitter].evtime = 10 * CYCLE_UNIT + get_cycles (); /* wait a little */ + event2_newevent (ev2_blitter, 10); blitter_stuck++; if (blitter_stuck < 20000 || !currprefs.immediate_blits) return; /* gotta come back later. */ @@ -530,9 +528,7 @@ void blitter_handler(void) // blitter_slowdown doesn't work at the moment // if (blit_slowdown > 0 && !currprefs.immediate_blits) { -// eventtab[ev_blitter].active = 1; -// eventtab[ev_blitter].oldcycles = get_cycles (); -// eventtab[ev_blitter].evtime = blit_slowdown * CYCLE_UNIT + get_cycles (); /* wait a little */ +// event2_newevent (ev2_blitter, blit_slowdown); // blit_slowdown = -1; // return; // } @@ -652,7 +648,7 @@ void do_blitter(void) blit_cycles_per_vsize = blit_cycles_per_op * blt_info.hblitsize; blit_init_cycles = 2; // HRM says nothing about how much cycles required for blitter initialisation // Used from code below so that maybe_blit behaves same as in normal mode - blit_firstline_cycles = blit_first_cycle + (blit_diag[0] * blt_info.hblitsize) * CYCLE_UNIT; + blit_firstline_cycles = blit_first_cycle + (blit_diag[0] * blt_info.hblitsize + cpu_cycles) * CYCLE_UNIT; } blit_total_required_cycles = blit_cycles_per_vsize * blt_info.vblitsize; blit_cyclecounter = blit_init_cycles + blit_total_required_cycles; @@ -665,7 +661,7 @@ void do_blitter(void) cycles = blt_info.vblitsize; } else { cycles = blt_info.vblitsize * blt_info.hblitsize; - blit_firstline_cycles = blit_first_cycle + (blit_diag[0] * blt_info.hblitsize) * CYCLE_UNIT; + blit_firstline_cycles = blit_first_cycle + (blit_diag[0] * blt_info.hblitsize + cpu_cycles) * CYCLE_UNIT; } blit_cyclecounter = cycles * (blit_dmacount2 + (blit_nod ? 0 : 1)); } @@ -700,10 +696,7 @@ void do_blitter(void) blit_cycle_current = blit_cycle_at_start; } - eventtab[ev_blitter].active = 1; - eventtab[ev_blitter].oldcycles = get_cycles (); - eventtab[ev_blitter].evtime = blit_cyclecounter * CYCLE_UNIT + get_cycles (); - events_schedule(); + event2_newevent(ev2_blitter, blit_cyclecounter); } void blitter_dma_disabled(void) @@ -717,8 +710,7 @@ void blitter_dma_disabled(void) // We still have something to do... bltstate = BLT_waitDMA; blit_cycle_entered_wait = get_cycles(); - eventtab[ev_blitter].active = 0; - events_schedule(); + event2_remevent(ev2_blitter); } } @@ -731,9 +723,8 @@ void blitter_dma_enabled(void) // Add cycles we waited to current cycles... unsigned long cycles_waited = get_cycles() - blit_cycle_entered_wait; blit_cycle_current += cycles_waited; - eventtab[ev_blitter].active = 1; - eventtab[ev_blitter].evtime += cycles_waited; - events_schedule(); + event2_remevent(ev2_blitter); + event2_newevent(ev2_blitter, cycles_waited); blit_cycle_entered_wait = 0; } @@ -806,10 +797,7 @@ void blitter_check_start (void) blit_cycle_current = blit_cycle_at_start; } - eventtab[ev_blitter].active = 1; - eventtab[ev_blitter].oldcycles = get_cycles (); - eventtab[ev_blitter].evtime = blit_cyclecounter * CYCLE_UNIT + get_cycles (); - events_schedule(); + event2_newevent(ev2_blitter, blit_cyclecounter); } void maybe_blit (int hack) @@ -822,7 +810,7 @@ void maybe_blit (int hack) if (hack && get_cycles() < blit_firstline_cycles) return; - blitter_handler (); + blitter_handler (0); } int blitnasty (void) diff --git a/src/cfgfile.cpp b/src/cfgfile.cpp index 66331d69..4bf0355d 100644 --- a/src/cfgfile.cpp +++ b/src/cfgfile.cpp @@ -14,9 +14,9 @@ #include "options.h" #include "uae.h" +#include "audio.h" #include "autoconf.h" #include "custom.h" -#include "disk.h" #include "inputdevice.h" #include "savestate.h" #include "memory.h" @@ -25,10 +25,12 @@ #include "zfile.h" #include "filesys.h" #include "fsdb.h" +#include "disk.h" #include "sd-pandora/sound.h" static int config_newfilesystem; static struct strlist *temp_lines; +static struct zfile *default_file; /* @@@ need to get rid of this... just cut part of the manual and print that * as a help text. */ @@ -45,7 +47,8 @@ static const struct cfg_lines opttable[] = {"use_gui", "Enable the GUI? If no, then goes straight to emulator" }, {"use_debugger", "Enable the debugger?" }, {"cpu_speed", "can be max, real, or a number between 1 and 20" }, - {"cpu_type", "Can be 68000, 68010, 68020, 68020/68881" }, + {"cpu_model", "Can be 68000, 68010, 68020, 68030, 68040, 68060" }, + {"fpu_model", "Can be 68881, 68882, 68040, 68060" }, {"cpu_compatible", "yes enables compatibility-mode" }, {"cpu_24bit_addressing", "must be set to 'no' in order for Z3mem or P96mem to work" }, {"autoconfig", "yes = add filesystems and extra ram" }, @@ -118,17 +121,13 @@ static const char *csmode[] = { "ocs", "ecs_agnus", "ecs_denise", "ecs", "aga", static const char *linemode1[] = { "none", "double", "scanlines", 0 }; static const char *linemode2[] = { "n", "d", "s", 0 }; static const char *speedmode[] = { "max", "real", 0 }; -static const char *cpumode[] = { - "68000", "68000", "68010", "68010", "68ec020", "68020", "68ec020/68881", "68020/68881", - "68040", "68040", "xxxxx", "xxxxx", "68060", "68060", 0 -}; static const char *colormode1[] = { "8bit", "15bit", "16bit", "8bit_dither", "4bit_dither", "32bit", 0 }; static const char *colormode2[] = { "8", "15", "16", "8d", "4d", "32", 0 }; static const char *soundmode1[] = { "none", "interrupts", "normal", "exact", 0 }; static const char *soundmode2[] = { "none", "interrupts", "good", "best", 0 }; static const char *centermode1[] = { "none", "simple", "smart", 0 }; static const char *centermode2[] = { "false", "true", "smart", 0 }; -static const char *stereomode[] = { "mono", "stereo", "clonedstereo", "4ch", "mixed", 0 }; +static const char *stereomode[] = { "mono", "stereo", "clonedstereo", "4ch", "clonedstereo6ch", "6ch", "mixed", 0 }; static const char *interpolmode[] = { "none", "anti", "sinc", "rh", "crux", 0 }; static const char *collmode[] = { "none", "sprites", "playfields", "full", 0 }; static const char *compmode[] = { "direct", "indirect", "indirectKS", "afterPic", 0 }; @@ -136,12 +135,18 @@ static const char *flushmode[] = { "soft", "hard", 0 }; static const char *kbleds[] = { "none", "POWER", "DF0", "DF1", "DF2", "DF3", "HD", "CD", 0 }; static const char *soundfiltermode1[] = { "off", "emulated", "on", 0 }; static const char *soundfiltermode2[] = { "standard", "enhanced", 0 }; +static const char *lorestype1[] = { "lores", "hires", "superhires" }; +static const char *lorestype2[] = { "true", "false" }; static const char *loresmode[] = { "normal", "filtered", 0 }; #ifdef GFXFILTER static const char *filtermode1[] = { "no_16", "bilinear_16", "no_32", "bilinear_32", 0 }; static const char *filtermode2[] = { "0x", "1x", "2x", "3x", "4x", 0 }; #endif static const char *cartsmode[] = { "none", "hrtmon", 0 }; +/* 3-state boolean! */ +static const char *fullmodes[] = { "false", "true", /* "FILE_NOT_FOUND", */ "fullwindow", 0 }; +/* bleh for compatibility */ +static const char *scsimode[] = { "false", "true", "scsi", 0 }; static const char *obsolete[] = { "accuracy", "gfx_opengl", "gfx_32bit_blits", "32bit_blits", @@ -149,11 +154,20 @@ static const char *obsolete[] = { "sound_pri_cutoff", "sound_pri_time", "sound_min_buff", "gfx_test_speed", "gfxlib_replacement", "enforcer", "catweasel_io", "kickstart_key_file", "sound_adjust", + "serial_hardware_dtrdsr", 0 }; #define UNEXPANDED "$(FILE_PATH)" +static void trimws (char *s) +{ + /* Delete trailing whitespace. */ + int len = strlen (s); + while (len > 0 && strcspn (s + len - 1, "\t \r\n") == 0) + s[--len] = '\0'; +} + static int match_string (const char *table[], const char *str) { int i; @@ -182,6 +196,19 @@ char *cfgfile_subst_path (const char *path, const char *subst, const char *file) return my_strdup (file); } +static int isdefault (const char *s) +{ + char tmp[MAX_DPATH]; + if (!default_file) + return 0; + zfile_fseek (default_file, 0, SEEK_SET); + while (zfile_fgets (tmp, sizeof tmp, default_file)) { + if (!strcmp (tmp, s)) + return 1; + } + return 0; +} + void cfgfile_write (struct zfile *f, const char *format,...) { va_list parms; @@ -193,6 +220,18 @@ void cfgfile_write (struct zfile *f, const char *format,...) va_end (parms); } +void cfgfile_dwrite (struct zfile *f, const char *format,...) +{ + va_list parms; + char tmp[CONFIG_BLEN]; + + va_start (parms, format); + vsprintf (tmp, format, parms); + if (1 || !isdefault (tmp)) + zfile_fwrite (tmp, 1, strlen (tmp), f); + va_end (parms); +} + void cfgfile_target_write (struct zfile *f, char *format,...) { va_list parms; @@ -206,6 +245,90 @@ void cfgfile_target_write (struct zfile *f, char *format,...) va_end (parms); } +void cfgfile_target_dwrite (struct zfile *f, char *format,...) +{ + va_list parms; + char tmp[CONFIG_BLEN]; + + va_start (parms, format); + vsprintf (tmp + strlen (TARGET_NAME) + 1, format, parms); + memcpy (tmp, TARGET_NAME, strlen (TARGET_NAME)); + tmp[strlen (TARGET_NAME)] = '.'; + if (!isdefault (tmp)) + zfile_fwrite (tmp, 1, strlen (tmp), f); + va_end (parms); +} + +static void write_filesys_config (struct uae_prefs *p, const char *unexpanded, + const char *default_path, struct zfile *f) +{ + int i; + char tmp[MAX_DPATH], tmp2[MAX_DPATH]; + const char *hdcontrollers[] = { "uae", + "ide0", "ide1", "ide2", "ide3", + "scsi0", "scsi1", "scsi2", "scsi3", "scsi4", "scsi5", "scsi6", + "scsram", "scside" }; /* scsram = smart card sram = pcmcia sram card */ + + for (i = 0; i < p->mountitems; i++) { + struct uaedev_config_info *uci = &p->mountconfig[i]; + char *str; + int bp = uci->bootpri; + + if (!uci->autoboot) + bp = -128; + if (uci->donotmount) + bp = -129; + str = cfgfile_subst_path (default_path, unexpanded, uci->rootdir); + if (!uci->ishdf) { + sprintf (tmp, "%s,%s:%s:%s,%d\n", uci->readonly ? "ro" : "rw", + uci->devname ? uci->devname : "", uci->volname, str, bp); + sprintf (tmp2, "filesystem2=%s", tmp); + zfile_fputs (f, tmp2); +#if 0 + sprintf (tmp2, "filesystem=%s,%s:%s\n", uci->readonly ? "ro" : "rw", + uci->volname, str); + zfile_fputs (f, tmp2); +#endif + } else { + sprintf (tmp, "%s,%s:%s,%d,%d,%d,%d,%d,%s,%s\n", + uci->readonly ? "ro" : "rw", + uci->devname ? uci->devname : "", str, + uci->sectors, uci->surfaces, uci->reserved, uci->blocksize, + bp, uci->filesys ? uci->filesys : "", hdcontrollers[uci->controller]); + sprintf (tmp2, "hardfile2=%s", tmp); + zfile_fputs (f, tmp2); +#if 0 + sprintf (tmp2, "hardfile=%s,%d,%d,%d,%d,%s\n", + uci->readonly ? "ro" : "rw", uci->sectors, + uci->surfaces, uci->reserved, uci->blocksize, str); + zfile_fputs (f, tmp2); +#endif + } + sprintf (tmp2, "uaehf%d=%s,%s", i, uci->ishdf ? "hdf" : "dir", tmp); + zfile_fputs (f, tmp2); + xfree (str); + } +} + +static void write_compatibility_cpu(struct zfile *f, struct uae_prefs *p) +{ + char tmp[100]; + int model; + + model = p->cpu_model; + if (model == 68030) + model = 68020; + if (model == 68060) + model = 68040; + if (p->address_space_24 && model == 68020) + strcpy (tmp, "68ec020"); + else + sprintf(tmp, "%d", model); + if (model == 68020 && (p->fpu_model == 68881 || p->fpu_model == 68882)) + strcat(tmp,"/68881"); + cfgfile_write (f, "cpu_type=%s\n", tmp); +} + void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type) { struct strlist *sl; @@ -230,15 +353,19 @@ void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type) cfgfile_write (f, "%s.floppy_path=%s\n", TARGET_NAME, p->path_floppy); cfgfile_write (f, "%s.hardfile_path=%s\n", TARGET_NAME, p->path_hardfile); + cfgfile_write (f, "; host-specific\n"); + target_save_options (f, p); + cfgfile_write (f, "; common\n"); + cfgfile_write (f, "use_gui=%s\n", guimode1[p->start_gui]); cfgfile_write (f, "use_debugger=%s\n", p->start_debugger ? "true" : "false"); str = cfgfile_subst_path (p->path_rom, UNEXPANDED, p->romfile); cfgfile_write (f, "kickstart_rom_file=%s\n", str); free (str); // if (p->romident[0]) -// cfgfile_write (f, "kickstart_rom=%s\n", p->romident); +// cfgfile_dwrite (f, "kickstart_rom=%s\n", p->romident); str = cfgfile_subst_path (p->path_rom, UNEXPANDED, p->romextfile); cfgfile_write (f, "kickstart_ext_rom_file=%s\n", str); free (str); @@ -253,6 +380,12 @@ void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type) // if (p->cartident[0]) // cfgfile_write (f, "cart=%s\n", p->cartident); // cfgfile_write (f, "cart_internal=%s\n", cartsmode[p->cart_internal]); +// if (p->amaxromfile[0]) { +// str = cfgfile_subst_path (p->path_rom, UNEXPANDED, p->amaxromfile); +// cfgfile_write (f, "amax_rom_file=%s\n", str); +// free (str); +// } + // cfgfile_write (f, "kickshifter=%s\n", p->kickshifter ? "true" : "false"); p->nr_floppies = 4; @@ -260,16 +393,16 @@ void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type) str = cfgfile_subst_path (p->path_floppy, UNEXPANDED, p->df[i]); cfgfile_write (f, "floppy%d=%s\n", i, str); free (str); - cfgfile_write (f, "floppy%dtype=%d\n", i, p->dfxtype[i]); - cfgfile_write (f, "floppy%dsound=%d\n", i, p->dfxclick[i]); + cfgfile_dwrite (f, "floppy%dtype=%d\n", i, p->dfxtype[i]); + cfgfile_dwrite (f, "floppy%dsound=%d\n", i, p->dfxclick[i]); if (p->dfxclick[i] < 0 && p->dfxclickexternal[i][0]) - cfgfile_write (f, "floppy%dsoundext=%s\n", i, p->dfxclickexternal[i]); + cfgfile_dwrite (f, "floppy%dsoundext=%s\n", i, p->dfxclickexternal[i]); if (p->dfxtype[i] < 0 && p->nr_floppies > i) p->nr_floppies = i; } // for (i = 0; i < MAX_SPARE_DRIVES; i++) { // if (p->dfxlist[i][0]) -// cfgfile_write (f, "diskimage%d=%s\n", i, p->dfxlist[i]); +// cfgfile_dwrite (f, "diskimage%d=%s\n", i, p->dfxlist[i]); // } cfgfile_write (f, "nr_floppies=%d\n", p->nr_floppies); @@ -279,13 +412,15 @@ void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type) // cfgfile_write (f, "serial_on_demand=%s\n", p->serial_demand ? "true" : "false"); // cfgfile_write (f, "serial_hardware_ctsrts=%s\n", p->serial_hwctsrts ? "true" : "false"); // cfgfile_write (f, "serial_direct=%s\n", p->serial_direct ? "true" : "false"); - cfgfile_write (f, "scsi=%s\n", p->scsi ? "true" : "false"); + cfgfile_write (f, "scsi=%s\n", scsimode[p->scsi]); +// cfgfile_write (f, "uaeserial=%s\n", p->uaeserial ? "true" : "false"); +// cfgfile_write (f, "sana2=%s\n", p->sana2 ? "true" : "false"); cfgfile_write (f, "sound_output=%s\n", soundmode1[p->produce_sound]); cfgfile_write (f, "sound_bits=%d\n", p->sound_bits); cfgfile_write (f, "sound_channels=%s\n", stereomode[p->sound_stereo]); cfgfile_write (f, "sound_stereo_separation=%d\n", p->sound_stereo_separation); - cfgfile_write (f, "sound_stereo_mixing_delay=%d\n", p->sound_mixed_stereo >= 0 ? p->sound_mixed_stereo : 0); + cfgfile_write (f, "sound_stereo_mixing_delay=%d\n", p->sound_mixed_stereo_delay >= 0 ? p->sound_mixed_stereo_delay : 0); // cfgfile_write (f, "sound_max_buff=%d\n", p->sound_maxbsiz); cfgfile_write (f, "sound_frequency=%d\n", p->sound_freq); // cfgfile_write (f, "sound_latency=%d\n", p->sound_latency); @@ -319,8 +454,9 @@ void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type) // cfgfile_write (f, "override_dga_address=0x%08x\n", p->override_dga_address); // for (i = 0; i < 2; i++) { -// int v = i == 0 ? p->jport0 : p->jport1; -// char tmp1[100], tmp2[50]; +// struct jport *jp = &p->jports[i]; +// int v = jp->id; +// char tmp1[100], tmp2[50]; // if (v < 0) { // strcpy (tmp2, "none"); // } else if (v < JSEM_JOYS) { @@ -334,6 +470,14 @@ void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type) // } // sprintf (tmp1, "joyport%d=%s\n", i, tmp2); // cfgfile_write (f, tmp1); +// if (jp->name) { +// sprintf (tmp1, "joyportfriendlyname%d=%s\n", i, jp->name); +// cfgfile_write (f, tmp1); +// } +// if (jp->configname) { +// sprintf (tmp1, "joyportname%d=%s\n", i, jp->configname); +// cfgfile_write (f, tmp1); +// } // } // cfgfile_write (f, "bsdsocket_emu=%s\n", p->socket_emu ? "true" : "false"); @@ -345,26 +489,28 @@ void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type) // cfgfile_write (f, "ghostscript_parameters=%s\n", p->ghostscript_parameters); // cfgfile_write (f, "parallel_autoflush=%d\n", p->parallel_autoflush_time); -// cfgfile_write (f, "gfx_display=%d\n", p->gfx_display); - cfgfile_write (f, "gfx_framerate=%d\n", p->gfx_framerate); - cfgfile_write (f, "gfx_width=%d\n", p->gfx_size.width); - cfgfile_write (f, "gfx_height=%d\n", p->gfx_size.height); - cfgfile_write (f, "gfx_width_windowed=%d\n", p->gfx_size_win.width); - cfgfile_write (f, "gfx_height_windowed=%d\n", p->gfx_size_win.height); - cfgfile_write (f, "gfx_width_fullscreen=%d\n", p->gfx_size_fs.width); - cfgfile_write (f, "gfx_height_fullscreen=%d\n", p->gfx_size_fs.height); - cfgfile_write (f, "gfx_refreshrate=%d\n", p->gfx_refreshrate); -// cfgfile_write (f, "gfx_autoresolution=%d\n", p->gfx_autoresolution); - cfgfile_write (f, "gfx_vsync=%s\n", p->gfx_vsync ? "true" : "false"); - cfgfile_write (f, "gfx_lores=%s\n", p->gfx_lores ? "true" : "false"); -// cfgfile_write (f, "gfx_lores_mode=%s\n", loresmode[p->gfx_lores_mode]); -// cfgfile_write (f, "gfx_linemode=%s\n", linemode1[p->gfx_linedbl]); - cfgfile_write (f, "gfx_correct_aspect=%s\n", p->gfx_correct_aspect ? "true" : "false"); -// cfgfile_write (f, "gfx_fullscreen_amiga=%s\n", p->gfx_afullscreen ? "true" : "false"); -// cfgfile_write (f, "gfx_fullscreen_picasso=%s\n", p->gfx_pfullscreen ? "true" : "false"); - cfgfile_write (f, "gfx_center_horizontal=%s\n", centermode1[p->gfx_xcenter]); - cfgfile_write (f, "gfx_center_vertical=%s\n", centermode1[p->gfx_ycenter]); -// cfgfile_write (f, "gfx_colour_mode=%s\n", colormode1[p->color_mode]); +// cfgfile_dwrite (f, "gfx_display=%d\n", p->gfx_display); + cfgfile_dwrite (f, "gfx_framerate=%d\n", p->gfx_framerate); + cfgfile_dwrite (f, "gfx_width=%d\n", p->gfx_size.width); + cfgfile_dwrite (f, "gfx_height=%d\n", p->gfx_size.height); + cfgfile_dwrite (f, "gfx_width_windowed=%d\n", p->gfx_size_win.width); + cfgfile_dwrite (f, "gfx_height_windowed=%d\n", p->gfx_size_win.height); + cfgfile_dwrite (f, "gfx_width_fullscreen=%d\n", p->gfx_size_fs.width); + cfgfile_dwrite (f, "gfx_height_fullscreen=%d\n", p->gfx_size_fs.height); + cfgfile_dwrite (f, "gfx_refreshrate=%d\n", p->gfx_refreshrate); +// cfgfile_dwrite (f, "gfx_autoresolution=%d\n", p->gfx_autoresolution); + cfgfile_dwrite (f, "gfx_vsync=%s\n", p->gfx_avsync ? "true" : "false"); +// cfgfile_dwrite (f, "gfx_vsync_picasso=%s\n", p->gfx_pvsync ? "true" : "false"); + cfgfile_dwrite (f, "gfx_lores=%s\n", p->gfx_resolution == 0 ? "true" : "false"); + cfgfile_dwrite (f, "gfx_resolution=%s\n", lorestype1[p->gfx_resolution]); +// cfgfile_dwrite (f, "gfx_lores_mode=%s\n", loresmode[p->gfx_lores_mode]); +// cfgfile_dwrite (f, "gfx_linemode=%s\n", linemode1[p->gfx_linedbl]); + cfgfile_dwrite (f, "gfx_correct_aspect=%s\n", p->gfx_correct_aspect ? "true" : "false"); +// cfgfile_dwrite (f, "gfx_fullscreen_amiga=%s\n", fullmodes[p->gfx_afullscreen]); +// cfgfile_dwrite (f, "gfx_fullscreen_picasso=%s\n", fullmodes[p->gfx_pfullscreen]); + cfgfile_dwrite (f, "gfx_center_horizontal=%s\n", centermode1[p->gfx_xcenter]); + cfgfile_dwrite (f, "gfx_center_vertical=%s\n", centermode1[p->gfx_ycenter]); +// cfgfile_dwrite (f, "gfx_colour_mode=%s\n", colormode1[p->color_mode]); #ifdef GFXFILTER if (p->gfx_filter > 0) { @@ -373,83 +519,101 @@ void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type) while (uaefilters[i].name) { uf = &uaefilters[i]; if (uf->type == p->gfx_filter) { - cfgfile_write (f, "gfx_filter=%s\n", uf->cfgname); + cfgfile_dwrite (f, "gfx_filter=%s\n", uf->cfgname); if (uf->type == p->gfx_filter) { if (uf->x[0]) { - cfgfile_write (f, "gfx_filter_mode=%s\n", filtermode1[p->gfx_filter_filtermode]); + cfgfile_dwrite (f, "gfx_filter_mode=%s\n", filtermode1[p->gfx_filter_filtermode]); } else { int mt[4], i = 0; if (uf->x[1]) mt[i++] = 1; if (uf->x[2]) mt[i++] = 2; if (uf->x[3]) mt[i++] = 3; if (uf->x[4]) mt[i++] = 4; - cfgfile_write (f, "gfx_filter_mode=%dx\n", mt[p->gfx_filter_filtermode]); + cfgfile_dwrite (f, "gfx_filter_mode=%dx\n", mt[p->gfx_filter_filtermode]); } } } i++; } } else { - cfgfile_write (f, "gfx_filter=no\n"); + cfgfile_dwrite (f, "gfx_filter=no\n"); } - cfgfile_write (f, "gfx_filter_vert_zoom=%d\n", p->gfx_filter_vert_zoom); - cfgfile_write (f, "gfx_filter_horiz_zoom=%d\n", p->gfx_filter_horiz_zoom); - cfgfile_write (f, "gfx_filter_vert_zoom_mult=%d\n", p->gfx_filter_vert_zoom_mult); - cfgfile_write (f, "gfx_filter_horiz_zoom_mult=%d\n", p->gfx_filter_horiz_zoom_mult); - cfgfile_write (f, "gfx_filter_vert_offset=%d\n", p->gfx_filter_vert_offset); - cfgfile_write (f, "gfx_filter_horiz_offset=%d\n", p->gfx_filter_horiz_offset); - cfgfile_write (f, "gfx_filter_scanlines=%d\n", p->gfx_filter_scanlines); - cfgfile_write (f, "gfx_filter_scanlinelevel=%d\n", p->gfx_filter_scanlinelevel); - cfgfile_write (f, "gfx_filter_scanlineratio=%d\n", p->gfx_filter_scanlineratio); + cfgfile_dwrite (f, "gfx_filter_vert_zoom=%d\n", p->gfx_filter_vert_zoom); + cfgfile_dwrite (f, "gfx_filter_horiz_zoom=%d\n", p->gfx_filter_horiz_zoom); + cfgfile_dwrite (f, "gfx_filter_vert_zoom_mult=%d\n", p->gfx_filter_vert_zoom_mult); + cfgfile_dwrite (f, "gfx_filter_horiz_zoom_mult=%d\n", p->gfx_filter_horiz_zoom_mult); + cfgfile_dwrite (f, "gfx_filter_vert_offset=%d\n", p->gfx_filter_vert_offset); + cfgfile_dwrite (f, "gfx_filter_horiz_offset=%d\n", p->gfx_filter_horiz_offset); + cfgfile_dwrite (f, "gfx_filter_scanlines=%d\n", p->gfx_filter_scanlines); + cfgfile_dwrite (f, "gfx_filter_scanlinelevel=%d\n", p->gfx_filter_scanlinelevel); + cfgfile_dwrite (f, "gfx_filter_scanlineratio=%d\n", p->gfx_filter_scanlineratio); + cfgfile_dwrite (f, "gfx_filter_luminance=%d\n", p->gfx_filter_luminance); + cfgfile_dwrite (f, "gfx_filter_contrast=%d\n", p->gfx_filter_contrast); + cfgfile_dwrite (f, "gfx_filter_saturation=%d\n", p->gfx_filter_saturation); + cfgfile_dwrite (f, "gfx_filter_gamma=%d\n", p->gfx_filter_gamma); + cfgfile_dwrite (f, "gfx_filter_blur=%d\n", p->gfx_filter_blur); + cfgfile_dwrite (f, "gfx_filter_noise=%d\n", p->gfx_filter_noise); + cfgfile_dwrite (f, "gfx_filter_upscale=%s\n", p->gfx_filter_upscale ? "true" : "false"); + + cfgfile_dwrite (f, "gfx_luminance=%d\n", p->gfx_luminance); + cfgfile_dwrite (f, "gfx_contrast=%d\n", p->gfx_contrast); + cfgfile_dwrite (f, "gfx_gamma=%d\n", p->gfx_gamma); #endif cfgfile_write (f, "immediate_blits=%s\n", p->immediate_blits ? "true" : "false"); cfgfile_write (f, "fast_copper=%s\n", p->fast_copper ? "true" : "false"); cfgfile_write (f, "ntsc=%s\n", p->ntscmode ? "true" : "false"); // cfgfile_write (f, "genlock=%s\n", p->genlock ? "true" : "false"); - cfgfile_write (f, "show_leds=%s\n", p->leds_on_screen ? "true" : "false"); -// cfgfile_write (f, "keyboard_leds=numlock:%s,capslock:%s,scrolllock:%s\n", + cfgfile_dwrite (f, "show_leds=%s\n", p->leds_on_screen ? "true" : "false"); +// cfgfile_dwrite (f, "keyboard_leds=numlock:%s,capslock:%s,scrolllock:%s\n", // kbleds[p->keyboard_leds[0]], kbleds[p->keyboard_leds[1]], kbleds[p->keyboard_leds[2]]); if (p->chipset_mask & CSMASK_AGA) - cfgfile_write (f, "chipset=aga\n"); + cfgfile_dwrite (f, "chipset=aga\n"); else if ((p->chipset_mask & CSMASK_ECS_AGNUS) && (p->chipset_mask & CSMASK_ECS_DENISE)) - cfgfile_write (f, "chipset=ecs\n"); + cfgfile_dwrite (f, "chipset=ecs\n"); else if (p->chipset_mask & CSMASK_ECS_AGNUS) - cfgfile_write (f, "chipset=ecs_agnus\n"); + cfgfile_dwrite (f, "chipset=ecs_agnus\n"); else if (p->chipset_mask & CSMASK_ECS_DENISE) - cfgfile_write (f, "chipset=ecs_denise\n"); + cfgfile_dwrite (f, "chipset=ecs_denise\n"); else - cfgfile_write (f, "chipset=ocs\n"); + cfgfile_dwrite (f, "chipset=ocs\n"); // cfgfile_write (f, "chipset_refreshrate=%d\n", p->chipset_refreshrate); cfgfile_write (f, "collision_level=%s\n", collmode[p->collision_level]); + cfgfile_dwrite (f, "a1000ram=%s\n", p->cs_a1000ram ? "true" : "false"); + cfgfile_write (f, "fastmem_size=%d\n", p->fastmem_size / 0x100000); - cfgfile_write (f, "a3000mem_size=%d\n", p->a3000mem_size / 0x100000); +// cfgfile_write (f, "a3000mem_size=%d\n", p->mbresmem_low_size / 0x100000); +// cfgfile_write (f, "mbresmem_size=%d\n", p->mbresmem_high_size / 0x100000); cfgfile_write (f, "z3mem_size=%d\n", p->z3fastmem_size / 0x100000); cfgfile_write (f, "z3mem_start=0x%x\n", p->z3fastmem_start); cfgfile_write (f, "bogomem_size=%d\n", p->bogomem_size / 0x40000); cfgfile_write (f, "gfxcard_size=%d\n", p->gfxmem_size / 0x100000); - cfgfile_write (f, "chipmem_size=%d\n", (p->chipmem_size == 0x40000) ? 0 : p->chipmem_size / 0x80000); - -// cfgfile_write (f, "fpu_model=%d\n", p->fpu_model); + cfgfile_write (f, "chipmem_size=%d\n", p->chipmem_size == 0x20000 ? -1 : (p->chipmem_size == 0x40000 ? 0 : p->chipmem_size / 0x80000)); if (p->m68k_speed > 0) cfgfile_write (f, "finegrain_cpu_speed=%d\n", p->m68k_speed); else cfgfile_write (f, "cpu_speed=%s\n", p->m68k_speed == -1 ? "max" : "real"); - cfgfile_write (f, "cpu_type=%s\n", cpumode[p->cpu_level * 2 + !p->address_space_24]); + /* do not reorder start */ + write_compatibility_cpu(f, p); + cfgfile_write (f, "cpu_model=%d\n", p->cpu_model); + if (p->fpu_model) + cfgfile_write (f, "fpu_model=%d\n", p->fpu_model); cfgfile_write (f, "cpu_compatible=%s\n", p->cpu_compatible ? "true" : "false"); + cfgfile_write (f, "cpu_24bit_addressing=%s\n", p->address_space_24 ? "true" : "false"); + /* do not reorder end */ // cfgfile_write (f, "cpu_cycle_exact=%s\n", p->cpu_cycle_exact ? "true" : "false"); // cfgfile_write (f, "blitter_cycle_exact=%s\n", p->blitter_cycle_exact ? "true" : "false"); cfgfile_write (f, "rtg_nocustom=%s\n", p->picasso96_nocustom ? "true" : "false"); // cfgfile_write (f, "log_illegal_mem=%s\n", p->illegal_mem ? "true" : "false"); // if (p->catweasel >= 100) -// cfgfile_write (f, "catweasel=0x%x\n", p->catweasel); +// cfgfile_dwrite (f, "catweasel=0x%x\n", p->catweasel); // else -// cfgfile_write (f, "catweasel=%d\n", p->catweasel); +// cfgfile_dwrite (f, "catweasel=%d\n", p->catweasel); // cfgfile_write (f, "kbd_lang=%s\n", (p->keyboard_lang == KBD_LANG_DE ? "de" // : p->keyboard_lang == KBD_LANG_DK ? "dk" @@ -460,12 +624,12 @@ void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type) // : p->keyboard_lang == KBD_LANG_IT ? "it" // : "FOO")); -// cfgfile_write (f, "state_replay=%s\n", p->statecapture ? "yes" : "no"); -// cfgfile_write (f, "state_replay_rate=%d\n", p->statecapturerate); -// cfgfile_write (f, "state_replay_buffer=%d\n", p->statecapturebuffersize); +// cfgfile_dwrite (f, "state_replay=%s\n", p->statecapture ? "yes" : "no"); +// cfgfile_dwrite (f, "state_replay_rate=%d\n", p->statecapturerate); +// cfgfile_dwrite (f, "state_replay_buffer=%d\n", p->statecapturebuffersize); #ifdef FILESYS - write_filesys_config (&currprefs, currprefs.mountinfo, UNEXPANDED, p->path_hardfile, f); + write_filesys_config (p, UNEXPANDED, p->path_hardfile, f); // if (p->filesys_no_uaefsdb) // cfgfile_write (f, "filesys_no_fsdb=%s\n", p->filesys_no_uaefsdb ? "true" : "false"); #endif @@ -474,7 +638,7 @@ void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type) /* Don't write gfxlib/gfx_test_speed options. */ } -int cfgfile_yesno (char *option, char *value, const char *name, int *location) +int cfgfile_yesno (const char *option, const char *value, const char *name, int *location) { if (strcmp (option, name) != 0) return 0; @@ -509,7 +673,7 @@ int cfgfile_intval (char *option, char *value, const char *name, int *location, return 1; } -int cfgfile_strval (char *option, char *value, const char *name, int *location, const char *table[], int more) +int cfgfile_strval (const char *option, const char *value, const char *name, int *location, const char *table[], int more) { int val; if (strcmp (option, name) != 0) @@ -526,7 +690,7 @@ int cfgfile_strval (char *option, char *value, const char *name, int *location, return 1; } -int cfgfile_string (char *option, char *value, const char *name, char *location, int maxsz) +int cfgfile_string (const char *option, const char *value, const char *name, char *location, int maxsz) { if (strcmp (option, name) != 0) return 0; @@ -547,7 +711,7 @@ static int getintval (char **p, int *result, int delim) *p2++ = '\0'; - if (value[0] == '0' && value[1] == 'x') + if (value[0] == '0' && toupper (value[1]) == 'X') value += 2, base = 16; *result = strtol (value, &endptr, base); *p = p2; @@ -575,7 +739,7 @@ static int getintval2 (char **p, int *result, int delim) if (*p2 != 0) *p2++ = '\0'; - if (value[0] == '0' && value[1] == 'x') + if (value[0] == '0' && toupper (value[1]) == 'X') value += 2, base = 16; *result = strtol (value, &endptr, base); *p = p2; @@ -652,7 +816,7 @@ static int cfgfile_parse_host (struct uae_prefs *p, char *option, char *value) || cfgfile_intval (option, value, "sound_frequency", &p->sound_freq, 1) || cfgfile_intval (option, value, "sound_volume", &p->sound_volume, 1) || cfgfile_intval (option, value, "sound_stereo_separation", &p->sound_stereo_separation, 1) - || cfgfile_intval (option, value, "sound_stereo_mixing_delay", &p->sound_mixed_stereo, 1) + || cfgfile_intval (option, value, "sound_stereo_mixing_delay", &p->sound_mixed_stereo_delay, 1) // || cfgfile_intval (option, value, "gfx_display", &p->gfx_display, 1) || cfgfile_intval (option, value, "gfx_framerate", &p->gfx_framerate, 1) @@ -663,6 +827,11 @@ static int cfgfile_parse_host (struct uae_prefs *p, char *option, char *value) || cfgfile_intval (option, value, "gfx_refreshrate", &p->gfx_refreshrate, 1) // || cfgfile_intval (option, value, "gfx_autoresolution", &p->gfx_autoresolution, 1) +// || cfgfile_intval (option, value, "gfx_center_horizontal_position", &p->gfx_xcenter_pos, 1) +// || cfgfile_intval (option, value, "gfx_center_vertical_position", &p->gfx_ycenter_pos, 1) +// || cfgfile_intval (option, value, "gfx_center_horizontal_size", &p->gfx_xcenter_size, 1) +// || cfgfile_intval (option, value, "gfx_center_vertical_size", &p->gfx_ycenter_size, 1) + #ifdef GFXFILTER || cfgfile_intval (option, value, "gfx_filter_vert_zoom", &p->gfx_filter_vert_zoom, 1) || cfgfile_intval (option, value, "gfx_filter_horiz_zoom", &p->gfx_filter_horiz_zoom, 1) @@ -673,6 +842,16 @@ static int cfgfile_parse_host (struct uae_prefs *p, char *option, char *value) || cfgfile_intval (option, value, "gfx_filter_scanlines", &p->gfx_filter_scanlines, 1) || cfgfile_intval (option, value, "gfx_filter_scanlinelevel", &p->gfx_filter_scanlinelevel, 1) || cfgfile_intval (option, value, "gfx_filter_scanlineratio", &p->gfx_filter_scanlineratio, 1) + || cfgfile_intval (option, value, "gfx_filter_luminance", &p->gfx_filter_luminance, 1) + || cfgfile_intval (option, value, "gfx_filter_contrast", &p->gfx_filter_contrast, 1) + || cfgfile_intval (option, value, "gfx_filter_saturation", &p->gfx_filter_saturation, 1) + || cfgfile_intval (option, value, "gfx_filter_gamma", &p->gfx_filter_gamma, 1) + || cfgfile_intval (option, value, "gfx_filter_blur", &p->gfx_filter_blur, 1) + || cfgfile_intval (option, value, "gfx_filter_noise", &p->gfx_filter_noise, 1) + || cfgfile_yesno (option, value, "gfx_filter_upscale", &p->gfx_filter_upscale) + || cfgfile_intval (option, value, "gfx_luminance", &p->gfx_luminance, 1) + || cfgfile_intval (option, value, "gfx_contrast", &p->gfx_contrast, 1) + || cfgfile_intval (option, value, "gfx_gamma", &p->gfx_gamma, 1) #endif || cfgfile_intval (option, value, "floppy0sound", &p->dfxclick[0], 1) || cfgfile_intval (option, value, "floppy1sound", &p->dfxclick[1], 1) @@ -700,11 +879,9 @@ static int cfgfile_parse_host (struct uae_prefs *p, char *option, char *value) // || cfgfile_yesno (option, value, "avoid_vid", &p->avoid_vid) // || cfgfile_yesno (option, value, "log_illegal_mem", &p->illegal_mem) // || cfgfile_yesno (option, value, "filesys_no_fsdb", &p->filesys_no_uaefsdb) - || cfgfile_yesno (option, value, "gfx_vsync", &p->gfx_vsync) - || cfgfile_yesno (option, value, "gfx_lores", &p->gfx_lores) + || cfgfile_yesno (option, value, "gfx_vsync", &p->gfx_avsync) +// || cfgfile_yesno (option, value, "gfx_vsync_picasso", &p->gfx_pvsync) || cfgfile_yesno (option, value, "gfx_correct_aspect", &p->gfx_correct_aspect) -// || cfgfile_yesno (option, value, "gfx_fullscreen_amiga", &p->gfx_afullscreen) -// || cfgfile_yesno (option, value, "gfx_fullscreen_picasso", &p->gfx_pfullscreen) || cfgfile_yesno (option, value, "show_leds", &p->leds_on_screen) || cfgfile_yesno (option, value, "synchronize_clock", &p->tod_hack) /* || cfgfile_yesno (option, value, "bsdsocket_emu", &p->socket_emu)*/) @@ -718,7 +895,11 @@ static int cfgfile_parse_host (struct uae_prefs *p, char *option, char *value) || cfgfile_strval (option, value, "use_gui", &p->start_gui, guimode1, 1) || cfgfile_strval (option, value, "use_gui", &p->start_gui, guimode2, 1) || cfgfile_strval (option, value, "use_gui", &p->start_gui, guimode3, 0) + || cfgfile_strval (option, value, "gfx_resolution", &p->gfx_resolution, lorestype1, 0) + || cfgfile_strval (option, value, "gfx_lores", &p->gfx_resolution, lorestype2, 0) // || cfgfile_strval (option, value, "gfx_lores_mode", &p->gfx_lores_mode, loresmode, 0) +// || cfgfile_strval (option, value, "gfx_fullscreen_amiga", &p->gfx_afullscreen, fullmodes, 0) +// || cfgfile_strval (option, value, "gfx_fullscreen_picasso", &p->gfx_pfullscreen, fullmodes, 0) // || cfgfile_strval (option, value, "gfx_linemode", &p->gfx_linedbl, linemode1, 1) // || cfgfile_strval (option, value, "gfx_linemode", &p->gfx_linedbl, linemode2, 0) || cfgfile_strval (option, value, "gfx_center_horizontal", &p->gfx_xcenter, centermode1, 1) @@ -785,44 +966,36 @@ static int cfgfile_parse_host (struct uae_prefs *p, char *option, char *value) return 1; } -// if (strcmp (option, "joyport0") == 0 || strcmp (option, "joyport1") == 0) { -// int port = strcmp (option, "joyport0") == 0 ? 0 : 1; -// int start = -1, got = 0; -// char *pp = 0; -// if (strncmp (value, "kbd", 3) == 0) { -// start = JSEM_KBDLAYOUT; -// pp = value + 3; -// got = 1; -// } else if (strncmp (value, "joy", 3) == 0) { -// start = JSEM_JOYS; -// pp = value + 3; -// got = 1; -// } else if (strncmp (value, "mouse", 5) == 0) { -// start = JSEM_MICE; -// pp = value + 5; -// got = 1; -// } else if (strcmp (value, "none") == 0) { -// got = 2; +// if (strcmp (option, "gfx_fullscreen_multi") == 0 || strcmp (option, "gfx_windowed_multi") == 0) { +// char tmp[256], *tmpp, *tmpp2; +// struct wh *wh = p->gfx_size_win_xtra; +// if (strcmp (option, "gfx_fullscreen_multi") == 0) +// wh = p->gfx_size_fs_xtra; +// sprintf (tmp, ",%s,", value); +// tmpp2 = tmp; +// for (i = 0; i < 4; i++) { +// tmpp = strchr (tmpp2, ','); +// tmpp++; +// wh[i].width = atol (tmpp); +// while (*tmpp != ',' && *tmpp != 'x') +// tmpp++; +// wh[i].height = atol (tmpp + 1); +// tmpp2 = tmpp; // } -// if (got) { -// if (pp) { -// int v = atol (pp); -// if (start >= 0) { -// if (start == JSEM_KBDLAYOUT) -// v--; -// if (v >= 0) { -// start += v; -// got = 2; -// } -// } -// } -// if (got == 2) { -// if (port) -// p->jport1 = start; -// else -// p->jport0 = start; -// } -// } +// return 1; +// } +// +// if (strcmp (option, "joyportfriendlyname0") == 0 || strcmp (option, "joyportfriendlyname1") == 0) { +// inputdevice_joyport_config (p, value, strcmp (option, "joyportfriendlyname0") == 0 ? 0 : 1, 2); +// return 1; +// } +// if (strcmp (option, "joyportname0") == 0 || strcmp (option, "joyportname1") == 0) { +// inputdevice_joyport_config (p, value, strcmp (option, "joyportname0") == 0 ? 0 : 1, 1); +// return 1; +// } +// +// if (strcmp (option, "joyport0") == 0 || strcmp (option, "joyport1") == 0) { +// inputdevice_joyport_config (p, value, strcmp (option, "joyport0") == 0 ? 0 : 1, 0); // return 1; // } @@ -833,9 +1006,9 @@ static int cfgfile_parse_host (struct uae_prefs *p, char *option, char *value) } if (cfgfile_strval (option, value, "sound_channels", &p->sound_stereo, stereomode, 1)) { - if (p->sound_stereo == 4) { /* "mixed stereo" compatibility hack */ - p->sound_stereo = 1; - p->sound_mixed_stereo = 5; + if (p->sound_stereo == SND_NONE) { /* "mixed stereo" compatibility hack */ + p->sound_stereo = SND_STEREO; + p->sound_mixed_stereo_delay = 5; p->sound_stereo_separation = 7; } return 1; @@ -905,6 +1078,73 @@ static int cfgfile_parse_host (struct uae_prefs *p, char *option, char *value) return 0; } +static struct uaedev_config_info *getuci(struct uae_prefs *p) +{ + if (p->mountitems < MOUNT_CONFIG_SIZE) + return &p->mountconfig[p->mountitems++]; + return NULL; +} + +struct uaedev_config_info *add_filesys_config (struct uae_prefs *p, int index, + char *devname, char *volname, char *rootdir, int readonly, + int secspertrack, int surfaces, int reserved, + int blocksize, int bootpri, + char *filesysdir, int hdc, int flags) { + struct uaedev_config_info *uci; + int i; + char *s; + + if (index < 0) { + uci = getuci(p); + uci->configoffset = -1; + } else { + uci = &p->mountconfig[index]; + } + if (!uci) + return 0; + uci->ishdf = volname == NULL ? 1 : 0; + strcpy (uci->devname, devname ? devname : ""); + strcpy (uci->volname, volname ? volname : ""); + strcpy (uci->rootdir, rootdir ? rootdir : ""); + uci->readonly = readonly; + uci->sectors = secspertrack; + uci->surfaces = surfaces; + uci->reserved = reserved; + uci->blocksize = blocksize; + uci->bootpri = bootpri; + uci->donotmount = 0; + uci->autoboot = 0; + if (bootpri < -128) + uci->donotmount = 1; + else if (bootpri >= -127) + uci->autoboot = 1; + uci->controller = hdc; + strcpy (uci->filesys, filesysdir ? filesysdir : ""); + if (!uci->devname[0]) { + char base[32]; + char base2[32]; + int num = 0; + if (uci->rootdir[0] == 0 && !uci->ishdf) + strcpy (base, "RDH"); + else + strcpy (base, "DH"); + strcpy (base2, base); + for (i = 0; i < p->mountitems; i++) { + sprintf(base2, "%s%d", base, num); + if (!strcmp(base2, p->mountconfig[i].devname)) { + num++; + i = -1; + continue; + } + } + strcpy (uci->devname, base2); + } + s = filesys_createvolname (volname, rootdir, "Harddrive"); + strcpy (uci->volname, s); + xfree (s); + return uci; +} + static int cfgfile_parse_hardware (struct uae_prefs *p, char *option, char *value) { int tmpval, dummy, i; @@ -913,16 +1153,20 @@ static int cfgfile_parse_hardware (struct uae_prefs *p, char *option, char *valu // if (cfgfile_yesno (option, value, "cpu_cycle_exact", &p->cpu_cycle_exact) // || cfgfile_yesno (option, value, "blitter_cycle_exact", &p->blitter_cycle_exact)) { -// if (p->cpu_level > 1 && p->cachesize > 0) +// if (p->cpu_model >= 68020 && p->cachesize > 0) // p->cpu_cycle_exact = p->blitter_cycle_exact = 0; // /* we don't want cycle-exact in 68020/40+JIT modes */ // return 1; // } if (cfgfile_yesno (option, value, "immediate_blits", &p->immediate_blits) + + || cfgfile_yesno (option, value, "a1000ram", &p->cs_a1000ram) + || cfgfile_yesno (option, value, "fast_copper", &p->fast_copper) // || cfgfile_yesno (option, value, "kickshifter", &p->kickshifter) || cfgfile_yesno (option, value, "ntsc", &p->ntscmode) +// || cfgfile_yesno (option, value, "sana2", &p->sana2) // || cfgfile_yesno (option, value, "genlock", &p->genlock) || cfgfile_yesno (option, value, "cpu_compatible", &p->cpu_compatible) || cfgfile_yesno (option, value, "cpu_24bit_addressing", &p->address_space_24) @@ -941,12 +1185,13 @@ static int cfgfile_parse_hardware (struct uae_prefs *p, char *option, char *valu // || cfgfile_yesno (option, value, "comp_midopt", &p->comp_midopt) // || cfgfile_yesno (option, value, "comp_lowopt", &p->comp_lowopt) || cfgfile_yesno (option, value, "rtg_nocustom", &p->picasso96_nocustom) - || cfgfile_yesno (option, value, "scsi", &p->scsi)) +/* || cfgfile_yesno (option, value, "uaeserial", &p->uaeserial)*/) return 1; if (cfgfile_intval (option, value, "cachesize", &p->cachesize, 1) || cfgfile_intval (option, value, "chipset_refreshrate", &p->chipset_refreshrate, 1) || cfgfile_intval (option, value, "fastmem_size", (int *) &p->fastmem_size, 0x100000) - || cfgfile_intval (option, value, "a3000mem_size", (int *) &p->a3000mem_size, 0x100000) +// || cfgfile_intval (option, value, "a3000mem_size", (int *) &p->mbresmem_low_size, 0x100000) +// || cfgfile_intval (option, value, "mbresmem_size", (int *) &p->mbresmem_high_size, 0x100000) || cfgfile_intval (option, value, "z3mem_size", (int *) &p->z3fastmem_size, 0x100000) || cfgfile_intval (option, value, "z3mem_start", (int *) &p->z3fastmem_start, 1) || cfgfile_intval (option, value, "bogomem_size", (int *) &p->bogomem_size, 0x40000) @@ -971,15 +1216,21 @@ static int cfgfile_parse_hardware (struct uae_prefs *p, char *option, char *valu return 1; if (cfgfile_string (option, value, "kickstart_rom_file", p->romfile, sizeof p->romfile) || cfgfile_string (option, value, "kickstart_ext_rom_file", p->romextfile, sizeof p->romextfile) +// || cfgfile_string (option, value, "amax_rom_file", p->amaxromfile, sizeof p->amaxromfile) // || cfgfile_string (option, value, "flash_file", p->flashfile, sizeof p->flashfile) // || cfgfile_string (option, value, "cart_file", p->cartfile, sizeof p->cartfile) // || cfgfile_string (option, value, "pci_devices", p->pci_devices, sizeof p->pci_devices) /* || cfgfile_string (option, value, "ghostscript_parameters", p->ghostscript_parameters, sizeof p->ghostscript_parameters)*/) return 1; -// if (cfgfile_strval (option, value, "cart_internal", &p->cart_internal, cartsmode, 0)) +// if (cfgfile_strval (option, value, "cart_internal", &p->cart_internal, cartsmode, 0)) { +// if (p->cart_internal) { +// struct romdata *rd = getromdatabyid(63); +// if (rd) +// sprintf(p->cartfile, ":%s", rd->configname); +// } // return 1; - +// } for (i = 0; i < 4; i++) { sprintf (tmpbuf, "floppy%d", i); if (cfgfile_string (option, value, tmpbuf, p->df[i], sizeof p->df[i])) @@ -987,8 +1238,10 @@ static int cfgfile_parse_hardware (struct uae_prefs *p, char *option, char *valu } if (cfgfile_intval (option, value, "chipmem_size", &dummy, 1)) { - if (!dummy) - p->chipmem_size = 0x40000; + if (dummy < 0) + p->chipmem_size = 0x20000; /* 128k, prototype support */ + else if (dummy == 0) + p->chipmem_size = 0x40000; /* 256k */ else p->chipmem_size = dummy * 0x80000; return 1; @@ -999,11 +1252,48 @@ static int cfgfile_parse_hardware (struct uae_prefs *p, char *option, char *valu return 1; } - if (cfgfile_strval (option, value, "cpu_type", &p->cpu_level, cpumode, 0)) { - p->address_space_24 = p->cpu_level < 8 && !(p->cpu_level & 1); - p->cpu_level >>= 1; + if (cfgfile_string (option, value, "fpu_model", tmpbuf, sizeof tmpbuf)) { + p->fpu_model = atol(tmpbuf); return 1; } + + if (cfgfile_string (option, value, "cpu_model", tmpbuf, sizeof tmpbuf)) { + p->cpu_model = atol(tmpbuf); + p->fpu_model = 0; + return 1; + } + + /* old-style CPU configuration */ + if (cfgfile_string (option, value, "cpu_type", tmpbuf, sizeof tmpbuf)) { + p->fpu_model = 0; + p->address_space_24 = 0; + p->cpu_model = 680000; + if (!strcmp(tmpbuf, "68000")) { + p->cpu_model = 68000; + } else if (!strcmp(tmpbuf, "68010")) { + p->cpu_model = 68010; + } else if (!strcmp(tmpbuf, "68ec020")) { + p->cpu_model = 68020; + p->address_space_24 = 1; + } else if (!strcmp(tmpbuf, "68020")) { + p->cpu_model = 68020; + } else if (!strcmp(tmpbuf, "68ec020/68881")) { + p->cpu_model = 68020; + p->fpu_model = 68881; + p->address_space_24 = 1; + } else if (!strcmp(tmpbuf, "68020/68881")) { + p->cpu_model = 68020; + p->fpu_model = 68881; + } else if (!strcmp(tmpbuf, "68040")) { + p->cpu_model = 68040; + p->fpu_model = 68040; + } else if (!strcmp(tmpbuf, "68060")) { + p->cpu_model = 68060; + p->fpu_model = 68060; + } + return 1; + } + if (p->config_version < (21 << 16)) { if (cfgfile_strval (option, value, "cpu_speed", &p->m68k_speed, speedmode, 1) /* Broken earlier versions used to write this out as a string. */ @@ -1029,6 +1319,13 @@ static int cfgfile_parse_hardware (struct uae_prefs *p, char *option, char *valu return 1; } + for (i = 0; i < MAX_FILESYSTEM_UNITS; i++) { + char tmp[100]; + sprintf (tmp, "uaehf%d", i); + if (strcmp (option, tmp) == 0) + return 1; + } + if (strcmp (option, "filesystem") == 0 || strcmp (option, "hardfile") == 0) { @@ -1074,14 +1371,10 @@ static int cfgfile_parse_hardware (struct uae_prefs *p, char *option, char *valu aname = 0; } str = cfgfile_subst_path (UNEXPANDED, p->path_hardfile, root); - tmpp = 0; #ifdef FILESYS - tmpp = add_filesys_unit (currprefs.mountinfo, 0, aname, str, ro, secs, - heads, reserved, bs, 0, 0, 0); + add_filesys_config (p, -1, NULL, aname, str, ro, secs, heads, reserved, bs, 0, NULL, 0, 0); #endif free (str); - if (tmpp) - write_log ("Error: %s\n", tmpp); return 1; invalid_fs_1: @@ -1092,11 +1385,11 @@ invalid_fs_1: if (strcmp (option, "filesystem2") == 0 || strcmp (option, "hardfile2") == 0) { - int secs, heads, reserved, bs, ro, bp; - char *dname, *aname, *root, *fs; + int secs, heads, reserved, bs, ro, bp, hdcv; + char *dname = NULL, *aname = "", *root = NULL, *fs = NULL, *hdc; char *tmpp = strchr (value, ','); - char *str; - + char *str = NULL; + config_newfilesystem = 1; if (tmpp == 0) goto invalid_fs; @@ -1109,27 +1402,27 @@ invalid_fs_1: else goto invalid_fs; secs = 0; heads = 0; reserved = 0; bs = 0; bp = 0; - fs = 0; + fs = 0; hdc = 0; hdcv = 0; value = tmpp; if (strcmp (option, "filesystem2") == 0) { tmpp = strchr (value, ':'); if (tmpp == 0) - goto invalid_fs; + goto empty_fs; *tmpp++ = 0; dname = value; aname = tmpp; tmpp = strchr (tmpp, ':'); if (tmpp == 0) - goto invalid_fs; + goto empty_fs; *tmpp++ = 0; root = tmpp; tmpp = strchr (tmpp, ','); if (tmpp == 0) - goto invalid_fs; + goto empty_fs; *tmpp++ = 0; if (! getintval (&tmpp, &bp, 0)) - goto invalid_fs; + goto empty_fs; } else { tmpp = strchr (value, ':'); if (tmpp == 0) @@ -1149,20 +1442,32 @@ invalid_fs_1: goto invalid_fs; if (getintval2 (&tmpp, &bp, ',')) { fs = tmpp; - tmpp = strchr (tmpp, ','); - if (tmpp != 0) - *tmpp = 0; + tmpp = strchr (tmpp, ','); + if (tmpp != 0) { + *tmpp++ = 0; + hdc = tmpp; + if(strlen(hdc) >= 4 && !memcmp(hdc, "ide", 3)) { + hdcv = hdc[3] - '0' + HD_CONTROLLER_IDE0; + if (hdcv < HD_CONTROLLER_IDE0 || hdcv > HD_CONTROLLER_IDE3) + hdcv = 0; + } + if(strlen(hdc) >= 5 && !memcmp(hdc, "scsi", 4)) { + hdcv = hdc[4] - '0' + HD_CONTROLLER_SCSI0; + if (hdcv < HD_CONTROLLER_SCSI0 || hdcv > HD_CONTROLLER_SCSI6) + hdcv = 0; + } + if (strlen (hdc) >= 6 && !memcmp (hdc, "scsram", 6)) + hdcv = HD_CONTROLLER_PCMCIA_SRAM; + } } } - str = cfgfile_subst_path (UNEXPANDED, p->path_hardfile, root); - tmpp = 0; +empty_fs: + if (root) + str = cfgfile_subst_path (UNEXPANDED, p->path_hardfile, root); #ifdef FILESYS - tmpp = add_filesys_unit (currprefs.mountinfo, dname, aname, str, ro, secs, - heads, reserved, bs, bp, fs, 0); + add_filesys_config (p, -1, dname, aname, str, ro, secs, heads, reserved, bs, bp, fs, hdcv, 0); #endif free (str); - if (tmpp) - write_log ("Error: %s\n", tmpp); return 1; invalid_fs: @@ -1282,7 +1587,6 @@ void cfgfile_parse_line (struct uae_prefs *p, char *line, int type) if (!cfgfile_separate_line (line, line1b, line2b)) return; cfgfile_parse_separated_line (p, line1b, line2b, type); - return; } static void subst (char *p, char *f, int n) @@ -1293,7 +1597,7 @@ static void subst (char *p, char *f, int n) free (str); } -static char *cfg_fgets (char *line, int max, FILE *fh) +static char *cfg_fgets (char *line, int max, struct zfile *fh) { #ifdef SINGLEFILE extern char singlefile_config[]; @@ -1302,7 +1606,7 @@ static char *cfg_fgets (char *line, int max, FILE *fh) #endif if (fh) - return fgets (line, max, fh); + return zfile_fgets (line, max, fh); #ifdef SINGLEFILE if (sfile_ptr == 0) { sfile_ptr = singlefile_config; @@ -1332,7 +1636,7 @@ static char *cfg_fgets (char *line, int max, FILE *fh) static int cfgfile_load_2 (struct uae_prefs *p, const char *filename, int real, int *type) { int i; - FILE *fh; + struct zfile *fh; char line[CONFIG_BLEN], line1b[CONFIG_BLEN], line2b[CONFIG_BLEN]; struct strlist *sl; int type1 = 0, type2 = 0, askedtype = 0; @@ -1347,17 +1651,14 @@ static int cfgfile_load_2 (struct uae_prefs *p, const char *filename, int real, reset_inputdevice_config (p); } - fh = fopen (filename, "r"); + fh = zfile_fopen (filename, "r"); #ifndef SINGLEFILE if (! fh) return 0; #endif while (cfg_fgets (line, sizeof (line), fh) != 0) { - int len = strlen (line); - /* Delete trailing whitespace. */ - while (len > 0 && strcspn (line + len - 1, "\t \r\n") == 0) - line[--len] = '\0'; + trimws (line); if (strlen (line) > 0) { if (line[0] == '#' || line[0] == ';') continue; @@ -1384,8 +1685,7 @@ static int cfgfile_load_2 (struct uae_prefs *p, const char *filename, int real, if (type && *type == 0) *type = CONFIG_TYPE_HARDWARE | CONFIG_TYPE_HOST; - if (fh) - fclose (fh); + zfile_fclose (fh); if (!real) return 1; @@ -1549,14 +1849,14 @@ static void parse_sound_spec (struct uae_prefs *p, char *spec) } p->produce_sound = atoi (x0); if (x1) { - p->sound_stereo_separation = 16; + p->sound_stereo_separation = 0; if (*x1 == 'S') { - p->sound_stereo = 1; - p->sound_stereo_separation = 10; + p->sound_stereo = SND_STEREO; + p->sound_stereo_separation = 7; } else if (*x1 == 's') - p->sound_stereo = 1; + p->sound_stereo = SND_STEREO; else - p->sound_stereo = 0; + p->sound_stereo = SND_MONO; } if (x2) p->sound_bits = atoi (x2); @@ -1565,10 +1865,9 @@ static void parse_sound_spec (struct uae_prefs *p, char *spec) // if (x4) // p->sound_maxbsiz = atoi (x4); free (x0); - return; } -void parse_filesys_spec (int readonly, char *spec) +void parse_filesys_spec (struct uae_prefs *p, int readonly, char *spec) { /* spec example (:): * rw,AmigaHD:AmigaHD @@ -1589,16 +1888,14 @@ void parse_filesys_spec (int readonly, char *spec) } #endif #ifdef FILESYS - s2 = add_filesys_unit (currprefs.mountinfo, 0, buf, s2, readonly, 0, 0, 0, 0, 0, 0, 0); + add_filesys_config (p, -1, NULL, buf, s2, readonly, 0, 0, 0, 0, 0, 0, 0, 0); #endif - if (s2) - write_log ("%s\n", s2); } else { write_log ("Usage: [-m | -M] VOLNAME:mount_point\n"); } } -void parse_hardfile_spec (char *spec) +void parse_hardfile_spec (struct uae_prefs *p, char *spec) { char *x0 = my_strdup (spec); char *x1, *x2, *x3, *x4; @@ -1620,10 +1917,8 @@ void parse_hardfile_spec (char *spec) goto argh; *x4++ = '\0'; #ifdef FILESYS - x4 = add_filesys_unit (currprefs.mountinfo, 0, 0, x4, 0, atoi (x0), atoi (x1), atoi (x2), atoi (x3), 0, 0, 0); + add_filesys_config (p, -1, NULL, NULL, x4, 0, atoi (x0), atoi (x1), atoi (x2), atoi (x3), 0, 0, 0, 0); #endif - if (x4) - write_log ("%s\n", x4); free (x0); return; @@ -1641,21 +1936,21 @@ static void parse_cpu_specs (struct uae_prefs *p, char *spec) return; } - p->cpu_level = *spec++ - '0'; - p->address_space_24 = p->cpu_level < 2; + p->cpu_model = (*spec++) * 10 + 68000; + p->address_space_24 = p->cpu_model < 68020; p->cpu_compatible = 0; while (*spec != '\0') { switch (*spec) { case 'a': - if (p->cpu_level < 2) + if (p->cpu_model < 68020) write_log ("In 68000/68010 emulation, the address space is always 24 bit.\n"); - else if (p->cpu_level >= 4) + else if (p->cpu_model >= 68040) write_log ("In 68040/060 emulation, the address space is always 32 bit.\n"); else p->address_space_24 = 1; break; case 'c': - if (p->cpu_level != 0) + if (p->cpu_model != 68000) write_log ("The more compatible CPU emulation is only available for 68000\n" "emulation, not for 68010 upwards.\n"); else @@ -1698,8 +1993,8 @@ int parse_cmdline_option (struct uae_prefs *p, char c, char *arg) case 'K': strncpy (p->romextfile, arg, 255); p->romextfile[255] = 0; break; // case 'p': strncpy (p->prtname, arg, 255); p->prtname[255] = 0; break; /* case 'I': strncpy (p->sername, arg, 255); p->sername[255] = 0; currprefs.use_serial = 1; break; */ - case 'm': case 'M': parse_filesys_spec (c == 'M', arg); break; - case 'W': parse_hardfile_spec (arg); break; + case 'm': case 'M': parse_filesys_spec (p, c == 'M', arg); break; + case 'W': parse_hardfile_spec (p, arg); break; case 'S': parse_sound_spec (p, arg); break; case 'R': p->gfx_framerate = atoi (arg); break; // case 'x': p->no_xhair = 1; break; @@ -1823,6 +2118,9 @@ void cfgfile_addcfgparam (char *line) void default_prefs (struct uae_prefs *p, int type) { int i; + uae_u8 zero = 0; + struct zfile *f; + memset (p, 0, sizeof (struct uae_prefs)); strcpy (p->description, "UAE default configuration"); @@ -1831,9 +2129,9 @@ void default_prefs (struct uae_prefs *p, int type) p->all_lines = 0; p->produce_sound = 3; - p->sound_stereo = 1; + p->sound_stereo = SND_STEREO; p->sound_stereo_separation = 7; - p->sound_mixed_stereo = 0; + p->sound_mixed_stereo_delay = 0; p->sound_bits = DEFAULT_SOUND_BITS; p->sound_freq = DEFAULT_SOUND_FREQ; p->sound_interpol = 0; @@ -1864,8 +2162,8 @@ void default_prefs (struct uae_prefs *p, int type) p->gfx_size_win.height = 240; p->gfx_size_fs.width = 640; p->gfx_size_fs.height = 480; - p->gfx_vsync = 1; - p->gfx_lores = 1; + p->gfx_avsync = 1; + p->gfx_resolution = 0; #ifdef RASPBERRY p->gfx_correct_aspect = 1; #else @@ -1905,7 +2203,8 @@ void default_prefs (struct uae_prefs *p, int type) sprintf (p->path_floppy, "%s/disks/", start_path_data); sprintf (p->path_hardfile, "%s/", start_path_data); - p->cpu_level = 0; + p->fpu_model = 0; + p->cpu_model = 68000; p->m68k_speed = 0; p->cpu_compatible = 0; p->address_space_24 = 1; @@ -1913,23 +2212,33 @@ void default_prefs (struct uae_prefs *p, int type) p->ntscmode = 0; p->fastmem_size = 0x00000000; - p->a3000mem_size = 0x00000000; p->z3fastmem_size = 0x00000000; p->z3fastmem_start = 0x01000000; p->chipmem_size = 0x00100000; p->bogomem_size = 0x00000000; p->gfxmem_size = 0x00000000; + p->cs_a1000ram = 0; + p->nr_floppies = 2; - p->dfxtype[0] = 0; - p->dfxtype[1] = 0; - p->dfxtype[2] = -1; - p->dfxtype[3] = -1; + p->dfxtype[0] = DRV_35_DD; + p->dfxtype[1] = DRV_35_DD; + p->dfxtype[2] = DRV_NONE; + p->dfxtype[3] = DRV_NONE; p->floppy_speed = 100; - p->mountinfo = &options_mountinfo; - target_default_options (p, type); inputdevice_default_prefs (p); + +/* + zfile_fclose (default_file); + default_file = NULL; + f = zfile_fopen_empty ("configstore", 50000); + if (f) { + cfgfile_save_options (f, p, 0); + zfile_fwrite (&zero, 1, 1, f); + default_file = f; + } +*/ } diff --git a/src/cia.cpp b/src/cia.cpp index f2153e46..cfdb4738 100644 --- a/src/cia.cpp +++ b/src/cia.cpp @@ -24,29 +24,12 @@ #include "savestate.h" #include "inputdevice.h" #include "audio.h" +#include "keyboard.h" #define TOD_HACK #define DIV10 (10 * CYCLE_UNIT / 2) /* Yes, a bad identifier. */ -/* battclock stuff */ -#define RTC_D_ADJ 8 -#define RTC_D_IRQ 4 -#define RTC_D_BUSY 2 -#define RTC_D_HOLD 1 -#define RTC_E_t1 8 -#define RTC_E_t0 4 -#define RTC_E_INTR 2 -#define RTC_E_MASK 1 -#define RTC_F_TEST 8 -#define RTC_F_24_12 4 -#define RTC_F_STOP 2 -#define RTC_F_RSET 1 - -static unsigned int clock_control_d = RTC_D_ADJ + RTC_D_HOLD; -static unsigned int clock_control_e = 0; -static unsigned int clock_control_f = RTC_F_24_12; - static unsigned int ciaaicr, ciaaimask, ciabicr, ciabimask; static unsigned int ciaacra, ciaacrb, ciabcra, ciabcrb; @@ -310,7 +293,7 @@ static int checkalarm (unsigned long tod, unsigned long alarm, int inc) return 0; /* emulate buggy TODMED counter. * it counts: .. 29 2A 2B 2C 2D 2E 2F 20 30 31 32 .. - * (0F->00->10 only takes couple of cycles but it will trigger alarm.. + * (2F->20->30 only takes couple of cycles but it will trigger alarm.. */ if (tod & 0x000fff) return 0; @@ -335,6 +318,11 @@ STATIC_INLINE void ciaa_checkalarm (int inc) } } +STATIC_INLINE void setcode (uae_u8 keycode) +{ + ciaasdr = ~((keycode << 1) | (keycode >> 7)); +} + void CIA_hsync_handler (void) { if (ciabtodon) { @@ -343,7 +331,7 @@ void CIA_hsync_handler (void) ciab_checkalarm (1); } - if (keys_available() && kback && (ciaacra & 0x40) == 0 && (hsync_counter & 15) == 0) { + if ((keys_available() || kbstate < 2) && kback && (ciaacra & 0x40) == 0 && (hsync_counter & 15) == 0) { /* * This hack lets one possible ciaaicr cycle go by without any key * being read, for every cycle in which a key is pulled out of the @@ -361,12 +349,12 @@ void CIA_hsync_handler (void) } else if (ciaasdr_unread == 0) { switch (kbstate) { case 0: - ciaasdr = (uae_s8)~0xFB; /* aaarghh... stupid compiler */ + setcode (AK_INIT_POWERUP); kbstate++; break; case 1: + setcode (AK_TERM_POWERUP); kbstate++; - ciaasdr = (uae_s8)~0xFD; break; case 2: ciaasdr = ~get_next_key(); @@ -508,7 +496,9 @@ static uae_u8 ReadCIAA (unsigned int addr) return (uae_u8)(ciaatod >> 8); case 10: if (!ciaatlatch) { /* only if not already latched. A1200 confirmed. (TW) */ - ciaatlatch = 1; + /* no latching if ALARM is set */ + if (!(ciaacrb & 0x80)) + ciaatlatch = 1; ciaatol = ciaatod; } return (uae_u8)(ciaatol >> 16); @@ -582,7 +572,9 @@ static uae_u8 ReadCIAB (unsigned int addr) return (uae_u8)(ciabtod >> 8); case 10: if (!ciabtlatch) { - ciabtlatch = 1; + /* no latching if ALARM is set */ + if (!(ciabcrb & 0x80)) + ciabtlatch = 1; ciabtol = ciabtod; } return (uae_u8)(ciabtol >> 16); @@ -861,6 +853,8 @@ void CIA_reset (void) static uae_u32 REGPARAM3 cia_lget (uaecptr) REGPARAM; static uae_u32 REGPARAM3 cia_wget (uaecptr) REGPARAM; static uae_u32 REGPARAM3 cia_bget (uaecptr) REGPARAM; +static uae_u32 REGPARAM3 cia_lgeti (uaecptr) REGPARAM; +static uae_u32 REGPARAM3 cia_wgeti (uaecptr) REGPARAM; static void REGPARAM3 cia_lput (uaecptr, uae_u32) REGPARAM; static void REGPARAM3 cia_wput (uaecptr, uae_u32) REGPARAM; static void REGPARAM3 cia_bput (uaecptr, uae_u32) REGPARAM; @@ -868,7 +862,8 @@ static void REGPARAM3 cia_bput (uaecptr, uae_u32) REGPARAM; addrbank cia_bank = { cia_lget, cia_wget, cia_bget, cia_lput, cia_wput, cia_bput, - default_xlate, default_check, NULL, "CIA" + default_xlate, default_check, NULL, "CIA", + cia_lgeti, cia_wgeti, ABFLAG_IO }; /* e-clock is 10 CPU cycles, 6 cycles low, 4 high @@ -897,7 +892,7 @@ static void cia_wait_post (void) do_cycles (2 * CYCLE_UNIT / 2); } -uae_u32 REGPARAM2 cia_bget (uaecptr addr) +static uae_u32 REGPARAM2 cia_bget (uaecptr addr) { int r = (addr & 0xf00) >> 8; uae_u8 v; @@ -907,8 +902,7 @@ uae_u32 REGPARAM2 cia_bget (uaecptr addr) #endif cia_wait_pre (); v = 0xff; - switch ((addr >> 12) & 3) - { + switch ((addr >> 12) & 3) { case 0: v = (addr & 1) ? ReadCIAA (r) : ReadCIAB (r); break; @@ -919,7 +913,7 @@ uae_u32 REGPARAM2 cia_bget (uaecptr addr) v = (addr & 1) ? ReadCIAA (r) : 0xff; break; case 3: - if (currprefs.cpu_level == 0 && currprefs.cpu_compatible) + if (currprefs.cpu_model == 68000 && currprefs.cpu_compatible) v = (addr & 1) ? regs.irc : regs.irc >> 8; break; } @@ -927,7 +921,7 @@ uae_u32 REGPARAM2 cia_bget (uaecptr addr) return v; } -uae_u32 REGPARAM2 cia_wget (uaecptr addr) +static uae_u32 REGPARAM2 cia_wget (uaecptr addr) { int r = (addr & 0xf00) >> 8; uae_u16 v; @@ -949,7 +943,7 @@ uae_u32 REGPARAM2 cia_wget (uaecptr addr) v = (0xff << 8) | ReadCIAA (r); break; case 3: - if (currprefs.cpu_level == 0 && currprefs.cpu_compatible) + if (currprefs.cpu_model == 68000 && currprefs.cpu_compatible) v = regs.irc; break; } @@ -957,7 +951,7 @@ uae_u32 REGPARAM2 cia_wget (uaecptr addr) return v; } -uae_u32 REGPARAM2 cia_lget (uaecptr addr) +static uae_u32 REGPARAM2 cia_lget (uaecptr addr) { uae_u32 v; #ifdef JIT @@ -968,7 +962,20 @@ uae_u32 REGPARAM2 cia_lget (uaecptr addr) return v; } -void REGPARAM2 cia_bput (uaecptr addr, uae_u32 value) +static uae_u32 REGPARAM2 cia_wgeti (uaecptr addr) +{ + if (currprefs.cpu_model >= 68020) + return dummy_wgeti(addr); + return cia_wget(addr); +} +static uae_u32 REGPARAM2 cia_lgeti (uaecptr addr) +{ + if (currprefs.cpu_model >= 68020) + return dummy_lgeti(addr); + return cia_lget(addr); +} + +static void REGPARAM2 cia_bput (uaecptr addr, uae_u32 value) { value&=0xFF; int r = (addr & 0xf00) >> 8; @@ -984,7 +991,7 @@ void REGPARAM2 cia_bput (uaecptr addr, uae_u32 value) cia_wait_post (); } -void REGPARAM2 cia_wput (uaecptr addr, uae_u32 value) +static void REGPARAM2 cia_wput (uaecptr addr, uae_u32 value) { value&=0xFFFF; int r = (addr & 0xf00) >> 8; @@ -1000,7 +1007,7 @@ void REGPARAM2 cia_wput (uaecptr addr, uae_u32 value) cia_wait_post (); } -void REGPARAM2 cia_lput (uaecptr addr, uae_u32 value) +static void REGPARAM2 cia_lput (uaecptr addr, uae_u32 value) { #ifdef JIT special_mem |= S_WRITE; @@ -1021,71 +1028,97 @@ static void REGPARAM3 clock_bput (uaecptr, uae_u32) REGPARAM; addrbank clock_bank = { clock_lget, clock_wget, clock_bget, clock_lput, clock_wput, clock_bput, - default_xlate, default_check, NULL, "Battery backed up clock" + default_xlate, default_check, NULL, "Battery backed up clock (none)", + dummy_lgeti, dummy_wgeti, ABFLAG_IO }; -uae_u32 REGPARAM2 clock_lget (uaecptr addr) +static unsigned int clock_control_d; +static unsigned int clock_control_e; +static unsigned int clock_control_f; + +void rtc_hardreset(void) +{ + clock_bank.name = "Battery backed up clock (MSM6242B)"; + clock_control_d = 0x1; + clock_control_e = 0; + clock_control_f = 0x4; /* 24/12 */ +} + +static uae_u32 REGPARAM2 clock_lget (uaecptr addr) { return (clock_wget (addr) << 16) | clock_wget (addr + 2); } -uae_u32 REGPARAM2 clock_wget (uaecptr addr) +static uae_u32 REGPARAM2 clock_wget (uaecptr addr) { return (clock_bget (addr) << 8) | clock_bget (addr + 1); } -uae_u32 REGPARAM2 clock_bget (uaecptr addr) +static uae_u32 REGPARAM2 clock_bget (uaecptr addr) { - time_t t = time(0); - struct tm *ct; + time_t t; + struct tm *ct; - ct = localtime (&t); #ifdef JIT - special_mem |= S_READ; + special_mem |= S_READ; #endif - switch (addr & 0x3f) { - case 0x03: return ct->tm_sec % 10; - case 0x07: return ct->tm_sec / 10; - case 0x0b: return ct->tm_min % 10; - case 0x0f: return ct->tm_min / 10; - case 0x13: return ct->tm_hour % 10; - case 0x17: return ct->tm_hour / 10; - case 0x1b: return ct->tm_mday % 10; - case 0x1f: return ct->tm_mday / 10; - case 0x23: return (ct->tm_mon+1) % 10; - case 0x27: return (ct->tm_mon+1) / 10; - case 0x2b: return ct->tm_year % 10; - case 0x2f: return ct->tm_year / 10; - - case 0x33: return ct->tm_wday; /*Hack by -=SR=- */ - case 0x37: return clock_control_d; - case 0x3b: return clock_control_e; - case 0x3f: return clock_control_f; + addr &= 0x3f; + if ((addr & 3) == 2 || (addr & 3) == 0) { + int v = 0; + if (currprefs.cpu_model == 68000 && currprefs.cpu_compatible) + v = regs.irc >> 8; + return v; + } + t = time(0); + ct = localtime (&t); + addr >>= 2; + switch (addr) { + case 0x0: return ct->tm_sec % 10; + case 0x1: return ct->tm_sec / 10; + case 0x2: return ct->tm_min % 10; + case 0x3: return ct->tm_min / 10; + case 0x4: return ct->tm_hour % 10; + case 0x5: return ct->tm_hour / 10; + case 0x6: return ct->tm_mday % 10; + case 0x7: return ct->tm_mday / 10; + case 0x8: return (ct->tm_mon + 1) % 10; + case 0x9: return (ct->tm_mon + 1) / 10; + case 0xA: return ct->tm_year % 10; + case 0xB: return ct->tm_year / 10; + case 0xC: return ct->tm_wday; + case 0xD: return clock_control_d; + case 0xE: return clock_control_e; + case 0xF: return clock_control_f; } return 0; } -void REGPARAM2 clock_lput (uaecptr addr, uae_u32 value) +static void REGPARAM2 clock_lput (uaecptr addr, uae_u32 value) { clock_wput (addr, value >> 16); clock_wput (addr + 2, value); } -void REGPARAM2 clock_wput (uaecptr addr, uae_u32 value) +static void REGPARAM2 clock_wput (uaecptr addr, uae_u32 value) { clock_bput (addr, value >> 8); clock_bput (addr + 1, value); } -void REGPARAM2 clock_bput (uaecptr addr, uae_u32 value) +static void REGPARAM2 clock_bput (uaecptr addr, uae_u32 value) { #ifdef JIT special_mem |= S_WRITE; #endif - switch (addr & 0x3f) { - case 0x37: clock_control_d = value; break; - case 0x3b: clock_control_e = value; break; - case 0x3f: clock_control_f = value; break; + addr &= 0x3f; + if ((addr & 1) != 1) + return; + addr >>= 2; + value &= 0x0f; + switch (addr) { + case 0xD: clock_control_d = value & (1|8); break; + case 0xE: clock_control_e = value; break; + case 0xF: clock_control_f = value; break; } } @@ -1179,7 +1212,7 @@ uae_u8 *save_cia (int num, int *len, uae_u8 *dstptr) save_u8 (b); t = (num ? ciabta - ciabta_passed : ciaata - ciaata_passed);/* 4 TA */ save_u16 (t); - t = (num ? ciabtb - ciabtb_passed : ciaatb - ciaatb_passed);/* 8 TB */ + t = (num ? ciabtb - ciabtb_passed : ciaatb - ciaatb_passed);/* 6 TB */ save_u16 (t); b = (num ? ciabtod : ciaatod); /* 8 TODL */ save_u8 (b); diff --git a/src/codegen_arm.cpp b/src/codegen_arm.cpp index 36d1c6df..4bf8febc 100644 --- a/src/codegen_arm.cpp +++ b/src/codegen_arm.cpp @@ -226,40 +226,38 @@ LENDFUNC(RMW,NONE,2,raw_adc_w,(RW2 d, RR2 s)) LOWFUNC(RMW,NONE,2,raw_adc_l,(RW4 d, RR4 s)) { - ADCS_rrr(d, d, s); // adcs %[d],%[d],%[s] + ADCS_rrr(d, d, s); // adcs %[d],%[d],%[s] } LENDFUNC(RMW,NONE,2,raw_adc_l,(RW4 d, RR4 s)) LOWFUNC(WRITE,NONE,2,raw_add_b,(RW1 d, RR1 s)) { - LSL_rri(REG_WORK1, s, 24); // lsl r2, %[s], #24 - LSL_rri(REG_WORK2, d, 24); // lsl r3, %[d], #24 + LSL_rri(REG_WORK2, d, 24); // lsl r3, %[d], #24 + ADDS_rrrLSLi(REG_WORK2, REG_WORK2, s, 24); // adds r3, r3, %[s], lsl #24 - ADDS_rrr(REG_WORK2, REG_WORK2, REG_WORK1); // adds r3, r3, r2 - - BIC_rri(d, d, 0xFF); // bic %[d],%[d],#0xFF - ORR_rrrLSRi(d, d, REG_WORK2, 24); // orr %[d],%[d], r3 LSR #24 + BIC_rri(d, d, 0xFF); // bic %[d],%[d],#0xFF + ORR_rrrLSRi(d, d, REG_WORK2, 24); // orr %[d],%[d], r3 LSR #24 } LENDFUNC(WRITE,NONE,2,raw_add_b,(RW1 d, RR1 s)) LOWFUNC(WRITE,NONE,2,raw_add_w,(RW2 d, RR2 s)) { - LSL_rri(REG_WORK1, s, 16); // lsl r2, %[s], #16 + LSL_rri(REG_WORK1, s, 16); // lsl r2, %[s], #16 ADDS_rrrLSLi(REG_WORK2, REG_WORK1, d, 16); // adds r3, r2, %[d], lsl #16 #if defined(ARMV6_ASSEMBLY) PKHTB_rrrASRi(d, d, REG_WORK2, 16); // pkhtb %r, %r, r3, asr #16 #else - BIC_rri(d, d, 0xff); // bic %[d],%[d],#0xff + BIC_rri(d, d, 0xff); // bic %[d],%[d],#0xff BIC_rri(d, d, 0xff00); // bic %[d],%[d],#0xff00 - ORR_rrrLSRi(d, d, REG_WORK2, 16); // orr r7, r7, r3, LSR #16 + ORR_rrrLSRi(d, d, REG_WORK2, 16); // orr r7, r7, r3, LSR #16 #endif } LENDFUNC(WRITE,NONE,2,raw_add_w,(RW2 d, RR2 s)) LOWFUNC(WRITE,NONE,2,raw_add_l,(RW4 d, RR4 s)) { - ADDS_rrr(d, d, s); // adds %[d], %[d], %[s] + ADDS_rrr(d, d, s); // adds %[d], %[d], %[s] } LENDFUNC(WRITE,NONE,2,raw_add_l,(RW4 d, RR4 s)) @@ -267,19 +265,21 @@ LOWFUNC(WRITE,NONE,2,raw_add_w_ri,(RW2 d, IMM i)) { #if defined(USE_DATA_BUFFER) long offs = data_word_offs(i); - LDR_rRI(REG_WORK1, RPC_INDEX, offs); // ldrh r2, [pc, #offs] + LDR_rRI(REG_WORK1, RPC_INDEX, offs); // ldrh r2, [pc, #offs] #else - LDRH_rRI(REG_WORK1, RPC_INDEX, 24); // ldrh r2, [pc, #24] ; + LDRH_rRI(REG_WORK1, RPC_INDEX, 24); // ldrh r2, [pc, #24] ; #endif - LSL_rri(REG_WORK2, d, 16); // lsl r3, %[d], #16 - LSL_rri(REG_WORK1, REG_WORK1, 16); // lsl r2, r2, #16 + LSL_rri(REG_WORK2, d, 16); // lsl r2, %[d], #16 + ADDS_rrrLSLi(REG_WORK2, REG_WORK2, REG_WORK1, 16); // adds r3, r3, r2, LSL #16 - ADDS_rrr(REG_WORK2, REG_WORK2, REG_WORK1); // adds r3, r3, r2 - - BIC_rri(d, d, 0xff); // bic %[d],%[d],#0xff +#if defined(ARMV6_ASSEMBLY) + PKHTB_rrrASRi(d, d, REG_WORK2, 16); // pkhtb %[d], %[d], r3, asr #16 +#else + BIC_rri(d, d, 0xff); // bic %[d],%[d],#0xff BIC_rri(d, d, 0xff00); // bic %[d],%[d],#0xff00 - ORR_rrrLSRi(d, d, REG_WORK2, 16); // orr %[d],%[d], r3, LSR #16 + ORR_rrrLSRi(d, d, REG_WORK2, 16); // orr %[d],%[d], r3, LSR #16 +#endif #if !defined(USE_DATA_BUFFER) B_i(0); // b @@ -293,11 +293,11 @@ LENDFUNC(WRITE,NONE,2,raw_add_w_ri,(RW2 d, IMM i)) LOWFUNC(WRITE,NONE,2,raw_add_b_ri,(RW1 d, IMM i)) { - LSL_rri(REG_WORK2, d, 24); // lsl r3, %[d], #24 + LSL_rri(REG_WORK2, d, 24); // lsl r3, %[d], #24 - ADDS_rri(REG_WORK2, REG_WORK2, i << 24); // adds r3, r3, #0x12000000 + ADDS_rri(REG_WORK2, REG_WORK2, i << 24); // adds r3, r3, #0x12000000 - BIC_rri(d, d, 0xFF); // bic %[d],%[d], #0xFF + BIC_rri(d, d, 0xFF); // bic %[d],%[d], #0xFF ORR_rrrLSRi(d, d, REG_WORK2, 24); // orr %[d],%[d], r3, lsr #24 } LENDFUNC(WRITE,NONE,2,raw_add_b_ri,(RW1 d, IMM i)) @@ -323,12 +323,12 @@ LENDFUNC(WRITE,NONE,2,raw_add_l_ri,(RW4 d, IMM i)) LOWFUNC(WRITE,NONE,2,raw_and_b,(RW1 d, RR1 s)) { MVN_rrLSLi(REG_WORK1, s, 24); // mvn r2, %[s], lsl #24 - MVN_rrLSRi(REG_WORK1, REG_WORK1, 24); // mvn r2, %[s], lsr #24 - AND_rrr(d, d, REG_WORK1); // and %[d], %[d], r2 + MVN_rrLSRi(REG_WORK1, REG_WORK1, 24); // mvn r2, r2, lsr #24 + AND_rrr(d, d, REG_WORK1); // and %[d], %[d], r2 LSLS_rri(REG_WORK1, d, 24); // lsls r2, %[d], #24 - MRS_CPSR(REG_WORK1); // mrs r2, CPSR + MRS_CPSR(REG_WORK1); // mrs r2, CPSR BIC_rri(REG_WORK1, REG_WORK1, ARM_CV_FLAGS); // bic r2, r2, #0x30000000 MSR_CPSR_r(REG_WORK1); // msr CPSR_fc, r2 } @@ -337,12 +337,12 @@ LENDFUNC(WRITE,NONE,2,raw_and_b,(RW1 d, RR1 s)) LOWFUNC(WRITE,NONE,2,raw_and_w,(RW2 d, RR2 s)) { MVN_rrLSLi(REG_WORK1, s, 16); // mvn r2, %[s], lsl #16 - MVN_rrLSRi(REG_WORK1, REG_WORK1, 16); // mvn r2, %[s], lsr #16 - AND_rrr(d, d, REG_WORK1); // and %[d], %[d], r2 + MVN_rrLSRi(REG_WORK1, REG_WORK1, 16); // mvn r2, r2, lsr #16 + AND_rrr(d, d, REG_WORK1); // and %[d], %[d], r2 LSLS_rri(REG_WORK1, d, 16); // lsls r2, %[d], #16 - MRS_CPSR(REG_WORK1); // mrs r2, CPSR + MRS_CPSR(REG_WORK1); // mrs r2, CPSR BIC_rri(REG_WORK1, REG_WORK1, ARM_CV_FLAGS); // bic r2, r2, #0x30000000 MSR_CPSR_r(REG_WORK1); // msr CPSR_fc, r2 } @@ -350,9 +350,9 @@ LENDFUNC(WRITE,NONE,2,raw_and_w,(RW2 d, RR2 s)) LOWFUNC(WRITE,NONE,2,raw_and_l,(RW4 d, RR4 s)) { - ANDS_rrr(d, d, s); // ands r7, r7, r6 + ANDS_rrr(d, d, s); // ands %[d], %[d], %[s] - MRS_CPSR(REG_WORK1); // mrs r2, CPSR + MRS_CPSR(REG_WORK1); // mrs r2, CPSR BIC_rri(REG_WORK1, REG_WORK1, ARM_CV_FLAGS); // bic r2, r2, #0x30000000 MSR_CPSR_r(REG_WORK1); // msr CPSR_fc, r2 } @@ -362,16 +362,16 @@ LOWFUNC(WRITE,NONE,2,raw_and_l_ri,(RW4 d, IMM i)) { #if defined(USE_DATA_BUFFER) long offs = data_long_offs(i); - LDR_rRI(REG_WORK1, RPC_INDEX, offs); // ldr r2, [pc, #offs] + LDR_rRI(REG_WORK1, RPC_INDEX, offs); // ldr r2, [pc, #offs] #else - LDR_rRI(REG_WORK1, RPC_INDEX, 16); // ldr r2, [pc, #16] ; + LDR_rRI(REG_WORK1, RPC_INDEX, 16); // ldr r2, [pc, #16] ; #endif - ANDS_rrr(d, d, REG_WORK1); // ands %[d], %[d], r2 + ANDS_rrr(d, d, REG_WORK1); // ands %[d], %[d], r2 - MRS_CPSR(REG_WORK1); // mrs r2, CPSR - BIC_rri(REG_WORK1, REG_WORK1, ARM_CV_FLAGS); // bic r2, r2, #0x30000000 - MSR_CPSR_r(REG_WORK1); // msr CPSR_fc, r2 + MRS_CPSR(REG_WORK1); // mrs r2, CPSR + BIC_rri(REG_WORK1, REG_WORK1, ARM_CV_FLAGS); // bic r2, r2, #0x30000000 + MSR_CPSR_r(REG_WORK1); // msr CPSR_fc, r2 #if !defined(USE_DATA_BUFFER) B_i(0); // b @@ -384,37 +384,37 @@ LENDFUNC(WRITE,NONE,2,raw_and_l_ri,(RW4 d, IMM i)) LOWFUNC(WRITE,NONE,2,raw_bsf_l_rr,(W4 d, RR4 s)) { - MOV_rr(REG_WORK1, s); // mov r2,%[s] - RSB_rri(REG_WORK2, REG_WORK1, 0); // rsb r3,r2,#0 - AND_rrr(REG_WORK1, REG_WORK1, REG_WORK2); // and r2,r2,r3 - CLZ_rr(REG_WORK2, REG_WORK1); // clz r3,r2 - MOV_ri(d, 32); // mov %[d],#32 - SUB_rrr(d, d, REG_WORK2); // sub %[d],%[d],r3 + MOV_rr(REG_WORK1, s); // mov r2,%[s] + RSB_rri(REG_WORK2, REG_WORK1, 0); // rsb r3,r2,#0 + AND_rrr(REG_WORK1, REG_WORK1, REG_WORK2); // and r2,r2,r3 + CLZ_rr(REG_WORK2, REG_WORK1); // clz r3,r2 + MOV_ri(d, 32); // mov %[d],#32 + SUB_rrr(d, d, REG_WORK2); // sub %[d],%[d],r3 - MRS_CPSR(REG_WORK2); // mrs r3,cpsr - TEQ_ri(d, 0); // teq %[d],#0 - CC_SUBS_rri(NATIVE_CC_NE, d,d,1); // sub %[d],%[d],#1 + MRS_CPSR(REG_WORK2); // mrs r3,cpsr + TEQ_ri(d, 0); // teq %[d],#0 + CC_SUBS_rri(NATIVE_CC_NE, d,d,1); // sub %[d],%[d],#1 CC_BIC_rri(NATIVE_CC_NE, REG_WORK2, REG_WORK2, ARM_Z_FLAG); // bic r3,r3,#0x40000000 CC_ORR_rri(NATIVE_CC_EQ, REG_WORK2, REG_WORK2, ARM_Z_FLAG); // orr r3,r3,#0x40000000 - MSR_CPSR_r(REG_WORK2); // msr cpsr,r3 + MSR_CPSR_r(REG_WORK2); // msr cpsr,r3 } LENDFUNC(WRITE,NONE,2,raw_bsf_l_rr,(W4 d, RR4 s)) LOWFUNC(WRITE,NONE,1,raw_bswap_16,(RW2 r)) { #if defined(ARMV6_ASSEMBLY) - REV_rr(REG_WORK1, r); // rev r2, %r - PKHTB_rrrASRi(r, r, REG_WORK1, 16); // pkhtb %r, %r, r2, asr #16 + REV_rr(REG_WORK1, r); // rev r2, %r + PKHTB_rrrASRi(r, r, REG_WORK1, 16); // pkhtb %r, %r, r2, asr #16 #else - MOV_rr(REG_WORK1, r); // mov r2, r6 - BIC_rri(REG_WORK1, REG_WORK1, 0xff0000); // bic r2, r2, #0xff0000 + MOV_rr(REG_WORK1, r); // mov r2, r6 + BIC_rri(REG_WORK1, REG_WORK1, 0xff0000); // bic r2, r2, #0xff0000 BIC_rri(REG_WORK1, REG_WORK1, 0xff000000); // bic r2, r2, #0xff000000 - EOR_rrr(r, r, REG_WORK1); // eor r6, r6, r2 + EOR_rrr(r, r, REG_WORK1); // eor r6, r6, r2 - ORR_rrrLSRi(r, r, REG_WORK1, 8); // orr r6, r6, r2, lsr #8 - BIC_rri(REG_WORK1, REG_WORK1, 0xff00); // bic r2, r2, #0xff00 - ORR_rrrLSLi(r,r,REG_WORK1, 8); // orr r6, r6, r2, lsl #8 + ORR_rrrLSRi(r, r, REG_WORK1, 8); // orr r6, r6, r2, lsr #8 + BIC_rri(REG_WORK1, REG_WORK1, 0xff00); // bic r2, r2, #0xff00 + ORR_rrrLSLi(r,r,REG_WORK1, 8); // orr r6, r6, r2, lsl #8 #endif } LENDFUNC(WRITE,NONE,1,raw_bswap_16,(RW2 r)) @@ -426,7 +426,7 @@ LOWFUNC(NONE,NONE,1,raw_bswap_32,(RW4 r)) #else EOR_rrrRORi(REG_WORK1, r, r, 16); // eor r2, r6, r6, ror #16 BIC_rri(REG_WORK1, REG_WORK1, 0xff0000); // bic r2, r2, #0xff0000 - ROR_rri(r, r, 8); // ror r6, r6, #8 + ROR_rri(r, r, 8); // ror r6, r6, #8 EOR_rrrLSRi(r, r, REG_WORK1, 8); // eor r6, r6, r2, lsr #8 #endif } @@ -436,7 +436,7 @@ LOWFUNC(WRITE,NONE,2,raw_bt_l_ri,(RR4 r, IMM i)) { int imm = (1 << (i & 0x1f)); - MRS_CPSR(REG_WORK2); // mrs r3, CPSR + MRS_CPSR(REG_WORK2); // mrs r3, CPSR TST_ri(r, imm); // tst r6, #0x1000000 CC_BIC_rri(NATIVE_CC_EQ, REG_WORK2, REG_WORK2, ARM_C_FLAG); // bic r3, r3, #0x20000000 CC_ORR_rri(NATIVE_CC_NE, REG_WORK2, REG_WORK2, ARM_C_FLAG); // orr r3, r3, #0x20000000 @@ -459,7 +459,7 @@ LENDFUNC(WRITE,NONE,2,raw_bt_l_rr,(RR4 r, RR4 b)) LOWFUNC(WRITE,NONE,2,raw_btc_l_rr,(RW4 r, RR4 b)) { - MOV_ri(REG_WORK1, 1); // mov r2, #1 + MOV_ri(REG_WORK1, 1); // mov r2, #1 AND_rri(REG_WORK2, b, 0x1f); // and r3, r7, #0x1f LSL_rrr(REG_WORK1, REG_WORK1, REG_WORK2); // lsl r2, r2, r3 @@ -529,13 +529,9 @@ LENDFUNC(READ,NONE,3,raw_cmov_l_rr,(RW4 d, RR4 s, IMM cc)) LOWFUNC(WRITE,NONE,2,raw_cmp_b,(RR1 d, RR1 s)) { -#if defined(ARMV6_ASSEMBLY) - SXTB_rr(REG_WORK1, d); // sxtb r2,%[d] - SXTB_rr(REG_WORK2, s); // sxtb r3,%[s] -#else LSL_rri(REG_WORK1, d, 24); // lsl r2,r6,#24 LSL_rri(REG_WORK2, s, 24); // lsl r3,r7,#24 -#endif + CMP_rr(REG_WORK1, REG_WORK2); // cmp r2, r3 MRS_CPSR(REG_WORK1); // mrs r2, CPSR @@ -546,13 +542,8 @@ LENDFUNC(WRITE,NONE,2,raw_cmp_b,(RR1 d, RR1 s)) LOWFUNC(WRITE,NONE,2,raw_cmp_w,(RR2 d, RR2 s)) { -#if defined(ARMV6_ASSEMBLY) - SXTH_rr(REG_WORK1, d); // sxtb r2,%[d] - SXTH_rr(REG_WORK2, s); // sxtb r3,%[s] -#else LSL_rri(REG_WORK1, d, 16); // lsl r6, r1, #16 LSL_rri(REG_WORK2, s, 16); // lsl r7, r2, #16 -#endif CMP_rr(REG_WORK1, REG_WORK2); // cmp r7, r6, asr #16 @@ -680,8 +671,12 @@ LOWFUNC(NONE,READ,3,raw_mov_b_brR,(W1 d, RR4 s, IMM offset)) LDRB_rRR(REG_WORK1, REG_WORK1, s); // ldrb r2, [r2, r6] +#if defined(ARMV6_ASSEMBLY) + BFI_rrii(d, REG_WORK1, 0, 7); // bfi r7, r2, 0, 7 +#else BIC_rri(d, d, 0xff); // bic r7, r7, #0xff ORR_rrr(d, d, REG_WORK1); // orr r7, r7, r2 +#endif #if !defined(USE_DATA_BUFFER) B_i(0); // b @@ -698,14 +693,18 @@ LOWFUNC(NONE,READ,3,raw_mov_b_brR24,(W1 d, RR4 s, IMM offset)) long offs = data_long_offs(offset); LDR_rRI(REG_WORK1, RPC_INDEX, offs); // ldr r2, [pc, #offs] #else - LDR_rRI(REG_WORK1, RPC_INDEX, 12); // ldr r2, [pc, #12] ; + LDR_rRI(REG_WORK1, RPC_INDEX, 12); // ldr r2, [pc, #12] ; #endif BIC_rri(REG_WORK2, s, 0xff000000); // bic r3, r6, 0xff000000 LDRB_rRR(REG_WORK1, REG_WORK1, REG_WORK2); // ldrb r2, [r2, r3] +#if defined(ARMV6_ASSEMBLY) + BFI_rrii(d, REG_WORK1, 0, 7); // bfi r7, r2, 0, 7 +#else BIC_rri(d, d, 0xff); // bic r7, r7, #0xff ORR_rrr(d, d, REG_WORK1); // orr r7, r7, r2 +#endif #if !defined(USE_DATA_BUFFER) B_i(0); // b @@ -721,10 +720,10 @@ LOWFUNC(NONE,WRITE,3,raw_mov_b_bRr,(RR4 d, RR1 s, IMM offset)) #if defined(USE_DATA_BUFFER) long offs = data_long_offs(offset); LDR_rRI(REG_WORK1, RPC_INDEX, offs); // ldr r2,[pc, #offs] - STRB_rRR(s, d, REG_WORK1); // strb r6,[r7, r2] + STRB_rRR(s, d, REG_WORK1); // strb r6,[r7, r2] #else - LDR_rRI(REG_WORK1, RPC_INDEX, 4); // ldr r2,[pc,#4] - STRB_rRR(s, d, REG_WORK1); // strb r6,[r7, r2] + LDR_rRI(REG_WORK1, RPC_INDEX, 4); // ldr r2,[pc,#4] + STRB_rRR(s, d, REG_WORK1); // strb r6,[r7, r2] B_i(0); // b //: @@ -738,7 +737,7 @@ LOWFUNC(NONE,WRITE,3,raw_mov_b_bRr24,(RR4 d, RR1 s, IMM offset)) { #if defined(USE_DATA_BUFFER) long offs = data_long_offs(offset); - LDR_rRI(REG_WORK1, RPC_INDEX, offs); // ldr r2,[pc, #offs] + LDR_rRI(REG_WORK1, RPC_INDEX, offs); // ldr r2,[pc, #offs] BIC_rri(REG_WORK2, d, 0xff000000); // bic r3, r7, 0xff000000 STRB_rRR(s, REG_WORK2, REG_WORK1); // strb r6,[r3, r2] @@ -759,13 +758,13 @@ LOWFUNC(NONE,WRITE,2,raw_mov_b_mi,(MEMW d, IMM s)) { #if defined(USE_DATA_BUFFER) long offs = data_long_offs(d); - LDR_rRI(REG_WORK1, RPC_INDEX, offs); // ldr r2, [pc, #offs] ; + LDR_rRI(REG_WORK1, RPC_INDEX, offs); // ldr r2, [pc, #offs] ; #else - LDR_rRI(REG_WORK1, RPC_INDEX, 8); // ldr r2, [pc, #8] ; + LDR_rRI(REG_WORK1, RPC_INDEX, 8); // ldr r2, [pc, #8] ; #endif - MOV_ri(REG_WORK2, s & 0xFF); // mov r3, #0x34 - STRB_rR(REG_WORK2, REG_WORK1); // strb r3, [r2] + MOV_ri(REG_WORK2, s & 0xFF); // mov r3, #0x34 + STRB_rR(REG_WORK2, REG_WORK1); // strb r3, [r2] #if !defined(USE_DATA_BUFFER) B_i(0); // b @@ -810,9 +809,14 @@ LOWFUNC(NONE,READ,2,raw_mov_b_rm,(W1 d, IMM s)) LDR_rRI(REG_WORK1, RPC_INDEX, 12); // ldr r2, [pc, #12] ; #endif - LDRB_rR(REG_WORK2, REG_WORK1); // ldrb r2, [r2] - BIC_rri(d, d, 0xff); // bic r7, r7, #0xff - ORR_rrr(d, REG_WORK2, d); // orr r7, r2, r7 + LDRB_rR(REG_WORK2, REG_WORK1); // ldrb r3, [r2] + +#if defined(ARMV6_ASSEMBLY) + BFI_rrii(d, REG_WORK2, 0, 7); // bfi r7, r3, 0, 7 +#else + BIC_rri(d, d, 0xff); // bic r7, r7, #0xff + ORR_rrr(d, REG_WORK2, d); // orr r7, r3, r7 +#endif #if !defined(USE_DATA_BUFFER) B_i(0); // b @@ -825,9 +829,13 @@ LENDFUNC(NONE,READ,2,raw_mov_b_rm,(W1 d, IMM s)) LOWFUNC(NONE,NONE,2,raw_mov_b_rr,(W1 d, RR1 s)) { - AND_rri(REG_WORK1, s, 0xff); // and r2,r2, #0xff +#if defined(ARMV6_ASSEMBLY) + BFI_rrii(d, s, 0, 7); // bfi %[d], %[s], 0, 7 +#else + AND_rri(REG_WORK1, s, 0xff); // and r2,r2, #0xff BIC_rri(d, d, 0x0ff); // bic %[d], %[d], #0xff ORR_rrr(d, d, REG_WORK1); // orr %[d], %[d], r2 +#endif } LENDFUNC(NONE,NONE,2,raw_mov_b_rr,(W1 d, RR1 s)) @@ -838,8 +846,8 @@ LOWFUNC(NONE,READ,3,raw_mov_l_brR,(W4 d, RR4 s, IMM offset)) LDR_rRI(REG_WORK1, RPC_INDEX, offs); // ldr r2, [pc, #offs] LDR_rRR(d, REG_WORK1, s); // ldr r7, [r2, r6] #else - LDR_rRI(REG_WORK1, RPC_INDEX, 4); // ldr r2, [pc, #4] ; - LDR_rRR(d, REG_WORK1, s); // ldr r7, [r2, r6] + LDR_rRI(REG_WORK1, RPC_INDEX, 4); // ldr r2, [pc, #4] ; + LDR_rRR(d, REG_WORK1, s); // ldr r7, [r2, r6] B_i(0); // b emit_long(offset); //: @@ -874,8 +882,8 @@ LOWFUNC(NONE,WRITE,3,raw_mov_l_bRr,(RR4 d, RR4 s, IMM offset)) LDR_rRI(REG_WORK1, RPC_INDEX, offs); // ldr r2,[pc, #offs] STR_rRR(s, d, REG_WORK1); // str R6,[R7, r2] #else - LDR_rRI(REG_WORK1, RPC_INDEX, 4); // ldr r2,[pc,#4] ; - STR_rRR(s, d, REG_WORK1); // str R6,[R7, r2] + LDR_rRI(REG_WORK1, RPC_INDEX, 4); // ldr r2,[pc,#4] ; + STR_rRR(s, d, REG_WORK1); // str R6,[R7, r2] B_i(0); // b //: @@ -918,11 +926,11 @@ LOWFUNC(NONE,WRITE,2,raw_mov_l_mi,(MEMW d, IMM s)) offs = data_long_offs(s); LDR_rRI(REG_WORK2, RPC_INDEX, offs); // ldr r3, [pc, #offs] ; s - STR_rR(REG_WORK2, REG_WORK1); // str r3, [r2] + STR_rR(REG_WORK2, REG_WORK1); // str r3, [r2] #else - LDR_rRI(REG_WORK1, RPC_INDEX, 8); // ldr r2, [pc, #8] ; - LDR_rRI(REG_WORK2, RPC_INDEX, 8); // ldr r3, [pc, #8] ; - STR_rR(REG_WORK2, REG_WORK1); // str r3, [r2] + LDR_rRI(REG_WORK1, RPC_INDEX, 8); // ldr r2, [pc, #8] ; + LDR_rRI(REG_WORK2, RPC_INDEX, 8); // ldr r3, [pc, #8] ; + STR_rR(REG_WORK2, REG_WORK1); // str r3, [r2] B_i(1); // b emit_long(d); //: @@ -992,10 +1000,10 @@ LOWFUNC(NONE,WRITE,3,raw_mov_w_bRr,(RR4 d, RR2 s, IMM offset)) #if defined(USE_DATA_BUFFER) long offs = data_long_offs(offset); LDR_rRI(REG_WORK1, RPC_INDEX, offs); // ldr r2,[pc, #offs] - STRH_rRR(s, d, REG_WORK1); // strh r6,[r7, r2] + STRH_rRR(s, d, REG_WORK1); // strh r6,[r7, r2] #else - LDR_rRI(REG_WORK1, RPC_INDEX, 4); // ldr r2,[pc,#4] - STRH_rRR(s, d, REG_WORK1); // strh r6,[r7, r2] + LDR_rRI(REG_WORK1, RPC_INDEX, 4); // ldr r2,[pc,#4] + STRH_rRR(s, d, REG_WORK1); // strh r6,[r7, r2] B_i(0); // b //: @@ -1010,12 +1018,12 @@ LOWFUNC(NONE,WRITE,3,raw_mov_w_bRr24,(RR4 d, RR2 s, IMM offset)) #if defined(USE_DATA_BUFFER) long offs = data_long_offs(offset); LDR_rRI(REG_WORK1, RPC_INDEX, offs); // ldr r2,[pc, #offs] - BIC_rri(REG_WORK2, d, 0xff000000); // bic r3, r7, 0xff000000 - STRH_rRR(s, REG_WORK2, REG_WORK1); // strh r6,[r3, r2] + BIC_rri(REG_WORK2, d, 0xff000000); // bic r3, r7, 0xff000000 + STRH_rRR(s, REG_WORK2, REG_WORK1); // strh r6,[r3, r2] #else - LDR_rRI(REG_WORK1, RPC_INDEX, 4); // ldr r2,[pc,#4] - BIC_rri(REG_WORK2, d, 0xff000000); // bic r3, r7, 0xff000000 - STRH_rRR(s, REG_WORK2, REG_WORK1); // strh r6,[r3, r2] + LDR_rRI(REG_WORK1, RPC_INDEX, 4); // ldr r2,[pc,#4] + BIC_rri(REG_WORK2, d, 0xff000000); // bic r3, r7, 0xff000000 + STRH_rRR(s, REG_WORK2, REG_WORK1); // strh r6,[r3, r2] B_i(0); // b //: @@ -1052,9 +1060,13 @@ LOWFUNC(NONE,NONE,2,raw_mov_w_ri,(W2 d, IMM s)) LDRH_rRI(REG_WORK2, RPC_INDEX, 12); // ldrh r3, [pc, #12] ; #endif +#if defined(ARMV6_ASSEMBLY) + PKHBT_rrr(d, REG_WORK2, d); // pkhbt %[d], r3, %[d] +#else BIC_rri(REG_WORK1, d, 0xff); // bic r2, r7, #0xff BIC_rri(REG_WORK1, REG_WORK1, 0xff00); // bic r2, r2, #0xff00 ORR_rrr(d, REG_WORK2, REG_WORK1); // orr r7, r3, r2 +#endif #if !defined(USE_DATA_BUFFER) B_i(0); // b @@ -1146,12 +1158,16 @@ LOWFUNC(NONE,READ,2,raw_mov_w_rm,(W2 d, IMM s)) long offs = data_long_offs(s); LDR_rRI(REG_WORK1, RPC_INDEX, offs); // ldr r2, [pc, #offs] #else - LDR_rRI(REG_WORK1, RPC_INDEX, 12); // ldr r2, [pc, #12] ; + LDR_rRI(REG_WORK1, RPC_INDEX, 12); // ldr r2, [pc, #12] ; #endif - LDRH_rR(REG_WORK1, REG_WORK1); // ldrh r2, [r2] - LSR_rri(d, d, 16); // lsr r7, r7, #16 - ORR_rrrLSLi(d, REG_WORK1, d, 16); // orr r7, r2, r7, lsl #16 + LDRH_rR(REG_WORK1, REG_WORK1); // ldrh r2, [r2] +#if defined(ARMV6_ASSEMBLY) + PKHBT_rrr(d, REG_WORK1, d); // pkhbt %[d], r2, %[d] +#else + LSR_rri(d, d, 16); // lsr r7, r7, #16 + ORR_rrrLSLi(d, REG_WORK1, d, 16); // orr r7, r2, r7, lsl #16 +#endif #if !defined(USE_DATA_BUFFER) B_i(0); // b @@ -1164,9 +1180,13 @@ LENDFUNC(NONE,READ,2,raw_mov_w_rm,(W2 d, IMM s)) LOWFUNC(NONE,NONE,2,raw_mov_w_rr,(W2 d, RR2 s)) { +#if defined(ARMV6_ASSEMBLY) + PKHBT_rrr(d, s, d); // pkhbt %[d], %[s], %[d] +#else LSL_rri(REG_WORK1, s, 16); // lsl r2, r6, #16 - ORR_rrrLSRi(d, REG_WORK1, d, 16); // orr r7, r2, r7, lsr #16 - ROR_rri(d, d, 16); // ror r7, r7, #16 + ORR_rrrLSRi(d, REG_WORK1, d, 16); // orr r7, r2, r7, lsr #16 + ROR_rri(d, d, 16); // ror r7, r7, #16 +#endif } LENDFUNC(NONE,NONE,2,raw_mov_w_rr,(W2 d, RR2 s)) @@ -1179,9 +1199,13 @@ LOWFUNC(NONE,READ,3,raw_mov_w_rR,(W2 d, RR4 s, IMM offset)) else LDRH_rRi(REG_WORK1, s, -offset); // ldrh r2, [r6, #-12] - BIC_rri(d, d, 0xff); // bic r7, r7, #0xff +#if defined(ARMV6_ASSEMBLY) + PKHBT_rrr(d, REG_WORK1, d); // pkhbt %[d], r2, %[d] +#else + BIC_rri(d, d, 0xff); // bic r7, r7, #0xff BIC_rri(d, d, 0xff00); // bic r7, r7, #0xff00 ORR_rrr(d, d, REG_WORK1); // orr r7, r7, r2 +#endif } LENDFUNC(NONE,READ,3,raw_mov_w_rR,(W2 d, RR4 s, IMM offset)) @@ -1302,9 +1326,9 @@ LENDFUNC(NONE,NONE,2,raw_mul_64_32,(RW4 d, RW4 s)) LOWFUNC(WRITE,NONE,2,raw_or_b,(RW1 d, RR1 s)) { - AND_rri(REG_WORK1, s, 0xFF); // and r2, %[s], 0xFF - ORR_rrr(d, d, REG_WORK1); // orr %[d], %[d], r2 - LSLS_rri(REG_WORK1, d, 24); // lsls r2, %[d], #24 + AND_rri(REG_WORK1, s, 0xFF); // and r2, %[s], 0xFF + ORR_rrr(d, d, REG_WORK1); // orr %[d], %[d], r2 + LSLS_rri(REG_WORK1, d, 24); // lsls r2, %[d], #24 MRS_CPSR(REG_WORK1); // mrs r2, CPSR BIC_rri(REG_WORK1, REG_WORK1, ARM_CV_FLAGS); // bic r2, r2, #0x30000000 @@ -1317,11 +1341,11 @@ LOWFUNC(WRITE,NONE,2,raw_or_w,(RW2 d, RR2 s)) #if defined(ARMV6_ASSEMBLY) UXTH_rr(REG_WORK1, s); // UXTH r2, %[s] #else - BIC_rri(REG_WORK1, s, 0xff000000); // bic r2, %[s], #0xff000000 - BIC_rri(REG_WORK1, REG_WORK1, 0x00ff0000); // bic r2, r2, #0x00ff0000 + BIC_rri(REG_WORK1, s, 0xff000000); // bic r2, %[s], #0xff000000 + BIC_rri(REG_WORK1, REG_WORK1, 0x00ff0000); // bic r2, r2, #0x00ff0000 #endif - ORR_rrr(d, d, REG_WORK1); // orr %[d], %[d], r2 - LSLS_rri(REG_WORK1, d, 16); // lsls r2, %[d], #16 + ORR_rrr(d, d, REG_WORK1); // orr %[d], %[d], r2 + LSLS_rri(REG_WORK1, d, 16); // lsls r2, %[d], #16 MRS_CPSR(REG_WORK1); // mrs r2, CPSR BIC_rri(REG_WORK1, REG_WORK1, ARM_CV_FLAGS); // bic r2, r2, #0x30000000 @@ -1368,11 +1392,11 @@ LOWFUNC(WRITE,NONE,2,raw_rol_b_ri,(RW1 r, IMM i)) // TODO: Check if the Bittest is necessary. compemu.c seems to do it itself, but meanwhile make sure, that carry is set correctly int imm = 32 - (i & 0x1f); - MOV_rrLSLi(REG_WORK1, r, 24); // mov r2,r7,lsl #24 + MOV_rrLSLi(REG_WORK1, r, 24); // mov r2,r7,lsl #24 ORR_rrrLSRi(REG_WORK1, REG_WORK1, REG_WORK1, 16); // orr r2,r2,r2,lsr #16 ORR_rrrLSRi(REG_WORK1, REG_WORK1, REG_WORK1, 8); // orr r2,r2,r2,lsr #8 - RORS_rri(REG_WORK1, REG_WORK1, imm); // rors r2,r2,#(32 - (i & 0x1f)) + RORS_rri(REG_WORK1, REG_WORK1, imm); // rors r2,r2,#(32 - (i & 0x1f)) MRS_CPSR(REG_WORK2); // mrs r3,cpsr TST_ri(REG_WORK1, 1); // tst r2,#1 @@ -1380,9 +1404,13 @@ LOWFUNC(WRITE,NONE,2,raw_rol_b_ri,(RW1 r, IMM i)) CC_BIC_rri(NATIVE_CC_EQ, REG_WORK2, REG_WORK2, ARM_C_FLAG); // bic r3,r3,#0x20000000 MSR_CPSR_r(REG_WORK2); +#if defined(ARMV6_ASSEMBLY) + BFI_rrii(r, REG_WORK1, 0, 7); // bfi %[r], r2, 0, 7 +#else AND_rri(REG_WORK1, REG_WORK1, 0xff); // and r2,r2,#0xff BIC_rri(r, r, 0xff); // bic r7,r7,#0xff ORR_rrr(r, r, REG_WORK1); // orr r7,r7,r2 +#endif } LENDFUNC(WRITE,NONE,2,raw_rol_b_ri,(RW1 r, IMM i)) @@ -1390,15 +1418,14 @@ LOWFUNC(WRITE,NONE,2,raw_rol_b_rr,(RW1 d, RR1 r)) { // TODO: Check if the Bittest is necessary. compemu.c seems to do it itself, but meanwhile make sure, that carry is set correctly - MOV_ri(REG_WORK2, 32); // mov r3,#32 - AND_rri(REG_WORK1, r, 0x1f); // and r2,r6,#0x1f - SUB_rrr(REG_WORK2, REG_WORK2, REG_WORK1); // sub r3,r3,r2 - - MOV_rrLSLi(REG_WORK1, d, 24); // mov r2,r7,lsl #24 + AND_rri(REG_WORK1, r, 0x1f); // and r2,r6,#0x1f + RSB_rri(REG_WORK2, REG_WORK1, 32); // rsb r3, r2, #32 + + MOV_rrLSLi(REG_WORK1, d, 24); // mov r2,r7,lsl #24 ORR_rrrLSRi(REG_WORK1, REG_WORK1, REG_WORK1, 16); // orr r2,r2,r2,lsr #16 ORR_rrrLSRi(REG_WORK1, REG_WORK1, REG_WORK1, 8); // orr r2,r2,r2,lsr #8 - RORS_rrr(REG_WORK1, REG_WORK1, REG_WORK2); // rors r2,r2,r3 + RORS_rrr(REG_WORK1, REG_WORK1, REG_WORK2); // rors r2,r2,r3 MRS_CPSR(REG_WORK2); // mrs r3,cpsr TST_ri(REG_WORK1, 1); // tst r2,#1 @@ -1406,10 +1433,13 @@ LOWFUNC(WRITE,NONE,2,raw_rol_b_rr,(RW1 d, RR1 r)) CC_BIC_rri(NATIVE_CC_EQ, REG_WORK2, REG_WORK2, ARM_C_FLAG); // bic r3,r3,#0x20000000 MSR_CPSR_r(REG_WORK2); - AND_rri(REG_WORK1, REG_WORK1, 0xff); // and r2,r2,#0xff - BIC_rri(d, d, 0xff); // bic r7,r7,#0xff - +#if defined(ARMV6_ASSEMBLY) + BFI_rrii(d, REG_WORK1, 0, 7); // bfi %[d], r2, 0, 7 +#else + AND_rri(REG_WORK1, REG_WORK1, 0xff); // and r2,r2,#0xff + BIC_rri(d, d, 0xff); // bic r7,r7,#0xff ORR_rrr(d, d, REG_WORK1); // orr r7,r7,r2 +#endif } LENDFUNC(WRITE,NONE,2,raw_rol_b_rr,(RW1 d, RR1 r)) @@ -1429,10 +1459,13 @@ LOWFUNC(WRITE,NONE,2,raw_rol_w_ri,(RW2 r, IMM i)) CC_BIC_rri(NATIVE_CC_EQ, REG_WORK2, REG_WORK2, ARM_C_FLAG); // bic r3,r3,#0x20000000 MSR_CPSR_r(REG_WORK2); +#if defined(ARMV6_ASSEMBLY) + PKHTB_rrrASRi(r, r, REG_WORK1, 16); // pkhtb %[r], %[r], r2, asr #16 +#else BIC_rri(r, r, 0xff00); // bic r2,r2,#0xff00 - BIC_rri(r, r, 0xff); // bic r2,r2,#0xff - - ORR_rrrLSRi(r, r, REG_WORK1, 16); // orr r7,r7,r2,lsr #16 + BIC_rri(r, r, 0xff); // bic r2,r2,#0xff + ORR_rrrLSRi(r, r, REG_WORK1, 16); // orr r7,r7,r2,lsr #16 +#endif } LENDFUNC(WRITE,NONE,2,raw_rol_w_ri,(RW2 r, IMM i)) @@ -1440,10 +1473,9 @@ LOWFUNC(WRITE,NONE,2,raw_rol_w_rr,(RW2 d, RR1 r)) { // TODO: Check if the Bittest is necessary. compemu.c seems to do it itself, but meanwhile make sure, that carry is set correctly - MOV_ri(REG_WORK2, 32); // mov r3,#32 AND_rri(REG_WORK1, r, 0x1f); // and r2,r6,#0x1f - SUB_rrr(REG_WORK2, REG_WORK2, REG_WORK1); // sub r3,r3,r2 - + RSB_rri(REG_WORK2, REG_WORK1, 32); // rsb r3, r3, #32 + MOV_rrLSLi(REG_WORK1, d, 16); // mov r2,r7,lsl #16 ORR_rrrLSRi(REG_WORK1, REG_WORK1, REG_WORK1, 16); // orr r2,r2,r2,lsr #16 @@ -1455,10 +1487,13 @@ LOWFUNC(WRITE,NONE,2,raw_rol_w_rr,(RW2 d, RR1 r)) CC_BIC_rri(NATIVE_CC_EQ, REG_WORK2, REG_WORK2, ARM_C_FLAG); // bic r3,r3,#0x20000000 MSR_CPSR_r(REG_WORK2); +#if defined(ARMV6_ASSEMBLY) + PKHTB_rrrASRi(d, d, REG_WORK1, 16); // pkhtb %[d], %[d], r2, asr #16 +#else BIC_rri(d, d, 0xff00); // bic r2,r2,#0xff00 BIC_rri(d, d, 0xff); // bic r2,r2,#0xff - ORR_rrrLSRi(d, d, REG_WORK1, 16); // orr r2,r2,r7,lsr #16 +#endif } LENDFUNC(WRITE,NONE,2,raw_rol_w_rr,(RW2 d, RR1 r)) @@ -1487,10 +1522,9 @@ LOWFUNC(WRITE,NONE,2,raw_rol_l_rr,(RW4 d, RR1 r)) { // TODO: Check if the Bittest is necessary. compemu.c seems to do it itself, but meanwhile make sure, that carry is set correctly - MOV_ri(REG_WORK1, 32); // mov r2,#32 AND_rri(REG_WORK2, r, 0x1f); // and r3,r6,#0x1f - SUB_rrr(REG_WORK1, REG_WORK1, REG_WORK2); // sub r2,r2,r3 - + RSB_rri(REG_WORK1, REG_WORK2, 32); // rsb r2, r3, #32 + RORS_rrr(d, d, REG_WORK1); // rors r7,r7,r2 MRS_CPSR(REG_WORK2); // mrs r3,cpsr @@ -1515,9 +1549,13 @@ LOWFUNC(WRITE,NONE,2,raw_ror_b_ri,(RW1 r, IMM i)) RORS_rri(REG_WORK1, REG_WORK1, i & 0x1f); // rors r2,r2,#12 +#if defined(ARMV6_ASSEMBLY) + BFI_rrii(r, REG_WORK1, 0, 7); // bfi %[r],r2, 0, 7 +#else AND_rri(REG_WORK1, REG_WORK1, 0xff); // and r2,r2,#0xff BIC_rri(r, r, 0xff); // bic r7,r7,#0xff ORR_rrr(r, r, REG_WORK1); // orr r7,r7,r2 +#endif } LENDFUNC(WRITE,NONE,2,raw_ror_b_ri,(RW1 r, IMM i)) @@ -1529,9 +1567,13 @@ LOWFUNC(WRITE,NONE,2,raw_ror_b_rr,(RW1 d, RR1 r)) RORS_rrr(REG_WORK1, REG_WORK1, r); // rors r2,r2,r6 +#if defined(ARMV6_ASSEMBLY) + BFI_rrii(d, REG_WORK1, 0, 7); // bfi %[d], r2, 0, 7 +#else AND_rri(REG_WORK1, REG_WORK1, 0xff); // and r2,r2,#0xff BIC_rri(d, d, 0xff); // bic r7,r7,#0xff ORR_rrr(d, d, REG_WORK1); // orr r7,r7,r2 +#endif } LENDFUNC(WRITE,NONE,2,raw_ror_b_rr,(RW1 d, RR1 r)) @@ -1542,10 +1584,13 @@ LOWFUNC(WRITE,NONE,2,raw_ror_w_ri,(RW2 r, IMM i)) RORS_rri(REG_WORK1, REG_WORK1, i & 0x1f); // RORS r2,r2,#12 +#if defined(ARMV6_ASSEMBLY) + PKHTB_rrrASRi(r, r, REG_WORK1, 16); // pkhtb %[r], %[r], r2, asr #16 +#else BIC_rri(r, r, 0xff00); // bic r7,r7,#0xff00 - BIC_rri(r, r, 0xff); // bic r7,r7,#0xff - - ORR_rrrLSRi(r, r, REG_WORK1, 16); // orr r7,r7,r2,lsr #16 + BIC_rri(r, r, 0xff); // bic r7,r7,#0xff + ORR_rrrLSRi(r, r, REG_WORK1, 16); // orr r7,r7,r2,lsr #16 +#endif } LENDFUNC(WRITE,NONE,2,raw_ror_w_ri,(RW2 r, IMM i)) @@ -1556,10 +1601,13 @@ LOWFUNC(WRITE,NONE,2,raw_ror_w_rr,(RW2 d, RR1 r)) RORS_rrr(REG_WORK1, REG_WORK1, r); // RORS r2,r2,r6 +#if defined(ARMV6_ASSEMBLY) + PKHTB_rrrASRi(d, d, REG_WORK1, 16); // pkhtb %[d], %[d], r2, asr #16 +#else BIC_rri(d, d, 0xff00); // bic r7,r7,#0xff00 - BIC_rri(d, d, 0xff); // bic r7,r7,#0xff - - ORR_rrrLSRi(d, d, REG_WORK1, 16); // orr r7,r7,r2,lsr #16 + BIC_rri(d, d, 0xff); // bic r7,r7,#0xff + ORR_rrrLSRi(d, d, REG_WORK1, 16); // orr r7,r7,r2,lsr #16 +#endif } LENDFUNC(WRITE,NONE,2,raw_ror_w_rr,(RW2 d, RR1 r)) @@ -1606,9 +1654,13 @@ LOWFUNC(RMW,NONE,2,raw_sbb_w,(RW2 d, RR2 s)) LSL_rri(REG_WORK1, s, 16); // lsl r2, r6, #16 SBCS_rrr(REG_WORK2, REG_WORK2, REG_WORK1); // subs r3, r3, r2 +#if defined(ARMV6_ASSEMBLY) + PKHTB_rrrASRi(d, d, REG_WORK2, 16); // pkhtb %[d], %[d], r2, asr #16 +#else BIC_rri(d,d, 0xff); BIC_rri(d,d, 0xff00); ORR_rrrLSRi(d, d, REG_WORK2, 16); // orr r7, r7, r3 +#endif MRS_CPSR(REG_WORK1); // mrs r2, CPSR EOR_rri(REG_WORK1, REG_WORK1, ARM_C_FLAG); // eor r2, r2, #0x20000000 @@ -1757,9 +1809,13 @@ LOWFUNC(WRITE,NONE,2,raw_shra_b_ri,(RW1 r, IMM i)) ASRS_rri(REG_WORK1, REG_WORK1, i & 0x1f); // asrs r2,r2,#12 +#if defined(ARMV6_ASSEMBLY) + BFI_rrii(r, REG_WORK1, 0, 7); // bfi %[r], r2, 0, 7 +#else AND_rri(REG_WORK1, REG_WORK1, 0xff); // and r2,r2,#0xff BIC_rri(r,r, 0xff); // bic r7,r7,#0xff ORR_rrr(r,r,REG_WORK1); // orr r7,r7,r2 +#endif } LENDFUNC(WRITE,NONE,2,raw_shra_b_ri,(RW1 r, IMM i)) @@ -1770,10 +1826,13 @@ LOWFUNC(WRITE,NONE,2,raw_shra_b_rr,(RW1 d, RR1 r)) ASRS_rrr(REG_WORK1, REG_WORK1, r); // asrs r2,r2,r6 +#if defined(ARMV6_ASSEMBLY) + BFI_rrii(d, REG_WORK1, 0, 7); // bfi %[d], r2, 0, 7 +#else AND_rri(REG_WORK1, REG_WORK1, 0xff); // and r2,r2,#0xff BIC_rri(d,d, 0xff); // bic r7,r7,#0xff - ORR_rrr(d,d,REG_WORK1); // orr r7,r7,r2 +#endif } LENDFUNC(WRITE,NONE,2,raw_shra_b_rr,(RW1 d, RR1 r)) @@ -1785,16 +1844,15 @@ LOWFUNC(WRITE,NONE,2,raw_shra_w_ri,(RW2 r, IMM i)) ASRS_rri(REG_WORK1, REG_WORK1, i & 0x1f); // asrs r2,r2,#12 #if defined(ARMV6_ASSEMBLY) - UXTH_rr(REG_WORK1, REG_WORK1); + PKHBT_rrr(r, REG_WORK1, r); // pkhbt %[r], r2, %[r] #else BIC_rri(REG_WORK1, REG_WORK1, 0xff000000); BIC_rri(REG_WORK1, REG_WORK1, 0xff0000); -#endif BIC_rri(r,r,0xff00); // bic r7,r7,#0xff00 BIC_rri(r,r,0xff); // bic r7,r7,#0xff - - ORR_rrr(r,r,REG_WORK1); // orr r7,r7,r2 + ORR_rrr(r,r,REG_WORK1); // orr r7,r7,r2 +#endif } LENDFUNC(WRITE,NONE,2,raw_shra_w_ri,(RW2 r, IMM i)) @@ -1806,16 +1864,15 @@ LOWFUNC(WRITE,NONE,2,raw_shra_w_rr,(RW2 d, RR1 r)) ASRS_rrr(REG_WORK1, REG_WORK1, r); // asrs r2,r2,r6 #if defined(ARMV6_ASSEMBLY) - UXTH_rr(REG_WORK1, REG_WORK1); + PKHBT_rrr(d, REG_WORK1, d); // pkhbt %[d], r2, %[d] #else BIC_rri(REG_WORK1, REG_WORK1, 0xff000000); // bic r2,r2,#0xff000000 BIC_rri(REG_WORK1, REG_WORK1, 0xff0000); // bic r2,r2,#0xff0000 -#endif BIC_rri(d,d, 0xff00); // bic r7,r7,#0xff00 - BIC_rri(d,d, 0xff); // bic r7,r7,#0xff - + BIC_rri(d,d, 0xff); // bic r7,r7,#0xff ORR_rrr(d,d,REG_WORK1); // orr r7,r7,r2 +#endif } LENDFUNC(WRITE,NONE,2,raw_shra_w_rr,(RW2 d, RR1 r)) @@ -1837,8 +1894,12 @@ LOWFUNC(WRITE,NONE,2,raw_shrl_b_ri,(RW1 r, IMM i)) LSRS_rri(REG_WORK1, REG_WORK1, i & 0x1f); // LSRS r2,r2,r6 +#if defined(ARMV6_ASSEMBLY) + BFI_rrii(r, REG_WORK1, 0, 7); // bfi %[r], r2, 0, 7 +#else BIC_rri(r, r, 0xFF); // BIC r7,r7,#0xff ORR_rrr(r, r, REG_WORK1); // ORR r7,r7,r2 +#endif } LENDFUNC(WRITE,NONE,2,raw_shrl_b_ri,(RW1 r, IMM i)) @@ -1848,8 +1909,12 @@ LOWFUNC(WRITE,NONE,2,raw_shrl_b_rr,(RW1 d, RR1 r)) LSRS_rrr(REG_WORK1, REG_WORK1, r); // LSRS r2,r2,r6 +#if defined(ARMV6_ASSEMBLY) + BFI_rrii(d, REG_WORK1, 0, 7); // bfi %[d], r2, 0, 7 +#else BIC_rri(d, d, 0xFF); // BIC r7,r7,#0xff ORR_rrr(d, d, REG_WORK1); // ORR r7,r7,r2 +#endif } LENDFUNC(WRITE,NONE,2,raw_shrl_b_rr,(RW1 d, RR1 r)) @@ -1870,9 +1935,13 @@ LOWFUNC(WRITE,NONE,2,raw_shrl_w_ri,(RW2 r, IMM i)) LSRS_rri(REG_WORK1, REG_WORK1, i & 0x1f); // LSRS r2,r2,#12 +#if defined(ARMV6_ASSEMBLY) + PKHBT_rrr(r, REG_WORK1, r); // pkhbt %[r], r2, %[r] +#else BIC_rri(r, r, 0xFF); // BIC r7,r7,#0xff - BIC_rri(r, r, 0xFF00); // BIC r7,r7,#0xff00 - ORR_rrr(r, r, REG_WORK1); // ORR r7,r7,r2 + BIC_rri(r, r, 0xFF00); // BIC r7,r7,#0xff00 + ORR_rrr(r, r, REG_WORK1); // ORR r7,r7,r2 +#endif } LENDFUNC(WRITE,NONE,2,raw_shrl_w_ri,(RW2 r, IMM i)) @@ -1887,9 +1956,13 @@ LOWFUNC(WRITE,NONE,2,raw_shrl_w_rr,(RW2 d, RR1 r)) LSRS_rrr(REG_WORK1, REG_WORK1, r); // LSRS r2,r2,r6 +#if defined(ARMV6_ASSEMBLY) + PKHBT_rrr(d, REG_WORK1, d); // pkhbt %[d], r2, %[d] +#else BIC_rri(d, d, 0xFF); // BIC r7,r7,#0xff - BIC_rri(d, d, 0xFF00); // BIC r7,r7,#0xff00 - ORR_rrr(d, d, REG_WORK1); // ORR r7,r7,r2 + BIC_rri(d, d, 0xFF00); // BIC r7,r7,#0xff00 + ORR_rrr(d, d, REG_WORK1); // ORR r7,r7,r2 +#endif } LENDFUNC(WRITE,NONE,2,raw_shrl_w_rr,(RW2 d, RR1 r)) @@ -1901,10 +1974,9 @@ LENDFUNC(WRITE,NONE,2,raw_shrl_l_rr,(RW4 d, RR1 r)) LOWFUNC(WRITE,NONE,2,raw_sub_b,(RW1 d, RR1 s)) { - LSL_rri(REG_WORK1, s, 24); // lsl r2, r6, #24 LSL_rri(REG_WORK2, d, 24); // lsl r3, r7, #24 - SUBS_rrr(REG_WORK2, REG_WORK2, REG_WORK1); // subs r3, r3, r2 + SUBS_rrrLSLi(REG_WORK2, REG_WORK2, s, 24); // subs r3, r3, %[s], lsl #24 BIC_rri(d, d, 0xFF); ORR_rrrLSRi(d, d, REG_WORK2, 24); // orr r7, r7, r3 @@ -1964,13 +2036,17 @@ LENDFUNC(WRITE,NONE,2,raw_sub_l_ri,(RW4 d, IMM i)) LOWFUNC(WRITE,NONE,2,raw_sub_w,(RW2 d, RR2 s)) { - LSL_rri(REG_WORK1, s, 16); // lsl r2, r6, #16 LSL_rri(REG_WORK2, d, 16); // lsl r3, r7, #16 - SUBS_rrr(REG_WORK2, REG_WORK2, REG_WORK1); // subs r3, r3, r2 + SUBS_rrrLSLi(REG_WORK2, REG_WORK2, s, 16); // subs r3, r3, %[s], LSL #16 + +#if defined(ARMV6_ASSEMBLY) + PKHTB_rrrASRi(d, d, REG_WORK2, 16); // pkhtb %[d], %[d], r3, asr #16 +#else BIC_rri(d, d, 0xff); BIC_rri(d, d, 0xff00); ORR_rrrLSRi(d, d, REG_WORK2, 16); // orr r7, r7, r3 +#endif MRS_CPSR(REG_WORK1); // mrs r2, CPSR EOR_rri(REG_WORK1, REG_WORK1, ARM_C_FLAG); // eor r2, r2, #0x20000000 @@ -1989,13 +2065,16 @@ LOWFUNC(WRITE,NONE,2,raw_sub_w_ri,(RW2 d, IMM i)) LDRH_rRI(REG_WORK1, RPC_INDEX, 36); // ldrh r2, [pc, #36] ; #endif - LSL_rri(REG_WORK1, REG_WORK1, 16); // lsl r2, r2, #16 LSL_rri(REG_WORK2, d, 16); // lsl r3, r6, #16 - SUBS_rrr(REG_WORK2, REG_WORK2, REG_WORK1); // subs r3, r3, r2 + SUBS_rrrLSLi(REG_WORK2, REG_WORK2, REG_WORK1, 16); // subs r3, r3, r2, LSL #16 +#if defined(ARMV6_ASSEMBLY) + PKHTB_rrrASRi(d, d, REG_WORK2, 16); // pkhtb %[d], %[d], r3, asr #16 +#else BIC_rri(d, d, 0xff); BIC_rri(d, d, 0xff00); ORR_rrrLSRi(d, d, REG_WORK2, 16); // orr r6, r3, r6, lsr #16 +#endif MRS_CPSR(REG_WORK1); // mrs r2, CPSR EOR_rri(REG_WORK1, REG_WORK1, ARM_C_FLAG); // eor r2, r2, #0x20000000 @@ -2012,13 +2091,8 @@ LENDFUNC(WRITE,NONE,2,raw_sub_w_ri,(RW2 d, IMM i)) LOWFUNC(WRITE,NONE,2,raw_test_b_rr,(RR1 d, RR1 s)) { -#if defined(ARMV6_ASSEMBLY) - SXTB_rr(REG_WORK1, s); - SXTB_rr(REG_WORK2, d); -#else LSL_rri(REG_WORK1, s, 24); // lsl r2, r6, #24 LSL_rri(REG_WORK2, d, 24); // lsl r3, r7, #24 -#endif TST_rr(REG_WORK2, REG_WORK1); // tst r3, r2 @@ -2064,13 +2138,8 @@ LENDFUNC(WRITE,NONE,2,raw_test_l_rr,(RR4 d, RR4 s)) LOWFUNC(WRITE,NONE,2,raw_test_w_rr,(RR2 d, RR2 s)) { -#ifdef ARMV6_ASSEMBLY - SXTH_rr(REG_WORK1, s); - SXTH_rr(REG_WORK2, d); -#else LSL_rri(REG_WORK1, s, 16); // lsl r2, r6, #16 LSL_rri(REG_WORK2, d, 16); // lsl r3, r7, #16 -#endif TST_rr(REG_WORK2, REG_WORK1); // tst r3, r2 @@ -2121,23 +2190,23 @@ LENDFUNC(WRITE,NONE,2,raw_xor_l,(RW4 d, RR4 s)) LOWFUNC(NONE,NONE,2,raw_sign_extend_16_rr,(W4 d, RR2 s)) { -#if defined(ARMV6_ASSEMBLY) - SXTH_rr(d, s); // sxth %[d],%[s] -#else +//#if defined(ARMV6_ASSEMBLY) +// SXTH_rr(d, s); // sxth %[d],%[s] there is something wrong with SXTH... +//#else LSL_rri(d, s, 16); // lsl r6, r7, #16 ASR_rri(d, d, 16); // asr r6, r6, #16 -#endif +//#endif } LENDFUNC(NONE,NONE,2,raw_sign_extend_16_rr,(W4 d, RR2 s)) LOWFUNC(NONE,NONE,2,raw_sign_extend_8_rr,(W4 d, RR1 s)) { -#if defined(ARMV6_ASSEMBLY) - SXTB_rr(d, s); // SXTB %[d],%[s] -#else +//#if defined(ARMV6_ASSEMBLY) there is something wrong with SXTB... +// SXTB_rr(d, s); // SXTB %[d],%[s] +//#else ROR_rri(d, s, 8); // ror r6, r7, #8 ASR_rri(d, d, 24); // asr r6, r6, #24 -#endif +//#endif } LENDFUNC(NONE,NONE,2,raw_sign_extend_8_rr,(W4 d, RR1 s)) diff --git a/src/compemu.cpp b/src/compemu.cpp index 0e469ff0..6d12d54c 100644 --- a/src/compemu.cpp +++ b/src/compemu.cpp @@ -5688,9 +5688,6 @@ unsigned long REGPARAM2 op_a79_0_comp_ff(uae_u32 opcode) /* EOR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -#endif - -#ifdef PART_2 unsigned long REGPARAM2 op_a80_0_comp_ff(uae_u32 opcode) /* EOR */ { #ifdef HAVE_GET_WORD_UNSWAPPED @@ -5742,6 +5739,9 @@ unsigned long REGPARAM2 op_a90_0_comp_ff(uae_u32 opcode) /* EOR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } +#endif + +#ifdef PART_2 unsigned long REGPARAM2 op_a98_0_comp_ff(uae_u32 opcode) /* EOR */ { #ifdef HAVE_GET_WORD_UNSWAPPED @@ -11117,9 +11117,6 @@ unsigned long REGPARAM2 op_2148_0_comp_ff(uae_u32 opcode) /* MOVE */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -#endif - -#ifdef PART_3 unsigned long REGPARAM2 op_2150_0_comp_ff(uae_u32 opcode) /* MOVE */ { #ifdef HAVE_GET_WORD_UNSWAPPED @@ -11312,6 +11309,9 @@ unsigned long REGPARAM2 op_2178_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } +#endif + +#ifdef PART_3 unsigned long REGPARAM2 op_2179_0_comp_ff(uae_u32 opcode) /* MOVE */ { #ifdef HAVE_GET_WORD_UNSWAPPED @@ -17056,9 +17056,6 @@ unsigned long REGPARAM2 op_4290_0_comp_ff(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -#endif - -#ifdef PART_4 unsigned long REGPARAM2 op_4298_0_comp_ff(uae_u32 opcode) /* CLR */ { #ifdef HAVE_GET_WORD_UNSWAPPED @@ -17197,6 +17194,9 @@ unsigned long REGPARAM2 op_42b9_0_comp_ff(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } +#endif + +#ifdef PART_4 unsigned long REGPARAM2 op_4400_0_comp_ff(uae_u32 opcode) /* NEG */ { #ifdef HAVE_GET_WORD_UNSWAPPED @@ -21091,9 +21091,6 @@ if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -#endif - -#ifdef PART_5 unsigned long REGPARAM2 op_5039_0_comp_ff(uae_u32 opcode) /* ADD */ { #ifdef HAVE_GET_WORD_UNSWAPPED @@ -21439,6 +21436,9 @@ if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } +#endif + +#ifdef PART_5 unsigned long REGPARAM2 op_5088_0_comp_ff(uae_u32 opcode) /* ADDA */ { #ifdef HAVE_GET_WORD_UNSWAPPED @@ -25264,9 +25264,6 @@ unsigned long REGPARAM2 op_5ff8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -#endif - -#ifdef PART_6 unsigned long REGPARAM2 op_5ff9_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; @@ -25491,6 +25488,9 @@ unsigned long REGPARAM2 op_6300_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } +#endif + +#ifdef PART_6 unsigned long REGPARAM2 op_6301_0_comp_ff(uae_u32 opcode) /* Bcc */ { #ifdef HAVE_GET_WORD_UNSWAPPED @@ -30964,9 +30964,6 @@ if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -#endif - -#ifdef PART_7 unsigned long REGPARAM2 op_b048_0_comp_ff(uae_u32 opcode) /* CMP */ { #ifdef HAVE_GET_WORD_UNSWAPPED @@ -31460,6 +31457,9 @@ if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } +#endif + +#ifdef PART_7 unsigned long REGPARAM2 op_b0b0_0_comp_ff(uae_u32 opcode) /* CMP */ { #ifdef HAVE_GET_WORD_UNSWAPPED @@ -38105,9 +38105,6 @@ unsigned long REGPARAM2 op_d1d8_0_comp_ff(uae_u32 opcode) /* ADDA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -#endif - -#ifdef PART_8 unsigned long REGPARAM2 op_d1e0_0_comp_ff(uae_u32 opcode) /* ADDA */ { #ifdef HAVE_GET_WORD_UNSWAPPED @@ -38709,6 +38706,9 @@ unsigned long REGPARAM2 op_e058_0_comp_ff(uae_u32 opcode) /* ROR */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } +#endif + +#ifdef PART_8 unsigned long REGPARAM2 op_e060_0_comp_ff(uae_u32 opcode) /* ASR */ { #ifdef HAVE_GET_WORD_UNSWAPPED @@ -45382,9 +45382,6 @@ unsigned long REGPARAM2 op_a79_0_comp_nf(uae_u32 opcode) /* EOR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -#endif - -#ifdef PART_2 unsigned long REGPARAM2 op_a80_0_comp_nf(uae_u32 opcode) /* EOR */ { #ifdef HAVE_GET_WORD_UNSWAPPED @@ -45430,6 +45427,9 @@ unsigned long REGPARAM2 op_a90_0_comp_nf(uae_u32 opcode) /* EOR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } +#endif + +#ifdef PART_2 unsigned long REGPARAM2 op_a98_0_comp_nf(uae_u32 opcode) /* EOR */ { #ifdef HAVE_GET_WORD_UNSWAPPED @@ -49951,9 +49951,6 @@ unsigned long REGPARAM2 op_2148_0_comp_nf(uae_u32 opcode) /* MOVE */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -#endif - -#ifdef PART_3 unsigned long REGPARAM2 op_2150_0_comp_nf(uae_u32 opcode) /* MOVE */ { #ifdef HAVE_GET_WORD_UNSWAPPED @@ -50116,6 +50113,9 @@ unsigned long REGPARAM2 op_2178_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } +#endif + +#ifdef PART_3 unsigned long REGPARAM2 op_2179_0_comp_nf(uae_u32 opcode) /* MOVE */ { #ifdef HAVE_GET_WORD_UNSWAPPED @@ -54682,9 +54682,6 @@ unsigned long REGPARAM2 op_4290_0_comp_nf(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -#endif - -#ifdef PART_4 unsigned long REGPARAM2 op_4298_0_comp_nf(uae_u32 opcode) /* CLR */ { #ifdef HAVE_GET_WORD_UNSWAPPED @@ -54793,6 +54790,9 @@ unsigned long REGPARAM2 op_42b9_0_comp_nf(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } +#endif + +#ifdef PART_4 unsigned long REGPARAM2 op_4400_0_comp_nf(uae_u32 opcode) /* NEG */ { #ifdef HAVE_GET_WORD_UNSWAPPED @@ -58679,9 +58679,6 @@ unsigned long REGPARAM2 op_5038_0_comp_nf(uae_u32 opcode) /* ADD */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -#endif - -#ifdef PART_5 unsigned long REGPARAM2 op_5039_0_comp_nf(uae_u32 opcode) /* ADD */ { #ifdef HAVE_GET_WORD_UNSWAPPED @@ -58977,6 +58974,9 @@ unsigned long REGPARAM2 op_5080_0_comp_nf(uae_u32 opcode) /* ADD */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } +#endif + +#ifdef PART_5 unsigned long REGPARAM2 op_5088_0_comp_nf(uae_u32 opcode) /* ADDA */ { #ifdef HAVE_GET_WORD_UNSWAPPED @@ -62647,9 +62647,6 @@ unsigned long REGPARAM2 op_5ff8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -#endif - -#ifdef PART_6 unsigned long REGPARAM2 op_5ff9_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; @@ -62874,6 +62871,9 @@ unsigned long REGPARAM2 op_6300_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } +#endif + +#ifdef PART_6 unsigned long REGPARAM2 op_6301_0_comp_nf(uae_u32 opcode) /* Bcc */ { #ifdef HAVE_GET_WORD_UNSWAPPED @@ -67920,9 +67920,6 @@ unsigned long REGPARAM2 op_b040_0_comp_nf(uae_u32 opcode) /* CMP */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -#endif - -#ifdef PART_7 unsigned long REGPARAM2 op_b048_0_comp_nf(uae_u32 opcode) /* CMP */ { #ifdef HAVE_GET_WORD_UNSWAPPED @@ -68348,6 +68345,9 @@ unsigned long REGPARAM2 op_b0a8_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } +#endif + +#ifdef PART_7 unsigned long REGPARAM2 op_b0b0_0_comp_nf(uae_u32 opcode) /* CMP */ { #ifdef HAVE_GET_WORD_UNSWAPPED @@ -74425,9 +74425,6 @@ unsigned long REGPARAM2 op_d1d8_0_comp_nf(uae_u32 opcode) /* ADDA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -#endif - -#ifdef PART_8 unsigned long REGPARAM2 op_d1e0_0_comp_nf(uae_u32 opcode) /* ADDA */ { #ifdef HAVE_GET_WORD_UNSWAPPED @@ -74942,6 +74939,9 @@ unsigned long REGPARAM2 op_e058_0_comp_nf(uae_u32 opcode) /* ROR */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } +#endif + +#ifdef PART_8 unsigned long REGPARAM2 op_e060_0_comp_nf(uae_u32 opcode) /* ASR */ { #ifdef HAVE_GET_WORD_UNSWAPPED diff --git a/src/compemu_support.cpp b/src/compemu_support.cpp index 75de80e9..4f19f2ae 100644 --- a/src/compemu_support.cpp +++ b/src/compemu_support.cpp @@ -684,12 +684,16 @@ STATIC_INLINE void alloc_blockinfos(void) /******************************************************************** * Preferences handling. This is just a convenient place to put it * ********************************************************************/ -void check_prefs_changed_comp (void) +int check_prefs_changed_comp (void) { + int changed = 0; + if (currprefs.cachesize!=changed_prefs.cachesize) { currprefs.cachesize = changed_prefs.cachesize; alloc_cache(); + changed = 1; } + return changed; } /******************************************************************** @@ -849,11 +853,10 @@ int start_trace = 0; void trace_func(void) { TRACE_Start(); - printf("r0 =0x%08x, r1 =0x%08x, r2 =0x%08x, r3 =0x%08x\n", (&TRACE_mem)[0], (&TRACE_mem)[1], (&TRACE_mem)[2], (&TRACE_mem)[3]); - printf("r4 =0x%08x, r5 =0x%08x, r6 =0x%08x, r7 =0x%08x\n", (&TRACE_mem)[4], (&TRACE_mem)[5], (&TRACE_mem)[6], (&TRACE_mem)[7]); - printf("r8 =0x%08x, r9 =0x%08x, r10=0x%08x, r11=0x%08x\n", (&TRACE_mem)[8], (&TRACE_mem)[9], (&TRACE_mem)[10], (&TRACE_mem)[11]); - printf("r12=0x%08x, r13=0x%08x, r14=0x%08x, r15=0x%08x\n", (&TRACE_mem)[12], (&TRACE_mem)[13], (&TRACE_mem)[14], (&TRACE_mem)[15]); - printf("\n"); + write_log("r0 =0x%08x, r1 =0x%08x, r2 =0x%08x, r3 =0x%08x\n", (&TRACE_mem)[0], (&TRACE_mem)[1], (&TRACE_mem)[2], (&TRACE_mem)[3]); + write_log("r4 =0x%08x, r5 =0x%08x, r6 =0x%08x, r7 =0x%08x\n", (&TRACE_mem)[4], (&TRACE_mem)[5], (&TRACE_mem)[6], (&TRACE_mem)[7]); + write_log("r8 =0x%08x, r9 =0x%08x, r10=0x%08x, r11=0x%08x\n", (&TRACE_mem)[8], (&TRACE_mem)[9], (&TRACE_mem)[10], (&TRACE_mem)[11]); + write_log("r12=0x%08x, r13=0x%08x, r14=0x%08x, r15=0x%08x\n", (&TRACE_mem)[12], (&TRACE_mem)[13], (&TRACE_mem)[14], (&TRACE_mem)[15]); } void emit_trace(void) @@ -2993,17 +2996,19 @@ static void cache_miss(void) execute_normal(); /* Compile this block now */ return; } +#if COMP_DEBUG Dif (!bi2 || bi==bi2) { D(panicbug("Unexplained cache miss %p %p\n",bi,bi2)); abort(); } +#endif raise_in_cl_list(bi); return; } static int called_check_checksum(blockinfo* bi); -STATIC_INLINE int block_check_checksum(blockinfo* bi) +static int block_check_checksum(blockinfo* bi) { uae_u32 c1,c2; int isgood; @@ -3287,9 +3292,9 @@ void build_comp(void) const struct comptbl* nftbl=op_smalltbl_0_comp_nf; int count; #ifdef NOFLAGS_SUPPORT - struct cputbl *nfctbl = (currprefs.cpu_level >= 4 ? op_smalltbl_0_nf - : currprefs.cpu_level == 3 ? op_smalltbl_1_nf - : currprefs.cpu_level == 2 ? op_smalltbl_2_nf + struct cputbl *nfctbl = (currprefs.cpu_level >= 5 ? op_smalltbl_0_nf + : currprefs.cpu_level == 4 ? op_smalltbl_1_nf + : (currprefs.cpu_level == 2 || currprefs.cpu_level == 3) ? op_smalltbl_2_nf : currprefs.cpu_level == 1 ? op_smalltbl_3_nf : ! currprefs.cpu_compatible ? op_smalltbl_4_nf : op_smalltbl_5_nf); @@ -3347,8 +3352,12 @@ void build_comp(void) cpuop_func *nfcf; #endif int isaddx,cflow; + int lvl; - if (table68k[opcode].mnemo == i_ILLG || table68k[opcode].clev > currprefs.cpu_level) + lvl = (currprefs.cpu_model - 68000) / 10; + if (lvl > 4) + lvl--; + if (table68k[opcode].mnemo == i_ILLG || table68k[opcode].clev > lvl) continue; if (table68k[opcode].handler != -1) { @@ -3549,7 +3558,7 @@ void compiler_dumpstate(void) void compile_block(cpu_history* pc_hist, int blocklen, int totcycles) { - if (letit && compiled_code && currprefs.cpu_level>=2) { + if (letit && compiled_code && currprefs.cpu_model>=68020) { #ifdef PROFILE_COMPILE_TIME compile_count++; clock_t start_time = clock(); @@ -4001,7 +4010,6 @@ void compile_block(cpu_history* pc_hist, int blocklen, int totcycles) #ifdef PROFILE_COMPILE_TIME compile_time += (clock() - start_time); #endif - do_extra_cycles(totcycles); /* for the compilation time */ } } diff --git a/src/compstbl.cpp b/src/compstbl.cpp index fbb31aed..94ffaac0 100644 --- a/src/compstbl.cpp +++ b/src/compstbl.cpp @@ -1809,6 +1809,17 @@ extern const struct comptbl op_smalltbl_0_comp_ff[] = { { NULL, 0x00000000, 61424 }, /* BFINS */ { NULL, 0x00000000, 61432 }, /* BFINS */ { NULL, 0x00000000, 61433 }, /* BFINS */ +{ NULL, 0x00000001, 61440 }, /* MMUOP30A */ +{ NULL, 0x00000001, 61448 }, /* MMUOP30A */ +{ NULL, 0x00000001, 61456 }, /* MMUOP30A */ +{ NULL, 0x00000001, 61464 }, /* MMUOP30A */ +{ NULL, 0x00000001, 61472 }, /* MMUOP30A */ +{ NULL, 0x00000001, 61480 }, /* MMUOP30A */ +{ NULL, 0x00000001, 61488 }, /* MMUOP30A */ +{ NULL, 0x00000001, 61496 }, /* MMUOP30A */ +{ NULL, 0x00000001, 61497 }, /* MMUOP30A */ +{ NULL, 0x00000001, 61498 }, /* MMUOP30A */ +{ NULL, 0x00000001, 61499 }, /* MMUOP30A */ { NULL, 0x00000020, 61952 }, /* FPP */ { NULL, 0x00000020, 61960 }, /* FPP */ { NULL, 0x00000020, 61968 }, /* FPP */ @@ -1875,6 +1886,17 @@ extern const struct comptbl op_smalltbl_0_comp_ff[] = { { op_f610_0_comp_ff, 0x00000002, 62992 }, /* MOVE16 */ { op_f618_0_comp_ff, 0x00000002, 63000 }, /* MOVE16 */ { op_f620_0_comp_ff, 0x00000002, 63008 }, /* MOVE16 */ +{ NULL, 0x00000001, 63488 }, /* MMUOP30B */ +{ NULL, 0x00000001, 63496 }, /* MMUOP30B */ +{ NULL, 0x00000001, 63504 }, /* MMUOP30B */ +{ NULL, 0x00000001, 63512 }, /* MMUOP30B */ +{ NULL, 0x00000001, 63520 }, /* MMUOP30B */ +{ NULL, 0x00000001, 63528 }, /* MMUOP30B */ +{ NULL, 0x00000001, 63536 }, /* MMUOP30B */ +{ NULL, 0x00000001, 63544 }, /* MMUOP30B */ +{ NULL, 0x00000001, 63545 }, /* MMUOP30B */ +{ NULL, 0x00000001, 63546 }, /* MMUOP30B */ +{ NULL, 0x00000001, 63547 }, /* MMUOP30B */ { 0, 0,65536 }}; extern const struct comptbl op_smalltbl_0_comp_nf[] = { { op_0_0_comp_nf, 0x00000002, 0 }, /* OR */ @@ -3677,6 +3699,17 @@ extern const struct comptbl op_smalltbl_0_comp_nf[] = { { NULL, 0x00000000, 61424 }, /* BFINS */ { NULL, 0x00000000, 61432 }, /* BFINS */ { NULL, 0x00000000, 61433 }, /* BFINS */ +{ NULL, 0x00000001, 61440 }, /* MMUOP30A */ +{ NULL, 0x00000001, 61448 }, /* MMUOP30A */ +{ NULL, 0x00000001, 61456 }, /* MMUOP30A */ +{ NULL, 0x00000001, 61464 }, /* MMUOP30A */ +{ NULL, 0x00000001, 61472 }, /* MMUOP30A */ +{ NULL, 0x00000001, 61480 }, /* MMUOP30A */ +{ NULL, 0x00000001, 61488 }, /* MMUOP30A */ +{ NULL, 0x00000001, 61496 }, /* MMUOP30A */ +{ NULL, 0x00000001, 61497 }, /* MMUOP30A */ +{ NULL, 0x00000001, 61498 }, /* MMUOP30A */ +{ NULL, 0x00000001, 61499 }, /* MMUOP30A */ { NULL, 0x00000020, 61952 }, /* FPP */ { NULL, 0x00000020, 61960 }, /* FPP */ { NULL, 0x00000020, 61968 }, /* FPP */ @@ -3743,5 +3776,16 @@ extern const struct comptbl op_smalltbl_0_comp_nf[] = { { op_f610_0_comp_nf, 0x00000002, 62992 }, /* MOVE16 */ { op_f618_0_comp_nf, 0x00000002, 63000 }, /* MOVE16 */ { op_f620_0_comp_nf, 0x00000002, 63008 }, /* MOVE16 */ +{ NULL, 0x00000001, 63488 }, /* MMUOP30B */ +{ NULL, 0x00000001, 63496 }, /* MMUOP30B */ +{ NULL, 0x00000001, 63504 }, /* MMUOP30B */ +{ NULL, 0x00000001, 63512 }, /* MMUOP30B */ +{ NULL, 0x00000001, 63520 }, /* MMUOP30B */ +{ NULL, 0x00000001, 63528 }, /* MMUOP30B */ +{ NULL, 0x00000001, 63536 }, /* MMUOP30B */ +{ NULL, 0x00000001, 63544 }, /* MMUOP30B */ +{ NULL, 0x00000001, 63545 }, /* MMUOP30B */ +{ NULL, 0x00000001, 63546 }, /* MMUOP30B */ +{ NULL, 0x00000001, 63547 }, /* MMUOP30B */ { 0, 0,65536 }}; #endif diff --git a/src/config.h b/src/config.h deleted file mode 120000 index d611464e..00000000 --- a/src/config.h +++ /dev/null @@ -1 +0,0 @@ -od-pandora/config.h \ No newline at end of file diff --git a/src/cpudefs.cpp b/src/cpudefs.cpp index a4f9b4c9..bcf39318 100644 --- a/src/cpudefs.cpp +++ b/src/cpudefs.cpp @@ -317,25 +317,31 @@ struct instr_def defs68k[] = { /* BFINS */ {0xEFC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,"BFINS #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16]"}, /* FPP */ -{0xF200, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,3,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 17,"FPP #1,s"}, +{0xF200, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 17,"FPP #1,s"}, /* FDBcc */ -{0xF240, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,3,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 1, 17,"FDBcc #1,s[Areg-Dreg]"}, +{0xF240, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 1, 17,"FDBcc #1,s[Areg-Dreg]"}, /* FScc */ -{0xF240, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,3,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 17,"FScc #1,s[!Areg,Immd,PC8r,PC16]"}, +{0xF240, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 17,"FScc #1,s[!Areg,Immd,PC8r,PC16]"}, /* FTRAPcc */ -{0xF27A, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,3,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 16,"FTRAPcc #1"}, +{0xF27A, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,2,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 16,"FTRAPcc #1"}, /* FTRAPcc */ -{0xF27B, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,3,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 16,"FTRAPcc #2"}, +{0xF27B, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,2,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 16,"FTRAPcc #2"}, /* FTRAPcc */ -{0xF27C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,3,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,"FTRAPcc"}, +{0xF27C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,2,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,"FTRAPcc"}, /* FBcc */ -{0xF280, 6,{10,10,10,10,10,10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,3,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 1, 17,"FBcc #K,#1"}, +{0xF280, 6,{10,10,10,10,10,10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 1, 17,"FBcc #K,#1"}, /* FBcc */ -{0xF2C0, 6,{10,10,10,10,10,10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,3,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 1, 17,"FBcc #K,#2"}, +{0xF2C0, 6,{10,10,10,10,10,10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 1, 17,"FBcc #K,#2"}, /* FSAVE */ -{0xF300, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,3,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 32,"FSAVE s[!Dreg,Areg,Aipi,Immd,PC8r,PC16]"}, +{0xF300, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 32,"FSAVE s[!Dreg,Areg,Aipi,Immd,PC8r,PC16]"}, /* FRESTORE */ -{0xF340, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,3,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 16,"FRESTORE s[!Dreg,Areg,Apdi,Immd]"}, +{0xF340, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 16,"FRESTORE s[!Dreg,Areg,Apdi,Immd]"}, +/* MMUOP30A */ +{0xF000, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,3,0,{{3,5},{3,5},{3,5},{3,5},{3,5}}, 4, 17,"MMUOP30A s[!Immd],#1"}, +/* MMUOP30B */ +{0xF800, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,3,0,{{3,5},{3,5},{3,5},{3,5},{3,5}}, 4, 17,"MMUOP30B s[!Immd]"}, +/* MMUOP */ +{0xF500, 8,{ 5, 5, 5, 5, 5,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,4,0,{{3,5},{3,5},{3,5},{3,5},{3,5}}, 4, 17,"MMUOP #i,s"}, /* CINVL */ {0xF408, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 2,"CINVL #p,Ar"}, /* CINVP */ @@ -357,7 +363,5 @@ struct instr_def defs68k[] = { /* MOVE16 */ {0xF600, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,4,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,"MOVE16 s[Aind],Al"}, /* MOVE16 */ -{0xF600, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,4,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,"MOVE16 Al,d[Aipi-Aind]"}, -/* MMUOP */ -{0xF500, 8,{ 5, 5, 5, 5, 5,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,4,2,{{3,5},{3,5},{3,5},{3,5},{3,5}}, 4, 17,"MMUOP #i,s"}}; -int n_defs68k = 179; +{0xF600, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,4,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,"MOVE16 Al,d[Aipi-Aind]"}}; +int n_defs68k = 181; diff --git a/src/cpuemu_0.cpp b/src/cpuemu_0.cpp index ca4ac44b..c92bcb36 100644 --- a/src/cpuemu_0.cpp +++ b/src/cpuemu_0.cpp @@ -38,7 +38,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0000_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* OR.B #.B,(An) */ unsigned long REGPARAM2 CPUFUNC(op_0010_0)(uae_u32 opcode, struct regstruct *regs) @@ -53,7 +53,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0010_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 4); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* OR.B #.B,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_0018_0)(uae_u32 opcode, struct regstruct *regs) @@ -69,7 +69,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0018_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 4); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* OR.B #.B,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_0020_0)(uae_u32 opcode, struct regstruct *regs) @@ -86,7 +86,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0020_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 4); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* OR.B #.B,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_0028_0)(uae_u32 opcode, struct regstruct *regs) @@ -101,7 +101,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0028_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 6); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* OR.B #.B,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_0030_0)(uae_u32 opcode, struct regstruct *regs) @@ -117,7 +117,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0030_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); -}}}}}return 26 * 256; +}}}}}return 26 * CYCLE_UNIT / 2; } /* OR.B #.B,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_0038_0)(uae_u32 opcode, struct regstruct *regs) @@ -131,7 +131,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0038_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 6); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* OR.B #.B,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_0039_0)(uae_u32 opcode, struct regstruct *regs) @@ -145,7 +145,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0039_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 8); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* ORSR.B #.W */ unsigned long REGPARAM2 CPUFUNC(op_003c_0)(uae_u32 opcode, struct regstruct *regs) @@ -156,7 +156,7 @@ unsigned long REGPARAM2 CPUFUNC(op_003c_0)(uae_u32 opcode, struct regstruct *reg regs->sr |= src; MakeFromSR(regs); }} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* OR.W #.W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_0040_0)(uae_u32 opcode, struct regstruct *regs) @@ -170,7 +170,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0040_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* OR.W #.W,(An) */ unsigned long REGPARAM2 CPUFUNC(op_0050_0)(uae_u32 opcode, struct regstruct *regs) @@ -185,7 +185,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0050_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* OR.W #.W,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_0058_0)(uae_u32 opcode, struct regstruct *regs) @@ -201,7 +201,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0058_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* OR.W #.W,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_0060_0)(uae_u32 opcode, struct regstruct *regs) @@ -218,7 +218,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0060_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* OR.W #.W,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_0068_0)(uae_u32 opcode, struct regstruct *regs) @@ -233,7 +233,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0068_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* OR.W #.W,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_0070_0)(uae_u32 opcode, struct regstruct *regs) @@ -249,7 +249,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0070_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); -}}}}}return 22 * 256; +}}}}}return 22 * CYCLE_UNIT / 2; } /* OR.W #.W,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_0078_0)(uae_u32 opcode, struct regstruct *regs) @@ -263,7 +263,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0078_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* OR.W #.W,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_0079_0)(uae_u32 opcode, struct regstruct *regs) @@ -277,7 +277,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0079_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 8); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* ORSR.W #.W */ unsigned long REGPARAM2 CPUFUNC(op_007c_0)(uae_u32 opcode, struct regstruct *regs) @@ -289,7 +289,7 @@ unsigned long REGPARAM2 CPUFUNC(op_007c_0)(uae_u32 opcode, struct regstruct *reg MakeFromSR(regs); }}} m68k_incpc (regs, 4); endlabel18: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* OR.L #.L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_0080_0)(uae_u32 opcode, struct regstruct *regs) @@ -303,7 +303,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0080_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* OR.L #.L,(An) */ unsigned long REGPARAM2 CPUFUNC(op_0090_0)(uae_u32 opcode, struct regstruct *regs) @@ -318,7 +318,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0090_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 6); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* OR.L #.L,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_0098_0)(uae_u32 opcode, struct regstruct *regs) @@ -334,7 +334,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0098_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 6); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* OR.L #.L,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_00a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -351,7 +351,7 @@ unsigned long REGPARAM2 CPUFUNC(op_00a0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 6); -return 30 * 256; +return 30 * CYCLE_UNIT / 2; } /* OR.L #.L,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_00a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -366,7 +366,7 @@ unsigned long REGPARAM2 CPUFUNC(op_00a8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 8); -return 32 * 256; +return 32 * CYCLE_UNIT / 2; } /* OR.L #.L,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_00b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -382,7 +382,7 @@ unsigned long REGPARAM2 CPUFUNC(op_00b0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); -}}}}}return 34 * 256; +}}}}}return 34 * CYCLE_UNIT / 2; } /* OR.L #.L,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_00b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -396,7 +396,7 @@ unsigned long REGPARAM2 CPUFUNC(op_00b8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 8); -return 32 * 256; +return 32 * CYCLE_UNIT / 2; } /* OR.L #.L,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_00b9_0)(uae_u32 opcode, struct regstruct *regs) @@ -410,7 +410,7 @@ unsigned long REGPARAM2 CPUFUNC(op_00b9_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 10); -return 36 * 256; +return 36 * CYCLE_UNIT / 2; } /* CHK2.B #.W,(An) */ #ifndef CPUEMU_68000_ONLY @@ -429,7 +429,7 @@ unsigned long REGPARAM2 CPUFUNC(op_00d0_0)(uae_u32 opcode, struct regstruct *reg } }}} m68k_incpc (regs, 4); endlabel27: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* CHK2.B #.W,(d16,An) */ @@ -449,7 +449,7 @@ unsigned long REGPARAM2 CPUFUNC(op_00e8_0)(uae_u32 opcode, struct regstruct *reg } }}} m68k_incpc (regs, 6); endlabel28: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* CHK2.B #.W,(d8,An,Xn) */ @@ -470,7 +470,7 @@ unsigned long REGPARAM2 CPUFUNC(op_00f0_0)(uae_u32 opcode, struct regstruct *reg if ((extra & 0x800) && GET_CFLG (®s->ccrflags)) { Exception(6, regs, oldpc); goto endlabel29; } } }}}}endlabel29: ; -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } #endif /* CHK2.B #.W,(xxx).W */ @@ -489,7 +489,7 @@ unsigned long REGPARAM2 CPUFUNC(op_00f8_0)(uae_u32 opcode, struct regstruct *reg } }}} m68k_incpc (regs, 6); endlabel30: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* CHK2.B #.W,(xxx).L */ @@ -508,7 +508,7 @@ unsigned long REGPARAM2 CPUFUNC(op_00f9_0)(uae_u32 opcode, struct regstruct *reg } }}} m68k_incpc (regs, 8); endlabel31: ; -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } #endif /* CHK2.B #.W,(d16,PC) */ @@ -529,7 +529,7 @@ unsigned long REGPARAM2 CPUFUNC(op_00fa_0)(uae_u32 opcode, struct regstruct *reg } }}} m68k_incpc (regs, 6); endlabel32: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* CHK2.B #.W,(d8,PC,Xn) */ @@ -552,7 +552,7 @@ unsigned long REGPARAM2 CPUFUNC(op_00fb_0)(uae_u32 opcode, struct regstruct *reg if ((extra & 0x800) && GET_CFLG (®s->ccrflags)) { Exception(6, regs, oldpc); goto endlabel33; } } }}}}endlabel33: ; -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } #endif /* BTST.L Dn,Dn */ @@ -565,7 +565,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0100_0)(uae_u32 opcode, struct regstruct *reg src &= 31; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* MVPMR.W (d16,An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_0108_0)(uae_u32 opcode, struct regstruct *regs) @@ -576,7 +576,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0108_0)(uae_u32 opcode, struct regstruct *reg { uae_u16 val = (get_byte (memp) << 8) + get_byte (memp + 2); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* BTST.B Dn,(An) */ unsigned long REGPARAM2 CPUFUNC(op_0110_0)(uae_u32 opcode, struct regstruct *regs) @@ -589,7 +589,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0110_0)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* BTST.B Dn,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_0118_0)(uae_u32 opcode, struct regstruct *regs) @@ -603,7 +603,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0118_0)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* BTST.B Dn,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_0120_0)(uae_u32 opcode, struct regstruct *regs) @@ -618,7 +618,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0120_0)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* BTST.B Dn,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_0128_0)(uae_u32 opcode, struct regstruct *regs) @@ -631,7 +631,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0128_0)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* BTST.B Dn,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_0130_0)(uae_u32 opcode, struct regstruct *regs) @@ -645,7 +645,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0130_0)(uae_u32 opcode, struct regstruct *reg { uae_s8 dst = get_byte (dsta); src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* BTST.B Dn,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_0138_0)(uae_u32 opcode, struct regstruct *regs) @@ -657,7 +657,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0138_0)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* BTST.B Dn,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_0139_0)(uae_u32 opcode, struct regstruct *regs) @@ -669,7 +669,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0139_0)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BTST.B Dn,(d16,PC) */ unsigned long REGPARAM2 CPUFUNC(op_013a_0)(uae_u32 opcode, struct regstruct *regs) @@ -683,7 +683,7 @@ unsigned long REGPARAM2 CPUFUNC(op_013a_0)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* BTST.B Dn,(d8,PC,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_013b_0)(uae_u32 opcode, struct regstruct *regs) @@ -699,7 +699,7 @@ unsigned long REGPARAM2 CPUFUNC(op_013b_0)(uae_u32 opcode, struct regstruct *reg { uae_s8 dst = get_byte (dsta); src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* BTST.B Dn,#.B */ unsigned long REGPARAM2 CPUFUNC(op_013c_0)(uae_u32 opcode, struct regstruct *regs) @@ -710,7 +710,7 @@ unsigned long REGPARAM2 CPUFUNC(op_013c_0)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* BCHG.L Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_0140_0)(uae_u32 opcode, struct regstruct *regs) @@ -724,7 +724,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0140_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); m68k_dreg(regs, dstreg) = (dst); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* MVPMR.L (d16,An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_0148_0)(uae_u32 opcode, struct regstruct *regs) @@ -736,7 +736,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0148_0)(uae_u32 opcode, struct regstruct *reg + (get_byte (memp + 4) << 8) + get_byte (memp + 6); m68k_dreg(regs, dstreg) = (val); }} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* BCHG.B Dn,(An) */ unsigned long REGPARAM2 CPUFUNC(op_0150_0)(uae_u32 opcode, struct regstruct *regs) @@ -751,7 +751,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0150_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* BCHG.B Dn,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_0158_0)(uae_u32 opcode, struct regstruct *regs) @@ -767,7 +767,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0158_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* BCHG.B Dn,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_0160_0)(uae_u32 opcode, struct regstruct *regs) @@ -784,7 +784,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0160_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* BCHG.B Dn,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_0168_0)(uae_u32 opcode, struct regstruct *regs) @@ -799,7 +799,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0168_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BCHG.B Dn,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_0170_0)(uae_u32 opcode, struct regstruct *regs) @@ -815,7 +815,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0170_0)(uae_u32 opcode, struct regstruct *reg dst ^= (1 << src); SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* BCHG.B Dn,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_0178_0)(uae_u32 opcode, struct regstruct *regs) @@ -829,7 +829,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0178_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BCHG.B Dn,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_0179_0)(uae_u32 opcode, struct regstruct *regs) @@ -843,7 +843,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0179_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* BCHG.B Dn,(d16,PC) */ unsigned long REGPARAM2 CPUFUNC(op_017a_0)(uae_u32 opcode, struct regstruct *regs) @@ -859,7 +859,7 @@ unsigned long REGPARAM2 CPUFUNC(op_017a_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BCHG.B Dn,(d8,PC,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_017b_0)(uae_u32 opcode, struct regstruct *regs) @@ -877,7 +877,7 @@ unsigned long REGPARAM2 CPUFUNC(op_017b_0)(uae_u32 opcode, struct regstruct *reg dst ^= (1 << src); SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* BCLR.L Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_0180_0)(uae_u32 opcode, struct regstruct *regs) @@ -891,7 +891,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0180_0)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); m68k_dreg(regs, dstreg) = (dst); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* MVPRM.W Dn,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_0188_0)(uae_u32 opcode, struct regstruct *regs) @@ -902,7 +902,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0188_0)(uae_u32 opcode, struct regstruct *reg uaecptr memp = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 2); put_byte (memp, src >> 8); put_byte (memp + 2, src); }} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* BCLR.B Dn,(An) */ unsigned long REGPARAM2 CPUFUNC(op_0190_0)(uae_u32 opcode, struct regstruct *regs) @@ -917,7 +917,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0190_0)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* BCLR.B Dn,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_0198_0)(uae_u32 opcode, struct regstruct *regs) @@ -933,7 +933,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0198_0)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* BCLR.B Dn,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_01a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -950,7 +950,7 @@ unsigned long REGPARAM2 CPUFUNC(op_01a0_0)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* BCLR.B Dn,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_01a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -965,7 +965,7 @@ unsigned long REGPARAM2 CPUFUNC(op_01a8_0)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BCLR.B Dn,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_01b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -981,7 +981,7 @@ unsigned long REGPARAM2 CPUFUNC(op_01b0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); put_byte (dsta,dst); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* BCLR.B Dn,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_01b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -995,7 +995,7 @@ unsigned long REGPARAM2 CPUFUNC(op_01b8_0)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BCLR.B Dn,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_01b9_0)(uae_u32 opcode, struct regstruct *regs) @@ -1009,7 +1009,7 @@ unsigned long REGPARAM2 CPUFUNC(op_01b9_0)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* BCLR.B Dn,(d16,PC) */ unsigned long REGPARAM2 CPUFUNC(op_01ba_0)(uae_u32 opcode, struct regstruct *regs) @@ -1025,7 +1025,7 @@ unsigned long REGPARAM2 CPUFUNC(op_01ba_0)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BCLR.B Dn,(d8,PC,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_01bb_0)(uae_u32 opcode, struct regstruct *regs) @@ -1043,7 +1043,7 @@ unsigned long REGPARAM2 CPUFUNC(op_01bb_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); put_byte (dsta,dst); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* BSET.L Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_01c0_0)(uae_u32 opcode, struct regstruct *regs) @@ -1057,7 +1057,7 @@ unsigned long REGPARAM2 CPUFUNC(op_01c0_0)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); m68k_dreg(regs, dstreg) = (dst); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* MVPRM.L Dn,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_01c8_0)(uae_u32 opcode, struct regstruct *regs) @@ -1069,7 +1069,7 @@ unsigned long REGPARAM2 CPUFUNC(op_01c8_0)(uae_u32 opcode, struct regstruct *reg put_byte (memp, src >> 24); put_byte (memp + 2, src >> 16); put_byte (memp + 4, src >> 8); put_byte (memp + 6, src); }} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* BSET.B Dn,(An) */ unsigned long REGPARAM2 CPUFUNC(op_01d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -1084,7 +1084,7 @@ unsigned long REGPARAM2 CPUFUNC(op_01d0_0)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* BSET.B Dn,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_01d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -1100,7 +1100,7 @@ unsigned long REGPARAM2 CPUFUNC(op_01d8_0)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* BSET.B Dn,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_01e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -1117,7 +1117,7 @@ unsigned long REGPARAM2 CPUFUNC(op_01e0_0)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* BSET.B Dn,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_01e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -1132,7 +1132,7 @@ unsigned long REGPARAM2 CPUFUNC(op_01e8_0)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BSET.B Dn,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_01f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -1148,7 +1148,7 @@ unsigned long REGPARAM2 CPUFUNC(op_01f0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); dst |= (1 << src); put_byte (dsta,dst); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* BSET.B Dn,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_01f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -1162,7 +1162,7 @@ unsigned long REGPARAM2 CPUFUNC(op_01f8_0)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BSET.B Dn,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_01f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -1176,7 +1176,7 @@ unsigned long REGPARAM2 CPUFUNC(op_01f9_0)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* BSET.B Dn,(d16,PC) */ unsigned long REGPARAM2 CPUFUNC(op_01fa_0)(uae_u32 opcode, struct regstruct *regs) @@ -1192,7 +1192,7 @@ unsigned long REGPARAM2 CPUFUNC(op_01fa_0)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BSET.B Dn,(d8,PC,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_01fb_0)(uae_u32 opcode, struct regstruct *regs) @@ -1210,7 +1210,7 @@ unsigned long REGPARAM2 CPUFUNC(op_01fb_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); dst |= (1 << src); put_byte (dsta,dst); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* AND.B #.B,Dn */ unsigned long REGPARAM2 CPUFUNC(op_0200_0)(uae_u32 opcode, struct regstruct *regs) @@ -1224,7 +1224,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0200_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* AND.B #.B,(An) */ unsigned long REGPARAM2 CPUFUNC(op_0210_0)(uae_u32 opcode, struct regstruct *regs) @@ -1239,7 +1239,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0210_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 4); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* AND.B #.B,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_0218_0)(uae_u32 opcode, struct regstruct *regs) @@ -1255,7 +1255,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0218_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 4); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* AND.B #.B,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_0220_0)(uae_u32 opcode, struct regstruct *regs) @@ -1272,7 +1272,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0220_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 4); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* AND.B #.B,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_0228_0)(uae_u32 opcode, struct regstruct *regs) @@ -1287,7 +1287,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0228_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 6); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* AND.B #.B,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_0230_0)(uae_u32 opcode, struct regstruct *regs) @@ -1303,7 +1303,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0230_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); -}}}}}return 26 * 256; +}}}}}return 26 * CYCLE_UNIT / 2; } /* AND.B #.B,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_0238_0)(uae_u32 opcode, struct regstruct *regs) @@ -1317,7 +1317,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0238_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 6); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* AND.B #.B,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_0239_0)(uae_u32 opcode, struct regstruct *regs) @@ -1331,7 +1331,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0239_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 8); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* ANDSR.B #.W */ unsigned long REGPARAM2 CPUFUNC(op_023c_0)(uae_u32 opcode, struct regstruct *regs) @@ -1342,7 +1342,7 @@ unsigned long REGPARAM2 CPUFUNC(op_023c_0)(uae_u32 opcode, struct regstruct *reg regs->sr &= src; MakeFromSR(regs); }} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* AND.W #.W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_0240_0)(uae_u32 opcode, struct regstruct *regs) @@ -1356,7 +1356,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0240_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* AND.W #.W,(An) */ unsigned long REGPARAM2 CPUFUNC(op_0250_0)(uae_u32 opcode, struct regstruct *regs) @@ -1371,7 +1371,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0250_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* AND.W #.W,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_0258_0)(uae_u32 opcode, struct regstruct *regs) @@ -1387,7 +1387,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0258_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* AND.W #.W,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_0260_0)(uae_u32 opcode, struct regstruct *regs) @@ -1404,7 +1404,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0260_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* AND.W #.W,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_0268_0)(uae_u32 opcode, struct regstruct *regs) @@ -1419,7 +1419,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0268_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* AND.W #.W,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_0270_0)(uae_u32 opcode, struct regstruct *regs) @@ -1435,7 +1435,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0270_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); -}}}}}return 22 * 256; +}}}}}return 22 * CYCLE_UNIT / 2; } /* AND.W #.W,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_0278_0)(uae_u32 opcode, struct regstruct *regs) @@ -1449,7 +1449,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0278_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* AND.W #.W,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_0279_0)(uae_u32 opcode, struct regstruct *regs) @@ -1463,7 +1463,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0279_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 8); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* ANDSR.W #.W */ unsigned long REGPARAM2 CPUFUNC(op_027c_0)(uae_u32 opcode, struct regstruct *regs) @@ -1475,7 +1475,7 @@ unsigned long REGPARAM2 CPUFUNC(op_027c_0)(uae_u32 opcode, struct regstruct *reg MakeFromSR(regs); }}} m68k_incpc (regs, 4); endlabel96: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* AND.L #.L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_0280_0)(uae_u32 opcode, struct regstruct *regs) @@ -1489,7 +1489,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0280_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* AND.L #.L,(An) */ unsigned long REGPARAM2 CPUFUNC(op_0290_0)(uae_u32 opcode, struct regstruct *regs) @@ -1504,7 +1504,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0290_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 6); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* AND.L #.L,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_0298_0)(uae_u32 opcode, struct regstruct *regs) @@ -1520,7 +1520,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0298_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 6); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* AND.L #.L,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_02a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -1537,7 +1537,7 @@ unsigned long REGPARAM2 CPUFUNC(op_02a0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 6); -return 30 * 256; +return 30 * CYCLE_UNIT / 2; } /* AND.L #.L,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_02a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -1552,7 +1552,7 @@ unsigned long REGPARAM2 CPUFUNC(op_02a8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 8); -return 32 * 256; +return 32 * CYCLE_UNIT / 2; } /* AND.L #.L,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_02b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -1568,7 +1568,7 @@ unsigned long REGPARAM2 CPUFUNC(op_02b0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); -}}}}}return 34 * 256; +}}}}}return 34 * CYCLE_UNIT / 2; } /* AND.L #.L,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_02b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -1582,7 +1582,7 @@ unsigned long REGPARAM2 CPUFUNC(op_02b8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 8); -return 32 * 256; +return 32 * CYCLE_UNIT / 2; } /* AND.L #.L,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_02b9_0)(uae_u32 opcode, struct regstruct *regs) @@ -1596,7 +1596,7 @@ unsigned long REGPARAM2 CPUFUNC(op_02b9_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 10); -return 36 * 256; +return 36 * CYCLE_UNIT / 2; } /* CHK2.W #.W,(An) */ #ifndef CPUEMU_68000_ONLY @@ -1615,7 +1615,7 @@ unsigned long REGPARAM2 CPUFUNC(op_02d0_0)(uae_u32 opcode, struct regstruct *reg } }}} m68k_incpc (regs, 4); endlabel105: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* CHK2.W #.W,(d16,An) */ @@ -1635,7 +1635,7 @@ unsigned long REGPARAM2 CPUFUNC(op_02e8_0)(uae_u32 opcode, struct regstruct *reg } }}} m68k_incpc (regs, 6); endlabel106: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* CHK2.W #.W,(d8,An,Xn) */ @@ -1656,7 +1656,7 @@ unsigned long REGPARAM2 CPUFUNC(op_02f0_0)(uae_u32 opcode, struct regstruct *reg if ((extra & 0x800) && GET_CFLG (®s->ccrflags)) { Exception(6, regs, oldpc); goto endlabel107; } } }}}}endlabel107: ; -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } #endif /* CHK2.W #.W,(xxx).W */ @@ -1675,7 +1675,7 @@ unsigned long REGPARAM2 CPUFUNC(op_02f8_0)(uae_u32 opcode, struct regstruct *reg } }}} m68k_incpc (regs, 6); endlabel108: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* CHK2.W #.W,(xxx).L */ @@ -1694,7 +1694,7 @@ unsigned long REGPARAM2 CPUFUNC(op_02f9_0)(uae_u32 opcode, struct regstruct *reg } }}} m68k_incpc (regs, 8); endlabel109: ; -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } #endif /* CHK2.W #.W,(d16,PC) */ @@ -1715,7 +1715,7 @@ unsigned long REGPARAM2 CPUFUNC(op_02fa_0)(uae_u32 opcode, struct regstruct *reg } }}} m68k_incpc (regs, 6); endlabel110: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* CHK2.W #.W,(d8,PC,Xn) */ @@ -1738,7 +1738,7 @@ unsigned long REGPARAM2 CPUFUNC(op_02fb_0)(uae_u32 opcode, struct regstruct *reg if ((extra & 0x800) && GET_CFLG (®s->ccrflags)) { Exception(6, regs, oldpc); goto endlabel111; } } }}}}endlabel111: ; -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } #endif /* SUB.B #.B,Dn */ @@ -1758,7 +1758,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0400_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUB.B #.B,(An) */ unsigned long REGPARAM2 CPUFUNC(op_0410_0)(uae_u32 opcode, struct regstruct *regs) @@ -1778,7 +1778,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0410_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* SUB.B #.B,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_0418_0)(uae_u32 opcode, struct regstruct *regs) @@ -1799,7 +1799,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0418_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* SUB.B #.B,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_0420_0)(uae_u32 opcode, struct regstruct *regs) @@ -1821,7 +1821,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0420_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* SUB.B #.B,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_0428_0)(uae_u32 opcode, struct regstruct *regs) @@ -1841,7 +1841,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0428_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* SUB.B #.B,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_0430_0)(uae_u32 opcode, struct regstruct *regs) @@ -1862,7 +1862,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0430_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); -}}}}}}}}return 26 * 256; +}}}}}}}}return 26 * CYCLE_UNIT / 2; } /* SUB.B #.B,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_0438_0)(uae_u32 opcode, struct regstruct *regs) @@ -1881,7 +1881,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0438_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* SUB.B #.B,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_0439_0)(uae_u32 opcode, struct regstruct *regs) @@ -1900,7 +1900,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0439_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 8); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* SUB.W #.W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_0440_0)(uae_u32 opcode, struct regstruct *regs) @@ -1919,7 +1919,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0440_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* SUB.W #.W,(An) */ unsigned long REGPARAM2 CPUFUNC(op_0450_0)(uae_u32 opcode, struct regstruct *regs) @@ -1939,7 +1939,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0450_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* SUB.W #.W,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_0458_0)(uae_u32 opcode, struct regstruct *regs) @@ -1960,7 +1960,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0458_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* SUB.W #.W,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_0460_0)(uae_u32 opcode, struct regstruct *regs) @@ -1982,7 +1982,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0460_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* SUB.W #.W,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_0468_0)(uae_u32 opcode, struct regstruct *regs) @@ -2002,7 +2002,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0468_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* SUB.W #.W,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_0470_0)(uae_u32 opcode, struct regstruct *regs) @@ -2023,7 +2023,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0470_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); -}}}}}}}}return 22 * 256; +}}}}}}}}return 22 * CYCLE_UNIT / 2; } /* SUB.W #.W,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_0478_0)(uae_u32 opcode, struct regstruct *regs) @@ -2042,7 +2042,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0478_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* SUB.W #.W,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_0479_0)(uae_u32 opcode, struct regstruct *regs) @@ -2061,7 +2061,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0479_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 8); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* SUB.L #.L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_0480_0)(uae_u32 opcode, struct regstruct *regs) @@ -2080,7 +2080,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0480_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUB.L #.L,(An) */ unsigned long REGPARAM2 CPUFUNC(op_0490_0)(uae_u32 opcode, struct regstruct *regs) @@ -2100,7 +2100,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0490_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* SUB.L #.L,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_0498_0)(uae_u32 opcode, struct regstruct *regs) @@ -2121,7 +2121,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0498_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* SUB.L #.L,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_04a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -2143,7 +2143,7 @@ unsigned long REGPARAM2 CPUFUNC(op_04a0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 30 * 256; +return 30 * CYCLE_UNIT / 2; } /* SUB.L #.L,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_04a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -2163,7 +2163,7 @@ unsigned long REGPARAM2 CPUFUNC(op_04a8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 8); -return 32 * 256; +return 32 * CYCLE_UNIT / 2; } /* SUB.L #.L,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_04b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -2184,7 +2184,7 @@ unsigned long REGPARAM2 CPUFUNC(op_04b0_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); -}}}}}}}}return 34 * 256; +}}}}}}}}return 34 * CYCLE_UNIT / 2; } /* SUB.L #.L,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_04b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -2203,7 +2203,7 @@ unsigned long REGPARAM2 CPUFUNC(op_04b8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 8); -return 32 * 256; +return 32 * CYCLE_UNIT / 2; } /* SUB.L #.L,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_04b9_0)(uae_u32 opcode, struct regstruct *regs) @@ -2222,7 +2222,7 @@ unsigned long REGPARAM2 CPUFUNC(op_04b9_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 10); -return 36 * 256; +return 36 * CYCLE_UNIT / 2; } /* CHK2.L #.W,(An) */ #ifndef CPUEMU_68000_ONLY @@ -2240,7 +2240,7 @@ unsigned long REGPARAM2 CPUFUNC(op_04d0_0)(uae_u32 opcode, struct regstruct *reg } }}} m68k_incpc (regs, 4); endlabel136: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* CHK2.L #.W,(d16,An) */ @@ -2259,7 +2259,7 @@ unsigned long REGPARAM2 CPUFUNC(op_04e8_0)(uae_u32 opcode, struct regstruct *reg } }}} m68k_incpc (regs, 6); endlabel137: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* CHK2.L #.W,(d8,An,Xn) */ @@ -2279,7 +2279,7 @@ unsigned long REGPARAM2 CPUFUNC(op_04f0_0)(uae_u32 opcode, struct regstruct *reg if ((extra & 0x800) && GET_CFLG (®s->ccrflags)) { Exception(6, regs, oldpc); goto endlabel138; } } }}}}endlabel138: ; -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } #endif /* CHK2.L #.W,(xxx).W */ @@ -2297,7 +2297,7 @@ unsigned long REGPARAM2 CPUFUNC(op_04f8_0)(uae_u32 opcode, struct regstruct *reg } }}} m68k_incpc (regs, 6); endlabel139: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* CHK2.L #.W,(xxx).L */ @@ -2315,7 +2315,7 @@ unsigned long REGPARAM2 CPUFUNC(op_04f9_0)(uae_u32 opcode, struct regstruct *reg } }}} m68k_incpc (regs, 8); endlabel140: ; -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } #endif /* CHK2.L #.W,(d16,PC) */ @@ -2335,7 +2335,7 @@ unsigned long REGPARAM2 CPUFUNC(op_04fa_0)(uae_u32 opcode, struct regstruct *reg } }}} m68k_incpc (regs, 6); endlabel141: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* CHK2.L #.W,(d8,PC,Xn) */ @@ -2357,7 +2357,7 @@ unsigned long REGPARAM2 CPUFUNC(op_04fb_0)(uae_u32 opcode, struct regstruct *reg if ((extra & 0x800) && GET_CFLG (®s->ccrflags)) { Exception(6, regs, oldpc); goto endlabel142; } } }}}}endlabel142: ; -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } #endif /* ADD.B #.B,Dn */ @@ -2377,7 +2377,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0600_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADD.B #.B,(An) */ unsigned long REGPARAM2 CPUFUNC(op_0610_0)(uae_u32 opcode, struct regstruct *regs) @@ -2397,7 +2397,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0610_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* ADD.B #.B,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_0618_0)(uae_u32 opcode, struct regstruct *regs) @@ -2418,7 +2418,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0618_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* ADD.B #.B,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_0620_0)(uae_u32 opcode, struct regstruct *regs) @@ -2440,7 +2440,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0620_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* ADD.B #.B,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_0628_0)(uae_u32 opcode, struct regstruct *regs) @@ -2460,7 +2460,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0628_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* ADD.B #.B,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_0630_0)(uae_u32 opcode, struct regstruct *regs) @@ -2481,7 +2481,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0630_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); -}}}}}}}}return 26 * 256; +}}}}}}}}return 26 * CYCLE_UNIT / 2; } /* ADD.B #.B,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_0638_0)(uae_u32 opcode, struct regstruct *regs) @@ -2500,7 +2500,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0638_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* ADD.B #.B,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_0639_0)(uae_u32 opcode, struct regstruct *regs) @@ -2519,7 +2519,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0639_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 8); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* ADD.W #.W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_0640_0)(uae_u32 opcode, struct regstruct *regs) @@ -2538,7 +2538,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0640_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* ADD.W #.W,(An) */ unsigned long REGPARAM2 CPUFUNC(op_0650_0)(uae_u32 opcode, struct regstruct *regs) @@ -2558,7 +2558,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0650_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ADD.W #.W,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_0658_0)(uae_u32 opcode, struct regstruct *regs) @@ -2579,7 +2579,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0658_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ADD.W #.W,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_0660_0)(uae_u32 opcode, struct regstruct *regs) @@ -2601,7 +2601,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0660_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* ADD.W #.W,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_0668_0)(uae_u32 opcode, struct regstruct *regs) @@ -2621,7 +2621,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0668_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* ADD.W #.W,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_0670_0)(uae_u32 opcode, struct regstruct *regs) @@ -2642,7 +2642,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0670_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); -}}}}}}}}return 22 * 256; +}}}}}}}}return 22 * CYCLE_UNIT / 2; } /* ADD.W #.W,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_0678_0)(uae_u32 opcode, struct regstruct *regs) @@ -2661,7 +2661,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0678_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* ADD.W #.W,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_0679_0)(uae_u32 opcode, struct regstruct *regs) @@ -2680,7 +2680,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0679_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 8); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* ADD.L #.L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_0680_0)(uae_u32 opcode, struct regstruct *regs) @@ -2699,7 +2699,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0680_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADD.L #.L,(An) */ unsigned long REGPARAM2 CPUFUNC(op_0690_0)(uae_u32 opcode, struct regstruct *regs) @@ -2719,7 +2719,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0690_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* ADD.L #.L,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_0698_0)(uae_u32 opcode, struct regstruct *regs) @@ -2740,7 +2740,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0698_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* ADD.L #.L,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_06a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -2762,7 +2762,7 @@ unsigned long REGPARAM2 CPUFUNC(op_06a0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 30 * 256; +return 30 * CYCLE_UNIT / 2; } /* ADD.L #.L,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_06a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -2782,7 +2782,7 @@ unsigned long REGPARAM2 CPUFUNC(op_06a8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 8); -return 32 * 256; +return 32 * CYCLE_UNIT / 2; } /* ADD.L #.L,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_06b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -2803,7 +2803,7 @@ unsigned long REGPARAM2 CPUFUNC(op_06b0_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); -}}}}}}}}return 34 * 256; +}}}}}}}}return 34 * CYCLE_UNIT / 2; } /* ADD.L #.L,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_06b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -2822,7 +2822,7 @@ unsigned long REGPARAM2 CPUFUNC(op_06b8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 8); -return 32 * 256; +return 32 * CYCLE_UNIT / 2; } /* ADD.L #.L,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_06b9_0)(uae_u32 opcode, struct regstruct *regs) @@ -2841,7 +2841,7 @@ unsigned long REGPARAM2 CPUFUNC(op_06b9_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 10); -return 36 * 256; +return 36 * CYCLE_UNIT / 2; } /* RTM.L Dn */ #ifndef CPUEMU_68000_ONLY @@ -2850,7 +2850,7 @@ unsigned long REGPARAM2 CPUFUNC(op_06c0_0)(uae_u32 opcode, struct regstruct *reg uae_u32 srcreg = (opcode & 7); { m68k_incpc (regs, 2); op_illg(opcode, regs); -}return 4 * 256; +}return 4 * CYCLE_UNIT / 2; } #endif /* RTM.L An */ @@ -2860,7 +2860,7 @@ unsigned long REGPARAM2 CPUFUNC(op_06c8_0)(uae_u32 opcode, struct regstruct *reg uae_u32 srcreg = (opcode & 7); { m68k_incpc (regs, 2); op_illg(opcode, regs); -}return 4 * 256; +}return 4 * CYCLE_UNIT / 2; } #endif /* CALLM.L (An) */ @@ -2870,7 +2870,7 @@ unsigned long REGPARAM2 CPUFUNC(op_06d0_0)(uae_u32 opcode, struct regstruct *reg uae_u32 srcreg = (opcode & 7); { m68k_incpc (regs, 2); op_illg(opcode, regs); -}return 4 * 256; +}return 4 * CYCLE_UNIT / 2; } #endif /* CALLM.L (d16,An) */ @@ -2880,7 +2880,7 @@ unsigned long REGPARAM2 CPUFUNC(op_06e8_0)(uae_u32 opcode, struct regstruct *reg uae_u32 srcreg = (opcode & 7); { m68k_incpc (regs, 2); op_illg(opcode, regs); -}return 4 * 256; +}return 4 * CYCLE_UNIT / 2; } #endif /* CALLM.L (d8,An,Xn) */ @@ -2890,7 +2890,7 @@ unsigned long REGPARAM2 CPUFUNC(op_06f0_0)(uae_u32 opcode, struct regstruct *reg uae_u32 srcreg = (opcode & 7); { m68k_incpc (regs, 2); op_illg(opcode, regs); -}return 4 * 256; +}return 4 * CYCLE_UNIT / 2; } #endif /* CALLM.L (xxx).W */ @@ -2899,7 +2899,7 @@ unsigned long REGPARAM2 CPUFUNC(op_06f8_0)(uae_u32 opcode, struct regstruct *reg { { m68k_incpc (regs, 2); op_illg(opcode, regs); -}return 4 * 256; +}return 4 * CYCLE_UNIT / 2; } #endif /* CALLM.L (xxx).L */ @@ -2908,7 +2908,7 @@ unsigned long REGPARAM2 CPUFUNC(op_06f9_0)(uae_u32 opcode, struct regstruct *reg { { m68k_incpc (regs, 2); op_illg(opcode, regs); -}return 4 * 256; +}return 4 * CYCLE_UNIT / 2; } #endif /* CALLM.L (d16,PC) */ @@ -2917,7 +2917,7 @@ unsigned long REGPARAM2 CPUFUNC(op_06fa_0)(uae_u32 opcode, struct regstruct *reg { { m68k_incpc (regs, 2); op_illg(opcode, regs); -}return 4 * 256; +}return 4 * CYCLE_UNIT / 2; } #endif /* CALLM.L (d8,PC,Xn) */ @@ -2926,7 +2926,7 @@ unsigned long REGPARAM2 CPUFUNC(op_06fb_0)(uae_u32 opcode, struct regstruct *reg { { m68k_incpc (regs, 2); op_illg(opcode, regs); -}return 4 * 256; +}return 4 * CYCLE_UNIT / 2; } #endif /* BTST.L #.W,Dn */ @@ -2938,7 +2938,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0800_0)(uae_u32 opcode, struct regstruct *reg src &= 31; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* BTST.B #.W,(An) */ unsigned long REGPARAM2 CPUFUNC(op_0810_0)(uae_u32 opcode, struct regstruct *regs) @@ -2950,7 +2950,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0810_0)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* BTST.B #.W,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_0818_0)(uae_u32 opcode, struct regstruct *regs) @@ -2963,7 +2963,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0818_0)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* BTST.B #.W,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_0820_0)(uae_u32 opcode, struct regstruct *regs) @@ -2977,7 +2977,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0820_0)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* BTST.B #.W,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_0828_0)(uae_u32 opcode, struct regstruct *regs) @@ -2989,7 +2989,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0828_0)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BTST.B #.W,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_0830_0)(uae_u32 opcode, struct regstruct *regs) @@ -3002,7 +3002,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0830_0)(uae_u32 opcode, struct regstruct *reg { uae_s8 dst = get_byte (dsta); src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* BTST.B #.W,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_0838_0)(uae_u32 opcode, struct regstruct *regs) @@ -3013,7 +3013,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0838_0)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BTST.B #.W,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_0839_0)(uae_u32 opcode, struct regstruct *regs) @@ -3024,7 +3024,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0839_0)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 8); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* BTST.B #.W,(d16,PC) */ unsigned long REGPARAM2 CPUFUNC(op_083a_0)(uae_u32 opcode, struct regstruct *regs) @@ -3037,7 +3037,7 @@ unsigned long REGPARAM2 CPUFUNC(op_083a_0)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BTST.B #.W,(d8,PC,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_083b_0)(uae_u32 opcode, struct regstruct *regs) @@ -3052,7 +3052,7 @@ unsigned long REGPARAM2 CPUFUNC(op_083b_0)(uae_u32 opcode, struct regstruct *reg { uae_s8 dst = get_byte (dsta); src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* BTST.B #.W,#.B */ unsigned long REGPARAM2 CPUFUNC(op_083c_0)(uae_u32 opcode, struct regstruct *regs) @@ -3062,7 +3062,7 @@ unsigned long REGPARAM2 CPUFUNC(op_083c_0)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BCHG.L #.W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_0840_0)(uae_u32 opcode, struct regstruct *regs) @@ -3075,7 +3075,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0840_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); m68k_dreg(regs, dstreg) = (dst); }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* BCHG.B #.W,(An) */ unsigned long REGPARAM2 CPUFUNC(op_0850_0)(uae_u32 opcode, struct regstruct *regs) @@ -3089,7 +3089,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0850_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BCHG.B #.W,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_0858_0)(uae_u32 opcode, struct regstruct *regs) @@ -3104,7 +3104,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0858_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BCHG.B #.W,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_0860_0)(uae_u32 opcode, struct regstruct *regs) @@ -3120,7 +3120,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0860_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* BCHG.B #.W,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_0868_0)(uae_u32 opcode, struct regstruct *regs) @@ -3134,7 +3134,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0868_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* BCHG.B #.W,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_0870_0)(uae_u32 opcode, struct regstruct *regs) @@ -3149,7 +3149,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0870_0)(uae_u32 opcode, struct regstruct *reg dst ^= (1 << src); SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); -}}}}}return 22 * 256; +}}}}}return 22 * CYCLE_UNIT / 2; } /* BCHG.B #.W,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_0878_0)(uae_u32 opcode, struct regstruct *regs) @@ -3162,7 +3162,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0878_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* BCHG.B #.W,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_0879_0)(uae_u32 opcode, struct regstruct *regs) @@ -3175,7 +3175,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0879_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 8); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* BCHG.B #.W,(d16,PC) */ unsigned long REGPARAM2 CPUFUNC(op_087a_0)(uae_u32 opcode, struct regstruct *regs) @@ -3190,7 +3190,7 @@ unsigned long REGPARAM2 CPUFUNC(op_087a_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* BCHG.B #.W,(d8,PC,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_087b_0)(uae_u32 opcode, struct regstruct *regs) @@ -3207,7 +3207,7 @@ unsigned long REGPARAM2 CPUFUNC(op_087b_0)(uae_u32 opcode, struct regstruct *reg dst ^= (1 << src); SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); -}}}}}return 22 * 256; +}}}}}return 22 * CYCLE_UNIT / 2; } /* BCLR.L #.W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_0880_0)(uae_u32 opcode, struct regstruct *regs) @@ -3220,7 +3220,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0880_0)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); m68k_dreg(regs, dstreg) = (dst); }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* BCLR.B #.W,(An) */ unsigned long REGPARAM2 CPUFUNC(op_0890_0)(uae_u32 opcode, struct regstruct *regs) @@ -3234,7 +3234,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0890_0)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BCLR.B #.W,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_0898_0)(uae_u32 opcode, struct regstruct *regs) @@ -3249,7 +3249,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0898_0)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BCLR.B #.W,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_08a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -3265,7 +3265,7 @@ unsigned long REGPARAM2 CPUFUNC(op_08a0_0)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* BCLR.B #.W,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_08a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -3279,7 +3279,7 @@ unsigned long REGPARAM2 CPUFUNC(op_08a8_0)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* BCLR.B #.W,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_08b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -3294,7 +3294,7 @@ unsigned long REGPARAM2 CPUFUNC(op_08b0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); put_byte (dsta,dst); -}}}}}return 22 * 256; +}}}}}return 22 * CYCLE_UNIT / 2; } /* BCLR.B #.W,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_08b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -3307,7 +3307,7 @@ unsigned long REGPARAM2 CPUFUNC(op_08b8_0)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* BCLR.B #.W,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_08b9_0)(uae_u32 opcode, struct regstruct *regs) @@ -3320,7 +3320,7 @@ unsigned long REGPARAM2 CPUFUNC(op_08b9_0)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 8); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* BCLR.B #.W,(d16,PC) */ unsigned long REGPARAM2 CPUFUNC(op_08ba_0)(uae_u32 opcode, struct regstruct *regs) @@ -3335,7 +3335,7 @@ unsigned long REGPARAM2 CPUFUNC(op_08ba_0)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* BCLR.B #.W,(d8,PC,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_08bb_0)(uae_u32 opcode, struct regstruct *regs) @@ -3352,7 +3352,7 @@ unsigned long REGPARAM2 CPUFUNC(op_08bb_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); put_byte (dsta,dst); -}}}}}return 22 * 256; +}}}}}return 22 * CYCLE_UNIT / 2; } /* BSET.L #.W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_08c0_0)(uae_u32 opcode, struct regstruct *regs) @@ -3365,7 +3365,7 @@ unsigned long REGPARAM2 CPUFUNC(op_08c0_0)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); m68k_dreg(regs, dstreg) = (dst); }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* BSET.B #.W,(An) */ unsigned long REGPARAM2 CPUFUNC(op_08d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -3379,7 +3379,7 @@ unsigned long REGPARAM2 CPUFUNC(op_08d0_0)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BSET.B #.W,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_08d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -3394,7 +3394,7 @@ unsigned long REGPARAM2 CPUFUNC(op_08d8_0)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BSET.B #.W,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_08e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -3410,7 +3410,7 @@ unsigned long REGPARAM2 CPUFUNC(op_08e0_0)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* BSET.B #.W,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_08e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -3424,7 +3424,7 @@ unsigned long REGPARAM2 CPUFUNC(op_08e8_0)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* BSET.B #.W,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_08f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -3439,7 +3439,7 @@ unsigned long REGPARAM2 CPUFUNC(op_08f0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); dst |= (1 << src); put_byte (dsta,dst); -}}}}}return 22 * 256; +}}}}}return 22 * CYCLE_UNIT / 2; } /* BSET.B #.W,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_08f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -3452,7 +3452,7 @@ unsigned long REGPARAM2 CPUFUNC(op_08f8_0)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* BSET.B #.W,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_08f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -3465,7 +3465,7 @@ unsigned long REGPARAM2 CPUFUNC(op_08f9_0)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 8); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* BSET.B #.W,(d16,PC) */ unsigned long REGPARAM2 CPUFUNC(op_08fa_0)(uae_u32 opcode, struct regstruct *regs) @@ -3480,7 +3480,7 @@ unsigned long REGPARAM2 CPUFUNC(op_08fa_0)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* BSET.B #.W,(d8,PC,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_08fb_0)(uae_u32 opcode, struct regstruct *regs) @@ -3497,7 +3497,7 @@ unsigned long REGPARAM2 CPUFUNC(op_08fb_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); dst |= (1 << src); put_byte (dsta,dst); -}}}}}return 22 * 256; +}}}}}return 22 * CYCLE_UNIT / 2; } /* EOR.B #.B,Dn */ unsigned long REGPARAM2 CPUFUNC(op_0a00_0)(uae_u32 opcode, struct regstruct *regs) @@ -3511,7 +3511,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0a00_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* EOR.B #.B,(An) */ unsigned long REGPARAM2 CPUFUNC(op_0a10_0)(uae_u32 opcode, struct regstruct *regs) @@ -3526,7 +3526,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0a10_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 4); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* EOR.B #.B,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_0a18_0)(uae_u32 opcode, struct regstruct *regs) @@ -3542,7 +3542,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0a18_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 4); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* EOR.B #.B,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_0a20_0)(uae_u32 opcode, struct regstruct *regs) @@ -3559,7 +3559,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0a20_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 4); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* EOR.B #.B,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_0a28_0)(uae_u32 opcode, struct regstruct *regs) @@ -3574,7 +3574,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0a28_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 6); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* EOR.B #.B,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_0a30_0)(uae_u32 opcode, struct regstruct *regs) @@ -3590,7 +3590,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0a30_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); -}}}}}return 26 * 256; +}}}}}return 26 * CYCLE_UNIT / 2; } /* EOR.B #.B,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_0a38_0)(uae_u32 opcode, struct regstruct *regs) @@ -3604,7 +3604,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0a38_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 6); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* EOR.B #.B,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_0a39_0)(uae_u32 opcode, struct regstruct *regs) @@ -3618,7 +3618,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0a39_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 8); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* EORSR.B #.W */ unsigned long REGPARAM2 CPUFUNC(op_0a3c_0)(uae_u32 opcode, struct regstruct *regs) @@ -3629,7 +3629,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0a3c_0)(uae_u32 opcode, struct regstruct *reg regs->sr ^= src; MakeFromSR(regs); }} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* EOR.W #.W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_0a40_0)(uae_u32 opcode, struct regstruct *regs) @@ -3643,7 +3643,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0a40_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* EOR.W #.W,(An) */ unsigned long REGPARAM2 CPUFUNC(op_0a50_0)(uae_u32 opcode, struct regstruct *regs) @@ -3658,7 +3658,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0a50_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* EOR.W #.W,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_0a58_0)(uae_u32 opcode, struct regstruct *regs) @@ -3674,7 +3674,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0a58_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* EOR.W #.W,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_0a60_0)(uae_u32 opcode, struct regstruct *regs) @@ -3691,7 +3691,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0a60_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* EOR.W #.W,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_0a68_0)(uae_u32 opcode, struct regstruct *regs) @@ -3706,7 +3706,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0a68_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* EOR.W #.W,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_0a70_0)(uae_u32 opcode, struct regstruct *regs) @@ -3722,7 +3722,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0a70_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); -}}}}}return 22 * 256; +}}}}}return 22 * CYCLE_UNIT / 2; } /* EOR.W #.W,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_0a78_0)(uae_u32 opcode, struct regstruct *regs) @@ -3736,7 +3736,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0a78_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* EOR.W #.W,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_0a79_0)(uae_u32 opcode, struct regstruct *regs) @@ -3750,11 +3750,8 @@ unsigned long REGPARAM2 CPUFUNC(op_0a79_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 8); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } -#endif - -#ifdef PART_2 /* EORSR.W #.W */ unsigned long REGPARAM2 CPUFUNC(op_0a7c_0)(uae_u32 opcode, struct regstruct *regs) { @@ -3765,7 +3762,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0a7c_0)(uae_u32 opcode, struct regstruct *reg MakeFromSR(regs); }}} m68k_incpc (regs, 4); endlabel234: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* EOR.L #.L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_0a80_0)(uae_u32 opcode, struct regstruct *regs) @@ -3779,7 +3776,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0a80_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* EOR.L #.L,(An) */ unsigned long REGPARAM2 CPUFUNC(op_0a90_0)(uae_u32 opcode, struct regstruct *regs) @@ -3794,8 +3791,11 @@ unsigned long REGPARAM2 CPUFUNC(op_0a90_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 6); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } +#endif + +#ifdef PART_2 /* EOR.L #.L,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_0a98_0)(uae_u32 opcode, struct regstruct *regs) { @@ -3810,7 +3810,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0a98_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 6); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* EOR.L #.L,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_0aa0_0)(uae_u32 opcode, struct regstruct *regs) @@ -3827,7 +3827,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0aa0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 6); -return 30 * 256; +return 30 * CYCLE_UNIT / 2; } /* EOR.L #.L,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_0aa8_0)(uae_u32 opcode, struct regstruct *regs) @@ -3842,7 +3842,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0aa8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 8); -return 32 * 256; +return 32 * CYCLE_UNIT / 2; } /* EOR.L #.L,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_0ab0_0)(uae_u32 opcode, struct regstruct *regs) @@ -3858,7 +3858,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0ab0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); -}}}}}return 34 * 256; +}}}}}return 34 * CYCLE_UNIT / 2; } /* EOR.L #.L,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_0ab8_0)(uae_u32 opcode, struct regstruct *regs) @@ -3872,7 +3872,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0ab8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 8); -return 32 * 256; +return 32 * CYCLE_UNIT / 2; } /* EOR.L #.L,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_0ab9_0)(uae_u32 opcode, struct regstruct *regs) @@ -3886,7 +3886,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0ab9_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 10); -return 36 * 256; +return 36 * CYCLE_UNIT / 2; } /* CAS.B #.W,(An) */ #ifndef CPUEMU_68000_ONLY @@ -3909,7 +3909,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0ad0_0)(uae_u32 opcode, struct regstruct *reg if (GET_ZFLG (®s->ccrflags)){ put_byte (dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); }}}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } #endif /* CAS.B #.W,(An)+ */ @@ -3934,7 +3934,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0ad8_0)(uae_u32 opcode, struct regstruct *reg if (GET_ZFLG (®s->ccrflags)){ put_byte (dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); }}}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } #endif /* CAS.B #.W,-(An) */ @@ -3960,7 +3960,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0ae0_0)(uae_u32 opcode, struct regstruct *reg if (GET_ZFLG (®s->ccrflags)){ put_byte (dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); }}}}}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } #endif /* CAS.B #.W,(d16,An) */ @@ -3984,7 +3984,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0ae8_0)(uae_u32 opcode, struct regstruct *reg if (GET_ZFLG (®s->ccrflags)){ put_byte (dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); }}}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } #endif /* CAS.B #.W,(d8,An,Xn) */ @@ -4009,7 +4009,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0af0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); if (GET_ZFLG (®s->ccrflags)){ put_byte (dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); -}}}}}}}}}return 22 * 256; +}}}}}}}}}return 22 * CYCLE_UNIT / 2; } #endif /* CAS.B #.W,(xxx).W */ @@ -4032,7 +4032,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0af8_0)(uae_u32 opcode, struct regstruct *reg if (GET_ZFLG (®s->ccrflags)){ put_byte (dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); }}}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } #endif /* CAS.B #.W,(xxx).L */ @@ -4055,7 +4055,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0af9_0)(uae_u32 opcode, struct regstruct *reg if (GET_ZFLG (®s->ccrflags)){ put_byte (dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); }}}}}}}} m68k_incpc (regs, 8); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } #endif /* CMP.B #.B,Dn */ @@ -4073,7 +4073,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0c00_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CMP.B #.B,(An) */ unsigned long REGPARAM2 CPUFUNC(op_0c10_0)(uae_u32 opcode, struct regstruct *regs) @@ -4091,7 +4091,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0c10_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* CMP.B #.B,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_0c18_0)(uae_u32 opcode, struct regstruct *regs) @@ -4110,7 +4110,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0c18_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* CMP.B #.B,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_0c20_0)(uae_u32 opcode, struct regstruct *regs) @@ -4130,7 +4130,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0c20_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* CMP.B #.B,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_0c28_0)(uae_u32 opcode, struct regstruct *regs) @@ -4148,7 +4148,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0c28_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* CMP.B #.B,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_0c30_0)(uae_u32 opcode, struct regstruct *regs) @@ -4167,7 +4167,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0c30_0)(uae_u32 opcode, struct regstruct *reg SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}}return 22 * 256; +}}}}}}}}return 22 * CYCLE_UNIT / 2; } /* CMP.B #.B,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_0c38_0)(uae_u32 opcode, struct regstruct *regs) @@ -4184,7 +4184,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0c38_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* CMP.B #.B,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_0c39_0)(uae_u32 opcode, struct regstruct *regs) @@ -4201,7 +4201,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0c39_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 8); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* CMP.B #.B,(d16,PC) */ #ifndef CPUEMU_68000_ONLY @@ -4221,7 +4221,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0c3a_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } #endif /* CMP.B #.B,(d8,PC,Xn) */ @@ -4244,7 +4244,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0c3b_0)(uae_u32 opcode, struct regstruct *reg SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}}return 22 * 256; +}}}}}}}}return 22 * CYCLE_UNIT / 2; } #endif /* CMP.W #.W,Dn */ @@ -4262,7 +4262,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0c40_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* CMP.W #.W,(An) */ unsigned long REGPARAM2 CPUFUNC(op_0c50_0)(uae_u32 opcode, struct regstruct *regs) @@ -4280,7 +4280,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0c50_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CMP.W #.W,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_0c58_0)(uae_u32 opcode, struct regstruct *regs) @@ -4299,7 +4299,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0c58_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CMP.W #.W,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_0c60_0)(uae_u32 opcode, struct regstruct *regs) @@ -4319,7 +4319,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0c60_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* CMP.W #.W,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_0c68_0)(uae_u32 opcode, struct regstruct *regs) @@ -4337,7 +4337,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0c68_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* CMP.W #.W,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_0c70_0)(uae_u32 opcode, struct regstruct *regs) @@ -4356,7 +4356,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0c70_0)(uae_u32 opcode, struct regstruct *reg SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}}return 18 * 256; +}}}}}}}}return 18 * CYCLE_UNIT / 2; } /* CMP.W #.W,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_0c78_0)(uae_u32 opcode, struct regstruct *regs) @@ -4373,7 +4373,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0c78_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* CMP.W #.W,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_0c79_0)(uae_u32 opcode, struct regstruct *regs) @@ -4390,7 +4390,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0c79_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 8); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* CMP.W #.W,(d16,PC) */ #ifndef CPUEMU_68000_ONLY @@ -4410,7 +4410,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0c7a_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } #endif /* CMP.W #.W,(d8,PC,Xn) */ @@ -4433,7 +4433,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0c7b_0)(uae_u32 opcode, struct regstruct *reg SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}}return 18 * 256; +}}}}}}}}return 18 * CYCLE_UNIT / 2; } #endif /* CMP.L #.L,Dn */ @@ -4451,7 +4451,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0c80_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CMP.L #.L,(An) */ unsigned long REGPARAM2 CPUFUNC(op_0c90_0)(uae_u32 opcode, struct regstruct *regs) @@ -4469,7 +4469,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0c90_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* CMP.L #.L,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_0c98_0)(uae_u32 opcode, struct regstruct *regs) @@ -4488,7 +4488,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0c98_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* CMP.L #.L,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_0ca0_0)(uae_u32 opcode, struct regstruct *regs) @@ -4508,7 +4508,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0ca0_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 6); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* CMP.L #.L,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_0ca8_0)(uae_u32 opcode, struct regstruct *regs) @@ -4526,7 +4526,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0ca8_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 8); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* CMP.L #.L,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_0cb0_0)(uae_u32 opcode, struct regstruct *regs) @@ -4545,7 +4545,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0cb0_0)(uae_u32 opcode, struct regstruct *reg SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}}return 26 * 256; +}}}}}}}}return 26 * CYCLE_UNIT / 2; } /* CMP.L #.L,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_0cb8_0)(uae_u32 opcode, struct regstruct *regs) @@ -4562,7 +4562,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0cb8_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 8); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* CMP.L #.L,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_0cb9_0)(uae_u32 opcode, struct regstruct *regs) @@ -4579,7 +4579,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0cb9_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 10); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* CMP.L #.L,(d16,PC) */ #ifndef CPUEMU_68000_ONLY @@ -4599,7 +4599,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0cba_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 8); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } #endif /* CMP.L #.L,(d8,PC,Xn) */ @@ -4622,7 +4622,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0cbb_0)(uae_u32 opcode, struct regstruct *reg SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}}return 26 * 256; +}}}}}}}}return 26 * CYCLE_UNIT / 2; } #endif /* CAS.W #.W,(An) */ @@ -4646,7 +4646,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0cd0_0)(uae_u32 opcode, struct regstruct *reg if (GET_ZFLG (®s->ccrflags)){ put_word (dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); }}}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } #endif /* CAS.W #.W,(An)+ */ @@ -4671,7 +4671,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0cd8_0)(uae_u32 opcode, struct regstruct *reg if (GET_ZFLG (®s->ccrflags)){ put_word (dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); }}}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } #endif /* CAS.W #.W,-(An) */ @@ -4697,7 +4697,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0ce0_0)(uae_u32 opcode, struct regstruct *reg if (GET_ZFLG (®s->ccrflags)){ put_word (dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); }}}}}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } #endif /* CAS.W #.W,(d16,An) */ @@ -4721,7 +4721,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0ce8_0)(uae_u32 opcode, struct regstruct *reg if (GET_ZFLG (®s->ccrflags)){ put_word (dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); }}}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } #endif /* CAS.W #.W,(d8,An,Xn) */ @@ -4746,7 +4746,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0cf0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); if (GET_ZFLG (®s->ccrflags)){ put_word (dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); -}}}}}}}}}return 22 * 256; +}}}}}}}}}return 22 * CYCLE_UNIT / 2; } #endif /* CAS.W #.W,(xxx).W */ @@ -4769,7 +4769,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0cf8_0)(uae_u32 opcode, struct regstruct *reg if (GET_ZFLG (®s->ccrflags)){ put_word (dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); }}}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } #endif /* CAS.W #.W,(xxx).L */ @@ -4792,7 +4792,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0cf9_0)(uae_u32 opcode, struct regstruct *reg if (GET_ZFLG (®s->ccrflags)){ put_word (dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); }}}}}}}} m68k_incpc (regs, 8); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } #endif /* CAS2.W #.L */ @@ -4829,7 +4829,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0cfc_0)(uae_u32 opcode, struct regstruct *reg m68k_dreg(regs, (extra >> 6) & 7) = (m68k_dreg(regs, (extra >> 6) & 7) & ~0xffff) | (dst2 & 0xffff); } }} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* MOVES.B #.W,(An) */ @@ -4852,7 +4852,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0e10_0)(uae_u32 opcode, struct regstruct *reg } }}}}}} m68k_incpc (regs, 4); endlabel288: ; -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } #endif /* MOVES.B #.W,(An)+ */ @@ -4877,7 +4877,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0e18_0)(uae_u32 opcode, struct regstruct *reg } }}}}}} m68k_incpc (regs, 4); endlabel289: ; -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } #endif /* MOVES.B #.W,-(An) */ @@ -4904,7 +4904,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0e20_0)(uae_u32 opcode, struct regstruct *reg } }}}}}} m68k_incpc (regs, 4); endlabel290: ; -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } #endif /* MOVES.B #.W,(d16,An) */ @@ -4927,7 +4927,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0e28_0)(uae_u32 opcode, struct regstruct *reg } }}}}}} m68k_incpc (regs, 8); endlabel291: ; -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } #endif /* MOVES.B #.W,(d8,An,Xn) */ @@ -4952,7 +4952,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0e30_0)(uae_u32 opcode, struct regstruct *reg m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); } }}}}}}}endlabel292: ; -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } #endif /* MOVES.B #.W,(xxx).W */ @@ -4974,7 +4974,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0e38_0)(uae_u32 opcode, struct regstruct *reg } }}}}}} m68k_incpc (regs, 8); endlabel293: ; -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } #endif /* MOVES.B #.W,(xxx).L */ @@ -4996,7 +4996,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0e39_0)(uae_u32 opcode, struct regstruct *reg } }}}}}} m68k_incpc (regs, 12); endlabel294: ; -return 32 * 256; +return 32 * CYCLE_UNIT / 2; } #endif /* MOVES.W #.W,(An) */ @@ -5019,7 +5019,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0e50_0)(uae_u32 opcode, struct regstruct *reg } }}}}}} m68k_incpc (regs, 4); endlabel295: ; -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } #endif /* MOVES.W #.W,(An)+ */ @@ -5044,7 +5044,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0e58_0)(uae_u32 opcode, struct regstruct *reg } }}}}}} m68k_incpc (regs, 4); endlabel296: ; -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } #endif /* MOVES.W #.W,-(An) */ @@ -5071,7 +5071,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0e60_0)(uae_u32 opcode, struct regstruct *reg } }}}}}} m68k_incpc (regs, 4); endlabel297: ; -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } #endif /* MOVES.W #.W,(d16,An) */ @@ -5094,7 +5094,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0e68_0)(uae_u32 opcode, struct regstruct *reg } }}}}}} m68k_incpc (regs, 8); endlabel298: ; -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } #endif /* MOVES.W #.W,(d8,An,Xn) */ @@ -5119,7 +5119,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0e70_0)(uae_u32 opcode, struct regstruct *reg m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); } }}}}}}}endlabel299: ; -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } #endif /* MOVES.W #.W,(xxx).W */ @@ -5141,7 +5141,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0e78_0)(uae_u32 opcode, struct regstruct *reg } }}}}}} m68k_incpc (regs, 8); endlabel300: ; -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } #endif /* MOVES.W #.W,(xxx).L */ @@ -5163,7 +5163,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0e79_0)(uae_u32 opcode, struct regstruct *reg } }}}}}} m68k_incpc (regs, 12); endlabel301: ; -return 32 * 256; +return 32 * CYCLE_UNIT / 2; } #endif /* MOVES.L #.W,(An) */ @@ -5186,7 +5186,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0e90_0)(uae_u32 opcode, struct regstruct *reg } }}}}}} m68k_incpc (regs, 4); endlabel302: ; -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } #endif /* MOVES.L #.W,(An)+ */ @@ -5211,7 +5211,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0e98_0)(uae_u32 opcode, struct regstruct *reg } }}}}}} m68k_incpc (regs, 4); endlabel303: ; -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } #endif /* MOVES.L #.W,-(An) */ @@ -5238,7 +5238,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0ea0_0)(uae_u32 opcode, struct regstruct *reg } }}}}}} m68k_incpc (regs, 4); endlabel304: ; -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } #endif /* MOVES.L #.W,(d16,An) */ @@ -5261,7 +5261,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0ea8_0)(uae_u32 opcode, struct regstruct *reg } }}}}}} m68k_incpc (regs, 8); endlabel305: ; -return 32 * 256; +return 32 * CYCLE_UNIT / 2; } #endif /* MOVES.L #.W,(d8,An,Xn) */ @@ -5286,7 +5286,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0eb0_0)(uae_u32 opcode, struct regstruct *reg m68k_dreg(regs, (extra >> 12) & 7) = (src); } }}}}}}}endlabel306: ; -return 36 * 256; +return 36 * CYCLE_UNIT / 2; } #endif /* MOVES.L #.W,(xxx).W */ @@ -5308,7 +5308,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0eb8_0)(uae_u32 opcode, struct regstruct *reg } }}}}}} m68k_incpc (regs, 8); endlabel307: ; -return 32 * 256; +return 32 * CYCLE_UNIT / 2; } #endif /* MOVES.L #.W,(xxx).L */ @@ -5330,7 +5330,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0eb9_0)(uae_u32 opcode, struct regstruct *reg } }}}}}} m68k_incpc (regs, 12); endlabel308: ; -return 40 * 256; +return 40 * CYCLE_UNIT / 2; } #endif /* CAS.L #.W,(An) */ @@ -5354,7 +5354,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0ed0_0)(uae_u32 opcode, struct regstruct *reg if (GET_ZFLG (®s->ccrflags)){ put_long (dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = dst; }}}}}}}} m68k_incpc (regs, 4); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } #endif /* CAS.L #.W,(An)+ */ @@ -5379,7 +5379,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0ed8_0)(uae_u32 opcode, struct regstruct *reg if (GET_ZFLG (®s->ccrflags)){ put_long (dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = dst; }}}}}}}} m68k_incpc (regs, 4); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } #endif /* CAS.L #.W,-(An) */ @@ -5405,7 +5405,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0ee0_0)(uae_u32 opcode, struct regstruct *reg if (GET_ZFLG (®s->ccrflags)){ put_long (dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = dst; }}}}}}}} m68k_incpc (regs, 4); -return 26 * 256; +return 26 * CYCLE_UNIT / 2; } #endif /* CAS.L #.W,(d16,An) */ @@ -5429,7 +5429,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0ee8_0)(uae_u32 opcode, struct regstruct *reg if (GET_ZFLG (®s->ccrflags)){ put_long (dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = dst; }}}}}}}} m68k_incpc (regs, 6); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } #endif /* CAS.L #.W,(d8,An,Xn) */ @@ -5454,7 +5454,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0ef0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); if (GET_ZFLG (®s->ccrflags)){ put_long (dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = dst; -}}}}}}}}}return 30 * 256; +}}}}}}}}}return 30 * CYCLE_UNIT / 2; } #endif /* CAS.L #.W,(xxx).W */ @@ -5477,7 +5477,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0ef8_0)(uae_u32 opcode, struct regstruct *reg if (GET_ZFLG (®s->ccrflags)){ put_long (dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = dst; }}}}}}}} m68k_incpc (regs, 6); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } #endif /* CAS.L #.W,(xxx).L */ @@ -5500,7 +5500,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0ef9_0)(uae_u32 opcode, struct regstruct *reg if (GET_ZFLG (®s->ccrflags)){ put_long (dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = dst; }}}}}}}} m68k_incpc (regs, 8); -return 32 * 256; +return 32 * CYCLE_UNIT / 2; } #endif /* CAS2.L #.L */ @@ -5537,7 +5537,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0efc_0)(uae_u32 opcode, struct regstruct *reg m68k_dreg(regs, (extra >> 6) & 7) = dst2; } }} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* MOVE.B Dn,Dn */ @@ -5551,7 +5551,7 @@ unsigned long REGPARAM2 CPUFUNC(op_1000_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 2); -}}}return 4 * 256; +}}}return 4 * CYCLE_UNIT / 2; } /* MOVE.B (An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_1010_0)(uae_u32 opcode, struct regstruct *regs) @@ -5565,7 +5565,7 @@ unsigned long REGPARAM2 CPUFUNC(op_1010_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 8 * 256; +}}}}return 8 * CYCLE_UNIT / 2; } /* MOVE.B (An)+,Dn */ unsigned long REGPARAM2 CPUFUNC(op_1018_0)(uae_u32 opcode, struct regstruct *regs) @@ -5580,7 +5580,7 @@ unsigned long REGPARAM2 CPUFUNC(op_1018_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 8 * 256; +}}}}return 8 * CYCLE_UNIT / 2; } /* MOVE.B -(An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_1020_0)(uae_u32 opcode, struct regstruct *regs) @@ -5596,7 +5596,7 @@ unsigned long REGPARAM2 CPUFUNC(op_1020_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 10 * 256; +}}}}return 10 * CYCLE_UNIT / 2; } /* MOVE.B (d16,An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_1028_0)(uae_u32 opcode, struct regstruct *regs) @@ -5610,7 +5610,7 @@ unsigned long REGPARAM2 CPUFUNC(op_1028_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.B (d8,An,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_1030_0)(uae_u32 opcode, struct regstruct *regs) @@ -5625,7 +5625,7 @@ unsigned long REGPARAM2 CPUFUNC(op_1030_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_1038_0)(uae_u32 opcode, struct regstruct *regs) @@ -5638,7 +5638,7 @@ unsigned long REGPARAM2 CPUFUNC(op_1038_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_1039_0)(uae_u32 opcode, struct regstruct *regs) @@ -5651,7 +5651,7 @@ unsigned long REGPARAM2 CPUFUNC(op_1039_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B (d16,PC),Dn */ unsigned long REGPARAM2 CPUFUNC(op_103a_0)(uae_u32 opcode, struct regstruct *regs) @@ -5665,7 +5665,7 @@ unsigned long REGPARAM2 CPUFUNC(op_103a_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.B (d8,PC,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_103b_0)(uae_u32 opcode, struct regstruct *regs) @@ -5681,7 +5681,7 @@ unsigned long REGPARAM2 CPUFUNC(op_103b_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* MOVE.B #.B,Dn */ unsigned long REGPARAM2 CPUFUNC(op_103c_0)(uae_u32 opcode, struct regstruct *regs) @@ -5693,7 +5693,7 @@ unsigned long REGPARAM2 CPUFUNC(op_103c_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}return 12 * 256; +}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.B Dn,(An) */ unsigned long REGPARAM2 CPUFUNC(op_1080_0)(uae_u32 opcode, struct regstruct *regs) @@ -5707,7 +5707,7 @@ unsigned long REGPARAM2 CPUFUNC(op_1080_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 2); -}}}return 8 * 256; +}}}return 8 * CYCLE_UNIT / 2; } /* MOVE.B (An),(An) */ unsigned long REGPARAM2 CPUFUNC(op_1090_0)(uae_u32 opcode, struct regstruct *regs) @@ -5722,7 +5722,7 @@ unsigned long REGPARAM2 CPUFUNC(op_1090_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.B (An)+,(An) */ unsigned long REGPARAM2 CPUFUNC(op_1098_0)(uae_u32 opcode, struct regstruct *regs) @@ -5738,7 +5738,7 @@ unsigned long REGPARAM2 CPUFUNC(op_1098_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.B -(An),(An) */ unsigned long REGPARAM2 CPUFUNC(op_10a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -5755,7 +5755,7 @@ unsigned long REGPARAM2 CPUFUNC(op_10a0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* MOVE.B (d16,An),(An) */ unsigned long REGPARAM2 CPUFUNC(op_10a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -5770,7 +5770,7 @@ unsigned long REGPARAM2 CPUFUNC(op_10a8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B (d8,An,Xn),(An) */ unsigned long REGPARAM2 CPUFUNC(op_10b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -5786,7 +5786,7 @@ unsigned long REGPARAM2 CPUFUNC(op_10b0_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).W,(An) */ unsigned long REGPARAM2 CPUFUNC(op_10b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -5800,7 +5800,7 @@ unsigned long REGPARAM2 CPUFUNC(op_10b8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).L,(An) */ unsigned long REGPARAM2 CPUFUNC(op_10b9_0)(uae_u32 opcode, struct regstruct *regs) @@ -5814,7 +5814,7 @@ unsigned long REGPARAM2 CPUFUNC(op_10b9_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.B (d16,PC),(An) */ unsigned long REGPARAM2 CPUFUNC(op_10ba_0)(uae_u32 opcode, struct regstruct *regs) @@ -5829,7 +5829,7 @@ unsigned long REGPARAM2 CPUFUNC(op_10ba_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B (d8,PC,Xn),(An) */ unsigned long REGPARAM2 CPUFUNC(op_10bb_0)(uae_u32 opcode, struct regstruct *regs) @@ -5846,7 +5846,7 @@ unsigned long REGPARAM2 CPUFUNC(op_10bb_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.B #.B,(An) */ unsigned long REGPARAM2 CPUFUNC(op_10bc_0)(uae_u32 opcode, struct regstruct *regs) @@ -5859,7 +5859,7 @@ unsigned long REGPARAM2 CPUFUNC(op_10bc_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}return 16 * 256; +}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B Dn,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_10c0_0)(uae_u32 opcode, struct regstruct *regs) @@ -5874,7 +5874,7 @@ unsigned long REGPARAM2 CPUFUNC(op_10c0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 2); -}}}return 8 * 256; +}}}return 8 * CYCLE_UNIT / 2; } /* MOVE.B (An),(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_10d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -5890,7 +5890,7 @@ unsigned long REGPARAM2 CPUFUNC(op_10d0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.B (An)+,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_10d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -5907,7 +5907,7 @@ unsigned long REGPARAM2 CPUFUNC(op_10d8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.B -(An),(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_10e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -5925,7 +5925,7 @@ unsigned long REGPARAM2 CPUFUNC(op_10e0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* MOVE.B (d16,An),(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_10e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -5941,7 +5941,7 @@ unsigned long REGPARAM2 CPUFUNC(op_10e8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B (d8,An,Xn),(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_10f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -5958,7 +5958,7 @@ unsigned long REGPARAM2 CPUFUNC(op_10f0_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).W,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_10f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -5973,7 +5973,7 @@ unsigned long REGPARAM2 CPUFUNC(op_10f8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).L,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_10f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -5988,7 +5988,7 @@ unsigned long REGPARAM2 CPUFUNC(op_10f9_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.B (d16,PC),(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_10fa_0)(uae_u32 opcode, struct regstruct *regs) @@ -6004,7 +6004,7 @@ unsigned long REGPARAM2 CPUFUNC(op_10fa_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B (d8,PC,Xn),(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_10fb_0)(uae_u32 opcode, struct regstruct *regs) @@ -6022,7 +6022,7 @@ unsigned long REGPARAM2 CPUFUNC(op_10fb_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.B #.B,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_10fc_0)(uae_u32 opcode, struct regstruct *regs) @@ -6036,7 +6036,7 @@ unsigned long REGPARAM2 CPUFUNC(op_10fc_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}return 16 * 256; +}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B Dn,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_1100_0)(uae_u32 opcode, struct regstruct *regs) @@ -6052,7 +6052,7 @@ unsigned long REGPARAM2 CPUFUNC(op_1100_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 2); -}}}return 8 * 256; +}}}return 8 * CYCLE_UNIT / 2; } /* MOVE.B (An),-(An) */ unsigned long REGPARAM2 CPUFUNC(op_1110_0)(uae_u32 opcode, struct regstruct *regs) @@ -6069,7 +6069,7 @@ unsigned long REGPARAM2 CPUFUNC(op_1110_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.B (An)+,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_1118_0)(uae_u32 opcode, struct regstruct *regs) @@ -6087,7 +6087,7 @@ unsigned long REGPARAM2 CPUFUNC(op_1118_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.B -(An),-(An) */ unsigned long REGPARAM2 CPUFUNC(op_1120_0)(uae_u32 opcode, struct regstruct *regs) @@ -6106,7 +6106,7 @@ unsigned long REGPARAM2 CPUFUNC(op_1120_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* MOVE.B (d16,An),-(An) */ unsigned long REGPARAM2 CPUFUNC(op_1128_0)(uae_u32 opcode, struct regstruct *regs) @@ -6123,7 +6123,7 @@ unsigned long REGPARAM2 CPUFUNC(op_1128_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B (d8,An,Xn),-(An) */ unsigned long REGPARAM2 CPUFUNC(op_1130_0)(uae_u32 opcode, struct regstruct *regs) @@ -6141,7 +6141,7 @@ unsigned long REGPARAM2 CPUFUNC(op_1130_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).W,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_1138_0)(uae_u32 opcode, struct regstruct *regs) @@ -6157,7 +6157,7 @@ unsigned long REGPARAM2 CPUFUNC(op_1138_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).L,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_1139_0)(uae_u32 opcode, struct regstruct *regs) @@ -6173,7 +6173,7 @@ unsigned long REGPARAM2 CPUFUNC(op_1139_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.B (d16,PC),-(An) */ unsigned long REGPARAM2 CPUFUNC(op_113a_0)(uae_u32 opcode, struct regstruct *regs) @@ -6190,7 +6190,7 @@ unsigned long REGPARAM2 CPUFUNC(op_113a_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B (d8,PC,Xn),-(An) */ unsigned long REGPARAM2 CPUFUNC(op_113b_0)(uae_u32 opcode, struct regstruct *regs) @@ -6209,7 +6209,7 @@ unsigned long REGPARAM2 CPUFUNC(op_113b_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.B #.B,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_113c_0)(uae_u32 opcode, struct regstruct *regs) @@ -6224,7 +6224,7 @@ unsigned long REGPARAM2 CPUFUNC(op_113c_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}return 16 * 256; +}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B Dn,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_1140_0)(uae_u32 opcode, struct regstruct *regs) @@ -6238,7 +6238,7 @@ unsigned long REGPARAM2 CPUFUNC(op_1140_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}return 12 * 256; +}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.B (An),(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_1150_0)(uae_u32 opcode, struct regstruct *regs) @@ -6253,7 +6253,7 @@ unsigned long REGPARAM2 CPUFUNC(op_1150_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B (An)+,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_1158_0)(uae_u32 opcode, struct regstruct *regs) @@ -6269,7 +6269,7 @@ unsigned long REGPARAM2 CPUFUNC(op_1158_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B -(An),(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_1160_0)(uae_u32 opcode, struct regstruct *regs) @@ -6286,7 +6286,7 @@ unsigned long REGPARAM2 CPUFUNC(op_1160_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.B (d16,An),(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_1168_0)(uae_u32 opcode, struct regstruct *regs) @@ -6301,7 +6301,7 @@ unsigned long REGPARAM2 CPUFUNC(op_1168_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.B (d8,An,Xn),(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_1170_0)(uae_u32 opcode, struct regstruct *regs) @@ -6318,7 +6318,7 @@ unsigned long REGPARAM2 CPUFUNC(op_1170_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 2); -}}}}}return 22 * 256; +}}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).W,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_1178_0)(uae_u32 opcode, struct regstruct *regs) @@ -6332,7 +6332,7 @@ unsigned long REGPARAM2 CPUFUNC(op_1178_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).L,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_1179_0)(uae_u32 opcode, struct regstruct *regs) @@ -6346,7 +6346,7 @@ unsigned long REGPARAM2 CPUFUNC(op_1179_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 8); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.B (d16,PC),(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_117a_0)(uae_u32 opcode, struct regstruct *regs) @@ -6361,7 +6361,7 @@ unsigned long REGPARAM2 CPUFUNC(op_117a_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.B (d8,PC,Xn),(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_117b_0)(uae_u32 opcode, struct regstruct *regs) @@ -6379,7 +6379,7 @@ unsigned long REGPARAM2 CPUFUNC(op_117b_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 2); -}}}}}return 22 * 256; +}}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.B #.B,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_117c_0)(uae_u32 opcode, struct regstruct *regs) @@ -6392,7 +6392,7 @@ unsigned long REGPARAM2 CPUFUNC(op_117c_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 6); -}}}return 20 * 256; +}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.B Dn,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_1180_0)(uae_u32 opcode, struct regstruct *regs) @@ -6407,7 +6407,7 @@ unsigned long REGPARAM2 CPUFUNC(op_1180_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* MOVE.B (An),(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_1190_0)(uae_u32 opcode, struct regstruct *regs) @@ -6423,7 +6423,7 @@ unsigned long REGPARAM2 CPUFUNC(op_1190_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.B (An)+,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_1198_0)(uae_u32 opcode, struct regstruct *regs) @@ -6440,7 +6440,7 @@ unsigned long REGPARAM2 CPUFUNC(op_1198_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.B -(An),(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_11a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -6458,7 +6458,7 @@ unsigned long REGPARAM2 CPUFUNC(op_11a0_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); -}}}}}return 20 * 256; +}}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.B (d16,An),(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_11a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -6474,7 +6474,7 @@ unsigned long REGPARAM2 CPUFUNC(op_11a8_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); -}}}}}return 22 * 256; +}}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.B (d8,An,Xn),(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_11b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -6491,7 +6491,7 @@ unsigned long REGPARAM2 CPUFUNC(op_11b0_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); -}}}}}}return 24 * 256; +}}}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).W,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_11b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -6506,7 +6506,7 @@ unsigned long REGPARAM2 CPUFUNC(op_11b8_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); -}}}}}return 22 * 256; +}}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).L,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_11b9_0)(uae_u32 opcode, struct regstruct *regs) @@ -6521,7 +6521,7 @@ unsigned long REGPARAM2 CPUFUNC(op_11b9_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); -}}}}}return 26 * 256; +}}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.B (d16,PC),(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_11ba_0)(uae_u32 opcode, struct regstruct *regs) @@ -6537,7 +6537,7 @@ unsigned long REGPARAM2 CPUFUNC(op_11ba_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); -}}}}}return 22 * 256; +}}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.B (d8,PC,Xn),(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_11bb_0)(uae_u32 opcode, struct regstruct *regs) @@ -6555,7 +6555,7 @@ unsigned long REGPARAM2 CPUFUNC(op_11bb_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); -}}}}}}return 24 * 256; +}}}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.B #.B,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_11bc_0)(uae_u32 opcode, struct regstruct *regs) @@ -6569,7 +6569,7 @@ unsigned long REGPARAM2 CPUFUNC(op_11bc_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); -}}}}return 22 * 256; +}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.B Dn,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_11c0_0)(uae_u32 opcode, struct regstruct *regs) @@ -6582,7 +6582,7 @@ unsigned long REGPARAM2 CPUFUNC(op_11c0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}return 12 * 256; +}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.B (An),(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_11d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -6596,7 +6596,7 @@ unsigned long REGPARAM2 CPUFUNC(op_11d0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B (An)+,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_11d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -6611,7 +6611,7 @@ unsigned long REGPARAM2 CPUFUNC(op_11d8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B -(An),(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_11e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -6627,7 +6627,7 @@ unsigned long REGPARAM2 CPUFUNC(op_11e0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.B (d16,An),(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_11e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -6641,7 +6641,7 @@ unsigned long REGPARAM2 CPUFUNC(op_11e8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.B (d8,An,Xn),(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_11f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -6657,7 +6657,7 @@ unsigned long REGPARAM2 CPUFUNC(op_11f0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 2); -}}}}}return 22 * 256; +}}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).W,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_11f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -6670,7 +6670,7 @@ unsigned long REGPARAM2 CPUFUNC(op_11f8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).L,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_11f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -6683,7 +6683,7 @@ unsigned long REGPARAM2 CPUFUNC(op_11f9_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 8); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.B (d16,PC),(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_11fa_0)(uae_u32 opcode, struct regstruct *regs) @@ -6697,7 +6697,7 @@ unsigned long REGPARAM2 CPUFUNC(op_11fa_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.B (d8,PC,Xn),(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_11fb_0)(uae_u32 opcode, struct regstruct *regs) @@ -6714,7 +6714,7 @@ unsigned long REGPARAM2 CPUFUNC(op_11fb_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 2); -}}}}}return 22 * 256; +}}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.B #.B,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_11fc_0)(uae_u32 opcode, struct regstruct *regs) @@ -6726,7 +6726,7 @@ unsigned long REGPARAM2 CPUFUNC(op_11fc_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 6); -}}}return 20 * 256; +}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.B Dn,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_13c0_0)(uae_u32 opcode, struct regstruct *regs) @@ -6739,7 +6739,7 @@ unsigned long REGPARAM2 CPUFUNC(op_13c0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 6); -}}}return 16 * 256; +}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B (An),(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_13d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -6753,7 +6753,7 @@ unsigned long REGPARAM2 CPUFUNC(op_13d0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.B (An)+,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_13d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -6768,7 +6768,7 @@ unsigned long REGPARAM2 CPUFUNC(op_13d8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.B -(An),(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_13e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -6784,7 +6784,7 @@ unsigned long REGPARAM2 CPUFUNC(op_13e0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 22 * 256; +}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.B (d16,An),(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_13e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -6798,7 +6798,7 @@ unsigned long REGPARAM2 CPUFUNC(op_13e8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 8); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.B (d8,An,Xn),(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_13f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -6814,7 +6814,7 @@ unsigned long REGPARAM2 CPUFUNC(op_13f0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}}return 26 * 256; +}}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).W,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_13f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -6827,7 +6827,7 @@ unsigned long REGPARAM2 CPUFUNC(op_13f8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 8); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).L,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_13f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -6840,7 +6840,7 @@ unsigned long REGPARAM2 CPUFUNC(op_13f9_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 10); -}}}}return 28 * 256; +}}}}return 28 * CYCLE_UNIT / 2; } /* MOVE.B (d16,PC),(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_13fa_0)(uae_u32 opcode, struct regstruct *regs) @@ -6854,7 +6854,7 @@ unsigned long REGPARAM2 CPUFUNC(op_13fa_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 8); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.B (d8,PC,Xn),(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_13fb_0)(uae_u32 opcode, struct regstruct *regs) @@ -6871,7 +6871,7 @@ unsigned long REGPARAM2 CPUFUNC(op_13fb_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}}return 26 * 256; +}}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.B #.B,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_13fc_0)(uae_u32 opcode, struct regstruct *regs) @@ -6883,7 +6883,7 @@ unsigned long REGPARAM2 CPUFUNC(op_13fc_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 8); -}}}return 24 * 256; +}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.L Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_2000_0)(uae_u32 opcode, struct regstruct *regs) @@ -6896,7 +6896,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2000_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 2); -}}}return 4 * 256; +}}}return 4 * CYCLE_UNIT / 2; } /* MOVE.L An,Dn */ unsigned long REGPARAM2 CPUFUNC(op_2008_0)(uae_u32 opcode, struct regstruct *regs) @@ -6909,7 +6909,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2008_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 2); -}}}return 4 * 256; +}}}return 4 * CYCLE_UNIT / 2; } /* MOVE.L (An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_2010_0)(uae_u32 opcode, struct regstruct *regs) @@ -6923,7 +6923,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2010_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.L (An)+,Dn */ unsigned long REGPARAM2 CPUFUNC(op_2018_0)(uae_u32 opcode, struct regstruct *regs) @@ -6938,7 +6938,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2018_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.L -(An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_2020_0)(uae_u32 opcode, struct regstruct *regs) @@ -6954,7 +6954,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2020_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* MOVE.L (d16,An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_2028_0)(uae_u32 opcode, struct regstruct *regs) @@ -6968,7 +6968,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2028_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.L (d8,An,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_2030_0)(uae_u32 opcode, struct regstruct *regs) @@ -6983,7 +6983,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2030_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.L (xxx).W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_2038_0)(uae_u32 opcode, struct regstruct *regs) @@ -6996,7 +6996,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2038_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.L (xxx).L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_2039_0)(uae_u32 opcode, struct regstruct *regs) @@ -7009,7 +7009,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2039_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.L (d16,PC),Dn */ unsigned long REGPARAM2 CPUFUNC(op_203a_0)(uae_u32 opcode, struct regstruct *regs) @@ -7023,7 +7023,7 @@ unsigned long REGPARAM2 CPUFUNC(op_203a_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.L (d8,PC,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_203b_0)(uae_u32 opcode, struct regstruct *regs) @@ -7039,7 +7039,7 @@ unsigned long REGPARAM2 CPUFUNC(op_203b_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.L #.L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_203c_0)(uae_u32 opcode, struct regstruct *regs) @@ -7051,7 +7051,7 @@ unsigned long REGPARAM2 CPUFUNC(op_203c_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); -}}}return 12 * 256; +}}}return 12 * CYCLE_UNIT / 2; } /* MOVEA.L Dn,An */ unsigned long REGPARAM2 CPUFUNC(op_2040_0)(uae_u32 opcode, struct regstruct *regs) @@ -7061,7 +7061,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2040_0)(uae_u32 opcode, struct regstruct *reg {{ uae_s32 src = m68k_dreg(regs, srcreg); { m68k_areg(regs, dstreg) = (src); m68k_incpc (regs, 2); -}}}return 4 * 256; +}}}return 4 * CYCLE_UNIT / 2; } /* MOVEA.L An,An */ unsigned long REGPARAM2 CPUFUNC(op_2048_0)(uae_u32 opcode, struct regstruct *regs) @@ -7071,7 +7071,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2048_0)(uae_u32 opcode, struct regstruct *reg {{ uae_s32 src = m68k_areg(regs, srcreg); { m68k_areg(regs, dstreg) = (src); m68k_incpc (regs, 2); -}}}return 4 * 256; +}}}return 4 * CYCLE_UNIT / 2; } /* MOVEA.L (An),An */ unsigned long REGPARAM2 CPUFUNC(op_2050_0)(uae_u32 opcode, struct regstruct *regs) @@ -7082,7 +7082,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2050_0)(uae_u32 opcode, struct regstruct *reg { uae_s32 src = get_long (srca); { m68k_areg(regs, dstreg) = (src); m68k_incpc (regs, 2); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVEA.L (An)+,An */ unsigned long REGPARAM2 CPUFUNC(op_2058_0)(uae_u32 opcode, struct regstruct *regs) @@ -7094,7 +7094,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2058_0)(uae_u32 opcode, struct regstruct *reg m68k_areg(regs, srcreg) += 4; { m68k_areg(regs, dstreg) = (src); m68k_incpc (regs, 2); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVEA.L -(An),An */ unsigned long REGPARAM2 CPUFUNC(op_2060_0)(uae_u32 opcode, struct regstruct *regs) @@ -7107,7 +7107,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2060_0)(uae_u32 opcode, struct regstruct *reg m68k_areg (regs, srcreg) = srca; { m68k_areg(regs, dstreg) = (src); m68k_incpc (regs, 2); -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* MOVEA.L (d16,An),An */ unsigned long REGPARAM2 CPUFUNC(op_2068_0)(uae_u32 opcode, struct regstruct *regs) @@ -7118,7 +7118,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2068_0)(uae_u32 opcode, struct regstruct *reg { uae_s32 src = get_long (srca); { m68k_areg(regs, dstreg) = (src); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVEA.L (d8,An,Xn),An */ unsigned long REGPARAM2 CPUFUNC(op_2070_0)(uae_u32 opcode, struct regstruct *regs) @@ -7130,7 +7130,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2070_0)(uae_u32 opcode, struct regstruct *reg { srca = get_disp_ea_020(regs, m68k_areg(regs, srcreg), next_iword(regs)); { uae_s32 src = get_long (srca); { m68k_areg(regs, dstreg) = (src); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* MOVEA.L (xxx).W,An */ unsigned long REGPARAM2 CPUFUNC(op_2078_0)(uae_u32 opcode, struct regstruct *regs) @@ -7140,7 +7140,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2078_0)(uae_u32 opcode, struct regstruct *reg { uae_s32 src = get_long (srca); { m68k_areg(regs, dstreg) = (src); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVEA.L (xxx).L,An */ unsigned long REGPARAM2 CPUFUNC(op_2079_0)(uae_u32 opcode, struct regstruct *regs) @@ -7150,7 +7150,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2079_0)(uae_u32 opcode, struct regstruct *reg { uae_s32 src = get_long (srca); { m68k_areg(regs, dstreg) = (src); m68k_incpc (regs, 6); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVEA.L (d16,PC),An */ unsigned long REGPARAM2 CPUFUNC(op_207a_0)(uae_u32 opcode, struct regstruct *regs) @@ -7161,7 +7161,7 @@ unsigned long REGPARAM2 CPUFUNC(op_207a_0)(uae_u32 opcode, struct regstruct *reg { uae_s32 src = get_long (srca); { m68k_areg(regs, dstreg) = (src); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVEA.L (d8,PC,Xn),An */ unsigned long REGPARAM2 CPUFUNC(op_207b_0)(uae_u32 opcode, struct regstruct *regs) @@ -7174,7 +7174,7 @@ unsigned long REGPARAM2 CPUFUNC(op_207b_0)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_020(regs, tmppc, next_iword(regs)); { uae_s32 src = get_long (srca); { m68k_areg(regs, dstreg) = (src); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* MOVEA.L #.L,An */ unsigned long REGPARAM2 CPUFUNC(op_207c_0)(uae_u32 opcode, struct regstruct *regs) @@ -7183,7 +7183,7 @@ unsigned long REGPARAM2 CPUFUNC(op_207c_0)(uae_u32 opcode, struct regstruct *reg {{ uae_s32 src = get_ilong (regs, 2); { m68k_areg(regs, dstreg) = (src); m68k_incpc (regs, 6); -}}}return 12 * 256; +}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.L Dn,(An) */ unsigned long REGPARAM2 CPUFUNC(op_2080_0)(uae_u32 opcode, struct regstruct *regs) @@ -7197,7 +7197,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2080_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 2); -}}}return 12 * 256; +}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.L An,(An) */ unsigned long REGPARAM2 CPUFUNC(op_2088_0)(uae_u32 opcode, struct regstruct *regs) @@ -7211,7 +7211,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2088_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 2); -}}}return 12 * 256; +}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.L (An),(An) */ unsigned long REGPARAM2 CPUFUNC(op_2090_0)(uae_u32 opcode, struct regstruct *regs) @@ -7226,7 +7226,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2090_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.L (An)+,(An) */ unsigned long REGPARAM2 CPUFUNC(op_2098_0)(uae_u32 opcode, struct regstruct *regs) @@ -7242,7 +7242,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2098_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.L -(An),(An) */ unsigned long REGPARAM2 CPUFUNC(op_20a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -7259,7 +7259,7 @@ unsigned long REGPARAM2 CPUFUNC(op_20a0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 22 * 256; +}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.L (d16,An),(An) */ unsigned long REGPARAM2 CPUFUNC(op_20a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -7274,7 +7274,7 @@ unsigned long REGPARAM2 CPUFUNC(op_20a8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.L (d8,An,Xn),(An) */ unsigned long REGPARAM2 CPUFUNC(op_20b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -7290,7 +7290,7 @@ unsigned long REGPARAM2 CPUFUNC(op_20b0_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); -}}}}}return 26 * 256; +}}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.L (xxx).W,(An) */ unsigned long REGPARAM2 CPUFUNC(op_20b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -7304,7 +7304,7 @@ unsigned long REGPARAM2 CPUFUNC(op_20b8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.L (xxx).L,(An) */ unsigned long REGPARAM2 CPUFUNC(op_20b9_0)(uae_u32 opcode, struct regstruct *regs) @@ -7318,7 +7318,7 @@ unsigned long REGPARAM2 CPUFUNC(op_20b9_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 28 * 256; +}}}}return 28 * CYCLE_UNIT / 2; } /* MOVE.L (d16,PC),(An) */ unsigned long REGPARAM2 CPUFUNC(op_20ba_0)(uae_u32 opcode, struct regstruct *regs) @@ -7333,7 +7333,7 @@ unsigned long REGPARAM2 CPUFUNC(op_20ba_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.L (d8,PC,Xn),(An) */ unsigned long REGPARAM2 CPUFUNC(op_20bb_0)(uae_u32 opcode, struct regstruct *regs) @@ -7350,7 +7350,7 @@ unsigned long REGPARAM2 CPUFUNC(op_20bb_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); -}}}}}return 26 * 256; +}}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.L #.L,(An) */ unsigned long REGPARAM2 CPUFUNC(op_20bc_0)(uae_u32 opcode, struct regstruct *regs) @@ -7363,7 +7363,7 @@ unsigned long REGPARAM2 CPUFUNC(op_20bc_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); -}}}return 20 * 256; +}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.L Dn,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_20c0_0)(uae_u32 opcode, struct regstruct *regs) @@ -7378,7 +7378,7 @@ unsigned long REGPARAM2 CPUFUNC(op_20c0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 2); -}}}return 12 * 256; +}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.L An,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_20c8_0)(uae_u32 opcode, struct regstruct *regs) @@ -7393,7 +7393,7 @@ unsigned long REGPARAM2 CPUFUNC(op_20c8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 2); -}}}return 12 * 256; +}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.L (An),(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_20d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -7409,7 +7409,7 @@ unsigned long REGPARAM2 CPUFUNC(op_20d0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.L (An)+,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_20d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -7426,7 +7426,7 @@ unsigned long REGPARAM2 CPUFUNC(op_20d8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.L -(An),(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_20e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -7444,7 +7444,7 @@ unsigned long REGPARAM2 CPUFUNC(op_20e0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 22 * 256; +}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.L (d16,An),(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_20e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -7460,7 +7460,7 @@ unsigned long REGPARAM2 CPUFUNC(op_20e8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.L (d8,An,Xn),(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_20f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -7477,7 +7477,7 @@ unsigned long REGPARAM2 CPUFUNC(op_20f0_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); -}}}}}return 26 * 256; +}}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.L (xxx).W,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_20f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -7492,7 +7492,7 @@ unsigned long REGPARAM2 CPUFUNC(op_20f8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.L (xxx).L,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_20f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -7507,7 +7507,7 @@ unsigned long REGPARAM2 CPUFUNC(op_20f9_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 28 * 256; +}}}}return 28 * CYCLE_UNIT / 2; } /* MOVE.L (d16,PC),(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_20fa_0)(uae_u32 opcode, struct regstruct *regs) @@ -7523,7 +7523,7 @@ unsigned long REGPARAM2 CPUFUNC(op_20fa_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.L (d8,PC,Xn),(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_20fb_0)(uae_u32 opcode, struct regstruct *regs) @@ -7541,7 +7541,7 @@ unsigned long REGPARAM2 CPUFUNC(op_20fb_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); -}}}}}return 26 * 256; +}}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.L #.L,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_20fc_0)(uae_u32 opcode, struct regstruct *regs) @@ -7555,7 +7555,7 @@ unsigned long REGPARAM2 CPUFUNC(op_20fc_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); -}}}return 20 * 256; +}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.L Dn,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_2100_0)(uae_u32 opcode, struct regstruct *regs) @@ -7571,7 +7571,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2100_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 2); -}}}return 12 * 256; +}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.L An,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_2108_0)(uae_u32 opcode, struct regstruct *regs) @@ -7587,7 +7587,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2108_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 2); -}}}return 12 * 256; +}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.L (An),-(An) */ unsigned long REGPARAM2 CPUFUNC(op_2110_0)(uae_u32 opcode, struct regstruct *regs) @@ -7604,7 +7604,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2110_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.L (An)+,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_2118_0)(uae_u32 opcode, struct regstruct *regs) @@ -7622,7 +7622,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2118_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.L -(An),-(An) */ unsigned long REGPARAM2 CPUFUNC(op_2120_0)(uae_u32 opcode, struct regstruct *regs) @@ -7641,7 +7641,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2120_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 22 * 256; +}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.L (d16,An),-(An) */ unsigned long REGPARAM2 CPUFUNC(op_2128_0)(uae_u32 opcode, struct regstruct *regs) @@ -7658,7 +7658,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2128_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.L (d8,An,Xn),-(An) */ unsigned long REGPARAM2 CPUFUNC(op_2130_0)(uae_u32 opcode, struct regstruct *regs) @@ -7676,7 +7676,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2130_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); -}}}}}return 26 * 256; +}}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.L (xxx).W,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_2138_0)(uae_u32 opcode, struct regstruct *regs) @@ -7692,7 +7692,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2138_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.L (xxx).L,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_2139_0)(uae_u32 opcode, struct regstruct *regs) @@ -7708,7 +7708,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2139_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 28 * 256; +}}}}return 28 * CYCLE_UNIT / 2; } /* MOVE.L (d16,PC),-(An) */ unsigned long REGPARAM2 CPUFUNC(op_213a_0)(uae_u32 opcode, struct regstruct *regs) @@ -7725,7 +7725,7 @@ unsigned long REGPARAM2 CPUFUNC(op_213a_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.L (d8,PC,Xn),-(An) */ unsigned long REGPARAM2 CPUFUNC(op_213b_0)(uae_u32 opcode, struct regstruct *regs) @@ -7744,7 +7744,7 @@ unsigned long REGPARAM2 CPUFUNC(op_213b_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); -}}}}}return 26 * 256; +}}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.L #.L,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_213c_0)(uae_u32 opcode, struct regstruct *regs) @@ -7759,7 +7759,7 @@ unsigned long REGPARAM2 CPUFUNC(op_213c_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); -}}}return 20 * 256; +}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.L Dn,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_2140_0)(uae_u32 opcode, struct regstruct *regs) @@ -7773,7 +7773,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2140_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}return 16 * 256; +}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.L An,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_2148_0)(uae_u32 opcode, struct regstruct *regs) @@ -7787,11 +7787,8 @@ unsigned long REGPARAM2 CPUFUNC(op_2148_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}return 16 * 256; +}}}return 16 * CYCLE_UNIT / 2; } -#endif - -#ifdef PART_3 /* MOVE.L (An),(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_2150_0)(uae_u32 opcode, struct regstruct *regs) { @@ -7805,7 +7802,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2150_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.L (An)+,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_2158_0)(uae_u32 opcode, struct regstruct *regs) @@ -7821,7 +7818,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2158_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.L -(An),(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_2160_0)(uae_u32 opcode, struct regstruct *regs) @@ -7838,7 +7835,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2160_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 26 * 256; +}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.L (d16,An),(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_2168_0)(uae_u32 opcode, struct regstruct *regs) @@ -7853,7 +7850,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2168_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 28 * 256; +}}}}return 28 * CYCLE_UNIT / 2; } /* MOVE.L (d8,An,Xn),(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_2170_0)(uae_u32 opcode, struct regstruct *regs) @@ -7870,7 +7867,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2170_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 2); -}}}}}return 30 * 256; +}}}}}return 30 * CYCLE_UNIT / 2; } /* MOVE.L (xxx).W,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_2178_0)(uae_u32 opcode, struct regstruct *regs) @@ -7884,8 +7881,11 @@ unsigned long REGPARAM2 CPUFUNC(op_2178_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 28 * 256; +}}}}return 28 * CYCLE_UNIT / 2; } +#endif + +#ifdef PART_3 /* MOVE.L (xxx).L,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_2179_0)(uae_u32 opcode, struct regstruct *regs) { @@ -7898,7 +7898,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2179_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 8); -}}}}return 32 * 256; +}}}}return 32 * CYCLE_UNIT / 2; } /* MOVE.L (d16,PC),(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_217a_0)(uae_u32 opcode, struct regstruct *regs) @@ -7913,7 +7913,7 @@ unsigned long REGPARAM2 CPUFUNC(op_217a_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 28 * 256; +}}}}return 28 * CYCLE_UNIT / 2; } /* MOVE.L (d8,PC,Xn),(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_217b_0)(uae_u32 opcode, struct regstruct *regs) @@ -7931,7 +7931,7 @@ unsigned long REGPARAM2 CPUFUNC(op_217b_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 2); -}}}}}return 30 * 256; +}}}}}return 30 * CYCLE_UNIT / 2; } /* MOVE.L #.L,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_217c_0)(uae_u32 opcode, struct regstruct *regs) @@ -7944,7 +7944,7 @@ unsigned long REGPARAM2 CPUFUNC(op_217c_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 8); -}}}return 24 * 256; +}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.L Dn,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_2180_0)(uae_u32 opcode, struct regstruct *regs) @@ -7959,7 +7959,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2180_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.L An,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_2188_0)(uae_u32 opcode, struct regstruct *regs) @@ -7974,7 +7974,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2188_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.L (An),(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_2190_0)(uae_u32 opcode, struct regstruct *regs) @@ -7990,7 +7990,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2190_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); -}}}}}return 26 * 256; +}}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.L (An)+,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_2198_0)(uae_u32 opcode, struct regstruct *regs) @@ -8007,7 +8007,7 @@ unsigned long REGPARAM2 CPUFUNC(op_2198_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); -}}}}}return 26 * 256; +}}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.L -(An),(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_21a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -8025,7 +8025,7 @@ unsigned long REGPARAM2 CPUFUNC(op_21a0_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); -}}}}}return 28 * 256; +}}}}}return 28 * CYCLE_UNIT / 2; } /* MOVE.L (d16,An),(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_21a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -8041,7 +8041,7 @@ unsigned long REGPARAM2 CPUFUNC(op_21a8_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); -}}}}}return 30 * 256; +}}}}}return 30 * CYCLE_UNIT / 2; } /* MOVE.L (d8,An,Xn),(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_21b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -8058,7 +8058,7 @@ unsigned long REGPARAM2 CPUFUNC(op_21b0_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); -}}}}}}return 32 * 256; +}}}}}}return 32 * CYCLE_UNIT / 2; } /* MOVE.L (xxx).W,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_21b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -8073,7 +8073,7 @@ unsigned long REGPARAM2 CPUFUNC(op_21b8_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); -}}}}}return 30 * 256; +}}}}}return 30 * CYCLE_UNIT / 2; } /* MOVE.L (xxx).L,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_21b9_0)(uae_u32 opcode, struct regstruct *regs) @@ -8088,7 +8088,7 @@ unsigned long REGPARAM2 CPUFUNC(op_21b9_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); -}}}}}return 34 * 256; +}}}}}return 34 * CYCLE_UNIT / 2; } /* MOVE.L (d16,PC),(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_21ba_0)(uae_u32 opcode, struct regstruct *regs) @@ -8104,7 +8104,7 @@ unsigned long REGPARAM2 CPUFUNC(op_21ba_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); -}}}}}return 30 * 256; +}}}}}return 30 * CYCLE_UNIT / 2; } /* MOVE.L (d8,PC,Xn),(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_21bb_0)(uae_u32 opcode, struct regstruct *regs) @@ -8122,7 +8122,7 @@ unsigned long REGPARAM2 CPUFUNC(op_21bb_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); -}}}}}}return 32 * 256; +}}}}}}return 32 * CYCLE_UNIT / 2; } /* MOVE.L #.L,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_21bc_0)(uae_u32 opcode, struct regstruct *regs) @@ -8136,7 +8136,7 @@ unsigned long REGPARAM2 CPUFUNC(op_21bc_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); -}}}}return 26 * 256; +}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.L Dn,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_21c0_0)(uae_u32 opcode, struct regstruct *regs) @@ -8149,7 +8149,7 @@ unsigned long REGPARAM2 CPUFUNC(op_21c0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}return 16 * 256; +}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.L An,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_21c8_0)(uae_u32 opcode, struct regstruct *regs) @@ -8162,7 +8162,7 @@ unsigned long REGPARAM2 CPUFUNC(op_21c8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}return 16 * 256; +}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.L (An),(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_21d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -8176,7 +8176,7 @@ unsigned long REGPARAM2 CPUFUNC(op_21d0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.L (An)+,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_21d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -8191,7 +8191,7 @@ unsigned long REGPARAM2 CPUFUNC(op_21d8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.L -(An),(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_21e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -8207,7 +8207,7 @@ unsigned long REGPARAM2 CPUFUNC(op_21e0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 26 * 256; +}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.L (d16,An),(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_21e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -8221,7 +8221,7 @@ unsigned long REGPARAM2 CPUFUNC(op_21e8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 28 * 256; +}}}}return 28 * CYCLE_UNIT / 2; } /* MOVE.L (d8,An,Xn),(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_21f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -8237,7 +8237,7 @@ unsigned long REGPARAM2 CPUFUNC(op_21f0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 2); -}}}}}return 30 * 256; +}}}}}return 30 * CYCLE_UNIT / 2; } /* MOVE.L (xxx).W,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_21f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -8250,7 +8250,7 @@ unsigned long REGPARAM2 CPUFUNC(op_21f8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 28 * 256; +}}}}return 28 * CYCLE_UNIT / 2; } /* MOVE.L (xxx).L,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_21f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -8263,7 +8263,7 @@ unsigned long REGPARAM2 CPUFUNC(op_21f9_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 8); -}}}}return 32 * 256; +}}}}return 32 * CYCLE_UNIT / 2; } /* MOVE.L (d16,PC),(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_21fa_0)(uae_u32 opcode, struct regstruct *regs) @@ -8277,7 +8277,7 @@ unsigned long REGPARAM2 CPUFUNC(op_21fa_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 28 * 256; +}}}}return 28 * CYCLE_UNIT / 2; } /* MOVE.L (d8,PC,Xn),(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_21fb_0)(uae_u32 opcode, struct regstruct *regs) @@ -8294,7 +8294,7 @@ unsigned long REGPARAM2 CPUFUNC(op_21fb_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 2); -}}}}}return 30 * 256; +}}}}}return 30 * CYCLE_UNIT / 2; } /* MOVE.L #.L,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_21fc_0)(uae_u32 opcode, struct regstruct *regs) @@ -8306,7 +8306,7 @@ unsigned long REGPARAM2 CPUFUNC(op_21fc_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 8); -}}}return 24 * 256; +}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.L Dn,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_23c0_0)(uae_u32 opcode, struct regstruct *regs) @@ -8319,7 +8319,7 @@ unsigned long REGPARAM2 CPUFUNC(op_23c0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); -}}}return 20 * 256; +}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.L An,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_23c8_0)(uae_u32 opcode, struct regstruct *regs) @@ -8332,7 +8332,7 @@ unsigned long REGPARAM2 CPUFUNC(op_23c8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); -}}}return 20 * 256; +}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.L (An),(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_23d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -8346,7 +8346,7 @@ unsigned long REGPARAM2 CPUFUNC(op_23d0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 28 * 256; +}}}}return 28 * CYCLE_UNIT / 2; } /* MOVE.L (An)+,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_23d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -8361,7 +8361,7 @@ unsigned long REGPARAM2 CPUFUNC(op_23d8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 28 * 256; +}}}}return 28 * CYCLE_UNIT / 2; } /* MOVE.L -(An),(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_23e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -8377,7 +8377,7 @@ unsigned long REGPARAM2 CPUFUNC(op_23e0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 30 * 256; +}}}}return 30 * CYCLE_UNIT / 2; } /* MOVE.L (d16,An),(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_23e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -8391,7 +8391,7 @@ unsigned long REGPARAM2 CPUFUNC(op_23e8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 8); -}}}}return 32 * 256; +}}}}return 32 * CYCLE_UNIT / 2; } /* MOVE.L (d8,An,Xn),(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_23f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -8407,7 +8407,7 @@ unsigned long REGPARAM2 CPUFUNC(op_23f0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}}return 34 * 256; +}}}}}return 34 * CYCLE_UNIT / 2; } /* MOVE.L (xxx).W,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_23f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -8420,7 +8420,7 @@ unsigned long REGPARAM2 CPUFUNC(op_23f8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 8); -}}}}return 32 * 256; +}}}}return 32 * CYCLE_UNIT / 2; } /* MOVE.L (xxx).L,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_23f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -8433,7 +8433,7 @@ unsigned long REGPARAM2 CPUFUNC(op_23f9_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 10); -}}}}return 36 * 256; +}}}}return 36 * CYCLE_UNIT / 2; } /* MOVE.L (d16,PC),(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_23fa_0)(uae_u32 opcode, struct regstruct *regs) @@ -8447,7 +8447,7 @@ unsigned long REGPARAM2 CPUFUNC(op_23fa_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 8); -}}}}return 32 * 256; +}}}}return 32 * CYCLE_UNIT / 2; } /* MOVE.L (d8,PC,Xn),(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_23fb_0)(uae_u32 opcode, struct regstruct *regs) @@ -8464,7 +8464,7 @@ unsigned long REGPARAM2 CPUFUNC(op_23fb_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}}return 34 * 256; +}}}}}return 34 * CYCLE_UNIT / 2; } /* MOVE.L #.L,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_23fc_0)(uae_u32 opcode, struct regstruct *regs) @@ -8476,7 +8476,7 @@ unsigned long REGPARAM2 CPUFUNC(op_23fc_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 10); -}}}return 28 * 256; +}}}return 28 * CYCLE_UNIT / 2; } /* MOVE.W Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_3000_0)(uae_u32 opcode, struct regstruct *regs) @@ -8489,7 +8489,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3000_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 2); -}}}return 4 * 256; +}}}return 4 * CYCLE_UNIT / 2; } /* MOVE.W An,Dn */ unsigned long REGPARAM2 CPUFUNC(op_3008_0)(uae_u32 opcode, struct regstruct *regs) @@ -8502,7 +8502,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3008_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 2); -}}}return 4 * 256; +}}}return 4 * CYCLE_UNIT / 2; } /* MOVE.W (An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_3010_0)(uae_u32 opcode, struct regstruct *regs) @@ -8516,7 +8516,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3010_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 8 * 256; +}}}}return 8 * CYCLE_UNIT / 2; } /* MOVE.W (An)+,Dn */ unsigned long REGPARAM2 CPUFUNC(op_3018_0)(uae_u32 opcode, struct regstruct *regs) @@ -8531,7 +8531,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3018_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 8 * 256; +}}}}return 8 * CYCLE_UNIT / 2; } /* MOVE.W -(An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_3020_0)(uae_u32 opcode, struct regstruct *regs) @@ -8547,7 +8547,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3020_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 10 * 256; +}}}}return 10 * CYCLE_UNIT / 2; } /* MOVE.W (d16,An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_3028_0)(uae_u32 opcode, struct regstruct *regs) @@ -8561,7 +8561,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3028_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.W (d8,An,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_3030_0)(uae_u32 opcode, struct regstruct *regs) @@ -8576,7 +8576,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3030_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* MOVE.W (xxx).W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_3038_0)(uae_u32 opcode, struct regstruct *regs) @@ -8589,7 +8589,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3038_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.W (xxx).L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_3039_0)(uae_u32 opcode, struct regstruct *regs) @@ -8602,7 +8602,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3039_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.W (d16,PC),Dn */ unsigned long REGPARAM2 CPUFUNC(op_303a_0)(uae_u32 opcode, struct regstruct *regs) @@ -8616,7 +8616,7 @@ unsigned long REGPARAM2 CPUFUNC(op_303a_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.W (d8,PC,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_303b_0)(uae_u32 opcode, struct regstruct *regs) @@ -8632,7 +8632,7 @@ unsigned long REGPARAM2 CPUFUNC(op_303b_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* MOVE.W #.W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_303c_0)(uae_u32 opcode, struct regstruct *regs) @@ -8644,7 +8644,7 @@ unsigned long REGPARAM2 CPUFUNC(op_303c_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}return 8 * 256; +}}}return 8 * CYCLE_UNIT / 2; } /* MOVEA.W Dn,An */ unsigned long REGPARAM2 CPUFUNC(op_3040_0)(uae_u32 opcode, struct regstruct *regs) @@ -8655,7 +8655,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3040_0)(uae_u32 opcode, struct regstruct *reg { src = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); m68k_incpc (regs, 2); -}}}return 4 * 256; +}}}return 4 * CYCLE_UNIT / 2; } /* MOVEA.W An,An */ unsigned long REGPARAM2 CPUFUNC(op_3048_0)(uae_u32 opcode, struct regstruct *regs) @@ -8666,7 +8666,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3048_0)(uae_u32 opcode, struct regstruct *reg { src = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); m68k_incpc (regs, 2); -}}}return 4 * 256; +}}}return 4 * CYCLE_UNIT / 2; } /* MOVEA.W (An),An */ unsigned long REGPARAM2 CPUFUNC(op_3050_0)(uae_u32 opcode, struct regstruct *regs) @@ -8678,7 +8678,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3050_0)(uae_u32 opcode, struct regstruct *reg { src = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); m68k_incpc (regs, 2); -}}}}return 8 * 256; +}}}}return 8 * CYCLE_UNIT / 2; } /* MOVEA.W (An)+,An */ unsigned long REGPARAM2 CPUFUNC(op_3058_0)(uae_u32 opcode, struct regstruct *regs) @@ -8691,7 +8691,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3058_0)(uae_u32 opcode, struct regstruct *reg { src = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); m68k_incpc (regs, 2); -}}}}return 8 * 256; +}}}}return 8 * CYCLE_UNIT / 2; } /* MOVEA.W -(An),An */ unsigned long REGPARAM2 CPUFUNC(op_3060_0)(uae_u32 opcode, struct regstruct *regs) @@ -8705,7 +8705,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3060_0)(uae_u32 opcode, struct regstruct *reg { src = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); m68k_incpc (regs, 2); -}}}}return 10 * 256; +}}}}return 10 * CYCLE_UNIT / 2; } /* MOVEA.W (d16,An),An */ unsigned long REGPARAM2 CPUFUNC(op_3068_0)(uae_u32 opcode, struct regstruct *regs) @@ -8717,7 +8717,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3068_0)(uae_u32 opcode, struct regstruct *reg { src = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); m68k_incpc (regs, 4); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVEA.W (d8,An,Xn),An */ unsigned long REGPARAM2 CPUFUNC(op_3070_0)(uae_u32 opcode, struct regstruct *regs) @@ -8730,7 +8730,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3070_0)(uae_u32 opcode, struct regstruct *reg { uae_s16 src = get_word (srca); { src = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* MOVEA.W (xxx).W,An */ unsigned long REGPARAM2 CPUFUNC(op_3078_0)(uae_u32 opcode, struct regstruct *regs) @@ -8741,7 +8741,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3078_0)(uae_u32 opcode, struct regstruct *reg { src = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); m68k_incpc (regs, 4); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVEA.W (xxx).L,An */ unsigned long REGPARAM2 CPUFUNC(op_3079_0)(uae_u32 opcode, struct regstruct *regs) @@ -8752,7 +8752,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3079_0)(uae_u32 opcode, struct regstruct *reg { src = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); m68k_incpc (regs, 6); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVEA.W (d16,PC),An */ unsigned long REGPARAM2 CPUFUNC(op_307a_0)(uae_u32 opcode, struct regstruct *regs) @@ -8764,7 +8764,7 @@ unsigned long REGPARAM2 CPUFUNC(op_307a_0)(uae_u32 opcode, struct regstruct *reg { src = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); m68k_incpc (regs, 4); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVEA.W (d8,PC,Xn),An */ unsigned long REGPARAM2 CPUFUNC(op_307b_0)(uae_u32 opcode, struct regstruct *regs) @@ -8778,7 +8778,7 @@ unsigned long REGPARAM2 CPUFUNC(op_307b_0)(uae_u32 opcode, struct regstruct *reg { uae_s16 src = get_word (srca); { src = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* MOVEA.W #.W,An */ unsigned long REGPARAM2 CPUFUNC(op_307c_0)(uae_u32 opcode, struct regstruct *regs) @@ -8788,7 +8788,7 @@ unsigned long REGPARAM2 CPUFUNC(op_307c_0)(uae_u32 opcode, struct regstruct *reg { src = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); m68k_incpc (regs, 4); -}}}return 8 * 256; +}}}return 8 * CYCLE_UNIT / 2; } /* MOVE.W Dn,(An) */ unsigned long REGPARAM2 CPUFUNC(op_3080_0)(uae_u32 opcode, struct regstruct *regs) @@ -8802,7 +8802,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3080_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 2); -}}}return 8 * 256; +}}}return 8 * CYCLE_UNIT / 2; } /* MOVE.W An,(An) */ unsigned long REGPARAM2 CPUFUNC(op_3088_0)(uae_u32 opcode, struct regstruct *regs) @@ -8816,7 +8816,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3088_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 2); -}}}return 8 * 256; +}}}return 8 * CYCLE_UNIT / 2; } /* MOVE.W (An),(An) */ unsigned long REGPARAM2 CPUFUNC(op_3090_0)(uae_u32 opcode, struct regstruct *regs) @@ -8831,7 +8831,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3090_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.W (An)+,(An) */ unsigned long REGPARAM2 CPUFUNC(op_3098_0)(uae_u32 opcode, struct regstruct *regs) @@ -8847,7 +8847,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3098_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.W -(An),(An) */ unsigned long REGPARAM2 CPUFUNC(op_30a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -8864,7 +8864,7 @@ unsigned long REGPARAM2 CPUFUNC(op_30a0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* MOVE.W (d16,An),(An) */ unsigned long REGPARAM2 CPUFUNC(op_30a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -8879,7 +8879,7 @@ unsigned long REGPARAM2 CPUFUNC(op_30a8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.W (d8,An,Xn),(An) */ unsigned long REGPARAM2 CPUFUNC(op_30b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -8895,7 +8895,7 @@ unsigned long REGPARAM2 CPUFUNC(op_30b0_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.W (xxx).W,(An) */ unsigned long REGPARAM2 CPUFUNC(op_30b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -8909,7 +8909,7 @@ unsigned long REGPARAM2 CPUFUNC(op_30b8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.W (xxx).L,(An) */ unsigned long REGPARAM2 CPUFUNC(op_30b9_0)(uae_u32 opcode, struct regstruct *regs) @@ -8923,7 +8923,7 @@ unsigned long REGPARAM2 CPUFUNC(op_30b9_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.W (d16,PC),(An) */ unsigned long REGPARAM2 CPUFUNC(op_30ba_0)(uae_u32 opcode, struct regstruct *regs) @@ -8938,7 +8938,7 @@ unsigned long REGPARAM2 CPUFUNC(op_30ba_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.W (d8,PC,Xn),(An) */ unsigned long REGPARAM2 CPUFUNC(op_30bb_0)(uae_u32 opcode, struct regstruct *regs) @@ -8955,7 +8955,7 @@ unsigned long REGPARAM2 CPUFUNC(op_30bb_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.W #.W,(An) */ unsigned long REGPARAM2 CPUFUNC(op_30bc_0)(uae_u32 opcode, struct regstruct *regs) @@ -8968,7 +8968,7 @@ unsigned long REGPARAM2 CPUFUNC(op_30bc_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}return 12 * 256; +}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.W Dn,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_30c0_0)(uae_u32 opcode, struct regstruct *regs) @@ -8983,7 +8983,7 @@ unsigned long REGPARAM2 CPUFUNC(op_30c0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 2); -}}}return 8 * 256; +}}}return 8 * CYCLE_UNIT / 2; } /* MOVE.W An,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_30c8_0)(uae_u32 opcode, struct regstruct *regs) @@ -8998,7 +8998,7 @@ unsigned long REGPARAM2 CPUFUNC(op_30c8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 2); -}}}return 8 * 256; +}}}return 8 * CYCLE_UNIT / 2; } /* MOVE.W (An),(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_30d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -9014,7 +9014,7 @@ unsigned long REGPARAM2 CPUFUNC(op_30d0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.W (An)+,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_30d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -9031,7 +9031,7 @@ unsigned long REGPARAM2 CPUFUNC(op_30d8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.W -(An),(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_30e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -9049,7 +9049,7 @@ unsigned long REGPARAM2 CPUFUNC(op_30e0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* MOVE.W (d16,An),(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_30e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -9065,7 +9065,7 @@ unsigned long REGPARAM2 CPUFUNC(op_30e8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.W (d8,An,Xn),(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_30f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -9082,7 +9082,7 @@ unsigned long REGPARAM2 CPUFUNC(op_30f0_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.W (xxx).W,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_30f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -9097,7 +9097,7 @@ unsigned long REGPARAM2 CPUFUNC(op_30f8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.W (xxx).L,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_30f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -9112,7 +9112,7 @@ unsigned long REGPARAM2 CPUFUNC(op_30f9_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.W (d16,PC),(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_30fa_0)(uae_u32 opcode, struct regstruct *regs) @@ -9128,7 +9128,7 @@ unsigned long REGPARAM2 CPUFUNC(op_30fa_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.W (d8,PC,Xn),(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_30fb_0)(uae_u32 opcode, struct regstruct *regs) @@ -9146,7 +9146,7 @@ unsigned long REGPARAM2 CPUFUNC(op_30fb_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.W #.W,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_30fc_0)(uae_u32 opcode, struct regstruct *regs) @@ -9160,7 +9160,7 @@ unsigned long REGPARAM2 CPUFUNC(op_30fc_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}return 12 * 256; +}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.W Dn,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_3100_0)(uae_u32 opcode, struct regstruct *regs) @@ -9176,7 +9176,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3100_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 2); -}}}return 8 * 256; +}}}return 8 * CYCLE_UNIT / 2; } /* MOVE.W An,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_3108_0)(uae_u32 opcode, struct regstruct *regs) @@ -9192,7 +9192,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3108_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 2); -}}}return 8 * 256; +}}}return 8 * CYCLE_UNIT / 2; } /* MOVE.W (An),-(An) */ unsigned long REGPARAM2 CPUFUNC(op_3110_0)(uae_u32 opcode, struct regstruct *regs) @@ -9209,7 +9209,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3110_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.W (An)+,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_3118_0)(uae_u32 opcode, struct regstruct *regs) @@ -9227,7 +9227,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3118_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.W -(An),-(An) */ unsigned long REGPARAM2 CPUFUNC(op_3120_0)(uae_u32 opcode, struct regstruct *regs) @@ -9246,7 +9246,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3120_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* MOVE.W (d16,An),-(An) */ unsigned long REGPARAM2 CPUFUNC(op_3128_0)(uae_u32 opcode, struct regstruct *regs) @@ -9263,7 +9263,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3128_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.W (d8,An,Xn),-(An) */ unsigned long REGPARAM2 CPUFUNC(op_3130_0)(uae_u32 opcode, struct regstruct *regs) @@ -9281,7 +9281,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3130_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.W (xxx).W,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_3138_0)(uae_u32 opcode, struct regstruct *regs) @@ -9297,7 +9297,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3138_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.W (xxx).L,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_3139_0)(uae_u32 opcode, struct regstruct *regs) @@ -9313,7 +9313,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3139_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.W (d16,PC),-(An) */ unsigned long REGPARAM2 CPUFUNC(op_313a_0)(uae_u32 opcode, struct regstruct *regs) @@ -9330,7 +9330,7 @@ unsigned long REGPARAM2 CPUFUNC(op_313a_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.W (d8,PC,Xn),-(An) */ unsigned long REGPARAM2 CPUFUNC(op_313b_0)(uae_u32 opcode, struct regstruct *regs) @@ -9349,7 +9349,7 @@ unsigned long REGPARAM2 CPUFUNC(op_313b_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.W #.W,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_313c_0)(uae_u32 opcode, struct regstruct *regs) @@ -9364,7 +9364,7 @@ unsigned long REGPARAM2 CPUFUNC(op_313c_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}return 12 * 256; +}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.W Dn,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_3140_0)(uae_u32 opcode, struct regstruct *regs) @@ -9378,7 +9378,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3140_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}return 12 * 256; +}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.W An,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_3148_0)(uae_u32 opcode, struct regstruct *regs) @@ -9392,7 +9392,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3148_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}return 12 * 256; +}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.W (An),(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_3150_0)(uae_u32 opcode, struct regstruct *regs) @@ -9407,7 +9407,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3150_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.W (An)+,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_3158_0)(uae_u32 opcode, struct regstruct *regs) @@ -9423,7 +9423,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3158_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.W -(An),(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_3160_0)(uae_u32 opcode, struct regstruct *regs) @@ -9440,7 +9440,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3160_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.W (d16,An),(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_3168_0)(uae_u32 opcode, struct regstruct *regs) @@ -9455,7 +9455,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3168_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.W (d8,An,Xn),(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_3170_0)(uae_u32 opcode, struct regstruct *regs) @@ -9472,7 +9472,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3170_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 2); -}}}}}return 22 * 256; +}}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.W (xxx).W,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_3178_0)(uae_u32 opcode, struct regstruct *regs) @@ -9486,7 +9486,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3178_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.W (xxx).L,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_3179_0)(uae_u32 opcode, struct regstruct *regs) @@ -9500,7 +9500,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3179_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 8); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.W (d16,PC),(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_317a_0)(uae_u32 opcode, struct regstruct *regs) @@ -9515,7 +9515,7 @@ unsigned long REGPARAM2 CPUFUNC(op_317a_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.W (d8,PC,Xn),(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_317b_0)(uae_u32 opcode, struct regstruct *regs) @@ -9533,7 +9533,7 @@ unsigned long REGPARAM2 CPUFUNC(op_317b_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 2); -}}}}}return 22 * 256; +}}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.W #.W,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_317c_0)(uae_u32 opcode, struct regstruct *regs) @@ -9546,7 +9546,7 @@ unsigned long REGPARAM2 CPUFUNC(op_317c_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 6); -}}}return 16 * 256; +}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.W Dn,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_3180_0)(uae_u32 opcode, struct regstruct *regs) @@ -9561,7 +9561,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3180_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* MOVE.W An,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_3188_0)(uae_u32 opcode, struct regstruct *regs) @@ -9576,7 +9576,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3188_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* MOVE.W (An),(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_3190_0)(uae_u32 opcode, struct regstruct *regs) @@ -9592,7 +9592,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3190_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.W (An)+,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_3198_0)(uae_u32 opcode, struct regstruct *regs) @@ -9609,7 +9609,7 @@ unsigned long REGPARAM2 CPUFUNC(op_3198_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.W -(An),(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_31a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -9627,7 +9627,7 @@ unsigned long REGPARAM2 CPUFUNC(op_31a0_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); -}}}}}return 20 * 256; +}}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.W (d16,An),(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_31a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -9643,7 +9643,7 @@ unsigned long REGPARAM2 CPUFUNC(op_31a8_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); -}}}}}return 22 * 256; +}}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.W (d8,An,Xn),(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_31b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -9660,7 +9660,7 @@ unsigned long REGPARAM2 CPUFUNC(op_31b0_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); -}}}}}}return 24 * 256; +}}}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.W (xxx).W,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_31b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -9675,7 +9675,7 @@ unsigned long REGPARAM2 CPUFUNC(op_31b8_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); -}}}}}return 22 * 256; +}}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.W (xxx).L,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_31b9_0)(uae_u32 opcode, struct regstruct *regs) @@ -9690,7 +9690,7 @@ unsigned long REGPARAM2 CPUFUNC(op_31b9_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); -}}}}}return 26 * 256; +}}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.W (d16,PC),(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_31ba_0)(uae_u32 opcode, struct regstruct *regs) @@ -9706,7 +9706,7 @@ unsigned long REGPARAM2 CPUFUNC(op_31ba_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); -}}}}}return 22 * 256; +}}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.W (d8,PC,Xn),(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_31bb_0)(uae_u32 opcode, struct regstruct *regs) @@ -9724,7 +9724,7 @@ unsigned long REGPARAM2 CPUFUNC(op_31bb_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); -}}}}}}return 24 * 256; +}}}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.W #.W,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_31bc_0)(uae_u32 opcode, struct regstruct *regs) @@ -9738,7 +9738,7 @@ unsigned long REGPARAM2 CPUFUNC(op_31bc_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.W Dn,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_31c0_0)(uae_u32 opcode, struct regstruct *regs) @@ -9751,7 +9751,7 @@ unsigned long REGPARAM2 CPUFUNC(op_31c0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}return 12 * 256; +}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.W An,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_31c8_0)(uae_u32 opcode, struct regstruct *regs) @@ -9764,7 +9764,7 @@ unsigned long REGPARAM2 CPUFUNC(op_31c8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}return 12 * 256; +}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.W (An),(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_31d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -9778,7 +9778,7 @@ unsigned long REGPARAM2 CPUFUNC(op_31d0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.W (An)+,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_31d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -9793,7 +9793,7 @@ unsigned long REGPARAM2 CPUFUNC(op_31d8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.W -(An),(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_31e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -9809,7 +9809,7 @@ unsigned long REGPARAM2 CPUFUNC(op_31e0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.W (d16,An),(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_31e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -9823,7 +9823,7 @@ unsigned long REGPARAM2 CPUFUNC(op_31e8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.W (d8,An,Xn),(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_31f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -9839,7 +9839,7 @@ unsigned long REGPARAM2 CPUFUNC(op_31f0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 2); -}}}}}return 22 * 256; +}}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.W (xxx).W,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_31f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -9852,7 +9852,7 @@ unsigned long REGPARAM2 CPUFUNC(op_31f8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.W (xxx).L,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_31f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -9865,7 +9865,7 @@ unsigned long REGPARAM2 CPUFUNC(op_31f9_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 8); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.W (d16,PC),(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_31fa_0)(uae_u32 opcode, struct regstruct *regs) @@ -9879,7 +9879,7 @@ unsigned long REGPARAM2 CPUFUNC(op_31fa_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.W (d8,PC,Xn),(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_31fb_0)(uae_u32 opcode, struct regstruct *regs) @@ -9896,7 +9896,7 @@ unsigned long REGPARAM2 CPUFUNC(op_31fb_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 2); -}}}}}return 22 * 256; +}}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.W #.W,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_31fc_0)(uae_u32 opcode, struct regstruct *regs) @@ -9908,7 +9908,7 @@ unsigned long REGPARAM2 CPUFUNC(op_31fc_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 6); -}}}return 16 * 256; +}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.W Dn,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_33c0_0)(uae_u32 opcode, struct regstruct *regs) @@ -9921,7 +9921,7 @@ unsigned long REGPARAM2 CPUFUNC(op_33c0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 6); -}}}return 16 * 256; +}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.W An,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_33c8_0)(uae_u32 opcode, struct regstruct *regs) @@ -9934,7 +9934,7 @@ unsigned long REGPARAM2 CPUFUNC(op_33c8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 6); -}}}return 16 * 256; +}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.W (An),(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_33d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -9948,7 +9948,7 @@ unsigned long REGPARAM2 CPUFUNC(op_33d0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.W (An)+,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_33d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -9963,7 +9963,7 @@ unsigned long REGPARAM2 CPUFUNC(op_33d8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.W -(An),(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_33e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -9979,7 +9979,7 @@ unsigned long REGPARAM2 CPUFUNC(op_33e0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 22 * 256; +}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.W (d16,An),(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_33e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -9993,7 +9993,7 @@ unsigned long REGPARAM2 CPUFUNC(op_33e8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 8); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.W (d8,An,Xn),(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_33f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -10009,7 +10009,7 @@ unsigned long REGPARAM2 CPUFUNC(op_33f0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}}return 26 * 256; +}}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.W (xxx).W,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_33f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -10022,7 +10022,7 @@ unsigned long REGPARAM2 CPUFUNC(op_33f8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 8); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.W (xxx).L,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_33f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -10035,7 +10035,7 @@ unsigned long REGPARAM2 CPUFUNC(op_33f9_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 10); -}}}}return 28 * 256; +}}}}return 28 * CYCLE_UNIT / 2; } /* MOVE.W (d16,PC),(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_33fa_0)(uae_u32 opcode, struct regstruct *regs) @@ -10049,7 +10049,7 @@ unsigned long REGPARAM2 CPUFUNC(op_33fa_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 8); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.W (d8,PC,Xn),(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_33fb_0)(uae_u32 opcode, struct regstruct *regs) @@ -10066,7 +10066,7 @@ unsigned long REGPARAM2 CPUFUNC(op_33fb_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}}return 26 * 256; +}}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.W #.W,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_33fc_0)(uae_u32 opcode, struct regstruct *regs) @@ -10078,7 +10078,7 @@ unsigned long REGPARAM2 CPUFUNC(op_33fc_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 8); -}}}return 20 * 256; +}}}return 20 * CYCLE_UNIT / 2; } /* NEGX.B Dn */ unsigned long REGPARAM2 CPUFUNC(op_4000_0)(uae_u32 opcode, struct regstruct *regs) @@ -10096,7 +10096,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4000_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* NEGX.B (An) */ unsigned long REGPARAM2 CPUFUNC(op_4010_0)(uae_u32 opcode, struct regstruct *regs) @@ -10115,7 +10115,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4010_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (srca,newv); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* NEGX.B (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_4018_0)(uae_u32 opcode, struct regstruct *regs) @@ -10135,7 +10135,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4018_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (srca,newv); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* NEGX.B -(An) */ unsigned long REGPARAM2 CPUFUNC(op_4020_0)(uae_u32 opcode, struct regstruct *regs) @@ -10156,7 +10156,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4020_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (srca,newv); }}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* NEGX.B (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_4028_0)(uae_u32 opcode, struct regstruct *regs) @@ -10175,7 +10175,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4028_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (srca,newv); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* NEGX.B (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_4030_0)(uae_u32 opcode, struct regstruct *regs) @@ -10195,7 +10195,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4030_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s8)(newv)) == 0)); SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (srca,newv); -}}}}}}return 18 * 256; +}}}}}}return 18 * CYCLE_UNIT / 2; } /* NEGX.B (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_4038_0)(uae_u32 opcode, struct regstruct *regs) @@ -10213,7 +10213,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4038_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (srca,newv); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* NEGX.B (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_4039_0)(uae_u32 opcode, struct regstruct *regs) @@ -10231,7 +10231,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4039_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (srca,newv); }}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* NEGX.W Dn */ unsigned long REGPARAM2 CPUFUNC(op_4040_0)(uae_u32 opcode, struct regstruct *regs) @@ -10249,7 +10249,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4040_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((newv) & 0xffff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* NEGX.W (An) */ unsigned long REGPARAM2 CPUFUNC(op_4050_0)(uae_u32 opcode, struct regstruct *regs) @@ -10268,7 +10268,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4050_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); put_word (srca,newv); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* NEGX.W (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_4058_0)(uae_u32 opcode, struct regstruct *regs) @@ -10288,7 +10288,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4058_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); put_word (srca,newv); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* NEGX.W -(An) */ unsigned long REGPARAM2 CPUFUNC(op_4060_0)(uae_u32 opcode, struct regstruct *regs) @@ -10309,7 +10309,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4060_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); put_word (srca,newv); }}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* NEGX.W (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_4068_0)(uae_u32 opcode, struct regstruct *regs) @@ -10328,7 +10328,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4068_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); put_word (srca,newv); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* NEGX.W (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_4070_0)(uae_u32 opcode, struct regstruct *regs) @@ -10348,7 +10348,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4070_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s16)(newv)) == 0)); SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); put_word (srca,newv); -}}}}}}return 18 * 256; +}}}}}}return 18 * CYCLE_UNIT / 2; } /* NEGX.W (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_4078_0)(uae_u32 opcode, struct regstruct *regs) @@ -10366,7 +10366,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4078_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); put_word (srca,newv); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* NEGX.W (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_4079_0)(uae_u32 opcode, struct regstruct *regs) @@ -10384,7 +10384,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4079_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); put_word (srca,newv); }}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* NEGX.L Dn */ unsigned long REGPARAM2 CPUFUNC(op_4080_0)(uae_u32 opcode, struct regstruct *regs) @@ -10402,7 +10402,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4080_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, srcreg) = (newv); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* NEGX.L (An) */ unsigned long REGPARAM2 CPUFUNC(op_4090_0)(uae_u32 opcode, struct regstruct *regs) @@ -10421,7 +10421,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4090_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); put_long (srca,newv); }}}}} m68k_incpc (regs, 2); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* NEGX.L (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_4098_0)(uae_u32 opcode, struct regstruct *regs) @@ -10441,7 +10441,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4098_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); put_long (srca,newv); }}}}} m68k_incpc (regs, 2); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* NEGX.L -(An) */ unsigned long REGPARAM2 CPUFUNC(op_40a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -10462,7 +10462,7 @@ unsigned long REGPARAM2 CPUFUNC(op_40a0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); put_long (srca,newv); }}}}} m68k_incpc (regs, 2); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* NEGX.L (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_40a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -10481,7 +10481,7 @@ unsigned long REGPARAM2 CPUFUNC(op_40a8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); put_long (srca,newv); }}}}} m68k_incpc (regs, 4); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* NEGX.L (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_40b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -10501,7 +10501,7 @@ unsigned long REGPARAM2 CPUFUNC(op_40b0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s32)(newv)) == 0)); SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); put_long (srca,newv); -}}}}}}return 26 * 256; +}}}}}}return 26 * CYCLE_UNIT / 2; } /* NEGX.L (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_40b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -10519,7 +10519,7 @@ unsigned long REGPARAM2 CPUFUNC(op_40b8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); put_long (srca,newv); }}}}} m68k_incpc (regs, 4); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* NEGX.L (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_40b9_0)(uae_u32 opcode, struct regstruct *regs) @@ -10537,7 +10537,7 @@ unsigned long REGPARAM2 CPUFUNC(op_40b9_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); put_long (srca,newv); }}}}} m68k_incpc (regs, 6); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* MVSR2.W Dn */ unsigned long REGPARAM2 CPUFUNC(op_40c0_0)(uae_u32 opcode, struct regstruct *regs) @@ -10548,7 +10548,7 @@ unsigned long REGPARAM2 CPUFUNC(op_40c0_0)(uae_u32 opcode, struct regstruct *reg m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs->sr) & 0xffff); }}} m68k_incpc (regs, 2); endlabel645: ; -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* MVSR2.W (An) */ unsigned long REGPARAM2 CPUFUNC(op_40d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -10560,7 +10560,7 @@ unsigned long REGPARAM2 CPUFUNC(op_40d0_0)(uae_u32 opcode, struct regstruct *reg put_word (srca,regs->sr); }}} m68k_incpc (regs, 2); endlabel646: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* MVSR2.W (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_40d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -10573,7 +10573,7 @@ unsigned long REGPARAM2 CPUFUNC(op_40d8_0)(uae_u32 opcode, struct regstruct *reg put_word (srca,regs->sr); }}} m68k_incpc (regs, 2); endlabel647: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* MVSR2.W -(An) */ unsigned long REGPARAM2 CPUFUNC(op_40e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -10587,7 +10587,7 @@ unsigned long REGPARAM2 CPUFUNC(op_40e0_0)(uae_u32 opcode, struct regstruct *reg put_word (srca,regs->sr); }}} m68k_incpc (regs, 2); endlabel648: ; -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* MVSR2.W (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_40e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -10599,7 +10599,7 @@ unsigned long REGPARAM2 CPUFUNC(op_40e8_0)(uae_u32 opcode, struct regstruct *reg put_word (srca,regs->sr); }}} m68k_incpc (regs, 4); endlabel649: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* MVSR2.W (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_40f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -10612,7 +10612,7 @@ unsigned long REGPARAM2 CPUFUNC(op_40f0_0)(uae_u32 opcode, struct regstruct *reg MakeSR(regs); put_word (srca,regs->sr); }}}}endlabel650: ; -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* MVSR2.W (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_40f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -10623,7 +10623,7 @@ unsigned long REGPARAM2 CPUFUNC(op_40f8_0)(uae_u32 opcode, struct regstruct *reg put_word (srca,regs->sr); }}} m68k_incpc (regs, 4); endlabel651: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* MVSR2.W (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_40f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -10634,7 +10634,7 @@ unsigned long REGPARAM2 CPUFUNC(op_40f9_0)(uae_u32 opcode, struct regstruct *reg put_word (srca,regs->sr); }}} m68k_incpc (regs, 6); endlabel652: ; -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* CHK.L Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_4100_0)(uae_u32 opcode, struct regstruct *regs) @@ -10655,7 +10655,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4100_0)(uae_u32 opcode, struct regstruct *reg goto endlabel653; } }}}endlabel653: ; -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* CHK.L (An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_4110_0)(uae_u32 opcode, struct regstruct *regs) @@ -10677,7 +10677,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4110_0)(uae_u32 opcode, struct regstruct *reg goto endlabel654; } }}}}endlabel654: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CHK.L (An)+,Dn */ unsigned long REGPARAM2 CPUFUNC(op_4118_0)(uae_u32 opcode, struct regstruct *regs) @@ -10700,7 +10700,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4118_0)(uae_u32 opcode, struct regstruct *reg goto endlabel655; } }}}}endlabel655: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CHK.L -(An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_4120_0)(uae_u32 opcode, struct regstruct *regs) @@ -10724,7 +10724,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4120_0)(uae_u32 opcode, struct regstruct *reg goto endlabel656; } }}}}endlabel656: ; -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* CHK.L (d16,An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_4128_0)(uae_u32 opcode, struct regstruct *regs) @@ -10746,7 +10746,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4128_0)(uae_u32 opcode, struct regstruct *reg goto endlabel657; } }}}}endlabel657: ; -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* CHK.L (d8,An,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_4130_0)(uae_u32 opcode, struct regstruct *regs) @@ -10769,7 +10769,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4130_0)(uae_u32 opcode, struct regstruct *reg goto endlabel658; } }}}}}endlabel658: ; -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* CHK.L (xxx).W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_4138_0)(uae_u32 opcode, struct regstruct *regs) @@ -10790,7 +10790,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4138_0)(uae_u32 opcode, struct regstruct *reg goto endlabel659; } }}}}endlabel659: ; -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* CHK.L (xxx).L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_4139_0)(uae_u32 opcode, struct regstruct *regs) @@ -10811,7 +10811,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4139_0)(uae_u32 opcode, struct regstruct *reg goto endlabel660; } }}}}endlabel660: ; -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* CHK.L (d16,PC),Dn */ unsigned long REGPARAM2 CPUFUNC(op_413a_0)(uae_u32 opcode, struct regstruct *regs) @@ -10833,7 +10833,7 @@ unsigned long REGPARAM2 CPUFUNC(op_413a_0)(uae_u32 opcode, struct regstruct *reg goto endlabel661; } }}}}endlabel661: ; -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* CHK.L (d8,PC,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_413b_0)(uae_u32 opcode, struct regstruct *regs) @@ -10857,7 +10857,7 @@ unsigned long REGPARAM2 CPUFUNC(op_413b_0)(uae_u32 opcode, struct regstruct *reg goto endlabel662; } }}}}}endlabel662: ; -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* CHK.L #.L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_413c_0)(uae_u32 opcode, struct regstruct *regs) @@ -10877,7 +10877,7 @@ unsigned long REGPARAM2 CPUFUNC(op_413c_0)(uae_u32 opcode, struct regstruct *reg goto endlabel663; } }}}endlabel663: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CHK.W Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_4180_0)(uae_u32 opcode, struct regstruct *regs) @@ -10898,7 +10898,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4180_0)(uae_u32 opcode, struct regstruct *reg goto endlabel664; } }}}endlabel664: ; -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* CHK.W (An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_4190_0)(uae_u32 opcode, struct regstruct *regs) @@ -10920,7 +10920,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4190_0)(uae_u32 opcode, struct regstruct *reg goto endlabel665; } }}}}endlabel665: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* CHK.W (An)+,Dn */ unsigned long REGPARAM2 CPUFUNC(op_4198_0)(uae_u32 opcode, struct regstruct *regs) @@ -10943,7 +10943,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4198_0)(uae_u32 opcode, struct regstruct *reg goto endlabel666; } }}}}endlabel666: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* CHK.W -(An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_41a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -10967,7 +10967,7 @@ unsigned long REGPARAM2 CPUFUNC(op_41a0_0)(uae_u32 opcode, struct regstruct *reg goto endlabel667; } }}}}endlabel667: ; -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* CHK.W (d16,An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_41a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -10989,7 +10989,7 @@ unsigned long REGPARAM2 CPUFUNC(op_41a8_0)(uae_u32 opcode, struct regstruct *reg goto endlabel668; } }}}}endlabel668: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CHK.W (d8,An,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_41b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -11012,7 +11012,7 @@ unsigned long REGPARAM2 CPUFUNC(op_41b0_0)(uae_u32 opcode, struct regstruct *reg goto endlabel669; } }}}}}endlabel669: ; -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* CHK.W (xxx).W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_41b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -11033,7 +11033,7 @@ unsigned long REGPARAM2 CPUFUNC(op_41b8_0)(uae_u32 opcode, struct regstruct *reg goto endlabel670; } }}}}endlabel670: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CHK.W (xxx).L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_41b9_0)(uae_u32 opcode, struct regstruct *regs) @@ -11054,7 +11054,7 @@ unsigned long REGPARAM2 CPUFUNC(op_41b9_0)(uae_u32 opcode, struct regstruct *reg goto endlabel671; } }}}}endlabel671: ; -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* CHK.W (d16,PC),Dn */ unsigned long REGPARAM2 CPUFUNC(op_41ba_0)(uae_u32 opcode, struct regstruct *regs) @@ -11076,7 +11076,7 @@ unsigned long REGPARAM2 CPUFUNC(op_41ba_0)(uae_u32 opcode, struct regstruct *reg goto endlabel672; } }}}}endlabel672: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CHK.W (d8,PC,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_41bb_0)(uae_u32 opcode, struct regstruct *regs) @@ -11100,7 +11100,7 @@ unsigned long REGPARAM2 CPUFUNC(op_41bb_0)(uae_u32 opcode, struct regstruct *reg goto endlabel673; } }}}}}endlabel673: ; -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* CHK.W #.W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_41bc_0)(uae_u32 opcode, struct regstruct *regs) @@ -11120,7 +11120,7 @@ unsigned long REGPARAM2 CPUFUNC(op_41bc_0)(uae_u32 opcode, struct regstruct *reg goto endlabel674; } }}}endlabel674: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* LEA.L (An),An */ unsigned long REGPARAM2 CPUFUNC(op_41d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -11130,7 +11130,7 @@ unsigned long REGPARAM2 CPUFUNC(op_41d0_0)(uae_u32 opcode, struct regstruct *reg {{ uaecptr srca = m68k_areg(regs, srcreg); { m68k_areg(regs, dstreg) = (srca); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* LEA.L (d16,An),An */ unsigned long REGPARAM2 CPUFUNC(op_41e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -11140,7 +11140,7 @@ unsigned long REGPARAM2 CPUFUNC(op_41e8_0)(uae_u32 opcode, struct regstruct *reg {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); { m68k_areg(regs, dstreg) = (srca); }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* LEA.L (d8,An,Xn),An */ unsigned long REGPARAM2 CPUFUNC(op_41f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -11151,7 +11151,7 @@ unsigned long REGPARAM2 CPUFUNC(op_41f0_0)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 2); { srca = get_disp_ea_020(regs, m68k_areg(regs, srcreg), next_iword(regs)); { m68k_areg(regs, dstreg) = (srca); -}}}}return 8 * 256; +}}}}return 8 * CYCLE_UNIT / 2; } /* LEA.L (xxx).W,An */ unsigned long REGPARAM2 CPUFUNC(op_41f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -11160,7 +11160,7 @@ unsigned long REGPARAM2 CPUFUNC(op_41f8_0)(uae_u32 opcode, struct regstruct *reg {{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); { m68k_areg(regs, dstreg) = (srca); }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* LEA.L (xxx).L,An */ unsigned long REGPARAM2 CPUFUNC(op_41f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -11169,7 +11169,7 @@ unsigned long REGPARAM2 CPUFUNC(op_41f9_0)(uae_u32 opcode, struct regstruct *reg {{ uaecptr srca = get_ilong (regs, 2); { m68k_areg(regs, dstreg) = (srca); }}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* LEA.L (d16,PC),An */ unsigned long REGPARAM2 CPUFUNC(op_41fa_0)(uae_u32 opcode, struct regstruct *regs) @@ -11179,7 +11179,7 @@ unsigned long REGPARAM2 CPUFUNC(op_41fa_0)(uae_u32 opcode, struct regstruct *reg srca += (uae_s32)(uae_s16)get_iword (regs, 2); { m68k_areg(regs, dstreg) = (srca); }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* LEA.L (d8,PC,Xn),An */ unsigned long REGPARAM2 CPUFUNC(op_41fb_0)(uae_u32 opcode, struct regstruct *regs) @@ -11191,7 +11191,7 @@ unsigned long REGPARAM2 CPUFUNC(op_41fb_0)(uae_u32 opcode, struct regstruct *reg { tmppc = m68k_getpc(regs); srca = get_disp_ea_020(regs, tmppc, next_iword(regs)); { m68k_areg(regs, dstreg) = (srca); -}}}}return 8 * 256; +}}}}return 8 * CYCLE_UNIT / 2; } /* CLR.B Dn */ unsigned long REGPARAM2 CPUFUNC(op_4200_0)(uae_u32 opcode, struct regstruct *regs) @@ -11202,7 +11202,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4200_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(0)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff); }} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* CLR.B (An) */ unsigned long REGPARAM2 CPUFUNC(op_4210_0)(uae_u32 opcode, struct regstruct *regs) @@ -11214,7 +11214,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4210_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(0)) < 0); put_byte (srca,0); }} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* CLR.B (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_4218_0)(uae_u32 opcode, struct regstruct *regs) @@ -11227,7 +11227,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4218_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(0)) < 0); put_byte (srca,0); }} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* CLR.B -(An) */ unsigned long REGPARAM2 CPUFUNC(op_4220_0)(uae_u32 opcode, struct regstruct *regs) @@ -11241,7 +11241,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4220_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(0)) < 0); put_byte (srca,0); }} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* CLR.B (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_4228_0)(uae_u32 opcode, struct regstruct *regs) @@ -11253,7 +11253,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4228_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(0)) < 0); put_byte (srca,0); }} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CLR.B (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_4230_0)(uae_u32 opcode, struct regstruct *regs) @@ -11266,7 +11266,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4230_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(0)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(0)) < 0); put_byte (srca,0); -}}}return 14 * 256; +}}}return 14 * CYCLE_UNIT / 2; } /* CLR.B (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_4238_0)(uae_u32 opcode, struct regstruct *regs) @@ -11277,7 +11277,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4238_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(0)) < 0); put_byte (srca,0); }} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CLR.B (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_4239_0)(uae_u32 opcode, struct regstruct *regs) @@ -11288,7 +11288,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4239_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(0)) < 0); put_byte (srca,0); }} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* CLR.W Dn */ unsigned long REGPARAM2 CPUFUNC(op_4240_0)(uae_u32 opcode, struct regstruct *regs) @@ -11299,7 +11299,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4240_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(0)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff); }} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* CLR.W (An) */ unsigned long REGPARAM2 CPUFUNC(op_4250_0)(uae_u32 opcode, struct regstruct *regs) @@ -11311,7 +11311,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4250_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(0)) < 0); put_word (srca,0); }} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* CLR.W (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_4258_0)(uae_u32 opcode, struct regstruct *regs) @@ -11324,7 +11324,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4258_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(0)) < 0); put_word (srca,0); }} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* CLR.W -(An) */ unsigned long REGPARAM2 CPUFUNC(op_4260_0)(uae_u32 opcode, struct regstruct *regs) @@ -11338,7 +11338,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4260_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(0)) < 0); put_word (srca,0); }} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* CLR.W (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_4268_0)(uae_u32 opcode, struct regstruct *regs) @@ -11350,7 +11350,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4268_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(0)) < 0); put_word (srca,0); }} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CLR.W (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_4270_0)(uae_u32 opcode, struct regstruct *regs) @@ -11363,7 +11363,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4270_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(0)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(0)) < 0); put_word (srca,0); -}}}return 14 * 256; +}}}return 14 * CYCLE_UNIT / 2; } /* CLR.W (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_4278_0)(uae_u32 opcode, struct regstruct *regs) @@ -11374,7 +11374,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4278_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(0)) < 0); put_word (srca,0); }} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CLR.W (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_4279_0)(uae_u32 opcode, struct regstruct *regs) @@ -11385,7 +11385,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4279_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(0)) < 0); put_word (srca,0); }} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* CLR.L Dn */ unsigned long REGPARAM2 CPUFUNC(op_4280_0)(uae_u32 opcode, struct regstruct *regs) @@ -11396,7 +11396,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4280_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(0)) < 0); m68k_dreg(regs, srcreg) = (0); }} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* CLR.L (An) */ unsigned long REGPARAM2 CPUFUNC(op_4290_0)(uae_u32 opcode, struct regstruct *regs) @@ -11408,11 +11408,8 @@ unsigned long REGPARAM2 CPUFUNC(op_4290_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(0)) < 0); put_long (srca,0); }} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } -#endif - -#ifdef PART_4 /* CLR.L (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_4298_0)(uae_u32 opcode, struct regstruct *regs) { @@ -11424,7 +11421,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4298_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(0)) < 0); put_long (srca,0); }} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CLR.L -(An) */ unsigned long REGPARAM2 CPUFUNC(op_42a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -11438,7 +11435,7 @@ unsigned long REGPARAM2 CPUFUNC(op_42a0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(0)) < 0); put_long (srca,0); }} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* CLR.L (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_42a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -11450,7 +11447,7 @@ unsigned long REGPARAM2 CPUFUNC(op_42a8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(0)) < 0); put_long (srca,0); }} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* CLR.L (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_42b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -11463,7 +11460,7 @@ unsigned long REGPARAM2 CPUFUNC(op_42b0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(0)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(0)) < 0); put_long (srca,0); -}}}return 18 * 256; +}}}return 18 * CYCLE_UNIT / 2; } /* CLR.L (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_42b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -11474,7 +11471,7 @@ unsigned long REGPARAM2 CPUFUNC(op_42b8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(0)) < 0); put_long (srca,0); }} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* CLR.L (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_42b9_0)(uae_u32 opcode, struct regstruct *regs) @@ -11485,7 +11482,7 @@ unsigned long REGPARAM2 CPUFUNC(op_42b9_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(0)) < 0); put_long (srca,0); }} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* MVSR2.B Dn */ #ifndef CPUEMU_68000_ONLY @@ -11495,7 +11492,7 @@ unsigned long REGPARAM2 CPUFUNC(op_42c0_0)(uae_u32 opcode, struct regstruct *reg {{ MakeSR(regs); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs->sr & 0xff) & 0xffff); }} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } #endif /* MVSR2.B (An) */ @@ -11507,7 +11504,7 @@ unsigned long REGPARAM2 CPUFUNC(op_42d0_0)(uae_u32 opcode, struct regstruct *reg MakeSR(regs); put_word (srca,regs->sr & 0xff); }} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* MVSR2.B (An)+ */ @@ -11520,9 +11517,12 @@ unsigned long REGPARAM2 CPUFUNC(op_42d8_0)(uae_u32 opcode, struct regstruct *reg MakeSR(regs); put_word (srca,regs->sr & 0xff); }} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif +#endif + +#ifdef PART_4 /* MVSR2.B -(An) */ #ifndef CPUEMU_68000_ONLY unsigned long REGPARAM2 CPUFUNC(op_42e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -11534,7 +11534,7 @@ unsigned long REGPARAM2 CPUFUNC(op_42e0_0)(uae_u32 opcode, struct regstruct *reg MakeSR(regs); put_word (srca,regs->sr & 0xff); }} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } #endif /* MVSR2.B (d16,An) */ @@ -11546,7 +11546,7 @@ unsigned long REGPARAM2 CPUFUNC(op_42e8_0)(uae_u32 opcode, struct regstruct *reg MakeSR(regs); put_word (srca,regs->sr & 0xff); }} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* MVSR2.B (d8,An,Xn) */ @@ -11559,7 +11559,7 @@ unsigned long REGPARAM2 CPUFUNC(op_42f0_0)(uae_u32 opcode, struct regstruct *reg { srca = get_disp_ea_020(regs, m68k_areg(regs, srcreg), next_iword(regs)); MakeSR(regs); put_word (srca,regs->sr & 0xff); -}}}return 14 * 256; +}}}return 14 * CYCLE_UNIT / 2; } #endif /* MVSR2.B (xxx).W */ @@ -11570,7 +11570,7 @@ unsigned long REGPARAM2 CPUFUNC(op_42f8_0)(uae_u32 opcode, struct regstruct *reg MakeSR(regs); put_word (srca,regs->sr & 0xff); }} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* MVSR2.B (xxx).L */ @@ -11581,7 +11581,7 @@ unsigned long REGPARAM2 CPUFUNC(op_42f9_0)(uae_u32 opcode, struct regstruct *reg MakeSR(regs); put_word (srca,regs->sr & 0xff); }} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } #endif /* NEG.B Dn */ @@ -11600,7 +11600,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4400_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); }}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* NEG.B (An) */ unsigned long REGPARAM2 CPUFUNC(op_4410_0)(uae_u32 opcode, struct regstruct *regs) @@ -11619,7 +11619,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4410_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (srca,dst); }}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* NEG.B (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_4418_0)(uae_u32 opcode, struct regstruct *regs) @@ -11639,7 +11639,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4418_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (srca,dst); }}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* NEG.B -(An) */ unsigned long REGPARAM2 CPUFUNC(op_4420_0)(uae_u32 opcode, struct regstruct *regs) @@ -11660,7 +11660,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4420_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (srca,dst); }}}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* NEG.B (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_4428_0)(uae_u32 opcode, struct regstruct *regs) @@ -11679,7 +11679,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4428_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (srca,dst); }}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* NEG.B (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_4430_0)(uae_u32 opcode, struct regstruct *regs) @@ -11699,7 +11699,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4430_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); put_byte (srca,dst); -}}}}}}}return 18 * 256; +}}}}}}}return 18 * CYCLE_UNIT / 2; } /* NEG.B (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_4438_0)(uae_u32 opcode, struct regstruct *regs) @@ -11717,7 +11717,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4438_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (srca,dst); }}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* NEG.B (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_4439_0)(uae_u32 opcode, struct regstruct *regs) @@ -11735,7 +11735,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4439_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (srca,dst); }}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* NEG.W Dn */ unsigned long REGPARAM2 CPUFUNC(op_4440_0)(uae_u32 opcode, struct regstruct *regs) @@ -11753,7 +11753,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4440_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); }}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* NEG.W (An) */ unsigned long REGPARAM2 CPUFUNC(op_4450_0)(uae_u32 opcode, struct regstruct *regs) @@ -11772,7 +11772,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4450_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (srca,dst); }}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* NEG.W (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_4458_0)(uae_u32 opcode, struct regstruct *regs) @@ -11792,7 +11792,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4458_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (srca,dst); }}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* NEG.W -(An) */ unsigned long REGPARAM2 CPUFUNC(op_4460_0)(uae_u32 opcode, struct regstruct *regs) @@ -11813,7 +11813,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4460_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (srca,dst); }}}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* NEG.W (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_4468_0)(uae_u32 opcode, struct regstruct *regs) @@ -11832,7 +11832,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4468_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (srca,dst); }}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* NEG.W (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_4470_0)(uae_u32 opcode, struct regstruct *regs) @@ -11852,7 +11852,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4470_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); put_word (srca,dst); -}}}}}}}return 18 * 256; +}}}}}}}return 18 * CYCLE_UNIT / 2; } /* NEG.W (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_4478_0)(uae_u32 opcode, struct regstruct *regs) @@ -11870,7 +11870,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4478_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (srca,dst); }}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* NEG.W (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_4479_0)(uae_u32 opcode, struct regstruct *regs) @@ -11888,7 +11888,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4479_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (srca,dst); }}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* NEG.L Dn */ unsigned long REGPARAM2 CPUFUNC(op_4480_0)(uae_u32 opcode, struct regstruct *regs) @@ -11906,7 +11906,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4480_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, srcreg) = (dst); }}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* NEG.L (An) */ unsigned long REGPARAM2 CPUFUNC(op_4490_0)(uae_u32 opcode, struct regstruct *regs) @@ -11925,7 +11925,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4490_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (srca,dst); }}}}}} m68k_incpc (regs, 2); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* NEG.L (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_4498_0)(uae_u32 opcode, struct regstruct *regs) @@ -11945,7 +11945,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4498_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (srca,dst); }}}}}} m68k_incpc (regs, 2); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* NEG.L -(An) */ unsigned long REGPARAM2 CPUFUNC(op_44a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -11966,7 +11966,7 @@ unsigned long REGPARAM2 CPUFUNC(op_44a0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (srca,dst); }}}}}} m68k_incpc (regs, 2); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* NEG.L (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_44a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -11985,7 +11985,7 @@ unsigned long REGPARAM2 CPUFUNC(op_44a8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (srca,dst); }}}}}} m68k_incpc (regs, 4); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* NEG.L (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_44b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -12005,7 +12005,7 @@ unsigned long REGPARAM2 CPUFUNC(op_44b0_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); put_long (srca,dst); -}}}}}}}return 26 * 256; +}}}}}}}return 26 * CYCLE_UNIT / 2; } /* NEG.L (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_44b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -12023,7 +12023,7 @@ unsigned long REGPARAM2 CPUFUNC(op_44b8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (srca,dst); }}}}}} m68k_incpc (regs, 4); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* NEG.L (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_44b9_0)(uae_u32 opcode, struct regstruct *regs) @@ -12041,7 +12041,7 @@ unsigned long REGPARAM2 CPUFUNC(op_44b9_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (srca,dst); }}}}}} m68k_incpc (regs, 6); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* MV2SR.B Dn */ unsigned long REGPARAM2 CPUFUNC(op_44c0_0)(uae_u32 opcode, struct regstruct *regs) @@ -12053,7 +12053,7 @@ unsigned long REGPARAM2 CPUFUNC(op_44c0_0)(uae_u32 opcode, struct regstruct *reg regs->sr |= src & 0xFF; MakeFromSR(regs); }} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* MV2SR.B (An) */ unsigned long REGPARAM2 CPUFUNC(op_44d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -12066,7 +12066,7 @@ unsigned long REGPARAM2 CPUFUNC(op_44d0_0)(uae_u32 opcode, struct regstruct *reg regs->sr |= src & 0xFF; MakeFromSR(regs); }}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* MV2SR.B (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_44d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -12080,7 +12080,7 @@ unsigned long REGPARAM2 CPUFUNC(op_44d8_0)(uae_u32 opcode, struct regstruct *reg regs->sr |= src & 0xFF; MakeFromSR(regs); }}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* MV2SR.B -(An) */ unsigned long REGPARAM2 CPUFUNC(op_44e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -12095,7 +12095,7 @@ unsigned long REGPARAM2 CPUFUNC(op_44e0_0)(uae_u32 opcode, struct regstruct *reg regs->sr |= src & 0xFF; MakeFromSR(regs); }}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* MV2SR.B (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_44e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -12108,7 +12108,7 @@ unsigned long REGPARAM2 CPUFUNC(op_44e8_0)(uae_u32 opcode, struct regstruct *reg regs->sr |= src & 0xFF; MakeFromSR(regs); }}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* MV2SR.B (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_44f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -12122,7 +12122,7 @@ unsigned long REGPARAM2 CPUFUNC(op_44f0_0)(uae_u32 opcode, struct regstruct *reg regs->sr &= 0xFF00; regs->sr |= src & 0xFF; MakeFromSR(regs); -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* MV2SR.B (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_44f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -12134,7 +12134,7 @@ unsigned long REGPARAM2 CPUFUNC(op_44f8_0)(uae_u32 opcode, struct regstruct *reg regs->sr |= src & 0xFF; MakeFromSR(regs); }}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* MV2SR.B (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_44f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -12146,7 +12146,7 @@ unsigned long REGPARAM2 CPUFUNC(op_44f9_0)(uae_u32 opcode, struct regstruct *reg regs->sr |= src & 0xFF; MakeFromSR(regs); }}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* MV2SR.B (d16,PC) */ unsigned long REGPARAM2 CPUFUNC(op_44fa_0)(uae_u32 opcode, struct regstruct *regs) @@ -12159,7 +12159,7 @@ unsigned long REGPARAM2 CPUFUNC(op_44fa_0)(uae_u32 opcode, struct regstruct *reg regs->sr |= src & 0xFF; MakeFromSR(regs); }}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* MV2SR.B (d8,PC,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_44fb_0)(uae_u32 opcode, struct regstruct *regs) @@ -12174,7 +12174,7 @@ unsigned long REGPARAM2 CPUFUNC(op_44fb_0)(uae_u32 opcode, struct regstruct *reg regs->sr &= 0xFF00; regs->sr |= src & 0xFF; MakeFromSR(regs); -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* MV2SR.B #.B */ unsigned long REGPARAM2 CPUFUNC(op_44fc_0)(uae_u32 opcode, struct regstruct *regs) @@ -12185,7 +12185,7 @@ unsigned long REGPARAM2 CPUFUNC(op_44fc_0)(uae_u32 opcode, struct regstruct *reg regs->sr |= src & 0xFF; MakeFromSR(regs); }} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* NOT.B Dn */ unsigned long REGPARAM2 CPUFUNC(op_4600_0)(uae_u32 opcode, struct regstruct *regs) @@ -12198,7 +12198,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4600_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(dst)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* NOT.B (An) */ unsigned long REGPARAM2 CPUFUNC(op_4610_0)(uae_u32 opcode, struct regstruct *regs) @@ -12212,7 +12212,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4610_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(dst)) < 0); put_byte (srca,dst); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* NOT.B (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_4618_0)(uae_u32 opcode, struct regstruct *regs) @@ -12227,7 +12227,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4618_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(dst)) < 0); put_byte (srca,dst); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* NOT.B -(An) */ unsigned long REGPARAM2 CPUFUNC(op_4620_0)(uae_u32 opcode, struct regstruct *regs) @@ -12243,7 +12243,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4620_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(dst)) < 0); put_byte (srca,dst); }}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* NOT.B (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_4628_0)(uae_u32 opcode, struct regstruct *regs) @@ -12257,7 +12257,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4628_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(dst)) < 0); put_byte (srca,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* NOT.B (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_4630_0)(uae_u32 opcode, struct regstruct *regs) @@ -12272,7 +12272,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4630_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(dst)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(dst)) < 0); put_byte (srca,dst); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* NOT.B (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_4638_0)(uae_u32 opcode, struct regstruct *regs) @@ -12285,7 +12285,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4638_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(dst)) < 0); put_byte (srca,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* NOT.B (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_4639_0)(uae_u32 opcode, struct regstruct *regs) @@ -12298,7 +12298,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4639_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(dst)) < 0); put_byte (srca,dst); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* NOT.W Dn */ unsigned long REGPARAM2 CPUFUNC(op_4640_0)(uae_u32 opcode, struct regstruct *regs) @@ -12311,7 +12311,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4640_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(dst)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* NOT.W (An) */ unsigned long REGPARAM2 CPUFUNC(op_4650_0)(uae_u32 opcode, struct regstruct *regs) @@ -12325,7 +12325,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4650_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(dst)) < 0); put_word (srca,dst); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* NOT.W (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_4658_0)(uae_u32 opcode, struct regstruct *regs) @@ -12340,7 +12340,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4658_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(dst)) < 0); put_word (srca,dst); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* NOT.W -(An) */ unsigned long REGPARAM2 CPUFUNC(op_4660_0)(uae_u32 opcode, struct regstruct *regs) @@ -12356,7 +12356,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4660_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(dst)) < 0); put_word (srca,dst); }}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* NOT.W (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_4668_0)(uae_u32 opcode, struct regstruct *regs) @@ -12370,7 +12370,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4668_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(dst)) < 0); put_word (srca,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* NOT.W (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_4670_0)(uae_u32 opcode, struct regstruct *regs) @@ -12385,7 +12385,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4670_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(dst)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(dst)) < 0); put_word (srca,dst); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* NOT.W (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_4678_0)(uae_u32 opcode, struct regstruct *regs) @@ -12398,7 +12398,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4678_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(dst)) < 0); put_word (srca,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* NOT.W (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_4679_0)(uae_u32 opcode, struct regstruct *regs) @@ -12411,7 +12411,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4679_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(dst)) < 0); put_word (srca,dst); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* NOT.L Dn */ unsigned long REGPARAM2 CPUFUNC(op_4680_0)(uae_u32 opcode, struct regstruct *regs) @@ -12424,7 +12424,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4680_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(dst)) < 0); m68k_dreg(regs, srcreg) = (dst); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* NOT.L (An) */ unsigned long REGPARAM2 CPUFUNC(op_4690_0)(uae_u32 opcode, struct regstruct *regs) @@ -12438,7 +12438,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4690_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(dst)) < 0); put_long (srca,dst); }}}} m68k_incpc (regs, 2); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* NOT.L (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_4698_0)(uae_u32 opcode, struct regstruct *regs) @@ -12453,7 +12453,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4698_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(dst)) < 0); put_long (srca,dst); }}}} m68k_incpc (regs, 2); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* NOT.L -(An) */ unsigned long REGPARAM2 CPUFUNC(op_46a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -12469,7 +12469,7 @@ unsigned long REGPARAM2 CPUFUNC(op_46a0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(dst)) < 0); put_long (srca,dst); }}}} m68k_incpc (regs, 2); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* NOT.L (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_46a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -12483,7 +12483,7 @@ unsigned long REGPARAM2 CPUFUNC(op_46a8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(dst)) < 0); put_long (srca,dst); }}}} m68k_incpc (regs, 4); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* NOT.L (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_46b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -12498,7 +12498,7 @@ unsigned long REGPARAM2 CPUFUNC(op_46b0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(dst)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(dst)) < 0); put_long (srca,dst); -}}}}}return 26 * 256; +}}}}}return 26 * CYCLE_UNIT / 2; } /* NOT.L (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_46b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -12511,7 +12511,7 @@ unsigned long REGPARAM2 CPUFUNC(op_46b8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(dst)) < 0); put_long (srca,dst); }}}} m68k_incpc (regs, 4); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* NOT.L (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_46b9_0)(uae_u32 opcode, struct regstruct *regs) @@ -12524,7 +12524,7 @@ unsigned long REGPARAM2 CPUFUNC(op_46b9_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(dst)) < 0); put_long (srca,dst); }}}} m68k_incpc (regs, 6); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* MV2SR.W Dn */ unsigned long REGPARAM2 CPUFUNC(op_46c0_0)(uae_u32 opcode, struct regstruct *regs) @@ -12536,7 +12536,7 @@ unsigned long REGPARAM2 CPUFUNC(op_46c0_0)(uae_u32 opcode, struct regstruct *reg MakeFromSR(regs); }}} m68k_incpc (regs, 2); endlabel773: ; -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* MV2SR.W (An) */ unsigned long REGPARAM2 CPUFUNC(op_46d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -12549,7 +12549,7 @@ unsigned long REGPARAM2 CPUFUNC(op_46d0_0)(uae_u32 opcode, struct regstruct *reg MakeFromSR(regs); }}}} m68k_incpc (regs, 2); endlabel774: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* MV2SR.W (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_46d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -12563,7 +12563,7 @@ unsigned long REGPARAM2 CPUFUNC(op_46d8_0)(uae_u32 opcode, struct regstruct *reg MakeFromSR(regs); }}}} m68k_incpc (regs, 2); endlabel775: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* MV2SR.W -(An) */ unsigned long REGPARAM2 CPUFUNC(op_46e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -12578,7 +12578,7 @@ unsigned long REGPARAM2 CPUFUNC(op_46e0_0)(uae_u32 opcode, struct regstruct *reg MakeFromSR(regs); }}}} m68k_incpc (regs, 2); endlabel776: ; -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* MV2SR.W (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_46e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -12591,7 +12591,7 @@ unsigned long REGPARAM2 CPUFUNC(op_46e8_0)(uae_u32 opcode, struct regstruct *reg MakeFromSR(regs); }}}} m68k_incpc (regs, 4); endlabel777: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* MV2SR.W (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_46f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -12605,7 +12605,7 @@ unsigned long REGPARAM2 CPUFUNC(op_46f0_0)(uae_u32 opcode, struct regstruct *reg regs->sr = src; MakeFromSR(regs); }}}}}endlabel778: ; -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* MV2SR.W (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_46f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -12617,7 +12617,7 @@ unsigned long REGPARAM2 CPUFUNC(op_46f8_0)(uae_u32 opcode, struct regstruct *reg MakeFromSR(regs); }}}} m68k_incpc (regs, 4); endlabel779: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* MV2SR.W (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_46f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -12629,7 +12629,7 @@ unsigned long REGPARAM2 CPUFUNC(op_46f9_0)(uae_u32 opcode, struct regstruct *reg MakeFromSR(regs); }}}} m68k_incpc (regs, 6); endlabel780: ; -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* MV2SR.W (d16,PC) */ unsigned long REGPARAM2 CPUFUNC(op_46fa_0)(uae_u32 opcode, struct regstruct *regs) @@ -12642,7 +12642,7 @@ unsigned long REGPARAM2 CPUFUNC(op_46fa_0)(uae_u32 opcode, struct regstruct *reg MakeFromSR(regs); }}}} m68k_incpc (regs, 4); endlabel781: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* MV2SR.W (d8,PC,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_46fb_0)(uae_u32 opcode, struct regstruct *regs) @@ -12657,7 +12657,7 @@ unsigned long REGPARAM2 CPUFUNC(op_46fb_0)(uae_u32 opcode, struct regstruct *reg regs->sr = src; MakeFromSR(regs); }}}}}endlabel782: ; -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* MV2SR.W #.W */ unsigned long REGPARAM2 CPUFUNC(op_46fc_0)(uae_u32 opcode, struct regstruct *regs) @@ -12668,7 +12668,7 @@ unsigned long REGPARAM2 CPUFUNC(op_46fc_0)(uae_u32 opcode, struct regstruct *reg MakeFromSR(regs); }}} m68k_incpc (regs, 4); endlabel783: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* NBCD.B Dn */ unsigned long REGPARAM2 CPUFUNC(op_4800_0)(uae_u32 opcode, struct regstruct *regs) @@ -12686,10 +12686,9 @@ unsigned long REGPARAM2 CPUFUNC(op_4800_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, cflg); COPY_CARRY (®s->ccrflags); SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s8)(newv)) == 0)); - SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* LINK.L An,#.L */ #ifndef CPUEMU_68000_ONLY @@ -12705,7 +12704,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4808_0)(uae_u32 opcode, struct regstruct *reg { uae_s32 offs = get_ilong (regs, 2); m68k_areg(regs, 7) += offs; }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } #endif /* NBCD.B (An) */ @@ -12725,10 +12724,9 @@ unsigned long REGPARAM2 CPUFUNC(op_4810_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, cflg); COPY_CARRY (®s->ccrflags); SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s8)(newv)) == 0)); - SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (srca,newv); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* NBCD.B (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_4818_0)(uae_u32 opcode, struct regstruct *regs) @@ -12748,10 +12746,9 @@ unsigned long REGPARAM2 CPUFUNC(op_4818_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, cflg); COPY_CARRY (®s->ccrflags); SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s8)(newv)) == 0)); - SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (srca,newv); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* NBCD.B -(An) */ unsigned long REGPARAM2 CPUFUNC(op_4820_0)(uae_u32 opcode, struct regstruct *regs) @@ -12772,10 +12769,9 @@ unsigned long REGPARAM2 CPUFUNC(op_4820_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, cflg); COPY_CARRY (®s->ccrflags); SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s8)(newv)) == 0)); - SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (srca,newv); }}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* NBCD.B (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_4828_0)(uae_u32 opcode, struct regstruct *regs) @@ -12794,10 +12790,9 @@ unsigned long REGPARAM2 CPUFUNC(op_4828_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, cflg); COPY_CARRY (®s->ccrflags); SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s8)(newv)) == 0)); - SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (srca,newv); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* NBCD.B (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_4830_0)(uae_u32 opcode, struct regstruct *regs) @@ -12818,9 +12813,8 @@ unsigned long REGPARAM2 CPUFUNC(op_4830_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, cflg); COPY_CARRY (®s->ccrflags); SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s8)(newv)) == 0)); - SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (srca,newv); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* NBCD.B (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_4838_0)(uae_u32 opcode, struct regstruct *regs) @@ -12838,10 +12832,9 @@ unsigned long REGPARAM2 CPUFUNC(op_4838_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, cflg); COPY_CARRY (®s->ccrflags); SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s8)(newv)) == 0)); - SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (srca,newv); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* NBCD.B (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_4839_0)(uae_u32 opcode, struct regstruct *regs) @@ -12859,10 +12852,9 @@ unsigned long REGPARAM2 CPUFUNC(op_4839_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, cflg); COPY_CARRY (®s->ccrflags); SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s8)(newv)) == 0)); - SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (srca,newv); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* SWAP.W Dn */ unsigned long REGPARAM2 CPUFUNC(op_4840_0)(uae_u32 opcode, struct regstruct *regs) @@ -12875,7 +12867,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4840_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(dst)) < 0); m68k_dreg(regs, srcreg) = (dst); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* BKPT.L # */ #ifndef CPUEMU_68000_ONLY @@ -12884,7 +12876,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4848_0)(uae_u32 opcode, struct regstruct *reg uae_u32 srcreg = (opcode & 7); { m68k_incpc (regs, 2); op_illg(opcode, regs); -}return 4 * 256; +}return 4 * CYCLE_UNIT / 2; } #endif /* PEA.L (An) */ @@ -12897,7 +12889,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4850_0)(uae_u32 opcode, struct regstruct *reg m68k_areg (regs, 7) = dsta; put_long (dsta,srca); }}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* PEA.L (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_4868_0)(uae_u32 opcode, struct regstruct *regs) @@ -12909,7 +12901,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4868_0)(uae_u32 opcode, struct regstruct *reg m68k_areg (regs, 7) = dsta; put_long (dsta,srca); }}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* PEA.L (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_4870_0)(uae_u32 opcode, struct regstruct *regs) @@ -12922,7 +12914,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4870_0)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, 7) - 4; m68k_areg (regs, 7) = dsta; put_long (dsta,srca); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* PEA.L (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_4878_0)(uae_u32 opcode, struct regstruct *regs) @@ -12933,7 +12925,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4878_0)(uae_u32 opcode, struct regstruct *reg m68k_areg (regs, 7) = dsta; put_long (dsta,srca); }}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* PEA.L (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_4879_0)(uae_u32 opcode, struct regstruct *regs) @@ -12944,7 +12936,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4879_0)(uae_u32 opcode, struct regstruct *reg m68k_areg (regs, 7) = dsta; put_long (dsta,srca); }}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* PEA.L (d16,PC) */ unsigned long REGPARAM2 CPUFUNC(op_487a_0)(uae_u32 opcode, struct regstruct *regs) @@ -12956,7 +12948,7 @@ unsigned long REGPARAM2 CPUFUNC(op_487a_0)(uae_u32 opcode, struct regstruct *reg m68k_areg (regs, 7) = dsta; put_long (dsta,srca); }}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* PEA.L (d8,PC,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_487b_0)(uae_u32 opcode, struct regstruct *regs) @@ -12970,7 +12962,7 @@ unsigned long REGPARAM2 CPUFUNC(op_487b_0)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, 7) - 4; m68k_areg (regs, 7) = dsta; put_long (dsta,srca); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* EXT.W Dn */ unsigned long REGPARAM2 CPUFUNC(op_4880_0)(uae_u32 opcode, struct regstruct *regs) @@ -12983,7 +12975,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4880_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(dst)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* MVMLE.W #.W,(An) */ unsigned long REGPARAM2 CPUFUNC(op_4890_0)(uae_u32 opcode, struct regstruct *regs) @@ -12995,7 +12987,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4890_0)(uae_u32 opcode, struct regstruct *reg while (dmask) { put_word(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; } while (amask) { put_word(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; } }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* MVMLE.W #.W,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_48a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -13005,11 +12997,17 @@ unsigned long REGPARAM2 CPUFUNC(op_48a0_0)(uae_u32 opcode, struct regstruct *reg { uaecptr srca; srca = m68k_areg(regs, dstreg) - 0; { uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; - while (amask) { srca -= 2; put_word(srca, m68k_areg(regs, movem_index2[amask])); amask = movem_next[amask]; } + int type = get_cpu_model() >= 68020; + while (amask) { + srca -= 2; + if (type) m68k_areg(regs, dstreg) = srca; + put_word(srca, m68k_areg(regs, movem_index2[amask])); + amask = movem_next[amask]; + } while (dmask) { srca -= 2; put_word(srca, m68k_dreg(regs, movem_index2[dmask])); dmask = movem_next[dmask]; } m68k_areg(regs, dstreg) = srca; }}} m68k_incpc (regs, 4); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* MVMLE.W #.W,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_48a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -13021,7 +13019,7 @@ unsigned long REGPARAM2 CPUFUNC(op_48a8_0)(uae_u32 opcode, struct regstruct *reg while (dmask) { put_word(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; } while (amask) { put_word(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; } }}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* MVMLE.W #.W,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_48b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -13034,7 +13032,7 @@ unsigned long REGPARAM2 CPUFUNC(op_48b0_0)(uae_u32 opcode, struct regstruct *reg { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; while (dmask) { put_word(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; } while (amask) { put_word(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; } -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* MVMLE.W #.W,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_48b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -13045,7 +13043,7 @@ unsigned long REGPARAM2 CPUFUNC(op_48b8_0)(uae_u32 opcode, struct regstruct *reg while (dmask) { put_word(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; } while (amask) { put_word(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; } }}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* MVMLE.W #.W,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_48b9_0)(uae_u32 opcode, struct regstruct *regs) @@ -13056,7 +13054,7 @@ unsigned long REGPARAM2 CPUFUNC(op_48b9_0)(uae_u32 opcode, struct regstruct *reg while (dmask) { put_word(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; } while (amask) { put_word(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; } }}} m68k_incpc (regs, 8); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* EXT.L Dn */ unsigned long REGPARAM2 CPUFUNC(op_48c0_0)(uae_u32 opcode, struct regstruct *regs) @@ -13069,7 +13067,7 @@ unsigned long REGPARAM2 CPUFUNC(op_48c0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(dst)) < 0); m68k_dreg(regs, srcreg) = (dst); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* MVMLE.L #.W,(An) */ unsigned long REGPARAM2 CPUFUNC(op_48d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -13081,7 +13079,7 @@ unsigned long REGPARAM2 CPUFUNC(op_48d0_0)(uae_u32 opcode, struct regstruct *reg while (dmask) { put_long(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; } while (amask) { put_long(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; } }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* MVMLE.L #.W,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_48e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -13091,11 +13089,17 @@ unsigned long REGPARAM2 CPUFUNC(op_48e0_0)(uae_u32 opcode, struct regstruct *reg { uaecptr srca; srca = m68k_areg(regs, dstreg) - 0; { uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; - while (amask) { srca -= 4; put_long(srca, m68k_areg(regs, movem_index2[amask])); amask = movem_next[amask]; } + int type = get_cpu_model() >= 68020; + while (amask) { + srca -= 4; + if (type) m68k_areg(regs, dstreg) = srca; + put_long(srca, m68k_areg(regs, movem_index2[amask])); + amask = movem_next[amask]; + } while (dmask) { srca -= 4; put_long(srca, m68k_dreg(regs, movem_index2[dmask])); dmask = movem_next[dmask]; } m68k_areg(regs, dstreg) = srca; }}} m68k_incpc (regs, 4); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* MVMLE.L #.W,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_48e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -13107,7 +13111,7 @@ unsigned long REGPARAM2 CPUFUNC(op_48e8_0)(uae_u32 opcode, struct regstruct *reg while (dmask) { put_long(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; } while (amask) { put_long(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; } }}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* MVMLE.L #.W,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_48f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -13120,7 +13124,7 @@ unsigned long REGPARAM2 CPUFUNC(op_48f0_0)(uae_u32 opcode, struct regstruct *reg { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; while (dmask) { put_long(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; } while (amask) { put_long(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; } -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* MVMLE.L #.W,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_48f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -13131,7 +13135,7 @@ unsigned long REGPARAM2 CPUFUNC(op_48f8_0)(uae_u32 opcode, struct regstruct *reg while (dmask) { put_long(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; } while (amask) { put_long(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; } }}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* MVMLE.L #.W,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_48f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -13142,7 +13146,7 @@ unsigned long REGPARAM2 CPUFUNC(op_48f9_0)(uae_u32 opcode, struct regstruct *reg while (dmask) { put_long(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; } while (amask) { put_long(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; } }}} m68k_incpc (regs, 8); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* EXT.B Dn */ unsigned long REGPARAM2 CPUFUNC(op_49c0_0)(uae_u32 opcode, struct regstruct *regs) @@ -13155,7 +13159,7 @@ unsigned long REGPARAM2 CPUFUNC(op_49c0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(dst)) < 0); m68k_dreg(regs, srcreg) = (dst); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* TST.B Dn */ unsigned long REGPARAM2 CPUFUNC(op_4a00_0)(uae_u32 opcode, struct regstruct *regs) @@ -13166,7 +13170,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4a00_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); }} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* TST.B (An) */ unsigned long REGPARAM2 CPUFUNC(op_4a10_0)(uae_u32 opcode, struct regstruct *regs) @@ -13178,7 +13182,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4a10_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); }}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* TST.B (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_4a18_0)(uae_u32 opcode, struct regstruct *regs) @@ -13191,7 +13195,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4a18_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); }}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* TST.B -(An) */ unsigned long REGPARAM2 CPUFUNC(op_4a20_0)(uae_u32 opcode, struct regstruct *regs) @@ -13205,7 +13209,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4a20_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); }}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* TST.B (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_4a28_0)(uae_u32 opcode, struct regstruct *regs) @@ -13217,7 +13221,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4a28_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); }}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* TST.B (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_4a30_0)(uae_u32 opcode, struct regstruct *regs) @@ -13230,7 +13234,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4a30_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* TST.B (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_4a38_0)(uae_u32 opcode, struct regstruct *regs) @@ -13241,7 +13245,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4a38_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); }}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* TST.B (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_4a39_0)(uae_u32 opcode, struct regstruct *regs) @@ -13252,7 +13256,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4a39_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); }}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* TST.B (d16,PC) */ #ifndef CPUEMU_68000_ONLY @@ -13265,7 +13269,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4a3a_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); }}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* TST.B (d8,PC,Xn) */ @@ -13281,7 +13285,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4a3b_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } #endif /* TST.B #.B */ @@ -13293,7 +13297,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4a3c_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); }} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* TST.W Dn */ @@ -13305,7 +13309,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4a40_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); }} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* TST.W An */ #ifndef CPUEMU_68000_ONLY @@ -13317,7 +13321,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4a48_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); }} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } #endif /* TST.W (An) */ @@ -13330,7 +13334,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4a50_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); }}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* TST.W (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_4a58_0)(uae_u32 opcode, struct regstruct *regs) @@ -13343,7 +13347,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4a58_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); }}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* TST.W -(An) */ unsigned long REGPARAM2 CPUFUNC(op_4a60_0)(uae_u32 opcode, struct regstruct *regs) @@ -13357,7 +13361,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4a60_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); }}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* TST.W (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_4a68_0)(uae_u32 opcode, struct regstruct *regs) @@ -13369,7 +13373,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4a68_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); }}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* TST.W (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_4a70_0)(uae_u32 opcode, struct regstruct *regs) @@ -13382,7 +13386,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4a70_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* TST.W (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_4a78_0)(uae_u32 opcode, struct regstruct *regs) @@ -13393,7 +13397,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4a78_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); }}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* TST.W (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_4a79_0)(uae_u32 opcode, struct regstruct *regs) @@ -13404,7 +13408,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4a79_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); }}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* TST.W (d16,PC) */ #ifndef CPUEMU_68000_ONLY @@ -13417,7 +13421,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4a7a_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); }}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* TST.W (d8,PC,Xn) */ @@ -13433,7 +13437,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4a7b_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } #endif /* TST.W #.W */ @@ -13445,7 +13449,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4a7c_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); }} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* TST.L Dn */ @@ -13457,7 +13461,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4a80_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); }} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* TST.L An */ #ifndef CPUEMU_68000_ONLY @@ -13469,7 +13473,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4a88_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); }} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } #endif /* TST.L (An) */ @@ -13482,7 +13486,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4a90_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); }}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* TST.L (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_4a98_0)(uae_u32 opcode, struct regstruct *regs) @@ -13495,7 +13499,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4a98_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); }}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* TST.L -(An) */ unsigned long REGPARAM2 CPUFUNC(op_4aa0_0)(uae_u32 opcode, struct regstruct *regs) @@ -13509,7 +13513,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4aa0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); }}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* TST.L (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_4aa8_0)(uae_u32 opcode, struct regstruct *regs) @@ -13521,7 +13525,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4aa8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); }}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* TST.L (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_4ab0_0)(uae_u32 opcode, struct regstruct *regs) @@ -13534,7 +13538,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4ab0_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* TST.L (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_4ab8_0)(uae_u32 opcode, struct regstruct *regs) @@ -13545,7 +13549,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4ab8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); }}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* TST.L (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_4ab9_0)(uae_u32 opcode, struct regstruct *regs) @@ -13556,7 +13560,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4ab9_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); }}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* TST.L (d16,PC) */ #ifndef CPUEMU_68000_ONLY @@ -13569,7 +13573,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4aba_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); }}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } #endif /* TST.L (d8,PC,Xn) */ @@ -13585,7 +13589,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4abb_0)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } #endif /* TST.L #.L */ @@ -13597,7 +13601,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4abc_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); }} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* TAS.B Dn */ @@ -13611,7 +13615,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4ac0_0)(uae_u32 opcode, struct regstruct *reg src |= 0x80; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); }} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* TAS.B (An) */ unsigned long REGPARAM2 CPUFUNC(op_4ad0_0)(uae_u32 opcode, struct regstruct *regs) @@ -13625,7 +13629,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4ad0_0)(uae_u32 opcode, struct regstruct *reg src |= 0x80; put_byte (srca,src); }}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* TAS.B (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_4ad8_0)(uae_u32 opcode, struct regstruct *regs) @@ -13640,7 +13644,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4ad8_0)(uae_u32 opcode, struct regstruct *reg src |= 0x80; put_byte (srca,src); }}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* TAS.B -(An) */ unsigned long REGPARAM2 CPUFUNC(op_4ae0_0)(uae_u32 opcode, struct regstruct *regs) @@ -13656,7 +13660,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4ae0_0)(uae_u32 opcode, struct regstruct *reg src |= 0x80; put_byte (srca,src); }}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* TAS.B (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_4ae8_0)(uae_u32 opcode, struct regstruct *regs) @@ -13670,7 +13674,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4ae8_0)(uae_u32 opcode, struct regstruct *reg src |= 0x80; put_byte (srca,src); }}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* TAS.B (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_4af0_0)(uae_u32 opcode, struct regstruct *regs) @@ -13685,7 +13689,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4af0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); src |= 0x80; put_byte (srca,src); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* TAS.B (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_4af8_0)(uae_u32 opcode, struct regstruct *regs) @@ -13698,7 +13702,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4af8_0)(uae_u32 opcode, struct regstruct *reg src |= 0x80; put_byte (srca,src); }}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* TAS.B (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_4af9_0)(uae_u32 opcode, struct regstruct *regs) @@ -13711,7 +13715,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4af9_0)(uae_u32 opcode, struct regstruct *reg src |= 0x80; put_byte (srca,src); }}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* MULL.L #.W,Dn */ #ifndef CPUEMU_68000_ONLY @@ -13722,7 +13726,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4c00_0)(uae_u32 opcode, struct regstruct *reg { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc (regs, 4); m68k_mull(opcode, dst, extra); -}}}return 8 * 256; +}}}return 8 * CYCLE_UNIT / 2; } #endif /* MULL.L #.W,(An) */ @@ -13735,7 +13739,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4c10_0)(uae_u32 opcode, struct regstruct *reg { uae_s32 dst = get_long (dsta); m68k_incpc (regs, 4); m68k_mull(opcode, dst, extra); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } #endif /* MULL.L #.W,(An)+ */ @@ -13749,7 +13753,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4c18_0)(uae_u32 opcode, struct regstruct *reg m68k_areg(regs, dstreg) += 4; m68k_incpc (regs, 4); m68k_mull(opcode, dst, extra); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } #endif /* MULL.L #.W,-(An) */ @@ -13764,7 +13768,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4c20_0)(uae_u32 opcode, struct regstruct *reg m68k_areg (regs, dstreg) = dsta; m68k_incpc (regs, 4); m68k_mull(opcode, dst, extra); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } #endif /* MULL.L #.W,(d16,An) */ @@ -13777,7 +13781,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4c28_0)(uae_u32 opcode, struct regstruct *reg { uae_s32 dst = get_long (dsta); m68k_incpc (regs, 6); m68k_mull(opcode, dst, extra); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } #endif /* MULL.L #.W,(d8,An,Xn) */ @@ -13791,7 +13795,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4c30_0)(uae_u32 opcode, struct regstruct *reg { dsta = get_disp_ea_020(regs, m68k_areg(regs, dstreg), next_iword(regs)); { uae_s32 dst = get_long (dsta); m68k_mull(opcode, dst, extra); -}}}}}return 22 * 256; +}}}}}return 22 * CYCLE_UNIT / 2; } #endif /* MULL.L #.W,(xxx).W */ @@ -13803,7 +13807,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4c38_0)(uae_u32 opcode, struct regstruct *reg { uae_s32 dst = get_long (dsta); m68k_incpc (regs, 6); m68k_mull(opcode, dst, extra); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } #endif /* MULL.L #.W,(xxx).L */ @@ -13815,7 +13819,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4c39_0)(uae_u32 opcode, struct regstruct *reg { uae_s32 dst = get_long (dsta); m68k_incpc (regs, 8); m68k_mull(opcode, dst, extra); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } #endif /* MULL.L #.W,(d16,PC) */ @@ -13829,7 +13833,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4c3a_0)(uae_u32 opcode, struct regstruct *reg { uae_s32 dst = get_long (dsta); m68k_incpc (regs, 6); m68k_mull(opcode, dst, extra); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } #endif /* MULL.L #.W,(d8,PC,Xn) */ @@ -13845,7 +13849,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4c3b_0)(uae_u32 opcode, struct regstruct *reg dsta = get_disp_ea_020(regs, tmppc, next_iword(regs)); { uae_s32 dst = get_long (dsta); m68k_mull(opcode, dst, extra); -}}}}}return 22 * 256; +}}}}}return 22 * CYCLE_UNIT / 2; } #endif /* MULL.L #.W,#.L */ @@ -13856,7 +13860,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4c3c_0)(uae_u32 opcode, struct regstruct *reg { uae_s32 dst = get_ilong (regs, 4); m68k_incpc (regs, 8); m68k_mull(opcode, dst, extra); -}}}return 16 * 256; +}}}return 16 * CYCLE_UNIT / 2; } #endif /* DIVL.L #.W,Dn */ @@ -13870,7 +13874,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4c40_0)(uae_u32 opcode, struct regstruct *reg { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc (regs, 2); m68k_divl(opcode, dst, extra, oldpc); -}}}}return 8 * 256; +}}}}return 8 * CYCLE_UNIT / 2; } #endif /* DIVL.L #.W,(An) */ @@ -13885,7 +13889,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4c50_0)(uae_u32 opcode, struct regstruct *reg { uae_s32 dst = get_long (dsta); m68k_incpc (regs, 2); m68k_divl(opcode, dst, extra, oldpc); -}}}}}return 16 * 256; +}}}}}return 16 * CYCLE_UNIT / 2; } #endif /* DIVL.L #.W,(An)+ */ @@ -13901,7 +13905,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4c58_0)(uae_u32 opcode, struct regstruct *reg m68k_areg(regs, dstreg) += 4; m68k_incpc (regs, 2); m68k_divl(opcode, dst, extra, oldpc); -}}}}}return 16 * 256; +}}}}}return 16 * CYCLE_UNIT / 2; } #endif /* DIVL.L #.W,-(An) */ @@ -13918,7 +13922,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4c60_0)(uae_u32 opcode, struct regstruct *reg m68k_areg (regs, dstreg) = dsta; m68k_incpc (regs, 2); m68k_divl(opcode, dst, extra, oldpc); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } #endif /* DIVL.L #.W,(d16,An) */ @@ -13933,7 +13937,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4c68_0)(uae_u32 opcode, struct regstruct *reg { uae_s32 dst = get_long (dsta); m68k_incpc (regs, 4); m68k_divl(opcode, dst, extra, oldpc); -}}}}}return 20 * 256; +}}}}}return 20 * CYCLE_UNIT / 2; } #endif /* DIVL.L #.W,(d8,An,Xn) */ @@ -13949,7 +13953,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4c70_0)(uae_u32 opcode, struct regstruct *reg { dsta = get_disp_ea_020(regs, m68k_areg(regs, dstreg), next_iword(regs)); { uae_s32 dst = get_long (dsta); m68k_divl(opcode, dst, extra, oldpc); -}}}}}}return 22 * 256; +}}}}}}return 22 * CYCLE_UNIT / 2; } #endif /* DIVL.L #.W,(xxx).W */ @@ -13963,7 +13967,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4c78_0)(uae_u32 opcode, struct regstruct *reg { uae_s32 dst = get_long (dsta); m68k_incpc (regs, 4); m68k_divl(opcode, dst, extra, oldpc); -}}}}}return 20 * 256; +}}}}}return 20 * CYCLE_UNIT / 2; } #endif /* DIVL.L #.W,(xxx).L */ @@ -13977,7 +13981,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4c79_0)(uae_u32 opcode, struct regstruct *reg { uae_s32 dst = get_long (dsta); m68k_incpc (regs, 6); m68k_divl(opcode, dst, extra, oldpc); -}}}}}return 24 * 256; +}}}}}return 24 * CYCLE_UNIT / 2; } #endif /* DIVL.L #.W,(d16,PC) */ @@ -13993,7 +13997,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4c7a_0)(uae_u32 opcode, struct regstruct *reg { uae_s32 dst = get_long (dsta); m68k_incpc (regs, 4); m68k_divl(opcode, dst, extra, oldpc); -}}}}}return 20 * 256; +}}}}}return 20 * CYCLE_UNIT / 2; } #endif /* DIVL.L #.W,(d8,PC,Xn) */ @@ -14011,7 +14015,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4c7b_0)(uae_u32 opcode, struct regstruct *reg dsta = get_disp_ea_020(regs, tmppc, next_iword(regs)); { uae_s32 dst = get_long (dsta); m68k_divl(opcode, dst, extra, oldpc); -}}}}}}return 22 * 256; +}}}}}}return 22 * CYCLE_UNIT / 2; } #endif /* DIVL.L #.W,#.L */ @@ -14024,7 +14028,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4c7c_0)(uae_u32 opcode, struct regstruct *reg { uae_s32 dst = get_ilong (regs, 2); m68k_incpc (regs, 6); m68k_divl(opcode, dst, extra, oldpc); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } #endif /* MVMEL.W #.W,(An) */ @@ -14037,7 +14041,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4c90_0)(uae_u32 opcode, struct regstruct *reg { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* MVMEL.W #.W,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_4c98_0)(uae_u32 opcode, struct regstruct *regs) @@ -14050,7 +14054,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4c98_0)(uae_u32 opcode, struct regstruct *reg while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } m68k_areg(regs, dstreg) = srca; }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* MVMEL.W #.W,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_4ca8_0)(uae_u32 opcode, struct regstruct *regs) @@ -14062,7 +14066,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4ca8_0)(uae_u32 opcode, struct regstruct *reg { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } }}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* MVMEL.W #.W,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_4cb0_0)(uae_u32 opcode, struct regstruct *regs) @@ -14075,7 +14079,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4cb0_0)(uae_u32 opcode, struct regstruct *reg { srca = get_disp_ea_020(regs, m68k_areg(regs, dstreg), next_iword(regs)); { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* MVMEL.W #.W,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_4cb8_0)(uae_u32 opcode, struct regstruct *regs) @@ -14086,7 +14090,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4cb8_0)(uae_u32 opcode, struct regstruct *reg { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } }}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* MVMEL.W #.W,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_4cb9_0)(uae_u32 opcode, struct regstruct *regs) @@ -14097,7 +14101,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4cb9_0)(uae_u32 opcode, struct regstruct *reg { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } }}} m68k_incpc (regs, 8); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* MVMEL.W #.W,(d16,PC) */ unsigned long REGPARAM2 CPUFUNC(op_4cba_0)(uae_u32 opcode, struct regstruct *regs) @@ -14110,7 +14114,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4cba_0)(uae_u32 opcode, struct regstruct *reg { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } }}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* MVMEL.W #.W,(d8,PC,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_4cbb_0)(uae_u32 opcode, struct regstruct *regs) @@ -14125,7 +14129,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4cbb_0)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_020(regs, tmppc, next_iword(regs)); { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* MVMEL.L #.W,(An) */ unsigned long REGPARAM2 CPUFUNC(op_4cd0_0)(uae_u32 opcode, struct regstruct *regs) @@ -14137,7 +14141,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4cd0_0)(uae_u32 opcode, struct regstruct *reg { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* MVMEL.L #.W,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_4cd8_0)(uae_u32 opcode, struct regstruct *regs) @@ -14150,7 +14154,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4cd8_0)(uae_u32 opcode, struct regstruct *reg while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } m68k_areg(regs, dstreg) = srca; }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* MVMEL.L #.W,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_4ce8_0)(uae_u32 opcode, struct regstruct *regs) @@ -14162,7 +14166,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4ce8_0)(uae_u32 opcode, struct regstruct *reg { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } }}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* MVMEL.L #.W,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_4cf0_0)(uae_u32 opcode, struct regstruct *regs) @@ -14175,7 +14179,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4cf0_0)(uae_u32 opcode, struct regstruct *reg { srca = get_disp_ea_020(regs, m68k_areg(regs, dstreg), next_iword(regs)); { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* MVMEL.L #.W,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_4cf8_0)(uae_u32 opcode, struct regstruct *regs) @@ -14186,7 +14190,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4cf8_0)(uae_u32 opcode, struct regstruct *reg { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } }}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* MVMEL.L #.W,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_4cf9_0)(uae_u32 opcode, struct regstruct *regs) @@ -14197,7 +14201,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4cf9_0)(uae_u32 opcode, struct regstruct *reg { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } }}} m68k_incpc (regs, 8); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* MVMEL.L #.W,(d16,PC) */ unsigned long REGPARAM2 CPUFUNC(op_4cfa_0)(uae_u32 opcode, struct regstruct *regs) @@ -14210,7 +14214,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4cfa_0)(uae_u32 opcode, struct regstruct *reg { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } }}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* MVMEL.L #.W,(d8,PC,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_4cfb_0)(uae_u32 opcode, struct regstruct *regs) @@ -14225,7 +14229,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4cfb_0)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_020(regs, tmppc, next_iword(regs)); { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* TRAP.L # */ unsigned long REGPARAM2 CPUFUNC(op_4e40_0)(uae_u32 opcode, struct regstruct *regs) @@ -14234,7 +14238,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4e40_0)(uae_u32 opcode, struct regstruct *reg {{ uae_u32 src = srcreg; m68k_incpc (regs, 2); Exception (src + 32, regs, 0); -}}return 4 * 256; +}}return 4 * CYCLE_UNIT / 2; } /* LINK.W An,#.W */ unsigned long REGPARAM2 CPUFUNC(op_4e50_0)(uae_u32 opcode, struct regstruct *regs) @@ -14249,7 +14253,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4e50_0)(uae_u32 opcode, struct regstruct *reg { uae_s16 offs = get_iword (regs, 2); m68k_areg(regs, 7) += offs; }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* UNLK.L An */ unsigned long REGPARAM2 CPUFUNC(op_4e58_0)(uae_u32 opcode, struct regstruct *regs) @@ -14262,7 +14266,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4e58_0)(uae_u32 opcode, struct regstruct *reg m68k_areg(regs, 7) += 4; m68k_areg(regs, srcreg) = (old); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* MVR2USP.L An */ unsigned long REGPARAM2 CPUFUNC(op_4e60_0)(uae_u32 opcode, struct regstruct *regs) @@ -14273,7 +14277,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4e60_0)(uae_u32 opcode, struct regstruct *reg regs->usp = src; }}} m68k_incpc (regs, 2); endlabel901: ; -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* MVUSP2R.L An */ unsigned long REGPARAM2 CPUFUNC(op_4e68_0)(uae_u32 opcode, struct regstruct *regs) @@ -14283,7 +14287,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4e68_0)(uae_u32 opcode, struct regstruct *reg {{ m68k_areg(regs, srcreg) = (regs->usp); }}} m68k_incpc (regs, 2); endlabel902: ; -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* RESET.L */ unsigned long REGPARAM2 CPUFUNC(op_4e70_0)(uae_u32 opcode, struct regstruct *regs) @@ -14292,13 +14296,13 @@ unsigned long REGPARAM2 CPUFUNC(op_4e70_0)(uae_u32 opcode, struct regstruct *reg { cpureset(); }} m68k_incpc (regs, 2); endlabel903: ; -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* NOP.L */ unsigned long REGPARAM2 CPUFUNC(op_4e71_0)(uae_u32 opcode, struct regstruct *regs) { {} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* STOP.L #.W */ unsigned long REGPARAM2 CPUFUNC(op_4e72_0)(uae_u32 opcode, struct regstruct *regs) @@ -14310,7 +14314,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4e72_0)(uae_u32 opcode, struct regstruct *reg m68k_setstopped(regs, 1); m68k_incpc (regs, 4); }}}endlabel905: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* RTE.L */ unsigned long REGPARAM2 CPUFUNC(op_4e73_0)(uae_u32 opcode, struct regstruct *regs) @@ -14344,7 +14348,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4e73_0)(uae_u32 opcode, struct regstruct *reg else m68k_setpc(regs, newpc); }}endlabel906: ; -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* RTD.L #.W */ unsigned long REGPARAM2 CPUFUNC(op_4e74_0)(uae_u32 opcode, struct regstruct *regs) @@ -14358,13 +14362,13 @@ unsigned long REGPARAM2 CPUFUNC(op_4e74_0)(uae_u32 opcode, struct regstruct *reg exception3 (0x4E74, m68k_getpc(regs), pc); else m68k_setpc(regs, pc); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* RTS.L */ unsigned long REGPARAM2 CPUFUNC(op_4e75_0)(uae_u32 opcode, struct regstruct *regs) { { m68k_do_rts(regs); -}return 4 * 256; +}return 4 * CYCLE_UNIT / 2; } /* TRAPV.L */ unsigned long REGPARAM2 CPUFUNC(op_4e76_0)(uae_u32 opcode, struct regstruct *regs) @@ -14375,7 +14379,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4e76_0)(uae_u32 opcode, struct regstruct *reg goto endlabel909; } }endlabel909: ; -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* RTR.L */ unsigned long REGPARAM2 CPUFUNC(op_4e77_0)(uae_u32 opcode, struct regstruct *regs) @@ -14390,7 +14394,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4e77_0)(uae_u32 opcode, struct regstruct *reg regs->sr &= 0xFF00; sr &= 0xFF; regs->sr |= sr; m68k_setpc(regs, pc); MakeFromSR(regs); -}}}}}return 16 * 256; +}}}}}return 16 * CYCLE_UNIT / 2; } /* MOVEC2.L #.W */ #ifndef CPUEMU_68000_ONLY @@ -14403,7 +14407,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4e7a_0)(uae_u32 opcode, struct regstruct *reg if (! m68k_movec2(src & 0xFFF, regp)) goto endlabel911; }}}} m68k_incpc (regs, 4); endlabel911: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* MOVE2C.L #.W */ @@ -14417,7 +14421,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4e7b_0)(uae_u32 opcode, struct regstruct *reg if (! m68k_move2c(src & 0xFFF, regp)) goto endlabel912; }}}} m68k_incpc (regs, 4); endlabel912: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* JSR.L (An) */ @@ -14434,7 +14438,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4e90_0)(uae_u32 opcode, struct regstruct *reg m68k_areg (regs, 7) -= 4; put_long (m68k_areg (regs, 7), oldpc); }}}endlabel913: ; -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* JSR.L (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_4ea8_0)(uae_u32 opcode, struct regstruct *regs) @@ -14450,7 +14454,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4ea8_0)(uae_u32 opcode, struct regstruct *reg m68k_areg (regs, 7) -= 4; put_long (m68k_areg (regs, 7), oldpc); }}}endlabel914: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* JSR.L (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_4eb0_0)(uae_u32 opcode, struct regstruct *regs) @@ -14468,7 +14472,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4eb0_0)(uae_u32 opcode, struct regstruct *reg m68k_areg (regs, 7) -= 4; put_long (m68k_areg (regs, 7), oldpc); }}}}endlabel915: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* JSR.L (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_4eb8_0)(uae_u32 opcode, struct regstruct *regs) @@ -14483,7 +14487,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4eb8_0)(uae_u32 opcode, struct regstruct *reg m68k_areg (regs, 7) -= 4; put_long (m68k_areg (regs, 7), oldpc); }}}endlabel916: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* JSR.L (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_4eb9_0)(uae_u32 opcode, struct regstruct *regs) @@ -14498,7 +14502,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4eb9_0)(uae_u32 opcode, struct regstruct *reg m68k_areg (regs, 7) -= 4; put_long (m68k_areg (regs, 7), oldpc); }}}endlabel917: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* JSR.L (d16,PC) */ unsigned long REGPARAM2 CPUFUNC(op_4eba_0)(uae_u32 opcode, struct regstruct *regs) @@ -14514,7 +14518,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4eba_0)(uae_u32 opcode, struct regstruct *reg m68k_areg (regs, 7) -= 4; put_long (m68k_areg (regs, 7), oldpc); }}}endlabel918: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* JSR.L (d8,PC,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_4ebb_0)(uae_u32 opcode, struct regstruct *regs) @@ -14533,7 +14537,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4ebb_0)(uae_u32 opcode, struct regstruct *reg m68k_areg (regs, 7) -= 4; put_long (m68k_areg (regs, 7), oldpc); }}}}endlabel919: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* JMP.L (An) */ unsigned long REGPARAM2 CPUFUNC(op_4ed0_0)(uae_u32 opcode, struct regstruct *regs) @@ -14546,7 +14550,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4ed0_0)(uae_u32 opcode, struct regstruct *reg } m68k_setpc(regs, srca); }}endlabel920: ; -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* JMP.L (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_4ee8_0)(uae_u32 opcode, struct regstruct *regs) @@ -14559,7 +14563,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4ee8_0)(uae_u32 opcode, struct regstruct *reg } m68k_setpc(regs, srca); }}endlabel921: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* JMP.L (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_4ef0_0)(uae_u32 opcode, struct regstruct *regs) @@ -14574,7 +14578,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4ef0_0)(uae_u32 opcode, struct regstruct *reg } m68k_setpc(regs, srca); }}}endlabel922: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* JMP.L (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_4ef8_0)(uae_u32 opcode, struct regstruct *regs) @@ -14586,7 +14590,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4ef8_0)(uae_u32 opcode, struct regstruct *reg } m68k_setpc(regs, srca); }}endlabel923: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* JMP.L (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_4ef9_0)(uae_u32 opcode, struct regstruct *regs) @@ -14598,7 +14602,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4ef9_0)(uae_u32 opcode, struct regstruct *reg } m68k_setpc(regs, srca); }}endlabel924: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* JMP.L (d16,PC) */ unsigned long REGPARAM2 CPUFUNC(op_4efa_0)(uae_u32 opcode, struct regstruct *regs) @@ -14611,7 +14615,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4efa_0)(uae_u32 opcode, struct regstruct *reg } m68k_setpc(regs, srca); }}endlabel925: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* JMP.L (d8,PC,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_4efb_0)(uae_u32 opcode, struct regstruct *regs) @@ -14627,7 +14631,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4efb_0)(uae_u32 opcode, struct regstruct *reg } m68k_setpc(regs, srca); }}}endlabel926: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* ADD.B #,Dn */ unsigned long REGPARAM2 CPUFUNC(op_5000_0)(uae_u32 opcode, struct regstruct *regs) @@ -14647,7 +14651,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5000_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADD.B #,(An) */ unsigned long REGPARAM2 CPUFUNC(op_5010_0)(uae_u32 opcode, struct regstruct *regs) @@ -14668,7 +14672,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5010_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADD.B #,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_5018_0)(uae_u32 opcode, struct regstruct *regs) @@ -14690,7 +14694,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5018_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADD.B #,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_5020_0)(uae_u32 opcode, struct regstruct *regs) @@ -14713,7 +14717,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5020_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* ADD.B #,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_5028_0)(uae_u32 opcode, struct regstruct *regs) @@ -14734,7 +14738,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5028_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ADD.B #,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_5030_0)(uae_u32 opcode, struct regstruct *regs) @@ -14756,7 +14760,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5030_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); -}}}}}}}}return 18 * 256; +}}}}}}}}return 18 * CYCLE_UNIT / 2; } /* ADD.B #,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_5038_0)(uae_u32 opcode, struct regstruct *regs) @@ -14776,11 +14780,8 @@ unsigned long REGPARAM2 CPUFUNC(op_5038_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } -#endif - -#ifdef PART_5 /* ADD.B #,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_5039_0)(uae_u32 opcode, struct regstruct *regs) { @@ -14799,7 +14800,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5039_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* ADD.W #,Dn */ unsigned long REGPARAM2 CPUFUNC(op_5040_0)(uae_u32 opcode, struct regstruct *regs) @@ -14819,7 +14820,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5040_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADDA.W #,An */ unsigned long REGPARAM2 CPUFUNC(op_5048_0)(uae_u32 opcode, struct regstruct *regs) @@ -14831,7 +14832,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5048_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADD.W #,(An) */ unsigned long REGPARAM2 CPUFUNC(op_5050_0)(uae_u32 opcode, struct regstruct *regs) @@ -14852,7 +14853,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5050_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADD.W #,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_5058_0)(uae_u32 opcode, struct regstruct *regs) @@ -14874,7 +14875,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5058_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADD.W #,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_5060_0)(uae_u32 opcode, struct regstruct *regs) @@ -14897,7 +14898,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5060_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* ADD.W #,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_5068_0)(uae_u32 opcode, struct regstruct *regs) @@ -14918,7 +14919,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5068_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ADD.W #,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_5070_0)(uae_u32 opcode, struct regstruct *regs) @@ -14940,7 +14941,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5070_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); -}}}}}}}}return 18 * 256; +}}}}}}}}return 18 * CYCLE_UNIT / 2; } /* ADD.W #,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_5078_0)(uae_u32 opcode, struct regstruct *regs) @@ -14960,7 +14961,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5078_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ADD.W #,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_5079_0)(uae_u32 opcode, struct regstruct *regs) @@ -14980,7 +14981,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5079_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* ADD.L #,Dn */ unsigned long REGPARAM2 CPUFUNC(op_5080_0)(uae_u32 opcode, struct regstruct *regs) @@ -15000,8 +15001,11 @@ unsigned long REGPARAM2 CPUFUNC(op_5080_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } +#endif + +#ifdef PART_5 /* ADDA.L #,An */ unsigned long REGPARAM2 CPUFUNC(op_5088_0)(uae_u32 opcode, struct regstruct *regs) { @@ -15012,7 +15016,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5088_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADD.L #,(An) */ unsigned long REGPARAM2 CPUFUNC(op_5090_0)(uae_u32 opcode, struct regstruct *regs) @@ -15033,7 +15037,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5090_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* ADD.L #,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_5098_0)(uae_u32 opcode, struct regstruct *regs) @@ -15055,7 +15059,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5098_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* ADD.L #,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_50a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -15078,7 +15082,7 @@ unsigned long REGPARAM2 CPUFUNC(op_50a0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* ADD.L #,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_50a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -15099,7 +15103,7 @@ unsigned long REGPARAM2 CPUFUNC(op_50a8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* ADD.L #,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_50b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -15121,7 +15125,7 @@ unsigned long REGPARAM2 CPUFUNC(op_50b0_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); -}}}}}}}}return 26 * 256; +}}}}}}}}return 26 * CYCLE_UNIT / 2; } /* ADD.L #,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_50b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -15141,7 +15145,7 @@ unsigned long REGPARAM2 CPUFUNC(op_50b8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* ADD.L #,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_50b9_0)(uae_u32 opcode, struct regstruct *regs) @@ -15161,7 +15165,7 @@ unsigned long REGPARAM2 CPUFUNC(op_50b9_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* Scc.B Dn */ unsigned long REGPARAM2 CPUFUNC(op_50c0_0)(uae_u32 opcode, struct regstruct *regs) @@ -15170,7 +15174,7 @@ unsigned long REGPARAM2 CPUFUNC(op_50c0_0)(uae_u32 opcode, struct regstruct *reg {{{{ int val = cctrue(®s->ccrflags, 0) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ unsigned long REGPARAM2 CPUFUNC(op_50c8_0)(uae_u32 opcode, struct regstruct *regs) @@ -15187,13 +15191,13 @@ unsigned long REGPARAM2 CPUFUNC(op_50c8_0)(uae_u32 opcode, struct regstruct *reg exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); goto endlabel954; } - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } m68k_setpc (regs, oldpc + 4); }}}endlabel954: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ unsigned long REGPARAM2 CPUFUNC(op_50d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -15203,7 +15207,7 @@ unsigned long REGPARAM2 CPUFUNC(op_50d0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 0) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_50d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -15214,7 +15218,7 @@ unsigned long REGPARAM2 CPUFUNC(op_50d8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 0) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ unsigned long REGPARAM2 CPUFUNC(op_50e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -15226,7 +15230,7 @@ unsigned long REGPARAM2 CPUFUNC(op_50e0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 0) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_50e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -15236,7 +15240,7 @@ unsigned long REGPARAM2 CPUFUNC(op_50e8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 0) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_50f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -15247,7 +15251,7 @@ unsigned long REGPARAM2 CPUFUNC(op_50f0_0)(uae_u32 opcode, struct regstruct *reg { srca = get_disp_ea_020(regs, m68k_areg(regs, srcreg), next_iword(regs)); {{ int val = cctrue(®s->ccrflags, 0) ? 0xff : 0; put_byte (srca,val); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_50f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -15256,7 +15260,7 @@ unsigned long REGPARAM2 CPUFUNC(op_50f8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 0) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_50f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -15265,7 +15269,7 @@ unsigned long REGPARAM2 CPUFUNC(op_50f9_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 0) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* TRAPcc.L #.W */ #ifndef CPUEMU_68000_ONLY @@ -15275,7 +15279,7 @@ unsigned long REGPARAM2 CPUFUNC(op_50fa_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 0)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel962; } }} m68k_incpc (regs, 4); endlabel962: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L #.L */ @@ -15286,7 +15290,7 @@ unsigned long REGPARAM2 CPUFUNC(op_50fb_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 0)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel963; } }} m68k_incpc (regs, 6); endlabel963: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L */ @@ -15296,7 +15300,7 @@ unsigned long REGPARAM2 CPUFUNC(op_50fc_0)(uae_u32 opcode, struct regstruct *reg { if (cctrue(®s->ccrflags, 0)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel964; } } m68k_incpc (regs, 2); endlabel964: ; -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } #endif /* SUB.B #,Dn */ @@ -15317,7 +15321,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5100_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUB.B #,(An) */ unsigned long REGPARAM2 CPUFUNC(op_5110_0)(uae_u32 opcode, struct regstruct *regs) @@ -15338,7 +15342,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5110_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUB.B #,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_5118_0)(uae_u32 opcode, struct regstruct *regs) @@ -15360,7 +15364,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5118_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUB.B #,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_5120_0)(uae_u32 opcode, struct regstruct *regs) @@ -15383,7 +15387,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5120_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* SUB.B #,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_5128_0)(uae_u32 opcode, struct regstruct *regs) @@ -15404,7 +15408,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5128_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* SUB.B #,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_5130_0)(uae_u32 opcode, struct regstruct *regs) @@ -15426,7 +15430,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5130_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); -}}}}}}}}return 18 * 256; +}}}}}}}}return 18 * CYCLE_UNIT / 2; } /* SUB.B #,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_5138_0)(uae_u32 opcode, struct regstruct *regs) @@ -15446,7 +15450,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5138_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* SUB.B #,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_5139_0)(uae_u32 opcode, struct regstruct *regs) @@ -15466,7 +15470,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5139_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* SUB.W #,Dn */ unsigned long REGPARAM2 CPUFUNC(op_5140_0)(uae_u32 opcode, struct regstruct *regs) @@ -15486,7 +15490,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5140_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUBA.W #,An */ unsigned long REGPARAM2 CPUFUNC(op_5148_0)(uae_u32 opcode, struct regstruct *regs) @@ -15498,7 +15502,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5148_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUB.W #,(An) */ unsigned long REGPARAM2 CPUFUNC(op_5150_0)(uae_u32 opcode, struct regstruct *regs) @@ -15519,7 +15523,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5150_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUB.W #,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_5158_0)(uae_u32 opcode, struct regstruct *regs) @@ -15541,7 +15545,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5158_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUB.W #,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_5160_0)(uae_u32 opcode, struct regstruct *regs) @@ -15564,7 +15568,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5160_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* SUB.W #,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_5168_0)(uae_u32 opcode, struct regstruct *regs) @@ -15585,7 +15589,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5168_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* SUB.W #,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_5170_0)(uae_u32 opcode, struct regstruct *regs) @@ -15607,7 +15611,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5170_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); -}}}}}}}}return 18 * 256; +}}}}}}}}return 18 * CYCLE_UNIT / 2; } /* SUB.W #,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_5178_0)(uae_u32 opcode, struct regstruct *regs) @@ -15627,7 +15631,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5178_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* SUB.W #,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_5179_0)(uae_u32 opcode, struct regstruct *regs) @@ -15647,7 +15651,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5179_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* SUB.L #,Dn */ unsigned long REGPARAM2 CPUFUNC(op_5180_0)(uae_u32 opcode, struct regstruct *regs) @@ -15667,7 +15671,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5180_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUBA.L #,An */ unsigned long REGPARAM2 CPUFUNC(op_5188_0)(uae_u32 opcode, struct regstruct *regs) @@ -15679,7 +15683,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5188_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUB.L #,(An) */ unsigned long REGPARAM2 CPUFUNC(op_5190_0)(uae_u32 opcode, struct regstruct *regs) @@ -15700,7 +15704,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5190_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* SUB.L #,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_5198_0)(uae_u32 opcode, struct regstruct *regs) @@ -15722,7 +15726,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5198_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* SUB.L #,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_51a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -15745,7 +15749,7 @@ unsigned long REGPARAM2 CPUFUNC(op_51a0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* SUB.L #,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_51a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -15766,7 +15770,7 @@ unsigned long REGPARAM2 CPUFUNC(op_51a8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* SUB.L #,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_51b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -15788,7 +15792,7 @@ unsigned long REGPARAM2 CPUFUNC(op_51b0_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); -}}}}}}}}return 26 * 256; +}}}}}}}}return 26 * CYCLE_UNIT / 2; } /* SUB.L #,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_51b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -15808,7 +15812,7 @@ unsigned long REGPARAM2 CPUFUNC(op_51b8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* SUB.L #,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_51b9_0)(uae_u32 opcode, struct regstruct *regs) @@ -15828,7 +15832,7 @@ unsigned long REGPARAM2 CPUFUNC(op_51b9_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* Scc.B Dn */ unsigned long REGPARAM2 CPUFUNC(op_51c0_0)(uae_u32 opcode, struct regstruct *regs) @@ -15837,7 +15841,7 @@ unsigned long REGPARAM2 CPUFUNC(op_51c0_0)(uae_u32 opcode, struct regstruct *reg {{{{ int val = cctrue(®s->ccrflags, 1) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ unsigned long REGPARAM2 CPUFUNC(op_51c8_0)(uae_u32 opcode, struct regstruct *regs) @@ -15854,13 +15858,13 @@ unsigned long REGPARAM2 CPUFUNC(op_51c8_0)(uae_u32 opcode, struct regstruct *reg exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); goto endlabel992; } - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } m68k_setpc (regs, oldpc + 4); }}}endlabel992: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ unsigned long REGPARAM2 CPUFUNC(op_51d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -15870,7 +15874,7 @@ unsigned long REGPARAM2 CPUFUNC(op_51d0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 1) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_51d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -15881,7 +15885,7 @@ unsigned long REGPARAM2 CPUFUNC(op_51d8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 1) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ unsigned long REGPARAM2 CPUFUNC(op_51e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -15893,7 +15897,7 @@ unsigned long REGPARAM2 CPUFUNC(op_51e0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 1) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_51e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -15903,7 +15907,7 @@ unsigned long REGPARAM2 CPUFUNC(op_51e8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 1) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_51f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -15914,7 +15918,7 @@ unsigned long REGPARAM2 CPUFUNC(op_51f0_0)(uae_u32 opcode, struct regstruct *reg { srca = get_disp_ea_020(regs, m68k_areg(regs, srcreg), next_iword(regs)); {{ int val = cctrue(®s->ccrflags, 1) ? 0xff : 0; put_byte (srca,val); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_51f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -15923,7 +15927,7 @@ unsigned long REGPARAM2 CPUFUNC(op_51f8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 1) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_51f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -15932,7 +15936,7 @@ unsigned long REGPARAM2 CPUFUNC(op_51f9_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 1) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* TRAPcc.L #.W */ #ifndef CPUEMU_68000_ONLY @@ -15942,7 +15946,7 @@ unsigned long REGPARAM2 CPUFUNC(op_51fa_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 1)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1000; } }} m68k_incpc (regs, 4); endlabel1000: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L #.L */ @@ -15953,7 +15957,7 @@ unsigned long REGPARAM2 CPUFUNC(op_51fb_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 1)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1001; } }} m68k_incpc (regs, 6); endlabel1001: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L */ @@ -15963,7 +15967,7 @@ unsigned long REGPARAM2 CPUFUNC(op_51fc_0)(uae_u32 opcode, struct regstruct *reg { if (cctrue(®s->ccrflags, 1)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1002; } } m68k_incpc (regs, 2); endlabel1002: ; -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } #endif /* Scc.B Dn */ @@ -15973,7 +15977,7 @@ unsigned long REGPARAM2 CPUFUNC(op_52c0_0)(uae_u32 opcode, struct regstruct *reg {{{{ int val = cctrue(®s->ccrflags, 2) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ unsigned long REGPARAM2 CPUFUNC(op_52c8_0)(uae_u32 opcode, struct regstruct *regs) @@ -15990,13 +15994,13 @@ unsigned long REGPARAM2 CPUFUNC(op_52c8_0)(uae_u32 opcode, struct regstruct *reg exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); goto endlabel1004; } - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } m68k_setpc (regs, oldpc + 4); }}}endlabel1004: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ unsigned long REGPARAM2 CPUFUNC(op_52d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -16006,7 +16010,7 @@ unsigned long REGPARAM2 CPUFUNC(op_52d0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 2) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_52d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -16017,7 +16021,7 @@ unsigned long REGPARAM2 CPUFUNC(op_52d8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 2) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ unsigned long REGPARAM2 CPUFUNC(op_52e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -16029,7 +16033,7 @@ unsigned long REGPARAM2 CPUFUNC(op_52e0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 2) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_52e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -16039,7 +16043,7 @@ unsigned long REGPARAM2 CPUFUNC(op_52e8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 2) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_52f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -16050,7 +16054,7 @@ unsigned long REGPARAM2 CPUFUNC(op_52f0_0)(uae_u32 opcode, struct regstruct *reg { srca = get_disp_ea_020(regs, m68k_areg(regs, srcreg), next_iword(regs)); {{ int val = cctrue(®s->ccrflags, 2) ? 0xff : 0; put_byte (srca,val); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_52f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -16059,7 +16063,7 @@ unsigned long REGPARAM2 CPUFUNC(op_52f8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 2) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_52f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -16068,7 +16072,7 @@ unsigned long REGPARAM2 CPUFUNC(op_52f9_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 2) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* TRAPcc.L #.W */ #ifndef CPUEMU_68000_ONLY @@ -16078,7 +16082,7 @@ unsigned long REGPARAM2 CPUFUNC(op_52fa_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 2)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1012; } }} m68k_incpc (regs, 4); endlabel1012: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L #.L */ @@ -16089,7 +16093,7 @@ unsigned long REGPARAM2 CPUFUNC(op_52fb_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 2)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1013; } }} m68k_incpc (regs, 6); endlabel1013: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L */ @@ -16099,7 +16103,7 @@ unsigned long REGPARAM2 CPUFUNC(op_52fc_0)(uae_u32 opcode, struct regstruct *reg { if (cctrue(®s->ccrflags, 2)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1014; } } m68k_incpc (regs, 2); endlabel1014: ; -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } #endif /* Scc.B Dn */ @@ -16109,7 +16113,7 @@ unsigned long REGPARAM2 CPUFUNC(op_53c0_0)(uae_u32 opcode, struct regstruct *reg {{{{ int val = cctrue(®s->ccrflags, 3) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ unsigned long REGPARAM2 CPUFUNC(op_53c8_0)(uae_u32 opcode, struct regstruct *regs) @@ -16126,13 +16130,13 @@ unsigned long REGPARAM2 CPUFUNC(op_53c8_0)(uae_u32 opcode, struct regstruct *reg exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); goto endlabel1016; } - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } m68k_setpc (regs, oldpc + 4); }}}endlabel1016: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ unsigned long REGPARAM2 CPUFUNC(op_53d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -16142,7 +16146,7 @@ unsigned long REGPARAM2 CPUFUNC(op_53d0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 3) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_53d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -16153,7 +16157,7 @@ unsigned long REGPARAM2 CPUFUNC(op_53d8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 3) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ unsigned long REGPARAM2 CPUFUNC(op_53e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -16165,7 +16169,7 @@ unsigned long REGPARAM2 CPUFUNC(op_53e0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 3) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_53e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -16175,7 +16179,7 @@ unsigned long REGPARAM2 CPUFUNC(op_53e8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 3) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_53f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -16186,7 +16190,7 @@ unsigned long REGPARAM2 CPUFUNC(op_53f0_0)(uae_u32 opcode, struct regstruct *reg { srca = get_disp_ea_020(regs, m68k_areg(regs, srcreg), next_iword(regs)); {{ int val = cctrue(®s->ccrflags, 3) ? 0xff : 0; put_byte (srca,val); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_53f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -16195,7 +16199,7 @@ unsigned long REGPARAM2 CPUFUNC(op_53f8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 3) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_53f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -16204,7 +16208,7 @@ unsigned long REGPARAM2 CPUFUNC(op_53f9_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 3) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* TRAPcc.L #.W */ #ifndef CPUEMU_68000_ONLY @@ -16214,7 +16218,7 @@ unsigned long REGPARAM2 CPUFUNC(op_53fa_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 3)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1024; } }} m68k_incpc (regs, 4); endlabel1024: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L #.L */ @@ -16225,7 +16229,7 @@ unsigned long REGPARAM2 CPUFUNC(op_53fb_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 3)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1025; } }} m68k_incpc (regs, 6); endlabel1025: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L */ @@ -16235,7 +16239,7 @@ unsigned long REGPARAM2 CPUFUNC(op_53fc_0)(uae_u32 opcode, struct regstruct *reg { if (cctrue(®s->ccrflags, 3)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1026; } } m68k_incpc (regs, 2); endlabel1026: ; -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } #endif /* Scc.B Dn */ @@ -16245,7 +16249,7 @@ unsigned long REGPARAM2 CPUFUNC(op_54c0_0)(uae_u32 opcode, struct regstruct *reg {{{{ int val = cctrue(®s->ccrflags, 4) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ unsigned long REGPARAM2 CPUFUNC(op_54c8_0)(uae_u32 opcode, struct regstruct *regs) @@ -16262,13 +16266,13 @@ unsigned long REGPARAM2 CPUFUNC(op_54c8_0)(uae_u32 opcode, struct regstruct *reg exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); goto endlabel1028; } - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } m68k_setpc (regs, oldpc + 4); }}}endlabel1028: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ unsigned long REGPARAM2 CPUFUNC(op_54d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -16278,7 +16282,7 @@ unsigned long REGPARAM2 CPUFUNC(op_54d0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 4) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_54d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -16289,7 +16293,7 @@ unsigned long REGPARAM2 CPUFUNC(op_54d8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 4) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ unsigned long REGPARAM2 CPUFUNC(op_54e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -16301,7 +16305,7 @@ unsigned long REGPARAM2 CPUFUNC(op_54e0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 4) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_54e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -16311,7 +16315,7 @@ unsigned long REGPARAM2 CPUFUNC(op_54e8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 4) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_54f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -16322,7 +16326,7 @@ unsigned long REGPARAM2 CPUFUNC(op_54f0_0)(uae_u32 opcode, struct regstruct *reg { srca = get_disp_ea_020(regs, m68k_areg(regs, srcreg), next_iword(regs)); {{ int val = cctrue(®s->ccrflags, 4) ? 0xff : 0; put_byte (srca,val); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_54f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -16331,7 +16335,7 @@ unsigned long REGPARAM2 CPUFUNC(op_54f8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 4) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_54f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -16340,7 +16344,7 @@ unsigned long REGPARAM2 CPUFUNC(op_54f9_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 4) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* TRAPcc.L #.W */ #ifndef CPUEMU_68000_ONLY @@ -16350,7 +16354,7 @@ unsigned long REGPARAM2 CPUFUNC(op_54fa_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 4)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1036; } }} m68k_incpc (regs, 4); endlabel1036: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L #.L */ @@ -16361,7 +16365,7 @@ unsigned long REGPARAM2 CPUFUNC(op_54fb_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 4)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1037; } }} m68k_incpc (regs, 6); endlabel1037: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L */ @@ -16371,7 +16375,7 @@ unsigned long REGPARAM2 CPUFUNC(op_54fc_0)(uae_u32 opcode, struct regstruct *reg { if (cctrue(®s->ccrflags, 4)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1038; } } m68k_incpc (regs, 2); endlabel1038: ; -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } #endif /* Scc.B Dn */ @@ -16381,7 +16385,7 @@ unsigned long REGPARAM2 CPUFUNC(op_55c0_0)(uae_u32 opcode, struct regstruct *reg {{{{ int val = cctrue(®s->ccrflags, 5) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ unsigned long REGPARAM2 CPUFUNC(op_55c8_0)(uae_u32 opcode, struct regstruct *regs) @@ -16398,13 +16402,13 @@ unsigned long REGPARAM2 CPUFUNC(op_55c8_0)(uae_u32 opcode, struct regstruct *reg exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); goto endlabel1040; } - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } m68k_setpc (regs, oldpc + 4); }}}endlabel1040: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ unsigned long REGPARAM2 CPUFUNC(op_55d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -16414,7 +16418,7 @@ unsigned long REGPARAM2 CPUFUNC(op_55d0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 5) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_55d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -16425,7 +16429,7 @@ unsigned long REGPARAM2 CPUFUNC(op_55d8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 5) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ unsigned long REGPARAM2 CPUFUNC(op_55e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -16437,7 +16441,7 @@ unsigned long REGPARAM2 CPUFUNC(op_55e0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 5) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_55e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -16447,7 +16451,7 @@ unsigned long REGPARAM2 CPUFUNC(op_55e8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 5) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_55f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -16458,7 +16462,7 @@ unsigned long REGPARAM2 CPUFUNC(op_55f0_0)(uae_u32 opcode, struct regstruct *reg { srca = get_disp_ea_020(regs, m68k_areg(regs, srcreg), next_iword(regs)); {{ int val = cctrue(®s->ccrflags, 5) ? 0xff : 0; put_byte (srca,val); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_55f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -16467,7 +16471,7 @@ unsigned long REGPARAM2 CPUFUNC(op_55f8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 5) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_55f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -16476,7 +16480,7 @@ unsigned long REGPARAM2 CPUFUNC(op_55f9_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 5) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* TRAPcc.L #.W */ #ifndef CPUEMU_68000_ONLY @@ -16486,7 +16490,7 @@ unsigned long REGPARAM2 CPUFUNC(op_55fa_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 5)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1048; } }} m68k_incpc (regs, 4); endlabel1048: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L #.L */ @@ -16497,7 +16501,7 @@ unsigned long REGPARAM2 CPUFUNC(op_55fb_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 5)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1049; } }} m68k_incpc (regs, 6); endlabel1049: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L */ @@ -16507,7 +16511,7 @@ unsigned long REGPARAM2 CPUFUNC(op_55fc_0)(uae_u32 opcode, struct regstruct *reg { if (cctrue(®s->ccrflags, 5)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1050; } } m68k_incpc (regs, 2); endlabel1050: ; -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } #endif /* Scc.B Dn */ @@ -16517,7 +16521,7 @@ unsigned long REGPARAM2 CPUFUNC(op_56c0_0)(uae_u32 opcode, struct regstruct *reg {{{{ int val = cctrue(®s->ccrflags, 6) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ unsigned long REGPARAM2 CPUFUNC(op_56c8_0)(uae_u32 opcode, struct regstruct *regs) @@ -16534,13 +16538,13 @@ unsigned long REGPARAM2 CPUFUNC(op_56c8_0)(uae_u32 opcode, struct regstruct *reg exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); goto endlabel1052; } - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } m68k_setpc (regs, oldpc + 4); }}}endlabel1052: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ unsigned long REGPARAM2 CPUFUNC(op_56d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -16550,7 +16554,7 @@ unsigned long REGPARAM2 CPUFUNC(op_56d0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 6) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_56d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -16561,7 +16565,7 @@ unsigned long REGPARAM2 CPUFUNC(op_56d8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 6) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ unsigned long REGPARAM2 CPUFUNC(op_56e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -16573,7 +16577,7 @@ unsigned long REGPARAM2 CPUFUNC(op_56e0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 6) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_56e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -16583,7 +16587,7 @@ unsigned long REGPARAM2 CPUFUNC(op_56e8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 6) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_56f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -16594,7 +16598,7 @@ unsigned long REGPARAM2 CPUFUNC(op_56f0_0)(uae_u32 opcode, struct regstruct *reg { srca = get_disp_ea_020(regs, m68k_areg(regs, srcreg), next_iword(regs)); {{ int val = cctrue(®s->ccrflags, 6) ? 0xff : 0; put_byte (srca,val); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_56f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -16603,7 +16607,7 @@ unsigned long REGPARAM2 CPUFUNC(op_56f8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 6) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_56f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -16612,7 +16616,7 @@ unsigned long REGPARAM2 CPUFUNC(op_56f9_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 6) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* TRAPcc.L #.W */ #ifndef CPUEMU_68000_ONLY @@ -16622,7 +16626,7 @@ unsigned long REGPARAM2 CPUFUNC(op_56fa_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 6)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1060; } }} m68k_incpc (regs, 4); endlabel1060: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L #.L */ @@ -16633,7 +16637,7 @@ unsigned long REGPARAM2 CPUFUNC(op_56fb_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 6)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1061; } }} m68k_incpc (regs, 6); endlabel1061: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L */ @@ -16643,7 +16647,7 @@ unsigned long REGPARAM2 CPUFUNC(op_56fc_0)(uae_u32 opcode, struct regstruct *reg { if (cctrue(®s->ccrflags, 6)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1062; } } m68k_incpc (regs, 2); endlabel1062: ; -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } #endif /* Scc.B Dn */ @@ -16653,7 +16657,7 @@ unsigned long REGPARAM2 CPUFUNC(op_57c0_0)(uae_u32 opcode, struct regstruct *reg {{{{ int val = cctrue(®s->ccrflags, 7) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ unsigned long REGPARAM2 CPUFUNC(op_57c8_0)(uae_u32 opcode, struct regstruct *regs) @@ -16670,13 +16674,13 @@ unsigned long REGPARAM2 CPUFUNC(op_57c8_0)(uae_u32 opcode, struct regstruct *reg exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); goto endlabel1064; } - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } m68k_setpc (regs, oldpc + 4); }}}endlabel1064: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ unsigned long REGPARAM2 CPUFUNC(op_57d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -16686,7 +16690,7 @@ unsigned long REGPARAM2 CPUFUNC(op_57d0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 7) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_57d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -16697,7 +16701,7 @@ unsigned long REGPARAM2 CPUFUNC(op_57d8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 7) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ unsigned long REGPARAM2 CPUFUNC(op_57e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -16709,7 +16713,7 @@ unsigned long REGPARAM2 CPUFUNC(op_57e0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 7) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_57e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -16719,7 +16723,7 @@ unsigned long REGPARAM2 CPUFUNC(op_57e8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 7) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_57f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -16730,7 +16734,7 @@ unsigned long REGPARAM2 CPUFUNC(op_57f0_0)(uae_u32 opcode, struct regstruct *reg { srca = get_disp_ea_020(regs, m68k_areg(regs, srcreg), next_iword(regs)); {{ int val = cctrue(®s->ccrflags, 7) ? 0xff : 0; put_byte (srca,val); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_57f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -16739,7 +16743,7 @@ unsigned long REGPARAM2 CPUFUNC(op_57f8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 7) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_57f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -16748,7 +16752,7 @@ unsigned long REGPARAM2 CPUFUNC(op_57f9_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 7) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* TRAPcc.L #.W */ #ifndef CPUEMU_68000_ONLY @@ -16758,7 +16762,7 @@ unsigned long REGPARAM2 CPUFUNC(op_57fa_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 7)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1072; } }} m68k_incpc (regs, 4); endlabel1072: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L #.L */ @@ -16769,7 +16773,7 @@ unsigned long REGPARAM2 CPUFUNC(op_57fb_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 7)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1073; } }} m68k_incpc (regs, 6); endlabel1073: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L */ @@ -16779,7 +16783,7 @@ unsigned long REGPARAM2 CPUFUNC(op_57fc_0)(uae_u32 opcode, struct regstruct *reg { if (cctrue(®s->ccrflags, 7)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1074; } } m68k_incpc (regs, 2); endlabel1074: ; -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } #endif /* Scc.B Dn */ @@ -16789,7 +16793,7 @@ unsigned long REGPARAM2 CPUFUNC(op_58c0_0)(uae_u32 opcode, struct regstruct *reg {{{{ int val = cctrue(®s->ccrflags, 8) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ unsigned long REGPARAM2 CPUFUNC(op_58c8_0)(uae_u32 opcode, struct regstruct *regs) @@ -16806,13 +16810,13 @@ unsigned long REGPARAM2 CPUFUNC(op_58c8_0)(uae_u32 opcode, struct regstruct *reg exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); goto endlabel1076; } - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } m68k_setpc (regs, oldpc + 4); }}}endlabel1076: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ unsigned long REGPARAM2 CPUFUNC(op_58d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -16822,7 +16826,7 @@ unsigned long REGPARAM2 CPUFUNC(op_58d0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 8) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_58d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -16833,7 +16837,7 @@ unsigned long REGPARAM2 CPUFUNC(op_58d8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 8) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ unsigned long REGPARAM2 CPUFUNC(op_58e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -16845,7 +16849,7 @@ unsigned long REGPARAM2 CPUFUNC(op_58e0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 8) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_58e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -16855,7 +16859,7 @@ unsigned long REGPARAM2 CPUFUNC(op_58e8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 8) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_58f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -16866,7 +16870,7 @@ unsigned long REGPARAM2 CPUFUNC(op_58f0_0)(uae_u32 opcode, struct regstruct *reg { srca = get_disp_ea_020(regs, m68k_areg(regs, srcreg), next_iword(regs)); {{ int val = cctrue(®s->ccrflags, 8) ? 0xff : 0; put_byte (srca,val); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_58f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -16875,7 +16879,7 @@ unsigned long REGPARAM2 CPUFUNC(op_58f8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 8) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_58f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -16884,7 +16888,7 @@ unsigned long REGPARAM2 CPUFUNC(op_58f9_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 8) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* TRAPcc.L #.W */ #ifndef CPUEMU_68000_ONLY @@ -16894,7 +16898,7 @@ unsigned long REGPARAM2 CPUFUNC(op_58fa_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 8)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1084; } }} m68k_incpc (regs, 4); endlabel1084: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L #.L */ @@ -16905,7 +16909,7 @@ unsigned long REGPARAM2 CPUFUNC(op_58fb_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 8)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1085; } }} m68k_incpc (regs, 6); endlabel1085: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L */ @@ -16915,7 +16919,7 @@ unsigned long REGPARAM2 CPUFUNC(op_58fc_0)(uae_u32 opcode, struct regstruct *reg { if (cctrue(®s->ccrflags, 8)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1086; } } m68k_incpc (regs, 2); endlabel1086: ; -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } #endif /* Scc.B Dn */ @@ -16925,7 +16929,7 @@ unsigned long REGPARAM2 CPUFUNC(op_59c0_0)(uae_u32 opcode, struct regstruct *reg {{{{ int val = cctrue(®s->ccrflags, 9) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ unsigned long REGPARAM2 CPUFUNC(op_59c8_0)(uae_u32 opcode, struct regstruct *regs) @@ -16942,13 +16946,13 @@ unsigned long REGPARAM2 CPUFUNC(op_59c8_0)(uae_u32 opcode, struct regstruct *reg exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); goto endlabel1088; } - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } m68k_setpc (regs, oldpc + 4); }}}endlabel1088: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ unsigned long REGPARAM2 CPUFUNC(op_59d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -16958,7 +16962,7 @@ unsigned long REGPARAM2 CPUFUNC(op_59d0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 9) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_59d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -16969,7 +16973,7 @@ unsigned long REGPARAM2 CPUFUNC(op_59d8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 9) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ unsigned long REGPARAM2 CPUFUNC(op_59e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -16981,7 +16985,7 @@ unsigned long REGPARAM2 CPUFUNC(op_59e0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 9) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_59e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -16991,7 +16995,7 @@ unsigned long REGPARAM2 CPUFUNC(op_59e8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 9) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_59f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -17002,7 +17006,7 @@ unsigned long REGPARAM2 CPUFUNC(op_59f0_0)(uae_u32 opcode, struct regstruct *reg { srca = get_disp_ea_020(regs, m68k_areg(regs, srcreg), next_iword(regs)); {{ int val = cctrue(®s->ccrflags, 9) ? 0xff : 0; put_byte (srca,val); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_59f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -17011,7 +17015,7 @@ unsigned long REGPARAM2 CPUFUNC(op_59f8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 9) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_59f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -17020,7 +17024,7 @@ unsigned long REGPARAM2 CPUFUNC(op_59f9_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 9) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* TRAPcc.L #.W */ #ifndef CPUEMU_68000_ONLY @@ -17030,7 +17034,7 @@ unsigned long REGPARAM2 CPUFUNC(op_59fa_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 9)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1096; } }} m68k_incpc (regs, 4); endlabel1096: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L #.L */ @@ -17041,7 +17045,7 @@ unsigned long REGPARAM2 CPUFUNC(op_59fb_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 9)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1097; } }} m68k_incpc (regs, 6); endlabel1097: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L */ @@ -17051,7 +17055,7 @@ unsigned long REGPARAM2 CPUFUNC(op_59fc_0)(uae_u32 opcode, struct regstruct *reg { if (cctrue(®s->ccrflags, 9)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1098; } } m68k_incpc (regs, 2); endlabel1098: ; -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } #endif /* Scc.B Dn */ @@ -17061,7 +17065,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5ac0_0)(uae_u32 opcode, struct regstruct *reg {{{{ int val = cctrue(®s->ccrflags, 10) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ unsigned long REGPARAM2 CPUFUNC(op_5ac8_0)(uae_u32 opcode, struct regstruct *regs) @@ -17078,13 +17082,13 @@ unsigned long REGPARAM2 CPUFUNC(op_5ac8_0)(uae_u32 opcode, struct regstruct *reg exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); goto endlabel1100; } - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } m68k_setpc (regs, oldpc + 4); }}}endlabel1100: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ unsigned long REGPARAM2 CPUFUNC(op_5ad0_0)(uae_u32 opcode, struct regstruct *regs) @@ -17094,7 +17098,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5ad0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 10) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_5ad8_0)(uae_u32 opcode, struct regstruct *regs) @@ -17105,7 +17109,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5ad8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 10) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ unsigned long REGPARAM2 CPUFUNC(op_5ae0_0)(uae_u32 opcode, struct regstruct *regs) @@ -17117,7 +17121,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5ae0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 10) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_5ae8_0)(uae_u32 opcode, struct regstruct *regs) @@ -17127,7 +17131,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5ae8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 10) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_5af0_0)(uae_u32 opcode, struct regstruct *regs) @@ -17138,7 +17142,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5af0_0)(uae_u32 opcode, struct regstruct *reg { srca = get_disp_ea_020(regs, m68k_areg(regs, srcreg), next_iword(regs)); {{ int val = cctrue(®s->ccrflags, 10) ? 0xff : 0; put_byte (srca,val); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_5af8_0)(uae_u32 opcode, struct regstruct *regs) @@ -17147,7 +17151,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5af8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 10) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_5af9_0)(uae_u32 opcode, struct regstruct *regs) @@ -17156,7 +17160,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5af9_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 10) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* TRAPcc.L #.W */ #ifndef CPUEMU_68000_ONLY @@ -17166,7 +17170,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5afa_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 10)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1108; } }} m68k_incpc (regs, 4); endlabel1108: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L #.L */ @@ -17177,7 +17181,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5afb_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 10)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1109; } }} m68k_incpc (regs, 6); endlabel1109: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L */ @@ -17187,7 +17191,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5afc_0)(uae_u32 opcode, struct regstruct *reg { if (cctrue(®s->ccrflags, 10)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1110; } } m68k_incpc (regs, 2); endlabel1110: ; -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } #endif /* Scc.B Dn */ @@ -17197,7 +17201,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5bc0_0)(uae_u32 opcode, struct regstruct *reg {{{{ int val = cctrue(®s->ccrflags, 11) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ unsigned long REGPARAM2 CPUFUNC(op_5bc8_0)(uae_u32 opcode, struct regstruct *regs) @@ -17214,13 +17218,13 @@ unsigned long REGPARAM2 CPUFUNC(op_5bc8_0)(uae_u32 opcode, struct regstruct *reg exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); goto endlabel1112; } - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } m68k_setpc (regs, oldpc + 4); }}}endlabel1112: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ unsigned long REGPARAM2 CPUFUNC(op_5bd0_0)(uae_u32 opcode, struct regstruct *regs) @@ -17230,7 +17234,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5bd0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 11) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_5bd8_0)(uae_u32 opcode, struct regstruct *regs) @@ -17241,7 +17245,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5bd8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 11) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ unsigned long REGPARAM2 CPUFUNC(op_5be0_0)(uae_u32 opcode, struct regstruct *regs) @@ -17253,7 +17257,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5be0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 11) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_5be8_0)(uae_u32 opcode, struct regstruct *regs) @@ -17263,7 +17267,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5be8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 11) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_5bf0_0)(uae_u32 opcode, struct regstruct *regs) @@ -17274,7 +17278,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5bf0_0)(uae_u32 opcode, struct regstruct *reg { srca = get_disp_ea_020(regs, m68k_areg(regs, srcreg), next_iword(regs)); {{ int val = cctrue(®s->ccrflags, 11) ? 0xff : 0; put_byte (srca,val); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_5bf8_0)(uae_u32 opcode, struct regstruct *regs) @@ -17283,7 +17287,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5bf8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 11) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_5bf9_0)(uae_u32 opcode, struct regstruct *regs) @@ -17292,7 +17296,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5bf9_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 11) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* TRAPcc.L #.W */ #ifndef CPUEMU_68000_ONLY @@ -17302,7 +17306,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5bfa_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 11)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1120; } }} m68k_incpc (regs, 4); endlabel1120: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L #.L */ @@ -17313,7 +17317,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5bfb_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 11)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1121; } }} m68k_incpc (regs, 6); endlabel1121: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L */ @@ -17323,7 +17327,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5bfc_0)(uae_u32 opcode, struct regstruct *reg { if (cctrue(®s->ccrflags, 11)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1122; } } m68k_incpc (regs, 2); endlabel1122: ; -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } #endif /* Scc.B Dn */ @@ -17333,7 +17337,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5cc0_0)(uae_u32 opcode, struct regstruct *reg {{{{ int val = cctrue(®s->ccrflags, 12) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ unsigned long REGPARAM2 CPUFUNC(op_5cc8_0)(uae_u32 opcode, struct regstruct *regs) @@ -17350,13 +17354,13 @@ unsigned long REGPARAM2 CPUFUNC(op_5cc8_0)(uae_u32 opcode, struct regstruct *reg exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); goto endlabel1124; } - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } m68k_setpc (regs, oldpc + 4); }}}endlabel1124: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ unsigned long REGPARAM2 CPUFUNC(op_5cd0_0)(uae_u32 opcode, struct regstruct *regs) @@ -17366,7 +17370,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5cd0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 12) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_5cd8_0)(uae_u32 opcode, struct regstruct *regs) @@ -17377,7 +17381,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5cd8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 12) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ unsigned long REGPARAM2 CPUFUNC(op_5ce0_0)(uae_u32 opcode, struct regstruct *regs) @@ -17389,7 +17393,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5ce0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 12) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_5ce8_0)(uae_u32 opcode, struct regstruct *regs) @@ -17399,7 +17403,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5ce8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 12) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_5cf0_0)(uae_u32 opcode, struct regstruct *regs) @@ -17410,7 +17414,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5cf0_0)(uae_u32 opcode, struct regstruct *reg { srca = get_disp_ea_020(regs, m68k_areg(regs, srcreg), next_iword(regs)); {{ int val = cctrue(®s->ccrflags, 12) ? 0xff : 0; put_byte (srca,val); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_5cf8_0)(uae_u32 opcode, struct regstruct *regs) @@ -17419,7 +17423,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5cf8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 12) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_5cf9_0)(uae_u32 opcode, struct regstruct *regs) @@ -17428,7 +17432,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5cf9_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 12) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* TRAPcc.L #.W */ #ifndef CPUEMU_68000_ONLY @@ -17438,7 +17442,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5cfa_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 12)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1132; } }} m68k_incpc (regs, 4); endlabel1132: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L #.L */ @@ -17449,7 +17453,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5cfb_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 12)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1133; } }} m68k_incpc (regs, 6); endlabel1133: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L */ @@ -17459,7 +17463,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5cfc_0)(uae_u32 opcode, struct regstruct *reg { if (cctrue(®s->ccrflags, 12)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1134; } } m68k_incpc (regs, 2); endlabel1134: ; -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } #endif /* Scc.B Dn */ @@ -17469,7 +17473,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5dc0_0)(uae_u32 opcode, struct regstruct *reg {{{{ int val = cctrue(®s->ccrflags, 13) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ unsigned long REGPARAM2 CPUFUNC(op_5dc8_0)(uae_u32 opcode, struct regstruct *regs) @@ -17486,13 +17490,13 @@ unsigned long REGPARAM2 CPUFUNC(op_5dc8_0)(uae_u32 opcode, struct regstruct *reg exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); goto endlabel1136; } - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } m68k_setpc (regs, oldpc + 4); }}}endlabel1136: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ unsigned long REGPARAM2 CPUFUNC(op_5dd0_0)(uae_u32 opcode, struct regstruct *regs) @@ -17502,7 +17506,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5dd0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 13) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_5dd8_0)(uae_u32 opcode, struct regstruct *regs) @@ -17513,7 +17517,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5dd8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 13) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ unsigned long REGPARAM2 CPUFUNC(op_5de0_0)(uae_u32 opcode, struct regstruct *regs) @@ -17525,7 +17529,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5de0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 13) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_5de8_0)(uae_u32 opcode, struct regstruct *regs) @@ -17535,7 +17539,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5de8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 13) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_5df0_0)(uae_u32 opcode, struct regstruct *regs) @@ -17546,7 +17550,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5df0_0)(uae_u32 opcode, struct regstruct *reg { srca = get_disp_ea_020(regs, m68k_areg(regs, srcreg), next_iword(regs)); {{ int val = cctrue(®s->ccrflags, 13) ? 0xff : 0; put_byte (srca,val); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_5df8_0)(uae_u32 opcode, struct regstruct *regs) @@ -17555,7 +17559,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5df8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 13) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_5df9_0)(uae_u32 opcode, struct regstruct *regs) @@ -17564,7 +17568,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5df9_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 13) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* TRAPcc.L #.W */ #ifndef CPUEMU_68000_ONLY @@ -17574,7 +17578,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5dfa_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 13)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1144; } }} m68k_incpc (regs, 4); endlabel1144: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L #.L */ @@ -17585,7 +17589,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5dfb_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 13)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1145; } }} m68k_incpc (regs, 6); endlabel1145: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L */ @@ -17595,7 +17599,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5dfc_0)(uae_u32 opcode, struct regstruct *reg { if (cctrue(®s->ccrflags, 13)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1146; } } m68k_incpc (regs, 2); endlabel1146: ; -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } #endif /* Scc.B Dn */ @@ -17605,7 +17609,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5ec0_0)(uae_u32 opcode, struct regstruct *reg {{{{ int val = cctrue(®s->ccrflags, 14) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ unsigned long REGPARAM2 CPUFUNC(op_5ec8_0)(uae_u32 opcode, struct regstruct *regs) @@ -17622,13 +17626,13 @@ unsigned long REGPARAM2 CPUFUNC(op_5ec8_0)(uae_u32 opcode, struct regstruct *reg exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); goto endlabel1148; } - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } m68k_setpc (regs, oldpc + 4); }}}endlabel1148: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ unsigned long REGPARAM2 CPUFUNC(op_5ed0_0)(uae_u32 opcode, struct regstruct *regs) @@ -17638,7 +17642,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5ed0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 14) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_5ed8_0)(uae_u32 opcode, struct regstruct *regs) @@ -17649,7 +17653,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5ed8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 14) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ unsigned long REGPARAM2 CPUFUNC(op_5ee0_0)(uae_u32 opcode, struct regstruct *regs) @@ -17661,7 +17665,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5ee0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 14) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_5ee8_0)(uae_u32 opcode, struct regstruct *regs) @@ -17671,7 +17675,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5ee8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 14) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_5ef0_0)(uae_u32 opcode, struct regstruct *regs) @@ -17682,7 +17686,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5ef0_0)(uae_u32 opcode, struct regstruct *reg { srca = get_disp_ea_020(regs, m68k_areg(regs, srcreg), next_iword(regs)); {{ int val = cctrue(®s->ccrflags, 14) ? 0xff : 0; put_byte (srca,val); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_5ef8_0)(uae_u32 opcode, struct regstruct *regs) @@ -17691,7 +17695,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5ef8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 14) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_5ef9_0)(uae_u32 opcode, struct regstruct *regs) @@ -17700,7 +17704,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5ef9_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 14) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* TRAPcc.L #.W */ #ifndef CPUEMU_68000_ONLY @@ -17710,7 +17714,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5efa_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 14)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1156; } }} m68k_incpc (regs, 4); endlabel1156: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L #.L */ @@ -17721,7 +17725,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5efb_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 14)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1157; } }} m68k_incpc (regs, 6); endlabel1157: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L */ @@ -17731,7 +17735,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5efc_0)(uae_u32 opcode, struct regstruct *reg { if (cctrue(®s->ccrflags, 14)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1158; } } m68k_incpc (regs, 2); endlabel1158: ; -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } #endif /* Scc.B Dn */ @@ -17741,7 +17745,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5fc0_0)(uae_u32 opcode, struct regstruct *reg {{{{ int val = cctrue(®s->ccrflags, 15) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ unsigned long REGPARAM2 CPUFUNC(op_5fc8_0)(uae_u32 opcode, struct regstruct *regs) @@ -17758,13 +17762,13 @@ unsigned long REGPARAM2 CPUFUNC(op_5fc8_0)(uae_u32 opcode, struct regstruct *reg exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); goto endlabel1160; } - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } m68k_setpc (regs, oldpc + 4); }}}endlabel1160: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ unsigned long REGPARAM2 CPUFUNC(op_5fd0_0)(uae_u32 opcode, struct regstruct *regs) @@ -17774,7 +17778,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5fd0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 15) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_5fd8_0)(uae_u32 opcode, struct regstruct *regs) @@ -17785,7 +17789,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5fd8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 15) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ unsigned long REGPARAM2 CPUFUNC(op_5fe0_0)(uae_u32 opcode, struct regstruct *regs) @@ -17797,7 +17801,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5fe0_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 15) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_5fe8_0)(uae_u32 opcode, struct regstruct *regs) @@ -17807,7 +17811,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5fe8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 15) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_5ff0_0)(uae_u32 opcode, struct regstruct *regs) @@ -17818,7 +17822,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5ff0_0)(uae_u32 opcode, struct regstruct *reg { srca = get_disp_ea_020(regs, m68k_areg(regs, srcreg), next_iword(regs)); {{ int val = cctrue(®s->ccrflags, 15) ? 0xff : 0; put_byte (srca,val); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_5ff8_0)(uae_u32 opcode, struct regstruct *regs) @@ -17827,11 +17831,8 @@ unsigned long REGPARAM2 CPUFUNC(op_5ff8_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 15) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } -#endif - -#ifdef PART_6 /* Scc.B (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_5ff9_0)(uae_u32 opcode, struct regstruct *regs) { @@ -17839,7 +17840,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5ff9_0)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 15) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* TRAPcc.L #.W */ #ifndef CPUEMU_68000_ONLY @@ -17849,7 +17850,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5ffa_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 15)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1168; } }} m68k_incpc (regs, 4); endlabel1168: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L #.L */ @@ -17860,7 +17861,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5ffb_0)(uae_u32 opcode, struct regstruct *reg if (cctrue(®s->ccrflags, 15)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1169; } }} m68k_incpc (regs, 6); endlabel1169: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* TRAPcc.L */ @@ -17870,7 +17871,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5ffc_0)(uae_u32 opcode, struct regstruct *reg { if (cctrue(®s->ccrflags, 15)) { Exception(7, regs, m68k_getpc(regs)); goto endlabel1170; } } m68k_incpc (regs, 2); endlabel1170: ; -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } #endif /* Bcc.W #.W */ @@ -17883,11 +17884,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6000_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1171; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); }}endlabel1171: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Bcc.B # */ unsigned long REGPARAM2 CPUFUNC(op_6001_0)(uae_u32 opcode, struct regstruct *regs) @@ -17900,11 +17901,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6001_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1172; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 2); }}endlabel1172: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Bcc.L #.L */ unsigned long REGPARAM2 CPUFUNC(op_60ff_0)(uae_u32 opcode, struct regstruct *regs) @@ -17916,11 +17917,11 @@ unsigned long REGPARAM2 CPUFUNC(op_60ff_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1173; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 6); }}endlabel1173: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* BSR.W #.W */ unsigned long REGPARAM2 CPUFUNC(op_6100_0)(uae_u32 opcode, struct regstruct *regs) @@ -17934,7 +17935,7 @@ unsigned long REGPARAM2 CPUFUNC(op_6100_0)(uae_u32 opcode, struct regstruct *reg } m68k_do_bsr (regs, m68k_getpc(regs) + 4, s); }}endlabel1174: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* BSR.B # */ unsigned long REGPARAM2 CPUFUNC(op_6101_0)(uae_u32 opcode, struct regstruct *regs) @@ -17949,7 +17950,7 @@ unsigned long REGPARAM2 CPUFUNC(op_6101_0)(uae_u32 opcode, struct regstruct *reg } m68k_do_bsr (regs, m68k_getpc(regs) + 2, s); }}endlabel1175: ; -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* BSR.L #.L */ unsigned long REGPARAM2 CPUFUNC(op_61ff_0)(uae_u32 opcode, struct regstruct *regs) @@ -17963,7 +17964,7 @@ unsigned long REGPARAM2 CPUFUNC(op_61ff_0)(uae_u32 opcode, struct regstruct *reg } m68k_do_bsr (regs, m68k_getpc(regs) + 6, s); }}endlabel1176: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Bcc.W #.W */ unsigned long REGPARAM2 CPUFUNC(op_6200_0)(uae_u32 opcode, struct regstruct *regs) @@ -17975,11 +17976,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6200_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1177; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); }}endlabel1177: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Bcc.B # */ unsigned long REGPARAM2 CPUFUNC(op_6201_0)(uae_u32 opcode, struct regstruct *regs) @@ -17992,11 +17993,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6201_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1178; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 2); }}endlabel1178: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Bcc.L #.L */ unsigned long REGPARAM2 CPUFUNC(op_62ff_0)(uae_u32 opcode, struct regstruct *regs) @@ -18008,11 +18009,11 @@ unsigned long REGPARAM2 CPUFUNC(op_62ff_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1179; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 6); }}endlabel1179: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Bcc.W #.W */ unsigned long REGPARAM2 CPUFUNC(op_6300_0)(uae_u32 opcode, struct regstruct *regs) @@ -18024,12 +18025,15 @@ unsigned long REGPARAM2 CPUFUNC(op_6300_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1180; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); }}endlabel1180: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } +#endif + +#ifdef PART_6 /* Bcc.B # */ unsigned long REGPARAM2 CPUFUNC(op_6301_0)(uae_u32 opcode, struct regstruct *regs) { @@ -18041,11 +18045,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6301_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1181; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 2); }}endlabel1181: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Bcc.L #.L */ unsigned long REGPARAM2 CPUFUNC(op_63ff_0)(uae_u32 opcode, struct regstruct *regs) @@ -18057,11 +18061,11 @@ unsigned long REGPARAM2 CPUFUNC(op_63ff_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1182; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 6); }}endlabel1182: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Bcc.W #.W */ unsigned long REGPARAM2 CPUFUNC(op_6400_0)(uae_u32 opcode, struct regstruct *regs) @@ -18073,11 +18077,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6400_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1183; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); }}endlabel1183: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Bcc.B # */ unsigned long REGPARAM2 CPUFUNC(op_6401_0)(uae_u32 opcode, struct regstruct *regs) @@ -18090,11 +18094,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6401_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1184; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 2); }}endlabel1184: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Bcc.L #.L */ unsigned long REGPARAM2 CPUFUNC(op_64ff_0)(uae_u32 opcode, struct regstruct *regs) @@ -18106,11 +18110,11 @@ unsigned long REGPARAM2 CPUFUNC(op_64ff_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1185; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 6); }}endlabel1185: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Bcc.W #.W */ unsigned long REGPARAM2 CPUFUNC(op_6500_0)(uae_u32 opcode, struct regstruct *regs) @@ -18122,11 +18126,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6500_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1186; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); }}endlabel1186: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Bcc.B # */ unsigned long REGPARAM2 CPUFUNC(op_6501_0)(uae_u32 opcode, struct regstruct *regs) @@ -18139,11 +18143,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6501_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1187; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 2); }}endlabel1187: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Bcc.L #.L */ unsigned long REGPARAM2 CPUFUNC(op_65ff_0)(uae_u32 opcode, struct regstruct *regs) @@ -18155,11 +18159,11 @@ unsigned long REGPARAM2 CPUFUNC(op_65ff_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1188; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 6); }}endlabel1188: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Bcc.W #.W */ unsigned long REGPARAM2 CPUFUNC(op_6600_0)(uae_u32 opcode, struct regstruct *regs) @@ -18171,11 +18175,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6600_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1189; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); }}endlabel1189: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Bcc.B # */ unsigned long REGPARAM2 CPUFUNC(op_6601_0)(uae_u32 opcode, struct regstruct *regs) @@ -18188,11 +18192,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6601_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1190; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 2); }}endlabel1190: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Bcc.L #.L */ unsigned long REGPARAM2 CPUFUNC(op_66ff_0)(uae_u32 opcode, struct regstruct *regs) @@ -18204,11 +18208,11 @@ unsigned long REGPARAM2 CPUFUNC(op_66ff_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1191; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 6); }}endlabel1191: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Bcc.W #.W */ unsigned long REGPARAM2 CPUFUNC(op_6700_0)(uae_u32 opcode, struct regstruct *regs) @@ -18220,11 +18224,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6700_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1192; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); }}endlabel1192: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Bcc.B # */ unsigned long REGPARAM2 CPUFUNC(op_6701_0)(uae_u32 opcode, struct regstruct *regs) @@ -18237,11 +18241,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6701_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1193; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 2); }}endlabel1193: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Bcc.L #.L */ unsigned long REGPARAM2 CPUFUNC(op_67ff_0)(uae_u32 opcode, struct regstruct *regs) @@ -18253,11 +18257,11 @@ unsigned long REGPARAM2 CPUFUNC(op_67ff_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1194; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 6); }}endlabel1194: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Bcc.W #.W */ unsigned long REGPARAM2 CPUFUNC(op_6800_0)(uae_u32 opcode, struct regstruct *regs) @@ -18269,11 +18273,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6800_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1195; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); }}endlabel1195: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Bcc.B # */ unsigned long REGPARAM2 CPUFUNC(op_6801_0)(uae_u32 opcode, struct regstruct *regs) @@ -18286,11 +18290,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6801_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1196; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 2); }}endlabel1196: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Bcc.L #.L */ unsigned long REGPARAM2 CPUFUNC(op_68ff_0)(uae_u32 opcode, struct regstruct *regs) @@ -18302,11 +18306,11 @@ unsigned long REGPARAM2 CPUFUNC(op_68ff_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1197; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 6); }}endlabel1197: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Bcc.W #.W */ unsigned long REGPARAM2 CPUFUNC(op_6900_0)(uae_u32 opcode, struct regstruct *regs) @@ -18318,11 +18322,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6900_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1198; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); }}endlabel1198: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Bcc.B # */ unsigned long REGPARAM2 CPUFUNC(op_6901_0)(uae_u32 opcode, struct regstruct *regs) @@ -18335,11 +18339,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6901_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1199; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 2); }}endlabel1199: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Bcc.L #.L */ unsigned long REGPARAM2 CPUFUNC(op_69ff_0)(uae_u32 opcode, struct regstruct *regs) @@ -18351,11 +18355,11 @@ unsigned long REGPARAM2 CPUFUNC(op_69ff_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1200; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 6); }}endlabel1200: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Bcc.W #.W */ unsigned long REGPARAM2 CPUFUNC(op_6a00_0)(uae_u32 opcode, struct regstruct *regs) @@ -18367,11 +18371,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6a00_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1201; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); }}endlabel1201: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Bcc.B # */ unsigned long REGPARAM2 CPUFUNC(op_6a01_0)(uae_u32 opcode, struct regstruct *regs) @@ -18384,11 +18388,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6a01_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1202; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 2); }}endlabel1202: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Bcc.L #.L */ unsigned long REGPARAM2 CPUFUNC(op_6aff_0)(uae_u32 opcode, struct regstruct *regs) @@ -18400,11 +18404,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6aff_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1203; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 6); }}endlabel1203: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Bcc.W #.W */ unsigned long REGPARAM2 CPUFUNC(op_6b00_0)(uae_u32 opcode, struct regstruct *regs) @@ -18416,11 +18420,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6b00_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1204; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); }}endlabel1204: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Bcc.B # */ unsigned long REGPARAM2 CPUFUNC(op_6b01_0)(uae_u32 opcode, struct regstruct *regs) @@ -18433,11 +18437,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6b01_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1205; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 2); }}endlabel1205: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Bcc.L #.L */ unsigned long REGPARAM2 CPUFUNC(op_6bff_0)(uae_u32 opcode, struct regstruct *regs) @@ -18449,11 +18453,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6bff_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1206; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 6); }}endlabel1206: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Bcc.W #.W */ unsigned long REGPARAM2 CPUFUNC(op_6c00_0)(uae_u32 opcode, struct regstruct *regs) @@ -18465,11 +18469,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6c00_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1207; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); }}endlabel1207: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Bcc.B # */ unsigned long REGPARAM2 CPUFUNC(op_6c01_0)(uae_u32 opcode, struct regstruct *regs) @@ -18482,11 +18486,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6c01_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1208; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 2); }}endlabel1208: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Bcc.L #.L */ unsigned long REGPARAM2 CPUFUNC(op_6cff_0)(uae_u32 opcode, struct regstruct *regs) @@ -18498,11 +18502,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6cff_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1209; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 6); }}endlabel1209: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Bcc.W #.W */ unsigned long REGPARAM2 CPUFUNC(op_6d00_0)(uae_u32 opcode, struct regstruct *regs) @@ -18514,11 +18518,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6d00_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1210; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); }}endlabel1210: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Bcc.B # */ unsigned long REGPARAM2 CPUFUNC(op_6d01_0)(uae_u32 opcode, struct regstruct *regs) @@ -18531,11 +18535,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6d01_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1211; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 2); }}endlabel1211: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Bcc.L #.L */ unsigned long REGPARAM2 CPUFUNC(op_6dff_0)(uae_u32 opcode, struct regstruct *regs) @@ -18547,11 +18551,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6dff_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1212; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 6); }}endlabel1212: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Bcc.W #.W */ unsigned long REGPARAM2 CPUFUNC(op_6e00_0)(uae_u32 opcode, struct regstruct *regs) @@ -18563,11 +18567,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6e00_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1213; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); }}endlabel1213: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Bcc.B # */ unsigned long REGPARAM2 CPUFUNC(op_6e01_0)(uae_u32 opcode, struct regstruct *regs) @@ -18580,11 +18584,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6e01_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1214; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 2); }}endlabel1214: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Bcc.L #.L */ unsigned long REGPARAM2 CPUFUNC(op_6eff_0)(uae_u32 opcode, struct regstruct *regs) @@ -18596,11 +18600,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6eff_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1215; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 6); }}endlabel1215: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Bcc.W #.W */ unsigned long REGPARAM2 CPUFUNC(op_6f00_0)(uae_u32 opcode, struct regstruct *regs) @@ -18612,11 +18616,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6f00_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1216; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); }}endlabel1216: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Bcc.B # */ unsigned long REGPARAM2 CPUFUNC(op_6f01_0)(uae_u32 opcode, struct regstruct *regs) @@ -18629,11 +18633,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6f01_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1217; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 2); }}endlabel1217: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* Bcc.L #.L */ unsigned long REGPARAM2 CPUFUNC(op_6fff_0)(uae_u32 opcode, struct regstruct *regs) @@ -18645,11 +18649,11 @@ unsigned long REGPARAM2 CPUFUNC(op_6fff_0)(uae_u32 opcode, struct regstruct *reg goto endlabel1218; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 6); }}endlabel1218: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* MOVE.L #,Dn */ unsigned long REGPARAM2 CPUFUNC(op_7000_0)(uae_u32 opcode, struct regstruct *regs) @@ -18662,7 +18666,7 @@ unsigned long REGPARAM2 CPUFUNC(op_7000_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 2); -}}}return 4 * 256; +}}}return 4 * CYCLE_UNIT / 2; } /* OR.B Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_8000_0)(uae_u32 opcode, struct regstruct *regs) @@ -18677,7 +18681,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8000_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* OR.B (An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_8010_0)(uae_u32 opcode, struct regstruct *regs) @@ -18693,7 +18697,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8010_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* OR.B (An)+,Dn */ unsigned long REGPARAM2 CPUFUNC(op_8018_0)(uae_u32 opcode, struct regstruct *regs) @@ -18710,7 +18714,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8018_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* OR.B -(An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_8020_0)(uae_u32 opcode, struct regstruct *regs) @@ -18728,7 +18732,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8020_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* OR.B (d16,An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_8028_0)(uae_u32 opcode, struct regstruct *regs) @@ -18744,7 +18748,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8028_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* OR.B (d8,An,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_8030_0)(uae_u32 opcode, struct regstruct *regs) @@ -18761,7 +18765,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8030_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* OR.B (xxx).W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_8038_0)(uae_u32 opcode, struct regstruct *regs) @@ -18776,7 +18780,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8038_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* OR.B (xxx).L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_8039_0)(uae_u32 opcode, struct regstruct *regs) @@ -18791,7 +18795,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8039_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* OR.B (d16,PC),Dn */ unsigned long REGPARAM2 CPUFUNC(op_803a_0)(uae_u32 opcode, struct regstruct *regs) @@ -18807,7 +18811,7 @@ unsigned long REGPARAM2 CPUFUNC(op_803a_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* OR.B (d8,PC,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_803b_0)(uae_u32 opcode, struct regstruct *regs) @@ -18825,7 +18829,7 @@ unsigned long REGPARAM2 CPUFUNC(op_803b_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* OR.B #.B,Dn */ unsigned long REGPARAM2 CPUFUNC(op_803c_0)(uae_u32 opcode, struct regstruct *regs) @@ -18839,7 +18843,7 @@ unsigned long REGPARAM2 CPUFUNC(op_803c_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* OR.W Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_8040_0)(uae_u32 opcode, struct regstruct *regs) @@ -18854,7 +18858,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8040_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* OR.W (An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_8050_0)(uae_u32 opcode, struct regstruct *regs) @@ -18870,7 +18874,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8050_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* OR.W (An)+,Dn */ unsigned long REGPARAM2 CPUFUNC(op_8058_0)(uae_u32 opcode, struct regstruct *regs) @@ -18887,7 +18891,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8058_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* OR.W -(An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_8060_0)(uae_u32 opcode, struct regstruct *regs) @@ -18905,7 +18909,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8060_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* OR.W (d16,An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_8068_0)(uae_u32 opcode, struct regstruct *regs) @@ -18921,7 +18925,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8068_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* OR.W (d8,An,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_8070_0)(uae_u32 opcode, struct regstruct *regs) @@ -18938,7 +18942,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8070_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* OR.W (xxx).W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_8078_0)(uae_u32 opcode, struct regstruct *regs) @@ -18953,7 +18957,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8078_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* OR.W (xxx).L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_8079_0)(uae_u32 opcode, struct regstruct *regs) @@ -18968,7 +18972,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8079_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* OR.W (d16,PC),Dn */ unsigned long REGPARAM2 CPUFUNC(op_807a_0)(uae_u32 opcode, struct regstruct *regs) @@ -18984,7 +18988,7 @@ unsigned long REGPARAM2 CPUFUNC(op_807a_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* OR.W (d8,PC,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_807b_0)(uae_u32 opcode, struct regstruct *regs) @@ -19002,7 +19006,7 @@ unsigned long REGPARAM2 CPUFUNC(op_807b_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* OR.W #.W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_807c_0)(uae_u32 opcode, struct regstruct *regs) @@ -19016,7 +19020,7 @@ unsigned long REGPARAM2 CPUFUNC(op_807c_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* OR.L Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_8080_0)(uae_u32 opcode, struct regstruct *regs) @@ -19031,7 +19035,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8080_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* OR.L (An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_8090_0)(uae_u32 opcode, struct regstruct *regs) @@ -19047,7 +19051,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8090_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* OR.L (An)+,Dn */ unsigned long REGPARAM2 CPUFUNC(op_8098_0)(uae_u32 opcode, struct regstruct *regs) @@ -19064,7 +19068,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8098_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* OR.L -(An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_80a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -19082,7 +19086,7 @@ unsigned long REGPARAM2 CPUFUNC(op_80a0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* OR.L (d16,An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_80a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -19098,7 +19102,7 @@ unsigned long REGPARAM2 CPUFUNC(op_80a8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* OR.L (d8,An,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_80b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -19115,7 +19119,7 @@ unsigned long REGPARAM2 CPUFUNC(op_80b0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* OR.L (xxx).W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_80b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -19130,7 +19134,7 @@ unsigned long REGPARAM2 CPUFUNC(op_80b8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* OR.L (xxx).L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_80b9_0)(uae_u32 opcode, struct regstruct *regs) @@ -19145,7 +19149,7 @@ unsigned long REGPARAM2 CPUFUNC(op_80b9_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* OR.L (d16,PC),Dn */ unsigned long REGPARAM2 CPUFUNC(op_80ba_0)(uae_u32 opcode, struct regstruct *regs) @@ -19161,7 +19165,7 @@ unsigned long REGPARAM2 CPUFUNC(op_80ba_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* OR.L (d8,PC,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_80bb_0)(uae_u32 opcode, struct regstruct *regs) @@ -19179,7 +19183,7 @@ unsigned long REGPARAM2 CPUFUNC(op_80bb_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* OR.L #.L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_80bc_0)(uae_u32 opcode, struct regstruct *regs) @@ -19193,7 +19197,7 @@ unsigned long REGPARAM2 CPUFUNC(op_80bc_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* DIVU.W Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_80c0_0)(uae_u32 opcode, struct regstruct *regs) @@ -19226,7 +19230,7 @@ unsigned long REGPARAM2 CPUFUNC(op_80c0_0)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 2); } }}}endlabel1253: ; -return 110 * 256; +return 110 * CYCLE_UNIT / 2; } /* DIVU.W (An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_80d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -19260,7 +19264,7 @@ unsigned long REGPARAM2 CPUFUNC(op_80d0_0)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 2); } }}}}endlabel1254: ; -return 114 * 256; +return 114 * CYCLE_UNIT / 2; } /* DIVU.W (An)+,Dn */ unsigned long REGPARAM2 CPUFUNC(op_80d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -19295,7 +19299,7 @@ unsigned long REGPARAM2 CPUFUNC(op_80d8_0)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 2); } }}}}endlabel1255: ; -return 114 * 256; +return 114 * CYCLE_UNIT / 2; } /* DIVU.W -(An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_80e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -19331,7 +19335,7 @@ unsigned long REGPARAM2 CPUFUNC(op_80e0_0)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 2); } }}}}endlabel1256: ; -return 116 * 256; +return 116 * CYCLE_UNIT / 2; } /* DIVU.W (d16,An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_80e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -19365,7 +19369,7 @@ unsigned long REGPARAM2 CPUFUNC(op_80e8_0)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); } }}}}endlabel1257: ; -return 118 * 256; +return 118 * CYCLE_UNIT / 2; } /* DIVU.W (d8,An,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_80f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -19400,7 +19404,7 @@ unsigned long REGPARAM2 CPUFUNC(op_80f0_0)(uae_u32 opcode, struct regstruct *reg } } }}}}}endlabel1258: ; -return 120 * 256; +return 120 * CYCLE_UNIT / 2; } /* DIVU.W (xxx).W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_80f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -19433,7 +19437,7 @@ unsigned long REGPARAM2 CPUFUNC(op_80f8_0)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); } }}}}endlabel1259: ; -return 118 * 256; +return 118 * CYCLE_UNIT / 2; } /* DIVU.W (xxx).L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_80f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -19466,7 +19470,7 @@ unsigned long REGPARAM2 CPUFUNC(op_80f9_0)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 6); } }}}}endlabel1260: ; -return 122 * 256; +return 122 * CYCLE_UNIT / 2; } /* DIVU.W (d16,PC),Dn */ unsigned long REGPARAM2 CPUFUNC(op_80fa_0)(uae_u32 opcode, struct regstruct *regs) @@ -19500,7 +19504,7 @@ unsigned long REGPARAM2 CPUFUNC(op_80fa_0)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); } }}}}endlabel1261: ; -return 118 * 256; +return 118 * CYCLE_UNIT / 2; } /* DIVU.W (d8,PC,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_80fb_0)(uae_u32 opcode, struct regstruct *regs) @@ -19536,7 +19540,7 @@ unsigned long REGPARAM2 CPUFUNC(op_80fb_0)(uae_u32 opcode, struct regstruct *reg } } }}}}}endlabel1262: ; -return 120 * 256; +return 120 * CYCLE_UNIT / 2; } /* DIVU.W #.W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_80fc_0)(uae_u32 opcode, struct regstruct *regs) @@ -19568,7 +19572,7 @@ unsigned long REGPARAM2 CPUFUNC(op_80fc_0)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); } }}}endlabel1263: ; -return 114 * 256; +return 114 * CYCLE_UNIT / 2; } /* SBCD.B Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_8100_0)(uae_u32 opcode, struct regstruct *regs) @@ -19587,11 +19591,9 @@ unsigned long REGPARAM2 CPUFUNC(op_8100_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, (((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG (®s->ccrflags) ? 1 : 0)) & 0x300) > 0xFF); COPY_CARRY (®s->ccrflags); SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s8)(newv)) == 0)); - SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); - SET_VFLG (®s->ccrflags, (tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SBCD.B -(An),-(An) */ unsigned long REGPARAM2 CPUFUNC(op_8108_0)(uae_u32 opcode, struct regstruct *regs) @@ -19616,11 +19618,9 @@ unsigned long REGPARAM2 CPUFUNC(op_8108_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, (((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG (®s->ccrflags) ? 1 : 0)) & 0x300) > 0xFF); COPY_CARRY (®s->ccrflags); SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s8)(newv)) == 0)); - SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); - SET_VFLG (®s->ccrflags, (tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); put_byte (dsta,newv); }}}}}} m68k_incpc (regs, 2); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* OR.B Dn,(An) */ unsigned long REGPARAM2 CPUFUNC(op_8110_0)(uae_u32 opcode, struct regstruct *regs) @@ -19636,7 +19636,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8110_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* OR.B Dn,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_8118_0)(uae_u32 opcode, struct regstruct *regs) @@ -19653,7 +19653,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8118_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* OR.B Dn,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_8120_0)(uae_u32 opcode, struct regstruct *regs) @@ -19671,7 +19671,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8120_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* OR.B Dn,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_8128_0)(uae_u32 opcode, struct regstruct *regs) @@ -19687,7 +19687,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8128_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* OR.B Dn,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_8130_0)(uae_u32 opcode, struct regstruct *regs) @@ -19704,7 +19704,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8130_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* OR.B Dn,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_8138_0)(uae_u32 opcode, struct regstruct *regs) @@ -19719,7 +19719,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8138_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* OR.B Dn,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_8139_0)(uae_u32 opcode, struct regstruct *regs) @@ -19734,7 +19734,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8139_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* PACK.L Dn,Dn */ #ifndef CPUEMU_68000_ONLY @@ -19745,7 +19745,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8140_0)(uae_u32 opcode, struct regstruct *reg { uae_u16 val = m68k_dreg(regs, srcreg) + get_iword (regs, 2); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf); } m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* PACK.L -(An),-(An) */ @@ -19762,7 +19762,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8148_0)(uae_u32 opcode, struct regstruct *reg m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; put_byte(m68k_areg(regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf)); } m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* OR.W Dn,(An) */ @@ -19779,7 +19779,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8150_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* OR.W Dn,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_8158_0)(uae_u32 opcode, struct regstruct *regs) @@ -19796,7 +19796,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8158_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* OR.W Dn,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_8160_0)(uae_u32 opcode, struct regstruct *regs) @@ -19814,7 +19814,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8160_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* OR.W Dn,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_8168_0)(uae_u32 opcode, struct regstruct *regs) @@ -19830,7 +19830,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8168_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* OR.W Dn,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_8170_0)(uae_u32 opcode, struct regstruct *regs) @@ -19847,7 +19847,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8170_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* OR.W Dn,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_8178_0)(uae_u32 opcode, struct regstruct *regs) @@ -19862,7 +19862,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8178_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* OR.W Dn,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_8179_0)(uae_u32 opcode, struct regstruct *regs) @@ -19877,7 +19877,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8179_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* UNPK.L Dn,Dn */ #ifndef CPUEMU_68000_ONLY @@ -19889,7 +19889,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8180_0)(uae_u32 opcode, struct regstruct *reg val = (((val << 4) & 0xf00) | (val & 0xf)) + get_iword (regs, 2); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffff0000) | (val & 0xffff); } m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* UNPK.L -(An),-(An) */ @@ -19907,7 +19907,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8188_0)(uae_u32 opcode, struct regstruct *reg m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; put_byte(m68k_areg(regs, dstreg),val >> 8); } m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* OR.L Dn,(An) */ @@ -19924,7 +19924,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8190_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 2); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* OR.L Dn,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_8198_0)(uae_u32 opcode, struct regstruct *regs) @@ -19941,7 +19941,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8198_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 2); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* OR.L Dn,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_81a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -19959,7 +19959,7 @@ unsigned long REGPARAM2 CPUFUNC(op_81a0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 2); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* OR.L Dn,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_81a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -19975,7 +19975,7 @@ unsigned long REGPARAM2 CPUFUNC(op_81a8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 4); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* OR.L Dn,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_81b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -19992,7 +19992,7 @@ unsigned long REGPARAM2 CPUFUNC(op_81b0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); -}}}}}return 26 * 256; +}}}}}return 26 * CYCLE_UNIT / 2; } /* OR.L Dn,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_81b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -20007,7 +20007,7 @@ unsigned long REGPARAM2 CPUFUNC(op_81b8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 4); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* OR.L Dn,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_81b9_0)(uae_u32 opcode, struct regstruct *regs) @@ -20022,7 +20022,7 @@ unsigned long REGPARAM2 CPUFUNC(op_81b9_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 6); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* DIVS.W Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_81c0_0)(uae_u32 opcode, struct regstruct *regs) @@ -20056,7 +20056,7 @@ unsigned long REGPARAM2 CPUFUNC(op_81c0_0)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 2); } }}}endlabel1291: ; -return 142 * 256; +return 142 * CYCLE_UNIT / 2; } /* DIVS.W (An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_81d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -20091,7 +20091,7 @@ unsigned long REGPARAM2 CPUFUNC(op_81d0_0)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 2); } }}}}endlabel1292: ; -return 146 * 256; +return 146 * CYCLE_UNIT / 2; } /* DIVS.W (An)+,Dn */ unsigned long REGPARAM2 CPUFUNC(op_81d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -20127,7 +20127,7 @@ unsigned long REGPARAM2 CPUFUNC(op_81d8_0)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 2); } }}}}endlabel1293: ; -return 146 * 256; +return 146 * CYCLE_UNIT / 2; } /* DIVS.W -(An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_81e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -20164,7 +20164,7 @@ unsigned long REGPARAM2 CPUFUNC(op_81e0_0)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 2); } }}}}endlabel1294: ; -return 148 * 256; +return 148 * CYCLE_UNIT / 2; } /* DIVS.W (d16,An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_81e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -20199,7 +20199,7 @@ unsigned long REGPARAM2 CPUFUNC(op_81e8_0)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); } }}}}endlabel1295: ; -return 150 * 256; +return 150 * CYCLE_UNIT / 2; } /* DIVS.W (d8,An,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_81f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -20235,7 +20235,7 @@ unsigned long REGPARAM2 CPUFUNC(op_81f0_0)(uae_u32 opcode, struct regstruct *reg } } }}}}}endlabel1296: ; -return 152 * 256; +return 152 * CYCLE_UNIT / 2; } /* DIVS.W (xxx).W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_81f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -20269,7 +20269,7 @@ unsigned long REGPARAM2 CPUFUNC(op_81f8_0)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); } }}}}endlabel1297: ; -return 150 * 256; +return 150 * CYCLE_UNIT / 2; } /* DIVS.W (xxx).L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_81f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -20303,7 +20303,7 @@ unsigned long REGPARAM2 CPUFUNC(op_81f9_0)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 6); } }}}}endlabel1298: ; -return 154 * 256; +return 154 * CYCLE_UNIT / 2; } /* DIVS.W (d16,PC),Dn */ unsigned long REGPARAM2 CPUFUNC(op_81fa_0)(uae_u32 opcode, struct regstruct *regs) @@ -20338,7 +20338,7 @@ unsigned long REGPARAM2 CPUFUNC(op_81fa_0)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); } }}}}endlabel1299: ; -return 150 * 256; +return 150 * CYCLE_UNIT / 2; } /* DIVS.W (d8,PC,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_81fb_0)(uae_u32 opcode, struct regstruct *regs) @@ -20375,7 +20375,7 @@ unsigned long REGPARAM2 CPUFUNC(op_81fb_0)(uae_u32 opcode, struct regstruct *reg } } }}}}}endlabel1300: ; -return 152 * 256; +return 152 * CYCLE_UNIT / 2; } /* DIVS.W #.W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_81fc_0)(uae_u32 opcode, struct regstruct *regs) @@ -20408,7 +20408,7 @@ unsigned long REGPARAM2 CPUFUNC(op_81fc_0)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); } }}}endlabel1301: ; -return 146 * 256; +return 146 * CYCLE_UNIT / 2; } /* SUB.B Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_9000_0)(uae_u32 opcode, struct regstruct *regs) @@ -20428,7 +20428,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9000_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUB.B (An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_9010_0)(uae_u32 opcode, struct regstruct *regs) @@ -20449,7 +20449,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9010_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* SUB.B (An)+,Dn */ unsigned long REGPARAM2 CPUFUNC(op_9018_0)(uae_u32 opcode, struct regstruct *regs) @@ -20471,7 +20471,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9018_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* SUB.B -(An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_9020_0)(uae_u32 opcode, struct regstruct *regs) @@ -20494,7 +20494,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9020_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* SUB.B (d16,An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_9028_0)(uae_u32 opcode, struct regstruct *regs) @@ -20515,7 +20515,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9028_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUB.B (d8,An,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_9030_0)(uae_u32 opcode, struct regstruct *regs) @@ -20537,7 +20537,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9030_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); -}}}}}}}}return 14 * 256; +}}}}}}}}return 14 * CYCLE_UNIT / 2; } /* SUB.B (xxx).W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_9038_0)(uae_u32 opcode, struct regstruct *regs) @@ -20557,7 +20557,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9038_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUB.B (xxx).L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_9039_0)(uae_u32 opcode, struct regstruct *regs) @@ -20577,7 +20577,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9039_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* SUB.B (d16,PC),Dn */ unsigned long REGPARAM2 CPUFUNC(op_903a_0)(uae_u32 opcode, struct regstruct *regs) @@ -20598,7 +20598,7 @@ unsigned long REGPARAM2 CPUFUNC(op_903a_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUB.B (d8,PC,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_903b_0)(uae_u32 opcode, struct regstruct *regs) @@ -20621,7 +20621,7 @@ unsigned long REGPARAM2 CPUFUNC(op_903b_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); -}}}}}}}}return 14 * 256; +}}}}}}}}return 14 * CYCLE_UNIT / 2; } /* SUB.B #.B,Dn */ unsigned long REGPARAM2 CPUFUNC(op_903c_0)(uae_u32 opcode, struct regstruct *regs) @@ -20640,7 +20640,7 @@ unsigned long REGPARAM2 CPUFUNC(op_903c_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUB.W Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_9040_0)(uae_u32 opcode, struct regstruct *regs) @@ -20660,7 +20660,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9040_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUB.W An,Dn */ unsigned long REGPARAM2 CPUFUNC(op_9048_0)(uae_u32 opcode, struct regstruct *regs) @@ -20680,7 +20680,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9048_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUB.W (An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_9050_0)(uae_u32 opcode, struct regstruct *regs) @@ -20701,7 +20701,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9050_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* SUB.W (An)+,Dn */ unsigned long REGPARAM2 CPUFUNC(op_9058_0)(uae_u32 opcode, struct regstruct *regs) @@ -20723,7 +20723,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9058_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* SUB.W -(An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_9060_0)(uae_u32 opcode, struct regstruct *regs) @@ -20746,7 +20746,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9060_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* SUB.W (d16,An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_9068_0)(uae_u32 opcode, struct regstruct *regs) @@ -20767,7 +20767,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9068_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUB.W (d8,An,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_9070_0)(uae_u32 opcode, struct regstruct *regs) @@ -20789,7 +20789,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9070_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); -}}}}}}}}return 14 * 256; +}}}}}}}}return 14 * CYCLE_UNIT / 2; } /* SUB.W (xxx).W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_9078_0)(uae_u32 opcode, struct regstruct *regs) @@ -20809,7 +20809,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9078_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUB.W (xxx).L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_9079_0)(uae_u32 opcode, struct regstruct *regs) @@ -20829,7 +20829,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9079_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* SUB.W (d16,PC),Dn */ unsigned long REGPARAM2 CPUFUNC(op_907a_0)(uae_u32 opcode, struct regstruct *regs) @@ -20850,7 +20850,7 @@ unsigned long REGPARAM2 CPUFUNC(op_907a_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUB.W (d8,PC,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_907b_0)(uae_u32 opcode, struct regstruct *regs) @@ -20873,7 +20873,7 @@ unsigned long REGPARAM2 CPUFUNC(op_907b_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); -}}}}}}}}return 14 * 256; +}}}}}}}}return 14 * CYCLE_UNIT / 2; } /* SUB.W #.W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_907c_0)(uae_u32 opcode, struct regstruct *regs) @@ -20892,7 +20892,7 @@ unsigned long REGPARAM2 CPUFUNC(op_907c_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* SUB.L Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_9080_0)(uae_u32 opcode, struct regstruct *regs) @@ -20912,7 +20912,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9080_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUB.L An,Dn */ unsigned long REGPARAM2 CPUFUNC(op_9088_0)(uae_u32 opcode, struct regstruct *regs) @@ -20932,7 +20932,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9088_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUB.L (An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_9090_0)(uae_u32 opcode, struct regstruct *regs) @@ -20953,7 +20953,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9090_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUB.L (An)+,Dn */ unsigned long REGPARAM2 CPUFUNC(op_9098_0)(uae_u32 opcode, struct regstruct *regs) @@ -20975,7 +20975,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9098_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUB.L -(An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_90a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -20998,7 +20998,7 @@ unsigned long REGPARAM2 CPUFUNC(op_90a0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* SUB.L (d16,An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_90a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -21019,7 +21019,7 @@ unsigned long REGPARAM2 CPUFUNC(op_90a8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* SUB.L (d8,An,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_90b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -21041,7 +21041,7 @@ unsigned long REGPARAM2 CPUFUNC(op_90b0_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); -}}}}}}}}return 18 * 256; +}}}}}}}}return 18 * CYCLE_UNIT / 2; } /* SUB.L (xxx).W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_90b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -21061,7 +21061,7 @@ unsigned long REGPARAM2 CPUFUNC(op_90b8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* SUB.L (xxx).L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_90b9_0)(uae_u32 opcode, struct regstruct *regs) @@ -21081,7 +21081,7 @@ unsigned long REGPARAM2 CPUFUNC(op_90b9_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* SUB.L (d16,PC),Dn */ unsigned long REGPARAM2 CPUFUNC(op_90ba_0)(uae_u32 opcode, struct regstruct *regs) @@ -21102,7 +21102,7 @@ unsigned long REGPARAM2 CPUFUNC(op_90ba_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* SUB.L (d8,PC,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_90bb_0)(uae_u32 opcode, struct regstruct *regs) @@ -21125,7 +21125,7 @@ unsigned long REGPARAM2 CPUFUNC(op_90bb_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); -}}}}}}}}return 18 * 256; +}}}}}}}}return 18 * CYCLE_UNIT / 2; } /* SUB.L #.L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_90bc_0)(uae_u32 opcode, struct regstruct *regs) @@ -21144,7 +21144,7 @@ unsigned long REGPARAM2 CPUFUNC(op_90bc_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUBA.W Dn,An */ unsigned long REGPARAM2 CPUFUNC(op_90c0_0)(uae_u32 opcode, struct regstruct *regs) @@ -21156,7 +21156,7 @@ unsigned long REGPARAM2 CPUFUNC(op_90c0_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUBA.W An,An */ unsigned long REGPARAM2 CPUFUNC(op_90c8_0)(uae_u32 opcode, struct regstruct *regs) @@ -21168,7 +21168,7 @@ unsigned long REGPARAM2 CPUFUNC(op_90c8_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUBA.W (An),An */ unsigned long REGPARAM2 CPUFUNC(op_90d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -21181,7 +21181,7 @@ unsigned long REGPARAM2 CPUFUNC(op_90d0_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* SUBA.W (An)+,An */ unsigned long REGPARAM2 CPUFUNC(op_90d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -21195,7 +21195,7 @@ unsigned long REGPARAM2 CPUFUNC(op_90d8_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* SUBA.W -(An),An */ unsigned long REGPARAM2 CPUFUNC(op_90e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -21210,7 +21210,7 @@ unsigned long REGPARAM2 CPUFUNC(op_90e0_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* SUBA.W (d16,An),An */ unsigned long REGPARAM2 CPUFUNC(op_90e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -21223,7 +21223,7 @@ unsigned long REGPARAM2 CPUFUNC(op_90e8_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUBA.W (d8,An,Xn),An */ unsigned long REGPARAM2 CPUFUNC(op_90f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -21237,7 +21237,7 @@ unsigned long REGPARAM2 CPUFUNC(op_90f0_0)(uae_u32 opcode, struct regstruct *reg { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); -}}}}}}return 14 * 256; +}}}}}}return 14 * CYCLE_UNIT / 2; } /* SUBA.W (xxx).W,An */ unsigned long REGPARAM2 CPUFUNC(op_90f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -21249,7 +21249,7 @@ unsigned long REGPARAM2 CPUFUNC(op_90f8_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUBA.W (xxx).L,An */ unsigned long REGPARAM2 CPUFUNC(op_90f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -21261,7 +21261,7 @@ unsigned long REGPARAM2 CPUFUNC(op_90f9_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* SUBA.W (d16,PC),An */ unsigned long REGPARAM2 CPUFUNC(op_90fa_0)(uae_u32 opcode, struct regstruct *regs) @@ -21274,7 +21274,7 @@ unsigned long REGPARAM2 CPUFUNC(op_90fa_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUBA.W (d8,PC,Xn),An */ unsigned long REGPARAM2 CPUFUNC(op_90fb_0)(uae_u32 opcode, struct regstruct *regs) @@ -21289,7 +21289,7 @@ unsigned long REGPARAM2 CPUFUNC(op_90fb_0)(uae_u32 opcode, struct regstruct *reg { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); -}}}}}}return 14 * 256; +}}}}}}return 14 * CYCLE_UNIT / 2; } /* SUBA.W #.W,An */ unsigned long REGPARAM2 CPUFUNC(op_90fc_0)(uae_u32 opcode, struct regstruct *regs) @@ -21300,7 +21300,7 @@ unsigned long REGPARAM2 CPUFUNC(op_90fc_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* SUBX.B Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_9100_0)(uae_u32 opcode, struct regstruct *regs) @@ -21320,7 +21320,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9100_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUBX.B -(An),-(An) */ unsigned long REGPARAM2 CPUFUNC(op_9108_0)(uae_u32 opcode, struct regstruct *regs) @@ -21346,7 +21346,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9108_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* SUB.B Dn,(An) */ unsigned long REGPARAM2 CPUFUNC(op_9110_0)(uae_u32 opcode, struct regstruct *regs) @@ -21367,7 +21367,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9110_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUB.B Dn,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_9118_0)(uae_u32 opcode, struct regstruct *regs) @@ -21389,7 +21389,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9118_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUB.B Dn,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_9120_0)(uae_u32 opcode, struct regstruct *regs) @@ -21412,7 +21412,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9120_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* SUB.B Dn,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_9128_0)(uae_u32 opcode, struct regstruct *regs) @@ -21433,7 +21433,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9128_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* SUB.B Dn,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_9130_0)(uae_u32 opcode, struct regstruct *regs) @@ -21455,7 +21455,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9130_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); -}}}}}}}}return 18 * 256; +}}}}}}}}return 18 * CYCLE_UNIT / 2; } /* SUB.B Dn,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_9138_0)(uae_u32 opcode, struct regstruct *regs) @@ -21475,7 +21475,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9138_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* SUB.B Dn,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_9139_0)(uae_u32 opcode, struct regstruct *regs) @@ -21495,7 +21495,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9139_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* SUBX.W Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_9140_0)(uae_u32 opcode, struct regstruct *regs) @@ -21515,7 +21515,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9140_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUBX.W -(An),-(An) */ unsigned long REGPARAM2 CPUFUNC(op_9148_0)(uae_u32 opcode, struct regstruct *regs) @@ -21541,7 +21541,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9148_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* SUB.W Dn,(An) */ unsigned long REGPARAM2 CPUFUNC(op_9150_0)(uae_u32 opcode, struct regstruct *regs) @@ -21562,7 +21562,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9150_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUB.W Dn,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_9158_0)(uae_u32 opcode, struct regstruct *regs) @@ -21584,7 +21584,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9158_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUB.W Dn,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_9160_0)(uae_u32 opcode, struct regstruct *regs) @@ -21607,7 +21607,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9160_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* SUB.W Dn,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_9168_0)(uae_u32 opcode, struct regstruct *regs) @@ -21628,7 +21628,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9168_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* SUB.W Dn,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_9170_0)(uae_u32 opcode, struct regstruct *regs) @@ -21650,7 +21650,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9170_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); -}}}}}}}}return 18 * 256; +}}}}}}}}return 18 * CYCLE_UNIT / 2; } /* SUB.W Dn,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_9178_0)(uae_u32 opcode, struct regstruct *regs) @@ -21670,7 +21670,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9178_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* SUB.W Dn,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_9179_0)(uae_u32 opcode, struct regstruct *regs) @@ -21690,7 +21690,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9179_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* SUBX.L Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_9180_0)(uae_u32 opcode, struct regstruct *regs) @@ -21710,7 +21710,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9180_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUBX.L -(An),-(An) */ unsigned long REGPARAM2 CPUFUNC(op_9188_0)(uae_u32 opcode, struct regstruct *regs) @@ -21736,7 +21736,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9188_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* SUB.L Dn,(An) */ unsigned long REGPARAM2 CPUFUNC(op_9190_0)(uae_u32 opcode, struct regstruct *regs) @@ -21757,7 +21757,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9190_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* SUB.L Dn,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_9198_0)(uae_u32 opcode, struct regstruct *regs) @@ -21779,7 +21779,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9198_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* SUB.L Dn,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_91a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -21802,7 +21802,7 @@ unsigned long REGPARAM2 CPUFUNC(op_91a0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* SUB.L Dn,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_91a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -21823,7 +21823,7 @@ unsigned long REGPARAM2 CPUFUNC(op_91a8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* SUB.L Dn,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_91b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -21845,7 +21845,7 @@ unsigned long REGPARAM2 CPUFUNC(op_91b0_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); -}}}}}}}}return 26 * 256; +}}}}}}}}return 26 * CYCLE_UNIT / 2; } /* SUB.L Dn,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_91b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -21865,7 +21865,7 @@ unsigned long REGPARAM2 CPUFUNC(op_91b8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* SUB.L Dn,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_91b9_0)(uae_u32 opcode, struct regstruct *regs) @@ -21885,7 +21885,7 @@ unsigned long REGPARAM2 CPUFUNC(op_91b9_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* SUBA.L Dn,An */ unsigned long REGPARAM2 CPUFUNC(op_91c0_0)(uae_u32 opcode, struct regstruct *regs) @@ -21897,7 +21897,7 @@ unsigned long REGPARAM2 CPUFUNC(op_91c0_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUBA.L An,An */ unsigned long REGPARAM2 CPUFUNC(op_91c8_0)(uae_u32 opcode, struct regstruct *regs) @@ -21909,7 +21909,7 @@ unsigned long REGPARAM2 CPUFUNC(op_91c8_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUBA.L (An),An */ unsigned long REGPARAM2 CPUFUNC(op_91d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -21922,7 +21922,7 @@ unsigned long REGPARAM2 CPUFUNC(op_91d0_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUBA.L (An)+,An */ unsigned long REGPARAM2 CPUFUNC(op_91d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -21936,7 +21936,7 @@ unsigned long REGPARAM2 CPUFUNC(op_91d8_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUBA.L -(An),An */ unsigned long REGPARAM2 CPUFUNC(op_91e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -21951,7 +21951,7 @@ unsigned long REGPARAM2 CPUFUNC(op_91e0_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* SUBA.L (d16,An),An */ unsigned long REGPARAM2 CPUFUNC(op_91e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -21964,7 +21964,7 @@ unsigned long REGPARAM2 CPUFUNC(op_91e8_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* SUBA.L (d8,An,Xn),An */ unsigned long REGPARAM2 CPUFUNC(op_91f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -21978,7 +21978,7 @@ unsigned long REGPARAM2 CPUFUNC(op_91f0_0)(uae_u32 opcode, struct regstruct *reg { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); -}}}}}}return 18 * 256; +}}}}}}return 18 * CYCLE_UNIT / 2; } /* SUBA.L (xxx).W,An */ unsigned long REGPARAM2 CPUFUNC(op_91f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -21990,7 +21990,7 @@ unsigned long REGPARAM2 CPUFUNC(op_91f8_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* SUBA.L (xxx).L,An */ unsigned long REGPARAM2 CPUFUNC(op_91f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -22002,7 +22002,7 @@ unsigned long REGPARAM2 CPUFUNC(op_91f9_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* SUBA.L (d16,PC),An */ unsigned long REGPARAM2 CPUFUNC(op_91fa_0)(uae_u32 opcode, struct regstruct *regs) @@ -22015,7 +22015,7 @@ unsigned long REGPARAM2 CPUFUNC(op_91fa_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* SUBA.L (d8,PC,Xn),An */ unsigned long REGPARAM2 CPUFUNC(op_91fb_0)(uae_u32 opcode, struct regstruct *regs) @@ -22030,7 +22030,7 @@ unsigned long REGPARAM2 CPUFUNC(op_91fb_0)(uae_u32 opcode, struct regstruct *reg { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); -}}}}}}return 18 * 256; +}}}}}}return 18 * CYCLE_UNIT / 2; } /* SUBA.L #.L,An */ unsigned long REGPARAM2 CPUFUNC(op_91fc_0)(uae_u32 opcode, struct regstruct *regs) @@ -22041,7 +22041,7 @@ unsigned long REGPARAM2 CPUFUNC(op_91fc_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CMP.B Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_b000_0)(uae_u32 opcode, struct regstruct *regs) @@ -22059,7 +22059,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b000_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* CMP.B (An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_b010_0)(uae_u32 opcode, struct regstruct *regs) @@ -22078,7 +22078,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b010_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* CMP.B (An)+,Dn */ unsigned long REGPARAM2 CPUFUNC(op_b018_0)(uae_u32 opcode, struct regstruct *regs) @@ -22098,7 +22098,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b018_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* CMP.B -(An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_b020_0)(uae_u32 opcode, struct regstruct *regs) @@ -22119,7 +22119,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b020_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* CMP.B (d16,An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_b028_0)(uae_u32 opcode, struct regstruct *regs) @@ -22138,7 +22138,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b028_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CMP.B (d8,An,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_b030_0)(uae_u32 opcode, struct regstruct *regs) @@ -22158,7 +22158,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b030_0)(uae_u32 opcode, struct regstruct *reg SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}}return 14 * 256; +}}}}}}}}return 14 * CYCLE_UNIT / 2; } /* CMP.B (xxx).W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_b038_0)(uae_u32 opcode, struct regstruct *regs) @@ -22176,7 +22176,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b038_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CMP.B (xxx).L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_b039_0)(uae_u32 opcode, struct regstruct *regs) @@ -22194,7 +22194,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b039_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* CMP.B (d16,PC),Dn */ unsigned long REGPARAM2 CPUFUNC(op_b03a_0)(uae_u32 opcode, struct regstruct *regs) @@ -22213,7 +22213,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b03a_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CMP.B (d8,PC,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_b03b_0)(uae_u32 opcode, struct regstruct *regs) @@ -22234,7 +22234,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b03b_0)(uae_u32 opcode, struct regstruct *reg SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}}return 14 * 256; +}}}}}}}}return 14 * CYCLE_UNIT / 2; } /* CMP.B #.B,Dn */ unsigned long REGPARAM2 CPUFUNC(op_b03c_0)(uae_u32 opcode, struct regstruct *regs) @@ -22251,7 +22251,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b03c_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CMP.W Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_b040_0)(uae_u32 opcode, struct regstruct *regs) @@ -22269,11 +22269,8 @@ unsigned long REGPARAM2 CPUFUNC(op_b040_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } -#endif - -#ifdef PART_7 /* CMP.W An,Dn */ unsigned long REGPARAM2 CPUFUNC(op_b048_0)(uae_u32 opcode, struct regstruct *regs) { @@ -22290,7 +22287,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b048_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* CMP.W (An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_b050_0)(uae_u32 opcode, struct regstruct *regs) @@ -22309,7 +22306,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b050_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* CMP.W (An)+,Dn */ unsigned long REGPARAM2 CPUFUNC(op_b058_0)(uae_u32 opcode, struct regstruct *regs) @@ -22329,7 +22326,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b058_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* CMP.W -(An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_b060_0)(uae_u32 opcode, struct regstruct *regs) @@ -22350,7 +22347,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b060_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* CMP.W (d16,An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_b068_0)(uae_u32 opcode, struct regstruct *regs) @@ -22369,7 +22366,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b068_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CMP.W (d8,An,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_b070_0)(uae_u32 opcode, struct regstruct *regs) @@ -22389,7 +22386,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b070_0)(uae_u32 opcode, struct regstruct *reg SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}}return 14 * 256; +}}}}}}}}return 14 * CYCLE_UNIT / 2; } /* CMP.W (xxx).W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_b078_0)(uae_u32 opcode, struct regstruct *regs) @@ -22407,7 +22404,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b078_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CMP.W (xxx).L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_b079_0)(uae_u32 opcode, struct regstruct *regs) @@ -22425,7 +22422,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b079_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* CMP.W (d16,PC),Dn */ unsigned long REGPARAM2 CPUFUNC(op_b07a_0)(uae_u32 opcode, struct regstruct *regs) @@ -22444,7 +22441,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b07a_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CMP.W (d8,PC,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_b07b_0)(uae_u32 opcode, struct regstruct *regs) @@ -22465,7 +22462,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b07b_0)(uae_u32 opcode, struct regstruct *reg SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}}return 14 * 256; +}}}}}}}}return 14 * CYCLE_UNIT / 2; } /* CMP.W #.W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_b07c_0)(uae_u32 opcode, struct regstruct *regs) @@ -22482,7 +22479,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b07c_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* CMP.L Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_b080_0)(uae_u32 opcode, struct regstruct *regs) @@ -22500,7 +22497,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b080_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* CMP.L An,Dn */ unsigned long REGPARAM2 CPUFUNC(op_b088_0)(uae_u32 opcode, struct regstruct *regs) @@ -22518,7 +22515,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b088_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* CMP.L (An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_b090_0)(uae_u32 opcode, struct regstruct *regs) @@ -22537,7 +22534,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b090_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CMP.L (An)+,Dn */ unsigned long REGPARAM2 CPUFUNC(op_b098_0)(uae_u32 opcode, struct regstruct *regs) @@ -22557,7 +22554,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b098_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CMP.L -(An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_b0a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -22578,7 +22575,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b0a0_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* CMP.L (d16,An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_b0a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -22597,8 +22594,11 @@ unsigned long REGPARAM2 CPUFUNC(op_b0a8_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } +#endif + +#ifdef PART_7 /* CMP.L (d8,An,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_b0b0_0)(uae_u32 opcode, struct regstruct *regs) { @@ -22617,7 +22617,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b0b0_0)(uae_u32 opcode, struct regstruct *reg SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}}return 18 * 256; +}}}}}}}}return 18 * CYCLE_UNIT / 2; } /* CMP.L (xxx).W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_b0b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -22635,7 +22635,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b0b8_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* CMP.L (xxx).L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_b0b9_0)(uae_u32 opcode, struct regstruct *regs) @@ -22653,7 +22653,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b0b9_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* CMP.L (d16,PC),Dn */ unsigned long REGPARAM2 CPUFUNC(op_b0ba_0)(uae_u32 opcode, struct regstruct *regs) @@ -22672,7 +22672,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b0ba_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* CMP.L (d8,PC,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_b0bb_0)(uae_u32 opcode, struct regstruct *regs) @@ -22693,7 +22693,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b0bb_0)(uae_u32 opcode, struct regstruct *reg SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}}return 18 * 256; +}}}}}}}}return 18 * CYCLE_UNIT / 2; } /* CMP.L #.L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_b0bc_0)(uae_u32 opcode, struct regstruct *regs) @@ -22710,7 +22710,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b0bc_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CMPA.W Dn,An */ unsigned long REGPARAM2 CPUFUNC(op_b0c0_0)(uae_u32 opcode, struct regstruct *regs) @@ -22728,7 +22728,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b0c0_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* CMPA.W An,An */ unsigned long REGPARAM2 CPUFUNC(op_b0c8_0)(uae_u32 opcode, struct regstruct *regs) @@ -22746,7 +22746,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b0c8_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* CMPA.W (An),An */ unsigned long REGPARAM2 CPUFUNC(op_b0d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -22765,7 +22765,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b0d0_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* CMPA.W (An)+,An */ unsigned long REGPARAM2 CPUFUNC(op_b0d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -22785,7 +22785,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b0d8_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* CMPA.W -(An),An */ unsigned long REGPARAM2 CPUFUNC(op_b0e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -22806,7 +22806,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b0e0_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* CMPA.W (d16,An),An */ unsigned long REGPARAM2 CPUFUNC(op_b0e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -22825,7 +22825,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b0e8_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CMPA.W (d8,An,Xn),An */ unsigned long REGPARAM2 CPUFUNC(op_b0f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -22845,7 +22845,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b0f0_0)(uae_u32 opcode, struct regstruct *reg SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}}return 14 * 256; +}}}}}}}}return 14 * CYCLE_UNIT / 2; } /* CMPA.W (xxx).W,An */ unsigned long REGPARAM2 CPUFUNC(op_b0f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -22863,7 +22863,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b0f8_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CMPA.W (xxx).L,An */ unsigned long REGPARAM2 CPUFUNC(op_b0f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -22881,7 +22881,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b0f9_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* CMPA.W (d16,PC),An */ unsigned long REGPARAM2 CPUFUNC(op_b0fa_0)(uae_u32 opcode, struct regstruct *regs) @@ -22900,7 +22900,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b0fa_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CMPA.W (d8,PC,Xn),An */ unsigned long REGPARAM2 CPUFUNC(op_b0fb_0)(uae_u32 opcode, struct regstruct *regs) @@ -22921,7 +22921,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b0fb_0)(uae_u32 opcode, struct regstruct *reg SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}}return 14 * 256; +}}}}}}}}return 14 * CYCLE_UNIT / 2; } /* CMPA.W #.W,An */ unsigned long REGPARAM2 CPUFUNC(op_b0fc_0)(uae_u32 opcode, struct regstruct *regs) @@ -22938,7 +22938,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b0fc_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* EOR.B Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_b100_0)(uae_u32 opcode, struct regstruct *regs) @@ -22953,7 +22953,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b100_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* CMPM.B (An)+,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_b108_0)(uae_u32 opcode, struct regstruct *regs) @@ -22975,7 +22975,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b108_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* EOR.B Dn,(An) */ unsigned long REGPARAM2 CPUFUNC(op_b110_0)(uae_u32 opcode, struct regstruct *regs) @@ -22991,7 +22991,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b110_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* EOR.B Dn,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_b118_0)(uae_u32 opcode, struct regstruct *regs) @@ -23008,7 +23008,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b118_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* EOR.B Dn,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_b120_0)(uae_u32 opcode, struct regstruct *regs) @@ -23026,7 +23026,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b120_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* EOR.B Dn,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_b128_0)(uae_u32 opcode, struct regstruct *regs) @@ -23042,7 +23042,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b128_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* EOR.B Dn,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_b130_0)(uae_u32 opcode, struct regstruct *regs) @@ -23059,7 +23059,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b130_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* EOR.B Dn,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_b138_0)(uae_u32 opcode, struct regstruct *regs) @@ -23074,7 +23074,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b138_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* EOR.B Dn,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_b139_0)(uae_u32 opcode, struct regstruct *regs) @@ -23089,7 +23089,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b139_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* EOR.W Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_b140_0)(uae_u32 opcode, struct regstruct *regs) @@ -23104,7 +23104,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b140_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* CMPM.W (An)+,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_b148_0)(uae_u32 opcode, struct regstruct *regs) @@ -23126,7 +23126,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b148_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* EOR.W Dn,(An) */ unsigned long REGPARAM2 CPUFUNC(op_b150_0)(uae_u32 opcode, struct regstruct *regs) @@ -23142,7 +23142,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b150_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* EOR.W Dn,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_b158_0)(uae_u32 opcode, struct regstruct *regs) @@ -23159,7 +23159,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b158_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* EOR.W Dn,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_b160_0)(uae_u32 opcode, struct regstruct *regs) @@ -23177,7 +23177,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b160_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* EOR.W Dn,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_b168_0)(uae_u32 opcode, struct regstruct *regs) @@ -23193,7 +23193,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b168_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* EOR.W Dn,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_b170_0)(uae_u32 opcode, struct regstruct *regs) @@ -23210,7 +23210,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b170_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* EOR.W Dn,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_b178_0)(uae_u32 opcode, struct regstruct *regs) @@ -23225,7 +23225,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b178_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* EOR.W Dn,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_b179_0)(uae_u32 opcode, struct regstruct *regs) @@ -23240,7 +23240,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b179_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* EOR.L Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_b180_0)(uae_u32 opcode, struct regstruct *regs) @@ -23255,7 +23255,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b180_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* CMPM.L (An)+,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_b188_0)(uae_u32 opcode, struct regstruct *regs) @@ -23277,7 +23277,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b188_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 2); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* EOR.L Dn,(An) */ unsigned long REGPARAM2 CPUFUNC(op_b190_0)(uae_u32 opcode, struct regstruct *regs) @@ -23293,7 +23293,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b190_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 2); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* EOR.L Dn,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_b198_0)(uae_u32 opcode, struct regstruct *regs) @@ -23310,7 +23310,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b198_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 2); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* EOR.L Dn,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_b1a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -23328,7 +23328,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b1a0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 2); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* EOR.L Dn,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_b1a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -23344,7 +23344,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b1a8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 4); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* EOR.L Dn,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_b1b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -23361,7 +23361,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b1b0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); -}}}}}return 26 * 256; +}}}}}return 26 * CYCLE_UNIT / 2; } /* EOR.L Dn,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_b1b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -23376,7 +23376,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b1b8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 4); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* EOR.L Dn,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_b1b9_0)(uae_u32 opcode, struct regstruct *regs) @@ -23391,7 +23391,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b1b9_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 6); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* CMPA.L Dn,An */ unsigned long REGPARAM2 CPUFUNC(op_b1c0_0)(uae_u32 opcode, struct regstruct *regs) @@ -23409,7 +23409,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b1c0_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* CMPA.L An,An */ unsigned long REGPARAM2 CPUFUNC(op_b1c8_0)(uae_u32 opcode, struct regstruct *regs) @@ -23427,7 +23427,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b1c8_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* CMPA.L (An),An */ unsigned long REGPARAM2 CPUFUNC(op_b1d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -23446,7 +23446,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b1d0_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CMPA.L (An)+,An */ unsigned long REGPARAM2 CPUFUNC(op_b1d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -23466,7 +23466,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b1d8_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CMPA.L -(An),An */ unsigned long REGPARAM2 CPUFUNC(op_b1e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -23487,7 +23487,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b1e0_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* CMPA.L (d16,An),An */ unsigned long REGPARAM2 CPUFUNC(op_b1e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -23506,7 +23506,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b1e8_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* CMPA.L (d8,An,Xn),An */ unsigned long REGPARAM2 CPUFUNC(op_b1f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -23526,7 +23526,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b1f0_0)(uae_u32 opcode, struct regstruct *reg SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}}return 18 * 256; +}}}}}}}}return 18 * CYCLE_UNIT / 2; } /* CMPA.L (xxx).W,An */ unsigned long REGPARAM2 CPUFUNC(op_b1f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -23544,7 +23544,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b1f8_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* CMPA.L (xxx).L,An */ unsigned long REGPARAM2 CPUFUNC(op_b1f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -23562,7 +23562,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b1f9_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* CMPA.L (d16,PC),An */ unsigned long REGPARAM2 CPUFUNC(op_b1fa_0)(uae_u32 opcode, struct regstruct *regs) @@ -23581,7 +23581,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b1fa_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* CMPA.L (d8,PC,Xn),An */ unsigned long REGPARAM2 CPUFUNC(op_b1fb_0)(uae_u32 opcode, struct regstruct *regs) @@ -23602,7 +23602,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b1fb_0)(uae_u32 opcode, struct regstruct *reg SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}}return 18 * 256; +}}}}}}}}return 18 * CYCLE_UNIT / 2; } /* CMPA.L #.L,An */ unsigned long REGPARAM2 CPUFUNC(op_b1fc_0)(uae_u32 opcode, struct regstruct *regs) @@ -23619,7 +23619,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b1fc_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* AND.B Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_c000_0)(uae_u32 opcode, struct regstruct *regs) @@ -23634,7 +23634,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c000_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* AND.B (An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_c010_0)(uae_u32 opcode, struct regstruct *regs) @@ -23650,7 +23650,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c010_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* AND.B (An)+,Dn */ unsigned long REGPARAM2 CPUFUNC(op_c018_0)(uae_u32 opcode, struct regstruct *regs) @@ -23667,7 +23667,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c018_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* AND.B -(An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_c020_0)(uae_u32 opcode, struct regstruct *regs) @@ -23685,7 +23685,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c020_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* AND.B (d16,An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_c028_0)(uae_u32 opcode, struct regstruct *regs) @@ -23701,7 +23701,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c028_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* AND.B (d8,An,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_c030_0)(uae_u32 opcode, struct regstruct *regs) @@ -23718,7 +23718,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c030_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* AND.B (xxx).W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_c038_0)(uae_u32 opcode, struct regstruct *regs) @@ -23733,7 +23733,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c038_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* AND.B (xxx).L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_c039_0)(uae_u32 opcode, struct regstruct *regs) @@ -23748,7 +23748,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c039_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* AND.B (d16,PC),Dn */ unsigned long REGPARAM2 CPUFUNC(op_c03a_0)(uae_u32 opcode, struct regstruct *regs) @@ -23764,7 +23764,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c03a_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* AND.B (d8,PC,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_c03b_0)(uae_u32 opcode, struct regstruct *regs) @@ -23782,7 +23782,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c03b_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* AND.B #.B,Dn */ unsigned long REGPARAM2 CPUFUNC(op_c03c_0)(uae_u32 opcode, struct regstruct *regs) @@ -23796,7 +23796,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c03c_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* AND.W Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_c040_0)(uae_u32 opcode, struct regstruct *regs) @@ -23811,7 +23811,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c040_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* AND.W (An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_c050_0)(uae_u32 opcode, struct regstruct *regs) @@ -23827,7 +23827,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c050_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* AND.W (An)+,Dn */ unsigned long REGPARAM2 CPUFUNC(op_c058_0)(uae_u32 opcode, struct regstruct *regs) @@ -23844,7 +23844,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c058_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* AND.W -(An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_c060_0)(uae_u32 opcode, struct regstruct *regs) @@ -23862,7 +23862,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c060_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* AND.W (d16,An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_c068_0)(uae_u32 opcode, struct regstruct *regs) @@ -23878,7 +23878,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c068_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* AND.W (d8,An,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_c070_0)(uae_u32 opcode, struct regstruct *regs) @@ -23895,7 +23895,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c070_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* AND.W (xxx).W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_c078_0)(uae_u32 opcode, struct regstruct *regs) @@ -23910,7 +23910,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c078_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* AND.W (xxx).L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_c079_0)(uae_u32 opcode, struct regstruct *regs) @@ -23925,7 +23925,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c079_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* AND.W (d16,PC),Dn */ unsigned long REGPARAM2 CPUFUNC(op_c07a_0)(uae_u32 opcode, struct regstruct *regs) @@ -23941,7 +23941,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c07a_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* AND.W (d8,PC,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_c07b_0)(uae_u32 opcode, struct regstruct *regs) @@ -23959,7 +23959,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c07b_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } /* AND.W #.W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_c07c_0)(uae_u32 opcode, struct regstruct *regs) @@ -23973,7 +23973,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c07c_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* AND.L Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_c080_0)(uae_u32 opcode, struct regstruct *regs) @@ -23988,7 +23988,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c080_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* AND.L (An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_c090_0)(uae_u32 opcode, struct regstruct *regs) @@ -24004,7 +24004,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c090_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* AND.L (An)+,Dn */ unsigned long REGPARAM2 CPUFUNC(op_c098_0)(uae_u32 opcode, struct regstruct *regs) @@ -24021,7 +24021,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c098_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* AND.L -(An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_c0a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -24039,7 +24039,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c0a0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* AND.L (d16,An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_c0a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -24055,7 +24055,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c0a8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* AND.L (d8,An,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_c0b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -24072,7 +24072,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c0b0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* AND.L (xxx).W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_c0b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -24087,7 +24087,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c0b8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* AND.L (xxx).L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_c0b9_0)(uae_u32 opcode, struct regstruct *regs) @@ -24102,7 +24102,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c0b9_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* AND.L (d16,PC),Dn */ unsigned long REGPARAM2 CPUFUNC(op_c0ba_0)(uae_u32 opcode, struct regstruct *regs) @@ -24118,7 +24118,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c0ba_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* AND.L (d8,PC,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_c0bb_0)(uae_u32 opcode, struct regstruct *regs) @@ -24136,7 +24136,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c0bb_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* AND.L #.L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_c0bc_0)(uae_u32 opcode, struct regstruct *regs) @@ -24150,7 +24150,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c0bc_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* MULU.W Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_c0c0_0)(uae_u32 opcode, struct regstruct *regs) @@ -24165,7 +24165,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c0c0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); m68k_incpc (regs, 2); -}}}}return 58 * 256; +}}}}return 58 * CYCLE_UNIT / 2; } /* MULU.W (An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_c0d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -24181,7 +24181,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c0d0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); m68k_incpc (regs, 2); -}}}}}return 62 * 256; +}}}}}return 62 * CYCLE_UNIT / 2; } /* MULU.W (An)+,Dn */ unsigned long REGPARAM2 CPUFUNC(op_c0d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -24198,7 +24198,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c0d8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); m68k_incpc (regs, 2); -}}}}}return 62 * 256; +}}}}}return 62 * CYCLE_UNIT / 2; } /* MULU.W -(An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_c0e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -24216,7 +24216,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c0e0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); m68k_incpc (regs, 2); -}}}}}return 64 * 256; +}}}}}return 64 * CYCLE_UNIT / 2; } /* MULU.W (d16,An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_c0e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -24232,7 +24232,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c0e8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); m68k_incpc (regs, 4); -}}}}}return 66 * 256; +}}}}}return 66 * CYCLE_UNIT / 2; } /* MULU.W (d8,An,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_c0f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -24249,7 +24249,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c0f0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(newv)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); -}}}}}}return 68 * 256; +}}}}}}return 68 * CYCLE_UNIT / 2; } /* MULU.W (xxx).W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_c0f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -24264,7 +24264,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c0f8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); m68k_incpc (regs, 4); -}}}}}return 66 * 256; +}}}}}return 66 * CYCLE_UNIT / 2; } /* MULU.W (xxx).L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_c0f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -24279,7 +24279,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c0f9_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); m68k_incpc (regs, 6); -}}}}}return 70 * 256; +}}}}}return 70 * CYCLE_UNIT / 2; } /* MULU.W (d16,PC),Dn */ unsigned long REGPARAM2 CPUFUNC(op_c0fa_0)(uae_u32 opcode, struct regstruct *regs) @@ -24295,7 +24295,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c0fa_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); m68k_incpc (regs, 4); -}}}}}return 66 * 256; +}}}}}return 66 * CYCLE_UNIT / 2; } /* MULU.W (d8,PC,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_c0fb_0)(uae_u32 opcode, struct regstruct *regs) @@ -24313,7 +24313,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c0fb_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(newv)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); -}}}}}}return 68 * 256; +}}}}}}return 68 * CYCLE_UNIT / 2; } /* MULU.W #.W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_c0fc_0)(uae_u32 opcode, struct regstruct *regs) @@ -24327,7 +24327,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c0fc_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); m68k_incpc (regs, 4); -}}}}return 62 * 256; +}}}}return 62 * CYCLE_UNIT / 2; } /* ABCD.B Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_c100_0)(uae_u32 opcode, struct regstruct *regs) @@ -24347,11 +24347,9 @@ unsigned long REGPARAM2 CPUFUNC(op_c100_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, cflg); COPY_CARRY (®s->ccrflags); SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s8)(newv)) == 0)); - SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); - SET_VFLG (®s->ccrflags, (tmp_newv & 0x80) == 0 && (newv & 0x80) != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ABCD.B -(An),-(An) */ unsigned long REGPARAM2 CPUFUNC(op_c108_0)(uae_u32 opcode, struct regstruct *regs) @@ -24377,11 +24375,9 @@ unsigned long REGPARAM2 CPUFUNC(op_c108_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, cflg); COPY_CARRY (®s->ccrflags); SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s8)(newv)) == 0)); - SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); - SET_VFLG (®s->ccrflags, (tmp_newv & 0x80) == 0 && (newv & 0x80) != 0); put_byte (dsta,newv); }}}}}} m68k_incpc (regs, 2); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* AND.B Dn,(An) */ unsigned long REGPARAM2 CPUFUNC(op_c110_0)(uae_u32 opcode, struct regstruct *regs) @@ -24397,7 +24393,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c110_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* AND.B Dn,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_c118_0)(uae_u32 opcode, struct regstruct *regs) @@ -24414,7 +24410,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c118_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* AND.B Dn,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_c120_0)(uae_u32 opcode, struct regstruct *regs) @@ -24432,7 +24428,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c120_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* AND.B Dn,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_c128_0)(uae_u32 opcode, struct regstruct *regs) @@ -24448,7 +24444,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c128_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* AND.B Dn,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_c130_0)(uae_u32 opcode, struct regstruct *regs) @@ -24465,7 +24461,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c130_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* AND.B Dn,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_c138_0)(uae_u32 opcode, struct regstruct *regs) @@ -24480,7 +24476,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c138_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* AND.B Dn,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_c139_0)(uae_u32 opcode, struct regstruct *regs) @@ -24495,7 +24491,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c139_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* EXG.L Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_c140_0)(uae_u32 opcode, struct regstruct *regs) @@ -24507,7 +24503,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c140_0)(uae_u32 opcode, struct regstruct *reg m68k_dreg(regs, srcreg) = (dst); m68k_dreg(regs, dstreg) = (src); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* EXG.L An,An */ unsigned long REGPARAM2 CPUFUNC(op_c148_0)(uae_u32 opcode, struct regstruct *regs) @@ -24519,7 +24515,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c148_0)(uae_u32 opcode, struct regstruct *reg m68k_areg(regs, srcreg) = (dst); m68k_areg(regs, dstreg) = (src); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* AND.W Dn,(An) */ unsigned long REGPARAM2 CPUFUNC(op_c150_0)(uae_u32 opcode, struct regstruct *regs) @@ -24535,7 +24531,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c150_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* AND.W Dn,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_c158_0)(uae_u32 opcode, struct regstruct *regs) @@ -24552,7 +24548,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c158_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* AND.W Dn,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_c160_0)(uae_u32 opcode, struct regstruct *regs) @@ -24570,7 +24566,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c160_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* AND.W Dn,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_c168_0)(uae_u32 opcode, struct regstruct *regs) @@ -24586,7 +24582,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c168_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* AND.W Dn,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_c170_0)(uae_u32 opcode, struct regstruct *regs) @@ -24603,7 +24599,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c170_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* AND.W Dn,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_c178_0)(uae_u32 opcode, struct regstruct *regs) @@ -24618,7 +24614,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c178_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* AND.W Dn,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_c179_0)(uae_u32 opcode, struct regstruct *regs) @@ -24633,7 +24629,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c179_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* EXG.L Dn,An */ unsigned long REGPARAM2 CPUFUNC(op_c188_0)(uae_u32 opcode, struct regstruct *regs) @@ -24645,7 +24641,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c188_0)(uae_u32 opcode, struct regstruct *reg m68k_dreg(regs, srcreg) = (dst); m68k_areg(regs, dstreg) = (src); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* AND.L Dn,(An) */ unsigned long REGPARAM2 CPUFUNC(op_c190_0)(uae_u32 opcode, struct regstruct *regs) @@ -24661,7 +24657,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c190_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 2); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* AND.L Dn,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_c198_0)(uae_u32 opcode, struct regstruct *regs) @@ -24678,7 +24674,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c198_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 2); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* AND.L Dn,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_c1a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -24696,7 +24692,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c1a0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 2); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* AND.L Dn,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_c1a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -24712,7 +24708,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c1a8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 4); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* AND.L Dn,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_c1b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -24729,7 +24725,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c1b0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); -}}}}}return 26 * 256; +}}}}}return 26 * CYCLE_UNIT / 2; } /* AND.L Dn,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_c1b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -24744,7 +24740,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c1b8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 4); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* AND.L Dn,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_c1b9_0)(uae_u32 opcode, struct regstruct *regs) @@ -24759,7 +24755,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c1b9_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 6); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* MULS.W Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_c1c0_0)(uae_u32 opcode, struct regstruct *regs) @@ -24774,7 +24770,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c1c0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 2); -return 58 * 256; +return 58 * CYCLE_UNIT / 2; } /* MULS.W (An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_c1d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -24790,7 +24786,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c1d0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 2); -return 62 * 256; +return 62 * CYCLE_UNIT / 2; } /* MULS.W (An)+,Dn */ unsigned long REGPARAM2 CPUFUNC(op_c1d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -24807,7 +24803,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c1d8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 2); -return 62 * 256; +return 62 * CYCLE_UNIT / 2; } /* MULS.W -(An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_c1e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -24825,7 +24821,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c1e0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 2); -return 64 * 256; +return 64 * CYCLE_UNIT / 2; } /* MULS.W (d16,An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_c1e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -24841,7 +24837,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c1e8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 4); -return 66 * 256; +return 66 * CYCLE_UNIT / 2; } /* MULS.W (d8,An,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_c1f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -24858,7 +24854,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c1f0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(newv)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); -}}}}}}return 68 * 256; +}}}}}}return 68 * CYCLE_UNIT / 2; } /* MULS.W (xxx).W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_c1f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -24873,7 +24869,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c1f8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 4); -return 66 * 256; +return 66 * CYCLE_UNIT / 2; } /* MULS.W (xxx).L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_c1f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -24888,7 +24884,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c1f9_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 6); -return 70 * 256; +return 70 * CYCLE_UNIT / 2; } /* MULS.W (d16,PC),Dn */ unsigned long REGPARAM2 CPUFUNC(op_c1fa_0)(uae_u32 opcode, struct regstruct *regs) @@ -24904,7 +24900,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c1fa_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 4); -return 66 * 256; +return 66 * CYCLE_UNIT / 2; } /* MULS.W (d8,PC,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_c1fb_0)(uae_u32 opcode, struct regstruct *regs) @@ -24922,7 +24918,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c1fb_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(newv)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); -}}}}}}return 68 * 256; +}}}}}}return 68 * CYCLE_UNIT / 2; } /* MULS.W #.W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_c1fc_0)(uae_u32 opcode, struct regstruct *regs) @@ -24936,7 +24932,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c1fc_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 4); -return 62 * 256; +return 62 * CYCLE_UNIT / 2; } /* ADD.B Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_d000_0)(uae_u32 opcode, struct regstruct *regs) @@ -24956,7 +24952,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d000_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADD.B (An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_d010_0)(uae_u32 opcode, struct regstruct *regs) @@ -24977,7 +24973,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d010_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* ADD.B (An)+,Dn */ unsigned long REGPARAM2 CPUFUNC(op_d018_0)(uae_u32 opcode, struct regstruct *regs) @@ -24999,7 +24995,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d018_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* ADD.B -(An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_d020_0)(uae_u32 opcode, struct regstruct *regs) @@ -25022,7 +25018,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d020_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* ADD.B (d16,An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_d028_0)(uae_u32 opcode, struct regstruct *regs) @@ -25043,7 +25039,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d028_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADD.B (d8,An,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_d030_0)(uae_u32 opcode, struct regstruct *regs) @@ -25065,7 +25061,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d030_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); -}}}}}}}}return 14 * 256; +}}}}}}}}return 14 * CYCLE_UNIT / 2; } /* ADD.B (xxx).W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_d038_0)(uae_u32 opcode, struct regstruct *regs) @@ -25085,7 +25081,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d038_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADD.B (xxx).L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_d039_0)(uae_u32 opcode, struct regstruct *regs) @@ -25105,7 +25101,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d039_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ADD.B (d16,PC),Dn */ unsigned long REGPARAM2 CPUFUNC(op_d03a_0)(uae_u32 opcode, struct regstruct *regs) @@ -25126,7 +25122,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d03a_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADD.B (d8,PC,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_d03b_0)(uae_u32 opcode, struct regstruct *regs) @@ -25149,7 +25145,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d03b_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); -}}}}}}}}return 14 * 256; +}}}}}}}}return 14 * CYCLE_UNIT / 2; } /* ADD.B #.B,Dn */ unsigned long REGPARAM2 CPUFUNC(op_d03c_0)(uae_u32 opcode, struct regstruct *regs) @@ -25168,7 +25164,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d03c_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADD.W Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_d040_0)(uae_u32 opcode, struct regstruct *regs) @@ -25188,7 +25184,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d040_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADD.W An,Dn */ unsigned long REGPARAM2 CPUFUNC(op_d048_0)(uae_u32 opcode, struct regstruct *regs) @@ -25208,7 +25204,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d048_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADD.W (An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_d050_0)(uae_u32 opcode, struct regstruct *regs) @@ -25229,7 +25225,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d050_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* ADD.W (An)+,Dn */ unsigned long REGPARAM2 CPUFUNC(op_d058_0)(uae_u32 opcode, struct regstruct *regs) @@ -25251,7 +25247,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d058_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* ADD.W -(An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_d060_0)(uae_u32 opcode, struct regstruct *regs) @@ -25274,7 +25270,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d060_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* ADD.W (d16,An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_d068_0)(uae_u32 opcode, struct regstruct *regs) @@ -25295,7 +25291,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d068_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADD.W (d8,An,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_d070_0)(uae_u32 opcode, struct regstruct *regs) @@ -25317,7 +25313,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d070_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); -}}}}}}}}return 14 * 256; +}}}}}}}}return 14 * CYCLE_UNIT / 2; } /* ADD.W (xxx).W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_d078_0)(uae_u32 opcode, struct regstruct *regs) @@ -25337,7 +25333,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d078_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADD.W (xxx).L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_d079_0)(uae_u32 opcode, struct regstruct *regs) @@ -25357,7 +25353,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d079_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ADD.W (d16,PC),Dn */ unsigned long REGPARAM2 CPUFUNC(op_d07a_0)(uae_u32 opcode, struct regstruct *regs) @@ -25378,7 +25374,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d07a_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADD.W (d8,PC,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_d07b_0)(uae_u32 opcode, struct regstruct *regs) @@ -25401,7 +25397,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d07b_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); -}}}}}}}}return 14 * 256; +}}}}}}}}return 14 * CYCLE_UNIT / 2; } /* ADD.W #.W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_d07c_0)(uae_u32 opcode, struct regstruct *regs) @@ -25420,7 +25416,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d07c_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* ADD.L Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_d080_0)(uae_u32 opcode, struct regstruct *regs) @@ -25440,7 +25436,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d080_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADD.L An,Dn */ unsigned long REGPARAM2 CPUFUNC(op_d088_0)(uae_u32 opcode, struct regstruct *regs) @@ -25460,7 +25456,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d088_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADD.L (An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_d090_0)(uae_u32 opcode, struct regstruct *regs) @@ -25481,7 +25477,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d090_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADD.L (An)+,Dn */ unsigned long REGPARAM2 CPUFUNC(op_d098_0)(uae_u32 opcode, struct regstruct *regs) @@ -25503,7 +25499,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d098_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADD.L -(An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_d0a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -25526,7 +25522,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d0a0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* ADD.L (d16,An),Dn */ unsigned long REGPARAM2 CPUFUNC(op_d0a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -25547,7 +25543,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d0a8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ADD.L (d8,An,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_d0b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -25569,7 +25565,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d0b0_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); -}}}}}}}}return 18 * 256; +}}}}}}}}return 18 * CYCLE_UNIT / 2; } /* ADD.L (xxx).W,Dn */ unsigned long REGPARAM2 CPUFUNC(op_d0b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -25589,7 +25585,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d0b8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ADD.L (xxx).L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_d0b9_0)(uae_u32 opcode, struct regstruct *regs) @@ -25609,7 +25605,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d0b9_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* ADD.L (d16,PC),Dn */ unsigned long REGPARAM2 CPUFUNC(op_d0ba_0)(uae_u32 opcode, struct regstruct *regs) @@ -25630,7 +25626,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d0ba_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ADD.L (d8,PC,Xn),Dn */ unsigned long REGPARAM2 CPUFUNC(op_d0bb_0)(uae_u32 opcode, struct regstruct *regs) @@ -25653,7 +25649,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d0bb_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); -}}}}}}}}return 18 * 256; +}}}}}}}}return 18 * CYCLE_UNIT / 2; } /* ADD.L #.L,Dn */ unsigned long REGPARAM2 CPUFUNC(op_d0bc_0)(uae_u32 opcode, struct regstruct *regs) @@ -25672,7 +25668,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d0bc_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADDA.W Dn,An */ unsigned long REGPARAM2 CPUFUNC(op_d0c0_0)(uae_u32 opcode, struct regstruct *regs) @@ -25684,7 +25680,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d0c0_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADDA.W An,An */ unsigned long REGPARAM2 CPUFUNC(op_d0c8_0)(uae_u32 opcode, struct regstruct *regs) @@ -25696,7 +25692,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d0c8_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADDA.W (An),An */ unsigned long REGPARAM2 CPUFUNC(op_d0d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -25709,7 +25705,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d0d0_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* ADDA.W (An)+,An */ unsigned long REGPARAM2 CPUFUNC(op_d0d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -25723,7 +25719,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d0d8_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* ADDA.W -(An),An */ unsigned long REGPARAM2 CPUFUNC(op_d0e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -25738,7 +25734,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d0e0_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* ADDA.W (d16,An),An */ unsigned long REGPARAM2 CPUFUNC(op_d0e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -25751,7 +25747,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d0e8_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADDA.W (d8,An,Xn),An */ unsigned long REGPARAM2 CPUFUNC(op_d0f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -25765,7 +25761,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d0f0_0)(uae_u32 opcode, struct regstruct *reg { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); -}}}}}}return 14 * 256; +}}}}}}return 14 * CYCLE_UNIT / 2; } /* ADDA.W (xxx).W,An */ unsigned long REGPARAM2 CPUFUNC(op_d0f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -25777,7 +25773,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d0f8_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADDA.W (xxx).L,An */ unsigned long REGPARAM2 CPUFUNC(op_d0f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -25789,7 +25785,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d0f9_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ADDA.W (d16,PC),An */ unsigned long REGPARAM2 CPUFUNC(op_d0fa_0)(uae_u32 opcode, struct regstruct *regs) @@ -25802,7 +25798,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d0fa_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADDA.W (d8,PC,Xn),An */ unsigned long REGPARAM2 CPUFUNC(op_d0fb_0)(uae_u32 opcode, struct regstruct *regs) @@ -25817,7 +25813,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d0fb_0)(uae_u32 opcode, struct regstruct *reg { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); -}}}}}}return 14 * 256; +}}}}}}return 14 * CYCLE_UNIT / 2; } /* ADDA.W #.W,An */ unsigned long REGPARAM2 CPUFUNC(op_d0fc_0)(uae_u32 opcode, struct regstruct *regs) @@ -25828,7 +25824,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d0fc_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* ADDX.B Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_d100_0)(uae_u32 opcode, struct regstruct *regs) @@ -25848,7 +25844,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d100_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADDX.B -(An),-(An) */ unsigned long REGPARAM2 CPUFUNC(op_d108_0)(uae_u32 opcode, struct regstruct *regs) @@ -25874,7 +25870,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d108_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ADD.B Dn,(An) */ unsigned long REGPARAM2 CPUFUNC(op_d110_0)(uae_u32 opcode, struct regstruct *regs) @@ -25895,7 +25891,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d110_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADD.B Dn,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_d118_0)(uae_u32 opcode, struct regstruct *regs) @@ -25917,7 +25913,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d118_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADD.B Dn,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_d120_0)(uae_u32 opcode, struct regstruct *regs) @@ -25940,7 +25936,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d120_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* ADD.B Dn,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_d128_0)(uae_u32 opcode, struct regstruct *regs) @@ -25961,7 +25957,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d128_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ADD.B Dn,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_d130_0)(uae_u32 opcode, struct regstruct *regs) @@ -25983,7 +25979,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d130_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); -}}}}}}}}return 18 * 256; +}}}}}}}}return 18 * CYCLE_UNIT / 2; } /* ADD.B Dn,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_d138_0)(uae_u32 opcode, struct regstruct *regs) @@ -26003,7 +25999,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d138_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ADD.B Dn,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_d139_0)(uae_u32 opcode, struct regstruct *regs) @@ -26023,7 +26019,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d139_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* ADDX.W Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_d140_0)(uae_u32 opcode, struct regstruct *regs) @@ -26043,7 +26039,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d140_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADDX.W -(An),-(An) */ unsigned long REGPARAM2 CPUFUNC(op_d148_0)(uae_u32 opcode, struct regstruct *regs) @@ -26069,7 +26065,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d148_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ADD.W Dn,(An) */ unsigned long REGPARAM2 CPUFUNC(op_d150_0)(uae_u32 opcode, struct regstruct *regs) @@ -26090,7 +26086,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d150_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADD.W Dn,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_d158_0)(uae_u32 opcode, struct regstruct *regs) @@ -26112,7 +26108,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d158_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADD.W Dn,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_d160_0)(uae_u32 opcode, struct regstruct *regs) @@ -26135,7 +26131,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d160_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* ADD.W Dn,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_d168_0)(uae_u32 opcode, struct regstruct *regs) @@ -26156,7 +26152,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d168_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ADD.W Dn,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_d170_0)(uae_u32 opcode, struct regstruct *regs) @@ -26178,7 +26174,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d170_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); -}}}}}}}}return 18 * 256; +}}}}}}}}return 18 * CYCLE_UNIT / 2; } /* ADD.W Dn,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_d178_0)(uae_u32 opcode, struct regstruct *regs) @@ -26198,7 +26194,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d178_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ADD.W Dn,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_d179_0)(uae_u32 opcode, struct regstruct *regs) @@ -26218,7 +26214,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d179_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* ADDX.L Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_d180_0)(uae_u32 opcode, struct regstruct *regs) @@ -26238,7 +26234,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d180_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADDX.L -(An),-(An) */ unsigned long REGPARAM2 CPUFUNC(op_d188_0)(uae_u32 opcode, struct regstruct *regs) @@ -26264,7 +26260,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d188_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* ADD.L Dn,(An) */ unsigned long REGPARAM2 CPUFUNC(op_d190_0)(uae_u32 opcode, struct regstruct *regs) @@ -26285,7 +26281,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d190_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* ADD.L Dn,(An)+ */ unsigned long REGPARAM2 CPUFUNC(op_d198_0)(uae_u32 opcode, struct regstruct *regs) @@ -26307,7 +26303,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d198_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* ADD.L Dn,-(An) */ unsigned long REGPARAM2 CPUFUNC(op_d1a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -26330,7 +26326,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d1a0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* ADD.L Dn,(d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_d1a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -26351,7 +26347,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d1a8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* ADD.L Dn,(d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_d1b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -26373,7 +26369,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d1b0_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); -}}}}}}}}return 26 * 256; +}}}}}}}}return 26 * CYCLE_UNIT / 2; } /* ADD.L Dn,(xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_d1b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -26393,7 +26389,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d1b8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* ADD.L Dn,(xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_d1b9_0)(uae_u32 opcode, struct regstruct *regs) @@ -26413,7 +26409,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d1b9_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* ADDA.L Dn,An */ unsigned long REGPARAM2 CPUFUNC(op_d1c0_0)(uae_u32 opcode, struct regstruct *regs) @@ -26425,7 +26421,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d1c0_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADDA.L An,An */ unsigned long REGPARAM2 CPUFUNC(op_d1c8_0)(uae_u32 opcode, struct regstruct *regs) @@ -26437,7 +26433,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d1c8_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADDA.L (An),An */ unsigned long REGPARAM2 CPUFUNC(op_d1d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -26450,7 +26446,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d1d0_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADDA.L (An)+,An */ unsigned long REGPARAM2 CPUFUNC(op_d1d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -26464,11 +26460,8 @@ unsigned long REGPARAM2 CPUFUNC(op_d1d8_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } -#endif - -#ifdef PART_8 /* ADDA.L -(An),An */ unsigned long REGPARAM2 CPUFUNC(op_d1e0_0)(uae_u32 opcode, struct regstruct *regs) { @@ -26482,7 +26475,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d1e0_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* ADDA.L (d16,An),An */ unsigned long REGPARAM2 CPUFUNC(op_d1e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -26495,7 +26488,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d1e8_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ADDA.L (d8,An,Xn),An */ unsigned long REGPARAM2 CPUFUNC(op_d1f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -26509,7 +26502,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d1f0_0)(uae_u32 opcode, struct regstruct *reg { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); -}}}}}}return 18 * 256; +}}}}}}return 18 * CYCLE_UNIT / 2; } /* ADDA.L (xxx).W,An */ unsigned long REGPARAM2 CPUFUNC(op_d1f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -26521,7 +26514,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d1f8_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ADDA.L (xxx).L,An */ unsigned long REGPARAM2 CPUFUNC(op_d1f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -26533,7 +26526,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d1f9_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* ADDA.L (d16,PC),An */ unsigned long REGPARAM2 CPUFUNC(op_d1fa_0)(uae_u32 opcode, struct regstruct *regs) @@ -26546,7 +26539,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d1fa_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ADDA.L (d8,PC,Xn),An */ unsigned long REGPARAM2 CPUFUNC(op_d1fb_0)(uae_u32 opcode, struct regstruct *regs) @@ -26561,7 +26554,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d1fb_0)(uae_u32 opcode, struct regstruct *reg { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); -}}}}}}return 18 * 256; +}}}}}}return 18 * CYCLE_UNIT / 2; } /* ADDA.L #.L,An */ unsigned long REGPARAM2 CPUFUNC(op_d1fc_0)(uae_u32 opcode, struct regstruct *regs) @@ -26572,7 +26565,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d1fc_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ASR.B #,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e000_0)(uae_u32 opcode, struct regstruct *regs) @@ -26601,7 +26594,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e000_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* LSR.B #,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e008_0)(uae_u32 opcode, struct regstruct *regs) @@ -26627,7 +26620,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e008_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROXR.B #,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e010_0)(uae_u32 opcode, struct regstruct *regs) @@ -26656,7 +26649,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e010_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROR.B #,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e018_0)(uae_u32 opcode, struct regstruct *regs) @@ -26680,7 +26673,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e018_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ASR.B Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e020_0)(uae_u32 opcode, struct regstruct *regs) @@ -26709,7 +26702,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e020_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* LSR.B Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e028_0)(uae_u32 opcode, struct regstruct *regs) @@ -26735,7 +26728,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e028_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROXR.B Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e030_0)(uae_u32 opcode, struct regstruct *regs) @@ -26768,7 +26761,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e030_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROR.B Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e038_0)(uae_u32 opcode, struct regstruct *regs) @@ -26792,7 +26785,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e038_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ASR.W #,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e040_0)(uae_u32 opcode, struct regstruct *regs) @@ -26821,7 +26814,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e040_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* LSR.W #,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e048_0)(uae_u32 opcode, struct regstruct *regs) @@ -26847,7 +26840,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e048_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROXR.W #,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e050_0)(uae_u32 opcode, struct regstruct *regs) @@ -26876,7 +26869,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e050_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROR.W #,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e058_0)(uae_u32 opcode, struct regstruct *regs) @@ -26900,8 +26893,11 @@ unsigned long REGPARAM2 CPUFUNC(op_e058_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } +#endif + +#ifdef PART_8 /* ASR.W Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e060_0)(uae_u32 opcode, struct regstruct *regs) { @@ -26929,7 +26925,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e060_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* LSR.W Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e068_0)(uae_u32 opcode, struct regstruct *regs) @@ -26955,7 +26951,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e068_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROXR.W Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e070_0)(uae_u32 opcode, struct regstruct *regs) @@ -26987,7 +26983,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e070_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROR.W Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e078_0)(uae_u32 opcode, struct regstruct *regs) @@ -27011,7 +27007,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e078_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ASR.L #,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e080_0)(uae_u32 opcode, struct regstruct *regs) @@ -27040,7 +27036,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e080_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* LSR.L #,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e088_0)(uae_u32 opcode, struct regstruct *regs) @@ -27066,7 +27062,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e088_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROXR.L #,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e090_0)(uae_u32 opcode, struct regstruct *regs) @@ -27095,7 +27091,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e090_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROR.L #,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e098_0)(uae_u32 opcode, struct regstruct *regs) @@ -27119,7 +27115,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e098_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ASR.L Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e0a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -27148,7 +27144,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e0a0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* LSR.L Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e0a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -27174,7 +27170,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e0a8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROXR.L Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e0b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -27205,7 +27201,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e0b0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROR.L Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e0b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -27229,7 +27225,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e0b8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ASRW.W (An) */ unsigned long REGPARAM2 CPUFUNC(op_e0d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -27248,7 +27244,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e0d0_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ASRW.W (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_e0d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -27268,7 +27264,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e0d8_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ASRW.W -(An) */ unsigned long REGPARAM2 CPUFUNC(op_e0e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -27289,7 +27285,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e0e0_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* ASRW.W (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_e0e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -27308,7 +27304,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e0e8_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ASRW.W (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_e0f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -27328,7 +27324,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e0f0_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, cflg); COPY_CARRY (®s->ccrflags); put_word (dataa,val); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* ASRW.W (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_e0f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -27346,7 +27342,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e0f8_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ASRW.W (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_e0f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -27364,7 +27360,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e0f9_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* ASL.B #,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e100_0)(uae_u32 opcode, struct regstruct *regs) @@ -27394,7 +27390,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e100_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* LSL.B #,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e108_0)(uae_u32 opcode, struct regstruct *regs) @@ -27421,7 +27417,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e108_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROXL.B #,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e110_0)(uae_u32 opcode, struct regstruct *regs) @@ -27447,7 +27443,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e110_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROL.B #,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e118_0)(uae_u32 opcode, struct regstruct *regs) @@ -27471,7 +27467,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e118_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ASL.B Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e120_0)(uae_u32 opcode, struct regstruct *regs) @@ -27501,7 +27497,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e120_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* LSL.B Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e128_0)(uae_u32 opcode, struct regstruct *regs) @@ -27528,7 +27524,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e128_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROXL.B Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e130_0)(uae_u32 opcode, struct regstruct *regs) @@ -27558,7 +27554,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e130_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROL.B Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e138_0)(uae_u32 opcode, struct regstruct *regs) @@ -27583,7 +27579,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e138_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ASL.W #,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e140_0)(uae_u32 opcode, struct regstruct *regs) @@ -27613,7 +27609,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e140_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* LSL.W #,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e148_0)(uae_u32 opcode, struct regstruct *regs) @@ -27640,7 +27636,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e148_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROXL.W #,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e150_0)(uae_u32 opcode, struct regstruct *regs) @@ -27666,7 +27662,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e150_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROL.W #,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e158_0)(uae_u32 opcode, struct regstruct *regs) @@ -27690,7 +27686,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e158_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ASL.W Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e160_0)(uae_u32 opcode, struct regstruct *regs) @@ -27720,7 +27716,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e160_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* LSL.W Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e168_0)(uae_u32 opcode, struct regstruct *regs) @@ -27747,7 +27743,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e168_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROXL.W Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e170_0)(uae_u32 opcode, struct regstruct *regs) @@ -27776,7 +27772,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e170_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROL.W Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e178_0)(uae_u32 opcode, struct regstruct *regs) @@ -27801,7 +27797,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e178_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ASL.L #,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e180_0)(uae_u32 opcode, struct regstruct *regs) @@ -27831,7 +27827,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e180_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* LSL.L #,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e188_0)(uae_u32 opcode, struct regstruct *regs) @@ -27858,7 +27854,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e188_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROXL.L #,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e190_0)(uae_u32 opcode, struct regstruct *regs) @@ -27884,7 +27880,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e190_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROL.L #,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e198_0)(uae_u32 opcode, struct regstruct *regs) @@ -27908,7 +27904,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e198_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ASL.L Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e1a0_0)(uae_u32 opcode, struct regstruct *regs) @@ -27938,7 +27934,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e1a0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* LSL.L Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e1a8_0)(uae_u32 opcode, struct regstruct *regs) @@ -27965,7 +27961,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e1a8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROXL.L Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e1b0_0)(uae_u32 opcode, struct regstruct *regs) @@ -27993,7 +27989,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e1b0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROL.L Dn,Dn */ unsigned long REGPARAM2 CPUFUNC(op_e1b8_0)(uae_u32 opcode, struct regstruct *regs) @@ -28018,7 +28014,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e1b8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ASLW.W (An) */ unsigned long REGPARAM2 CPUFUNC(op_e1d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -28039,7 +28035,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e1d0_0)(uae_u32 opcode, struct regstruct *reg SET_VFLG (®s->ccrflags, GET_VFLG (®s->ccrflags) | (sign2 != sign)); put_word (dataa,val); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ASLW.W (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_e1d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -28061,7 +28057,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e1d8_0)(uae_u32 opcode, struct regstruct *reg SET_VFLG (®s->ccrflags, GET_VFLG (®s->ccrflags) | (sign2 != sign)); put_word (dataa,val); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ASLW.W -(An) */ unsigned long REGPARAM2 CPUFUNC(op_e1e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -28084,7 +28080,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e1e0_0)(uae_u32 opcode, struct regstruct *reg SET_VFLG (®s->ccrflags, GET_VFLG (®s->ccrflags) | (sign2 != sign)); put_word (dataa,val); }}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* ASLW.W (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_e1e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -28105,7 +28101,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e1e8_0)(uae_u32 opcode, struct regstruct *reg SET_VFLG (®s->ccrflags, GET_VFLG (®s->ccrflags) | (sign2 != sign)); put_word (dataa,val); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ASLW.W (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_e1f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -28127,7 +28123,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e1f0_0)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_VFLG (®s->ccrflags, GET_VFLG (®s->ccrflags) | (sign2 != sign)); put_word (dataa,val); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* ASLW.W (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_e1f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -28147,7 +28143,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e1f8_0)(uae_u32 opcode, struct regstruct *reg SET_VFLG (®s->ccrflags, GET_VFLG (®s->ccrflags) | (sign2 != sign)); put_word (dataa,val); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ASLW.W (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_e1f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -28167,7 +28163,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e1f9_0)(uae_u32 opcode, struct regstruct *reg SET_VFLG (®s->ccrflags, GET_VFLG (®s->ccrflags) | (sign2 != sign)); put_word (dataa,val); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* LSRW.W (An) */ unsigned long REGPARAM2 CPUFUNC(op_e2d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -28185,7 +28181,7 @@ SET_CFLG (®s->ccrflags, carry); COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* LSRW.W (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_e2d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -28204,7 +28200,7 @@ SET_CFLG (®s->ccrflags, carry); COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* LSRW.W -(An) */ unsigned long REGPARAM2 CPUFUNC(op_e2e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -28224,7 +28220,7 @@ SET_CFLG (®s->ccrflags, carry); COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* LSRW.W (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_e2e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -28242,7 +28238,7 @@ SET_CFLG (®s->ccrflags, carry); COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* LSRW.W (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_e2f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -28261,7 +28257,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e2f0_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, carry); COPY_CARRY (®s->ccrflags); put_word (dataa,val); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* LSRW.W (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_e2f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -28278,7 +28274,7 @@ SET_CFLG (®s->ccrflags, carry); COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* LSRW.W (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_e2f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -28295,7 +28291,7 @@ SET_CFLG (®s->ccrflags, carry); COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* LSLW.W (An) */ unsigned long REGPARAM2 CPUFUNC(op_e3d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -28313,7 +28309,7 @@ SET_CFLG (®s->ccrflags, carry >> 15); COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* LSLW.W (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_e3d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -28332,7 +28328,7 @@ SET_CFLG (®s->ccrflags, carry >> 15); COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* LSLW.W -(An) */ unsigned long REGPARAM2 CPUFUNC(op_e3e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -28352,7 +28348,7 @@ SET_CFLG (®s->ccrflags, carry >> 15); COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* LSLW.W (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_e3e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -28370,7 +28366,7 @@ SET_CFLG (®s->ccrflags, carry >> 15); COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* LSLW.W (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_e3f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -28389,7 +28385,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e3f0_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, carry >> 15); COPY_CARRY (®s->ccrflags); put_word (dataa,val); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* LSLW.W (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_e3f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -28406,7 +28402,7 @@ SET_CFLG (®s->ccrflags, carry >> 15); COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* LSLW.W (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_e3f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -28423,7 +28419,7 @@ SET_CFLG (®s->ccrflags, carry >> 15); COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* ROXRW.W (An) */ unsigned long REGPARAM2 CPUFUNC(op_e4d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -28442,7 +28438,7 @@ SET_CFLG (®s->ccrflags, carry); COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ROXRW.W (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_e4d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -28462,7 +28458,7 @@ SET_CFLG (®s->ccrflags, carry); COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ROXRW.W -(An) */ unsigned long REGPARAM2 CPUFUNC(op_e4e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -28483,7 +28479,7 @@ SET_CFLG (®s->ccrflags, carry); COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* ROXRW.W (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_e4e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -28502,7 +28498,7 @@ SET_CFLG (®s->ccrflags, carry); COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ROXRW.W (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_e4f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -28522,7 +28518,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e4f0_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, carry); COPY_CARRY (®s->ccrflags); put_word (dataa,val); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* ROXRW.W (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_e4f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -28540,7 +28536,7 @@ SET_CFLG (®s->ccrflags, carry); COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ROXRW.W (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_e4f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -28558,7 +28554,7 @@ SET_CFLG (®s->ccrflags, carry); COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* ROXLW.W (An) */ unsigned long REGPARAM2 CPUFUNC(op_e5d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -28577,7 +28573,7 @@ SET_CFLG (®s->ccrflags, carry >> 15); COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ROXLW.W (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_e5d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -28597,7 +28593,7 @@ SET_CFLG (®s->ccrflags, carry >> 15); COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ROXLW.W -(An) */ unsigned long REGPARAM2 CPUFUNC(op_e5e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -28618,7 +28614,7 @@ SET_CFLG (®s->ccrflags, carry >> 15); COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* ROXLW.W (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_e5e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -28637,7 +28633,7 @@ SET_CFLG (®s->ccrflags, carry >> 15); COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ROXLW.W (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_e5f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -28657,7 +28653,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e5f0_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, carry >> 15); COPY_CARRY (®s->ccrflags); put_word (dataa,val); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* ROXLW.W (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_e5f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -28675,7 +28671,7 @@ SET_CFLG (®s->ccrflags, carry >> 15); COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ROXLW.W (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_e5f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -28693,7 +28689,7 @@ SET_CFLG (®s->ccrflags, carry >> 15); COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* RORW.W (An) */ unsigned long REGPARAM2 CPUFUNC(op_e6d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -28711,7 +28707,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e6d0_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, carry); put_word (dataa,val); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* RORW.W (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_e6d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -28730,7 +28726,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e6d8_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, carry); put_word (dataa,val); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* RORW.W -(An) */ unsigned long REGPARAM2 CPUFUNC(op_e6e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -28750,7 +28746,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e6e0_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, carry); put_word (dataa,val); }}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* RORW.W (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_e6e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -28768,7 +28764,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e6e8_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, carry); put_word (dataa,val); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* RORW.W (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_e6f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -28787,7 +28783,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e6f0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); SET_CFLG (®s->ccrflags, carry); put_word (dataa,val); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* RORW.W (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_e6f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -28804,7 +28800,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e6f8_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, carry); put_word (dataa,val); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* RORW.W (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_e6f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -28821,7 +28817,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e6f9_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, carry); put_word (dataa,val); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* ROLW.W (An) */ unsigned long REGPARAM2 CPUFUNC(op_e7d0_0)(uae_u32 opcode, struct regstruct *regs) @@ -28839,7 +28835,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e7d0_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, carry >> 15); put_word (dataa,val); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ROLW.W (An)+ */ unsigned long REGPARAM2 CPUFUNC(op_e7d8_0)(uae_u32 opcode, struct regstruct *regs) @@ -28858,7 +28854,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e7d8_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, carry >> 15); put_word (dataa,val); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ROLW.W -(An) */ unsigned long REGPARAM2 CPUFUNC(op_e7e0_0)(uae_u32 opcode, struct regstruct *regs) @@ -28878,7 +28874,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e7e0_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, carry >> 15); put_word (dataa,val); }}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* ROLW.W (d16,An) */ unsigned long REGPARAM2 CPUFUNC(op_e7e8_0)(uae_u32 opcode, struct regstruct *regs) @@ -28896,7 +28892,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e7e8_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, carry >> 15); put_word (dataa,val); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ROLW.W (d8,An,Xn) */ unsigned long REGPARAM2 CPUFUNC(op_e7f0_0)(uae_u32 opcode, struct regstruct *regs) @@ -28915,7 +28911,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e7f0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); SET_CFLG (®s->ccrflags, carry >> 15); put_word (dataa,val); -}}}}}return 18 * 256; +}}}}}return 18 * CYCLE_UNIT / 2; } /* ROLW.W (xxx).W */ unsigned long REGPARAM2 CPUFUNC(op_e7f8_0)(uae_u32 opcode, struct regstruct *regs) @@ -28932,7 +28928,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e7f8_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, carry >> 15); put_word (dataa,val); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ROLW.W (xxx).L */ unsigned long REGPARAM2 CPUFUNC(op_e7f9_0)(uae_u32 opcode, struct regstruct *regs) @@ -28949,7 +28945,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e7f9_0)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, carry >> 15); put_word (dataa,val); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* BFTST.L #.W,Dn */ #ifndef CPUEMU_68000_ONLY @@ -28964,7 +28960,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e8c0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (®s->ccrflags, tmp == 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); }}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* BFTST.L #.W,(An) */ @@ -28984,7 +28980,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e8d0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (®s->ccrflags, tmp == 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); }}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* BFTST.L #.W,(d16,An) */ @@ -29004,7 +29000,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e8e8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (®s->ccrflags, tmp == 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); }}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* BFTST.L #.W,(d8,An,Xn) */ @@ -29025,7 +29021,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e8f0_0)(uae_u32 opcode, struct regstruct *reg tmp >>= (32 - width); SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (®s->ccrflags, tmp == 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } #endif /* BFTST.L #.W,(xxx).W */ @@ -29044,7 +29040,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e8f8_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (®s->ccrflags, tmp == 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); }}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* BFTST.L #.W,(xxx).L */ @@ -29063,7 +29059,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e8f9_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (®s->ccrflags, tmp == 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); }}}} m68k_incpc (regs, 8); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } #endif /* BFTST.L #.W,(d16,PC) */ @@ -29084,7 +29080,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e8fa_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (®s->ccrflags, tmp == 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); }}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* BFTST.L #.W,(d8,PC,Xn) */ @@ -29107,7 +29103,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e8fb_0)(uae_u32 opcode, struct regstruct *reg tmp >>= (32 - width); SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (®s->ccrflags, tmp == 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } #endif /* BFEXTU.L #.W,Dn */ @@ -29124,7 +29120,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e9c0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, tmp == 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); m68k_dreg(regs, (extra >> 12) & 7) = tmp; }}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* BFEXTU.L #.W,(An) */ @@ -29145,7 +29141,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e9d0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, tmp == 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); m68k_dreg(regs, (extra >> 12) & 7) = tmp; }}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* BFEXTU.L #.W,(d16,An) */ @@ -29166,7 +29162,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e9e8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, tmp == 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); m68k_dreg(regs, (extra >> 12) & 7) = tmp; }}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* BFEXTU.L #.W,(d8,An,Xn) */ @@ -29188,7 +29184,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e9f0_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (®s->ccrflags, tmp == 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); m68k_dreg(regs, (extra >> 12) & 7) = tmp; -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } #endif /* BFEXTU.L #.W,(xxx).W */ @@ -29208,7 +29204,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e9f8_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, tmp == 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); m68k_dreg(regs, (extra >> 12) & 7) = tmp; }}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* BFEXTU.L #.W,(xxx).L */ @@ -29228,7 +29224,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e9f9_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, tmp == 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); m68k_dreg(regs, (extra >> 12) & 7) = tmp; }}}} m68k_incpc (regs, 8); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } #endif /* BFEXTU.L #.W,(d16,PC) */ @@ -29250,7 +29246,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e9fa_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, tmp == 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); m68k_dreg(regs, (extra >> 12) & 7) = tmp; }}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* BFEXTU.L #.W,(d8,PC,Xn) */ @@ -29274,7 +29270,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e9fb_0)(uae_u32 opcode, struct regstruct *reg SET_NFLG_ALWAYS (®s->ccrflags, tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (®s->ccrflags, tmp == 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); m68k_dreg(regs, (extra >> 12) & 7) = tmp; -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } #endif /* BFCHG.L #.W,Dn */ @@ -29297,7 +29293,7 @@ unsigned long REGPARAM2 CPUFUNC(op_eac0_0)(uae_u32 opcode, struct regstruct *reg (((offset & 0x1f) + width) >= 32 ? 0 : (m68k_dreg(regs, dstreg) & ((uae_u32)0xffffffff >> ((offset & 0x1f) + width)))); }}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* BFCHG.L #.W,(An) */ @@ -29329,7 +29325,7 @@ unsigned long REGPARAM2 CPUFUNC(op_ead0_0)(uae_u32 opcode, struct regstruct *reg put_byte(dsta+4,bf1); } }}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* BFCHG.L #.W,(d16,An) */ @@ -29361,7 +29357,7 @@ unsigned long REGPARAM2 CPUFUNC(op_eae8_0)(uae_u32 opcode, struct regstruct *reg put_byte(dsta+4,bf1); } }}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* BFCHG.L #.W,(d8,An,Xn) */ @@ -29394,7 +29390,7 @@ unsigned long REGPARAM2 CPUFUNC(op_eaf0_0)(uae_u32 opcode, struct regstruct *reg (tmp << (8 - (offset & 7))); put_byte(dsta+4,bf1); } -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } #endif /* BFCHG.L #.W,(xxx).W */ @@ -29425,7 +29421,7 @@ unsigned long REGPARAM2 CPUFUNC(op_eaf8_0)(uae_u32 opcode, struct regstruct *reg put_byte(dsta+4,bf1); } }}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* BFCHG.L #.W,(xxx).L */ @@ -29456,7 +29452,7 @@ unsigned long REGPARAM2 CPUFUNC(op_eaf9_0)(uae_u32 opcode, struct regstruct *reg put_byte(dsta+4,bf1); } }}}} m68k_incpc (regs, 8); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } #endif /* BFEXTS.L #.W,Dn */ @@ -29474,7 +29470,7 @@ unsigned long REGPARAM2 CPUFUNC(op_ebc0_0)(uae_u32 opcode, struct regstruct *reg if (GET_NFLG (®s->ccrflags)) tmp |= width == 32 ? 0 : (-1 << width); m68k_dreg(regs, (extra >> 12) & 7) = tmp; }}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* BFEXTS.L #.W,(An) */ @@ -29496,7 +29492,7 @@ unsigned long REGPARAM2 CPUFUNC(op_ebd0_0)(uae_u32 opcode, struct regstruct *reg if (GET_NFLG (®s->ccrflags)) tmp |= width == 32 ? 0 : (-1 << width); m68k_dreg(regs, (extra >> 12) & 7) = tmp; }}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* BFEXTS.L #.W,(d16,An) */ @@ -29518,7 +29514,7 @@ unsigned long REGPARAM2 CPUFUNC(op_ebe8_0)(uae_u32 opcode, struct regstruct *reg if (GET_NFLG (®s->ccrflags)) tmp |= width == 32 ? 0 : (-1 << width); m68k_dreg(regs, (extra >> 12) & 7) = tmp; }}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* BFEXTS.L #.W,(d8,An,Xn) */ @@ -29541,7 +29537,7 @@ unsigned long REGPARAM2 CPUFUNC(op_ebf0_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, tmp == 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); if (GET_NFLG (®s->ccrflags)) tmp |= width == 32 ? 0 : (-1 << width); m68k_dreg(regs, (extra >> 12) & 7) = tmp; -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } #endif /* BFEXTS.L #.W,(xxx).W */ @@ -29562,7 +29558,7 @@ unsigned long REGPARAM2 CPUFUNC(op_ebf8_0)(uae_u32 opcode, struct regstruct *reg if (GET_NFLG (®s->ccrflags)) tmp |= width == 32 ? 0 : (-1 << width); m68k_dreg(regs, (extra >> 12) & 7) = tmp; }}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* BFEXTS.L #.W,(xxx).L */ @@ -29583,7 +29579,7 @@ unsigned long REGPARAM2 CPUFUNC(op_ebf9_0)(uae_u32 opcode, struct regstruct *reg if (GET_NFLG (®s->ccrflags)) tmp |= width == 32 ? 0 : (-1 << width); m68k_dreg(regs, (extra >> 12) & 7) = tmp; }}}} m68k_incpc (regs, 8); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } #endif /* BFEXTS.L #.W,(d16,PC) */ @@ -29606,7 +29602,7 @@ unsigned long REGPARAM2 CPUFUNC(op_ebfa_0)(uae_u32 opcode, struct regstruct *reg if (GET_NFLG (®s->ccrflags)) tmp |= width == 32 ? 0 : (-1 << width); m68k_dreg(regs, (extra >> 12) & 7) = tmp; }}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* BFEXTS.L #.W,(d8,PC,Xn) */ @@ -29631,7 +29627,7 @@ unsigned long REGPARAM2 CPUFUNC(op_ebfb_0)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, tmp == 0); SET_VFLG (®s->ccrflags, 0); SET_CFLG (®s->ccrflags, 0); if (GET_NFLG (®s->ccrflags)) tmp |= width == 32 ? 0 : (-1 << width); m68k_dreg(regs, (extra >> 12) & 7) = tmp; -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } #endif /* BFCLR.L #.W,Dn */ @@ -29654,7 +29650,7 @@ unsigned long REGPARAM2 CPUFUNC(op_ecc0_0)(uae_u32 opcode, struct regstruct *reg (((offset & 0x1f) + width) >= 32 ? 0 : (m68k_dreg(regs, dstreg) & ((uae_u32)0xffffffff >> ((offset & 0x1f) + width)))); }}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* BFCLR.L #.W,(An) */ @@ -29686,7 +29682,7 @@ unsigned long REGPARAM2 CPUFUNC(op_ecd0_0)(uae_u32 opcode, struct regstruct *reg put_byte(dsta+4,bf1); } }}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* BFCLR.L #.W,(d16,An) */ @@ -29718,7 +29714,7 @@ unsigned long REGPARAM2 CPUFUNC(op_ece8_0)(uae_u32 opcode, struct regstruct *reg put_byte(dsta+4,bf1); } }}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* BFCLR.L #.W,(d8,An,Xn) */ @@ -29751,7 +29747,7 @@ unsigned long REGPARAM2 CPUFUNC(op_ecf0_0)(uae_u32 opcode, struct regstruct *reg (tmp << (8 - (offset & 7))); put_byte(dsta+4,bf1); } -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } #endif /* BFCLR.L #.W,(xxx).W */ @@ -29782,7 +29778,7 @@ unsigned long REGPARAM2 CPUFUNC(op_ecf8_0)(uae_u32 opcode, struct regstruct *reg put_byte(dsta+4,bf1); } }}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* BFCLR.L #.W,(xxx).L */ @@ -29813,7 +29809,7 @@ unsigned long REGPARAM2 CPUFUNC(op_ecf9_0)(uae_u32 opcode, struct regstruct *reg put_byte(dsta+4,bf1); } }}}} m68k_incpc (regs, 8); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } #endif /* BFFFO.L #.W,Dn */ @@ -29832,7 +29828,7 @@ unsigned long REGPARAM2 CPUFUNC(op_edc0_0)(uae_u32 opcode, struct regstruct *reg while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }} m68k_dreg(regs, (extra >> 12) & 7) = offset; }}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* BFFFO.L #.W,(An) */ @@ -29855,7 +29851,7 @@ unsigned long REGPARAM2 CPUFUNC(op_edd0_0)(uae_u32 opcode, struct regstruct *reg while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }} m68k_dreg(regs, (extra >> 12) & 7) = offset; }}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* BFFFO.L #.W,(d16,An) */ @@ -29878,7 +29874,7 @@ unsigned long REGPARAM2 CPUFUNC(op_ede8_0)(uae_u32 opcode, struct regstruct *reg while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }} m68k_dreg(regs, (extra >> 12) & 7) = offset; }}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* BFFFO.L #.W,(d8,An,Xn) */ @@ -29902,7 +29898,7 @@ unsigned long REGPARAM2 CPUFUNC(op_edf0_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 mask = 1 << (width-1); while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }} m68k_dreg(regs, (extra >> 12) & 7) = offset; -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } #endif /* BFFFO.L #.W,(xxx).W */ @@ -29924,7 +29920,7 @@ unsigned long REGPARAM2 CPUFUNC(op_edf8_0)(uae_u32 opcode, struct regstruct *reg while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }} m68k_dreg(regs, (extra >> 12) & 7) = offset; }}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* BFFFO.L #.W,(xxx).L */ @@ -29946,7 +29942,7 @@ unsigned long REGPARAM2 CPUFUNC(op_edf9_0)(uae_u32 opcode, struct regstruct *reg while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }} m68k_dreg(regs, (extra >> 12) & 7) = offset; }}}} m68k_incpc (regs, 8); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } #endif /* BFFFO.L #.W,(d16,PC) */ @@ -29970,7 +29966,7 @@ unsigned long REGPARAM2 CPUFUNC(op_edfa_0)(uae_u32 opcode, struct regstruct *reg while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }} m68k_dreg(regs, (extra >> 12) & 7) = offset; }}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* BFFFO.L #.W,(d8,PC,Xn) */ @@ -29996,7 +29992,7 @@ unsigned long REGPARAM2 CPUFUNC(op_edfb_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 mask = 1 << (width-1); while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }} m68k_dreg(regs, (extra >> 12) & 7) = offset; -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } #endif /* BFSET.L #.W,Dn */ @@ -30019,7 +30015,7 @@ unsigned long REGPARAM2 CPUFUNC(op_eec0_0)(uae_u32 opcode, struct regstruct *reg (((offset & 0x1f) + width) >= 32 ? 0 : (m68k_dreg(regs, dstreg) & ((uae_u32)0xffffffff >> ((offset & 0x1f) + width)))); }}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* BFSET.L #.W,(An) */ @@ -30051,7 +30047,7 @@ unsigned long REGPARAM2 CPUFUNC(op_eed0_0)(uae_u32 opcode, struct regstruct *reg put_byte(dsta+4,bf1); } }}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* BFSET.L #.W,(d16,An) */ @@ -30083,7 +30079,7 @@ unsigned long REGPARAM2 CPUFUNC(op_eee8_0)(uae_u32 opcode, struct regstruct *reg put_byte(dsta+4,bf1); } }}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* BFSET.L #.W,(d8,An,Xn) */ @@ -30116,7 +30112,7 @@ unsigned long REGPARAM2 CPUFUNC(op_eef0_0)(uae_u32 opcode, struct regstruct *reg (tmp << (8 - (offset & 7))); put_byte(dsta+4,bf1); } -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } #endif /* BFSET.L #.W,(xxx).W */ @@ -30147,7 +30143,7 @@ unsigned long REGPARAM2 CPUFUNC(op_eef8_0)(uae_u32 opcode, struct regstruct *reg put_byte(dsta+4,bf1); } }}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* BFSET.L #.W,(xxx).L */ @@ -30178,7 +30174,7 @@ unsigned long REGPARAM2 CPUFUNC(op_eef9_0)(uae_u32 opcode, struct regstruct *reg put_byte(dsta+4,bf1); } }}}} m68k_incpc (regs, 8); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } #endif /* BFINS.L #.W,Dn */ @@ -30203,7 +30199,7 @@ unsigned long REGPARAM2 CPUFUNC(op_efc0_0)(uae_u32 opcode, struct regstruct *reg (((offset & 0x1f) + width) >= 32 ? 0 : (m68k_dreg(regs, dstreg) & ((uae_u32)0xffffffff >> ((offset & 0x1f) + width)))); }}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* BFINS.L #.W,(An) */ @@ -30237,7 +30233,7 @@ unsigned long REGPARAM2 CPUFUNC(op_efd0_0)(uae_u32 opcode, struct regstruct *reg put_byte(dsta+4,bf1); } }}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } #endif /* BFINS.L #.W,(d16,An) */ @@ -30271,7 +30267,7 @@ unsigned long REGPARAM2 CPUFUNC(op_efe8_0)(uae_u32 opcode, struct regstruct *reg put_byte(dsta+4,bf1); } }}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* BFINS.L #.W,(d8,An,Xn) */ @@ -30306,7 +30302,7 @@ unsigned long REGPARAM2 CPUFUNC(op_eff0_0)(uae_u32 opcode, struct regstruct *reg (tmp << (8 - (offset & 7))); put_byte(dsta+4,bf1); } -}}}}}return 14 * 256; +}}}}}return 14 * CYCLE_UNIT / 2; } #endif /* BFINS.L #.W,(xxx).W */ @@ -30339,7 +30335,7 @@ unsigned long REGPARAM2 CPUFUNC(op_eff8_0)(uae_u32 opcode, struct regstruct *reg put_byte(dsta+4,bf1); } }}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* BFINS.L #.W,(xxx).L */ @@ -30372,7 +30368,143 @@ unsigned long REGPARAM2 CPUFUNC(op_eff9_0)(uae_u32 opcode, struct regstruct *reg put_byte(dsta+4,bf1); } }}}} m68k_incpc (regs, 8); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; +} +#endif +/* MMUOP30A.L Dn,#.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f000_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{ uaecptr pc = m68k_getpc (regs); + uae_u16 extraa = 0; + m68k_incpc (regs, 2); + mmu_op30(pc, opcode, regs, 1, extraa); +}return 4 * CYCLE_UNIT / 2; +} +#endif +/* MMUOP30A.L An,#.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f008_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{ uaecptr pc = m68k_getpc (regs); + uae_u16 extraa = 0; + m68k_incpc (regs, 2); + mmu_op30(pc, opcode, regs, 1, extraa); +}return 4 * CYCLE_UNIT / 2; +} +#endif +/* MMUOP30A.L (An),#.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f010_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{ uaecptr pc = m68k_getpc (regs); +{ uaecptr extraa = m68k_areg(regs, srcreg); + m68k_incpc (regs, 2); + mmu_op30(pc, opcode, regs, 1, extraa); +}}return 4 * CYCLE_UNIT / 2; +} +#endif +/* MMUOP30A.L (An)+,#.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f018_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{ uaecptr pc = m68k_getpc (regs); +{ uaecptr extraa = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 4; + m68k_incpc (regs, 2); + mmu_op30(pc, opcode, regs, 1, extraa); +}}return 4 * CYCLE_UNIT / 2; +} +#endif +/* MMUOP30A.L -(An),#.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f020_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{ uaecptr pc = m68k_getpc (regs); +{ uaecptr extraa; + extraa = m68k_areg(regs, srcreg) - 4; + m68k_areg (regs, srcreg) = extraa; + m68k_incpc (regs, 2); + mmu_op30(pc, opcode, regs, 1, extraa); +}}return 6 * CYCLE_UNIT / 2; +} +#endif +/* MMUOP30A.L (d16,An),#.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f028_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{ uaecptr pc = m68k_getpc (regs); +{ uaecptr extraa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); + m68k_incpc (regs, 4); + mmu_op30(pc, opcode, regs, 1, extraa); +}}return 8 * CYCLE_UNIT / 2; +} +#endif +/* MMUOP30A.L (d8,An,Xn),#.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f030_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{ uaecptr pc = m68k_getpc (regs); +{ uaecptr extraa; + m68k_incpc (regs, 2); +{ extraa = get_disp_ea_020(regs, m68k_areg(regs, srcreg), next_iword(regs)); + mmu_op30(pc, opcode, regs, 1, extraa); +}}}return 10 * CYCLE_UNIT / 2; +} +#endif +/* MMUOP30A.L (xxx).W,#.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f038_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ uaecptr pc = m68k_getpc (regs); +{ uaecptr extraa = (uae_s32)(uae_s16)get_iword (regs, 2); + m68k_incpc (regs, 4); + mmu_op30(pc, opcode, regs, 1, extraa); +}}return 8 * CYCLE_UNIT / 2; +} +#endif +/* MMUOP30A.L (xxx).L,#.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f039_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ uaecptr pc = m68k_getpc (regs); +{ uaecptr extraa = get_ilong (regs, 2); + m68k_incpc (regs, 6); + mmu_op30(pc, opcode, regs, 1, extraa); +}}return 12 * CYCLE_UNIT / 2; +} +#endif +/* MMUOP30A.L (d16,PC),#.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f03a_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ uaecptr pc = m68k_getpc (regs); +{ uaecptr extraa = m68k_getpc (regs) + 2; + extraa += (uae_s32)(uae_s16)get_iword (regs, 2); + m68k_incpc (regs, 4); + mmu_op30(pc, opcode, regs, 1, extraa); +}}return 8 * CYCLE_UNIT / 2; +} +#endif +/* MMUOP30A.L (d8,PC,Xn),#.W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f03b_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ uaecptr pc = m68k_getpc (regs); +{ uaecptr tmppc; + uaecptr extraa; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc(regs); + extraa = get_disp_ea_020(regs, tmppc, next_iword(regs)); + mmu_op30(pc, opcode, regs, 1, extraa); +}}}return 10 * CYCLE_UNIT / 2; } #endif /* FPP.L #.W,Dn */ @@ -30384,10 +30516,10 @@ unsigned long REGPARAM2 CPUFUNC(op_f200_0)(uae_u32 opcode, struct regstruct *reg #ifdef FPUEMU { uae_s16 extra = get_iword (regs, 2); m68k_incpc (regs, 4); - fpp_opp(opcode, regs, extra); + fpuop_arithmetic(opcode, regs, extra); } #endif -}return 8 * 256; +}return 8 * CYCLE_UNIT / 2; } #endif /* FPP.L #.W,An */ @@ -30399,10 +30531,10 @@ unsigned long REGPARAM2 CPUFUNC(op_f208_0)(uae_u32 opcode, struct regstruct *reg #ifdef FPUEMU { uae_s16 extra = get_iword (regs, 2); m68k_incpc (regs, 4); - fpp_opp(opcode, regs, extra); + fpuop_arithmetic(opcode, regs, extra); } #endif -}return 8 * 256; +}return 8 * CYCLE_UNIT / 2; } #endif /* FPP.L #.W,(An) */ @@ -30414,10 +30546,10 @@ unsigned long REGPARAM2 CPUFUNC(op_f210_0)(uae_u32 opcode, struct regstruct *reg #ifdef FPUEMU { uae_s16 extra = get_iword (regs, 2); m68k_incpc (regs, 4); - fpp_opp(opcode, regs, extra); + fpuop_arithmetic(opcode, regs, extra); } #endif -}return 8 * 256; +}return 8 * CYCLE_UNIT / 2; } #endif /* FPP.L #.W,(An)+ */ @@ -30429,10 +30561,10 @@ unsigned long REGPARAM2 CPUFUNC(op_f218_0)(uae_u32 opcode, struct regstruct *reg #ifdef FPUEMU { uae_s16 extra = get_iword (regs, 2); m68k_incpc (regs, 4); - fpp_opp(opcode, regs, extra); + fpuop_arithmetic(opcode, regs, extra); } #endif -}return 8 * 256; +}return 8 * CYCLE_UNIT / 2; } #endif /* FPP.L #.W,-(An) */ @@ -30444,10 +30576,10 @@ unsigned long REGPARAM2 CPUFUNC(op_f220_0)(uae_u32 opcode, struct regstruct *reg #ifdef FPUEMU { uae_s16 extra = get_iword (regs, 2); m68k_incpc (regs, 4); - fpp_opp(opcode, regs, extra); + fpuop_arithmetic(opcode, regs, extra); } #endif -}return 8 * 256; +}return 8 * CYCLE_UNIT / 2; } #endif /* FPP.L #.W,(d16,An) */ @@ -30459,10 +30591,10 @@ unsigned long REGPARAM2 CPUFUNC(op_f228_0)(uae_u32 opcode, struct regstruct *reg #ifdef FPUEMU { uae_s16 extra = get_iword (regs, 2); m68k_incpc (regs, 4); - fpp_opp(opcode, regs, extra); + fpuop_arithmetic(opcode, regs, extra); } #endif -}return 8 * 256; +}return 8 * CYCLE_UNIT / 2; } #endif /* FPP.L #.W,(d8,An,Xn) */ @@ -30474,10 +30606,10 @@ unsigned long REGPARAM2 CPUFUNC(op_f230_0)(uae_u32 opcode, struct regstruct *reg #ifdef FPUEMU { uae_s16 extra = get_iword (regs, 2); m68k_incpc (regs, 4); - fpp_opp(opcode, regs, extra); + fpuop_arithmetic(opcode, regs, extra); } #endif -}return 8 * 256; +}return 8 * CYCLE_UNIT / 2; } #endif /* FPP.L #.W,(xxx).W */ @@ -30488,10 +30620,10 @@ unsigned long REGPARAM2 CPUFUNC(op_f238_0)(uae_u32 opcode, struct regstruct *reg #ifdef FPUEMU { uae_s16 extra = get_iword (regs, 2); m68k_incpc (regs, 4); - fpp_opp(opcode, regs, extra); + fpuop_arithmetic(opcode, regs, extra); } #endif -}return 8 * 256; +}return 8 * CYCLE_UNIT / 2; } #endif /* FPP.L #.W,(xxx).L */ @@ -30502,10 +30634,10 @@ unsigned long REGPARAM2 CPUFUNC(op_f239_0)(uae_u32 opcode, struct regstruct *reg #ifdef FPUEMU { uae_s16 extra = get_iword (regs, 2); m68k_incpc (regs, 4); - fpp_opp(opcode, regs, extra); + fpuop_arithmetic(opcode, regs, extra); } #endif -}return 8 * 256; +}return 8 * CYCLE_UNIT / 2; } #endif /* FPP.L #.W,(d16,PC) */ @@ -30517,10 +30649,10 @@ unsigned long REGPARAM2 CPUFUNC(op_f23a_0)(uae_u32 opcode, struct regstruct *reg #ifdef FPUEMU { uae_s16 extra = get_iword (regs, 2); m68k_incpc (regs, 4); - fpp_opp(opcode, regs, extra); + fpuop_arithmetic(opcode, regs, extra); } #endif -}return 8 * 256; +}return 8 * CYCLE_UNIT / 2; } #endif /* FPP.L #.W,(d8,PC,Xn) */ @@ -30532,10 +30664,10 @@ unsigned long REGPARAM2 CPUFUNC(op_f23b_0)(uae_u32 opcode, struct regstruct *reg #ifdef FPUEMU { uae_s16 extra = get_iword (regs, 2); m68k_incpc (regs, 4); - fpp_opp(opcode, regs, extra); + fpuop_arithmetic(opcode, regs, extra); } #endif -}return 8 * 256; +}return 8 * CYCLE_UNIT / 2; } #endif /* FPP.L #.W,#.L */ @@ -30546,10 +30678,10 @@ unsigned long REGPARAM2 CPUFUNC(op_f23c_0)(uae_u32 opcode, struct regstruct *reg #ifdef FPUEMU { uae_s16 extra = get_iword (regs, 2); m68k_incpc (regs, 4); - fpp_opp(opcode, regs, extra); + fpuop_arithmetic(opcode, regs, extra); } #endif -}return 8 * 256; +}return 8 * CYCLE_UNIT / 2; } #endif /* FScc.L #.W,Dn */ @@ -30561,10 +30693,10 @@ unsigned long REGPARAM2 CPUFUNC(op_f240_0)(uae_u32 opcode, struct regstruct *reg #ifdef FPUEMU { uae_s16 extra = get_iword (regs, 2); m68k_incpc (regs, 4); - fscc_opp(opcode, regs, extra); + fpuop_scc(opcode, regs, extra); } #endif -}return 8 * 256; +}return 8 * CYCLE_UNIT / 2; } #endif /* FDBcc.L #.W,Dn */ @@ -30576,10 +30708,10 @@ unsigned long REGPARAM2 CPUFUNC(op_f248_0)(uae_u32 opcode, struct regstruct *reg #ifdef FPUEMU { uae_s16 extra = get_iword (regs, 2); m68k_incpc (regs, 4); - fdbcc_opp(opcode, regs, extra); + fpuop_dbcc(opcode, regs, extra); } #endif -}return 8 * 256; +}return 8 * CYCLE_UNIT / 2; } #endif /* FScc.L #.W,(An) */ @@ -30591,10 +30723,10 @@ unsigned long REGPARAM2 CPUFUNC(op_f250_0)(uae_u32 opcode, struct regstruct *reg #ifdef FPUEMU { uae_s16 extra = get_iword (regs, 2); m68k_incpc (regs, 4); - fscc_opp(opcode, regs, extra); + fpuop_scc(opcode, regs, extra); } #endif -}return 8 * 256; +}return 8 * CYCLE_UNIT / 2; } #endif /* FScc.L #.W,(An)+ */ @@ -30606,10 +30738,10 @@ unsigned long REGPARAM2 CPUFUNC(op_f258_0)(uae_u32 opcode, struct regstruct *reg #ifdef FPUEMU { uae_s16 extra = get_iword (regs, 2); m68k_incpc (regs, 4); - fscc_opp(opcode, regs, extra); + fpuop_scc(opcode, regs, extra); } #endif -}return 8 * 256; +}return 8 * CYCLE_UNIT / 2; } #endif /* FScc.L #.W,-(An) */ @@ -30621,10 +30753,10 @@ unsigned long REGPARAM2 CPUFUNC(op_f260_0)(uae_u32 opcode, struct regstruct *reg #ifdef FPUEMU { uae_s16 extra = get_iword (regs, 2); m68k_incpc (regs, 4); - fscc_opp(opcode, regs, extra); + fpuop_scc(opcode, regs, extra); } #endif -}return 8 * 256; +}return 8 * CYCLE_UNIT / 2; } #endif /* FScc.L #.W,(d16,An) */ @@ -30636,10 +30768,10 @@ unsigned long REGPARAM2 CPUFUNC(op_f268_0)(uae_u32 opcode, struct regstruct *reg #ifdef FPUEMU { uae_s16 extra = get_iword (regs, 2); m68k_incpc (regs, 4); - fscc_opp(opcode, regs, extra); + fpuop_scc(opcode, regs, extra); } #endif -}return 8 * 256; +}return 8 * CYCLE_UNIT / 2; } #endif /* FScc.L #.W,(d8,An,Xn) */ @@ -30651,10 +30783,10 @@ unsigned long REGPARAM2 CPUFUNC(op_f270_0)(uae_u32 opcode, struct regstruct *reg #ifdef FPUEMU { uae_s16 extra = get_iword (regs, 2); m68k_incpc (regs, 4); - fscc_opp(opcode, regs, extra); + fpuop_scc(opcode, regs, extra); } #endif -}return 8 * 256; +}return 8 * CYCLE_UNIT / 2; } #endif /* FScc.L #.W,(xxx).W */ @@ -30665,10 +30797,10 @@ unsigned long REGPARAM2 CPUFUNC(op_f278_0)(uae_u32 opcode, struct regstruct *reg #ifdef FPUEMU { uae_s16 extra = get_iword (regs, 2); m68k_incpc (regs, 4); - fscc_opp(opcode, regs, extra); + fpuop_scc(opcode, regs, extra); } #endif -}return 8 * 256; +}return 8 * CYCLE_UNIT / 2; } #endif /* FScc.L #.W,(xxx).L */ @@ -30679,10 +30811,10 @@ unsigned long REGPARAM2 CPUFUNC(op_f279_0)(uae_u32 opcode, struct regstruct *reg #ifdef FPUEMU { uae_s16 extra = get_iword (regs, 2); m68k_incpc (regs, 4); - fscc_opp(opcode, regs, extra); + fpuop_scc(opcode, regs, extra); } #endif -}return 8 * 256; +}return 8 * CYCLE_UNIT / 2; } #endif /* FTRAPcc.L #.W */ @@ -30695,10 +30827,10 @@ unsigned long REGPARAM2 CPUFUNC(op_f27a_0)(uae_u32 opcode, struct regstruct *reg { uaecptr oldpc = m68k_getpc(regs); { uae_s16 dummy = get_iword (regs, 0); m68k_incpc (regs, 2); - ftrapcc_opp(opcode, regs, oldpc); + fpuop_trapcc(opcode, regs, oldpc); }} #endif -}return 8 * 256; +}return 8 * CYCLE_UNIT / 2; } #endif /* FTRAPcc.L #.L */ @@ -30711,10 +30843,10 @@ unsigned long REGPARAM2 CPUFUNC(op_f27b_0)(uae_u32 opcode, struct regstruct *reg { uaecptr oldpc = m68k_getpc(regs); { uae_s32 dummy = get_ilong (regs, 0); m68k_incpc (regs, 4); - ftrapcc_opp(opcode, regs, oldpc); + fpuop_trapcc(opcode, regs, oldpc); }} #endif -}return 12 * 256; +}return 12 * CYCLE_UNIT / 2; } #endif /* FTRAPcc.L */ @@ -30725,10 +30857,10 @@ unsigned long REGPARAM2 CPUFUNC(op_f27c_0)(uae_u32 opcode, struct regstruct *reg #ifdef FPUEMU m68k_incpc (regs, 2); { uaecptr oldpc = m68k_getpc(regs); - ftrapcc_opp(opcode, regs, oldpc); + fpuop_trapcc(opcode, regs, oldpc); } #endif -}return 4 * 256; +}return 4 * CYCLE_UNIT / 2; } #endif /* FBcc.L #,#.W */ @@ -30742,10 +30874,10 @@ unsigned long REGPARAM2 CPUFUNC(op_f280_0)(uae_u32 opcode, struct regstruct *reg { uaecptr pc = m68k_getpc(regs); { uae_s16 extra = get_iword (regs, 0); m68k_incpc (regs, 2); - fbcc_opp(opcode,regs, pc,extra); + fpuop_bcc(opcode,regs, pc,extra); }} #endif -}return 8 * 256; +}return 8 * CYCLE_UNIT / 2; } #endif /* FBcc.L #,#.L */ @@ -30759,10 +30891,10 @@ unsigned long REGPARAM2 CPUFUNC(op_f2c0_0)(uae_u32 opcode, struct regstruct *reg { uaecptr pc = m68k_getpc(regs); { uae_s32 extra = get_ilong (regs, 0); m68k_incpc (regs, 4); - fbcc_opp(opcode,regs, pc,extra); + fpuop_bcc(opcode,regs, pc,extra); }} #endif -}return 12 * 256; +}return 12 * CYCLE_UNIT / 2; } #endif /* FSAVE.L (An) */ @@ -30770,15 +30902,15 @@ unsigned long REGPARAM2 CPUFUNC(op_f2c0_0)(uae_u32 opcode, struct regstruct *reg unsigned long REGPARAM2 CPUFUNC(op_f310_0)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1827; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1838; } { #ifdef FPUEMU m68k_incpc (regs, 2); - fsave_opp(opcode, regs); + fpuop_save(opcode, regs); #endif -}}endlabel1827: ; -return 4 * 256; +}}endlabel1838: ; +return 4 * CYCLE_UNIT / 2; } #endif /* FSAVE.L -(An) */ @@ -30786,15 +30918,15 @@ return 4 * 256; unsigned long REGPARAM2 CPUFUNC(op_f320_0)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1828; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1839; } { #ifdef FPUEMU m68k_incpc (regs, 2); - fsave_opp(opcode, regs); + fpuop_save(opcode, regs); #endif -}}endlabel1828: ; -return 4 * 256; +}}endlabel1839: ; +return 4 * CYCLE_UNIT / 2; } #endif /* FSAVE.L (d16,An) */ @@ -30802,15 +30934,15 @@ return 4 * 256; unsigned long REGPARAM2 CPUFUNC(op_f328_0)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1829; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1840; } { #ifdef FPUEMU m68k_incpc (regs, 2); - fsave_opp(opcode, regs); + fpuop_save(opcode, regs); #endif -}}endlabel1829: ; -return 4 * 256; +}}endlabel1840: ; +return 4 * CYCLE_UNIT / 2; } #endif /* FSAVE.L (d8,An,Xn) */ @@ -30818,45 +30950,45 @@ return 4 * 256; unsigned long REGPARAM2 CPUFUNC(op_f330_0)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1830; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1841; } { #ifdef FPUEMU m68k_incpc (regs, 2); - fsave_opp(opcode, regs); + fpuop_save(opcode, regs); #endif -}}endlabel1830: ; -return 4 * 256; +}}endlabel1841: ; +return 4 * CYCLE_UNIT / 2; } #endif /* FSAVE.L (xxx).W */ #ifndef CPUEMU_68000_ONLY unsigned long REGPARAM2 CPUFUNC(op_f338_0)(uae_u32 opcode, struct regstruct *regs) { -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1831; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1842; } { #ifdef FPUEMU m68k_incpc (regs, 2); - fsave_opp(opcode, regs); + fpuop_save(opcode, regs); #endif -}}endlabel1831: ; -return 4 * 256; +}}endlabel1842: ; +return 4 * CYCLE_UNIT / 2; } #endif /* FSAVE.L (xxx).L */ #ifndef CPUEMU_68000_ONLY unsigned long REGPARAM2 CPUFUNC(op_f339_0)(uae_u32 opcode, struct regstruct *regs) { -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1832; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1843; } { #ifdef FPUEMU m68k_incpc (regs, 2); - fsave_opp(opcode, regs); + fpuop_save(opcode, regs); #endif -}}endlabel1832: ; -return 4 * 256; +}}endlabel1843: ; +return 4 * CYCLE_UNIT / 2; } #endif /* FRESTORE.L (An) */ @@ -30864,15 +30996,15 @@ return 4 * 256; unsigned long REGPARAM2 CPUFUNC(op_f350_0)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1833; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1844; } { #ifdef FPUEMU m68k_incpc (regs, 2); - frestore_opp(opcode, regs); + fpuop_restore(opcode, regs); #endif -}}endlabel1833: ; -return 4 * 256; +}}endlabel1844: ; +return 4 * CYCLE_UNIT / 2; } #endif /* FRESTORE.L (An)+ */ @@ -30880,15 +31012,15 @@ return 4 * 256; unsigned long REGPARAM2 CPUFUNC(op_f358_0)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1834; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1845; } { #ifdef FPUEMU m68k_incpc (regs, 2); - frestore_opp(opcode, regs); + fpuop_restore(opcode, regs); #endif -}}endlabel1834: ; -return 4 * 256; +}}endlabel1845: ; +return 4 * CYCLE_UNIT / 2; } #endif /* FRESTORE.L (d16,An) */ @@ -30896,15 +31028,15 @@ return 4 * 256; unsigned long REGPARAM2 CPUFUNC(op_f368_0)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1835; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1846; } { #ifdef FPUEMU m68k_incpc (regs, 2); - frestore_opp(opcode, regs); + fpuop_restore(opcode, regs); #endif -}}endlabel1835: ; -return 4 * 256; +}}endlabel1846: ; +return 4 * CYCLE_UNIT / 2; } #endif /* FRESTORE.L (d8,An,Xn) */ @@ -30912,75 +31044,75 @@ return 4 * 256; unsigned long REGPARAM2 CPUFUNC(op_f370_0)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1836; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1847; } { #ifdef FPUEMU m68k_incpc (regs, 2); - frestore_opp(opcode, regs); + fpuop_restore(opcode, regs); #endif -}}endlabel1836: ; -return 4 * 256; +}}endlabel1847: ; +return 4 * CYCLE_UNIT / 2; } #endif /* FRESTORE.L (xxx).W */ #ifndef CPUEMU_68000_ONLY unsigned long REGPARAM2 CPUFUNC(op_f378_0)(uae_u32 opcode, struct regstruct *regs) { -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1837; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1848; } { #ifdef FPUEMU m68k_incpc (regs, 2); - frestore_opp(opcode, regs); + fpuop_restore(opcode, regs); #endif -}}endlabel1837: ; -return 4 * 256; +}}endlabel1848: ; +return 4 * CYCLE_UNIT / 2; } #endif /* FRESTORE.L (xxx).L */ #ifndef CPUEMU_68000_ONLY unsigned long REGPARAM2 CPUFUNC(op_f379_0)(uae_u32 opcode, struct regstruct *regs) { -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1838; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1849; } { #ifdef FPUEMU m68k_incpc (regs, 2); - frestore_opp(opcode, regs); + fpuop_restore(opcode, regs); #endif -}}endlabel1838: ; -return 4 * 256; +}}endlabel1849: ; +return 4 * CYCLE_UNIT / 2; } #endif /* FRESTORE.L (d16,PC) */ #ifndef CPUEMU_68000_ONLY unsigned long REGPARAM2 CPUFUNC(op_f37a_0)(uae_u32 opcode, struct regstruct *regs) { -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1839; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1850; } { #ifdef FPUEMU m68k_incpc (regs, 2); - frestore_opp(opcode, regs); + fpuop_restore(opcode, regs); #endif -}}endlabel1839: ; -return 4 * 256; +}}endlabel1850: ; +return 4 * CYCLE_UNIT / 2; } #endif /* FRESTORE.L (d8,PC,Xn) */ #ifndef CPUEMU_68000_ONLY unsigned long REGPARAM2 CPUFUNC(op_f37b_0)(uae_u32 opcode, struct regstruct *regs) { -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1840; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1851; } { #ifdef FPUEMU m68k_incpc (regs, 2); - frestore_opp(opcode, regs); + fpuop_restore(opcode, regs); #endif -}}endlabel1840: ; -return 4 * 256; +}}endlabel1851: ; +return 4 * CYCLE_UNIT / 2; } #endif /* CINVL.L #,An */ @@ -30989,12 +31121,12 @@ unsigned long REGPARAM2 CPUFUNC(op_f408_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 srcreg = ((opcode >> 6) & 3); uae_u32 dstreg = opcode & 7; -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1841; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1852; } { if (opcode&0x80) flush_icache(31); }} m68k_incpc (regs, 2); -endlabel1841: ; -return 4 * 256; +endlabel1852: ; +return 4 * CYCLE_UNIT / 2; } #endif /* CINVP.L #,An */ @@ -31003,12 +31135,12 @@ unsigned long REGPARAM2 CPUFUNC(op_f410_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 srcreg = ((opcode >> 6) & 3); uae_u32 dstreg = opcode & 7; -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1842; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1853; } { if (opcode&0x80) flush_icache(32); }} m68k_incpc (regs, 2); -endlabel1842: ; -return 4 * 256; +endlabel1853: ; +return 4 * CYCLE_UNIT / 2; } #endif /* CINVA.L # */ @@ -31016,12 +31148,12 @@ return 4 * 256; unsigned long REGPARAM2 CPUFUNC(op_f418_0)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1843; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1854; } { if (opcode&0x80) flush_icache(33); }} m68k_incpc (regs, 2); -endlabel1843: ; -return 4 * 256; +endlabel1854: ; +return 4 * CYCLE_UNIT / 2; } #endif /* CINVA.L # */ @@ -31029,12 +31161,12 @@ return 4 * 256; unsigned long REGPARAM2 CPUFUNC(op_f419_0)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1844; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1855; } { if (opcode&0x80) flush_icache(33); }} m68k_incpc (regs, 2); -endlabel1844: ; -return 4 * 256; +endlabel1855: ; +return 4 * CYCLE_UNIT / 2; } #endif /* CINVA.L # */ @@ -31042,12 +31174,12 @@ return 4 * 256; unsigned long REGPARAM2 CPUFUNC(op_f41a_0)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1845; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1856; } { if (opcode&0x80) flush_icache(33); }} m68k_incpc (regs, 2); -endlabel1845: ; -return 4 * 256; +endlabel1856: ; +return 4 * CYCLE_UNIT / 2; } #endif /* CINVA.L # */ @@ -31055,12 +31187,12 @@ return 4 * 256; unsigned long REGPARAM2 CPUFUNC(op_f41b_0)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1846; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1857; } { if (opcode&0x80) flush_icache(33); }} m68k_incpc (regs, 2); -endlabel1846: ; -return 4 * 256; +endlabel1857: ; +return 4 * CYCLE_UNIT / 2; } #endif /* CINVA.L # */ @@ -31068,12 +31200,12 @@ return 4 * 256; unsigned long REGPARAM2 CPUFUNC(op_f41c_0)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1847; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1858; } { if (opcode&0x80) flush_icache(33); }} m68k_incpc (regs, 2); -endlabel1847: ; -return 4 * 256; +endlabel1858: ; +return 4 * CYCLE_UNIT / 2; } #endif /* CINVA.L # */ @@ -31081,12 +31213,12 @@ return 4 * 256; unsigned long REGPARAM2 CPUFUNC(op_f41d_0)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1848; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1859; } { if (opcode&0x80) flush_icache(33); }} m68k_incpc (regs, 2); -endlabel1848: ; -return 4 * 256; +endlabel1859: ; +return 4 * CYCLE_UNIT / 2; } #endif /* CINVA.L # */ @@ -31094,12 +31226,12 @@ return 4 * 256; unsigned long REGPARAM2 CPUFUNC(op_f41e_0)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1849; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1860; } { if (opcode&0x80) flush_icache(33); }} m68k_incpc (regs, 2); -endlabel1849: ; -return 4 * 256; +endlabel1860: ; +return 4 * CYCLE_UNIT / 2; } #endif /* CINVA.L # */ @@ -31107,12 +31239,12 @@ return 4 * 256; unsigned long REGPARAM2 CPUFUNC(op_f41f_0)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1850; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1861; } { if (opcode&0x80) flush_icache(33); }} m68k_incpc (regs, 2); -endlabel1850: ; -return 4 * 256; +endlabel1861: ; +return 4 * CYCLE_UNIT / 2; } #endif /* CPUSHL.L #,An */ @@ -31121,12 +31253,12 @@ unsigned long REGPARAM2 CPUFUNC(op_f428_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 srcreg = ((opcode >> 6) & 3); uae_u32 dstreg = opcode & 7; -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1851; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1862; } { if (opcode&0x80) flush_icache(41); }} m68k_incpc (regs, 2); -endlabel1851: ; -return 4 * 256; +endlabel1862: ; +return 4 * CYCLE_UNIT / 2; } #endif /* CPUSHP.L #,An */ @@ -31135,12 +31267,12 @@ unsigned long REGPARAM2 CPUFUNC(op_f430_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 srcreg = ((opcode >> 6) & 3); uae_u32 dstreg = opcode & 7; -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1852; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1863; } { if (opcode&0x80) flush_icache(42); }} m68k_incpc (regs, 2); -endlabel1852: ; -return 4 * 256; +endlabel1863: ; +return 4 * CYCLE_UNIT / 2; } #endif /* CPUSHA.L # */ @@ -31148,12 +31280,12 @@ return 4 * 256; unsigned long REGPARAM2 CPUFUNC(op_f438_0)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1853; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1864; } { if (opcode&0x80) flush_icache(43); }} m68k_incpc (regs, 2); -endlabel1853: ; -return 4 * 256; +endlabel1864: ; +return 4 * CYCLE_UNIT / 2; } #endif /* CPUSHA.L # */ @@ -31161,12 +31293,12 @@ return 4 * 256; unsigned long REGPARAM2 CPUFUNC(op_f439_0)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1854; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1865; } { if (opcode&0x80) flush_icache(43); }} m68k_incpc (regs, 2); -endlabel1854: ; -return 4 * 256; +endlabel1865: ; +return 4 * CYCLE_UNIT / 2; } #endif /* CPUSHA.L # */ @@ -31174,12 +31306,12 @@ return 4 * 256; unsigned long REGPARAM2 CPUFUNC(op_f43a_0)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1855; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1866; } { if (opcode&0x80) flush_icache(43); }} m68k_incpc (regs, 2); -endlabel1855: ; -return 4 * 256; +endlabel1866: ; +return 4 * CYCLE_UNIT / 2; } #endif /* CPUSHA.L # */ @@ -31187,12 +31319,12 @@ return 4 * 256; unsigned long REGPARAM2 CPUFUNC(op_f43b_0)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1856; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1867; } { if (opcode&0x80) flush_icache(43); }} m68k_incpc (regs, 2); -endlabel1856: ; -return 4 * 256; +endlabel1867: ; +return 4 * CYCLE_UNIT / 2; } #endif /* CPUSHA.L # */ @@ -31200,12 +31332,12 @@ return 4 * 256; unsigned long REGPARAM2 CPUFUNC(op_f43c_0)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1857; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1868; } { if (opcode&0x80) flush_icache(43); }} m68k_incpc (regs, 2); -endlabel1857: ; -return 4 * 256; +endlabel1868: ; +return 4 * CYCLE_UNIT / 2; } #endif /* CPUSHA.L # */ @@ -31213,12 +31345,12 @@ return 4 * 256; unsigned long REGPARAM2 CPUFUNC(op_f43d_0)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1858; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1869; } { if (opcode&0x80) flush_icache(43); }} m68k_incpc (regs, 2); -endlabel1858: ; -return 4 * 256; +endlabel1869: ; +return 4 * CYCLE_UNIT / 2; } #endif /* CPUSHA.L # */ @@ -31226,12 +31358,12 @@ return 4 * 256; unsigned long REGPARAM2 CPUFUNC(op_f43e_0)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1859; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1870; } { if (opcode&0x80) flush_icache(43); }} m68k_incpc (regs, 2); -endlabel1859: ; -return 4 * 256; +endlabel1870: ; +return 4 * CYCLE_UNIT / 2; } #endif /* CPUSHA.L # */ @@ -31239,12 +31371,12 @@ return 4 * 256; unsigned long REGPARAM2 CPUFUNC(op_f43f_0)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1860; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel1871; } { if (opcode&0x80) flush_icache(43); }} m68k_incpc (regs, 2); -endlabel1860: ; -return 4 * 256; +endlabel1871: ; +return 4 * CYCLE_UNIT / 2; } #endif /* MMUOP.L #,Dn */ @@ -31253,12 +31385,10 @@ unsigned long REGPARAM2 CPUFUNC(op_f500_0)(uae_u32 opcode, struct regstruct *reg { uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 3) & 255); uae_u32 dstreg = opcode & 7; -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1861; } {{ uae_u32 extra = srcreg; m68k_incpc (regs, 2); mmu_op(opcode, regs, extra); -}}}endlabel1861: ; -return 4 * 256; +}}return 4 * CYCLE_UNIT / 2; } #endif /* MOVE16.L (An)+,(xxx).L */ @@ -31276,7 +31406,7 @@ unsigned long REGPARAM2 CPUFUNC(op_f600_0)(uae_u32 opcode, struct regstruct *reg put_long(memda+12, get_long(memsa+12)); m68k_areg(regs, srcreg) += 16; }}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* MOVE16.L (xxx).L,(An)+ */ @@ -31294,7 +31424,7 @@ unsigned long REGPARAM2 CPUFUNC(op_f608_0)(uae_u32 opcode, struct regstruct *reg put_long(memda+12, get_long(memsa+12)); m68k_areg(regs, dstreg) += 16; }}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* MOVE16.L (An),(xxx).L */ @@ -31311,7 +31441,7 @@ unsigned long REGPARAM2 CPUFUNC(op_f610_0)(uae_u32 opcode, struct regstruct *reg put_long(memda+8, get_long(memsa+8)); put_long(memda+12, get_long(memsa+12)); }}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* MOVE16.L (xxx).L,(An) */ @@ -31328,7 +31458,7 @@ unsigned long REGPARAM2 CPUFUNC(op_f618_0)(uae_u32 opcode, struct regstruct *reg put_long(memda+8, get_long(memsa+8)); put_long(memda+12, get_long(memsa+12)); }}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } #endif /* MOVE16.L (An)+,(An)+ */ @@ -31348,7 +31478,141 @@ unsigned long REGPARAM2 CPUFUNC(op_f620_0)(uae_u32 opcode, struct regstruct *reg m68k_areg(regs, srcreg) += 16; m68k_areg(regs, dstreg) += 16; } m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; +} +#endif +/* MMUOP30B.L Dn */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f800_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{ uaecptr pc = m68k_getpc (regs); +{ m68k_incpc (regs, 2); + mmu_op30(pc, opcode, regs, 0, 0); +}}return 4 * CYCLE_UNIT / 2; +} +#endif +/* MMUOP30B.L An */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f808_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{ uaecptr pc = m68k_getpc (regs); +{ m68k_incpc (regs, 2); + mmu_op30(pc, opcode, regs, 0, 0); +}}return 4 * CYCLE_UNIT / 2; +} +#endif +/* MMUOP30B.L (An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f810_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{ uaecptr pc = m68k_getpc (regs); +{ uaecptr extraa = m68k_areg(regs, srcreg); + m68k_incpc (regs, 2); + mmu_op30(pc, opcode, regs, 0, 0); +}}return 4 * CYCLE_UNIT / 2; +} +#endif +/* MMUOP30B.L (An)+ */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f818_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{ uaecptr pc = m68k_getpc (regs); +{ uaecptr extraa = m68k_areg(regs, srcreg); + m68k_areg(regs, srcreg) += 4; + m68k_incpc (regs, 2); + mmu_op30(pc, opcode, regs, 0, 0); +}}return 4 * CYCLE_UNIT / 2; +} +#endif +/* MMUOP30B.L -(An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f820_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{ uaecptr pc = m68k_getpc (regs); +{ uaecptr extraa; + extraa = m68k_areg(regs, srcreg) - 4; + m68k_areg (regs, srcreg) = extraa; + m68k_incpc (regs, 2); + mmu_op30(pc, opcode, regs, 0, 0); +}}return 6 * CYCLE_UNIT / 2; +} +#endif +/* MMUOP30B.L (d16,An) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f828_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{ uaecptr pc = m68k_getpc (regs); +{ uaecptr extraa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); + m68k_incpc (regs, 4); + mmu_op30(pc, opcode, regs, 0, 0); +}}return 8 * CYCLE_UNIT / 2; +} +#endif +/* MMUOP30B.L (d8,An,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f830_0)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{ uaecptr pc = m68k_getpc (regs); +{ uaecptr extraa; + m68k_incpc (regs, 2); +{ extraa = get_disp_ea_020(regs, m68k_areg(regs, srcreg), next_iword(regs)); + mmu_op30(pc, opcode, regs, 0, 0); +}}}return 10 * CYCLE_UNIT / 2; +} +#endif +/* MMUOP30B.L (xxx).W */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f838_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ uaecptr pc = m68k_getpc (regs); +{ uaecptr extraa = (uae_s32)(uae_s16)get_iword (regs, 2); + m68k_incpc (regs, 4); + mmu_op30(pc, opcode, regs, 0, 0); +}}return 8 * CYCLE_UNIT / 2; +} +#endif +/* MMUOP30B.L (xxx).L */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f839_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ uaecptr pc = m68k_getpc (regs); +{ uaecptr extraa = get_ilong (regs, 2); + m68k_incpc (regs, 6); + mmu_op30(pc, opcode, regs, 0, 0); +}}return 12 * CYCLE_UNIT / 2; +} +#endif +/* MMUOP30B.L (d16,PC) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f83a_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ uaecptr pc = m68k_getpc (regs); +{ uaecptr extraa = m68k_getpc (regs) + 2; + extraa += (uae_s32)(uae_s16)get_iword (regs, 2); + m68k_incpc (regs, 4); + mmu_op30(pc, opcode, regs, 0, 0); +}}return 8 * CYCLE_UNIT / 2; +} +#endif +/* MMUOP30B.L (d8,PC,Xn) */ +#ifndef CPUEMU_68000_ONLY +unsigned long REGPARAM2 CPUFUNC(op_f83b_0)(uae_u32 opcode, struct regstruct *regs) +{ +{ uaecptr pc = m68k_getpc (regs); +{ uaecptr tmppc; + uaecptr extraa; + m68k_incpc (regs, 2); +{ tmppc = m68k_getpc(regs); + extraa = get_disp_ea_020(regs, tmppc, next_iword(regs)); + mmu_op30(pc, opcode, regs, 0, 0); +}}}return 10 * CYCLE_UNIT / 2; } #endif #endif @@ -31390,6 +31654,325 @@ return 8 * 256; #endif +#if !defined(PART_1) && !defined(PART_2) && !defined(PART_3) && !defined(PART_4) && !defined(PART_5) && !defined(PART_6) && !defined(PART_7) && !defined(PART_8) +#define PART_1 1 +#define PART_2 1 +#define PART_3 1 +#define PART_4 1 +#define PART_5 1 +#define PART_6 1 +#define PART_7 1 +#define PART_8 1 +#endif + +#ifdef PART_1 +#endif + +#ifdef PART_2 +#endif + +#ifdef PART_3 +#endif + +#ifdef PART_4 +/* NBCD.B Dn */ +unsigned long REGPARAM2 CPUFUNC(op_4800_2)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG (®s->ccrflags) ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s8)(newv)) == 0)); + SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); + m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); +}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* NBCD.B (An) */ +unsigned long REGPARAM2 CPUFUNC(op_4810_2)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg(regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG (®s->ccrflags) ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s8)(newv)) == 0)); + SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); + put_byte (srca,newv); +}}}} m68k_incpc (regs, 2); +return 12 * CYCLE_UNIT / 2; +} +/* NBCD.B (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_4818_2)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg(regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; +{ uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG (®s->ccrflags) ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s8)(newv)) == 0)); + SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); + put_byte (srca,newv); +}}}} m68k_incpc (regs, 2); +return 12 * CYCLE_UNIT / 2; +} +/* NBCD.B -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_4820_2)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG (®s->ccrflags) ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s8)(newv)) == 0)); + SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); + put_byte (srca,newv); +}}}} m68k_incpc (regs, 2); +return 14 * CYCLE_UNIT / 2; +} +/* NBCD.B (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_4828_2)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG (®s->ccrflags) ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s8)(newv)) == 0)); + SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); + put_byte (srca,newv); +}}}} m68k_incpc (regs, 4); +return 16 * CYCLE_UNIT / 2; +} +/* NBCD.B (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_4830_2)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + m68k_incpc (regs, 2); +{ srca = get_disp_ea_020(regs, m68k_areg(regs, srcreg), next_iword(regs)); +{ uae_s8 src = get_byte (srca); +{ uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG (®s->ccrflags) ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s8)(newv)) == 0)); + SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); + put_byte (srca,newv); +}}}}}return 18 * CYCLE_UNIT / 2; +} +/* NBCD.B (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_4838_2)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG (®s->ccrflags) ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s8)(newv)) == 0)); + SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); + put_byte (srca,newv); +}}}} m68k_incpc (regs, 4); +return 16 * CYCLE_UNIT / 2; +} +/* NBCD.B (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_4839_2)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_ilong (regs, 2); +{ uae_s8 src = get_byte (srca); +{ uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG (®s->ccrflags) ? 1 : 0); + uae_u16 newv_hi = - (src & 0xF0); + uae_u16 newv; + int cflg; + if (newv_lo > 9) { newv_lo -= 6; } + newv = newv_hi + newv_lo; + cflg = (newv & 0x1F0) > 0x90; + if (cflg) newv -= 0x60; + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s8)(newv)) == 0)); + SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); + put_byte (srca,newv); +}}}} m68k_incpc (regs, 6); +return 20 * CYCLE_UNIT / 2; +} +#endif + +#ifdef PART_5 +#endif + +#ifdef PART_6 +/* SBCD.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8100_2)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{ uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG (®s->ccrflags) ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; + if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; + if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG (®s->ccrflags) ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG (®s->ccrflags, (((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG (®s->ccrflags) ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s8)(newv)) == 0)); + SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); + SET_VFLG (®s->ccrflags, (tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* SBCD.B -(An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_8108_2)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; +{ uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG (®s->ccrflags) ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; + if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; + if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG (®s->ccrflags) ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG (®s->ccrflags, (((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG (®s->ccrflags) ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s8)(newv)) == 0)); + SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); + SET_VFLG (®s->ccrflags, (tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return 16 * CYCLE_UNIT / 2; +} +#endif + +#ifdef PART_7 +/* ABCD.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_c100_2)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); +{ uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG (®s->ccrflags) ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s8)(newv)) == 0)); + SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); + SET_VFLG (®s->ccrflags, (tmp_newv & 0x80) == 0 && (newv & 0x80) != 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* ABCD.B -(An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_c108_2)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; +{ uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG (®s->ccrflags) ? 1 : 0); + uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); + uae_u16 newv, tmp_newv; + int cflg; + newv = tmp_newv = newv_hi + newv_lo; + if (newv_lo > 9) { newv += 6; } + cflg = (newv & 0x3F0) > 0x90; + if (cflg) newv += 0x60; + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s8)(newv)) == 0)); + SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); + SET_VFLG (®s->ccrflags, (tmp_newv & 0x80) == 0 && (newv & 0x80) != 0); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return 16 * CYCLE_UNIT / 2; +} +#endif + +#ifdef PART_8 +#endif + + #if !defined(PART_1) && !defined(PART_2) && !defined(PART_3) && !defined(PART_4) && !defined(PART_5) && !defined(PART_6) && !defined(PART_7) && !defined(PART_8) #define PART_1 1 #define PART_2 1 @@ -31439,7 +32022,7 @@ return 8 * 256; #ifdef PART_1 /* OR.B #.B,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0030_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0030_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = get_ibyte (regs, 2); @@ -31452,10 +32035,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0030_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 6); -return 26 * 256; +return 26 * CYCLE_UNIT / 2; } /* OR.W #.W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0070_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0070_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_iword (regs, 2); @@ -31468,10 +32051,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0070_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 6); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* OR.L #.L,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_00b0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_00b0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_ilong (regs, 2); @@ -31484,10 +32067,10 @@ unsigned long REGPARAM2 CPUFUNC(op_00b0_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 8); -return 34 * 256; +return 34 * CYCLE_UNIT / 2; } /* BTST.B Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0130_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0130_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31498,10 +32081,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0130_3)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* BTST.B Dn,(d8,PC,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_013b_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_013b_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 3; @@ -31514,10 +32097,10 @@ unsigned long REGPARAM2 CPUFUNC(op_013b_3)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* BCHG.B Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0170_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0170_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31530,10 +32113,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0170_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* BCHG.B Dn,(d8,PC,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_017b_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_017b_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 3; @@ -31548,10 +32131,10 @@ unsigned long REGPARAM2 CPUFUNC(op_017b_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* BCLR.B Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_01b0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_01b0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31564,10 +32147,10 @@ unsigned long REGPARAM2 CPUFUNC(op_01b0_3)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* BCLR.B Dn,(d8,PC,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_01bb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_01bb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 3; @@ -31582,10 +32165,10 @@ unsigned long REGPARAM2 CPUFUNC(op_01bb_3)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* BSET.B Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_01f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_01f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31598,10 +32181,10 @@ unsigned long REGPARAM2 CPUFUNC(op_01f0_3)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* BSET.B Dn,(d8,PC,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_01fb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_01fb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 3; @@ -31616,10 +32199,10 @@ unsigned long REGPARAM2 CPUFUNC(op_01fb_3)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* AND.B #.B,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0230_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0230_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = get_ibyte (regs, 2); @@ -31632,10 +32215,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0230_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 6); -return 26 * 256; +return 26 * CYCLE_UNIT / 2; } /* AND.W #.W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0270_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0270_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_iword (regs, 2); @@ -31648,10 +32231,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0270_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 6); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* AND.L #.L,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_02b0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_02b0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_ilong (regs, 2); @@ -31664,10 +32247,10 @@ unsigned long REGPARAM2 CPUFUNC(op_02b0_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 8); -return 34 * 256; +return 34 * CYCLE_UNIT / 2; } /* SUB.B #.B,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0430_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0430_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = get_ibyte (regs, 2); @@ -31685,10 +32268,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0430_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 26 * 256; +return 26 * CYCLE_UNIT / 2; } /* SUB.W #.W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0470_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0470_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_iword (regs, 2); @@ -31706,10 +32289,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0470_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* SUB.L #.L,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_04b0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_04b0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_ilong (regs, 2); @@ -31727,10 +32310,10 @@ unsigned long REGPARAM2 CPUFUNC(op_04b0_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 8); -return 34 * 256; +return 34 * CYCLE_UNIT / 2; } /* ADD.B #.B,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0630_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0630_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = get_ibyte (regs, 2); @@ -31748,10 +32331,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0630_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 26 * 256; +return 26 * CYCLE_UNIT / 2; } /* ADD.W #.W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0670_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0670_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_iword (regs, 2); @@ -31769,10 +32352,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0670_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* ADD.L #.L,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_06b0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_06b0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_ilong (regs, 2); @@ -31790,10 +32373,10 @@ unsigned long REGPARAM2 CPUFUNC(op_06b0_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 8); -return 34 * 256; +return 34 * CYCLE_UNIT / 2; } /* BTST.B #.W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0830_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0830_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_iword (regs, 2); @@ -31803,10 +32386,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0830_3)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 6); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* BTST.B #.W,(d8,PC,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_083b_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_083b_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = 3; {{ uae_s16 src = get_iword (regs, 2); @@ -31818,10 +32401,10 @@ unsigned long REGPARAM2 CPUFUNC(op_083b_3)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 6); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* BCHG.B #.W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0870_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0870_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_iword (regs, 2); @@ -31833,10 +32416,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0870_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* BCHG.B #.W,(d8,PC,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_087b_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_087b_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = 3; {{ uae_s16 src = get_iword (regs, 2); @@ -31850,10 +32433,10 @@ unsigned long REGPARAM2 CPUFUNC(op_087b_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* BCLR.B #.W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_08b0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_08b0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_iword (regs, 2); @@ -31865,10 +32448,10 @@ unsigned long REGPARAM2 CPUFUNC(op_08b0_3)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* BCLR.B #.W,(d8,PC,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_08bb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_08bb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = 3; {{ uae_s16 src = get_iword (regs, 2); @@ -31882,10 +32465,10 @@ unsigned long REGPARAM2 CPUFUNC(op_08bb_3)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* BSET.B #.W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_08f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_08f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_iword (regs, 2); @@ -31897,10 +32480,10 @@ unsigned long REGPARAM2 CPUFUNC(op_08f0_3)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* BSET.B #.W,(d8,PC,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_08fb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_08fb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = 3; {{ uae_s16 src = get_iword (regs, 2); @@ -31914,10 +32497,10 @@ unsigned long REGPARAM2 CPUFUNC(op_08fb_3)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* EOR.B #.B,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0a30_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0a30_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = get_ibyte (regs, 2); @@ -31930,10 +32513,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0a30_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 6); -return 26 * 256; +return 26 * CYCLE_UNIT / 2; } /* EOR.W #.W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0a70_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0a70_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_iword (regs, 2); @@ -31946,13 +32529,13 @@ unsigned long REGPARAM2 CPUFUNC(op_0a70_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 6); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } #endif #ifdef PART_2 /* EOR.L #.L,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0ab0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0ab0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_ilong (regs, 2); @@ -31965,10 +32548,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0ab0_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 8); -return 34 * 256; +return 34 * CYCLE_UNIT / 2; } /* CMP.B #.B,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0c30_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0c30_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = get_ibyte (regs, 2); @@ -31984,10 +32567,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0c30_3)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 6); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* CMP.W #.W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0c70_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0c70_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_iword (regs, 2); @@ -32003,10 +32586,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0c70_3)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 6); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* CMP.L #.L,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0cb0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0cb0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_ilong (regs, 2); @@ -32022,10 +32605,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0cb0_3)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 8); -return 26 * 256; +return 26 * CYCLE_UNIT / 2; } /* MOVE.B (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_1030_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1030_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -32037,10 +32620,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1030_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* MOVE.B (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_103b_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_103b_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -32053,10 +32636,10 @@ unsigned long REGPARAM2 CPUFUNC(op_103b_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* MOVE.B (d8,An,Xn),(An) */ -unsigned long REGPARAM2 CPUFUNC(op_10b0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_10b0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -32069,10 +32652,10 @@ unsigned long REGPARAM2 CPUFUNC(op_10b0_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.B (d8,PC,Xn),(An) */ -unsigned long REGPARAM2 CPUFUNC(op_10bb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_10bb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -32086,10 +32669,10 @@ unsigned long REGPARAM2 CPUFUNC(op_10bb_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.B (d8,An,Xn),(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_10f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_10f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -32103,10 +32686,10 @@ unsigned long REGPARAM2 CPUFUNC(op_10f0_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.B (d8,PC,Xn),(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_10fb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_10fb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -32121,10 +32704,10 @@ unsigned long REGPARAM2 CPUFUNC(op_10fb_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.B (d8,An,Xn),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_1130_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1130_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -32139,10 +32722,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1130_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.B (d8,PC,Xn),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_113b_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_113b_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -32158,10 +32741,10 @@ unsigned long REGPARAM2 CPUFUNC(op_113b_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.B (d8,An,Xn),(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_1170_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1170_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -32174,10 +32757,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1170_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 22 * 256; +}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.B (d8,PC,Xn),(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_117b_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_117b_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -32191,10 +32774,10 @@ unsigned long REGPARAM2 CPUFUNC(op_117b_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 22 * 256; +}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.B Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_1180_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1180_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -32206,10 +32789,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1180_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}return 14 * 256; +}}}return 14 * CYCLE_UNIT / 2; } /* MOVE.B (An),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_1190_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1190_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -32222,10 +32805,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1190_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.B (An)+,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_1198_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1198_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -32239,10 +32822,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1198_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.B -(An),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_11a0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_11a0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -32257,10 +32840,10 @@ unsigned long REGPARAM2 CPUFUNC(op_11a0_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.B (d16,An),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_11a8_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_11a8_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -32273,10 +32856,10 @@ unsigned long REGPARAM2 CPUFUNC(op_11a8_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 22 * 256; +}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.B (d8,An,Xn),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_11b0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_11b0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -32290,10 +32873,10 @@ unsigned long REGPARAM2 CPUFUNC(op_11b0_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_11b8_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_11b8_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); @@ -32305,10 +32888,10 @@ unsigned long REGPARAM2 CPUFUNC(op_11b8_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 22 * 256; +}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).L,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_11b9_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_11b9_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_ilong (regs, 2); @@ -32320,10 +32903,10 @@ unsigned long REGPARAM2 CPUFUNC(op_11b9_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 8); -}}}}return 26 * 256; +}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.B (d16,PC),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_11ba_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_11ba_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; @@ -32336,10 +32919,10 @@ unsigned long REGPARAM2 CPUFUNC(op_11ba_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 22 * 256; +}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.B (d8,PC,Xn),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_11bb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_11bb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -32354,10 +32937,10 @@ unsigned long REGPARAM2 CPUFUNC(op_11bb_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.B #.B,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_11bc_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_11bc_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s8 src = get_ibyte (regs, 2); @@ -32368,10 +32951,10 @@ unsigned long REGPARAM2 CPUFUNC(op_11bc_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 6); -}}}return 22 * 256; +}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.B (d8,An,Xn),(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_11f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_11f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -32383,10 +32966,10 @@ unsigned long REGPARAM2 CPUFUNC(op_11f0_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 22 * 256; +}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.B (d8,PC,Xn),(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_11fb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_11fb_4)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr tmppc; uaecptr srca; @@ -32399,10 +32982,10 @@ unsigned long REGPARAM2 CPUFUNC(op_11fb_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 22 * 256; +}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.B (d8,An,Xn),(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_13f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_13f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -32414,10 +32997,10 @@ unsigned long REGPARAM2 CPUFUNC(op_13f0_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 8); -}}}}return 26 * 256; +}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.B (d8,PC,Xn),(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_13fb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_13fb_4)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr tmppc; uaecptr srca; @@ -32430,10 +33013,10 @@ unsigned long REGPARAM2 CPUFUNC(op_13fb_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 8); -}}}}return 26 * 256; +}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.L (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_2030_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_2030_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -32445,10 +33028,10 @@ unsigned long REGPARAM2 CPUFUNC(op_2030_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.L (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_203b_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_203b_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -32461,10 +33044,10 @@ unsigned long REGPARAM2 CPUFUNC(op_203b_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVEA.L (d8,An,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_2070_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_2070_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -32473,10 +33056,10 @@ unsigned long REGPARAM2 CPUFUNC(op_2070_3)(uae_u32 opcode, struct regstruct *reg { uae_s32 src = get_long (srca); { m68k_areg(regs, dstreg) = (src); m68k_incpc (regs, 4); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVEA.L (d8,PC,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_207b_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_207b_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -32486,10 +33069,10 @@ unsigned long REGPARAM2 CPUFUNC(op_207b_3)(uae_u32 opcode, struct regstruct *reg { uae_s32 src = get_long (srca); { m68k_areg(regs, dstreg) = (src); m68k_incpc (regs, 4); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.L (d8,An,Xn),(An) */ -unsigned long REGPARAM2 CPUFUNC(op_20b0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_20b0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -32502,10 +33085,10 @@ unsigned long REGPARAM2 CPUFUNC(op_20b0_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 26 * 256; +}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.L (d8,PC,Xn),(An) */ -unsigned long REGPARAM2 CPUFUNC(op_20bb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_20bb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -32519,10 +33102,10 @@ unsigned long REGPARAM2 CPUFUNC(op_20bb_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 26 * 256; +}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.L (d8,An,Xn),(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_20f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_20f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -32536,10 +33119,10 @@ unsigned long REGPARAM2 CPUFUNC(op_20f0_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 26 * 256; +}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.L (d8,PC,Xn),(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_20fb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_20fb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -32554,10 +33137,10 @@ unsigned long REGPARAM2 CPUFUNC(op_20fb_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 26 * 256; +}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.L (d8,An,Xn),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_2130_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_2130_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -32572,10 +33155,10 @@ unsigned long REGPARAM2 CPUFUNC(op_2130_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 26 * 256; +}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.L (d8,PC,Xn),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_213b_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_213b_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -32591,29 +33174,29 @@ unsigned long REGPARAM2 CPUFUNC(op_213b_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 26 * 256; +}}}}return 26 * CYCLE_UNIT / 2; +} +/* MOVE.L (d8,An,Xn),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_2170_4)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_iword (regs, 2)); +{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); + put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 6); +}}}}return 30 * CYCLE_UNIT / 2; } #endif #ifdef PART_3 -/* MOVE.L (d8,An,Xn),(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_2170_3)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca; - srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_iword (regs, 2)); -{ uae_s32 src = get_long (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword (regs, 4); - put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 6); -}}}}return 30 * 256; -} /* MOVE.L (d8,PC,Xn),(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_217b_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_217b_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -32627,10 +33210,10 @@ unsigned long REGPARAM2 CPUFUNC(op_217b_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 30 * 256; +}}}}return 30 * CYCLE_UNIT / 2; } /* MOVE.L Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_2180_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_2180_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -32642,10 +33225,10 @@ unsigned long REGPARAM2 CPUFUNC(op_2180_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}return 18 * 256; +}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.L An,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_2188_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_2188_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -32657,10 +33240,10 @@ unsigned long REGPARAM2 CPUFUNC(op_2188_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}return 18 * 256; +}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.L (An),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_2190_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_2190_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -32673,10 +33256,10 @@ unsigned long REGPARAM2 CPUFUNC(op_2190_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 26 * 256; +}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.L (An)+,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_2198_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_2198_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -32690,10 +33273,10 @@ unsigned long REGPARAM2 CPUFUNC(op_2198_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 26 * 256; +}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.L -(An),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_21a0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_21a0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -32708,10 +33291,10 @@ unsigned long REGPARAM2 CPUFUNC(op_21a0_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 28 * 256; +}}}}return 28 * CYCLE_UNIT / 2; } /* MOVE.L (d16,An),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_21a8_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_21a8_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -32724,10 +33307,10 @@ unsigned long REGPARAM2 CPUFUNC(op_21a8_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 30 * 256; +}}}}return 30 * CYCLE_UNIT / 2; } /* MOVE.L (d8,An,Xn),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_21b0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_21b0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -32741,10 +33324,10 @@ unsigned long REGPARAM2 CPUFUNC(op_21b0_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 32 * 256; +}}}}return 32 * CYCLE_UNIT / 2; } /* MOVE.L (xxx).W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_21b8_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_21b8_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); @@ -32756,10 +33339,10 @@ unsigned long REGPARAM2 CPUFUNC(op_21b8_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 30 * 256; +}}}}return 30 * CYCLE_UNIT / 2; } /* MOVE.L (xxx).L,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_21b9_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_21b9_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_ilong (regs, 2); @@ -32771,10 +33354,10 @@ unsigned long REGPARAM2 CPUFUNC(op_21b9_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 8); -}}}}return 34 * 256; +}}}}return 34 * CYCLE_UNIT / 2; } /* MOVE.L (d16,PC),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_21ba_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_21ba_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; @@ -32787,10 +33370,10 @@ unsigned long REGPARAM2 CPUFUNC(op_21ba_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 30 * 256; +}}}}return 30 * CYCLE_UNIT / 2; } /* MOVE.L (d8,PC,Xn),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_21bb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_21bb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -32805,10 +33388,10 @@ unsigned long REGPARAM2 CPUFUNC(op_21bb_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 32 * 256; +}}}}return 32 * CYCLE_UNIT / 2; } /* MOVE.L #.L,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_21bc_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_21bc_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s32 src = get_ilong (regs, 2); @@ -32819,10 +33402,10 @@ unsigned long REGPARAM2 CPUFUNC(op_21bc_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 8); -}}}return 26 * 256; +}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.L (d8,An,Xn),(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_21f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_21f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -32834,10 +33417,10 @@ unsigned long REGPARAM2 CPUFUNC(op_21f0_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 30 * 256; +}}}}return 30 * CYCLE_UNIT / 2; } /* MOVE.L (d8,PC,Xn),(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_21fb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_21fb_4)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr tmppc; uaecptr srca; @@ -32850,10 +33433,10 @@ unsigned long REGPARAM2 CPUFUNC(op_21fb_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 30 * 256; +}}}}return 30 * CYCLE_UNIT / 2; } /* MOVE.L (d8,An,Xn),(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_23f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_23f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -32865,10 +33448,10 @@ unsigned long REGPARAM2 CPUFUNC(op_23f0_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 8); -}}}}return 34 * 256; +}}}}return 34 * CYCLE_UNIT / 2; } /* MOVE.L (d8,PC,Xn),(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_23fb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_23fb_4)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr tmppc; uaecptr srca; @@ -32881,10 +33464,10 @@ unsigned long REGPARAM2 CPUFUNC(op_23fb_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 8); -}}}}return 34 * 256; +}}}}return 34 * CYCLE_UNIT / 2; } /* MOVE.W (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_3030_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_3030_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -32896,10 +33479,10 @@ unsigned long REGPARAM2 CPUFUNC(op_3030_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* MOVE.W (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_303b_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_303b_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -32912,10 +33495,10 @@ unsigned long REGPARAM2 CPUFUNC(op_303b_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* MOVEA.W (d8,An,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_3070_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_3070_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -32925,10 +33508,10 @@ unsigned long REGPARAM2 CPUFUNC(op_3070_3)(uae_u32 opcode, struct regstruct *reg { src = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); m68k_incpc (regs, 4); -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* MOVEA.W (d8,PC,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_307b_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_307b_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -32939,10 +33522,10 @@ unsigned long REGPARAM2 CPUFUNC(op_307b_3)(uae_u32 opcode, struct regstruct *reg { src = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); m68k_incpc (regs, 4); -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* MOVE.W (d8,An,Xn),(An) */ -unsigned long REGPARAM2 CPUFUNC(op_30b0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_30b0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -32955,10 +33538,10 @@ unsigned long REGPARAM2 CPUFUNC(op_30b0_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.W (d8,PC,Xn),(An) */ -unsigned long REGPARAM2 CPUFUNC(op_30bb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_30bb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -32972,10 +33555,10 @@ unsigned long REGPARAM2 CPUFUNC(op_30bb_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.W (d8,An,Xn),(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_30f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_30f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -32989,10 +33572,10 @@ unsigned long REGPARAM2 CPUFUNC(op_30f0_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.W (d8,PC,Xn),(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_30fb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_30fb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -33007,10 +33590,10 @@ unsigned long REGPARAM2 CPUFUNC(op_30fb_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.W (d8,An,Xn),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_3130_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_3130_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -33025,10 +33608,10 @@ unsigned long REGPARAM2 CPUFUNC(op_3130_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.W (d8,PC,Xn),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_313b_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_313b_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -33044,10 +33627,10 @@ unsigned long REGPARAM2 CPUFUNC(op_313b_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.W (d8,An,Xn),(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_3170_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_3170_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -33060,10 +33643,10 @@ unsigned long REGPARAM2 CPUFUNC(op_3170_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 22 * 256; +}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.W (d8,PC,Xn),(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_317b_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_317b_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -33077,10 +33660,10 @@ unsigned long REGPARAM2 CPUFUNC(op_317b_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 22 * 256; +}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.W Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_3180_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_3180_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -33092,10 +33675,10 @@ unsigned long REGPARAM2 CPUFUNC(op_3180_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}return 14 * 256; +}}}return 14 * CYCLE_UNIT / 2; } /* MOVE.W An,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_3188_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_3188_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -33107,10 +33690,10 @@ unsigned long REGPARAM2 CPUFUNC(op_3188_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}return 14 * 256; +}}}return 14 * CYCLE_UNIT / 2; } /* MOVE.W (An),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_3190_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_3190_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -33123,10 +33706,10 @@ unsigned long REGPARAM2 CPUFUNC(op_3190_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.W (An)+,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_3198_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_3198_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -33140,10 +33723,10 @@ unsigned long REGPARAM2 CPUFUNC(op_3198_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.W -(An),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_31a0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_31a0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -33158,10 +33741,10 @@ unsigned long REGPARAM2 CPUFUNC(op_31a0_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.W (d16,An),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_31a8_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_31a8_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -33174,10 +33757,10 @@ unsigned long REGPARAM2 CPUFUNC(op_31a8_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 22 * 256; +}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.W (d8,An,Xn),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_31b0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_31b0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -33191,10 +33774,10 @@ unsigned long REGPARAM2 CPUFUNC(op_31b0_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.W (xxx).W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_31b8_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_31b8_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); @@ -33206,10 +33789,10 @@ unsigned long REGPARAM2 CPUFUNC(op_31b8_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 22 * 256; +}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.W (xxx).L,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_31b9_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_31b9_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_ilong (regs, 2); @@ -33221,10 +33804,10 @@ unsigned long REGPARAM2 CPUFUNC(op_31b9_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 8); -}}}}return 26 * 256; +}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.W (d16,PC),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_31ba_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_31ba_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; @@ -33237,10 +33820,10 @@ unsigned long REGPARAM2 CPUFUNC(op_31ba_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 22 * 256; +}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.W (d8,PC,Xn),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_31bb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_31bb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -33255,10 +33838,10 @@ unsigned long REGPARAM2 CPUFUNC(op_31bb_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.W #.W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_31bc_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_31bc_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s16 src = get_iword (regs, 2); @@ -33269,10 +33852,10 @@ unsigned long REGPARAM2 CPUFUNC(op_31bc_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 6); -}}}return 18 * 256; +}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.W (d8,An,Xn),(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_31f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_31f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -33284,10 +33867,10 @@ unsigned long REGPARAM2 CPUFUNC(op_31f0_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 22 * 256; +}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.W (d8,PC,Xn),(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_31fb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_31fb_4)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr tmppc; uaecptr srca; @@ -33300,10 +33883,10 @@ unsigned long REGPARAM2 CPUFUNC(op_31fb_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 22 * 256; +}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.W (d8,An,Xn),(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_33f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_33f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -33315,10 +33898,10 @@ unsigned long REGPARAM2 CPUFUNC(op_33f0_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 8); -}}}}return 26 * 256; +}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.W (d8,PC,Xn),(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_33fb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_33fb_4)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr tmppc; uaecptr srca; @@ -33331,10 +33914,10 @@ unsigned long REGPARAM2 CPUFUNC(op_33fb_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 8); -}}}}return 26 * 256; +}}}}return 26 * CYCLE_UNIT / 2; } /* NEGX.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4030_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4030_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -33351,10 +33934,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4030_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (srca,newv); }}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* NEGX.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4070_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4070_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -33371,10 +33954,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4070_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); put_word (srca,newv); }}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* NEGX.L (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_40b0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_40b0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -33391,23 +33974,23 @@ unsigned long REGPARAM2 CPUFUNC(op_40b0_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); put_long (srca,newv); }}}}} m68k_incpc (regs, 4); -return 26 * 256; +return 26 * CYCLE_UNIT / 2; } /* MVSR2.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_40f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_40f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel1985; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel2019; } {{ uaecptr srca; srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_iword (regs, 2)); MakeSR(regs); put_word (srca,regs->sr); }}} m68k_incpc (regs, 4); -endlabel1985: ; -return 14 * 256; +endlabel2019: ; +return 14 * CYCLE_UNIT / 2; } /* CHK.L (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4130_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4130_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -33420,17 +34003,17 @@ unsigned long REGPARAM2 CPUFUNC(op_4130_3)(uae_u32 opcode, struct regstruct *reg if ((uae_s32)dst < 0) { SET_NFLG (®s->ccrflags, 1); Exception (6, regs, oldpc); - goto endlabel1986; + goto endlabel2020; } else if (dst > src) { SET_NFLG (®s->ccrflags, 0); Exception (6, regs, oldpc); - goto endlabel1986; + goto endlabel2020; } -}}}}endlabel1986: ; -return 18 * 256; +}}}}endlabel2020: ; +return 18 * CYCLE_UNIT / 2; } /* CHK.L (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_413b_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_413b_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; { uaecptr oldpc = m68k_getpc(regs); @@ -33444,17 +34027,17 @@ unsigned long REGPARAM2 CPUFUNC(op_413b_3)(uae_u32 opcode, struct regstruct *reg if ((uae_s32)dst < 0) { SET_NFLG (®s->ccrflags, 1); Exception (6, regs, oldpc); - goto endlabel1987; + goto endlabel2021; } else if (dst > src) { SET_NFLG (®s->ccrflags, 0); Exception (6, regs, oldpc); - goto endlabel1987; + goto endlabel2021; } -}}}}endlabel1987: ; -return 18 * 256; +}}}}endlabel2021: ; +return 18 * CYCLE_UNIT / 2; } /* CHK.W (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_41b0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_41b0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -33467,17 +34050,17 @@ unsigned long REGPARAM2 CPUFUNC(op_41b0_3)(uae_u32 opcode, struct regstruct *reg if ((uae_s32)dst < 0) { SET_NFLG (®s->ccrflags, 1); Exception (6, regs, oldpc); - goto endlabel1988; + goto endlabel2022; } else if (dst > src) { SET_NFLG (®s->ccrflags, 0); Exception (6, regs, oldpc); - goto endlabel1988; + goto endlabel2022; } -}}}}endlabel1988: ; -return 14 * 256; +}}}}endlabel2022: ; +return 14 * CYCLE_UNIT / 2; } /* CHK.W (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_41bb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_41bb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; { uaecptr oldpc = m68k_getpc(regs); @@ -33491,17 +34074,17 @@ unsigned long REGPARAM2 CPUFUNC(op_41bb_3)(uae_u32 opcode, struct regstruct *reg if ((uae_s32)dst < 0) { SET_NFLG (®s->ccrflags, 1); Exception (6, regs, oldpc); - goto endlabel1989; + goto endlabel2023; } else if (dst > src) { SET_NFLG (®s->ccrflags, 0); Exception (6, regs, oldpc); - goto endlabel1989; + goto endlabel2023; } -}}}}endlabel1989: ; -return 14 * 256; +}}}}endlabel2023: ; +return 14 * CYCLE_UNIT / 2; } /* LEA.L (d8,An,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_41f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_41f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -33509,10 +34092,10 @@ unsigned long REGPARAM2 CPUFUNC(op_41f0_3)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_iword (regs, 2)); { m68k_areg(regs, dstreg) = (srca); }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* LEA.L (d8,PC,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_41fb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_41fb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -33521,10 +34104,10 @@ unsigned long REGPARAM2 CPUFUNC(op_41fb_3)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_iword (regs, 2)); { m68k_areg(regs, dstreg) = (srca); }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* CLR.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4230_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4230_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -33534,10 +34117,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4230_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(0)) < 0); put_byte (srca,0); }} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* CLR.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4270_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4270_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -33547,13 +34130,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4270_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(0)) < 0); put_word (srca,0); }} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } -#endif - -#ifdef PART_4 /* CLR.L (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_42b0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_42b0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -33563,11 +34143,14 @@ unsigned long REGPARAM2 CPUFUNC(op_42b0_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(0)) < 0); put_long (srca,0); }} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } +#endif + +#ifdef PART_4 /* MVSR2.B (d8,An,Xn) */ #ifndef CPUEMU_68000_ONLY -unsigned long REGPARAM2 CPUFUNC(op_42f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_42f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -33575,11 +34158,11 @@ unsigned long REGPARAM2 CPUFUNC(op_42f0_3)(uae_u32 opcode, struct regstruct *reg MakeSR(regs); put_word (srca,regs->sr & 0xff); }} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } #endif /* NEG.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4430_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4430_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -33596,10 +34179,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4430_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (srca,dst); }}}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* NEG.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4470_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4470_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -33616,10 +34199,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4470_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (srca,dst); }}}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* NEG.L (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_44b0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_44b0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -33636,10 +34219,10 @@ unsigned long REGPARAM2 CPUFUNC(op_44b0_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (srca,dst); }}}}}} m68k_incpc (regs, 4); -return 26 * 256; +return 26 * CYCLE_UNIT / 2; } /* MV2SR.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_44f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_44f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -33650,10 +34233,10 @@ unsigned long REGPARAM2 CPUFUNC(op_44f0_3)(uae_u32 opcode, struct regstruct *reg regs->sr |= src & 0xFF; MakeFromSR(regs); }}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* MV2SR.B (d8,PC,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_44fb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_44fb_4)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr tmppc; uaecptr srca; @@ -33665,10 +34248,10 @@ unsigned long REGPARAM2 CPUFUNC(op_44fb_3)(uae_u32 opcode, struct regstruct *reg regs->sr |= src & 0xFF; MakeFromSR(regs); }}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* NOT.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4630_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4630_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -33680,10 +34263,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4630_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(dst)) < 0); put_byte (srca,dst); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* NOT.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4670_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4670_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -33695,10 +34278,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4670_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(dst)) < 0); put_word (srca,dst); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* NOT.L (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_46b0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_46b0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -33710,26 +34293,26 @@ unsigned long REGPARAM2 CPUFUNC(op_46b0_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(dst)) < 0); put_long (srca,dst); }}}} m68k_incpc (regs, 4); -return 26 * 256; +return 26 * CYCLE_UNIT / 2; } /* MV2SR.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_46f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_46f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel2004; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel2038; } {{ uaecptr srca; srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_iword (regs, 2)); { uae_s16 src = get_word (srca); regs->sr = src; MakeFromSR(regs); }}}} m68k_incpc (regs, 4); -endlabel2004: ; -return 14 * 256; +endlabel2038: ; +return 14 * CYCLE_UNIT / 2; } /* MV2SR.W (d8,PC,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_46fb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_46fb_4)(uae_u32 opcode, struct regstruct *regs) { -{if (!regs->s) { Exception(8, regs, 0); goto endlabel2005; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel2039; } {{ uaecptr tmppc; uaecptr srca; tmppc = m68k_getpc(regs) + 2; @@ -33738,11 +34321,11 @@ unsigned long REGPARAM2 CPUFUNC(op_46fb_3)(uae_u32 opcode, struct regstruct *reg regs->sr = src; MakeFromSR(regs); }}}} m68k_incpc (regs, 4); -endlabel2005: ; -return 14 * 256; +endlabel2039: ; +return 14 * CYCLE_UNIT / 2; } /* NBCD.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4830_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4830_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -33762,10 +34345,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4830_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (srca,newv); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* PEA.L (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4870_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4870_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -33775,10 +34358,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4870_3)(uae_u32 opcode, struct regstruct *reg m68k_areg (regs, 7) = dsta; put_long (dsta,srca); }}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* PEA.L (d8,PC,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_487b_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_487b_4)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr tmppc; uaecptr srca; @@ -33789,10 +34372,10 @@ unsigned long REGPARAM2 CPUFUNC(op_487b_3)(uae_u32 opcode, struct regstruct *reg m68k_areg (regs, 7) = dsta; put_long (dsta,srca); }}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* MVMLE.W #.W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_48b0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_48b0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; { uae_u16 mask = get_iword (regs, 2); @@ -33802,10 +34385,10 @@ unsigned long REGPARAM2 CPUFUNC(op_48b0_3)(uae_u32 opcode, struct regstruct *reg while (dmask) { put_word(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; } while (amask) { put_word(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; } }}} m68k_incpc (regs, 6); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* MVMLE.L #.W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_48f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_48f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; { uae_u16 mask = get_iword (regs, 2); @@ -33815,10 +34398,10 @@ unsigned long REGPARAM2 CPUFUNC(op_48f0_3)(uae_u32 opcode, struct regstruct *reg while (dmask) { put_long(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; } while (amask) { put_long(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; } }}} m68k_incpc (regs, 6); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* TST.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4a30_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4a30_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -33828,10 +34411,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4a30_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); }}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* TST.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4a70_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4a70_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -33841,10 +34424,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4a70_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); }}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* TST.L (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4ab0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4ab0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -33854,10 +34437,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4ab0_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); }}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* TAS.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4af0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4af0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -33869,10 +34452,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4af0_3)(uae_u32 opcode, struct regstruct *reg src |= 0x80; put_byte (srca,src); }}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* MVMEL.W #.W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4cb0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4cb0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; { uae_u16 mask = get_iword (regs, 2); @@ -33882,10 +34465,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4cb0_3)(uae_u32 opcode, struct regstruct *reg { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } }}} m68k_incpc (regs, 6); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* MVMEL.W #.W,(d8,PC,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4cbb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4cbb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = 3; { uae_u16 mask = get_iword (regs, 2); @@ -33897,10 +34480,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4cbb_3)(uae_u32 opcode, struct regstruct *reg { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } }}} m68k_incpc (regs, 6); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* MVMEL.L #.W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4cf0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4cf0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; { uae_u16 mask = get_iword (regs, 2); @@ -33910,10 +34493,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4cf0_3)(uae_u32 opcode, struct regstruct *reg { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } }}} m68k_incpc (regs, 6); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* MVMEL.L #.W,(d8,PC,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4cfb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4cfb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = 3; { uae_u16 mask = get_iword (regs, 2); @@ -33925,10 +34508,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4cfb_3)(uae_u32 opcode, struct regstruct *reg { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } }}} m68k_incpc (regs, 6); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* JSR.L (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4eb0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4eb0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -33936,16 +34519,16 @@ unsigned long REGPARAM2 CPUFUNC(op_4eb0_3)(uae_u32 opcode, struct regstruct *reg { uaecptr oldpc = m68k_getpc(regs) + 4; if (srca & 1) { exception3i (opcode, oldpc, srca); - goto endlabel2019; + goto endlabel2053; } m68k_setpc (regs, srca); m68k_areg (regs, 7) -= 4; put_long (m68k_areg (regs, 7), oldpc); -}}}endlabel2019: ; -return 8 * 256; +}}}endlabel2053: ; +return 8 * CYCLE_UNIT / 2; } /* JSR.L (d8,PC,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4ebb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4ebb_4)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr tmppc; uaecptr srca; @@ -33954,30 +34537,30 @@ unsigned long REGPARAM2 CPUFUNC(op_4ebb_3)(uae_u32 opcode, struct regstruct *reg { uaecptr oldpc = m68k_getpc(regs) + 4; if (srca & 1) { exception3i (opcode, oldpc, srca); - goto endlabel2020; + goto endlabel2054; } m68k_setpc (regs, srca); m68k_areg (regs, 7) -= 4; put_long (m68k_areg (regs, 7), oldpc); -}}}endlabel2020: ; -return 8 * 256; +}}}endlabel2054: ; +return 8 * CYCLE_UNIT / 2; } /* JMP.L (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4ef0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4ef0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_iword (regs, 2)); if (srca & 1) { exception3i (opcode, m68k_getpc(regs) + 6, srca); - goto endlabel2021; + goto endlabel2055; } m68k_setpc(regs, srca); -}}endlabel2021: ; -return 8 * 256; +}}endlabel2055: ; +return 8 * CYCLE_UNIT / 2; } /* JMP.L (d8,PC,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4efb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4efb_4)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr tmppc; uaecptr srca; @@ -33985,14 +34568,14 @@ unsigned long REGPARAM2 CPUFUNC(op_4efb_3)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_iword (regs, 2)); if (srca & 1) { exception3i (opcode, m68k_getpc(regs) + 6, srca); - goto endlabel2022; + goto endlabel2056; } m68k_setpc(regs, srca); -}}endlabel2022: ; -return 8 * 256; +}}endlabel2056: ; +return 8 * CYCLE_UNIT / 2; } /* ADD.B #,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_5030_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5030_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -34011,13 +34594,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5030_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } -#endif - -#ifdef PART_5 /* ADD.W #,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_5070_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5070_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -34036,10 +34616,13 @@ unsigned long REGPARAM2 CPUFUNC(op_5070_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } +#endif + +#ifdef PART_5 /* ADD.L #,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_50b0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_50b0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -34058,10 +34641,10 @@ unsigned long REGPARAM2 CPUFUNC(op_50b0_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 26 * 256; +return 26 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_50f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_50f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -34069,10 +34652,10 @@ unsigned long REGPARAM2 CPUFUNC(op_50f0_3)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 0) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* SUB.B #,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_5130_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5130_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -34091,10 +34674,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5130_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* SUB.W #,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_5170_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5170_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -34113,10 +34696,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5170_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* SUB.L #,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_51b0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_51b0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -34135,10 +34718,10 @@ unsigned long REGPARAM2 CPUFUNC(op_51b0_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 26 * 256; +return 26 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_51f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_51f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -34146,10 +34729,10 @@ unsigned long REGPARAM2 CPUFUNC(op_51f0_3)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 1) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_52f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_52f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -34157,10 +34740,10 @@ unsigned long REGPARAM2 CPUFUNC(op_52f0_3)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 2) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_53f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_53f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -34168,10 +34751,10 @@ unsigned long REGPARAM2 CPUFUNC(op_53f0_3)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 3) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_54f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_54f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -34179,10 +34762,10 @@ unsigned long REGPARAM2 CPUFUNC(op_54f0_3)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 4) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_55f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_55f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -34190,10 +34773,10 @@ unsigned long REGPARAM2 CPUFUNC(op_55f0_3)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 5) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_56f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_56f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -34201,10 +34784,10 @@ unsigned long REGPARAM2 CPUFUNC(op_56f0_3)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 6) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_57f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_57f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -34212,10 +34795,10 @@ unsigned long REGPARAM2 CPUFUNC(op_57f0_3)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 7) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_58f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_58f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -34223,10 +34806,10 @@ unsigned long REGPARAM2 CPUFUNC(op_58f0_3)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 8) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_59f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_59f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -34234,10 +34817,10 @@ unsigned long REGPARAM2 CPUFUNC(op_59f0_3)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 9) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_5af0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5af0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -34245,10 +34828,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5af0_3)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 10) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_5bf0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5bf0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -34256,10 +34839,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5bf0_3)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 11) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_5cf0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5cf0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -34267,10 +34850,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5cf0_3)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 12) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_5df0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5df0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -34278,10 +34861,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5df0_3)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 13) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_5ef0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5ef0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -34289,10 +34872,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5ef0_3)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 14) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_5ff0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5ff0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -34300,343 +34883,343 @@ unsigned long REGPARAM2 CPUFUNC(op_5ff0_3)(uae_u32 opcode, struct regstruct *reg {{ int val = cctrue(®s->ccrflags, 15) ? 0xff : 0; put_byte (srca,val); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_60ff_4)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue(®s->ccrflags, 0)) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); + goto endlabel2079; + } + m68k_incpc (regs, 2); + goto endlabel2079; +{ uae_s32 src = get_ilong (regs, 0); + if (!cctrue(®s->ccrflags, 0)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel2079; + } + m68k_incpc (regs, (uae_s32)src + 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel2079: ; +return 12 * CYCLE_UNIT / 2; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_62ff_4)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue(®s->ccrflags, 2)) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); + goto endlabel2080; + } + m68k_incpc (regs, 2); + goto endlabel2080; +{ uae_s32 src = get_ilong (regs, 0); + if (!cctrue(®s->ccrflags, 2)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel2080; + } + m68k_incpc (regs, (uae_s32)src + 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); +}}endlabel2080: ; +return 12 * CYCLE_UNIT / 2; } #endif #ifdef PART_6 /* Bcc.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_60ff_3)(uae_u32 opcode, struct regstruct *regs) -{ -{ if (cctrue(®s->ccrflags, 0)) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); - goto endlabel2045; - } - m68k_incpc (regs, 2); - goto endlabel2045; -{ uae_s32 src = get_ilong (regs, 0); - if (!cctrue(®s->ccrflags, 0)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel2045; - } - m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 4); -}}endlabel2045: ; -return 12 * 256; -} -/* Bcc.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_62ff_3)(uae_u32 opcode, struct regstruct *regs) -{ -{ if (cctrue(®s->ccrflags, 2)) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); - goto endlabel2046; - } - m68k_incpc (regs, 2); - goto endlabel2046; -{ uae_s32 src = get_ilong (regs, 0); - if (!cctrue(®s->ccrflags, 2)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel2046; - } - m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 4); -}}endlabel2046: ; -return 12 * 256; -} -/* Bcc.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_63ff_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_63ff_4)(uae_u32 opcode, struct regstruct *regs) { { if (cctrue(®s->ccrflags, 3)) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); - goto endlabel2047; + goto endlabel2081; } m68k_incpc (regs, 2); - goto endlabel2047; + goto endlabel2081; { uae_s32 src = get_ilong (regs, 0); if (!cctrue(®s->ccrflags, 3)) goto didnt_jump; if (src & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel2047; + goto endlabel2081; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); -}}endlabel2047: ; -return 12 * 256; +}}endlabel2081: ; +return 12 * CYCLE_UNIT / 2; } /* Bcc.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_64ff_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_64ff_4)(uae_u32 opcode, struct regstruct *regs) { { if (cctrue(®s->ccrflags, 4)) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); - goto endlabel2048; + goto endlabel2082; } m68k_incpc (regs, 2); - goto endlabel2048; + goto endlabel2082; { uae_s32 src = get_ilong (regs, 0); if (!cctrue(®s->ccrflags, 4)) goto didnt_jump; if (src & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel2048; + goto endlabel2082; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); -}}endlabel2048: ; -return 12 * 256; +}}endlabel2082: ; +return 12 * CYCLE_UNIT / 2; } /* Bcc.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_65ff_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_65ff_4)(uae_u32 opcode, struct regstruct *regs) { { if (cctrue(®s->ccrflags, 5)) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); - goto endlabel2049; + goto endlabel2083; } m68k_incpc (regs, 2); - goto endlabel2049; + goto endlabel2083; { uae_s32 src = get_ilong (regs, 0); if (!cctrue(®s->ccrflags, 5)) goto didnt_jump; if (src & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel2049; + goto endlabel2083; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); -}}endlabel2049: ; -return 12 * 256; +}}endlabel2083: ; +return 12 * CYCLE_UNIT / 2; } /* Bcc.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_66ff_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_66ff_4)(uae_u32 opcode, struct regstruct *regs) { { if (cctrue(®s->ccrflags, 6)) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); - goto endlabel2050; + goto endlabel2084; } m68k_incpc (regs, 2); - goto endlabel2050; + goto endlabel2084; { uae_s32 src = get_ilong (regs, 0); if (!cctrue(®s->ccrflags, 6)) goto didnt_jump; if (src & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel2050; + goto endlabel2084; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); -}}endlabel2050: ; -return 12 * 256; +}}endlabel2084: ; +return 12 * CYCLE_UNIT / 2; } /* Bcc.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_67ff_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_67ff_4)(uae_u32 opcode, struct regstruct *regs) { { if (cctrue(®s->ccrflags, 7)) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); - goto endlabel2051; + goto endlabel2085; } m68k_incpc (regs, 2); - goto endlabel2051; + goto endlabel2085; { uae_s32 src = get_ilong (regs, 0); if (!cctrue(®s->ccrflags, 7)) goto didnt_jump; if (src & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel2051; + goto endlabel2085; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); -}}endlabel2051: ; -return 12 * 256; +}}endlabel2085: ; +return 12 * CYCLE_UNIT / 2; } /* Bcc.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_68ff_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_68ff_4)(uae_u32 opcode, struct regstruct *regs) { { if (cctrue(®s->ccrflags, 8)) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); - goto endlabel2052; + goto endlabel2086; } m68k_incpc (regs, 2); - goto endlabel2052; + goto endlabel2086; { uae_s32 src = get_ilong (regs, 0); if (!cctrue(®s->ccrflags, 8)) goto didnt_jump; if (src & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel2052; + goto endlabel2086; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); -}}endlabel2052: ; -return 12 * 256; +}}endlabel2086: ; +return 12 * CYCLE_UNIT / 2; } /* Bcc.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_69ff_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_69ff_4)(uae_u32 opcode, struct regstruct *regs) { { if (cctrue(®s->ccrflags, 9)) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); - goto endlabel2053; + goto endlabel2087; } m68k_incpc (regs, 2); - goto endlabel2053; + goto endlabel2087; { uae_s32 src = get_ilong (regs, 0); if (!cctrue(®s->ccrflags, 9)) goto didnt_jump; if (src & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel2053; + goto endlabel2087; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); -}}endlabel2053: ; -return 12 * 256; +}}endlabel2087: ; +return 12 * CYCLE_UNIT / 2; } /* Bcc.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_6aff_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_6aff_4)(uae_u32 opcode, struct regstruct *regs) { { if (cctrue(®s->ccrflags, 10)) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); - goto endlabel2054; + goto endlabel2088; } m68k_incpc (regs, 2); - goto endlabel2054; + goto endlabel2088; { uae_s32 src = get_ilong (regs, 0); if (!cctrue(®s->ccrflags, 10)) goto didnt_jump; if (src & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel2054; + goto endlabel2088; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); -}}endlabel2054: ; -return 12 * 256; +}}endlabel2088: ; +return 12 * CYCLE_UNIT / 2; } /* Bcc.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_6bff_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_6bff_4)(uae_u32 opcode, struct regstruct *regs) { { if (cctrue(®s->ccrflags, 11)) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); - goto endlabel2055; + goto endlabel2089; } m68k_incpc (regs, 2); - goto endlabel2055; + goto endlabel2089; { uae_s32 src = get_ilong (regs, 0); if (!cctrue(®s->ccrflags, 11)) goto didnt_jump; if (src & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel2055; + goto endlabel2089; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); -}}endlabel2055: ; -return 12 * 256; +}}endlabel2089: ; +return 12 * CYCLE_UNIT / 2; } /* Bcc.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_6cff_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_6cff_4)(uae_u32 opcode, struct regstruct *regs) { { if (cctrue(®s->ccrflags, 12)) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); - goto endlabel2056; + goto endlabel2090; } m68k_incpc (regs, 2); - goto endlabel2056; + goto endlabel2090; { uae_s32 src = get_ilong (regs, 0); if (!cctrue(®s->ccrflags, 12)) goto didnt_jump; if (src & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel2056; + goto endlabel2090; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); -}}endlabel2056: ; -return 12 * 256; +}}endlabel2090: ; +return 12 * CYCLE_UNIT / 2; } /* Bcc.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_6dff_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_6dff_4)(uae_u32 opcode, struct regstruct *regs) { { if (cctrue(®s->ccrflags, 13)) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); - goto endlabel2057; + goto endlabel2091; } m68k_incpc (regs, 2); - goto endlabel2057; + goto endlabel2091; { uae_s32 src = get_ilong (regs, 0); if (!cctrue(®s->ccrflags, 13)) goto didnt_jump; if (src & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel2057; + goto endlabel2091; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); -}}endlabel2057: ; -return 12 * 256; +}}endlabel2091: ; +return 12 * CYCLE_UNIT / 2; } /* Bcc.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_6eff_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_6eff_4)(uae_u32 opcode, struct regstruct *regs) { { if (cctrue(®s->ccrflags, 14)) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); - goto endlabel2058; + goto endlabel2092; } m68k_incpc (regs, 2); - goto endlabel2058; + goto endlabel2092; { uae_s32 src = get_ilong (regs, 0); if (!cctrue(®s->ccrflags, 14)) goto didnt_jump; if (src & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel2058; + goto endlabel2092; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); -}}endlabel2058: ; -return 12 * 256; +}}endlabel2092: ; +return 12 * CYCLE_UNIT / 2; } /* Bcc.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_6fff_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_6fff_4)(uae_u32 opcode, struct regstruct *regs) { { if (cctrue(®s->ccrflags, 15)) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); - goto endlabel2059; + goto endlabel2093; } m68k_incpc (regs, 2); - goto endlabel2059; + goto endlabel2093; { uae_s32 src = get_ilong (regs, 0); if (!cctrue(®s->ccrflags, 15)) goto didnt_jump; if (src & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel2059; + goto endlabel2093; } m68k_incpc (regs, (uae_s32)src + 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); -}}endlabel2059: ; -return 12 * 256; +}}endlabel2093: ; +return 12 * CYCLE_UNIT / 2; } /* OR.B (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_8030_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_8030_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -34650,10 +35233,10 @@ unsigned long REGPARAM2 CPUFUNC(op_8030_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* OR.B (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_803b_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_803b_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -34668,10 +35251,10 @@ unsigned long REGPARAM2 CPUFUNC(op_803b_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* OR.W (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_8070_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_8070_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -34685,10 +35268,10 @@ unsigned long REGPARAM2 CPUFUNC(op_8070_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* OR.W (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_807b_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_807b_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -34703,10 +35286,10 @@ unsigned long REGPARAM2 CPUFUNC(op_807b_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* OR.L (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_80b0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_80b0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -34720,10 +35303,10 @@ unsigned long REGPARAM2 CPUFUNC(op_80b0_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* OR.L (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_80bb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_80bb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -34738,10 +35321,10 @@ unsigned long REGPARAM2 CPUFUNC(op_80bb_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* DIVU.W (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_80f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_80f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -34756,7 +35339,7 @@ unsigned long REGPARAM2 CPUFUNC(op_80f0_3)(uae_u32 opcode, struct regstruct *reg if (dst < 0) SET_NFLG (®s->ccrflags, 1); m68k_incpc (regs, 4); Exception (5, regs, oldpc); - goto endlabel2066; + goto endlabel2100; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; @@ -34772,11 +35355,11 @@ unsigned long REGPARAM2 CPUFUNC(op_80f0_3)(uae_u32 opcode, struct regstruct *reg } m68k_incpc (regs, 4); } -}}}}endlabel2066: ; -return 120 * 256; +}}}}endlabel2100: ; +return 120 * CYCLE_UNIT / 2; } /* DIVU.W (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_80fb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_80fb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; { uaecptr oldpc = m68k_getpc(regs); @@ -34792,7 +35375,7 @@ unsigned long REGPARAM2 CPUFUNC(op_80fb_3)(uae_u32 opcode, struct regstruct *reg if (dst < 0) SET_NFLG (®s->ccrflags, 1); m68k_incpc (regs, 4); Exception (5, regs, oldpc); - goto endlabel2067; + goto endlabel2101; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; @@ -34808,11 +35391,11 @@ unsigned long REGPARAM2 CPUFUNC(op_80fb_3)(uae_u32 opcode, struct regstruct *reg } m68k_incpc (regs, 4); } -}}}}endlabel2067: ; -return 120 * 256; +}}}}endlabel2101: ; +return 120 * CYCLE_UNIT / 2; } /* OR.B Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_8130_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_8130_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -34826,10 +35409,10 @@ unsigned long REGPARAM2 CPUFUNC(op_8130_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* OR.W Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_8170_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_8170_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -34843,10 +35426,10 @@ unsigned long REGPARAM2 CPUFUNC(op_8170_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* OR.L Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_81b0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_81b0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -34860,10 +35443,10 @@ unsigned long REGPARAM2 CPUFUNC(op_81b0_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 4); -return 26 * 256; +return 26 * CYCLE_UNIT / 2; } /* DIVS.W (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_81f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_81f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -34878,7 +35461,7 @@ unsigned long REGPARAM2 CPUFUNC(op_81f0_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, 1); m68k_incpc (regs, 4); Exception (5, regs, oldpc); - goto endlabel2071; + goto endlabel2105; } else { uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; @@ -34895,11 +35478,11 @@ unsigned long REGPARAM2 CPUFUNC(op_81f0_3)(uae_u32 opcode, struct regstruct *reg } m68k_incpc (regs, 4); } -}}}}endlabel2071: ; -return 152 * 256; +}}}}endlabel2105: ; +return 152 * CYCLE_UNIT / 2; } /* DIVS.W (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_81fb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_81fb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; { uaecptr oldpc = m68k_getpc(regs); @@ -34915,7 +35498,7 @@ unsigned long REGPARAM2 CPUFUNC(op_81fb_3)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, 1); m68k_incpc (regs, 4); Exception (5, regs, oldpc); - goto endlabel2072; + goto endlabel2106; } else { uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; @@ -34932,11 +35515,11 @@ unsigned long REGPARAM2 CPUFUNC(op_81fb_3)(uae_u32 opcode, struct regstruct *reg } m68k_incpc (regs, 4); } -}}}}endlabel2072: ; -return 152 * 256; +}}}}endlabel2106: ; +return 152 * CYCLE_UNIT / 2; } /* SUB.B (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_9030_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9030_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -34955,10 +35538,10 @@ unsigned long REGPARAM2 CPUFUNC(op_9030_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* SUB.B (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_903b_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_903b_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -34978,10 +35561,10 @@ unsigned long REGPARAM2 CPUFUNC(op_903b_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* SUB.W (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_9070_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9070_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35000,10 +35583,10 @@ unsigned long REGPARAM2 CPUFUNC(op_9070_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* SUB.W (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_907b_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_907b_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -35023,10 +35606,10 @@ unsigned long REGPARAM2 CPUFUNC(op_907b_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* SUB.L (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_90b0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_90b0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35045,10 +35628,10 @@ unsigned long REGPARAM2 CPUFUNC(op_90b0_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* SUB.L (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_90bb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_90bb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -35068,10 +35651,10 @@ unsigned long REGPARAM2 CPUFUNC(op_90bb_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* SUBA.W (d8,An,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_90f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_90f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35082,10 +35665,10 @@ unsigned long REGPARAM2 CPUFUNC(op_90f0_3)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* SUBA.W (d8,PC,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_90fb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_90fb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -35097,10 +35680,10 @@ unsigned long REGPARAM2 CPUFUNC(op_90fb_3)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* SUB.B Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_9130_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9130_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -35119,10 +35702,10 @@ unsigned long REGPARAM2 CPUFUNC(op_9130_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* SUB.W Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_9170_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9170_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -35141,10 +35724,10 @@ unsigned long REGPARAM2 CPUFUNC(op_9170_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* SUB.L Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_91b0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_91b0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -35163,10 +35746,10 @@ unsigned long REGPARAM2 CPUFUNC(op_91b0_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 26 * 256; +return 26 * CYCLE_UNIT / 2; } /* SUBA.L (d8,An,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_91f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_91f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35177,10 +35760,10 @@ unsigned long REGPARAM2 CPUFUNC(op_91f0_3)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* SUBA.L (d8,PC,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_91fb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_91fb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -35192,10 +35775,10 @@ unsigned long REGPARAM2 CPUFUNC(op_91fb_3)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* CMP.B (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b030_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b030_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35212,10 +35795,10 @@ unsigned long REGPARAM2 CPUFUNC(op_b030_3)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* CMP.B (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b03b_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b03b_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -35233,54 +35816,54 @@ unsigned long REGPARAM2 CPUFUNC(op_b03b_3)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; +} +/* CMP.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b070_4)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg(regs, dstreg); +{{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); +{ int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}}} m68k_incpc (regs, 4); +return 14 * CYCLE_UNIT / 2; +} +/* CMP.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b07b_4)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc(regs) + 2; + srca = get_disp_ea_000(regs, tmppc, get_iword (regs, 2)); +{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg(regs, dstreg); +{{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); +{ int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}}} m68k_incpc (regs, 4); +return 14 * CYCLE_UNIT / 2; } #endif #ifdef PART_7 -/* CMP.W (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b070_3)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca; - srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_iword (regs, 2)); -{ uae_s16 src = get_word (srca); -{ uae_s16 dst = m68k_dreg(regs, dstreg); -{{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); -{ int flgs = ((uae_s16)(src)) < 0; - int flgo = ((uae_s16)(dst)) < 0; - int flgn = ((uae_s16)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}} m68k_incpc (regs, 4); -return 14 * 256; -} -/* CMP.W (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b07b_3)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr tmppc; - uaecptr srca; - tmppc = m68k_getpc(regs) + 2; - srca = get_disp_ea_000(regs, tmppc, get_iword (regs, 2)); -{ uae_s16 src = get_word (srca); -{ uae_s16 dst = m68k_dreg(regs, dstreg); -{{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); -{ int flgs = ((uae_s16)(src)) < 0; - int flgo = ((uae_s16)(dst)) < 0; - int flgn = ((uae_s16)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}} m68k_incpc (regs, 4); -return 14 * 256; -} /* CMP.L (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b0b0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b0b0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35297,10 +35880,10 @@ unsigned long REGPARAM2 CPUFUNC(op_b0b0_3)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* CMP.L (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b0bb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b0bb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -35318,10 +35901,10 @@ unsigned long REGPARAM2 CPUFUNC(op_b0bb_3)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* CMPA.W (d8,An,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_b0f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b0f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35338,10 +35921,10 @@ unsigned long REGPARAM2 CPUFUNC(op_b0f0_3)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* CMPA.W (d8,PC,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_b0fb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b0fb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -35359,10 +35942,10 @@ unsigned long REGPARAM2 CPUFUNC(op_b0fb_3)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* EOR.B Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_b130_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b130_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -35376,10 +35959,10 @@ unsigned long REGPARAM2 CPUFUNC(op_b130_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* EOR.W Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_b170_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b170_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -35393,10 +35976,10 @@ unsigned long REGPARAM2 CPUFUNC(op_b170_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* EOR.L Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_b1b0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b1b0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -35410,10 +35993,10 @@ unsigned long REGPARAM2 CPUFUNC(op_b1b0_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 4); -return 26 * 256; +return 26 * CYCLE_UNIT / 2; } /* CMPA.L (d8,An,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_b1f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b1f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35430,10 +36013,10 @@ unsigned long REGPARAM2 CPUFUNC(op_b1f0_3)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* CMPA.L (d8,PC,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_b1fb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b1fb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -35451,10 +36034,10 @@ unsigned long REGPARAM2 CPUFUNC(op_b1fb_3)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* AND.B (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c030_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c030_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35468,10 +36051,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c030_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* AND.B (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c03b_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c03b_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -35486,10 +36069,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c03b_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* AND.W (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c070_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c070_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35503,10 +36086,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c070_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* AND.W (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c07b_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c07b_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -35521,10 +36104,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c07b_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* AND.L (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c0b0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c0b0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35538,10 +36121,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c0b0_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* AND.L (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c0bb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c0bb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -35556,10 +36139,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c0bb_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* MULU.W (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c0f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c0f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35573,10 +36156,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c0f0_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); m68k_incpc (regs, 4); -}}}}}return 68 * 256; +}}}}}return 68 * CYCLE_UNIT / 2; } /* MULU.W (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c0fb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c0fb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -35591,10 +36174,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c0fb_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); m68k_incpc (regs, 4); -}}}}}return 68 * 256; +}}}}}return 68 * CYCLE_UNIT / 2; } /* AND.B Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_c130_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c130_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -35608,10 +36191,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c130_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); put_byte (dsta,src); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* AND.W Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_c170_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c170_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -35625,10 +36208,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c170_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); put_word (dsta,src); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* AND.L Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_c1b0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c1b0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -35642,10 +36225,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c1b0_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); put_long (dsta,src); }}}} m68k_incpc (regs, 4); -return 26 * 256; +return 26 * CYCLE_UNIT / 2; } /* MULS.W (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c1f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c1f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35659,10 +36242,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c1f0_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 4); -return 68 * 256; +return 68 * CYCLE_UNIT / 2; } /* MULS.W (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c1fb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c1fb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -35677,10 +36260,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c1fb_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 4); -return 68 * 256; +return 68 * CYCLE_UNIT / 2; } /* ADD.B (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d030_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d030_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35699,10 +36282,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d030_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* ADD.B (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d03b_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d03b_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -35722,10 +36305,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d03b_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* ADD.W (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d070_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d070_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35744,10 +36327,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d070_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* ADD.W (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d07b_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d07b_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -35767,10 +36350,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d07b_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* ADD.L (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d0b0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d0b0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35789,10 +36372,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d0b0_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* ADD.L (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d0bb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d0bb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -35812,10 +36395,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d0bb_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* ADDA.W (d8,An,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_d0f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d0f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35826,10 +36409,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d0f0_3)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* ADDA.W (d8,PC,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_d0fb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d0fb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -35841,10 +36424,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d0fb_3)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* ADD.B Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_d130_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d130_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -35863,10 +36446,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d130_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* ADD.W Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_d170_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d170_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -35885,10 +36468,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d170_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* ADD.L Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_d1b0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d1b0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -35907,13 +36490,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d1b0_3)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 26 * 256; +return 26 * CYCLE_UNIT / 2; } -#endif - -#ifdef PART_8 /* ADDA.L (d8,An,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_d1f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d1f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35924,10 +36504,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d1f0_3)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* ADDA.L (d8,PC,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_d1fb_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d1fb_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -35939,10 +36519,13 @@ unsigned long REGPARAM2 CPUFUNC(op_d1fb_3)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } +#endif + +#ifdef PART_8 /* ASRW.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_e0f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e0f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr dataa; @@ -35959,10 +36542,10 @@ unsigned long REGPARAM2 CPUFUNC(op_e0f0_3)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* ASLW.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_e1f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e1f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr dataa; @@ -35981,10 +36564,10 @@ unsigned long REGPARAM2 CPUFUNC(op_e1f0_3)(uae_u32 opcode, struct regstruct *reg SET_VFLG (®s->ccrflags, GET_VFLG (®s->ccrflags) | (sign2 != sign)); put_word (dataa,val); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* LSRW.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_e2f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e2f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr dataa; @@ -36000,10 +36583,10 @@ SET_CFLG (®s->ccrflags, carry); COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* LSLW.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_e3f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e3f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr dataa; @@ -36019,10 +36602,10 @@ SET_CFLG (®s->ccrflags, carry >> 15); COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* ROXRW.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_e4f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e4f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr dataa; @@ -36039,10 +36622,10 @@ SET_CFLG (®s->ccrflags, carry); COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* ROXLW.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_e5f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e5f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr dataa; @@ -36059,10 +36642,10 @@ SET_CFLG (®s->ccrflags, carry >> 15); COPY_CARRY (®s->ccrflags); put_word (dataa,val); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* RORW.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_e6f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e6f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr dataa; @@ -36078,10 +36661,10 @@ unsigned long REGPARAM2 CPUFUNC(op_e6f0_3)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, carry); put_word (dataa,val); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* ROLW.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_e7f0_3)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e7f0_4)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr dataa; @@ -36097,7 +36680,7 @@ unsigned long REGPARAM2 CPUFUNC(op_e7f0_3)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, carry >> 15); put_word (dataa,val); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } #endif @@ -36121,26 +36704,26 @@ return 18 * 256; #ifdef PART_3 /* MVSR2.W Dn */ -unsigned long REGPARAM2 CPUFUNC(op_40c0_4)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_40c0_5)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ MakeSR(regs); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs->sr) & 0xffff); }} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* MVSR2.W (An) */ -unsigned long REGPARAM2 CPUFUNC(op_40d0_4)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_40d0_5)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); MakeSR(regs); put_word (srca,regs->sr); }} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* MVSR2.W (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_40d8_4)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_40d8_5)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -36148,10 +36731,10 @@ unsigned long REGPARAM2 CPUFUNC(op_40d8_4)(uae_u32 opcode, struct regstruct *reg MakeSR(regs); put_word (srca,regs->sr); }} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* MVSR2.W -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_40e0_4)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_40e0_5)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -36160,20 +36743,20 @@ unsigned long REGPARAM2 CPUFUNC(op_40e0_4)(uae_u32 opcode, struct regstruct *reg MakeSR(regs); put_word (srca,regs->sr); }} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* MVSR2.W (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_40e8_4)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_40e8_5)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword (regs, 2); MakeSR(regs); put_word (srca,regs->sr); }} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* MVSR2.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_40f0_4)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_40f0_5)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -36181,33 +36764,33 @@ unsigned long REGPARAM2 CPUFUNC(op_40f0_4)(uae_u32 opcode, struct regstruct *reg MakeSR(regs); put_word (srca,regs->sr); }} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* MVSR2.W (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_40f8_4)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_40f8_5)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_iword (regs, 2); MakeSR(regs); put_word (srca,regs->sr); }} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* MVSR2.W (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_40f9_4)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_40f9_5)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_ilong (regs, 2); MakeSR(regs); put_word (srca,regs->sr); }} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } #endif #ifdef PART_4 /* RTE.L */ -unsigned long REGPARAM2 CPUFUNC(op_4e73_4)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4e73_5)(uae_u32 opcode, struct regstruct *regs) { -{if (!regs->s) { Exception(8, regs, 0); goto endlabel2141; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel2175; } {{ uaecptr sra = m68k_areg(regs, 7); { uae_s16 sr = get_word (sra); m68k_areg(regs, 7) += 2; @@ -36216,8 +36799,8 @@ unsigned long REGPARAM2 CPUFUNC(op_4e73_4)(uae_u32 opcode, struct regstruct *reg m68k_areg(regs, 7) += 4; regs->sr = sr; m68k_setpc(regs, pc); MakeFromSR(regs); -}}}}}}endlabel2141: ; -return 16 * 256; +}}}}}}endlabel2175: ; +return 16 * CYCLE_UNIT / 2; } #endif diff --git a/src/cpuemu_5.cpp b/src/cpuemu_11.cpp similarity index 82% rename from src/cpuemu_5.cpp rename to src/cpuemu_11.cpp index 34b7d110..9eb8eb54 100644 --- a/src/cpuemu_5.cpp +++ b/src/cpuemu_11.cpp @@ -27,7 +27,7 @@ #ifdef PART_1 /* OR.B #.B,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_0000_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0000_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -40,10 +40,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0000_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* OR.B #.B,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0010_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0010_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -57,10 +57,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0010_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); put_byte (dsta,src); }}}} m68k_incpc (regs, 4); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* OR.B #.B,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_0018_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0018_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -75,10 +75,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0018_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); put_byte (dsta,src); }}}} m68k_incpc (regs, 4); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* OR.B #.B,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0020_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0020_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -94,10 +94,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0020_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); put_byte (dsta,src); }}}} m68k_incpc (regs, 4); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* OR.B #.B,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_0028_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0028_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -111,10 +111,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0028_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); put_byte (dsta,src); }}}} m68k_incpc (regs, 6); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* OR.B #.B,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0030_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0030_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -129,10 +129,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0030_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); put_byte (dsta,src); }}}} m68k_incpc (regs, 6); -return 26 * 256; +return 26 * CYCLE_UNIT / 2; } /* OR.B #.B,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_0038_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0038_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); @@ -145,10 +145,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0038_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); put_byte (dsta,src); }}}} m68k_incpc (regs, 6); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* OR.B #.B,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_0039_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0039_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); { uaecptr dsta = get_long_prefetch (regs, 6); @@ -161,10 +161,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0039_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 10); put_byte (dsta,src); }}}} m68k_incpc (regs, 8); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* ORSR.B #.W */ -unsigned long REGPARAM2 CPUFUNC(op_003c_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_003c_11)(uae_u32 opcode, struct regstruct *regs) { { MakeSR(regs); { uae_s16 src = get_word_prefetch (regs, 4); @@ -174,10 +174,10 @@ unsigned long REGPARAM2 CPUFUNC(op_003c_5)(uae_u32 opcode, struct regstruct *reg regs->sr |= src; MakeFromSR(regs); }} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* OR.W #.W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_0040_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0040_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -190,17 +190,17 @@ unsigned long REGPARAM2 CPUFUNC(op_0040_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* OR.W #.W,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0050_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0050_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2152; + goto endlabel2186; } {{ uae_s16 dst = get_word (dsta); src |= dst; @@ -211,18 +211,18 @@ unsigned long REGPARAM2 CPUFUNC(op_0050_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); put_word (dsta,src); }}}}} m68k_incpc (regs, 4); -endlabel2152: ; -return 16 * 256; +endlabel2186: ; +return 16 * CYCLE_UNIT / 2; } /* OR.W #.W,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_0058_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0058_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2153; + goto endlabel2187; } {{ uae_s16 dst = get_word (dsta); m68k_areg(regs, dstreg) += 2; @@ -234,11 +234,11 @@ unsigned long REGPARAM2 CPUFUNC(op_0058_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); put_word (dsta,src); }}}}} m68k_incpc (regs, 4); -endlabel2153: ; -return 16 * 256; +endlabel2187: ; +return 16 * CYCLE_UNIT / 2; } /* OR.W #.W,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0060_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0060_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -246,7 +246,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0060_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, dstreg) - 2; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2154; + goto endlabel2188; } {{ uae_s16 dst = get_word (dsta); m68k_areg (regs, dstreg) = dsta; @@ -258,18 +258,18 @@ unsigned long REGPARAM2 CPUFUNC(op_0060_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); put_word (dsta,src); }}}}} m68k_incpc (regs, 4); -endlabel2154: ; -return 18 * 256; +endlabel2188: ; +return 18 * CYCLE_UNIT / 2; } /* OR.W #.W,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_0068_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0068_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2155; + goto endlabel2189; } {{ uae_s16 dst = get_word (dsta); src |= dst; @@ -280,11 +280,11 @@ unsigned long REGPARAM2 CPUFUNC(op_0068_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); put_word (dsta,src); }}}}} m68k_incpc (regs, 6); -endlabel2155: ; -return 20 * 256; +endlabel2189: ; +return 20 * CYCLE_UNIT / 2; } /* OR.W #.W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0070_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0070_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -292,7 +292,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0070_5)(uae_u32 opcode, struct regstruct *reg dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2156; + goto endlabel2190; } {{ uae_s16 dst = get_word (dsta); src |= dst; @@ -303,17 +303,17 @@ unsigned long REGPARAM2 CPUFUNC(op_0070_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); put_word (dsta,src); }}}}} m68k_incpc (regs, 6); -endlabel2156: ; -return 22 * 256; +endlabel2190: ; +return 22 * CYCLE_UNIT / 2; } /* OR.W #.W,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_0078_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0078_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2157; + goto endlabel2191; } {{ uae_s16 dst = get_word (dsta); src |= dst; @@ -324,17 +324,17 @@ unsigned long REGPARAM2 CPUFUNC(op_0078_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); put_word (dsta,src); }}}}} m68k_incpc (regs, 6); -endlabel2157: ; -return 20 * 256; +endlabel2191: ; +return 20 * CYCLE_UNIT / 2; } /* OR.W #.W,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_0079_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0079_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = get_long_prefetch (regs, 6); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2158; + goto endlabel2192; } {{ uae_s16 dst = get_word (dsta); src |= dst; @@ -345,13 +345,13 @@ unsigned long REGPARAM2 CPUFUNC(op_0079_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 10); put_word (dsta,src); }}}}} m68k_incpc (regs, 8); -endlabel2158: ; -return 24 * 256; +endlabel2192: ; +return 24 * CYCLE_UNIT / 2; } /* ORSR.W #.W */ -unsigned long REGPARAM2 CPUFUNC(op_007c_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_007c_11)(uae_u32 opcode, struct regstruct *regs) { -{if (!regs->s) { Exception(8, regs, 0); goto endlabel2159; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel2193; } { MakeSR(regs); { uae_s16 src = get_word_prefetch (regs, 4); regs->ir = regs->irc; @@ -359,11 +359,11 @@ unsigned long REGPARAM2 CPUFUNC(op_007c_5)(uae_u32 opcode, struct regstruct *reg regs->sr |= src; MakeFromSR(regs); }}} m68k_incpc (regs, 4); -endlabel2159: ; -return 8 * 256; +endlabel2193: ; +return 8 * CYCLE_UNIT / 2; } /* OR.L #.L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_0080_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0080_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); @@ -376,17 +376,17 @@ unsigned long REGPARAM2 CPUFUNC(op_0080_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); m68k_dreg(regs, dstreg) = (src); }}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* OR.L #.L,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0090_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0090_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2161; + goto endlabel2195; } {{ uae_s32 dst = get_long (dsta); src |= dst; @@ -397,18 +397,18 @@ unsigned long REGPARAM2 CPUFUNC(op_0090_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); put_long (dsta,src); }}}}} m68k_incpc (regs, 6); -endlabel2161: ; -return 28 * 256; +endlabel2195: ; +return 28 * CYCLE_UNIT / 2; } /* OR.L #.L,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_0098_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0098_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2162; + goto endlabel2196; } {{ uae_s32 dst = get_long (dsta); m68k_areg(regs, dstreg) += 4; @@ -420,11 +420,11 @@ unsigned long REGPARAM2 CPUFUNC(op_0098_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); put_long (dsta,src); }}}}} m68k_incpc (regs, 6); -endlabel2162: ; -return 28 * 256; +endlabel2196: ; +return 28 * CYCLE_UNIT / 2; } /* OR.L #.L,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_00a0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_00a0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); @@ -432,7 +432,7 @@ unsigned long REGPARAM2 CPUFUNC(op_00a0_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, dstreg) - 4; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2163; + goto endlabel2197; } {{ uae_s32 dst = get_long (dsta); m68k_areg (regs, dstreg) = dsta; @@ -444,18 +444,18 @@ unsigned long REGPARAM2 CPUFUNC(op_00a0_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); put_long (dsta,src); }}}}} m68k_incpc (regs, 6); -endlabel2163: ; -return 30 * 256; +endlabel2197: ; +return 30 * CYCLE_UNIT / 2; } /* OR.L #.L,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_00a8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_00a8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 8); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2164; + goto endlabel2198; } {{ uae_s32 dst = get_long (dsta); src |= dst; @@ -466,11 +466,11 @@ unsigned long REGPARAM2 CPUFUNC(op_00a8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 10); put_long (dsta,src); }}}}} m68k_incpc (regs, 8); -endlabel2164: ; -return 32 * 256; +endlabel2198: ; +return 32 * CYCLE_UNIT / 2; } /* OR.L #.L,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_00b0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_00b0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); @@ -478,7 +478,7 @@ unsigned long REGPARAM2 CPUFUNC(op_00b0_5)(uae_u32 opcode, struct regstruct *reg dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 8)); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2165; + goto endlabel2199; } {{ uae_s32 dst = get_long (dsta); src |= dst; @@ -489,17 +489,17 @@ unsigned long REGPARAM2 CPUFUNC(op_00b0_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 10); put_long (dsta,src); }}}}} m68k_incpc (regs, 8); -endlabel2165: ; -return 34 * 256; +endlabel2199: ; +return 34 * CYCLE_UNIT / 2; } /* OR.L #.L,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_00b8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_00b8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 8); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2166; + goto endlabel2200; } {{ uae_s32 dst = get_long (dsta); src |= dst; @@ -510,17 +510,17 @@ unsigned long REGPARAM2 CPUFUNC(op_00b8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 10); put_long (dsta,src); }}}}} m68k_incpc (regs, 8); -endlabel2166: ; -return 32 * 256; +endlabel2200: ; +return 32 * CYCLE_UNIT / 2; } /* OR.L #.L,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_00b9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_00b9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = get_long_prefetch (regs, 8); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2167; + goto endlabel2201; } {{ uae_s32 dst = get_long (dsta); src |= dst; @@ -531,11 +531,11 @@ unsigned long REGPARAM2 CPUFUNC(op_00b9_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 12); put_long (dsta,src); }}}}} m68k_incpc (regs, 10); -endlabel2167: ; -return 36 * 256; +endlabel2201: ; +return 36 * CYCLE_UNIT / 2; } /* BTST.L Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_0100_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0100_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -546,10 +546,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0100_5)(uae_u32 opcode, struct regstruct *reg src &= 31; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* MVPMR.W (d16,An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_0108_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0108_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -559,10 +559,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0108_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* BTST.B Dn,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0110_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0110_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -574,10 +574,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0110_5)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* BTST.B Dn,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_0118_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0118_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -590,10 +590,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0118_5)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* BTST.B Dn,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0120_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0120_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -607,10 +607,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0120_5)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* BTST.B Dn,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_0128_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0128_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -622,10 +622,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0128_5)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* BTST.B Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0130_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0130_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -638,10 +638,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0130_5)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* BTST.B Dn,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_0138_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0138_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -652,10 +652,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0138_5)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* BTST.B Dn,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_0139_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0139_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -666,10 +666,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0139_5)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BTST.B Dn,(d16,PC) */ -unsigned long REGPARAM2 CPUFUNC(op_013a_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_013a_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 2; @@ -682,10 +682,10 @@ unsigned long REGPARAM2 CPUFUNC(op_013a_5)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* BTST.B Dn,(d8,PC,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_013b_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_013b_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 3; @@ -700,10 +700,10 @@ unsigned long REGPARAM2 CPUFUNC(op_013b_5)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* BTST.B Dn,#.B */ -unsigned long REGPARAM2 CPUFUNC(op_013c_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_013c_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -713,10 +713,10 @@ unsigned long REGPARAM2 CPUFUNC(op_013c_5)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* BCHG.L Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_0140_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0140_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -729,10 +729,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0140_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); m68k_dreg(regs, dstreg) = (dst); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* MVPMR.L (d16,An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_0148_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0148_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -743,10 +743,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0148_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (val); }} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* BCHG.B Dn,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0150_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0150_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -760,10 +760,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0150_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* BCHG.B Dn,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_0158_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0158_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -778,10 +778,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0158_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* BCHG.B Dn,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0160_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0160_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -797,10 +797,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0160_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* BCHG.B Dn,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_0168_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0168_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -814,10 +814,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0168_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BCHG.B Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0170_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0170_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -832,10 +832,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0170_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* BCHG.B Dn,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_0178_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0178_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -848,10 +848,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0178_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BCHG.B Dn,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_0179_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0179_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -864,10 +864,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0179_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* BCHG.B Dn,(d16,PC) */ -unsigned long REGPARAM2 CPUFUNC(op_017a_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_017a_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 2; @@ -882,10 +882,10 @@ unsigned long REGPARAM2 CPUFUNC(op_017a_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BCHG.B Dn,(d8,PC,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_017b_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_017b_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 3; @@ -902,10 +902,10 @@ unsigned long REGPARAM2 CPUFUNC(op_017b_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* BCLR.L Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_0180_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0180_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -918,10 +918,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0180_5)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); m68k_dreg(regs, dstreg) = (dst); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* MVPRM.W Dn,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_0188_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0188_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -931,10 +931,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0188_5)(uae_u32 opcode, struct regstruct *reg regs->ir = regs->irc; get_word_prefetch (regs, 6); }} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* BCLR.B Dn,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0190_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0190_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -948,10 +948,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0190_5)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* BCLR.B Dn,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_0198_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0198_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -966,10 +966,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0198_5)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* BCLR.B Dn,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_01a0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_01a0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -985,10 +985,10 @@ unsigned long REGPARAM2 CPUFUNC(op_01a0_5)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* BCLR.B Dn,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_01a8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_01a8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -1002,10 +1002,10 @@ unsigned long REGPARAM2 CPUFUNC(op_01a8_5)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BCLR.B Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_01b0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_01b0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -1020,10 +1020,10 @@ unsigned long REGPARAM2 CPUFUNC(op_01b0_5)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* BCLR.B Dn,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_01b8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_01b8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -1036,10 +1036,10 @@ unsigned long REGPARAM2 CPUFUNC(op_01b8_5)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BCLR.B Dn,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_01b9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_01b9_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -1052,10 +1052,10 @@ unsigned long REGPARAM2 CPUFUNC(op_01b9_5)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* BCLR.B Dn,(d16,PC) */ -unsigned long REGPARAM2 CPUFUNC(op_01ba_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_01ba_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 2; @@ -1070,10 +1070,10 @@ unsigned long REGPARAM2 CPUFUNC(op_01ba_5)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BCLR.B Dn,(d8,PC,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_01bb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_01bb_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 3; @@ -1090,10 +1090,10 @@ unsigned long REGPARAM2 CPUFUNC(op_01bb_5)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* BSET.L Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_01c0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_01c0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -1106,10 +1106,10 @@ unsigned long REGPARAM2 CPUFUNC(op_01c0_5)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); m68k_dreg(regs, dstreg) = (dst); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* MVPRM.L Dn,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_01c8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_01c8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -1120,10 +1120,10 @@ unsigned long REGPARAM2 CPUFUNC(op_01c8_5)(uae_u32 opcode, struct regstruct *reg regs->ir = regs->irc; get_word_prefetch (regs, 6); }} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* BSET.B Dn,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_01d0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_01d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -1137,10 +1137,10 @@ unsigned long REGPARAM2 CPUFUNC(op_01d0_5)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* BSET.B Dn,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_01d8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_01d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -1155,10 +1155,10 @@ unsigned long REGPARAM2 CPUFUNC(op_01d8_5)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* BSET.B Dn,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_01e0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_01e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -1174,10 +1174,10 @@ unsigned long REGPARAM2 CPUFUNC(op_01e0_5)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* BSET.B Dn,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_01e8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_01e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -1191,10 +1191,10 @@ unsigned long REGPARAM2 CPUFUNC(op_01e8_5)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BSET.B Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_01f0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_01f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -1209,10 +1209,10 @@ unsigned long REGPARAM2 CPUFUNC(op_01f0_5)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* BSET.B Dn,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_01f8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_01f8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -1225,10 +1225,10 @@ unsigned long REGPARAM2 CPUFUNC(op_01f8_5)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BSET.B Dn,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_01f9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_01f9_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -1241,10 +1241,10 @@ unsigned long REGPARAM2 CPUFUNC(op_01f9_5)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* BSET.B Dn,(d16,PC) */ -unsigned long REGPARAM2 CPUFUNC(op_01fa_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_01fa_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 2; @@ -1259,10 +1259,10 @@ unsigned long REGPARAM2 CPUFUNC(op_01fa_5)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BSET.B Dn,(d8,PC,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_01fb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_01fb_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 3; @@ -1279,10 +1279,10 @@ unsigned long REGPARAM2 CPUFUNC(op_01fb_5)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* AND.B #.B,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_0200_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0200_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -1295,10 +1295,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0200_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* AND.B #.B,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0210_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0210_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -1312,10 +1312,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0210_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); put_byte (dsta,src); }}}} m68k_incpc (regs, 4); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* AND.B #.B,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_0218_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0218_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -1330,10 +1330,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0218_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); put_byte (dsta,src); }}}} m68k_incpc (regs, 4); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* AND.B #.B,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0220_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0220_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -1349,10 +1349,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0220_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); put_byte (dsta,src); }}}} m68k_incpc (regs, 4); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* AND.B #.B,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_0228_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0228_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -1366,10 +1366,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0228_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); put_byte (dsta,src); }}}} m68k_incpc (regs, 6); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* AND.B #.B,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0230_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0230_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -1384,10 +1384,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0230_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); put_byte (dsta,src); }}}} m68k_incpc (regs, 6); -return 26 * 256; +return 26 * CYCLE_UNIT / 2; } /* AND.B #.B,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_0238_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0238_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); @@ -1400,10 +1400,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0238_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); put_byte (dsta,src); }}}} m68k_incpc (regs, 6); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* AND.B #.B,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_0239_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0239_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); { uaecptr dsta = get_long_prefetch (regs, 6); @@ -1416,10 +1416,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0239_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 10); put_byte (dsta,src); }}}} m68k_incpc (regs, 8); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* ANDSR.B #.W */ -unsigned long REGPARAM2 CPUFUNC(op_023c_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_023c_11)(uae_u32 opcode, struct regstruct *regs) { { MakeSR(regs); { uae_s16 src = get_word_prefetch (regs, 4); @@ -1429,10 +1429,10 @@ unsigned long REGPARAM2 CPUFUNC(op_023c_5)(uae_u32 opcode, struct regstruct *reg regs->sr &= src; MakeFromSR(regs); }} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* AND.W #.W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_0240_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0240_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -1445,17 +1445,17 @@ unsigned long REGPARAM2 CPUFUNC(op_0240_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* AND.W #.W,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0250_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0250_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2223; + goto endlabel2257; } {{ uae_s16 dst = get_word (dsta); src &= dst; @@ -1466,18 +1466,18 @@ unsigned long REGPARAM2 CPUFUNC(op_0250_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); put_word (dsta,src); }}}}} m68k_incpc (regs, 4); -endlabel2223: ; -return 16 * 256; +endlabel2257: ; +return 16 * CYCLE_UNIT / 2; } /* AND.W #.W,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_0258_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0258_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2224; + goto endlabel2258; } {{ uae_s16 dst = get_word (dsta); m68k_areg(regs, dstreg) += 2; @@ -1489,11 +1489,11 @@ unsigned long REGPARAM2 CPUFUNC(op_0258_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); put_word (dsta,src); }}}}} m68k_incpc (regs, 4); -endlabel2224: ; -return 16 * 256; +endlabel2258: ; +return 16 * CYCLE_UNIT / 2; } /* AND.W #.W,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0260_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0260_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -1501,7 +1501,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0260_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, dstreg) - 2; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2225; + goto endlabel2259; } {{ uae_s16 dst = get_word (dsta); m68k_areg (regs, dstreg) = dsta; @@ -1513,18 +1513,18 @@ unsigned long REGPARAM2 CPUFUNC(op_0260_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); put_word (dsta,src); }}}}} m68k_incpc (regs, 4); -endlabel2225: ; -return 18 * 256; +endlabel2259: ; +return 18 * CYCLE_UNIT / 2; } /* AND.W #.W,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_0268_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0268_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2226; + goto endlabel2260; } {{ uae_s16 dst = get_word (dsta); src &= dst; @@ -1535,11 +1535,11 @@ unsigned long REGPARAM2 CPUFUNC(op_0268_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); put_word (dsta,src); }}}}} m68k_incpc (regs, 6); -endlabel2226: ; -return 20 * 256; +endlabel2260: ; +return 20 * CYCLE_UNIT / 2; } /* AND.W #.W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0270_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0270_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -1547,7 +1547,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0270_5)(uae_u32 opcode, struct regstruct *reg dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2227; + goto endlabel2261; } {{ uae_s16 dst = get_word (dsta); src &= dst; @@ -1558,17 +1558,17 @@ unsigned long REGPARAM2 CPUFUNC(op_0270_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); put_word (dsta,src); }}}}} m68k_incpc (regs, 6); -endlabel2227: ; -return 22 * 256; +endlabel2261: ; +return 22 * CYCLE_UNIT / 2; } /* AND.W #.W,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_0278_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0278_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2228; + goto endlabel2262; } {{ uae_s16 dst = get_word (dsta); src &= dst; @@ -1579,17 +1579,17 @@ unsigned long REGPARAM2 CPUFUNC(op_0278_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); put_word (dsta,src); }}}}} m68k_incpc (regs, 6); -endlabel2228: ; -return 20 * 256; +endlabel2262: ; +return 20 * CYCLE_UNIT / 2; } /* AND.W #.W,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_0279_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0279_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = get_long_prefetch (regs, 6); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2229; + goto endlabel2263; } {{ uae_s16 dst = get_word (dsta); src &= dst; @@ -1600,13 +1600,13 @@ unsigned long REGPARAM2 CPUFUNC(op_0279_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 10); put_word (dsta,src); }}}}} m68k_incpc (regs, 8); -endlabel2229: ; -return 24 * 256; +endlabel2263: ; +return 24 * CYCLE_UNIT / 2; } /* ANDSR.W #.W */ -unsigned long REGPARAM2 CPUFUNC(op_027c_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_027c_11)(uae_u32 opcode, struct regstruct *regs) { -{if (!regs->s) { Exception(8, regs, 0); goto endlabel2230; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel2264; } { MakeSR(regs); { uae_s16 src = get_word_prefetch (regs, 4); regs->ir = regs->irc; @@ -1614,11 +1614,11 @@ unsigned long REGPARAM2 CPUFUNC(op_027c_5)(uae_u32 opcode, struct regstruct *reg regs->sr &= src; MakeFromSR(regs); }}} m68k_incpc (regs, 4); -endlabel2230: ; -return 8 * 256; +endlabel2264: ; +return 8 * CYCLE_UNIT / 2; } /* AND.L #.L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_0280_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0280_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); @@ -1631,17 +1631,17 @@ unsigned long REGPARAM2 CPUFUNC(op_0280_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); m68k_dreg(regs, dstreg) = (src); }}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* AND.L #.L,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0290_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0290_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2232; + goto endlabel2266; } {{ uae_s32 dst = get_long (dsta); src &= dst; @@ -1652,18 +1652,18 @@ unsigned long REGPARAM2 CPUFUNC(op_0290_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); put_long (dsta,src); }}}}} m68k_incpc (regs, 6); -endlabel2232: ; -return 28 * 256; +endlabel2266: ; +return 28 * CYCLE_UNIT / 2; } /* AND.L #.L,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_0298_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0298_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2233; + goto endlabel2267; } {{ uae_s32 dst = get_long (dsta); m68k_areg(regs, dstreg) += 4; @@ -1675,11 +1675,11 @@ unsigned long REGPARAM2 CPUFUNC(op_0298_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); put_long (dsta,src); }}}}} m68k_incpc (regs, 6); -endlabel2233: ; -return 28 * 256; +endlabel2267: ; +return 28 * CYCLE_UNIT / 2; } /* AND.L #.L,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_02a0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_02a0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); @@ -1687,7 +1687,7 @@ unsigned long REGPARAM2 CPUFUNC(op_02a0_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, dstreg) - 4; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2234; + goto endlabel2268; } {{ uae_s32 dst = get_long (dsta); m68k_areg (regs, dstreg) = dsta; @@ -1699,18 +1699,18 @@ unsigned long REGPARAM2 CPUFUNC(op_02a0_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); put_long (dsta,src); }}}}} m68k_incpc (regs, 6); -endlabel2234: ; -return 30 * 256; +endlabel2268: ; +return 30 * CYCLE_UNIT / 2; } /* AND.L #.L,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_02a8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_02a8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 8); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2235; + goto endlabel2269; } {{ uae_s32 dst = get_long (dsta); src &= dst; @@ -1721,11 +1721,11 @@ unsigned long REGPARAM2 CPUFUNC(op_02a8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 10); put_long (dsta,src); }}}}} m68k_incpc (regs, 8); -endlabel2235: ; -return 32 * 256; +endlabel2269: ; +return 32 * CYCLE_UNIT / 2; } /* AND.L #.L,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_02b0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_02b0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); @@ -1733,7 +1733,7 @@ unsigned long REGPARAM2 CPUFUNC(op_02b0_5)(uae_u32 opcode, struct regstruct *reg dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 8)); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2236; + goto endlabel2270; } {{ uae_s32 dst = get_long (dsta); src &= dst; @@ -1744,17 +1744,17 @@ unsigned long REGPARAM2 CPUFUNC(op_02b0_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 10); put_long (dsta,src); }}}}} m68k_incpc (regs, 8); -endlabel2236: ; -return 34 * 256; +endlabel2270: ; +return 34 * CYCLE_UNIT / 2; } /* AND.L #.L,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_02b8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_02b8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 8); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2237; + goto endlabel2271; } {{ uae_s32 dst = get_long (dsta); src &= dst; @@ -1765,17 +1765,17 @@ unsigned long REGPARAM2 CPUFUNC(op_02b8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 10); put_long (dsta,src); }}}}} m68k_incpc (regs, 8); -endlabel2237: ; -return 32 * 256; +endlabel2271: ; +return 32 * CYCLE_UNIT / 2; } /* AND.L #.L,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_02b9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_02b9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = get_long_prefetch (regs, 8); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2238; + goto endlabel2272; } {{ uae_s32 dst = get_long (dsta); src &= dst; @@ -1786,11 +1786,11 @@ unsigned long REGPARAM2 CPUFUNC(op_02b9_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 12); put_long (dsta,src); }}}}} m68k_incpc (regs, 10); -endlabel2238: ; -return 36 * 256; +endlabel2272: ; +return 36 * CYCLE_UNIT / 2; } /* SUB.B #.B,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_0400_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0400_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -1808,10 +1808,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0400_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUB.B #.B,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0410_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0410_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -1830,10 +1830,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0410_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* SUB.B #.B,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_0418_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0418_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -1853,10 +1853,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0418_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* SUB.B #.B,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0420_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0420_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -1877,10 +1877,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0420_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* SUB.B #.B,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_0428_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0428_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -1899,10 +1899,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0428_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* SUB.B #.B,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0430_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0430_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -1922,10 +1922,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0430_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 26 * 256; +return 26 * CYCLE_UNIT / 2; } /* SUB.B #.B,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_0438_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0438_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); @@ -1943,10 +1943,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0438_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* SUB.B #.B,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_0439_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0439_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); { uaecptr dsta = get_long_prefetch (regs, 6); @@ -1964,10 +1964,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0439_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 8); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* SUB.W #.W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_0440_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0440_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -1985,17 +1985,17 @@ unsigned long REGPARAM2 CPUFUNC(op_0440_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* SUB.W #.W,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0450_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0450_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2248; + goto endlabel2282; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -2011,18 +2011,18 @@ unsigned long REGPARAM2 CPUFUNC(op_0450_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel2248: ; -return 16 * 256; +endlabel2282: ; +return 16 * CYCLE_UNIT / 2; } /* SUB.W #.W,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_0458_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0458_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2249; + goto endlabel2283; } {{ uae_s16 dst = get_word (dsta); m68k_areg(regs, dstreg) += 2; @@ -2039,11 +2039,11 @@ unsigned long REGPARAM2 CPUFUNC(op_0458_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel2249: ; -return 16 * 256; +endlabel2283: ; +return 16 * CYCLE_UNIT / 2; } /* SUB.W #.W,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0460_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0460_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -2051,7 +2051,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0460_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, dstreg) - 2; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2250; + goto endlabel2284; } {{ uae_s16 dst = get_word (dsta); m68k_areg (regs, dstreg) = dsta; @@ -2068,18 +2068,18 @@ unsigned long REGPARAM2 CPUFUNC(op_0460_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel2250: ; -return 18 * 256; +endlabel2284: ; +return 18 * CYCLE_UNIT / 2; } /* SUB.W #.W,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_0468_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0468_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2251; + goto endlabel2285; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -2095,11 +2095,11 @@ unsigned long REGPARAM2 CPUFUNC(op_0468_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 6); -endlabel2251: ; -return 20 * 256; +endlabel2285: ; +return 20 * CYCLE_UNIT / 2; } /* SUB.W #.W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0470_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0470_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -2107,7 +2107,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0470_5)(uae_u32 opcode, struct regstruct *reg dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2252; + goto endlabel2286; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -2123,17 +2123,17 @@ unsigned long REGPARAM2 CPUFUNC(op_0470_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 6); -endlabel2252: ; -return 22 * 256; +endlabel2286: ; +return 22 * CYCLE_UNIT / 2; } /* SUB.W #.W,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_0478_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0478_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2253; + goto endlabel2287; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -2149,17 +2149,17 @@ unsigned long REGPARAM2 CPUFUNC(op_0478_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 6); -endlabel2253: ; -return 20 * 256; +endlabel2287: ; +return 20 * CYCLE_UNIT / 2; } /* SUB.W #.W,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_0479_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0479_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = get_long_prefetch (regs, 6); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2254; + goto endlabel2288; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -2175,11 +2175,11 @@ unsigned long REGPARAM2 CPUFUNC(op_0479_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 8); -endlabel2254: ; -return 24 * 256; +endlabel2288: ; +return 24 * CYCLE_UNIT / 2; } /* SUB.L #.L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_0480_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0480_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); @@ -2197,17 +2197,17 @@ unsigned long REGPARAM2 CPUFUNC(op_0480_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUB.L #.L,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0490_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0490_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2256; + goto endlabel2290; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -2223,18 +2223,18 @@ unsigned long REGPARAM2 CPUFUNC(op_0490_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 6); -endlabel2256: ; -return 28 * 256; +endlabel2290: ; +return 28 * CYCLE_UNIT / 2; } /* SUB.L #.L,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_0498_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0498_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2257; + goto endlabel2291; } {{ uae_s32 dst = get_long (dsta); m68k_areg(regs, dstreg) += 4; @@ -2251,11 +2251,11 @@ unsigned long REGPARAM2 CPUFUNC(op_0498_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 6); -endlabel2257: ; -return 28 * 256; +endlabel2291: ; +return 28 * CYCLE_UNIT / 2; } /* SUB.L #.L,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_04a0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_04a0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); @@ -2263,7 +2263,7 @@ unsigned long REGPARAM2 CPUFUNC(op_04a0_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, dstreg) - 4; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2258; + goto endlabel2292; } {{ uae_s32 dst = get_long (dsta); m68k_areg (regs, dstreg) = dsta; @@ -2280,18 +2280,18 @@ unsigned long REGPARAM2 CPUFUNC(op_04a0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 6); -endlabel2258: ; -return 30 * 256; +endlabel2292: ; +return 30 * CYCLE_UNIT / 2; } /* SUB.L #.L,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_04a8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_04a8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 8); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2259; + goto endlabel2293; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -2307,11 +2307,11 @@ unsigned long REGPARAM2 CPUFUNC(op_04a8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 8); -endlabel2259: ; -return 32 * 256; +endlabel2293: ; +return 32 * CYCLE_UNIT / 2; } /* SUB.L #.L,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_04b0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_04b0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); @@ -2319,7 +2319,7 @@ unsigned long REGPARAM2 CPUFUNC(op_04b0_5)(uae_u32 opcode, struct regstruct *reg dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 8)); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2260; + goto endlabel2294; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -2335,17 +2335,17 @@ unsigned long REGPARAM2 CPUFUNC(op_04b0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 8); -endlabel2260: ; -return 34 * 256; +endlabel2294: ; +return 34 * CYCLE_UNIT / 2; } /* SUB.L #.L,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_04b8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_04b8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 8); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2261; + goto endlabel2295; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -2361,17 +2361,17 @@ unsigned long REGPARAM2 CPUFUNC(op_04b8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 8); -endlabel2261: ; -return 32 * 256; +endlabel2295: ; +return 32 * CYCLE_UNIT / 2; } /* SUB.L #.L,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_04b9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_04b9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = get_long_prefetch (regs, 8); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2262; + goto endlabel2296; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -2387,11 +2387,11 @@ unsigned long REGPARAM2 CPUFUNC(op_04b9_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 10); -endlabel2262: ; -return 36 * 256; +endlabel2296: ; +return 36 * CYCLE_UNIT / 2; } /* ADD.B #.B,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_0600_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0600_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -2409,10 +2409,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0600_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADD.B #.B,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0610_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0610_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -2431,10 +2431,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0610_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* ADD.B #.B,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_0618_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0618_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -2454,10 +2454,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0618_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* ADD.B #.B,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0620_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0620_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -2478,10 +2478,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0620_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* ADD.B #.B,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_0628_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0628_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -2500,10 +2500,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0628_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* ADD.B #.B,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0630_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0630_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -2523,10 +2523,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0630_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 26 * 256; +return 26 * CYCLE_UNIT / 2; } /* ADD.B #.B,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_0638_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0638_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); @@ -2544,10 +2544,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0638_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* ADD.B #.B,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_0639_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0639_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); { uaecptr dsta = get_long_prefetch (regs, 6); @@ -2565,10 +2565,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0639_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 8); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* ADD.W #.W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_0640_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0640_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -2586,17 +2586,17 @@ unsigned long REGPARAM2 CPUFUNC(op_0640_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* ADD.W #.W,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0650_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0650_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2272; + goto endlabel2306; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -2612,18 +2612,18 @@ unsigned long REGPARAM2 CPUFUNC(op_0650_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel2272: ; -return 16 * 256; +endlabel2306: ; +return 16 * CYCLE_UNIT / 2; } /* ADD.W #.W,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_0658_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0658_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2273; + goto endlabel2307; } {{ uae_s16 dst = get_word (dsta); m68k_areg(regs, dstreg) += 2; @@ -2640,11 +2640,11 @@ unsigned long REGPARAM2 CPUFUNC(op_0658_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel2273: ; -return 16 * 256; +endlabel2307: ; +return 16 * CYCLE_UNIT / 2; } /* ADD.W #.W,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0660_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0660_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -2652,7 +2652,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0660_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, dstreg) - 2; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2274; + goto endlabel2308; } {{ uae_s16 dst = get_word (dsta); m68k_areg (regs, dstreg) = dsta; @@ -2669,18 +2669,18 @@ unsigned long REGPARAM2 CPUFUNC(op_0660_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel2274: ; -return 18 * 256; +endlabel2308: ; +return 18 * CYCLE_UNIT / 2; } /* ADD.W #.W,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_0668_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0668_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2275; + goto endlabel2309; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -2696,11 +2696,11 @@ unsigned long REGPARAM2 CPUFUNC(op_0668_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 6); -endlabel2275: ; -return 20 * 256; +endlabel2309: ; +return 20 * CYCLE_UNIT / 2; } /* ADD.W #.W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0670_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0670_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -2708,7 +2708,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0670_5)(uae_u32 opcode, struct regstruct *reg dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2276; + goto endlabel2310; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -2724,17 +2724,17 @@ unsigned long REGPARAM2 CPUFUNC(op_0670_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 6); -endlabel2276: ; -return 22 * 256; +endlabel2310: ; +return 22 * CYCLE_UNIT / 2; } /* ADD.W #.W,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_0678_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0678_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2277; + goto endlabel2311; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -2750,17 +2750,17 @@ unsigned long REGPARAM2 CPUFUNC(op_0678_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 6); -endlabel2277: ; -return 20 * 256; +endlabel2311: ; +return 20 * CYCLE_UNIT / 2; } /* ADD.W #.W,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_0679_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0679_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = get_long_prefetch (regs, 6); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2278; + goto endlabel2312; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -2776,11 +2776,11 @@ unsigned long REGPARAM2 CPUFUNC(op_0679_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 8); -endlabel2278: ; -return 24 * 256; +endlabel2312: ; +return 24 * CYCLE_UNIT / 2; } /* ADD.L #.L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_0680_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0680_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); @@ -2798,17 +2798,17 @@ unsigned long REGPARAM2 CPUFUNC(op_0680_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADD.L #.L,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0690_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0690_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2280; + goto endlabel2314; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -2824,18 +2824,18 @@ unsigned long REGPARAM2 CPUFUNC(op_0690_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 6); -endlabel2280: ; -return 28 * 256; +endlabel2314: ; +return 28 * CYCLE_UNIT / 2; } /* ADD.L #.L,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_0698_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0698_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2281; + goto endlabel2315; } {{ uae_s32 dst = get_long (dsta); m68k_areg(regs, dstreg) += 4; @@ -2852,11 +2852,11 @@ unsigned long REGPARAM2 CPUFUNC(op_0698_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 6); -endlabel2281: ; -return 28 * 256; +endlabel2315: ; +return 28 * CYCLE_UNIT / 2; } /* ADD.L #.L,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_06a0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_06a0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); @@ -2864,7 +2864,7 @@ unsigned long REGPARAM2 CPUFUNC(op_06a0_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, dstreg) - 4; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2282; + goto endlabel2316; } {{ uae_s32 dst = get_long (dsta); m68k_areg (regs, dstreg) = dsta; @@ -2881,18 +2881,18 @@ unsigned long REGPARAM2 CPUFUNC(op_06a0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 6); -endlabel2282: ; -return 30 * 256; +endlabel2316: ; +return 30 * CYCLE_UNIT / 2; } /* ADD.L #.L,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_06a8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_06a8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 8); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2283; + goto endlabel2317; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -2908,11 +2908,11 @@ unsigned long REGPARAM2 CPUFUNC(op_06a8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 8); -endlabel2283: ; -return 32 * 256; +endlabel2317: ; +return 32 * CYCLE_UNIT / 2; } /* ADD.L #.L,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_06b0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_06b0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); @@ -2920,7 +2920,7 @@ unsigned long REGPARAM2 CPUFUNC(op_06b0_5)(uae_u32 opcode, struct regstruct *reg dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 8)); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2284; + goto endlabel2318; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -2936,17 +2936,17 @@ unsigned long REGPARAM2 CPUFUNC(op_06b0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 8); -endlabel2284: ; -return 34 * 256; +endlabel2318: ; +return 34 * CYCLE_UNIT / 2; } /* ADD.L #.L,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_06b8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_06b8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 8); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2285; + goto endlabel2319; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -2962,17 +2962,17 @@ unsigned long REGPARAM2 CPUFUNC(op_06b8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 8); -endlabel2285: ; -return 32 * 256; +endlabel2319: ; +return 32 * CYCLE_UNIT / 2; } /* ADD.L #.L,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_06b9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_06b9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = get_long_prefetch (regs, 8); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2286; + goto endlabel2320; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -2988,11 +2988,11 @@ unsigned long REGPARAM2 CPUFUNC(op_06b9_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 10); -endlabel2286: ; -return 36 * 256; +endlabel2320: ; +return 36 * CYCLE_UNIT / 2; } /* BTST.L #.W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_0800_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0800_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3002,10 +3002,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0800_5)(uae_u32 opcode, struct regstruct *reg src &= 31; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* BTST.B #.W,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0810_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0810_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3016,10 +3016,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0810_5)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* BTST.B #.W,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_0818_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0818_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3031,10 +3031,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0818_5)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* BTST.B #.W,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0820_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0820_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3047,10 +3047,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0820_5)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* BTST.B #.W,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_0828_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0828_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3061,10 +3061,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0828_5)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BTST.B #.W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0830_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0830_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3076,10 +3076,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0830_5)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 6); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* BTST.B #.W,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_0838_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0838_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); @@ -3089,10 +3089,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0838_5)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BTST.B #.W,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_0839_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0839_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = get_long_prefetch (regs, 6); @@ -3102,10 +3102,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0839_5)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 8); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* BTST.B #.W,(d16,PC) */ -unsigned long REGPARAM2 CPUFUNC(op_083a_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_083a_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = 2; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3117,10 +3117,10 @@ unsigned long REGPARAM2 CPUFUNC(op_083a_5)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BTST.B #.W,(d8,PC,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_083b_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_083b_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = 3; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3134,10 +3134,10 @@ unsigned long REGPARAM2 CPUFUNC(op_083b_5)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}}} m68k_incpc (regs, 6); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* BTST.B #.W,#.B */ -unsigned long REGPARAM2 CPUFUNC(op_083c_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_083c_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s16 src = get_word_prefetch (regs, 4); { uae_s8 dst = (uae_u8)get_word_prefetch (regs, 6); @@ -3146,10 +3146,10 @@ unsigned long REGPARAM2 CPUFUNC(op_083c_5)(uae_u32 opcode, struct regstruct *reg src &= 7; SET_ZFLG (®s->ccrflags, 1 ^ ((dst >> src) & 1)); }}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BCHG.L #.W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_0840_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0840_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3161,10 +3161,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0840_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); m68k_dreg(regs, dstreg) = (dst); }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* BCHG.B #.W,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0850_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0850_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3177,10 +3177,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0850_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BCHG.B #.W,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_0858_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0858_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3194,10 +3194,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0858_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BCHG.B #.W,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0860_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0860_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3212,10 +3212,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0860_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* BCHG.B #.W,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_0868_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0868_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3228,10 +3228,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0868_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* BCHG.B #.W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0870_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0870_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3245,10 +3245,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0870_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* BCHG.B #.W,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_0878_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0878_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); @@ -3260,10 +3260,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0878_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* BCHG.B #.W,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_0879_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0879_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = get_long_prefetch (regs, 6); @@ -3275,10 +3275,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0879_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 8); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* BCHG.B #.W,(d16,PC) */ -unsigned long REGPARAM2 CPUFUNC(op_087a_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_087a_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = 2; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3292,10 +3292,10 @@ unsigned long REGPARAM2 CPUFUNC(op_087a_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* BCHG.B #.W,(d8,PC,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_087b_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_087b_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = 3; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3311,10 +3311,10 @@ unsigned long REGPARAM2 CPUFUNC(op_087b_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_u32)dst & (1 << src)) >> src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* BCLR.L #.W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_0880_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0880_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3326,10 +3326,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0880_5)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); m68k_dreg(regs, dstreg) = (dst); }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* BCLR.B #.W,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0890_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0890_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3342,10 +3342,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0890_5)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BCLR.B #.W,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_0898_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0898_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3359,10 +3359,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0898_5)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BCLR.B #.W,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_08a0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_08a0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3377,10 +3377,10 @@ unsigned long REGPARAM2 CPUFUNC(op_08a0_5)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* BCLR.B #.W,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_08a8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_08a8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3393,10 +3393,10 @@ unsigned long REGPARAM2 CPUFUNC(op_08a8_5)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* BCLR.B #.W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_08b0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_08b0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3410,10 +3410,10 @@ unsigned long REGPARAM2 CPUFUNC(op_08b0_5)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* BCLR.B #.W,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_08b8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_08b8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); @@ -3425,10 +3425,10 @@ unsigned long REGPARAM2 CPUFUNC(op_08b8_5)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* BCLR.B #.W,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_08b9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_08b9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = get_long_prefetch (regs, 6); @@ -3440,10 +3440,10 @@ unsigned long REGPARAM2 CPUFUNC(op_08b9_5)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 8); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* BCLR.B #.W,(d16,PC) */ -unsigned long REGPARAM2 CPUFUNC(op_08ba_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_08ba_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = 2; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3457,10 +3457,10 @@ unsigned long REGPARAM2 CPUFUNC(op_08ba_5)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* BCLR.B #.W,(d8,PC,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_08bb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_08bb_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = 3; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3476,10 +3476,10 @@ unsigned long REGPARAM2 CPUFUNC(op_08bb_5)(uae_u32 opcode, struct regstruct *reg dst &= ~(1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* BSET.L #.W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_08c0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_08c0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3491,10 +3491,10 @@ unsigned long REGPARAM2 CPUFUNC(op_08c0_5)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); m68k_dreg(regs, dstreg) = (dst); }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* BSET.B #.W,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_08d0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_08d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3507,10 +3507,10 @@ unsigned long REGPARAM2 CPUFUNC(op_08d0_5)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BSET.B #.W,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_08d8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_08d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3524,10 +3524,10 @@ unsigned long REGPARAM2 CPUFUNC(op_08d8_5)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* BSET.B #.W,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_08e0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_08e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3542,10 +3542,10 @@ unsigned long REGPARAM2 CPUFUNC(op_08e0_5)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* BSET.B #.W,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_08e8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_08e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3558,10 +3558,10 @@ unsigned long REGPARAM2 CPUFUNC(op_08e8_5)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* BSET.B #.W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_08f0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_08f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3575,10 +3575,10 @@ unsigned long REGPARAM2 CPUFUNC(op_08f0_5)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* BSET.B #.W,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_08f8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_08f8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); @@ -3590,10 +3590,10 @@ unsigned long REGPARAM2 CPUFUNC(op_08f8_5)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* BSET.B #.W,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_08f9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_08f9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = get_long_prefetch (regs, 6); @@ -3605,10 +3605,10 @@ unsigned long REGPARAM2 CPUFUNC(op_08f9_5)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 8); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* BSET.B #.W,(d16,PC) */ -unsigned long REGPARAM2 CPUFUNC(op_08fa_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_08fa_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = 2; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3622,10 +3622,10 @@ unsigned long REGPARAM2 CPUFUNC(op_08fa_5)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* BSET.B #.W,(d8,PC,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_08fb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_08fb_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = 3; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3641,10 +3641,10 @@ unsigned long REGPARAM2 CPUFUNC(op_08fb_5)(uae_u32 opcode, struct regstruct *reg dst |= (1 << src); put_byte (dsta,dst); }}}} m68k_incpc (regs, 6); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* EOR.B #.B,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_0a00_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0a00_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -3657,10 +3657,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0a00_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* EOR.B #.B,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0a10_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0a10_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -3674,10 +3674,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0a10_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); put_byte (dsta,src); }}}} m68k_incpc (regs, 4); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* EOR.B #.B,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_0a18_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0a18_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -3692,10 +3692,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0a18_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); put_byte (dsta,src); }}}} m68k_incpc (regs, 4); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* EOR.B #.B,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0a20_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0a20_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -3711,10 +3711,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0a20_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); put_byte (dsta,src); }}}} m68k_incpc (regs, 4); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* EOR.B #.B,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_0a28_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0a28_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -3728,10 +3728,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0a28_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); put_byte (dsta,src); }}}} m68k_incpc (regs, 6); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* EOR.B #.B,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0a30_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0a30_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -3746,10 +3746,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0a30_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); put_byte (dsta,src); }}}} m68k_incpc (regs, 6); -return 26 * 256; +return 26 * CYCLE_UNIT / 2; } /* EOR.B #.B,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_0a38_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0a38_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); @@ -3762,10 +3762,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0a38_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); put_byte (dsta,src); }}}} m68k_incpc (regs, 6); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* EOR.B #.B,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_0a39_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0a39_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); { uaecptr dsta = get_long_prefetch (regs, 6); @@ -3778,10 +3778,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0a39_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 10); put_byte (dsta,src); }}}} m68k_incpc (regs, 8); -return 28 * 256; +return 28 * CYCLE_UNIT / 2; } /* EORSR.B #.W */ -unsigned long REGPARAM2 CPUFUNC(op_0a3c_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0a3c_11)(uae_u32 opcode, struct regstruct *regs) { { MakeSR(regs); { uae_s16 src = get_word_prefetch (regs, 4); @@ -3791,10 +3791,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0a3c_5)(uae_u32 opcode, struct regstruct *reg regs->sr ^= src; MakeFromSR(regs); }} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* EOR.W #.W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_0a40_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0a40_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3807,17 +3807,17 @@ unsigned long REGPARAM2 CPUFUNC(op_0a40_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* EOR.W #.W,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0a50_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0a50_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2338; + goto endlabel2372; } {{ uae_s16 dst = get_word (dsta); src ^= dst; @@ -3828,18 +3828,18 @@ unsigned long REGPARAM2 CPUFUNC(op_0a50_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); put_word (dsta,src); }}}}} m68k_incpc (regs, 4); -endlabel2338: ; -return 16 * 256; +endlabel2372: ; +return 16 * CYCLE_UNIT / 2; } /* EOR.W #.W,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_0a58_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0a58_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2339; + goto endlabel2373; } {{ uae_s16 dst = get_word (dsta); m68k_areg(regs, dstreg) += 2; @@ -3851,11 +3851,11 @@ unsigned long REGPARAM2 CPUFUNC(op_0a58_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); put_word (dsta,src); }}}}} m68k_incpc (regs, 4); -endlabel2339: ; -return 16 * 256; +endlabel2373: ; +return 16 * CYCLE_UNIT / 2; } /* EOR.W #.W,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0a60_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0a60_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3863,7 +3863,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0a60_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, dstreg) - 2; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2340; + goto endlabel2374; } {{ uae_s16 dst = get_word (dsta); m68k_areg (regs, dstreg) = dsta; @@ -3875,18 +3875,18 @@ unsigned long REGPARAM2 CPUFUNC(op_0a60_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); put_word (dsta,src); }}}}} m68k_incpc (regs, 4); -endlabel2340: ; -return 18 * 256; +endlabel2374: ; +return 18 * CYCLE_UNIT / 2; } /* EOR.W #.W,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_0a68_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0a68_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2341; + goto endlabel2375; } {{ uae_s16 dst = get_word (dsta); src ^= dst; @@ -3897,11 +3897,11 @@ unsigned long REGPARAM2 CPUFUNC(op_0a68_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); put_word (dsta,src); }}}}} m68k_incpc (regs, 6); -endlabel2341: ; -return 20 * 256; +endlabel2375: ; +return 20 * CYCLE_UNIT / 2; } /* EOR.W #.W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0a70_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0a70_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -3909,7 +3909,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0a70_5)(uae_u32 opcode, struct regstruct *reg dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2342; + goto endlabel2376; } {{ uae_s16 dst = get_word (dsta); src ^= dst; @@ -3920,17 +3920,17 @@ unsigned long REGPARAM2 CPUFUNC(op_0a70_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); put_word (dsta,src); }}}}} m68k_incpc (regs, 6); -endlabel2342: ; -return 22 * 256; +endlabel2376: ; +return 22 * CYCLE_UNIT / 2; } /* EOR.W #.W,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_0a78_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0a78_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2343; + goto endlabel2377; } {{ uae_s16 dst = get_word (dsta); src ^= dst; @@ -3941,17 +3941,17 @@ unsigned long REGPARAM2 CPUFUNC(op_0a78_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); put_word (dsta,src); }}}}} m68k_incpc (regs, 6); -endlabel2343: ; -return 20 * 256; +endlabel2377: ; +return 20 * CYCLE_UNIT / 2; } /* EOR.W #.W,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_0a79_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0a79_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = get_long_prefetch (regs, 6); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2344; + goto endlabel2378; } {{ uae_s16 dst = get_word (dsta); src ^= dst; @@ -3962,16 +3962,13 @@ unsigned long REGPARAM2 CPUFUNC(op_0a79_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 10); put_word (dsta,src); }}}}} m68k_incpc (regs, 8); -endlabel2344: ; -return 24 * 256; +endlabel2378: ; +return 24 * CYCLE_UNIT / 2; } -#endif - -#ifdef PART_2 /* EORSR.W #.W */ -unsigned long REGPARAM2 CPUFUNC(op_0a7c_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0a7c_11)(uae_u32 opcode, struct regstruct *regs) { -{if (!regs->s) { Exception(8, regs, 0); goto endlabel2345; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel2379; } { MakeSR(regs); { uae_s16 src = get_word_prefetch (regs, 4); regs->ir = regs->irc; @@ -3979,11 +3976,11 @@ unsigned long REGPARAM2 CPUFUNC(op_0a7c_5)(uae_u32 opcode, struct regstruct *reg regs->sr ^= src; MakeFromSR(regs); }}} m68k_incpc (regs, 4); -endlabel2345: ; -return 8 * 256; +endlabel2379: ; +return 8 * CYCLE_UNIT / 2; } /* EOR.L #.L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_0a80_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0a80_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); @@ -3996,17 +3993,17 @@ unsigned long REGPARAM2 CPUFUNC(op_0a80_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); m68k_dreg(regs, dstreg) = (src); }}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* EOR.L #.L,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0a90_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0a90_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2347; + goto endlabel2381; } {{ uae_s32 dst = get_long (dsta); src ^= dst; @@ -4017,18 +4014,21 @@ unsigned long REGPARAM2 CPUFUNC(op_0a90_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); put_long (dsta,src); }}}}} m68k_incpc (regs, 6); -endlabel2347: ; -return 28 * 256; +endlabel2381: ; +return 28 * CYCLE_UNIT / 2; } +#endif + +#ifdef PART_2 /* EOR.L #.L,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_0a98_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0a98_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2348; + goto endlabel2382; } {{ uae_s32 dst = get_long (dsta); m68k_areg(regs, dstreg) += 4; @@ -4040,11 +4040,11 @@ unsigned long REGPARAM2 CPUFUNC(op_0a98_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); put_long (dsta,src); }}}}} m68k_incpc (regs, 6); -endlabel2348: ; -return 28 * 256; +endlabel2382: ; +return 28 * CYCLE_UNIT / 2; } /* EOR.L #.L,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0aa0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0aa0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); @@ -4052,7 +4052,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0aa0_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, dstreg) - 4; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2349; + goto endlabel2383; } {{ uae_s32 dst = get_long (dsta); m68k_areg (regs, dstreg) = dsta; @@ -4064,18 +4064,18 @@ unsigned long REGPARAM2 CPUFUNC(op_0aa0_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); put_long (dsta,src); }}}}} m68k_incpc (regs, 6); -endlabel2349: ; -return 30 * 256; +endlabel2383: ; +return 30 * CYCLE_UNIT / 2; } /* EOR.L #.L,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_0aa8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0aa8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 8); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2350; + goto endlabel2384; } {{ uae_s32 dst = get_long (dsta); src ^= dst; @@ -4086,11 +4086,11 @@ unsigned long REGPARAM2 CPUFUNC(op_0aa8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 10); put_long (dsta,src); }}}}} m68k_incpc (regs, 8); -endlabel2350: ; -return 32 * 256; +endlabel2384: ; +return 32 * CYCLE_UNIT / 2; } /* EOR.L #.L,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0ab0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0ab0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); @@ -4098,7 +4098,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0ab0_5)(uae_u32 opcode, struct regstruct *reg dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 8)); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2351; + goto endlabel2385; } {{ uae_s32 dst = get_long (dsta); src ^= dst; @@ -4109,17 +4109,17 @@ unsigned long REGPARAM2 CPUFUNC(op_0ab0_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 10); put_long (dsta,src); }}}}} m68k_incpc (regs, 8); -endlabel2351: ; -return 34 * 256; +endlabel2385: ; +return 34 * CYCLE_UNIT / 2; } /* EOR.L #.L,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_0ab8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0ab8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 8); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2352; + goto endlabel2386; } {{ uae_s32 dst = get_long (dsta); src ^= dst; @@ -4130,17 +4130,17 @@ unsigned long REGPARAM2 CPUFUNC(op_0ab8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 10); put_long (dsta,src); }}}}} m68k_incpc (regs, 8); -endlabel2352: ; -return 32 * 256; +endlabel2386: ; +return 32 * CYCLE_UNIT / 2; } /* EOR.L #.L,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_0ab9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0ab9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = get_long_prefetch (regs, 8); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2353; + goto endlabel2387; } {{ uae_s32 dst = get_long (dsta); src ^= dst; @@ -4151,11 +4151,11 @@ unsigned long REGPARAM2 CPUFUNC(op_0ab9_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 12); put_long (dsta,src); }}}}} m68k_incpc (regs, 10); -endlabel2353: ; -return 36 * 256; +endlabel2387: ; +return 36 * CYCLE_UNIT / 2; } /* CMP.B #.B,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_0c00_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0c00_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -4171,10 +4171,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0c00_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CMP.B #.B,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0c10_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0c10_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -4191,10 +4191,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0c10_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* CMP.B #.B,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_0c18_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0c18_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -4212,10 +4212,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0c18_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* CMP.B #.B,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0c20_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0c20_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -4234,10 +4234,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0c20_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* CMP.B #.B,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_0c28_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0c28_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -4254,10 +4254,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0c28_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* CMP.B #.B,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0c30_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0c30_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -4275,10 +4275,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0c30_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 6); -return 22 * 256; +return 22 * CYCLE_UNIT / 2; } /* CMP.B #.B,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_0c38_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0c38_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); @@ -4294,10 +4294,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0c38_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* CMP.B #.B,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_0c39_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0c39_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); { uaecptr dsta = get_long_prefetch (regs, 6); @@ -4313,10 +4313,10 @@ unsigned long REGPARAM2 CPUFUNC(op_0c39_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}} m68k_incpc (regs, 8); -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } /* CMP.W #.W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_0c40_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0c40_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -4332,17 +4332,17 @@ unsigned long REGPARAM2 CPUFUNC(op_0c40_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* CMP.W #.W,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0c50_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0c50_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2363; + goto endlabel2397; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -4356,18 +4356,18 @@ unsigned long REGPARAM2 CPUFUNC(op_0c50_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 4); -endlabel2363: ; -return 12 * 256; +endlabel2397: ; +return 12 * CYCLE_UNIT / 2; } /* CMP.W #.W,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_0c58_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0c58_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2364; + goto endlabel2398; } {{ uae_s16 dst = get_word (dsta); m68k_areg(regs, dstreg) += 2; @@ -4382,11 +4382,11 @@ unsigned long REGPARAM2 CPUFUNC(op_0c58_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 4); -endlabel2364: ; -return 12 * 256; +endlabel2398: ; +return 12 * CYCLE_UNIT / 2; } /* CMP.W #.W,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0c60_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0c60_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -4394,7 +4394,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0c60_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, dstreg) - 2; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2365; + goto endlabel2399; } {{ uae_s16 dst = get_word (dsta); m68k_areg (regs, dstreg) = dsta; @@ -4409,18 +4409,18 @@ unsigned long REGPARAM2 CPUFUNC(op_0c60_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 4); -endlabel2365: ; -return 14 * 256; +endlabel2399: ; +return 14 * CYCLE_UNIT / 2; } /* CMP.W #.W,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_0c68_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0c68_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2366; + goto endlabel2400; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -4434,11 +4434,11 @@ unsigned long REGPARAM2 CPUFUNC(op_0c68_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 6); -endlabel2366: ; -return 16 * 256; +endlabel2400: ; +return 16 * CYCLE_UNIT / 2; } /* CMP.W #.W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0c70_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0c70_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -4446,7 +4446,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0c70_5)(uae_u32 opcode, struct regstruct *reg dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2367; + goto endlabel2401; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -4460,17 +4460,17 @@ unsigned long REGPARAM2 CPUFUNC(op_0c70_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 6); -endlabel2367: ; -return 18 * 256; +endlabel2401: ; +return 18 * CYCLE_UNIT / 2; } /* CMP.W #.W,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_0c78_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0c78_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2368; + goto endlabel2402; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -4484,17 +4484,17 @@ unsigned long REGPARAM2 CPUFUNC(op_0c78_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 6); -endlabel2368: ; -return 16 * 256; +endlabel2402: ; +return 16 * CYCLE_UNIT / 2; } /* CMP.W #.W,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_0c79_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0c79_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = get_long_prefetch (regs, 6); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2369; + goto endlabel2403; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -4508,11 +4508,11 @@ unsigned long REGPARAM2 CPUFUNC(op_0c79_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 8); -endlabel2369: ; -return 20 * 256; +endlabel2403: ; +return 20 * CYCLE_UNIT / 2; } /* CMP.L #.L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_0c80_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0c80_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); @@ -4528,17 +4528,17 @@ unsigned long REGPARAM2 CPUFUNC(op_0c80_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CMP.L #.L,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0c90_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0c90_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2371; + goto endlabel2405; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -4552,18 +4552,18 @@ unsigned long REGPARAM2 CPUFUNC(op_0c90_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 6); -endlabel2371: ; -return 20 * 256; +endlabel2405: ; +return 20 * CYCLE_UNIT / 2; } /* CMP.L #.L,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_0c98_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0c98_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2372; + goto endlabel2406; } {{ uae_s32 dst = get_long (dsta); m68k_areg(regs, dstreg) += 4; @@ -4578,11 +4578,11 @@ unsigned long REGPARAM2 CPUFUNC(op_0c98_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 6); -endlabel2372: ; -return 20 * 256; +endlabel2406: ; +return 20 * CYCLE_UNIT / 2; } /* CMP.L #.L,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_0ca0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0ca0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); @@ -4590,7 +4590,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0ca0_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, dstreg) - 4; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2373; + goto endlabel2407; } {{ uae_s32 dst = get_long (dsta); m68k_areg (regs, dstreg) = dsta; @@ -4605,18 +4605,18 @@ unsigned long REGPARAM2 CPUFUNC(op_0ca0_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 6); -endlabel2373: ; -return 22 * 256; +endlabel2407: ; +return 22 * CYCLE_UNIT / 2; } /* CMP.L #.L,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_0ca8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0ca8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 8); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2374; + goto endlabel2408; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -4630,11 +4630,11 @@ unsigned long REGPARAM2 CPUFUNC(op_0ca8_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 8); -endlabel2374: ; -return 24 * 256; +endlabel2408: ; +return 24 * CYCLE_UNIT / 2; } /* CMP.L #.L,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_0cb0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0cb0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); @@ -4642,7 +4642,7 @@ unsigned long REGPARAM2 CPUFUNC(op_0cb0_5)(uae_u32 opcode, struct regstruct *reg dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 8)); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2375; + goto endlabel2409; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -4656,17 +4656,17 @@ unsigned long REGPARAM2 CPUFUNC(op_0cb0_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 8); -endlabel2375: ; -return 26 * 256; +endlabel2409: ; +return 26 * CYCLE_UNIT / 2; } /* CMP.L #.L,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_0cb8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0cb8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 8); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2376; + goto endlabel2410; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -4680,17 +4680,17 @@ unsigned long REGPARAM2 CPUFUNC(op_0cb8_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 8); -endlabel2376: ; -return 24 * 256; +endlabel2410: ; +return 24 * CYCLE_UNIT / 2; } /* CMP.L #.L,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_0cb9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_0cb9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = get_long_prefetch (regs, 8); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2377; + goto endlabel2411; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -4704,11 +4704,11 @@ unsigned long REGPARAM2 CPUFUNC(op_0cb9_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 10); -endlabel2377: ; -return 28 * 256; +endlabel2411: ; +return 28 * CYCLE_UNIT / 2; } /* MOVE.B Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_1000_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1000_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -4720,10 +4720,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1000_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}return 4 * 256; +}}}return 4 * CYCLE_UNIT / 2; } /* MOVE.B (An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_1010_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1010_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -4736,10 +4736,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1010_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 8 * 256; +}}}}return 8 * CYCLE_UNIT / 2; } /* MOVE.B (An)+,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_1018_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1018_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -4753,10 +4753,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1018_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 8 * 256; +}}}}return 8 * CYCLE_UNIT / 2; } /* MOVE.B -(An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_1020_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1020_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -4771,10 +4771,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1020_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 10 * 256; +}}}}return 10 * CYCLE_UNIT / 2; } /* MOVE.B (d16,An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_1028_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1028_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -4787,10 +4787,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1028_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.B (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_1030_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1030_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -4804,10 +4804,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1030_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_1038_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1038_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -4819,10 +4819,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1038_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_1039_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1039_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); @@ -4834,10 +4834,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1039_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 6); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B (d16,PC),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_103a_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_103a_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; @@ -4850,10 +4850,10 @@ unsigned long REGPARAM2 CPUFUNC(op_103a_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.B (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_103b_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_103b_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -4868,10 +4868,10 @@ unsigned long REGPARAM2 CPUFUNC(op_103b_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* MOVE.B #.B,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_103c_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_103c_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -4882,10 +4882,10 @@ unsigned long REGPARAM2 CPUFUNC(op_103c_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}return 12 * 256; +}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.B Dn,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_1080_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1080_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -4898,10 +4898,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1080_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}return 8 * 256; +}}}return 8 * CYCLE_UNIT / 2; } /* MOVE.B (An),(An) */ -unsigned long REGPARAM2 CPUFUNC(op_1090_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1090_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -4915,10 +4915,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1090_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.B (An)+,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_1098_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1098_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -4933,10 +4933,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1098_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.B -(An),(An) */ -unsigned long REGPARAM2 CPUFUNC(op_10a0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_10a0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -4952,10 +4952,10 @@ unsigned long REGPARAM2 CPUFUNC(op_10a0_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* MOVE.B (d16,An),(An) */ -unsigned long REGPARAM2 CPUFUNC(op_10a8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_10a8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -4969,10 +4969,10 @@ unsigned long REGPARAM2 CPUFUNC(op_10a8_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B (d8,An,Xn),(An) */ -unsigned long REGPARAM2 CPUFUNC(op_10b0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_10b0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -4987,10 +4987,10 @@ unsigned long REGPARAM2 CPUFUNC(op_10b0_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).W,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_10b8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_10b8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -5003,10 +5003,10 @@ unsigned long REGPARAM2 CPUFUNC(op_10b8_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).L,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_10b9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_10b9_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); @@ -5019,10 +5019,10 @@ unsigned long REGPARAM2 CPUFUNC(op_10b9_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 6); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.B (d16,PC),(An) */ -unsigned long REGPARAM2 CPUFUNC(op_10ba_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_10ba_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; @@ -5036,10 +5036,10 @@ unsigned long REGPARAM2 CPUFUNC(op_10ba_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B (d8,PC,Xn),(An) */ -unsigned long REGPARAM2 CPUFUNC(op_10bb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_10bb_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -5055,10 +5055,10 @@ unsigned long REGPARAM2 CPUFUNC(op_10bb_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.B #.B,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_10bc_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_10bc_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -5070,10 +5070,10 @@ unsigned long REGPARAM2 CPUFUNC(op_10bc_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}return 16 * 256; +}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B Dn,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_10c0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_10c0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5087,10 +5087,10 @@ unsigned long REGPARAM2 CPUFUNC(op_10c0_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}return 8 * 256; +}}}return 8 * CYCLE_UNIT / 2; } /* MOVE.B (An),(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_10d0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_10d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5105,10 +5105,10 @@ unsigned long REGPARAM2 CPUFUNC(op_10d0_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.B (An)+,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_10d8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_10d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5124,10 +5124,10 @@ unsigned long REGPARAM2 CPUFUNC(op_10d8_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.B -(An),(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_10e0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_10e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5144,10 +5144,10 @@ unsigned long REGPARAM2 CPUFUNC(op_10e0_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* MOVE.B (d16,An),(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_10e8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_10e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5162,10 +5162,10 @@ unsigned long REGPARAM2 CPUFUNC(op_10e8_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B (d8,An,Xn),(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_10f0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_10f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5181,10 +5181,10 @@ unsigned long REGPARAM2 CPUFUNC(op_10f0_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).W,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_10f8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_10f8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -5198,10 +5198,10 @@ unsigned long REGPARAM2 CPUFUNC(op_10f8_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).L,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_10f9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_10f9_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); @@ -5215,10 +5215,10 @@ unsigned long REGPARAM2 CPUFUNC(op_10f9_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 6); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.B (d16,PC),(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_10fa_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_10fa_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; @@ -5233,10 +5233,10 @@ unsigned long REGPARAM2 CPUFUNC(op_10fa_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B (d8,PC,Xn),(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_10fb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_10fb_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -5253,10 +5253,10 @@ unsigned long REGPARAM2 CPUFUNC(op_10fb_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.B #.B,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_10fc_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_10fc_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -5269,10 +5269,10 @@ unsigned long REGPARAM2 CPUFUNC(op_10fc_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}return 16 * 256; +}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B Dn,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_1100_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1100_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5287,10 +5287,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1100_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 2); -}}}return 8 * 256; +}}}return 8 * CYCLE_UNIT / 2; } /* MOVE.B (An),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_1110_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1110_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5306,10 +5306,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1110_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.B (An)+,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_1118_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1118_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5326,10 +5326,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1118_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 12 * 256; +}}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.B -(An),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_1120_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1120_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5347,10 +5347,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1120_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 2); -}}}}return 14 * 256; +}}}}return 14 * CYCLE_UNIT / 2; } /* MOVE.B (d16,An),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_1128_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1128_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5366,10 +5366,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1128_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B (d8,An,Xn),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_1130_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1130_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5386,10 +5386,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1130_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).W,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_1138_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1138_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -5404,10 +5404,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1138_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).L,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_1139_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1139_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); @@ -5422,10 +5422,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1139_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 6); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.B (d16,PC),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_113a_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_113a_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; @@ -5441,10 +5441,10 @@ unsigned long REGPARAM2 CPUFUNC(op_113a_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B (d8,PC,Xn),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_113b_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_113b_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -5462,10 +5462,10 @@ unsigned long REGPARAM2 CPUFUNC(op_113b_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.B #.B,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_113c_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_113c_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -5479,10 +5479,10 @@ unsigned long REGPARAM2 CPUFUNC(op_113c_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); m68k_incpc (regs, 4); -}}}return 16 * 256; +}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B Dn,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_1140_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1140_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5495,10 +5495,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1140_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}return 12 * 256; +}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.B (An),(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_1150_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1150_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5512,10 +5512,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1150_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B (An)+,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_1158_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1158_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5530,10 +5530,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1158_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B -(An),(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_1160_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1160_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5549,10 +5549,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1160_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.B (d16,An),(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_1168_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1168_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5566,10 +5566,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1168_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 6); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.B (d8,An,Xn),(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_1170_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1170_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5584,10 +5584,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1170_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 6); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 22 * 256; +}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).W,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_1178_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1178_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -5600,10 +5600,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1178_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 6); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).L,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_1179_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1179_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); @@ -5616,10 +5616,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1179_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 8); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.B (d16,PC),(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_117a_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_117a_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; @@ -5633,10 +5633,10 @@ unsigned long REGPARAM2 CPUFUNC(op_117a_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 6); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.B (d8,PC,Xn),(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_117b_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_117b_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -5652,10 +5652,10 @@ unsigned long REGPARAM2 CPUFUNC(op_117b_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 6); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 22 * 256; +}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.B #.B,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_117c_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_117c_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -5667,10 +5667,10 @@ unsigned long REGPARAM2 CPUFUNC(op_117c_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 6); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}return 20 * 256; +}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.B Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_1180_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1180_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5684,10 +5684,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1180_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}return 14 * 256; +}}}return 14 * CYCLE_UNIT / 2; } /* MOVE.B (An),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_1190_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1190_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5702,10 +5702,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1190_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.B (An)+,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_1198_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_1198_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5721,10 +5721,10 @@ unsigned long REGPARAM2 CPUFUNC(op_1198_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.B -(An),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_11a0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_11a0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5741,10 +5741,10 @@ unsigned long REGPARAM2 CPUFUNC(op_11a0_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.B (d16,An),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_11a8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_11a8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5759,10 +5759,10 @@ unsigned long REGPARAM2 CPUFUNC(op_11a8_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 6); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 22 * 256; +}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.B (d8,An,Xn),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_11b0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_11b0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5778,10 +5778,10 @@ unsigned long REGPARAM2 CPUFUNC(op_11b0_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 6); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_11b8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_11b8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -5795,10 +5795,10 @@ unsigned long REGPARAM2 CPUFUNC(op_11b8_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 6); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 22 * 256; +}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).L,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_11b9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_11b9_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); @@ -5812,10 +5812,10 @@ unsigned long REGPARAM2 CPUFUNC(op_11b9_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 8); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 26 * 256; +}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.B (d16,PC),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_11ba_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_11ba_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; @@ -5830,10 +5830,10 @@ unsigned long REGPARAM2 CPUFUNC(op_11ba_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 6); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 22 * 256; +}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.B (d8,PC,Xn),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_11bb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_11bb_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -5850,10 +5850,10 @@ unsigned long REGPARAM2 CPUFUNC(op_11bb_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 6); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.B #.B,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_11bc_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_11bc_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -5866,10 +5866,10 @@ unsigned long REGPARAM2 CPUFUNC(op_11bc_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 6); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}return 22 * 256; +}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.B Dn,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_11c0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_11c0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -5881,10 +5881,10 @@ unsigned long REGPARAM2 CPUFUNC(op_11c0_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}return 12 * 256; +}}}return 12 * CYCLE_UNIT / 2; } /* MOVE.B (An),(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_11d0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_11d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -5897,10 +5897,10 @@ unsigned long REGPARAM2 CPUFUNC(op_11d0_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B (An)+,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_11d8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_11d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -5914,10 +5914,10 @@ unsigned long REGPARAM2 CPUFUNC(op_11d8_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 16 * 256; +}}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B -(An),(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_11e0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_11e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -5932,10 +5932,10 @@ unsigned long REGPARAM2 CPUFUNC(op_11e0_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 18 * 256; +}}}}return 18 * CYCLE_UNIT / 2; } /* MOVE.B (d16,An),(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_11e8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_11e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -5948,10 +5948,10 @@ unsigned long REGPARAM2 CPUFUNC(op_11e8_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 6); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.B (d8,An,Xn),(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_11f0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_11f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -5965,10 +5965,10 @@ unsigned long REGPARAM2 CPUFUNC(op_11f0_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 6); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 22 * 256; +}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).W,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_11f8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_11f8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -5980,10 +5980,10 @@ unsigned long REGPARAM2 CPUFUNC(op_11f8_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 6); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).L,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_11f9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_11f9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -5995,10 +5995,10 @@ unsigned long REGPARAM2 CPUFUNC(op_11f9_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 8); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.B (d16,PC),(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_11fa_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_11fa_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -6011,10 +6011,10 @@ unsigned long REGPARAM2 CPUFUNC(op_11fa_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 6); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.B (d8,PC,Xn),(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_11fb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_11fb_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr tmppc; uaecptr srca; @@ -6029,10 +6029,10 @@ unsigned long REGPARAM2 CPUFUNC(op_11fb_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 6); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 22 * 256; +}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.B #.B,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_11fc_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_11fc_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); @@ -6043,10 +6043,10 @@ unsigned long REGPARAM2 CPUFUNC(op_11fc_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 6); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}return 20 * 256; +}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.B Dn,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_13c0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_13c0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -6058,10 +6058,10 @@ unsigned long REGPARAM2 CPUFUNC(op_13c0_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 6); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}return 16 * 256; +}}}return 16 * CYCLE_UNIT / 2; } /* MOVE.B (An),(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_13d0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_13d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -6077,10 +6077,10 @@ unsigned long REGPARAM2 CPUFUNC(op_13d0_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.B (An)+,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_13d8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_13d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -6097,10 +6097,10 @@ unsigned long REGPARAM2 CPUFUNC(op_13d8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 20 * 256; +}}}}return 20 * CYCLE_UNIT / 2; } /* MOVE.B -(An),(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_13e0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_13e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -6118,10 +6118,10 @@ unsigned long REGPARAM2 CPUFUNC(op_13e0_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 22 * 256; +}}}}return 22 * CYCLE_UNIT / 2; } /* MOVE.B (d16,An),(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_13e8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_13e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -6137,10 +6137,10 @@ unsigned long REGPARAM2 CPUFUNC(op_13e8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.B (d8,An,Xn),(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_13f0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_13f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -6157,10 +6157,10 @@ unsigned long REGPARAM2 CPUFUNC(op_13f0_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 26 * 256; +}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).W,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_13f8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_13f8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -6175,10 +6175,10 @@ unsigned long REGPARAM2 CPUFUNC(op_13f8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.B (xxx).L,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_13f9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_13f9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -6193,10 +6193,10 @@ unsigned long REGPARAM2 CPUFUNC(op_13f9_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 28 * 256; +}}}}return 28 * CYCLE_UNIT / 2; } /* MOVE.B (d16,PC),(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_13fa_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_13fa_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -6212,10 +6212,10 @@ unsigned long REGPARAM2 CPUFUNC(op_13fa_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 24 * 256; +}}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.B (d8,PC,Xn),(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_13fb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_13fb_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr tmppc; uaecptr srca; @@ -6233,10 +6233,10 @@ unsigned long REGPARAM2 CPUFUNC(op_13fb_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}return 26 * 256; +}}}}return 26 * CYCLE_UNIT / 2; } /* MOVE.B #.B,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_13fc_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_13fc_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); { uaecptr dsta = get_long_prefetch (regs, 6); @@ -6247,10 +6247,10 @@ unsigned long REGPARAM2 CPUFUNC(op_13fc_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 8); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}return 24 * 256; +}}}return 24 * CYCLE_UNIT / 2; } /* MOVE.L Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_2000_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_2000_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -6262,10 +6262,10 @@ unsigned long REGPARAM2 CPUFUNC(op_2000_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}return 4 * 256; +}}}return 4 * CYCLE_UNIT / 2; } /* MOVE.L An,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_2008_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_2008_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -6277,817 +6277,53 @@ unsigned long REGPARAM2 CPUFUNC(op_2008_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}return 4 * 256; +}}}return 4 * CYCLE_UNIT / 2; } /* MOVE.L (An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_2010_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_2010_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2468; - } -{{ uae_s32 src = get_long (srca); -{ m68k_dreg(regs, dstreg) = (src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2468: ; -return 12 * 256; -} -/* MOVE.L (An)+,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_2018_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2469; - } -{{ uae_s32 src = get_long (srca); - m68k_areg(regs, srcreg) += 4; -{ m68k_dreg(regs, dstreg) = (src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2469: ; -return 12 * 256; -} -/* MOVE.L -(An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_2020_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca; - srca = m68k_areg(regs, srcreg) - 4; - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2470; - } -{{ uae_s32 src = get_long (srca); - m68k_areg (regs, srcreg) = srca; -{ m68k_dreg(regs, dstreg) = (src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2470: ; -return 14 * 256; -} -/* MOVE.L (d16,An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_2028_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2471; - } -{{ uae_s32 src = get_long (srca); -{ m68k_dreg(regs, dstreg) = (src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2471: ; -return 16 * 256; -} -/* MOVE.L (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_2030_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca; - srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2472; - } -{{ uae_s32 src = get_long (srca); -{ m68k_dreg(regs, dstreg) = (src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2472: ; -return 18 * 256; -} -/* MOVE.L (xxx).W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_2038_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2473; - } -{{ uae_s32 src = get_long (srca); -{ m68k_dreg(regs, dstreg) = (src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2473: ; -return 16 * 256; -} -/* MOVE.L (xxx).L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_2039_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = get_long_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2474; - } -{{ uae_s32 src = get_long (srca); -{ m68k_dreg(regs, dstreg) = (src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 6); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2474: ; -return 20 * 256; -} -/* MOVE.L (d16,PC),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_203a_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_getpc (regs) + 2; - srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2475; - } -{{ uae_s32 src = get_long (srca); -{ m68k_dreg(regs, dstreg) = (src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2475: ; -return 16 * 256; -} -/* MOVE.L (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_203b_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr tmppc; - uaecptr srca; - tmppc = m68k_getpc(regs) + 2; - srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2476; - } -{{ uae_s32 src = get_long (srca); -{ m68k_dreg(regs, dstreg) = (src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2476: ; -return 18 * 256; -} -/* MOVE.L #.L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_203c_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s32 src = get_long_prefetch (regs, 4); -{ m68k_dreg(regs, dstreg) = (src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 6); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}return 12 * 256; -} -/* MOVEA.L Dn,An */ -unsigned long REGPARAM2 CPUFUNC(op_2040_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s32 src = m68k_dreg(regs, srcreg); -{ m68k_areg(regs, dstreg) = (src); - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}return 4 * 256; -} -/* MOVEA.L An,An */ -unsigned long REGPARAM2 CPUFUNC(op_2048_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s32 src = m68k_areg(regs, srcreg); -{ m68k_areg(regs, dstreg) = (src); - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}return 4 * 256; -} -/* MOVEA.L (An),An */ -unsigned long REGPARAM2 CPUFUNC(op_2050_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2480; - } -{{ uae_s32 src = get_long (srca); -{ m68k_areg(regs, dstreg) = (src); - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2480: ; -return 12 * 256; -} -/* MOVEA.L (An)+,An */ -unsigned long REGPARAM2 CPUFUNC(op_2058_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2481; - } -{{ uae_s32 src = get_long (srca); - m68k_areg(regs, srcreg) += 4; -{ m68k_areg(regs, dstreg) = (src); - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2481: ; -return 12 * 256; -} -/* MOVEA.L -(An),An */ -unsigned long REGPARAM2 CPUFUNC(op_2060_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca; - srca = m68k_areg(regs, srcreg) - 4; - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2482; - } -{{ uae_s32 src = get_long (srca); - m68k_areg (regs, srcreg) = srca; -{ m68k_areg(regs, dstreg) = (src); - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2482: ; -return 14 * 256; -} -/* MOVEA.L (d16,An),An */ -unsigned long REGPARAM2 CPUFUNC(op_2068_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2483; - } -{{ uae_s32 src = get_long (srca); -{ m68k_areg(regs, dstreg) = (src); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2483: ; -return 16 * 256; -} -/* MOVEA.L (d8,An,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_2070_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca; - srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2484; - } -{{ uae_s32 src = get_long (srca); -{ m68k_areg(regs, dstreg) = (src); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2484: ; -return 18 * 256; -} -/* MOVEA.L (xxx).W,An */ -unsigned long REGPARAM2 CPUFUNC(op_2078_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2485; - } -{{ uae_s32 src = get_long (srca); -{ m68k_areg(regs, dstreg) = (src); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2485: ; -return 16 * 256; -} -/* MOVEA.L (xxx).L,An */ -unsigned long REGPARAM2 CPUFUNC(op_2079_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = get_long_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2486; - } -{{ uae_s32 src = get_long (srca); -{ m68k_areg(regs, dstreg) = (src); - m68k_incpc (regs, 6); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2486: ; -return 20 * 256; -} -/* MOVEA.L (d16,PC),An */ -unsigned long REGPARAM2 CPUFUNC(op_207a_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_getpc (regs) + 2; - srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2487; - } -{{ uae_s32 src = get_long (srca); -{ m68k_areg(regs, dstreg) = (src); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2487: ; -return 16 * 256; -} -/* MOVEA.L (d8,PC,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_207b_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr tmppc; - uaecptr srca; - tmppc = m68k_getpc(regs) + 2; - srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2488; - } -{{ uae_s32 src = get_long (srca); -{ m68k_areg(regs, dstreg) = (src); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2488: ; -return 18 * 256; -} -/* MOVEA.L #.L,An */ -unsigned long REGPARAM2 CPUFUNC(op_207c_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s32 src = get_long_prefetch (regs, 4); -{ m68k_areg(regs, dstreg) = (src); - m68k_incpc (regs, 6); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}return 12 * 256; -} -/* MOVE.L Dn,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_2080_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s32 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2490; - } -{ put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}endlabel2490: ; -return 12 * 256; -} -/* MOVE.L An,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_2088_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s32 src = m68k_areg(regs, srcreg); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2491; - } -{ put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}endlabel2491: ; -return 12 * 256; -} -/* MOVE.L (An),(An) */ -unsigned long REGPARAM2 CPUFUNC(op_2090_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2492; - } -{{ uae_s32 src = get_long (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2492; - } -{ put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2492: ; -return 20 * 256; -} -/* MOVE.L (An)+,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_2098_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2493; - } -{{ uae_s32 src = get_long (srca); - m68k_areg(regs, srcreg) += 4; -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2493; - } -{ put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2493: ; -return 20 * 256; -} -/* MOVE.L -(An),(An) */ -unsigned long REGPARAM2 CPUFUNC(op_20a0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca; - srca = m68k_areg(regs, srcreg) - 4; - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2494; - } -{{ uae_s32 src = get_long (srca); - m68k_areg (regs, srcreg) = srca; -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2494; - } -{ put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2494: ; -return 22 * 256; -} -/* MOVE.L (d16,An),(An) */ -unsigned long REGPARAM2 CPUFUNC(op_20a8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2495; - } -{{ uae_s32 src = get_long (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2495; - } -{ put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2495: ; -return 24 * 256; -} -/* MOVE.L (d8,An,Xn),(An) */ -unsigned long REGPARAM2 CPUFUNC(op_20b0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca; - srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2496; - } -{{ uae_s32 src = get_long (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2496; - } -{ put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2496: ; -return 26 * 256; -} -/* MOVE.L (xxx).W,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_20b8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2497; - } -{{ uae_s32 src = get_long (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2497; - } -{ put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2497: ; -return 24 * 256; -} -/* MOVE.L (xxx).L,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_20b9_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = get_long_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2498; - } -{{ uae_s32 src = get_long (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2498; - } -{ put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 6); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2498: ; -return 28 * 256; -} -/* MOVE.L (d16,PC),(An) */ -unsigned long REGPARAM2 CPUFUNC(op_20ba_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_getpc (regs) + 2; - srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2499; - } -{{ uae_s32 src = get_long (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2499; - } -{ put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2499: ; -return 24 * 256; -} -/* MOVE.L (d8,PC,Xn),(An) */ -unsigned long REGPARAM2 CPUFUNC(op_20bb_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr tmppc; - uaecptr srca; - tmppc = m68k_getpc(regs) + 2; - srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2500; - } -{{ uae_s32 src = get_long (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2500; - } -{ put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2500: ; -return 26 * 256; -} -/* MOVE.L #.L,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_20bc_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s32 src = get_long_prefetch (regs, 4); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2501; - } -{ put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 6); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}endlabel2501: ; -return 20 * 256; -} -/* MOVE.L Dn,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_20c0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s32 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); goto endlabel2502; } -{ m68k_areg(regs, dstreg) += 4; - put_long (dsta,src); +{{ uae_s32 src = get_long (srca); +{ m68k_dreg(regs, dstreg) = (src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2502: ; -return 12 * 256; +}}}}}endlabel2502: ; +return 12 * CYCLE_UNIT / 2; } -/* MOVE.L An,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_20c8_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_2018_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s32 src = m68k_areg(regs, srcreg); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); goto endlabel2503; } -{ m68k_areg(regs, dstreg) += 4; - put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}endlabel2503: ; -return 12 * 256; -} -/* MOVE.L (An),(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_20d0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2504; - } -{{ uae_s32 src = get_long (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2504; - } -{ m68k_areg(regs, dstreg) += 4; - put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2504: ; -return 20 * 256; -} -/* MOVE.L (An)+,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_20d8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2505; - } {{ uae_s32 src = get_long (srca); m68k_areg(regs, srcreg) += 4; -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2505; - } -{ m68k_areg(regs, dstreg) += 4; - put_long (dsta,src); +{ m68k_dreg(regs, dstreg) = (src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2505: ; -return 20 * 256; +}}}}}endlabel2503: ; +return 12 * CYCLE_UNIT / 2; } -/* MOVE.L -(An),(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_20e0_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_2020_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7095,55 +6331,43 @@ unsigned long REGPARAM2 CPUFUNC(op_20e0_5)(uae_u32 opcode, struct regstruct *reg srca = m68k_areg(regs, srcreg) - 4; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2506; + goto endlabel2504; } {{ uae_s32 src = get_long (srca); m68k_areg (regs, srcreg) = srca; -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2506; - } -{ m68k_areg(regs, dstreg) += 4; - put_long (dsta,src); +{ m68k_dreg(regs, dstreg) = (src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2506: ; -return 22 * 256; +}}}}}endlabel2504: ; +return 14 * CYCLE_UNIT / 2; } -/* MOVE.L (d16,An),(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_20e8_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_2028_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2507; + goto endlabel2505; } {{ uae_s32 src = get_long (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2507; - } -{ m68k_areg(regs, dstreg) += 4; - put_long (dsta,src); +{ m68k_dreg(regs, dstreg) = (src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2507: ; -return 24 * 256; +}}}}}endlabel2505: ; +return 16 * CYCLE_UNIT / 2; } -/* MOVE.L (d8,An,Xn),(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_20f0_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_2030_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7151,106 +6375,82 @@ unsigned long REGPARAM2 CPUFUNC(op_20f0_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2508; + goto endlabel2506; } {{ uae_s32 src = get_long (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2508; - } -{ m68k_areg(regs, dstreg) += 4; - put_long (dsta,src); +{ m68k_dreg(regs, dstreg) = (src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2508: ; -return 26 * 256; +}}}}}endlabel2506: ; +return 18 * CYCLE_UNIT / 2; } -/* MOVE.L (xxx).W,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_20f8_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_2038_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2509; + goto endlabel2507; } {{ uae_s32 src = get_long (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2509; - } -{ m68k_areg(regs, dstreg) += 4; - put_long (dsta,src); +{ m68k_dreg(regs, dstreg) = (src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2509: ; -return 24 * 256; +}}}}}endlabel2507: ; +return 16 * CYCLE_UNIT / 2; } -/* MOVE.L (xxx).L,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_20f9_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_2039_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2510; + goto endlabel2508; } {{ uae_s32 src = get_long (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2510; - } -{ m68k_areg(regs, dstreg) += 4; - put_long (dsta,src); +{ m68k_dreg(regs, dstreg) = (src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2510: ; -return 28 * 256; +}}}}}endlabel2508: ; +return 20 * CYCLE_UNIT / 2; } -/* MOVE.L (d16,PC),(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_20fa_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_203a_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2511; + goto endlabel2509; } {{ uae_s32 src = get_long (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2511; - } -{ m68k_areg(regs, dstreg) += 4; - put_long (dsta,src); +{ m68k_dreg(regs, dstreg) = (src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2511: ; -return 24 * 256; +}}}}}endlabel2509: ; +return 16 * CYCLE_UNIT / 2; } -/* MOVE.L (d8,PC,Xn),(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_20fb_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_203b_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -7259,151 +6459,96 @@ unsigned long REGPARAM2 CPUFUNC(op_20fb_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2512; + goto endlabel2510; } {{ uae_s32 src = get_long (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2512; - } -{ m68k_areg(regs, dstreg) += 4; - put_long (dsta,src); +{ m68k_dreg(regs, dstreg) = (src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2512: ; -return 26 * 256; +}}}}}endlabel2510: ; +return 18 * CYCLE_UNIT / 2; } -/* MOVE.L #.L,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_20fc_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L #.L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_203c_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2513; - } -{ m68k_areg(regs, dstreg) += 4; - put_long (dsta,src); +{ m68k_dreg(regs, dstreg) = (src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2513: ; -return 20 * 256; +}}}return 12 * CYCLE_UNIT / 2; } -/* MOVE.L Dn,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_2100_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVEA.L Dn,An */ +unsigned long REGPARAM2 CPUFUNC(op_2040_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s32 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - 4; - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2514; - } -{ m68k_areg (regs, dstreg) = dsta; - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); +{ m68k_areg(regs, dstreg) = (src); m68k_incpc (regs, 2); -}}}}endlabel2514: ; -return 12 * 256; + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return 4 * CYCLE_UNIT / 2; } -/* MOVE.L An,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_2108_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVEA.L An,An */ +unsigned long REGPARAM2 CPUFUNC(op_2048_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s32 src = m68k_areg(regs, srcreg); -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - 4; - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2515; - } -{ m68k_areg (regs, dstreg) = dsta; - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); +{ m68k_areg(regs, dstreg) = (src); m68k_incpc (regs, 2); -}}}}endlabel2515: ; -return 12 * 256; + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return 4 * CYCLE_UNIT / 2; } -/* MOVE.L (An),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_2110_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVEA.L (An),An */ +unsigned long REGPARAM2 CPUFUNC(op_2050_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2516; + goto endlabel2514; } {{ uae_s32 src = get_long (srca); -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - 4; - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2516; - } -{ m68k_areg (regs, dstreg) = dsta; - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); +{ m68k_areg(regs, dstreg) = (src); m68k_incpc (regs, 2); -}}}}}}endlabel2516: ; -return 20 * 256; + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2514: ; +return 12 * CYCLE_UNIT / 2; } -/* MOVE.L (An)+,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_2118_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVEA.L (An)+,An */ +unsigned long REGPARAM2 CPUFUNC(op_2058_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2517; + goto endlabel2515; } {{ uae_s32 src = get_long (srca); m68k_areg(regs, srcreg) += 4; -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - 4; - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2517; - } -{ m68k_areg (regs, dstreg) = dsta; - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); +{ m68k_areg(regs, dstreg) = (src); m68k_incpc (regs, 2); -}}}}}}endlabel2517: ; -return 20 * 256; + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2515: ; +return 12 * CYCLE_UNIT / 2; } -/* MOVE.L -(An),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_2120_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVEA.L -(An),An */ +unsigned long REGPARAM2 CPUFUNC(op_2060_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7411,57 +6556,37 @@ unsigned long REGPARAM2 CPUFUNC(op_2120_5)(uae_u32 opcode, struct regstruct *reg srca = m68k_areg(regs, srcreg) - 4; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2518; + goto endlabel2516; } {{ uae_s32 src = get_long (srca); m68k_areg (regs, srcreg) = srca; -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - 4; - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2518; - } -{ m68k_areg (regs, dstreg) = dsta; - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); +{ m68k_areg(regs, dstreg) = (src); m68k_incpc (regs, 2); -}}}}}}endlabel2518: ; -return 22 * 256; + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2516: ; +return 14 * CYCLE_UNIT / 2; } -/* MOVE.L (d16,An),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_2128_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVEA.L (d16,An),An */ +unsigned long REGPARAM2 CPUFUNC(op_2068_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2519; + goto endlabel2517; } {{ uae_s32 src = get_long (srca); -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - 4; - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2519; - } -{ m68k_areg (regs, dstreg) = dsta; - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); +{ m68k_areg(regs, dstreg) = (src); m68k_incpc (regs, 4); -}}}}}}endlabel2519: ; -return 24 * 256; + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2517: ; +return 16 * CYCLE_UNIT / 2; } -/* MOVE.L (d8,An,Xn),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_2130_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVEA.L (d8,An,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_2070_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7469,110 +6594,70 @@ unsigned long REGPARAM2 CPUFUNC(op_2130_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2520; + goto endlabel2518; } {{ uae_s32 src = get_long (srca); -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - 4; - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2520; - } -{ m68k_areg (regs, dstreg) = dsta; - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); +{ m68k_areg(regs, dstreg) = (src); m68k_incpc (regs, 4); -}}}}}}endlabel2520: ; -return 26 * 256; + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2518: ; +return 18 * CYCLE_UNIT / 2; } -/* MOVE.L (xxx).W,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_2138_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVEA.L (xxx).W,An */ +unsigned long REGPARAM2 CPUFUNC(op_2078_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2521; + goto endlabel2519; } {{ uae_s32 src = get_long (srca); -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - 4; - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2521; - } -{ m68k_areg (regs, dstreg) = dsta; - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); +{ m68k_areg(regs, dstreg) = (src); m68k_incpc (regs, 4); -}}}}}}endlabel2521: ; -return 24 * 256; + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2519: ; +return 16 * CYCLE_UNIT / 2; } -/* MOVE.L (xxx).L,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_2139_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVEA.L (xxx).L,An */ +unsigned long REGPARAM2 CPUFUNC(op_2079_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2522; + goto endlabel2520; } {{ uae_s32 src = get_long (srca); -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - 4; - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2522; - } -{ m68k_areg (regs, dstreg) = dsta; - regs->ir = regs->irc; - get_word_prefetch (regs, 8); - put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); +{ m68k_areg(regs, dstreg) = (src); m68k_incpc (regs, 6); -}}}}}}endlabel2522: ; -return 28 * 256; + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2520: ; +return 20 * CYCLE_UNIT / 2; } -/* MOVE.L (d16,PC),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_213a_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVEA.L (d16,PC),An */ +unsigned long REGPARAM2 CPUFUNC(op_207a_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2523; + goto endlabel2521; } {{ uae_s32 src = get_long (srca); -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - 4; - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2523; - } -{ m68k_areg (regs, dstreg) = dsta; - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); +{ m68k_areg(regs, dstreg) = (src); m68k_incpc (regs, 4); -}}}}}}endlabel2523: ; -return 24 * 256; + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2521: ; +return 16 * CYCLE_UNIT / 2; } -/* MOVE.L (d8,PC,Xn),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_213b_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVEA.L (d8,PC,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_207b_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -7581,55 +6666,81 @@ unsigned long REGPARAM2 CPUFUNC(op_213b_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2524; + goto endlabel2522; } {{ uae_s32 src = get_long (srca); -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - 4; - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2524; - } -{ m68k_areg (regs, dstreg) = dsta; - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); +{ m68k_areg(regs, dstreg) = (src); m68k_incpc (regs, 4); -}}}}}}endlabel2524: ; -return 26 * 256; + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2522: ; +return 18 * CYCLE_UNIT / 2; } -/* MOVE.L #.L,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_213c_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVEA.L #.L,An */ +unsigned long REGPARAM2 CPUFUNC(op_207c_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - 4; - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2525; - } -{ m68k_areg (regs, dstreg) = dsta; - regs->ir = regs->irc; - get_word_prefetch (regs, 8); - put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); +{ m68k_areg(regs, dstreg) = (src); m68k_incpc (regs, 6); -}}}}endlabel2525: ; -return 20 * 256; + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return 12 * CYCLE_UNIT / 2; } -/* MOVE.L Dn,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_2140_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2080_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s32 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2524; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2524: ; +return 12 * CYCLE_UNIT / 2; +} +/* MOVE.L An,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2088_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg(regs, srcreg); +{ uaecptr dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2525; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2525: ; +return 12 * CYCLE_UNIT / 2; +} +/* MOVE.L (An),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2090_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2526; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); goto endlabel2526; @@ -7638,19 +6749,25 @@ unsigned long REGPARAM2 CPUFUNC(op_2140_5)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 4); + m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2526: ; -return 16 * 256; +}}}}}}endlabel2526: ; +return 20 * CYCLE_UNIT / 2; } -/* MOVE.L An,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_2148_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L (An)+,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2098_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s32 src = m68k_areg(regs, srcreg); -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2527; + } +{{ uae_s32 src = get_long (srca); + m68k_areg(regs, srcreg) += 4; +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); goto endlabel2527; @@ -7659,27 +6776,26 @@ unsigned long REGPARAM2 CPUFUNC(op_2148_5)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 4); + m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2527: ; -return 16 * 256; +}}}}}}endlabel2527: ; +return 20 * CYCLE_UNIT / 2; } -#endif - -#ifdef PART_3 -/* MOVE.L (An),(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_2150_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L -(An),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_20a0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); +{{ uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); goto endlabel2528; } {{ uae_s32 src = get_long (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); goto endlabel2528; @@ -7688,27 +6804,26 @@ unsigned long REGPARAM2 CPUFUNC(op_2150_5)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 4); + m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); }}}}}}endlabel2528: ; -return 24 * 256; +return 22 * CYCLE_UNIT / 2; } -/* MOVE.L (An)+,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_2158_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L (d16,An),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_20a8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); +{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); goto endlabel2529; } {{ uae_s32 src = get_long (srca); - m68k_areg(regs, srcreg) += 4; -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); + exception3 (opcode, m68k_getpc(regs) + 4, dsta); goto endlabel2529; } { put_long (dsta,src); @@ -7719,24 +6834,23 @@ unsigned long REGPARAM2 CPUFUNC(op_2158_5)(uae_u32 opcode, struct regstruct *reg regs->ir = regs->irc; get_word_prefetch (regs, 2); }}}}}}endlabel2529: ; -return 24 * 256; +return 24 * CYCLE_UNIT / 2; } -/* MOVE.L -(An),(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_2160_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L (d8,An,Xn),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_20b0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_areg(regs, srcreg) - 4; + srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); goto endlabel2530; } {{ uae_s32 src = get_long (srca); - m68k_areg (regs, srcreg) = srca; -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); + exception3 (opcode, m68k_getpc(regs) + 4, dsta); goto endlabel2530; } { put_long (dsta,src); @@ -7747,20 +6861,19 @@ unsigned long REGPARAM2 CPUFUNC(op_2160_5)(uae_u32 opcode, struct regstruct *reg regs->ir = regs->irc; get_word_prefetch (regs, 2); }}}}}}endlabel2530: ; -return 26 * 256; +return 26 * CYCLE_UNIT / 2; } -/* MOVE.L (d16,An),(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_2168_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L (xxx).W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_20b8_11)(uae_u32 opcode, struct regstruct *regs) { - uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); goto endlabel2531; } {{ uae_s32 src = get_long (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); goto endlabel2531; @@ -7769,27 +6882,25 @@ unsigned long REGPARAM2 CPUFUNC(op_2168_5)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 6); + m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); }}}}}}endlabel2531: ; -return 28 * 256; +return 24 * CYCLE_UNIT / 2; } -/* MOVE.L (d8,An,Xn),(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_2170_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L (xxx).L,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_20b9_11)(uae_u32 opcode, struct regstruct *regs) { - uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca; - srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); +{{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); goto endlabel2532; } {{ uae_s32 src = get_long (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); + exception3 (opcode, m68k_getpc(regs) + 6, dsta); goto endlabel2532; } { put_long (dsta,src); @@ -7800,86 +6911,36 @@ unsigned long REGPARAM2 CPUFUNC(op_2170_5)(uae_u32 opcode, struct regstruct *reg regs->ir = regs->irc; get_word_prefetch (regs, 2); }}}}}}endlabel2532: ; -return 30 * 256; +return 28 * CYCLE_UNIT / 2; } -/* MOVE.L (xxx).W,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_2178_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2533; - } -{{ uae_s32 src = get_long (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2533; - } -{ put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 6); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2533: ; -return 28 * 256; -} -/* MOVE.L (xxx).L,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_2179_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = get_long_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2534; - } -{{ uae_s32 src = get_long (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 8); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2534; - } -{ put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 8); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2534: ; -return 32 * 256; -} -/* MOVE.L (d16,PC),(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_217a_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L (d16,PC),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_20ba_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2535; + goto endlabel2533; } {{ uae_s32 src = get_long (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2535; + goto endlabel2533; } { put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 6); + m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2535: ; -return 28 * 256; +}}}}}}endlabel2533: ; +return 24 * CYCLE_UNIT / 2; } -/* MOVE.L (d8,PC,Xn),(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_217b_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L (d8,PC,Xn),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_20bb_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -7888,13 +6949,33 @@ unsigned long REGPARAM2 CPUFUNC(op_217b_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2536; + goto endlabel2534; } {{ uae_s32 src = get_long (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2536; + goto endlabel2534; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2534: ; +return 26 * CYCLE_UNIT / 2; +} +/* MOVE.L #.L,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_20bc_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2535; } { put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); @@ -7903,119 +6984,155 @@ unsigned long REGPARAM2 CPUFUNC(op_217b_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 6); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2536: ; -return 30 * 256; +}}}}endlabel2535: ; +return 20 * CYCLE_UNIT / 2; } -/* MOVE.L #.L,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_217c_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s32 src = get_long_prefetch (regs, 4); -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 8); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2537; - } -{ put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 8); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}endlabel2537: ; -return 24 * 256; -} -/* MOVE.L Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_2180_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20c0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s32 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta; - dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2538; + goto endlabel2536; } -{ put_long (dsta,src); +{ m68k_areg(regs, dstreg) += 4; + put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 4); + m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2538: ; -return 18 * 256; +}}}}endlabel2536: ; +return 12 * CYCLE_UNIT / 2; } -/* MOVE.L An,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_2188_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L An,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20c8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s32 src = m68k_areg(regs, srcreg); -{ uaecptr dsta; - dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); +{ uaecptr dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2537; + } +{ m68k_areg(regs, dstreg) += 4; + put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2537: ; +return 12 * CYCLE_UNIT / 2; +} +/* MOVE.L (An),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20d0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2538; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2538; + } +{ m68k_areg(regs, dstreg) += 4; + put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2538: ; +return 20 * CYCLE_UNIT / 2; +} +/* MOVE.L (An)+,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20d8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2539; + } +{{ uae_s32 src = get_long (srca); + m68k_areg(regs, srcreg) += 4; +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); goto endlabel2539; } -{ put_long (dsta,src); +{ m68k_areg(regs, dstreg) += 4; + put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 4); + m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2539: ; -return 18 * 256; +}}}}}}endlabel2539: ; +return 20 * CYCLE_UNIT / 2; } -/* MOVE.L (An),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_2190_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L -(An),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); +{{ uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); goto endlabel2540; } {{ uae_s32 src = get_long (srca); -{ uaecptr dsta; - dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); goto endlabel2540; } -{ put_long (dsta,src); +{ m68k_areg(regs, dstreg) += 4; + put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 4); + m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); }}}}}}endlabel2540: ; -return 26 * 256; +return 22 * CYCLE_UNIT / 2; } -/* MOVE.L (An)+,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_2198_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L (d16,An),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); +{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); goto endlabel2541; } {{ uae_s32 src = get_long (srca); - m68k_areg(regs, srcreg) += 4; -{ uaecptr dsta; - dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); + exception3 (opcode, m68k_getpc(regs) + 4, dsta); goto endlabel2541; } -{ put_long (dsta,src); +{ m68k_areg(regs, dstreg) += 4; + put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); @@ -8023,28 +7140,27 @@ unsigned long REGPARAM2 CPUFUNC(op_2198_5)(uae_u32 opcode, struct regstruct *reg regs->ir = regs->irc; get_word_prefetch (regs, 2); }}}}}}endlabel2541: ; -return 26 * 256; +return 24 * CYCLE_UNIT / 2; } -/* MOVE.L -(An),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_21a0_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L (d8,An,Xn),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_areg(regs, srcreg) - 4; + srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); goto endlabel2542; } {{ uae_s32 src = get_long (srca); - m68k_areg (regs, srcreg) = srca; -{ uaecptr dsta; - dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); + exception3 (opcode, m68k_getpc(regs) + 4, dsta); goto endlabel2542; } -{ put_long (dsta,src); +{ m68k_areg(regs, dstreg) += 4; + put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); @@ -8052,54 +7168,51 @@ unsigned long REGPARAM2 CPUFUNC(op_21a0_5)(uae_u32 opcode, struct regstruct *reg regs->ir = regs->irc; get_word_prefetch (regs, 2); }}}}}}endlabel2542: ; -return 28 * 256; +return 26 * CYCLE_UNIT / 2; } -/* MOVE.L (d16,An),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_21a8_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L (xxx).W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20f8_11)(uae_u32 opcode, struct regstruct *regs) { - uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); goto endlabel2543; } {{ uae_s32 src = get_long (srca); -{ uaecptr dsta; - dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); goto endlabel2543; } -{ put_long (dsta,src); +{ m68k_areg(regs, dstreg) += 4; + put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 6); + m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); }}}}}}endlabel2543: ; -return 30 * 256; +return 24 * CYCLE_UNIT / 2; } -/* MOVE.L (d8,An,Xn),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_21b0_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L (xxx).L,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20f9_11)(uae_u32 opcode, struct regstruct *regs) { - uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca; - srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); +{{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); goto endlabel2544; } {{ uae_s32 src = get_long (srca); -{ uaecptr dsta; - dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); + exception3 (opcode, m68k_getpc(regs) + 6, dsta); goto endlabel2544; } -{ put_long (dsta,src); +{ m68k_areg(regs, dstreg) += 4; + put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); @@ -8107,89 +7220,37 @@ unsigned long REGPARAM2 CPUFUNC(op_21b0_5)(uae_u32 opcode, struct regstruct *reg regs->ir = regs->irc; get_word_prefetch (regs, 2); }}}}}}endlabel2544: ; -return 32 * 256; +return 28 * CYCLE_UNIT / 2; } -/* MOVE.L (xxx).W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_21b8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2545; - } -{{ uae_s32 src = get_long (srca); -{ uaecptr dsta; - dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2545; - } -{ put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 6); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2545: ; -return 30 * 256; -} -/* MOVE.L (xxx).L,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_21b9_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = get_long_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2546; - } -{{ uae_s32 src = get_long (srca); -{ uaecptr dsta; - dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 8)); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2546; - } -{ put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 8); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2546: ; -return 34 * 256; -} -/* MOVE.L (d16,PC),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_21ba_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L (d16,PC),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20fa_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2547; + goto endlabel2545; } {{ uae_s32 src = get_long (srca); -{ uaecptr dsta; - dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2547; + goto endlabel2545; } -{ put_long (dsta,src); +{ m68k_areg(regs, dstreg) += 4; + put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 6); + m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2547: ; -return 30 * 256; +}}}}}}endlabel2545: ; +return 24 * CYCLE_UNIT / 2; } -/* MOVE.L (d8,PC,Xn),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_21bb_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L (d8,PC,Xn),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20fb_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -8198,340 +7259,424 @@ unsigned long REGPARAM2 CPUFUNC(op_21bb_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2548; + goto endlabel2546; } {{ uae_s32 src = get_long (srca); -{ uaecptr dsta; - dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2548; + goto endlabel2546; } -{ put_long (dsta,src); +{ m68k_areg(regs, dstreg) += 4; + put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2546: ; +return 26 * CYCLE_UNIT / 2; +} +/* MOVE.L #.L,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_20fc_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2547; + } +{ m68k_areg(regs, dstreg) += 4; + put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2548: ; -return 32 * 256; +}}}}endlabel2547: ; +return 20 * CYCLE_UNIT / 2; } -/* MOVE.L #.L,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_21bc_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2100_11)(uae_u32 opcode, struct regstruct *regs) { + uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s32 src = get_long_prefetch (regs, 4); +{{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta; - dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 8)); + dsta = m68k_areg(regs, dstreg) - 4; if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2549; + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2548; } -{ put_long (dsta,src); +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 8); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}endlabel2549: ; -return 26 * 256; + m68k_incpc (regs, 2); +}}}}endlabel2548: ; +return 12 * CYCLE_UNIT / 2; } -/* MOVE.L Dn,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_21c0_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L An,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2108_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); -{{ uae_s32 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg(regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2549; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 2); +}}}}endlabel2549: ; +return 12 * CYCLE_UNIT / 2; +} +/* MOVE.L (An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2110_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2550; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); goto endlabel2550; } -{ put_long (dsta,src); +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}endlabel2550: ; -return 16 * 256; + m68k_incpc (regs, 2); +}}}}}}endlabel2550: ; +return 20 * CYCLE_UNIT / 2; } -/* MOVE.L An,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_21c8_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L (An)+,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2118_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); -{{ uae_s32 src = m68k_areg(regs, srcreg); -{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2551; + } +{{ uae_s32 src = get_long (srca); + m68k_areg(regs, srcreg) += 4; +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); goto endlabel2551; } -{ put_long (dsta,src); +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}endlabel2551: ; -return 16 * 256; + m68k_incpc (regs, 2); +}}}}}}endlabel2551: ; +return 20 * CYCLE_UNIT / 2; } -/* MOVE.L (An),(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_21d0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr srca = m68k_areg(regs, srcreg); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2552; - } -{{ uae_s32 src = get_long (srca); -{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2552; - } -{ put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2552: ; -return 24 * 256; -} -/* MOVE.L (An)+,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_21d8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr srca = m68k_areg(regs, srcreg); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2553; - } -{{ uae_s32 src = get_long (srca); - m68k_areg(regs, srcreg) += 4; -{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2553; - } -{ put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2553: ; -return 24 * 256; -} -/* MOVE.L -(An),(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_21e0_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L -(An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2120_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; srca = m68k_areg(regs, srcreg) - 4; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2554; + goto endlabel2552; } {{ uae_s32 src = get_long (srca); m68k_areg (regs, srcreg) = srca; -{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2554; + goto endlabel2552; } -{ put_long (dsta,src); +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 2); +}}}}}}endlabel2552: ; +return 22 * CYCLE_UNIT / 2; +} +/* MOVE.L (d16,An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2128_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2553; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2553; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2554: ; -return 26 * 256; +}}}}}}endlabel2553: ; +return 24 * CYCLE_UNIT / 2; } -/* MOVE.L (d16,An),(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_21e8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2555; - } -{{ uae_s32 src = get_long (srca); -{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2555; - } -{ put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 6); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2555: ; -return 28 * 256; -} -/* MOVE.L (d8,An,Xn),(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_21f0_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L (d8,An,Xn),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2130_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2556; + goto endlabel2554; } {{ uae_s32 src = get_long (srca); -{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2556; + goto endlabel2554; } -{ put_long (dsta,src); +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 6); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2556: ; -return 30 * 256; + m68k_incpc (regs, 4); +}}}}}}endlabel2554: ; +return 26 * CYCLE_UNIT / 2; } -/* MOVE.L (xxx).W,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_21f8_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L (xxx).W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2138_11)(uae_u32 opcode, struct regstruct *regs) { + uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2557; + goto endlabel2555; } {{ uae_s32 src = get_long (srca); -{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2557; + goto endlabel2555; } -{ put_long (dsta,src); +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 4); +}}}}}}endlabel2555: ; +return 24 * CYCLE_UNIT / 2; +} +/* MOVE.L (xxx).L,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_2139_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2556; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2556; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); m68k_incpc (regs, 6); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2557: ; -return 28 * 256; +}}}}}}endlabel2556: ; +return 28 * CYCLE_UNIT / 2; } -/* MOVE.L (xxx).L,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_21f9_5)(uae_u32 opcode, struct regstruct *regs) -{ -{{ uaecptr srca = get_long_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2558; - } -{{ uae_s32 src = get_long (srca); -{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 8); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2558; - } -{ put_long (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 8); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2558: ; -return 32 * 256; -} -/* MOVE.L (d16,PC),(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_21fa_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L (d16,PC),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_213a_11)(uae_u32 opcode, struct regstruct *regs) { + uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2559; + goto endlabel2557; } {{ uae_s32 src = get_long (srca); -{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2559; + goto endlabel2557; } -{ put_long (dsta,src); +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 6); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2559: ; -return 28 * 256; + m68k_incpc (regs, 4); +}}}}}}endlabel2557: ; +return 24 * CYCLE_UNIT / 2; } -/* MOVE.L (d8,PC,Xn),(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_21fb_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L (d8,PC,Xn),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_213b_11)(uae_u32 opcode, struct regstruct *regs) { + uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; tmppc = m68k_getpc(regs) + 2; srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2560; + goto endlabel2558; } {{ uae_s32 src = get_long (srca); -{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2558; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 4); +}}}}}}endlabel2558: ; +return 26 * CYCLE_UNIT / 2; +} +/* MOVE.L #.L,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_213c_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2559; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 6); +}}}}endlabel2559: ; +return 20 * CYCLE_UNIT / 2; +} +/* MOVE.L Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_2140_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); goto endlabel2560; } { put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 6); + m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2560: ; -return 30 * 256; +}}}}endlabel2560: ; +return 16 * CYCLE_UNIT / 2; } -/* MOVE.L #.L,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_21fc_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L An,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_2148_11)(uae_u32 opcode, struct regstruct *regs) { -{{ uae_s32 src = get_long_prefetch (regs, 4); -{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 8); + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg(regs, srcreg); +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 6, dsta); + exception3 (opcode, m68k_getpc(regs) + 2, dsta); goto endlabel2561; } { put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 8); + m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); }}}}endlabel2561: ; -return 24 * 256; +return 16 * CYCLE_UNIT / 2; } -/* MOVE.L Dn,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_23c0_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L (An),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_2150_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); -{{ uae_s32 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta = get_long_prefetch (regs, 4); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2562; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); goto endlabel2562; @@ -8540,22 +7685,83 @@ unsigned long REGPARAM2 CPUFUNC(op_23c0_5)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - m68k_incpc (regs, 6); + m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2562: ; -return 20 * 256; +}}}}}}endlabel2562: ; +return 24 * CYCLE_UNIT / 2; } -/* MOVE.L An,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_23c8_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L (An)+,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_2158_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); -{{ uae_s32 src = m68k_areg(regs, srcreg); -{ uaecptr dsta = get_long_prefetch (regs, 4); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2563; + } +{{ uae_s32 src = get_long (srca); + m68k_areg(regs, srcreg) += 4; +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); goto endlabel2563; } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2563: ; +return 24 * CYCLE_UNIT / 2; +} +/* MOVE.L -(An),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_2160_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2564; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2564; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2564: ; +return 26 * CYCLE_UNIT / 2; +} +/* MOVE.L (d16,An),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_2168_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2565; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2565; + } { put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); @@ -8563,17 +7769,811 @@ unsigned long REGPARAM2 CPUFUNC(op_23c8_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 6); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2563: ; -return 20 * 256; +}}}}}}endlabel2565: ; +return 28 * CYCLE_UNIT / 2; } -/* MOVE.L (An),(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_23d0_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.L (d8,An,Xn),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_2170_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2566; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2566; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2566: ; +return 30 * CYCLE_UNIT / 2; +} +/* MOVE.L (xxx).W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_2178_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2567; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2567; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2567: ; +return 28 * CYCLE_UNIT / 2; +} +#endif + +#ifdef PART_3 +/* MOVE.L (xxx).L,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_2179_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2568; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2568; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2568: ; +return 32 * CYCLE_UNIT / 2; +} +/* MOVE.L (d16,PC),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_217a_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2569; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2569; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2569: ; +return 28 * CYCLE_UNIT / 2; +} +/* MOVE.L (d8,PC,Xn),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_217b_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc(regs) + 2; + srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2570; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2570; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2570: ; +return 30 * CYCLE_UNIT / 2; +} +/* MOVE.L #.L,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_217c_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2571; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2571: ; +return 24 * CYCLE_UNIT / 2; +} +/* MOVE.L Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_2180_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2572; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2572: ; +return 18 * CYCLE_UNIT / 2; +} +/* MOVE.L An,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_2188_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg(regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2573; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2573: ; +return 18 * CYCLE_UNIT / 2; +} +/* MOVE.L (An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_2190_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2574; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2574; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2574: ; +return 26 * CYCLE_UNIT / 2; +} +/* MOVE.L (An)+,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_2198_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2575; + } +{{ uae_s32 src = get_long (srca); + m68k_areg(regs, srcreg) += 4; +{ uaecptr dsta; + dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2575; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2575: ; +return 26 * CYCLE_UNIT / 2; +} +/* MOVE.L -(An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21a0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2576; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2576; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2576: ; +return 28 * CYCLE_UNIT / 2; +} +/* MOVE.L (d16,An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21a8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2577; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2577; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2577: ; +return 30 * CYCLE_UNIT / 2; +} +/* MOVE.L (d8,An,Xn),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21b0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2578; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2578; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2578: ; +return 32 * CYCLE_UNIT / 2; +} +/* MOVE.L (xxx).W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21b8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2579; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2579; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2579: ; +return 30 * CYCLE_UNIT / 2; +} +/* MOVE.L (xxx).L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21b9_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2580; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 8)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2580; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2580: ; +return 34 * CYCLE_UNIT / 2; +} +/* MOVE.L (d16,PC),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21ba_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2581; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2581; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2581: ; +return 30 * CYCLE_UNIT / 2; +} +/* MOVE.L (d8,PC,Xn),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21bb_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc(regs) + 2; + srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2582; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2582; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2582: ; +return 32 * CYCLE_UNIT / 2; +} +/* MOVE.L #.L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_21bc_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 8)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2583; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2583: ; +return 26 * CYCLE_UNIT / 2; +} +/* MOVE.L Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21c0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2584; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2584: ; +return 16 * CYCLE_UNIT / 2; +} +/* MOVE.L An,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21c8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_areg(regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2585; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2585: ; +return 16 * CYCLE_UNIT / 2; +} +/* MOVE.L (An),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2564; + goto endlabel2586; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2586; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2586: ; +return 24 * CYCLE_UNIT / 2; +} +/* MOVE.L (An)+,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21d8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2587; + } +{{ uae_s32 src = get_long (srca); + m68k_areg(regs, srcreg) += 4; +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2587; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2587: ; +return 24 * CYCLE_UNIT / 2; +} +/* MOVE.L -(An),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21e0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2588; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2588; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2588: ; +return 26 * CYCLE_UNIT / 2; +} +/* MOVE.L (d16,An),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21e8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2589; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2589; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2589: ; +return 28 * CYCLE_UNIT / 2; +} +/* MOVE.L (d8,An,Xn),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21f0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2590; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2590; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2590: ; +return 30 * CYCLE_UNIT / 2; +} +/* MOVE.L (xxx).W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21f8_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2591; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2591; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2591: ; +return 28 * CYCLE_UNIT / 2; +} +/* MOVE.L (xxx).L,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21f9_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2592; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2592; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2592: ; +return 32 * CYCLE_UNIT / 2; +} +/* MOVE.L (d16,PC),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21fa_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2593; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2593; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2593: ; +return 28 * CYCLE_UNIT / 2; +} +/* MOVE.L (d8,PC,Xn),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21fb_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc(regs) + 2; + srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2594; + } +{{ uae_s32 src = get_long (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2594; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2594: ; +return 30 * CYCLE_UNIT / 2; +} +/* MOVE.L #.L,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_21fc_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2595; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2595: ; +return 24 * CYCLE_UNIT / 2; +} +/* MOVE.L Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_23c0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2596; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2596: ; +return 20 * CYCLE_UNIT / 2; +} +/* MOVE.L An,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_23c8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s32 src = m68k_areg(regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2597; + } +{ put_long (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2597: ; +return 20 * CYCLE_UNIT / 2; +} +/* MOVE.L (An),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_23d0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2598; } {{ uae_s32 src = get_long (srca); { uaecptr dsta; @@ -8581,7 +8581,7 @@ unsigned long REGPARAM2 CPUFUNC(op_23d0_5)(uae_u32 opcode, struct regstruct *reg dsta |= regs->irc; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2564; + goto endlabel2598; } { put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); @@ -8591,17 +8591,17 @@ unsigned long REGPARAM2 CPUFUNC(op_23d0_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2564: ; -return 28 * 256; +}}}}}}endlabel2598: ; +return 28 * CYCLE_UNIT / 2; } /* MOVE.L (An)+,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_23d8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_23d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2565; + goto endlabel2599; } {{ uae_s32 src = get_long (srca); m68k_areg(regs, srcreg) += 4; @@ -8610,7 +8610,7 @@ unsigned long REGPARAM2 CPUFUNC(op_23d8_5)(uae_u32 opcode, struct regstruct *reg dsta |= regs->irc; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2565; + goto endlabel2599; } { put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); @@ -8620,18 +8620,18 @@ unsigned long REGPARAM2 CPUFUNC(op_23d8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2565: ; -return 28 * 256; +}}}}}}endlabel2599: ; +return 28 * CYCLE_UNIT / 2; } /* MOVE.L -(An),(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_23e0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_23e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = m68k_areg(regs, srcreg) - 4; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2566; + goto endlabel2600; } {{ uae_s32 src = get_long (srca); m68k_areg (regs, srcreg) = srca; @@ -8640,7 +8640,7 @@ unsigned long REGPARAM2 CPUFUNC(op_23e0_5)(uae_u32 opcode, struct regstruct *reg dsta |= regs->irc; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2566; + goto endlabel2600; } { put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); @@ -8650,17 +8650,17 @@ unsigned long REGPARAM2 CPUFUNC(op_23e0_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2566: ; -return 30 * 256; +}}}}}}endlabel2600: ; +return 30 * CYCLE_UNIT / 2; } /* MOVE.L (d16,An),(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_23e8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_23e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2567; + goto endlabel2601; } {{ uae_s32 src = get_long (srca); { uaecptr dsta; @@ -8668,7 +8668,7 @@ unsigned long REGPARAM2 CPUFUNC(op_23e8_5)(uae_u32 opcode, struct regstruct *reg dsta |= regs->irc; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2567; + goto endlabel2601; } { put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); @@ -8678,18 +8678,18 @@ unsigned long REGPARAM2 CPUFUNC(op_23e8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2567: ; -return 32 * 256; +}}}}}}endlabel2601: ; +return 32 * CYCLE_UNIT / 2; } /* MOVE.L (d8,An,Xn),(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_23f0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_23f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2568; + goto endlabel2602; } {{ uae_s32 src = get_long (srca); { uaecptr dsta; @@ -8697,7 +8697,7 @@ unsigned long REGPARAM2 CPUFUNC(op_23f0_5)(uae_u32 opcode, struct regstruct *reg dsta |= regs->irc; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2568; + goto endlabel2602; } { put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); @@ -8707,16 +8707,16 @@ unsigned long REGPARAM2 CPUFUNC(op_23f0_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2568: ; -return 34 * 256; +}}}}}}endlabel2602: ; +return 34 * CYCLE_UNIT / 2; } /* MOVE.L (xxx).W,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_23f8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_23f8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2569; + goto endlabel2603; } {{ uae_s32 src = get_long (srca); { uaecptr dsta; @@ -8724,7 +8724,7 @@ unsigned long REGPARAM2 CPUFUNC(op_23f8_5)(uae_u32 opcode, struct regstruct *reg dsta |= regs->irc; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2569; + goto endlabel2603; } { put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); @@ -8734,16 +8734,16 @@ unsigned long REGPARAM2 CPUFUNC(op_23f8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2569: ; -return 32 * 256; +}}}}}}endlabel2603: ; +return 32 * CYCLE_UNIT / 2; } /* MOVE.L (xxx).L,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_23f9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_23f9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2570; + goto endlabel2604; } {{ uae_s32 src = get_long (srca); { uaecptr dsta; @@ -8751,7 +8751,7 @@ unsigned long REGPARAM2 CPUFUNC(op_23f9_5)(uae_u32 opcode, struct regstruct *reg dsta |= regs->irc; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2570; + goto endlabel2604; } { put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); @@ -8761,17 +8761,17 @@ unsigned long REGPARAM2 CPUFUNC(op_23f9_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2570: ; -return 36 * 256; +}}}}}}endlabel2604: ; +return 36 * CYCLE_UNIT / 2; } /* MOVE.L (d16,PC),(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_23fa_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_23fa_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2571; + goto endlabel2605; } {{ uae_s32 src = get_long (srca); { uaecptr dsta; @@ -8779,7 +8779,7 @@ unsigned long REGPARAM2 CPUFUNC(op_23fa_5)(uae_u32 opcode, struct regstruct *reg dsta |= regs->irc; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2571; + goto endlabel2605; } { put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); @@ -8789,11 +8789,11 @@ unsigned long REGPARAM2 CPUFUNC(op_23fa_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2571: ; -return 32 * 256; +}}}}}}endlabel2605: ; +return 32 * CYCLE_UNIT / 2; } /* MOVE.L (d8,PC,Xn),(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_23fb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_23fb_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr tmppc; uaecptr srca; @@ -8801,7 +8801,7 @@ unsigned long REGPARAM2 CPUFUNC(op_23fb_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2572; + goto endlabel2606; } {{ uae_s32 src = get_long (srca); { uaecptr dsta; @@ -8809,7 +8809,7 @@ unsigned long REGPARAM2 CPUFUNC(op_23fb_5)(uae_u32 opcode, struct regstruct *reg dsta |= regs->irc; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2572; + goto endlabel2606; } { put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); @@ -8819,17 +8819,17 @@ unsigned long REGPARAM2 CPUFUNC(op_23fb_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2572: ; -return 34 * 256; +}}}}}}endlabel2606: ; +return 34 * CYCLE_UNIT / 2; } /* MOVE.L #.L,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_23fc_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_23fc_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s32 src = get_long_prefetch (regs, 4); { uaecptr dsta = get_long_prefetch (regs, 8); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2573; + goto endlabel2607; } { put_long (dsta,src); CLEAR_CZNV (®s->ccrflags); @@ -8838,11 +8838,11 @@ unsigned long REGPARAM2 CPUFUNC(op_23fc_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 10); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2573: ; -return 28 * 256; +}}}}endlabel2607: ; +return 28 * CYCLE_UNIT / 2; } /* MOVE.W Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_3000_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_3000_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -8854,10 +8854,10 @@ unsigned long REGPARAM2 CPUFUNC(op_3000_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}return 4 * 256; +}}}return 4 * CYCLE_UNIT / 2; } /* MOVE.W An,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_3008_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_3008_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -8869,829 +8869,53 @@ unsigned long REGPARAM2 CPUFUNC(op_3008_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}return 4 * 256; +}}}return 4 * CYCLE_UNIT / 2; } /* MOVE.W (An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_3010_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_3010_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2576; - } -{{ uae_s16 src = get_word (srca); -{ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2576: ; -return 8 * 256; -} -/* MOVE.W (An)+,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_3018_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2577; - } -{{ uae_s16 src = get_word (srca); - m68k_areg(regs, srcreg) += 2; -{ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2577: ; -return 8 * 256; -} -/* MOVE.W -(An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_3020_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca; - srca = m68k_areg(regs, srcreg) - 2; - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2578; - } -{{ uae_s16 src = get_word (srca); - m68k_areg (regs, srcreg) = srca; -{ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2578: ; -return 10 * 256; -} -/* MOVE.W (d16,An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_3028_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2579; - } -{{ uae_s16 src = get_word (srca); -{ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2579: ; -return 12 * 256; -} -/* MOVE.W (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_3030_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca; - srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2580; - } -{{ uae_s16 src = get_word (srca); -{ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2580: ; -return 14 * 256; -} -/* MOVE.W (xxx).W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_3038_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2581; - } -{{ uae_s16 src = get_word (srca); -{ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2581: ; -return 12 * 256; -} -/* MOVE.W (xxx).L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_3039_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = get_long_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2582; - } -{{ uae_s16 src = get_word (srca); -{ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 6); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2582: ; -return 16 * 256; -} -/* MOVE.W (d16,PC),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_303a_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_getpc (regs) + 2; - srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2583; - } -{{ uae_s16 src = get_word (srca); -{ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2583: ; -return 12 * 256; -} -/* MOVE.W (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_303b_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr tmppc; - uaecptr srca; - tmppc = m68k_getpc(regs) + 2; - srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2584; - } -{{ uae_s16 src = get_word (srca); -{ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2584: ; -return 14 * 256; -} -/* MOVE.W #.W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_303c_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s16 src = get_word_prefetch (regs, 4); -{ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}return 8 * 256; -} -/* MOVEA.W Dn,An */ -unsigned long REGPARAM2 CPUFUNC(op_3040_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s16 src = m68k_dreg(regs, srcreg); -{ src = (uae_s32)(uae_s16)src; - m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}return 4 * 256; -} -/* MOVEA.W An,An */ -unsigned long REGPARAM2 CPUFUNC(op_3048_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s16 src = m68k_areg(regs, srcreg); -{ src = (uae_s32)(uae_s16)src; - m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}return 4 * 256; -} -/* MOVEA.W (An),An */ -unsigned long REGPARAM2 CPUFUNC(op_3050_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2588; - } -{{ uae_s16 src = get_word (srca); -{ src = (uae_s32)(uae_s16)src; - m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2588: ; -return 8 * 256; -} -/* MOVEA.W (An)+,An */ -unsigned long REGPARAM2 CPUFUNC(op_3058_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2589; - } -{{ uae_s16 src = get_word (srca); - m68k_areg(regs, srcreg) += 2; -{ src = (uae_s32)(uae_s16)src; - m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2589: ; -return 8 * 256; -} -/* MOVEA.W -(An),An */ -unsigned long REGPARAM2 CPUFUNC(op_3060_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca; - srca = m68k_areg(regs, srcreg) - 2; - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2590; - } -{{ uae_s16 src = get_word (srca); - m68k_areg (regs, srcreg) = srca; -{ src = (uae_s32)(uae_s16)src; - m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2590: ; -return 10 * 256; -} -/* MOVEA.W (d16,An),An */ -unsigned long REGPARAM2 CPUFUNC(op_3068_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2591; - } -{{ uae_s16 src = get_word (srca); -{ src = (uae_s32)(uae_s16)src; - m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2591: ; -return 12 * 256; -} -/* MOVEA.W (d8,An,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_3070_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca; - srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2592; - } -{{ uae_s16 src = get_word (srca); -{ src = (uae_s32)(uae_s16)src; - m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2592: ; -return 14 * 256; -} -/* MOVEA.W (xxx).W,An */ -unsigned long REGPARAM2 CPUFUNC(op_3078_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2593; - } -{{ uae_s16 src = get_word (srca); -{ src = (uae_s32)(uae_s16)src; - m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2593: ; -return 12 * 256; -} -/* MOVEA.W (xxx).L,An */ -unsigned long REGPARAM2 CPUFUNC(op_3079_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = get_long_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2594; - } -{{ uae_s16 src = get_word (srca); -{ src = (uae_s32)(uae_s16)src; - m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); - m68k_incpc (regs, 6); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2594: ; -return 16 * 256; -} -/* MOVEA.W (d16,PC),An */ -unsigned long REGPARAM2 CPUFUNC(op_307a_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_getpc (regs) + 2; - srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2595; - } -{{ uae_s16 src = get_word (srca); -{ src = (uae_s32)(uae_s16)src; - m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2595: ; -return 12 * 256; -} -/* MOVEA.W (d8,PC,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_307b_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr tmppc; - uaecptr srca; - tmppc = m68k_getpc(regs) + 2; - srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2596; - } -{{ uae_s16 src = get_word (srca); -{ src = (uae_s32)(uae_s16)src; - m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}endlabel2596: ; -return 14 * 256; -} -/* MOVEA.W #.W,An */ -unsigned long REGPARAM2 CPUFUNC(op_307c_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s16 src = get_word_prefetch (regs, 4); -{ src = (uae_s32)(uae_s16)src; - m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}return 8 * 256; -} -/* MOVE.W Dn,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_3080_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s16 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2598; - } -{ put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}endlabel2598: ; -return 8 * 256; -} -/* MOVE.W An,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_3088_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s16 src = m68k_areg(regs, srcreg); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2599; - } -{ put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}endlabel2599: ; -return 8 * 256; -} -/* MOVE.W (An),(An) */ -unsigned long REGPARAM2 CPUFUNC(op_3090_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2600; - } -{{ uae_s16 src = get_word (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2600; - } -{ put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2600: ; -return 12 * 256; -} -/* MOVE.W (An)+,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_3098_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2601; - } -{{ uae_s16 src = get_word (srca); - m68k_areg(regs, srcreg) += 2; -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2601; - } -{ put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2601: ; -return 12 * 256; -} -/* MOVE.W -(An),(An) */ -unsigned long REGPARAM2 CPUFUNC(op_30a0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca; - srca = m68k_areg(regs, srcreg) - 2; - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2602; - } -{{ uae_s16 src = get_word (srca); - m68k_areg (regs, srcreg) = srca; -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2602; - } -{ put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2602: ; -return 14 * 256; -} -/* MOVE.W (d16,An),(An) */ -unsigned long REGPARAM2 CPUFUNC(op_30a8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2603; - } -{{ uae_s16 src = get_word (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2603; - } -{ put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2603: ; -return 16 * 256; -} -/* MOVE.W (d8,An,Xn),(An) */ -unsigned long REGPARAM2 CPUFUNC(op_30b0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca; - srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2604; - } -{{ uae_s16 src = get_word (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2604; - } -{ put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2604: ; -return 18 * 256; -} -/* MOVE.W (xxx).W,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_30b8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2605; - } -{{ uae_s16 src = get_word (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2605; - } -{ put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2605: ; -return 16 * 256; -} -/* MOVE.W (xxx).L,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_30b9_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = get_long_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2606; - } -{{ uae_s16 src = get_word (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2606; - } -{ put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 6); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2606: ; -return 20 * 256; -} -/* MOVE.W (d16,PC),(An) */ -unsigned long REGPARAM2 CPUFUNC(op_30ba_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_getpc (regs) + 2; - srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2607; - } -{{ uae_s16 src = get_word (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2607; - } -{ put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2607: ; -return 16 * 256; -} -/* MOVE.W (d8,PC,Xn),(An) */ -unsigned long REGPARAM2 CPUFUNC(op_30bb_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr tmppc; - uaecptr srca; - tmppc = m68k_getpc(regs) + 2; - srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2608; - } -{{ uae_s16 src = get_word (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2608; - } -{ put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2608: ; -return 18 * 256; -} -/* MOVE.W #.W,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_30bc_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s16 src = get_word_prefetch (regs, 4); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2609; - } -{ put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}endlabel2609: ; -return 12 * 256; -} -/* MOVE.W Dn,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_30c0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s16 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); goto endlabel2610; } -{ m68k_areg(regs, dstreg) += 2; - put_word (dsta,src); +{{ uae_s16 src = get_word (srca); +{ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2610: ; -return 8 * 256; +}}}}}endlabel2610: ; +return 8 * CYCLE_UNIT / 2; } -/* MOVE.W An,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_30c8_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_3018_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s16 src = m68k_areg(regs, srcreg); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); goto endlabel2611; } -{ m68k_areg(regs, dstreg) += 2; - put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}endlabel2611: ; -return 8 * 256; -} -/* MOVE.W (An),(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_30d0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2612; - } -{{ uae_s16 src = get_word (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2612; - } -{ m68k_areg(regs, dstreg) += 2; - put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2612: ; -return 12 * 256; -} -/* MOVE.W (An)+,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_30d8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2613; - } {{ uae_s16 src = get_word (srca); m68k_areg(regs, srcreg) += 2; -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2613; - } -{ m68k_areg(regs, dstreg) += 2; - put_word (dsta,src); +{ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2613: ; -return 12 * 256; +}}}}}endlabel2611: ; +return 8 * CYCLE_UNIT / 2; } -/* MOVE.W -(An),(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_30e0_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_3020_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -9699,55 +8923,43 @@ unsigned long REGPARAM2 CPUFUNC(op_30e0_5)(uae_u32 opcode, struct regstruct *reg srca = m68k_areg(regs, srcreg) - 2; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2614; + goto endlabel2612; } {{ uae_s16 src = get_word (srca); m68k_areg (regs, srcreg) = srca; -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2614; - } -{ m68k_areg(regs, dstreg) += 2; - put_word (dsta,src); +{ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2614: ; -return 14 * 256; +}}}}}endlabel2612: ; +return 10 * CYCLE_UNIT / 2; } -/* MOVE.W (d16,An),(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_30e8_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_3028_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2615; + goto endlabel2613; } {{ uae_s16 src = get_word (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2615; - } -{ m68k_areg(regs, dstreg) += 2; - put_word (dsta,src); +{ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2615: ; -return 16 * 256; +}}}}}endlabel2613: ; +return 12 * CYCLE_UNIT / 2; } -/* MOVE.W (d8,An,Xn),(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_30f0_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_3030_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -9755,106 +8967,82 @@ unsigned long REGPARAM2 CPUFUNC(op_30f0_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2616; + goto endlabel2614; } {{ uae_s16 src = get_word (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2616; - } -{ m68k_areg(regs, dstreg) += 2; - put_word (dsta,src); +{ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2616: ; -return 18 * 256; +}}}}}endlabel2614: ; +return 14 * CYCLE_UNIT / 2; } -/* MOVE.W (xxx).W,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_30f8_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_3038_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2617; + goto endlabel2615; } {{ uae_s16 src = get_word (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2617; - } -{ m68k_areg(regs, dstreg) += 2; - put_word (dsta,src); +{ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2617: ; -return 16 * 256; +}}}}}endlabel2615: ; +return 12 * CYCLE_UNIT / 2; } -/* MOVE.W (xxx).L,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_30f9_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_3039_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2618; + goto endlabel2616; } {{ uae_s16 src = get_word (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2618; - } -{ m68k_areg(regs, dstreg) += 2; - put_word (dsta,src); +{ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 6); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2618: ; -return 20 * 256; +}}}}}endlabel2616: ; +return 16 * CYCLE_UNIT / 2; } -/* MOVE.W (d16,PC),(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_30fa_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_303a_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2619; + goto endlabel2617; } {{ uae_s16 src = get_word (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2619; - } -{ m68k_areg(regs, dstreg) += 2; - put_word (dsta,src); +{ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2619: ; -return 16 * 256; +}}}}}endlabel2617: ; +return 12 * CYCLE_UNIT / 2; } -/* MOVE.W (d8,PC,Xn),(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_30fb_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_303b_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -9863,151 +9051,100 @@ unsigned long REGPARAM2 CPUFUNC(op_30fb_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2620; + goto endlabel2618; } {{ uae_s16 src = get_word (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2620; - } -{ m68k_areg(regs, dstreg) += 2; - put_word (dsta,src); +{ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2620: ; -return 18 * 256; +}}}}}endlabel2618: ; +return 14 * CYCLE_UNIT / 2; } -/* MOVE.W #.W,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_30fc_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_303c_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2621; - } -{ m68k_areg(regs, dstreg) += 2; - put_word (dsta,src); +{ m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2621: ; -return 12 * 256; +}}}return 8 * CYCLE_UNIT / 2; } -/* MOVE.W Dn,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_3100_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVEA.W Dn,An */ +unsigned long REGPARAM2 CPUFUNC(op_3040_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s16 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - 2; - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2622; - } -{ m68k_areg (regs, dstreg) = dsta; - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); +{ src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); m68k_incpc (regs, 2); -}}}}endlabel2622: ; -return 8 * 256; + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return 4 * CYCLE_UNIT / 2; } -/* MOVE.W An,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_3108_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVEA.W An,An */ +unsigned long REGPARAM2 CPUFUNC(op_3048_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s16 src = m68k_areg(regs, srcreg); -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - 2; - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2623; - } -{ m68k_areg (regs, dstreg) = dsta; - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); +{ src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); m68k_incpc (regs, 2); -}}}}endlabel2623: ; -return 8 * 256; + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return 4 * CYCLE_UNIT / 2; } -/* MOVE.W (An),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_3110_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVEA.W (An),An */ +unsigned long REGPARAM2 CPUFUNC(op_3050_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2624; + goto endlabel2622; } {{ uae_s16 src = get_word (srca); -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - 2; - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2624; - } -{ m68k_areg (regs, dstreg) = dsta; - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); +{ src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); m68k_incpc (regs, 2); -}}}}}}endlabel2624: ; -return 12 * 256; + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2622: ; +return 8 * CYCLE_UNIT / 2; } -/* MOVE.W (An)+,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_3118_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVEA.W (An)+,An */ +unsigned long REGPARAM2 CPUFUNC(op_3058_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2625; + goto endlabel2623; } {{ uae_s16 src = get_word (srca); m68k_areg(regs, srcreg) += 2; -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - 2; - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2625; - } -{ m68k_areg (regs, dstreg) = dsta; - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); +{ src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); m68k_incpc (regs, 2); -}}}}}}endlabel2625: ; -return 12 * 256; + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2623: ; +return 8 * CYCLE_UNIT / 2; } -/* MOVE.W -(An),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_3120_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVEA.W -(An),An */ +unsigned long REGPARAM2 CPUFUNC(op_3060_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -10015,57 +9152,39 @@ unsigned long REGPARAM2 CPUFUNC(op_3120_5)(uae_u32 opcode, struct regstruct *reg srca = m68k_areg(regs, srcreg) - 2; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2626; + goto endlabel2624; } {{ uae_s16 src = get_word (srca); m68k_areg (regs, srcreg) = srca; -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - 2; - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2626; - } -{ m68k_areg (regs, dstreg) = dsta; - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); +{ src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); m68k_incpc (regs, 2); -}}}}}}endlabel2626: ; -return 14 * 256; + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2624: ; +return 10 * CYCLE_UNIT / 2; } -/* MOVE.W (d16,An),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_3128_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVEA.W (d16,An),An */ +unsigned long REGPARAM2 CPUFUNC(op_3068_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2627; + goto endlabel2625; } {{ uae_s16 src = get_word (srca); -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - 2; - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2627; - } -{ m68k_areg (regs, dstreg) = dsta; - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); +{ src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); m68k_incpc (regs, 4); -}}}}}}endlabel2627: ; -return 16 * 256; + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2625: ; +return 12 * CYCLE_UNIT / 2; } -/* MOVE.W (d8,An,Xn),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_3130_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVEA.W (d8,An,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_3070_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -10073,110 +9192,74 @@ unsigned long REGPARAM2 CPUFUNC(op_3130_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2628; + goto endlabel2626; } {{ uae_s16 src = get_word (srca); -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - 2; - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2628; - } -{ m68k_areg (regs, dstreg) = dsta; - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); +{ src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); m68k_incpc (regs, 4); -}}}}}}endlabel2628: ; -return 18 * 256; + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2626: ; +return 14 * CYCLE_UNIT / 2; } -/* MOVE.W (xxx).W,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_3138_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVEA.W (xxx).W,An */ +unsigned long REGPARAM2 CPUFUNC(op_3078_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2629; + goto endlabel2627; } {{ uae_s16 src = get_word (srca); -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - 2; - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2629; - } -{ m68k_areg (regs, dstreg) = dsta; - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); +{ src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); m68k_incpc (regs, 4); -}}}}}}endlabel2629: ; -return 16 * 256; + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2627: ; +return 12 * CYCLE_UNIT / 2; } -/* MOVE.W (xxx).L,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_3139_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVEA.W (xxx).L,An */ +unsigned long REGPARAM2 CPUFUNC(op_3079_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2630; + goto endlabel2628; } {{ uae_s16 src = get_word (srca); -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - 2; - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2630; - } -{ m68k_areg (regs, dstreg) = dsta; - regs->ir = regs->irc; - get_word_prefetch (regs, 8); - put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); +{ src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); m68k_incpc (regs, 6); -}}}}}}endlabel2630: ; -return 20 * 256; + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2628: ; +return 16 * CYCLE_UNIT / 2; } -/* MOVE.W (d16,PC),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_313a_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVEA.W (d16,PC),An */ +unsigned long REGPARAM2 CPUFUNC(op_307a_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2631; + goto endlabel2629; } {{ uae_s16 src = get_word (srca); -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - 2; - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2631; - } -{ m68k_areg (regs, dstreg) = dsta; - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); +{ src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); m68k_incpc (regs, 4); -}}}}}}endlabel2631: ; -return 16 * 256; + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2629: ; +return 12 * CYCLE_UNIT / 2; } -/* MOVE.W (d8,PC,Xn),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_313b_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVEA.W (d8,PC,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_307b_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -10185,55 +9268,83 @@ unsigned long REGPARAM2 CPUFUNC(op_313b_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2632; + goto endlabel2630; } {{ uae_s16 src = get_word (srca); -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - 2; - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2632; - } -{ m68k_areg (regs, dstreg) = dsta; - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); +{ src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); m68k_incpc (regs, 4); -}}}}}}endlabel2632: ; -return 18 * 256; + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}endlabel2630: ; +return 14 * CYCLE_UNIT / 2; } -/* MOVE.W #.W,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_313c_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVEA.W #.W,An */ +unsigned long REGPARAM2 CPUFUNC(op_307c_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - 2; - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2633; - } -{ m68k_areg (regs, dstreg) = dsta; - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); +{ src = (uae_s32)(uae_s16)src; + m68k_areg(regs, dstreg) = (uae_s32)(uae_s16)(src); m68k_incpc (regs, 4); -}}}}endlabel2633: ; -return 12 * 256; + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}return 8 * CYCLE_UNIT / 2; } -/* MOVE.W Dn,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_3140_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3080_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s16 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2632; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2632: ; +return 8 * CYCLE_UNIT / 2; +} +/* MOVE.W An,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3088_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg(regs, srcreg); +{ uaecptr dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2633; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2633: ; +return 8 * CYCLE_UNIT / 2; +} +/* MOVE.W (An),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3090_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2634; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); goto endlabel2634; @@ -10242,19 +9353,25 @@ unsigned long REGPARAM2 CPUFUNC(op_3140_5)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 4); + m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2634: ; -return 12 * 256; +}}}}}}endlabel2634: ; +return 12 * CYCLE_UNIT / 2; } -/* MOVE.W An,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_3148_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W (An)+,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3098_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s16 src = m68k_areg(regs, srcreg); -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2635; + } +{{ uae_s16 src = get_word (srca); + m68k_areg(regs, srcreg) += 2; +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); goto endlabel2635; @@ -10263,24 +9380,26 @@ unsigned long REGPARAM2 CPUFUNC(op_3148_5)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 4); + m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2635: ; -return 12 * 256; +}}}}}}endlabel2635: ; +return 12 * CYCLE_UNIT / 2; } -/* MOVE.W (An),(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_3150_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W -(An),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_30a0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); +{{ uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); goto endlabel2636; } {{ uae_s16 src = get_word (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); goto endlabel2636; @@ -10289,27 +9408,26 @@ unsigned long REGPARAM2 CPUFUNC(op_3150_5)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 4); + m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); }}}}}}endlabel2636: ; -return 16 * 256; +return 14 * CYCLE_UNIT / 2; } -/* MOVE.W (An)+,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_3158_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W (d16,An),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_30a8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); +{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); goto endlabel2637; } {{ uae_s16 src = get_word (srca); - m68k_areg(regs, srcreg) += 2; -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); + exception3 (opcode, m68k_getpc(regs) + 4, dsta); goto endlabel2637; } { put_word (dsta,src); @@ -10320,24 +9438,23 @@ unsigned long REGPARAM2 CPUFUNC(op_3158_5)(uae_u32 opcode, struct regstruct *reg regs->ir = regs->irc; get_word_prefetch (regs, 2); }}}}}}endlabel2637: ; -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } -/* MOVE.W -(An),(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_3160_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W (d8,An,Xn),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_30b0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_areg(regs, srcreg) - 2; + srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); goto endlabel2638; } {{ uae_s16 src = get_word (srca); - m68k_areg (regs, srcreg) = srca; -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); + exception3 (opcode, m68k_getpc(regs) + 4, dsta); goto endlabel2638; } { put_word (dsta,src); @@ -10348,20 +9465,19 @@ unsigned long REGPARAM2 CPUFUNC(op_3160_5)(uae_u32 opcode, struct regstruct *reg regs->ir = regs->irc; get_word_prefetch (regs, 2); }}}}}}endlabel2638: ; -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } -/* MOVE.W (d16,An),(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_3168_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W (xxx).W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_30b8_11)(uae_u32 opcode, struct regstruct *regs) { - uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); goto endlabel2639; } {{ uae_s16 src = get_word (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); goto endlabel2639; @@ -10370,27 +9486,25 @@ unsigned long REGPARAM2 CPUFUNC(op_3168_5)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 6); + m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); }}}}}}endlabel2639: ; -return 20 * 256; +return 16 * CYCLE_UNIT / 2; } -/* MOVE.W (d8,An,Xn),(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_3170_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W (xxx).L,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_30b9_11)(uae_u32 opcode, struct regstruct *regs) { - uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca; - srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); +{{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); goto endlabel2640; } {{ uae_s16 src = get_word (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); + exception3 (opcode, m68k_getpc(regs) + 6, dsta); goto endlabel2640; } { put_word (dsta,src); @@ -10401,86 +9515,36 @@ unsigned long REGPARAM2 CPUFUNC(op_3170_5)(uae_u32 opcode, struct regstruct *reg regs->ir = regs->irc; get_word_prefetch (regs, 2); }}}}}}endlabel2640: ; -return 22 * 256; +return 20 * CYCLE_UNIT / 2; } -/* MOVE.W (xxx).W,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_3178_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2641; - } -{{ uae_s16 src = get_word (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2641; - } -{ put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 6); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2641: ; -return 20 * 256; -} -/* MOVE.W (xxx).L,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_3179_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = get_long_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2642; - } -{{ uae_s16 src = get_word (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 8); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2642; - } -{ put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 8); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2642: ; -return 24 * 256; -} -/* MOVE.W (d16,PC),(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_317a_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W (d16,PC),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_30ba_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2643; + goto endlabel2641; } {{ uae_s16 src = get_word (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2643; + goto endlabel2641; } { put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 6); + m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2643: ; -return 20 * 256; +}}}}}}endlabel2641: ; +return 16 * CYCLE_UNIT / 2; } -/* MOVE.W (d8,PC,Xn),(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_317b_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W (d8,PC,Xn),(An) */ +unsigned long REGPARAM2 CPUFUNC(op_30bb_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -10489,134 +9553,190 @@ unsigned long REGPARAM2 CPUFUNC(op_317b_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2644; + goto endlabel2642; } {{ uae_s16 src = get_word (srca); -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2644; + goto endlabel2642; } { put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 6); + m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2644: ; -return 22 * 256; +}}}}}}endlabel2642: ; +return 18 * CYCLE_UNIT / 2; } -/* MOVE.W #.W,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_317c_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W #.W,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_30bc_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2645; + goto endlabel2643; } { put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 6); + m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2645: ; -return 16 * 256; +}}}}endlabel2643: ; +return 12 * CYCLE_UNIT / 2; } -/* MOVE.W Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_3180_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30c0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s16 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta; - dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2646; + goto endlabel2644; } -{ put_word (dsta,src); +{ m68k_areg(regs, dstreg) += 2; + put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 4); + m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2646: ; -return 14 * 256; +}}}}endlabel2644: ; +return 8 * CYCLE_UNIT / 2; } -/* MOVE.W An,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_3188_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W An,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30c8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s16 src = m68k_areg(regs, srcreg); -{ uaecptr dsta; - dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); +{ uaecptr dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2645; + } +{ m68k_areg(regs, dstreg) += 2; + put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2645: ; +return 8 * CYCLE_UNIT / 2; +} +/* MOVE.W (An),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30d0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2646; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2646; + } +{ m68k_areg(regs, dstreg) += 2; + put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2646: ; +return 12 * CYCLE_UNIT / 2; +} +/* MOVE.W (An)+,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30d8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2647; + } +{{ uae_s16 src = get_word (srca); + m68k_areg(regs, srcreg) += 2; +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); goto endlabel2647; } -{ put_word (dsta,src); +{ m68k_areg(regs, dstreg) += 2; + put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 4); + m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2647: ; -return 14 * 256; +}}}}}}endlabel2647: ; +return 12 * CYCLE_UNIT / 2; } -/* MOVE.W (An),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_3190_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W -(An),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); +{{ uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); goto endlabel2648; } {{ uae_s16 src = get_word (srca); -{ uaecptr dsta; - dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); goto endlabel2648; } -{ put_word (dsta,src); +{ m68k_areg(regs, dstreg) += 2; + put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 4); + m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); }}}}}}endlabel2648: ; -return 18 * 256; +return 14 * CYCLE_UNIT / 2; } -/* MOVE.W (An)+,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_3198_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W (d16,An),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); +{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); goto endlabel2649; } {{ uae_s16 src = get_word (srca); - m68k_areg(regs, srcreg) += 2; -{ uaecptr dsta; - dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); + exception3 (opcode, m68k_getpc(regs) + 4, dsta); goto endlabel2649; } -{ put_word (dsta,src); +{ m68k_areg(regs, dstreg) += 2; + put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); @@ -10624,28 +9744,27 @@ unsigned long REGPARAM2 CPUFUNC(op_3198_5)(uae_u32 opcode, struct regstruct *reg regs->ir = regs->irc; get_word_prefetch (regs, 2); }}}}}}endlabel2649: ; -return 18 * 256; +return 16 * CYCLE_UNIT / 2; } -/* MOVE.W -(An),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_31a0_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W (d8,An,Xn),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_areg(regs, srcreg) - 2; + srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); goto endlabel2650; } {{ uae_s16 src = get_word (srca); - m68k_areg (regs, srcreg) = srca; -{ uaecptr dsta; - dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); + exception3 (opcode, m68k_getpc(regs) + 4, dsta); goto endlabel2650; } -{ put_word (dsta,src); +{ m68k_areg(regs, dstreg) += 2; + put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); @@ -10653,54 +9772,51 @@ unsigned long REGPARAM2 CPUFUNC(op_31a0_5)(uae_u32 opcode, struct regstruct *reg regs->ir = regs->irc; get_word_prefetch (regs, 2); }}}}}}endlabel2650: ; -return 20 * 256; +return 18 * CYCLE_UNIT / 2; } -/* MOVE.W (d16,An),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_31a8_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W (xxx).W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30f8_11)(uae_u32 opcode, struct regstruct *regs) { - uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); goto endlabel2651; } {{ uae_s16 src = get_word (srca); -{ uaecptr dsta; - dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); goto endlabel2651; } -{ put_word (dsta,src); +{ m68k_areg(regs, dstreg) += 2; + put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 6); + m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); }}}}}}endlabel2651: ; -return 22 * 256; +return 16 * CYCLE_UNIT / 2; } -/* MOVE.W (d8,An,Xn),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_31b0_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W (xxx).L,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30f9_11)(uae_u32 opcode, struct regstruct *regs) { - uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca; - srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); +{{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); goto endlabel2652; } {{ uae_s16 src = get_word (srca); -{ uaecptr dsta; - dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); + exception3 (opcode, m68k_getpc(regs) + 6, dsta); goto endlabel2652; } -{ put_word (dsta,src); +{ m68k_areg(regs, dstreg) += 2; + put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); @@ -10708,89 +9824,37 @@ unsigned long REGPARAM2 CPUFUNC(op_31b0_5)(uae_u32 opcode, struct regstruct *reg regs->ir = regs->irc; get_word_prefetch (regs, 2); }}}}}}endlabel2652: ; -return 24 * 256; +return 20 * CYCLE_UNIT / 2; } -/* MOVE.W (xxx).W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_31b8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2653; - } -{{ uae_s16 src = get_word (srca); -{ uaecptr dsta; - dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2653; - } -{ put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 6); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2653: ; -return 22 * 256; -} -/* MOVE.W (xxx).L,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_31b9_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = get_long_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2654; - } -{{ uae_s16 src = get_word (srca); -{ uaecptr dsta; - dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 8)); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2654; - } -{ put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 8); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2654: ; -return 26 * 256; -} -/* MOVE.W (d16,PC),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_31ba_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W (d16,PC),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30fa_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2655; + goto endlabel2653; } {{ uae_s16 src = get_word (srca); -{ uaecptr dsta; - dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2655; + goto endlabel2653; } -{ put_word (dsta,src); +{ m68k_areg(regs, dstreg) += 2; + put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 6); + m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2655: ; -return 22 * 256; +}}}}}}endlabel2653: ; +return 16 * CYCLE_UNIT / 2; } -/* MOVE.W (d8,PC,Xn),(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_31bb_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W (d8,PC,Xn),(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30fb_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -10799,340 +9863,424 @@ unsigned long REGPARAM2 CPUFUNC(op_31bb_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2656; + goto endlabel2654; } {{ uae_s16 src = get_word (srca); -{ uaecptr dsta; - dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2656; + goto endlabel2654; } -{ put_word (dsta,src); +{ m68k_areg(regs, dstreg) += 2; + put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 6); + m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2656: ; -return 24 * 256; +}}}}}}endlabel2654: ; +return 18 * CYCLE_UNIT / 2; } -/* MOVE.W #.W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_31bc_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W #.W,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_30fc_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); -{ uaecptr dsta; - dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); +{ uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2657; + goto endlabel2655; } -{ put_word (dsta,src); +{ m68k_areg(regs, dstreg) += 2; + put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 6); + m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2657: ; -return 18 * 256; +}}}}endlabel2655: ; +return 12 * CYCLE_UNIT / 2; } -/* MOVE.W Dn,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_31c0_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3100_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s16 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2656; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 2); +}}}}endlabel2656: ; +return 8 * CYCLE_UNIT / 2; +} +/* MOVE.W An,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3108_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg(regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2657; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 2); +}}}}endlabel2657: ; +return 8 * CYCLE_UNIT / 2; +} +/* MOVE.W (An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3110_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2658; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); goto endlabel2658; } -{ put_word (dsta,src); +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}endlabel2658: ; -return 12 * 256; + m68k_incpc (regs, 2); +}}}}}}endlabel2658: ; +return 12 * CYCLE_UNIT / 2; } -/* MOVE.W An,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_31c8_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W (An)+,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3118_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); -{{ uae_s16 src = m68k_areg(regs, srcreg); -{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2659; + } +{{ uae_s16 src = get_word (srca); + m68k_areg(regs, srcreg) += 2; +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); goto endlabel2659; } -{ put_word (dsta,src); +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}endlabel2659: ; -return 12 * 256; + m68k_incpc (regs, 2); +}}}}}}endlabel2659: ; +return 12 * CYCLE_UNIT / 2; } -/* MOVE.W (An),(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_31d0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr srca = m68k_areg(regs, srcreg); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2660; - } -{{ uae_s16 src = get_word (srca); -{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2660; - } -{ put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2660: ; -return 16 * 256; -} -/* MOVE.W (An)+,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_31d8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr srca = m68k_areg(regs, srcreg); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2661; - } -{{ uae_s16 src = get_word (srca); - m68k_areg(regs, srcreg) += 2; -{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2661; - } -{ put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2661: ; -return 16 * 256; -} -/* MOVE.W -(An),(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_31e0_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W -(An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3120_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; srca = m68k_areg(regs, srcreg) - 2; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2662; + goto endlabel2660; } {{ uae_s16 src = get_word (srca); m68k_areg (regs, srcreg) = srca; -{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2662; + goto endlabel2660; } -{ put_word (dsta,src); +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 2); +}}}}}}endlabel2660: ; +return 14 * CYCLE_UNIT / 2; +} +/* MOVE.W (d16,An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3128_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2661; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2661; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 4); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2662: ; -return 18 * 256; +}}}}}}endlabel2661: ; +return 16 * CYCLE_UNIT / 2; } -/* MOVE.W (d16,An),(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_31e8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2663; - } -{{ uae_s16 src = get_word (srca); -{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2663; - } -{ put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 6); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2663: ; -return 20 * 256; -} -/* MOVE.W (d8,An,Xn),(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_31f0_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W (d8,An,Xn),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3130_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2664; + goto endlabel2662; } {{ uae_s16 src = get_word (srca); -{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2664; + goto endlabel2662; } -{ put_word (dsta,src); +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 6); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2664: ; -return 22 * 256; + m68k_incpc (regs, 4); +}}}}}}endlabel2662: ; +return 18 * CYCLE_UNIT / 2; } -/* MOVE.W (xxx).W,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_31f8_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W (xxx).W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3138_11)(uae_u32 opcode, struct regstruct *regs) { + uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2665; + goto endlabel2663; } {{ uae_s16 src = get_word (srca); -{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2665; + goto endlabel2663; } -{ put_word (dsta,src); +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 4); +}}}}}}endlabel2663: ; +return 16 * CYCLE_UNIT / 2; +} +/* MOVE.W (xxx).L,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_3139_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2664; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2664; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); m68k_incpc (regs, 6); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2665: ; -return 20 * 256; +}}}}}}endlabel2664: ; +return 20 * CYCLE_UNIT / 2; } -/* MOVE.W (xxx).L,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_31f9_5)(uae_u32 opcode, struct regstruct *regs) -{ -{{ uaecptr srca = get_long_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2666; - } -{{ uae_s16 src = get_word (srca); -{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 8); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2666; - } -{ put_word (dsta,src); - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 8); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2666: ; -return 24 * 256; -} -/* MOVE.W (d16,PC),(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_31fa_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W (d16,PC),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_313a_11)(uae_u32 opcode, struct regstruct *regs) { + uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2667; + goto endlabel2665; } {{ uae_s16 src = get_word (srca); -{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2667; + goto endlabel2665; } -{ put_word (dsta,src); +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 6); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}}}}}endlabel2667: ; -return 20 * 256; + m68k_incpc (regs, 4); +}}}}}}endlabel2665: ; +return 16 * CYCLE_UNIT / 2; } -/* MOVE.W (d8,PC,Xn),(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_31fb_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W (d8,PC,Xn),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_313b_11)(uae_u32 opcode, struct regstruct *regs) { + uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; tmppc = m68k_getpc(regs) + 2; srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2668; + goto endlabel2666; } {{ uae_s16 src = get_word (srca); -{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2666; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 4); +}}}}}}endlabel2666: ; +return 18 * CYCLE_UNIT / 2; +} +/* MOVE.W #.W,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_313c_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2667; + } +{ m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 4); +}}}}endlabel2667: ; +return 12 * CYCLE_UNIT / 2; +} +/* MOVE.W Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_3140_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); goto endlabel2668; } { put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 6); + m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2668: ; -return 22 * 256; +}}}}endlabel2668: ; +return 12 * CYCLE_UNIT / 2; } -/* MOVE.W #.W,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_31fc_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W An,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_3148_11)(uae_u32 opcode, struct regstruct *regs) { -{{ uae_s16 src = get_word_prefetch (regs, 4); -{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg(regs, srcreg); +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 4, dsta); + exception3 (opcode, m68k_getpc(regs) + 2, dsta); goto endlabel2669; } { put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 6); + m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); }}}}endlabel2669: ; -return 16 * 256; +return 12 * CYCLE_UNIT / 2; } -/* MOVE.W Dn,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_33c0_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W (An),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_3150_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); -{{ uae_s16 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta = get_long_prefetch (regs, 4); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2670; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); goto endlabel2670; @@ -11141,22 +10289,83 @@ unsigned long REGPARAM2 CPUFUNC(op_33c0_5)(uae_u32 opcode, struct regstruct *reg CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - m68k_incpc (regs, 6); + m68k_incpc (regs, 4); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2670: ; -return 16 * 256; +}}}}}}endlabel2670: ; +return 16 * CYCLE_UNIT / 2; } -/* MOVE.W An,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_33c8_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W (An)+,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_3158_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); -{{ uae_s16 src = m68k_areg(regs, srcreg); -{ uaecptr dsta = get_long_prefetch (regs, 4); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2671; + } +{{ uae_s16 src = get_word (srca); + m68k_areg(regs, srcreg) += 2; +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); goto endlabel2671; } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2671: ; +return 16 * CYCLE_UNIT / 2; +} +/* MOVE.W -(An),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_3160_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2672; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2672; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2672: ; +return 18 * CYCLE_UNIT / 2; +} +/* MOVE.W (d16,An),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_3168_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2673; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2673; + } { put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); @@ -11164,17 +10373,808 @@ unsigned long REGPARAM2 CPUFUNC(op_33c8_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 6); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2671: ; -return 16 * 256; +}}}}}}endlabel2673: ; +return 20 * CYCLE_UNIT / 2; } -/* MOVE.W (An),(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_33d0_5)(uae_u32 opcode, struct regstruct *regs) +/* MOVE.W (d8,An,Xn),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_3170_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2674; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2674; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2674: ; +return 22 * CYCLE_UNIT / 2; +} +/* MOVE.W (xxx).W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_3178_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2675; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2675; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2675: ; +return 20 * CYCLE_UNIT / 2; +} +/* MOVE.W (xxx).L,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_3179_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2676; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2676; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2676: ; +return 24 * CYCLE_UNIT / 2; +} +/* MOVE.W (d16,PC),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_317a_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2677; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2677; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2677: ; +return 20 * CYCLE_UNIT / 2; +} +/* MOVE.W (d8,PC,Xn),(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_317b_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc(regs) + 2; + srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2678; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2678; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2678: ; +return 22 * CYCLE_UNIT / 2; +} +/* MOVE.W #.W,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_317c_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2679; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2679: ; +return 16 * CYCLE_UNIT / 2; +} +/* MOVE.W Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_3180_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2680; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2680: ; +return 14 * CYCLE_UNIT / 2; +} +/* MOVE.W An,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_3188_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg(regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2681; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2681: ; +return 14 * CYCLE_UNIT / 2; +} +/* MOVE.W (An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_3190_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2682; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2682; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2682: ; +return 18 * CYCLE_UNIT / 2; +} +/* MOVE.W (An)+,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_3198_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2683; + } +{{ uae_s16 src = get_word (srca); + m68k_areg(regs, srcreg) += 2; +{ uaecptr dsta; + dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2683; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2683: ; +return 18 * CYCLE_UNIT / 2; +} +/* MOVE.W -(An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31a0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2684; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2684; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2684: ; +return 20 * CYCLE_UNIT / 2; +} +/* MOVE.W (d16,An),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31a8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2685; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2685; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2685: ; +return 22 * CYCLE_UNIT / 2; +} +/* MOVE.W (d8,An,Xn),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31b0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2686; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2686; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2686: ; +return 24 * CYCLE_UNIT / 2; +} +/* MOVE.W (xxx).W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31b8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2687; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2687; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2687: ; +return 22 * CYCLE_UNIT / 2; +} +/* MOVE.W (xxx).L,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31b9_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2688; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 8)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2688; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2688: ; +return 26 * CYCLE_UNIT / 2; +} +/* MOVE.W (d16,PC),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31ba_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2689; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2689; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2689: ; +return 22 * CYCLE_UNIT / 2; +} +/* MOVE.W (d8,PC,Xn),(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31bb_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc(regs) + 2; + srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2690; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta; + dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2690; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2690: ; +return 24 * CYCLE_UNIT / 2; +} +/* MOVE.W #.W,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_31bc_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta; + dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2691; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2691: ; +return 18 * CYCLE_UNIT / 2; +} +/* MOVE.W Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31c0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2692; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2692: ; +return 12 * CYCLE_UNIT / 2; +} +/* MOVE.W An,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31c8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_areg(regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2693; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2693: ; +return 12 * CYCLE_UNIT / 2; +} +/* MOVE.W (An),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2672; + goto endlabel2694; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2694; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2694: ; +return 16 * CYCLE_UNIT / 2; +} +/* MOVE.W (An)+,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31d8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2695; + } +{{ uae_s16 src = get_word (srca); + m68k_areg(regs, srcreg) += 2; +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2695; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2695: ; +return 16 * CYCLE_UNIT / 2; +} +/* MOVE.W -(An),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31e0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2696; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2696; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 4); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2696: ; +return 18 * CYCLE_UNIT / 2; +} +/* MOVE.W (d16,An),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31e8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2697; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2697; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2697: ; +return 20 * CYCLE_UNIT / 2; +} +/* MOVE.W (d8,An,Xn),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31f0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca; + srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2698; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2698; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2698: ; +return 22 * CYCLE_UNIT / 2; +} +/* MOVE.W (xxx).W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31f8_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2699; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2699; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2699: ; +return 20 * CYCLE_UNIT / 2; +} +/* MOVE.W (xxx).L,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31f9_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2700; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 8); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 6, dsta); + goto endlabel2700; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 8); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2700: ; +return 24 * CYCLE_UNIT / 2; +} +/* MOVE.W (d16,PC),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31fa_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2701; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2701; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2701: ; +return 20 * CYCLE_UNIT / 2; +} +/* MOVE.W (d8,PC,Xn),(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31fb_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc(regs) + 2; + srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2702; + } +{{ uae_s16 src = get_word (srca); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2702; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}}}endlabel2702: ; +return 22 * CYCLE_UNIT / 2; +} +/* MOVE.W #.W,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_31fc_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 4, dsta); + goto endlabel2703; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2703: ; +return 16 * CYCLE_UNIT / 2; +} +/* MOVE.W Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_33c0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2704; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2704: ; +return 16 * CYCLE_UNIT / 2; +} +/* MOVE.W An,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_33c8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uae_s16 src = m68k_areg(regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel2705; + } +{ put_word (dsta,src); + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + m68k_incpc (regs, 6); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}}}endlabel2705: ; +return 16 * CYCLE_UNIT / 2; +} +/* MOVE.W (An),(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_33d0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel2706; } {{ uae_s16 src = get_word (srca); { uaecptr dsta; @@ -11182,7 +11182,7 @@ unsigned long REGPARAM2 CPUFUNC(op_33d0_5)(uae_u32 opcode, struct regstruct *reg dsta |= regs->irc; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2672; + goto endlabel2706; } { put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); @@ -11192,17 +11192,17 @@ unsigned long REGPARAM2 CPUFUNC(op_33d0_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2672: ; -return 20 * 256; +}}}}}}endlabel2706: ; +return 20 * CYCLE_UNIT / 2; } /* MOVE.W (An)+,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_33d8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_33d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2673; + goto endlabel2707; } {{ uae_s16 src = get_word (srca); m68k_areg(regs, srcreg) += 2; @@ -11211,7 +11211,7 @@ unsigned long REGPARAM2 CPUFUNC(op_33d8_5)(uae_u32 opcode, struct regstruct *reg dsta |= regs->irc; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2673; + goto endlabel2707; } { put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); @@ -11221,18 +11221,18 @@ unsigned long REGPARAM2 CPUFUNC(op_33d8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2673: ; -return 20 * 256; +}}}}}}endlabel2707: ; +return 20 * CYCLE_UNIT / 2; } /* MOVE.W -(An),(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_33e0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_33e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = m68k_areg(regs, srcreg) - 2; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2674; + goto endlabel2708; } {{ uae_s16 src = get_word (srca); m68k_areg (regs, srcreg) = srca; @@ -11241,7 +11241,7 @@ unsigned long REGPARAM2 CPUFUNC(op_33e0_5)(uae_u32 opcode, struct regstruct *reg dsta |= regs->irc; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2674; + goto endlabel2708; } { put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); @@ -11251,17 +11251,17 @@ unsigned long REGPARAM2 CPUFUNC(op_33e0_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2674: ; -return 22 * 256; +}}}}}}endlabel2708: ; +return 22 * CYCLE_UNIT / 2; } /* MOVE.W (d16,An),(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_33e8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_33e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2675; + goto endlabel2709; } {{ uae_s16 src = get_word (srca); { uaecptr dsta; @@ -11269,7 +11269,7 @@ unsigned long REGPARAM2 CPUFUNC(op_33e8_5)(uae_u32 opcode, struct regstruct *reg dsta |= regs->irc; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2675; + goto endlabel2709; } { put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); @@ -11279,18 +11279,18 @@ unsigned long REGPARAM2 CPUFUNC(op_33e8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2675: ; -return 24 * 256; +}}}}}}endlabel2709: ; +return 24 * CYCLE_UNIT / 2; } /* MOVE.W (d8,An,Xn),(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_33f0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_33f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2676; + goto endlabel2710; } {{ uae_s16 src = get_word (srca); { uaecptr dsta; @@ -11298,7 +11298,7 @@ unsigned long REGPARAM2 CPUFUNC(op_33f0_5)(uae_u32 opcode, struct regstruct *reg dsta |= regs->irc; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2676; + goto endlabel2710; } { put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); @@ -11308,16 +11308,16 @@ unsigned long REGPARAM2 CPUFUNC(op_33f0_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2676: ; -return 26 * 256; +}}}}}}endlabel2710: ; +return 26 * CYCLE_UNIT / 2; } /* MOVE.W (xxx).W,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_33f8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_33f8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2677; + goto endlabel2711; } {{ uae_s16 src = get_word (srca); { uaecptr dsta; @@ -11325,7 +11325,7 @@ unsigned long REGPARAM2 CPUFUNC(op_33f8_5)(uae_u32 opcode, struct regstruct *reg dsta |= regs->irc; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2677; + goto endlabel2711; } { put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); @@ -11335,16 +11335,16 @@ unsigned long REGPARAM2 CPUFUNC(op_33f8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2677: ; -return 24 * 256; +}}}}}}endlabel2711: ; +return 24 * CYCLE_UNIT / 2; } /* MOVE.W (xxx).L,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_33f9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_33f9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2678; + goto endlabel2712; } {{ uae_s16 src = get_word (srca); { uaecptr dsta; @@ -11352,7 +11352,7 @@ unsigned long REGPARAM2 CPUFUNC(op_33f9_5)(uae_u32 opcode, struct regstruct *reg dsta |= regs->irc; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2678; + goto endlabel2712; } { put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); @@ -11362,17 +11362,17 @@ unsigned long REGPARAM2 CPUFUNC(op_33f9_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2678: ; -return 28 * 256; +}}}}}}endlabel2712: ; +return 28 * CYCLE_UNIT / 2; } /* MOVE.W (d16,PC),(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_33fa_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_33fa_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2679; + goto endlabel2713; } {{ uae_s16 src = get_word (srca); { uaecptr dsta; @@ -11380,7 +11380,7 @@ unsigned long REGPARAM2 CPUFUNC(op_33fa_5)(uae_u32 opcode, struct regstruct *reg dsta |= regs->irc; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2679; + goto endlabel2713; } { put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); @@ -11390,11 +11390,11 @@ unsigned long REGPARAM2 CPUFUNC(op_33fa_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2679: ; -return 24 * 256; +}}}}}}endlabel2713: ; +return 24 * CYCLE_UNIT / 2; } /* MOVE.W (d8,PC,Xn),(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_33fb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_33fb_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr tmppc; uaecptr srca; @@ -11402,7 +11402,7 @@ unsigned long REGPARAM2 CPUFUNC(op_33fb_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2680; + goto endlabel2714; } {{ uae_s16 src = get_word (srca); { uaecptr dsta; @@ -11410,7 +11410,7 @@ unsigned long REGPARAM2 CPUFUNC(op_33fb_5)(uae_u32 opcode, struct regstruct *reg dsta |= regs->irc; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2680; + goto endlabel2714; } { put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); @@ -11420,17 +11420,17 @@ unsigned long REGPARAM2 CPUFUNC(op_33fb_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}endlabel2680: ; -return 26 * 256; +}}}}}}endlabel2714: ; +return 26 * CYCLE_UNIT / 2; } /* MOVE.W #.W,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_33fc_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_33fc_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta = get_long_prefetch (regs, 6); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2681; + goto endlabel2715; } { put_word (dsta,src); CLEAR_CZNV (®s->ccrflags); @@ -11439,11 +11439,11 @@ unsigned long REGPARAM2 CPUFUNC(op_33fc_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 8); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2681: ; -return 20 * 256; +}}}}endlabel2715: ; +return 20 * CYCLE_UNIT / 2; } /* NEGX.B Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4000_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4000_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -11460,10 +11460,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4000_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* NEGX.B (An) */ -unsigned long REGPARAM2 CPUFUNC(op_4010_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4010_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -11481,10 +11481,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4010_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (srca,newv); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* NEGX.B (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_4018_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4018_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -11503,10 +11503,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4018_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (srca,newv); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* NEGX.B -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_4020_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4020_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -11526,10 +11526,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4020_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (srca,newv); }}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* NEGX.B (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_4028_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4028_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -11547,10 +11547,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4028_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (srca,newv); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* NEGX.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4030_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4030_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -11569,10 +11569,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4030_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (srca,newv); }}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* NEGX.B (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_4038_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4038_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -11589,10 +11589,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4038_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (srca,newv); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* NEGX.B (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_4039_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4039_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -11609,10 +11609,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4039_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (srca,newv); }}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* NEGX.W Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4040_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4040_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg(regs, srcreg); @@ -11629,16 +11629,16 @@ unsigned long REGPARAM2 CPUFUNC(op_4040_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((newv) & 0xffff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* NEGX.W (An) */ -unsigned long REGPARAM2 CPUFUNC(op_4050_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4050_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2691; + goto endlabel2725; } {{ uae_s16 src = get_word (srca); regs->ir = regs->irc; @@ -11654,17 +11654,17 @@ unsigned long REGPARAM2 CPUFUNC(op_4050_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); put_word (srca,newv); }}}}}} m68k_incpc (regs, 2); -endlabel2691: ; -return 12 * 256; +endlabel2725: ; +return 12 * CYCLE_UNIT / 2; } /* NEGX.W (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_4058_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4058_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2692; + goto endlabel2726; } {{ uae_s16 src = get_word (srca); m68k_areg(regs, srcreg) += 2; @@ -11681,18 +11681,18 @@ unsigned long REGPARAM2 CPUFUNC(op_4058_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); put_word (srca,newv); }}}}}} m68k_incpc (regs, 2); -endlabel2692: ; -return 12 * 256; +endlabel2726: ; +return 12 * CYCLE_UNIT / 2; } /* NEGX.W -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_4060_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4060_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = m68k_areg(regs, srcreg) - 2; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2693; + goto endlabel2727; } {{ uae_s16 src = get_word (srca); m68k_areg (regs, srcreg) = srca; @@ -11709,17 +11709,17 @@ unsigned long REGPARAM2 CPUFUNC(op_4060_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); put_word (srca,newv); }}}}}} m68k_incpc (regs, 2); -endlabel2693: ; -return 14 * 256; +endlabel2727: ; +return 14 * CYCLE_UNIT / 2; } /* NEGX.W (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_4068_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4068_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2694; + goto endlabel2728; } {{ uae_s16 src = get_word (srca); regs->ir = regs->irc; @@ -11735,18 +11735,18 @@ unsigned long REGPARAM2 CPUFUNC(op_4068_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); put_word (srca,newv); }}}}}} m68k_incpc (regs, 4); -endlabel2694: ; -return 16 * 256; +endlabel2728: ; +return 16 * CYCLE_UNIT / 2; } /* NEGX.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4070_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4070_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2695; + goto endlabel2729; } {{ uae_s16 src = get_word (srca); regs->ir = regs->irc; @@ -11762,16 +11762,16 @@ unsigned long REGPARAM2 CPUFUNC(op_4070_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); put_word (srca,newv); }}}}}} m68k_incpc (regs, 4); -endlabel2695: ; -return 18 * 256; +endlabel2729: ; +return 18 * CYCLE_UNIT / 2; } /* NEGX.W (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_4078_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4078_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2696; + goto endlabel2730; } {{ uae_s16 src = get_word (srca); regs->ir = regs->irc; @@ -11787,16 +11787,16 @@ unsigned long REGPARAM2 CPUFUNC(op_4078_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); put_word (srca,newv); }}}}}} m68k_incpc (regs, 4); -endlabel2696: ; -return 16 * 256; +endlabel2730: ; +return 16 * CYCLE_UNIT / 2; } /* NEGX.W (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_4079_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4079_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2697; + goto endlabel2731; } {{ uae_s16 src = get_word (srca); regs->ir = regs->irc; @@ -11812,11 +11812,11 @@ unsigned long REGPARAM2 CPUFUNC(op_4079_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); put_word (srca,newv); }}}}}} m68k_incpc (regs, 6); -endlabel2697: ; -return 20 * 256; +endlabel2731: ; +return 20 * CYCLE_UNIT / 2; } /* NEGX.L Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4080_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4080_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s32 src = m68k_dreg(regs, srcreg); @@ -11833,16 +11833,16 @@ unsigned long REGPARAM2 CPUFUNC(op_4080_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, srcreg) = (newv); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* NEGX.L (An) */ -unsigned long REGPARAM2 CPUFUNC(op_4090_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4090_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2699; + goto endlabel2733; } {{ uae_s32 src = get_long (srca); regs->ir = regs->irc; @@ -11858,17 +11858,17 @@ unsigned long REGPARAM2 CPUFUNC(op_4090_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); put_long (srca,newv); }}}}}} m68k_incpc (regs, 2); -endlabel2699: ; -return 20 * 256; +endlabel2733: ; +return 20 * CYCLE_UNIT / 2; } /* NEGX.L (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_4098_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4098_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2700; + goto endlabel2734; } {{ uae_s32 src = get_long (srca); m68k_areg(regs, srcreg) += 4; @@ -11885,18 +11885,18 @@ unsigned long REGPARAM2 CPUFUNC(op_4098_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); put_long (srca,newv); }}}}}} m68k_incpc (regs, 2); -endlabel2700: ; -return 20 * 256; +endlabel2734: ; +return 20 * CYCLE_UNIT / 2; } /* NEGX.L -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_40a0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_40a0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = m68k_areg(regs, srcreg) - 4; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2701; + goto endlabel2735; } {{ uae_s32 src = get_long (srca); m68k_areg (regs, srcreg) = srca; @@ -11913,17 +11913,17 @@ unsigned long REGPARAM2 CPUFUNC(op_40a0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); put_long (srca,newv); }}}}}} m68k_incpc (regs, 2); -endlabel2701: ; -return 22 * 256; +endlabel2735: ; +return 22 * CYCLE_UNIT / 2; } /* NEGX.L (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_40a8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_40a8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2702; + goto endlabel2736; } {{ uae_s32 src = get_long (srca); regs->ir = regs->irc; @@ -11939,18 +11939,18 @@ unsigned long REGPARAM2 CPUFUNC(op_40a8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); put_long (srca,newv); }}}}}} m68k_incpc (regs, 4); -endlabel2702: ; -return 24 * 256; +endlabel2736: ; +return 24 * CYCLE_UNIT / 2; } /* NEGX.L (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_40b0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_40b0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2703; + goto endlabel2737; } {{ uae_s32 src = get_long (srca); regs->ir = regs->irc; @@ -11966,16 +11966,16 @@ unsigned long REGPARAM2 CPUFUNC(op_40b0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); put_long (srca,newv); }}}}}} m68k_incpc (regs, 4); -endlabel2703: ; -return 26 * 256; +endlabel2737: ; +return 26 * CYCLE_UNIT / 2; } /* NEGX.L (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_40b8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_40b8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2704; + goto endlabel2738; } {{ uae_s32 src = get_long (srca); regs->ir = regs->irc; @@ -11991,16 +11991,16 @@ unsigned long REGPARAM2 CPUFUNC(op_40b8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); put_long (srca,newv); }}}}}} m68k_incpc (regs, 4); -endlabel2704: ; -return 24 * 256; +endlabel2738: ; +return 24 * CYCLE_UNIT / 2; } /* NEGX.L (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_40b9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_40b9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2705; + goto endlabel2739; } {{ uae_s32 src = get_long (srca); regs->ir = regs->irc; @@ -12016,11 +12016,11 @@ unsigned long REGPARAM2 CPUFUNC(op_40b9_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); put_long (srca,newv); }}}}}} m68k_incpc (regs, 6); -endlabel2705: ; -return 28 * 256; +endlabel2739: ; +return 28 * CYCLE_UNIT / 2; } /* MVSR2.W Dn */ -unsigned long REGPARAM2 CPUFUNC(op_40c0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_40c0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ regs->ir = regs->irc; @@ -12028,33 +12028,33 @@ unsigned long REGPARAM2 CPUFUNC(op_40c0_5)(uae_u32 opcode, struct regstruct *reg MakeSR(regs); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs->sr) & 0xffff); }} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* MVSR2.W (An) */ -unsigned long REGPARAM2 CPUFUNC(op_40d0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_40d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2707; + goto endlabel2741; } { regs->ir = regs->irc; get_word_prefetch (regs, 4); MakeSR(regs); put_word (srca,regs->sr); }}} m68k_incpc (regs, 2); -endlabel2707: ; -return 8 * 256; +endlabel2741: ; +return 8 * CYCLE_UNIT / 2; } /* MVSR2.W (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_40d8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_40d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2708; + goto endlabel2742; } { m68k_areg(regs, srcreg) += 2; regs->ir = regs->irc; @@ -12062,18 +12062,18 @@ unsigned long REGPARAM2 CPUFUNC(op_40d8_5)(uae_u32 opcode, struct regstruct *reg MakeSR(regs); put_word (srca,regs->sr); }}} m68k_incpc (regs, 2); -endlabel2708: ; -return 8 * 256; +endlabel2742: ; +return 8 * CYCLE_UNIT / 2; } /* MVSR2.W -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_40e0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_40e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = m68k_areg(regs, srcreg) - 2; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2709; + goto endlabel2743; } { m68k_areg (regs, srcreg) = srca; regs->ir = regs->irc; @@ -12081,78 +12081,78 @@ unsigned long REGPARAM2 CPUFUNC(op_40e0_5)(uae_u32 opcode, struct regstruct *reg MakeSR(regs); put_word (srca,regs->sr); }}} m68k_incpc (regs, 2); -endlabel2709: ; -return 10 * 256; +endlabel2743: ; +return 10 * CYCLE_UNIT / 2; } /* MVSR2.W (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_40e8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_40e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2710; + goto endlabel2744; } { regs->ir = regs->irc; get_word_prefetch (regs, 6); MakeSR(regs); put_word (srca,regs->sr); }}} m68k_incpc (regs, 4); -endlabel2710: ; -return 12 * 256; +endlabel2744: ; +return 12 * CYCLE_UNIT / 2; } /* MVSR2.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_40f0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_40f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2711; + goto endlabel2745; } { regs->ir = regs->irc; get_word_prefetch (regs, 6); MakeSR(regs); put_word (srca,regs->sr); }}} m68k_incpc (regs, 4); -endlabel2711: ; -return 14 * 256; +endlabel2745: ; +return 14 * CYCLE_UNIT / 2; } /* MVSR2.W (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_40f8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_40f8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2712; + goto endlabel2746; } { regs->ir = regs->irc; get_word_prefetch (regs, 6); MakeSR(regs); put_word (srca,regs->sr); }}} m68k_incpc (regs, 4); -endlabel2712: ; -return 12 * 256; +endlabel2746: ; +return 12 * CYCLE_UNIT / 2; } /* MVSR2.W (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_40f9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_40f9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2713; + goto endlabel2747; } { regs->ir = regs->irc; get_word_prefetch (regs, 8); MakeSR(regs); put_word (srca,regs->sr); }}} m68k_incpc (regs, 6); -endlabel2713: ; -return 16 * 256; +endlabel2747: ; +return 16 * CYCLE_UNIT / 2; } /* CHK.L Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4100_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4100_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -12165,17 +12165,17 @@ unsigned long REGPARAM2 CPUFUNC(op_4100_5)(uae_u32 opcode, struct regstruct *reg if ((uae_s32)dst < 0) { SET_NFLG (®s->ccrflags, 1); Exception (6, regs, oldpc); - goto endlabel2714; + goto endlabel2748; } else if (dst > src) { SET_NFLG (®s->ccrflags, 0); Exception (6, regs, oldpc); - goto endlabel2714; + goto endlabel2748; } -}}}endlabel2714: ; -return 4 * 256; +}}}endlabel2748: ; +return 4 * CYCLE_UNIT / 2; } /* CHK.L (An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4110_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4110_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -12183,7 +12183,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4110_5)(uae_u32 opcode, struct regstruct *reg { uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2715; + goto endlabel2749; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -12193,17 +12193,17 @@ unsigned long REGPARAM2 CPUFUNC(op_4110_5)(uae_u32 opcode, struct regstruct *reg if ((uae_s32)dst < 0) { SET_NFLG (®s->ccrflags, 1); Exception (6, regs, oldpc); - goto endlabel2715; + goto endlabel2749; } else if (dst > src) { SET_NFLG (®s->ccrflags, 0); Exception (6, regs, oldpc); - goto endlabel2715; + goto endlabel2749; } -}}}}}endlabel2715: ; -return 12 * 256; +}}}}}endlabel2749: ; +return 12 * CYCLE_UNIT / 2; } /* CHK.L (An)+,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4118_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4118_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -12211,7 +12211,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4118_5)(uae_u32 opcode, struct regstruct *reg { uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2716; + goto endlabel2750; } {{ uae_s32 src = get_long (srca); m68k_areg(regs, srcreg) += 4; @@ -12222,17 +12222,17 @@ unsigned long REGPARAM2 CPUFUNC(op_4118_5)(uae_u32 opcode, struct regstruct *reg if ((uae_s32)dst < 0) { SET_NFLG (®s->ccrflags, 1); Exception (6, regs, oldpc); - goto endlabel2716; + goto endlabel2750; } else if (dst > src) { SET_NFLG (®s->ccrflags, 0); Exception (6, regs, oldpc); - goto endlabel2716; + goto endlabel2750; } -}}}}}endlabel2716: ; -return 12 * 256; +}}}}}endlabel2750: ; +return 12 * CYCLE_UNIT / 2; } /* CHK.L -(An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4120_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4120_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -12241,7 +12241,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4120_5)(uae_u32 opcode, struct regstruct *reg srca = m68k_areg(regs, srcreg) - 4; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2717; + goto endlabel2751; } {{ uae_s32 src = get_long (srca); m68k_areg (regs, srcreg) = srca; @@ -12252,17 +12252,17 @@ unsigned long REGPARAM2 CPUFUNC(op_4120_5)(uae_u32 opcode, struct regstruct *reg if ((uae_s32)dst < 0) { SET_NFLG (®s->ccrflags, 1); Exception (6, regs, oldpc); - goto endlabel2717; + goto endlabel2751; } else if (dst > src) { SET_NFLG (®s->ccrflags, 0); Exception (6, regs, oldpc); - goto endlabel2717; + goto endlabel2751; } -}}}}}endlabel2717: ; -return 14 * 256; +}}}}}endlabel2751: ; +return 14 * CYCLE_UNIT / 2; } /* CHK.L (d16,An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4128_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4128_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -12270,7 +12270,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4128_5)(uae_u32 opcode, struct regstruct *reg { uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2718; + goto endlabel2752; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -12280,17 +12280,17 @@ unsigned long REGPARAM2 CPUFUNC(op_4128_5)(uae_u32 opcode, struct regstruct *reg if ((uae_s32)dst < 0) { SET_NFLG (®s->ccrflags, 1); Exception (6, regs, oldpc); - goto endlabel2718; + goto endlabel2752; } else if (dst > src) { SET_NFLG (®s->ccrflags, 0); Exception (6, regs, oldpc); - goto endlabel2718; + goto endlabel2752; } -}}}}}endlabel2718: ; -return 16 * 256; +}}}}}endlabel2752: ; +return 16 * CYCLE_UNIT / 2; } /* CHK.L (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4130_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4130_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -12299,7 +12299,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4130_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2719; + goto endlabel2753; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -12309,24 +12309,24 @@ unsigned long REGPARAM2 CPUFUNC(op_4130_5)(uae_u32 opcode, struct regstruct *reg if ((uae_s32)dst < 0) { SET_NFLG (®s->ccrflags, 1); Exception (6, regs, oldpc); - goto endlabel2719; + goto endlabel2753; } else if (dst > src) { SET_NFLG (®s->ccrflags, 0); Exception (6, regs, oldpc); - goto endlabel2719; + goto endlabel2753; } -}}}}}endlabel2719: ; -return 18 * 256; +}}}}}endlabel2753: ; +return 18 * CYCLE_UNIT / 2; } /* CHK.L (xxx).W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4138_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4138_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; { uaecptr oldpc = m68k_getpc(regs); { uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2720; + goto endlabel2754; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -12336,24 +12336,24 @@ unsigned long REGPARAM2 CPUFUNC(op_4138_5)(uae_u32 opcode, struct regstruct *reg if ((uae_s32)dst < 0) { SET_NFLG (®s->ccrflags, 1); Exception (6, regs, oldpc); - goto endlabel2720; + goto endlabel2754; } else if (dst > src) { SET_NFLG (®s->ccrflags, 0); Exception (6, regs, oldpc); - goto endlabel2720; + goto endlabel2754; } -}}}}}endlabel2720: ; -return 16 * 256; +}}}}}endlabel2754: ; +return 16 * CYCLE_UNIT / 2; } /* CHK.L (xxx).L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4139_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4139_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; { uaecptr oldpc = m68k_getpc(regs); { uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2721; + goto endlabel2755; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -12363,17 +12363,17 @@ unsigned long REGPARAM2 CPUFUNC(op_4139_5)(uae_u32 opcode, struct regstruct *reg if ((uae_s32)dst < 0) { SET_NFLG (®s->ccrflags, 1); Exception (6, regs, oldpc); - goto endlabel2721; + goto endlabel2755; } else if (dst > src) { SET_NFLG (®s->ccrflags, 0); Exception (6, regs, oldpc); - goto endlabel2721; + goto endlabel2755; } -}}}}}endlabel2721: ; -return 20 * 256; +}}}}}endlabel2755: ; +return 20 * CYCLE_UNIT / 2; } /* CHK.L (d16,PC),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_413a_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_413a_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; { uaecptr oldpc = m68k_getpc(regs); @@ -12381,7 +12381,7 @@ unsigned long REGPARAM2 CPUFUNC(op_413a_5)(uae_u32 opcode, struct regstruct *reg srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2722; + goto endlabel2756; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -12391,17 +12391,17 @@ unsigned long REGPARAM2 CPUFUNC(op_413a_5)(uae_u32 opcode, struct regstruct *reg if ((uae_s32)dst < 0) { SET_NFLG (®s->ccrflags, 1); Exception (6, regs, oldpc); - goto endlabel2722; + goto endlabel2756; } else if (dst > src) { SET_NFLG (®s->ccrflags, 0); Exception (6, regs, oldpc); - goto endlabel2722; + goto endlabel2756; } -}}}}}endlabel2722: ; -return 16 * 256; +}}}}}endlabel2756: ; +return 16 * CYCLE_UNIT / 2; } /* CHK.L (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_413b_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_413b_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; { uaecptr oldpc = m68k_getpc(regs); @@ -12411,7 +12411,7 @@ unsigned long REGPARAM2 CPUFUNC(op_413b_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2723; + goto endlabel2757; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -12421,17 +12421,17 @@ unsigned long REGPARAM2 CPUFUNC(op_413b_5)(uae_u32 opcode, struct regstruct *reg if ((uae_s32)dst < 0) { SET_NFLG (®s->ccrflags, 1); Exception (6, regs, oldpc); - goto endlabel2723; + goto endlabel2757; } else if (dst > src) { SET_NFLG (®s->ccrflags, 0); Exception (6, regs, oldpc); - goto endlabel2723; + goto endlabel2757; } -}}}}}endlabel2723: ; -return 18 * 256; +}}}}}endlabel2757: ; +return 18 * CYCLE_UNIT / 2; } /* CHK.L #.L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_413c_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_413c_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; { uaecptr oldpc = m68k_getpc(regs); @@ -12443,17 +12443,17 @@ unsigned long REGPARAM2 CPUFUNC(op_413c_5)(uae_u32 opcode, struct regstruct *reg if ((uae_s32)dst < 0) { SET_NFLG (®s->ccrflags, 1); Exception (6, regs, oldpc); - goto endlabel2724; + goto endlabel2758; } else if (dst > src) { SET_NFLG (®s->ccrflags, 0); Exception (6, regs, oldpc); - goto endlabel2724; + goto endlabel2758; } -}}}endlabel2724: ; -return 12 * 256; +}}}endlabel2758: ; +return 12 * CYCLE_UNIT / 2; } /* CHK.W Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4180_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4180_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -12466,17 +12466,17 @@ unsigned long REGPARAM2 CPUFUNC(op_4180_5)(uae_u32 opcode, struct regstruct *reg if ((uae_s32)dst < 0) { SET_NFLG (®s->ccrflags, 1); Exception (6, regs, oldpc); - goto endlabel2725; + goto endlabel2759; } else if (dst > src) { SET_NFLG (®s->ccrflags, 0); Exception (6, regs, oldpc); - goto endlabel2725; + goto endlabel2759; } -}}}endlabel2725: ; -return 4 * 256; +}}}endlabel2759: ; +return 4 * CYCLE_UNIT / 2; } /* CHK.W (An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4190_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4190_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -12484,7 +12484,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4190_5)(uae_u32 opcode, struct regstruct *reg { uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2726; + goto endlabel2760; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -12494,17 +12494,17 @@ unsigned long REGPARAM2 CPUFUNC(op_4190_5)(uae_u32 opcode, struct regstruct *reg if ((uae_s32)dst < 0) { SET_NFLG (®s->ccrflags, 1); Exception (6, regs, oldpc); - goto endlabel2726; + goto endlabel2760; } else if (dst > src) { SET_NFLG (®s->ccrflags, 0); Exception (6, regs, oldpc); - goto endlabel2726; + goto endlabel2760; } -}}}}}endlabel2726: ; -return 8 * 256; +}}}}}endlabel2760: ; +return 8 * CYCLE_UNIT / 2; } /* CHK.W (An)+,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4198_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4198_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -12512,7 +12512,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4198_5)(uae_u32 opcode, struct regstruct *reg { uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2727; + goto endlabel2761; } {{ uae_s16 src = get_word (srca); m68k_areg(regs, srcreg) += 2; @@ -12523,17 +12523,17 @@ unsigned long REGPARAM2 CPUFUNC(op_4198_5)(uae_u32 opcode, struct regstruct *reg if ((uae_s32)dst < 0) { SET_NFLG (®s->ccrflags, 1); Exception (6, regs, oldpc); - goto endlabel2727; + goto endlabel2761; } else if (dst > src) { SET_NFLG (®s->ccrflags, 0); Exception (6, regs, oldpc); - goto endlabel2727; + goto endlabel2761; } -}}}}}endlabel2727: ; -return 8 * 256; +}}}}}endlabel2761: ; +return 8 * CYCLE_UNIT / 2; } /* CHK.W -(An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_41a0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_41a0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -12542,7 +12542,7 @@ unsigned long REGPARAM2 CPUFUNC(op_41a0_5)(uae_u32 opcode, struct regstruct *reg srca = m68k_areg(regs, srcreg) - 2; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2728; + goto endlabel2762; } {{ uae_s16 src = get_word (srca); m68k_areg (regs, srcreg) = srca; @@ -12553,17 +12553,17 @@ unsigned long REGPARAM2 CPUFUNC(op_41a0_5)(uae_u32 opcode, struct regstruct *reg if ((uae_s32)dst < 0) { SET_NFLG (®s->ccrflags, 1); Exception (6, regs, oldpc); - goto endlabel2728; + goto endlabel2762; } else if (dst > src) { SET_NFLG (®s->ccrflags, 0); Exception (6, regs, oldpc); - goto endlabel2728; + goto endlabel2762; } -}}}}}endlabel2728: ; -return 10 * 256; +}}}}}endlabel2762: ; +return 10 * CYCLE_UNIT / 2; } /* CHK.W (d16,An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_41a8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_41a8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -12571,7 +12571,7 @@ unsigned long REGPARAM2 CPUFUNC(op_41a8_5)(uae_u32 opcode, struct regstruct *reg { uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2729; + goto endlabel2763; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -12581,17 +12581,17 @@ unsigned long REGPARAM2 CPUFUNC(op_41a8_5)(uae_u32 opcode, struct regstruct *reg if ((uae_s32)dst < 0) { SET_NFLG (®s->ccrflags, 1); Exception (6, regs, oldpc); - goto endlabel2729; + goto endlabel2763; } else if (dst > src) { SET_NFLG (®s->ccrflags, 0); Exception (6, regs, oldpc); - goto endlabel2729; + goto endlabel2763; } -}}}}}endlabel2729: ; -return 12 * 256; +}}}}}endlabel2763: ; +return 12 * CYCLE_UNIT / 2; } /* CHK.W (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_41b0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_41b0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -12600,7 +12600,7 @@ unsigned long REGPARAM2 CPUFUNC(op_41b0_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2730; + goto endlabel2764; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -12610,24 +12610,24 @@ unsigned long REGPARAM2 CPUFUNC(op_41b0_5)(uae_u32 opcode, struct regstruct *reg if ((uae_s32)dst < 0) { SET_NFLG (®s->ccrflags, 1); Exception (6, regs, oldpc); - goto endlabel2730; + goto endlabel2764; } else if (dst > src) { SET_NFLG (®s->ccrflags, 0); Exception (6, regs, oldpc); - goto endlabel2730; + goto endlabel2764; } -}}}}}endlabel2730: ; -return 14 * 256; +}}}}}endlabel2764: ; +return 14 * CYCLE_UNIT / 2; } /* CHK.W (xxx).W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_41b8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_41b8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; { uaecptr oldpc = m68k_getpc(regs); { uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2731; + goto endlabel2765; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -12637,24 +12637,24 @@ unsigned long REGPARAM2 CPUFUNC(op_41b8_5)(uae_u32 opcode, struct regstruct *reg if ((uae_s32)dst < 0) { SET_NFLG (®s->ccrflags, 1); Exception (6, regs, oldpc); - goto endlabel2731; + goto endlabel2765; } else if (dst > src) { SET_NFLG (®s->ccrflags, 0); Exception (6, regs, oldpc); - goto endlabel2731; + goto endlabel2765; } -}}}}}endlabel2731: ; -return 12 * 256; +}}}}}endlabel2765: ; +return 12 * CYCLE_UNIT / 2; } /* CHK.W (xxx).L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_41b9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_41b9_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; { uaecptr oldpc = m68k_getpc(regs); { uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2732; + goto endlabel2766; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -12664,17 +12664,17 @@ unsigned long REGPARAM2 CPUFUNC(op_41b9_5)(uae_u32 opcode, struct regstruct *reg if ((uae_s32)dst < 0) { SET_NFLG (®s->ccrflags, 1); Exception (6, regs, oldpc); - goto endlabel2732; + goto endlabel2766; } else if (dst > src) { SET_NFLG (®s->ccrflags, 0); Exception (6, regs, oldpc); - goto endlabel2732; + goto endlabel2766; } -}}}}}endlabel2732: ; -return 16 * 256; +}}}}}endlabel2766: ; +return 16 * CYCLE_UNIT / 2; } /* CHK.W (d16,PC),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_41ba_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_41ba_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; { uaecptr oldpc = m68k_getpc(regs); @@ -12682,7 +12682,7 @@ unsigned long REGPARAM2 CPUFUNC(op_41ba_5)(uae_u32 opcode, struct regstruct *reg srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2733; + goto endlabel2767; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -12692,17 +12692,17 @@ unsigned long REGPARAM2 CPUFUNC(op_41ba_5)(uae_u32 opcode, struct regstruct *reg if ((uae_s32)dst < 0) { SET_NFLG (®s->ccrflags, 1); Exception (6, regs, oldpc); - goto endlabel2733; + goto endlabel2767; } else if (dst > src) { SET_NFLG (®s->ccrflags, 0); Exception (6, regs, oldpc); - goto endlabel2733; + goto endlabel2767; } -}}}}}endlabel2733: ; -return 12 * 256; +}}}}}endlabel2767: ; +return 12 * CYCLE_UNIT / 2; } /* CHK.W (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_41bb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_41bb_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; { uaecptr oldpc = m68k_getpc(regs); @@ -12712,7 +12712,7 @@ unsigned long REGPARAM2 CPUFUNC(op_41bb_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2734; + goto endlabel2768; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -12722,17 +12722,17 @@ unsigned long REGPARAM2 CPUFUNC(op_41bb_5)(uae_u32 opcode, struct regstruct *reg if ((uae_s32)dst < 0) { SET_NFLG (®s->ccrflags, 1); Exception (6, regs, oldpc); - goto endlabel2734; + goto endlabel2768; } else if (dst > src) { SET_NFLG (®s->ccrflags, 0); Exception (6, regs, oldpc); - goto endlabel2734; + goto endlabel2768; } -}}}}}endlabel2734: ; -return 14 * 256; +}}}}}endlabel2768: ; +return 14 * CYCLE_UNIT / 2; } /* CHK.W #.W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_41bc_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_41bc_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; { uaecptr oldpc = m68k_getpc(regs); @@ -12744,17 +12744,17 @@ unsigned long REGPARAM2 CPUFUNC(op_41bc_5)(uae_u32 opcode, struct regstruct *reg if ((uae_s32)dst < 0) { SET_NFLG (®s->ccrflags, 1); Exception (6, regs, oldpc); - goto endlabel2735; + goto endlabel2769; } else if (dst > src) { SET_NFLG (®s->ccrflags, 0); Exception (6, regs, oldpc); - goto endlabel2735; + goto endlabel2769; } -}}}endlabel2735: ; -return 8 * 256; +}}}endlabel2769: ; +return 8 * CYCLE_UNIT / 2; } /* LEA.L (An),An */ -unsigned long REGPARAM2 CPUFUNC(op_41d0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_41d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -12763,10 +12763,10 @@ unsigned long REGPARAM2 CPUFUNC(op_41d0_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); m68k_areg(regs, dstreg) = (srca); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* LEA.L (d16,An),An */ -unsigned long REGPARAM2 CPUFUNC(op_41e8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_41e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -12775,10 +12775,10 @@ unsigned long REGPARAM2 CPUFUNC(op_41e8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_areg(regs, dstreg) = (srca); }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* LEA.L (d8,An,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_41f0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_41f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -12788,10 +12788,10 @@ unsigned long REGPARAM2 CPUFUNC(op_41f0_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_areg(regs, dstreg) = (srca); }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* LEA.L (xxx).W,An */ -unsigned long REGPARAM2 CPUFUNC(op_41f8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_41f8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -12799,10 +12799,10 @@ unsigned long REGPARAM2 CPUFUNC(op_41f8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_areg(regs, dstreg) = (srca); }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* LEA.L (xxx).L,An */ -unsigned long REGPARAM2 CPUFUNC(op_41f9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_41f9_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); @@ -12810,10 +12810,10 @@ unsigned long REGPARAM2 CPUFUNC(op_41f9_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); m68k_areg(regs, dstreg) = (srca); }}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* LEA.L (d16,PC),An */ -unsigned long REGPARAM2 CPUFUNC(op_41fa_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_41fa_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; @@ -12822,10 +12822,10 @@ unsigned long REGPARAM2 CPUFUNC(op_41fa_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_areg(regs, dstreg) = (srca); }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* LEA.L (d8,PC,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_41fb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_41fb_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -12836,10 +12836,10 @@ unsigned long REGPARAM2 CPUFUNC(op_41fb_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_areg(regs, dstreg) = (srca); }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* CLR.B Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4200_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4200_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -12850,10 +12850,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4200_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(0)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff); }} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* CLR.B (An) */ -unsigned long REGPARAM2 CPUFUNC(op_4210_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4210_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -12865,10 +12865,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4210_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(0)) < 0); put_byte (srca,0); }}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CLR.B (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_4218_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4218_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -12881,10 +12881,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4218_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(0)) < 0); put_byte (srca,0); }}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CLR.B -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_4220_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4220_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -12898,10 +12898,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4220_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(0)) < 0); put_byte (srca,0); }}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* CLR.B (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_4228_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4228_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -12913,10 +12913,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4228_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(0)) < 0); put_byte (srca,0); }}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* CLR.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4230_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4230_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -12929,10 +12929,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4230_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(0)) < 0); put_byte (srca,0); }}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* CLR.B (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_4238_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4238_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -12943,10 +12943,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4238_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(0)) < 0); put_byte (srca,0); }}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* CLR.B (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_4239_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4239_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -12957,10 +12957,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4239_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(0)) < 0); put_byte (srca,0); }}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* CLR.W Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4240_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4240_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg(regs, srcreg); @@ -12971,16 +12971,16 @@ unsigned long REGPARAM2 CPUFUNC(op_4240_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(0)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff); }} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* CLR.W (An) */ -unsigned long REGPARAM2 CPUFUNC(op_4250_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4250_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2752; + goto endlabel2786; } {{ uae_s16 src = get_word (srca); regs->ir = regs->irc; @@ -12990,17 +12990,17 @@ unsigned long REGPARAM2 CPUFUNC(op_4250_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(0)) < 0); put_word (srca,0); }}}} m68k_incpc (regs, 2); -endlabel2752: ; -return 12 * 256; +endlabel2786: ; +return 12 * CYCLE_UNIT / 2; } /* CLR.W (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_4258_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4258_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2753; + goto endlabel2787; } {{ uae_s16 src = get_word (srca); m68k_areg(regs, srcreg) += 2; @@ -13011,18 +13011,18 @@ unsigned long REGPARAM2 CPUFUNC(op_4258_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(0)) < 0); put_word (srca,0); }}}} m68k_incpc (regs, 2); -endlabel2753: ; -return 12 * 256; +endlabel2787: ; +return 12 * CYCLE_UNIT / 2; } /* CLR.W -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_4260_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4260_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = m68k_areg(regs, srcreg) - 2; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2754; + goto endlabel2788; } {{ uae_s16 src = get_word (srca); m68k_areg (regs, srcreg) = srca; @@ -13033,17 +13033,17 @@ unsigned long REGPARAM2 CPUFUNC(op_4260_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(0)) < 0); put_word (srca,0); }}}} m68k_incpc (regs, 2); -endlabel2754: ; -return 14 * 256; +endlabel2788: ; +return 14 * CYCLE_UNIT / 2; } /* CLR.W (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_4268_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4268_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2755; + goto endlabel2789; } {{ uae_s16 src = get_word (srca); regs->ir = regs->irc; @@ -13053,18 +13053,18 @@ unsigned long REGPARAM2 CPUFUNC(op_4268_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(0)) < 0); put_word (srca,0); }}}} m68k_incpc (regs, 4); -endlabel2755: ; -return 16 * 256; +endlabel2789: ; +return 16 * CYCLE_UNIT / 2; } /* CLR.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4270_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4270_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2756; + goto endlabel2790; } {{ uae_s16 src = get_word (srca); regs->ir = regs->irc; @@ -13074,16 +13074,16 @@ unsigned long REGPARAM2 CPUFUNC(op_4270_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(0)) < 0); put_word (srca,0); }}}} m68k_incpc (regs, 4); -endlabel2756: ; -return 18 * 256; +endlabel2790: ; +return 18 * CYCLE_UNIT / 2; } /* CLR.W (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_4278_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4278_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2757; + goto endlabel2791; } {{ uae_s16 src = get_word (srca); regs->ir = regs->irc; @@ -13093,16 +13093,16 @@ unsigned long REGPARAM2 CPUFUNC(op_4278_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(0)) < 0); put_word (srca,0); }}}} m68k_incpc (regs, 4); -endlabel2757: ; -return 16 * 256; +endlabel2791: ; +return 16 * CYCLE_UNIT / 2; } /* CLR.W (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_4279_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4279_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2758; + goto endlabel2792; } {{ uae_s16 src = get_word (srca); regs->ir = regs->irc; @@ -13112,11 +13112,11 @@ unsigned long REGPARAM2 CPUFUNC(op_4279_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(0)) < 0); put_word (srca,0); }}}} m68k_incpc (regs, 6); -endlabel2758: ; -return 20 * 256; +endlabel2792: ; +return 20 * CYCLE_UNIT / 2; } /* CLR.L Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4280_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4280_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s32 src = m68k_dreg(regs, srcreg); @@ -13127,16 +13127,16 @@ unsigned long REGPARAM2 CPUFUNC(op_4280_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(0)) < 0); m68k_dreg(regs, srcreg) = (0); }} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* CLR.L (An) */ -unsigned long REGPARAM2 CPUFUNC(op_4290_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4290_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2760; + goto endlabel2794; } {{ uae_s32 src = get_long (srca); regs->ir = regs->irc; @@ -13146,20 +13146,17 @@ unsigned long REGPARAM2 CPUFUNC(op_4290_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(0)) < 0); put_long (srca,0); }}}} m68k_incpc (regs, 2); -endlabel2760: ; -return 20 * 256; +endlabel2794: ; +return 20 * CYCLE_UNIT / 2; } -#endif - -#ifdef PART_4 /* CLR.L (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_4298_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4298_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2761; + goto endlabel2795; } {{ uae_s32 src = get_long (srca); m68k_areg(regs, srcreg) += 4; @@ -13170,18 +13167,18 @@ unsigned long REGPARAM2 CPUFUNC(op_4298_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(0)) < 0); put_long (srca,0); }}}} m68k_incpc (regs, 2); -endlabel2761: ; -return 20 * 256; +endlabel2795: ; +return 20 * CYCLE_UNIT / 2; } /* CLR.L -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_42a0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_42a0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = m68k_areg(regs, srcreg) - 4; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2762; + goto endlabel2796; } {{ uae_s32 src = get_long (srca); m68k_areg (regs, srcreg) = srca; @@ -13192,17 +13189,17 @@ unsigned long REGPARAM2 CPUFUNC(op_42a0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(0)) < 0); put_long (srca,0); }}}} m68k_incpc (regs, 2); -endlabel2762: ; -return 22 * 256; +endlabel2796: ; +return 22 * CYCLE_UNIT / 2; } /* CLR.L (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_42a8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_42a8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2763; + goto endlabel2797; } {{ uae_s32 src = get_long (srca); regs->ir = regs->irc; @@ -13212,18 +13209,18 @@ unsigned long REGPARAM2 CPUFUNC(op_42a8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(0)) < 0); put_long (srca,0); }}}} m68k_incpc (regs, 4); -endlabel2763: ; -return 24 * 256; +endlabel2797: ; +return 24 * CYCLE_UNIT / 2; } /* CLR.L (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_42b0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_42b0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2764; + goto endlabel2798; } {{ uae_s32 src = get_long (srca); regs->ir = regs->irc; @@ -13233,16 +13230,16 @@ unsigned long REGPARAM2 CPUFUNC(op_42b0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(0)) < 0); put_long (srca,0); }}}} m68k_incpc (regs, 4); -endlabel2764: ; -return 26 * 256; +endlabel2798: ; +return 26 * CYCLE_UNIT / 2; } /* CLR.L (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_42b8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_42b8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2765; + goto endlabel2799; } {{ uae_s32 src = get_long (srca); regs->ir = regs->irc; @@ -13252,16 +13249,16 @@ unsigned long REGPARAM2 CPUFUNC(op_42b8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(0)) < 0); put_long (srca,0); }}}} m68k_incpc (regs, 4); -endlabel2765: ; -return 24 * 256; +endlabel2799: ; +return 24 * CYCLE_UNIT / 2; } /* CLR.L (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_42b9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_42b9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2766; + goto endlabel2800; } {{ uae_s32 src = get_long (srca); regs->ir = regs->irc; @@ -13271,11 +13268,14 @@ unsigned long REGPARAM2 CPUFUNC(op_42b9_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(0)) < 0); put_long (srca,0); }}}} m68k_incpc (regs, 6); -endlabel2766: ; -return 28 * 256; +endlabel2800: ; +return 28 * CYCLE_UNIT / 2; } +#endif + +#ifdef PART_4 /* NEG.B Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4400_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4400_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -13292,10 +13292,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4400_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); }}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* NEG.B (An) */ -unsigned long REGPARAM2 CPUFUNC(op_4410_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4410_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -13313,10 +13313,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4410_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (srca,dst); }}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* NEG.B (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_4418_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4418_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -13335,10 +13335,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4418_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (srca,dst); }}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* NEG.B -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_4420_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4420_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -13358,10 +13358,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4420_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (srca,dst); }}}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* NEG.B (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_4428_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4428_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -13379,10 +13379,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4428_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (srca,dst); }}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* NEG.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4430_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4430_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -13401,10 +13401,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4430_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (srca,dst); }}}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* NEG.B (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_4438_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4438_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -13421,10 +13421,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4438_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (srca,dst); }}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* NEG.B (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_4439_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4439_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -13441,10 +13441,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4439_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (srca,dst); }}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* NEG.W Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4440_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4440_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg(regs, srcreg); @@ -13461,16 +13461,16 @@ unsigned long REGPARAM2 CPUFUNC(op_4440_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); }}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* NEG.W (An) */ -unsigned long REGPARAM2 CPUFUNC(op_4450_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4450_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2776; + goto endlabel2810; } {{ uae_s16 src = get_word (srca); regs->ir = regs->irc; @@ -13486,17 +13486,17 @@ unsigned long REGPARAM2 CPUFUNC(op_4450_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (srca,dst); }}}}}}} m68k_incpc (regs, 2); -endlabel2776: ; -return 12 * 256; +endlabel2810: ; +return 12 * CYCLE_UNIT / 2; } /* NEG.W (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_4458_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4458_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2777; + goto endlabel2811; } {{ uae_s16 src = get_word (srca); m68k_areg(regs, srcreg) += 2; @@ -13513,18 +13513,18 @@ unsigned long REGPARAM2 CPUFUNC(op_4458_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (srca,dst); }}}}}}} m68k_incpc (regs, 2); -endlabel2777: ; -return 12 * 256; +endlabel2811: ; +return 12 * CYCLE_UNIT / 2; } /* NEG.W -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_4460_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4460_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = m68k_areg(regs, srcreg) - 2; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2778; + goto endlabel2812; } {{ uae_s16 src = get_word (srca); m68k_areg (regs, srcreg) = srca; @@ -13541,17 +13541,17 @@ unsigned long REGPARAM2 CPUFUNC(op_4460_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (srca,dst); }}}}}}} m68k_incpc (regs, 2); -endlabel2778: ; -return 14 * 256; +endlabel2812: ; +return 14 * CYCLE_UNIT / 2; } /* NEG.W (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_4468_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4468_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2779; + goto endlabel2813; } {{ uae_s16 src = get_word (srca); regs->ir = regs->irc; @@ -13567,18 +13567,18 @@ unsigned long REGPARAM2 CPUFUNC(op_4468_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (srca,dst); }}}}}}} m68k_incpc (regs, 4); -endlabel2779: ; -return 16 * 256; +endlabel2813: ; +return 16 * CYCLE_UNIT / 2; } /* NEG.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4470_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4470_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2780; + goto endlabel2814; } {{ uae_s16 src = get_word (srca); regs->ir = regs->irc; @@ -13594,16 +13594,16 @@ unsigned long REGPARAM2 CPUFUNC(op_4470_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (srca,dst); }}}}}}} m68k_incpc (regs, 4); -endlabel2780: ; -return 18 * 256; +endlabel2814: ; +return 18 * CYCLE_UNIT / 2; } /* NEG.W (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_4478_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4478_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2781; + goto endlabel2815; } {{ uae_s16 src = get_word (srca); regs->ir = regs->irc; @@ -13619,16 +13619,16 @@ unsigned long REGPARAM2 CPUFUNC(op_4478_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (srca,dst); }}}}}}} m68k_incpc (regs, 4); -endlabel2781: ; -return 16 * 256; +endlabel2815: ; +return 16 * CYCLE_UNIT / 2; } /* NEG.W (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_4479_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4479_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2782; + goto endlabel2816; } {{ uae_s16 src = get_word (srca); regs->ir = regs->irc; @@ -13644,11 +13644,11 @@ unsigned long REGPARAM2 CPUFUNC(op_4479_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (srca,dst); }}}}}}} m68k_incpc (regs, 6); -endlabel2782: ; -return 20 * 256; +endlabel2816: ; +return 20 * CYCLE_UNIT / 2; } /* NEG.L Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4480_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4480_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s32 src = m68k_dreg(regs, srcreg); @@ -13665,16 +13665,16 @@ unsigned long REGPARAM2 CPUFUNC(op_4480_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, srcreg) = (dst); }}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* NEG.L (An) */ -unsigned long REGPARAM2 CPUFUNC(op_4490_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4490_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2784; + goto endlabel2818; } {{ uae_s32 src = get_long (srca); regs->ir = regs->irc; @@ -13690,17 +13690,17 @@ unsigned long REGPARAM2 CPUFUNC(op_4490_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (srca,dst); }}}}}}} m68k_incpc (regs, 2); -endlabel2784: ; -return 20 * 256; +endlabel2818: ; +return 20 * CYCLE_UNIT / 2; } /* NEG.L (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_4498_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4498_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2785; + goto endlabel2819; } {{ uae_s32 src = get_long (srca); m68k_areg(regs, srcreg) += 4; @@ -13717,18 +13717,18 @@ unsigned long REGPARAM2 CPUFUNC(op_4498_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (srca,dst); }}}}}}} m68k_incpc (regs, 2); -endlabel2785: ; -return 20 * 256; +endlabel2819: ; +return 20 * CYCLE_UNIT / 2; } /* NEG.L -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_44a0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_44a0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = m68k_areg(regs, srcreg) - 4; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2786; + goto endlabel2820; } {{ uae_s32 src = get_long (srca); m68k_areg (regs, srcreg) = srca; @@ -13745,17 +13745,17 @@ unsigned long REGPARAM2 CPUFUNC(op_44a0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (srca,dst); }}}}}}} m68k_incpc (regs, 2); -endlabel2786: ; -return 22 * 256; +endlabel2820: ; +return 22 * CYCLE_UNIT / 2; } /* NEG.L (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_44a8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_44a8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2787; + goto endlabel2821; } {{ uae_s32 src = get_long (srca); regs->ir = regs->irc; @@ -13771,18 +13771,18 @@ unsigned long REGPARAM2 CPUFUNC(op_44a8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (srca,dst); }}}}}}} m68k_incpc (regs, 4); -endlabel2787: ; -return 24 * 256; +endlabel2821: ; +return 24 * CYCLE_UNIT / 2; } /* NEG.L (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_44b0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_44b0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2788; + goto endlabel2822; } {{ uae_s32 src = get_long (srca); regs->ir = regs->irc; @@ -13798,16 +13798,16 @@ unsigned long REGPARAM2 CPUFUNC(op_44b0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (srca,dst); }}}}}}} m68k_incpc (regs, 4); -endlabel2788: ; -return 26 * 256; +endlabel2822: ; +return 26 * CYCLE_UNIT / 2; } /* NEG.L (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_44b8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_44b8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2789; + goto endlabel2823; } {{ uae_s32 src = get_long (srca); regs->ir = regs->irc; @@ -13823,16 +13823,16 @@ unsigned long REGPARAM2 CPUFUNC(op_44b8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (srca,dst); }}}}}}} m68k_incpc (regs, 4); -endlabel2789: ; -return 24 * 256; +endlabel2823: ; +return 24 * CYCLE_UNIT / 2; } /* NEG.L (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_44b9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_44b9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2790; + goto endlabel2824; } {{ uae_s32 src = get_long (srca); regs->ir = regs->irc; @@ -13848,11 +13848,11 @@ unsigned long REGPARAM2 CPUFUNC(op_44b9_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (srca,dst); }}}}}}} m68k_incpc (regs, 6); -endlabel2790: ; -return 28 * 256; +endlabel2824: ; +return 28 * CYCLE_UNIT / 2; } /* MV2SR.B Dn */ -unsigned long REGPARAM2 CPUFUNC(op_44c0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_44c0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg(regs, srcreg); @@ -13863,16 +13863,16 @@ unsigned long REGPARAM2 CPUFUNC(op_44c0_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); MakeFromSR(regs); }} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* MV2SR.B (An) */ -unsigned long REGPARAM2 CPUFUNC(op_44d0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_44d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2792; + goto endlabel2826; } {{ uae_s16 src = get_word (srca); MakeSR(regs); @@ -13882,17 +13882,17 @@ unsigned long REGPARAM2 CPUFUNC(op_44d0_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); MakeFromSR(regs); }}}} m68k_incpc (regs, 2); -endlabel2792: ; -return 8 * 256; +endlabel2826: ; +return 8 * CYCLE_UNIT / 2; } /* MV2SR.B (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_44d8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_44d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2793; + goto endlabel2827; } {{ uae_s16 src = get_word (srca); m68k_areg(regs, srcreg) += 2; @@ -13903,18 +13903,18 @@ unsigned long REGPARAM2 CPUFUNC(op_44d8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); MakeFromSR(regs); }}}} m68k_incpc (regs, 2); -endlabel2793: ; -return 8 * 256; +endlabel2827: ; +return 8 * CYCLE_UNIT / 2; } /* MV2SR.B -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_44e0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_44e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = m68k_areg(regs, srcreg) - 2; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2794; + goto endlabel2828; } {{ uae_s16 src = get_word (srca); m68k_areg (regs, srcreg) = srca; @@ -13925,17 +13925,17 @@ unsigned long REGPARAM2 CPUFUNC(op_44e0_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); MakeFromSR(regs); }}}} m68k_incpc (regs, 2); -endlabel2794: ; -return 10 * 256; +endlabel2828: ; +return 10 * CYCLE_UNIT / 2; } /* MV2SR.B (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_44e8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_44e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2795; + goto endlabel2829; } {{ uae_s16 src = get_word (srca); MakeSR(regs); @@ -13945,18 +13945,18 @@ unsigned long REGPARAM2 CPUFUNC(op_44e8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); MakeFromSR(regs); }}}} m68k_incpc (regs, 4); -endlabel2795: ; -return 12 * 256; +endlabel2829: ; +return 12 * CYCLE_UNIT / 2; } /* MV2SR.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_44f0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_44f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2796; + goto endlabel2830; } {{ uae_s16 src = get_word (srca); MakeSR(regs); @@ -13966,16 +13966,16 @@ unsigned long REGPARAM2 CPUFUNC(op_44f0_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); MakeFromSR(regs); }}}} m68k_incpc (regs, 4); -endlabel2796: ; -return 14 * 256; +endlabel2830: ; +return 14 * CYCLE_UNIT / 2; } /* MV2SR.B (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_44f8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_44f8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2797; + goto endlabel2831; } {{ uae_s16 src = get_word (srca); MakeSR(regs); @@ -13985,16 +13985,16 @@ unsigned long REGPARAM2 CPUFUNC(op_44f8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); MakeFromSR(regs); }}}} m68k_incpc (regs, 4); -endlabel2797: ; -return 12 * 256; +endlabel2831: ; +return 12 * CYCLE_UNIT / 2; } /* MV2SR.B (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_44f9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_44f9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2798; + goto endlabel2832; } {{ uae_s16 src = get_word (srca); MakeSR(regs); @@ -14004,17 +14004,17 @@ unsigned long REGPARAM2 CPUFUNC(op_44f9_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); MakeFromSR(regs); }}}} m68k_incpc (regs, 6); -endlabel2798: ; -return 16 * 256; +endlabel2832: ; +return 16 * CYCLE_UNIT / 2; } /* MV2SR.B (d16,PC) */ -unsigned long REGPARAM2 CPUFUNC(op_44fa_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_44fa_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2799; + goto endlabel2833; } {{ uae_s16 src = get_word (srca); MakeSR(regs); @@ -14024,11 +14024,11 @@ unsigned long REGPARAM2 CPUFUNC(op_44fa_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); MakeFromSR(regs); }}}} m68k_incpc (regs, 4); -endlabel2799: ; -return 12 * 256; +endlabel2833: ; +return 12 * CYCLE_UNIT / 2; } /* MV2SR.B (d8,PC,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_44fb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_44fb_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr tmppc; uaecptr srca; @@ -14036,7 +14036,7 @@ unsigned long REGPARAM2 CPUFUNC(op_44fb_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2800; + goto endlabel2834; } {{ uae_s16 src = get_word (srca); MakeSR(regs); @@ -14046,11 +14046,11 @@ unsigned long REGPARAM2 CPUFUNC(op_44fb_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); MakeFromSR(regs); }}}} m68k_incpc (regs, 4); -endlabel2800: ; -return 14 * 256; +endlabel2834: ; +return 14 * CYCLE_UNIT / 2; } /* MV2SR.B #.B */ -unsigned long REGPARAM2 CPUFUNC(op_44fc_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_44fc_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s16 src = get_word_prefetch (regs, 4); MakeSR(regs); @@ -14060,10 +14060,10 @@ unsigned long REGPARAM2 CPUFUNC(op_44fc_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); MakeFromSR(regs); }} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* NOT.B Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4600_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4600_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -14075,10 +14075,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4600_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(dst)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* NOT.B (An) */ -unsigned long REGPARAM2 CPUFUNC(op_4610_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4610_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -14091,10 +14091,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4610_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(dst)) < 0); put_byte (srca,dst); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* NOT.B (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_4618_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4618_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -14108,10 +14108,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4618_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(dst)) < 0); put_byte (srca,dst); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* NOT.B -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_4620_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4620_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -14126,10 +14126,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4620_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(dst)) < 0); put_byte (srca,dst); }}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* NOT.B (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_4628_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4628_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -14142,10 +14142,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4628_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(dst)) < 0); put_byte (srca,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* NOT.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4630_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4630_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -14159,10 +14159,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4630_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(dst)) < 0); put_byte (srca,dst); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* NOT.B (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_4638_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4638_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -14174,10 +14174,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4638_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(dst)) < 0); put_byte (srca,dst); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* NOT.B (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_4639_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4639_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -14189,10 +14189,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4639_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(dst)) < 0); put_byte (srca,dst); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* NOT.W Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4640_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4640_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg(regs, srcreg); @@ -14204,16 +14204,16 @@ unsigned long REGPARAM2 CPUFUNC(op_4640_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(dst)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* NOT.W (An) */ -unsigned long REGPARAM2 CPUFUNC(op_4650_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4650_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2811; + goto endlabel2845; } {{ uae_s16 src = get_word (srca); regs->ir = regs->irc; @@ -14224,17 +14224,17 @@ unsigned long REGPARAM2 CPUFUNC(op_4650_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(dst)) < 0); put_word (srca,dst); }}}}} m68k_incpc (regs, 2); -endlabel2811: ; -return 12 * 256; +endlabel2845: ; +return 12 * CYCLE_UNIT / 2; } /* NOT.W (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_4658_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4658_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2812; + goto endlabel2846; } {{ uae_s16 src = get_word (srca); m68k_areg(regs, srcreg) += 2; @@ -14246,18 +14246,18 @@ unsigned long REGPARAM2 CPUFUNC(op_4658_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(dst)) < 0); put_word (srca,dst); }}}}} m68k_incpc (regs, 2); -endlabel2812: ; -return 12 * 256; +endlabel2846: ; +return 12 * CYCLE_UNIT / 2; } /* NOT.W -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_4660_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4660_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = m68k_areg(regs, srcreg) - 2; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2813; + goto endlabel2847; } {{ uae_s16 src = get_word (srca); m68k_areg (regs, srcreg) = srca; @@ -14269,17 +14269,17 @@ unsigned long REGPARAM2 CPUFUNC(op_4660_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(dst)) < 0); put_word (srca,dst); }}}}} m68k_incpc (regs, 2); -endlabel2813: ; -return 14 * 256; +endlabel2847: ; +return 14 * CYCLE_UNIT / 2; } /* NOT.W (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_4668_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4668_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2814; + goto endlabel2848; } {{ uae_s16 src = get_word (srca); regs->ir = regs->irc; @@ -14290,18 +14290,18 @@ unsigned long REGPARAM2 CPUFUNC(op_4668_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(dst)) < 0); put_word (srca,dst); }}}}} m68k_incpc (regs, 4); -endlabel2814: ; -return 16 * 256; +endlabel2848: ; +return 16 * CYCLE_UNIT / 2; } /* NOT.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4670_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4670_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2815; + goto endlabel2849; } {{ uae_s16 src = get_word (srca); regs->ir = regs->irc; @@ -14312,16 +14312,16 @@ unsigned long REGPARAM2 CPUFUNC(op_4670_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(dst)) < 0); put_word (srca,dst); }}}}} m68k_incpc (regs, 4); -endlabel2815: ; -return 18 * 256; +endlabel2849: ; +return 18 * CYCLE_UNIT / 2; } /* NOT.W (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_4678_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4678_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2816; + goto endlabel2850; } {{ uae_s16 src = get_word (srca); regs->ir = regs->irc; @@ -14332,16 +14332,16 @@ unsigned long REGPARAM2 CPUFUNC(op_4678_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(dst)) < 0); put_word (srca,dst); }}}}} m68k_incpc (regs, 4); -endlabel2816: ; -return 16 * 256; +endlabel2850: ; +return 16 * CYCLE_UNIT / 2; } /* NOT.W (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_4679_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4679_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2817; + goto endlabel2851; } {{ uae_s16 src = get_word (srca); regs->ir = regs->irc; @@ -14352,11 +14352,11 @@ unsigned long REGPARAM2 CPUFUNC(op_4679_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(dst)) < 0); put_word (srca,dst); }}}}} m68k_incpc (regs, 6); -endlabel2817: ; -return 20 * 256; +endlabel2851: ; +return 20 * CYCLE_UNIT / 2; } /* NOT.L Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4680_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4680_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s32 src = m68k_dreg(regs, srcreg); @@ -14368,16 +14368,16 @@ unsigned long REGPARAM2 CPUFUNC(op_4680_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(dst)) < 0); m68k_dreg(regs, srcreg) = (dst); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* NOT.L (An) */ -unsigned long REGPARAM2 CPUFUNC(op_4690_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4690_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2819; + goto endlabel2853; } {{ uae_s32 src = get_long (srca); regs->ir = regs->irc; @@ -14388,17 +14388,17 @@ unsigned long REGPARAM2 CPUFUNC(op_4690_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(dst)) < 0); put_long (srca,dst); }}}}} m68k_incpc (regs, 2); -endlabel2819: ; -return 20 * 256; +endlabel2853: ; +return 20 * CYCLE_UNIT / 2; } /* NOT.L (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_4698_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4698_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2820; + goto endlabel2854; } {{ uae_s32 src = get_long (srca); m68k_areg(regs, srcreg) += 4; @@ -14410,18 +14410,18 @@ unsigned long REGPARAM2 CPUFUNC(op_4698_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(dst)) < 0); put_long (srca,dst); }}}}} m68k_incpc (regs, 2); -endlabel2820: ; -return 20 * 256; +endlabel2854: ; +return 20 * CYCLE_UNIT / 2; } /* NOT.L -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_46a0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_46a0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = m68k_areg(regs, srcreg) - 4; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2821; + goto endlabel2855; } {{ uae_s32 src = get_long (srca); m68k_areg (regs, srcreg) = srca; @@ -14433,17 +14433,17 @@ unsigned long REGPARAM2 CPUFUNC(op_46a0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(dst)) < 0); put_long (srca,dst); }}}}} m68k_incpc (regs, 2); -endlabel2821: ; -return 22 * 256; +endlabel2855: ; +return 22 * CYCLE_UNIT / 2; } /* NOT.L (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_46a8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_46a8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2822; + goto endlabel2856; } {{ uae_s32 src = get_long (srca); regs->ir = regs->irc; @@ -14454,18 +14454,18 @@ unsigned long REGPARAM2 CPUFUNC(op_46a8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(dst)) < 0); put_long (srca,dst); }}}}} m68k_incpc (regs, 4); -endlabel2822: ; -return 24 * 256; +endlabel2856: ; +return 24 * CYCLE_UNIT / 2; } /* NOT.L (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_46b0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_46b0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2823; + goto endlabel2857; } {{ uae_s32 src = get_long (srca); regs->ir = regs->irc; @@ -14476,16 +14476,16 @@ unsigned long REGPARAM2 CPUFUNC(op_46b0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(dst)) < 0); put_long (srca,dst); }}}}} m68k_incpc (regs, 4); -endlabel2823: ; -return 26 * 256; +endlabel2857: ; +return 26 * CYCLE_UNIT / 2; } /* NOT.L (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_46b8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_46b8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2824; + goto endlabel2858; } {{ uae_s32 src = get_long (srca); regs->ir = regs->irc; @@ -14496,16 +14496,16 @@ unsigned long REGPARAM2 CPUFUNC(op_46b8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(dst)) < 0); put_long (srca,dst); }}}}} m68k_incpc (regs, 4); -endlabel2824: ; -return 24 * 256; +endlabel2858: ; +return 24 * CYCLE_UNIT / 2; } /* NOT.L (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_46b9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_46b9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2825; + goto endlabel2859; } {{ uae_s32 src = get_long (srca); regs->ir = regs->irc; @@ -14516,32 +14516,32 @@ unsigned long REGPARAM2 CPUFUNC(op_46b9_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(dst)) < 0); put_long (srca,dst); }}}}} m68k_incpc (regs, 6); -endlabel2825: ; -return 28 * 256; +endlabel2859: ; +return 28 * CYCLE_UNIT / 2; } /* MV2SR.W Dn */ -unsigned long REGPARAM2 CPUFUNC(op_46c0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_46c0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel2826; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel2860; } {{ uae_s16 src = m68k_dreg(regs, srcreg); regs->sr = src; regs->ir = regs->irc; get_word_prefetch (regs, 4); MakeFromSR(regs); }}} m68k_incpc (regs, 2); -endlabel2826: ; -return 4 * 256; +endlabel2860: ; +return 4 * CYCLE_UNIT / 2; } /* MV2SR.W (An) */ -unsigned long REGPARAM2 CPUFUNC(op_46d0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_46d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel2827; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel2861; } {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2827; + goto endlabel2861; } {{ uae_s16 src = get_word (srca); regs->sr = src; @@ -14549,18 +14549,18 @@ unsigned long REGPARAM2 CPUFUNC(op_46d0_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); MakeFromSR(regs); }}}}} m68k_incpc (regs, 2); -endlabel2827: ; -return 8 * 256; +endlabel2861: ; +return 8 * CYCLE_UNIT / 2; } /* MV2SR.W (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_46d8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_46d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel2828; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel2862; } {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2828; + goto endlabel2862; } {{ uae_s16 src = get_word (srca); m68k_areg(regs, srcreg) += 2; @@ -14569,19 +14569,19 @@ unsigned long REGPARAM2 CPUFUNC(op_46d8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); MakeFromSR(regs); }}}}} m68k_incpc (regs, 2); -endlabel2828: ; -return 8 * 256; +endlabel2862: ; +return 8 * CYCLE_UNIT / 2; } /* MV2SR.W -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_46e0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_46e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel2829; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel2863; } {{ uaecptr srca; srca = m68k_areg(regs, srcreg) - 2; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2829; + goto endlabel2863; } {{ uae_s16 src = get_word (srca); m68k_areg (regs, srcreg) = srca; @@ -14590,18 +14590,18 @@ unsigned long REGPARAM2 CPUFUNC(op_46e0_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); MakeFromSR(regs); }}}}} m68k_incpc (regs, 2); -endlabel2829: ; -return 10 * 256; +endlabel2863: ; +return 10 * CYCLE_UNIT / 2; } /* MV2SR.W (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_46e8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_46e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel2830; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel2864; } {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2830; + goto endlabel2864; } {{ uae_s16 src = get_word (srca); regs->sr = src; @@ -14609,19 +14609,19 @@ unsigned long REGPARAM2 CPUFUNC(op_46e8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); MakeFromSR(regs); }}}}} m68k_incpc (regs, 4); -endlabel2830: ; -return 12 * 256; +endlabel2864: ; +return 12 * CYCLE_UNIT / 2; } /* MV2SR.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_46f0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_46f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel2831; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel2865; } {{ uaecptr srca; srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2831; + goto endlabel2865; } {{ uae_s16 src = get_word (srca); regs->sr = src; @@ -14629,17 +14629,17 @@ unsigned long REGPARAM2 CPUFUNC(op_46f0_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); MakeFromSR(regs); }}}}} m68k_incpc (regs, 4); -endlabel2831: ; -return 14 * 256; +endlabel2865: ; +return 14 * CYCLE_UNIT / 2; } /* MV2SR.W (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_46f8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_46f8_11)(uae_u32 opcode, struct regstruct *regs) { -{if (!regs->s) { Exception(8, regs, 0); goto endlabel2832; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel2866; } {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2832; + goto endlabel2866; } {{ uae_s16 src = get_word (srca); regs->sr = src; @@ -14647,17 +14647,17 @@ unsigned long REGPARAM2 CPUFUNC(op_46f8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); MakeFromSR(regs); }}}}} m68k_incpc (regs, 4); -endlabel2832: ; -return 12 * 256; +endlabel2866: ; +return 12 * CYCLE_UNIT / 2; } /* MV2SR.W (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_46f9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_46f9_11)(uae_u32 opcode, struct regstruct *regs) { -{if (!regs->s) { Exception(8, regs, 0); goto endlabel2833; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel2867; } {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2833; + goto endlabel2867; } {{ uae_s16 src = get_word (srca); regs->sr = src; @@ -14665,18 +14665,18 @@ unsigned long REGPARAM2 CPUFUNC(op_46f9_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); MakeFromSR(regs); }}}}} m68k_incpc (regs, 6); -endlabel2833: ; -return 16 * 256; +endlabel2867: ; +return 16 * CYCLE_UNIT / 2; } /* MV2SR.W (d16,PC) */ -unsigned long REGPARAM2 CPUFUNC(op_46fa_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_46fa_11)(uae_u32 opcode, struct regstruct *regs) { -{if (!regs->s) { Exception(8, regs, 0); goto endlabel2834; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel2868; } {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2834; + goto endlabel2868; } {{ uae_s16 src = get_word (srca); regs->sr = src; @@ -14684,20 +14684,20 @@ unsigned long REGPARAM2 CPUFUNC(op_46fa_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); MakeFromSR(regs); }}}}} m68k_incpc (regs, 4); -endlabel2834: ; -return 12 * 256; +endlabel2868: ; +return 12 * CYCLE_UNIT / 2; } /* MV2SR.W (d8,PC,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_46fb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_46fb_11)(uae_u32 opcode, struct regstruct *regs) { -{if (!regs->s) { Exception(8, regs, 0); goto endlabel2835; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel2869; } {{ uaecptr tmppc; uaecptr srca; tmppc = m68k_getpc(regs) + 2; srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2835; + goto endlabel2869; } {{ uae_s16 src = get_word (srca); regs->sr = src; @@ -14705,24 +14705,24 @@ unsigned long REGPARAM2 CPUFUNC(op_46fb_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); MakeFromSR(regs); }}}}} m68k_incpc (regs, 4); -endlabel2835: ; -return 14 * 256; +endlabel2869: ; +return 14 * CYCLE_UNIT / 2; } /* MV2SR.W #.W */ -unsigned long REGPARAM2 CPUFUNC(op_46fc_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_46fc_11)(uae_u32 opcode, struct regstruct *regs) { -{if (!regs->s) { Exception(8, regs, 0); goto endlabel2836; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel2870; } {{ uae_s16 src = get_word_prefetch (regs, 4); regs->sr = src; regs->ir = regs->irc; get_word_prefetch (regs, 6); MakeFromSR(regs); }}} m68k_incpc (regs, 4); -endlabel2836: ; -return 8 * 256; +endlabel2870: ; +return 8 * CYCLE_UNIT / 2; } /* NBCD.B Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4800_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4800_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -14742,10 +14742,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4800_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* NBCD.B (An) */ -unsigned long REGPARAM2 CPUFUNC(op_4810_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4810_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -14766,10 +14766,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4810_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (srca,newv); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* NBCD.B (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_4818_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4818_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -14791,10 +14791,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4818_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (srca,newv); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* NBCD.B -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_4820_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4820_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -14817,10 +14817,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4820_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (srca,newv); }}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* NBCD.B (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_4828_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4828_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -14841,10 +14841,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4828_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (srca,newv); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* NBCD.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4830_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4830_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -14866,10 +14866,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4830_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (srca,newv); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* NBCD.B (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_4838_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4838_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -14889,10 +14889,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4838_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (srca,newv); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* NBCD.B (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_4839_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4839_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -14912,10 +14912,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4839_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (srca,newv); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* SWAP.W Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4840_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4840_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s32 src = m68k_dreg(regs, srcreg); @@ -14927,10 +14927,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4840_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(dst)) < 0); m68k_dreg(regs, srcreg) = (dst); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* PEA.L (An) */ -unsigned long REGPARAM2 CPUFUNC(op_4850_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4850_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -14938,18 +14938,18 @@ unsigned long REGPARAM2 CPUFUNC(op_4850_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, 7) - 4; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2846; + goto endlabel2880; } { m68k_areg (regs, 7) = dsta; regs->ir = regs->irc; get_word_prefetch (regs, 4); put_long (dsta,srca); }}}} m68k_incpc (regs, 2); -endlabel2846: ; -return 12 * 256; +endlabel2880: ; +return 12 * CYCLE_UNIT / 2; } /* PEA.L (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_4868_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4868_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -14957,18 +14957,18 @@ unsigned long REGPARAM2 CPUFUNC(op_4868_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, 7) - 4; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2847; + goto endlabel2881; } { m68k_areg (regs, 7) = dsta; regs->ir = regs->irc; get_word_prefetch (regs, 6); put_long (dsta,srca); }}}} m68k_incpc (regs, 4); -endlabel2847: ; -return 16 * 256; +endlabel2881: ; +return 16 * CYCLE_UNIT / 2; } /* PEA.L (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4870_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4870_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -14977,54 +14977,54 @@ unsigned long REGPARAM2 CPUFUNC(op_4870_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, 7) - 4; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2848; + goto endlabel2882; } { m68k_areg (regs, 7) = dsta; regs->ir = regs->irc; get_word_prefetch (regs, 6); put_long (dsta,srca); }}}} m68k_incpc (regs, 4); -endlabel2848: ; -return 16 * 256; +endlabel2882: ; +return 16 * CYCLE_UNIT / 2; } /* PEA.L (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_4878_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4878_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uaecptr dsta; dsta = m68k_areg(regs, 7) - 4; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2849; + goto endlabel2883; } { m68k_areg (regs, 7) = dsta; put_long (dsta,srca); regs->ir = regs->irc; get_word_prefetch (regs, 6); }}}} m68k_incpc (regs, 4); -endlabel2849: ; -return 16 * 256; +endlabel2883: ; +return 16 * CYCLE_UNIT / 2; } /* PEA.L (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_4879_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4879_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); { uaecptr dsta; dsta = m68k_areg(regs, 7) - 4; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 6, dsta); - goto endlabel2850; + goto endlabel2884; } { m68k_areg (regs, 7) = dsta; put_long (dsta,srca); regs->ir = regs->irc; get_word_prefetch (regs, 8); }}}} m68k_incpc (regs, 6); -endlabel2850: ; -return 20 * 256; +endlabel2884: ; +return 20 * CYCLE_UNIT / 2; } /* PEA.L (d16,PC) */ -unsigned long REGPARAM2 CPUFUNC(op_487a_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_487a_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -15032,18 +15032,18 @@ unsigned long REGPARAM2 CPUFUNC(op_487a_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, 7) - 4; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2851; + goto endlabel2885; } { m68k_areg (regs, 7) = dsta; regs->ir = regs->irc; get_word_prefetch (regs, 6); put_long (dsta,srca); }}}} m68k_incpc (regs, 4); -endlabel2851: ; -return 16 * 256; +endlabel2885: ; +return 16 * CYCLE_UNIT / 2; } /* PEA.L (d8,PC,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_487b_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_487b_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr tmppc; uaecptr srca; @@ -15053,18 +15053,18 @@ unsigned long REGPARAM2 CPUFUNC(op_487b_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, 7) - 4; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 4, dsta); - goto endlabel2852; + goto endlabel2886; } { m68k_areg (regs, 7) = dsta; regs->ir = regs->irc; get_word_prefetch (regs, 6); put_long (dsta,srca); }}}} m68k_incpc (regs, 4); -endlabel2852: ; -return 16 * 256; +endlabel2886: ; +return 16 * CYCLE_UNIT / 2; } /* EXT.W Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4880_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4880_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s32 src = m68k_dreg(regs, srcreg); @@ -15076,17 +15076,17 @@ unsigned long REGPARAM2 CPUFUNC(op_4880_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(dst)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* MVMLE.W #.W,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_4890_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4890_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; { uae_u16 mask = get_word_prefetch (regs, 4); { uaecptr srca = m68k_areg(regs, dstreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 4, srca); - goto endlabel2854; + goto endlabel2888; } { m68k_incpc (regs, 4); { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; @@ -15094,11 +15094,11 @@ unsigned long REGPARAM2 CPUFUNC(op_4890_5)(uae_u32 opcode, struct regstruct *reg while (amask) { put_word(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; } regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2854: ; -return 8 * 256; +}}}}endlabel2888: ; +return 8 * CYCLE_UNIT / 2; } /* MVMLE.W #.W,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_48a0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_48a0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; { uae_u16 mask = get_word_prefetch (regs, 4); @@ -15106,27 +15106,33 @@ unsigned long REGPARAM2 CPUFUNC(op_48a0_5)(uae_u32 opcode, struct regstruct *reg srca = m68k_areg(regs, dstreg) - 0; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 4, srca); - goto endlabel2855; + goto endlabel2889; } { m68k_incpc (regs, 4); { uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; - while (amask) { srca -= 2; put_word(srca, m68k_areg(regs, movem_index2[amask])); amask = movem_next[amask]; } + int type = get_cpu_model() >= 68020; + while (amask) { + srca -= 2; + if (type) m68k_areg(regs, dstreg) = srca; + put_word(srca, m68k_areg(regs, movem_index2[amask])); + amask = movem_next[amask]; + } while (dmask) { srca -= 2; put_word(srca, m68k_dreg(regs, movem_index2[dmask])); dmask = movem_next[dmask]; } m68k_areg(regs, dstreg) = srca; regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2855: ; -return 10 * 256; +}}}}endlabel2889: ; +return 10 * CYCLE_UNIT / 2; } /* MVMLE.W #.W,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_48a8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_48a8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; { uae_u16 mask = get_word_prefetch (regs, 4); { uaecptr srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 4, srca); - goto endlabel2856; + goto endlabel2890; } { m68k_incpc (regs, 6); { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; @@ -15134,11 +15140,11 @@ unsigned long REGPARAM2 CPUFUNC(op_48a8_5)(uae_u32 opcode, struct regstruct *reg while (amask) { put_word(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; } regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2856: ; -return 12 * 256; +}}}}endlabel2890: ; +return 12 * CYCLE_UNIT / 2; } /* MVMLE.W #.W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_48b0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_48b0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; { uae_u16 mask = get_word_prefetch (regs, 4); @@ -15146,7 +15152,7 @@ unsigned long REGPARAM2 CPUFUNC(op_48b0_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 4, srca); - goto endlabel2857; + goto endlabel2891; } { m68k_incpc (regs, 6); { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; @@ -15154,17 +15160,17 @@ unsigned long REGPARAM2 CPUFUNC(op_48b0_5)(uae_u32 opcode, struct regstruct *reg while (amask) { put_word(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; } regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2857: ; -return 14 * 256; +}}}}endlabel2891: ; +return 14 * CYCLE_UNIT / 2; } /* MVMLE.W #.W,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_48b8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_48b8_11)(uae_u32 opcode, struct regstruct *regs) { { uae_u16 mask = get_word_prefetch (regs, 4); { uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 4, srca); - goto endlabel2858; + goto endlabel2892; } { m68k_incpc (regs, 6); { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; @@ -15172,17 +15178,17 @@ unsigned long REGPARAM2 CPUFUNC(op_48b8_5)(uae_u32 opcode, struct regstruct *reg while (amask) { put_word(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; } regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2858: ; -return 12 * 256; +}}}}endlabel2892: ; +return 12 * CYCLE_UNIT / 2; } /* MVMLE.W #.W,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_48b9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_48b9_11)(uae_u32 opcode, struct regstruct *regs) { { uae_u16 mask = get_word_prefetch (regs, 4); { uaecptr srca = get_long_prefetch (regs, 6); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 4, srca); - goto endlabel2859; + goto endlabel2893; } { m68k_incpc (regs, 8); { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; @@ -15190,11 +15196,11 @@ unsigned long REGPARAM2 CPUFUNC(op_48b9_5)(uae_u32 opcode, struct regstruct *reg while (amask) { put_word(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; } regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2859: ; -return 16 * 256; +}}}}endlabel2893: ; +return 16 * CYCLE_UNIT / 2; } /* EXT.L Dn */ -unsigned long REGPARAM2 CPUFUNC(op_48c0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_48c0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s32 src = m68k_dreg(regs, srcreg); @@ -15206,17 +15212,17 @@ unsigned long REGPARAM2 CPUFUNC(op_48c0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(dst)) < 0); m68k_dreg(regs, srcreg) = (dst); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* MVMLE.L #.W,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_48d0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_48d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; { uae_u16 mask = get_word_prefetch (regs, 4); { uaecptr srca = m68k_areg(regs, dstreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 4, srca); - goto endlabel2861; + goto endlabel2895; } { m68k_incpc (regs, 4); { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; @@ -15224,11 +15230,11 @@ unsigned long REGPARAM2 CPUFUNC(op_48d0_5)(uae_u32 opcode, struct regstruct *reg while (amask) { put_long(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; } regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2861: ; -return 8 * 256; +}}}}endlabel2895: ; +return 8 * CYCLE_UNIT / 2; } /* MVMLE.L #.W,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_48e0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_48e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; { uae_u16 mask = get_word_prefetch (regs, 4); @@ -15236,27 +15242,33 @@ unsigned long REGPARAM2 CPUFUNC(op_48e0_5)(uae_u32 opcode, struct regstruct *reg srca = m68k_areg(regs, dstreg) - 0; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 4, srca); - goto endlabel2862; + goto endlabel2896; } { m68k_incpc (regs, 4); { uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; - while (amask) { srca -= 4; put_long(srca, m68k_areg(regs, movem_index2[amask])); amask = movem_next[amask]; } + int type = get_cpu_model() >= 68020; + while (amask) { + srca -= 4; + if (type) m68k_areg(regs, dstreg) = srca; + put_long(srca, m68k_areg(regs, movem_index2[amask])); + amask = movem_next[amask]; + } while (dmask) { srca -= 4; put_long(srca, m68k_dreg(regs, movem_index2[dmask])); dmask = movem_next[dmask]; } m68k_areg(regs, dstreg) = srca; regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2862: ; -return 10 * 256; +}}}}endlabel2896: ; +return 10 * CYCLE_UNIT / 2; } /* MVMLE.L #.W,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_48e8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_48e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; { uae_u16 mask = get_word_prefetch (regs, 4); { uaecptr srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 4, srca); - goto endlabel2863; + goto endlabel2897; } { m68k_incpc (regs, 6); { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; @@ -15264,11 +15276,11 @@ unsigned long REGPARAM2 CPUFUNC(op_48e8_5)(uae_u32 opcode, struct regstruct *reg while (amask) { put_long(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; } regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2863: ; -return 12 * 256; +}}}}endlabel2897: ; +return 12 * CYCLE_UNIT / 2; } /* MVMLE.L #.W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_48f0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_48f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; { uae_u16 mask = get_word_prefetch (regs, 4); @@ -15276,7 +15288,7 @@ unsigned long REGPARAM2 CPUFUNC(op_48f0_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 4, srca); - goto endlabel2864; + goto endlabel2898; } { m68k_incpc (regs, 6); { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; @@ -15284,17 +15296,17 @@ unsigned long REGPARAM2 CPUFUNC(op_48f0_5)(uae_u32 opcode, struct regstruct *reg while (amask) { put_long(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; } regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2864: ; -return 14 * 256; +}}}}endlabel2898: ; +return 14 * CYCLE_UNIT / 2; } /* MVMLE.L #.W,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_48f8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_48f8_11)(uae_u32 opcode, struct regstruct *regs) { { uae_u16 mask = get_word_prefetch (regs, 4); { uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 4, srca); - goto endlabel2865; + goto endlabel2899; } { m68k_incpc (regs, 6); { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; @@ -15302,17 +15314,17 @@ unsigned long REGPARAM2 CPUFUNC(op_48f8_5)(uae_u32 opcode, struct regstruct *reg while (amask) { put_long(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; } regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2865: ; -return 12 * 256; +}}}}endlabel2899: ; +return 12 * CYCLE_UNIT / 2; } /* MVMLE.L #.W,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_48f9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_48f9_11)(uae_u32 opcode, struct regstruct *regs) { { uae_u16 mask = get_word_prefetch (regs, 4); { uaecptr srca = get_long_prefetch (regs, 6); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 4, srca); - goto endlabel2866; + goto endlabel2900; } { m68k_incpc (regs, 8); { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; @@ -15320,11 +15332,11 @@ unsigned long REGPARAM2 CPUFUNC(op_48f9_5)(uae_u32 opcode, struct regstruct *reg while (amask) { put_long(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; } regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}endlabel2866: ; -return 16 * 256; +}}}}endlabel2900: ; +return 16 * CYCLE_UNIT / 2; } /* EXT.B Dn */ -unsigned long REGPARAM2 CPUFUNC(op_49c0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_49c0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s32 src = m68k_dreg(regs, srcreg); @@ -15336,10 +15348,10 @@ unsigned long REGPARAM2 CPUFUNC(op_49c0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(dst)) < 0); m68k_dreg(regs, srcreg) = (dst); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* TST.B Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4a00_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4a00_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -15349,10 +15361,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4a00_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); }} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* TST.B (An) */ -unsigned long REGPARAM2 CPUFUNC(op_4a10_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4a10_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -15363,10 +15375,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4a10_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); }}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* TST.B (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_4a18_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4a18_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -15378,10 +15390,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4a18_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); }}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* TST.B -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_4a20_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4a20_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -15394,10 +15406,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4a20_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); }}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* TST.B (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_4a28_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4a28_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -15408,10 +15420,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4a28_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); }}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* TST.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4a30_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4a30_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -15423,10 +15435,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4a30_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); }}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* TST.B (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_4a38_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4a38_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -15436,10 +15448,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4a38_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); }}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* TST.B (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_4a39_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4a39_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -15449,10 +15461,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4a39_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); }}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* TST.W Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4a40_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4a40_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg(regs, srcreg); @@ -15462,16 +15474,16 @@ unsigned long REGPARAM2 CPUFUNC(op_4a40_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); }} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* TST.W (An) */ -unsigned long REGPARAM2 CPUFUNC(op_4a50_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4a50_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2877; + goto endlabel2911; } {{ uae_s16 src = get_word (srca); regs->ir = regs->irc; @@ -15480,17 +15492,17 @@ unsigned long REGPARAM2 CPUFUNC(op_4a50_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); }}}} m68k_incpc (regs, 2); -endlabel2877: ; -return 8 * 256; +endlabel2911: ; +return 8 * CYCLE_UNIT / 2; } /* TST.W (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_4a58_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4a58_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2878; + goto endlabel2912; } {{ uae_s16 src = get_word (srca); m68k_areg(regs, srcreg) += 2; @@ -15500,18 +15512,18 @@ unsigned long REGPARAM2 CPUFUNC(op_4a58_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); }}}} m68k_incpc (regs, 2); -endlabel2878: ; -return 8 * 256; +endlabel2912: ; +return 8 * CYCLE_UNIT / 2; } /* TST.W -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_4a60_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4a60_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = m68k_areg(regs, srcreg) - 2; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2879; + goto endlabel2913; } {{ uae_s16 src = get_word (srca); m68k_areg (regs, srcreg) = srca; @@ -15521,17 +15533,17 @@ unsigned long REGPARAM2 CPUFUNC(op_4a60_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); }}}} m68k_incpc (regs, 2); -endlabel2879: ; -return 10 * 256; +endlabel2913: ; +return 10 * CYCLE_UNIT / 2; } /* TST.W (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_4a68_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4a68_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2880; + goto endlabel2914; } {{ uae_s16 src = get_word (srca); regs->ir = regs->irc; @@ -15540,18 +15552,18 @@ unsigned long REGPARAM2 CPUFUNC(op_4a68_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); }}}} m68k_incpc (regs, 4); -endlabel2880: ; -return 12 * 256; +endlabel2914: ; +return 12 * CYCLE_UNIT / 2; } /* TST.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4a70_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4a70_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2881; + goto endlabel2915; } {{ uae_s16 src = get_word (srca); regs->ir = regs->irc; @@ -15560,16 +15572,16 @@ unsigned long REGPARAM2 CPUFUNC(op_4a70_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); }}}} m68k_incpc (regs, 4); -endlabel2881: ; -return 14 * 256; +endlabel2915: ; +return 14 * CYCLE_UNIT / 2; } /* TST.W (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_4a78_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4a78_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2882; + goto endlabel2916; } {{ uae_s16 src = get_word (srca); regs->ir = regs->irc; @@ -15578,16 +15590,16 @@ unsigned long REGPARAM2 CPUFUNC(op_4a78_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); }}}} m68k_incpc (regs, 4); -endlabel2882: ; -return 12 * 256; +endlabel2916: ; +return 12 * CYCLE_UNIT / 2; } /* TST.W (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_4a79_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4a79_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2883; + goto endlabel2917; } {{ uae_s16 src = get_word (srca); regs->ir = regs->irc; @@ -15596,11 +15608,11 @@ unsigned long REGPARAM2 CPUFUNC(op_4a79_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); }}}} m68k_incpc (regs, 6); -endlabel2883: ; -return 16 * 256; +endlabel2917: ; +return 16 * CYCLE_UNIT / 2; } /* TST.L Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4a80_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4a80_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s32 src = m68k_dreg(regs, srcreg); @@ -15610,16 +15622,16 @@ unsigned long REGPARAM2 CPUFUNC(op_4a80_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); }} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* TST.L (An) */ -unsigned long REGPARAM2 CPUFUNC(op_4a90_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4a90_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2885; + goto endlabel2919; } {{ uae_s32 src = get_long (srca); regs->ir = regs->irc; @@ -15628,17 +15640,17 @@ unsigned long REGPARAM2 CPUFUNC(op_4a90_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); }}}} m68k_incpc (regs, 2); -endlabel2885: ; -return 12 * 256; +endlabel2919: ; +return 12 * CYCLE_UNIT / 2; } /* TST.L (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_4a98_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4a98_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2886; + goto endlabel2920; } {{ uae_s32 src = get_long (srca); m68k_areg(regs, srcreg) += 4; @@ -15648,18 +15660,18 @@ unsigned long REGPARAM2 CPUFUNC(op_4a98_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); }}}} m68k_incpc (regs, 2); -endlabel2886: ; -return 12 * 256; +endlabel2920: ; +return 12 * CYCLE_UNIT / 2; } /* TST.L -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_4aa0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4aa0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = m68k_areg(regs, srcreg) - 4; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2887; + goto endlabel2921; } {{ uae_s32 src = get_long (srca); m68k_areg (regs, srcreg) = srca; @@ -15669,17 +15681,17 @@ unsigned long REGPARAM2 CPUFUNC(op_4aa0_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); }}}} m68k_incpc (regs, 2); -endlabel2887: ; -return 14 * 256; +endlabel2921: ; +return 14 * CYCLE_UNIT / 2; } /* TST.L (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_4aa8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4aa8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2888; + goto endlabel2922; } {{ uae_s32 src = get_long (srca); regs->ir = regs->irc; @@ -15688,18 +15700,18 @@ unsigned long REGPARAM2 CPUFUNC(op_4aa8_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); }}}} m68k_incpc (regs, 4); -endlabel2888: ; -return 16 * 256; +endlabel2922: ; +return 16 * CYCLE_UNIT / 2; } /* TST.L (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4ab0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4ab0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2889; + goto endlabel2923; } {{ uae_s32 src = get_long (srca); regs->ir = regs->irc; @@ -15708,16 +15720,16 @@ unsigned long REGPARAM2 CPUFUNC(op_4ab0_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); }}}} m68k_incpc (regs, 4); -endlabel2889: ; -return 18 * 256; +endlabel2923: ; +return 18 * CYCLE_UNIT / 2; } /* TST.L (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_4ab8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4ab8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2890; + goto endlabel2924; } {{ uae_s32 src = get_long (srca); regs->ir = regs->irc; @@ -15726,16 +15738,16 @@ unsigned long REGPARAM2 CPUFUNC(op_4ab8_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); }}}} m68k_incpc (regs, 4); -endlabel2890: ; -return 16 * 256; +endlabel2924: ; +return 16 * CYCLE_UNIT / 2; } /* TST.L (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_4ab9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4ab9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel2891; + goto endlabel2925; } {{ uae_s32 src = get_long (srca); regs->ir = regs->irc; @@ -15744,11 +15756,11 @@ unsigned long REGPARAM2 CPUFUNC(op_4ab9_5)(uae_u32 opcode, struct regstruct *reg SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); }}}} m68k_incpc (regs, 6); -endlabel2891: ; -return 20 * 256; +endlabel2925: ; +return 20 * CYCLE_UNIT / 2; } /* TAS.B Dn */ -unsigned long REGPARAM2 CPUFUNC(op_4ac0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4ac0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -15760,10 +15772,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4ac0_5)(uae_u32 opcode, struct regstruct *reg src |= 0x80; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); }} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* TAS.B (An) */ -unsigned long REGPARAM2 CPUFUNC(op_4ad0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4ad0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -15776,10 +15788,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4ad0_5)(uae_u32 opcode, struct regstruct *reg src |= 0x80; put_byte (srca,src); }}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* TAS.B (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_4ad8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4ad8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -15793,10 +15805,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4ad8_5)(uae_u32 opcode, struct regstruct *reg src |= 0x80; put_byte (srca,src); }}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* TAS.B -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_4ae0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4ae0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -15811,10 +15823,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4ae0_5)(uae_u32 opcode, struct regstruct *reg src |= 0x80; put_byte (srca,src); }}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* TAS.B (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_4ae8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4ae8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -15827,10 +15839,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4ae8_5)(uae_u32 opcode, struct regstruct *reg src |= 0x80; put_byte (srca,src); }}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* TAS.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4af0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4af0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -15844,10 +15856,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4af0_5)(uae_u32 opcode, struct regstruct *reg src |= 0x80; put_byte (srca,src); }}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* TAS.B (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_4af8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4af8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -15859,10 +15871,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4af8_5)(uae_u32 opcode, struct regstruct *reg src |= 0x80; put_byte (srca,src); }}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* TAS.B (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_4af9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4af9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -15874,10 +15886,10 @@ unsigned long REGPARAM2 CPUFUNC(op_4af9_5)(uae_u32 opcode, struct regstruct *reg src |= 0x80; put_byte (srca,src); }}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* MVMEL.W #.W,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_4c90_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4c90_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; { uae_u16 mask = get_word_prefetch (regs, 4); @@ -15885,18 +15897,18 @@ unsigned long REGPARAM2 CPUFUNC(op_4c90_5)(uae_u32 opcode, struct regstruct *reg { uaecptr srca = m68k_areg(regs, dstreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 4, srca); - goto endlabel2900; + goto endlabel2934; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } regs->ir = regs->irc; get_word_prefetch (regs, 6); }}}} m68k_incpc (regs, 4); -endlabel2900: ; -return 8 * 256; +endlabel2934: ; +return 8 * CYCLE_UNIT / 2; } /* MVMEL.W #.W,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_4c98_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4c98_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; { uae_u16 mask = get_word_prefetch (regs, 4); @@ -15904,7 +15916,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4c98_5)(uae_u32 opcode, struct regstruct *reg { uaecptr srca = m68k_areg(regs, dstreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 4, srca); - goto endlabel2901; + goto endlabel2935; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } @@ -15912,11 +15924,11 @@ unsigned long REGPARAM2 CPUFUNC(op_4c98_5)(uae_u32 opcode, struct regstruct *reg regs->ir = regs->irc; get_word_prefetch (regs, 6); }}}} m68k_incpc (regs, 4); -endlabel2901: ; -return 8 * 256; +endlabel2935: ; +return 8 * CYCLE_UNIT / 2; } /* MVMEL.W #.W,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_4ca8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4ca8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; { uae_u16 mask = get_word_prefetch (regs, 4); @@ -15924,18 +15936,18 @@ unsigned long REGPARAM2 CPUFUNC(op_4ca8_5)(uae_u32 opcode, struct regstruct *reg { uaecptr srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 4, srca); - goto endlabel2902; + goto endlabel2936; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } regs->ir = regs->irc; get_word_prefetch (regs, 8); }}}} m68k_incpc (regs, 6); -endlabel2902: ; -return 12 * 256; +endlabel2936: ; +return 12 * CYCLE_UNIT / 2; } /* MVMEL.W #.W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4cb0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4cb0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; { uae_u16 mask = get_word_prefetch (regs, 4); @@ -15944,54 +15956,54 @@ unsigned long REGPARAM2 CPUFUNC(op_4cb0_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 4, srca); - goto endlabel2903; + goto endlabel2937; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } regs->ir = regs->irc; get_word_prefetch (regs, 8); }}}} m68k_incpc (regs, 6); -endlabel2903: ; -return 14 * 256; +endlabel2937: ; +return 14 * CYCLE_UNIT / 2; } /* MVMEL.W #.W,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_4cb8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4cb8_11)(uae_u32 opcode, struct regstruct *regs) { { uae_u16 mask = get_word_prefetch (regs, 4); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; { uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 4, srca); - goto endlabel2904; + goto endlabel2938; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } regs->ir = regs->irc; get_word_prefetch (regs, 8); }}}} m68k_incpc (regs, 6); -endlabel2904: ; -return 12 * 256; +endlabel2938: ; +return 12 * CYCLE_UNIT / 2; } /* MVMEL.W #.W,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_4cb9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4cb9_11)(uae_u32 opcode, struct regstruct *regs) { { uae_u16 mask = get_word_prefetch (regs, 4); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; { uaecptr srca = get_long_prefetch (regs, 6); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 4, srca); - goto endlabel2905; + goto endlabel2939; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } regs->ir = regs->irc; get_word_prefetch (regs, 10); }}}} m68k_incpc (regs, 8); -endlabel2905: ; -return 16 * 256; +endlabel2939: ; +return 16 * CYCLE_UNIT / 2; } /* MVMEL.W #.W,(d16,PC) */ -unsigned long REGPARAM2 CPUFUNC(op_4cba_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4cba_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = 2; { uae_u16 mask = get_word_prefetch (regs, 4); @@ -16000,18 +16012,18 @@ unsigned long REGPARAM2 CPUFUNC(op_4cba_5)(uae_u32 opcode, struct regstruct *reg srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 6); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 4, srca); - goto endlabel2906; + goto endlabel2940; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } regs->ir = regs->irc; get_word_prefetch (regs, 8); }}}} m68k_incpc (regs, 6); -endlabel2906: ; -return 12 * 256; +endlabel2940: ; +return 12 * CYCLE_UNIT / 2; } /* MVMEL.W #.W,(d8,PC,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4cbb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4cbb_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = 3; { uae_u16 mask = get_word_prefetch (regs, 4); @@ -16022,18 +16034,18 @@ unsigned long REGPARAM2 CPUFUNC(op_4cbb_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 6)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 4, srca); - goto endlabel2907; + goto endlabel2941; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; } regs->ir = regs->irc; get_word_prefetch (regs, 8); }}}} m68k_incpc (regs, 6); -endlabel2907: ; -return 14 * 256; +endlabel2941: ; +return 14 * CYCLE_UNIT / 2; } /* MVMEL.L #.W,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_4cd0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4cd0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; { uae_u16 mask = get_word_prefetch (regs, 4); @@ -16041,18 +16053,18 @@ unsigned long REGPARAM2 CPUFUNC(op_4cd0_5)(uae_u32 opcode, struct regstruct *reg { uaecptr srca = m68k_areg(regs, dstreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 4, srca); - goto endlabel2908; + goto endlabel2942; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } regs->ir = regs->irc; get_word_prefetch (regs, 6); }}}} m68k_incpc (regs, 4); -endlabel2908: ; -return 8 * 256; +endlabel2942: ; +return 8 * CYCLE_UNIT / 2; } /* MVMEL.L #.W,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_4cd8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4cd8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; { uae_u16 mask = get_word_prefetch (regs, 4); @@ -16060,7 +16072,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4cd8_5)(uae_u32 opcode, struct regstruct *reg { uaecptr srca = m68k_areg(regs, dstreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 4, srca); - goto endlabel2909; + goto endlabel2943; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } @@ -16068,11 +16080,11 @@ unsigned long REGPARAM2 CPUFUNC(op_4cd8_5)(uae_u32 opcode, struct regstruct *reg regs->ir = regs->irc; get_word_prefetch (regs, 6); }}}} m68k_incpc (regs, 4); -endlabel2909: ; -return 8 * 256; +endlabel2943: ; +return 8 * CYCLE_UNIT / 2; } /* MVMEL.L #.W,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_4ce8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4ce8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; { uae_u16 mask = get_word_prefetch (regs, 4); @@ -16080,18 +16092,18 @@ unsigned long REGPARAM2 CPUFUNC(op_4ce8_5)(uae_u32 opcode, struct regstruct *reg { uaecptr srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 6); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 4, srca); - goto endlabel2910; + goto endlabel2944; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } regs->ir = regs->irc; get_word_prefetch (regs, 8); }}}} m68k_incpc (regs, 6); -endlabel2910: ; -return 12 * 256; +endlabel2944: ; +return 12 * CYCLE_UNIT / 2; } /* MVMEL.L #.W,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4cf0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4cf0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = opcode & 7; { uae_u16 mask = get_word_prefetch (regs, 4); @@ -16100,54 +16112,54 @@ unsigned long REGPARAM2 CPUFUNC(op_4cf0_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 6)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 4, srca); - goto endlabel2911; + goto endlabel2945; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } regs->ir = regs->irc; get_word_prefetch (regs, 8); }}}} m68k_incpc (regs, 6); -endlabel2911: ; -return 14 * 256; +endlabel2945: ; +return 14 * CYCLE_UNIT / 2; } /* MVMEL.L #.W,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_4cf8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4cf8_11)(uae_u32 opcode, struct regstruct *regs) { { uae_u16 mask = get_word_prefetch (regs, 4); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; { uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 6); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 4, srca); - goto endlabel2912; + goto endlabel2946; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } regs->ir = regs->irc; get_word_prefetch (regs, 8); }}}} m68k_incpc (regs, 6); -endlabel2912: ; -return 12 * 256; +endlabel2946: ; +return 12 * CYCLE_UNIT / 2; } /* MVMEL.L #.W,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_4cf9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4cf9_11)(uae_u32 opcode, struct regstruct *regs) { { uae_u16 mask = get_word_prefetch (regs, 4); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; { uaecptr srca = get_long_prefetch (regs, 6); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 4, srca); - goto endlabel2913; + goto endlabel2947; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } regs->ir = regs->irc; get_word_prefetch (regs, 10); }}}} m68k_incpc (regs, 8); -endlabel2913: ; -return 16 * 256; +endlabel2947: ; +return 16 * CYCLE_UNIT / 2; } /* MVMEL.L #.W,(d16,PC) */ -unsigned long REGPARAM2 CPUFUNC(op_4cfa_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4cfa_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = 2; { uae_u16 mask = get_word_prefetch (regs, 4); @@ -16156,18 +16168,18 @@ unsigned long REGPARAM2 CPUFUNC(op_4cfa_5)(uae_u32 opcode, struct regstruct *reg srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 6); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 4, srca); - goto endlabel2914; + goto endlabel2948; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } regs->ir = regs->irc; get_word_prefetch (regs, 8); }}}} m68k_incpc (regs, 6); -endlabel2914: ; -return 12 * 256; +endlabel2948: ; +return 12 * CYCLE_UNIT / 2; } /* MVMEL.L #.W,(d8,PC,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4cfb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4cfb_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = 3; { uae_u16 mask = get_word_prefetch (regs, 4); @@ -16178,34 +16190,34 @@ unsigned long REGPARAM2 CPUFUNC(op_4cfb_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 6)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 4, srca); - goto endlabel2915; + goto endlabel2949; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; } regs->ir = regs->irc; get_word_prefetch (regs, 8); }}}} m68k_incpc (regs, 6); -endlabel2915: ; -return 14 * 256; +endlabel2949: ; +return 14 * CYCLE_UNIT / 2; } /* TRAP.L # */ -unsigned long REGPARAM2 CPUFUNC(op_4e40_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4e40_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 15); {{ uae_u32 src = srcreg; m68k_incpc (regs, 2); Exception (src + 32, regs, 0); -}}return 0 * 256; +}}return 0 * CYCLE_UNIT / 2; } /* LINK.W An,#.W */ -unsigned long REGPARAM2 CPUFUNC(op_4e50_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4e50_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr olda; olda = m68k_areg(regs, 7) - 4; if (olda & 1) { exception3 (opcode, m68k_getpc(regs) + 2, olda); - goto endlabel2917; + goto endlabel2951; } { m68k_areg (regs, 7) = olda; { uae_s32 src = m68k_areg(regs, srcreg); @@ -16216,11 +16228,11 @@ unsigned long REGPARAM2 CPUFUNC(op_4e50_5)(uae_u32 opcode, struct regstruct *reg regs->ir = regs->irc; get_word_prefetch (regs, 6); }}}}} m68k_incpc (regs, 4); -endlabel2917: ; -return 16 * 256; +endlabel2951: ; +return 16 * CYCLE_UNIT / 2; } /* UNLK.L An */ -unsigned long REGPARAM2 CPUFUNC(op_4e58_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4e58_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s32 src = m68k_areg(regs, srcreg); @@ -16228,7 +16240,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4e58_5)(uae_u32 opcode, struct regstruct *reg { uaecptr olda = m68k_areg(regs, 7); if (olda & 1) { exception3 (opcode, m68k_getpc(regs) + 2, olda); - goto endlabel2918; + goto endlabel2952; } {{ uae_s32 old = get_long (olda); m68k_areg(regs, 7) += 4; @@ -16236,58 +16248,58 @@ unsigned long REGPARAM2 CPUFUNC(op_4e58_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); m68k_areg(regs, srcreg) = (old); }}}}} m68k_incpc (regs, 2); -endlabel2918: ; -return 12 * 256; +endlabel2952: ; +return 12 * CYCLE_UNIT / 2; } /* MVR2USP.L An */ -unsigned long REGPARAM2 CPUFUNC(op_4e60_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4e60_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel2919; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel2953; } {{ uae_s32 src = m68k_areg(regs, srcreg); regs->ir = regs->irc; get_word_prefetch (regs, 4); regs->usp = src; }}} m68k_incpc (regs, 2); -endlabel2919: ; -return 4 * 256; +endlabel2953: ; +return 4 * CYCLE_UNIT / 2; } /* MVUSP2R.L An */ -unsigned long REGPARAM2 CPUFUNC(op_4e68_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4e68_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); -{if (!regs->s) { Exception(8, regs, 0); goto endlabel2920; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel2954; } {{ regs->ir = regs->irc; get_word_prefetch (regs, 4); m68k_areg(regs, srcreg) = (regs->usp); }}} m68k_incpc (regs, 2); -endlabel2920: ; -return 4 * 256; +endlabel2954: ; +return 4 * CYCLE_UNIT / 2; } /* RESET.L */ -unsigned long REGPARAM2 CPUFUNC(op_4e70_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4e70_11)(uae_u32 opcode, struct regstruct *regs) { -{if (!regs->s) { Exception(8, regs, 0); goto endlabel2921; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel2955; } { regs->ir = regs->irc; get_word_prefetch (regs, 4); cpureset(); regs->irc = get_iword(regs, 4); }} m68k_incpc (regs, 2); -endlabel2921: ; -return 4 * 256; +endlabel2955: ; +return 4 * CYCLE_UNIT / 2; } /* NOP.L */ -unsigned long REGPARAM2 CPUFUNC(op_4e71_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4e71_11)(uae_u32 opcode, struct regstruct *regs) { { regs->ir = regs->irc; get_word_prefetch (regs, 4); } m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* STOP.L #.W */ -unsigned long REGPARAM2 CPUFUNC(op_4e72_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4e72_11)(uae_u32 opcode, struct regstruct *regs) { -{if (!regs->s) { Exception(8, regs, 0); goto endlabel2923; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel2957; } {{ uae_s16 src = get_word_prefetch (regs, 4); regs->sr = src; MakeFromSR(regs); @@ -16296,24 +16308,24 @@ unsigned long REGPARAM2 CPUFUNC(op_4e72_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}endlabel2923: ; -return 12 * 256; +}}}endlabel2957: ; +return 12 * CYCLE_UNIT / 2; } /* RTE.L */ -unsigned long REGPARAM2 CPUFUNC(op_4e73_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4e73_11)(uae_u32 opcode, struct regstruct *regs) { -{if (!regs->s) { Exception(8, regs, 0); goto endlabel2924; } +{if (!regs->s) { Exception(8, regs, 0); goto endlabel2958; } {{ uaecptr sra = m68k_areg(regs, 7); if (sra & 1) { exception3 (opcode, m68k_getpc(regs) + 2, sra); - goto endlabel2924; + goto endlabel2958; } {{ uae_s16 sr = get_word (sra); m68k_areg(regs, 7) += 2; { uaecptr pca = m68k_areg(regs, 7); if (pca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, pca); - goto endlabel2924; + goto endlabel2958; } {{ uae_s32 pc = get_long (pca); m68k_areg(regs, 7) += 4; @@ -16322,16 +16334,16 @@ unsigned long REGPARAM2 CPUFUNC(op_4e73_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}}}endlabel2924: ; -return 20 * 256; +}}}}}}}}endlabel2958: ; +return 20 * CYCLE_UNIT / 2; } /* RTD.L #.W */ -unsigned long REGPARAM2 CPUFUNC(op_4e74_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4e74_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr pca = m68k_areg(regs, 7); if (pca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, pca); - goto endlabel2925; + goto endlabel2959; } {{ uae_s32 pc = get_long (pca); m68k_areg(regs, 7) += 4; @@ -16344,46 +16356,46 @@ unsigned long REGPARAM2 CPUFUNC(op_4e74_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}endlabel2925: ; -return 20 * 256; +}}}}}endlabel2959: ; +return 20 * CYCLE_UNIT / 2; } /* RTS.L */ -unsigned long REGPARAM2 CPUFUNC(op_4e75_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4e75_11)(uae_u32 opcode, struct regstruct *regs) { { m68k_do_rts(regs); get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}return 8 * 256; +}return 8 * CYCLE_UNIT / 2; } /* TRAPV.L */ -unsigned long REGPARAM2 CPUFUNC(op_4e76_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4e76_11)(uae_u32 opcode, struct regstruct *regs) { { m68k_incpc (regs, 2); if (GET_VFLG (®s->ccrflags)) { Exception (7, regs, m68k_getpc (regs)); - goto endlabel2927; + goto endlabel2961; } regs->ir = regs->irc; get_word_prefetch (regs, 2); -}endlabel2927: ; -return 4 * 256; +}endlabel2961: ; +return 4 * CYCLE_UNIT / 2; } /* RTR.L */ -unsigned long REGPARAM2 CPUFUNC(op_4e77_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4e77_11)(uae_u32 opcode, struct regstruct *regs) { { MakeSR(regs); { uaecptr sra = m68k_areg(regs, 7); if (sra & 1) { exception3 (opcode, m68k_getpc(regs) + 2, sra); - goto endlabel2928; + goto endlabel2962; } {{ uae_s16 sr = get_word (sra); m68k_areg(regs, 7) += 2; { uaecptr pca = m68k_areg(regs, 7); if (pca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, pca); - goto endlabel2928; + goto endlabel2962; } {{ uae_s32 pc = get_long (pca); m68k_areg(regs, 7) += 4; @@ -16393,18 +16405,18 @@ unsigned long REGPARAM2 CPUFUNC(op_4e77_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}}}}}endlabel2928: ; -return 20 * 256; +}}}}}}}endlabel2962: ; +return 20 * CYCLE_UNIT / 2; } /* JSR.L (An) */ -unsigned long REGPARAM2 CPUFUNC(op_4e90_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4e90_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); { uaecptr oldpc = m68k_getpc(regs) + 2; if (srca & 1) { exception3i (opcode, oldpc, srca); - goto endlabel2929; + goto endlabel2963; } m68k_setpc (regs, srca); get_word_prefetch (regs, 0); @@ -16412,18 +16424,18 @@ unsigned long REGPARAM2 CPUFUNC(op_4e90_5)(uae_u32 opcode, struct regstruct *reg put_long (m68k_areg (regs, 7), oldpc); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}endlabel2929: ; -return 8 * 256; +}}}endlabel2963: ; +return 8 * CYCLE_UNIT / 2; } /* JSR.L (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_4ea8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4ea8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)regs->irc; { uaecptr oldpc = m68k_getpc(regs) + 4; if (srca & 1) { exception3i (opcode, oldpc, srca); - goto endlabel2930; + goto endlabel2964; } m68k_setpc (regs, srca); get_word_prefetch (regs, 0); @@ -16431,11 +16443,11 @@ unsigned long REGPARAM2 CPUFUNC(op_4ea8_5)(uae_u32 opcode, struct regstruct *reg put_long (m68k_areg (regs, 7), oldpc); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}endlabel2930: ; -return 8 * 256; +}}}endlabel2964: ; +return 8 * CYCLE_UNIT / 2; } /* JSR.L (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4eb0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4eb0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -16443,7 +16455,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4eb0_5)(uae_u32 opcode, struct regstruct *reg { uaecptr oldpc = m68k_getpc(regs) + 4; if (srca & 1) { exception3i (opcode, oldpc, srca); - goto endlabel2931; + goto endlabel2965; } m68k_setpc (regs, srca); get_word_prefetch (regs, 0); @@ -16451,17 +16463,17 @@ unsigned long REGPARAM2 CPUFUNC(op_4eb0_5)(uae_u32 opcode, struct regstruct *reg put_long (m68k_areg (regs, 7), oldpc); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}endlabel2931: ; -return 8 * 256; +}}}endlabel2965: ; +return 8 * CYCLE_UNIT / 2; } /* JSR.L (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_4eb8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4eb8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)regs->irc; { uaecptr oldpc = m68k_getpc(regs) + 4; if (srca & 1) { exception3i (opcode, oldpc, srca); - goto endlabel2932; + goto endlabel2966; } m68k_setpc (regs, srca); get_word_prefetch (regs, 0); @@ -16469,11 +16481,11 @@ unsigned long REGPARAM2 CPUFUNC(op_4eb8_5)(uae_u32 opcode, struct regstruct *reg put_long (m68k_areg (regs, 7), oldpc); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}endlabel2932: ; -return 8 * 256; +}}}endlabel2966: ; +return 8 * CYCLE_UNIT / 2; } /* JSR.L (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_4eb9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4eb9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca; srca = get_word_prefetch (regs, 4) << 16; @@ -16481,7 +16493,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4eb9_5)(uae_u32 opcode, struct regstruct *reg { uaecptr oldpc = m68k_getpc(regs) + 6; if (srca & 1) { exception3i (opcode, oldpc, srca); - goto endlabel2933; + goto endlabel2967; } m68k_setpc (regs, srca); get_word_prefetch (regs, 0); @@ -16489,18 +16501,18 @@ unsigned long REGPARAM2 CPUFUNC(op_4eb9_5)(uae_u32 opcode, struct regstruct *reg put_long (m68k_areg (regs, 7), oldpc); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}endlabel2933: ; -return 12 * 256; +}}}endlabel2967: ; +return 12 * CYCLE_UNIT / 2; } /* JSR.L (d16,PC) */ -unsigned long REGPARAM2 CPUFUNC(op_4eba_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4eba_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)regs->irc; { uaecptr oldpc = m68k_getpc(regs) + 4; if (srca & 1) { exception3i (opcode, oldpc, srca); - goto endlabel2934; + goto endlabel2968; } m68k_setpc (regs, srca); get_word_prefetch (regs, 0); @@ -16508,11 +16520,11 @@ unsigned long REGPARAM2 CPUFUNC(op_4eba_5)(uae_u32 opcode, struct regstruct *reg put_long (m68k_areg (regs, 7), oldpc); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}endlabel2934: ; -return 8 * 256; +}}}endlabel2968: ; +return 8 * CYCLE_UNIT / 2; } /* JSR.L (d8,PC,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4ebb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4ebb_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr tmppc; uaecptr srca; @@ -16521,7 +16533,7 @@ unsigned long REGPARAM2 CPUFUNC(op_4ebb_5)(uae_u32 opcode, struct regstruct *reg { uaecptr oldpc = m68k_getpc(regs) + 4; if (srca & 1) { exception3i (opcode, oldpc, srca); - goto endlabel2935; + goto endlabel2969; } m68k_setpc (regs, srca); get_word_prefetch (regs, 0); @@ -16529,108 +16541,108 @@ unsigned long REGPARAM2 CPUFUNC(op_4ebb_5)(uae_u32 opcode, struct regstruct *reg put_long (m68k_areg (regs, 7), oldpc); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}endlabel2935: ; -return 8 * 256; +}}}endlabel2969: ; +return 8 * CYCLE_UNIT / 2; } /* JMP.L (An) */ -unsigned long REGPARAM2 CPUFUNC(op_4ed0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4ed0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3i (opcode, m68k_getpc(regs) + 6, srca); - goto endlabel2936; + goto endlabel2970; } m68k_setpc(regs, srca); get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}endlabel2936: ; -return 8 * 256; +}}endlabel2970: ; +return 8 * CYCLE_UNIT / 2; } /* JMP.L (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_4ee8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4ee8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)regs->irc; if (srca & 1) { exception3i (opcode, m68k_getpc(regs) + 6, srca); - goto endlabel2937; + goto endlabel2971; } m68k_setpc(regs, srca); get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}endlabel2937: ; -return 8 * 256; +}}endlabel2971: ; +return 8 * CYCLE_UNIT / 2; } /* JMP.L (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4ef0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4ef0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), regs->irc); if (srca & 1) { exception3i (opcode, m68k_getpc(regs) + 6, srca); - goto endlabel2938; + goto endlabel2972; } m68k_setpc(regs, srca); get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}endlabel2938: ; -return 8 * 256; +}}endlabel2972: ; +return 8 * CYCLE_UNIT / 2; } /* JMP.L (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_4ef8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4ef8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)regs->irc; if (srca & 1) { exception3i (opcode, m68k_getpc(regs) + 6, srca); - goto endlabel2939; + goto endlabel2973; } m68k_setpc(regs, srca); get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}endlabel2939: ; -return 8 * 256; +}}endlabel2973: ; +return 8 * CYCLE_UNIT / 2; } /* JMP.L (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_4ef9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4ef9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca; srca = get_word_prefetch (regs, 4) << 16; srca |= regs->irc; if (srca & 1) { exception3i (opcode, m68k_getpc(regs) + 6, srca); - goto endlabel2940; + goto endlabel2974; } m68k_setpc(regs, srca); get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}endlabel2940: ; -return 12 * 256; +}}endlabel2974: ; +return 12 * CYCLE_UNIT / 2; } /* JMP.L (d16,PC) */ -unsigned long REGPARAM2 CPUFUNC(op_4efa_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4efa_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)regs->irc; if (srca & 1) { exception3i (opcode, m68k_getpc(regs) + 6, srca); - goto endlabel2941; + goto endlabel2975; } m68k_setpc(regs, srca); get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}endlabel2941: ; -return 8 * 256; +}}endlabel2975: ; +return 8 * CYCLE_UNIT / 2; } /* JMP.L (d8,PC,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_4efb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_4efb_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr tmppc; uaecptr srca; @@ -16638,17 +16650,17 @@ unsigned long REGPARAM2 CPUFUNC(op_4efb_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, regs->irc); if (srca & 1) { exception3i (opcode, m68k_getpc(regs) + 6, srca); - goto endlabel2942; + goto endlabel2976; } m68k_setpc(regs, srca); get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}endlabel2942: ; -return 8 * 256; +}}endlabel2976: ; +return 8 * CYCLE_UNIT / 2; } /* ADD.B #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_5000_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5000_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16667,10 +16679,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5000_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADD.B #,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_5010_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5010_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16690,10 +16702,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5010_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADD.B #,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_5018_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5018_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16714,10 +16726,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5018_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADD.B #,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_5020_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5020_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16739,10 +16751,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5020_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* ADD.B #,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_5028_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5028_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16762,10 +16774,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5028_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ADD.B #,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_5030_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5030_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16786,10 +16798,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5030_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* ADD.B #,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_5038_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5038_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; {{ uae_u32 src = srcreg; @@ -16808,13 +16820,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5038_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } -#endif - -#ifdef PART_5 /* ADD.B #,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_5039_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5039_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; {{ uae_u32 src = srcreg; @@ -16833,10 +16842,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5039_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* ADD.W #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_5040_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5040_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16855,10 +16864,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5040_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADDA.W #,An */ -unsigned long REGPARAM2 CPUFUNC(op_5048_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5048_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16869,10 +16878,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5048_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADD.W #,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_5050_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5050_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16880,7 +16889,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5050_5)(uae_u32 opcode, struct regstruct *reg { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2953; + goto endlabel2987; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -16896,11 +16905,11 @@ unsigned long REGPARAM2 CPUFUNC(op_5050_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 2); -endlabel2953: ; -return 12 * 256; +endlabel2987: ; +return 12 * CYCLE_UNIT / 2; } /* ADD.W #,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_5058_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5058_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16908,7 +16917,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5058_5)(uae_u32 opcode, struct regstruct *reg { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2954; + goto endlabel2988; } {{ uae_s16 dst = get_word (dsta); m68k_areg(regs, dstreg) += 2; @@ -16925,11 +16934,11 @@ unsigned long REGPARAM2 CPUFUNC(op_5058_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 2); -endlabel2954: ; -return 12 * 256; +endlabel2988: ; +return 12 * CYCLE_UNIT / 2; } /* ADD.W #,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_5060_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5060_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16938,7 +16947,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5060_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, dstreg) - 2; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2955; + goto endlabel2989; } {{ uae_s16 dst = get_word (dsta); m68k_areg (regs, dstreg) = dsta; @@ -16955,11 +16964,11 @@ unsigned long REGPARAM2 CPUFUNC(op_5060_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 2); -endlabel2955: ; -return 14 * 256; +endlabel2989: ; +return 14 * CYCLE_UNIT / 2; } /* ADD.W #,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_5068_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5068_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16967,7 +16976,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5068_5)(uae_u32 opcode, struct regstruct *reg { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2956; + goto endlabel2990; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -16983,11 +16992,11 @@ unsigned long REGPARAM2 CPUFUNC(op_5068_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel2956: ; -return 16 * 256; +endlabel2990: ; +return 16 * CYCLE_UNIT / 2; } /* ADD.W #,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_5070_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5070_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16996,7 +17005,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5070_5)(uae_u32 opcode, struct regstruct *reg dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2957; + goto endlabel2991; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -17012,18 +17021,18 @@ unsigned long REGPARAM2 CPUFUNC(op_5070_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel2957: ; -return 18 * 256; +endlabel2991: ; +return 18 * CYCLE_UNIT / 2; } /* ADD.W #,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_5078_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5078_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; {{ uae_u32 src = srcreg; { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2958; + goto endlabel2992; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -17039,18 +17048,18 @@ unsigned long REGPARAM2 CPUFUNC(op_5078_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel2958: ; -return 16 * 256; +endlabel2992: ; +return 16 * CYCLE_UNIT / 2; } /* ADD.W #,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_5079_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5079_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; {{ uae_u32 src = srcreg; { uaecptr dsta = get_long_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2959; + goto endlabel2993; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -17066,11 +17075,11 @@ unsigned long REGPARAM2 CPUFUNC(op_5079_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 6); -endlabel2959: ; -return 20 * 256; +endlabel2993: ; +return 20 * CYCLE_UNIT / 2; } /* ADD.L #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_5080_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5080_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -17089,10 +17098,13 @@ unsigned long REGPARAM2 CPUFUNC(op_5080_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } +#endif + +#ifdef PART_5 /* ADDA.L #,An */ -unsigned long REGPARAM2 CPUFUNC(op_5088_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5088_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -17103,10 +17115,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5088_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADD.L #,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_5090_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5090_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -17114,7 +17126,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5090_5)(uae_u32 opcode, struct regstruct *reg { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2962; + goto endlabel2996; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -17130,11 +17142,11 @@ unsigned long REGPARAM2 CPUFUNC(op_5090_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 2); -endlabel2962: ; -return 20 * 256; +endlabel2996: ; +return 20 * CYCLE_UNIT / 2; } /* ADD.L #,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_5098_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5098_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -17142,7 +17154,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5098_5)(uae_u32 opcode, struct regstruct *reg { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2963; + goto endlabel2997; } {{ uae_s32 dst = get_long (dsta); m68k_areg(regs, dstreg) += 4; @@ -17159,11 +17171,11 @@ unsigned long REGPARAM2 CPUFUNC(op_5098_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 2); -endlabel2963: ; -return 20 * 256; +endlabel2997: ; +return 20 * CYCLE_UNIT / 2; } /* ADD.L #,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_50a0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_50a0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -17172,7 +17184,7 @@ unsigned long REGPARAM2 CPUFUNC(op_50a0_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, dstreg) - 4; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2964; + goto endlabel2998; } {{ uae_s32 dst = get_long (dsta); m68k_areg (regs, dstreg) = dsta; @@ -17189,11 +17201,11 @@ unsigned long REGPARAM2 CPUFUNC(op_50a0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 2); -endlabel2964: ; -return 22 * 256; +endlabel2998: ; +return 22 * CYCLE_UNIT / 2; } /* ADD.L #,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_50a8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_50a8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -17201,7 +17213,7 @@ unsigned long REGPARAM2 CPUFUNC(op_50a8_5)(uae_u32 opcode, struct regstruct *reg { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2965; + goto endlabel2999; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -17217,11 +17229,11 @@ unsigned long REGPARAM2 CPUFUNC(op_50a8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel2965: ; -return 24 * 256; +endlabel2999: ; +return 24 * CYCLE_UNIT / 2; } /* ADD.L #,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_50b0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_50b0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -17230,7 +17242,7 @@ unsigned long REGPARAM2 CPUFUNC(op_50b0_5)(uae_u32 opcode, struct regstruct *reg dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2966; + goto endlabel3000; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -17246,18 +17258,18 @@ unsigned long REGPARAM2 CPUFUNC(op_50b0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel2966: ; -return 26 * 256; +endlabel3000: ; +return 26 * CYCLE_UNIT / 2; } /* ADD.L #,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_50b8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_50b8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; {{ uae_u32 src = srcreg; { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2967; + goto endlabel3001; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -17273,18 +17285,18 @@ unsigned long REGPARAM2 CPUFUNC(op_50b8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel2967: ; -return 24 * 256; +endlabel3001: ; +return 24 * CYCLE_UNIT / 2; } /* ADD.L #,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_50b9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_50b9_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; {{ uae_u32 src = srcreg; { uaecptr dsta = get_long_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2968; + goto endlabel3002; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -17300,11 +17312,11 @@ unsigned long REGPARAM2 CPUFUNC(op_50b9_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 6); -endlabel2968: ; -return 28 * 256; +endlabel3002: ; +return 28 * CYCLE_UNIT / 2; } /* Scc.B Dn */ -unsigned long REGPARAM2 CPUFUNC(op_50c0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_50c0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -17313,10 +17325,10 @@ unsigned long REGPARAM2 CPUFUNC(op_50c0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 0) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ -unsigned long REGPARAM2 CPUFUNC(op_50c8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_50c8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg(regs, srcreg); @@ -17329,11 +17341,11 @@ unsigned long REGPARAM2 CPUFUNC(op_50c8_5)(uae_u32 opcode, struct regstruct *reg if (src) { if (offs & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); - goto endlabel2970; + goto endlabel3004; } regs->ir = regs->irc; get_word_prefetch (regs, 2); - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } @@ -17341,11 +17353,11 @@ unsigned long REGPARAM2 CPUFUNC(op_50c8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}endlabel2970: ; -return 12 * 256; +}}}endlabel3004: ; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ -unsigned long REGPARAM2 CPUFUNC(op_50d0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_50d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -17355,10 +17367,10 @@ unsigned long REGPARAM2 CPUFUNC(op_50d0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 0) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_50d8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_50d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -17369,10 +17381,10 @@ unsigned long REGPARAM2 CPUFUNC(op_50d8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 0) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_50e0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_50e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -17384,10 +17396,10 @@ unsigned long REGPARAM2 CPUFUNC(op_50e0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 0) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_50e8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_50e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -17397,10 +17409,10 @@ unsigned long REGPARAM2 CPUFUNC(op_50e8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 0) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_50f0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_50f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -17411,10 +17423,10 @@ unsigned long REGPARAM2 CPUFUNC(op_50f0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 0) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_50f8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_50f8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -17423,10 +17435,10 @@ unsigned long REGPARAM2 CPUFUNC(op_50f8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 0) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_50f9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_50f9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -17435,10 +17447,10 @@ unsigned long REGPARAM2 CPUFUNC(op_50f9_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 0) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* SUB.B #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_5100_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5100_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -17457,10 +17469,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5100_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUB.B #,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_5110_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5110_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -17480,10 +17492,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5110_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUB.B #,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_5118_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5118_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -17504,10 +17516,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5118_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUB.B #,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_5120_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5120_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -17529,10 +17541,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5120_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* SUB.B #,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_5128_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5128_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -17552,10 +17564,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5128_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* SUB.B #,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_5130_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5130_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -17576,10 +17588,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5130_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* SUB.B #,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_5138_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5138_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; {{ uae_u32 src = srcreg; @@ -17598,10 +17610,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5138_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* SUB.B #,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_5139_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5139_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; {{ uae_u32 src = srcreg; @@ -17620,10 +17632,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5139_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* SUB.W #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_5140_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5140_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -17642,10 +17654,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5140_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUBA.W #,An */ -unsigned long REGPARAM2 CPUFUNC(op_5148_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5148_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -17656,10 +17668,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5148_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUB.W #,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_5150_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5150_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -17667,7 +17679,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5150_5)(uae_u32 opcode, struct regstruct *reg { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2988; + goto endlabel3022; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -17683,11 +17695,11 @@ unsigned long REGPARAM2 CPUFUNC(op_5150_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 2); -endlabel2988: ; -return 12 * 256; +endlabel3022: ; +return 12 * CYCLE_UNIT / 2; } /* SUB.W #,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_5158_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5158_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -17695,7 +17707,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5158_5)(uae_u32 opcode, struct regstruct *reg { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2989; + goto endlabel3023; } {{ uae_s16 dst = get_word (dsta); m68k_areg(regs, dstreg) += 2; @@ -17712,11 +17724,11 @@ unsigned long REGPARAM2 CPUFUNC(op_5158_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 2); -endlabel2989: ; -return 12 * 256; +endlabel3023: ; +return 12 * CYCLE_UNIT / 2; } /* SUB.W #,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_5160_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5160_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -17725,7 +17737,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5160_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, dstreg) - 2; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2990; + goto endlabel3024; } {{ uae_s16 dst = get_word (dsta); m68k_areg (regs, dstreg) = dsta; @@ -17742,11 +17754,11 @@ unsigned long REGPARAM2 CPUFUNC(op_5160_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 2); -endlabel2990: ; -return 14 * 256; +endlabel3024: ; +return 14 * CYCLE_UNIT / 2; } /* SUB.W #,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_5168_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5168_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -17754,7 +17766,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5168_5)(uae_u32 opcode, struct regstruct *reg { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2991; + goto endlabel3025; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -17770,11 +17782,11 @@ unsigned long REGPARAM2 CPUFUNC(op_5168_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel2991: ; -return 16 * 256; +endlabel3025: ; +return 16 * CYCLE_UNIT / 2; } /* SUB.W #,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_5170_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5170_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -17783,7 +17795,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5170_5)(uae_u32 opcode, struct regstruct *reg dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2992; + goto endlabel3026; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -17799,18 +17811,18 @@ unsigned long REGPARAM2 CPUFUNC(op_5170_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel2992: ; -return 18 * 256; +endlabel3026: ; +return 18 * CYCLE_UNIT / 2; } /* SUB.W #,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_5178_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5178_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; {{ uae_u32 src = srcreg; { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2993; + goto endlabel3027; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -17826,18 +17838,18 @@ unsigned long REGPARAM2 CPUFUNC(op_5178_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel2993: ; -return 16 * 256; +endlabel3027: ; +return 16 * CYCLE_UNIT / 2; } /* SUB.W #,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_5179_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5179_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; {{ uae_u32 src = srcreg; { uaecptr dsta = get_long_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2994; + goto endlabel3028; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -17853,11 +17865,11 @@ unsigned long REGPARAM2 CPUFUNC(op_5179_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 6); -endlabel2994: ; -return 20 * 256; +endlabel3028: ; +return 20 * CYCLE_UNIT / 2; } /* SUB.L #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_5180_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5180_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -17876,10 +17888,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5180_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUBA.L #,An */ -unsigned long REGPARAM2 CPUFUNC(op_5188_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5188_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -17890,10 +17902,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5188_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUB.L #,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_5190_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5190_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -17901,7 +17913,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5190_5)(uae_u32 opcode, struct regstruct *reg { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2997; + goto endlabel3031; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -17917,11 +17929,11 @@ unsigned long REGPARAM2 CPUFUNC(op_5190_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 2); -endlabel2997: ; -return 20 * 256; +endlabel3031: ; +return 20 * CYCLE_UNIT / 2; } /* SUB.L #,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_5198_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5198_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -17929,7 +17941,7 @@ unsigned long REGPARAM2 CPUFUNC(op_5198_5)(uae_u32 opcode, struct regstruct *reg { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2998; + goto endlabel3032; } {{ uae_s32 dst = get_long (dsta); m68k_areg(regs, dstreg) += 4; @@ -17946,11 +17958,11 @@ unsigned long REGPARAM2 CPUFUNC(op_5198_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 2); -endlabel2998: ; -return 20 * 256; +endlabel3032: ; +return 20 * CYCLE_UNIT / 2; } /* SUB.L #,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_51a0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_51a0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -17959,7 +17971,7 @@ unsigned long REGPARAM2 CPUFUNC(op_51a0_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, dstreg) - 4; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel2999; + goto endlabel3033; } {{ uae_s32 dst = get_long (dsta); m68k_areg (regs, dstreg) = dsta; @@ -17976,11 +17988,11 @@ unsigned long REGPARAM2 CPUFUNC(op_51a0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 2); -endlabel2999: ; -return 22 * 256; +endlabel3033: ; +return 22 * CYCLE_UNIT / 2; } /* SUB.L #,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_51a8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_51a8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -17988,7 +18000,7 @@ unsigned long REGPARAM2 CPUFUNC(op_51a8_5)(uae_u32 opcode, struct regstruct *reg { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3000; + goto endlabel3034; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -18004,11 +18016,11 @@ unsigned long REGPARAM2 CPUFUNC(op_51a8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel3000: ; -return 24 * 256; +endlabel3034: ; +return 24 * CYCLE_UNIT / 2; } /* SUB.L #,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_51b0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_51b0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -18017,7 +18029,7 @@ unsigned long REGPARAM2 CPUFUNC(op_51b0_5)(uae_u32 opcode, struct regstruct *reg dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3001; + goto endlabel3035; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -18033,18 +18045,18 @@ unsigned long REGPARAM2 CPUFUNC(op_51b0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel3001: ; -return 26 * 256; +endlabel3035: ; +return 26 * CYCLE_UNIT / 2; } /* SUB.L #,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_51b8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_51b8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; {{ uae_u32 src = srcreg; { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3002; + goto endlabel3036; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -18060,18 +18072,18 @@ unsigned long REGPARAM2 CPUFUNC(op_51b8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel3002: ; -return 24 * 256; +endlabel3036: ; +return 24 * CYCLE_UNIT / 2; } /* SUB.L #,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_51b9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_51b9_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; {{ uae_u32 src = srcreg; { uaecptr dsta = get_long_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3003; + goto endlabel3037; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -18087,11 +18099,11 @@ unsigned long REGPARAM2 CPUFUNC(op_51b9_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 6); -endlabel3003: ; -return 28 * 256; +endlabel3037: ; +return 28 * CYCLE_UNIT / 2; } /* Scc.B Dn */ -unsigned long REGPARAM2 CPUFUNC(op_51c0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_51c0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -18100,10 +18112,10 @@ unsigned long REGPARAM2 CPUFUNC(op_51c0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 1) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ -unsigned long REGPARAM2 CPUFUNC(op_51c8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_51c8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg(regs, srcreg); @@ -18116,11 +18128,11 @@ unsigned long REGPARAM2 CPUFUNC(op_51c8_5)(uae_u32 opcode, struct regstruct *reg if (src) { if (offs & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); - goto endlabel3005; + goto endlabel3039; } regs->ir = regs->irc; get_word_prefetch (regs, 2); - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } @@ -18128,11 +18140,11 @@ unsigned long REGPARAM2 CPUFUNC(op_51c8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}endlabel3005: ; -return 12 * 256; +}}}endlabel3039: ; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ -unsigned long REGPARAM2 CPUFUNC(op_51d0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_51d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -18142,10 +18154,10 @@ unsigned long REGPARAM2 CPUFUNC(op_51d0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 1) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_51d8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_51d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -18156,10 +18168,10 @@ unsigned long REGPARAM2 CPUFUNC(op_51d8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 1) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_51e0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_51e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -18171,10 +18183,10 @@ unsigned long REGPARAM2 CPUFUNC(op_51e0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 1) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_51e8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_51e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -18184,10 +18196,10 @@ unsigned long REGPARAM2 CPUFUNC(op_51e8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 1) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_51f0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_51f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -18198,10 +18210,10 @@ unsigned long REGPARAM2 CPUFUNC(op_51f0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 1) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_51f8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_51f8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -18210,10 +18222,10 @@ unsigned long REGPARAM2 CPUFUNC(op_51f8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 1) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_51f9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_51f9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -18222,10 +18234,10 @@ unsigned long REGPARAM2 CPUFUNC(op_51f9_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 1) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* Scc.B Dn */ -unsigned long REGPARAM2 CPUFUNC(op_52c0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_52c0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -18234,10 +18246,10 @@ unsigned long REGPARAM2 CPUFUNC(op_52c0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 2) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ -unsigned long REGPARAM2 CPUFUNC(op_52c8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_52c8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg(regs, srcreg); @@ -18250,11 +18262,11 @@ unsigned long REGPARAM2 CPUFUNC(op_52c8_5)(uae_u32 opcode, struct regstruct *reg if (src) { if (offs & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); - goto endlabel3014; + goto endlabel3048; } regs->ir = regs->irc; get_word_prefetch (regs, 2); - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } @@ -18262,11 +18274,11 @@ unsigned long REGPARAM2 CPUFUNC(op_52c8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}endlabel3014: ; -return 12 * 256; +}}}endlabel3048: ; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ -unsigned long REGPARAM2 CPUFUNC(op_52d0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_52d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -18276,10 +18288,10 @@ unsigned long REGPARAM2 CPUFUNC(op_52d0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 2) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_52d8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_52d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -18290,10 +18302,10 @@ unsigned long REGPARAM2 CPUFUNC(op_52d8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 2) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_52e0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_52e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -18305,10 +18317,10 @@ unsigned long REGPARAM2 CPUFUNC(op_52e0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 2) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_52e8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_52e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -18318,10 +18330,10 @@ unsigned long REGPARAM2 CPUFUNC(op_52e8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 2) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_52f0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_52f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -18332,10 +18344,10 @@ unsigned long REGPARAM2 CPUFUNC(op_52f0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 2) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_52f8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_52f8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -18344,10 +18356,10 @@ unsigned long REGPARAM2 CPUFUNC(op_52f8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 2) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_52f9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_52f9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -18356,10 +18368,10 @@ unsigned long REGPARAM2 CPUFUNC(op_52f9_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 2) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* Scc.B Dn */ -unsigned long REGPARAM2 CPUFUNC(op_53c0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_53c0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -18368,10 +18380,10 @@ unsigned long REGPARAM2 CPUFUNC(op_53c0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 3) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ -unsigned long REGPARAM2 CPUFUNC(op_53c8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_53c8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg(regs, srcreg); @@ -18384,11 +18396,11 @@ unsigned long REGPARAM2 CPUFUNC(op_53c8_5)(uae_u32 opcode, struct regstruct *reg if (src) { if (offs & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); - goto endlabel3023; + goto endlabel3057; } regs->ir = regs->irc; get_word_prefetch (regs, 2); - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } @@ -18396,11 +18408,11 @@ unsigned long REGPARAM2 CPUFUNC(op_53c8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}endlabel3023: ; -return 12 * 256; +}}}endlabel3057: ; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ -unsigned long REGPARAM2 CPUFUNC(op_53d0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_53d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -18410,10 +18422,10 @@ unsigned long REGPARAM2 CPUFUNC(op_53d0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 3) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_53d8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_53d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -18424,10 +18436,10 @@ unsigned long REGPARAM2 CPUFUNC(op_53d8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 3) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_53e0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_53e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -18439,10 +18451,10 @@ unsigned long REGPARAM2 CPUFUNC(op_53e0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 3) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_53e8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_53e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -18452,10 +18464,10 @@ unsigned long REGPARAM2 CPUFUNC(op_53e8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 3) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_53f0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_53f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -18466,10 +18478,10 @@ unsigned long REGPARAM2 CPUFUNC(op_53f0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 3) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_53f8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_53f8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -18478,10 +18490,10 @@ unsigned long REGPARAM2 CPUFUNC(op_53f8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 3) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_53f9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_53f9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -18490,10 +18502,10 @@ unsigned long REGPARAM2 CPUFUNC(op_53f9_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 3) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* Scc.B Dn */ -unsigned long REGPARAM2 CPUFUNC(op_54c0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_54c0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -18502,10 +18514,10 @@ unsigned long REGPARAM2 CPUFUNC(op_54c0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 4) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ -unsigned long REGPARAM2 CPUFUNC(op_54c8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_54c8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg(regs, srcreg); @@ -18518,11 +18530,11 @@ unsigned long REGPARAM2 CPUFUNC(op_54c8_5)(uae_u32 opcode, struct regstruct *reg if (src) { if (offs & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); - goto endlabel3032; + goto endlabel3066; } regs->ir = regs->irc; get_word_prefetch (regs, 2); - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } @@ -18530,11 +18542,11 @@ unsigned long REGPARAM2 CPUFUNC(op_54c8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}endlabel3032: ; -return 12 * 256; +}}}endlabel3066: ; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ -unsigned long REGPARAM2 CPUFUNC(op_54d0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_54d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -18544,10 +18556,10 @@ unsigned long REGPARAM2 CPUFUNC(op_54d0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 4) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_54d8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_54d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -18558,10 +18570,10 @@ unsigned long REGPARAM2 CPUFUNC(op_54d8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 4) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_54e0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_54e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -18573,10 +18585,10 @@ unsigned long REGPARAM2 CPUFUNC(op_54e0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 4) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_54e8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_54e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -18586,10 +18598,10 @@ unsigned long REGPARAM2 CPUFUNC(op_54e8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 4) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_54f0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_54f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -18600,10 +18612,10 @@ unsigned long REGPARAM2 CPUFUNC(op_54f0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 4) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_54f8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_54f8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -18612,10 +18624,10 @@ unsigned long REGPARAM2 CPUFUNC(op_54f8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 4) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_54f9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_54f9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -18624,10 +18636,10 @@ unsigned long REGPARAM2 CPUFUNC(op_54f9_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 4) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* Scc.B Dn */ -unsigned long REGPARAM2 CPUFUNC(op_55c0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_55c0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -18636,10 +18648,10 @@ unsigned long REGPARAM2 CPUFUNC(op_55c0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 5) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ -unsigned long REGPARAM2 CPUFUNC(op_55c8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_55c8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg(regs, srcreg); @@ -18652,11 +18664,11 @@ unsigned long REGPARAM2 CPUFUNC(op_55c8_5)(uae_u32 opcode, struct regstruct *reg if (src) { if (offs & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); - goto endlabel3041; + goto endlabel3075; } regs->ir = regs->irc; get_word_prefetch (regs, 2); - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } @@ -18664,11 +18676,11 @@ unsigned long REGPARAM2 CPUFUNC(op_55c8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}endlabel3041: ; -return 12 * 256; +}}}endlabel3075: ; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ -unsigned long REGPARAM2 CPUFUNC(op_55d0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_55d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -18678,10 +18690,10 @@ unsigned long REGPARAM2 CPUFUNC(op_55d0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 5) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_55d8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_55d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -18692,10 +18704,10 @@ unsigned long REGPARAM2 CPUFUNC(op_55d8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 5) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_55e0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_55e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -18707,10 +18719,10 @@ unsigned long REGPARAM2 CPUFUNC(op_55e0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 5) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_55e8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_55e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -18720,10 +18732,10 @@ unsigned long REGPARAM2 CPUFUNC(op_55e8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 5) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_55f0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_55f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -18734,10 +18746,10 @@ unsigned long REGPARAM2 CPUFUNC(op_55f0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 5) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_55f8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_55f8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -18746,10 +18758,10 @@ unsigned long REGPARAM2 CPUFUNC(op_55f8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 5) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_55f9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_55f9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -18758,10 +18770,10 @@ unsigned long REGPARAM2 CPUFUNC(op_55f9_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 5) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* Scc.B Dn */ -unsigned long REGPARAM2 CPUFUNC(op_56c0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_56c0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -18770,10 +18782,10 @@ unsigned long REGPARAM2 CPUFUNC(op_56c0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 6) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ -unsigned long REGPARAM2 CPUFUNC(op_56c8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_56c8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg(regs, srcreg); @@ -18786,11 +18798,11 @@ unsigned long REGPARAM2 CPUFUNC(op_56c8_5)(uae_u32 opcode, struct regstruct *reg if (src) { if (offs & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); - goto endlabel3050; + goto endlabel3084; } regs->ir = regs->irc; get_word_prefetch (regs, 2); - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } @@ -18798,11 +18810,11 @@ unsigned long REGPARAM2 CPUFUNC(op_56c8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}endlabel3050: ; -return 12 * 256; +}}}endlabel3084: ; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ -unsigned long REGPARAM2 CPUFUNC(op_56d0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_56d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -18812,10 +18824,10 @@ unsigned long REGPARAM2 CPUFUNC(op_56d0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 6) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_56d8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_56d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -18826,10 +18838,10 @@ unsigned long REGPARAM2 CPUFUNC(op_56d8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 6) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_56e0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_56e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -18841,10 +18853,10 @@ unsigned long REGPARAM2 CPUFUNC(op_56e0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 6) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_56e8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_56e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -18854,10 +18866,10 @@ unsigned long REGPARAM2 CPUFUNC(op_56e8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 6) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_56f0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_56f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -18868,10 +18880,10 @@ unsigned long REGPARAM2 CPUFUNC(op_56f0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 6) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_56f8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_56f8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -18880,10 +18892,10 @@ unsigned long REGPARAM2 CPUFUNC(op_56f8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 6) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_56f9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_56f9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -18892,10 +18904,10 @@ unsigned long REGPARAM2 CPUFUNC(op_56f9_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 6) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* Scc.B Dn */ -unsigned long REGPARAM2 CPUFUNC(op_57c0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_57c0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -18904,10 +18916,10 @@ unsigned long REGPARAM2 CPUFUNC(op_57c0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 7) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ -unsigned long REGPARAM2 CPUFUNC(op_57c8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_57c8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg(regs, srcreg); @@ -18920,11 +18932,11 @@ unsigned long REGPARAM2 CPUFUNC(op_57c8_5)(uae_u32 opcode, struct regstruct *reg if (src) { if (offs & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); - goto endlabel3059; + goto endlabel3093; } regs->ir = regs->irc; get_word_prefetch (regs, 2); - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } @@ -18932,11 +18944,11 @@ unsigned long REGPARAM2 CPUFUNC(op_57c8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}endlabel3059: ; -return 12 * 256; +}}}endlabel3093: ; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ -unsigned long REGPARAM2 CPUFUNC(op_57d0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_57d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -18946,10 +18958,10 @@ unsigned long REGPARAM2 CPUFUNC(op_57d0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 7) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_57d8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_57d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -18960,10 +18972,10 @@ unsigned long REGPARAM2 CPUFUNC(op_57d8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 7) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_57e0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_57e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -18975,10 +18987,10 @@ unsigned long REGPARAM2 CPUFUNC(op_57e0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 7) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_57e8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_57e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -18988,10 +19000,10 @@ unsigned long REGPARAM2 CPUFUNC(op_57e8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 7) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_57f0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_57f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -19002,10 +19014,10 @@ unsigned long REGPARAM2 CPUFUNC(op_57f0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 7) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_57f8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_57f8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -19014,10 +19026,10 @@ unsigned long REGPARAM2 CPUFUNC(op_57f8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 7) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_57f9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_57f9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -19026,10 +19038,10 @@ unsigned long REGPARAM2 CPUFUNC(op_57f9_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 7) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* Scc.B Dn */ -unsigned long REGPARAM2 CPUFUNC(op_58c0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_58c0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -19038,10 +19050,10 @@ unsigned long REGPARAM2 CPUFUNC(op_58c0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 8) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ -unsigned long REGPARAM2 CPUFUNC(op_58c8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_58c8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg(regs, srcreg); @@ -19054,11 +19066,11 @@ unsigned long REGPARAM2 CPUFUNC(op_58c8_5)(uae_u32 opcode, struct regstruct *reg if (src) { if (offs & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); - goto endlabel3068; + goto endlabel3102; } regs->ir = regs->irc; get_word_prefetch (regs, 2); - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } @@ -19066,11 +19078,11 @@ unsigned long REGPARAM2 CPUFUNC(op_58c8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}endlabel3068: ; -return 12 * 256; +}}}endlabel3102: ; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ -unsigned long REGPARAM2 CPUFUNC(op_58d0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_58d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -19080,10 +19092,10 @@ unsigned long REGPARAM2 CPUFUNC(op_58d0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 8) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_58d8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_58d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -19094,10 +19106,10 @@ unsigned long REGPARAM2 CPUFUNC(op_58d8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 8) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_58e0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_58e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -19109,10 +19121,10 @@ unsigned long REGPARAM2 CPUFUNC(op_58e0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 8) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_58e8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_58e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -19122,10 +19134,10 @@ unsigned long REGPARAM2 CPUFUNC(op_58e8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 8) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_58f0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_58f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -19136,10 +19148,10 @@ unsigned long REGPARAM2 CPUFUNC(op_58f0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 8) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_58f8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_58f8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -19148,10 +19160,10 @@ unsigned long REGPARAM2 CPUFUNC(op_58f8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 8) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_58f9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_58f9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -19160,10 +19172,10 @@ unsigned long REGPARAM2 CPUFUNC(op_58f9_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 8) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* Scc.B Dn */ -unsigned long REGPARAM2 CPUFUNC(op_59c0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_59c0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -19172,10 +19184,10 @@ unsigned long REGPARAM2 CPUFUNC(op_59c0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 9) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ -unsigned long REGPARAM2 CPUFUNC(op_59c8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_59c8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg(regs, srcreg); @@ -19188,11 +19200,11 @@ unsigned long REGPARAM2 CPUFUNC(op_59c8_5)(uae_u32 opcode, struct regstruct *reg if (src) { if (offs & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); - goto endlabel3077; + goto endlabel3111; } regs->ir = regs->irc; get_word_prefetch (regs, 2); - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } @@ -19200,11 +19212,11 @@ unsigned long REGPARAM2 CPUFUNC(op_59c8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}endlabel3077: ; -return 12 * 256; +}}}endlabel3111: ; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ -unsigned long REGPARAM2 CPUFUNC(op_59d0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_59d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -19214,10 +19226,10 @@ unsigned long REGPARAM2 CPUFUNC(op_59d0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 9) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_59d8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_59d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -19228,10 +19240,10 @@ unsigned long REGPARAM2 CPUFUNC(op_59d8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 9) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_59e0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_59e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -19243,10 +19255,10 @@ unsigned long REGPARAM2 CPUFUNC(op_59e0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 9) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_59e8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_59e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -19256,10 +19268,10 @@ unsigned long REGPARAM2 CPUFUNC(op_59e8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 9) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_59f0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_59f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -19270,10 +19282,10 @@ unsigned long REGPARAM2 CPUFUNC(op_59f0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 9) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_59f8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_59f8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -19282,10 +19294,10 @@ unsigned long REGPARAM2 CPUFUNC(op_59f8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 9) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_59f9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_59f9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -19294,10 +19306,10 @@ unsigned long REGPARAM2 CPUFUNC(op_59f9_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 9) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* Scc.B Dn */ -unsigned long REGPARAM2 CPUFUNC(op_5ac0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5ac0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -19306,10 +19318,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5ac0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 10) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ -unsigned long REGPARAM2 CPUFUNC(op_5ac8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5ac8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg(regs, srcreg); @@ -19322,11 +19334,11 @@ unsigned long REGPARAM2 CPUFUNC(op_5ac8_5)(uae_u32 opcode, struct regstruct *reg if (src) { if (offs & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); - goto endlabel3086; + goto endlabel3120; } regs->ir = regs->irc; get_word_prefetch (regs, 2); - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } @@ -19334,11 +19346,11 @@ unsigned long REGPARAM2 CPUFUNC(op_5ac8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}endlabel3086: ; -return 12 * 256; +}}}endlabel3120: ; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ -unsigned long REGPARAM2 CPUFUNC(op_5ad0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5ad0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -19348,10 +19360,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5ad0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 10) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_5ad8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5ad8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -19362,10 +19374,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5ad8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 10) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_5ae0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5ae0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -19377,10 +19389,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5ae0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 10) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_5ae8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5ae8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -19390,10 +19402,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5ae8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 10) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_5af0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5af0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -19404,10 +19416,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5af0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 10) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_5af8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5af8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -19416,10 +19428,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5af8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 10) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_5af9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5af9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -19428,10 +19440,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5af9_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 10) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* Scc.B Dn */ -unsigned long REGPARAM2 CPUFUNC(op_5bc0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5bc0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -19440,10 +19452,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5bc0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 11) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ -unsigned long REGPARAM2 CPUFUNC(op_5bc8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5bc8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg(regs, srcreg); @@ -19456,11 +19468,11 @@ unsigned long REGPARAM2 CPUFUNC(op_5bc8_5)(uae_u32 opcode, struct regstruct *reg if (src) { if (offs & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); - goto endlabel3095; + goto endlabel3129; } regs->ir = regs->irc; get_word_prefetch (regs, 2); - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } @@ -19468,11 +19480,11 @@ unsigned long REGPARAM2 CPUFUNC(op_5bc8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}endlabel3095: ; -return 12 * 256; +}}}endlabel3129: ; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ -unsigned long REGPARAM2 CPUFUNC(op_5bd0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5bd0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -19482,10 +19494,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5bd0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 11) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_5bd8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5bd8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -19496,10 +19508,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5bd8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 11) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_5be0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5be0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -19511,10 +19523,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5be0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 11) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_5be8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5be8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -19524,10 +19536,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5be8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 11) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_5bf0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5bf0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -19538,10 +19550,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5bf0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 11) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_5bf8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5bf8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -19550,10 +19562,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5bf8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 11) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_5bf9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5bf9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -19562,10 +19574,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5bf9_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 11) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* Scc.B Dn */ -unsigned long REGPARAM2 CPUFUNC(op_5cc0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5cc0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -19574,10 +19586,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5cc0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 12) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ -unsigned long REGPARAM2 CPUFUNC(op_5cc8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5cc8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg(regs, srcreg); @@ -19590,11 +19602,11 @@ unsigned long REGPARAM2 CPUFUNC(op_5cc8_5)(uae_u32 opcode, struct regstruct *reg if (src) { if (offs & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); - goto endlabel3104; + goto endlabel3138; } regs->ir = regs->irc; get_word_prefetch (regs, 2); - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } @@ -19602,11 +19614,11 @@ unsigned long REGPARAM2 CPUFUNC(op_5cc8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}endlabel3104: ; -return 12 * 256; +}}}endlabel3138: ; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ -unsigned long REGPARAM2 CPUFUNC(op_5cd0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5cd0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -19616,10 +19628,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5cd0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 12) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_5cd8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5cd8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -19630,10 +19642,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5cd8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 12) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_5ce0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5ce0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -19645,10 +19657,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5ce0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 12) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_5ce8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5ce8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -19658,10 +19670,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5ce8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 12) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_5cf0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5cf0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -19672,10 +19684,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5cf0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 12) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_5cf8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5cf8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -19684,10 +19696,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5cf8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 12) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_5cf9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5cf9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -19696,10 +19708,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5cf9_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 12) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* Scc.B Dn */ -unsigned long REGPARAM2 CPUFUNC(op_5dc0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5dc0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -19708,10 +19720,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5dc0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 13) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ -unsigned long REGPARAM2 CPUFUNC(op_5dc8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5dc8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg(regs, srcreg); @@ -19724,11 +19736,11 @@ unsigned long REGPARAM2 CPUFUNC(op_5dc8_5)(uae_u32 opcode, struct regstruct *reg if (src) { if (offs & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); - goto endlabel3113; + goto endlabel3147; } regs->ir = regs->irc; get_word_prefetch (regs, 2); - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } @@ -19736,11 +19748,11 @@ unsigned long REGPARAM2 CPUFUNC(op_5dc8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}endlabel3113: ; -return 12 * 256; +}}}endlabel3147: ; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ -unsigned long REGPARAM2 CPUFUNC(op_5dd0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5dd0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -19750,10 +19762,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5dd0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 13) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_5dd8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5dd8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -19764,10 +19776,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5dd8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 13) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_5de0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5de0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -19779,10 +19791,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5de0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 13) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_5de8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5de8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -19792,10 +19804,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5de8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 13) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_5df0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5df0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -19806,10 +19818,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5df0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 13) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_5df8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5df8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -19818,10 +19830,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5df8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 13) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_5df9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5df9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -19830,10 +19842,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5df9_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 13) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* Scc.B Dn */ -unsigned long REGPARAM2 CPUFUNC(op_5ec0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5ec0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -19842,10 +19854,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5ec0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 14) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ -unsigned long REGPARAM2 CPUFUNC(op_5ec8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5ec8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg(regs, srcreg); @@ -19858,11 +19870,11 @@ unsigned long REGPARAM2 CPUFUNC(op_5ec8_5)(uae_u32 opcode, struct regstruct *reg if (src) { if (offs & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); - goto endlabel3122; + goto endlabel3156; } regs->ir = regs->irc; get_word_prefetch (regs, 2); - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } @@ -19870,11 +19882,11 @@ unsigned long REGPARAM2 CPUFUNC(op_5ec8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}endlabel3122: ; -return 12 * 256; +}}}endlabel3156: ; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ -unsigned long REGPARAM2 CPUFUNC(op_5ed0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5ed0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -19884,10 +19896,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5ed0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 14) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_5ed8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5ed8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -19898,10 +19910,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5ed8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 14) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_5ee0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5ee0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -19913,10 +19925,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5ee0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 14) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_5ee8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5ee8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -19926,10 +19938,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5ee8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 14) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_5ef0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5ef0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -19940,10 +19952,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5ef0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 14) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_5ef8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5ef8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -19952,10 +19964,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5ef8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 14) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_5ef9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5ef9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -19964,10 +19976,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5ef9_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 14) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* Scc.B Dn */ -unsigned long REGPARAM2 CPUFUNC(op_5fc0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5fc0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -19976,10 +19988,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5fc0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 15) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* DBcc.W Dn,#.W */ -unsigned long REGPARAM2 CPUFUNC(op_5fc8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5fc8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg(regs, srcreg); @@ -19992,11 +20004,11 @@ unsigned long REGPARAM2 CPUFUNC(op_5fc8_5)(uae_u32 opcode, struct regstruct *reg if (src) { if (offs & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)offs + 2); - goto endlabel3131; + goto endlabel3165; } regs->ir = regs->irc; get_word_prefetch (regs, 2); - return 12 * 256; + return 12 * CYCLE_UNIT / 2; } } else { } @@ -20004,11 +20016,11 @@ unsigned long REGPARAM2 CPUFUNC(op_5fc8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}endlabel3131: ; -return 12 * 256; +}}}endlabel3165: ; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An) */ -unsigned long REGPARAM2 CPUFUNC(op_5fd0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5fd0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -20018,10 +20030,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5fd0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 15) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_5fd8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5fd8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg); @@ -20032,10 +20044,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5fd8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 15) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* Scc.B -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_5fe0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5fe0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -20047,10 +20059,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5fe0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 15) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* Scc.B (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_5fe8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5fe8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -20060,10 +20072,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5fe8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 15) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* Scc.B (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_5ff0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5ff0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; @@ -20074,10 +20086,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5ff0_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 15) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* Scc.B (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_5ff8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5ff8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -20086,13 +20098,10 @@ unsigned long REGPARAM2 CPUFUNC(op_5ff8_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 15) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } -#endif - -#ifdef PART_6 /* Scc.B (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_5ff9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_5ff9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr srca = get_long_prefetch (regs, 4); { uae_s8 src = get_byte (srca); @@ -20101,850 +20110,13 @@ unsigned long REGPARAM2 CPUFUNC(op_5ff9_5)(uae_u32 opcode, struct regstruct *reg { int val = cctrue(®s->ccrflags, 15) ? 0xff : 0; put_byte (srca,val); }}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* Bcc.W #.W */ -unsigned long REGPARAM2 CPUFUNC(op_6000_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_6000_11)(uae_u32 opcode, struct regstruct *regs) { {{ uae_s16 src = regs->irc; if (!cctrue(®s->ccrflags, 0)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3139; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 4); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3139: ; -return 12 * 256; -} -/* Bcc.B # */ -unsigned long REGPARAM2 CPUFUNC(op_6001_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); -{{ uae_u32 src = srcreg; - if (!cctrue(®s->ccrflags, 0)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3140; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3140: ; -return 8 * 256; -} -/* Bcc.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_60ff_5)(uae_u32 opcode, struct regstruct *regs) -{ -{ if (cctrue(®s->ccrflags, 0)) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); - goto endlabel3141; - } - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - goto endlabel3141; -{ uae_s32 src; - src = get_word_prefetch (regs, 2) << 16; - src |= regs->irc; - if (!cctrue(®s->ccrflags, 0)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3141; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 4); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3141: ; -return 12 * 256; -} -/* BSR.W #.W */ -unsigned long REGPARAM2 CPUFUNC(op_6100_5)(uae_u32 opcode, struct regstruct *regs) -{ -{ uae_s32 s; -{ uae_s16 src = regs->irc; - s = (uae_s32)src + 2; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + s); - goto endlabel3142; - } - m68k_do_bsr (regs, m68k_getpc(regs) + 4, s); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3142: ; -return 8 * 256; -} -/* BSR.B # */ -unsigned long REGPARAM2 CPUFUNC(op_6101_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); -{ uae_s32 s; -{ uae_u32 src = srcreg; - s = (uae_s32)src + 2; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + s); - goto endlabel3143; - } - m68k_do_bsr (regs, m68k_getpc(regs) + 2, s); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3143: ; -return 8 * 256; -} -/* BSR.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_61ff_5)(uae_u32 opcode, struct regstruct *regs) -{ -{ uae_s32 s; -{ uae_s32 src; - src = get_word_prefetch (regs, 4) << 16; - src |= regs->irc; - s = (uae_s32)src + 2; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + s); - goto endlabel3144; - } - m68k_do_bsr (regs, m68k_getpc(regs) + 6, s); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3144: ; -return 12 * 256; -} -/* Bcc.W #.W */ -unsigned long REGPARAM2 CPUFUNC(op_6200_5)(uae_u32 opcode, struct regstruct *regs) -{ -{{ uae_s16 src = regs->irc; - if (!cctrue(®s->ccrflags, 2)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3145; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 4); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3145: ; -return 12 * 256; -} -/* Bcc.B # */ -unsigned long REGPARAM2 CPUFUNC(op_6201_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); -{{ uae_u32 src = srcreg; - if (!cctrue(®s->ccrflags, 2)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3146; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3146: ; -return 8 * 256; -} -/* Bcc.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_62ff_5)(uae_u32 opcode, struct regstruct *regs) -{ -{ if (cctrue(®s->ccrflags, 2)) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); - goto endlabel3147; - } - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - goto endlabel3147; -{ uae_s32 src; - src = get_word_prefetch (regs, 2) << 16; - src |= regs->irc; - if (!cctrue(®s->ccrflags, 2)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3147; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 4); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3147: ; -return 12 * 256; -} -/* Bcc.W #.W */ -unsigned long REGPARAM2 CPUFUNC(op_6300_5)(uae_u32 opcode, struct regstruct *regs) -{ -{{ uae_s16 src = regs->irc; - if (!cctrue(®s->ccrflags, 3)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3148; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 4); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3148: ; -return 12 * 256; -} -/* Bcc.B # */ -unsigned long REGPARAM2 CPUFUNC(op_6301_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); -{{ uae_u32 src = srcreg; - if (!cctrue(®s->ccrflags, 3)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3149; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3149: ; -return 8 * 256; -} -/* Bcc.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_63ff_5)(uae_u32 opcode, struct regstruct *regs) -{ -{ if (cctrue(®s->ccrflags, 3)) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); - goto endlabel3150; - } - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - goto endlabel3150; -{ uae_s32 src; - src = get_word_prefetch (regs, 2) << 16; - src |= regs->irc; - if (!cctrue(®s->ccrflags, 3)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3150; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 4); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3150: ; -return 12 * 256; -} -/* Bcc.W #.W */ -unsigned long REGPARAM2 CPUFUNC(op_6400_5)(uae_u32 opcode, struct regstruct *regs) -{ -{{ uae_s16 src = regs->irc; - if (!cctrue(®s->ccrflags, 4)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3151; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 4); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3151: ; -return 12 * 256; -} -/* Bcc.B # */ -unsigned long REGPARAM2 CPUFUNC(op_6401_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); -{{ uae_u32 src = srcreg; - if (!cctrue(®s->ccrflags, 4)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3152; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3152: ; -return 8 * 256; -} -/* Bcc.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_64ff_5)(uae_u32 opcode, struct regstruct *regs) -{ -{ if (cctrue(®s->ccrflags, 4)) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); - goto endlabel3153; - } - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - goto endlabel3153; -{ uae_s32 src; - src = get_word_prefetch (regs, 2) << 16; - src |= regs->irc; - if (!cctrue(®s->ccrflags, 4)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3153; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 4); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3153: ; -return 12 * 256; -} -/* Bcc.W #.W */ -unsigned long REGPARAM2 CPUFUNC(op_6500_5)(uae_u32 opcode, struct regstruct *regs) -{ -{{ uae_s16 src = regs->irc; - if (!cctrue(®s->ccrflags, 5)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3154; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 4); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3154: ; -return 12 * 256; -} -/* Bcc.B # */ -unsigned long REGPARAM2 CPUFUNC(op_6501_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); -{{ uae_u32 src = srcreg; - if (!cctrue(®s->ccrflags, 5)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3155; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3155: ; -return 8 * 256; -} -/* Bcc.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_65ff_5)(uae_u32 opcode, struct regstruct *regs) -{ -{ if (cctrue(®s->ccrflags, 5)) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); - goto endlabel3156; - } - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - goto endlabel3156; -{ uae_s32 src; - src = get_word_prefetch (regs, 2) << 16; - src |= regs->irc; - if (!cctrue(®s->ccrflags, 5)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3156; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 4); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3156: ; -return 12 * 256; -} -/* Bcc.W #.W */ -unsigned long REGPARAM2 CPUFUNC(op_6600_5)(uae_u32 opcode, struct regstruct *regs) -{ -{{ uae_s16 src = regs->irc; - if (!cctrue(®s->ccrflags, 6)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3157; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 4); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3157: ; -return 12 * 256; -} -/* Bcc.B # */ -unsigned long REGPARAM2 CPUFUNC(op_6601_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); -{{ uae_u32 src = srcreg; - if (!cctrue(®s->ccrflags, 6)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3158; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3158: ; -return 8 * 256; -} -/* Bcc.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_66ff_5)(uae_u32 opcode, struct regstruct *regs) -{ -{ if (cctrue(®s->ccrflags, 6)) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); - goto endlabel3159; - } - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - goto endlabel3159; -{ uae_s32 src; - src = get_word_prefetch (regs, 2) << 16; - src |= regs->irc; - if (!cctrue(®s->ccrflags, 6)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3159; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 4); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3159: ; -return 12 * 256; -} -/* Bcc.W #.W */ -unsigned long REGPARAM2 CPUFUNC(op_6700_5)(uae_u32 opcode, struct regstruct *regs) -{ -{{ uae_s16 src = regs->irc; - if (!cctrue(®s->ccrflags, 7)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3160; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 4); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3160: ; -return 12 * 256; -} -/* Bcc.B # */ -unsigned long REGPARAM2 CPUFUNC(op_6701_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); -{{ uae_u32 src = srcreg; - if (!cctrue(®s->ccrflags, 7)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3161; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3161: ; -return 8 * 256; -} -/* Bcc.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_67ff_5)(uae_u32 opcode, struct regstruct *regs) -{ -{ if (cctrue(®s->ccrflags, 7)) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); - goto endlabel3162; - } - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - goto endlabel3162; -{ uae_s32 src; - src = get_word_prefetch (regs, 2) << 16; - src |= regs->irc; - if (!cctrue(®s->ccrflags, 7)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3162; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 4); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3162: ; -return 12 * 256; -} -/* Bcc.W #.W */ -unsigned long REGPARAM2 CPUFUNC(op_6800_5)(uae_u32 opcode, struct regstruct *regs) -{ -{{ uae_s16 src = regs->irc; - if (!cctrue(®s->ccrflags, 8)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3163; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 4); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3163: ; -return 12 * 256; -} -/* Bcc.B # */ -unsigned long REGPARAM2 CPUFUNC(op_6801_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); -{{ uae_u32 src = srcreg; - if (!cctrue(®s->ccrflags, 8)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3164; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3164: ; -return 8 * 256; -} -/* Bcc.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_68ff_5)(uae_u32 opcode, struct regstruct *regs) -{ -{ if (cctrue(®s->ccrflags, 8)) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); - goto endlabel3165; - } - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - goto endlabel3165; -{ uae_s32 src; - src = get_word_prefetch (regs, 2) << 16; - src |= regs->irc; - if (!cctrue(®s->ccrflags, 8)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3165; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 4); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3165: ; -return 12 * 256; -} -/* Bcc.W #.W */ -unsigned long REGPARAM2 CPUFUNC(op_6900_5)(uae_u32 opcode, struct regstruct *regs) -{ -{{ uae_s16 src = regs->irc; - if (!cctrue(®s->ccrflags, 9)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3166; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 4); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3166: ; -return 12 * 256; -} -/* Bcc.B # */ -unsigned long REGPARAM2 CPUFUNC(op_6901_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); -{{ uae_u32 src = srcreg; - if (!cctrue(®s->ccrflags, 9)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3167; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3167: ; -return 8 * 256; -} -/* Bcc.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_69ff_5)(uae_u32 opcode, struct regstruct *regs) -{ -{ if (cctrue(®s->ccrflags, 9)) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); - goto endlabel3168; - } - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - goto endlabel3168; -{ uae_s32 src; - src = get_word_prefetch (regs, 2) << 16; - src |= regs->irc; - if (!cctrue(®s->ccrflags, 9)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3168; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 4); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3168: ; -return 12 * 256; -} -/* Bcc.W #.W */ -unsigned long REGPARAM2 CPUFUNC(op_6a00_5)(uae_u32 opcode, struct regstruct *regs) -{ -{{ uae_s16 src = regs->irc; - if (!cctrue(®s->ccrflags, 10)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3169; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 4); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3169: ; -return 12 * 256; -} -/* Bcc.B # */ -unsigned long REGPARAM2 CPUFUNC(op_6a01_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); -{{ uae_u32 src = srcreg; - if (!cctrue(®s->ccrflags, 10)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3170; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3170: ; -return 8 * 256; -} -/* Bcc.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_6aff_5)(uae_u32 opcode, struct regstruct *regs) -{ -{ if (cctrue(®s->ccrflags, 10)) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); - goto endlabel3171; - } - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - goto endlabel3171; -{ uae_s32 src; - src = get_word_prefetch (regs, 2) << 16; - src |= regs->irc; - if (!cctrue(®s->ccrflags, 10)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3171; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 4); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3171: ; -return 12 * 256; -} -/* Bcc.W #.W */ -unsigned long REGPARAM2 CPUFUNC(op_6b00_5)(uae_u32 opcode, struct regstruct *regs) -{ -{{ uae_s16 src = regs->irc; - if (!cctrue(®s->ccrflags, 11)) goto didnt_jump; - if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); - goto endlabel3172; - } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 4); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); -}}endlabel3172: ; -return 12 * 256; -} -/* Bcc.B # */ -unsigned long REGPARAM2 CPUFUNC(op_6b01_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); -{{ uae_u32 src = srcreg; - if (!cctrue(®s->ccrflags, 11)) goto didnt_jump; if (src & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); goto endlabel3173; @@ -20953,29 +20125,21 @@ unsigned long REGPARAM2 CPUFUNC(op_6b01_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; - m68k_incpc (regs, 2); + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); }}endlabel3173: ; -return 8 * 256; +return 12 * CYCLE_UNIT / 2; } -/* Bcc.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_6bff_5)(uae_u32 opcode, struct regstruct *regs) +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6001_11)(uae_u32 opcode, struct regstruct *regs) { -{ if (cctrue(®s->ccrflags, 11)) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); - goto endlabel3174; - } - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - goto endlabel3174; -{ uae_s32 src; - src = get_word_prefetch (regs, 2) << 16; - src |= regs->irc; - if (!cctrue(®s->ccrflags, 11)) goto didnt_jump; + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue(®s->ccrflags, 0)) goto didnt_jump; if (src & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); goto endlabel3174; @@ -20984,20 +20148,29 @@ unsigned long REGPARAM2 CPUFUNC(op_6bff_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; - m68k_incpc (regs, 4); - get_word_prefetch (regs, 0); + m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); }}endlabel3174: ; -return 12 * 256; +return 8 * CYCLE_UNIT / 2; } -/* Bcc.W #.W */ -unsigned long REGPARAM2 CPUFUNC(op_6c00_5)(uae_u32 opcode, struct regstruct *regs) +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_60ff_11)(uae_u32 opcode, struct regstruct *regs) { -{{ uae_s16 src = regs->irc; - if (!cctrue(®s->ccrflags, 12)) goto didnt_jump; +{ if (cctrue(®s->ccrflags, 0)) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); + goto endlabel3175; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + goto endlabel3175; +{ uae_s32 src; + src = get_word_prefetch (regs, 2) << 16; + src |= regs->irc; + if (!cctrue(®s->ccrflags, 0)) goto didnt_jump; if (src & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); goto endlabel3175; @@ -21006,97 +20179,74 @@ unsigned long REGPARAM2 CPUFUNC(op_6c00_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); }}endlabel3175: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } -/* Bcc.B # */ -unsigned long REGPARAM2 CPUFUNC(op_6c01_5)(uae_u32 opcode, struct regstruct *regs) +/* BSR.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6100_11)(uae_u32 opcode, struct regstruct *regs) { - uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); -{{ uae_u32 src = srcreg; - if (!cctrue(®s->ccrflags, 12)) goto didnt_jump; +{ uae_s32 s; +{ uae_s16 src = regs->irc; + s = (uae_s32)src + 2; if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + s); goto endlabel3176; } - m68k_incpc (regs, (uae_s32)src + 2); + m68k_do_bsr (regs, m68k_getpc(regs) + 4, s); get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); }}endlabel3176: ; -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } -/* Bcc.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_6cff_5)(uae_u32 opcode, struct regstruct *regs) +/* BSR.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6101_11)(uae_u32 opcode, struct regstruct *regs) { -{ if (cctrue(®s->ccrflags, 12)) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); - goto endlabel3177; - } - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - goto endlabel3177; -{ uae_s32 src; - src = get_word_prefetch (regs, 2) << 16; - src |= regs->irc; - if (!cctrue(®s->ccrflags, 12)) goto didnt_jump; + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{ uae_s32 s; +{ uae_u32 src = srcreg; + s = (uae_s32)src + 2; if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + s); goto endlabel3177; } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 4); + m68k_do_bsr (regs, m68k_getpc(regs) + 2, s); get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); }}endlabel3177: ; -return 12 * 256; +return 8 * CYCLE_UNIT / 2; } -/* Bcc.W #.W */ -unsigned long REGPARAM2 CPUFUNC(op_6d00_5)(uae_u32 opcode, struct regstruct *regs) +/* BSR.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_61ff_11)(uae_u32 opcode, struct regstruct *regs) { -{{ uae_s16 src = regs->irc; - if (!cctrue(®s->ccrflags, 13)) goto didnt_jump; +{ uae_s32 s; +{ uae_s32 src; + src = get_word_prefetch (regs, 4) << 16; + src |= regs->irc; + s = (uae_s32)src + 2; if (src & 1) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + s); goto endlabel3178; } - m68k_incpc (regs, (uae_s32)src + 2); - get_word_prefetch (regs, 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - return 10 * 256; -didnt_jump:; - m68k_incpc (regs, 4); + m68k_do_bsr (regs, m68k_getpc(regs) + 6, s); get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); }}endlabel3178: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } -/* Bcc.B # */ -unsigned long REGPARAM2 CPUFUNC(op_6d01_5)(uae_u32 opcode, struct regstruct *regs) +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6200_11)(uae_u32 opcode, struct regstruct *regs) { - uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); -{{ uae_u32 src = srcreg; - if (!cctrue(®s->ccrflags, 13)) goto didnt_jump; +{{ uae_s16 src = regs->irc; + if (!cctrue(®s->ccrflags, 2)) goto didnt_jump; if (src & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); goto endlabel3179; @@ -21105,29 +20255,21 @@ unsigned long REGPARAM2 CPUFUNC(op_6d01_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; - m68k_incpc (regs, 2); + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); }}endlabel3179: ; -return 8 * 256; +return 12 * CYCLE_UNIT / 2; } -/* Bcc.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_6dff_5)(uae_u32 opcode, struct regstruct *regs) +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6201_11)(uae_u32 opcode, struct regstruct *regs) { -{ if (cctrue(®s->ccrflags, 13)) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); - goto endlabel3180; - } - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - goto endlabel3180; -{ uae_s32 src; - src = get_word_prefetch (regs, 2) << 16; - src |= regs->irc; - if (!cctrue(®s->ccrflags, 13)) goto didnt_jump; + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue(®s->ccrflags, 2)) goto didnt_jump; if (src & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); goto endlabel3180; @@ -21136,20 +20278,29 @@ unsigned long REGPARAM2 CPUFUNC(op_6dff_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; - m68k_incpc (regs, 4); - get_word_prefetch (regs, 0); + m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); }}endlabel3180: ; -return 12 * 256; +return 8 * CYCLE_UNIT / 2; } -/* Bcc.W #.W */ -unsigned long REGPARAM2 CPUFUNC(op_6e00_5)(uae_u32 opcode, struct regstruct *regs) +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_62ff_11)(uae_u32 opcode, struct regstruct *regs) { -{{ uae_s16 src = regs->irc; - if (!cctrue(®s->ccrflags, 14)) goto didnt_jump; +{ if (cctrue(®s->ccrflags, 2)) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); + goto endlabel3181; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + goto endlabel3181; +{ uae_s32 src; + src = get_word_prefetch (regs, 2) << 16; + src |= regs->irc; + if (!cctrue(®s->ccrflags, 2)) goto didnt_jump; if (src & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); goto endlabel3181; @@ -21158,21 +20309,20 @@ unsigned long REGPARAM2 CPUFUNC(op_6e00_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); }}endlabel3181: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } -/* Bcc.B # */ -unsigned long REGPARAM2 CPUFUNC(op_6e01_5)(uae_u32 opcode, struct regstruct *regs) +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6300_11)(uae_u32 opcode, struct regstruct *regs) { - uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); -{{ uae_u32 src = srcreg; - if (!cctrue(®s->ccrflags, 14)) goto didnt_jump; +{{ uae_s16 src = regs->irc; + if (!cctrue(®s->ccrflags, 3)) goto didnt_jump; if (src & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); goto endlabel3182; @@ -21181,29 +20331,24 @@ unsigned long REGPARAM2 CPUFUNC(op_6e01_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; - m68k_incpc (regs, 2); + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); }}endlabel3182: ; -return 8 * 256; +return 12 * CYCLE_UNIT / 2; } -/* Bcc.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_6eff_5)(uae_u32 opcode, struct regstruct *regs) +#endif + +#ifdef PART_6 +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6301_11)(uae_u32 opcode, struct regstruct *regs) { -{ if (cctrue(®s->ccrflags, 14)) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); - goto endlabel3183; - } - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - goto endlabel3183; -{ uae_s32 src; - src = get_word_prefetch (regs, 2) << 16; - src |= regs->irc; - if (!cctrue(®s->ccrflags, 14)) goto didnt_jump; + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue(®s->ccrflags, 3)) goto didnt_jump; if (src & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); goto endlabel3183; @@ -21212,20 +20357,29 @@ unsigned long REGPARAM2 CPUFUNC(op_6eff_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; - m68k_incpc (regs, 4); - get_word_prefetch (regs, 0); + m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); }}endlabel3183: ; -return 12 * 256; +return 8 * CYCLE_UNIT / 2; } -/* Bcc.W #.W */ -unsigned long REGPARAM2 CPUFUNC(op_6f00_5)(uae_u32 opcode, struct regstruct *regs) +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_63ff_11)(uae_u32 opcode, struct regstruct *regs) { -{{ uae_s16 src = regs->irc; - if (!cctrue(®s->ccrflags, 15)) goto didnt_jump; +{ if (cctrue(®s->ccrflags, 3)) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); + goto endlabel3184; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + goto endlabel3184; +{ uae_s32 src; + src = get_word_prefetch (regs, 2) << 16; + src |= regs->irc; + if (!cctrue(®s->ccrflags, 3)) goto didnt_jump; if (src & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); goto endlabel3184; @@ -21234,21 +20388,20 @@ unsigned long REGPARAM2 CPUFUNC(op_6f00_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); }}endlabel3184: ; -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } -/* Bcc.B # */ -unsigned long REGPARAM2 CPUFUNC(op_6f01_5)(uae_u32 opcode, struct regstruct *regs) +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6400_11)(uae_u32 opcode, struct regstruct *regs) { - uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); -{{ uae_u32 src = srcreg; - if (!cctrue(®s->ccrflags, 15)) goto didnt_jump; +{{ uae_s16 src = regs->irc; + if (!cctrue(®s->ccrflags, 4)) goto didnt_jump; if (src & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); goto endlabel3185; @@ -21257,29 +20410,21 @@ unsigned long REGPARAM2 CPUFUNC(op_6f01_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; didnt_jump:; - m68k_incpc (regs, 2); + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); }}endlabel3185: ; -return 8 * 256; +return 12 * CYCLE_UNIT / 2; } -/* Bcc.L #.L */ -unsigned long REGPARAM2 CPUFUNC(op_6fff_5)(uae_u32 opcode, struct regstruct *regs) +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6401_11)(uae_u32 opcode, struct regstruct *regs) { -{ if (cctrue(®s->ccrflags, 15)) { - exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); - goto endlabel3186; - } - m68k_incpc (regs, 2); - regs->ir = regs->irc; - get_word_prefetch (regs, 2); - goto endlabel3186; -{ uae_s32 src; - src = get_word_prefetch (regs, 2) << 16; - src |= regs->irc; - if (!cctrue(®s->ccrflags, 15)) goto didnt_jump; + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue(®s->ccrflags, 4)) goto didnt_jump; if (src & 1) { exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); goto endlabel3186; @@ -21288,17 +20433,884 @@ unsigned long REGPARAM2 CPUFUNC(op_6fff_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); - return 10 * 256; + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3186: ; +return 8 * CYCLE_UNIT / 2; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_64ff_11)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue(®s->ccrflags, 4)) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); + goto endlabel3187; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + goto endlabel3187; +{ uae_s32 src; + src = get_word_prefetch (regs, 2) << 16; + src |= regs->irc; + if (!cctrue(®s->ccrflags, 4)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3187; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; didnt_jump:; m68k_incpc (regs, 4); get_word_prefetch (regs, 0); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}endlabel3186: ; -return 12 * 256; +}}endlabel3187: ; +return 12 * CYCLE_UNIT / 2; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6500_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + if (!cctrue(®s->ccrflags, 5)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3188; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3188: ; +return 12 * CYCLE_UNIT / 2; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6501_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue(®s->ccrflags, 5)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3189; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3189: ; +return 8 * CYCLE_UNIT / 2; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_65ff_11)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue(®s->ccrflags, 5)) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); + goto endlabel3190; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + goto endlabel3190; +{ uae_s32 src; + src = get_word_prefetch (regs, 2) << 16; + src |= regs->irc; + if (!cctrue(®s->ccrflags, 5)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3190; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3190: ; +return 12 * CYCLE_UNIT / 2; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6600_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + if (!cctrue(®s->ccrflags, 6)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3191; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3191: ; +return 12 * CYCLE_UNIT / 2; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6601_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue(®s->ccrflags, 6)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3192; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3192: ; +return 8 * CYCLE_UNIT / 2; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_66ff_11)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue(®s->ccrflags, 6)) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); + goto endlabel3193; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + goto endlabel3193; +{ uae_s32 src; + src = get_word_prefetch (regs, 2) << 16; + src |= regs->irc; + if (!cctrue(®s->ccrflags, 6)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3193; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3193: ; +return 12 * CYCLE_UNIT / 2; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6700_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + if (!cctrue(®s->ccrflags, 7)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3194; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3194: ; +return 12 * CYCLE_UNIT / 2; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6701_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue(®s->ccrflags, 7)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3195; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3195: ; +return 8 * CYCLE_UNIT / 2; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_67ff_11)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue(®s->ccrflags, 7)) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); + goto endlabel3196; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + goto endlabel3196; +{ uae_s32 src; + src = get_word_prefetch (regs, 2) << 16; + src |= regs->irc; + if (!cctrue(®s->ccrflags, 7)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3196; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3196: ; +return 12 * CYCLE_UNIT / 2; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6800_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + if (!cctrue(®s->ccrflags, 8)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3197; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3197: ; +return 12 * CYCLE_UNIT / 2; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6801_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue(®s->ccrflags, 8)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3198; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3198: ; +return 8 * CYCLE_UNIT / 2; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_68ff_11)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue(®s->ccrflags, 8)) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); + goto endlabel3199; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + goto endlabel3199; +{ uae_s32 src; + src = get_word_prefetch (regs, 2) << 16; + src |= regs->irc; + if (!cctrue(®s->ccrflags, 8)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3199; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3199: ; +return 12 * CYCLE_UNIT / 2; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6900_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + if (!cctrue(®s->ccrflags, 9)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3200; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3200: ; +return 12 * CYCLE_UNIT / 2; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6901_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue(®s->ccrflags, 9)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3201; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3201: ; +return 8 * CYCLE_UNIT / 2; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_69ff_11)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue(®s->ccrflags, 9)) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); + goto endlabel3202; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + goto endlabel3202; +{ uae_s32 src; + src = get_word_prefetch (regs, 2) << 16; + src |= regs->irc; + if (!cctrue(®s->ccrflags, 9)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3202; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3202: ; +return 12 * CYCLE_UNIT / 2; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6a00_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + if (!cctrue(®s->ccrflags, 10)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3203; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3203: ; +return 12 * CYCLE_UNIT / 2; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6a01_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue(®s->ccrflags, 10)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3204; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3204: ; +return 8 * CYCLE_UNIT / 2; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_6aff_11)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue(®s->ccrflags, 10)) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); + goto endlabel3205; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + goto endlabel3205; +{ uae_s32 src; + src = get_word_prefetch (regs, 2) << 16; + src |= regs->irc; + if (!cctrue(®s->ccrflags, 10)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3205; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3205: ; +return 12 * CYCLE_UNIT / 2; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6b00_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + if (!cctrue(®s->ccrflags, 11)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3206; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3206: ; +return 12 * CYCLE_UNIT / 2; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6b01_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue(®s->ccrflags, 11)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3207; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3207: ; +return 8 * CYCLE_UNIT / 2; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_6bff_11)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue(®s->ccrflags, 11)) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); + goto endlabel3208; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + goto endlabel3208; +{ uae_s32 src; + src = get_word_prefetch (regs, 2) << 16; + src |= regs->irc; + if (!cctrue(®s->ccrflags, 11)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3208; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3208: ; +return 12 * CYCLE_UNIT / 2; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6c00_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + if (!cctrue(®s->ccrflags, 12)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3209; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3209: ; +return 12 * CYCLE_UNIT / 2; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6c01_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue(®s->ccrflags, 12)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3210; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3210: ; +return 8 * CYCLE_UNIT / 2; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_6cff_11)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue(®s->ccrflags, 12)) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); + goto endlabel3211; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + goto endlabel3211; +{ uae_s32 src; + src = get_word_prefetch (regs, 2) << 16; + src |= regs->irc; + if (!cctrue(®s->ccrflags, 12)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3211; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3211: ; +return 12 * CYCLE_UNIT / 2; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6d00_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + if (!cctrue(®s->ccrflags, 13)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3212; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3212: ; +return 12 * CYCLE_UNIT / 2; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6d01_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue(®s->ccrflags, 13)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3213; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3213: ; +return 8 * CYCLE_UNIT / 2; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_6dff_11)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue(®s->ccrflags, 13)) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); + goto endlabel3214; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + goto endlabel3214; +{ uae_s32 src; + src = get_word_prefetch (regs, 2) << 16; + src |= regs->irc; + if (!cctrue(®s->ccrflags, 13)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3214; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3214: ; +return 12 * CYCLE_UNIT / 2; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6e00_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + if (!cctrue(®s->ccrflags, 14)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3215; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3215: ; +return 12 * CYCLE_UNIT / 2; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6e01_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue(®s->ccrflags, 14)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3216; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3216: ; +return 8 * CYCLE_UNIT / 2; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_6eff_11)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue(®s->ccrflags, 14)) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); + goto endlabel3217; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + goto endlabel3217; +{ uae_s32 src; + src = get_word_prefetch (regs, 2) << 16; + src |= regs->irc; + if (!cctrue(®s->ccrflags, 14)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3217; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3217: ; +return 12 * CYCLE_UNIT / 2; +} +/* Bcc.W #.W */ +unsigned long REGPARAM2 CPUFUNC(op_6f00_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uae_s16 src = regs->irc; + if (!cctrue(®s->ccrflags, 15)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3218; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3218: ; +return 12 * CYCLE_UNIT / 2; +} +/* Bcc.B # */ +unsigned long REGPARAM2 CPUFUNC(op_6f01_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); +{{ uae_u32 src = srcreg; + if (!cctrue(®s->ccrflags, 15)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3219; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3219: ; +return 8 * CYCLE_UNIT / 2; +} +/* Bcc.L #.L */ +unsigned long REGPARAM2 CPUFUNC(op_6fff_11)(uae_u32 opcode, struct regstruct *regs) +{ +{ if (cctrue(®s->ccrflags, 15)) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 1); + goto endlabel3220; + } + m68k_incpc (regs, 2); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + goto endlabel3220; +{ uae_s32 src; + src = get_word_prefetch (regs, 2) << 16; + src |= regs->irc; + if (!cctrue(®s->ccrflags, 15)) goto didnt_jump; + if (src & 1) { + exception3i (opcode, m68k_getpc(regs) + 2, m68k_getpc(regs) + 2 + (uae_s32)src); + goto endlabel3220; + } + m68k_incpc (regs, (uae_s32)src + 2); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); + return 10 * CYCLE_UNIT / 2; +didnt_jump:; + m68k_incpc (regs, 4); + get_word_prefetch (regs, 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 2); +}}endlabel3220: ; +return 12 * CYCLE_UNIT / 2; } /* MOVE.L #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_7000_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_7000_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21310,10 +21322,10 @@ unsigned long REGPARAM2 CPUFUNC(op_7000_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 2); regs->ir = regs->irc; get_word_prefetch (regs, 2); -}}}return 4 * 256; +}}}return 4 * CYCLE_UNIT / 2; } /* OR.B Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_8000_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_8000_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21327,10 +21339,10 @@ unsigned long REGPARAM2 CPUFUNC(op_8000_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* OR.B (An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_8010_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_8010_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21345,10 +21357,10 @@ unsigned long REGPARAM2 CPUFUNC(op_8010_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* OR.B (An)+,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_8018_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_8018_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21364,10 +21376,10 @@ unsigned long REGPARAM2 CPUFUNC(op_8018_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* OR.B -(An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_8020_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_8020_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21384,10 +21396,10 @@ unsigned long REGPARAM2 CPUFUNC(op_8020_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* OR.B (d16,An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_8028_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_8028_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21402,10 +21414,10 @@ unsigned long REGPARAM2 CPUFUNC(op_8028_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* OR.B (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_8030_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_8030_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21421,10 +21433,10 @@ unsigned long REGPARAM2 CPUFUNC(op_8030_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* OR.B (xxx).W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_8038_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_8038_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -21438,10 +21450,10 @@ unsigned long REGPARAM2 CPUFUNC(op_8038_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* OR.B (xxx).L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_8039_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_8039_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); @@ -21455,10 +21467,10 @@ unsigned long REGPARAM2 CPUFUNC(op_8039_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* OR.B (d16,PC),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_803a_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_803a_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; @@ -21473,10 +21485,10 @@ unsigned long REGPARAM2 CPUFUNC(op_803a_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* OR.B (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_803b_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_803b_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -21493,10 +21505,10 @@ unsigned long REGPARAM2 CPUFUNC(op_803b_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* OR.B #.B,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_803c_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_803c_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -21509,10 +21521,10 @@ unsigned long REGPARAM2 CPUFUNC(op_803c_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* OR.W Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_8040_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_8040_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21526,17 +21538,17 @@ unsigned long REGPARAM2 CPUFUNC(op_8040_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* OR.W (An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_8050_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_8050_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3200; + goto endlabel3234; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -21548,18 +21560,18 @@ unsigned long REGPARAM2 CPUFUNC(op_8050_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}} m68k_incpc (regs, 2); -endlabel3200: ; -return 8 * 256; +endlabel3234: ; +return 8 * CYCLE_UNIT / 2; } /* OR.W (An)+,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_8058_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_8058_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3201; + goto endlabel3235; } {{ uae_s16 src = get_word (srca); m68k_areg(regs, srcreg) += 2; @@ -21572,11 +21584,11 @@ unsigned long REGPARAM2 CPUFUNC(op_8058_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}} m68k_incpc (regs, 2); -endlabel3201: ; -return 8 * 256; +endlabel3235: ; +return 8 * CYCLE_UNIT / 2; } /* OR.W -(An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_8060_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_8060_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21584,7 +21596,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8060_5)(uae_u32 opcode, struct regstruct *reg srca = m68k_areg(regs, srcreg) - 2; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3202; + goto endlabel3236; } {{ uae_s16 src = get_word (srca); m68k_areg (regs, srcreg) = srca; @@ -21597,18 +21609,18 @@ unsigned long REGPARAM2 CPUFUNC(op_8060_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}} m68k_incpc (regs, 2); -endlabel3202: ; -return 10 * 256; +endlabel3236: ; +return 10 * CYCLE_UNIT / 2; } /* OR.W (d16,An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_8068_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_8068_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3203; + goto endlabel3237; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -21620,11 +21632,11 @@ unsigned long REGPARAM2 CPUFUNC(op_8068_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}} m68k_incpc (regs, 4); -endlabel3203: ; -return 12 * 256; +endlabel3237: ; +return 12 * CYCLE_UNIT / 2; } /* OR.W (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_8070_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_8070_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21632,7 +21644,7 @@ unsigned long REGPARAM2 CPUFUNC(op_8070_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3204; + goto endlabel3238; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -21644,17 +21656,17 @@ unsigned long REGPARAM2 CPUFUNC(op_8070_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}} m68k_incpc (regs, 4); -endlabel3204: ; -return 14 * 256; +endlabel3238: ; +return 14 * CYCLE_UNIT / 2; } /* OR.W (xxx).W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_8078_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_8078_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3205; + goto endlabel3239; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -21666,17 +21678,17 @@ unsigned long REGPARAM2 CPUFUNC(op_8078_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}} m68k_incpc (regs, 4); -endlabel3205: ; -return 12 * 256; +endlabel3239: ; +return 12 * CYCLE_UNIT / 2; } /* OR.W (xxx).L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_8079_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_8079_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3206; + goto endlabel3240; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -21688,18 +21700,18 @@ unsigned long REGPARAM2 CPUFUNC(op_8079_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}} m68k_incpc (regs, 6); -endlabel3206: ; -return 16 * 256; +endlabel3240: ; +return 16 * CYCLE_UNIT / 2; } /* OR.W (d16,PC),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_807a_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_807a_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3207; + goto endlabel3241; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -21711,11 +21723,11 @@ unsigned long REGPARAM2 CPUFUNC(op_807a_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}} m68k_incpc (regs, 4); -endlabel3207: ; -return 12 * 256; +endlabel3241: ; +return 12 * CYCLE_UNIT / 2; } /* OR.W (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_807b_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_807b_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -21724,7 +21736,7 @@ unsigned long REGPARAM2 CPUFUNC(op_807b_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3208; + goto endlabel3242; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -21736,11 +21748,11 @@ unsigned long REGPARAM2 CPUFUNC(op_807b_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}} m68k_incpc (regs, 4); -endlabel3208: ; -return 14 * 256; +endlabel3242: ; +return 14 * CYCLE_UNIT / 2; } /* OR.W #.W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_807c_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_807c_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -21753,10 +21765,10 @@ unsigned long REGPARAM2 CPUFUNC(op_807c_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* OR.L Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_8080_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_8080_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21770,17 +21782,17 @@ unsigned long REGPARAM2 CPUFUNC(op_8080_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); m68k_dreg(regs, dstreg) = (src); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* OR.L (An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_8090_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_8090_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3211; + goto endlabel3245; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -21792,18 +21804,18 @@ unsigned long REGPARAM2 CPUFUNC(op_8090_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); m68k_dreg(regs, dstreg) = (src); }}}}} m68k_incpc (regs, 2); -endlabel3211: ; -return 12 * 256; +endlabel3245: ; +return 12 * CYCLE_UNIT / 2; } /* OR.L (An)+,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_8098_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_8098_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3212; + goto endlabel3246; } {{ uae_s32 src = get_long (srca); m68k_areg(regs, srcreg) += 4; @@ -21816,11 +21828,11 @@ unsigned long REGPARAM2 CPUFUNC(op_8098_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); m68k_dreg(regs, dstreg) = (src); }}}}} m68k_incpc (regs, 2); -endlabel3212: ; -return 12 * 256; +endlabel3246: ; +return 12 * CYCLE_UNIT / 2; } /* OR.L -(An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_80a0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_80a0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21828,7 +21840,7 @@ unsigned long REGPARAM2 CPUFUNC(op_80a0_5)(uae_u32 opcode, struct regstruct *reg srca = m68k_areg(regs, srcreg) - 4; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3213; + goto endlabel3247; } {{ uae_s32 src = get_long (srca); m68k_areg (regs, srcreg) = srca; @@ -21841,18 +21853,18 @@ unsigned long REGPARAM2 CPUFUNC(op_80a0_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); m68k_dreg(regs, dstreg) = (src); }}}}} m68k_incpc (regs, 2); -endlabel3213: ; -return 14 * 256; +endlabel3247: ; +return 14 * CYCLE_UNIT / 2; } /* OR.L (d16,An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_80a8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_80a8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3214; + goto endlabel3248; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -21864,11 +21876,11 @@ unsigned long REGPARAM2 CPUFUNC(op_80a8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (src); }}}}} m68k_incpc (regs, 4); -endlabel3214: ; -return 16 * 256; +endlabel3248: ; +return 16 * CYCLE_UNIT / 2; } /* OR.L (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_80b0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_80b0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21876,7 +21888,7 @@ unsigned long REGPARAM2 CPUFUNC(op_80b0_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3215; + goto endlabel3249; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -21888,17 +21900,17 @@ unsigned long REGPARAM2 CPUFUNC(op_80b0_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (src); }}}}} m68k_incpc (regs, 4); -endlabel3215: ; -return 18 * 256; +endlabel3249: ; +return 18 * CYCLE_UNIT / 2; } /* OR.L (xxx).W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_80b8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_80b8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3216; + goto endlabel3250; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -21910,17 +21922,17 @@ unsigned long REGPARAM2 CPUFUNC(op_80b8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (src); }}}}} m68k_incpc (regs, 4); -endlabel3216: ; -return 16 * 256; +endlabel3250: ; +return 16 * CYCLE_UNIT / 2; } /* OR.L (xxx).L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_80b9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_80b9_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3217; + goto endlabel3251; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -21932,18 +21944,18 @@ unsigned long REGPARAM2 CPUFUNC(op_80b9_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); m68k_dreg(regs, dstreg) = (src); }}}}} m68k_incpc (regs, 6); -endlabel3217: ; -return 20 * 256; +endlabel3251: ; +return 20 * CYCLE_UNIT / 2; } /* OR.L (d16,PC),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_80ba_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_80ba_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3218; + goto endlabel3252; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -21955,11 +21967,11 @@ unsigned long REGPARAM2 CPUFUNC(op_80ba_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (src); }}}}} m68k_incpc (regs, 4); -endlabel3218: ; -return 16 * 256; +endlabel3252: ; +return 16 * CYCLE_UNIT / 2; } /* OR.L (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_80bb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_80bb_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -21968,7 +21980,7 @@ unsigned long REGPARAM2 CPUFUNC(op_80bb_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3219; + goto endlabel3253; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -21980,11 +21992,11 @@ unsigned long REGPARAM2 CPUFUNC(op_80bb_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (src); }}}}} m68k_incpc (regs, 4); -endlabel3219: ; -return 18 * 256; +endlabel3253: ; +return 18 * CYCLE_UNIT / 2; } /* OR.L #.L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_80bc_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_80bc_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); @@ -21997,931 +22009,10 @@ unsigned long REGPARAM2 CPUFUNC(op_80bc_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); m68k_dreg(regs, dstreg) = (src); }}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* DIVU.W Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_80c0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{ uaecptr oldpc = m68k_getpc(regs); -{ uae_s16 src = m68k_dreg(regs, srcreg); -{ uae_s32 dst = m68k_dreg(regs, dstreg); - CLEAR_CZNV (®s->ccrflags); - if (src == 0) { - m68k_incpc (regs, 2); - Exception (5, regs, oldpc); - goto endlabel3221; - } else { - uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; - uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; - if (newv > 0xffff) { - SET_VFLG (®s->ccrflags, 1); - SET_NFLG (®s->ccrflags, 1); - } else { - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); - newv = (newv & 0xffff) | ((uae_u32)rem << 16); - m68k_dreg(regs, dstreg) = (newv); - } - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - m68k_incpc (regs, 2); - } -}}}endlabel3221: ; -return 110 * 256; -} -/* DIVU.W (An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_80d0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{ uaecptr oldpc = m68k_getpc(regs); -{ uaecptr srca = m68k_areg(regs, srcreg); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3222; - } -{{ uae_s16 src = get_word (srca); -{ uae_s32 dst = m68k_dreg(regs, dstreg); - CLEAR_CZNV (®s->ccrflags); - if (src == 0) { - m68k_incpc (regs, 2); - Exception (5, regs, oldpc); - goto endlabel3222; - } else { - uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; - uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; - if (newv > 0xffff) { - SET_VFLG (®s->ccrflags, 1); - SET_NFLG (®s->ccrflags, 1); - } else { - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); - newv = (newv & 0xffff) | ((uae_u32)rem << 16); - m68k_dreg(regs, dstreg) = (newv); - } - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - m68k_incpc (regs, 2); - } -}}}}}endlabel3222: ; -return 114 * 256; -} -/* DIVU.W (An)+,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_80d8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{ uaecptr oldpc = m68k_getpc(regs); -{ uaecptr srca = m68k_areg(regs, srcreg); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3223; - } -{{ uae_s16 src = get_word (srca); - m68k_areg(regs, srcreg) += 2; -{ uae_s32 dst = m68k_dreg(regs, dstreg); - CLEAR_CZNV (®s->ccrflags); - if (src == 0) { - m68k_incpc (regs, 2); - Exception (5, regs, oldpc); - goto endlabel3223; - } else { - uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; - uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; - if (newv > 0xffff) { - SET_VFLG (®s->ccrflags, 1); - SET_NFLG (®s->ccrflags, 1); - } else { - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); - newv = (newv & 0xffff) | ((uae_u32)rem << 16); - m68k_dreg(regs, dstreg) = (newv); - } - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - m68k_incpc (regs, 2); - } -}}}}}endlabel3223: ; -return 114 * 256; -} -/* DIVU.W -(An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_80e0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{ uaecptr oldpc = m68k_getpc(regs); -{ uaecptr srca; - srca = m68k_areg(regs, srcreg) - 2; - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3224; - } -{{ uae_s16 src = get_word (srca); - m68k_areg (regs, srcreg) = srca; -{ uae_s32 dst = m68k_dreg(regs, dstreg); - CLEAR_CZNV (®s->ccrflags); - if (src == 0) { - m68k_incpc (regs, 2); - Exception (5, regs, oldpc); - goto endlabel3224; - } else { - uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; - uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; - if (newv > 0xffff) { - SET_VFLG (®s->ccrflags, 1); - SET_NFLG (®s->ccrflags, 1); - } else { - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); - newv = (newv & 0xffff) | ((uae_u32)rem << 16); - m68k_dreg(regs, dstreg) = (newv); - } - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - m68k_incpc (regs, 2); - } -}}}}}endlabel3224: ; -return 116 * 256; -} -/* DIVU.W (d16,An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_80e8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{ uaecptr oldpc = m68k_getpc(regs); -{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3225; - } -{{ uae_s16 src = get_word (srca); -{ uae_s32 dst = m68k_dreg(regs, dstreg); - CLEAR_CZNV (®s->ccrflags); - if (src == 0) { - m68k_incpc (regs, 4); - Exception (5, regs, oldpc); - goto endlabel3225; - } else { - uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; - uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; - if (newv > 0xffff) { - SET_VFLG (®s->ccrflags, 1); - SET_NFLG (®s->ccrflags, 1); - } else { - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); - newv = (newv & 0xffff) | ((uae_u32)rem << 16); - m68k_dreg(regs, dstreg) = (newv); - } - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - m68k_incpc (regs, 4); - } -}}}}}endlabel3225: ; -return 118 * 256; -} -/* DIVU.W (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_80f0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{ uaecptr oldpc = m68k_getpc(regs); -{ uaecptr srca; - srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3226; - } -{{ uae_s16 src = get_word (srca); -{ uae_s32 dst = m68k_dreg(regs, dstreg); - CLEAR_CZNV (®s->ccrflags); - if (src == 0) { - m68k_incpc (regs, 4); - Exception (5, regs, oldpc); - goto endlabel3226; - } else { - uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; - uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; - if (newv > 0xffff) { - SET_VFLG (®s->ccrflags, 1); - SET_NFLG (®s->ccrflags, 1); - } else { - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); - newv = (newv & 0xffff) | ((uae_u32)rem << 16); - m68k_dreg(regs, dstreg) = (newv); - } - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - m68k_incpc (regs, 4); - } -}}}}}endlabel3226: ; -return 120 * 256; -} -/* DIVU.W (xxx).W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_80f8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{ uaecptr oldpc = m68k_getpc(regs); -{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3227; - } -{{ uae_s16 src = get_word (srca); -{ uae_s32 dst = m68k_dreg(regs, dstreg); - CLEAR_CZNV (®s->ccrflags); - if (src == 0) { - m68k_incpc (regs, 4); - Exception (5, regs, oldpc); - goto endlabel3227; - } else { - uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; - uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; - if (newv > 0xffff) { - SET_VFLG (®s->ccrflags, 1); - SET_NFLG (®s->ccrflags, 1); - } else { - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); - newv = (newv & 0xffff) | ((uae_u32)rem << 16); - m68k_dreg(regs, dstreg) = (newv); - } - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - m68k_incpc (regs, 4); - } -}}}}}endlabel3227: ; -return 118 * 256; -} -/* DIVU.W (xxx).L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_80f9_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{ uaecptr oldpc = m68k_getpc(regs); -{ uaecptr srca = get_long_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3228; - } -{{ uae_s16 src = get_word (srca); -{ uae_s32 dst = m68k_dreg(regs, dstreg); - CLEAR_CZNV (®s->ccrflags); - if (src == 0) { - m68k_incpc (regs, 6); - Exception (5, regs, oldpc); - goto endlabel3228; - } else { - uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; - uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; - if (newv > 0xffff) { - SET_VFLG (®s->ccrflags, 1); - SET_NFLG (®s->ccrflags, 1); - } else { - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); - newv = (newv & 0xffff) | ((uae_u32)rem << 16); - m68k_dreg(regs, dstreg) = (newv); - } - regs->ir = regs->irc; - get_word_prefetch (regs, 8); - m68k_incpc (regs, 6); - } -}}}}}endlabel3228: ; -return 122 * 256; -} -/* DIVU.W (d16,PC),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_80fa_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{ uaecptr oldpc = m68k_getpc(regs); -{ uaecptr srca = m68k_getpc (regs) + 2; - srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3229; - } -{{ uae_s16 src = get_word (srca); -{ uae_s32 dst = m68k_dreg(regs, dstreg); - CLEAR_CZNV (®s->ccrflags); - if (src == 0) { - m68k_incpc (regs, 4); - Exception (5, regs, oldpc); - goto endlabel3229; - } else { - uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; - uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; - if (newv > 0xffff) { - SET_VFLG (®s->ccrflags, 1); - SET_NFLG (®s->ccrflags, 1); - } else { - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); - newv = (newv & 0xffff) | ((uae_u32)rem << 16); - m68k_dreg(regs, dstreg) = (newv); - } - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - m68k_incpc (regs, 4); - } -}}}}}endlabel3229: ; -return 118 * 256; -} -/* DIVU.W (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_80fb_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{ uaecptr oldpc = m68k_getpc(regs); -{ uaecptr tmppc; - uaecptr srca; - tmppc = m68k_getpc(regs) + 2; - srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3230; - } -{{ uae_s16 src = get_word (srca); -{ uae_s32 dst = m68k_dreg(regs, dstreg); - CLEAR_CZNV (®s->ccrflags); - if (src == 0) { - m68k_incpc (regs, 4); - Exception (5, regs, oldpc); - goto endlabel3230; - } else { - uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; - uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; - if (newv > 0xffff) { - SET_VFLG (®s->ccrflags, 1); - SET_NFLG (®s->ccrflags, 1); - } else { - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); - newv = (newv & 0xffff) | ((uae_u32)rem << 16); - m68k_dreg(regs, dstreg) = (newv); - } - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - m68k_incpc (regs, 4); - } -}}}}}endlabel3230: ; -return 120 * 256; -} -/* DIVU.W #.W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_80fc_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{ uaecptr oldpc = m68k_getpc(regs); -{ uae_s16 src = get_word_prefetch (regs, 4); -{ uae_s32 dst = m68k_dreg(regs, dstreg); - CLEAR_CZNV (®s->ccrflags); - if (src == 0) { - m68k_incpc (regs, 4); - Exception (5, regs, oldpc); - goto endlabel3231; - } else { - uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; - uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; - if (newv > 0xffff) { - SET_VFLG (®s->ccrflags, 1); - SET_NFLG (®s->ccrflags, 1); - } else { - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); - newv = (newv & 0xffff) | ((uae_u32)rem << 16); - m68k_dreg(regs, dstreg) = (newv); - } - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - m68k_incpc (regs, 4); - } -}}}endlabel3231: ; -return 114 * 256; -} -/* SBCD.B Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_8100_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s8 src = m68k_dreg (regs, srcreg); -{ uae_s8 dst = m68k_dreg (regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG (®s->ccrflags) ? 1 : 0); - uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); - uae_u16 newv, tmp_newv; - int bcd = 0; - newv = tmp_newv = newv_hi + newv_lo; - if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; - if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG (®s->ccrflags) ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } - SET_CFLG (®s->ccrflags, (((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG (®s->ccrflags) ? 1 : 0)) & 0x300) > 0xFF); - COPY_CARRY (®s->ccrflags); - SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s8)(newv)) == 0)); - SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); - SET_VFLG (®s->ccrflags, (tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); - m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); -}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* SBCD.B -(An),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_8108_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca; - srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; -{ uae_s8 src = get_byte (srca); - m68k_areg (regs, srcreg) = srca; -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; -{ uae_s8 dst = get_byte (dsta); - m68k_areg (regs, dstreg) = dsta; - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG (®s->ccrflags) ? 1 : 0); - uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); - uae_u16 newv, tmp_newv; - int bcd = 0; - newv = tmp_newv = newv_hi + newv_lo; - if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; - if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG (®s->ccrflags) ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } - SET_CFLG (®s->ccrflags, (((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG (®s->ccrflags) ? 1 : 0)) & 0x300) > 0xFF); - COPY_CARRY (®s->ccrflags); - SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s8)(newv)) == 0)); - SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); - SET_VFLG (®s->ccrflags, (tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); - put_byte (dsta,newv); -}}}}}} m68k_incpc (regs, 2); -return 16 * 256; -} -/* OR.B Dn,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_8110_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s8 src = m68k_dreg (regs, srcreg); -{ uaecptr dsta = m68k_areg(regs, dstreg); -{ uae_s8 dst = get_byte (dsta); - src |= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - put_byte (dsta,src); -}}}} m68k_incpc (regs, 2); -return 12 * 256; -} -/* OR.B Dn,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_8118_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s8 src = m68k_dreg (regs, srcreg); -{ uaecptr dsta = m68k_areg(regs, dstreg); -{ uae_s8 dst = get_byte (dsta); - m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; - src |= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - put_byte (dsta,src); -}}}} m68k_incpc (regs, 2); -return 12 * 256; -} -/* OR.B Dn,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_8120_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s8 src = m68k_dreg (regs, srcreg); -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; -{ uae_s8 dst = get_byte (dsta); - m68k_areg (regs, dstreg) = dsta; - src |= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - put_byte (dsta,src); -}}}} m68k_incpc (regs, 2); -return 14 * 256; -} -/* OR.B Dn,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_8128_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s8 src = m68k_dreg (regs, srcreg); -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); -{ uae_s8 dst = get_byte (dsta); - src |= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - put_byte (dsta,src); -}}}} m68k_incpc (regs, 4); -return 16 * 256; -} -/* OR.B Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_8130_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s8 src = m68k_dreg (regs, srcreg); -{ uaecptr dsta; - dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); -{ uae_s8 dst = get_byte (dsta); - src |= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - put_byte (dsta,src); -}}}} m68k_incpc (regs, 4); -return 18 * 256; -} -/* OR.B Dn,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_8138_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); -{{ uae_s8 src = m68k_dreg (regs, srcreg); -{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); -{ uae_s8 dst = get_byte (dsta); - src |= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - put_byte (dsta,src); -}}}} m68k_incpc (regs, 4); -return 16 * 256; -} -/* OR.B Dn,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_8139_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); -{{ uae_s8 src = m68k_dreg (regs, srcreg); -{ uaecptr dsta = get_long_prefetch (regs, 4); -{ uae_s8 dst = get_byte (dsta); - src |= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 8); - put_byte (dsta,src); -}}}} m68k_incpc (regs, 6); -return 20 * 256; -} -/* OR.W Dn,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_8150_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s16 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3241; - } -{{ uae_s16 dst = get_word (dsta); - src |= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - put_word (dsta,src); -}}}}} m68k_incpc (regs, 2); -endlabel3241: ; -return 12 * 256; -} -/* OR.W Dn,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_8158_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s16 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3242; - } -{{ uae_s16 dst = get_word (dsta); - m68k_areg(regs, dstreg) += 2; - src |= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - put_word (dsta,src); -}}}}} m68k_incpc (regs, 2); -endlabel3242: ; -return 12 * 256; -} -/* OR.W Dn,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_8160_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s16 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - 2; - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3243; - } -{{ uae_s16 dst = get_word (dsta); - m68k_areg (regs, dstreg) = dsta; - src |= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - put_word (dsta,src); -}}}}} m68k_incpc (regs, 2); -endlabel3243: ; -return 14 * 256; -} -/* OR.W Dn,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_8168_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s16 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3244; - } -{{ uae_s16 dst = get_word (dsta); - src |= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - put_word (dsta,src); -}}}}} m68k_incpc (regs, 4); -endlabel3244: ; -return 16 * 256; -} -/* OR.W Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_8170_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s16 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta; - dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3245; - } -{{ uae_s16 dst = get_word (dsta); - src |= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - put_word (dsta,src); -}}}}} m68k_incpc (regs, 4); -endlabel3245: ; -return 18 * 256; -} -/* OR.W Dn,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_8178_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); -{{ uae_s16 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3246; - } -{{ uae_s16 dst = get_word (dsta); - src |= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - put_word (dsta,src); -}}}}} m68k_incpc (regs, 4); -endlabel3246: ; -return 16 * 256; -} -/* OR.W Dn,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_8179_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); -{{ uae_s16 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta = get_long_prefetch (regs, 4); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3247; - } -{{ uae_s16 dst = get_word (dsta); - src |= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 8); - put_word (dsta,src); -}}}}} m68k_incpc (regs, 6); -endlabel3247: ; -return 20 * 256; -} -/* OR.L Dn,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_8190_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s32 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3248; - } -{{ uae_s32 dst = get_long (dsta); - src |= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - put_long (dsta,src); -}}}}} m68k_incpc (regs, 2); -endlabel3248: ; -return 20 * 256; -} -/* OR.L Dn,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_8198_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s32 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3249; - } -{{ uae_s32 dst = get_long (dsta); - m68k_areg(regs, dstreg) += 4; - src |= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - put_long (dsta,src); -}}}}} m68k_incpc (regs, 2); -endlabel3249: ; -return 20 * 256; -} -/* OR.L Dn,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_81a0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s32 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - 4; - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3250; - } -{{ uae_s32 dst = get_long (dsta); - m68k_areg (regs, dstreg) = dsta; - src |= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - put_long (dsta,src); -}}}}} m68k_incpc (regs, 2); -endlabel3250: ; -return 22 * 256; -} -/* OR.L Dn,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_81a8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s32 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3251; - } -{{ uae_s32 dst = get_long (dsta); - src |= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - put_long (dsta,src); -}}}}} m68k_incpc (regs, 4); -endlabel3251: ; -return 24 * 256; -} -/* OR.L Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_81b0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s32 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta; - dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3252; - } -{{ uae_s32 dst = get_long (dsta); - src |= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - put_long (dsta,src); -}}}}} m68k_incpc (regs, 4); -endlabel3252: ; -return 26 * 256; -} -/* OR.L Dn,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_81b8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); -{{ uae_s32 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3253; - } -{{ uae_s32 dst = get_long (dsta); - src |= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - put_long (dsta,src); -}}}}} m68k_incpc (regs, 4); -endlabel3253: ; -return 24 * 256; -} -/* OR.L Dn,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_81b9_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); -{{ uae_s32 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta = get_long_prefetch (regs, 4); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3254; - } -{{ uae_s32 dst = get_long (dsta); - src |= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 8); - put_long (dsta,src); -}}}}} m68k_incpc (regs, 6); -endlabel3254: ; -return 28 * 256; -} -/* DIVS.W Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_81c0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_80c0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -22934,14 +22025,13 @@ unsigned long REGPARAM2 CPUFUNC(op_81c0_5)(uae_u32 opcode, struct regstruct *reg Exception (5, regs, oldpc); goto endlabel3255; } else { - uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; - uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; - if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { SET_VFLG (®s->ccrflags, 1); SET_NFLG (®s->ccrflags, 1); } else { - if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; - CLEAR_CZNV (®s->ccrflags); + CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); @@ -22952,10 +22042,10 @@ unsigned long REGPARAM2 CPUFUNC(op_81c0_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 2); } }}}endlabel3255: ; -return 142 * 256; +return 110 * CYCLE_UNIT / 2; } -/* DIVS.W (An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_81d0_5)(uae_u32 opcode, struct regstruct *regs) +/* DIVU.W (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -22973,14 +22063,13 @@ unsigned long REGPARAM2 CPUFUNC(op_81d0_5)(uae_u32 opcode, struct regstruct *reg Exception (5, regs, oldpc); goto endlabel3256; } else { - uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; - uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; - if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { SET_VFLG (®s->ccrflags, 1); SET_NFLG (®s->ccrflags, 1); } else { - if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; - CLEAR_CZNV (®s->ccrflags); + CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); @@ -22991,10 +22080,10 @@ unsigned long REGPARAM2 CPUFUNC(op_81d0_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 2); } }}}}}endlabel3256: ; -return 146 * 256; +return 114 * CYCLE_UNIT / 2; } -/* DIVS.W (An)+,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_81d8_5)(uae_u32 opcode, struct regstruct *regs) +/* DIVU.W (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23013,14 +22102,13 @@ unsigned long REGPARAM2 CPUFUNC(op_81d8_5)(uae_u32 opcode, struct regstruct *reg Exception (5, regs, oldpc); goto endlabel3257; } else { - uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; - uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; - if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { SET_VFLG (®s->ccrflags, 1); SET_NFLG (®s->ccrflags, 1); } else { - if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; - CLEAR_CZNV (®s->ccrflags); + CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); @@ -23031,10 +22119,10 @@ unsigned long REGPARAM2 CPUFUNC(op_81d8_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 2); } }}}}}endlabel3257: ; -return 146 * 256; +return 114 * CYCLE_UNIT / 2; } -/* DIVS.W -(An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_81e0_5)(uae_u32 opcode, struct regstruct *regs) +/* DIVU.W -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23054,14 +22142,13 @@ unsigned long REGPARAM2 CPUFUNC(op_81e0_5)(uae_u32 opcode, struct regstruct *reg Exception (5, regs, oldpc); goto endlabel3258; } else { - uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; - uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; - if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { SET_VFLG (®s->ccrflags, 1); SET_NFLG (®s->ccrflags, 1); } else { - if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; - CLEAR_CZNV (®s->ccrflags); + CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); @@ -23072,10 +22159,10 @@ unsigned long REGPARAM2 CPUFUNC(op_81e0_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 2); } }}}}}endlabel3258: ; -return 148 * 256; +return 116 * CYCLE_UNIT / 2; } -/* DIVS.W (d16,An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_81e8_5)(uae_u32 opcode, struct regstruct *regs) +/* DIVU.W (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23093,14 +22180,13 @@ unsigned long REGPARAM2 CPUFUNC(op_81e8_5)(uae_u32 opcode, struct regstruct *reg Exception (5, regs, oldpc); goto endlabel3259; } else { - uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; - uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; - if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { SET_VFLG (®s->ccrflags, 1); SET_NFLG (®s->ccrflags, 1); } else { - if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; - CLEAR_CZNV (®s->ccrflags); + CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); @@ -23111,10 +22197,10 @@ unsigned long REGPARAM2 CPUFUNC(op_81e8_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); } }}}}}endlabel3259: ; -return 150 * 256; +return 118 * CYCLE_UNIT / 2; } -/* DIVS.W (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_81f0_5)(uae_u32 opcode, struct regstruct *regs) +/* DIVU.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23133,14 +22219,13 @@ unsigned long REGPARAM2 CPUFUNC(op_81f0_5)(uae_u32 opcode, struct regstruct *reg Exception (5, regs, oldpc); goto endlabel3260; } else { - uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; - uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; - if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { SET_VFLG (®s->ccrflags, 1); SET_NFLG (®s->ccrflags, 1); } else { - if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; - CLEAR_CZNV (®s->ccrflags); + CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); @@ -23151,10 +22236,10 @@ unsigned long REGPARAM2 CPUFUNC(op_81f0_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); } }}}}}endlabel3260: ; -return 152 * 256; +return 120 * CYCLE_UNIT / 2; } -/* DIVS.W (xxx).W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_81f8_5)(uae_u32 opcode, struct regstruct *regs) +/* DIVU.W (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80f8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; { uaecptr oldpc = m68k_getpc(regs); @@ -23171,14 +22256,13 @@ unsigned long REGPARAM2 CPUFUNC(op_81f8_5)(uae_u32 opcode, struct regstruct *reg Exception (5, regs, oldpc); goto endlabel3261; } else { - uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; - uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; - if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { SET_VFLG (®s->ccrflags, 1); SET_NFLG (®s->ccrflags, 1); } else { - if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; - CLEAR_CZNV (®s->ccrflags); + CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); @@ -23189,10 +22273,10 @@ unsigned long REGPARAM2 CPUFUNC(op_81f8_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); } }}}}}endlabel3261: ; -return 150 * 256; +return 118 * CYCLE_UNIT / 2; } -/* DIVS.W (xxx).L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_81f9_5)(uae_u32 opcode, struct regstruct *regs) +/* DIVU.W (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80f9_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; { uaecptr oldpc = m68k_getpc(regs); @@ -23209,14 +22293,13 @@ unsigned long REGPARAM2 CPUFUNC(op_81f9_5)(uae_u32 opcode, struct regstruct *reg Exception (5, regs, oldpc); goto endlabel3262; } else { - uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; - uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; - if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { SET_VFLG (®s->ccrflags, 1); SET_NFLG (®s->ccrflags, 1); } else { - if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; - CLEAR_CZNV (®s->ccrflags); + CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); @@ -23227,10 +22310,10 @@ unsigned long REGPARAM2 CPUFUNC(op_81f9_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 6); } }}}}}endlabel3262: ; -return 154 * 256; +return 122 * CYCLE_UNIT / 2; } -/* DIVS.W (d16,PC),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_81fa_5)(uae_u32 opcode, struct regstruct *regs) +/* DIVU.W (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80fa_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; { uaecptr oldpc = m68k_getpc(regs); @@ -23248,14 +22331,13 @@ unsigned long REGPARAM2 CPUFUNC(op_81fa_5)(uae_u32 opcode, struct regstruct *reg Exception (5, regs, oldpc); goto endlabel3263; } else { - uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; - uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; - if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { SET_VFLG (®s->ccrflags, 1); SET_NFLG (®s->ccrflags, 1); } else { - if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; - CLEAR_CZNV (®s->ccrflags); + CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); @@ -23266,10 +22348,10 @@ unsigned long REGPARAM2 CPUFUNC(op_81fa_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); } }}}}}endlabel3263: ; -return 150 * 256; +return 118 * CYCLE_UNIT / 2; } -/* DIVS.W (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_81fb_5)(uae_u32 opcode, struct regstruct *regs) +/* DIVU.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80fb_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; { uaecptr oldpc = m68k_getpc(regs); @@ -23288,6 +22370,581 @@ unsigned long REGPARAM2 CPUFUNC(op_81fb_5)(uae_u32 opcode, struct regstruct *reg m68k_incpc (regs, 4); Exception (5, regs, oldpc); goto endlabel3264; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}}}endlabel3264: ; +return 120 * CYCLE_UNIT / 2; +} +/* DIVU.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_80fc_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc(regs); +{ uae_s16 src = get_word_prefetch (regs, 4); +{ uae_s32 dst = m68k_dreg(regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel3265; + } else { + uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; + uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; + if (newv > 0xffff) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}endlabel3265: ; +return 114 * CYCLE_UNIT / 2; +} +/* SBCD.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_8100_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG (®s->ccrflags) ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; + if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; + if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG (®s->ccrflags) ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG (®s->ccrflags, (((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG (®s->ccrflags) ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s8)(newv)) == 0)); + SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); + SET_VFLG (®s->ccrflags, (tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); +}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* SBCD.B -(An),-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_8108_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG (®s->ccrflags) ? 1 : 0); + uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); + uae_u16 newv, tmp_newv; + int bcd = 0; + newv = tmp_newv = newv_hi + newv_lo; + if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; + if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG (®s->ccrflags) ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } + SET_CFLG (®s->ccrflags, (((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG (®s->ccrflags) ? 1 : 0)) & 0x300) > 0xFF); + COPY_CARRY (®s->ccrflags); + SET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (((uae_s8)(newv)) == 0)); + SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); + SET_VFLG (®s->ccrflags, (tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); + put_byte (dsta,newv); +}}}}}} m68k_incpc (regs, 2); +return 16 * CYCLE_UNIT / 2; +} +/* OR.B Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_8110_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg(regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + src |= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 2); +return 12 * CYCLE_UNIT / 2; +} +/* OR.B Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_8118_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg(regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src |= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 2); +return 12 * CYCLE_UNIT / 2; +} +/* OR.B Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_8120_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 2); +return 14 * CYCLE_UNIT / 2; +} +/* OR.B Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_8128_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src |= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return 16 * CYCLE_UNIT / 2; +} +/* OR.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_8130_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); +{ uae_s8 dst = get_byte (dsta); + src |= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return 18 * CYCLE_UNIT / 2; +} +/* OR.B Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_8138_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src |= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return 16 * CYCLE_UNIT / 2; +} +/* OR.B Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_8139_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src |= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 6); +return 20 * CYCLE_UNIT / 2; +} +/* OR.W Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_8150_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3275; + } +{{ uae_s16 dst = get_word (dsta); + src |= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel3275: ; +return 12 * CYCLE_UNIT / 2; +} +/* OR.W Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_8158_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3276; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg(regs, dstreg) += 2; + src |= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel3276: ; +return 12 * CYCLE_UNIT / 2; +} +/* OR.W Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_8160_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3277; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel3277: ; +return 14 * CYCLE_UNIT / 2; +} +/* OR.W Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_8168_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3278; + } +{{ uae_s16 dst = get_word (dsta); + src |= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3278: ; +return 16 * CYCLE_UNIT / 2; +} +/* OR.W Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_8170_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3279; + } +{{ uae_s16 dst = get_word (dsta); + src |= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3279: ; +return 18 * CYCLE_UNIT / 2; +} +/* OR.W Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_8178_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3280; + } +{{ uae_s16 dst = get_word (dsta); + src |= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3280: ; +return 16 * CYCLE_UNIT / 2; +} +/* OR.W Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_8179_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3281; + } +{{ uae_s16 dst = get_word (dsta); + src |= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel3281: ; +return 20 * CYCLE_UNIT / 2; +} +/* OR.L Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_8190_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3282; + } +{{ uae_s32 dst = get_long (dsta); + src |= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel3282: ; +return 20 * CYCLE_UNIT / 2; +} +/* OR.L Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_8198_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3283; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg(regs, dstreg) += 4; + src |= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel3283: ; +return 20 * CYCLE_UNIT / 2; +} +/* OR.L Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_81a0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3284; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; + src |= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel3284: ; +return 22 * CYCLE_UNIT / 2; +} +/* OR.L Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_81a8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3285; + } +{{ uae_s32 dst = get_long (dsta); + src |= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3285: ; +return 24 * CYCLE_UNIT / 2; +} +/* OR.L Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_81b0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3286; + } +{{ uae_s32 dst = get_long (dsta); + src |= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3286: ; +return 26 * CYCLE_UNIT / 2; +} +/* OR.L Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_81b8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3287; + } +{{ uae_s32 dst = get_long (dsta); + src |= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3287: ; +return 24 * CYCLE_UNIT / 2; +} +/* OR.L Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_81b9_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3288; + } +{{ uae_s32 dst = get_long (dsta); + src |= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel3288: ; +return 28 * CYCLE_UNIT / 2; +} +/* DIVS.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81c0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc(regs); +{ uae_s16 src = m68k_dreg(regs, srcreg); +{ uae_s32 dst = m68k_dreg(regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 2); + Exception (5, regs, oldpc); + goto endlabel3289; } else { uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; @@ -23303,24 +22960,150 @@ unsigned long REGPARAM2 CPUFUNC(op_81fb_5)(uae_u32 opcode, struct regstruct *reg m68k_dreg(regs, dstreg) = (newv); } regs->ir = regs->irc; - get_word_prefetch (regs, 6); - m68k_incpc (regs, 4); + get_word_prefetch (regs, 4); + m68k_incpc (regs, 2); } -}}}}}endlabel3264: ; -return 152 * 256; +}}}endlabel3289: ; +return 142 * CYCLE_UNIT / 2; } -/* DIVS.W #.W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_81fc_5)(uae_u32 opcode, struct regstruct *regs) +/* DIVS.W (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81d0_11)(uae_u32 opcode, struct regstruct *regs) { + uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; { uaecptr oldpc = m68k_getpc(regs); -{ uae_s16 src = get_word_prefetch (regs, 4); +{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3290; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg(regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 2); + Exception (5, regs, oldpc); + goto endlabel3290; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_incpc (regs, 2); + } +}}}}}endlabel3290: ; +return 146 * CYCLE_UNIT / 2; +} +/* DIVS.W (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81d8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc(regs); +{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3291; + } +{{ uae_s16 src = get_word (srca); + m68k_areg(regs, srcreg) += 2; +{ uae_s32 dst = m68k_dreg(regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 2); + Exception (5, regs, oldpc); + goto endlabel3291; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_incpc (regs, 2); + } +}}}}}endlabel3291: ; +return 146 * CYCLE_UNIT / 2; +} +/* DIVS.W -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81e0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc(regs); +{ uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3292; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_dreg(regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 2); + Exception (5, regs, oldpc); + goto endlabel3292; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_incpc (regs, 2); + } +}}}}}endlabel3292: ; +return 148 * CYCLE_UNIT / 2; +} +/* DIVS.W (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81e8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc(regs); +{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3293; + } +{{ uae_s16 src = get_word (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); CLEAR_CZNV (®s->ccrflags); if (src == 0) { m68k_incpc (regs, 4); Exception (5, regs, oldpc); - goto endlabel3265; + goto endlabel3293; } else { uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; @@ -23339,11 +23122,240 @@ unsigned long REGPARAM2 CPUFUNC(op_81fc_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_incpc (regs, 4); } -}}}endlabel3265: ; -return 146 * 256; +}}}}}endlabel3293: ; +return 150 * CYCLE_UNIT / 2; +} +/* DIVS.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81f0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc(regs); +{ uaecptr srca; + srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3294; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg(regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel3294; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}}}endlabel3294: ; +return 152 * CYCLE_UNIT / 2; +} +/* DIVS.W (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81f8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc(regs); +{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3295; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg(regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel3295; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}}}endlabel3295: ; +return 150 * CYCLE_UNIT / 2; +} +/* DIVS.W (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81f9_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc(regs); +{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3296; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg(regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 6); + Exception (5, regs, oldpc); + goto endlabel3296; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + m68k_incpc (regs, 6); + } +}}}}}endlabel3296: ; +return 154 * CYCLE_UNIT / 2; +} +/* DIVS.W (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81fa_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc(regs); +{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3297; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg(regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel3297; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}}}endlabel3297: ; +return 150 * CYCLE_UNIT / 2; +} +/* DIVS.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81fb_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc(regs); +{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc(regs) + 2; + srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3298; + } +{{ uae_s16 src = get_word (srca); +{ uae_s32 dst = m68k_dreg(regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel3298; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}}}endlabel3298: ; +return 152 * CYCLE_UNIT / 2; +} +/* DIVS.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_81fc_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{ uaecptr oldpc = m68k_getpc(regs); +{ uae_s16 src = get_word_prefetch (regs, 4); +{ uae_s32 dst = m68k_dreg(regs, dstreg); + CLEAR_CZNV (®s->ccrflags); + if (src == 0) { + m68k_incpc (regs, 4); + Exception (5, regs, oldpc); + goto endlabel3299; + } else { + uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; + uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; + if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { + SET_VFLG (®s->ccrflags, 1); + SET_NFLG (®s->ccrflags, 1); + } else { + if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); + newv = (newv & 0xffff) | ((uae_u32)rem << 16); + m68k_dreg(regs, dstreg) = (newv); + } + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + m68k_incpc (regs, 4); + } +}}}endlabel3299: ; +return 146 * CYCLE_UNIT / 2; } /* SUB.B Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_9000_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9000_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23362,10 +23374,10 @@ unsigned long REGPARAM2 CPUFUNC(op_9000_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUB.B (An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_9010_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9010_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23385,10 +23397,10 @@ unsigned long REGPARAM2 CPUFUNC(op_9010_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* SUB.B (An)+,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_9018_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9018_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23409,10 +23421,10 @@ unsigned long REGPARAM2 CPUFUNC(op_9018_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* SUB.B -(An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_9020_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9020_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23434,10 +23446,10 @@ unsigned long REGPARAM2 CPUFUNC(op_9020_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* SUB.B (d16,An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_9028_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9028_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23457,10 +23469,10 @@ unsigned long REGPARAM2 CPUFUNC(op_9028_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUB.B (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_9030_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9030_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23481,10 +23493,10 @@ unsigned long REGPARAM2 CPUFUNC(op_9030_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* SUB.B (xxx).W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_9038_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9038_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -23503,10 +23515,10 @@ unsigned long REGPARAM2 CPUFUNC(op_9038_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUB.B (xxx).L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_9039_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9039_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); @@ -23525,10 +23537,10 @@ unsigned long REGPARAM2 CPUFUNC(op_9039_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* SUB.B (d16,PC),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_903a_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_903a_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; @@ -23548,10 +23560,10 @@ unsigned long REGPARAM2 CPUFUNC(op_903a_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUB.B (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_903b_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_903b_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -23573,10 +23585,10 @@ unsigned long REGPARAM2 CPUFUNC(op_903b_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* SUB.B #.B,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_903c_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_903c_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -23594,10 +23606,10 @@ unsigned long REGPARAM2 CPUFUNC(op_903c_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUB.W Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_9040_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9040_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23616,10 +23628,10 @@ unsigned long REGPARAM2 CPUFUNC(op_9040_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUB.W An,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_9048_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9048_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23638,17 +23650,17 @@ unsigned long REGPARAM2 CPUFUNC(op_9048_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUB.W (An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_9050_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9050_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3279; + goto endlabel3313; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -23665,18 +23677,18 @@ unsigned long REGPARAM2 CPUFUNC(op_9050_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}} m68k_incpc (regs, 2); -endlabel3279: ; -return 8 * 256; +endlabel3313: ; +return 8 * CYCLE_UNIT / 2; } /* SUB.W (An)+,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_9058_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9058_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3280; + goto endlabel3314; } {{ uae_s16 src = get_word (srca); m68k_areg(regs, srcreg) += 2; @@ -23694,11 +23706,11 @@ unsigned long REGPARAM2 CPUFUNC(op_9058_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}} m68k_incpc (regs, 2); -endlabel3280: ; -return 8 * 256; +endlabel3314: ; +return 8 * CYCLE_UNIT / 2; } /* SUB.W -(An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_9060_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9060_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23706,7 +23718,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9060_5)(uae_u32 opcode, struct regstruct *reg srca = m68k_areg(regs, srcreg) - 2; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3281; + goto endlabel3315; } {{ uae_s16 src = get_word (srca); m68k_areg (regs, srcreg) = srca; @@ -23724,18 +23736,18 @@ unsigned long REGPARAM2 CPUFUNC(op_9060_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}} m68k_incpc (regs, 2); -endlabel3281: ; -return 10 * 256; +endlabel3315: ; +return 10 * CYCLE_UNIT / 2; } /* SUB.W (d16,An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_9068_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9068_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3282; + goto endlabel3316; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -23752,11 +23764,11 @@ unsigned long REGPARAM2 CPUFUNC(op_9068_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}} m68k_incpc (regs, 4); -endlabel3282: ; -return 12 * 256; +endlabel3316: ; +return 12 * CYCLE_UNIT / 2; } /* SUB.W (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_9070_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9070_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23764,7 +23776,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9070_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3283; + goto endlabel3317; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -23781,17 +23793,17 @@ unsigned long REGPARAM2 CPUFUNC(op_9070_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}} m68k_incpc (regs, 4); -endlabel3283: ; -return 14 * 256; +endlabel3317: ; +return 14 * CYCLE_UNIT / 2; } /* SUB.W (xxx).W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_9078_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9078_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3284; + goto endlabel3318; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -23808,17 +23820,17 @@ unsigned long REGPARAM2 CPUFUNC(op_9078_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}} m68k_incpc (regs, 4); -endlabel3284: ; -return 12 * 256; +endlabel3318: ; +return 12 * CYCLE_UNIT / 2; } /* SUB.W (xxx).L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_9079_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9079_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3285; + goto endlabel3319; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -23835,18 +23847,18 @@ unsigned long REGPARAM2 CPUFUNC(op_9079_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}} m68k_incpc (regs, 6); -endlabel3285: ; -return 16 * 256; +endlabel3319: ; +return 16 * CYCLE_UNIT / 2; } /* SUB.W (d16,PC),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_907a_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_907a_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3286; + goto endlabel3320; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -23863,11 +23875,11 @@ unsigned long REGPARAM2 CPUFUNC(op_907a_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}} m68k_incpc (regs, 4); -endlabel3286: ; -return 12 * 256; +endlabel3320: ; +return 12 * CYCLE_UNIT / 2; } /* SUB.W (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_907b_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_907b_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -23876,7 +23888,7 @@ unsigned long REGPARAM2 CPUFUNC(op_907b_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3287; + goto endlabel3321; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -23893,11 +23905,11 @@ unsigned long REGPARAM2 CPUFUNC(op_907b_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}} m68k_incpc (regs, 4); -endlabel3287: ; -return 14 * 256; +endlabel3321: ; +return 14 * CYCLE_UNIT / 2; } /* SUB.W #.W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_907c_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_907c_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -23915,10 +23927,10 @@ unsigned long REGPARAM2 CPUFUNC(op_907c_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* SUB.L Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_9080_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9080_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23937,10 +23949,10 @@ unsigned long REGPARAM2 CPUFUNC(op_9080_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUB.L An,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_9088_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9088_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23959,17 +23971,17 @@ unsigned long REGPARAM2 CPUFUNC(op_9088_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUB.L (An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_9090_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9090_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3291; + goto endlabel3325; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -23986,18 +23998,18 @@ unsigned long REGPARAM2 CPUFUNC(op_9090_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}} m68k_incpc (regs, 2); -endlabel3291: ; -return 12 * 256; +endlabel3325: ; +return 12 * CYCLE_UNIT / 2; } /* SUB.L (An)+,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_9098_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9098_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3292; + goto endlabel3326; } {{ uae_s32 src = get_long (srca); m68k_areg(regs, srcreg) += 4; @@ -24015,11 +24027,11 @@ unsigned long REGPARAM2 CPUFUNC(op_9098_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}} m68k_incpc (regs, 2); -endlabel3292: ; -return 12 * 256; +endlabel3326: ; +return 12 * CYCLE_UNIT / 2; } /* SUB.L -(An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_90a0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_90a0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -24027,7 +24039,7 @@ unsigned long REGPARAM2 CPUFUNC(op_90a0_5)(uae_u32 opcode, struct regstruct *reg srca = m68k_areg(regs, srcreg) - 4; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3293; + goto endlabel3327; } {{ uae_s32 src = get_long (srca); m68k_areg (regs, srcreg) = srca; @@ -24045,18 +24057,18 @@ unsigned long REGPARAM2 CPUFUNC(op_90a0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}} m68k_incpc (regs, 2); -endlabel3293: ; -return 14 * 256; +endlabel3327: ; +return 14 * CYCLE_UNIT / 2; } /* SUB.L (d16,An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_90a8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_90a8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3294; + goto endlabel3328; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -24073,11 +24085,11 @@ unsigned long REGPARAM2 CPUFUNC(op_90a8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel3294: ; -return 16 * 256; +endlabel3328: ; +return 16 * CYCLE_UNIT / 2; } /* SUB.L (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_90b0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_90b0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -24085,7 +24097,7 @@ unsigned long REGPARAM2 CPUFUNC(op_90b0_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3295; + goto endlabel3329; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -24102,17 +24114,17 @@ unsigned long REGPARAM2 CPUFUNC(op_90b0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel3295: ; -return 18 * 256; +endlabel3329: ; +return 18 * CYCLE_UNIT / 2; } /* SUB.L (xxx).W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_90b8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_90b8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3296; + goto endlabel3330; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -24129,17 +24141,17 @@ unsigned long REGPARAM2 CPUFUNC(op_90b8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel3296: ; -return 16 * 256; +endlabel3330: ; +return 16 * CYCLE_UNIT / 2; } /* SUB.L (xxx).L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_90b9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_90b9_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3297; + goto endlabel3331; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -24156,18 +24168,18 @@ unsigned long REGPARAM2 CPUFUNC(op_90b9_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}} m68k_incpc (regs, 6); -endlabel3297: ; -return 20 * 256; +endlabel3331: ; +return 20 * CYCLE_UNIT / 2; } /* SUB.L (d16,PC),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_90ba_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_90ba_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3298; + goto endlabel3332; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -24184,11 +24196,11 @@ unsigned long REGPARAM2 CPUFUNC(op_90ba_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel3298: ; -return 16 * 256; +endlabel3332: ; +return 16 * CYCLE_UNIT / 2; } /* SUB.L (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_90bb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_90bb_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -24197,7 +24209,7 @@ unsigned long REGPARAM2 CPUFUNC(op_90bb_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3299; + goto endlabel3333; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -24214,11 +24226,11 @@ unsigned long REGPARAM2 CPUFUNC(op_90bb_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel3299: ; -return 18 * 256; +endlabel3333: ; +return 18 * CYCLE_UNIT / 2; } /* SUB.L #.L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_90bc_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_90bc_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); @@ -24236,10 +24248,10 @@ unsigned long REGPARAM2 CPUFUNC(op_90bc_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUBA.W Dn,An */ -unsigned long REGPARAM2 CPUFUNC(op_90c0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_90c0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -24250,10 +24262,10 @@ unsigned long REGPARAM2 CPUFUNC(op_90c0_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUBA.W An,An */ -unsigned long REGPARAM2 CPUFUNC(op_90c8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_90c8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -24264,17 +24276,17 @@ unsigned long REGPARAM2 CPUFUNC(op_90c8_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUBA.W (An),An */ -unsigned long REGPARAM2 CPUFUNC(op_90d0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_90d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3303; + goto endlabel3337; } {{ uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -24283,18 +24295,18 @@ unsigned long REGPARAM2 CPUFUNC(op_90d0_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 2); -endlabel3303: ; -return 8 * 256; +endlabel3337: ; +return 8 * CYCLE_UNIT / 2; } /* SUBA.W (An)+,An */ -unsigned long REGPARAM2 CPUFUNC(op_90d8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_90d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3304; + goto endlabel3338; } {{ uae_s16 src = get_word (srca); m68k_areg(regs, srcreg) += 2; @@ -24304,11 +24316,11 @@ unsigned long REGPARAM2 CPUFUNC(op_90d8_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 2); -endlabel3304: ; -return 8 * 256; +endlabel3338: ; +return 8 * CYCLE_UNIT / 2; } /* SUBA.W -(An),An */ -unsigned long REGPARAM2 CPUFUNC(op_90e0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_90e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -24316,7 +24328,7 @@ unsigned long REGPARAM2 CPUFUNC(op_90e0_5)(uae_u32 opcode, struct regstruct *reg srca = m68k_areg(regs, srcreg) - 2; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3305; + goto endlabel3339; } {{ uae_s16 src = get_word (srca); m68k_areg (regs, srcreg) = srca; @@ -24326,18 +24338,18 @@ unsigned long REGPARAM2 CPUFUNC(op_90e0_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 2); -endlabel3305: ; -return 10 * 256; +endlabel3339: ; +return 10 * CYCLE_UNIT / 2; } /* SUBA.W (d16,An),An */ -unsigned long REGPARAM2 CPUFUNC(op_90e8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_90e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3306; + goto endlabel3340; } {{ uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -24346,11 +24358,11 @@ unsigned long REGPARAM2 CPUFUNC(op_90e8_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 4); -endlabel3306: ; -return 12 * 256; +endlabel3340: ; +return 12 * CYCLE_UNIT / 2; } /* SUBA.W (d8,An,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_90f0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_90f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -24358,7 +24370,7 @@ unsigned long REGPARAM2 CPUFUNC(op_90f0_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3307; + goto endlabel3341; } {{ uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -24367,17 +24379,17 @@ unsigned long REGPARAM2 CPUFUNC(op_90f0_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 4); -endlabel3307: ; -return 14 * 256; +endlabel3341: ; +return 14 * CYCLE_UNIT / 2; } /* SUBA.W (xxx).W,An */ -unsigned long REGPARAM2 CPUFUNC(op_90f8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_90f8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3308; + goto endlabel3342; } {{ uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -24386,17 +24398,17 @@ unsigned long REGPARAM2 CPUFUNC(op_90f8_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 4); -endlabel3308: ; -return 12 * 256; +endlabel3342: ; +return 12 * CYCLE_UNIT / 2; } /* SUBA.W (xxx).L,An */ -unsigned long REGPARAM2 CPUFUNC(op_90f9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_90f9_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3309; + goto endlabel3343; } {{ uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -24405,18 +24417,18 @@ unsigned long REGPARAM2 CPUFUNC(op_90f9_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 6); -endlabel3309: ; -return 16 * 256; +endlabel3343: ; +return 16 * CYCLE_UNIT / 2; } /* SUBA.W (d16,PC),An */ -unsigned long REGPARAM2 CPUFUNC(op_90fa_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_90fa_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3310; + goto endlabel3344; } {{ uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -24425,11 +24437,11 @@ unsigned long REGPARAM2 CPUFUNC(op_90fa_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 4); -endlabel3310: ; -return 12 * 256; +endlabel3344: ; +return 12 * CYCLE_UNIT / 2; } /* SUBA.W (d8,PC,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_90fb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_90fb_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -24438,7 +24450,7 @@ unsigned long REGPARAM2 CPUFUNC(op_90fb_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3311; + goto endlabel3345; } {{ uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -24447,11 +24459,11 @@ unsigned long REGPARAM2 CPUFUNC(op_90fb_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 4); -endlabel3311: ; -return 14 * 256; +endlabel3345: ; +return 14 * CYCLE_UNIT / 2; } /* SUBA.W #.W,An */ -unsigned long REGPARAM2 CPUFUNC(op_90fc_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_90fc_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -24461,10 +24473,10 @@ unsigned long REGPARAM2 CPUFUNC(op_90fc_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* SUBX.B Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_9100_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9100_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -24483,10 +24495,10 @@ unsigned long REGPARAM2 CPUFUNC(op_9100_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUBX.B -(An),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_9108_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9108_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -24511,10 +24523,10 @@ unsigned long REGPARAM2 CPUFUNC(op_9108_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* SUB.B Dn,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_9110_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9110_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -24534,10 +24546,10 @@ unsigned long REGPARAM2 CPUFUNC(op_9110_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUB.B Dn,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_9118_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9118_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -24558,10 +24570,10 @@ unsigned long REGPARAM2 CPUFUNC(op_9118_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* SUB.B Dn,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_9120_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9120_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -24583,10 +24595,10 @@ unsigned long REGPARAM2 CPUFUNC(op_9120_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* SUB.B Dn,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_9128_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9128_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -24606,10 +24618,10 @@ unsigned long REGPARAM2 CPUFUNC(op_9128_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* SUB.B Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_9130_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9130_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -24630,10 +24642,10 @@ unsigned long REGPARAM2 CPUFUNC(op_9130_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* SUB.B Dn,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_9138_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9138_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -24652,10 +24664,10 @@ unsigned long REGPARAM2 CPUFUNC(op_9138_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* SUB.B Dn,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_9139_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9139_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -24674,10 +24686,10 @@ unsigned long REGPARAM2 CPUFUNC(op_9139_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* SUBX.W Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_9140_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9140_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -24696,10 +24708,10 @@ unsigned long REGPARAM2 CPUFUNC(op_9140_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUBX.W -(An),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_9148_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9148_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -24707,7 +24719,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9148_5)(uae_u32 opcode, struct regstruct *reg srca = m68k_areg(regs, srcreg) - 2; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3323; + goto endlabel3357; } {{ uae_s16 src = get_word (srca); m68k_areg (regs, srcreg) = srca; @@ -24715,7 +24727,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9148_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, dstreg) - 2; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3323; + goto endlabel3357; } {{ uae_s16 dst = get_word (dsta); m68k_areg (regs, dstreg) = dsta; @@ -24732,11 +24744,11 @@ unsigned long REGPARAM2 CPUFUNC(op_9148_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); put_word (dsta,newv); }}}}}}}}} m68k_incpc (regs, 2); -endlabel3323: ; -return 16 * 256; +endlabel3357: ; +return 16 * CYCLE_UNIT / 2; } /* SUB.W Dn,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_9150_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9150_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -24744,7 +24756,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9150_5)(uae_u32 opcode, struct regstruct *reg { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3324; + goto endlabel3358; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -24760,11 +24772,11 @@ unsigned long REGPARAM2 CPUFUNC(op_9150_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 2); -endlabel3324: ; -return 12 * 256; +endlabel3358: ; +return 12 * CYCLE_UNIT / 2; } /* SUB.W Dn,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_9158_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9158_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -24772,7 +24784,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9158_5)(uae_u32 opcode, struct regstruct *reg { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3325; + goto endlabel3359; } {{ uae_s16 dst = get_word (dsta); m68k_areg(regs, dstreg) += 2; @@ -24789,11 +24801,11 @@ unsigned long REGPARAM2 CPUFUNC(op_9158_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 2); -endlabel3325: ; -return 12 * 256; +endlabel3359: ; +return 12 * CYCLE_UNIT / 2; } /* SUB.W Dn,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_9160_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9160_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -24802,7 +24814,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9160_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, dstreg) - 2; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3326; + goto endlabel3360; } {{ uae_s16 dst = get_word (dsta); m68k_areg (regs, dstreg) = dsta; @@ -24819,11 +24831,11 @@ unsigned long REGPARAM2 CPUFUNC(op_9160_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 2); -endlabel3326: ; -return 14 * 256; +endlabel3360: ; +return 14 * CYCLE_UNIT / 2; } /* SUB.W Dn,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_9168_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9168_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -24831,7 +24843,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9168_5)(uae_u32 opcode, struct regstruct *reg { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3327; + goto endlabel3361; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -24847,11 +24859,11 @@ unsigned long REGPARAM2 CPUFUNC(op_9168_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel3327: ; -return 16 * 256; +endlabel3361: ; +return 16 * CYCLE_UNIT / 2; } /* SUB.W Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_9170_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9170_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -24860,7 +24872,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9170_5)(uae_u32 opcode, struct regstruct *reg dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3328; + goto endlabel3362; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -24876,18 +24888,18 @@ unsigned long REGPARAM2 CPUFUNC(op_9170_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel3328: ; -return 18 * 256; +endlabel3362: ; +return 18 * CYCLE_UNIT / 2; } /* SUB.W Dn,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_9178_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9178_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3329; + goto endlabel3363; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -24903,18 +24915,18 @@ unsigned long REGPARAM2 CPUFUNC(op_9178_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel3329: ; -return 16 * 256; +endlabel3363: ; +return 16 * CYCLE_UNIT / 2; } /* SUB.W Dn,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_9179_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9179_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_long_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3330; + goto endlabel3364; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -24930,11 +24942,11 @@ unsigned long REGPARAM2 CPUFUNC(op_9179_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 6); -endlabel3330: ; -return 20 * 256; +endlabel3364: ; +return 20 * CYCLE_UNIT / 2; } /* SUBX.L Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_9180_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9180_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -24953,10 +24965,10 @@ unsigned long REGPARAM2 CPUFUNC(op_9180_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUBX.L -(An),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_9188_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9188_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -24964,7 +24976,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9188_5)(uae_u32 opcode, struct regstruct *reg srca = m68k_areg(regs, srcreg) - 4; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3332; + goto endlabel3366; } {{ uae_s32 src = get_long (srca); m68k_areg (regs, srcreg) = srca; @@ -24972,7 +24984,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9188_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, dstreg) - 4; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3332; + goto endlabel3366; } {{ uae_s32 dst = get_long (dsta); m68k_areg (regs, dstreg) = dsta; @@ -24989,11 +25001,11 @@ unsigned long REGPARAM2 CPUFUNC(op_9188_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); put_long (dsta,newv); }}}}}}}}} m68k_incpc (regs, 2); -endlabel3332: ; -return 28 * 256; +endlabel3366: ; +return 28 * CYCLE_UNIT / 2; } /* SUB.L Dn,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_9190_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9190_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -25001,7 +25013,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9190_5)(uae_u32 opcode, struct regstruct *reg { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3333; + goto endlabel3367; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -25017,11 +25029,11 @@ unsigned long REGPARAM2 CPUFUNC(op_9190_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 2); -endlabel3333: ; -return 20 * 256; +endlabel3367: ; +return 20 * CYCLE_UNIT / 2; } /* SUB.L Dn,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_9198_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_9198_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -25029,7 +25041,7 @@ unsigned long REGPARAM2 CPUFUNC(op_9198_5)(uae_u32 opcode, struct regstruct *reg { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3334; + goto endlabel3368; } {{ uae_s32 dst = get_long (dsta); m68k_areg(regs, dstreg) += 4; @@ -25046,11 +25058,11 @@ unsigned long REGPARAM2 CPUFUNC(op_9198_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 2); -endlabel3334: ; -return 20 * 256; +endlabel3368: ; +return 20 * CYCLE_UNIT / 2; } /* SUB.L Dn,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_91a0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_91a0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -25059,7 +25071,7 @@ unsigned long REGPARAM2 CPUFUNC(op_91a0_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, dstreg) - 4; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3335; + goto endlabel3369; } {{ uae_s32 dst = get_long (dsta); m68k_areg (regs, dstreg) = dsta; @@ -25076,11 +25088,11 @@ unsigned long REGPARAM2 CPUFUNC(op_91a0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 2); -endlabel3335: ; -return 22 * 256; +endlabel3369: ; +return 22 * CYCLE_UNIT / 2; } /* SUB.L Dn,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_91a8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_91a8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -25088,7 +25100,7 @@ unsigned long REGPARAM2 CPUFUNC(op_91a8_5)(uae_u32 opcode, struct regstruct *reg { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3336; + goto endlabel3370; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -25104,11 +25116,11 @@ unsigned long REGPARAM2 CPUFUNC(op_91a8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel3336: ; -return 24 * 256; +endlabel3370: ; +return 24 * CYCLE_UNIT / 2; } /* SUB.L Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_91b0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_91b0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -25117,7 +25129,7 @@ unsigned long REGPARAM2 CPUFUNC(op_91b0_5)(uae_u32 opcode, struct regstruct *reg dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3337; + goto endlabel3371; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -25133,18 +25145,18 @@ unsigned long REGPARAM2 CPUFUNC(op_91b0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel3337: ; -return 26 * 256; +endlabel3371: ; +return 26 * CYCLE_UNIT / 2; } /* SUB.L Dn,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_91b8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_91b8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3338; + goto endlabel3372; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -25160,18 +25172,18 @@ unsigned long REGPARAM2 CPUFUNC(op_91b8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel3338: ; -return 24 * 256; +endlabel3372: ; +return 24 * CYCLE_UNIT / 2; } /* SUB.L Dn,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_91b9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_91b9_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_long_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3339; + goto endlabel3373; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -25187,11 +25199,11 @@ unsigned long REGPARAM2 CPUFUNC(op_91b9_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 6); -endlabel3339: ; -return 28 * 256; +endlabel3373: ; +return 28 * CYCLE_UNIT / 2; } /* SUBA.L Dn,An */ -unsigned long REGPARAM2 CPUFUNC(op_91c0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_91c0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -25202,10 +25214,10 @@ unsigned long REGPARAM2 CPUFUNC(op_91c0_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUBA.L An,An */ -unsigned long REGPARAM2 CPUFUNC(op_91c8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_91c8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -25216,17 +25228,17 @@ unsigned long REGPARAM2 CPUFUNC(op_91c8_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* SUBA.L (An),An */ -unsigned long REGPARAM2 CPUFUNC(op_91d0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_91d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3342; + goto endlabel3376; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -25235,760 +25247,11 @@ unsigned long REGPARAM2 CPUFUNC(op_91d0_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 2); -endlabel3342: ; -return 12 * 256; +endlabel3376: ; +return 12 * CYCLE_UNIT / 2; } /* SUBA.L (An)+,An */ -unsigned long REGPARAM2 CPUFUNC(op_91d8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3343; - } -{{ uae_s32 src = get_long (srca); - m68k_areg(regs, srcreg) += 4; -{ uae_s32 dst = m68k_areg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 newv = dst - src; - m68k_areg(regs, dstreg) = (newv); -}}}}}} m68k_incpc (regs, 2); -endlabel3343: ; -return 12 * 256; -} -/* SUBA.L -(An),An */ -unsigned long REGPARAM2 CPUFUNC(op_91e0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca; - srca = m68k_areg(regs, srcreg) - 4; - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3344; - } -{{ uae_s32 src = get_long (srca); - m68k_areg (regs, srcreg) = srca; -{ uae_s32 dst = m68k_areg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 newv = dst - src; - m68k_areg(regs, dstreg) = (newv); -}}}}}} m68k_incpc (regs, 2); -endlabel3344: ; -return 14 * 256; -} -/* SUBA.L (d16,An),An */ -unsigned long REGPARAM2 CPUFUNC(op_91e8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3345; - } -{{ uae_s32 src = get_long (srca); -{ uae_s32 dst = m68k_areg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{ uae_u32 newv = dst - src; - m68k_areg(regs, dstreg) = (newv); -}}}}}} m68k_incpc (regs, 4); -endlabel3345: ; -return 16 * 256; -} -/* SUBA.L (d8,An,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_91f0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca; - srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3346; - } -{{ uae_s32 src = get_long (srca); -{ uae_s32 dst = m68k_areg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{ uae_u32 newv = dst - src; - m68k_areg(regs, dstreg) = (newv); -}}}}}} m68k_incpc (regs, 4); -endlabel3346: ; -return 18 * 256; -} -/* SUBA.L (xxx).W,An */ -unsigned long REGPARAM2 CPUFUNC(op_91f8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3347; - } -{{ uae_s32 src = get_long (srca); -{ uae_s32 dst = m68k_areg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{ uae_u32 newv = dst - src; - m68k_areg(regs, dstreg) = (newv); -}}}}}} m68k_incpc (regs, 4); -endlabel3347: ; -return 16 * 256; -} -/* SUBA.L (xxx).L,An */ -unsigned long REGPARAM2 CPUFUNC(op_91f9_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = get_long_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3348; - } -{{ uae_s32 src = get_long (srca); -{ uae_s32 dst = m68k_areg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 8); -{ uae_u32 newv = dst - src; - m68k_areg(regs, dstreg) = (newv); -}}}}}} m68k_incpc (regs, 6); -endlabel3348: ; -return 20 * 256; -} -/* SUBA.L (d16,PC),An */ -unsigned long REGPARAM2 CPUFUNC(op_91fa_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_getpc (regs) + 2; - srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3349; - } -{{ uae_s32 src = get_long (srca); -{ uae_s32 dst = m68k_areg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{ uae_u32 newv = dst - src; - m68k_areg(regs, dstreg) = (newv); -}}}}}} m68k_incpc (regs, 4); -endlabel3349: ; -return 16 * 256; -} -/* SUBA.L (d8,PC,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_91fb_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr tmppc; - uaecptr srca; - tmppc = m68k_getpc(regs) + 2; - srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3350; - } -{{ uae_s32 src = get_long (srca); -{ uae_s32 dst = m68k_areg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{ uae_u32 newv = dst - src; - m68k_areg(regs, dstreg) = (newv); -}}}}}} m68k_incpc (regs, 4); -endlabel3350: ; -return 18 * 256; -} -/* SUBA.L #.L,An */ -unsigned long REGPARAM2 CPUFUNC(op_91fc_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s32 src = get_long_prefetch (regs, 4); -{ uae_s32 dst = m68k_areg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 8); -{ uae_u32 newv = dst - src; - m68k_areg(regs, dstreg) = (newv); -}}}} m68k_incpc (regs, 6); -return 12 * 256; -} -/* CMP.B Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b000_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s8 src = m68k_dreg (regs, srcreg); -{ uae_s8 dst = m68k_dreg (regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); -{ int flgs = ((uae_s8)(src)) < 0; - int flgo = ((uae_s8)(dst)) < 0; - int flgn = ((uae_s8)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s8)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* CMP.B (An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b010_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); -{ uae_s8 src = get_byte (srca); -{ uae_s8 dst = m68k_dreg (regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); -{ int flgs = ((uae_s8)(src)) < 0; - int flgo = ((uae_s8)(dst)) < 0; - int flgn = ((uae_s8)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s8)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}} m68k_incpc (regs, 2); -return 8 * 256; -} -/* CMP.B (An)+,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b018_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); -{ uae_s8 src = get_byte (srca); - m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; -{ uae_s8 dst = m68k_dreg (regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); -{ int flgs = ((uae_s8)(src)) < 0; - int flgo = ((uae_s8)(dst)) < 0; - int flgn = ((uae_s8)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s8)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}} m68k_incpc (regs, 2); -return 8 * 256; -} -/* CMP.B -(An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b020_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca; - srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; -{ uae_s8 src = get_byte (srca); - m68k_areg (regs, srcreg) = srca; -{ uae_s8 dst = m68k_dreg (regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); -{ int flgs = ((uae_s8)(src)) < 0; - int flgo = ((uae_s8)(dst)) < 0; - int flgn = ((uae_s8)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s8)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}} m68k_incpc (regs, 2); -return 10 * 256; -} -/* CMP.B (d16,An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b028_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); -{ uae_s8 src = get_byte (srca); -{ uae_s8 dst = m68k_dreg (regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); -{ int flgs = ((uae_s8)(src)) < 0; - int flgo = ((uae_s8)(dst)) < 0; - int flgn = ((uae_s8)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s8)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}} m68k_incpc (regs, 4); -return 12 * 256; -} -/* CMP.B (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b030_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca; - srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); -{ uae_s8 src = get_byte (srca); -{ uae_s8 dst = m68k_dreg (regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); -{ int flgs = ((uae_s8)(src)) < 0; - int flgo = ((uae_s8)(dst)) < 0; - int flgn = ((uae_s8)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s8)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}} m68k_incpc (regs, 4); -return 14 * 256; -} -/* CMP.B (xxx).W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b038_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); -{ uae_s8 src = get_byte (srca); -{ uae_s8 dst = m68k_dreg (regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); -{ int flgs = ((uae_s8)(src)) < 0; - int flgo = ((uae_s8)(dst)) < 0; - int flgn = ((uae_s8)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s8)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}} m68k_incpc (regs, 4); -return 12 * 256; -} -/* CMP.B (xxx).L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b039_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = get_long_prefetch (regs, 4); -{ uae_s8 src = get_byte (srca); -{ uae_s8 dst = m68k_dreg (regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 8); -{{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); -{ int flgs = ((uae_s8)(src)) < 0; - int flgo = ((uae_s8)(dst)) < 0; - int flgn = ((uae_s8)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s8)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}} m68k_incpc (regs, 6); -return 16 * 256; -} -/* CMP.B (d16,PC),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b03a_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_getpc (regs) + 2; - srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); -{ uae_s8 src = get_byte (srca); -{ uae_s8 dst = m68k_dreg (regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); -{ int flgs = ((uae_s8)(src)) < 0; - int flgo = ((uae_s8)(dst)) < 0; - int flgn = ((uae_s8)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s8)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}} m68k_incpc (regs, 4); -return 12 * 256; -} -/* CMP.B (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b03b_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr tmppc; - uaecptr srca; - tmppc = m68k_getpc(regs) + 2; - srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); -{ uae_s8 src = get_byte (srca); -{ uae_s8 dst = m68k_dreg (regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); -{ int flgs = ((uae_s8)(src)) < 0; - int flgo = ((uae_s8)(dst)) < 0; - int flgn = ((uae_s8)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s8)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}} m68k_incpc (regs, 4); -return 14 * 256; -} -/* CMP.B #.B,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b03c_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); -{ uae_s8 dst = m68k_dreg (regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); -{ int flgs = ((uae_s8)(src)) < 0; - int flgo = ((uae_s8)(dst)) < 0; - int flgn = ((uae_s8)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s8)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}} m68k_incpc (regs, 4); -return 12 * 256; -} -/* CMP.W Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b040_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s16 src = m68k_dreg(regs, srcreg); -{ uae_s16 dst = m68k_dreg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); -{ int flgs = ((uae_s16)(src)) < 0; - int flgo = ((uae_s16)(dst)) < 0; - int flgn = ((uae_s16)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -#endif - -#ifdef PART_7 -/* CMP.W An,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b048_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s16 src = m68k_areg(regs, srcreg); -{ uae_s16 dst = m68k_dreg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); -{ int flgs = ((uae_s16)(src)) < 0; - int flgo = ((uae_s16)(dst)) < 0; - int flgn = ((uae_s16)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* CMP.W (An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b050_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3365; - } -{{ uae_s16 src = get_word (srca); -{ uae_s16 dst = m68k_dreg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); -{ int flgs = ((uae_s16)(src)) < 0; - int flgo = ((uae_s16)(dst)) < 0; - int flgn = ((uae_s16)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}} m68k_incpc (regs, 2); -endlabel3365: ; -return 8 * 256; -} -/* CMP.W (An)+,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b058_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3366; - } -{{ uae_s16 src = get_word (srca); - m68k_areg(regs, srcreg) += 2; -{ uae_s16 dst = m68k_dreg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); -{ int flgs = ((uae_s16)(src)) < 0; - int flgo = ((uae_s16)(dst)) < 0; - int flgn = ((uae_s16)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}} m68k_incpc (regs, 2); -endlabel3366: ; -return 8 * 256; -} -/* CMP.W -(An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b060_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca; - srca = m68k_areg(regs, srcreg) - 2; - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3367; - } -{{ uae_s16 src = get_word (srca); - m68k_areg (regs, srcreg) = srca; -{ uae_s16 dst = m68k_dreg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); -{ int flgs = ((uae_s16)(src)) < 0; - int flgo = ((uae_s16)(dst)) < 0; - int flgn = ((uae_s16)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}} m68k_incpc (regs, 2); -endlabel3367: ; -return 10 * 256; -} -/* CMP.W (d16,An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b068_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3368; - } -{{ uae_s16 src = get_word (srca); -{ uae_s16 dst = m68k_dreg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); -{ int flgs = ((uae_s16)(src)) < 0; - int flgo = ((uae_s16)(dst)) < 0; - int flgn = ((uae_s16)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}} m68k_incpc (regs, 4); -endlabel3368: ; -return 12 * 256; -} -/* CMP.W (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b070_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca; - srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3369; - } -{{ uae_s16 src = get_word (srca); -{ uae_s16 dst = m68k_dreg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); -{ int flgs = ((uae_s16)(src)) < 0; - int flgo = ((uae_s16)(dst)) < 0; - int flgn = ((uae_s16)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}} m68k_incpc (regs, 4); -endlabel3369: ; -return 14 * 256; -} -/* CMP.W (xxx).W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b078_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3370; - } -{{ uae_s16 src = get_word (srca); -{ uae_s16 dst = m68k_dreg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); -{ int flgs = ((uae_s16)(src)) < 0; - int flgo = ((uae_s16)(dst)) < 0; - int flgn = ((uae_s16)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}} m68k_incpc (regs, 4); -endlabel3370: ; -return 12 * 256; -} -/* CMP.W (xxx).L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b079_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = get_long_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3371; - } -{{ uae_s16 src = get_word (srca); -{ uae_s16 dst = m68k_dreg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 8); -{{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); -{ int flgs = ((uae_s16)(src)) < 0; - int flgo = ((uae_s16)(dst)) < 0; - int flgn = ((uae_s16)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}} m68k_incpc (regs, 6); -endlabel3371: ; -return 16 * 256; -} -/* CMP.W (d16,PC),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b07a_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_getpc (regs) + 2; - srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3372; - } -{{ uae_s16 src = get_word (srca); -{ uae_s16 dst = m68k_dreg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); -{ int flgs = ((uae_s16)(src)) < 0; - int flgo = ((uae_s16)(dst)) < 0; - int flgn = ((uae_s16)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}} m68k_incpc (regs, 4); -endlabel3372: ; -return 12 * 256; -} -/* CMP.W (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b07b_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr tmppc; - uaecptr srca; - tmppc = m68k_getpc(regs) + 2; - srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3373; - } -{{ uae_s16 src = get_word (srca); -{ uae_s16 dst = m68k_dreg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); -{ int flgs = ((uae_s16)(src)) < 0; - int flgo = ((uae_s16)(dst)) < 0; - int flgn = ((uae_s16)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}} m68k_incpc (regs, 4); -endlabel3373: ; -return 14 * 256; -} -/* CMP.W #.W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b07c_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s16 src = get_word_prefetch (regs, 4); -{ uae_s16 dst = m68k_dreg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); -{ int flgs = ((uae_s16)(src)) < 0; - int flgo = ((uae_s16)(dst)) < 0; - int flgn = ((uae_s16)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}} m68k_incpc (regs, 4); -return 8 * 256; -} -/* CMP.L Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b080_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s32 src = m68k_dreg(regs, srcreg); -{ uae_s32 dst = m68k_dreg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); -{ int flgs = ((uae_s32)(src)) < 0; - int flgo = ((uae_s32)(dst)) < 0; - int flgn = ((uae_s32)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s32)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* CMP.L An,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b088_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s32 src = m68k_areg(regs, srcreg); -{ uae_s32 dst = m68k_dreg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); -{ int flgs = ((uae_s32)(src)) < 0; - int flgo = ((uae_s32)(dst)) < 0; - int flgn = ((uae_s32)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s32)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* CMP.L (An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b090_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_91d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -25997,6 +25260,752 @@ unsigned long REGPARAM2 CPUFUNC(op_b090_5)(uae_u32 opcode, struct regstruct *reg exception3 (opcode, m68k_getpc(regs) + 2, srca); goto endlabel3377; } +{{ uae_s32 src = get_long (srca); + m68k_areg(regs, srcreg) += 4; +{ uae_s32 dst = m68k_areg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel3377: ; +return 12 * CYCLE_UNIT / 2; +} +/* SUBA.L -(An),An */ +unsigned long REGPARAM2 CPUFUNC(op_91e0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3378; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_areg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 2); +endlabel3378: ; +return 14 * CYCLE_UNIT / 2; +} +/* SUBA.L (d16,An),An */ +unsigned long REGPARAM2 CPUFUNC(op_91e8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3379; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel3379: ; +return 16 * CYCLE_UNIT / 2; +} +/* SUBA.L (d8,An,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_91f0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3380; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel3380: ; +return 18 * CYCLE_UNIT / 2; +} +/* SUBA.L (xxx).W,An */ +unsigned long REGPARAM2 CPUFUNC(op_91f8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3381; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel3381: ; +return 16 * CYCLE_UNIT / 2; +} +/* SUBA.L (xxx).L,An */ +unsigned long REGPARAM2 CPUFUNC(op_91f9_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3382; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 6); +endlabel3382: ; +return 20 * CYCLE_UNIT / 2; +} +/* SUBA.L (d16,PC),An */ +unsigned long REGPARAM2 CPUFUNC(op_91fa_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3383; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel3383: ; +return 16 * CYCLE_UNIT / 2; +} +/* SUBA.L (d8,PC,Xn),An */ +unsigned long REGPARAM2 CPUFUNC(op_91fb_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc(regs) + 2; + srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3384; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); +}}}}}} m68k_incpc (regs, 4); +endlabel3384: ; +return 18 * CYCLE_UNIT / 2; +} +/* SUBA.L #.L,An */ +unsigned long REGPARAM2 CPUFUNC(op_91fc_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = get_long_prefetch (regs, 4); +{ uae_s32 dst = m68k_areg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ uae_u32 newv = dst - src; + m68k_areg(regs, dstreg) = (newv); +}}}} m68k_incpc (regs, 6); +return 12 * CYCLE_UNIT / 2; +} +/* CMP.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b000_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); +{ int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s8)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* CMP.B (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b010_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); +{ int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s8)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}}} m68k_incpc (regs, 2); +return 8 * CYCLE_UNIT / 2; +} +/* CMP.B (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b018_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); +{ int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s8)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}}} m68k_incpc (regs, 2); +return 8 * CYCLE_UNIT / 2; +} +/* CMP.B -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b020_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; +{ uae_s8 src = get_byte (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); +{ int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s8)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}}} m68k_incpc (regs, 2); +return 10 * CYCLE_UNIT / 2; +} +/* CMP.B (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b028_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); +{ int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s8)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}}} m68k_incpc (regs, 4); +return 12 * CYCLE_UNIT / 2; +} +/* CMP.B (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b030_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); +{ int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s8)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}}} m68k_incpc (regs, 4); +return 14 * CYCLE_UNIT / 2; +} +/* CMP.B (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b038_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); +{ int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s8)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}}} m68k_incpc (regs, 4); +return 12 * CYCLE_UNIT / 2; +} +/* CMP.B (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b039_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); +{ int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s8)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}}} m68k_incpc (regs, 6); +return 16 * CYCLE_UNIT / 2; +} +/* CMP.B (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b03a_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); +{ int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s8)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}}} m68k_incpc (regs, 4); +return 12 * CYCLE_UNIT / 2; +} +/* CMP.B (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b03b_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc(regs) + 2; + srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); +{ uae_s8 src = get_byte (srca); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); +{ int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s8)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}}} m68k_incpc (regs, 4); +return 14 * CYCLE_UNIT / 2; +} +/* CMP.B #.B,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b03c_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); +{ int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s8)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}} m68k_incpc (regs, 4); +return 12 * CYCLE_UNIT / 2; +} +/* CMP.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b040_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_dreg(regs, srcreg); +{ uae_s16 dst = m68k_dreg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); +{ int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* CMP.W An,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b048_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = m68k_areg(regs, srcreg); +{ uae_s16 dst = m68k_dreg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); +{ int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* CMP.W (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b050_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3399; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); +{ int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}}}} m68k_incpc (regs, 2); +endlabel3399: ; +return 8 * CYCLE_UNIT / 2; +} +/* CMP.W (An)+,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b058_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3400; + } +{{ uae_s16 src = get_word (srca); + m68k_areg(regs, srcreg) += 2; +{ uae_s16 dst = m68k_dreg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); +{ int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}}}} m68k_incpc (regs, 2); +endlabel3400: ; +return 8 * CYCLE_UNIT / 2; +} +/* CMP.W -(An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b060_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg(regs, srcreg) - 2; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3401; + } +{{ uae_s16 src = get_word (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s16 dst = m68k_dreg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); +{ int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}}}} m68k_incpc (regs, 2); +endlabel3401: ; +return 10 * CYCLE_UNIT / 2; +} +/* CMP.W (d16,An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b068_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3402; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); +{ int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}}}} m68k_incpc (regs, 4); +endlabel3402: ; +return 12 * CYCLE_UNIT / 2; +} +/* CMP.W (d8,An,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b070_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3403; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); +{ int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}}}} m68k_incpc (regs, 4); +endlabel3403: ; +return 14 * CYCLE_UNIT / 2; +} +/* CMP.W (xxx).W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b078_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3404; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); +{ int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}}}} m68k_incpc (regs, 4); +endlabel3404: ; +return 12 * CYCLE_UNIT / 2; +} +/* CMP.W (xxx).L,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b079_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = get_long_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3405; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); +{ int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}}}} m68k_incpc (regs, 6); +endlabel3405: ; +return 16 * CYCLE_UNIT / 2; +} +/* CMP.W (d16,PC),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b07a_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_getpc (regs) + 2; + srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3406; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); +{ int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}}}} m68k_incpc (regs, 4); +endlabel3406: ; +return 12 * CYCLE_UNIT / 2; +} +/* CMP.W (d8,PC,Xn),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b07b_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr tmppc; + uaecptr srca; + tmppc = m68k_getpc(regs) + 2; + srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3407; + } +{{ uae_s16 src = get_word (srca); +{ uae_s16 dst = m68k_dreg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); +{ int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}}}} m68k_incpc (regs, 4); +endlabel3407: ; +return 14 * CYCLE_UNIT / 2; +} +/* CMP.W #.W,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b07c_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uae_s16 dst = m68k_dreg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); +{ int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}} m68k_incpc (regs, 4); +return 8 * CYCLE_UNIT / 2; +} +/* CMP.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b080_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg(regs, srcreg); +{ uae_s32 dst = m68k_dreg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); +{ int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s32)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* CMP.L An,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b088_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg(regs, srcreg); +{ uae_s32 dst = m68k_dreg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); +{ int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s32)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* CMP.L (An),Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b090_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3411; + } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); regs->ir = regs->irc; @@ -26010,18 +26019,18 @@ unsigned long REGPARAM2 CPUFUNC(op_b090_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 2); -endlabel3377: ; -return 12 * 256; +endlabel3411: ; +return 12 * CYCLE_UNIT / 2; } /* CMP.L (An)+,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b098_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b098_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3378; + goto endlabel3412; } {{ uae_s32 src = get_long (srca); m68k_areg(regs, srcreg) += 4; @@ -26037,11 +26046,11 @@ unsigned long REGPARAM2 CPUFUNC(op_b098_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 2); -endlabel3378: ; -return 12 * 256; +endlabel3412: ; +return 12 * CYCLE_UNIT / 2; } /* CMP.L -(An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b0a0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b0a0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -26049,7 +26058,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b0a0_5)(uae_u32 opcode, struct regstruct *reg srca = m68k_areg(regs, srcreg) - 4; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3379; + goto endlabel3413; } {{ uae_s32 src = get_long (srca); m68k_areg (regs, srcreg) = srca; @@ -26065,18 +26074,18 @@ unsigned long REGPARAM2 CPUFUNC(op_b0a0_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 2); -endlabel3379: ; -return 14 * 256; +endlabel3413: ; +return 14 * CYCLE_UNIT / 2; } /* CMP.L (d16,An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b0a8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b0a8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3380; + goto endlabel3414; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -26091,11 +26100,14 @@ unsigned long REGPARAM2 CPUFUNC(op_b0a8_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 4); -endlabel3380: ; -return 16 * 256; +endlabel3414: ; +return 16 * CYCLE_UNIT / 2; } +#endif + +#ifdef PART_7 /* CMP.L (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b0b0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b0b0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -26103,7 +26115,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b0b0_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3381; + goto endlabel3415; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -26118,17 +26130,17 @@ unsigned long REGPARAM2 CPUFUNC(op_b0b0_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 4); -endlabel3381: ; -return 18 * 256; +endlabel3415: ; +return 18 * CYCLE_UNIT / 2; } /* CMP.L (xxx).W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b0b8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b0b8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3382; + goto endlabel3416; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -26143,17 +26155,17 @@ unsigned long REGPARAM2 CPUFUNC(op_b0b8_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 4); -endlabel3382: ; -return 16 * 256; +endlabel3416: ; +return 16 * CYCLE_UNIT / 2; } /* CMP.L (xxx).L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b0b9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b0b9_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3383; + goto endlabel3417; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -26168,18 +26180,18 @@ unsigned long REGPARAM2 CPUFUNC(op_b0b9_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 6); -endlabel3383: ; -return 20 * 256; +endlabel3417: ; +return 20 * CYCLE_UNIT / 2; } /* CMP.L (d16,PC),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b0ba_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b0ba_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3384; + goto endlabel3418; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -26194,11 +26206,11 @@ unsigned long REGPARAM2 CPUFUNC(op_b0ba_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 4); -endlabel3384: ; -return 16 * 256; +endlabel3418: ; +return 16 * CYCLE_UNIT / 2; } /* CMP.L (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b0bb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b0bb_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -26207,7 +26219,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b0bb_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3385; + goto endlabel3419; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -26222,11 +26234,11 @@ unsigned long REGPARAM2 CPUFUNC(op_b0bb_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 4); -endlabel3385: ; -return 18 * 256; +endlabel3419: ; +return 18 * CYCLE_UNIT / 2; } /* CMP.L #.L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b0bc_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b0bc_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); @@ -26242,10 +26254,10 @@ unsigned long REGPARAM2 CPUFUNC(op_b0bc_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* CMPA.W Dn,An */ -unsigned long REGPARAM2 CPUFUNC(op_b0c0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b0c0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -26262,10 +26274,10 @@ unsigned long REGPARAM2 CPUFUNC(op_b0c0_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* CMPA.W An,An */ -unsigned long REGPARAM2 CPUFUNC(op_b0c8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b0c8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -26282,17 +26294,17 @@ unsigned long REGPARAM2 CPUFUNC(op_b0c8_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* CMPA.W (An),An */ -unsigned long REGPARAM2 CPUFUNC(op_b0d0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b0d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3389; + goto endlabel3423; } {{ uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -26307,18 +26319,18 @@ unsigned long REGPARAM2 CPUFUNC(op_b0d0_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 2); -endlabel3389: ; -return 8 * 256; +endlabel3423: ; +return 8 * CYCLE_UNIT / 2; } /* CMPA.W (An)+,An */ -unsigned long REGPARAM2 CPUFUNC(op_b0d8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b0d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3390; + goto endlabel3424; } {{ uae_s16 src = get_word (srca); m68k_areg(regs, srcreg) += 2; @@ -26334,11 +26346,11 @@ unsigned long REGPARAM2 CPUFUNC(op_b0d8_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 2); -endlabel3390: ; -return 8 * 256; +endlabel3424: ; +return 8 * CYCLE_UNIT / 2; } /* CMPA.W -(An),An */ -unsigned long REGPARAM2 CPUFUNC(op_b0e0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b0e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -26346,7 +26358,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b0e0_5)(uae_u32 opcode, struct regstruct *reg srca = m68k_areg(regs, srcreg) - 2; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3391; + goto endlabel3425; } {{ uae_s16 src = get_word (srca); m68k_areg (regs, srcreg) = srca; @@ -26362,18 +26374,18 @@ unsigned long REGPARAM2 CPUFUNC(op_b0e0_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 2); -endlabel3391: ; -return 10 * 256; +endlabel3425: ; +return 10 * CYCLE_UNIT / 2; } /* CMPA.W (d16,An),An */ -unsigned long REGPARAM2 CPUFUNC(op_b0e8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b0e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3392; + goto endlabel3426; } {{ uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -26388,11 +26400,11 @@ unsigned long REGPARAM2 CPUFUNC(op_b0e8_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 4); -endlabel3392: ; -return 12 * 256; +endlabel3426: ; +return 12 * CYCLE_UNIT / 2; } /* CMPA.W (d8,An,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_b0f0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b0f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -26400,7 +26412,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b0f0_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3393; + goto endlabel3427; } {{ uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -26415,17 +26427,17 @@ unsigned long REGPARAM2 CPUFUNC(op_b0f0_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 4); -endlabel3393: ; -return 14 * 256; +endlabel3427: ; +return 14 * CYCLE_UNIT / 2; } /* CMPA.W (xxx).W,An */ -unsigned long REGPARAM2 CPUFUNC(op_b0f8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b0f8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3394; + goto endlabel3428; } {{ uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -26440,17 +26452,17 @@ unsigned long REGPARAM2 CPUFUNC(op_b0f8_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 4); -endlabel3394: ; -return 12 * 256; +endlabel3428: ; +return 12 * CYCLE_UNIT / 2; } /* CMPA.W (xxx).L,An */ -unsigned long REGPARAM2 CPUFUNC(op_b0f9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b0f9_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3395; + goto endlabel3429; } {{ uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -26465,18 +26477,18 @@ unsigned long REGPARAM2 CPUFUNC(op_b0f9_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 6); -endlabel3395: ; -return 16 * 256; +endlabel3429: ; +return 16 * CYCLE_UNIT / 2; } /* CMPA.W (d16,PC),An */ -unsigned long REGPARAM2 CPUFUNC(op_b0fa_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b0fa_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3396; + goto endlabel3430; } {{ uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -26491,783 +26503,22 @@ unsigned long REGPARAM2 CPUFUNC(op_b0fa_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 4); -endlabel3396: ; -return 12 * 256; +endlabel3430: ; +return 12 * CYCLE_UNIT / 2; } /* CMPA.W (d8,PC,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_b0fb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b0fb_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; tmppc = m68k_getpc(regs) + 2; srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3397; - } -{{ uae_s16 src = get_word (srca); -{ uae_s32 dst = m68k_areg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); -{ int flgs = ((uae_s32)(src)) < 0; - int flgo = ((uae_s32)(dst)) < 0; - int flgn = ((uae_s32)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s32)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}} m68k_incpc (regs, 4); -endlabel3397: ; -return 14 * 256; -} -/* CMPA.W #.W,An */ -unsigned long REGPARAM2 CPUFUNC(op_b0fc_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s16 src = get_word_prefetch (regs, 4); -{ uae_s32 dst = m68k_areg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); -{ int flgs = ((uae_s32)(src)) < 0; - int flgo = ((uae_s32)(dst)) < 0; - int flgn = ((uae_s32)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s32)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}} m68k_incpc (regs, 4); -return 8 * 256; -} -/* EOR.B Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b100_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s8 src = m68k_dreg (regs, srcreg); -{ uae_s8 dst = m68k_dreg (regs, dstreg); - src ^= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); -}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* CMPM.B (An)+,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_b108_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); -{ uae_s8 src = get_byte (srca); - m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; -{ uaecptr dsta = m68k_areg(regs, dstreg); -{ uae_s8 dst = get_byte (dsta); - m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); -{ int flgs = ((uae_s8)(src)) < 0; - int flgo = ((uae_s8)(dst)) < 0; - int flgn = ((uae_s8)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s8)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}} m68k_incpc (regs, 2); -return 12 * 256; -} -/* EOR.B Dn,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_b110_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s8 src = m68k_dreg (regs, srcreg); -{ uaecptr dsta = m68k_areg(regs, dstreg); -{ uae_s8 dst = get_byte (dsta); - src ^= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - put_byte (dsta,src); -}}}} m68k_incpc (regs, 2); -return 12 * 256; -} -/* EOR.B Dn,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_b118_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s8 src = m68k_dreg (regs, srcreg); -{ uaecptr dsta = m68k_areg(regs, dstreg); -{ uae_s8 dst = get_byte (dsta); - m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; - src ^= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - put_byte (dsta,src); -}}}} m68k_incpc (regs, 2); -return 12 * 256; -} -/* EOR.B Dn,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_b120_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s8 src = m68k_dreg (regs, srcreg); -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; -{ uae_s8 dst = get_byte (dsta); - m68k_areg (regs, dstreg) = dsta; - src ^= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - put_byte (dsta,src); -}}}} m68k_incpc (regs, 2); -return 14 * 256; -} -/* EOR.B Dn,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_b128_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s8 src = m68k_dreg (regs, srcreg); -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); -{ uae_s8 dst = get_byte (dsta); - src ^= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - put_byte (dsta,src); -}}}} m68k_incpc (regs, 4); -return 16 * 256; -} -/* EOR.B Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_b130_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s8 src = m68k_dreg (regs, srcreg); -{ uaecptr dsta; - dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); -{ uae_s8 dst = get_byte (dsta); - src ^= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - put_byte (dsta,src); -}}}} m68k_incpc (regs, 4); -return 18 * 256; -} -/* EOR.B Dn,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_b138_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); -{{ uae_s8 src = m68k_dreg (regs, srcreg); -{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); -{ uae_s8 dst = get_byte (dsta); - src ^= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - put_byte (dsta,src); -}}}} m68k_incpc (regs, 4); -return 16 * 256; -} -/* EOR.B Dn,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_b139_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); -{{ uae_s8 src = m68k_dreg (regs, srcreg); -{ uaecptr dsta = get_long_prefetch (regs, 4); -{ uae_s8 dst = get_byte (dsta); - src ^= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 8); - put_byte (dsta,src); -}}}} m68k_incpc (regs, 6); -return 20 * 256; -} -/* EOR.W Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b140_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s16 src = m68k_dreg(regs, srcreg); -{ uae_s16 dst = m68k_dreg(regs, dstreg); - src ^= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); -}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* CMPM.W (An)+,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_b148_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3409; - } -{{ uae_s16 src = get_word (srca); - m68k_areg(regs, srcreg) += 2; -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3409; - } -{{ uae_s16 dst = get_word (dsta); - m68k_areg(regs, dstreg) += 2; - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); -{ int flgs = ((uae_s16)(src)) < 0; - int flgo = ((uae_s16)(dst)) < 0; - int flgn = ((uae_s16)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}}}} m68k_incpc (regs, 2); -endlabel3409: ; -return 12 * 256; -} -/* EOR.W Dn,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_b150_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s16 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3410; - } -{{ uae_s16 dst = get_word (dsta); - src ^= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - put_word (dsta,src); -}}}}} m68k_incpc (regs, 2); -endlabel3410: ; -return 12 * 256; -} -/* EOR.W Dn,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_b158_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s16 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3411; - } -{{ uae_s16 dst = get_word (dsta); - m68k_areg(regs, dstreg) += 2; - src ^= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - put_word (dsta,src); -}}}}} m68k_incpc (regs, 2); -endlabel3411: ; -return 12 * 256; -} -/* EOR.W Dn,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_b160_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s16 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - 2; - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3412; - } -{{ uae_s16 dst = get_word (dsta); - m68k_areg (regs, dstreg) = dsta; - src ^= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - put_word (dsta,src); -}}}}} m68k_incpc (regs, 2); -endlabel3412: ; -return 14 * 256; -} -/* EOR.W Dn,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_b168_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s16 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3413; - } -{{ uae_s16 dst = get_word (dsta); - src ^= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - put_word (dsta,src); -}}}}} m68k_incpc (regs, 4); -endlabel3413: ; -return 16 * 256; -} -/* EOR.W Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_b170_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s16 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta; - dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3414; - } -{{ uae_s16 dst = get_word (dsta); - src ^= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - put_word (dsta,src); -}}}}} m68k_incpc (regs, 4); -endlabel3414: ; -return 18 * 256; -} -/* EOR.W Dn,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_b178_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); -{{ uae_s16 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3415; - } -{{ uae_s16 dst = get_word (dsta); - src ^= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - put_word (dsta,src); -}}}}} m68k_incpc (regs, 4); -endlabel3415: ; -return 16 * 256; -} -/* EOR.W Dn,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_b179_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); -{{ uae_s16 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta = get_long_prefetch (regs, 4); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3416; - } -{{ uae_s16 dst = get_word (dsta); - src ^= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 8); - put_word (dsta,src); -}}}}} m68k_incpc (regs, 6); -endlabel3416: ; -return 20 * 256; -} -/* EOR.L Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_b180_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s32 src = m68k_dreg(regs, srcreg); -{ uae_s32 dst = m68k_dreg(regs, dstreg); - src ^= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - m68k_dreg(regs, dstreg) = (src); -}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* CMPM.L (An)+,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_b188_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3418; - } -{{ uae_s32 src = get_long (srca); - m68k_areg(regs, srcreg) += 4; -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3418; - } -{{ uae_s32 dst = get_long (dsta); - m68k_areg(regs, dstreg) += 4; - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); -{ int flgs = ((uae_s32)(src)) < 0; - int flgo = ((uae_s32)(dst)) < 0; - int flgn = ((uae_s32)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s32)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}}}} m68k_incpc (regs, 2); -endlabel3418: ; -return 20 * 256; -} -/* EOR.L Dn,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_b190_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s32 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3419; - } -{{ uae_s32 dst = get_long (dsta); - src ^= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - put_long (dsta,src); -}}}}} m68k_incpc (regs, 2); -endlabel3419: ; -return 20 * 256; -} -/* EOR.L Dn,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_b198_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s32 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta = m68k_areg(regs, dstreg); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3420; - } -{{ uae_s32 dst = get_long (dsta); - m68k_areg(regs, dstreg) += 4; - src ^= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - put_long (dsta,src); -}}}}} m68k_incpc (regs, 2); -endlabel3420: ; -return 20 * 256; -} -/* EOR.L Dn,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_b1a0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s32 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta; - dsta = m68k_areg(regs, dstreg) - 4; - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3421; - } -{{ uae_s32 dst = get_long (dsta); - m68k_areg (regs, dstreg) = dsta; - src ^= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); - put_long (dsta,src); -}}}}} m68k_incpc (regs, 2); -endlabel3421: ; -return 22 * 256; -} -/* EOR.L Dn,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_b1a8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s32 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3422; - } -{{ uae_s32 dst = get_long (dsta); - src ^= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - put_long (dsta,src); -}}}}} m68k_incpc (regs, 4); -endlabel3422: ; -return 24 * 256; -} -/* EOR.L Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_b1b0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s32 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta; - dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3423; - } -{{ uae_s32 dst = get_long (dsta); - src ^= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - put_long (dsta,src); -}}}}} m68k_incpc (regs, 4); -endlabel3423: ; -return 26 * 256; -} -/* EOR.L Dn,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_b1b8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); -{{ uae_s32 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3424; - } -{{ uae_s32 dst = get_long (dsta); - src ^= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); - put_long (dsta,src); -}}}}} m68k_incpc (regs, 4); -endlabel3424: ; -return 24 * 256; -} -/* EOR.L Dn,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_b1b9_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); -{{ uae_s32 src = m68k_dreg(regs, srcreg); -{ uaecptr dsta = get_long_prefetch (regs, 4); - if (dsta & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3425; - } -{{ uae_s32 dst = get_long (dsta); - src ^= dst; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); - regs->ir = regs->irc; - get_word_prefetch (regs, 8); - put_long (dsta,src); -}}}}} m68k_incpc (regs, 6); -endlabel3425: ; -return 28 * 256; -} -/* CMPA.L Dn,An */ -unsigned long REGPARAM2 CPUFUNC(op_b1c0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s32 src = m68k_dreg(regs, srcreg); -{ uae_s32 dst = m68k_areg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); -{ int flgs = ((uae_s32)(src)) < 0; - int flgo = ((uae_s32)(dst)) < 0; - int flgn = ((uae_s32)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s32)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* CMPA.L An,An */ -unsigned long REGPARAM2 CPUFUNC(op_b1c8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uae_s32 src = m68k_areg(regs, srcreg); -{ uae_s32 dst = m68k_areg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); -{ int flgs = ((uae_s32)(src)) < 0; - int flgo = ((uae_s32)(dst)) < 0; - int flgn = ((uae_s32)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s32)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* CMPA.L (An),An */ -unsigned long REGPARAM2 CPUFUNC(op_b1d0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3428; - } -{{ uae_s32 src = get_long (srca); -{ uae_s32 dst = m68k_areg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); -{ int flgs = ((uae_s32)(src)) < 0; - int flgo = ((uae_s32)(dst)) < 0; - int flgn = ((uae_s32)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s32)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}} m68k_incpc (regs, 2); -endlabel3428: ; -return 12 * 256; -} -/* CMPA.L (An)+,An */ -unsigned long REGPARAM2 CPUFUNC(op_b1d8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg); - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3429; - } -{{ uae_s32 src = get_long (srca); - m68k_areg(regs, srcreg) += 4; -{ uae_s32 dst = m68k_areg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); -{ int flgs = ((uae_s32)(src)) < 0; - int flgo = ((uae_s32)(dst)) < 0; - int flgn = ((uae_s32)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s32)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}} m68k_incpc (regs, 2); -endlabel3429: ; -return 12 * 256; -} -/* CMPA.L -(An),An */ -unsigned long REGPARAM2 CPUFUNC(op_b1e0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca; - srca = m68k_areg(regs, srcreg) - 4; - if (srca & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3430; - } -{{ uae_s32 src = get_long (srca); - m68k_areg (regs, srcreg) = srca; -{ uae_s32 dst = m68k_areg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); -{ int flgs = ((uae_s32)(src)) < 0; - int flgo = ((uae_s32)(dst)) < 0; - int flgn = ((uae_s32)(newv)) < 0; - SET_ZFLG (®s->ccrflags, ((uae_s32)(newv)) == 0); - SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); - SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); - SET_NFLG (®s->ccrflags, flgn != 0); -}}}}}}}} m68k_incpc (regs, 2); -endlabel3430: ; -return 14 * 256; -} -/* CMPA.L (d16,An),An */ -unsigned long REGPARAM2 CPUFUNC(op_b1e8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; -{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); goto endlabel3431; } -{{ uae_s32 src = get_long (srca); +{{ uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg(regs, dstreg); regs->ir = regs->irc; get_word_prefetch (regs, 6); @@ -27281,10 +26532,771 @@ unsigned long REGPARAM2 CPUFUNC(op_b1e8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 4); endlabel3431: ; -return 16 * 256; +return 14 * CYCLE_UNIT / 2; +} +/* CMPA.W #.W,An */ +unsigned long REGPARAM2 CPUFUNC(op_b0fc_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s16 src = get_word_prefetch (regs, 4); +{ uae_s32 dst = m68k_areg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); +{ int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s32)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}} m68k_incpc (regs, 4); +return 8 * CYCLE_UNIT / 2; +} +/* EOR.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b100_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uae_s8 dst = m68k_dreg (regs, dstreg); + src ^= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); +}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* CMPM.B (An)+,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_b108_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg); +{ uae_s8 src = get_byte (srca); + m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; +{ uaecptr dsta = m68k_areg(regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); +{ int flgs = ((uae_s8)(src)) < 0; + int flgo = ((uae_s8)(dst)) < 0; + int flgn = ((uae_s8)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s8)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u8)(src)) > ((uae_u8)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}}}} m68k_incpc (regs, 2); +return 12 * CYCLE_UNIT / 2; +} +/* EOR.B Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_b110_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg(regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + src ^= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 2); +return 12 * CYCLE_UNIT / 2; +} +/* EOR.B Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_b118_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg(regs, dstreg); +{ uae_s8 dst = get_byte (dsta); + m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; + src ^= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 2); +return 12 * CYCLE_UNIT / 2; +} +/* EOR.B Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_b120_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; +{ uae_s8 dst = get_byte (dsta); + m68k_areg (regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 2); +return 14 * CYCLE_UNIT / 2; +} +/* EOR.B Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_b128_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src ^= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return 16 * CYCLE_UNIT / 2; +} +/* EOR.B Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_b130_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); +{ uae_s8 dst = get_byte (dsta); + src ^= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return 18 * CYCLE_UNIT / 2; +} +/* EOR.B Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_b138_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src ^= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 4); +return 16 * CYCLE_UNIT / 2; +} +/* EOR.B Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_b139_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s8 src = m68k_dreg (regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); +{ uae_s8 dst = get_byte (dsta); + src ^= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s8)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s8)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_byte (dsta,src); +}}}} m68k_incpc (regs, 6); +return 20 * CYCLE_UNIT / 2; +} +/* EOR.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b140_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg(regs, srcreg); +{ uae_s16 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); +}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* CMPM.W (An)+,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_b148_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3443; + } +{{ uae_s16 src = get_word (srca); + m68k_areg(regs, srcreg) += 2; +{ uaecptr dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3443; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg(regs, dstreg) += 2; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); +{ int flgs = ((uae_s16)(src)) < 0; + int flgo = ((uae_s16)(dst)) < 0; + int flgn = ((uae_s16)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s16)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u16)(src)) > ((uae_u16)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}}}}}} m68k_incpc (regs, 2); +endlabel3443: ; +return 12 * CYCLE_UNIT / 2; +} +/* EOR.W Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_b150_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3444; + } +{{ uae_s16 dst = get_word (dsta); + src ^= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel3444: ; +return 12 * CYCLE_UNIT / 2; +} +/* EOR.W Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_b158_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3445; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg(regs, dstreg) += 2; + src ^= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel3445: ; +return 12 * CYCLE_UNIT / 2; +} +/* EOR.W Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_b160_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 2; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3446; + } +{{ uae_s16 dst = get_word (dsta); + m68k_areg (regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel3446: ; +return 14 * CYCLE_UNIT / 2; +} +/* EOR.W Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_b168_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3447; + } +{{ uae_s16 dst = get_word (dsta); + src ^= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3447: ; +return 16 * CYCLE_UNIT / 2; +} +/* EOR.W Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_b170_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3448; + } +{{ uae_s16 dst = get_word (dsta); + src ^= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3448: ; +return 18 * CYCLE_UNIT / 2; +} +/* EOR.W Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_b178_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3449; + } +{{ uae_s16 dst = get_word (dsta); + src ^= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3449: ; +return 16 * CYCLE_UNIT / 2; +} +/* EOR.W Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_b179_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s16 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3450; + } +{{ uae_s16 dst = get_word (dsta); + src ^= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_word (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel3450: ; +return 20 * CYCLE_UNIT / 2; +} +/* EOR.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_b180_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg(regs, srcreg); +{ uae_s32 dst = m68k_dreg(regs, dstreg); + src ^= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + m68k_dreg(regs, dstreg) = (src); +}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* CMPM.L (An)+,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_b188_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3452; + } +{{ uae_s32 src = get_long (srca); + m68k_areg(regs, srcreg) += 4; +{ uaecptr dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3452; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg(regs, dstreg) += 4; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); +{ int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s32)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}}}}}} m68k_incpc (regs, 2); +endlabel3452: ; +return 20 * CYCLE_UNIT / 2; +} +/* EOR.L Dn,(An) */ +unsigned long REGPARAM2 CPUFUNC(op_b190_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3453; + } +{{ uae_s32 dst = get_long (dsta); + src ^= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel3453: ; +return 20 * CYCLE_UNIT / 2; +} +/* EOR.L Dn,(An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_b198_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta = m68k_areg(regs, dstreg); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3454; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg(regs, dstreg) += 4; + src ^= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel3454: ; +return 20 * CYCLE_UNIT / 2; +} +/* EOR.L Dn,-(An) */ +unsigned long REGPARAM2 CPUFUNC(op_b1a0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta; + dsta = m68k_areg(regs, dstreg) - 4; + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3455; + } +{{ uae_s32 dst = get_long (dsta); + m68k_areg (regs, dstreg) = dsta; + src ^= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 2); +endlabel3455: ; +return 22 * CYCLE_UNIT / 2; +} +/* EOR.L Dn,(d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_b1a8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3456; + } +{{ uae_s32 dst = get_long (dsta); + src ^= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3456: ; +return 24 * CYCLE_UNIT / 2; +} +/* EOR.L Dn,(d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_b1b0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta; + dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3457; + } +{{ uae_s32 dst = get_long (dsta); + src ^= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3457: ; +return 26 * CYCLE_UNIT / 2; +} +/* EOR.L Dn,(xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_b1b8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3458; + } +{{ uae_s32 dst = get_long (dsta); + src ^= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 4); +endlabel3458: ; +return 24 * CYCLE_UNIT / 2; +} +/* EOR.L Dn,(xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_b1b9_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); +{{ uae_s32 src = m68k_dreg(regs, srcreg); +{ uaecptr dsta = get_long_prefetch (regs, 4); + if (dsta & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dsta); + goto endlabel3459; + } +{{ uae_s32 dst = get_long (dsta); + src ^= dst; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s32)(src)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(src)) < 0); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); + put_long (dsta,src); +}}}}} m68k_incpc (regs, 6); +endlabel3459: ; +return 28 * CYCLE_UNIT / 2; +} +/* CMPA.L Dn,An */ +unsigned long REGPARAM2 CPUFUNC(op_b1c0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_dreg(regs, srcreg); +{ uae_s32 dst = m68k_areg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); +{ int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s32)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* CMPA.L An,An */ +unsigned long REGPARAM2 CPUFUNC(op_b1c8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uae_s32 src = m68k_areg(regs, srcreg); +{ uae_s32 dst = m68k_areg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); +{ int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s32)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* CMPA.L (An),An */ +unsigned long REGPARAM2 CPUFUNC(op_b1d0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3462; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); +{ int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s32)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}}}} m68k_incpc (regs, 2); +endlabel3462: ; +return 12 * CYCLE_UNIT / 2; +} +/* CMPA.L (An)+,An */ +unsigned long REGPARAM2 CPUFUNC(op_b1d8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3463; + } +{{ uae_s32 src = get_long (srca); + m68k_areg(regs, srcreg) += 4; +{ uae_s32 dst = m68k_areg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); +{ int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s32)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}}}} m68k_incpc (regs, 2); +endlabel3463: ; +return 12 * CYCLE_UNIT / 2; +} +/* CMPA.L -(An),An */ +unsigned long REGPARAM2 CPUFUNC(op_b1e0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca; + srca = m68k_areg(regs, srcreg) - 4; + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3464; + } +{{ uae_s32 src = get_long (srca); + m68k_areg (regs, srcreg) = srca; +{ uae_s32 dst = m68k_areg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); +{ int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s32)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}}}} m68k_incpc (regs, 2); +endlabel3464: ; +return 14 * CYCLE_UNIT / 2; +} +/* CMPA.L (d16,An),An */ +unsigned long REGPARAM2 CPUFUNC(op_b1e8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; +{{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (srca & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, srca); + goto endlabel3465; + } +{{ uae_s32 src = get_long (srca); +{ uae_s32 dst = m68k_areg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); +{ int flgs = ((uae_s32)(src)) < 0; + int flgo = ((uae_s32)(dst)) < 0; + int flgn = ((uae_s32)(newv)) < 0; + SET_ZFLG (®s->ccrflags, ((uae_s32)(newv)) == 0); + SET_VFLG (®s->ccrflags, (flgs != flgo) && (flgn != flgo)); + SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); + SET_NFLG (®s->ccrflags, flgn != 0); +}}}}}}}} m68k_incpc (regs, 4); +endlabel3465: ; +return 16 * CYCLE_UNIT / 2; } /* CMPA.L (d8,An,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_b1f0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b1f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27292,7 +27304,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b1f0_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3432; + goto endlabel3466; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -27307,17 +27319,17 @@ unsigned long REGPARAM2 CPUFUNC(op_b1f0_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 4); -endlabel3432: ; -return 18 * 256; +endlabel3466: ; +return 18 * CYCLE_UNIT / 2; } /* CMPA.L (xxx).W,An */ -unsigned long REGPARAM2 CPUFUNC(op_b1f8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b1f8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3433; + goto endlabel3467; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -27332,17 +27344,17 @@ unsigned long REGPARAM2 CPUFUNC(op_b1f8_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 4); -endlabel3433: ; -return 16 * 256; +endlabel3467: ; +return 16 * CYCLE_UNIT / 2; } /* CMPA.L (xxx).L,An */ -unsigned long REGPARAM2 CPUFUNC(op_b1f9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b1f9_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3434; + goto endlabel3468; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -27357,18 +27369,18 @@ unsigned long REGPARAM2 CPUFUNC(op_b1f9_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 6); -endlabel3434: ; -return 20 * 256; +endlabel3468: ; +return 20 * CYCLE_UNIT / 2; } /* CMPA.L (d16,PC),An */ -unsigned long REGPARAM2 CPUFUNC(op_b1fa_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b1fa_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3435; + goto endlabel3469; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -27383,11 +27395,11 @@ unsigned long REGPARAM2 CPUFUNC(op_b1fa_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 4); -endlabel3435: ; -return 16 * 256; +endlabel3469: ; +return 16 * CYCLE_UNIT / 2; } /* CMPA.L (d8,PC,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_b1fb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b1fb_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -27396,7 +27408,7 @@ unsigned long REGPARAM2 CPUFUNC(op_b1fb_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3436; + goto endlabel3470; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -27411,11 +27423,11 @@ unsigned long REGPARAM2 CPUFUNC(op_b1fb_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}}}} m68k_incpc (regs, 4); -endlabel3436: ; -return 18 * 256; +endlabel3470: ; +return 18 * CYCLE_UNIT / 2; } /* CMPA.L #.L,An */ -unsigned long REGPARAM2 CPUFUNC(op_b1fc_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_b1fc_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); @@ -27431,10 +27443,10 @@ unsigned long REGPARAM2 CPUFUNC(op_b1fc_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, ((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (®s->ccrflags, flgn != 0); }}}}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* AND.B Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c000_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c000_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27448,10 +27460,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c000_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* AND.B (An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c010_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c010_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27466,10 +27478,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c010_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* AND.B (An)+,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c018_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c018_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27485,10 +27497,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c018_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* AND.B -(An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c020_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c020_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27505,10 +27517,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c020_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* AND.B (d16,An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c028_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c028_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27523,10 +27535,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c028_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* AND.B (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c030_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c030_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27542,10 +27554,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c030_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* AND.B (xxx).W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c038_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c038_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -27559,10 +27571,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c038_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* AND.B (xxx).L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c039_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c039_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); @@ -27576,10 +27588,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c039_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* AND.B (d16,PC),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c03a_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c03a_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; @@ -27594,10 +27606,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c03a_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* AND.B (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c03b_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c03b_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -27614,10 +27626,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c03b_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* AND.B #.B,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c03c_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c03c_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -27630,10 +27642,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c03c_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* AND.W Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c040_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c040_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27647,17 +27659,17 @@ unsigned long REGPARAM2 CPUFUNC(op_c040_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* AND.W (An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c050_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c050_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3450; + goto endlabel3484; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -27669,18 +27681,18 @@ unsigned long REGPARAM2 CPUFUNC(op_c050_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}} m68k_incpc (regs, 2); -endlabel3450: ; -return 8 * 256; +endlabel3484: ; +return 8 * CYCLE_UNIT / 2; } /* AND.W (An)+,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c058_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c058_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3451; + goto endlabel3485; } {{ uae_s16 src = get_word (srca); m68k_areg(regs, srcreg) += 2; @@ -27693,11 +27705,11 @@ unsigned long REGPARAM2 CPUFUNC(op_c058_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}} m68k_incpc (regs, 2); -endlabel3451: ; -return 8 * 256; +endlabel3485: ; +return 8 * CYCLE_UNIT / 2; } /* AND.W -(An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c060_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c060_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27705,7 +27717,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c060_5)(uae_u32 opcode, struct regstruct *reg srca = m68k_areg(regs, srcreg) - 2; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3452; + goto endlabel3486; } {{ uae_s16 src = get_word (srca); m68k_areg (regs, srcreg) = srca; @@ -27718,18 +27730,18 @@ unsigned long REGPARAM2 CPUFUNC(op_c060_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}} m68k_incpc (regs, 2); -endlabel3452: ; -return 10 * 256; +endlabel3486: ; +return 10 * CYCLE_UNIT / 2; } /* AND.W (d16,An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c068_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c068_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3453; + goto endlabel3487; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -27741,11 +27753,11 @@ unsigned long REGPARAM2 CPUFUNC(op_c068_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}} m68k_incpc (regs, 4); -endlabel3453: ; -return 12 * 256; +endlabel3487: ; +return 12 * CYCLE_UNIT / 2; } /* AND.W (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c070_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c070_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27753,7 +27765,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c070_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3454; + goto endlabel3488; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -27765,17 +27777,17 @@ unsigned long REGPARAM2 CPUFUNC(op_c070_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}} m68k_incpc (regs, 4); -endlabel3454: ; -return 14 * 256; +endlabel3488: ; +return 14 * CYCLE_UNIT / 2; } /* AND.W (xxx).W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c078_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c078_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3455; + goto endlabel3489; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -27787,17 +27799,17 @@ unsigned long REGPARAM2 CPUFUNC(op_c078_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}} m68k_incpc (regs, 4); -endlabel3455: ; -return 12 * 256; +endlabel3489: ; +return 12 * CYCLE_UNIT / 2; } /* AND.W (xxx).L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c079_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c079_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3456; + goto endlabel3490; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -27809,18 +27821,18 @@ unsigned long REGPARAM2 CPUFUNC(op_c079_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}} m68k_incpc (regs, 6); -endlabel3456: ; -return 16 * 256; +endlabel3490: ; +return 16 * CYCLE_UNIT / 2; } /* AND.W (d16,PC),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c07a_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c07a_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3457; + goto endlabel3491; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -27832,11 +27844,11 @@ unsigned long REGPARAM2 CPUFUNC(op_c07a_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}} m68k_incpc (regs, 4); -endlabel3457: ; -return 12 * 256; +endlabel3491: ; +return 12 * CYCLE_UNIT / 2; } /* AND.W (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c07b_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c07b_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -27845,7 +27857,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c07b_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3458; + goto endlabel3492; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -27857,11 +27869,11 @@ unsigned long REGPARAM2 CPUFUNC(op_c07b_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}} m68k_incpc (regs, 4); -endlabel3458: ; -return 14 * 256; +endlabel3492: ; +return 14 * CYCLE_UNIT / 2; } /* AND.W #.W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c07c_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c07c_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -27874,10 +27886,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c07c_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* AND.L Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c080_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c080_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27891,17 +27903,17 @@ unsigned long REGPARAM2 CPUFUNC(op_c080_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); m68k_dreg(regs, dstreg) = (src); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* AND.L (An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c090_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c090_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3461; + goto endlabel3495; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -27913,18 +27925,18 @@ unsigned long REGPARAM2 CPUFUNC(op_c090_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); m68k_dreg(regs, dstreg) = (src); }}}}} m68k_incpc (regs, 2); -endlabel3461: ; -return 12 * 256; +endlabel3495: ; +return 12 * CYCLE_UNIT / 2; } /* AND.L (An)+,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c098_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c098_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3462; + goto endlabel3496; } {{ uae_s32 src = get_long (srca); m68k_areg(regs, srcreg) += 4; @@ -27937,11 +27949,11 @@ unsigned long REGPARAM2 CPUFUNC(op_c098_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); m68k_dreg(regs, dstreg) = (src); }}}}} m68k_incpc (regs, 2); -endlabel3462: ; -return 12 * 256; +endlabel3496: ; +return 12 * CYCLE_UNIT / 2; } /* AND.L -(An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c0a0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c0a0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27949,7 +27961,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c0a0_5)(uae_u32 opcode, struct regstruct *reg srca = m68k_areg(regs, srcreg) - 4; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3463; + goto endlabel3497; } {{ uae_s32 src = get_long (srca); m68k_areg (regs, srcreg) = srca; @@ -27962,18 +27974,18 @@ unsigned long REGPARAM2 CPUFUNC(op_c0a0_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); m68k_dreg(regs, dstreg) = (src); }}}}} m68k_incpc (regs, 2); -endlabel3463: ; -return 14 * 256; +endlabel3497: ; +return 14 * CYCLE_UNIT / 2; } /* AND.L (d16,An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c0a8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c0a8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3464; + goto endlabel3498; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -27985,11 +27997,11 @@ unsigned long REGPARAM2 CPUFUNC(op_c0a8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (src); }}}}} m68k_incpc (regs, 4); -endlabel3464: ; -return 16 * 256; +endlabel3498: ; +return 16 * CYCLE_UNIT / 2; } /* AND.L (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c0b0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c0b0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27997,7 +28009,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c0b0_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3465; + goto endlabel3499; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -28009,17 +28021,17 @@ unsigned long REGPARAM2 CPUFUNC(op_c0b0_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (src); }}}}} m68k_incpc (regs, 4); -endlabel3465: ; -return 18 * 256; +endlabel3499: ; +return 18 * CYCLE_UNIT / 2; } /* AND.L (xxx).W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c0b8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c0b8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3466; + goto endlabel3500; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -28031,17 +28043,17 @@ unsigned long REGPARAM2 CPUFUNC(op_c0b8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (src); }}}}} m68k_incpc (regs, 4); -endlabel3466: ; -return 16 * 256; +endlabel3500: ; +return 16 * CYCLE_UNIT / 2; } /* AND.L (xxx).L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c0b9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c0b9_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3467; + goto endlabel3501; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -28053,18 +28065,18 @@ unsigned long REGPARAM2 CPUFUNC(op_c0b9_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); m68k_dreg(regs, dstreg) = (src); }}}}} m68k_incpc (regs, 6); -endlabel3467: ; -return 20 * 256; +endlabel3501: ; +return 20 * CYCLE_UNIT / 2; } /* AND.L (d16,PC),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c0ba_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c0ba_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3468; + goto endlabel3502; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -28076,11 +28088,11 @@ unsigned long REGPARAM2 CPUFUNC(op_c0ba_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (src); }}}}} m68k_incpc (regs, 4); -endlabel3468: ; -return 16 * 256; +endlabel3502: ; +return 16 * CYCLE_UNIT / 2; } /* AND.L (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c0bb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c0bb_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -28089,7 +28101,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c0bb_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3469; + goto endlabel3503; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -28101,11 +28113,11 @@ unsigned long REGPARAM2 CPUFUNC(op_c0bb_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); m68k_dreg(regs, dstreg) = (src); }}}}} m68k_incpc (regs, 4); -endlabel3469: ; -return 18 * 256; +endlabel3503: ; +return 18 * CYCLE_UNIT / 2; } /* AND.L #.L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c0bc_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c0bc_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); @@ -28118,10 +28130,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c0bc_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); m68k_dreg(regs, dstreg) = (src); }}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* MULU.W Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c0c0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c0c0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -28135,17 +28147,17 @@ unsigned long REGPARAM2 CPUFUNC(op_c0c0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); m68k_incpc (regs, 2); -}}}}return 58 * 256; +}}}}return 58 * CYCLE_UNIT / 2; } /* MULU.W (An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c0d0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c0d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3472; + goto endlabel3506; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -28157,18 +28169,18 @@ unsigned long REGPARAM2 CPUFUNC(op_c0d0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); m68k_incpc (regs, 2); -}}}}}}endlabel3472: ; -return 62 * 256; +}}}}}}endlabel3506: ; +return 62 * CYCLE_UNIT / 2; } /* MULU.W (An)+,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c0d8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c0d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3473; + goto endlabel3507; } {{ uae_s16 src = get_word (srca); m68k_areg(regs, srcreg) += 2; @@ -28181,11 +28193,11 @@ unsigned long REGPARAM2 CPUFUNC(op_c0d8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); m68k_incpc (regs, 2); -}}}}}}endlabel3473: ; -return 62 * 256; +}}}}}}endlabel3507: ; +return 62 * CYCLE_UNIT / 2; } /* MULU.W -(An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c0e0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c0e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -28193,7 +28205,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c0e0_5)(uae_u32 opcode, struct regstruct *reg srca = m68k_areg(regs, srcreg) - 2; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3474; + goto endlabel3508; } {{ uae_s16 src = get_word (srca); m68k_areg (regs, srcreg) = srca; @@ -28206,18 +28218,18 @@ unsigned long REGPARAM2 CPUFUNC(op_c0e0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); m68k_incpc (regs, 2); -}}}}}}endlabel3474: ; -return 64 * 256; +}}}}}}endlabel3508: ; +return 64 * CYCLE_UNIT / 2; } /* MULU.W (d16,An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c0e8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c0e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3475; + goto endlabel3509; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -28229,11 +28241,11 @@ unsigned long REGPARAM2 CPUFUNC(op_c0e8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); m68k_incpc (regs, 4); -}}}}}}endlabel3475: ; -return 66 * 256; +}}}}}}endlabel3509: ; +return 66 * CYCLE_UNIT / 2; } /* MULU.W (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c0f0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c0f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -28241,7 +28253,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c0f0_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3476; + goto endlabel3510; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -28253,17 +28265,17 @@ unsigned long REGPARAM2 CPUFUNC(op_c0f0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); m68k_incpc (regs, 4); -}}}}}}endlabel3476: ; -return 68 * 256; +}}}}}}endlabel3510: ; +return 68 * CYCLE_UNIT / 2; } /* MULU.W (xxx).W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c0f8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c0f8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3477; + goto endlabel3511; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -28275,17 +28287,17 @@ unsigned long REGPARAM2 CPUFUNC(op_c0f8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); m68k_incpc (regs, 4); -}}}}}}endlabel3477: ; -return 66 * 256; +}}}}}}endlabel3511: ; +return 66 * CYCLE_UNIT / 2; } /* MULU.W (xxx).L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c0f9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c0f9_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3478; + goto endlabel3512; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -28297,18 +28309,18 @@ unsigned long REGPARAM2 CPUFUNC(op_c0f9_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); m68k_incpc (regs, 6); -}}}}}}endlabel3478: ; -return 70 * 256; +}}}}}}endlabel3512: ; +return 70 * CYCLE_UNIT / 2; } /* MULU.W (d16,PC),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c0fa_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c0fa_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3479; + goto endlabel3513; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -28320,11 +28332,11 @@ unsigned long REGPARAM2 CPUFUNC(op_c0fa_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); m68k_incpc (regs, 4); -}}}}}}endlabel3479: ; -return 66 * 256; +}}}}}}endlabel3513: ; +return 66 * CYCLE_UNIT / 2; } /* MULU.W (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c0fb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c0fb_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -28333,7 +28345,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c0fb_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3480; + goto endlabel3514; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -28345,11 +28357,11 @@ unsigned long REGPARAM2 CPUFUNC(op_c0fb_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); m68k_incpc (regs, 4); -}}}}}}endlabel3480: ; -return 68 * 256; +}}}}}}endlabel3514: ; +return 68 * CYCLE_UNIT / 2; } /* MULU.W #.W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c0fc_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c0fc_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -28362,10 +28374,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c0fc_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); m68k_incpc (regs, 4); -}}}}return 62 * 256; +}}}}return 62 * CYCLE_UNIT / 2; } /* ABCD.B Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c100_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c100_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -28388,10 +28400,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c100_5)(uae_u32 opcode, struct regstruct *reg SET_VFLG (®s->ccrflags, (tmp_newv & 0x80) == 0 && (newv & 0x80) != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ABCD.B -(An),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_c108_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c108_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -28420,10 +28432,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c108_5)(uae_u32 opcode, struct regstruct *reg SET_VFLG (®s->ccrflags, (tmp_newv & 0x80) == 0 && (newv & 0x80) != 0); put_byte (dsta,newv); }}}}}} m68k_incpc (regs, 2); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* AND.B Dn,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_c110_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c110_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28438,10 +28450,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c110_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); put_byte (dsta,src); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* AND.B Dn,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_c118_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c118_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28457,10 +28469,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c118_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); put_byte (dsta,src); }}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* AND.B Dn,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_c120_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c120_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28477,10 +28489,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c120_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); put_byte (dsta,src); }}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* AND.B Dn,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_c128_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c128_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28495,10 +28507,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c128_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); put_byte (dsta,src); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* AND.B Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_c130_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c130_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28514,10 +28526,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c130_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); put_byte (dsta,src); }}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* AND.B Dn,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_c138_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c138_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -28531,10 +28543,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c138_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); put_byte (dsta,src); }}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* AND.B Dn,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_c139_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c139_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -28548,10 +28560,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c139_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); put_byte (dsta,src); }}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* EXG.L Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c140_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c140_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28562,10 +28574,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c140_5)(uae_u32 opcode, struct regstruct *reg m68k_dreg(regs, srcreg) = (dst); m68k_dreg(regs, dstreg) = (src); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* EXG.L An,An */ -unsigned long REGPARAM2 CPUFUNC(op_c148_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c148_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28576,10 +28588,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c148_5)(uae_u32 opcode, struct regstruct *reg m68k_areg(regs, srcreg) = (dst); m68k_areg(regs, dstreg) = (src); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* AND.W Dn,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_c150_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c150_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28587,7 +28599,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c150_5)(uae_u32 opcode, struct regstruct *reg { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3493; + goto endlabel3527; } {{ uae_s16 dst = get_word (dsta); src &= dst; @@ -28598,11 +28610,11 @@ unsigned long REGPARAM2 CPUFUNC(op_c150_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); put_word (dsta,src); }}}}} m68k_incpc (regs, 2); -endlabel3493: ; -return 12 * 256; +endlabel3527: ; +return 12 * CYCLE_UNIT / 2; } /* AND.W Dn,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_c158_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c158_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28610,7 +28622,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c158_5)(uae_u32 opcode, struct regstruct *reg { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3494; + goto endlabel3528; } {{ uae_s16 dst = get_word (dsta); m68k_areg(regs, dstreg) += 2; @@ -28622,11 +28634,11 @@ unsigned long REGPARAM2 CPUFUNC(op_c158_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); put_word (dsta,src); }}}}} m68k_incpc (regs, 2); -endlabel3494: ; -return 12 * 256; +endlabel3528: ; +return 12 * CYCLE_UNIT / 2; } /* AND.W Dn,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_c160_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c160_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28635,7 +28647,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c160_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, dstreg) - 2; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3495; + goto endlabel3529; } {{ uae_s16 dst = get_word (dsta); m68k_areg (regs, dstreg) = dsta; @@ -28647,11 +28659,11 @@ unsigned long REGPARAM2 CPUFUNC(op_c160_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); put_word (dsta,src); }}}}} m68k_incpc (regs, 2); -endlabel3495: ; -return 14 * 256; +endlabel3529: ; +return 14 * CYCLE_UNIT / 2; } /* AND.W Dn,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_c168_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c168_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28659,7 +28671,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c168_5)(uae_u32 opcode, struct regstruct *reg { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3496; + goto endlabel3530; } {{ uae_s16 dst = get_word (dsta); src &= dst; @@ -28670,11 +28682,11 @@ unsigned long REGPARAM2 CPUFUNC(op_c168_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); put_word (dsta,src); }}}}} m68k_incpc (regs, 4); -endlabel3496: ; -return 16 * 256; +endlabel3530: ; +return 16 * CYCLE_UNIT / 2; } /* AND.W Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_c170_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c170_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28683,7 +28695,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c170_5)(uae_u32 opcode, struct regstruct *reg dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3497; + goto endlabel3531; } {{ uae_s16 dst = get_word (dsta); src &= dst; @@ -28694,18 +28706,18 @@ unsigned long REGPARAM2 CPUFUNC(op_c170_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); put_word (dsta,src); }}}}} m68k_incpc (regs, 4); -endlabel3497: ; -return 18 * 256; +endlabel3531: ; +return 18 * CYCLE_UNIT / 2; } /* AND.W Dn,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_c178_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c178_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3498; + goto endlabel3532; } {{ uae_s16 dst = get_word (dsta); src &= dst; @@ -28716,18 +28728,18 @@ unsigned long REGPARAM2 CPUFUNC(op_c178_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); put_word (dsta,src); }}}}} m68k_incpc (regs, 4); -endlabel3498: ; -return 16 * 256; +endlabel3532: ; +return 16 * CYCLE_UNIT / 2; } /* AND.W Dn,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_c179_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c179_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_long_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3499; + goto endlabel3533; } {{ uae_s16 dst = get_word (dsta); src &= dst; @@ -28738,11 +28750,11 @@ unsigned long REGPARAM2 CPUFUNC(op_c179_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); put_word (dsta,src); }}}}} m68k_incpc (regs, 6); -endlabel3499: ; -return 20 * 256; +endlabel3533: ; +return 20 * CYCLE_UNIT / 2; } /* EXG.L Dn,An */ -unsigned long REGPARAM2 CPUFUNC(op_c188_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c188_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28753,10 +28765,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c188_5)(uae_u32 opcode, struct regstruct *reg m68k_dreg(regs, srcreg) = (dst); m68k_areg(regs, dstreg) = (src); }}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* AND.L Dn,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_c190_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c190_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28764,7 +28776,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c190_5)(uae_u32 opcode, struct regstruct *reg { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3501; + goto endlabel3535; } {{ uae_s32 dst = get_long (dsta); src &= dst; @@ -28775,11 +28787,11 @@ unsigned long REGPARAM2 CPUFUNC(op_c190_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); put_long (dsta,src); }}}}} m68k_incpc (regs, 2); -endlabel3501: ; -return 20 * 256; +endlabel3535: ; +return 20 * CYCLE_UNIT / 2; } /* AND.L Dn,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_c198_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c198_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28787,7 +28799,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c198_5)(uae_u32 opcode, struct regstruct *reg { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3502; + goto endlabel3536; } {{ uae_s32 dst = get_long (dsta); m68k_areg(regs, dstreg) += 4; @@ -28799,11 +28811,11 @@ unsigned long REGPARAM2 CPUFUNC(op_c198_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); put_long (dsta,src); }}}}} m68k_incpc (regs, 2); -endlabel3502: ; -return 20 * 256; +endlabel3536: ; +return 20 * CYCLE_UNIT / 2; } /* AND.L Dn,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_c1a0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c1a0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28812,7 +28824,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c1a0_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, dstreg) - 4; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3503; + goto endlabel3537; } {{ uae_s32 dst = get_long (dsta); m68k_areg (regs, dstreg) = dsta; @@ -28824,11 +28836,11 @@ unsigned long REGPARAM2 CPUFUNC(op_c1a0_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 4); put_long (dsta,src); }}}}} m68k_incpc (regs, 2); -endlabel3503: ; -return 22 * 256; +endlabel3537: ; +return 22 * CYCLE_UNIT / 2; } /* AND.L Dn,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_c1a8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c1a8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28836,7 +28848,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c1a8_5)(uae_u32 opcode, struct regstruct *reg { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3504; + goto endlabel3538; } {{ uae_s32 dst = get_long (dsta); src &= dst; @@ -28847,11 +28859,11 @@ unsigned long REGPARAM2 CPUFUNC(op_c1a8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); put_long (dsta,src); }}}}} m68k_incpc (regs, 4); -endlabel3504: ; -return 24 * 256; +endlabel3538: ; +return 24 * CYCLE_UNIT / 2; } /* AND.L Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_c1b0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c1b0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28860,7 +28872,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c1b0_5)(uae_u32 opcode, struct regstruct *reg dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3505; + goto endlabel3539; } {{ uae_s32 dst = get_long (dsta); src &= dst; @@ -28871,18 +28883,18 @@ unsigned long REGPARAM2 CPUFUNC(op_c1b0_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); put_long (dsta,src); }}}}} m68k_incpc (regs, 4); -endlabel3505: ; -return 26 * 256; +endlabel3539: ; +return 26 * CYCLE_UNIT / 2; } /* AND.L Dn,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_c1b8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c1b8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3506; + goto endlabel3540; } {{ uae_s32 dst = get_long (dsta); src &= dst; @@ -28893,18 +28905,18 @@ unsigned long REGPARAM2 CPUFUNC(op_c1b8_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 6); put_long (dsta,src); }}}}} m68k_incpc (regs, 4); -endlabel3506: ; -return 24 * 256; +endlabel3540: ; +return 24 * CYCLE_UNIT / 2; } /* AND.L Dn,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_c1b9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c1b9_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_long_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3507; + goto endlabel3541; } {{ uae_s32 dst = get_long (dsta); src &= dst; @@ -28915,11 +28927,11 @@ unsigned long REGPARAM2 CPUFUNC(op_c1b9_5)(uae_u32 opcode, struct regstruct *reg get_word_prefetch (regs, 8); put_long (dsta,src); }}}}} m68k_incpc (regs, 6); -endlabel3507: ; -return 28 * 256; +endlabel3541: ; +return 28 * CYCLE_UNIT / 2; } /* MULS.W Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c1c0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c1c0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -28933,17 +28945,17 @@ unsigned long REGPARAM2 CPUFUNC(op_c1c0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 2); -return 58 * 256; +return 58 * CYCLE_UNIT / 2; } /* MULS.W (An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c1d0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c1d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3509; + goto endlabel3543; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -28955,18 +28967,18 @@ unsigned long REGPARAM2 CPUFUNC(op_c1d0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 2); -endlabel3509: ; -return 62 * 256; +endlabel3543: ; +return 62 * CYCLE_UNIT / 2; } /* MULS.W (An)+,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c1d8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c1d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3510; + goto endlabel3544; } {{ uae_s16 src = get_word (srca); m68k_areg(regs, srcreg) += 2; @@ -28979,11 +28991,11 @@ unsigned long REGPARAM2 CPUFUNC(op_c1d8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 2); -endlabel3510: ; -return 62 * 256; +endlabel3544: ; +return 62 * CYCLE_UNIT / 2; } /* MULS.W -(An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c1e0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c1e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -28991,7 +29003,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c1e0_5)(uae_u32 opcode, struct regstruct *reg srca = m68k_areg(regs, srcreg) - 2; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3511; + goto endlabel3545; } {{ uae_s16 src = get_word (srca); m68k_areg (regs, srcreg) = srca; @@ -29004,18 +29016,18 @@ unsigned long REGPARAM2 CPUFUNC(op_c1e0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 2); -endlabel3511: ; -return 64 * 256; +endlabel3545: ; +return 64 * CYCLE_UNIT / 2; } /* MULS.W (d16,An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c1e8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c1e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3512; + goto endlabel3546; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -29027,11 +29039,11 @@ unsigned long REGPARAM2 CPUFUNC(op_c1e8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 4); -endlabel3512: ; -return 66 * 256; +endlabel3546: ; +return 66 * CYCLE_UNIT / 2; } /* MULS.W (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c1f0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c1f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -29039,7 +29051,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c1f0_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3513; + goto endlabel3547; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -29051,17 +29063,17 @@ unsigned long REGPARAM2 CPUFUNC(op_c1f0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 4); -endlabel3513: ; -return 68 * 256; +endlabel3547: ; +return 68 * CYCLE_UNIT / 2; } /* MULS.W (xxx).W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c1f8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c1f8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3514; + goto endlabel3548; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -29073,17 +29085,17 @@ unsigned long REGPARAM2 CPUFUNC(op_c1f8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 4); -endlabel3514: ; -return 66 * 256; +endlabel3548: ; +return 66 * CYCLE_UNIT / 2; } /* MULS.W (xxx).L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c1f9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c1f9_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3515; + goto endlabel3549; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -29095,18 +29107,18 @@ unsigned long REGPARAM2 CPUFUNC(op_c1f9_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 6); -endlabel3515: ; -return 70 * 256; +endlabel3549: ; +return 70 * CYCLE_UNIT / 2; } /* MULS.W (d16,PC),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c1fa_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c1fa_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3516; + goto endlabel3550; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -29118,11 +29130,11 @@ unsigned long REGPARAM2 CPUFUNC(op_c1fa_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 4); -endlabel3516: ; -return 66 * 256; +endlabel3550: ; +return 66 * CYCLE_UNIT / 2; } /* MULS.W (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c1fb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c1fb_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -29131,7 +29143,7 @@ unsigned long REGPARAM2 CPUFUNC(op_c1fb_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3517; + goto endlabel3551; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -29143,11 +29155,11 @@ unsigned long REGPARAM2 CPUFUNC(op_c1fb_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 4); -endlabel3517: ; -return 68 * 256; +endlabel3551: ; +return 68 * CYCLE_UNIT / 2; } /* MULS.W #.W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_c1fc_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_c1fc_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -29160,10 +29172,10 @@ unsigned long REGPARAM2 CPUFUNC(op_c1fc_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 4); -return 62 * 256; +return 62 * CYCLE_UNIT / 2; } /* ADD.B Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d000_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d000_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -29182,10 +29194,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d000_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADD.B (An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d010_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d010_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -29205,10 +29217,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d010_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* ADD.B (An)+,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d018_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d018_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -29229,10 +29241,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d018_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 2); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* ADD.B -(An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d020_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d020_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -29254,10 +29266,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d020_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 2); -return 10 * 256; +return 10 * CYCLE_UNIT / 2; } /* ADD.B (d16,An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d028_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d028_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -29277,10 +29289,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d028_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADD.B (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d030_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d030_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -29301,10 +29313,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d030_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* ADD.B (xxx).W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d038_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d038_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); @@ -29323,10 +29335,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d038_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADD.B (xxx).L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d039_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d039_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); @@ -29345,10 +29357,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d039_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 6); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ADD.B (d16,PC),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d03a_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d03a_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; @@ -29368,10 +29380,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d03a_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADD.B (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d03b_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d03b_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -29393,10 +29405,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d03b_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}} m68k_incpc (regs, 4); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* ADD.B #.B,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d03c_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d03c_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); @@ -29414,10 +29426,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d03c_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}} m68k_incpc (regs, 4); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADD.W Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d040_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d040_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -29436,10 +29448,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d040_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADD.W An,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d048_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d048_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -29458,17 +29470,17 @@ unsigned long REGPARAM2 CPUFUNC(op_d048_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADD.W (An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d050_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d050_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3532; + goto endlabel3566; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -29485,18 +29497,18 @@ unsigned long REGPARAM2 CPUFUNC(op_d050_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}} m68k_incpc (regs, 2); -endlabel3532: ; -return 8 * 256; +endlabel3566: ; +return 8 * CYCLE_UNIT / 2; } /* ADD.W (An)+,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d058_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d058_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3533; + goto endlabel3567; } {{ uae_s16 src = get_word (srca); m68k_areg(regs, srcreg) += 2; @@ -29514,11 +29526,11 @@ unsigned long REGPARAM2 CPUFUNC(op_d058_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}} m68k_incpc (regs, 2); -endlabel3533: ; -return 8 * 256; +endlabel3567: ; +return 8 * CYCLE_UNIT / 2; } /* ADD.W -(An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d060_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d060_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -29526,7 +29538,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d060_5)(uae_u32 opcode, struct regstruct *reg srca = m68k_areg(regs, srcreg) - 2; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3534; + goto endlabel3568; } {{ uae_s16 src = get_word (srca); m68k_areg (regs, srcreg) = srca; @@ -29544,18 +29556,18 @@ unsigned long REGPARAM2 CPUFUNC(op_d060_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}} m68k_incpc (regs, 2); -endlabel3534: ; -return 10 * 256; +endlabel3568: ; +return 10 * CYCLE_UNIT / 2; } /* ADD.W (d16,An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d068_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d068_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3535; + goto endlabel3569; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -29572,11 +29584,11 @@ unsigned long REGPARAM2 CPUFUNC(op_d068_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}} m68k_incpc (regs, 4); -endlabel3535: ; -return 12 * 256; +endlabel3569: ; +return 12 * CYCLE_UNIT / 2; } /* ADD.W (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d070_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d070_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -29584,7 +29596,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d070_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3536; + goto endlabel3570; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -29601,17 +29613,17 @@ unsigned long REGPARAM2 CPUFUNC(op_d070_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}} m68k_incpc (regs, 4); -endlabel3536: ; -return 14 * 256; +endlabel3570: ; +return 14 * CYCLE_UNIT / 2; } /* ADD.W (xxx).W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d078_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d078_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3537; + goto endlabel3571; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -29628,17 +29640,17 @@ unsigned long REGPARAM2 CPUFUNC(op_d078_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}} m68k_incpc (regs, 4); -endlabel3537: ; -return 12 * 256; +endlabel3571: ; +return 12 * CYCLE_UNIT / 2; } /* ADD.W (xxx).L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d079_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d079_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3538; + goto endlabel3572; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -29655,18 +29667,18 @@ unsigned long REGPARAM2 CPUFUNC(op_d079_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}} m68k_incpc (regs, 6); -endlabel3538: ; -return 16 * 256; +endlabel3572: ; +return 16 * CYCLE_UNIT / 2; } /* ADD.W (d16,PC),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d07a_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d07a_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3539; + goto endlabel3573; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -29683,11 +29695,11 @@ unsigned long REGPARAM2 CPUFUNC(op_d07a_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}} m68k_incpc (regs, 4); -endlabel3539: ; -return 12 * 256; +endlabel3573: ; +return 12 * CYCLE_UNIT / 2; } /* ADD.W (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d07b_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d07b_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -29696,7 +29708,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d07b_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3540; + goto endlabel3574; } {{ uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg(regs, dstreg); @@ -29713,11 +29725,11 @@ unsigned long REGPARAM2 CPUFUNC(op_d07b_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}} m68k_incpc (regs, 4); -endlabel3540: ; -return 14 * 256; +endlabel3574: ; +return 14 * CYCLE_UNIT / 2; } /* ADD.W #.W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d07c_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d07c_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -29735,10 +29747,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d07c_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* ADD.L Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d080_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d080_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -29757,10 +29769,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d080_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADD.L An,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d088_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d088_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -29779,17 +29791,17 @@ unsigned long REGPARAM2 CPUFUNC(op_d088_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADD.L (An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d090_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d090_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3544; + goto endlabel3578; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -29806,18 +29818,18 @@ unsigned long REGPARAM2 CPUFUNC(op_d090_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}} m68k_incpc (regs, 2); -endlabel3544: ; -return 12 * 256; +endlabel3578: ; +return 12 * CYCLE_UNIT / 2; } /* ADD.L (An)+,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d098_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d098_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3545; + goto endlabel3579; } {{ uae_s32 src = get_long (srca); m68k_areg(regs, srcreg) += 4; @@ -29835,11 +29847,11 @@ unsigned long REGPARAM2 CPUFUNC(op_d098_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}} m68k_incpc (regs, 2); -endlabel3545: ; -return 12 * 256; +endlabel3579: ; +return 12 * CYCLE_UNIT / 2; } /* ADD.L -(An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d0a0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d0a0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -29847,7 +29859,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d0a0_5)(uae_u32 opcode, struct regstruct *reg srca = m68k_areg(regs, srcreg) - 4; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3546; + goto endlabel3580; } {{ uae_s32 src = get_long (srca); m68k_areg (regs, srcreg) = srca; @@ -29865,18 +29877,18 @@ unsigned long REGPARAM2 CPUFUNC(op_d0a0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}} m68k_incpc (regs, 2); -endlabel3546: ; -return 14 * 256; +endlabel3580: ; +return 14 * CYCLE_UNIT / 2; } /* ADD.L (d16,An),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d0a8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d0a8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3547; + goto endlabel3581; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -29893,11 +29905,11 @@ unsigned long REGPARAM2 CPUFUNC(op_d0a8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel3547: ; -return 16 * 256; +endlabel3581: ; +return 16 * CYCLE_UNIT / 2; } /* ADD.L (d8,An,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d0b0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d0b0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -29905,7 +29917,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d0b0_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3548; + goto endlabel3582; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -29922,17 +29934,17 @@ unsigned long REGPARAM2 CPUFUNC(op_d0b0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel3548: ; -return 18 * 256; +endlabel3582: ; +return 18 * CYCLE_UNIT / 2; } /* ADD.L (xxx).W,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d0b8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d0b8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3549; + goto endlabel3583; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -29949,17 +29961,17 @@ unsigned long REGPARAM2 CPUFUNC(op_d0b8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel3549: ; -return 16 * 256; +endlabel3583: ; +return 16 * CYCLE_UNIT / 2; } /* ADD.L (xxx).L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d0b9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d0b9_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3550; + goto endlabel3584; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -29976,18 +29988,18 @@ unsigned long REGPARAM2 CPUFUNC(op_d0b9_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}} m68k_incpc (regs, 6); -endlabel3550: ; -return 20 * 256; +endlabel3584: ; +return 20 * CYCLE_UNIT / 2; } /* ADD.L (d16,PC),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d0ba_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d0ba_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3551; + goto endlabel3585; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -30004,11 +30016,11 @@ unsigned long REGPARAM2 CPUFUNC(op_d0ba_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel3551: ; -return 16 * 256; +endlabel3585: ; +return 16 * CYCLE_UNIT / 2; } /* ADD.L (d8,PC,Xn),Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d0bb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d0bb_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -30017,7 +30029,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d0bb_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3552; + goto endlabel3586; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg(regs, dstreg); @@ -30034,11 +30046,11 @@ unsigned long REGPARAM2 CPUFUNC(op_d0bb_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel3552: ; -return 18 * 256; +endlabel3586: ; +return 18 * CYCLE_UNIT / 2; } /* ADD.L #.L,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d0bc_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d0bc_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); @@ -30056,10 +30068,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d0bc_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADDA.W Dn,An */ -unsigned long REGPARAM2 CPUFUNC(op_d0c0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d0c0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -30070,10 +30082,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d0c0_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADDA.W An,An */ -unsigned long REGPARAM2 CPUFUNC(op_d0c8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d0c8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -30084,17 +30096,17 @@ unsigned long REGPARAM2 CPUFUNC(op_d0c8_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADDA.W (An),An */ -unsigned long REGPARAM2 CPUFUNC(op_d0d0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d0d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3556; + goto endlabel3590; } {{ uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -30103,18 +30115,18 @@ unsigned long REGPARAM2 CPUFUNC(op_d0d0_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 2); -endlabel3556: ; -return 8 * 256; +endlabel3590: ; +return 8 * CYCLE_UNIT / 2; } /* ADDA.W (An)+,An */ -unsigned long REGPARAM2 CPUFUNC(op_d0d8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d0d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3557; + goto endlabel3591; } {{ uae_s16 src = get_word (srca); m68k_areg(regs, srcreg) += 2; @@ -30124,11 +30136,11 @@ unsigned long REGPARAM2 CPUFUNC(op_d0d8_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 2); -endlabel3557: ; -return 8 * 256; +endlabel3591: ; +return 8 * CYCLE_UNIT / 2; } /* ADDA.W -(An),An */ -unsigned long REGPARAM2 CPUFUNC(op_d0e0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d0e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -30136,7 +30148,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d0e0_5)(uae_u32 opcode, struct regstruct *reg srca = m68k_areg(regs, srcreg) - 2; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3558; + goto endlabel3592; } {{ uae_s16 src = get_word (srca); m68k_areg (regs, srcreg) = srca; @@ -30146,18 +30158,18 @@ unsigned long REGPARAM2 CPUFUNC(op_d0e0_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 2); -endlabel3558: ; -return 10 * 256; +endlabel3592: ; +return 10 * CYCLE_UNIT / 2; } /* ADDA.W (d16,An),An */ -unsigned long REGPARAM2 CPUFUNC(op_d0e8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d0e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3559; + goto endlabel3593; } {{ uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -30166,11 +30178,11 @@ unsigned long REGPARAM2 CPUFUNC(op_d0e8_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 4); -endlabel3559: ; -return 12 * 256; +endlabel3593: ; +return 12 * CYCLE_UNIT / 2; } /* ADDA.W (d8,An,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_d0f0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d0f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -30178,7 +30190,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d0f0_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3560; + goto endlabel3594; } {{ uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -30187,17 +30199,17 @@ unsigned long REGPARAM2 CPUFUNC(op_d0f0_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 4); -endlabel3560: ; -return 14 * 256; +endlabel3594: ; +return 14 * CYCLE_UNIT / 2; } /* ADDA.W (xxx).W,An */ -unsigned long REGPARAM2 CPUFUNC(op_d0f8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d0f8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3561; + goto endlabel3595; } {{ uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -30206,17 +30218,17 @@ unsigned long REGPARAM2 CPUFUNC(op_d0f8_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 4); -endlabel3561: ; -return 12 * 256; +endlabel3595: ; +return 12 * CYCLE_UNIT / 2; } /* ADDA.W (xxx).L,An */ -unsigned long REGPARAM2 CPUFUNC(op_d0f9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d0f9_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3562; + goto endlabel3596; } {{ uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -30225,18 +30237,18 @@ unsigned long REGPARAM2 CPUFUNC(op_d0f9_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 6); -endlabel3562: ; -return 16 * 256; +endlabel3596: ; +return 16 * CYCLE_UNIT / 2; } /* ADDA.W (d16,PC),An */ -unsigned long REGPARAM2 CPUFUNC(op_d0fa_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d0fa_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3563; + goto endlabel3597; } {{ uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -30245,11 +30257,11 @@ unsigned long REGPARAM2 CPUFUNC(op_d0fa_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 4); -endlabel3563: ; -return 12 * 256; +endlabel3597: ; +return 12 * CYCLE_UNIT / 2; } /* ADDA.W (d8,PC,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_d0fb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d0fb_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -30258,7 +30270,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d0fb_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3564; + goto endlabel3598; } {{ uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -30267,11 +30279,11 @@ unsigned long REGPARAM2 CPUFUNC(op_d0fb_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 4); -endlabel3564: ; -return 14 * 256; +endlabel3598: ; +return 14 * CYCLE_UNIT / 2; } /* ADDA.W #.W,An */ -unsigned long REGPARAM2 CPUFUNC(op_d0fc_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d0fc_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s16 src = get_word_prefetch (regs, 4); @@ -30281,10 +30293,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d0fc_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 4); -return 8 * 256; +return 8 * CYCLE_UNIT / 2; } /* ADDX.B Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d100_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d100_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -30303,10 +30315,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d100_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADDX.B -(An),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_d108_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d108_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -30331,10 +30343,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d108_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(newv)) < 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ADD.B Dn,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_d110_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d110_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -30354,10 +30366,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d110_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADD.B Dn,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_d118_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d118_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -30378,10 +30390,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d118_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ADD.B Dn,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_d120_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d120_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -30403,10 +30415,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d120_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 2); -return 14 * 256; +return 14 * CYCLE_UNIT / 2; } /* ADD.B Dn,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_d128_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d128_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -30426,10 +30438,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d128_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ADD.B Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_d130_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d130_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -30450,10 +30462,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d130_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 18 * 256; +return 18 * CYCLE_UNIT / 2; } /* ADD.B Dn,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_d138_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d138_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -30472,10 +30484,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d138_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 4); -return 16 * 256; +return 16 * CYCLE_UNIT / 2; } /* ADD.B Dn,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_d139_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d139_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); {{ uae_s8 src = m68k_dreg (regs, srcreg); @@ -30494,10 +30506,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d139_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_byte (dsta,newv); }}}}}}} m68k_incpc (regs, 6); -return 20 * 256; +return 20 * CYCLE_UNIT / 2; } /* ADDX.W Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d140_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d140_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -30516,10 +30528,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d140_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADDX.W -(An),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_d148_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d148_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -30527,7 +30539,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d148_5)(uae_u32 opcode, struct regstruct *reg srca = m68k_areg(regs, srcreg) - 2; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3576; + goto endlabel3610; } {{ uae_s16 src = get_word (srca); m68k_areg (regs, srcreg) = srca; @@ -30535,7 +30547,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d148_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, dstreg) - 2; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3576; + goto endlabel3610; } {{ uae_s16 dst = get_word (dsta); m68k_areg (regs, dstreg) = dsta; @@ -30552,11 +30564,11 @@ unsigned long REGPARAM2 CPUFUNC(op_d148_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(newv)) < 0); put_word (dsta,newv); }}}}}}}}} m68k_incpc (regs, 2); -endlabel3576: ; -return 16 * 256; +endlabel3610: ; +return 16 * CYCLE_UNIT / 2; } /* ADD.W Dn,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_d150_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d150_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -30564,7 +30576,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d150_5)(uae_u32 opcode, struct regstruct *reg { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3577; + goto endlabel3611; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -30580,11 +30592,11 @@ unsigned long REGPARAM2 CPUFUNC(op_d150_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 2); -endlabel3577: ; -return 12 * 256; +endlabel3611: ; +return 12 * CYCLE_UNIT / 2; } /* ADD.W Dn,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_d158_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d158_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -30592,7 +30604,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d158_5)(uae_u32 opcode, struct regstruct *reg { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3578; + goto endlabel3612; } {{ uae_s16 dst = get_word (dsta); m68k_areg(regs, dstreg) += 2; @@ -30609,11 +30621,11 @@ unsigned long REGPARAM2 CPUFUNC(op_d158_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 2); -endlabel3578: ; -return 12 * 256; +endlabel3612: ; +return 12 * CYCLE_UNIT / 2; } /* ADD.W Dn,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_d160_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d160_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -30622,7 +30634,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d160_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, dstreg) - 2; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3579; + goto endlabel3613; } {{ uae_s16 dst = get_word (dsta); m68k_areg (regs, dstreg) = dsta; @@ -30639,11 +30651,11 @@ unsigned long REGPARAM2 CPUFUNC(op_d160_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 2); -endlabel3579: ; -return 14 * 256; +endlabel3613: ; +return 14 * CYCLE_UNIT / 2; } /* ADD.W Dn,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_d168_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d168_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -30651,7 +30663,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d168_5)(uae_u32 opcode, struct regstruct *reg { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3580; + goto endlabel3614; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -30667,11 +30679,11 @@ unsigned long REGPARAM2 CPUFUNC(op_d168_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel3580: ; -return 16 * 256; +endlabel3614: ; +return 16 * CYCLE_UNIT / 2; } /* ADD.W Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_d170_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d170_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -30680,7 +30692,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d170_5)(uae_u32 opcode, struct regstruct *reg dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3581; + goto endlabel3615; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -30696,18 +30708,18 @@ unsigned long REGPARAM2 CPUFUNC(op_d170_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel3581: ; -return 18 * 256; +endlabel3615: ; +return 18 * CYCLE_UNIT / 2; } /* ADD.W Dn,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_d178_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d178_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3582; + goto endlabel3616; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -30723,18 +30735,18 @@ unsigned long REGPARAM2 CPUFUNC(op_d178_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel3582: ; -return 16 * 256; +endlabel3616: ; +return 16 * CYCLE_UNIT / 2; } /* ADD.W Dn,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_d179_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d179_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_long_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3583; + goto endlabel3617; } {{ uae_s16 dst = get_word (dsta); regs->ir = regs->irc; @@ -30750,11 +30762,11 @@ unsigned long REGPARAM2 CPUFUNC(op_d179_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_word (dsta,newv); }}}}}}}} m68k_incpc (regs, 6); -endlabel3583: ; -return 20 * 256; +endlabel3617: ; +return 20 * CYCLE_UNIT / 2; } /* ADDX.L Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_d180_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d180_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -30773,10 +30785,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d180_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); }}}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADDX.L -(An),-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_d188_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d188_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -30784,7 +30796,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d188_5)(uae_u32 opcode, struct regstruct *reg srca = m68k_areg(regs, srcreg) - 4; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3585; + goto endlabel3619; } {{ uae_s32 src = get_long (srca); m68k_areg (regs, srcreg) = srca; @@ -30792,7 +30804,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d188_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, dstreg) - 4; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3585; + goto endlabel3619; } {{ uae_s32 dst = get_long (dsta); m68k_areg (regs, dstreg) = dsta; @@ -30809,11 +30821,11 @@ unsigned long REGPARAM2 CPUFUNC(op_d188_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(newv)) < 0); put_long (dsta,newv); }}}}}}}}} m68k_incpc (regs, 2); -endlabel3585: ; -return 28 * 256; +endlabel3619: ; +return 28 * CYCLE_UNIT / 2; } /* ADD.L Dn,(An) */ -unsigned long REGPARAM2 CPUFUNC(op_d190_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d190_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -30821,7 +30833,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d190_5)(uae_u32 opcode, struct regstruct *reg { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3586; + goto endlabel3620; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -30837,11 +30849,11 @@ unsigned long REGPARAM2 CPUFUNC(op_d190_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 2); -endlabel3586: ; -return 20 * 256; +endlabel3620: ; +return 20 * CYCLE_UNIT / 2; } /* ADD.L Dn,(An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_d198_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d198_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -30849,7 +30861,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d198_5)(uae_u32 opcode, struct regstruct *reg { uaecptr dsta = m68k_areg(regs, dstreg); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3587; + goto endlabel3621; } {{ uae_s32 dst = get_long (dsta); m68k_areg(regs, dstreg) += 4; @@ -30866,11 +30878,11 @@ unsigned long REGPARAM2 CPUFUNC(op_d198_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 2); -endlabel3587: ; -return 20 * 256; +endlabel3621: ; +return 20 * CYCLE_UNIT / 2; } /* ADD.L Dn,-(An) */ -unsigned long REGPARAM2 CPUFUNC(op_d1a0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d1a0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -30879,7 +30891,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d1a0_5)(uae_u32 opcode, struct regstruct *reg dsta = m68k_areg(regs, dstreg) - 4; if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3588; + goto endlabel3622; } {{ uae_s32 dst = get_long (dsta); m68k_areg (regs, dstreg) = dsta; @@ -30896,11 +30908,11 @@ unsigned long REGPARAM2 CPUFUNC(op_d1a0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 2); -endlabel3588: ; -return 22 * 256; +endlabel3622: ; +return 22 * CYCLE_UNIT / 2; } /* ADD.L Dn,(d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_d1a8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d1a8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -30908,7 +30920,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d1a8_5)(uae_u32 opcode, struct regstruct *reg { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3589; + goto endlabel3623; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -30924,11 +30936,11 @@ unsigned long REGPARAM2 CPUFUNC(op_d1a8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel3589: ; -return 24 * 256; +endlabel3623: ; +return 24 * CYCLE_UNIT / 2; } /* ADD.L Dn,(d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_d1b0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d1b0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -30937,7 +30949,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d1b0_5)(uae_u32 opcode, struct regstruct *reg dsta = get_disp_ea_000(regs, m68k_areg(regs, dstreg), get_word_prefetch (regs, 4)); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3590; + goto endlabel3624; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -30953,18 +30965,18 @@ unsigned long REGPARAM2 CPUFUNC(op_d1b0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel3590: ; -return 26 * 256; +endlabel3624: ; +return 26 * CYCLE_UNIT / 2; } /* ADD.L Dn,(xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_d1b8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d1b8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3591; + goto endlabel3625; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -30980,18 +30992,18 @@ unsigned long REGPARAM2 CPUFUNC(op_d1b8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 4); -endlabel3591: ; -return 24 * 256; +endlabel3625: ; +return 24 * CYCLE_UNIT / 2; } /* ADD.L Dn,(xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_d1b9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d1b9_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_long_prefetch (regs, 4); if (dsta & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dsta); - goto endlabel3592; + goto endlabel3626; } {{ uae_s32 dst = get_long (dsta); regs->ir = regs->irc; @@ -31007,11 +31019,11 @@ unsigned long REGPARAM2 CPUFUNC(op_d1b9_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, flgn != 0); put_long (dsta,newv); }}}}}}}} m68k_incpc (regs, 6); -endlabel3592: ; -return 28 * 256; +endlabel3626: ; +return 28 * CYCLE_UNIT / 2; } /* ADDA.L Dn,An */ -unsigned long REGPARAM2 CPUFUNC(op_d1c0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d1c0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -31022,10 +31034,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d1c0_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADDA.L An,An */ -unsigned long REGPARAM2 CPUFUNC(op_d1c8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d1c8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -31036,17 +31048,17 @@ unsigned long REGPARAM2 CPUFUNC(op_d1c8_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ADDA.L (An),An */ -unsigned long REGPARAM2 CPUFUNC(op_d1d0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d1d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3595; + goto endlabel3629; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -31055,18 +31067,18 @@ unsigned long REGPARAM2 CPUFUNC(op_d1d0_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 2); -endlabel3595: ; -return 12 * 256; +endlabel3629: ; +return 12 * CYCLE_UNIT / 2; } /* ADDA.L (An)+,An */ -unsigned long REGPARAM2 CPUFUNC(op_d1d8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d1d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3596; + goto endlabel3630; } {{ uae_s32 src = get_long (srca); m68k_areg(regs, srcreg) += 4; @@ -31076,14 +31088,11 @@ unsigned long REGPARAM2 CPUFUNC(op_d1d8_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 2); -endlabel3596: ; -return 12 * 256; +endlabel3630: ; +return 12 * CYCLE_UNIT / 2; } -#endif - -#ifdef PART_8 /* ADDA.L -(An),An */ -unsigned long REGPARAM2 CPUFUNC(op_d1e0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d1e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -31091,7 +31100,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d1e0_5)(uae_u32 opcode, struct regstruct *reg srca = m68k_areg(regs, srcreg) - 4; if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3597; + goto endlabel3631; } {{ uae_s32 src = get_long (srca); m68k_areg (regs, srcreg) = srca; @@ -31101,18 +31110,18 @@ unsigned long REGPARAM2 CPUFUNC(op_d1e0_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 2); -endlabel3597: ; -return 14 * 256; +endlabel3631: ; +return 14 * CYCLE_UNIT / 2; } /* ADDA.L (d16,An),An */ -unsigned long REGPARAM2 CPUFUNC(op_d1e8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d1e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3598; + goto endlabel3632; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -31121,11 +31130,11 @@ unsigned long REGPARAM2 CPUFUNC(op_d1e8_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 4); -endlabel3598: ; -return 16 * 256; +endlabel3632: ; +return 16 * CYCLE_UNIT / 2; } /* ADDA.L (d8,An,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_d1f0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d1f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -31133,7 +31142,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d1f0_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3599; + goto endlabel3633; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -31142,17 +31151,17 @@ unsigned long REGPARAM2 CPUFUNC(op_d1f0_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 4); -endlabel3599: ; -return 18 * 256; +endlabel3633: ; +return 18 * CYCLE_UNIT / 2; } /* ADDA.L (xxx).W,An */ -unsigned long REGPARAM2 CPUFUNC(op_d1f8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d1f8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3600; + goto endlabel3634; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -31161,17 +31170,17 @@ unsigned long REGPARAM2 CPUFUNC(op_d1f8_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 4); -endlabel3600: ; -return 16 * 256; +endlabel3634: ; +return 16 * CYCLE_UNIT / 2; } /* ADDA.L (xxx).L,An */ -unsigned long REGPARAM2 CPUFUNC(op_d1f9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d1f9_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = get_long_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3601; + goto endlabel3635; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -31180,18 +31189,18 @@ unsigned long REGPARAM2 CPUFUNC(op_d1f9_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 6); -endlabel3601: ; -return 20 * 256; +endlabel3635: ; +return 20 * CYCLE_UNIT / 2; } /* ADDA.L (d16,PC),An */ -unsigned long REGPARAM2 CPUFUNC(op_d1fa_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d1fa_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca = m68k_getpc (regs) + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3602; + goto endlabel3636; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -31200,11 +31209,11 @@ unsigned long REGPARAM2 CPUFUNC(op_d1fa_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 4); -endlabel3602: ; -return 16 * 256; +endlabel3636: ; +return 16 * CYCLE_UNIT / 2; } /* ADDA.L (d8,PC,Xn),An */ -unsigned long REGPARAM2 CPUFUNC(op_d1fb_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d1fb_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; @@ -31213,7 +31222,7 @@ unsigned long REGPARAM2 CPUFUNC(op_d1fb_5)(uae_u32 opcode, struct regstruct *reg srca = get_disp_ea_000(regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { exception3 (opcode, m68k_getpc(regs) + 2, srca); - goto endlabel3603; + goto endlabel3637; } {{ uae_s32 src = get_long (srca); { uae_s32 dst = m68k_areg(regs, dstreg); @@ -31222,11 +31231,11 @@ unsigned long REGPARAM2 CPUFUNC(op_d1fb_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}} m68k_incpc (regs, 4); -endlabel3603: ; -return 18 * 256; +endlabel3637: ; +return 18 * CYCLE_UNIT / 2; } /* ADDA.L #.L,An */ -unsigned long REGPARAM2 CPUFUNC(op_d1fc_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_d1fc_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uae_s32 src = get_long_prefetch (regs, 4); @@ -31236,10 +31245,10 @@ unsigned long REGPARAM2 CPUFUNC(op_d1fc_5)(uae_u32 opcode, struct regstruct *reg { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}} m68k_incpc (regs, 6); -return 12 * 256; +return 12 * CYCLE_UNIT / 2; } /* ASR.B #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e000_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e000_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -31267,10 +31276,10 @@ unsigned long REGPARAM2 CPUFUNC(op_e000_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* LSR.B #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e008_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e008_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -31295,10 +31304,10 @@ unsigned long REGPARAM2 CPUFUNC(op_e008_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROXR.B #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e010_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e010_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -31326,10 +31335,10 @@ unsigned long REGPARAM2 CPUFUNC(op_e010_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROR.B #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e018_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e018_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -31352,10 +31361,10 @@ unsigned long REGPARAM2 CPUFUNC(op_e018_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ASR.B Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e020_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e020_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31383,10 +31392,10 @@ unsigned long REGPARAM2 CPUFUNC(op_e020_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* LSR.B Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e028_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e028_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31411,10 +31420,10 @@ unsigned long REGPARAM2 CPUFUNC(op_e028_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROXR.B Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e030_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e030_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31446,10 +31455,10 @@ unsigned long REGPARAM2 CPUFUNC(op_e030_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROR.B Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e038_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e038_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31472,10 +31481,10 @@ unsigned long REGPARAM2 CPUFUNC(op_e038_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ASR.W #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e040_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e040_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -31503,10 +31512,10 @@ unsigned long REGPARAM2 CPUFUNC(op_e040_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* LSR.W #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e048_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e048_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -31531,10 +31540,10 @@ unsigned long REGPARAM2 CPUFUNC(op_e048_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROXR.W #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e050_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e050_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -31562,10 +31571,10 @@ unsigned long REGPARAM2 CPUFUNC(op_e050_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROR.W #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e058_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e058_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -31588,10 +31597,13 @@ unsigned long REGPARAM2 CPUFUNC(op_e058_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } +#endif + +#ifdef PART_8 /* ASR.W Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e060_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e060_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31619,10 +31631,10 @@ unsigned long REGPARAM2 CPUFUNC(op_e060_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* LSR.W Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e068_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e068_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31647,10 +31659,10 @@ unsigned long REGPARAM2 CPUFUNC(op_e068_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROXR.W Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e070_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e070_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31681,10 +31693,10 @@ unsigned long REGPARAM2 CPUFUNC(op_e070_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROR.W Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e078_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e078_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31707,10 +31719,10 @@ unsigned long REGPARAM2 CPUFUNC(op_e078_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ASR.L #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e080_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e080_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -31738,10 +31750,10 @@ unsigned long REGPARAM2 CPUFUNC(op_e080_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* LSR.L #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e088_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e088_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -31766,10 +31778,10 @@ unsigned long REGPARAM2 CPUFUNC(op_e088_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROXR.L #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e090_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e090_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -31797,10 +31809,10 @@ unsigned long REGPARAM2 CPUFUNC(op_e090_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROR.L #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e098_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e098_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -31823,10 +31835,10 @@ unsigned long REGPARAM2 CPUFUNC(op_e098_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ASR.L Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e0a0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e0a0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31854,10 +31866,10 @@ unsigned long REGPARAM2 CPUFUNC(op_e0a0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* LSR.L Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e0a8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e0a8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31882,10 +31894,10 @@ unsigned long REGPARAM2 CPUFUNC(op_e0a8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROXR.L Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e0b0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e0b0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31915,10 +31927,10 @@ unsigned long REGPARAM2 CPUFUNC(op_e0b0_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ROR.L Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e0b8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e0b8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31941,1076 +31953,906 @@ unsigned long REGPARAM2 CPUFUNC(op_e0b8_5)(uae_u32 opcode, struct regstruct *reg SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}} m68k_incpc (regs, 2); -return 4 * 256; +return 4 * CYCLE_UNIT / 2; } /* ASRW.W (An) */ -unsigned long REGPARAM2 CPUFUNC(op_e0d0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e0d0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr dataa = m68k_areg(regs, srcreg); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3629; - } -{{ uae_s16 data = get_word (dataa); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = (uae_u16)data; - uae_u32 sign = 0x8000 & val; - uae_u32 cflg = val & 1; - val = (val >> 1) | sign; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); - SET_CFLG (®s->ccrflags, cflg); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 2); -endlabel3629: ; -return 12 * 256; -} -/* ASRW.W (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_e0d8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa = m68k_areg(regs, srcreg); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3630; - } -{{ uae_s16 data = get_word (dataa); - m68k_areg(regs, srcreg) += 2; - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = (uae_u16)data; - uae_u32 sign = 0x8000 & val; - uae_u32 cflg = val & 1; - val = (val >> 1) | sign; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); - SET_CFLG (®s->ccrflags, cflg); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 2); -endlabel3630: ; -return 12 * 256; -} -/* ASRW.W -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_e0e0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa; - dataa = m68k_areg(regs, srcreg) - 2; - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3631; - } -{{ uae_s16 data = get_word (dataa); - m68k_areg (regs, srcreg) = dataa; - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = (uae_u16)data; - uae_u32 sign = 0x8000 & val; - uae_u32 cflg = val & 1; - val = (val >> 1) | sign; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); - SET_CFLG (®s->ccrflags, cflg); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 2); -endlabel3631: ; -return 14 * 256; -} -/* ASRW.W (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_e0e8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3632; - } -{{ uae_s16 data = get_word (dataa); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{ uae_u32 val = (uae_u16)data; - uae_u32 sign = 0x8000 & val; - uae_u32 cflg = val & 1; - val = (val >> 1) | sign; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); - SET_CFLG (®s->ccrflags, cflg); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 4); -endlabel3632: ; -return 16 * 256; -} -/* ASRW.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_e0f0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa; - dataa = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3633; - } -{{ uae_s16 data = get_word (dataa); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{ uae_u32 val = (uae_u16)data; - uae_u32 sign = 0x8000 & val; - uae_u32 cflg = val & 1; - val = (val >> 1) | sign; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); - SET_CFLG (®s->ccrflags, cflg); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 4); -endlabel3633: ; -return 18 * 256; -} -/* ASRW.W (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_e0f8_5)(uae_u32 opcode, struct regstruct *regs) -{ -{{ uaecptr dataa = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3634; - } -{{ uae_s16 data = get_word (dataa); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{ uae_u32 val = (uae_u16)data; - uae_u32 sign = 0x8000 & val; - uae_u32 cflg = val & 1; - val = (val >> 1) | sign; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); - SET_CFLG (®s->ccrflags, cflg); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 4); -endlabel3634: ; -return 16 * 256; -} -/* ASRW.W (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_e0f9_5)(uae_u32 opcode, struct regstruct *regs) -{ -{{ uaecptr dataa = get_long_prefetch (regs, 4); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3635; - } -{{ uae_s16 data = get_word (dataa); - regs->ir = regs->irc; - get_word_prefetch (regs, 8); -{ uae_u32 val = (uae_u16)data; - uae_u32 sign = 0x8000 & val; - uae_u32 cflg = val & 1; - val = (val >> 1) | sign; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); - SET_CFLG (®s->ccrflags, cflg); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 6); -endlabel3635: ; -return 20 * 256; -} -/* ASL.B #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e100_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; - uae_u32 dstreg = opcode & 7; -{{ uae_u32 cnt = srcreg; -{ uae_s8 data = m68k_dreg (regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = (uae_u8)data; - cnt &= 63; - CLEAR_CZNV (®s->ccrflags); - if (cnt >= 8) { - SET_VFLG (®s->ccrflags, val != 0); - SET_CFLG (®s->ccrflags, cnt == 8 ? val & 1 : 0); - COPY_CARRY (®s->ccrflags); - val = 0; - } else { - uae_u32 mask = (0xff << (7 - cnt)) & 0xff; - SET_VFLG (®s->ccrflags, (val & mask) != mask && (val & mask) != 0); - val <<= cnt - 1; - SET_CFLG (®s->ccrflags, (val & 0x80) >> 7); - COPY_CARRY (®s->ccrflags); - val <<= 1; - val &= 0xff; - } - SET_ZFLG (®s->ccrflags, ((uae_s8)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); - m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); -}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* LSL.B #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e108_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; - uae_u32 dstreg = opcode & 7; -{{ uae_u32 cnt = srcreg; -{ uae_s8 data = m68k_dreg (regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = (uae_u8)data; - cnt &= 63; - CLEAR_CZNV (®s->ccrflags); - if (cnt >= 8) { - SET_CFLG (®s->ccrflags, cnt == 8 ? val & 1 : 0); - COPY_CARRY (®s->ccrflags); - val = 0; - } else { - val <<= (cnt - 1); - SET_CFLG (®s->ccrflags, (val & 0x80) >> 7); - COPY_CARRY (®s->ccrflags); - val <<= 1; - val &= 0xff; - } - SET_ZFLG (®s->ccrflags, ((uae_s8)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); - m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); -}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* ROXL.B #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e110_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; - uae_u32 dstreg = opcode & 7; -{{ uae_u32 cnt = srcreg; -{ uae_s8 data = m68k_dreg (regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = (uae_u8)data; - cnt &= 63; - CLEAR_CZNV (®s->ccrflags); -{ cnt--; - { - uae_u32 carry; - uae_u32 loval = val >> (7 - cnt); - carry = loval & 1; - val = (((val << 1) | GET_XFLG (®s->ccrflags)) << cnt) | (loval >> 1); - SET_XFLG (®s->ccrflags, carry); - val &= 0xff; - } } - SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); - SET_ZFLG (®s->ccrflags, ((uae_s8)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); - m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); -}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* ROL.B #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e118_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; - uae_u32 dstreg = opcode & 7; -{{ uae_u32 cnt = srcreg; -{ uae_s8 data = m68k_dreg (regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = (uae_u8)data; - cnt &= 63; - CLEAR_CZNV (®s->ccrflags); -{ uae_u32 loval; - cnt &= 7; - loval = val >> (8 - cnt); - val <<= cnt; - val |= loval; - val &= 0xff; - SET_CFLG (®s->ccrflags, val & 1); -} - SET_ZFLG (®s->ccrflags, ((uae_s8)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); - m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); -}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* ASL.B Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e120_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s8 cnt = m68k_dreg (regs, srcreg); -{ uae_s8 data = m68k_dreg (regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = (uae_u8)data; - cnt &= 63; - CLEAR_CZNV (®s->ccrflags); - if (cnt >= 8) { - SET_VFLG (®s->ccrflags, val != 0); - SET_CFLG (®s->ccrflags, cnt == 8 ? val & 1 : 0); - COPY_CARRY (®s->ccrflags); - val = 0; - } else if (cnt > 0) { - uae_u32 mask = (0xff << (7 - cnt)) & 0xff; - SET_VFLG (®s->ccrflags, (val & mask) != mask && (val & mask) != 0); - val <<= cnt - 1; - SET_CFLG (®s->ccrflags, (val & 0x80) >> 7); - COPY_CARRY (®s->ccrflags); - val <<= 1; - val &= 0xff; - } - SET_ZFLG (®s->ccrflags, ((uae_s8)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); - m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); -}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* LSL.B Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e128_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s8 cnt = m68k_dreg (regs, srcreg); -{ uae_s8 data = m68k_dreg (regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = (uae_u8)data; - cnt &= 63; - CLEAR_CZNV (®s->ccrflags); - if (cnt >= 8) { - SET_CFLG (®s->ccrflags, cnt == 8 ? val & 1 : 0); - COPY_CARRY (®s->ccrflags); - val = 0; - } else if (cnt > 0) { - val <<= (cnt - 1); - SET_CFLG (®s->ccrflags, (val & 0x80) >> 7); - COPY_CARRY (®s->ccrflags); - val <<= 1; - val &= 0xff; - } - SET_ZFLG (®s->ccrflags, ((uae_s8)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); - m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); -}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* ROXL.B Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e130_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s8 cnt = m68k_dreg (regs, srcreg); -{ uae_s8 data = m68k_dreg (regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = (uae_u8)data; - cnt &= 63; - CLEAR_CZNV (®s->ccrflags); - if (cnt >= 36) cnt -= 36; - if (cnt >= 18) cnt -= 18; - if (cnt >= 9) cnt -= 9; - if (cnt > 0) { - cnt--; - { - uae_u32 carry; - uae_u32 loval = val >> (7 - cnt); - carry = loval & 1; - val = (((val << 1) | GET_XFLG (®s->ccrflags)) << cnt) | (loval >> 1); - SET_XFLG (®s->ccrflags, carry); - val &= 0xff; - } } - SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); - SET_ZFLG (®s->ccrflags, ((uae_s8)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); - m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); -}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* ROL.B Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e138_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s8 cnt = m68k_dreg (regs, srcreg); -{ uae_s8 data = m68k_dreg (regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = (uae_u8)data; - cnt &= 63; - CLEAR_CZNV (®s->ccrflags); - if (cnt > 0) { - uae_u32 loval; - cnt &= 7; - loval = val >> (8 - cnt); - val <<= cnt; - val |= loval; - val &= 0xff; - SET_CFLG (®s->ccrflags, val & 1); -} - SET_ZFLG (®s->ccrflags, ((uae_s8)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); - m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); -}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* ASL.W #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e140_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; - uae_u32 dstreg = opcode & 7; -{{ uae_u32 cnt = srcreg; -{ uae_s16 data = m68k_dreg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = (uae_u16)data; - cnt &= 63; - CLEAR_CZNV (®s->ccrflags); - if (cnt >= 16) { - SET_VFLG (®s->ccrflags, val != 0); - SET_CFLG (®s->ccrflags, cnt == 16 ? val & 1 : 0); - COPY_CARRY (®s->ccrflags); - val = 0; - } else { - uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; - SET_VFLG (®s->ccrflags, (val & mask) != mask && (val & mask) != 0); - val <<= cnt - 1; - SET_CFLG (®s->ccrflags, (val & 0x8000) >> 15); - COPY_CARRY (®s->ccrflags); - val <<= 1; - val &= 0xffff; - } - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); - m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); -}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* LSL.W #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e148_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; - uae_u32 dstreg = opcode & 7; -{{ uae_u32 cnt = srcreg; -{ uae_s16 data = m68k_dreg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = (uae_u16)data; - cnt &= 63; - CLEAR_CZNV (®s->ccrflags); - if (cnt >= 16) { - SET_CFLG (®s->ccrflags, cnt == 16 ? val & 1 : 0); - COPY_CARRY (®s->ccrflags); - val = 0; - } else { - val <<= (cnt - 1); - SET_CFLG (®s->ccrflags, (val & 0x8000) >> 15); - COPY_CARRY (®s->ccrflags); - val <<= 1; - val &= 0xffff; - } - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); - m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); -}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* ROXL.W #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e150_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; - uae_u32 dstreg = opcode & 7; -{{ uae_u32 cnt = srcreg; -{ uae_s16 data = m68k_dreg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = (uae_u16)data; - cnt &= 63; - CLEAR_CZNV (®s->ccrflags); -{ cnt--; - { - uae_u32 carry; - uae_u32 loval = val >> (15 - cnt); - carry = loval & 1; - val = (((val << 1) | GET_XFLG (®s->ccrflags)) << cnt) | (loval >> 1); - SET_XFLG (®s->ccrflags, carry); - val &= 0xffff; - } } - SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); - m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); -}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* ROL.W #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e158_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; - uae_u32 dstreg = opcode & 7; -{{ uae_u32 cnt = srcreg; -{ uae_s16 data = m68k_dreg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = (uae_u16)data; - cnt &= 63; - CLEAR_CZNV (®s->ccrflags); -{ uae_u32 loval; - cnt &= 15; - loval = val >> (16 - cnt); - val <<= cnt; - val |= loval; - val &= 0xffff; - SET_CFLG (®s->ccrflags, val & 1); -} - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); - m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); -}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* ASL.W Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e160_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s16 cnt = m68k_dreg(regs, srcreg); -{ uae_s16 data = m68k_dreg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = (uae_u16)data; - cnt &= 63; - CLEAR_CZNV (®s->ccrflags); - if (cnt >= 16) { - SET_VFLG (®s->ccrflags, val != 0); - SET_CFLG (®s->ccrflags, cnt == 16 ? val & 1 : 0); - COPY_CARRY (®s->ccrflags); - val = 0; - } else if (cnt > 0) { - uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; - SET_VFLG (®s->ccrflags, (val & mask) != mask && (val & mask) != 0); - val <<= cnt - 1; - SET_CFLG (®s->ccrflags, (val & 0x8000) >> 15); - COPY_CARRY (®s->ccrflags); - val <<= 1; - val &= 0xffff; - } - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); - m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); -}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* LSL.W Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e168_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s16 cnt = m68k_dreg(regs, srcreg); -{ uae_s16 data = m68k_dreg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = (uae_u16)data; - cnt &= 63; - CLEAR_CZNV (®s->ccrflags); - if (cnt >= 16) { - SET_CFLG (®s->ccrflags, cnt == 16 ? val & 1 : 0); - COPY_CARRY (®s->ccrflags); - val = 0; - } else if (cnt > 0) { - val <<= (cnt - 1); - SET_CFLG (®s->ccrflags, (val & 0x8000) >> 15); - COPY_CARRY (®s->ccrflags); - val <<= 1; - val &= 0xffff; - } - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); - m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); -}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* ROXL.W Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e170_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s16 cnt = m68k_dreg(regs, srcreg); -{ uae_s16 data = m68k_dreg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = (uae_u16)data; - cnt &= 63; - CLEAR_CZNV (®s->ccrflags); - if (cnt >= 34) cnt -= 34; - if (cnt >= 17) cnt -= 17; - if (cnt > 0) { - cnt--; - { - uae_u32 carry; - uae_u32 loval = val >> (15 - cnt); - carry = loval & 1; - val = (((val << 1) | GET_XFLG (®s->ccrflags)) << cnt) | (loval >> 1); - SET_XFLG (®s->ccrflags, carry); - val &= 0xffff; - } } - SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); - m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); -}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* ROL.W Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e178_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s16 cnt = m68k_dreg(regs, srcreg); -{ uae_s16 data = m68k_dreg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = (uae_u16)data; - cnt &= 63; - CLEAR_CZNV (®s->ccrflags); - if (cnt > 0) { - uae_u32 loval; - cnt &= 15; - loval = val >> (16 - cnt); - val <<= cnt; - val |= loval; - val &= 0xffff; - SET_CFLG (®s->ccrflags, val & 1); -} - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); - m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); -}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* ASL.L #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e180_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; - uae_u32 dstreg = opcode & 7; -{{ uae_u32 cnt = srcreg; -{ uae_s32 data = m68k_dreg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = data; - cnt &= 63; - CLEAR_CZNV (®s->ccrflags); - if (cnt >= 32) { - SET_VFLG (®s->ccrflags, val != 0); - SET_CFLG (®s->ccrflags, cnt == 32 ? val & 1 : 0); - COPY_CARRY (®s->ccrflags); - val = 0; - } else { - uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; - SET_VFLG (®s->ccrflags, (val & mask) != mask && (val & mask) != 0); - val <<= cnt - 1; - SET_CFLG (®s->ccrflags, (val & 0x80000000) >> 31); - COPY_CARRY (®s->ccrflags); - val <<= 1; - val &= 0xffffffff; - } - SET_ZFLG (®s->ccrflags, ((uae_s32)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); - m68k_dreg(regs, dstreg) = (val); -}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* LSL.L #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e188_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; - uae_u32 dstreg = opcode & 7; -{{ uae_u32 cnt = srcreg; -{ uae_s32 data = m68k_dreg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = data; - cnt &= 63; - CLEAR_CZNV (®s->ccrflags); - if (cnt >= 32) { - SET_CFLG (®s->ccrflags, cnt == 32 ? val & 1 : 0); - COPY_CARRY (®s->ccrflags); - val = 0; - } else { - val <<= (cnt - 1); - SET_CFLG (®s->ccrflags, (val & 0x80000000) >> 31); - COPY_CARRY (®s->ccrflags); - val <<= 1; - val &= 0xffffffff; - } - SET_ZFLG (®s->ccrflags, ((uae_s32)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); - m68k_dreg(regs, dstreg) = (val); -}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* ROXL.L #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e190_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; - uae_u32 dstreg = opcode & 7; -{{ uae_u32 cnt = srcreg; -{ uae_s32 data = m68k_dreg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = data; - cnt &= 63; - CLEAR_CZNV (®s->ccrflags); -{ cnt--; - { - uae_u32 carry; - uae_u32 loval = val >> (31 - cnt); - carry = loval & 1; - val = (((val << 1) | GET_XFLG (®s->ccrflags)) << cnt) | (loval >> 1); - SET_XFLG (®s->ccrflags, carry); - val &= 0xffffffff; - } } - SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); - SET_ZFLG (®s->ccrflags, ((uae_s32)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); - m68k_dreg(regs, dstreg) = (val); -}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* ROL.L #,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e198_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; - uae_u32 dstreg = opcode & 7; -{{ uae_u32 cnt = srcreg; -{ uae_s32 data = m68k_dreg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = data; - cnt &= 63; - CLEAR_CZNV (®s->ccrflags); -{ uae_u32 loval; - cnt &= 31; - loval = val >> (32 - cnt); - val <<= cnt; - val |= loval; - val &= 0xffffffff; - SET_CFLG (®s->ccrflags, val & 1); -} - SET_ZFLG (®s->ccrflags, ((uae_s32)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); - m68k_dreg(regs, dstreg) = (val); -}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* ASL.L Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e1a0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s32 cnt = m68k_dreg(regs, srcreg); -{ uae_s32 data = m68k_dreg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = data; - cnt &= 63; - CLEAR_CZNV (®s->ccrflags); - if (cnt >= 32) { - SET_VFLG (®s->ccrflags, val != 0); - SET_CFLG (®s->ccrflags, cnt == 32 ? val & 1 : 0); - COPY_CARRY (®s->ccrflags); - val = 0; - } else if (cnt > 0) { - uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; - SET_VFLG (®s->ccrflags, (val & mask) != mask && (val & mask) != 0); - val <<= cnt - 1; - SET_CFLG (®s->ccrflags, (val & 0x80000000) >> 31); - COPY_CARRY (®s->ccrflags); - val <<= 1; - val &= 0xffffffff; - } - SET_ZFLG (®s->ccrflags, ((uae_s32)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); - m68k_dreg(regs, dstreg) = (val); -}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* LSL.L Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e1a8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s32 cnt = m68k_dreg(regs, srcreg); -{ uae_s32 data = m68k_dreg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = data; - cnt &= 63; - CLEAR_CZNV (®s->ccrflags); - if (cnt >= 32) { - SET_CFLG (®s->ccrflags, cnt == 32 ? val & 1 : 0); - COPY_CARRY (®s->ccrflags); - val = 0; - } else if (cnt > 0) { - val <<= (cnt - 1); - SET_CFLG (®s->ccrflags, (val & 0x80000000) >> 31); - COPY_CARRY (®s->ccrflags); - val <<= 1; - val &= 0xffffffff; - } - SET_ZFLG (®s->ccrflags, ((uae_s32)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); - m68k_dreg(regs, dstreg) = (val); -}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* ROXL.L Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e1b0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s32 cnt = m68k_dreg(regs, srcreg); -{ uae_s32 data = m68k_dreg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = data; - cnt &= 63; - CLEAR_CZNV (®s->ccrflags); - if (cnt >= 33) cnt -= 33; - if (cnt > 0) { - cnt--; - { - uae_u32 carry; - uae_u32 loval = val >> (31 - cnt); - carry = loval & 1; - val = (((val << 1) | GET_XFLG (®s->ccrflags)) << cnt) | (loval >> 1); - SET_XFLG (®s->ccrflags, carry); - val &= 0xffffffff; - } } - SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); - SET_ZFLG (®s->ccrflags, ((uae_s32)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); - m68k_dreg(regs, dstreg) = (val); -}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* ROL.L Dn,Dn */ -unsigned long REGPARAM2 CPUFUNC(op_e1b8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = ((opcode >> 9) & 7); - uae_u32 dstreg = opcode & 7; -{{ uae_s32 cnt = m68k_dreg(regs, srcreg); -{ uae_s32 data = m68k_dreg(regs, dstreg); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = data; - cnt &= 63; - CLEAR_CZNV (®s->ccrflags); - if (cnt > 0) { - uae_u32 loval; - cnt &= 31; - loval = val >> (32 - cnt); - val <<= cnt; - val |= loval; - val &= 0xffffffff; - SET_CFLG (®s->ccrflags, val & 1); -} - SET_ZFLG (®s->ccrflags, ((uae_s32)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); - m68k_dreg(regs, dstreg) = (val); -}}}} m68k_incpc (regs, 2); -return 4 * 256; -} -/* ASLW.W (An) */ -unsigned long REGPARAM2 CPUFUNC(op_e1d0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa = m68k_areg(regs, srcreg); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3660; - } -{{ uae_s16 data = get_word (dataa); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = (uae_u16)data; - uae_u32 sign = 0x8000 & val; - uae_u32 sign2; - val <<= 1; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); - sign2 = 0x8000 & val; - SET_CFLG (®s->ccrflags, sign != 0); - COPY_CARRY (®s->ccrflags); - SET_VFLG (®s->ccrflags, GET_VFLG (®s->ccrflags) | (sign2 != sign)); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 2); -endlabel3660: ; -return 12 * 256; -} -/* ASLW.W (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_e1d8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa = m68k_areg(regs, srcreg); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3661; - } -{{ uae_s16 data = get_word (dataa); - m68k_areg(regs, srcreg) += 2; - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = (uae_u16)data; - uae_u32 sign = 0x8000 & val; - uae_u32 sign2; - val <<= 1; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); - sign2 = 0x8000 & val; - SET_CFLG (®s->ccrflags, sign != 0); - COPY_CARRY (®s->ccrflags); - SET_VFLG (®s->ccrflags, GET_VFLG (®s->ccrflags) | (sign2 != sign)); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 2); -endlabel3661: ; -return 12 * 256; -} -/* ASLW.W -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_e1e0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa; - dataa = m68k_areg(regs, srcreg) - 2; - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3662; - } -{{ uae_s16 data = get_word (dataa); - m68k_areg (regs, srcreg) = dataa; - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = (uae_u16)data; - uae_u32 sign = 0x8000 & val; - uae_u32 sign2; - val <<= 1; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); - sign2 = 0x8000 & val; - SET_CFLG (®s->ccrflags, sign != 0); - COPY_CARRY (®s->ccrflags); - SET_VFLG (®s->ccrflags, GET_VFLG (®s->ccrflags) | (sign2 != sign)); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 2); -endlabel3662: ; -return 14 * 256; -} -/* ASLW.W (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_e1e8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dataa & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dataa); goto endlabel3663; } {{ uae_s16 data = get_word (dataa); regs->ir = regs->irc; - get_word_prefetch (regs, 6); + get_word_prefetch (regs, 4); { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; - uae_u32 sign2; - val <<= 1; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); - sign2 = 0x8000 & val; - SET_CFLG (®s->ccrflags, sign != 0); + SET_CFLG (®s->ccrflags, cflg); COPY_CARRY (®s->ccrflags); - SET_VFLG (®s->ccrflags, GET_VFLG (®s->ccrflags) | (sign2 != sign)); put_word (dataa,val); -}}}}} m68k_incpc (regs, 4); +}}}}} m68k_incpc (regs, 2); endlabel3663: ; -return 16 * 256; +return 12 * CYCLE_UNIT / 2; } -/* ASLW.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_e1f0_5)(uae_u32 opcode, struct regstruct *regs) +/* ASRW.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_e0d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa; - dataa = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); +{{ uaecptr dataa = m68k_areg(regs, srcreg); if (dataa & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dataa); goto endlabel3664; } {{ uae_s16 data = get_word (dataa); + m68k_areg(regs, srcreg) += 2; regs->ir = regs->irc; - get_word_prefetch (regs, 6); + get_word_prefetch (regs, 4); { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; - uae_u32 sign2; - val <<= 1; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); - sign2 = 0x8000 & val; - SET_CFLG (®s->ccrflags, sign != 0); + SET_CFLG (®s->ccrflags, cflg); COPY_CARRY (®s->ccrflags); - SET_VFLG (®s->ccrflags, GET_VFLG (®s->ccrflags) | (sign2 != sign)); put_word (dataa,val); -}}}}} m68k_incpc (regs, 4); +}}}}} m68k_incpc (regs, 2); endlabel3664: ; -return 18 * 256; +return 12 * CYCLE_UNIT / 2; } -/* ASLW.W (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_e1f8_5)(uae_u32 opcode, struct regstruct *regs) +/* ASRW.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_e0e0_11)(uae_u32 opcode, struct regstruct *regs) { -{{ uaecptr dataa = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; if (dataa & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dataa); goto endlabel3665; } {{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) = dataa; regs->ir = regs->irc; - get_word_prefetch (regs, 6); + get_word_prefetch (regs, 4); { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; - uae_u32 sign2; - val <<= 1; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); - sign2 = 0x8000 & val; - SET_CFLG (®s->ccrflags, sign != 0); + SET_CFLG (®s->ccrflags, cflg); COPY_CARRY (®s->ccrflags); - SET_VFLG (®s->ccrflags, GET_VFLG (®s->ccrflags) | (sign2 != sign)); put_word (dataa,val); -}}}}} m68k_incpc (regs, 4); +}}}}} m68k_incpc (regs, 2); endlabel3665: ; -return 16 * 256; +return 14 * CYCLE_UNIT / 2; } -/* ASLW.W (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_e1f9_5)(uae_u32 opcode, struct regstruct *regs) +/* ASRW.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_e0e8_11)(uae_u32 opcode, struct regstruct *regs) { -{{ uaecptr dataa = get_long_prefetch (regs, 4); + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dataa & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dataa); goto endlabel3666; } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3666: ; +return 16 * CYCLE_UNIT / 2; +} +/* ASRW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e0f0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3667; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3667: ; +return 18 * CYCLE_UNIT / 2; +} +/* ASRW.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_e0f8_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3668; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3668: ; +return 16 * CYCLE_UNIT / 2; +} +/* ASRW.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_e0f9_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = get_long_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3669; + } {{ uae_s16 data = get_word (dataa); regs->ir = regs->irc; get_word_prefetch (regs, 8); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 cflg = val & 1; + val = (val >> 1) | sign; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); + SET_CFLG (®s->ccrflags, cflg); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 6); +endlabel3669: ; +return 20 * CYCLE_UNIT / 2; +} +/* ASL.B #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e100_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 8) { + SET_VFLG (®s->ccrflags, val != 0); + SET_CFLG (®s->ccrflags, cnt == 8 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG (®s->ccrflags, (val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG (®s->ccrflags, (val & 0x80) >> 7); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xff; + } + SET_ZFLG (®s->ccrflags, ((uae_s8)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* LSL.B #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e108_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 8) { + SET_CFLG (®s->ccrflags, cnt == 8 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG (®s->ccrflags, (val & 0x80) >> 7); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xff; + } + SET_ZFLG (®s->ccrflags, ((uae_s8)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* ROXL.B #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e110_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG (®s->ccrflags)) << cnt) | (loval >> 1); + SET_XFLG (®s->ccrflags, carry); + val &= 0xff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + SET_ZFLG (®s->ccrflags, ((uae_s8)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* ROL.B #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e118_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG (®s->ccrflags, val & 1); +} + SET_ZFLG (®s->ccrflags, ((uae_s8)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* ASL.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e120_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 cnt = m68k_dreg (regs, srcreg); +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 8) { + SET_VFLG (®s->ccrflags, val != 0); + SET_CFLG (®s->ccrflags, cnt == 8 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xff << (7 - cnt)) & 0xff; + SET_VFLG (®s->ccrflags, (val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG (®s->ccrflags, (val & 0x80) >> 7); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xff; + } + SET_ZFLG (®s->ccrflags, ((uae_s8)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* LSL.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e128_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 cnt = m68k_dreg (regs, srcreg); +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 8) { + SET_CFLG (®s->ccrflags, cnt == 8 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG (®s->ccrflags, (val & 0x80) >> 7); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xff; + } + SET_ZFLG (®s->ccrflags, ((uae_s8)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* ROXL.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e130_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 cnt = m68k_dreg (regs, srcreg); +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 36) cnt -= 36; + if (cnt >= 18) cnt -= 18; + if (cnt >= 9) cnt -= 9; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (7 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG (®s->ccrflags)) << cnt) | (loval >> 1); + SET_XFLG (®s->ccrflags, carry); + val &= 0xff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + SET_ZFLG (®s->ccrflags, ((uae_s8)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* ROL.B Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e138_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s8 cnt = m68k_dreg (regs, srcreg); +{ uae_s8 data = m68k_dreg (regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u8)data; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt > 0) { + uae_u32 loval; + cnt &= 7; + loval = val >> (8 - cnt); + val <<= cnt; + val |= loval; + val &= 0xff; + SET_CFLG (®s->ccrflags, val & 1); +} + SET_ZFLG (®s->ccrflags, ((uae_s8)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s8)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); +}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* ASL.W #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e140_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s16 data = m68k_dreg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 16) { + SET_VFLG (®s->ccrflags, val != 0); + SET_CFLG (®s->ccrflags, cnt == 16 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG (®s->ccrflags, (val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG (®s->ccrflags, (val & 0x8000) >> 15); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* LSL.W #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e148_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s16 data = m68k_dreg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 16) { + SET_CFLG (®s->ccrflags, cnt == 16 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG (®s->ccrflags, (val & 0x8000) >> 15); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* ROXL.W #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e150_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s16 data = m68k_dreg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG (®s->ccrflags)) << cnt) | (loval >> 1); + SET_XFLG (®s->ccrflags, carry); + val &= 0xffff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* ROL.W #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e158_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s16 data = m68k_dreg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG (®s->ccrflags, val & 1); +} + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* ASL.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e160_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 cnt = m68k_dreg(regs, srcreg); +{ uae_s16 data = m68k_dreg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 16) { + SET_VFLG (®s->ccrflags, val != 0); + SET_CFLG (®s->ccrflags, cnt == 16 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; + SET_VFLG (®s->ccrflags, (val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG (®s->ccrflags, (val & 0x8000) >> 15); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* LSL.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e168_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 cnt = m68k_dreg(regs, srcreg); +{ uae_s16 data = m68k_dreg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 16) { + SET_CFLG (®s->ccrflags, cnt == 16 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG (®s->ccrflags, (val & 0x8000) >> 15); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffff; + } + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* ROXL.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e170_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 cnt = m68k_dreg(regs, srcreg); +{ uae_s16 data = m68k_dreg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 34) cnt -= 34; + if (cnt >= 17) cnt -= 17; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (15 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG (®s->ccrflags)) << cnt) | (loval >> 1); + SET_XFLG (®s->ccrflags, carry); + val &= 0xffff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* ROL.W Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e178_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s16 cnt = m68k_dreg(regs, srcreg); +{ uae_s16 data = m68k_dreg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt > 0) { + uae_u32 loval; + cnt &= 15; + loval = val >> (16 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffff; + SET_CFLG (®s->ccrflags, val & 1); +} + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); + m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); +}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* ASL.L #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e180_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s32 data = m68k_dreg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = data; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 32) { + SET_VFLG (®s->ccrflags, val != 0); + SET_CFLG (®s->ccrflags, cnt == 32 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG (®s->ccrflags, (val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG (®s->ccrflags, (val & 0x80000000) >> 31); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG (®s->ccrflags, ((uae_s32)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* LSL.L #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e188_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s32 data = m68k_dreg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = data; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 32) { + SET_CFLG (®s->ccrflags, cnt == 32 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else { + val <<= (cnt - 1); + SET_CFLG (®s->ccrflags, (val & 0x80000000) >> 31); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG (®s->ccrflags, ((uae_s32)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* ROXL.L #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e190_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s32 data = m68k_dreg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = data; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG (®s->ccrflags)) << cnt) | (loval >> 1); + SET_XFLG (®s->ccrflags, carry); + val &= 0xffffffff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + SET_ZFLG (®s->ccrflags, ((uae_s32)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* ROL.L #,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e198_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; + uae_u32 dstreg = opcode & 7; +{{ uae_u32 cnt = srcreg; +{ uae_s32 data = m68k_dreg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = data; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); +{ uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG (®s->ccrflags, val & 1); +} + SET_ZFLG (®s->ccrflags, ((uae_s32)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* ASL.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e1a0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 cnt = m68k_dreg(regs, srcreg); +{ uae_s32 data = m68k_dreg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = data; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 32) { + SET_VFLG (®s->ccrflags, val != 0); + SET_CFLG (®s->ccrflags, cnt == 32 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; + SET_VFLG (®s->ccrflags, (val & mask) != mask && (val & mask) != 0); + val <<= cnt - 1; + SET_CFLG (®s->ccrflags, (val & 0x80000000) >> 31); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG (®s->ccrflags, ((uae_s32)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* LSL.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e1a8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 cnt = m68k_dreg(regs, srcreg); +{ uae_s32 data = m68k_dreg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = data; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 32) { + SET_CFLG (®s->ccrflags, cnt == 32 ? val & 1 : 0); + COPY_CARRY (®s->ccrflags); + val = 0; + } else if (cnt > 0) { + val <<= (cnt - 1); + SET_CFLG (®s->ccrflags, (val & 0x80000000) >> 31); + COPY_CARRY (®s->ccrflags); + val <<= 1; + val &= 0xffffffff; + } + SET_ZFLG (®s->ccrflags, ((uae_s32)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* ROXL.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e1b0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 cnt = m68k_dreg(regs, srcreg); +{ uae_s32 data = m68k_dreg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = data; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt >= 33) cnt -= 33; + if (cnt > 0) { + cnt--; + { + uae_u32 carry; + uae_u32 loval = val >> (31 - cnt); + carry = loval & 1; + val = (((val << 1) | GET_XFLG (®s->ccrflags)) << cnt) | (loval >> 1); + SET_XFLG (®s->ccrflags, carry); + val &= 0xffffffff; + } } + SET_CFLG (®s->ccrflags, GET_XFLG (®s->ccrflags)); + SET_ZFLG (®s->ccrflags, ((uae_s32)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* ROL.L Dn,Dn */ +unsigned long REGPARAM2 CPUFUNC(op_e1b8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = ((opcode >> 9) & 7); + uae_u32 dstreg = opcode & 7; +{{ uae_s32 cnt = m68k_dreg(regs, srcreg); +{ uae_s32 data = m68k_dreg(regs, dstreg); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = data; + cnt &= 63; + CLEAR_CZNV (®s->ccrflags); + if (cnt > 0) { + uae_u32 loval; + cnt &= 31; + loval = val >> (32 - cnt); + val <<= cnt; + val |= loval; + val &= 0xffffffff; + SET_CFLG (®s->ccrflags, val & 1); +} + SET_ZFLG (®s->ccrflags, ((uae_s32)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s32)(val)) < 0); + m68k_dreg(regs, dstreg) = (val); +}}}} m68k_incpc (regs, 2); +return 4 * CYCLE_UNIT / 2; +} +/* ASLW.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_e1d0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3694; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 sign2; @@ -33023,734 +32865,12 @@ unsigned long REGPARAM2 CPUFUNC(op_e1f9_5)(uae_u32 opcode, struct regstruct *reg COPY_CARRY (®s->ccrflags); SET_VFLG (®s->ccrflags, GET_VFLG (®s->ccrflags) | (sign2 != sign)); put_word (dataa,val); -}}}}} m68k_incpc (regs, 6); -endlabel3666: ; -return 20 * 256; -} -/* LSRW.W (An) */ -unsigned long REGPARAM2 CPUFUNC(op_e2d0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa = m68k_areg(regs, srcreg); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3667; - } -{{ uae_s16 data = get_word (dataa); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = (uae_u16)data; - uae_u32 carry = val & 1; - val >>= 1; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); }}}}} m68k_incpc (regs, 2); -endlabel3667: ; -return 12 * 256; -} -/* LSRW.W (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_e2d8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa = m68k_areg(regs, srcreg); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3668; - } -{{ uae_s16 data = get_word (dataa); - m68k_areg(regs, srcreg) += 2; - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = (uae_u16)data; - uae_u32 carry = val & 1; - val >>= 1; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 2); -endlabel3668: ; -return 12 * 256; -} -/* LSRW.W -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_e2e0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa; - dataa = m68k_areg(regs, srcreg) - 2; - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3669; - } -{{ uae_s16 data = get_word (dataa); - m68k_areg (regs, srcreg) = dataa; - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u32 val = (uae_u16)data; - uae_u32 carry = val & 1; - val >>= 1; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 2); -endlabel3669: ; -return 14 * 256; -} -/* LSRW.W (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_e2e8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3670; - } -{{ uae_s16 data = get_word (dataa); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{ uae_u32 val = (uae_u16)data; - uae_u32 carry = val & 1; - val >>= 1; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 4); -endlabel3670: ; -return 16 * 256; -} -/* LSRW.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_e2f0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa; - dataa = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3671; - } -{{ uae_s16 data = get_word (dataa); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{ uae_u32 val = (uae_u16)data; - uae_u32 carry = val & 1; - val >>= 1; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 4); -endlabel3671: ; -return 18 * 256; -} -/* LSRW.W (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_e2f8_5)(uae_u32 opcode, struct regstruct *regs) -{ -{{ uaecptr dataa = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3672; - } -{{ uae_s16 data = get_word (dataa); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{ uae_u32 val = (uae_u16)data; - uae_u32 carry = val & 1; - val >>= 1; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 4); -endlabel3672: ; -return 16 * 256; -} -/* LSRW.W (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_e2f9_5)(uae_u32 opcode, struct regstruct *regs) -{ -{{ uaecptr dataa = get_long_prefetch (regs, 4); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3673; - } -{{ uae_s16 data = get_word (dataa); - regs->ir = regs->irc; - get_word_prefetch (regs, 8); -{ uae_u32 val = (uae_u16)data; - uae_u32 carry = val & 1; - val >>= 1; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 6); -endlabel3673: ; -return 20 * 256; -} -/* LSLW.W (An) */ -unsigned long REGPARAM2 CPUFUNC(op_e3d0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa = m68k_areg(regs, srcreg); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3674; - } -{{ uae_s16 data = get_word (dataa); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u16 val = data; - uae_u32 carry = val & 0x8000; - val <<= 1; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry >> 15); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 2); -endlabel3674: ; -return 12 * 256; -} -/* LSLW.W (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_e3d8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa = m68k_areg(regs, srcreg); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3675; - } -{{ uae_s16 data = get_word (dataa); - m68k_areg(regs, srcreg) += 2; - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u16 val = data; - uae_u32 carry = val & 0x8000; - val <<= 1; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry >> 15); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 2); -endlabel3675: ; -return 12 * 256; -} -/* LSLW.W -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_e3e0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa; - dataa = m68k_areg(regs, srcreg) - 2; - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3676; - } -{{ uae_s16 data = get_word (dataa); - m68k_areg (regs, srcreg) = dataa; - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u16 val = data; - uae_u32 carry = val & 0x8000; - val <<= 1; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry >> 15); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 2); -endlabel3676: ; -return 14 * 256; -} -/* LSLW.W (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_e3e8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3677; - } -{{ uae_s16 data = get_word (dataa); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{ uae_u16 val = data; - uae_u32 carry = val & 0x8000; - val <<= 1; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry >> 15); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 4); -endlabel3677: ; -return 16 * 256; -} -/* LSLW.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_e3f0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa; - dataa = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3678; - } -{{ uae_s16 data = get_word (dataa); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{ uae_u16 val = data; - uae_u32 carry = val & 0x8000; - val <<= 1; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry >> 15); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 4); -endlabel3678: ; -return 18 * 256; -} -/* LSLW.W (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_e3f8_5)(uae_u32 opcode, struct regstruct *regs) -{ -{{ uaecptr dataa = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3679; - } -{{ uae_s16 data = get_word (dataa); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{ uae_u16 val = data; - uae_u32 carry = val & 0x8000; - val <<= 1; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry >> 15); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 4); -endlabel3679: ; -return 16 * 256; -} -/* LSLW.W (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_e3f9_5)(uae_u32 opcode, struct regstruct *regs) -{ -{{ uaecptr dataa = get_long_prefetch (regs, 4); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3680; - } -{{ uae_s16 data = get_word (dataa); - regs->ir = regs->irc; - get_word_prefetch (regs, 8); -{ uae_u16 val = data; - uae_u32 carry = val & 0x8000; - val <<= 1; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry >> 15); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 6); -endlabel3680: ; -return 20 * 256; -} -/* ROXRW.W (An) */ -unsigned long REGPARAM2 CPUFUNC(op_e4d0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa = m68k_areg(regs, srcreg); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3681; - } -{{ uae_s16 data = get_word (dataa); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u16 val = data; - uae_u32 carry = val & 1; - val >>= 1; - if (GET_XFLG (®s->ccrflags)) val |= 0x8000; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 2); -endlabel3681: ; -return 12 * 256; -} -/* ROXRW.W (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_e4d8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa = m68k_areg(regs, srcreg); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3682; - } -{{ uae_s16 data = get_word (dataa); - m68k_areg(regs, srcreg) += 2; - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u16 val = data; - uae_u32 carry = val & 1; - val >>= 1; - if (GET_XFLG (®s->ccrflags)) val |= 0x8000; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 2); -endlabel3682: ; -return 12 * 256; -} -/* ROXRW.W -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_e4e0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa; - dataa = m68k_areg(regs, srcreg) - 2; - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3683; - } -{{ uae_s16 data = get_word (dataa); - m68k_areg (regs, srcreg) = dataa; - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u16 val = data; - uae_u32 carry = val & 1; - val >>= 1; - if (GET_XFLG (®s->ccrflags)) val |= 0x8000; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 2); -endlabel3683: ; -return 14 * 256; -} -/* ROXRW.W (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_e4e8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3684; - } -{{ uae_s16 data = get_word (dataa); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{ uae_u16 val = data; - uae_u32 carry = val & 1; - val >>= 1; - if (GET_XFLG (®s->ccrflags)) val |= 0x8000; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 4); -endlabel3684: ; -return 16 * 256; -} -/* ROXRW.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_e4f0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa; - dataa = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3685; - } -{{ uae_s16 data = get_word (dataa); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{ uae_u16 val = data; - uae_u32 carry = val & 1; - val >>= 1; - if (GET_XFLG (®s->ccrflags)) val |= 0x8000; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 4); -endlabel3685: ; -return 18 * 256; -} -/* ROXRW.W (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_e4f8_5)(uae_u32 opcode, struct regstruct *regs) -{ -{{ uaecptr dataa = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3686; - } -{{ uae_s16 data = get_word (dataa); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{ uae_u16 val = data; - uae_u32 carry = val & 1; - val >>= 1; - if (GET_XFLG (®s->ccrflags)) val |= 0x8000; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 4); -endlabel3686: ; -return 16 * 256; -} -/* ROXRW.W (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_e4f9_5)(uae_u32 opcode, struct regstruct *regs) -{ -{{ uaecptr dataa = get_long_prefetch (regs, 4); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3687; - } -{{ uae_s16 data = get_word (dataa); - regs->ir = regs->irc; - get_word_prefetch (regs, 8); -{ uae_u16 val = data; - uae_u32 carry = val & 1; - val >>= 1; - if (GET_XFLG (®s->ccrflags)) val |= 0x8000; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 6); -endlabel3687: ; -return 20 * 256; -} -/* ROXLW.W (An) */ -unsigned long REGPARAM2 CPUFUNC(op_e5d0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa = m68k_areg(regs, srcreg); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3688; - } -{{ uae_s16 data = get_word (dataa); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u16 val = data; - uae_u32 carry = val & 0x8000; - val <<= 1; - if (GET_XFLG (®s->ccrflags)) val |= 1; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry >> 15); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 2); -endlabel3688: ; -return 12 * 256; -} -/* ROXLW.W (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_e5d8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa = m68k_areg(regs, srcreg); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3689; - } -{{ uae_s16 data = get_word (dataa); - m68k_areg(regs, srcreg) += 2; - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u16 val = data; - uae_u32 carry = val & 0x8000; - val <<= 1; - if (GET_XFLG (®s->ccrflags)) val |= 1; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry >> 15); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 2); -endlabel3689: ; -return 12 * 256; -} -/* ROXLW.W -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_e5e0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa; - dataa = m68k_areg(regs, srcreg) - 2; - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3690; - } -{{ uae_s16 data = get_word (dataa); - m68k_areg (regs, srcreg) = dataa; - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u16 val = data; - uae_u32 carry = val & 0x8000; - val <<= 1; - if (GET_XFLG (®s->ccrflags)) val |= 1; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry >> 15); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 2); -endlabel3690: ; -return 14 * 256; -} -/* ROXLW.W (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_e5e8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3691; - } -{{ uae_s16 data = get_word (dataa); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{ uae_u16 val = data; - uae_u32 carry = val & 0x8000; - val <<= 1; - if (GET_XFLG (®s->ccrflags)) val |= 1; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry >> 15); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 4); -endlabel3691: ; -return 16 * 256; -} -/* ROXLW.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_e5f0_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa; - dataa = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3692; - } -{{ uae_s16 data = get_word (dataa); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{ uae_u16 val = data; - uae_u32 carry = val & 0x8000; - val <<= 1; - if (GET_XFLG (®s->ccrflags)) val |= 1; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry >> 15); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 4); -endlabel3692: ; -return 18 * 256; -} -/* ROXLW.W (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_e5f8_5)(uae_u32 opcode, struct regstruct *regs) -{ -{{ uaecptr dataa = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3693; - } -{{ uae_s16 data = get_word (dataa); - regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{ uae_u16 val = data; - uae_u32 carry = val & 0x8000; - val <<= 1; - if (GET_XFLG (®s->ccrflags)) val |= 1; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry >> 15); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 4); -endlabel3693: ; -return 16 * 256; -} -/* ROXLW.W (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_e5f9_5)(uae_u32 opcode, struct regstruct *regs) -{ -{{ uaecptr dataa = get_long_prefetch (regs, 4); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3694; - } -{{ uae_s16 data = get_word (dataa); - regs->ir = regs->irc; - get_word_prefetch (regs, 8); -{ uae_u16 val = data; - uae_u32 carry = val & 0x8000; - val <<= 1; - if (GET_XFLG (®s->ccrflags)) val |= 1; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry >> 15); - COPY_CARRY (®s->ccrflags); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 6); endlabel3694: ; -return 20 * 256; +return 12 * CYCLE_UNIT / 2; } -/* RORW.W (An) */ -unsigned long REGPARAM2 CPUFUNC(op_e6d0_5)(uae_u32 opcode, struct regstruct *regs) +/* ASLW.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_e1d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr dataa = m68k_areg(regs, srcreg); @@ -33758,80 +32878,90 @@ unsigned long REGPARAM2 CPUFUNC(op_e6d0_5)(uae_u32 opcode, struct regstruct *reg exception3 (opcode, m68k_getpc(regs) + 2, dataa); goto endlabel3695; } -{{ uae_s16 data = get_word (dataa); - regs->ir = regs->irc; - get_word_prefetch (regs, 4); -{ uae_u16 val = data; - uae_u32 carry = val & 1; - val >>= 1; - if (carry) val |= 0x8000; - CLEAR_CZNV (®s->ccrflags); - SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); - SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry); - put_word (dataa,val); -}}}}} m68k_incpc (regs, 2); -endlabel3695: ; -return 12 * 256; -} -/* RORW.W (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_e6d8_5)(uae_u32 opcode, struct regstruct *regs) -{ - uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa = m68k_areg(regs, srcreg); - if (dataa & 1) { - exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3696; - } {{ uae_s16 data = get_word (dataa); m68k_areg(regs, srcreg) += 2; regs->ir = regs->irc; get_word_prefetch (regs, 4); -{ uae_u16 val = data; - uae_u32 carry = val & 1; - val >>= 1; - if (carry) val |= 0x8000; +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry); + sign2 = 0x8000 & val; + SET_CFLG (®s->ccrflags, sign != 0); + COPY_CARRY (®s->ccrflags); + SET_VFLG (®s->ccrflags, GET_VFLG (®s->ccrflags) | (sign2 != sign)); put_word (dataa,val); }}}}} m68k_incpc (regs, 2); -endlabel3696: ; -return 12 * 256; +endlabel3695: ; +return 12 * CYCLE_UNIT / 2; } -/* RORW.W -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_e6e0_5)(uae_u32 opcode, struct regstruct *regs) +/* ASLW.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_e1e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr dataa; dataa = m68k_areg(regs, srcreg) - 2; if (dataa & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3697; + goto endlabel3696; } {{ uae_s16 data = get_word (dataa); m68k_areg (regs, srcreg) = dataa; regs->ir = regs->irc; get_word_prefetch (regs, 4); -{ uae_u16 val = data; - uae_u32 carry = val & 1; - val >>= 1; - if (carry) val |= 0x8000; +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry); + sign2 = 0x8000 & val; + SET_CFLG (®s->ccrflags, sign != 0); + COPY_CARRY (®s->ccrflags); + SET_VFLG (®s->ccrflags, GET_VFLG (®s->ccrflags) | (sign2 != sign)); put_word (dataa,val); }}}}} m68k_incpc (regs, 2); -endlabel3697: ; -return 14 * 256; +endlabel3696: ; +return 14 * CYCLE_UNIT / 2; } -/* RORW.W (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_e6e8_5)(uae_u32 opcode, struct regstruct *regs) +/* ASLW.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_e1e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3697; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); + sign2 = 0x8000 & val; + SET_CFLG (®s->ccrflags, sign != 0); + COPY_CARRY (®s->ccrflags); + SET_VFLG (®s->ccrflags, GET_VFLG (®s->ccrflags) | (sign2 != sign)); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3697: ; +return 16 * CYCLE_UNIT / 2; +} +/* ASLW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e1f0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (dataa & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dataa); goto endlabel3698; @@ -33839,25 +32969,26 @@ unsigned long REGPARAM2 CPUFUNC(op_e6e8_5)(uae_u32 opcode, struct regstruct *reg {{ uae_s16 data = get_word (dataa); regs->ir = regs->irc; get_word_prefetch (regs, 6); -{ uae_u16 val = data; - uae_u32 carry = val & 1; - val >>= 1; - if (carry) val |= 0x8000; +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry); + sign2 = 0x8000 & val; + SET_CFLG (®s->ccrflags, sign != 0); + COPY_CARRY (®s->ccrflags); + SET_VFLG (®s->ccrflags, GET_VFLG (®s->ccrflags) | (sign2 != sign)); put_word (dataa,val); }}}}} m68k_incpc (regs, 4); endlabel3698: ; -return 16 * 256; +return 18 * CYCLE_UNIT / 2; } -/* RORW.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_e6f0_5)(uae_u32 opcode, struct regstruct *regs) +/* ASLW.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_e1f8_11)(uae_u32 opcode, struct regstruct *regs) { - uae_u32 srcreg = (opcode & 7); -{{ uaecptr dataa; - dataa = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); +{{ uaecptr dataa = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dataa & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dataa); goto endlabel3699; @@ -33865,69 +32996,76 @@ unsigned long REGPARAM2 CPUFUNC(op_e6f0_5)(uae_u32 opcode, struct regstruct *reg {{ uae_s16 data = get_word (dataa); regs->ir = regs->irc; get_word_prefetch (regs, 6); -{ uae_u16 val = data; - uae_u32 carry = val & 1; - val >>= 1; - if (carry) val |= 0x8000; +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry); + sign2 = 0x8000 & val; + SET_CFLG (®s->ccrflags, sign != 0); + COPY_CARRY (®s->ccrflags); + SET_VFLG (®s->ccrflags, GET_VFLG (®s->ccrflags) | (sign2 != sign)); put_word (dataa,val); }}}}} m68k_incpc (regs, 4); endlabel3699: ; -return 18 * 256; +return 16 * CYCLE_UNIT / 2; } -/* RORW.W (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_e6f8_5)(uae_u32 opcode, struct regstruct *regs) +/* ASLW.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_e1f9_11)(uae_u32 opcode, struct regstruct *regs) { -{{ uaecptr dataa = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); +{{ uaecptr dataa = get_long_prefetch (regs, 4); if (dataa & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dataa); goto endlabel3700; } {{ uae_s16 data = get_word (dataa); regs->ir = regs->irc; - get_word_prefetch (regs, 6); -{ uae_u16 val = data; - uae_u32 carry = val & 1; - val >>= 1; - if (carry) val |= 0x8000; + get_word_prefetch (regs, 8); +{ uae_u32 val = (uae_u16)data; + uae_u32 sign = 0x8000 & val; + uae_u32 sign2; + val <<= 1; CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); -SET_CFLG (®s->ccrflags, carry); + sign2 = 0x8000 & val; + SET_CFLG (®s->ccrflags, sign != 0); + COPY_CARRY (®s->ccrflags); + SET_VFLG (®s->ccrflags, GET_VFLG (®s->ccrflags) | (sign2 != sign)); put_word (dataa,val); -}}}}} m68k_incpc (regs, 4); +}}}}} m68k_incpc (regs, 6); endlabel3700: ; -return 16 * 256; +return 20 * CYCLE_UNIT / 2; } -/* RORW.W (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_e6f9_5)(uae_u32 opcode, struct regstruct *regs) +/* LSRW.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_e2d0_11)(uae_u32 opcode, struct regstruct *regs) { -{{ uaecptr dataa = get_long_prefetch (regs, 4); + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg(regs, srcreg); if (dataa & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dataa); goto endlabel3701; } {{ uae_s16 data = get_word (dataa); regs->ir = regs->irc; - get_word_prefetch (regs, 8); -{ uae_u16 val = data; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; uae_u32 carry = val & 1; val >>= 1; - if (carry) val |= 0x8000; CLEAR_CZNV (®s->ccrflags); SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); put_word (dataa,val); -}}}}} m68k_incpc (regs, 6); +}}}}} m68k_incpc (regs, 2); endlabel3701: ; -return 20 * 256; +return 12 * CYCLE_UNIT / 2; } -/* ROLW.W (An) */ -unsigned long REGPARAM2 CPUFUNC(op_e7d0_5)(uae_u32 opcode, struct regstruct *regs) +/* LSRW.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_e2d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr dataa = m68k_areg(regs, srcreg); @@ -33935,6 +33073,880 @@ unsigned long REGPARAM2 CPUFUNC(op_e7d0_5)(uae_u32 opcode, struct regstruct *reg exception3 (opcode, m68k_getpc(regs) + 2, dataa); goto endlabel3702; } +{{ uae_s16 data = get_word (dataa); + m68k_areg(regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3702: ; +return 12 * CYCLE_UNIT / 2; +} +/* LSRW.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_e2e0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3703; + } +{{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) = dataa; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3703: ; +return 14 * CYCLE_UNIT / 2; +} +/* LSRW.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_e2e8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3704; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3704: ; +return 16 * CYCLE_UNIT / 2; +} +/* LSRW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e2f0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3705; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3705: ; +return 18 * CYCLE_UNIT / 2; +} +/* LSRW.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_e2f8_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3706; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3706: ; +return 16 * CYCLE_UNIT / 2; +} +/* LSRW.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_e2f9_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = get_long_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3707; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ uae_u32 val = (uae_u16)data; + uae_u32 carry = val & 1; + val >>= 1; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 6); +endlabel3707: ; +return 20 * CYCLE_UNIT / 2; +} +/* LSLW.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_e3d0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3708; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3708: ; +return 12 * CYCLE_UNIT / 2; +} +/* LSLW.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_e3d8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3709; + } +{{ uae_s16 data = get_word (dataa); + m68k_areg(regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3709: ; +return 12 * CYCLE_UNIT / 2; +} +/* LSLW.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_e3e0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3710; + } +{{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) = dataa; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3710: ; +return 14 * CYCLE_UNIT / 2; +} +/* LSLW.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_e3e8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3711; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3711: ; +return 16 * CYCLE_UNIT / 2; +} +/* LSLW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e3f0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3712; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3712: ; +return 18 * CYCLE_UNIT / 2; +} +/* LSLW.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_e3f8_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3713; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3713: ; +return 16 * CYCLE_UNIT / 2; +} +/* LSLW.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_e3f9_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = get_long_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3714; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 6); +endlabel3714: ; +return 20 * CYCLE_UNIT / 2; +} +/* ROXRW.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_e4d0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3715; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG (®s->ccrflags)) val |= 0x8000; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3715: ; +return 12 * CYCLE_UNIT / 2; +} +/* ROXRW.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_e4d8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3716; + } +{{ uae_s16 data = get_word (dataa); + m68k_areg(regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG (®s->ccrflags)) val |= 0x8000; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3716: ; +return 12 * CYCLE_UNIT / 2; +} +/* ROXRW.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_e4e0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3717; + } +{{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) = dataa; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG (®s->ccrflags)) val |= 0x8000; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3717: ; +return 14 * CYCLE_UNIT / 2; +} +/* ROXRW.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_e4e8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3718; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG (®s->ccrflags)) val |= 0x8000; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3718: ; +return 16 * CYCLE_UNIT / 2; +} +/* ROXRW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e4f0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3719; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG (®s->ccrflags)) val |= 0x8000; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3719: ; +return 18 * CYCLE_UNIT / 2; +} +/* ROXRW.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_e4f8_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3720; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG (®s->ccrflags)) val |= 0x8000; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3720: ; +return 16 * CYCLE_UNIT / 2; +} +/* ROXRW.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_e4f9_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = get_long_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3721; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (GET_XFLG (®s->ccrflags)) val |= 0x8000; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 6); +endlabel3721: ; +return 20 * CYCLE_UNIT / 2; +} +/* ROXLW.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_e5d0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3722; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG (®s->ccrflags)) val |= 1; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3722: ; +return 12 * CYCLE_UNIT / 2; +} +/* ROXLW.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_e5d8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3723; + } +{{ uae_s16 data = get_word (dataa); + m68k_areg(regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG (®s->ccrflags)) val |= 1; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3723: ; +return 12 * CYCLE_UNIT / 2; +} +/* ROXLW.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_e5e0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3724; + } +{{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) = dataa; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG (®s->ccrflags)) val |= 1; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3724: ; +return 14 * CYCLE_UNIT / 2; +} +/* ROXLW.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_e5e8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3725; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG (®s->ccrflags)) val |= 1; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3725: ; +return 16 * CYCLE_UNIT / 2; +} +/* ROXLW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e5f0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3726; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG (®s->ccrflags)) val |= 1; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3726: ; +return 18 * CYCLE_UNIT / 2; +} +/* ROXLW.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_e5f8_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3727; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG (®s->ccrflags)) val |= 1; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3727: ; +return 16 * CYCLE_UNIT / 2; +} +/* ROXLW.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_e5f9_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = get_long_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3728; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ uae_u16 val = data; + uae_u32 carry = val & 0x8000; + val <<= 1; + if (GET_XFLG (®s->ccrflags)) val |= 1; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry >> 15); + COPY_CARRY (®s->ccrflags); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 6); +endlabel3728: ; +return 20 * CYCLE_UNIT / 2; +} +/* RORW.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_e6d0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3729; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3729: ; +return 12 * CYCLE_UNIT / 2; +} +/* RORW.W (An)+ */ +unsigned long REGPARAM2 CPUFUNC(op_e6d8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3730; + } +{{ uae_s16 data = get_word (dataa); + m68k_areg(regs, srcreg) += 2; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3730: ; +return 12 * CYCLE_UNIT / 2; +} +/* RORW.W -(An) */ +unsigned long REGPARAM2 CPUFUNC(op_e6e0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = m68k_areg(regs, srcreg) - 2; + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3731; + } +{{ uae_s16 data = get_word (dataa); + m68k_areg (regs, srcreg) = dataa; + regs->ir = regs->irc; + get_word_prefetch (regs, 4); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 2); +endlabel3731: ; +return 14 * CYCLE_UNIT / 2; +} +/* RORW.W (d16,An) */ +unsigned long REGPARAM2 CPUFUNC(op_e6e8_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3732; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3732: ; +return 16 * CYCLE_UNIT / 2; +} +/* RORW.W (d8,An,Xn) */ +unsigned long REGPARAM2 CPUFUNC(op_e6f0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa; + dataa = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3733; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3733: ; +return 18 * CYCLE_UNIT / 2; +} +/* RORW.W (xxx).W */ +unsigned long REGPARAM2 CPUFUNC(op_e6f8_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3734; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 6); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 4); +endlabel3734: ; +return 16 * CYCLE_UNIT / 2; +} +/* RORW.W (xxx).L */ +unsigned long REGPARAM2 CPUFUNC(op_e6f9_11)(uae_u32 opcode, struct regstruct *regs) +{ +{{ uaecptr dataa = get_long_prefetch (regs, 4); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3735; + } +{{ uae_s16 data = get_word (dataa); + regs->ir = regs->irc; + get_word_prefetch (regs, 8); +{ uae_u16 val = data; + uae_u32 carry = val & 1; + val >>= 1; + if (carry) val |= 0x8000; + CLEAR_CZNV (®s->ccrflags); + SET_ZFLG (®s->ccrflags, ((uae_s16)(val)) == 0); + SET_NFLG (®s->ccrflags, ((uae_s16)(val)) < 0); +SET_CFLG (®s->ccrflags, carry); + put_word (dataa,val); +}}}}} m68k_incpc (regs, 6); +endlabel3735: ; +return 20 * CYCLE_UNIT / 2; +} +/* ROLW.W (An) */ +unsigned long REGPARAM2 CPUFUNC(op_e7d0_11)(uae_u32 opcode, struct regstruct *regs) +{ + uae_u32 srcreg = (opcode & 7); +{{ uaecptr dataa = m68k_areg(regs, srcreg); + if (dataa & 1) { + exception3 (opcode, m68k_getpc(regs) + 2, dataa); + goto endlabel3736; + } {{ uae_s16 data = get_word (dataa); regs->ir = regs->irc; get_word_prefetch (regs, 4); @@ -33948,17 +33960,17 @@ unsigned long REGPARAM2 CPUFUNC(op_e7d0_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, carry >> 15); put_word (dataa,val); }}}}} m68k_incpc (regs, 2); -endlabel3702: ; -return 12 * 256; +endlabel3736: ; +return 12 * CYCLE_UNIT / 2; } /* ROLW.W (An)+ */ -unsigned long REGPARAM2 CPUFUNC(op_e7d8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e7d8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr dataa = m68k_areg(regs, srcreg); if (dataa & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3703; + goto endlabel3737; } {{ uae_s16 data = get_word (dataa); m68k_areg(regs, srcreg) += 2; @@ -33974,18 +33986,18 @@ unsigned long REGPARAM2 CPUFUNC(op_e7d8_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, carry >> 15); put_word (dataa,val); }}}}} m68k_incpc (regs, 2); -endlabel3703: ; -return 12 * 256; +endlabel3737: ; +return 12 * CYCLE_UNIT / 2; } /* ROLW.W -(An) */ -unsigned long REGPARAM2 CPUFUNC(op_e7e0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e7e0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr dataa; dataa = m68k_areg(regs, srcreg) - 2; if (dataa & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3704; + goto endlabel3738; } {{ uae_s16 data = get_word (dataa); m68k_areg (regs, srcreg) = dataa; @@ -34001,17 +34013,17 @@ unsigned long REGPARAM2 CPUFUNC(op_e7e0_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, carry >> 15); put_word (dataa,val); }}}}} m68k_incpc (regs, 2); -endlabel3704: ; -return 14 * 256; +endlabel3738: ; +return 14 * CYCLE_UNIT / 2; } /* ROLW.W (d16,An) */ -unsigned long REGPARAM2 CPUFUNC(op_e7e8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e7e8_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dataa & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3705; + goto endlabel3739; } {{ uae_s16 data = get_word (dataa); regs->ir = regs->irc; @@ -34026,18 +34038,18 @@ unsigned long REGPARAM2 CPUFUNC(op_e7e8_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, carry >> 15); put_word (dataa,val); }}}}} m68k_incpc (regs, 4); -endlabel3705: ; -return 16 * 256; +endlabel3739: ; +return 16 * CYCLE_UNIT / 2; } /* ROLW.W (d8,An,Xn) */ -unsigned long REGPARAM2 CPUFUNC(op_e7f0_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e7f0_11)(uae_u32 opcode, struct regstruct *regs) { uae_u32 srcreg = (opcode & 7); {{ uaecptr dataa; dataa = get_disp_ea_000(regs, m68k_areg(regs, srcreg), get_word_prefetch (regs, 4)); if (dataa & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3706; + goto endlabel3740; } {{ uae_s16 data = get_word (dataa); regs->ir = regs->irc; @@ -34052,16 +34064,16 @@ unsigned long REGPARAM2 CPUFUNC(op_e7f0_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, carry >> 15); put_word (dataa,val); }}}}} m68k_incpc (regs, 4); -endlabel3706: ; -return 18 * 256; +endlabel3740: ; +return 18 * CYCLE_UNIT / 2; } /* ROLW.W (xxx).W */ -unsigned long REGPARAM2 CPUFUNC(op_e7f8_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e7f8_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr dataa = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (dataa & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3707; + goto endlabel3741; } {{ uae_s16 data = get_word (dataa); regs->ir = regs->irc; @@ -34076,16 +34088,16 @@ unsigned long REGPARAM2 CPUFUNC(op_e7f8_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, carry >> 15); put_word (dataa,val); }}}}} m68k_incpc (regs, 4); -endlabel3707: ; -return 16 * 256; +endlabel3741: ; +return 16 * CYCLE_UNIT / 2; } /* ROLW.W (xxx).L */ -unsigned long REGPARAM2 CPUFUNC(op_e7f9_5)(uae_u32 opcode, struct regstruct *regs) +unsigned long REGPARAM2 CPUFUNC(op_e7f9_11)(uae_u32 opcode, struct regstruct *regs) { {{ uaecptr dataa = get_long_prefetch (regs, 4); if (dataa & 1) { exception3 (opcode, m68k_getpc(regs) + 2, dataa); - goto endlabel3708; + goto endlabel3742; } {{ uae_s16 data = get_word (dataa); regs->ir = regs->irc; @@ -34100,8 +34112,8 @@ unsigned long REGPARAM2 CPUFUNC(op_e7f9_5)(uae_u32 opcode, struct regstruct *reg SET_CFLG (®s->ccrflags, carry >> 15); put_word (dataa,val); }}}}} m68k_incpc (regs, 6); -endlabel3708: ; -return 20 * 256; +endlabel3742: ; +return 20 * CYCLE_UNIT / 2; } #endif diff --git a/src/cpustbl.cpp b/src/cpustbl.cpp index b3dfc816..524691f2 100644 --- a/src/cpustbl.cpp +++ b/src/cpustbl.cpp @@ -2282,6 +2282,39 @@ const struct cputbl CPUFUNC(op_smalltbl_0)[] = { { CPUFUNC(op_eff9_0), 61433 }, /* BFINS */ #endif #ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f000_0), 61440 }, /* MMUOP30A */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f008_0), 61448 }, /* MMUOP30A */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f010_0), 61456 }, /* MMUOP30A */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f018_0), 61464 }, /* MMUOP30A */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f020_0), 61472 }, /* MMUOP30A */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f028_0), 61480 }, /* MMUOP30A */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f030_0), 61488 }, /* MMUOP30A */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f038_0), 61496 }, /* MMUOP30A */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f039_0), 61497 }, /* MMUOP30A */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f03a_0), 61498 }, /* MMUOP30A */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f03b_0), 61499 }, /* MMUOP30A */ +#endif +#ifndef CPUEMU_68000_ONLY { CPUFUNC(op_f200_0), 61952 }, /* FPP */ #endif #ifndef CPUEMU_68000_ONLY @@ -2479,6 +2512,39 @@ const struct cputbl CPUFUNC(op_smalltbl_0)[] = { #ifndef CPUEMU_68000_ONLY { CPUFUNC(op_f620_0), 63008 }, /* MOVE16 */ #endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f800_0), 63488 }, /* MMUOP30B */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f808_0), 63496 }, /* MMUOP30B */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f810_0), 63504 }, /* MMUOP30B */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f818_0), 63512 }, /* MMUOP30B */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f820_0), 63520 }, /* MMUOP30B */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f828_0), 63528 }, /* MMUOP30B */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f830_0), 63536 }, /* MMUOP30B */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f838_0), 63544 }, /* MMUOP30B */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f839_0), 63545 }, /* MMUOP30B */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f83a_0), 63546 }, /* MMUOP30B */ +#endif +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_f83b_0), 63547 }, /* MMUOP30B */ +#endif { 0, 0 }}; #endif /* CPUEMU_0 */ #ifndef CPUEMU_68000_ONLY @@ -4283,6 +4349,17 @@ const struct cputbl CPUFUNC(op_smalltbl_1)[] = { { CPUFUNC(op_eff0_0), 61424 }, /* BFINS */ { CPUFUNC(op_eff8_0), 61432 }, /* BFINS */ { CPUFUNC(op_eff9_0), 61433 }, /* BFINS */ +{ CPUFUNC(op_f000_0), 61440 }, /* MMUOP30A */ +{ CPUFUNC(op_f008_0), 61448 }, /* MMUOP30A */ +{ CPUFUNC(op_f010_0), 61456 }, /* MMUOP30A */ +{ CPUFUNC(op_f018_0), 61464 }, /* MMUOP30A */ +{ CPUFUNC(op_f020_0), 61472 }, /* MMUOP30A */ +{ CPUFUNC(op_f028_0), 61480 }, /* MMUOP30A */ +{ CPUFUNC(op_f030_0), 61488 }, /* MMUOP30A */ +{ CPUFUNC(op_f038_0), 61496 }, /* MMUOP30A */ +{ CPUFUNC(op_f039_0), 61497 }, /* MMUOP30A */ +{ CPUFUNC(op_f03a_0), 61498 }, /* MMUOP30A */ +{ CPUFUNC(op_f03b_0), 61499 }, /* MMUOP30A */ { CPUFUNC(op_f200_0), 61952 }, /* FPP */ { CPUFUNC(op_f208_0), 61960 }, /* FPP */ { CPUFUNC(op_f210_0), 61968 }, /* FPP */ @@ -4323,6 +4400,43 @@ const struct cputbl CPUFUNC(op_smalltbl_1)[] = { { CPUFUNC(op_f379_0), 62329 }, /* FRESTORE */ { CPUFUNC(op_f37a_0), 62330 }, /* FRESTORE */ { CPUFUNC(op_f37b_0), 62331 }, /* FRESTORE */ +{ CPUFUNC(op_f408_0), 62472 }, /* CINVL */ +{ CPUFUNC(op_f410_0), 62480 }, /* CINVP */ +{ CPUFUNC(op_f418_0), 62488 }, /* CINVA */ +{ CPUFUNC(op_f419_0), 62489 }, /* CINVA */ +{ CPUFUNC(op_f41a_0), 62490 }, /* CINVA */ +{ CPUFUNC(op_f41b_0), 62491 }, /* CINVA */ +{ CPUFUNC(op_f41c_0), 62492 }, /* CINVA */ +{ CPUFUNC(op_f41d_0), 62493 }, /* CINVA */ +{ CPUFUNC(op_f41e_0), 62494 }, /* CINVA */ +{ CPUFUNC(op_f41f_0), 62495 }, /* CINVA */ +{ CPUFUNC(op_f428_0), 62504 }, /* CPUSHL */ +{ CPUFUNC(op_f430_0), 62512 }, /* CPUSHP */ +{ CPUFUNC(op_f438_0), 62520 }, /* CPUSHA */ +{ CPUFUNC(op_f439_0), 62521 }, /* CPUSHA */ +{ CPUFUNC(op_f43a_0), 62522 }, /* CPUSHA */ +{ CPUFUNC(op_f43b_0), 62523 }, /* CPUSHA */ +{ CPUFUNC(op_f43c_0), 62524 }, /* CPUSHA */ +{ CPUFUNC(op_f43d_0), 62525 }, /* CPUSHA */ +{ CPUFUNC(op_f43e_0), 62526 }, /* CPUSHA */ +{ CPUFUNC(op_f43f_0), 62527 }, /* CPUSHA */ +{ CPUFUNC(op_f500_0), 62720 }, /* MMUOP */ +{ CPUFUNC(op_f600_0), 62976 }, /* MOVE16 */ +{ CPUFUNC(op_f608_0), 62984 }, /* MOVE16 */ +{ CPUFUNC(op_f610_0), 62992 }, /* MOVE16 */ +{ CPUFUNC(op_f618_0), 63000 }, /* MOVE16 */ +{ CPUFUNC(op_f620_0), 63008 }, /* MOVE16 */ +{ CPUFUNC(op_f800_0), 63488 }, /* MMUOP30B */ +{ CPUFUNC(op_f808_0), 63496 }, /* MMUOP30B */ +{ CPUFUNC(op_f810_0), 63504 }, /* MMUOP30B */ +{ CPUFUNC(op_f818_0), 63512 }, /* MMUOP30B */ +{ CPUFUNC(op_f820_0), 63520 }, /* MMUOP30B */ +{ CPUFUNC(op_f828_0), 63528 }, /* MMUOP30B */ +{ CPUFUNC(op_f830_0), 63536 }, /* MMUOP30B */ +{ CPUFUNC(op_f838_0), 63544 }, /* MMUOP30B */ +{ CPUFUNC(op_f839_0), 63545 }, /* MMUOP30B */ +{ CPUFUNC(op_f83a_0), 63546 }, /* MMUOP30B */ +{ CPUFUNC(op_f83b_0), 63547 }, /* MMUOP30B */ { 0, 0 }}; #endif /* CPUEMU_68000_ONLY */ #ifndef CPUEMU_68000_ONLY @@ -5110,15 +5224,15 @@ const struct cputbl CPUFUNC(op_smalltbl_2)[] = { { CPUFUNC(op_46fa_0), 18170 }, /* MV2SR */ { CPUFUNC(op_46fb_0), 18171 }, /* MV2SR */ { CPUFUNC(op_46fc_0), 18172 }, /* MV2SR */ -{ CPUFUNC(op_4800_0), 18432 }, /* NBCD */ +{ CPUFUNC(op_4800_2), 18432 }, /* NBCD */ { CPUFUNC(op_4808_0), 18440 }, /* LINK */ -{ CPUFUNC(op_4810_0), 18448 }, /* NBCD */ -{ CPUFUNC(op_4818_0), 18456 }, /* NBCD */ -{ CPUFUNC(op_4820_0), 18464 }, /* NBCD */ -{ CPUFUNC(op_4828_0), 18472 }, /* NBCD */ -{ CPUFUNC(op_4830_0), 18480 }, /* NBCD */ -{ CPUFUNC(op_4838_0), 18488 }, /* NBCD */ -{ CPUFUNC(op_4839_0), 18489 }, /* NBCD */ +{ CPUFUNC(op_4810_2), 18448 }, /* NBCD */ +{ CPUFUNC(op_4818_2), 18456 }, /* NBCD */ +{ CPUFUNC(op_4820_2), 18464 }, /* NBCD */ +{ CPUFUNC(op_4828_2), 18472 }, /* NBCD */ +{ CPUFUNC(op_4830_2), 18480 }, /* NBCD */ +{ CPUFUNC(op_4838_2), 18488 }, /* NBCD */ +{ CPUFUNC(op_4839_2), 18489 }, /* NBCD */ { CPUFUNC(op_4840_0), 18496 }, /* SWAP */ { CPUFUNC(op_4848_0), 18504 }, /* BKPT */ { CPUFUNC(op_4850_0), 18512 }, /* PEA */ @@ -5590,8 +5704,8 @@ const struct cputbl CPUFUNC(op_smalltbl_2)[] = { { CPUFUNC(op_80fa_0), 33018 }, /* DIVU */ { CPUFUNC(op_80fb_0), 33019 }, /* DIVU */ { CPUFUNC(op_80fc_0), 33020 }, /* DIVU */ -{ CPUFUNC(op_8100_0), 33024 }, /* SBCD */ -{ CPUFUNC(op_8108_0), 33032 }, /* SBCD */ +{ CPUFUNC(op_8100_2), 33024 }, /* SBCD */ +{ CPUFUNC(op_8108_2), 33032 }, /* SBCD */ { CPUFUNC(op_8110_0), 33040 }, /* OR */ { CPUFUNC(op_8118_0), 33048 }, /* OR */ { CPUFUNC(op_8120_0), 33056 }, /* OR */ @@ -5844,8 +5958,8 @@ const struct cputbl CPUFUNC(op_smalltbl_2)[] = { { CPUFUNC(op_c0fa_0), 49402 }, /* MULU */ { CPUFUNC(op_c0fb_0), 49403 }, /* MULU */ { CPUFUNC(op_c0fc_0), 49404 }, /* MULU */ -{ CPUFUNC(op_c100_0), 49408 }, /* ABCD */ -{ CPUFUNC(op_c108_0), 49416 }, /* ABCD */ +{ CPUFUNC(op_c100_2), 49408 }, /* ABCD */ +{ CPUFUNC(op_c108_2), 49416 }, /* ABCD */ { CPUFUNC(op_c110_0), 49424 }, /* AND */ { CPUFUNC(op_c118_0), 49432 }, /* AND */ { CPUFUNC(op_c120_0), 49440 }, /* AND */ @@ -6127,6 +6241,68 @@ const struct cputbl CPUFUNC(op_smalltbl_2)[] = { { CPUFUNC(op_eff0_0), 61424 }, /* BFINS */ { CPUFUNC(op_eff8_0), 61432 }, /* BFINS */ { CPUFUNC(op_eff9_0), 61433 }, /* BFINS */ +{ CPUFUNC(op_f000_0), 61440 }, /* MMUOP30A */ +{ CPUFUNC(op_f008_0), 61448 }, /* MMUOP30A */ +{ CPUFUNC(op_f010_0), 61456 }, /* MMUOP30A */ +{ CPUFUNC(op_f018_0), 61464 }, /* MMUOP30A */ +{ CPUFUNC(op_f020_0), 61472 }, /* MMUOP30A */ +{ CPUFUNC(op_f028_0), 61480 }, /* MMUOP30A */ +{ CPUFUNC(op_f030_0), 61488 }, /* MMUOP30A */ +{ CPUFUNC(op_f038_0), 61496 }, /* MMUOP30A */ +{ CPUFUNC(op_f039_0), 61497 }, /* MMUOP30A */ +{ CPUFUNC(op_f03a_0), 61498 }, /* MMUOP30A */ +{ CPUFUNC(op_f03b_0), 61499 }, /* MMUOP30A */ +{ CPUFUNC(op_f200_0), 61952 }, /* FPP */ +{ CPUFUNC(op_f208_0), 61960 }, /* FPP */ +{ CPUFUNC(op_f210_0), 61968 }, /* FPP */ +{ CPUFUNC(op_f218_0), 61976 }, /* FPP */ +{ CPUFUNC(op_f220_0), 61984 }, /* FPP */ +{ CPUFUNC(op_f228_0), 61992 }, /* FPP */ +{ CPUFUNC(op_f230_0), 62000 }, /* FPP */ +{ CPUFUNC(op_f238_0), 62008 }, /* FPP */ +{ CPUFUNC(op_f239_0), 62009 }, /* FPP */ +{ CPUFUNC(op_f23a_0), 62010 }, /* FPP */ +{ CPUFUNC(op_f23b_0), 62011 }, /* FPP */ +{ CPUFUNC(op_f23c_0), 62012 }, /* FPP */ +{ CPUFUNC(op_f240_0), 62016 }, /* FScc */ +{ CPUFUNC(op_f248_0), 62024 }, /* FDBcc */ +{ CPUFUNC(op_f250_0), 62032 }, /* FScc */ +{ CPUFUNC(op_f258_0), 62040 }, /* FScc */ +{ CPUFUNC(op_f260_0), 62048 }, /* FScc */ +{ CPUFUNC(op_f268_0), 62056 }, /* FScc */ +{ CPUFUNC(op_f270_0), 62064 }, /* FScc */ +{ CPUFUNC(op_f278_0), 62072 }, /* FScc */ +{ CPUFUNC(op_f279_0), 62073 }, /* FScc */ +{ CPUFUNC(op_f27a_0), 62074 }, /* FTRAPcc */ +{ CPUFUNC(op_f27b_0), 62075 }, /* FTRAPcc */ +{ CPUFUNC(op_f27c_0), 62076 }, /* FTRAPcc */ +{ CPUFUNC(op_f280_0), 62080 }, /* FBcc */ +{ CPUFUNC(op_f2c0_0), 62144 }, /* FBcc */ +{ CPUFUNC(op_f310_0), 62224 }, /* FSAVE */ +{ CPUFUNC(op_f320_0), 62240 }, /* FSAVE */ +{ CPUFUNC(op_f328_0), 62248 }, /* FSAVE */ +{ CPUFUNC(op_f330_0), 62256 }, /* FSAVE */ +{ CPUFUNC(op_f338_0), 62264 }, /* FSAVE */ +{ CPUFUNC(op_f339_0), 62265 }, /* FSAVE */ +{ CPUFUNC(op_f350_0), 62288 }, /* FRESTORE */ +{ CPUFUNC(op_f358_0), 62296 }, /* FRESTORE */ +{ CPUFUNC(op_f368_0), 62312 }, /* FRESTORE */ +{ CPUFUNC(op_f370_0), 62320 }, /* FRESTORE */ +{ CPUFUNC(op_f378_0), 62328 }, /* FRESTORE */ +{ CPUFUNC(op_f379_0), 62329 }, /* FRESTORE */ +{ CPUFUNC(op_f37a_0), 62330 }, /* FRESTORE */ +{ CPUFUNC(op_f37b_0), 62331 }, /* FRESTORE */ +{ CPUFUNC(op_f800_0), 63488 }, /* MMUOP30B */ +{ CPUFUNC(op_f808_0), 63496 }, /* MMUOP30B */ +{ CPUFUNC(op_f810_0), 63504 }, /* MMUOP30B */ +{ CPUFUNC(op_f818_0), 63512 }, /* MMUOP30B */ +{ CPUFUNC(op_f820_0), 63520 }, /* MMUOP30B */ +{ CPUFUNC(op_f828_0), 63528 }, /* MMUOP30B */ +{ CPUFUNC(op_f830_0), 63536 }, /* MMUOP30B */ +{ CPUFUNC(op_f838_0), 63544 }, /* MMUOP30B */ +{ CPUFUNC(op_f839_0), 63545 }, /* MMUOP30B */ +{ CPUFUNC(op_f83a_0), 63546 }, /* MMUOP30B */ +{ CPUFUNC(op_f83b_0), 63547 }, /* MMUOP30B */ { 0, 0 }}; #endif /* CPUEMU_68000_ONLY */ #ifndef CPUEMU_68000_ONLY @@ -6136,7 +6312,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_0018_0), 24 }, /* OR */ { CPUFUNC(op_0020_0), 32 }, /* OR */ { CPUFUNC(op_0028_0), 40 }, /* OR */ -{ CPUFUNC(op_0030_3), 48 }, /* OR */ +{ CPUFUNC(op_0030_0), 48 }, /* OR */ { CPUFUNC(op_0038_0), 56 }, /* OR */ { CPUFUNC(op_0039_0), 57 }, /* OR */ { CPUFUNC(op_003c_0), 60 }, /* ORSR */ @@ -6145,7 +6321,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_0058_0), 88 }, /* OR */ { CPUFUNC(op_0060_0), 96 }, /* OR */ { CPUFUNC(op_0068_0), 104 }, /* OR */ -{ CPUFUNC(op_0070_3), 112 }, /* OR */ +{ CPUFUNC(op_0070_0), 112 }, /* OR */ { CPUFUNC(op_0078_0), 120 }, /* OR */ { CPUFUNC(op_0079_0), 121 }, /* OR */ { CPUFUNC(op_007c_0), 124 }, /* ORSR */ @@ -6154,20 +6330,27 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_0098_0), 152 }, /* OR */ { CPUFUNC(op_00a0_0), 160 }, /* OR */ { CPUFUNC(op_00a8_0), 168 }, /* OR */ -{ CPUFUNC(op_00b0_3), 176 }, /* OR */ +{ CPUFUNC(op_00b0_0), 176 }, /* OR */ { CPUFUNC(op_00b8_0), 184 }, /* OR */ { CPUFUNC(op_00b9_0), 185 }, /* OR */ +{ CPUFUNC(op_00d0_0), 208 }, /* CHK2 */ +{ CPUFUNC(op_00e8_0), 232 }, /* CHK2 */ +{ CPUFUNC(op_00f0_0), 240 }, /* CHK2 */ +{ CPUFUNC(op_00f8_0), 248 }, /* CHK2 */ +{ CPUFUNC(op_00f9_0), 249 }, /* CHK2 */ +{ CPUFUNC(op_00fa_0), 250 }, /* CHK2 */ +{ CPUFUNC(op_00fb_0), 251 }, /* CHK2 */ { CPUFUNC(op_0100_0), 256 }, /* BTST */ { CPUFUNC(op_0108_0), 264 }, /* MVPMR */ { CPUFUNC(op_0110_0), 272 }, /* BTST */ { CPUFUNC(op_0118_0), 280 }, /* BTST */ { CPUFUNC(op_0120_0), 288 }, /* BTST */ { CPUFUNC(op_0128_0), 296 }, /* BTST */ -{ CPUFUNC(op_0130_3), 304 }, /* BTST */ +{ CPUFUNC(op_0130_0), 304 }, /* BTST */ { CPUFUNC(op_0138_0), 312 }, /* BTST */ { CPUFUNC(op_0139_0), 313 }, /* BTST */ { CPUFUNC(op_013a_0), 314 }, /* BTST */ -{ CPUFUNC(op_013b_3), 315 }, /* BTST */ +{ CPUFUNC(op_013b_0), 315 }, /* BTST */ { CPUFUNC(op_013c_0), 316 }, /* BTST */ { CPUFUNC(op_0140_0), 320 }, /* BCHG */ { CPUFUNC(op_0148_0), 328 }, /* MVPMR */ @@ -6175,39 +6358,39 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_0158_0), 344 }, /* BCHG */ { CPUFUNC(op_0160_0), 352 }, /* BCHG */ { CPUFUNC(op_0168_0), 360 }, /* BCHG */ -{ CPUFUNC(op_0170_3), 368 }, /* BCHG */ +{ CPUFUNC(op_0170_0), 368 }, /* BCHG */ { CPUFUNC(op_0178_0), 376 }, /* BCHG */ { CPUFUNC(op_0179_0), 377 }, /* BCHG */ { CPUFUNC(op_017a_0), 378 }, /* BCHG */ -{ CPUFUNC(op_017b_3), 379 }, /* BCHG */ +{ CPUFUNC(op_017b_0), 379 }, /* BCHG */ { CPUFUNC(op_0180_0), 384 }, /* BCLR */ { CPUFUNC(op_0188_0), 392 }, /* MVPRM */ { CPUFUNC(op_0190_0), 400 }, /* BCLR */ { CPUFUNC(op_0198_0), 408 }, /* BCLR */ { CPUFUNC(op_01a0_0), 416 }, /* BCLR */ { CPUFUNC(op_01a8_0), 424 }, /* BCLR */ -{ CPUFUNC(op_01b0_3), 432 }, /* BCLR */ +{ CPUFUNC(op_01b0_0), 432 }, /* BCLR */ { CPUFUNC(op_01b8_0), 440 }, /* BCLR */ { CPUFUNC(op_01b9_0), 441 }, /* BCLR */ { CPUFUNC(op_01ba_0), 442 }, /* BCLR */ -{ CPUFUNC(op_01bb_3), 443 }, /* BCLR */ +{ CPUFUNC(op_01bb_0), 443 }, /* BCLR */ { CPUFUNC(op_01c0_0), 448 }, /* BSET */ { CPUFUNC(op_01c8_0), 456 }, /* MVPRM */ { CPUFUNC(op_01d0_0), 464 }, /* BSET */ { CPUFUNC(op_01d8_0), 472 }, /* BSET */ { CPUFUNC(op_01e0_0), 480 }, /* BSET */ { CPUFUNC(op_01e8_0), 488 }, /* BSET */ -{ CPUFUNC(op_01f0_3), 496 }, /* BSET */ +{ CPUFUNC(op_01f0_0), 496 }, /* BSET */ { CPUFUNC(op_01f8_0), 504 }, /* BSET */ { CPUFUNC(op_01f9_0), 505 }, /* BSET */ { CPUFUNC(op_01fa_0), 506 }, /* BSET */ -{ CPUFUNC(op_01fb_3), 507 }, /* BSET */ +{ CPUFUNC(op_01fb_0), 507 }, /* BSET */ { CPUFUNC(op_0200_0), 512 }, /* AND */ { CPUFUNC(op_0210_0), 528 }, /* AND */ { CPUFUNC(op_0218_0), 536 }, /* AND */ { CPUFUNC(op_0220_0), 544 }, /* AND */ { CPUFUNC(op_0228_0), 552 }, /* AND */ -{ CPUFUNC(op_0230_3), 560 }, /* AND */ +{ CPUFUNC(op_0230_0), 560 }, /* AND */ { CPUFUNC(op_0238_0), 568 }, /* AND */ { CPUFUNC(op_0239_0), 569 }, /* AND */ { CPUFUNC(op_023c_0), 572 }, /* ANDSR */ @@ -6216,7 +6399,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_0258_0), 600 }, /* AND */ { CPUFUNC(op_0260_0), 608 }, /* AND */ { CPUFUNC(op_0268_0), 616 }, /* AND */ -{ CPUFUNC(op_0270_3), 624 }, /* AND */ +{ CPUFUNC(op_0270_0), 624 }, /* AND */ { CPUFUNC(op_0278_0), 632 }, /* AND */ { CPUFUNC(op_0279_0), 633 }, /* AND */ { CPUFUNC(op_027c_0), 636 }, /* ANDSR */ @@ -6225,15 +6408,22 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_0298_0), 664 }, /* AND */ { CPUFUNC(op_02a0_0), 672 }, /* AND */ { CPUFUNC(op_02a8_0), 680 }, /* AND */ -{ CPUFUNC(op_02b0_3), 688 }, /* AND */ +{ CPUFUNC(op_02b0_0), 688 }, /* AND */ { CPUFUNC(op_02b8_0), 696 }, /* AND */ { CPUFUNC(op_02b9_0), 697 }, /* AND */ +{ CPUFUNC(op_02d0_0), 720 }, /* CHK2 */ +{ CPUFUNC(op_02e8_0), 744 }, /* CHK2 */ +{ CPUFUNC(op_02f0_0), 752 }, /* CHK2 */ +{ CPUFUNC(op_02f8_0), 760 }, /* CHK2 */ +{ CPUFUNC(op_02f9_0), 761 }, /* CHK2 */ +{ CPUFUNC(op_02fa_0), 762 }, /* CHK2 */ +{ CPUFUNC(op_02fb_0), 763 }, /* CHK2 */ { CPUFUNC(op_0400_0), 1024 }, /* SUB */ { CPUFUNC(op_0410_0), 1040 }, /* SUB */ { CPUFUNC(op_0418_0), 1048 }, /* SUB */ { CPUFUNC(op_0420_0), 1056 }, /* SUB */ { CPUFUNC(op_0428_0), 1064 }, /* SUB */ -{ CPUFUNC(op_0430_3), 1072 }, /* SUB */ +{ CPUFUNC(op_0430_0), 1072 }, /* SUB */ { CPUFUNC(op_0438_0), 1080 }, /* SUB */ { CPUFUNC(op_0439_0), 1081 }, /* SUB */ { CPUFUNC(op_0440_0), 1088 }, /* SUB */ @@ -6241,7 +6431,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_0458_0), 1112 }, /* SUB */ { CPUFUNC(op_0460_0), 1120 }, /* SUB */ { CPUFUNC(op_0468_0), 1128 }, /* SUB */ -{ CPUFUNC(op_0470_3), 1136 }, /* SUB */ +{ CPUFUNC(op_0470_0), 1136 }, /* SUB */ { CPUFUNC(op_0478_0), 1144 }, /* SUB */ { CPUFUNC(op_0479_0), 1145 }, /* SUB */ { CPUFUNC(op_0480_0), 1152 }, /* SUB */ @@ -6249,15 +6439,22 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_0498_0), 1176 }, /* SUB */ { CPUFUNC(op_04a0_0), 1184 }, /* SUB */ { CPUFUNC(op_04a8_0), 1192 }, /* SUB */ -{ CPUFUNC(op_04b0_3), 1200 }, /* SUB */ +{ CPUFUNC(op_04b0_0), 1200 }, /* SUB */ { CPUFUNC(op_04b8_0), 1208 }, /* SUB */ { CPUFUNC(op_04b9_0), 1209 }, /* SUB */ +{ CPUFUNC(op_04d0_0), 1232 }, /* CHK2 */ +{ CPUFUNC(op_04e8_0), 1256 }, /* CHK2 */ +{ CPUFUNC(op_04f0_0), 1264 }, /* CHK2 */ +{ CPUFUNC(op_04f8_0), 1272 }, /* CHK2 */ +{ CPUFUNC(op_04f9_0), 1273 }, /* CHK2 */ +{ CPUFUNC(op_04fa_0), 1274 }, /* CHK2 */ +{ CPUFUNC(op_04fb_0), 1275 }, /* CHK2 */ { CPUFUNC(op_0600_0), 1536 }, /* ADD */ { CPUFUNC(op_0610_0), 1552 }, /* ADD */ { CPUFUNC(op_0618_0), 1560 }, /* ADD */ { CPUFUNC(op_0620_0), 1568 }, /* ADD */ { CPUFUNC(op_0628_0), 1576 }, /* ADD */ -{ CPUFUNC(op_0630_3), 1584 }, /* ADD */ +{ CPUFUNC(op_0630_0), 1584 }, /* ADD */ { CPUFUNC(op_0638_0), 1592 }, /* ADD */ { CPUFUNC(op_0639_0), 1593 }, /* ADD */ { CPUFUNC(op_0640_0), 1600 }, /* ADD */ @@ -6265,7 +6462,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_0658_0), 1624 }, /* ADD */ { CPUFUNC(op_0660_0), 1632 }, /* ADD */ { CPUFUNC(op_0668_0), 1640 }, /* ADD */ -{ CPUFUNC(op_0670_3), 1648 }, /* ADD */ +{ CPUFUNC(op_0670_0), 1648 }, /* ADD */ { CPUFUNC(op_0678_0), 1656 }, /* ADD */ { CPUFUNC(op_0679_0), 1657 }, /* ADD */ { CPUFUNC(op_0680_0), 1664 }, /* ADD */ @@ -6273,56 +6470,65 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_0698_0), 1688 }, /* ADD */ { CPUFUNC(op_06a0_0), 1696 }, /* ADD */ { CPUFUNC(op_06a8_0), 1704 }, /* ADD */ -{ CPUFUNC(op_06b0_3), 1712 }, /* ADD */ +{ CPUFUNC(op_06b0_0), 1712 }, /* ADD */ { CPUFUNC(op_06b8_0), 1720 }, /* ADD */ { CPUFUNC(op_06b9_0), 1721 }, /* ADD */ +{ CPUFUNC(op_06c0_0), 1728 }, /* RTM */ +{ CPUFUNC(op_06c8_0), 1736 }, /* RTM */ +{ CPUFUNC(op_06d0_0), 1744 }, /* CALLM */ +{ CPUFUNC(op_06e8_0), 1768 }, /* CALLM */ +{ CPUFUNC(op_06f0_0), 1776 }, /* CALLM */ +{ CPUFUNC(op_06f8_0), 1784 }, /* CALLM */ +{ CPUFUNC(op_06f9_0), 1785 }, /* CALLM */ +{ CPUFUNC(op_06fa_0), 1786 }, /* CALLM */ +{ CPUFUNC(op_06fb_0), 1787 }, /* CALLM */ { CPUFUNC(op_0800_0), 2048 }, /* BTST */ { CPUFUNC(op_0810_0), 2064 }, /* BTST */ { CPUFUNC(op_0818_0), 2072 }, /* BTST */ { CPUFUNC(op_0820_0), 2080 }, /* BTST */ { CPUFUNC(op_0828_0), 2088 }, /* BTST */ -{ CPUFUNC(op_0830_3), 2096 }, /* BTST */ +{ CPUFUNC(op_0830_0), 2096 }, /* BTST */ { CPUFUNC(op_0838_0), 2104 }, /* BTST */ { CPUFUNC(op_0839_0), 2105 }, /* BTST */ { CPUFUNC(op_083a_0), 2106 }, /* BTST */ -{ CPUFUNC(op_083b_3), 2107 }, /* BTST */ +{ CPUFUNC(op_083b_0), 2107 }, /* BTST */ { CPUFUNC(op_083c_0), 2108 }, /* BTST */ { CPUFUNC(op_0840_0), 2112 }, /* BCHG */ { CPUFUNC(op_0850_0), 2128 }, /* BCHG */ { CPUFUNC(op_0858_0), 2136 }, /* BCHG */ { CPUFUNC(op_0860_0), 2144 }, /* BCHG */ { CPUFUNC(op_0868_0), 2152 }, /* BCHG */ -{ CPUFUNC(op_0870_3), 2160 }, /* BCHG */ +{ CPUFUNC(op_0870_0), 2160 }, /* BCHG */ { CPUFUNC(op_0878_0), 2168 }, /* BCHG */ { CPUFUNC(op_0879_0), 2169 }, /* BCHG */ { CPUFUNC(op_087a_0), 2170 }, /* BCHG */ -{ CPUFUNC(op_087b_3), 2171 }, /* BCHG */ +{ CPUFUNC(op_087b_0), 2171 }, /* BCHG */ { CPUFUNC(op_0880_0), 2176 }, /* BCLR */ { CPUFUNC(op_0890_0), 2192 }, /* BCLR */ { CPUFUNC(op_0898_0), 2200 }, /* BCLR */ { CPUFUNC(op_08a0_0), 2208 }, /* BCLR */ { CPUFUNC(op_08a8_0), 2216 }, /* BCLR */ -{ CPUFUNC(op_08b0_3), 2224 }, /* BCLR */ +{ CPUFUNC(op_08b0_0), 2224 }, /* BCLR */ { CPUFUNC(op_08b8_0), 2232 }, /* BCLR */ { CPUFUNC(op_08b9_0), 2233 }, /* BCLR */ { CPUFUNC(op_08ba_0), 2234 }, /* BCLR */ -{ CPUFUNC(op_08bb_3), 2235 }, /* BCLR */ +{ CPUFUNC(op_08bb_0), 2235 }, /* BCLR */ { CPUFUNC(op_08c0_0), 2240 }, /* BSET */ { CPUFUNC(op_08d0_0), 2256 }, /* BSET */ { CPUFUNC(op_08d8_0), 2264 }, /* BSET */ { CPUFUNC(op_08e0_0), 2272 }, /* BSET */ { CPUFUNC(op_08e8_0), 2280 }, /* BSET */ -{ CPUFUNC(op_08f0_3), 2288 }, /* BSET */ +{ CPUFUNC(op_08f0_0), 2288 }, /* BSET */ { CPUFUNC(op_08f8_0), 2296 }, /* BSET */ { CPUFUNC(op_08f9_0), 2297 }, /* BSET */ { CPUFUNC(op_08fa_0), 2298 }, /* BSET */ -{ CPUFUNC(op_08fb_3), 2299 }, /* BSET */ +{ CPUFUNC(op_08fb_0), 2299 }, /* BSET */ { CPUFUNC(op_0a00_0), 2560 }, /* EOR */ { CPUFUNC(op_0a10_0), 2576 }, /* EOR */ { CPUFUNC(op_0a18_0), 2584 }, /* EOR */ { CPUFUNC(op_0a20_0), 2592 }, /* EOR */ { CPUFUNC(op_0a28_0), 2600 }, /* EOR */ -{ CPUFUNC(op_0a30_3), 2608 }, /* EOR */ +{ CPUFUNC(op_0a30_0), 2608 }, /* EOR */ { CPUFUNC(op_0a38_0), 2616 }, /* EOR */ { CPUFUNC(op_0a39_0), 2617 }, /* EOR */ { CPUFUNC(op_0a3c_0), 2620 }, /* EORSR */ @@ -6331,7 +6537,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_0a58_0), 2648 }, /* EOR */ { CPUFUNC(op_0a60_0), 2656 }, /* EOR */ { CPUFUNC(op_0a68_0), 2664 }, /* EOR */ -{ CPUFUNC(op_0a70_3), 2672 }, /* EOR */ +{ CPUFUNC(op_0a70_0), 2672 }, /* EOR */ { CPUFUNC(op_0a78_0), 2680 }, /* EOR */ { CPUFUNC(op_0a79_0), 2681 }, /* EOR */ { CPUFUNC(op_0a7c_0), 2684 }, /* EORSR */ @@ -6340,120 +6546,170 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_0a98_0), 2712 }, /* EOR */ { CPUFUNC(op_0aa0_0), 2720 }, /* EOR */ { CPUFUNC(op_0aa8_0), 2728 }, /* EOR */ -{ CPUFUNC(op_0ab0_3), 2736 }, /* EOR */ +{ CPUFUNC(op_0ab0_0), 2736 }, /* EOR */ { CPUFUNC(op_0ab8_0), 2744 }, /* EOR */ { CPUFUNC(op_0ab9_0), 2745 }, /* EOR */ +{ CPUFUNC(op_0ad0_0), 2768 }, /* CAS */ +{ CPUFUNC(op_0ad8_0), 2776 }, /* CAS */ +{ CPUFUNC(op_0ae0_0), 2784 }, /* CAS */ +{ CPUFUNC(op_0ae8_0), 2792 }, /* CAS */ +{ CPUFUNC(op_0af0_0), 2800 }, /* CAS */ +{ CPUFUNC(op_0af8_0), 2808 }, /* CAS */ +{ CPUFUNC(op_0af9_0), 2809 }, /* CAS */ { CPUFUNC(op_0c00_0), 3072 }, /* CMP */ { CPUFUNC(op_0c10_0), 3088 }, /* CMP */ { CPUFUNC(op_0c18_0), 3096 }, /* CMP */ { CPUFUNC(op_0c20_0), 3104 }, /* CMP */ { CPUFUNC(op_0c28_0), 3112 }, /* CMP */ -{ CPUFUNC(op_0c30_3), 3120 }, /* CMP */ +{ CPUFUNC(op_0c30_0), 3120 }, /* CMP */ { CPUFUNC(op_0c38_0), 3128 }, /* CMP */ { CPUFUNC(op_0c39_0), 3129 }, /* CMP */ +{ CPUFUNC(op_0c3a_0), 3130 }, /* CMP */ +{ CPUFUNC(op_0c3b_0), 3131 }, /* CMP */ { CPUFUNC(op_0c40_0), 3136 }, /* CMP */ { CPUFUNC(op_0c50_0), 3152 }, /* CMP */ { CPUFUNC(op_0c58_0), 3160 }, /* CMP */ { CPUFUNC(op_0c60_0), 3168 }, /* CMP */ { CPUFUNC(op_0c68_0), 3176 }, /* CMP */ -{ CPUFUNC(op_0c70_3), 3184 }, /* CMP */ +{ CPUFUNC(op_0c70_0), 3184 }, /* CMP */ { CPUFUNC(op_0c78_0), 3192 }, /* CMP */ { CPUFUNC(op_0c79_0), 3193 }, /* CMP */ +{ CPUFUNC(op_0c7a_0), 3194 }, /* CMP */ +{ CPUFUNC(op_0c7b_0), 3195 }, /* CMP */ { CPUFUNC(op_0c80_0), 3200 }, /* CMP */ { CPUFUNC(op_0c90_0), 3216 }, /* CMP */ { CPUFUNC(op_0c98_0), 3224 }, /* CMP */ { CPUFUNC(op_0ca0_0), 3232 }, /* CMP */ { CPUFUNC(op_0ca8_0), 3240 }, /* CMP */ -{ CPUFUNC(op_0cb0_3), 3248 }, /* CMP */ +{ CPUFUNC(op_0cb0_0), 3248 }, /* CMP */ { CPUFUNC(op_0cb8_0), 3256 }, /* CMP */ { CPUFUNC(op_0cb9_0), 3257 }, /* CMP */ +{ CPUFUNC(op_0cba_0), 3258 }, /* CMP */ +{ CPUFUNC(op_0cbb_0), 3259 }, /* CMP */ +{ CPUFUNC(op_0cd0_0), 3280 }, /* CAS */ +{ CPUFUNC(op_0cd8_0), 3288 }, /* CAS */ +{ CPUFUNC(op_0ce0_0), 3296 }, /* CAS */ +{ CPUFUNC(op_0ce8_0), 3304 }, /* CAS */ +{ CPUFUNC(op_0cf0_0), 3312 }, /* CAS */ +{ CPUFUNC(op_0cf8_0), 3320 }, /* CAS */ +{ CPUFUNC(op_0cf9_0), 3321 }, /* CAS */ +{ CPUFUNC(op_0cfc_0), 3324 }, /* CAS2 */ +{ CPUFUNC(op_0e10_0), 3600 }, /* MOVES */ +{ CPUFUNC(op_0e18_0), 3608 }, /* MOVES */ +{ CPUFUNC(op_0e20_0), 3616 }, /* MOVES */ +{ CPUFUNC(op_0e28_0), 3624 }, /* MOVES */ +{ CPUFUNC(op_0e30_0), 3632 }, /* MOVES */ +{ CPUFUNC(op_0e38_0), 3640 }, /* MOVES */ +{ CPUFUNC(op_0e39_0), 3641 }, /* MOVES */ +{ CPUFUNC(op_0e50_0), 3664 }, /* MOVES */ +{ CPUFUNC(op_0e58_0), 3672 }, /* MOVES */ +{ CPUFUNC(op_0e60_0), 3680 }, /* MOVES */ +{ CPUFUNC(op_0e68_0), 3688 }, /* MOVES */ +{ CPUFUNC(op_0e70_0), 3696 }, /* MOVES */ +{ CPUFUNC(op_0e78_0), 3704 }, /* MOVES */ +{ CPUFUNC(op_0e79_0), 3705 }, /* MOVES */ +{ CPUFUNC(op_0e90_0), 3728 }, /* MOVES */ +{ CPUFUNC(op_0e98_0), 3736 }, /* MOVES */ +{ CPUFUNC(op_0ea0_0), 3744 }, /* MOVES */ +{ CPUFUNC(op_0ea8_0), 3752 }, /* MOVES */ +{ CPUFUNC(op_0eb0_0), 3760 }, /* MOVES */ +{ CPUFUNC(op_0eb8_0), 3768 }, /* MOVES */ +{ CPUFUNC(op_0eb9_0), 3769 }, /* MOVES */ +{ CPUFUNC(op_0ed0_0), 3792 }, /* CAS */ +{ CPUFUNC(op_0ed8_0), 3800 }, /* CAS */ +{ CPUFUNC(op_0ee0_0), 3808 }, /* CAS */ +{ CPUFUNC(op_0ee8_0), 3816 }, /* CAS */ +{ CPUFUNC(op_0ef0_0), 3824 }, /* CAS */ +{ CPUFUNC(op_0ef8_0), 3832 }, /* CAS */ +{ CPUFUNC(op_0ef9_0), 3833 }, /* CAS */ +{ CPUFUNC(op_0efc_0), 3836 }, /* CAS2 */ { CPUFUNC(op_1000_0), 4096 }, /* MOVE */ { CPUFUNC(op_1010_0), 4112 }, /* MOVE */ { CPUFUNC(op_1018_0), 4120 }, /* MOVE */ { CPUFUNC(op_1020_0), 4128 }, /* MOVE */ { CPUFUNC(op_1028_0), 4136 }, /* MOVE */ -{ CPUFUNC(op_1030_3), 4144 }, /* MOVE */ +{ CPUFUNC(op_1030_0), 4144 }, /* MOVE */ { CPUFUNC(op_1038_0), 4152 }, /* MOVE */ { CPUFUNC(op_1039_0), 4153 }, /* MOVE */ { CPUFUNC(op_103a_0), 4154 }, /* MOVE */ -{ CPUFUNC(op_103b_3), 4155 }, /* MOVE */ +{ CPUFUNC(op_103b_0), 4155 }, /* MOVE */ { CPUFUNC(op_103c_0), 4156 }, /* MOVE */ { CPUFUNC(op_1080_0), 4224 }, /* MOVE */ { CPUFUNC(op_1090_0), 4240 }, /* MOVE */ { CPUFUNC(op_1098_0), 4248 }, /* MOVE */ { CPUFUNC(op_10a0_0), 4256 }, /* MOVE */ { CPUFUNC(op_10a8_0), 4264 }, /* MOVE */ -{ CPUFUNC(op_10b0_3), 4272 }, /* MOVE */ +{ CPUFUNC(op_10b0_0), 4272 }, /* MOVE */ { CPUFUNC(op_10b8_0), 4280 }, /* MOVE */ { CPUFUNC(op_10b9_0), 4281 }, /* MOVE */ { CPUFUNC(op_10ba_0), 4282 }, /* MOVE */ -{ CPUFUNC(op_10bb_3), 4283 }, /* MOVE */ +{ CPUFUNC(op_10bb_0), 4283 }, /* MOVE */ { CPUFUNC(op_10bc_0), 4284 }, /* MOVE */ { CPUFUNC(op_10c0_0), 4288 }, /* MOVE */ { CPUFUNC(op_10d0_0), 4304 }, /* MOVE */ { CPUFUNC(op_10d8_0), 4312 }, /* MOVE */ { CPUFUNC(op_10e0_0), 4320 }, /* MOVE */ { CPUFUNC(op_10e8_0), 4328 }, /* MOVE */ -{ CPUFUNC(op_10f0_3), 4336 }, /* MOVE */ +{ CPUFUNC(op_10f0_0), 4336 }, /* MOVE */ { CPUFUNC(op_10f8_0), 4344 }, /* MOVE */ { CPUFUNC(op_10f9_0), 4345 }, /* MOVE */ { CPUFUNC(op_10fa_0), 4346 }, /* MOVE */ -{ CPUFUNC(op_10fb_3), 4347 }, /* MOVE */ +{ CPUFUNC(op_10fb_0), 4347 }, /* MOVE */ { CPUFUNC(op_10fc_0), 4348 }, /* MOVE */ { CPUFUNC(op_1100_0), 4352 }, /* MOVE */ { CPUFUNC(op_1110_0), 4368 }, /* MOVE */ { CPUFUNC(op_1118_0), 4376 }, /* MOVE */ { CPUFUNC(op_1120_0), 4384 }, /* MOVE */ { CPUFUNC(op_1128_0), 4392 }, /* MOVE */ -{ CPUFUNC(op_1130_3), 4400 }, /* MOVE */ +{ CPUFUNC(op_1130_0), 4400 }, /* MOVE */ { CPUFUNC(op_1138_0), 4408 }, /* MOVE */ { CPUFUNC(op_1139_0), 4409 }, /* MOVE */ { CPUFUNC(op_113a_0), 4410 }, /* MOVE */ -{ CPUFUNC(op_113b_3), 4411 }, /* MOVE */ +{ CPUFUNC(op_113b_0), 4411 }, /* MOVE */ { CPUFUNC(op_113c_0), 4412 }, /* MOVE */ { CPUFUNC(op_1140_0), 4416 }, /* MOVE */ { CPUFUNC(op_1150_0), 4432 }, /* MOVE */ { CPUFUNC(op_1158_0), 4440 }, /* MOVE */ { CPUFUNC(op_1160_0), 4448 }, /* MOVE */ { CPUFUNC(op_1168_0), 4456 }, /* MOVE */ -{ CPUFUNC(op_1170_3), 4464 }, /* MOVE */ +{ CPUFUNC(op_1170_0), 4464 }, /* MOVE */ { CPUFUNC(op_1178_0), 4472 }, /* MOVE */ { CPUFUNC(op_1179_0), 4473 }, /* MOVE */ { CPUFUNC(op_117a_0), 4474 }, /* MOVE */ -{ CPUFUNC(op_117b_3), 4475 }, /* MOVE */ +{ CPUFUNC(op_117b_0), 4475 }, /* MOVE */ { CPUFUNC(op_117c_0), 4476 }, /* MOVE */ -{ CPUFUNC(op_1180_3), 4480 }, /* MOVE */ -{ CPUFUNC(op_1190_3), 4496 }, /* MOVE */ -{ CPUFUNC(op_1198_3), 4504 }, /* MOVE */ -{ CPUFUNC(op_11a0_3), 4512 }, /* MOVE */ -{ CPUFUNC(op_11a8_3), 4520 }, /* MOVE */ -{ CPUFUNC(op_11b0_3), 4528 }, /* MOVE */ -{ CPUFUNC(op_11b8_3), 4536 }, /* MOVE */ -{ CPUFUNC(op_11b9_3), 4537 }, /* MOVE */ -{ CPUFUNC(op_11ba_3), 4538 }, /* MOVE */ -{ CPUFUNC(op_11bb_3), 4539 }, /* MOVE */ -{ CPUFUNC(op_11bc_3), 4540 }, /* MOVE */ +{ CPUFUNC(op_1180_0), 4480 }, /* MOVE */ +{ CPUFUNC(op_1190_0), 4496 }, /* MOVE */ +{ CPUFUNC(op_1198_0), 4504 }, /* MOVE */ +{ CPUFUNC(op_11a0_0), 4512 }, /* MOVE */ +{ CPUFUNC(op_11a8_0), 4520 }, /* MOVE */ +{ CPUFUNC(op_11b0_0), 4528 }, /* MOVE */ +{ CPUFUNC(op_11b8_0), 4536 }, /* MOVE */ +{ CPUFUNC(op_11b9_0), 4537 }, /* MOVE */ +{ CPUFUNC(op_11ba_0), 4538 }, /* MOVE */ +{ CPUFUNC(op_11bb_0), 4539 }, /* MOVE */ +{ CPUFUNC(op_11bc_0), 4540 }, /* MOVE */ { CPUFUNC(op_11c0_0), 4544 }, /* MOVE */ { CPUFUNC(op_11d0_0), 4560 }, /* MOVE */ { CPUFUNC(op_11d8_0), 4568 }, /* MOVE */ { CPUFUNC(op_11e0_0), 4576 }, /* MOVE */ { CPUFUNC(op_11e8_0), 4584 }, /* MOVE */ -{ CPUFUNC(op_11f0_3), 4592 }, /* MOVE */ +{ CPUFUNC(op_11f0_0), 4592 }, /* MOVE */ { CPUFUNC(op_11f8_0), 4600 }, /* MOVE */ { CPUFUNC(op_11f9_0), 4601 }, /* MOVE */ { CPUFUNC(op_11fa_0), 4602 }, /* MOVE */ -{ CPUFUNC(op_11fb_3), 4603 }, /* MOVE */ +{ CPUFUNC(op_11fb_0), 4603 }, /* MOVE */ { CPUFUNC(op_11fc_0), 4604 }, /* MOVE */ { CPUFUNC(op_13c0_0), 5056 }, /* MOVE */ { CPUFUNC(op_13d0_0), 5072 }, /* MOVE */ { CPUFUNC(op_13d8_0), 5080 }, /* MOVE */ { CPUFUNC(op_13e0_0), 5088 }, /* MOVE */ { CPUFUNC(op_13e8_0), 5096 }, /* MOVE */ -{ CPUFUNC(op_13f0_3), 5104 }, /* MOVE */ +{ CPUFUNC(op_13f0_0), 5104 }, /* MOVE */ { CPUFUNC(op_13f8_0), 5112 }, /* MOVE */ { CPUFUNC(op_13f9_0), 5113 }, /* MOVE */ { CPUFUNC(op_13fa_0), 5114 }, /* MOVE */ -{ CPUFUNC(op_13fb_3), 5115 }, /* MOVE */ +{ CPUFUNC(op_13fb_0), 5115 }, /* MOVE */ { CPUFUNC(op_13fc_0), 5116 }, /* MOVE */ { CPUFUNC(op_2000_0), 8192 }, /* MOVE */ { CPUFUNC(op_2008_0), 8200 }, /* MOVE */ @@ -6461,11 +6717,11 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_2018_0), 8216 }, /* MOVE */ { CPUFUNC(op_2020_0), 8224 }, /* MOVE */ { CPUFUNC(op_2028_0), 8232 }, /* MOVE */ -{ CPUFUNC(op_2030_3), 8240 }, /* MOVE */ +{ CPUFUNC(op_2030_0), 8240 }, /* MOVE */ { CPUFUNC(op_2038_0), 8248 }, /* MOVE */ { CPUFUNC(op_2039_0), 8249 }, /* MOVE */ { CPUFUNC(op_203a_0), 8250 }, /* MOVE */ -{ CPUFUNC(op_203b_3), 8251 }, /* MOVE */ +{ CPUFUNC(op_203b_0), 8251 }, /* MOVE */ { CPUFUNC(op_203c_0), 8252 }, /* MOVE */ { CPUFUNC(op_2040_0), 8256 }, /* MOVEA */ { CPUFUNC(op_2048_0), 8264 }, /* MOVEA */ @@ -6473,11 +6729,11 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_2058_0), 8280 }, /* MOVEA */ { CPUFUNC(op_2060_0), 8288 }, /* MOVEA */ { CPUFUNC(op_2068_0), 8296 }, /* MOVEA */ -{ CPUFUNC(op_2070_3), 8304 }, /* MOVEA */ +{ CPUFUNC(op_2070_0), 8304 }, /* MOVEA */ { CPUFUNC(op_2078_0), 8312 }, /* MOVEA */ { CPUFUNC(op_2079_0), 8313 }, /* MOVEA */ { CPUFUNC(op_207a_0), 8314 }, /* MOVEA */ -{ CPUFUNC(op_207b_3), 8315 }, /* MOVEA */ +{ CPUFUNC(op_207b_0), 8315 }, /* MOVEA */ { CPUFUNC(op_207c_0), 8316 }, /* MOVEA */ { CPUFUNC(op_2080_0), 8320 }, /* MOVE */ { CPUFUNC(op_2088_0), 8328 }, /* MOVE */ @@ -6485,11 +6741,11 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_2098_0), 8344 }, /* MOVE */ { CPUFUNC(op_20a0_0), 8352 }, /* MOVE */ { CPUFUNC(op_20a8_0), 8360 }, /* MOVE */ -{ CPUFUNC(op_20b0_3), 8368 }, /* MOVE */ +{ CPUFUNC(op_20b0_0), 8368 }, /* MOVE */ { CPUFUNC(op_20b8_0), 8376 }, /* MOVE */ { CPUFUNC(op_20b9_0), 8377 }, /* MOVE */ { CPUFUNC(op_20ba_0), 8378 }, /* MOVE */ -{ CPUFUNC(op_20bb_3), 8379 }, /* MOVE */ +{ CPUFUNC(op_20bb_0), 8379 }, /* MOVE */ { CPUFUNC(op_20bc_0), 8380 }, /* MOVE */ { CPUFUNC(op_20c0_0), 8384 }, /* MOVE */ { CPUFUNC(op_20c8_0), 8392 }, /* MOVE */ @@ -6497,11 +6753,11 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_20d8_0), 8408 }, /* MOVE */ { CPUFUNC(op_20e0_0), 8416 }, /* MOVE */ { CPUFUNC(op_20e8_0), 8424 }, /* MOVE */ -{ CPUFUNC(op_20f0_3), 8432 }, /* MOVE */ +{ CPUFUNC(op_20f0_0), 8432 }, /* MOVE */ { CPUFUNC(op_20f8_0), 8440 }, /* MOVE */ { CPUFUNC(op_20f9_0), 8441 }, /* MOVE */ { CPUFUNC(op_20fa_0), 8442 }, /* MOVE */ -{ CPUFUNC(op_20fb_3), 8443 }, /* MOVE */ +{ CPUFUNC(op_20fb_0), 8443 }, /* MOVE */ { CPUFUNC(op_20fc_0), 8444 }, /* MOVE */ { CPUFUNC(op_2100_0), 8448 }, /* MOVE */ { CPUFUNC(op_2108_0), 8456 }, /* MOVE */ @@ -6509,11 +6765,11 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_2118_0), 8472 }, /* MOVE */ { CPUFUNC(op_2120_0), 8480 }, /* MOVE */ { CPUFUNC(op_2128_0), 8488 }, /* MOVE */ -{ CPUFUNC(op_2130_3), 8496 }, /* MOVE */ +{ CPUFUNC(op_2130_0), 8496 }, /* MOVE */ { CPUFUNC(op_2138_0), 8504 }, /* MOVE */ { CPUFUNC(op_2139_0), 8505 }, /* MOVE */ { CPUFUNC(op_213a_0), 8506 }, /* MOVE */ -{ CPUFUNC(op_213b_3), 8507 }, /* MOVE */ +{ CPUFUNC(op_213b_0), 8507 }, /* MOVE */ { CPUFUNC(op_213c_0), 8508 }, /* MOVE */ { CPUFUNC(op_2140_0), 8512 }, /* MOVE */ { CPUFUNC(op_2148_0), 8520 }, /* MOVE */ @@ -6521,35 +6777,35 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_2158_0), 8536 }, /* MOVE */ { CPUFUNC(op_2160_0), 8544 }, /* MOVE */ { CPUFUNC(op_2168_0), 8552 }, /* MOVE */ -{ CPUFUNC(op_2170_3), 8560 }, /* MOVE */ +{ CPUFUNC(op_2170_0), 8560 }, /* MOVE */ { CPUFUNC(op_2178_0), 8568 }, /* MOVE */ { CPUFUNC(op_2179_0), 8569 }, /* MOVE */ { CPUFUNC(op_217a_0), 8570 }, /* MOVE */ -{ CPUFUNC(op_217b_3), 8571 }, /* MOVE */ +{ CPUFUNC(op_217b_0), 8571 }, /* MOVE */ { CPUFUNC(op_217c_0), 8572 }, /* MOVE */ -{ CPUFUNC(op_2180_3), 8576 }, /* MOVE */ -{ CPUFUNC(op_2188_3), 8584 }, /* MOVE */ -{ CPUFUNC(op_2190_3), 8592 }, /* MOVE */ -{ CPUFUNC(op_2198_3), 8600 }, /* MOVE */ -{ CPUFUNC(op_21a0_3), 8608 }, /* MOVE */ -{ CPUFUNC(op_21a8_3), 8616 }, /* MOVE */ -{ CPUFUNC(op_21b0_3), 8624 }, /* MOVE */ -{ CPUFUNC(op_21b8_3), 8632 }, /* MOVE */ -{ CPUFUNC(op_21b9_3), 8633 }, /* MOVE */ -{ CPUFUNC(op_21ba_3), 8634 }, /* MOVE */ -{ CPUFUNC(op_21bb_3), 8635 }, /* MOVE */ -{ CPUFUNC(op_21bc_3), 8636 }, /* MOVE */ +{ CPUFUNC(op_2180_0), 8576 }, /* MOVE */ +{ CPUFUNC(op_2188_0), 8584 }, /* MOVE */ +{ CPUFUNC(op_2190_0), 8592 }, /* MOVE */ +{ CPUFUNC(op_2198_0), 8600 }, /* MOVE */ +{ CPUFUNC(op_21a0_0), 8608 }, /* MOVE */ +{ CPUFUNC(op_21a8_0), 8616 }, /* MOVE */ +{ CPUFUNC(op_21b0_0), 8624 }, /* MOVE */ +{ CPUFUNC(op_21b8_0), 8632 }, /* MOVE */ +{ CPUFUNC(op_21b9_0), 8633 }, /* MOVE */ +{ CPUFUNC(op_21ba_0), 8634 }, /* MOVE */ +{ CPUFUNC(op_21bb_0), 8635 }, /* MOVE */ +{ CPUFUNC(op_21bc_0), 8636 }, /* MOVE */ { CPUFUNC(op_21c0_0), 8640 }, /* MOVE */ { CPUFUNC(op_21c8_0), 8648 }, /* MOVE */ { CPUFUNC(op_21d0_0), 8656 }, /* MOVE */ { CPUFUNC(op_21d8_0), 8664 }, /* MOVE */ { CPUFUNC(op_21e0_0), 8672 }, /* MOVE */ { CPUFUNC(op_21e8_0), 8680 }, /* MOVE */ -{ CPUFUNC(op_21f0_3), 8688 }, /* MOVE */ +{ CPUFUNC(op_21f0_0), 8688 }, /* MOVE */ { CPUFUNC(op_21f8_0), 8696 }, /* MOVE */ { CPUFUNC(op_21f9_0), 8697 }, /* MOVE */ { CPUFUNC(op_21fa_0), 8698 }, /* MOVE */ -{ CPUFUNC(op_21fb_3), 8699 }, /* MOVE */ +{ CPUFUNC(op_21fb_0), 8699 }, /* MOVE */ { CPUFUNC(op_21fc_0), 8700 }, /* MOVE */ { CPUFUNC(op_23c0_0), 9152 }, /* MOVE */ { CPUFUNC(op_23c8_0), 9160 }, /* MOVE */ @@ -6557,11 +6813,11 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_23d8_0), 9176 }, /* MOVE */ { CPUFUNC(op_23e0_0), 9184 }, /* MOVE */ { CPUFUNC(op_23e8_0), 9192 }, /* MOVE */ -{ CPUFUNC(op_23f0_3), 9200 }, /* MOVE */ +{ CPUFUNC(op_23f0_0), 9200 }, /* MOVE */ { CPUFUNC(op_23f8_0), 9208 }, /* MOVE */ { CPUFUNC(op_23f9_0), 9209 }, /* MOVE */ { CPUFUNC(op_23fa_0), 9210 }, /* MOVE */ -{ CPUFUNC(op_23fb_3), 9211 }, /* MOVE */ +{ CPUFUNC(op_23fb_0), 9211 }, /* MOVE */ { CPUFUNC(op_23fc_0), 9212 }, /* MOVE */ { CPUFUNC(op_3000_0), 12288 }, /* MOVE */ { CPUFUNC(op_3008_0), 12296 }, /* MOVE */ @@ -6569,11 +6825,11 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_3018_0), 12312 }, /* MOVE */ { CPUFUNC(op_3020_0), 12320 }, /* MOVE */ { CPUFUNC(op_3028_0), 12328 }, /* MOVE */ -{ CPUFUNC(op_3030_3), 12336 }, /* MOVE */ +{ CPUFUNC(op_3030_0), 12336 }, /* MOVE */ { CPUFUNC(op_3038_0), 12344 }, /* MOVE */ { CPUFUNC(op_3039_0), 12345 }, /* MOVE */ { CPUFUNC(op_303a_0), 12346 }, /* MOVE */ -{ CPUFUNC(op_303b_3), 12347 }, /* MOVE */ +{ CPUFUNC(op_303b_0), 12347 }, /* MOVE */ { CPUFUNC(op_303c_0), 12348 }, /* MOVE */ { CPUFUNC(op_3040_0), 12352 }, /* MOVEA */ { CPUFUNC(op_3048_0), 12360 }, /* MOVEA */ @@ -6581,11 +6837,11 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_3058_0), 12376 }, /* MOVEA */ { CPUFUNC(op_3060_0), 12384 }, /* MOVEA */ { CPUFUNC(op_3068_0), 12392 }, /* MOVEA */ -{ CPUFUNC(op_3070_3), 12400 }, /* MOVEA */ +{ CPUFUNC(op_3070_0), 12400 }, /* MOVEA */ { CPUFUNC(op_3078_0), 12408 }, /* MOVEA */ { CPUFUNC(op_3079_0), 12409 }, /* MOVEA */ { CPUFUNC(op_307a_0), 12410 }, /* MOVEA */ -{ CPUFUNC(op_307b_3), 12411 }, /* MOVEA */ +{ CPUFUNC(op_307b_0), 12411 }, /* MOVEA */ { CPUFUNC(op_307c_0), 12412 }, /* MOVEA */ { CPUFUNC(op_3080_0), 12416 }, /* MOVE */ { CPUFUNC(op_3088_0), 12424 }, /* MOVE */ @@ -6593,11 +6849,11 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_3098_0), 12440 }, /* MOVE */ { CPUFUNC(op_30a0_0), 12448 }, /* MOVE */ { CPUFUNC(op_30a8_0), 12456 }, /* MOVE */ -{ CPUFUNC(op_30b0_3), 12464 }, /* MOVE */ +{ CPUFUNC(op_30b0_0), 12464 }, /* MOVE */ { CPUFUNC(op_30b8_0), 12472 }, /* MOVE */ { CPUFUNC(op_30b9_0), 12473 }, /* MOVE */ { CPUFUNC(op_30ba_0), 12474 }, /* MOVE */ -{ CPUFUNC(op_30bb_3), 12475 }, /* MOVE */ +{ CPUFUNC(op_30bb_0), 12475 }, /* MOVE */ { CPUFUNC(op_30bc_0), 12476 }, /* MOVE */ { CPUFUNC(op_30c0_0), 12480 }, /* MOVE */ { CPUFUNC(op_30c8_0), 12488 }, /* MOVE */ @@ -6605,11 +6861,11 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_30d8_0), 12504 }, /* MOVE */ { CPUFUNC(op_30e0_0), 12512 }, /* MOVE */ { CPUFUNC(op_30e8_0), 12520 }, /* MOVE */ -{ CPUFUNC(op_30f0_3), 12528 }, /* MOVE */ +{ CPUFUNC(op_30f0_0), 12528 }, /* MOVE */ { CPUFUNC(op_30f8_0), 12536 }, /* MOVE */ { CPUFUNC(op_30f9_0), 12537 }, /* MOVE */ { CPUFUNC(op_30fa_0), 12538 }, /* MOVE */ -{ CPUFUNC(op_30fb_3), 12539 }, /* MOVE */ +{ CPUFUNC(op_30fb_0), 12539 }, /* MOVE */ { CPUFUNC(op_30fc_0), 12540 }, /* MOVE */ { CPUFUNC(op_3100_0), 12544 }, /* MOVE */ { CPUFUNC(op_3108_0), 12552 }, /* MOVE */ @@ -6617,11 +6873,11 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_3118_0), 12568 }, /* MOVE */ { CPUFUNC(op_3120_0), 12576 }, /* MOVE */ { CPUFUNC(op_3128_0), 12584 }, /* MOVE */ -{ CPUFUNC(op_3130_3), 12592 }, /* MOVE */ +{ CPUFUNC(op_3130_0), 12592 }, /* MOVE */ { CPUFUNC(op_3138_0), 12600 }, /* MOVE */ { CPUFUNC(op_3139_0), 12601 }, /* MOVE */ { CPUFUNC(op_313a_0), 12602 }, /* MOVE */ -{ CPUFUNC(op_313b_3), 12603 }, /* MOVE */ +{ CPUFUNC(op_313b_0), 12603 }, /* MOVE */ { CPUFUNC(op_313c_0), 12604 }, /* MOVE */ { CPUFUNC(op_3140_0), 12608 }, /* MOVE */ { CPUFUNC(op_3148_0), 12616 }, /* MOVE */ @@ -6629,35 +6885,35 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_3158_0), 12632 }, /* MOVE */ { CPUFUNC(op_3160_0), 12640 }, /* MOVE */ { CPUFUNC(op_3168_0), 12648 }, /* MOVE */ -{ CPUFUNC(op_3170_3), 12656 }, /* MOVE */ +{ CPUFUNC(op_3170_0), 12656 }, /* MOVE */ { CPUFUNC(op_3178_0), 12664 }, /* MOVE */ { CPUFUNC(op_3179_0), 12665 }, /* MOVE */ { CPUFUNC(op_317a_0), 12666 }, /* MOVE */ -{ CPUFUNC(op_317b_3), 12667 }, /* MOVE */ +{ CPUFUNC(op_317b_0), 12667 }, /* MOVE */ { CPUFUNC(op_317c_0), 12668 }, /* MOVE */ -{ CPUFUNC(op_3180_3), 12672 }, /* MOVE */ -{ CPUFUNC(op_3188_3), 12680 }, /* MOVE */ -{ CPUFUNC(op_3190_3), 12688 }, /* MOVE */ -{ CPUFUNC(op_3198_3), 12696 }, /* MOVE */ -{ CPUFUNC(op_31a0_3), 12704 }, /* MOVE */ -{ CPUFUNC(op_31a8_3), 12712 }, /* MOVE */ -{ CPUFUNC(op_31b0_3), 12720 }, /* MOVE */ -{ CPUFUNC(op_31b8_3), 12728 }, /* MOVE */ -{ CPUFUNC(op_31b9_3), 12729 }, /* MOVE */ -{ CPUFUNC(op_31ba_3), 12730 }, /* MOVE */ -{ CPUFUNC(op_31bb_3), 12731 }, /* MOVE */ -{ CPUFUNC(op_31bc_3), 12732 }, /* MOVE */ +{ CPUFUNC(op_3180_0), 12672 }, /* MOVE */ +{ CPUFUNC(op_3188_0), 12680 }, /* MOVE */ +{ CPUFUNC(op_3190_0), 12688 }, /* MOVE */ +{ CPUFUNC(op_3198_0), 12696 }, /* MOVE */ +{ CPUFUNC(op_31a0_0), 12704 }, /* MOVE */ +{ CPUFUNC(op_31a8_0), 12712 }, /* MOVE */ +{ CPUFUNC(op_31b0_0), 12720 }, /* MOVE */ +{ CPUFUNC(op_31b8_0), 12728 }, /* MOVE */ +{ CPUFUNC(op_31b9_0), 12729 }, /* MOVE */ +{ CPUFUNC(op_31ba_0), 12730 }, /* MOVE */ +{ CPUFUNC(op_31bb_0), 12731 }, /* MOVE */ +{ CPUFUNC(op_31bc_0), 12732 }, /* MOVE */ { CPUFUNC(op_31c0_0), 12736 }, /* MOVE */ { CPUFUNC(op_31c8_0), 12744 }, /* MOVE */ { CPUFUNC(op_31d0_0), 12752 }, /* MOVE */ { CPUFUNC(op_31d8_0), 12760 }, /* MOVE */ { CPUFUNC(op_31e0_0), 12768 }, /* MOVE */ { CPUFUNC(op_31e8_0), 12776 }, /* MOVE */ -{ CPUFUNC(op_31f0_3), 12784 }, /* MOVE */ +{ CPUFUNC(op_31f0_0), 12784 }, /* MOVE */ { CPUFUNC(op_31f8_0), 12792 }, /* MOVE */ { CPUFUNC(op_31f9_0), 12793 }, /* MOVE */ { CPUFUNC(op_31fa_0), 12794 }, /* MOVE */ -{ CPUFUNC(op_31fb_3), 12795 }, /* MOVE */ +{ CPUFUNC(op_31fb_0), 12795 }, /* MOVE */ { CPUFUNC(op_31fc_0), 12796 }, /* MOVE */ { CPUFUNC(op_33c0_0), 13248 }, /* MOVE */ { CPUFUNC(op_33c8_0), 13256 }, /* MOVE */ @@ -6665,18 +6921,18 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_33d8_0), 13272 }, /* MOVE */ { CPUFUNC(op_33e0_0), 13280 }, /* MOVE */ { CPUFUNC(op_33e8_0), 13288 }, /* MOVE */ -{ CPUFUNC(op_33f0_3), 13296 }, /* MOVE */ +{ CPUFUNC(op_33f0_0), 13296 }, /* MOVE */ { CPUFUNC(op_33f8_0), 13304 }, /* MOVE */ { CPUFUNC(op_33f9_0), 13305 }, /* MOVE */ { CPUFUNC(op_33fa_0), 13306 }, /* MOVE */ -{ CPUFUNC(op_33fb_3), 13307 }, /* MOVE */ +{ CPUFUNC(op_33fb_0), 13307 }, /* MOVE */ { CPUFUNC(op_33fc_0), 13308 }, /* MOVE */ { CPUFUNC(op_4000_0), 16384 }, /* NEGX */ { CPUFUNC(op_4010_0), 16400 }, /* NEGX */ { CPUFUNC(op_4018_0), 16408 }, /* NEGX */ { CPUFUNC(op_4020_0), 16416 }, /* NEGX */ { CPUFUNC(op_4028_0), 16424 }, /* NEGX */ -{ CPUFUNC(op_4030_3), 16432 }, /* NEGX */ +{ CPUFUNC(op_4030_0), 16432 }, /* NEGX */ { CPUFUNC(op_4038_0), 16440 }, /* NEGX */ { CPUFUNC(op_4039_0), 16441 }, /* NEGX */ { CPUFUNC(op_4040_0), 16448 }, /* NEGX */ @@ -6684,7 +6940,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_4058_0), 16472 }, /* NEGX */ { CPUFUNC(op_4060_0), 16480 }, /* NEGX */ { CPUFUNC(op_4068_0), 16488 }, /* NEGX */ -{ CPUFUNC(op_4070_3), 16496 }, /* NEGX */ +{ CPUFUNC(op_4070_0), 16496 }, /* NEGX */ { CPUFUNC(op_4078_0), 16504 }, /* NEGX */ { CPUFUNC(op_4079_0), 16505 }, /* NEGX */ { CPUFUNC(op_4080_0), 16512 }, /* NEGX */ @@ -6692,7 +6948,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_4098_0), 16536 }, /* NEGX */ { CPUFUNC(op_40a0_0), 16544 }, /* NEGX */ { CPUFUNC(op_40a8_0), 16552 }, /* NEGX */ -{ CPUFUNC(op_40b0_3), 16560 }, /* NEGX */ +{ CPUFUNC(op_40b0_0), 16560 }, /* NEGX */ { CPUFUNC(op_40b8_0), 16568 }, /* NEGX */ { CPUFUNC(op_40b9_0), 16569 }, /* NEGX */ { CPUFUNC(op_40c0_0), 16576 }, /* MVSR2 */ @@ -6700,7 +6956,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_40d8_0), 16600 }, /* MVSR2 */ { CPUFUNC(op_40e0_0), 16608 }, /* MVSR2 */ { CPUFUNC(op_40e8_0), 16616 }, /* MVSR2 */ -{ CPUFUNC(op_40f0_3), 16624 }, /* MVSR2 */ +{ CPUFUNC(op_40f0_0), 16624 }, /* MVSR2 */ { CPUFUNC(op_40f8_0), 16632 }, /* MVSR2 */ { CPUFUNC(op_40f9_0), 16633 }, /* MVSR2 */ { CPUFUNC(op_4100_0), 16640 }, /* CHK */ @@ -6708,36 +6964,36 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_4118_0), 16664 }, /* CHK */ { CPUFUNC(op_4120_0), 16672 }, /* CHK */ { CPUFUNC(op_4128_0), 16680 }, /* CHK */ -{ CPUFUNC(op_4130_3), 16688 }, /* CHK */ +{ CPUFUNC(op_4130_0), 16688 }, /* CHK */ { CPUFUNC(op_4138_0), 16696 }, /* CHK */ { CPUFUNC(op_4139_0), 16697 }, /* CHK */ { CPUFUNC(op_413a_0), 16698 }, /* CHK */ -{ CPUFUNC(op_413b_3), 16699 }, /* CHK */ +{ CPUFUNC(op_413b_0), 16699 }, /* CHK */ { CPUFUNC(op_413c_0), 16700 }, /* CHK */ { CPUFUNC(op_4180_0), 16768 }, /* CHK */ { CPUFUNC(op_4190_0), 16784 }, /* CHK */ { CPUFUNC(op_4198_0), 16792 }, /* CHK */ { CPUFUNC(op_41a0_0), 16800 }, /* CHK */ { CPUFUNC(op_41a8_0), 16808 }, /* CHK */ -{ CPUFUNC(op_41b0_3), 16816 }, /* CHK */ +{ CPUFUNC(op_41b0_0), 16816 }, /* CHK */ { CPUFUNC(op_41b8_0), 16824 }, /* CHK */ { CPUFUNC(op_41b9_0), 16825 }, /* CHK */ { CPUFUNC(op_41ba_0), 16826 }, /* CHK */ -{ CPUFUNC(op_41bb_3), 16827 }, /* CHK */ +{ CPUFUNC(op_41bb_0), 16827 }, /* CHK */ { CPUFUNC(op_41bc_0), 16828 }, /* CHK */ { CPUFUNC(op_41d0_0), 16848 }, /* LEA */ { CPUFUNC(op_41e8_0), 16872 }, /* LEA */ -{ CPUFUNC(op_41f0_3), 16880 }, /* LEA */ +{ CPUFUNC(op_41f0_0), 16880 }, /* LEA */ { CPUFUNC(op_41f8_0), 16888 }, /* LEA */ { CPUFUNC(op_41f9_0), 16889 }, /* LEA */ { CPUFUNC(op_41fa_0), 16890 }, /* LEA */ -{ CPUFUNC(op_41fb_3), 16891 }, /* LEA */ +{ CPUFUNC(op_41fb_0), 16891 }, /* LEA */ { CPUFUNC(op_4200_0), 16896 }, /* CLR */ { CPUFUNC(op_4210_0), 16912 }, /* CLR */ { CPUFUNC(op_4218_0), 16920 }, /* CLR */ { CPUFUNC(op_4220_0), 16928 }, /* CLR */ { CPUFUNC(op_4228_0), 16936 }, /* CLR */ -{ CPUFUNC(op_4230_3), 16944 }, /* CLR */ +{ CPUFUNC(op_4230_0), 16944 }, /* CLR */ { CPUFUNC(op_4238_0), 16952 }, /* CLR */ { CPUFUNC(op_4239_0), 16953 }, /* CLR */ { CPUFUNC(op_4240_0), 16960 }, /* CLR */ @@ -6745,7 +7001,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_4258_0), 16984 }, /* CLR */ { CPUFUNC(op_4260_0), 16992 }, /* CLR */ { CPUFUNC(op_4268_0), 17000 }, /* CLR */ -{ CPUFUNC(op_4270_3), 17008 }, /* CLR */ +{ CPUFUNC(op_4270_0), 17008 }, /* CLR */ { CPUFUNC(op_4278_0), 17016 }, /* CLR */ { CPUFUNC(op_4279_0), 17017 }, /* CLR */ { CPUFUNC(op_4280_0), 17024 }, /* CLR */ @@ -6753,7 +7009,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_4298_0), 17048 }, /* CLR */ { CPUFUNC(op_42a0_0), 17056 }, /* CLR */ { CPUFUNC(op_42a8_0), 17064 }, /* CLR */ -{ CPUFUNC(op_42b0_3), 17072 }, /* CLR */ +{ CPUFUNC(op_42b0_0), 17072 }, /* CLR */ { CPUFUNC(op_42b8_0), 17080 }, /* CLR */ { CPUFUNC(op_42b9_0), 17081 }, /* CLR */ { CPUFUNC(op_42c0_0), 17088 }, /* MVSR2 */ @@ -6761,9 +7017,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_42d8_0), 17112 }, /* MVSR2 */ { CPUFUNC(op_42e0_0), 17120 }, /* MVSR2 */ { CPUFUNC(op_42e8_0), 17128 }, /* MVSR2 */ -#ifndef CPUEMU_68000_ONLY -{ CPUFUNC(op_42f0_3), 17136 }, /* MVSR2 */ -#endif +{ CPUFUNC(op_42f0_0), 17136 }, /* MVSR2 */ { CPUFUNC(op_42f8_0), 17144 }, /* MVSR2 */ { CPUFUNC(op_42f9_0), 17145 }, /* MVSR2 */ { CPUFUNC(op_4400_0), 17408 }, /* NEG */ @@ -6771,7 +7025,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_4418_0), 17432 }, /* NEG */ { CPUFUNC(op_4420_0), 17440 }, /* NEG */ { CPUFUNC(op_4428_0), 17448 }, /* NEG */ -{ CPUFUNC(op_4430_3), 17456 }, /* NEG */ +{ CPUFUNC(op_4430_0), 17456 }, /* NEG */ { CPUFUNC(op_4438_0), 17464 }, /* NEG */ { CPUFUNC(op_4439_0), 17465 }, /* NEG */ { CPUFUNC(op_4440_0), 17472 }, /* NEG */ @@ -6779,7 +7033,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_4458_0), 17496 }, /* NEG */ { CPUFUNC(op_4460_0), 17504 }, /* NEG */ { CPUFUNC(op_4468_0), 17512 }, /* NEG */ -{ CPUFUNC(op_4470_3), 17520 }, /* NEG */ +{ CPUFUNC(op_4470_0), 17520 }, /* NEG */ { CPUFUNC(op_4478_0), 17528 }, /* NEG */ { CPUFUNC(op_4479_0), 17529 }, /* NEG */ { CPUFUNC(op_4480_0), 17536 }, /* NEG */ @@ -6787,7 +7041,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_4498_0), 17560 }, /* NEG */ { CPUFUNC(op_44a0_0), 17568 }, /* NEG */ { CPUFUNC(op_44a8_0), 17576 }, /* NEG */ -{ CPUFUNC(op_44b0_3), 17584 }, /* NEG */ +{ CPUFUNC(op_44b0_0), 17584 }, /* NEG */ { CPUFUNC(op_44b8_0), 17592 }, /* NEG */ { CPUFUNC(op_44b9_0), 17593 }, /* NEG */ { CPUFUNC(op_44c0_0), 17600 }, /* MV2SR */ @@ -6795,18 +7049,18 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_44d8_0), 17624 }, /* MV2SR */ { CPUFUNC(op_44e0_0), 17632 }, /* MV2SR */ { CPUFUNC(op_44e8_0), 17640 }, /* MV2SR */ -{ CPUFUNC(op_44f0_3), 17648 }, /* MV2SR */ +{ CPUFUNC(op_44f0_0), 17648 }, /* MV2SR */ { CPUFUNC(op_44f8_0), 17656 }, /* MV2SR */ { CPUFUNC(op_44f9_0), 17657 }, /* MV2SR */ { CPUFUNC(op_44fa_0), 17658 }, /* MV2SR */ -{ CPUFUNC(op_44fb_3), 17659 }, /* MV2SR */ +{ CPUFUNC(op_44fb_0), 17659 }, /* MV2SR */ { CPUFUNC(op_44fc_0), 17660 }, /* MV2SR */ { CPUFUNC(op_4600_0), 17920 }, /* NOT */ { CPUFUNC(op_4610_0), 17936 }, /* NOT */ { CPUFUNC(op_4618_0), 17944 }, /* NOT */ { CPUFUNC(op_4620_0), 17952 }, /* NOT */ { CPUFUNC(op_4628_0), 17960 }, /* NOT */ -{ CPUFUNC(op_4630_3), 17968 }, /* NOT */ +{ CPUFUNC(op_4630_0), 17968 }, /* NOT */ { CPUFUNC(op_4638_0), 17976 }, /* NOT */ { CPUFUNC(op_4639_0), 17977 }, /* NOT */ { CPUFUNC(op_4640_0), 17984 }, /* NOT */ @@ -6814,7 +7068,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_4658_0), 18008 }, /* NOT */ { CPUFUNC(op_4660_0), 18016 }, /* NOT */ { CPUFUNC(op_4668_0), 18024 }, /* NOT */ -{ CPUFUNC(op_4670_3), 18032 }, /* NOT */ +{ CPUFUNC(op_4670_0), 18032 }, /* NOT */ { CPUFUNC(op_4678_0), 18040 }, /* NOT */ { CPUFUNC(op_4679_0), 18041 }, /* NOT */ { CPUFUNC(op_4680_0), 18048 }, /* NOT */ @@ -6822,7 +7076,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_4698_0), 18072 }, /* NOT */ { CPUFUNC(op_46a0_0), 18080 }, /* NOT */ { CPUFUNC(op_46a8_0), 18088 }, /* NOT */ -{ CPUFUNC(op_46b0_3), 18096 }, /* NOT */ +{ CPUFUNC(op_46b0_0), 18096 }, /* NOT */ { CPUFUNC(op_46b8_0), 18104 }, /* NOT */ { CPUFUNC(op_46b9_0), 18105 }, /* NOT */ { CPUFUNC(op_46c0_0), 18112 }, /* MV2SR */ @@ -6830,40 +7084,42 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_46d8_0), 18136 }, /* MV2SR */ { CPUFUNC(op_46e0_0), 18144 }, /* MV2SR */ { CPUFUNC(op_46e8_0), 18152 }, /* MV2SR */ -{ CPUFUNC(op_46f0_3), 18160 }, /* MV2SR */ +{ CPUFUNC(op_46f0_0), 18160 }, /* MV2SR */ { CPUFUNC(op_46f8_0), 18168 }, /* MV2SR */ { CPUFUNC(op_46f9_0), 18169 }, /* MV2SR */ { CPUFUNC(op_46fa_0), 18170 }, /* MV2SR */ -{ CPUFUNC(op_46fb_3), 18171 }, /* MV2SR */ +{ CPUFUNC(op_46fb_0), 18171 }, /* MV2SR */ { CPUFUNC(op_46fc_0), 18172 }, /* MV2SR */ -{ CPUFUNC(op_4800_0), 18432 }, /* NBCD */ -{ CPUFUNC(op_4810_0), 18448 }, /* NBCD */ -{ CPUFUNC(op_4818_0), 18456 }, /* NBCD */ -{ CPUFUNC(op_4820_0), 18464 }, /* NBCD */ -{ CPUFUNC(op_4828_0), 18472 }, /* NBCD */ -{ CPUFUNC(op_4830_3), 18480 }, /* NBCD */ -{ CPUFUNC(op_4838_0), 18488 }, /* NBCD */ -{ CPUFUNC(op_4839_0), 18489 }, /* NBCD */ +{ CPUFUNC(op_4800_2), 18432 }, /* NBCD */ +{ CPUFUNC(op_4808_0), 18440 }, /* LINK */ +{ CPUFUNC(op_4810_2), 18448 }, /* NBCD */ +{ CPUFUNC(op_4818_2), 18456 }, /* NBCD */ +{ CPUFUNC(op_4820_2), 18464 }, /* NBCD */ +{ CPUFUNC(op_4828_2), 18472 }, /* NBCD */ +{ CPUFUNC(op_4830_2), 18480 }, /* NBCD */ +{ CPUFUNC(op_4838_2), 18488 }, /* NBCD */ +{ CPUFUNC(op_4839_2), 18489 }, /* NBCD */ { CPUFUNC(op_4840_0), 18496 }, /* SWAP */ +{ CPUFUNC(op_4848_0), 18504 }, /* BKPT */ { CPUFUNC(op_4850_0), 18512 }, /* PEA */ { CPUFUNC(op_4868_0), 18536 }, /* PEA */ -{ CPUFUNC(op_4870_3), 18544 }, /* PEA */ +{ CPUFUNC(op_4870_0), 18544 }, /* PEA */ { CPUFUNC(op_4878_0), 18552 }, /* PEA */ { CPUFUNC(op_4879_0), 18553 }, /* PEA */ { CPUFUNC(op_487a_0), 18554 }, /* PEA */ -{ CPUFUNC(op_487b_3), 18555 }, /* PEA */ +{ CPUFUNC(op_487b_0), 18555 }, /* PEA */ { CPUFUNC(op_4880_0), 18560 }, /* EXT */ { CPUFUNC(op_4890_0), 18576 }, /* MVMLE */ { CPUFUNC(op_48a0_0), 18592 }, /* MVMLE */ { CPUFUNC(op_48a8_0), 18600 }, /* MVMLE */ -{ CPUFUNC(op_48b0_3), 18608 }, /* MVMLE */ +{ CPUFUNC(op_48b0_0), 18608 }, /* MVMLE */ { CPUFUNC(op_48b8_0), 18616 }, /* MVMLE */ { CPUFUNC(op_48b9_0), 18617 }, /* MVMLE */ { CPUFUNC(op_48c0_0), 18624 }, /* EXT */ { CPUFUNC(op_48d0_0), 18640 }, /* MVMLE */ { CPUFUNC(op_48e0_0), 18656 }, /* MVMLE */ { CPUFUNC(op_48e8_0), 18664 }, /* MVMLE */ -{ CPUFUNC(op_48f0_3), 18672 }, /* MVMLE */ +{ CPUFUNC(op_48f0_0), 18672 }, /* MVMLE */ { CPUFUNC(op_48f8_0), 18680 }, /* MVMLE */ { CPUFUNC(op_48f9_0), 18681 }, /* MVMLE */ { CPUFUNC(op_49c0_0), 18880 }, /* EXT */ @@ -6872,49 +7128,82 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_4a18_0), 18968 }, /* TST */ { CPUFUNC(op_4a20_0), 18976 }, /* TST */ { CPUFUNC(op_4a28_0), 18984 }, /* TST */ -{ CPUFUNC(op_4a30_3), 18992 }, /* TST */ +{ CPUFUNC(op_4a30_0), 18992 }, /* TST */ { CPUFUNC(op_4a38_0), 19000 }, /* TST */ { CPUFUNC(op_4a39_0), 19001 }, /* TST */ +{ CPUFUNC(op_4a3a_0), 19002 }, /* TST */ +{ CPUFUNC(op_4a3b_0), 19003 }, /* TST */ +{ CPUFUNC(op_4a3c_0), 19004 }, /* TST */ { CPUFUNC(op_4a40_0), 19008 }, /* TST */ +{ CPUFUNC(op_4a48_0), 19016 }, /* TST */ { CPUFUNC(op_4a50_0), 19024 }, /* TST */ { CPUFUNC(op_4a58_0), 19032 }, /* TST */ { CPUFUNC(op_4a60_0), 19040 }, /* TST */ { CPUFUNC(op_4a68_0), 19048 }, /* TST */ -{ CPUFUNC(op_4a70_3), 19056 }, /* TST */ +{ CPUFUNC(op_4a70_0), 19056 }, /* TST */ { CPUFUNC(op_4a78_0), 19064 }, /* TST */ { CPUFUNC(op_4a79_0), 19065 }, /* TST */ +{ CPUFUNC(op_4a7a_0), 19066 }, /* TST */ +{ CPUFUNC(op_4a7b_0), 19067 }, /* TST */ +{ CPUFUNC(op_4a7c_0), 19068 }, /* TST */ { CPUFUNC(op_4a80_0), 19072 }, /* TST */ +{ CPUFUNC(op_4a88_0), 19080 }, /* TST */ { CPUFUNC(op_4a90_0), 19088 }, /* TST */ { CPUFUNC(op_4a98_0), 19096 }, /* TST */ { CPUFUNC(op_4aa0_0), 19104 }, /* TST */ { CPUFUNC(op_4aa8_0), 19112 }, /* TST */ -{ CPUFUNC(op_4ab0_3), 19120 }, /* TST */ +{ CPUFUNC(op_4ab0_0), 19120 }, /* TST */ { CPUFUNC(op_4ab8_0), 19128 }, /* TST */ { CPUFUNC(op_4ab9_0), 19129 }, /* TST */ +{ CPUFUNC(op_4aba_0), 19130 }, /* TST */ +{ CPUFUNC(op_4abb_0), 19131 }, /* TST */ +{ CPUFUNC(op_4abc_0), 19132 }, /* TST */ { CPUFUNC(op_4ac0_0), 19136 }, /* TAS */ { CPUFUNC(op_4ad0_0), 19152 }, /* TAS */ { CPUFUNC(op_4ad8_0), 19160 }, /* TAS */ { CPUFUNC(op_4ae0_0), 19168 }, /* TAS */ { CPUFUNC(op_4ae8_0), 19176 }, /* TAS */ -{ CPUFUNC(op_4af0_3), 19184 }, /* TAS */ +{ CPUFUNC(op_4af0_0), 19184 }, /* TAS */ { CPUFUNC(op_4af8_0), 19192 }, /* TAS */ { CPUFUNC(op_4af9_0), 19193 }, /* TAS */ +{ CPUFUNC(op_4c00_0), 19456 }, /* MULL */ +{ CPUFUNC(op_4c10_0), 19472 }, /* MULL */ +{ CPUFUNC(op_4c18_0), 19480 }, /* MULL */ +{ CPUFUNC(op_4c20_0), 19488 }, /* MULL */ +{ CPUFUNC(op_4c28_0), 19496 }, /* MULL */ +{ CPUFUNC(op_4c30_0), 19504 }, /* MULL */ +{ CPUFUNC(op_4c38_0), 19512 }, /* MULL */ +{ CPUFUNC(op_4c39_0), 19513 }, /* MULL */ +{ CPUFUNC(op_4c3a_0), 19514 }, /* MULL */ +{ CPUFUNC(op_4c3b_0), 19515 }, /* MULL */ +{ CPUFUNC(op_4c3c_0), 19516 }, /* MULL */ +{ CPUFUNC(op_4c40_0), 19520 }, /* DIVL */ +{ CPUFUNC(op_4c50_0), 19536 }, /* DIVL */ +{ CPUFUNC(op_4c58_0), 19544 }, /* DIVL */ +{ CPUFUNC(op_4c60_0), 19552 }, /* DIVL */ +{ CPUFUNC(op_4c68_0), 19560 }, /* DIVL */ +{ CPUFUNC(op_4c70_0), 19568 }, /* DIVL */ +{ CPUFUNC(op_4c78_0), 19576 }, /* DIVL */ +{ CPUFUNC(op_4c79_0), 19577 }, /* DIVL */ +{ CPUFUNC(op_4c7a_0), 19578 }, /* DIVL */ +{ CPUFUNC(op_4c7b_0), 19579 }, /* DIVL */ +{ CPUFUNC(op_4c7c_0), 19580 }, /* DIVL */ { CPUFUNC(op_4c90_0), 19600 }, /* MVMEL */ { CPUFUNC(op_4c98_0), 19608 }, /* MVMEL */ { CPUFUNC(op_4ca8_0), 19624 }, /* MVMEL */ -{ CPUFUNC(op_4cb0_3), 19632 }, /* MVMEL */ +{ CPUFUNC(op_4cb0_0), 19632 }, /* MVMEL */ { CPUFUNC(op_4cb8_0), 19640 }, /* MVMEL */ { CPUFUNC(op_4cb9_0), 19641 }, /* MVMEL */ { CPUFUNC(op_4cba_0), 19642 }, /* MVMEL */ -{ CPUFUNC(op_4cbb_3), 19643 }, /* MVMEL */ +{ CPUFUNC(op_4cbb_0), 19643 }, /* MVMEL */ { CPUFUNC(op_4cd0_0), 19664 }, /* MVMEL */ { CPUFUNC(op_4cd8_0), 19672 }, /* MVMEL */ { CPUFUNC(op_4ce8_0), 19688 }, /* MVMEL */ -{ CPUFUNC(op_4cf0_3), 19696 }, /* MVMEL */ +{ CPUFUNC(op_4cf0_0), 19696 }, /* MVMEL */ { CPUFUNC(op_4cf8_0), 19704 }, /* MVMEL */ { CPUFUNC(op_4cf9_0), 19705 }, /* MVMEL */ { CPUFUNC(op_4cfa_0), 19706 }, /* MVMEL */ -{ CPUFUNC(op_4cfb_3), 19707 }, /* MVMEL */ +{ CPUFUNC(op_4cfb_0), 19707 }, /* MVMEL */ { CPUFUNC(op_4e40_0), 20032 }, /* TRAP */ { CPUFUNC(op_4e50_0), 20048 }, /* LINK */ { CPUFUNC(op_4e58_0), 20056 }, /* UNLK */ @@ -6932,24 +7221,24 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_4e7b_0), 20091 }, /* MOVE2C */ { CPUFUNC(op_4e90_0), 20112 }, /* JSR */ { CPUFUNC(op_4ea8_0), 20136 }, /* JSR */ -{ CPUFUNC(op_4eb0_3), 20144 }, /* JSR */ +{ CPUFUNC(op_4eb0_0), 20144 }, /* JSR */ { CPUFUNC(op_4eb8_0), 20152 }, /* JSR */ { CPUFUNC(op_4eb9_0), 20153 }, /* JSR */ { CPUFUNC(op_4eba_0), 20154 }, /* JSR */ -{ CPUFUNC(op_4ebb_3), 20155 }, /* JSR */ +{ CPUFUNC(op_4ebb_0), 20155 }, /* JSR */ { CPUFUNC(op_4ed0_0), 20176 }, /* JMP */ { CPUFUNC(op_4ee8_0), 20200 }, /* JMP */ -{ CPUFUNC(op_4ef0_3), 20208 }, /* JMP */ +{ CPUFUNC(op_4ef0_0), 20208 }, /* JMP */ { CPUFUNC(op_4ef8_0), 20216 }, /* JMP */ { CPUFUNC(op_4ef9_0), 20217 }, /* JMP */ { CPUFUNC(op_4efa_0), 20218 }, /* JMP */ -{ CPUFUNC(op_4efb_3), 20219 }, /* JMP */ +{ CPUFUNC(op_4efb_0), 20219 }, /* JMP */ { CPUFUNC(op_5000_0), 20480 }, /* ADD */ { CPUFUNC(op_5010_0), 20496 }, /* ADD */ { CPUFUNC(op_5018_0), 20504 }, /* ADD */ { CPUFUNC(op_5020_0), 20512 }, /* ADD */ { CPUFUNC(op_5028_0), 20520 }, /* ADD */ -{ CPUFUNC(op_5030_3), 20528 }, /* ADD */ +{ CPUFUNC(op_5030_0), 20528 }, /* ADD */ { CPUFUNC(op_5038_0), 20536 }, /* ADD */ { CPUFUNC(op_5039_0), 20537 }, /* ADD */ { CPUFUNC(op_5040_0), 20544 }, /* ADD */ @@ -6958,7 +7247,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_5058_0), 20568 }, /* ADD */ { CPUFUNC(op_5060_0), 20576 }, /* ADD */ { CPUFUNC(op_5068_0), 20584 }, /* ADD */ -{ CPUFUNC(op_5070_3), 20592 }, /* ADD */ +{ CPUFUNC(op_5070_0), 20592 }, /* ADD */ { CPUFUNC(op_5078_0), 20600 }, /* ADD */ { CPUFUNC(op_5079_0), 20601 }, /* ADD */ { CPUFUNC(op_5080_0), 20608 }, /* ADD */ @@ -6967,7 +7256,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_5098_0), 20632 }, /* ADD */ { CPUFUNC(op_50a0_0), 20640 }, /* ADD */ { CPUFUNC(op_50a8_0), 20648 }, /* ADD */ -{ CPUFUNC(op_50b0_3), 20656 }, /* ADD */ +{ CPUFUNC(op_50b0_0), 20656 }, /* ADD */ { CPUFUNC(op_50b8_0), 20664 }, /* ADD */ { CPUFUNC(op_50b9_0), 20665 }, /* ADD */ { CPUFUNC(op_50c0_0), 20672 }, /* Scc */ @@ -6976,15 +7265,18 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_50d8_0), 20696 }, /* Scc */ { CPUFUNC(op_50e0_0), 20704 }, /* Scc */ { CPUFUNC(op_50e8_0), 20712 }, /* Scc */ -{ CPUFUNC(op_50f0_3), 20720 }, /* Scc */ +{ CPUFUNC(op_50f0_0), 20720 }, /* Scc */ { CPUFUNC(op_50f8_0), 20728 }, /* Scc */ { CPUFUNC(op_50f9_0), 20729 }, /* Scc */ +{ CPUFUNC(op_50fa_0), 20730 }, /* TRAPcc */ +{ CPUFUNC(op_50fb_0), 20731 }, /* TRAPcc */ +{ CPUFUNC(op_50fc_0), 20732 }, /* TRAPcc */ { CPUFUNC(op_5100_0), 20736 }, /* SUB */ { CPUFUNC(op_5110_0), 20752 }, /* SUB */ { CPUFUNC(op_5118_0), 20760 }, /* SUB */ { CPUFUNC(op_5120_0), 20768 }, /* SUB */ { CPUFUNC(op_5128_0), 20776 }, /* SUB */ -{ CPUFUNC(op_5130_3), 20784 }, /* SUB */ +{ CPUFUNC(op_5130_0), 20784 }, /* SUB */ { CPUFUNC(op_5138_0), 20792 }, /* SUB */ { CPUFUNC(op_5139_0), 20793 }, /* SUB */ { CPUFUNC(op_5140_0), 20800 }, /* SUB */ @@ -6993,7 +7285,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_5158_0), 20824 }, /* SUB */ { CPUFUNC(op_5160_0), 20832 }, /* SUB */ { CPUFUNC(op_5168_0), 20840 }, /* SUB */ -{ CPUFUNC(op_5170_3), 20848 }, /* SUB */ +{ CPUFUNC(op_5170_0), 20848 }, /* SUB */ { CPUFUNC(op_5178_0), 20856 }, /* SUB */ { CPUFUNC(op_5179_0), 20857 }, /* SUB */ { CPUFUNC(op_5180_0), 20864 }, /* SUB */ @@ -7002,7 +7294,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_5198_0), 20888 }, /* SUB */ { CPUFUNC(op_51a0_0), 20896 }, /* SUB */ { CPUFUNC(op_51a8_0), 20904 }, /* SUB */ -{ CPUFUNC(op_51b0_3), 20912 }, /* SUB */ +{ CPUFUNC(op_51b0_0), 20912 }, /* SUB */ { CPUFUNC(op_51b8_0), 20920 }, /* SUB */ { CPUFUNC(op_51b9_0), 20921 }, /* SUB */ { CPUFUNC(op_51c0_0), 20928 }, /* Scc */ @@ -7011,249 +7303,298 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_51d8_0), 20952 }, /* Scc */ { CPUFUNC(op_51e0_0), 20960 }, /* Scc */ { CPUFUNC(op_51e8_0), 20968 }, /* Scc */ -{ CPUFUNC(op_51f0_3), 20976 }, /* Scc */ +{ CPUFUNC(op_51f0_0), 20976 }, /* Scc */ { CPUFUNC(op_51f8_0), 20984 }, /* Scc */ { CPUFUNC(op_51f9_0), 20985 }, /* Scc */ +{ CPUFUNC(op_51fa_0), 20986 }, /* TRAPcc */ +{ CPUFUNC(op_51fb_0), 20987 }, /* TRAPcc */ +{ CPUFUNC(op_51fc_0), 20988 }, /* TRAPcc */ { CPUFUNC(op_52c0_0), 21184 }, /* Scc */ { CPUFUNC(op_52c8_0), 21192 }, /* DBcc */ { CPUFUNC(op_52d0_0), 21200 }, /* Scc */ { CPUFUNC(op_52d8_0), 21208 }, /* Scc */ { CPUFUNC(op_52e0_0), 21216 }, /* Scc */ { CPUFUNC(op_52e8_0), 21224 }, /* Scc */ -{ CPUFUNC(op_52f0_3), 21232 }, /* Scc */ +{ CPUFUNC(op_52f0_0), 21232 }, /* Scc */ { CPUFUNC(op_52f8_0), 21240 }, /* Scc */ { CPUFUNC(op_52f9_0), 21241 }, /* Scc */ +{ CPUFUNC(op_52fa_0), 21242 }, /* TRAPcc */ +{ CPUFUNC(op_52fb_0), 21243 }, /* TRAPcc */ +{ CPUFUNC(op_52fc_0), 21244 }, /* TRAPcc */ { CPUFUNC(op_53c0_0), 21440 }, /* Scc */ { CPUFUNC(op_53c8_0), 21448 }, /* DBcc */ { CPUFUNC(op_53d0_0), 21456 }, /* Scc */ { CPUFUNC(op_53d8_0), 21464 }, /* Scc */ { CPUFUNC(op_53e0_0), 21472 }, /* Scc */ { CPUFUNC(op_53e8_0), 21480 }, /* Scc */ -{ CPUFUNC(op_53f0_3), 21488 }, /* Scc */ +{ CPUFUNC(op_53f0_0), 21488 }, /* Scc */ { CPUFUNC(op_53f8_0), 21496 }, /* Scc */ { CPUFUNC(op_53f9_0), 21497 }, /* Scc */ +{ CPUFUNC(op_53fa_0), 21498 }, /* TRAPcc */ +{ CPUFUNC(op_53fb_0), 21499 }, /* TRAPcc */ +{ CPUFUNC(op_53fc_0), 21500 }, /* TRAPcc */ { CPUFUNC(op_54c0_0), 21696 }, /* Scc */ { CPUFUNC(op_54c8_0), 21704 }, /* DBcc */ { CPUFUNC(op_54d0_0), 21712 }, /* Scc */ { CPUFUNC(op_54d8_0), 21720 }, /* Scc */ { CPUFUNC(op_54e0_0), 21728 }, /* Scc */ { CPUFUNC(op_54e8_0), 21736 }, /* Scc */ -{ CPUFUNC(op_54f0_3), 21744 }, /* Scc */ +{ CPUFUNC(op_54f0_0), 21744 }, /* Scc */ { CPUFUNC(op_54f8_0), 21752 }, /* Scc */ { CPUFUNC(op_54f9_0), 21753 }, /* Scc */ +{ CPUFUNC(op_54fa_0), 21754 }, /* TRAPcc */ +{ CPUFUNC(op_54fb_0), 21755 }, /* TRAPcc */ +{ CPUFUNC(op_54fc_0), 21756 }, /* TRAPcc */ { CPUFUNC(op_55c0_0), 21952 }, /* Scc */ { CPUFUNC(op_55c8_0), 21960 }, /* DBcc */ { CPUFUNC(op_55d0_0), 21968 }, /* Scc */ { CPUFUNC(op_55d8_0), 21976 }, /* Scc */ { CPUFUNC(op_55e0_0), 21984 }, /* Scc */ { CPUFUNC(op_55e8_0), 21992 }, /* Scc */ -{ CPUFUNC(op_55f0_3), 22000 }, /* Scc */ +{ CPUFUNC(op_55f0_0), 22000 }, /* Scc */ { CPUFUNC(op_55f8_0), 22008 }, /* Scc */ { CPUFUNC(op_55f9_0), 22009 }, /* Scc */ +{ CPUFUNC(op_55fa_0), 22010 }, /* TRAPcc */ +{ CPUFUNC(op_55fb_0), 22011 }, /* TRAPcc */ +{ CPUFUNC(op_55fc_0), 22012 }, /* TRAPcc */ { CPUFUNC(op_56c0_0), 22208 }, /* Scc */ { CPUFUNC(op_56c8_0), 22216 }, /* DBcc */ { CPUFUNC(op_56d0_0), 22224 }, /* Scc */ { CPUFUNC(op_56d8_0), 22232 }, /* Scc */ { CPUFUNC(op_56e0_0), 22240 }, /* Scc */ { CPUFUNC(op_56e8_0), 22248 }, /* Scc */ -{ CPUFUNC(op_56f0_3), 22256 }, /* Scc */ +{ CPUFUNC(op_56f0_0), 22256 }, /* Scc */ { CPUFUNC(op_56f8_0), 22264 }, /* Scc */ { CPUFUNC(op_56f9_0), 22265 }, /* Scc */ +{ CPUFUNC(op_56fa_0), 22266 }, /* TRAPcc */ +{ CPUFUNC(op_56fb_0), 22267 }, /* TRAPcc */ +{ CPUFUNC(op_56fc_0), 22268 }, /* TRAPcc */ { CPUFUNC(op_57c0_0), 22464 }, /* Scc */ { CPUFUNC(op_57c8_0), 22472 }, /* DBcc */ { CPUFUNC(op_57d0_0), 22480 }, /* Scc */ { CPUFUNC(op_57d8_0), 22488 }, /* Scc */ { CPUFUNC(op_57e0_0), 22496 }, /* Scc */ { CPUFUNC(op_57e8_0), 22504 }, /* Scc */ -{ CPUFUNC(op_57f0_3), 22512 }, /* Scc */ +{ CPUFUNC(op_57f0_0), 22512 }, /* Scc */ { CPUFUNC(op_57f8_0), 22520 }, /* Scc */ { CPUFUNC(op_57f9_0), 22521 }, /* Scc */ +{ CPUFUNC(op_57fa_0), 22522 }, /* TRAPcc */ +{ CPUFUNC(op_57fb_0), 22523 }, /* TRAPcc */ +{ CPUFUNC(op_57fc_0), 22524 }, /* TRAPcc */ { CPUFUNC(op_58c0_0), 22720 }, /* Scc */ { CPUFUNC(op_58c8_0), 22728 }, /* DBcc */ { CPUFUNC(op_58d0_0), 22736 }, /* Scc */ { CPUFUNC(op_58d8_0), 22744 }, /* Scc */ { CPUFUNC(op_58e0_0), 22752 }, /* Scc */ { CPUFUNC(op_58e8_0), 22760 }, /* Scc */ -{ CPUFUNC(op_58f0_3), 22768 }, /* Scc */ +{ CPUFUNC(op_58f0_0), 22768 }, /* Scc */ { CPUFUNC(op_58f8_0), 22776 }, /* Scc */ { CPUFUNC(op_58f9_0), 22777 }, /* Scc */ +{ CPUFUNC(op_58fa_0), 22778 }, /* TRAPcc */ +{ CPUFUNC(op_58fb_0), 22779 }, /* TRAPcc */ +{ CPUFUNC(op_58fc_0), 22780 }, /* TRAPcc */ { CPUFUNC(op_59c0_0), 22976 }, /* Scc */ { CPUFUNC(op_59c8_0), 22984 }, /* DBcc */ { CPUFUNC(op_59d0_0), 22992 }, /* Scc */ { CPUFUNC(op_59d8_0), 23000 }, /* Scc */ { CPUFUNC(op_59e0_0), 23008 }, /* Scc */ { CPUFUNC(op_59e8_0), 23016 }, /* Scc */ -{ CPUFUNC(op_59f0_3), 23024 }, /* Scc */ +{ CPUFUNC(op_59f0_0), 23024 }, /* Scc */ { CPUFUNC(op_59f8_0), 23032 }, /* Scc */ { CPUFUNC(op_59f9_0), 23033 }, /* Scc */ +{ CPUFUNC(op_59fa_0), 23034 }, /* TRAPcc */ +{ CPUFUNC(op_59fb_0), 23035 }, /* TRAPcc */ +{ CPUFUNC(op_59fc_0), 23036 }, /* TRAPcc */ { CPUFUNC(op_5ac0_0), 23232 }, /* Scc */ { CPUFUNC(op_5ac8_0), 23240 }, /* DBcc */ { CPUFUNC(op_5ad0_0), 23248 }, /* Scc */ { CPUFUNC(op_5ad8_0), 23256 }, /* Scc */ { CPUFUNC(op_5ae0_0), 23264 }, /* Scc */ { CPUFUNC(op_5ae8_0), 23272 }, /* Scc */ -{ CPUFUNC(op_5af0_3), 23280 }, /* Scc */ +{ CPUFUNC(op_5af0_0), 23280 }, /* Scc */ { CPUFUNC(op_5af8_0), 23288 }, /* Scc */ { CPUFUNC(op_5af9_0), 23289 }, /* Scc */ +{ CPUFUNC(op_5afa_0), 23290 }, /* TRAPcc */ +{ CPUFUNC(op_5afb_0), 23291 }, /* TRAPcc */ +{ CPUFUNC(op_5afc_0), 23292 }, /* TRAPcc */ { CPUFUNC(op_5bc0_0), 23488 }, /* Scc */ { CPUFUNC(op_5bc8_0), 23496 }, /* DBcc */ { CPUFUNC(op_5bd0_0), 23504 }, /* Scc */ { CPUFUNC(op_5bd8_0), 23512 }, /* Scc */ { CPUFUNC(op_5be0_0), 23520 }, /* Scc */ { CPUFUNC(op_5be8_0), 23528 }, /* Scc */ -{ CPUFUNC(op_5bf0_3), 23536 }, /* Scc */ +{ CPUFUNC(op_5bf0_0), 23536 }, /* Scc */ { CPUFUNC(op_5bf8_0), 23544 }, /* Scc */ { CPUFUNC(op_5bf9_0), 23545 }, /* Scc */ +{ CPUFUNC(op_5bfa_0), 23546 }, /* TRAPcc */ +{ CPUFUNC(op_5bfb_0), 23547 }, /* TRAPcc */ +{ CPUFUNC(op_5bfc_0), 23548 }, /* TRAPcc */ { CPUFUNC(op_5cc0_0), 23744 }, /* Scc */ { CPUFUNC(op_5cc8_0), 23752 }, /* DBcc */ { CPUFUNC(op_5cd0_0), 23760 }, /* Scc */ { CPUFUNC(op_5cd8_0), 23768 }, /* Scc */ { CPUFUNC(op_5ce0_0), 23776 }, /* Scc */ { CPUFUNC(op_5ce8_0), 23784 }, /* Scc */ -{ CPUFUNC(op_5cf0_3), 23792 }, /* Scc */ +{ CPUFUNC(op_5cf0_0), 23792 }, /* Scc */ { CPUFUNC(op_5cf8_0), 23800 }, /* Scc */ { CPUFUNC(op_5cf9_0), 23801 }, /* Scc */ +{ CPUFUNC(op_5cfa_0), 23802 }, /* TRAPcc */ +{ CPUFUNC(op_5cfb_0), 23803 }, /* TRAPcc */ +{ CPUFUNC(op_5cfc_0), 23804 }, /* TRAPcc */ { CPUFUNC(op_5dc0_0), 24000 }, /* Scc */ { CPUFUNC(op_5dc8_0), 24008 }, /* DBcc */ { CPUFUNC(op_5dd0_0), 24016 }, /* Scc */ { CPUFUNC(op_5dd8_0), 24024 }, /* Scc */ { CPUFUNC(op_5de0_0), 24032 }, /* Scc */ { CPUFUNC(op_5de8_0), 24040 }, /* Scc */ -{ CPUFUNC(op_5df0_3), 24048 }, /* Scc */ +{ CPUFUNC(op_5df0_0), 24048 }, /* Scc */ { CPUFUNC(op_5df8_0), 24056 }, /* Scc */ { CPUFUNC(op_5df9_0), 24057 }, /* Scc */ +{ CPUFUNC(op_5dfa_0), 24058 }, /* TRAPcc */ +{ CPUFUNC(op_5dfb_0), 24059 }, /* TRAPcc */ +{ CPUFUNC(op_5dfc_0), 24060 }, /* TRAPcc */ { CPUFUNC(op_5ec0_0), 24256 }, /* Scc */ { CPUFUNC(op_5ec8_0), 24264 }, /* DBcc */ { CPUFUNC(op_5ed0_0), 24272 }, /* Scc */ { CPUFUNC(op_5ed8_0), 24280 }, /* Scc */ { CPUFUNC(op_5ee0_0), 24288 }, /* Scc */ { CPUFUNC(op_5ee8_0), 24296 }, /* Scc */ -{ CPUFUNC(op_5ef0_3), 24304 }, /* Scc */ +{ CPUFUNC(op_5ef0_0), 24304 }, /* Scc */ { CPUFUNC(op_5ef8_0), 24312 }, /* Scc */ { CPUFUNC(op_5ef9_0), 24313 }, /* Scc */ +{ CPUFUNC(op_5efa_0), 24314 }, /* TRAPcc */ +{ CPUFUNC(op_5efb_0), 24315 }, /* TRAPcc */ +{ CPUFUNC(op_5efc_0), 24316 }, /* TRAPcc */ { CPUFUNC(op_5fc0_0), 24512 }, /* Scc */ { CPUFUNC(op_5fc8_0), 24520 }, /* DBcc */ { CPUFUNC(op_5fd0_0), 24528 }, /* Scc */ { CPUFUNC(op_5fd8_0), 24536 }, /* Scc */ { CPUFUNC(op_5fe0_0), 24544 }, /* Scc */ { CPUFUNC(op_5fe8_0), 24552 }, /* Scc */ -{ CPUFUNC(op_5ff0_3), 24560 }, /* Scc */ +{ CPUFUNC(op_5ff0_0), 24560 }, /* Scc */ { CPUFUNC(op_5ff8_0), 24568 }, /* Scc */ { CPUFUNC(op_5ff9_0), 24569 }, /* Scc */ +{ CPUFUNC(op_5ffa_0), 24570 }, /* TRAPcc */ +{ CPUFUNC(op_5ffb_0), 24571 }, /* TRAPcc */ +{ CPUFUNC(op_5ffc_0), 24572 }, /* TRAPcc */ { CPUFUNC(op_6000_0), 24576 }, /* Bcc */ { CPUFUNC(op_6001_0), 24577 }, /* Bcc */ -{ CPUFUNC(op_60ff_3), 24831 }, /* Bcc */ +{ CPUFUNC(op_60ff_0), 24831 }, /* Bcc */ { CPUFUNC(op_6100_0), 24832 }, /* BSR */ { CPUFUNC(op_6101_0), 24833 }, /* BSR */ { CPUFUNC(op_61ff_0), 25087 }, /* BSR */ { CPUFUNC(op_6200_0), 25088 }, /* Bcc */ { CPUFUNC(op_6201_0), 25089 }, /* Bcc */ -{ CPUFUNC(op_62ff_3), 25343 }, /* Bcc */ +{ CPUFUNC(op_62ff_0), 25343 }, /* Bcc */ { CPUFUNC(op_6300_0), 25344 }, /* Bcc */ { CPUFUNC(op_6301_0), 25345 }, /* Bcc */ -{ CPUFUNC(op_63ff_3), 25599 }, /* Bcc */ +{ CPUFUNC(op_63ff_0), 25599 }, /* Bcc */ { CPUFUNC(op_6400_0), 25600 }, /* Bcc */ { CPUFUNC(op_6401_0), 25601 }, /* Bcc */ -{ CPUFUNC(op_64ff_3), 25855 }, /* Bcc */ +{ CPUFUNC(op_64ff_0), 25855 }, /* Bcc */ { CPUFUNC(op_6500_0), 25856 }, /* Bcc */ { CPUFUNC(op_6501_0), 25857 }, /* Bcc */ -{ CPUFUNC(op_65ff_3), 26111 }, /* Bcc */ +{ CPUFUNC(op_65ff_0), 26111 }, /* Bcc */ { CPUFUNC(op_6600_0), 26112 }, /* Bcc */ { CPUFUNC(op_6601_0), 26113 }, /* Bcc */ -{ CPUFUNC(op_66ff_3), 26367 }, /* Bcc */ +{ CPUFUNC(op_66ff_0), 26367 }, /* Bcc */ { CPUFUNC(op_6700_0), 26368 }, /* Bcc */ { CPUFUNC(op_6701_0), 26369 }, /* Bcc */ -{ CPUFUNC(op_67ff_3), 26623 }, /* Bcc */ +{ CPUFUNC(op_67ff_0), 26623 }, /* Bcc */ { CPUFUNC(op_6800_0), 26624 }, /* Bcc */ { CPUFUNC(op_6801_0), 26625 }, /* Bcc */ -{ CPUFUNC(op_68ff_3), 26879 }, /* Bcc */ +{ CPUFUNC(op_68ff_0), 26879 }, /* Bcc */ { CPUFUNC(op_6900_0), 26880 }, /* Bcc */ { CPUFUNC(op_6901_0), 26881 }, /* Bcc */ -{ CPUFUNC(op_69ff_3), 27135 }, /* Bcc */ +{ CPUFUNC(op_69ff_0), 27135 }, /* Bcc */ { CPUFUNC(op_6a00_0), 27136 }, /* Bcc */ { CPUFUNC(op_6a01_0), 27137 }, /* Bcc */ -{ CPUFUNC(op_6aff_3), 27391 }, /* Bcc */ +{ CPUFUNC(op_6aff_0), 27391 }, /* Bcc */ { CPUFUNC(op_6b00_0), 27392 }, /* Bcc */ { CPUFUNC(op_6b01_0), 27393 }, /* Bcc */ -{ CPUFUNC(op_6bff_3), 27647 }, /* Bcc */ +{ CPUFUNC(op_6bff_0), 27647 }, /* Bcc */ { CPUFUNC(op_6c00_0), 27648 }, /* Bcc */ { CPUFUNC(op_6c01_0), 27649 }, /* Bcc */ -{ CPUFUNC(op_6cff_3), 27903 }, /* Bcc */ +{ CPUFUNC(op_6cff_0), 27903 }, /* Bcc */ { CPUFUNC(op_6d00_0), 27904 }, /* Bcc */ { CPUFUNC(op_6d01_0), 27905 }, /* Bcc */ -{ CPUFUNC(op_6dff_3), 28159 }, /* Bcc */ +{ CPUFUNC(op_6dff_0), 28159 }, /* Bcc */ { CPUFUNC(op_6e00_0), 28160 }, /* Bcc */ { CPUFUNC(op_6e01_0), 28161 }, /* Bcc */ -{ CPUFUNC(op_6eff_3), 28415 }, /* Bcc */ +{ CPUFUNC(op_6eff_0), 28415 }, /* Bcc */ { CPUFUNC(op_6f00_0), 28416 }, /* Bcc */ { CPUFUNC(op_6f01_0), 28417 }, /* Bcc */ -{ CPUFUNC(op_6fff_3), 28671 }, /* Bcc */ +{ CPUFUNC(op_6fff_0), 28671 }, /* Bcc */ { CPUFUNC(op_7000_0), 28672 }, /* MOVE */ { CPUFUNC(op_8000_0), 32768 }, /* OR */ { CPUFUNC(op_8010_0), 32784 }, /* OR */ { CPUFUNC(op_8018_0), 32792 }, /* OR */ { CPUFUNC(op_8020_0), 32800 }, /* OR */ { CPUFUNC(op_8028_0), 32808 }, /* OR */ -{ CPUFUNC(op_8030_3), 32816 }, /* OR */ +{ CPUFUNC(op_8030_0), 32816 }, /* OR */ { CPUFUNC(op_8038_0), 32824 }, /* OR */ { CPUFUNC(op_8039_0), 32825 }, /* OR */ { CPUFUNC(op_803a_0), 32826 }, /* OR */ -{ CPUFUNC(op_803b_3), 32827 }, /* OR */ +{ CPUFUNC(op_803b_0), 32827 }, /* OR */ { CPUFUNC(op_803c_0), 32828 }, /* OR */ { CPUFUNC(op_8040_0), 32832 }, /* OR */ { CPUFUNC(op_8050_0), 32848 }, /* OR */ { CPUFUNC(op_8058_0), 32856 }, /* OR */ { CPUFUNC(op_8060_0), 32864 }, /* OR */ { CPUFUNC(op_8068_0), 32872 }, /* OR */ -{ CPUFUNC(op_8070_3), 32880 }, /* OR */ +{ CPUFUNC(op_8070_0), 32880 }, /* OR */ { CPUFUNC(op_8078_0), 32888 }, /* OR */ { CPUFUNC(op_8079_0), 32889 }, /* OR */ { CPUFUNC(op_807a_0), 32890 }, /* OR */ -{ CPUFUNC(op_807b_3), 32891 }, /* OR */ +{ CPUFUNC(op_807b_0), 32891 }, /* OR */ { CPUFUNC(op_807c_0), 32892 }, /* OR */ { CPUFUNC(op_8080_0), 32896 }, /* OR */ { CPUFUNC(op_8090_0), 32912 }, /* OR */ { CPUFUNC(op_8098_0), 32920 }, /* OR */ { CPUFUNC(op_80a0_0), 32928 }, /* OR */ { CPUFUNC(op_80a8_0), 32936 }, /* OR */ -{ CPUFUNC(op_80b0_3), 32944 }, /* OR */ +{ CPUFUNC(op_80b0_0), 32944 }, /* OR */ { CPUFUNC(op_80b8_0), 32952 }, /* OR */ { CPUFUNC(op_80b9_0), 32953 }, /* OR */ { CPUFUNC(op_80ba_0), 32954 }, /* OR */ -{ CPUFUNC(op_80bb_3), 32955 }, /* OR */ +{ CPUFUNC(op_80bb_0), 32955 }, /* OR */ { CPUFUNC(op_80bc_0), 32956 }, /* OR */ { CPUFUNC(op_80c0_0), 32960 }, /* DIVU */ { CPUFUNC(op_80d0_0), 32976 }, /* DIVU */ { CPUFUNC(op_80d8_0), 32984 }, /* DIVU */ { CPUFUNC(op_80e0_0), 32992 }, /* DIVU */ { CPUFUNC(op_80e8_0), 33000 }, /* DIVU */ -{ CPUFUNC(op_80f0_3), 33008 }, /* DIVU */ +{ CPUFUNC(op_80f0_0), 33008 }, /* DIVU */ { CPUFUNC(op_80f8_0), 33016 }, /* DIVU */ { CPUFUNC(op_80f9_0), 33017 }, /* DIVU */ { CPUFUNC(op_80fa_0), 33018 }, /* DIVU */ -{ CPUFUNC(op_80fb_3), 33019 }, /* DIVU */ +{ CPUFUNC(op_80fb_0), 33019 }, /* DIVU */ { CPUFUNC(op_80fc_0), 33020 }, /* DIVU */ -{ CPUFUNC(op_8100_0), 33024 }, /* SBCD */ -{ CPUFUNC(op_8108_0), 33032 }, /* SBCD */ +{ CPUFUNC(op_8100_2), 33024 }, /* SBCD */ +{ CPUFUNC(op_8108_2), 33032 }, /* SBCD */ { CPUFUNC(op_8110_0), 33040 }, /* OR */ { CPUFUNC(op_8118_0), 33048 }, /* OR */ { CPUFUNC(op_8120_0), 33056 }, /* OR */ { CPUFUNC(op_8128_0), 33064 }, /* OR */ -{ CPUFUNC(op_8130_3), 33072 }, /* OR */ +{ CPUFUNC(op_8130_0), 33072 }, /* OR */ { CPUFUNC(op_8138_0), 33080 }, /* OR */ { CPUFUNC(op_8139_0), 33081 }, /* OR */ +{ CPUFUNC(op_8140_0), 33088 }, /* PACK */ +{ CPUFUNC(op_8148_0), 33096 }, /* PACK */ { CPUFUNC(op_8150_0), 33104 }, /* OR */ { CPUFUNC(op_8158_0), 33112 }, /* OR */ { CPUFUNC(op_8160_0), 33120 }, /* OR */ { CPUFUNC(op_8168_0), 33128 }, /* OR */ -{ CPUFUNC(op_8170_3), 33136 }, /* OR */ +{ CPUFUNC(op_8170_0), 33136 }, /* OR */ { CPUFUNC(op_8178_0), 33144 }, /* OR */ { CPUFUNC(op_8179_0), 33145 }, /* OR */ +{ CPUFUNC(op_8180_0), 33152 }, /* UNPK */ +{ CPUFUNC(op_8188_0), 33160 }, /* UNPK */ { CPUFUNC(op_8190_0), 33168 }, /* OR */ { CPUFUNC(op_8198_0), 33176 }, /* OR */ { CPUFUNC(op_81a0_0), 33184 }, /* OR */ { CPUFUNC(op_81a8_0), 33192 }, /* OR */ -{ CPUFUNC(op_81b0_3), 33200 }, /* OR */ +{ CPUFUNC(op_81b0_0), 33200 }, /* OR */ { CPUFUNC(op_81b8_0), 33208 }, /* OR */ { CPUFUNC(op_81b9_0), 33209 }, /* OR */ { CPUFUNC(op_81c0_0), 33216 }, /* DIVS */ @@ -7261,22 +7602,22 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_81d8_0), 33240 }, /* DIVS */ { CPUFUNC(op_81e0_0), 33248 }, /* DIVS */ { CPUFUNC(op_81e8_0), 33256 }, /* DIVS */ -{ CPUFUNC(op_81f0_3), 33264 }, /* DIVS */ +{ CPUFUNC(op_81f0_0), 33264 }, /* DIVS */ { CPUFUNC(op_81f8_0), 33272 }, /* DIVS */ { CPUFUNC(op_81f9_0), 33273 }, /* DIVS */ { CPUFUNC(op_81fa_0), 33274 }, /* DIVS */ -{ CPUFUNC(op_81fb_3), 33275 }, /* DIVS */ +{ CPUFUNC(op_81fb_0), 33275 }, /* DIVS */ { CPUFUNC(op_81fc_0), 33276 }, /* DIVS */ { CPUFUNC(op_9000_0), 36864 }, /* SUB */ { CPUFUNC(op_9010_0), 36880 }, /* SUB */ { CPUFUNC(op_9018_0), 36888 }, /* SUB */ { CPUFUNC(op_9020_0), 36896 }, /* SUB */ { CPUFUNC(op_9028_0), 36904 }, /* SUB */ -{ CPUFUNC(op_9030_3), 36912 }, /* SUB */ +{ CPUFUNC(op_9030_0), 36912 }, /* SUB */ { CPUFUNC(op_9038_0), 36920 }, /* SUB */ { CPUFUNC(op_9039_0), 36921 }, /* SUB */ { CPUFUNC(op_903a_0), 36922 }, /* SUB */ -{ CPUFUNC(op_903b_3), 36923 }, /* SUB */ +{ CPUFUNC(op_903b_0), 36923 }, /* SUB */ { CPUFUNC(op_903c_0), 36924 }, /* SUB */ { CPUFUNC(op_9040_0), 36928 }, /* SUB */ { CPUFUNC(op_9048_0), 36936 }, /* SUB */ @@ -7284,11 +7625,11 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_9058_0), 36952 }, /* SUB */ { CPUFUNC(op_9060_0), 36960 }, /* SUB */ { CPUFUNC(op_9068_0), 36968 }, /* SUB */ -{ CPUFUNC(op_9070_3), 36976 }, /* SUB */ +{ CPUFUNC(op_9070_0), 36976 }, /* SUB */ { CPUFUNC(op_9078_0), 36984 }, /* SUB */ { CPUFUNC(op_9079_0), 36985 }, /* SUB */ { CPUFUNC(op_907a_0), 36986 }, /* SUB */ -{ CPUFUNC(op_907b_3), 36987 }, /* SUB */ +{ CPUFUNC(op_907b_0), 36987 }, /* SUB */ { CPUFUNC(op_907c_0), 36988 }, /* SUB */ { CPUFUNC(op_9080_0), 36992 }, /* SUB */ { CPUFUNC(op_9088_0), 37000 }, /* SUB */ @@ -7296,11 +7637,11 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_9098_0), 37016 }, /* SUB */ { CPUFUNC(op_90a0_0), 37024 }, /* SUB */ { CPUFUNC(op_90a8_0), 37032 }, /* SUB */ -{ CPUFUNC(op_90b0_3), 37040 }, /* SUB */ +{ CPUFUNC(op_90b0_0), 37040 }, /* SUB */ { CPUFUNC(op_90b8_0), 37048 }, /* SUB */ { CPUFUNC(op_90b9_0), 37049 }, /* SUB */ { CPUFUNC(op_90ba_0), 37050 }, /* SUB */ -{ CPUFUNC(op_90bb_3), 37051 }, /* SUB */ +{ CPUFUNC(op_90bb_0), 37051 }, /* SUB */ { CPUFUNC(op_90bc_0), 37052 }, /* SUB */ { CPUFUNC(op_90c0_0), 37056 }, /* SUBA */ { CPUFUNC(op_90c8_0), 37064 }, /* SUBA */ @@ -7308,11 +7649,11 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_90d8_0), 37080 }, /* SUBA */ { CPUFUNC(op_90e0_0), 37088 }, /* SUBA */ { CPUFUNC(op_90e8_0), 37096 }, /* SUBA */ -{ CPUFUNC(op_90f0_3), 37104 }, /* SUBA */ +{ CPUFUNC(op_90f0_0), 37104 }, /* SUBA */ { CPUFUNC(op_90f8_0), 37112 }, /* SUBA */ { CPUFUNC(op_90f9_0), 37113 }, /* SUBA */ { CPUFUNC(op_90fa_0), 37114 }, /* SUBA */ -{ CPUFUNC(op_90fb_3), 37115 }, /* SUBA */ +{ CPUFUNC(op_90fb_0), 37115 }, /* SUBA */ { CPUFUNC(op_90fc_0), 37116 }, /* SUBA */ { CPUFUNC(op_9100_0), 37120 }, /* SUBX */ { CPUFUNC(op_9108_0), 37128 }, /* SUBX */ @@ -7320,7 +7661,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_9118_0), 37144 }, /* SUB */ { CPUFUNC(op_9120_0), 37152 }, /* SUB */ { CPUFUNC(op_9128_0), 37160 }, /* SUB */ -{ CPUFUNC(op_9130_3), 37168 }, /* SUB */ +{ CPUFUNC(op_9130_0), 37168 }, /* SUB */ { CPUFUNC(op_9138_0), 37176 }, /* SUB */ { CPUFUNC(op_9139_0), 37177 }, /* SUB */ { CPUFUNC(op_9140_0), 37184 }, /* SUBX */ @@ -7329,7 +7670,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_9158_0), 37208 }, /* SUB */ { CPUFUNC(op_9160_0), 37216 }, /* SUB */ { CPUFUNC(op_9168_0), 37224 }, /* SUB */ -{ CPUFUNC(op_9170_3), 37232 }, /* SUB */ +{ CPUFUNC(op_9170_0), 37232 }, /* SUB */ { CPUFUNC(op_9178_0), 37240 }, /* SUB */ { CPUFUNC(op_9179_0), 37241 }, /* SUB */ { CPUFUNC(op_9180_0), 37248 }, /* SUBX */ @@ -7338,7 +7679,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_9198_0), 37272 }, /* SUB */ { CPUFUNC(op_91a0_0), 37280 }, /* SUB */ { CPUFUNC(op_91a8_0), 37288 }, /* SUB */ -{ CPUFUNC(op_91b0_3), 37296 }, /* SUB */ +{ CPUFUNC(op_91b0_0), 37296 }, /* SUB */ { CPUFUNC(op_91b8_0), 37304 }, /* SUB */ { CPUFUNC(op_91b9_0), 37305 }, /* SUB */ { CPUFUNC(op_91c0_0), 37312 }, /* SUBA */ @@ -7347,22 +7688,22 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_91d8_0), 37336 }, /* SUBA */ { CPUFUNC(op_91e0_0), 37344 }, /* SUBA */ { CPUFUNC(op_91e8_0), 37352 }, /* SUBA */ -{ CPUFUNC(op_91f0_3), 37360 }, /* SUBA */ +{ CPUFUNC(op_91f0_0), 37360 }, /* SUBA */ { CPUFUNC(op_91f8_0), 37368 }, /* SUBA */ { CPUFUNC(op_91f9_0), 37369 }, /* SUBA */ { CPUFUNC(op_91fa_0), 37370 }, /* SUBA */ -{ CPUFUNC(op_91fb_3), 37371 }, /* SUBA */ +{ CPUFUNC(op_91fb_0), 37371 }, /* SUBA */ { CPUFUNC(op_91fc_0), 37372 }, /* SUBA */ { CPUFUNC(op_b000_0), 45056 }, /* CMP */ { CPUFUNC(op_b010_0), 45072 }, /* CMP */ { CPUFUNC(op_b018_0), 45080 }, /* CMP */ { CPUFUNC(op_b020_0), 45088 }, /* CMP */ { CPUFUNC(op_b028_0), 45096 }, /* CMP */ -{ CPUFUNC(op_b030_3), 45104 }, /* CMP */ +{ CPUFUNC(op_b030_0), 45104 }, /* CMP */ { CPUFUNC(op_b038_0), 45112 }, /* CMP */ { CPUFUNC(op_b039_0), 45113 }, /* CMP */ { CPUFUNC(op_b03a_0), 45114 }, /* CMP */ -{ CPUFUNC(op_b03b_3), 45115 }, /* CMP */ +{ CPUFUNC(op_b03b_0), 45115 }, /* CMP */ { CPUFUNC(op_b03c_0), 45116 }, /* CMP */ { CPUFUNC(op_b040_0), 45120 }, /* CMP */ { CPUFUNC(op_b048_0), 45128 }, /* CMP */ @@ -7370,11 +7711,11 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_b058_0), 45144 }, /* CMP */ { CPUFUNC(op_b060_0), 45152 }, /* CMP */ { CPUFUNC(op_b068_0), 45160 }, /* CMP */ -{ CPUFUNC(op_b070_3), 45168 }, /* CMP */ +{ CPUFUNC(op_b070_0), 45168 }, /* CMP */ { CPUFUNC(op_b078_0), 45176 }, /* CMP */ { CPUFUNC(op_b079_0), 45177 }, /* CMP */ { CPUFUNC(op_b07a_0), 45178 }, /* CMP */ -{ CPUFUNC(op_b07b_3), 45179 }, /* CMP */ +{ CPUFUNC(op_b07b_0), 45179 }, /* CMP */ { CPUFUNC(op_b07c_0), 45180 }, /* CMP */ { CPUFUNC(op_b080_0), 45184 }, /* CMP */ { CPUFUNC(op_b088_0), 45192 }, /* CMP */ @@ -7382,11 +7723,11 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_b098_0), 45208 }, /* CMP */ { CPUFUNC(op_b0a0_0), 45216 }, /* CMP */ { CPUFUNC(op_b0a8_0), 45224 }, /* CMP */ -{ CPUFUNC(op_b0b0_3), 45232 }, /* CMP */ +{ CPUFUNC(op_b0b0_0), 45232 }, /* CMP */ { CPUFUNC(op_b0b8_0), 45240 }, /* CMP */ { CPUFUNC(op_b0b9_0), 45241 }, /* CMP */ { CPUFUNC(op_b0ba_0), 45242 }, /* CMP */ -{ CPUFUNC(op_b0bb_3), 45243 }, /* CMP */ +{ CPUFUNC(op_b0bb_0), 45243 }, /* CMP */ { CPUFUNC(op_b0bc_0), 45244 }, /* CMP */ { CPUFUNC(op_b0c0_0), 45248 }, /* CMPA */ { CPUFUNC(op_b0c8_0), 45256 }, /* CMPA */ @@ -7394,11 +7735,11 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_b0d8_0), 45272 }, /* CMPA */ { CPUFUNC(op_b0e0_0), 45280 }, /* CMPA */ { CPUFUNC(op_b0e8_0), 45288 }, /* CMPA */ -{ CPUFUNC(op_b0f0_3), 45296 }, /* CMPA */ +{ CPUFUNC(op_b0f0_0), 45296 }, /* CMPA */ { CPUFUNC(op_b0f8_0), 45304 }, /* CMPA */ { CPUFUNC(op_b0f9_0), 45305 }, /* CMPA */ { CPUFUNC(op_b0fa_0), 45306 }, /* CMPA */ -{ CPUFUNC(op_b0fb_3), 45307 }, /* CMPA */ +{ CPUFUNC(op_b0fb_0), 45307 }, /* CMPA */ { CPUFUNC(op_b0fc_0), 45308 }, /* CMPA */ { CPUFUNC(op_b100_0), 45312 }, /* EOR */ { CPUFUNC(op_b108_0), 45320 }, /* CMPM */ @@ -7406,7 +7747,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_b118_0), 45336 }, /* EOR */ { CPUFUNC(op_b120_0), 45344 }, /* EOR */ { CPUFUNC(op_b128_0), 45352 }, /* EOR */ -{ CPUFUNC(op_b130_3), 45360 }, /* EOR */ +{ CPUFUNC(op_b130_0), 45360 }, /* EOR */ { CPUFUNC(op_b138_0), 45368 }, /* EOR */ { CPUFUNC(op_b139_0), 45369 }, /* EOR */ { CPUFUNC(op_b140_0), 45376 }, /* EOR */ @@ -7415,7 +7756,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_b158_0), 45400 }, /* EOR */ { CPUFUNC(op_b160_0), 45408 }, /* EOR */ { CPUFUNC(op_b168_0), 45416 }, /* EOR */ -{ CPUFUNC(op_b170_3), 45424 }, /* EOR */ +{ CPUFUNC(op_b170_0), 45424 }, /* EOR */ { CPUFUNC(op_b178_0), 45432 }, /* EOR */ { CPUFUNC(op_b179_0), 45433 }, /* EOR */ { CPUFUNC(op_b180_0), 45440 }, /* EOR */ @@ -7424,7 +7765,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_b198_0), 45464 }, /* EOR */ { CPUFUNC(op_b1a0_0), 45472 }, /* EOR */ { CPUFUNC(op_b1a8_0), 45480 }, /* EOR */ -{ CPUFUNC(op_b1b0_3), 45488 }, /* EOR */ +{ CPUFUNC(op_b1b0_0), 45488 }, /* EOR */ { CPUFUNC(op_b1b8_0), 45496 }, /* EOR */ { CPUFUNC(op_b1b9_0), 45497 }, /* EOR */ { CPUFUNC(op_b1c0_0), 45504 }, /* CMPA */ @@ -7433,63 +7774,63 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_b1d8_0), 45528 }, /* CMPA */ { CPUFUNC(op_b1e0_0), 45536 }, /* CMPA */ { CPUFUNC(op_b1e8_0), 45544 }, /* CMPA */ -{ CPUFUNC(op_b1f0_3), 45552 }, /* CMPA */ +{ CPUFUNC(op_b1f0_0), 45552 }, /* CMPA */ { CPUFUNC(op_b1f8_0), 45560 }, /* CMPA */ { CPUFUNC(op_b1f9_0), 45561 }, /* CMPA */ { CPUFUNC(op_b1fa_0), 45562 }, /* CMPA */ -{ CPUFUNC(op_b1fb_3), 45563 }, /* CMPA */ +{ CPUFUNC(op_b1fb_0), 45563 }, /* CMPA */ { CPUFUNC(op_b1fc_0), 45564 }, /* CMPA */ { CPUFUNC(op_c000_0), 49152 }, /* AND */ { CPUFUNC(op_c010_0), 49168 }, /* AND */ { CPUFUNC(op_c018_0), 49176 }, /* AND */ { CPUFUNC(op_c020_0), 49184 }, /* AND */ { CPUFUNC(op_c028_0), 49192 }, /* AND */ -{ CPUFUNC(op_c030_3), 49200 }, /* AND */ +{ CPUFUNC(op_c030_0), 49200 }, /* AND */ { CPUFUNC(op_c038_0), 49208 }, /* AND */ { CPUFUNC(op_c039_0), 49209 }, /* AND */ { CPUFUNC(op_c03a_0), 49210 }, /* AND */ -{ CPUFUNC(op_c03b_3), 49211 }, /* AND */ +{ CPUFUNC(op_c03b_0), 49211 }, /* AND */ { CPUFUNC(op_c03c_0), 49212 }, /* AND */ { CPUFUNC(op_c040_0), 49216 }, /* AND */ { CPUFUNC(op_c050_0), 49232 }, /* AND */ { CPUFUNC(op_c058_0), 49240 }, /* AND */ { CPUFUNC(op_c060_0), 49248 }, /* AND */ { CPUFUNC(op_c068_0), 49256 }, /* AND */ -{ CPUFUNC(op_c070_3), 49264 }, /* AND */ +{ CPUFUNC(op_c070_0), 49264 }, /* AND */ { CPUFUNC(op_c078_0), 49272 }, /* AND */ { CPUFUNC(op_c079_0), 49273 }, /* AND */ { CPUFUNC(op_c07a_0), 49274 }, /* AND */ -{ CPUFUNC(op_c07b_3), 49275 }, /* AND */ +{ CPUFUNC(op_c07b_0), 49275 }, /* AND */ { CPUFUNC(op_c07c_0), 49276 }, /* AND */ { CPUFUNC(op_c080_0), 49280 }, /* AND */ { CPUFUNC(op_c090_0), 49296 }, /* AND */ { CPUFUNC(op_c098_0), 49304 }, /* AND */ { CPUFUNC(op_c0a0_0), 49312 }, /* AND */ { CPUFUNC(op_c0a8_0), 49320 }, /* AND */ -{ CPUFUNC(op_c0b0_3), 49328 }, /* AND */ +{ CPUFUNC(op_c0b0_0), 49328 }, /* AND */ { CPUFUNC(op_c0b8_0), 49336 }, /* AND */ { CPUFUNC(op_c0b9_0), 49337 }, /* AND */ { CPUFUNC(op_c0ba_0), 49338 }, /* AND */ -{ CPUFUNC(op_c0bb_3), 49339 }, /* AND */ +{ CPUFUNC(op_c0bb_0), 49339 }, /* AND */ { CPUFUNC(op_c0bc_0), 49340 }, /* AND */ { CPUFUNC(op_c0c0_0), 49344 }, /* MULU */ { CPUFUNC(op_c0d0_0), 49360 }, /* MULU */ { CPUFUNC(op_c0d8_0), 49368 }, /* MULU */ { CPUFUNC(op_c0e0_0), 49376 }, /* MULU */ { CPUFUNC(op_c0e8_0), 49384 }, /* MULU */ -{ CPUFUNC(op_c0f0_3), 49392 }, /* MULU */ +{ CPUFUNC(op_c0f0_0), 49392 }, /* MULU */ { CPUFUNC(op_c0f8_0), 49400 }, /* MULU */ { CPUFUNC(op_c0f9_0), 49401 }, /* MULU */ { CPUFUNC(op_c0fa_0), 49402 }, /* MULU */ -{ CPUFUNC(op_c0fb_3), 49403 }, /* MULU */ +{ CPUFUNC(op_c0fb_0), 49403 }, /* MULU */ { CPUFUNC(op_c0fc_0), 49404 }, /* MULU */ -{ CPUFUNC(op_c100_0), 49408 }, /* ABCD */ -{ CPUFUNC(op_c108_0), 49416 }, /* ABCD */ +{ CPUFUNC(op_c100_2), 49408 }, /* ABCD */ +{ CPUFUNC(op_c108_2), 49416 }, /* ABCD */ { CPUFUNC(op_c110_0), 49424 }, /* AND */ { CPUFUNC(op_c118_0), 49432 }, /* AND */ { CPUFUNC(op_c120_0), 49440 }, /* AND */ { CPUFUNC(op_c128_0), 49448 }, /* AND */ -{ CPUFUNC(op_c130_3), 49456 }, /* AND */ +{ CPUFUNC(op_c130_0), 49456 }, /* AND */ { CPUFUNC(op_c138_0), 49464 }, /* AND */ { CPUFUNC(op_c139_0), 49465 }, /* AND */ { CPUFUNC(op_c140_0), 49472 }, /* EXG */ @@ -7498,7 +7839,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_c158_0), 49496 }, /* AND */ { CPUFUNC(op_c160_0), 49504 }, /* AND */ { CPUFUNC(op_c168_0), 49512 }, /* AND */ -{ CPUFUNC(op_c170_3), 49520 }, /* AND */ +{ CPUFUNC(op_c170_0), 49520 }, /* AND */ { CPUFUNC(op_c178_0), 49528 }, /* AND */ { CPUFUNC(op_c179_0), 49529 }, /* AND */ { CPUFUNC(op_c188_0), 49544 }, /* EXG */ @@ -7506,7 +7847,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_c198_0), 49560 }, /* AND */ { CPUFUNC(op_c1a0_0), 49568 }, /* AND */ { CPUFUNC(op_c1a8_0), 49576 }, /* AND */ -{ CPUFUNC(op_c1b0_3), 49584 }, /* AND */ +{ CPUFUNC(op_c1b0_0), 49584 }, /* AND */ { CPUFUNC(op_c1b8_0), 49592 }, /* AND */ { CPUFUNC(op_c1b9_0), 49593 }, /* AND */ { CPUFUNC(op_c1c0_0), 49600 }, /* MULS */ @@ -7514,22 +7855,22 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_c1d8_0), 49624 }, /* MULS */ { CPUFUNC(op_c1e0_0), 49632 }, /* MULS */ { CPUFUNC(op_c1e8_0), 49640 }, /* MULS */ -{ CPUFUNC(op_c1f0_3), 49648 }, /* MULS */ +{ CPUFUNC(op_c1f0_0), 49648 }, /* MULS */ { CPUFUNC(op_c1f8_0), 49656 }, /* MULS */ { CPUFUNC(op_c1f9_0), 49657 }, /* MULS */ { CPUFUNC(op_c1fa_0), 49658 }, /* MULS */ -{ CPUFUNC(op_c1fb_3), 49659 }, /* MULS */ +{ CPUFUNC(op_c1fb_0), 49659 }, /* MULS */ { CPUFUNC(op_c1fc_0), 49660 }, /* MULS */ { CPUFUNC(op_d000_0), 53248 }, /* ADD */ { CPUFUNC(op_d010_0), 53264 }, /* ADD */ { CPUFUNC(op_d018_0), 53272 }, /* ADD */ { CPUFUNC(op_d020_0), 53280 }, /* ADD */ { CPUFUNC(op_d028_0), 53288 }, /* ADD */ -{ CPUFUNC(op_d030_3), 53296 }, /* ADD */ +{ CPUFUNC(op_d030_0), 53296 }, /* ADD */ { CPUFUNC(op_d038_0), 53304 }, /* ADD */ { CPUFUNC(op_d039_0), 53305 }, /* ADD */ { CPUFUNC(op_d03a_0), 53306 }, /* ADD */ -{ CPUFUNC(op_d03b_3), 53307 }, /* ADD */ +{ CPUFUNC(op_d03b_0), 53307 }, /* ADD */ { CPUFUNC(op_d03c_0), 53308 }, /* ADD */ { CPUFUNC(op_d040_0), 53312 }, /* ADD */ { CPUFUNC(op_d048_0), 53320 }, /* ADD */ @@ -7537,11 +7878,11 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_d058_0), 53336 }, /* ADD */ { CPUFUNC(op_d060_0), 53344 }, /* ADD */ { CPUFUNC(op_d068_0), 53352 }, /* ADD */ -{ CPUFUNC(op_d070_3), 53360 }, /* ADD */ +{ CPUFUNC(op_d070_0), 53360 }, /* ADD */ { CPUFUNC(op_d078_0), 53368 }, /* ADD */ { CPUFUNC(op_d079_0), 53369 }, /* ADD */ { CPUFUNC(op_d07a_0), 53370 }, /* ADD */ -{ CPUFUNC(op_d07b_3), 53371 }, /* ADD */ +{ CPUFUNC(op_d07b_0), 53371 }, /* ADD */ { CPUFUNC(op_d07c_0), 53372 }, /* ADD */ { CPUFUNC(op_d080_0), 53376 }, /* ADD */ { CPUFUNC(op_d088_0), 53384 }, /* ADD */ @@ -7549,11 +7890,11 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_d098_0), 53400 }, /* ADD */ { CPUFUNC(op_d0a0_0), 53408 }, /* ADD */ { CPUFUNC(op_d0a8_0), 53416 }, /* ADD */ -{ CPUFUNC(op_d0b0_3), 53424 }, /* ADD */ +{ CPUFUNC(op_d0b0_0), 53424 }, /* ADD */ { CPUFUNC(op_d0b8_0), 53432 }, /* ADD */ { CPUFUNC(op_d0b9_0), 53433 }, /* ADD */ { CPUFUNC(op_d0ba_0), 53434 }, /* ADD */ -{ CPUFUNC(op_d0bb_3), 53435 }, /* ADD */ +{ CPUFUNC(op_d0bb_0), 53435 }, /* ADD */ { CPUFUNC(op_d0bc_0), 53436 }, /* ADD */ { CPUFUNC(op_d0c0_0), 53440 }, /* ADDA */ { CPUFUNC(op_d0c8_0), 53448 }, /* ADDA */ @@ -7561,11 +7902,11 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_d0d8_0), 53464 }, /* ADDA */ { CPUFUNC(op_d0e0_0), 53472 }, /* ADDA */ { CPUFUNC(op_d0e8_0), 53480 }, /* ADDA */ -{ CPUFUNC(op_d0f0_3), 53488 }, /* ADDA */ +{ CPUFUNC(op_d0f0_0), 53488 }, /* ADDA */ { CPUFUNC(op_d0f8_0), 53496 }, /* ADDA */ { CPUFUNC(op_d0f9_0), 53497 }, /* ADDA */ { CPUFUNC(op_d0fa_0), 53498 }, /* ADDA */ -{ CPUFUNC(op_d0fb_3), 53499 }, /* ADDA */ +{ CPUFUNC(op_d0fb_0), 53499 }, /* ADDA */ { CPUFUNC(op_d0fc_0), 53500 }, /* ADDA */ { CPUFUNC(op_d100_0), 53504 }, /* ADDX */ { CPUFUNC(op_d108_0), 53512 }, /* ADDX */ @@ -7573,7 +7914,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_d118_0), 53528 }, /* ADD */ { CPUFUNC(op_d120_0), 53536 }, /* ADD */ { CPUFUNC(op_d128_0), 53544 }, /* ADD */ -{ CPUFUNC(op_d130_3), 53552 }, /* ADD */ +{ CPUFUNC(op_d130_0), 53552 }, /* ADD */ { CPUFUNC(op_d138_0), 53560 }, /* ADD */ { CPUFUNC(op_d139_0), 53561 }, /* ADD */ { CPUFUNC(op_d140_0), 53568 }, /* ADDX */ @@ -7582,7 +7923,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_d158_0), 53592 }, /* ADD */ { CPUFUNC(op_d160_0), 53600 }, /* ADD */ { CPUFUNC(op_d168_0), 53608 }, /* ADD */ -{ CPUFUNC(op_d170_3), 53616 }, /* ADD */ +{ CPUFUNC(op_d170_0), 53616 }, /* ADD */ { CPUFUNC(op_d178_0), 53624 }, /* ADD */ { CPUFUNC(op_d179_0), 53625 }, /* ADD */ { CPUFUNC(op_d180_0), 53632 }, /* ADDX */ @@ -7591,7 +7932,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_d198_0), 53656 }, /* ADD */ { CPUFUNC(op_d1a0_0), 53664 }, /* ADD */ { CPUFUNC(op_d1a8_0), 53672 }, /* ADD */ -{ CPUFUNC(op_d1b0_3), 53680 }, /* ADD */ +{ CPUFUNC(op_d1b0_0), 53680 }, /* ADD */ { CPUFUNC(op_d1b8_0), 53688 }, /* ADD */ { CPUFUNC(op_d1b9_0), 53689 }, /* ADD */ { CPUFUNC(op_d1c0_0), 53696 }, /* ADDA */ @@ -7600,11 +7941,11 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_d1d8_0), 53720 }, /* ADDA */ { CPUFUNC(op_d1e0_0), 53728 }, /* ADDA */ { CPUFUNC(op_d1e8_0), 53736 }, /* ADDA */ -{ CPUFUNC(op_d1f0_3), 53744 }, /* ADDA */ +{ CPUFUNC(op_d1f0_0), 53744 }, /* ADDA */ { CPUFUNC(op_d1f8_0), 53752 }, /* ADDA */ { CPUFUNC(op_d1f9_0), 53753 }, /* ADDA */ { CPUFUNC(op_d1fa_0), 53754 }, /* ADDA */ -{ CPUFUNC(op_d1fb_3), 53755 }, /* ADDA */ +{ CPUFUNC(op_d1fb_0), 53755 }, /* ADDA */ { CPUFUNC(op_d1fc_0), 53756 }, /* ADDA */ { CPUFUNC(op_e000_0), 57344 }, /* ASR */ { CPUFUNC(op_e008_0), 57352 }, /* LSR */ @@ -7634,7 +7975,7 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_e0d8_0), 57560 }, /* ASRW */ { CPUFUNC(op_e0e0_0), 57568 }, /* ASRW */ { CPUFUNC(op_e0e8_0), 57576 }, /* ASRW */ -{ CPUFUNC(op_e0f0_3), 57584 }, /* ASRW */ +{ CPUFUNC(op_e0f0_0), 57584 }, /* ASRW */ { CPUFUNC(op_e0f8_0), 57592 }, /* ASRW */ { CPUFUNC(op_e0f9_0), 57593 }, /* ASRW */ { CPUFUNC(op_e100_0), 57600 }, /* ASL */ @@ -7665,60 +8006,157 @@ const struct cputbl CPUFUNC(op_smalltbl_3)[] = { { CPUFUNC(op_e1d8_0), 57816 }, /* ASLW */ { CPUFUNC(op_e1e0_0), 57824 }, /* ASLW */ { CPUFUNC(op_e1e8_0), 57832 }, /* ASLW */ -{ CPUFUNC(op_e1f0_3), 57840 }, /* ASLW */ +{ CPUFUNC(op_e1f0_0), 57840 }, /* ASLW */ { CPUFUNC(op_e1f8_0), 57848 }, /* ASLW */ { CPUFUNC(op_e1f9_0), 57849 }, /* ASLW */ { CPUFUNC(op_e2d0_0), 58064 }, /* LSRW */ { CPUFUNC(op_e2d8_0), 58072 }, /* LSRW */ { CPUFUNC(op_e2e0_0), 58080 }, /* LSRW */ { CPUFUNC(op_e2e8_0), 58088 }, /* LSRW */ -{ CPUFUNC(op_e2f0_3), 58096 }, /* LSRW */ +{ CPUFUNC(op_e2f0_0), 58096 }, /* LSRW */ { CPUFUNC(op_e2f8_0), 58104 }, /* LSRW */ { CPUFUNC(op_e2f9_0), 58105 }, /* LSRW */ { CPUFUNC(op_e3d0_0), 58320 }, /* LSLW */ { CPUFUNC(op_e3d8_0), 58328 }, /* LSLW */ { CPUFUNC(op_e3e0_0), 58336 }, /* LSLW */ { CPUFUNC(op_e3e8_0), 58344 }, /* LSLW */ -{ CPUFUNC(op_e3f0_3), 58352 }, /* LSLW */ +{ CPUFUNC(op_e3f0_0), 58352 }, /* LSLW */ { CPUFUNC(op_e3f8_0), 58360 }, /* LSLW */ { CPUFUNC(op_e3f9_0), 58361 }, /* LSLW */ { CPUFUNC(op_e4d0_0), 58576 }, /* ROXRW */ { CPUFUNC(op_e4d8_0), 58584 }, /* ROXRW */ { CPUFUNC(op_e4e0_0), 58592 }, /* ROXRW */ { CPUFUNC(op_e4e8_0), 58600 }, /* ROXRW */ -{ CPUFUNC(op_e4f0_3), 58608 }, /* ROXRW */ +{ CPUFUNC(op_e4f0_0), 58608 }, /* ROXRW */ { CPUFUNC(op_e4f8_0), 58616 }, /* ROXRW */ { CPUFUNC(op_e4f9_0), 58617 }, /* ROXRW */ { CPUFUNC(op_e5d0_0), 58832 }, /* ROXLW */ { CPUFUNC(op_e5d8_0), 58840 }, /* ROXLW */ { CPUFUNC(op_e5e0_0), 58848 }, /* ROXLW */ { CPUFUNC(op_e5e8_0), 58856 }, /* ROXLW */ -{ CPUFUNC(op_e5f0_3), 58864 }, /* ROXLW */ +{ CPUFUNC(op_e5f0_0), 58864 }, /* ROXLW */ { CPUFUNC(op_e5f8_0), 58872 }, /* ROXLW */ { CPUFUNC(op_e5f9_0), 58873 }, /* ROXLW */ { CPUFUNC(op_e6d0_0), 59088 }, /* RORW */ { CPUFUNC(op_e6d8_0), 59096 }, /* RORW */ { CPUFUNC(op_e6e0_0), 59104 }, /* RORW */ { CPUFUNC(op_e6e8_0), 59112 }, /* RORW */ -{ CPUFUNC(op_e6f0_3), 59120 }, /* RORW */ +{ CPUFUNC(op_e6f0_0), 59120 }, /* RORW */ { CPUFUNC(op_e6f8_0), 59128 }, /* RORW */ { CPUFUNC(op_e6f9_0), 59129 }, /* RORW */ { CPUFUNC(op_e7d0_0), 59344 }, /* ROLW */ { CPUFUNC(op_e7d8_0), 59352 }, /* ROLW */ { CPUFUNC(op_e7e0_0), 59360 }, /* ROLW */ { CPUFUNC(op_e7e8_0), 59368 }, /* ROLW */ -{ CPUFUNC(op_e7f0_3), 59376 }, /* ROLW */ +{ CPUFUNC(op_e7f0_0), 59376 }, /* ROLW */ { CPUFUNC(op_e7f8_0), 59384 }, /* ROLW */ { CPUFUNC(op_e7f9_0), 59385 }, /* ROLW */ +{ CPUFUNC(op_e8c0_0), 59584 }, /* BFTST */ +{ CPUFUNC(op_e8d0_0), 59600 }, /* BFTST */ +{ CPUFUNC(op_e8e8_0), 59624 }, /* BFTST */ +{ CPUFUNC(op_e8f0_0), 59632 }, /* BFTST */ +{ CPUFUNC(op_e8f8_0), 59640 }, /* BFTST */ +{ CPUFUNC(op_e8f9_0), 59641 }, /* BFTST */ +{ CPUFUNC(op_e8fa_0), 59642 }, /* BFTST */ +{ CPUFUNC(op_e8fb_0), 59643 }, /* BFTST */ +{ CPUFUNC(op_e9c0_0), 59840 }, /* BFEXTU */ +{ CPUFUNC(op_e9d0_0), 59856 }, /* BFEXTU */ +{ CPUFUNC(op_e9e8_0), 59880 }, /* BFEXTU */ +{ CPUFUNC(op_e9f0_0), 59888 }, /* BFEXTU */ +{ CPUFUNC(op_e9f8_0), 59896 }, /* BFEXTU */ +{ CPUFUNC(op_e9f9_0), 59897 }, /* BFEXTU */ +{ CPUFUNC(op_e9fa_0), 59898 }, /* BFEXTU */ +{ CPUFUNC(op_e9fb_0), 59899 }, /* BFEXTU */ +{ CPUFUNC(op_eac0_0), 60096 }, /* BFCHG */ +{ CPUFUNC(op_ead0_0), 60112 }, /* BFCHG */ +{ CPUFUNC(op_eae8_0), 60136 }, /* BFCHG */ +{ CPUFUNC(op_eaf0_0), 60144 }, /* BFCHG */ +{ CPUFUNC(op_eaf8_0), 60152 }, /* BFCHG */ +{ CPUFUNC(op_eaf9_0), 60153 }, /* BFCHG */ +{ CPUFUNC(op_ebc0_0), 60352 }, /* BFEXTS */ +{ CPUFUNC(op_ebd0_0), 60368 }, /* BFEXTS */ +{ CPUFUNC(op_ebe8_0), 60392 }, /* BFEXTS */ +{ CPUFUNC(op_ebf0_0), 60400 }, /* BFEXTS */ +{ CPUFUNC(op_ebf8_0), 60408 }, /* BFEXTS */ +{ CPUFUNC(op_ebf9_0), 60409 }, /* BFEXTS */ +{ CPUFUNC(op_ebfa_0), 60410 }, /* BFEXTS */ +{ CPUFUNC(op_ebfb_0), 60411 }, /* BFEXTS */ +{ CPUFUNC(op_ecc0_0), 60608 }, /* BFCLR */ +{ CPUFUNC(op_ecd0_0), 60624 }, /* BFCLR */ +{ CPUFUNC(op_ece8_0), 60648 }, /* BFCLR */ +{ CPUFUNC(op_ecf0_0), 60656 }, /* BFCLR */ +{ CPUFUNC(op_ecf8_0), 60664 }, /* BFCLR */ +{ CPUFUNC(op_ecf9_0), 60665 }, /* BFCLR */ +{ CPUFUNC(op_edc0_0), 60864 }, /* BFFFO */ +{ CPUFUNC(op_edd0_0), 60880 }, /* BFFFO */ +{ CPUFUNC(op_ede8_0), 60904 }, /* BFFFO */ +{ CPUFUNC(op_edf0_0), 60912 }, /* BFFFO */ +{ CPUFUNC(op_edf8_0), 60920 }, /* BFFFO */ +{ CPUFUNC(op_edf9_0), 60921 }, /* BFFFO */ +{ CPUFUNC(op_edfa_0), 60922 }, /* BFFFO */ +{ CPUFUNC(op_edfb_0), 60923 }, /* BFFFO */ +{ CPUFUNC(op_eec0_0), 61120 }, /* BFSET */ +{ CPUFUNC(op_eed0_0), 61136 }, /* BFSET */ +{ CPUFUNC(op_eee8_0), 61160 }, /* BFSET */ +{ CPUFUNC(op_eef0_0), 61168 }, /* BFSET */ +{ CPUFUNC(op_eef8_0), 61176 }, /* BFSET */ +{ CPUFUNC(op_eef9_0), 61177 }, /* BFSET */ +{ CPUFUNC(op_efc0_0), 61376 }, /* BFINS */ +{ CPUFUNC(op_efd0_0), 61392 }, /* BFINS */ +{ CPUFUNC(op_efe8_0), 61416 }, /* BFINS */ +{ CPUFUNC(op_eff0_0), 61424 }, /* BFINS */ +{ CPUFUNC(op_eff8_0), 61432 }, /* BFINS */ +{ CPUFUNC(op_eff9_0), 61433 }, /* BFINS */ +{ CPUFUNC(op_f200_0), 61952 }, /* FPP */ +{ CPUFUNC(op_f208_0), 61960 }, /* FPP */ +{ CPUFUNC(op_f210_0), 61968 }, /* FPP */ +{ CPUFUNC(op_f218_0), 61976 }, /* FPP */ +{ CPUFUNC(op_f220_0), 61984 }, /* FPP */ +{ CPUFUNC(op_f228_0), 61992 }, /* FPP */ +{ CPUFUNC(op_f230_0), 62000 }, /* FPP */ +{ CPUFUNC(op_f238_0), 62008 }, /* FPP */ +{ CPUFUNC(op_f239_0), 62009 }, /* FPP */ +{ CPUFUNC(op_f23a_0), 62010 }, /* FPP */ +{ CPUFUNC(op_f23b_0), 62011 }, /* FPP */ +{ CPUFUNC(op_f23c_0), 62012 }, /* FPP */ +{ CPUFUNC(op_f240_0), 62016 }, /* FScc */ +{ CPUFUNC(op_f248_0), 62024 }, /* FDBcc */ +{ CPUFUNC(op_f250_0), 62032 }, /* FScc */ +{ CPUFUNC(op_f258_0), 62040 }, /* FScc */ +{ CPUFUNC(op_f260_0), 62048 }, /* FScc */ +{ CPUFUNC(op_f268_0), 62056 }, /* FScc */ +{ CPUFUNC(op_f270_0), 62064 }, /* FScc */ +{ CPUFUNC(op_f278_0), 62072 }, /* FScc */ +{ CPUFUNC(op_f279_0), 62073 }, /* FScc */ +{ CPUFUNC(op_f27a_0), 62074 }, /* FTRAPcc */ +{ CPUFUNC(op_f27b_0), 62075 }, /* FTRAPcc */ +{ CPUFUNC(op_f27c_0), 62076 }, /* FTRAPcc */ +{ CPUFUNC(op_f280_0), 62080 }, /* FBcc */ +{ CPUFUNC(op_f2c0_0), 62144 }, /* FBcc */ +{ CPUFUNC(op_f310_0), 62224 }, /* FSAVE */ +{ CPUFUNC(op_f320_0), 62240 }, /* FSAVE */ +{ CPUFUNC(op_f328_0), 62248 }, /* FSAVE */ +{ CPUFUNC(op_f330_0), 62256 }, /* FSAVE */ +{ CPUFUNC(op_f338_0), 62264 }, /* FSAVE */ +{ CPUFUNC(op_f339_0), 62265 }, /* FSAVE */ +{ CPUFUNC(op_f350_0), 62288 }, /* FRESTORE */ +{ CPUFUNC(op_f358_0), 62296 }, /* FRESTORE */ +{ CPUFUNC(op_f368_0), 62312 }, /* FRESTORE */ +{ CPUFUNC(op_f370_0), 62320 }, /* FRESTORE */ +{ CPUFUNC(op_f378_0), 62328 }, /* FRESTORE */ +{ CPUFUNC(op_f379_0), 62329 }, /* FRESTORE */ +{ CPUFUNC(op_f37a_0), 62330 }, /* FRESTORE */ +{ CPUFUNC(op_f37b_0), 62331 }, /* FRESTORE */ { 0, 0 }}; #endif /* CPUEMU_68000_ONLY */ +#ifndef CPUEMU_68000_ONLY const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_0000_0), 0 }, /* OR */ { CPUFUNC(op_0010_0), 16 }, /* OR */ { CPUFUNC(op_0018_0), 24 }, /* OR */ { CPUFUNC(op_0020_0), 32 }, /* OR */ { CPUFUNC(op_0028_0), 40 }, /* OR */ -{ CPUFUNC(op_0030_3), 48 }, /* OR */ +{ CPUFUNC(op_0030_4), 48 }, /* OR */ { CPUFUNC(op_0038_0), 56 }, /* OR */ { CPUFUNC(op_0039_0), 57 }, /* OR */ { CPUFUNC(op_003c_0), 60 }, /* ORSR */ @@ -7727,7 +8165,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_0058_0), 88 }, /* OR */ { CPUFUNC(op_0060_0), 96 }, /* OR */ { CPUFUNC(op_0068_0), 104 }, /* OR */ -{ CPUFUNC(op_0070_3), 112 }, /* OR */ +{ CPUFUNC(op_0070_4), 112 }, /* OR */ { CPUFUNC(op_0078_0), 120 }, /* OR */ { CPUFUNC(op_0079_0), 121 }, /* OR */ { CPUFUNC(op_007c_0), 124 }, /* ORSR */ @@ -7736,7 +8174,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_0098_0), 152 }, /* OR */ { CPUFUNC(op_00a0_0), 160 }, /* OR */ { CPUFUNC(op_00a8_0), 168 }, /* OR */ -{ CPUFUNC(op_00b0_3), 176 }, /* OR */ +{ CPUFUNC(op_00b0_4), 176 }, /* OR */ { CPUFUNC(op_00b8_0), 184 }, /* OR */ { CPUFUNC(op_00b9_0), 185 }, /* OR */ { CPUFUNC(op_0100_0), 256 }, /* BTST */ @@ -7745,11 +8183,11 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_0118_0), 280 }, /* BTST */ { CPUFUNC(op_0120_0), 288 }, /* BTST */ { CPUFUNC(op_0128_0), 296 }, /* BTST */ -{ CPUFUNC(op_0130_3), 304 }, /* BTST */ +{ CPUFUNC(op_0130_4), 304 }, /* BTST */ { CPUFUNC(op_0138_0), 312 }, /* BTST */ { CPUFUNC(op_0139_0), 313 }, /* BTST */ { CPUFUNC(op_013a_0), 314 }, /* BTST */ -{ CPUFUNC(op_013b_3), 315 }, /* BTST */ +{ CPUFUNC(op_013b_4), 315 }, /* BTST */ { CPUFUNC(op_013c_0), 316 }, /* BTST */ { CPUFUNC(op_0140_0), 320 }, /* BCHG */ { CPUFUNC(op_0148_0), 328 }, /* MVPMR */ @@ -7757,39 +8195,39 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_0158_0), 344 }, /* BCHG */ { CPUFUNC(op_0160_0), 352 }, /* BCHG */ { CPUFUNC(op_0168_0), 360 }, /* BCHG */ -{ CPUFUNC(op_0170_3), 368 }, /* BCHG */ +{ CPUFUNC(op_0170_4), 368 }, /* BCHG */ { CPUFUNC(op_0178_0), 376 }, /* BCHG */ { CPUFUNC(op_0179_0), 377 }, /* BCHG */ { CPUFUNC(op_017a_0), 378 }, /* BCHG */ -{ CPUFUNC(op_017b_3), 379 }, /* BCHG */ +{ CPUFUNC(op_017b_4), 379 }, /* BCHG */ { CPUFUNC(op_0180_0), 384 }, /* BCLR */ { CPUFUNC(op_0188_0), 392 }, /* MVPRM */ { CPUFUNC(op_0190_0), 400 }, /* BCLR */ { CPUFUNC(op_0198_0), 408 }, /* BCLR */ { CPUFUNC(op_01a0_0), 416 }, /* BCLR */ { CPUFUNC(op_01a8_0), 424 }, /* BCLR */ -{ CPUFUNC(op_01b0_3), 432 }, /* BCLR */ +{ CPUFUNC(op_01b0_4), 432 }, /* BCLR */ { CPUFUNC(op_01b8_0), 440 }, /* BCLR */ { CPUFUNC(op_01b9_0), 441 }, /* BCLR */ { CPUFUNC(op_01ba_0), 442 }, /* BCLR */ -{ CPUFUNC(op_01bb_3), 443 }, /* BCLR */ +{ CPUFUNC(op_01bb_4), 443 }, /* BCLR */ { CPUFUNC(op_01c0_0), 448 }, /* BSET */ { CPUFUNC(op_01c8_0), 456 }, /* MVPRM */ { CPUFUNC(op_01d0_0), 464 }, /* BSET */ { CPUFUNC(op_01d8_0), 472 }, /* BSET */ { CPUFUNC(op_01e0_0), 480 }, /* BSET */ { CPUFUNC(op_01e8_0), 488 }, /* BSET */ -{ CPUFUNC(op_01f0_3), 496 }, /* BSET */ +{ CPUFUNC(op_01f0_4), 496 }, /* BSET */ { CPUFUNC(op_01f8_0), 504 }, /* BSET */ { CPUFUNC(op_01f9_0), 505 }, /* BSET */ { CPUFUNC(op_01fa_0), 506 }, /* BSET */ -{ CPUFUNC(op_01fb_3), 507 }, /* BSET */ +{ CPUFUNC(op_01fb_4), 507 }, /* BSET */ { CPUFUNC(op_0200_0), 512 }, /* AND */ { CPUFUNC(op_0210_0), 528 }, /* AND */ { CPUFUNC(op_0218_0), 536 }, /* AND */ { CPUFUNC(op_0220_0), 544 }, /* AND */ { CPUFUNC(op_0228_0), 552 }, /* AND */ -{ CPUFUNC(op_0230_3), 560 }, /* AND */ +{ CPUFUNC(op_0230_4), 560 }, /* AND */ { CPUFUNC(op_0238_0), 568 }, /* AND */ { CPUFUNC(op_0239_0), 569 }, /* AND */ { CPUFUNC(op_023c_0), 572 }, /* ANDSR */ @@ -7798,7 +8236,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_0258_0), 600 }, /* AND */ { CPUFUNC(op_0260_0), 608 }, /* AND */ { CPUFUNC(op_0268_0), 616 }, /* AND */ -{ CPUFUNC(op_0270_3), 624 }, /* AND */ +{ CPUFUNC(op_0270_4), 624 }, /* AND */ { CPUFUNC(op_0278_0), 632 }, /* AND */ { CPUFUNC(op_0279_0), 633 }, /* AND */ { CPUFUNC(op_027c_0), 636 }, /* ANDSR */ @@ -7807,7 +8245,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_0298_0), 664 }, /* AND */ { CPUFUNC(op_02a0_0), 672 }, /* AND */ { CPUFUNC(op_02a8_0), 680 }, /* AND */ -{ CPUFUNC(op_02b0_3), 688 }, /* AND */ +{ CPUFUNC(op_02b0_4), 688 }, /* AND */ { CPUFUNC(op_02b8_0), 696 }, /* AND */ { CPUFUNC(op_02b9_0), 697 }, /* AND */ { CPUFUNC(op_0400_0), 1024 }, /* SUB */ @@ -7815,7 +8253,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_0418_0), 1048 }, /* SUB */ { CPUFUNC(op_0420_0), 1056 }, /* SUB */ { CPUFUNC(op_0428_0), 1064 }, /* SUB */ -{ CPUFUNC(op_0430_3), 1072 }, /* SUB */ +{ CPUFUNC(op_0430_4), 1072 }, /* SUB */ { CPUFUNC(op_0438_0), 1080 }, /* SUB */ { CPUFUNC(op_0439_0), 1081 }, /* SUB */ { CPUFUNC(op_0440_0), 1088 }, /* SUB */ @@ -7823,7 +8261,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_0458_0), 1112 }, /* SUB */ { CPUFUNC(op_0460_0), 1120 }, /* SUB */ { CPUFUNC(op_0468_0), 1128 }, /* SUB */ -{ CPUFUNC(op_0470_3), 1136 }, /* SUB */ +{ CPUFUNC(op_0470_4), 1136 }, /* SUB */ { CPUFUNC(op_0478_0), 1144 }, /* SUB */ { CPUFUNC(op_0479_0), 1145 }, /* SUB */ { CPUFUNC(op_0480_0), 1152 }, /* SUB */ @@ -7831,7 +8269,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_0498_0), 1176 }, /* SUB */ { CPUFUNC(op_04a0_0), 1184 }, /* SUB */ { CPUFUNC(op_04a8_0), 1192 }, /* SUB */ -{ CPUFUNC(op_04b0_3), 1200 }, /* SUB */ +{ CPUFUNC(op_04b0_4), 1200 }, /* SUB */ { CPUFUNC(op_04b8_0), 1208 }, /* SUB */ { CPUFUNC(op_04b9_0), 1209 }, /* SUB */ { CPUFUNC(op_0600_0), 1536 }, /* ADD */ @@ -7839,7 +8277,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_0618_0), 1560 }, /* ADD */ { CPUFUNC(op_0620_0), 1568 }, /* ADD */ { CPUFUNC(op_0628_0), 1576 }, /* ADD */ -{ CPUFUNC(op_0630_3), 1584 }, /* ADD */ +{ CPUFUNC(op_0630_4), 1584 }, /* ADD */ { CPUFUNC(op_0638_0), 1592 }, /* ADD */ { CPUFUNC(op_0639_0), 1593 }, /* ADD */ { CPUFUNC(op_0640_0), 1600 }, /* ADD */ @@ -7847,7 +8285,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_0658_0), 1624 }, /* ADD */ { CPUFUNC(op_0660_0), 1632 }, /* ADD */ { CPUFUNC(op_0668_0), 1640 }, /* ADD */ -{ CPUFUNC(op_0670_3), 1648 }, /* ADD */ +{ CPUFUNC(op_0670_4), 1648 }, /* ADD */ { CPUFUNC(op_0678_0), 1656 }, /* ADD */ { CPUFUNC(op_0679_0), 1657 }, /* ADD */ { CPUFUNC(op_0680_0), 1664 }, /* ADD */ @@ -7855,7 +8293,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_0698_0), 1688 }, /* ADD */ { CPUFUNC(op_06a0_0), 1696 }, /* ADD */ { CPUFUNC(op_06a8_0), 1704 }, /* ADD */ -{ CPUFUNC(op_06b0_3), 1712 }, /* ADD */ +{ CPUFUNC(op_06b0_4), 1712 }, /* ADD */ { CPUFUNC(op_06b8_0), 1720 }, /* ADD */ { CPUFUNC(op_06b9_0), 1721 }, /* ADD */ { CPUFUNC(op_0800_0), 2048 }, /* BTST */ @@ -7863,48 +8301,48 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_0818_0), 2072 }, /* BTST */ { CPUFUNC(op_0820_0), 2080 }, /* BTST */ { CPUFUNC(op_0828_0), 2088 }, /* BTST */ -{ CPUFUNC(op_0830_3), 2096 }, /* BTST */ +{ CPUFUNC(op_0830_4), 2096 }, /* BTST */ { CPUFUNC(op_0838_0), 2104 }, /* BTST */ { CPUFUNC(op_0839_0), 2105 }, /* BTST */ { CPUFUNC(op_083a_0), 2106 }, /* BTST */ -{ CPUFUNC(op_083b_3), 2107 }, /* BTST */ +{ CPUFUNC(op_083b_4), 2107 }, /* BTST */ { CPUFUNC(op_083c_0), 2108 }, /* BTST */ { CPUFUNC(op_0840_0), 2112 }, /* BCHG */ { CPUFUNC(op_0850_0), 2128 }, /* BCHG */ { CPUFUNC(op_0858_0), 2136 }, /* BCHG */ { CPUFUNC(op_0860_0), 2144 }, /* BCHG */ { CPUFUNC(op_0868_0), 2152 }, /* BCHG */ -{ CPUFUNC(op_0870_3), 2160 }, /* BCHG */ +{ CPUFUNC(op_0870_4), 2160 }, /* BCHG */ { CPUFUNC(op_0878_0), 2168 }, /* BCHG */ { CPUFUNC(op_0879_0), 2169 }, /* BCHG */ { CPUFUNC(op_087a_0), 2170 }, /* BCHG */ -{ CPUFUNC(op_087b_3), 2171 }, /* BCHG */ +{ CPUFUNC(op_087b_4), 2171 }, /* BCHG */ { CPUFUNC(op_0880_0), 2176 }, /* BCLR */ { CPUFUNC(op_0890_0), 2192 }, /* BCLR */ { CPUFUNC(op_0898_0), 2200 }, /* BCLR */ { CPUFUNC(op_08a0_0), 2208 }, /* BCLR */ { CPUFUNC(op_08a8_0), 2216 }, /* BCLR */ -{ CPUFUNC(op_08b0_3), 2224 }, /* BCLR */ +{ CPUFUNC(op_08b0_4), 2224 }, /* BCLR */ { CPUFUNC(op_08b8_0), 2232 }, /* BCLR */ { CPUFUNC(op_08b9_0), 2233 }, /* BCLR */ { CPUFUNC(op_08ba_0), 2234 }, /* BCLR */ -{ CPUFUNC(op_08bb_3), 2235 }, /* BCLR */ +{ CPUFUNC(op_08bb_4), 2235 }, /* BCLR */ { CPUFUNC(op_08c0_0), 2240 }, /* BSET */ { CPUFUNC(op_08d0_0), 2256 }, /* BSET */ { CPUFUNC(op_08d8_0), 2264 }, /* BSET */ { CPUFUNC(op_08e0_0), 2272 }, /* BSET */ { CPUFUNC(op_08e8_0), 2280 }, /* BSET */ -{ CPUFUNC(op_08f0_3), 2288 }, /* BSET */ +{ CPUFUNC(op_08f0_4), 2288 }, /* BSET */ { CPUFUNC(op_08f8_0), 2296 }, /* BSET */ { CPUFUNC(op_08f9_0), 2297 }, /* BSET */ { CPUFUNC(op_08fa_0), 2298 }, /* BSET */ -{ CPUFUNC(op_08fb_3), 2299 }, /* BSET */ +{ CPUFUNC(op_08fb_4), 2299 }, /* BSET */ { CPUFUNC(op_0a00_0), 2560 }, /* EOR */ { CPUFUNC(op_0a10_0), 2576 }, /* EOR */ { CPUFUNC(op_0a18_0), 2584 }, /* EOR */ { CPUFUNC(op_0a20_0), 2592 }, /* EOR */ { CPUFUNC(op_0a28_0), 2600 }, /* EOR */ -{ CPUFUNC(op_0a30_3), 2608 }, /* EOR */ +{ CPUFUNC(op_0a30_4), 2608 }, /* EOR */ { CPUFUNC(op_0a38_0), 2616 }, /* EOR */ { CPUFUNC(op_0a39_0), 2617 }, /* EOR */ { CPUFUNC(op_0a3c_0), 2620 }, /* EORSR */ @@ -7913,7 +8351,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_0a58_0), 2648 }, /* EOR */ { CPUFUNC(op_0a60_0), 2656 }, /* EOR */ { CPUFUNC(op_0a68_0), 2664 }, /* EOR */ -{ CPUFUNC(op_0a70_3), 2672 }, /* EOR */ +{ CPUFUNC(op_0a70_4), 2672 }, /* EOR */ { CPUFUNC(op_0a78_0), 2680 }, /* EOR */ { CPUFUNC(op_0a79_0), 2681 }, /* EOR */ { CPUFUNC(op_0a7c_0), 2684 }, /* EORSR */ @@ -7922,7 +8360,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_0a98_0), 2712 }, /* EOR */ { CPUFUNC(op_0aa0_0), 2720 }, /* EOR */ { CPUFUNC(op_0aa8_0), 2728 }, /* EOR */ -{ CPUFUNC(op_0ab0_3), 2736 }, /* EOR */ +{ CPUFUNC(op_0ab0_4), 2736 }, /* EOR */ { CPUFUNC(op_0ab8_0), 2744 }, /* EOR */ { CPUFUNC(op_0ab9_0), 2745 }, /* EOR */ { CPUFUNC(op_0c00_0), 3072 }, /* CMP */ @@ -7930,7 +8368,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_0c18_0), 3096 }, /* CMP */ { CPUFUNC(op_0c20_0), 3104 }, /* CMP */ { CPUFUNC(op_0c28_0), 3112 }, /* CMP */ -{ CPUFUNC(op_0c30_3), 3120 }, /* CMP */ +{ CPUFUNC(op_0c30_4), 3120 }, /* CMP */ { CPUFUNC(op_0c38_0), 3128 }, /* CMP */ { CPUFUNC(op_0c39_0), 3129 }, /* CMP */ { CPUFUNC(op_0c40_0), 3136 }, /* CMP */ @@ -7938,7 +8376,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_0c58_0), 3160 }, /* CMP */ { CPUFUNC(op_0c60_0), 3168 }, /* CMP */ { CPUFUNC(op_0c68_0), 3176 }, /* CMP */ -{ CPUFUNC(op_0c70_3), 3184 }, /* CMP */ +{ CPUFUNC(op_0c70_4), 3184 }, /* CMP */ { CPUFUNC(op_0c78_0), 3192 }, /* CMP */ { CPUFUNC(op_0c79_0), 3193 }, /* CMP */ { CPUFUNC(op_0c80_0), 3200 }, /* CMP */ @@ -7946,7 +8384,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_0c98_0), 3224 }, /* CMP */ { CPUFUNC(op_0ca0_0), 3232 }, /* CMP */ { CPUFUNC(op_0ca8_0), 3240 }, /* CMP */ -{ CPUFUNC(op_0cb0_3), 3248 }, /* CMP */ +{ CPUFUNC(op_0cb0_4), 3248 }, /* CMP */ { CPUFUNC(op_0cb8_0), 3256 }, /* CMP */ { CPUFUNC(op_0cb9_0), 3257 }, /* CMP */ { CPUFUNC(op_1000_0), 4096 }, /* MOVE */ @@ -7954,88 +8392,88 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_1018_0), 4120 }, /* MOVE */ { CPUFUNC(op_1020_0), 4128 }, /* MOVE */ { CPUFUNC(op_1028_0), 4136 }, /* MOVE */ -{ CPUFUNC(op_1030_3), 4144 }, /* MOVE */ +{ CPUFUNC(op_1030_4), 4144 }, /* MOVE */ { CPUFUNC(op_1038_0), 4152 }, /* MOVE */ { CPUFUNC(op_1039_0), 4153 }, /* MOVE */ { CPUFUNC(op_103a_0), 4154 }, /* MOVE */ -{ CPUFUNC(op_103b_3), 4155 }, /* MOVE */ +{ CPUFUNC(op_103b_4), 4155 }, /* MOVE */ { CPUFUNC(op_103c_0), 4156 }, /* MOVE */ { CPUFUNC(op_1080_0), 4224 }, /* MOVE */ { CPUFUNC(op_1090_0), 4240 }, /* MOVE */ { CPUFUNC(op_1098_0), 4248 }, /* MOVE */ { CPUFUNC(op_10a0_0), 4256 }, /* MOVE */ { CPUFUNC(op_10a8_0), 4264 }, /* MOVE */ -{ CPUFUNC(op_10b0_3), 4272 }, /* MOVE */ +{ CPUFUNC(op_10b0_4), 4272 }, /* MOVE */ { CPUFUNC(op_10b8_0), 4280 }, /* MOVE */ { CPUFUNC(op_10b9_0), 4281 }, /* MOVE */ { CPUFUNC(op_10ba_0), 4282 }, /* MOVE */ -{ CPUFUNC(op_10bb_3), 4283 }, /* MOVE */ +{ CPUFUNC(op_10bb_4), 4283 }, /* MOVE */ { CPUFUNC(op_10bc_0), 4284 }, /* MOVE */ { CPUFUNC(op_10c0_0), 4288 }, /* MOVE */ { CPUFUNC(op_10d0_0), 4304 }, /* MOVE */ { CPUFUNC(op_10d8_0), 4312 }, /* MOVE */ { CPUFUNC(op_10e0_0), 4320 }, /* MOVE */ { CPUFUNC(op_10e8_0), 4328 }, /* MOVE */ -{ CPUFUNC(op_10f0_3), 4336 }, /* MOVE */ +{ CPUFUNC(op_10f0_4), 4336 }, /* MOVE */ { CPUFUNC(op_10f8_0), 4344 }, /* MOVE */ { CPUFUNC(op_10f9_0), 4345 }, /* MOVE */ { CPUFUNC(op_10fa_0), 4346 }, /* MOVE */ -{ CPUFUNC(op_10fb_3), 4347 }, /* MOVE */ +{ CPUFUNC(op_10fb_4), 4347 }, /* MOVE */ { CPUFUNC(op_10fc_0), 4348 }, /* MOVE */ { CPUFUNC(op_1100_0), 4352 }, /* MOVE */ { CPUFUNC(op_1110_0), 4368 }, /* MOVE */ { CPUFUNC(op_1118_0), 4376 }, /* MOVE */ { CPUFUNC(op_1120_0), 4384 }, /* MOVE */ { CPUFUNC(op_1128_0), 4392 }, /* MOVE */ -{ CPUFUNC(op_1130_3), 4400 }, /* MOVE */ +{ CPUFUNC(op_1130_4), 4400 }, /* MOVE */ { CPUFUNC(op_1138_0), 4408 }, /* MOVE */ { CPUFUNC(op_1139_0), 4409 }, /* MOVE */ { CPUFUNC(op_113a_0), 4410 }, /* MOVE */ -{ CPUFUNC(op_113b_3), 4411 }, /* MOVE */ +{ CPUFUNC(op_113b_4), 4411 }, /* MOVE */ { CPUFUNC(op_113c_0), 4412 }, /* MOVE */ { CPUFUNC(op_1140_0), 4416 }, /* MOVE */ { CPUFUNC(op_1150_0), 4432 }, /* MOVE */ { CPUFUNC(op_1158_0), 4440 }, /* MOVE */ { CPUFUNC(op_1160_0), 4448 }, /* MOVE */ { CPUFUNC(op_1168_0), 4456 }, /* MOVE */ -{ CPUFUNC(op_1170_3), 4464 }, /* MOVE */ +{ CPUFUNC(op_1170_4), 4464 }, /* MOVE */ { CPUFUNC(op_1178_0), 4472 }, /* MOVE */ { CPUFUNC(op_1179_0), 4473 }, /* MOVE */ { CPUFUNC(op_117a_0), 4474 }, /* MOVE */ -{ CPUFUNC(op_117b_3), 4475 }, /* MOVE */ +{ CPUFUNC(op_117b_4), 4475 }, /* MOVE */ { CPUFUNC(op_117c_0), 4476 }, /* MOVE */ -{ CPUFUNC(op_1180_3), 4480 }, /* MOVE */ -{ CPUFUNC(op_1190_3), 4496 }, /* MOVE */ -{ CPUFUNC(op_1198_3), 4504 }, /* MOVE */ -{ CPUFUNC(op_11a0_3), 4512 }, /* MOVE */ -{ CPUFUNC(op_11a8_3), 4520 }, /* MOVE */ -{ CPUFUNC(op_11b0_3), 4528 }, /* MOVE */ -{ CPUFUNC(op_11b8_3), 4536 }, /* MOVE */ -{ CPUFUNC(op_11b9_3), 4537 }, /* MOVE */ -{ CPUFUNC(op_11ba_3), 4538 }, /* MOVE */ -{ CPUFUNC(op_11bb_3), 4539 }, /* MOVE */ -{ CPUFUNC(op_11bc_3), 4540 }, /* MOVE */ +{ CPUFUNC(op_1180_4), 4480 }, /* MOVE */ +{ CPUFUNC(op_1190_4), 4496 }, /* MOVE */ +{ CPUFUNC(op_1198_4), 4504 }, /* MOVE */ +{ CPUFUNC(op_11a0_4), 4512 }, /* MOVE */ +{ CPUFUNC(op_11a8_4), 4520 }, /* MOVE */ +{ CPUFUNC(op_11b0_4), 4528 }, /* MOVE */ +{ CPUFUNC(op_11b8_4), 4536 }, /* MOVE */ +{ CPUFUNC(op_11b9_4), 4537 }, /* MOVE */ +{ CPUFUNC(op_11ba_4), 4538 }, /* MOVE */ +{ CPUFUNC(op_11bb_4), 4539 }, /* MOVE */ +{ CPUFUNC(op_11bc_4), 4540 }, /* MOVE */ { CPUFUNC(op_11c0_0), 4544 }, /* MOVE */ { CPUFUNC(op_11d0_0), 4560 }, /* MOVE */ { CPUFUNC(op_11d8_0), 4568 }, /* MOVE */ { CPUFUNC(op_11e0_0), 4576 }, /* MOVE */ { CPUFUNC(op_11e8_0), 4584 }, /* MOVE */ -{ CPUFUNC(op_11f0_3), 4592 }, /* MOVE */ +{ CPUFUNC(op_11f0_4), 4592 }, /* MOVE */ { CPUFUNC(op_11f8_0), 4600 }, /* MOVE */ { CPUFUNC(op_11f9_0), 4601 }, /* MOVE */ { CPUFUNC(op_11fa_0), 4602 }, /* MOVE */ -{ CPUFUNC(op_11fb_3), 4603 }, /* MOVE */ +{ CPUFUNC(op_11fb_4), 4603 }, /* MOVE */ { CPUFUNC(op_11fc_0), 4604 }, /* MOVE */ { CPUFUNC(op_13c0_0), 5056 }, /* MOVE */ { CPUFUNC(op_13d0_0), 5072 }, /* MOVE */ { CPUFUNC(op_13d8_0), 5080 }, /* MOVE */ { CPUFUNC(op_13e0_0), 5088 }, /* MOVE */ { CPUFUNC(op_13e8_0), 5096 }, /* MOVE */ -{ CPUFUNC(op_13f0_3), 5104 }, /* MOVE */ +{ CPUFUNC(op_13f0_4), 5104 }, /* MOVE */ { CPUFUNC(op_13f8_0), 5112 }, /* MOVE */ { CPUFUNC(op_13f9_0), 5113 }, /* MOVE */ { CPUFUNC(op_13fa_0), 5114 }, /* MOVE */ -{ CPUFUNC(op_13fb_3), 5115 }, /* MOVE */ +{ CPUFUNC(op_13fb_4), 5115 }, /* MOVE */ { CPUFUNC(op_13fc_0), 5116 }, /* MOVE */ { CPUFUNC(op_2000_0), 8192 }, /* MOVE */ { CPUFUNC(op_2008_0), 8200 }, /* MOVE */ @@ -8043,11 +8481,11 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_2018_0), 8216 }, /* MOVE */ { CPUFUNC(op_2020_0), 8224 }, /* MOVE */ { CPUFUNC(op_2028_0), 8232 }, /* MOVE */ -{ CPUFUNC(op_2030_3), 8240 }, /* MOVE */ +{ CPUFUNC(op_2030_4), 8240 }, /* MOVE */ { CPUFUNC(op_2038_0), 8248 }, /* MOVE */ { CPUFUNC(op_2039_0), 8249 }, /* MOVE */ { CPUFUNC(op_203a_0), 8250 }, /* MOVE */ -{ CPUFUNC(op_203b_3), 8251 }, /* MOVE */ +{ CPUFUNC(op_203b_4), 8251 }, /* MOVE */ { CPUFUNC(op_203c_0), 8252 }, /* MOVE */ { CPUFUNC(op_2040_0), 8256 }, /* MOVEA */ { CPUFUNC(op_2048_0), 8264 }, /* MOVEA */ @@ -8055,11 +8493,11 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_2058_0), 8280 }, /* MOVEA */ { CPUFUNC(op_2060_0), 8288 }, /* MOVEA */ { CPUFUNC(op_2068_0), 8296 }, /* MOVEA */ -{ CPUFUNC(op_2070_3), 8304 }, /* MOVEA */ +{ CPUFUNC(op_2070_4), 8304 }, /* MOVEA */ { CPUFUNC(op_2078_0), 8312 }, /* MOVEA */ { CPUFUNC(op_2079_0), 8313 }, /* MOVEA */ { CPUFUNC(op_207a_0), 8314 }, /* MOVEA */ -{ CPUFUNC(op_207b_3), 8315 }, /* MOVEA */ +{ CPUFUNC(op_207b_4), 8315 }, /* MOVEA */ { CPUFUNC(op_207c_0), 8316 }, /* MOVEA */ { CPUFUNC(op_2080_0), 8320 }, /* MOVE */ { CPUFUNC(op_2088_0), 8328 }, /* MOVE */ @@ -8067,11 +8505,11 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_2098_0), 8344 }, /* MOVE */ { CPUFUNC(op_20a0_0), 8352 }, /* MOVE */ { CPUFUNC(op_20a8_0), 8360 }, /* MOVE */ -{ CPUFUNC(op_20b0_3), 8368 }, /* MOVE */ +{ CPUFUNC(op_20b0_4), 8368 }, /* MOVE */ { CPUFUNC(op_20b8_0), 8376 }, /* MOVE */ { CPUFUNC(op_20b9_0), 8377 }, /* MOVE */ { CPUFUNC(op_20ba_0), 8378 }, /* MOVE */ -{ CPUFUNC(op_20bb_3), 8379 }, /* MOVE */ +{ CPUFUNC(op_20bb_4), 8379 }, /* MOVE */ { CPUFUNC(op_20bc_0), 8380 }, /* MOVE */ { CPUFUNC(op_20c0_0), 8384 }, /* MOVE */ { CPUFUNC(op_20c8_0), 8392 }, /* MOVE */ @@ -8079,11 +8517,11 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_20d8_0), 8408 }, /* MOVE */ { CPUFUNC(op_20e0_0), 8416 }, /* MOVE */ { CPUFUNC(op_20e8_0), 8424 }, /* MOVE */ -{ CPUFUNC(op_20f0_3), 8432 }, /* MOVE */ +{ CPUFUNC(op_20f0_4), 8432 }, /* MOVE */ { CPUFUNC(op_20f8_0), 8440 }, /* MOVE */ { CPUFUNC(op_20f9_0), 8441 }, /* MOVE */ { CPUFUNC(op_20fa_0), 8442 }, /* MOVE */ -{ CPUFUNC(op_20fb_3), 8443 }, /* MOVE */ +{ CPUFUNC(op_20fb_4), 8443 }, /* MOVE */ { CPUFUNC(op_20fc_0), 8444 }, /* MOVE */ { CPUFUNC(op_2100_0), 8448 }, /* MOVE */ { CPUFUNC(op_2108_0), 8456 }, /* MOVE */ @@ -8091,11 +8529,11 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_2118_0), 8472 }, /* MOVE */ { CPUFUNC(op_2120_0), 8480 }, /* MOVE */ { CPUFUNC(op_2128_0), 8488 }, /* MOVE */ -{ CPUFUNC(op_2130_3), 8496 }, /* MOVE */ +{ CPUFUNC(op_2130_4), 8496 }, /* MOVE */ { CPUFUNC(op_2138_0), 8504 }, /* MOVE */ { CPUFUNC(op_2139_0), 8505 }, /* MOVE */ { CPUFUNC(op_213a_0), 8506 }, /* MOVE */ -{ CPUFUNC(op_213b_3), 8507 }, /* MOVE */ +{ CPUFUNC(op_213b_4), 8507 }, /* MOVE */ { CPUFUNC(op_213c_0), 8508 }, /* MOVE */ { CPUFUNC(op_2140_0), 8512 }, /* MOVE */ { CPUFUNC(op_2148_0), 8520 }, /* MOVE */ @@ -8103,35 +8541,35 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_2158_0), 8536 }, /* MOVE */ { CPUFUNC(op_2160_0), 8544 }, /* MOVE */ { CPUFUNC(op_2168_0), 8552 }, /* MOVE */ -{ CPUFUNC(op_2170_3), 8560 }, /* MOVE */ +{ CPUFUNC(op_2170_4), 8560 }, /* MOVE */ { CPUFUNC(op_2178_0), 8568 }, /* MOVE */ { CPUFUNC(op_2179_0), 8569 }, /* MOVE */ { CPUFUNC(op_217a_0), 8570 }, /* MOVE */ -{ CPUFUNC(op_217b_3), 8571 }, /* MOVE */ +{ CPUFUNC(op_217b_4), 8571 }, /* MOVE */ { CPUFUNC(op_217c_0), 8572 }, /* MOVE */ -{ CPUFUNC(op_2180_3), 8576 }, /* MOVE */ -{ CPUFUNC(op_2188_3), 8584 }, /* MOVE */ -{ CPUFUNC(op_2190_3), 8592 }, /* MOVE */ -{ CPUFUNC(op_2198_3), 8600 }, /* MOVE */ -{ CPUFUNC(op_21a0_3), 8608 }, /* MOVE */ -{ CPUFUNC(op_21a8_3), 8616 }, /* MOVE */ -{ CPUFUNC(op_21b0_3), 8624 }, /* MOVE */ -{ CPUFUNC(op_21b8_3), 8632 }, /* MOVE */ -{ CPUFUNC(op_21b9_3), 8633 }, /* MOVE */ -{ CPUFUNC(op_21ba_3), 8634 }, /* MOVE */ -{ CPUFUNC(op_21bb_3), 8635 }, /* MOVE */ -{ CPUFUNC(op_21bc_3), 8636 }, /* MOVE */ +{ CPUFUNC(op_2180_4), 8576 }, /* MOVE */ +{ CPUFUNC(op_2188_4), 8584 }, /* MOVE */ +{ CPUFUNC(op_2190_4), 8592 }, /* MOVE */ +{ CPUFUNC(op_2198_4), 8600 }, /* MOVE */ +{ CPUFUNC(op_21a0_4), 8608 }, /* MOVE */ +{ CPUFUNC(op_21a8_4), 8616 }, /* MOVE */ +{ CPUFUNC(op_21b0_4), 8624 }, /* MOVE */ +{ CPUFUNC(op_21b8_4), 8632 }, /* MOVE */ +{ CPUFUNC(op_21b9_4), 8633 }, /* MOVE */ +{ CPUFUNC(op_21ba_4), 8634 }, /* MOVE */ +{ CPUFUNC(op_21bb_4), 8635 }, /* MOVE */ +{ CPUFUNC(op_21bc_4), 8636 }, /* MOVE */ { CPUFUNC(op_21c0_0), 8640 }, /* MOVE */ { CPUFUNC(op_21c8_0), 8648 }, /* MOVE */ { CPUFUNC(op_21d0_0), 8656 }, /* MOVE */ { CPUFUNC(op_21d8_0), 8664 }, /* MOVE */ { CPUFUNC(op_21e0_0), 8672 }, /* MOVE */ { CPUFUNC(op_21e8_0), 8680 }, /* MOVE */ -{ CPUFUNC(op_21f0_3), 8688 }, /* MOVE */ +{ CPUFUNC(op_21f0_4), 8688 }, /* MOVE */ { CPUFUNC(op_21f8_0), 8696 }, /* MOVE */ { CPUFUNC(op_21f9_0), 8697 }, /* MOVE */ { CPUFUNC(op_21fa_0), 8698 }, /* MOVE */ -{ CPUFUNC(op_21fb_3), 8699 }, /* MOVE */ +{ CPUFUNC(op_21fb_4), 8699 }, /* MOVE */ { CPUFUNC(op_21fc_0), 8700 }, /* MOVE */ { CPUFUNC(op_23c0_0), 9152 }, /* MOVE */ { CPUFUNC(op_23c8_0), 9160 }, /* MOVE */ @@ -8139,11 +8577,11 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_23d8_0), 9176 }, /* MOVE */ { CPUFUNC(op_23e0_0), 9184 }, /* MOVE */ { CPUFUNC(op_23e8_0), 9192 }, /* MOVE */ -{ CPUFUNC(op_23f0_3), 9200 }, /* MOVE */ +{ CPUFUNC(op_23f0_4), 9200 }, /* MOVE */ { CPUFUNC(op_23f8_0), 9208 }, /* MOVE */ { CPUFUNC(op_23f9_0), 9209 }, /* MOVE */ { CPUFUNC(op_23fa_0), 9210 }, /* MOVE */ -{ CPUFUNC(op_23fb_3), 9211 }, /* MOVE */ +{ CPUFUNC(op_23fb_4), 9211 }, /* MOVE */ { CPUFUNC(op_23fc_0), 9212 }, /* MOVE */ { CPUFUNC(op_3000_0), 12288 }, /* MOVE */ { CPUFUNC(op_3008_0), 12296 }, /* MOVE */ @@ -8151,11 +8589,11 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_3018_0), 12312 }, /* MOVE */ { CPUFUNC(op_3020_0), 12320 }, /* MOVE */ { CPUFUNC(op_3028_0), 12328 }, /* MOVE */ -{ CPUFUNC(op_3030_3), 12336 }, /* MOVE */ +{ CPUFUNC(op_3030_4), 12336 }, /* MOVE */ { CPUFUNC(op_3038_0), 12344 }, /* MOVE */ { CPUFUNC(op_3039_0), 12345 }, /* MOVE */ { CPUFUNC(op_303a_0), 12346 }, /* MOVE */ -{ CPUFUNC(op_303b_3), 12347 }, /* MOVE */ +{ CPUFUNC(op_303b_4), 12347 }, /* MOVE */ { CPUFUNC(op_303c_0), 12348 }, /* MOVE */ { CPUFUNC(op_3040_0), 12352 }, /* MOVEA */ { CPUFUNC(op_3048_0), 12360 }, /* MOVEA */ @@ -8163,11 +8601,11 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_3058_0), 12376 }, /* MOVEA */ { CPUFUNC(op_3060_0), 12384 }, /* MOVEA */ { CPUFUNC(op_3068_0), 12392 }, /* MOVEA */ -{ CPUFUNC(op_3070_3), 12400 }, /* MOVEA */ +{ CPUFUNC(op_3070_4), 12400 }, /* MOVEA */ { CPUFUNC(op_3078_0), 12408 }, /* MOVEA */ { CPUFUNC(op_3079_0), 12409 }, /* MOVEA */ { CPUFUNC(op_307a_0), 12410 }, /* MOVEA */ -{ CPUFUNC(op_307b_3), 12411 }, /* MOVEA */ +{ CPUFUNC(op_307b_4), 12411 }, /* MOVEA */ { CPUFUNC(op_307c_0), 12412 }, /* MOVEA */ { CPUFUNC(op_3080_0), 12416 }, /* MOVE */ { CPUFUNC(op_3088_0), 12424 }, /* MOVE */ @@ -8175,11 +8613,11 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_3098_0), 12440 }, /* MOVE */ { CPUFUNC(op_30a0_0), 12448 }, /* MOVE */ { CPUFUNC(op_30a8_0), 12456 }, /* MOVE */ -{ CPUFUNC(op_30b0_3), 12464 }, /* MOVE */ +{ CPUFUNC(op_30b0_4), 12464 }, /* MOVE */ { CPUFUNC(op_30b8_0), 12472 }, /* MOVE */ { CPUFUNC(op_30b9_0), 12473 }, /* MOVE */ { CPUFUNC(op_30ba_0), 12474 }, /* MOVE */ -{ CPUFUNC(op_30bb_3), 12475 }, /* MOVE */ +{ CPUFUNC(op_30bb_4), 12475 }, /* MOVE */ { CPUFUNC(op_30bc_0), 12476 }, /* MOVE */ { CPUFUNC(op_30c0_0), 12480 }, /* MOVE */ { CPUFUNC(op_30c8_0), 12488 }, /* MOVE */ @@ -8187,11 +8625,11 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_30d8_0), 12504 }, /* MOVE */ { CPUFUNC(op_30e0_0), 12512 }, /* MOVE */ { CPUFUNC(op_30e8_0), 12520 }, /* MOVE */ -{ CPUFUNC(op_30f0_3), 12528 }, /* MOVE */ +{ CPUFUNC(op_30f0_4), 12528 }, /* MOVE */ { CPUFUNC(op_30f8_0), 12536 }, /* MOVE */ { CPUFUNC(op_30f9_0), 12537 }, /* MOVE */ { CPUFUNC(op_30fa_0), 12538 }, /* MOVE */ -{ CPUFUNC(op_30fb_3), 12539 }, /* MOVE */ +{ CPUFUNC(op_30fb_4), 12539 }, /* MOVE */ { CPUFUNC(op_30fc_0), 12540 }, /* MOVE */ { CPUFUNC(op_3100_0), 12544 }, /* MOVE */ { CPUFUNC(op_3108_0), 12552 }, /* MOVE */ @@ -8199,11 +8637,11 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_3118_0), 12568 }, /* MOVE */ { CPUFUNC(op_3120_0), 12576 }, /* MOVE */ { CPUFUNC(op_3128_0), 12584 }, /* MOVE */ -{ CPUFUNC(op_3130_3), 12592 }, /* MOVE */ +{ CPUFUNC(op_3130_4), 12592 }, /* MOVE */ { CPUFUNC(op_3138_0), 12600 }, /* MOVE */ { CPUFUNC(op_3139_0), 12601 }, /* MOVE */ { CPUFUNC(op_313a_0), 12602 }, /* MOVE */ -{ CPUFUNC(op_313b_3), 12603 }, /* MOVE */ +{ CPUFUNC(op_313b_4), 12603 }, /* MOVE */ { CPUFUNC(op_313c_0), 12604 }, /* MOVE */ { CPUFUNC(op_3140_0), 12608 }, /* MOVE */ { CPUFUNC(op_3148_0), 12616 }, /* MOVE */ @@ -8211,35 +8649,35 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_3158_0), 12632 }, /* MOVE */ { CPUFUNC(op_3160_0), 12640 }, /* MOVE */ { CPUFUNC(op_3168_0), 12648 }, /* MOVE */ -{ CPUFUNC(op_3170_3), 12656 }, /* MOVE */ +{ CPUFUNC(op_3170_4), 12656 }, /* MOVE */ { CPUFUNC(op_3178_0), 12664 }, /* MOVE */ { CPUFUNC(op_3179_0), 12665 }, /* MOVE */ { CPUFUNC(op_317a_0), 12666 }, /* MOVE */ -{ CPUFUNC(op_317b_3), 12667 }, /* MOVE */ +{ CPUFUNC(op_317b_4), 12667 }, /* MOVE */ { CPUFUNC(op_317c_0), 12668 }, /* MOVE */ -{ CPUFUNC(op_3180_3), 12672 }, /* MOVE */ -{ CPUFUNC(op_3188_3), 12680 }, /* MOVE */ -{ CPUFUNC(op_3190_3), 12688 }, /* MOVE */ -{ CPUFUNC(op_3198_3), 12696 }, /* MOVE */ -{ CPUFUNC(op_31a0_3), 12704 }, /* MOVE */ -{ CPUFUNC(op_31a8_3), 12712 }, /* MOVE */ -{ CPUFUNC(op_31b0_3), 12720 }, /* MOVE */ -{ CPUFUNC(op_31b8_3), 12728 }, /* MOVE */ -{ CPUFUNC(op_31b9_3), 12729 }, /* MOVE */ -{ CPUFUNC(op_31ba_3), 12730 }, /* MOVE */ -{ CPUFUNC(op_31bb_3), 12731 }, /* MOVE */ -{ CPUFUNC(op_31bc_3), 12732 }, /* MOVE */ +{ CPUFUNC(op_3180_4), 12672 }, /* MOVE */ +{ CPUFUNC(op_3188_4), 12680 }, /* MOVE */ +{ CPUFUNC(op_3190_4), 12688 }, /* MOVE */ +{ CPUFUNC(op_3198_4), 12696 }, /* MOVE */ +{ CPUFUNC(op_31a0_4), 12704 }, /* MOVE */ +{ CPUFUNC(op_31a8_4), 12712 }, /* MOVE */ +{ CPUFUNC(op_31b0_4), 12720 }, /* MOVE */ +{ CPUFUNC(op_31b8_4), 12728 }, /* MOVE */ +{ CPUFUNC(op_31b9_4), 12729 }, /* MOVE */ +{ CPUFUNC(op_31ba_4), 12730 }, /* MOVE */ +{ CPUFUNC(op_31bb_4), 12731 }, /* MOVE */ +{ CPUFUNC(op_31bc_4), 12732 }, /* MOVE */ { CPUFUNC(op_31c0_0), 12736 }, /* MOVE */ { CPUFUNC(op_31c8_0), 12744 }, /* MOVE */ { CPUFUNC(op_31d0_0), 12752 }, /* MOVE */ { CPUFUNC(op_31d8_0), 12760 }, /* MOVE */ { CPUFUNC(op_31e0_0), 12768 }, /* MOVE */ { CPUFUNC(op_31e8_0), 12776 }, /* MOVE */ -{ CPUFUNC(op_31f0_3), 12784 }, /* MOVE */ +{ CPUFUNC(op_31f0_4), 12784 }, /* MOVE */ { CPUFUNC(op_31f8_0), 12792 }, /* MOVE */ { CPUFUNC(op_31f9_0), 12793 }, /* MOVE */ { CPUFUNC(op_31fa_0), 12794 }, /* MOVE */ -{ CPUFUNC(op_31fb_3), 12795 }, /* MOVE */ +{ CPUFUNC(op_31fb_4), 12795 }, /* MOVE */ { CPUFUNC(op_31fc_0), 12796 }, /* MOVE */ { CPUFUNC(op_33c0_0), 13248 }, /* MOVE */ { CPUFUNC(op_33c8_0), 13256 }, /* MOVE */ @@ -8247,18 +8685,18 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_33d8_0), 13272 }, /* MOVE */ { CPUFUNC(op_33e0_0), 13280 }, /* MOVE */ { CPUFUNC(op_33e8_0), 13288 }, /* MOVE */ -{ CPUFUNC(op_33f0_3), 13296 }, /* MOVE */ +{ CPUFUNC(op_33f0_4), 13296 }, /* MOVE */ { CPUFUNC(op_33f8_0), 13304 }, /* MOVE */ { CPUFUNC(op_33f9_0), 13305 }, /* MOVE */ { CPUFUNC(op_33fa_0), 13306 }, /* MOVE */ -{ CPUFUNC(op_33fb_3), 13307 }, /* MOVE */ +{ CPUFUNC(op_33fb_4), 13307 }, /* MOVE */ { CPUFUNC(op_33fc_0), 13308 }, /* MOVE */ { CPUFUNC(op_4000_0), 16384 }, /* NEGX */ { CPUFUNC(op_4010_0), 16400 }, /* NEGX */ { CPUFUNC(op_4018_0), 16408 }, /* NEGX */ { CPUFUNC(op_4020_0), 16416 }, /* NEGX */ { CPUFUNC(op_4028_0), 16424 }, /* NEGX */ -{ CPUFUNC(op_4030_3), 16432 }, /* NEGX */ +{ CPUFUNC(op_4030_4), 16432 }, /* NEGX */ { CPUFUNC(op_4038_0), 16440 }, /* NEGX */ { CPUFUNC(op_4039_0), 16441 }, /* NEGX */ { CPUFUNC(op_4040_0), 16448 }, /* NEGX */ @@ -8266,7 +8704,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_4058_0), 16472 }, /* NEGX */ { CPUFUNC(op_4060_0), 16480 }, /* NEGX */ { CPUFUNC(op_4068_0), 16488 }, /* NEGX */ -{ CPUFUNC(op_4070_3), 16496 }, /* NEGX */ +{ CPUFUNC(op_4070_4), 16496 }, /* NEGX */ { CPUFUNC(op_4078_0), 16504 }, /* NEGX */ { CPUFUNC(op_4079_0), 16505 }, /* NEGX */ { CPUFUNC(op_4080_0), 16512 }, /* NEGX */ @@ -8274,52 +8712,52 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_4098_0), 16536 }, /* NEGX */ { CPUFUNC(op_40a0_0), 16544 }, /* NEGX */ { CPUFUNC(op_40a8_0), 16552 }, /* NEGX */ -{ CPUFUNC(op_40b0_3), 16560 }, /* NEGX */ +{ CPUFUNC(op_40b0_4), 16560 }, /* NEGX */ { CPUFUNC(op_40b8_0), 16568 }, /* NEGX */ { CPUFUNC(op_40b9_0), 16569 }, /* NEGX */ -{ CPUFUNC(op_40c0_4), 16576 }, /* MVSR2 */ -{ CPUFUNC(op_40d0_4), 16592 }, /* MVSR2 */ -{ CPUFUNC(op_40d8_4), 16600 }, /* MVSR2 */ -{ CPUFUNC(op_40e0_4), 16608 }, /* MVSR2 */ -{ CPUFUNC(op_40e8_4), 16616 }, /* MVSR2 */ +{ CPUFUNC(op_40c0_0), 16576 }, /* MVSR2 */ +{ CPUFUNC(op_40d0_0), 16592 }, /* MVSR2 */ +{ CPUFUNC(op_40d8_0), 16600 }, /* MVSR2 */ +{ CPUFUNC(op_40e0_0), 16608 }, /* MVSR2 */ +{ CPUFUNC(op_40e8_0), 16616 }, /* MVSR2 */ { CPUFUNC(op_40f0_4), 16624 }, /* MVSR2 */ -{ CPUFUNC(op_40f8_4), 16632 }, /* MVSR2 */ -{ CPUFUNC(op_40f9_4), 16633 }, /* MVSR2 */ +{ CPUFUNC(op_40f8_0), 16632 }, /* MVSR2 */ +{ CPUFUNC(op_40f9_0), 16633 }, /* MVSR2 */ { CPUFUNC(op_4100_0), 16640 }, /* CHK */ { CPUFUNC(op_4110_0), 16656 }, /* CHK */ { CPUFUNC(op_4118_0), 16664 }, /* CHK */ { CPUFUNC(op_4120_0), 16672 }, /* CHK */ { CPUFUNC(op_4128_0), 16680 }, /* CHK */ -{ CPUFUNC(op_4130_3), 16688 }, /* CHK */ +{ CPUFUNC(op_4130_4), 16688 }, /* CHK */ { CPUFUNC(op_4138_0), 16696 }, /* CHK */ { CPUFUNC(op_4139_0), 16697 }, /* CHK */ { CPUFUNC(op_413a_0), 16698 }, /* CHK */ -{ CPUFUNC(op_413b_3), 16699 }, /* CHK */ +{ CPUFUNC(op_413b_4), 16699 }, /* CHK */ { CPUFUNC(op_413c_0), 16700 }, /* CHK */ { CPUFUNC(op_4180_0), 16768 }, /* CHK */ { CPUFUNC(op_4190_0), 16784 }, /* CHK */ { CPUFUNC(op_4198_0), 16792 }, /* CHK */ { CPUFUNC(op_41a0_0), 16800 }, /* CHK */ { CPUFUNC(op_41a8_0), 16808 }, /* CHK */ -{ CPUFUNC(op_41b0_3), 16816 }, /* CHK */ +{ CPUFUNC(op_41b0_4), 16816 }, /* CHK */ { CPUFUNC(op_41b8_0), 16824 }, /* CHK */ { CPUFUNC(op_41b9_0), 16825 }, /* CHK */ { CPUFUNC(op_41ba_0), 16826 }, /* CHK */ -{ CPUFUNC(op_41bb_3), 16827 }, /* CHK */ +{ CPUFUNC(op_41bb_4), 16827 }, /* CHK */ { CPUFUNC(op_41bc_0), 16828 }, /* CHK */ { CPUFUNC(op_41d0_0), 16848 }, /* LEA */ { CPUFUNC(op_41e8_0), 16872 }, /* LEA */ -{ CPUFUNC(op_41f0_3), 16880 }, /* LEA */ +{ CPUFUNC(op_41f0_4), 16880 }, /* LEA */ { CPUFUNC(op_41f8_0), 16888 }, /* LEA */ { CPUFUNC(op_41f9_0), 16889 }, /* LEA */ { CPUFUNC(op_41fa_0), 16890 }, /* LEA */ -{ CPUFUNC(op_41fb_3), 16891 }, /* LEA */ +{ CPUFUNC(op_41fb_4), 16891 }, /* LEA */ { CPUFUNC(op_4200_0), 16896 }, /* CLR */ { CPUFUNC(op_4210_0), 16912 }, /* CLR */ { CPUFUNC(op_4218_0), 16920 }, /* CLR */ { CPUFUNC(op_4220_0), 16928 }, /* CLR */ { CPUFUNC(op_4228_0), 16936 }, /* CLR */ -{ CPUFUNC(op_4230_3), 16944 }, /* CLR */ +{ CPUFUNC(op_4230_4), 16944 }, /* CLR */ { CPUFUNC(op_4238_0), 16952 }, /* CLR */ { CPUFUNC(op_4239_0), 16953 }, /* CLR */ { CPUFUNC(op_4240_0), 16960 }, /* CLR */ @@ -8327,7 +8765,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_4258_0), 16984 }, /* CLR */ { CPUFUNC(op_4260_0), 16992 }, /* CLR */ { CPUFUNC(op_4268_0), 17000 }, /* CLR */ -{ CPUFUNC(op_4270_3), 17008 }, /* CLR */ +{ CPUFUNC(op_4270_4), 17008 }, /* CLR */ { CPUFUNC(op_4278_0), 17016 }, /* CLR */ { CPUFUNC(op_4279_0), 17017 }, /* CLR */ { CPUFUNC(op_4280_0), 17024 }, /* CLR */ @@ -8335,15 +8773,25 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_4298_0), 17048 }, /* CLR */ { CPUFUNC(op_42a0_0), 17056 }, /* CLR */ { CPUFUNC(op_42a8_0), 17064 }, /* CLR */ -{ CPUFUNC(op_42b0_3), 17072 }, /* CLR */ +{ CPUFUNC(op_42b0_4), 17072 }, /* CLR */ { CPUFUNC(op_42b8_0), 17080 }, /* CLR */ { CPUFUNC(op_42b9_0), 17081 }, /* CLR */ +{ CPUFUNC(op_42c0_0), 17088 }, /* MVSR2 */ +{ CPUFUNC(op_42d0_0), 17104 }, /* MVSR2 */ +{ CPUFUNC(op_42d8_0), 17112 }, /* MVSR2 */ +{ CPUFUNC(op_42e0_0), 17120 }, /* MVSR2 */ +{ CPUFUNC(op_42e8_0), 17128 }, /* MVSR2 */ +#ifndef CPUEMU_68000_ONLY +{ CPUFUNC(op_42f0_4), 17136 }, /* MVSR2 */ +#endif +{ CPUFUNC(op_42f8_0), 17144 }, /* MVSR2 */ +{ CPUFUNC(op_42f9_0), 17145 }, /* MVSR2 */ { CPUFUNC(op_4400_0), 17408 }, /* NEG */ { CPUFUNC(op_4410_0), 17424 }, /* NEG */ { CPUFUNC(op_4418_0), 17432 }, /* NEG */ { CPUFUNC(op_4420_0), 17440 }, /* NEG */ { CPUFUNC(op_4428_0), 17448 }, /* NEG */ -{ CPUFUNC(op_4430_3), 17456 }, /* NEG */ +{ CPUFUNC(op_4430_4), 17456 }, /* NEG */ { CPUFUNC(op_4438_0), 17464 }, /* NEG */ { CPUFUNC(op_4439_0), 17465 }, /* NEG */ { CPUFUNC(op_4440_0), 17472 }, /* NEG */ @@ -8351,7 +8799,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_4458_0), 17496 }, /* NEG */ { CPUFUNC(op_4460_0), 17504 }, /* NEG */ { CPUFUNC(op_4468_0), 17512 }, /* NEG */ -{ CPUFUNC(op_4470_3), 17520 }, /* NEG */ +{ CPUFUNC(op_4470_4), 17520 }, /* NEG */ { CPUFUNC(op_4478_0), 17528 }, /* NEG */ { CPUFUNC(op_4479_0), 17529 }, /* NEG */ { CPUFUNC(op_4480_0), 17536 }, /* NEG */ @@ -8359,7 +8807,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_4498_0), 17560 }, /* NEG */ { CPUFUNC(op_44a0_0), 17568 }, /* NEG */ { CPUFUNC(op_44a8_0), 17576 }, /* NEG */ -{ CPUFUNC(op_44b0_3), 17584 }, /* NEG */ +{ CPUFUNC(op_44b0_4), 17584 }, /* NEG */ { CPUFUNC(op_44b8_0), 17592 }, /* NEG */ { CPUFUNC(op_44b9_0), 17593 }, /* NEG */ { CPUFUNC(op_44c0_0), 17600 }, /* MV2SR */ @@ -8367,18 +8815,18 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_44d8_0), 17624 }, /* MV2SR */ { CPUFUNC(op_44e0_0), 17632 }, /* MV2SR */ { CPUFUNC(op_44e8_0), 17640 }, /* MV2SR */ -{ CPUFUNC(op_44f0_3), 17648 }, /* MV2SR */ +{ CPUFUNC(op_44f0_4), 17648 }, /* MV2SR */ { CPUFUNC(op_44f8_0), 17656 }, /* MV2SR */ { CPUFUNC(op_44f9_0), 17657 }, /* MV2SR */ { CPUFUNC(op_44fa_0), 17658 }, /* MV2SR */ -{ CPUFUNC(op_44fb_3), 17659 }, /* MV2SR */ +{ CPUFUNC(op_44fb_4), 17659 }, /* MV2SR */ { CPUFUNC(op_44fc_0), 17660 }, /* MV2SR */ { CPUFUNC(op_4600_0), 17920 }, /* NOT */ { CPUFUNC(op_4610_0), 17936 }, /* NOT */ { CPUFUNC(op_4618_0), 17944 }, /* NOT */ { CPUFUNC(op_4620_0), 17952 }, /* NOT */ { CPUFUNC(op_4628_0), 17960 }, /* NOT */ -{ CPUFUNC(op_4630_3), 17968 }, /* NOT */ +{ CPUFUNC(op_4630_4), 17968 }, /* NOT */ { CPUFUNC(op_4638_0), 17976 }, /* NOT */ { CPUFUNC(op_4639_0), 17977 }, /* NOT */ { CPUFUNC(op_4640_0), 17984 }, /* NOT */ @@ -8386,7 +8834,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_4658_0), 18008 }, /* NOT */ { CPUFUNC(op_4660_0), 18016 }, /* NOT */ { CPUFUNC(op_4668_0), 18024 }, /* NOT */ -{ CPUFUNC(op_4670_3), 18032 }, /* NOT */ +{ CPUFUNC(op_4670_4), 18032 }, /* NOT */ { CPUFUNC(op_4678_0), 18040 }, /* NOT */ { CPUFUNC(op_4679_0), 18041 }, /* NOT */ { CPUFUNC(op_4680_0), 18048 }, /* NOT */ @@ -8394,7 +8842,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_4698_0), 18072 }, /* NOT */ { CPUFUNC(op_46a0_0), 18080 }, /* NOT */ { CPUFUNC(op_46a8_0), 18088 }, /* NOT */ -{ CPUFUNC(op_46b0_3), 18096 }, /* NOT */ +{ CPUFUNC(op_46b0_4), 18096 }, /* NOT */ { CPUFUNC(op_46b8_0), 18104 }, /* NOT */ { CPUFUNC(op_46b9_0), 18105 }, /* NOT */ { CPUFUNC(op_46c0_0), 18112 }, /* MV2SR */ @@ -8402,40 +8850,40 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_46d8_0), 18136 }, /* MV2SR */ { CPUFUNC(op_46e0_0), 18144 }, /* MV2SR */ { CPUFUNC(op_46e8_0), 18152 }, /* MV2SR */ -{ CPUFUNC(op_46f0_3), 18160 }, /* MV2SR */ +{ CPUFUNC(op_46f0_4), 18160 }, /* MV2SR */ { CPUFUNC(op_46f8_0), 18168 }, /* MV2SR */ { CPUFUNC(op_46f9_0), 18169 }, /* MV2SR */ { CPUFUNC(op_46fa_0), 18170 }, /* MV2SR */ -{ CPUFUNC(op_46fb_3), 18171 }, /* MV2SR */ +{ CPUFUNC(op_46fb_4), 18171 }, /* MV2SR */ { CPUFUNC(op_46fc_0), 18172 }, /* MV2SR */ -{ CPUFUNC(op_4800_0), 18432 }, /* NBCD */ -{ CPUFUNC(op_4810_0), 18448 }, /* NBCD */ -{ CPUFUNC(op_4818_0), 18456 }, /* NBCD */ -{ CPUFUNC(op_4820_0), 18464 }, /* NBCD */ -{ CPUFUNC(op_4828_0), 18472 }, /* NBCD */ -{ CPUFUNC(op_4830_3), 18480 }, /* NBCD */ -{ CPUFUNC(op_4838_0), 18488 }, /* NBCD */ -{ CPUFUNC(op_4839_0), 18489 }, /* NBCD */ +{ CPUFUNC(op_4800_2), 18432 }, /* NBCD */ +{ CPUFUNC(op_4810_2), 18448 }, /* NBCD */ +{ CPUFUNC(op_4818_2), 18456 }, /* NBCD */ +{ CPUFUNC(op_4820_2), 18464 }, /* NBCD */ +{ CPUFUNC(op_4828_2), 18472 }, /* NBCD */ +{ CPUFUNC(op_4830_4), 18480 }, /* NBCD */ +{ CPUFUNC(op_4838_2), 18488 }, /* NBCD */ +{ CPUFUNC(op_4839_2), 18489 }, /* NBCD */ { CPUFUNC(op_4840_0), 18496 }, /* SWAP */ { CPUFUNC(op_4850_0), 18512 }, /* PEA */ { CPUFUNC(op_4868_0), 18536 }, /* PEA */ -{ CPUFUNC(op_4870_3), 18544 }, /* PEA */ +{ CPUFUNC(op_4870_4), 18544 }, /* PEA */ { CPUFUNC(op_4878_0), 18552 }, /* PEA */ { CPUFUNC(op_4879_0), 18553 }, /* PEA */ { CPUFUNC(op_487a_0), 18554 }, /* PEA */ -{ CPUFUNC(op_487b_3), 18555 }, /* PEA */ +{ CPUFUNC(op_487b_4), 18555 }, /* PEA */ { CPUFUNC(op_4880_0), 18560 }, /* EXT */ { CPUFUNC(op_4890_0), 18576 }, /* MVMLE */ { CPUFUNC(op_48a0_0), 18592 }, /* MVMLE */ { CPUFUNC(op_48a8_0), 18600 }, /* MVMLE */ -{ CPUFUNC(op_48b0_3), 18608 }, /* MVMLE */ +{ CPUFUNC(op_48b0_4), 18608 }, /* MVMLE */ { CPUFUNC(op_48b8_0), 18616 }, /* MVMLE */ { CPUFUNC(op_48b9_0), 18617 }, /* MVMLE */ { CPUFUNC(op_48c0_0), 18624 }, /* EXT */ { CPUFUNC(op_48d0_0), 18640 }, /* MVMLE */ { CPUFUNC(op_48e0_0), 18656 }, /* MVMLE */ { CPUFUNC(op_48e8_0), 18664 }, /* MVMLE */ -{ CPUFUNC(op_48f0_3), 18672 }, /* MVMLE */ +{ CPUFUNC(op_48f0_4), 18672 }, /* MVMLE */ { CPUFUNC(op_48f8_0), 18680 }, /* MVMLE */ { CPUFUNC(op_48f9_0), 18681 }, /* MVMLE */ { CPUFUNC(op_49c0_0), 18880 }, /* EXT */ @@ -8444,7 +8892,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_4a18_0), 18968 }, /* TST */ { CPUFUNC(op_4a20_0), 18976 }, /* TST */ { CPUFUNC(op_4a28_0), 18984 }, /* TST */ -{ CPUFUNC(op_4a30_3), 18992 }, /* TST */ +{ CPUFUNC(op_4a30_4), 18992 }, /* TST */ { CPUFUNC(op_4a38_0), 19000 }, /* TST */ { CPUFUNC(op_4a39_0), 19001 }, /* TST */ { CPUFUNC(op_4a40_0), 19008 }, /* TST */ @@ -8452,7 +8900,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_4a58_0), 19032 }, /* TST */ { CPUFUNC(op_4a60_0), 19040 }, /* TST */ { CPUFUNC(op_4a68_0), 19048 }, /* TST */ -{ CPUFUNC(op_4a70_3), 19056 }, /* TST */ +{ CPUFUNC(op_4a70_4), 19056 }, /* TST */ { CPUFUNC(op_4a78_0), 19064 }, /* TST */ { CPUFUNC(op_4a79_0), 19065 }, /* TST */ { CPUFUNC(op_4a80_0), 19072 }, /* TST */ @@ -8460,7 +8908,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_4a98_0), 19096 }, /* TST */ { CPUFUNC(op_4aa0_0), 19104 }, /* TST */ { CPUFUNC(op_4aa8_0), 19112 }, /* TST */ -{ CPUFUNC(op_4ab0_3), 19120 }, /* TST */ +{ CPUFUNC(op_4ab0_4), 19120 }, /* TST */ { CPUFUNC(op_4ab8_0), 19128 }, /* TST */ { CPUFUNC(op_4ab9_0), 19129 }, /* TST */ { CPUFUNC(op_4ac0_0), 19136 }, /* TAS */ @@ -8468,25 +8916,25 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_4ad8_0), 19160 }, /* TAS */ { CPUFUNC(op_4ae0_0), 19168 }, /* TAS */ { CPUFUNC(op_4ae8_0), 19176 }, /* TAS */ -{ CPUFUNC(op_4af0_3), 19184 }, /* TAS */ +{ CPUFUNC(op_4af0_4), 19184 }, /* TAS */ { CPUFUNC(op_4af8_0), 19192 }, /* TAS */ { CPUFUNC(op_4af9_0), 19193 }, /* TAS */ { CPUFUNC(op_4c90_0), 19600 }, /* MVMEL */ { CPUFUNC(op_4c98_0), 19608 }, /* MVMEL */ { CPUFUNC(op_4ca8_0), 19624 }, /* MVMEL */ -{ CPUFUNC(op_4cb0_3), 19632 }, /* MVMEL */ +{ CPUFUNC(op_4cb0_4), 19632 }, /* MVMEL */ { CPUFUNC(op_4cb8_0), 19640 }, /* MVMEL */ { CPUFUNC(op_4cb9_0), 19641 }, /* MVMEL */ { CPUFUNC(op_4cba_0), 19642 }, /* MVMEL */ -{ CPUFUNC(op_4cbb_3), 19643 }, /* MVMEL */ +{ CPUFUNC(op_4cbb_4), 19643 }, /* MVMEL */ { CPUFUNC(op_4cd0_0), 19664 }, /* MVMEL */ { CPUFUNC(op_4cd8_0), 19672 }, /* MVMEL */ { CPUFUNC(op_4ce8_0), 19688 }, /* MVMEL */ -{ CPUFUNC(op_4cf0_3), 19696 }, /* MVMEL */ +{ CPUFUNC(op_4cf0_4), 19696 }, /* MVMEL */ { CPUFUNC(op_4cf8_0), 19704 }, /* MVMEL */ { CPUFUNC(op_4cf9_0), 19705 }, /* MVMEL */ { CPUFUNC(op_4cfa_0), 19706 }, /* MVMEL */ -{ CPUFUNC(op_4cfb_3), 19707 }, /* MVMEL */ +{ CPUFUNC(op_4cfb_4), 19707 }, /* MVMEL */ { CPUFUNC(op_4e40_0), 20032 }, /* TRAP */ { CPUFUNC(op_4e50_0), 20048 }, /* LINK */ { CPUFUNC(op_4e58_0), 20056 }, /* UNLK */ @@ -8495,31 +8943,33 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_4e70_0), 20080 }, /* RESET */ { CPUFUNC(op_4e71_0), 20081 }, /* NOP */ { CPUFUNC(op_4e72_0), 20082 }, /* STOP */ -{ CPUFUNC(op_4e73_4), 20083 }, /* RTE */ +{ CPUFUNC(op_4e73_0), 20083 }, /* RTE */ { CPUFUNC(op_4e74_0), 20084 }, /* RTD */ { CPUFUNC(op_4e75_0), 20085 }, /* RTS */ { CPUFUNC(op_4e76_0), 20086 }, /* TRAPV */ { CPUFUNC(op_4e77_0), 20087 }, /* RTR */ +{ CPUFUNC(op_4e7a_0), 20090 }, /* MOVEC2 */ +{ CPUFUNC(op_4e7b_0), 20091 }, /* MOVE2C */ { CPUFUNC(op_4e90_0), 20112 }, /* JSR */ { CPUFUNC(op_4ea8_0), 20136 }, /* JSR */ -{ CPUFUNC(op_4eb0_3), 20144 }, /* JSR */ +{ CPUFUNC(op_4eb0_4), 20144 }, /* JSR */ { CPUFUNC(op_4eb8_0), 20152 }, /* JSR */ { CPUFUNC(op_4eb9_0), 20153 }, /* JSR */ { CPUFUNC(op_4eba_0), 20154 }, /* JSR */ -{ CPUFUNC(op_4ebb_3), 20155 }, /* JSR */ +{ CPUFUNC(op_4ebb_4), 20155 }, /* JSR */ { CPUFUNC(op_4ed0_0), 20176 }, /* JMP */ { CPUFUNC(op_4ee8_0), 20200 }, /* JMP */ -{ CPUFUNC(op_4ef0_3), 20208 }, /* JMP */ +{ CPUFUNC(op_4ef0_4), 20208 }, /* JMP */ { CPUFUNC(op_4ef8_0), 20216 }, /* JMP */ { CPUFUNC(op_4ef9_0), 20217 }, /* JMP */ { CPUFUNC(op_4efa_0), 20218 }, /* JMP */ -{ CPUFUNC(op_4efb_3), 20219 }, /* JMP */ +{ CPUFUNC(op_4efb_4), 20219 }, /* JMP */ { CPUFUNC(op_5000_0), 20480 }, /* ADD */ { CPUFUNC(op_5010_0), 20496 }, /* ADD */ { CPUFUNC(op_5018_0), 20504 }, /* ADD */ { CPUFUNC(op_5020_0), 20512 }, /* ADD */ { CPUFUNC(op_5028_0), 20520 }, /* ADD */ -{ CPUFUNC(op_5030_3), 20528 }, /* ADD */ +{ CPUFUNC(op_5030_4), 20528 }, /* ADD */ { CPUFUNC(op_5038_0), 20536 }, /* ADD */ { CPUFUNC(op_5039_0), 20537 }, /* ADD */ { CPUFUNC(op_5040_0), 20544 }, /* ADD */ @@ -8528,7 +8978,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_5058_0), 20568 }, /* ADD */ { CPUFUNC(op_5060_0), 20576 }, /* ADD */ { CPUFUNC(op_5068_0), 20584 }, /* ADD */ -{ CPUFUNC(op_5070_3), 20592 }, /* ADD */ +{ CPUFUNC(op_5070_4), 20592 }, /* ADD */ { CPUFUNC(op_5078_0), 20600 }, /* ADD */ { CPUFUNC(op_5079_0), 20601 }, /* ADD */ { CPUFUNC(op_5080_0), 20608 }, /* ADD */ @@ -8537,7 +8987,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_5098_0), 20632 }, /* ADD */ { CPUFUNC(op_50a0_0), 20640 }, /* ADD */ { CPUFUNC(op_50a8_0), 20648 }, /* ADD */ -{ CPUFUNC(op_50b0_3), 20656 }, /* ADD */ +{ CPUFUNC(op_50b0_4), 20656 }, /* ADD */ { CPUFUNC(op_50b8_0), 20664 }, /* ADD */ { CPUFUNC(op_50b9_0), 20665 }, /* ADD */ { CPUFUNC(op_50c0_0), 20672 }, /* Scc */ @@ -8546,7 +8996,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_50d8_0), 20696 }, /* Scc */ { CPUFUNC(op_50e0_0), 20704 }, /* Scc */ { CPUFUNC(op_50e8_0), 20712 }, /* Scc */ -{ CPUFUNC(op_50f0_3), 20720 }, /* Scc */ +{ CPUFUNC(op_50f0_4), 20720 }, /* Scc */ { CPUFUNC(op_50f8_0), 20728 }, /* Scc */ { CPUFUNC(op_50f9_0), 20729 }, /* Scc */ { CPUFUNC(op_5100_0), 20736 }, /* SUB */ @@ -8554,7 +9004,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_5118_0), 20760 }, /* SUB */ { CPUFUNC(op_5120_0), 20768 }, /* SUB */ { CPUFUNC(op_5128_0), 20776 }, /* SUB */ -{ CPUFUNC(op_5130_3), 20784 }, /* SUB */ +{ CPUFUNC(op_5130_4), 20784 }, /* SUB */ { CPUFUNC(op_5138_0), 20792 }, /* SUB */ { CPUFUNC(op_5139_0), 20793 }, /* SUB */ { CPUFUNC(op_5140_0), 20800 }, /* SUB */ @@ -8563,7 +9013,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_5158_0), 20824 }, /* SUB */ { CPUFUNC(op_5160_0), 20832 }, /* SUB */ { CPUFUNC(op_5168_0), 20840 }, /* SUB */ -{ CPUFUNC(op_5170_3), 20848 }, /* SUB */ +{ CPUFUNC(op_5170_4), 20848 }, /* SUB */ { CPUFUNC(op_5178_0), 20856 }, /* SUB */ { CPUFUNC(op_5179_0), 20857 }, /* SUB */ { CPUFUNC(op_5180_0), 20864 }, /* SUB */ @@ -8572,7 +9022,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_5198_0), 20888 }, /* SUB */ { CPUFUNC(op_51a0_0), 20896 }, /* SUB */ { CPUFUNC(op_51a8_0), 20904 }, /* SUB */ -{ CPUFUNC(op_51b0_3), 20912 }, /* SUB */ +{ CPUFUNC(op_51b0_4), 20912 }, /* SUB */ { CPUFUNC(op_51b8_0), 20920 }, /* SUB */ { CPUFUNC(op_51b9_0), 20921 }, /* SUB */ { CPUFUNC(op_51c0_0), 20928 }, /* Scc */ @@ -8581,7 +9031,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_51d8_0), 20952 }, /* Scc */ { CPUFUNC(op_51e0_0), 20960 }, /* Scc */ { CPUFUNC(op_51e8_0), 20968 }, /* Scc */ -{ CPUFUNC(op_51f0_3), 20976 }, /* Scc */ +{ CPUFUNC(op_51f0_4), 20976 }, /* Scc */ { CPUFUNC(op_51f8_0), 20984 }, /* Scc */ { CPUFUNC(op_51f9_0), 20985 }, /* Scc */ { CPUFUNC(op_52c0_0), 21184 }, /* Scc */ @@ -8590,7 +9040,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_52d8_0), 21208 }, /* Scc */ { CPUFUNC(op_52e0_0), 21216 }, /* Scc */ { CPUFUNC(op_52e8_0), 21224 }, /* Scc */ -{ CPUFUNC(op_52f0_3), 21232 }, /* Scc */ +{ CPUFUNC(op_52f0_4), 21232 }, /* Scc */ { CPUFUNC(op_52f8_0), 21240 }, /* Scc */ { CPUFUNC(op_52f9_0), 21241 }, /* Scc */ { CPUFUNC(op_53c0_0), 21440 }, /* Scc */ @@ -8599,7 +9049,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_53d8_0), 21464 }, /* Scc */ { CPUFUNC(op_53e0_0), 21472 }, /* Scc */ { CPUFUNC(op_53e8_0), 21480 }, /* Scc */ -{ CPUFUNC(op_53f0_3), 21488 }, /* Scc */ +{ CPUFUNC(op_53f0_4), 21488 }, /* Scc */ { CPUFUNC(op_53f8_0), 21496 }, /* Scc */ { CPUFUNC(op_53f9_0), 21497 }, /* Scc */ { CPUFUNC(op_54c0_0), 21696 }, /* Scc */ @@ -8608,7 +9058,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_54d8_0), 21720 }, /* Scc */ { CPUFUNC(op_54e0_0), 21728 }, /* Scc */ { CPUFUNC(op_54e8_0), 21736 }, /* Scc */ -{ CPUFUNC(op_54f0_3), 21744 }, /* Scc */ +{ CPUFUNC(op_54f0_4), 21744 }, /* Scc */ { CPUFUNC(op_54f8_0), 21752 }, /* Scc */ { CPUFUNC(op_54f9_0), 21753 }, /* Scc */ { CPUFUNC(op_55c0_0), 21952 }, /* Scc */ @@ -8617,7 +9067,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_55d8_0), 21976 }, /* Scc */ { CPUFUNC(op_55e0_0), 21984 }, /* Scc */ { CPUFUNC(op_55e8_0), 21992 }, /* Scc */ -{ CPUFUNC(op_55f0_3), 22000 }, /* Scc */ +{ CPUFUNC(op_55f0_4), 22000 }, /* Scc */ { CPUFUNC(op_55f8_0), 22008 }, /* Scc */ { CPUFUNC(op_55f9_0), 22009 }, /* Scc */ { CPUFUNC(op_56c0_0), 22208 }, /* Scc */ @@ -8626,7 +9076,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_56d8_0), 22232 }, /* Scc */ { CPUFUNC(op_56e0_0), 22240 }, /* Scc */ { CPUFUNC(op_56e8_0), 22248 }, /* Scc */ -{ CPUFUNC(op_56f0_3), 22256 }, /* Scc */ +{ CPUFUNC(op_56f0_4), 22256 }, /* Scc */ { CPUFUNC(op_56f8_0), 22264 }, /* Scc */ { CPUFUNC(op_56f9_0), 22265 }, /* Scc */ { CPUFUNC(op_57c0_0), 22464 }, /* Scc */ @@ -8635,7 +9085,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_57d8_0), 22488 }, /* Scc */ { CPUFUNC(op_57e0_0), 22496 }, /* Scc */ { CPUFUNC(op_57e8_0), 22504 }, /* Scc */ -{ CPUFUNC(op_57f0_3), 22512 }, /* Scc */ +{ CPUFUNC(op_57f0_4), 22512 }, /* Scc */ { CPUFUNC(op_57f8_0), 22520 }, /* Scc */ { CPUFUNC(op_57f9_0), 22521 }, /* Scc */ { CPUFUNC(op_58c0_0), 22720 }, /* Scc */ @@ -8644,7 +9094,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_58d8_0), 22744 }, /* Scc */ { CPUFUNC(op_58e0_0), 22752 }, /* Scc */ { CPUFUNC(op_58e8_0), 22760 }, /* Scc */ -{ CPUFUNC(op_58f0_3), 22768 }, /* Scc */ +{ CPUFUNC(op_58f0_4), 22768 }, /* Scc */ { CPUFUNC(op_58f8_0), 22776 }, /* Scc */ { CPUFUNC(op_58f9_0), 22777 }, /* Scc */ { CPUFUNC(op_59c0_0), 22976 }, /* Scc */ @@ -8653,7 +9103,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_59d8_0), 23000 }, /* Scc */ { CPUFUNC(op_59e0_0), 23008 }, /* Scc */ { CPUFUNC(op_59e8_0), 23016 }, /* Scc */ -{ CPUFUNC(op_59f0_3), 23024 }, /* Scc */ +{ CPUFUNC(op_59f0_4), 23024 }, /* Scc */ { CPUFUNC(op_59f8_0), 23032 }, /* Scc */ { CPUFUNC(op_59f9_0), 23033 }, /* Scc */ { CPUFUNC(op_5ac0_0), 23232 }, /* Scc */ @@ -8662,7 +9112,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_5ad8_0), 23256 }, /* Scc */ { CPUFUNC(op_5ae0_0), 23264 }, /* Scc */ { CPUFUNC(op_5ae8_0), 23272 }, /* Scc */ -{ CPUFUNC(op_5af0_3), 23280 }, /* Scc */ +{ CPUFUNC(op_5af0_4), 23280 }, /* Scc */ { CPUFUNC(op_5af8_0), 23288 }, /* Scc */ { CPUFUNC(op_5af9_0), 23289 }, /* Scc */ { CPUFUNC(op_5bc0_0), 23488 }, /* Scc */ @@ -8671,7 +9121,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_5bd8_0), 23512 }, /* Scc */ { CPUFUNC(op_5be0_0), 23520 }, /* Scc */ { CPUFUNC(op_5be8_0), 23528 }, /* Scc */ -{ CPUFUNC(op_5bf0_3), 23536 }, /* Scc */ +{ CPUFUNC(op_5bf0_4), 23536 }, /* Scc */ { CPUFUNC(op_5bf8_0), 23544 }, /* Scc */ { CPUFUNC(op_5bf9_0), 23545 }, /* Scc */ { CPUFUNC(op_5cc0_0), 23744 }, /* Scc */ @@ -8680,7 +9130,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_5cd8_0), 23768 }, /* Scc */ { CPUFUNC(op_5ce0_0), 23776 }, /* Scc */ { CPUFUNC(op_5ce8_0), 23784 }, /* Scc */ -{ CPUFUNC(op_5cf0_3), 23792 }, /* Scc */ +{ CPUFUNC(op_5cf0_4), 23792 }, /* Scc */ { CPUFUNC(op_5cf8_0), 23800 }, /* Scc */ { CPUFUNC(op_5cf9_0), 23801 }, /* Scc */ { CPUFUNC(op_5dc0_0), 24000 }, /* Scc */ @@ -8689,7 +9139,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_5dd8_0), 24024 }, /* Scc */ { CPUFUNC(op_5de0_0), 24032 }, /* Scc */ { CPUFUNC(op_5de8_0), 24040 }, /* Scc */ -{ CPUFUNC(op_5df0_3), 24048 }, /* Scc */ +{ CPUFUNC(op_5df0_4), 24048 }, /* Scc */ { CPUFUNC(op_5df8_0), 24056 }, /* Scc */ { CPUFUNC(op_5df9_0), 24057 }, /* Scc */ { CPUFUNC(op_5ec0_0), 24256 }, /* Scc */ @@ -8698,7 +9148,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_5ed8_0), 24280 }, /* Scc */ { CPUFUNC(op_5ee0_0), 24288 }, /* Scc */ { CPUFUNC(op_5ee8_0), 24296 }, /* Scc */ -{ CPUFUNC(op_5ef0_3), 24304 }, /* Scc */ +{ CPUFUNC(op_5ef0_4), 24304 }, /* Scc */ { CPUFUNC(op_5ef8_0), 24312 }, /* Scc */ { CPUFUNC(op_5ef9_0), 24313 }, /* Scc */ { CPUFUNC(op_5fc0_0), 24512 }, /* Scc */ @@ -8707,123 +9157,123 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_5fd8_0), 24536 }, /* Scc */ { CPUFUNC(op_5fe0_0), 24544 }, /* Scc */ { CPUFUNC(op_5fe8_0), 24552 }, /* Scc */ -{ CPUFUNC(op_5ff0_3), 24560 }, /* Scc */ +{ CPUFUNC(op_5ff0_4), 24560 }, /* Scc */ { CPUFUNC(op_5ff8_0), 24568 }, /* Scc */ { CPUFUNC(op_5ff9_0), 24569 }, /* Scc */ { CPUFUNC(op_6000_0), 24576 }, /* Bcc */ { CPUFUNC(op_6001_0), 24577 }, /* Bcc */ -{ CPUFUNC(op_60ff_3), 24831 }, /* Bcc */ +{ CPUFUNC(op_60ff_4), 24831 }, /* Bcc */ { CPUFUNC(op_6100_0), 24832 }, /* BSR */ { CPUFUNC(op_6101_0), 24833 }, /* BSR */ { CPUFUNC(op_61ff_0), 25087 }, /* BSR */ { CPUFUNC(op_6200_0), 25088 }, /* Bcc */ { CPUFUNC(op_6201_0), 25089 }, /* Bcc */ -{ CPUFUNC(op_62ff_3), 25343 }, /* Bcc */ +{ CPUFUNC(op_62ff_4), 25343 }, /* Bcc */ { CPUFUNC(op_6300_0), 25344 }, /* Bcc */ { CPUFUNC(op_6301_0), 25345 }, /* Bcc */ -{ CPUFUNC(op_63ff_3), 25599 }, /* Bcc */ +{ CPUFUNC(op_63ff_4), 25599 }, /* Bcc */ { CPUFUNC(op_6400_0), 25600 }, /* Bcc */ { CPUFUNC(op_6401_0), 25601 }, /* Bcc */ -{ CPUFUNC(op_64ff_3), 25855 }, /* Bcc */ +{ CPUFUNC(op_64ff_4), 25855 }, /* Bcc */ { CPUFUNC(op_6500_0), 25856 }, /* Bcc */ { CPUFUNC(op_6501_0), 25857 }, /* Bcc */ -{ CPUFUNC(op_65ff_3), 26111 }, /* Bcc */ +{ CPUFUNC(op_65ff_4), 26111 }, /* Bcc */ { CPUFUNC(op_6600_0), 26112 }, /* Bcc */ { CPUFUNC(op_6601_0), 26113 }, /* Bcc */ -{ CPUFUNC(op_66ff_3), 26367 }, /* Bcc */ +{ CPUFUNC(op_66ff_4), 26367 }, /* Bcc */ { CPUFUNC(op_6700_0), 26368 }, /* Bcc */ { CPUFUNC(op_6701_0), 26369 }, /* Bcc */ -{ CPUFUNC(op_67ff_3), 26623 }, /* Bcc */ +{ CPUFUNC(op_67ff_4), 26623 }, /* Bcc */ { CPUFUNC(op_6800_0), 26624 }, /* Bcc */ { CPUFUNC(op_6801_0), 26625 }, /* Bcc */ -{ CPUFUNC(op_68ff_3), 26879 }, /* Bcc */ +{ CPUFUNC(op_68ff_4), 26879 }, /* Bcc */ { CPUFUNC(op_6900_0), 26880 }, /* Bcc */ { CPUFUNC(op_6901_0), 26881 }, /* Bcc */ -{ CPUFUNC(op_69ff_3), 27135 }, /* Bcc */ +{ CPUFUNC(op_69ff_4), 27135 }, /* Bcc */ { CPUFUNC(op_6a00_0), 27136 }, /* Bcc */ { CPUFUNC(op_6a01_0), 27137 }, /* Bcc */ -{ CPUFUNC(op_6aff_3), 27391 }, /* Bcc */ +{ CPUFUNC(op_6aff_4), 27391 }, /* Bcc */ { CPUFUNC(op_6b00_0), 27392 }, /* Bcc */ { CPUFUNC(op_6b01_0), 27393 }, /* Bcc */ -{ CPUFUNC(op_6bff_3), 27647 }, /* Bcc */ +{ CPUFUNC(op_6bff_4), 27647 }, /* Bcc */ { CPUFUNC(op_6c00_0), 27648 }, /* Bcc */ { CPUFUNC(op_6c01_0), 27649 }, /* Bcc */ -{ CPUFUNC(op_6cff_3), 27903 }, /* Bcc */ +{ CPUFUNC(op_6cff_4), 27903 }, /* Bcc */ { CPUFUNC(op_6d00_0), 27904 }, /* Bcc */ { CPUFUNC(op_6d01_0), 27905 }, /* Bcc */ -{ CPUFUNC(op_6dff_3), 28159 }, /* Bcc */ +{ CPUFUNC(op_6dff_4), 28159 }, /* Bcc */ { CPUFUNC(op_6e00_0), 28160 }, /* Bcc */ { CPUFUNC(op_6e01_0), 28161 }, /* Bcc */ -{ CPUFUNC(op_6eff_3), 28415 }, /* Bcc */ +{ CPUFUNC(op_6eff_4), 28415 }, /* Bcc */ { CPUFUNC(op_6f00_0), 28416 }, /* Bcc */ { CPUFUNC(op_6f01_0), 28417 }, /* Bcc */ -{ CPUFUNC(op_6fff_3), 28671 }, /* Bcc */ +{ CPUFUNC(op_6fff_4), 28671 }, /* Bcc */ { CPUFUNC(op_7000_0), 28672 }, /* MOVE */ { CPUFUNC(op_8000_0), 32768 }, /* OR */ { CPUFUNC(op_8010_0), 32784 }, /* OR */ { CPUFUNC(op_8018_0), 32792 }, /* OR */ { CPUFUNC(op_8020_0), 32800 }, /* OR */ { CPUFUNC(op_8028_0), 32808 }, /* OR */ -{ CPUFUNC(op_8030_3), 32816 }, /* OR */ +{ CPUFUNC(op_8030_4), 32816 }, /* OR */ { CPUFUNC(op_8038_0), 32824 }, /* OR */ { CPUFUNC(op_8039_0), 32825 }, /* OR */ { CPUFUNC(op_803a_0), 32826 }, /* OR */ -{ CPUFUNC(op_803b_3), 32827 }, /* OR */ +{ CPUFUNC(op_803b_4), 32827 }, /* OR */ { CPUFUNC(op_803c_0), 32828 }, /* OR */ { CPUFUNC(op_8040_0), 32832 }, /* OR */ { CPUFUNC(op_8050_0), 32848 }, /* OR */ { CPUFUNC(op_8058_0), 32856 }, /* OR */ { CPUFUNC(op_8060_0), 32864 }, /* OR */ { CPUFUNC(op_8068_0), 32872 }, /* OR */ -{ CPUFUNC(op_8070_3), 32880 }, /* OR */ +{ CPUFUNC(op_8070_4), 32880 }, /* OR */ { CPUFUNC(op_8078_0), 32888 }, /* OR */ { CPUFUNC(op_8079_0), 32889 }, /* OR */ { CPUFUNC(op_807a_0), 32890 }, /* OR */ -{ CPUFUNC(op_807b_3), 32891 }, /* OR */ +{ CPUFUNC(op_807b_4), 32891 }, /* OR */ { CPUFUNC(op_807c_0), 32892 }, /* OR */ { CPUFUNC(op_8080_0), 32896 }, /* OR */ { CPUFUNC(op_8090_0), 32912 }, /* OR */ { CPUFUNC(op_8098_0), 32920 }, /* OR */ { CPUFUNC(op_80a0_0), 32928 }, /* OR */ { CPUFUNC(op_80a8_0), 32936 }, /* OR */ -{ CPUFUNC(op_80b0_3), 32944 }, /* OR */ +{ CPUFUNC(op_80b0_4), 32944 }, /* OR */ { CPUFUNC(op_80b8_0), 32952 }, /* OR */ { CPUFUNC(op_80b9_0), 32953 }, /* OR */ { CPUFUNC(op_80ba_0), 32954 }, /* OR */ -{ CPUFUNC(op_80bb_3), 32955 }, /* OR */ +{ CPUFUNC(op_80bb_4), 32955 }, /* OR */ { CPUFUNC(op_80bc_0), 32956 }, /* OR */ { CPUFUNC(op_80c0_0), 32960 }, /* DIVU */ { CPUFUNC(op_80d0_0), 32976 }, /* DIVU */ { CPUFUNC(op_80d8_0), 32984 }, /* DIVU */ { CPUFUNC(op_80e0_0), 32992 }, /* DIVU */ { CPUFUNC(op_80e8_0), 33000 }, /* DIVU */ -{ CPUFUNC(op_80f0_3), 33008 }, /* DIVU */ +{ CPUFUNC(op_80f0_4), 33008 }, /* DIVU */ { CPUFUNC(op_80f8_0), 33016 }, /* DIVU */ { CPUFUNC(op_80f9_0), 33017 }, /* DIVU */ { CPUFUNC(op_80fa_0), 33018 }, /* DIVU */ -{ CPUFUNC(op_80fb_3), 33019 }, /* DIVU */ +{ CPUFUNC(op_80fb_4), 33019 }, /* DIVU */ { CPUFUNC(op_80fc_0), 33020 }, /* DIVU */ -{ CPUFUNC(op_8100_0), 33024 }, /* SBCD */ -{ CPUFUNC(op_8108_0), 33032 }, /* SBCD */ +{ CPUFUNC(op_8100_2), 33024 }, /* SBCD */ +{ CPUFUNC(op_8108_2), 33032 }, /* SBCD */ { CPUFUNC(op_8110_0), 33040 }, /* OR */ { CPUFUNC(op_8118_0), 33048 }, /* OR */ { CPUFUNC(op_8120_0), 33056 }, /* OR */ { CPUFUNC(op_8128_0), 33064 }, /* OR */ -{ CPUFUNC(op_8130_3), 33072 }, /* OR */ +{ CPUFUNC(op_8130_4), 33072 }, /* OR */ { CPUFUNC(op_8138_0), 33080 }, /* OR */ { CPUFUNC(op_8139_0), 33081 }, /* OR */ { CPUFUNC(op_8150_0), 33104 }, /* OR */ { CPUFUNC(op_8158_0), 33112 }, /* OR */ { CPUFUNC(op_8160_0), 33120 }, /* OR */ { CPUFUNC(op_8168_0), 33128 }, /* OR */ -{ CPUFUNC(op_8170_3), 33136 }, /* OR */ +{ CPUFUNC(op_8170_4), 33136 }, /* OR */ { CPUFUNC(op_8178_0), 33144 }, /* OR */ { CPUFUNC(op_8179_0), 33145 }, /* OR */ { CPUFUNC(op_8190_0), 33168 }, /* OR */ { CPUFUNC(op_8198_0), 33176 }, /* OR */ { CPUFUNC(op_81a0_0), 33184 }, /* OR */ { CPUFUNC(op_81a8_0), 33192 }, /* OR */ -{ CPUFUNC(op_81b0_3), 33200 }, /* OR */ +{ CPUFUNC(op_81b0_4), 33200 }, /* OR */ { CPUFUNC(op_81b8_0), 33208 }, /* OR */ { CPUFUNC(op_81b9_0), 33209 }, /* OR */ { CPUFUNC(op_81c0_0), 33216 }, /* DIVS */ @@ -8831,22 +9281,22 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_81d8_0), 33240 }, /* DIVS */ { CPUFUNC(op_81e0_0), 33248 }, /* DIVS */ { CPUFUNC(op_81e8_0), 33256 }, /* DIVS */ -{ CPUFUNC(op_81f0_3), 33264 }, /* DIVS */ +{ CPUFUNC(op_81f0_4), 33264 }, /* DIVS */ { CPUFUNC(op_81f8_0), 33272 }, /* DIVS */ { CPUFUNC(op_81f9_0), 33273 }, /* DIVS */ { CPUFUNC(op_81fa_0), 33274 }, /* DIVS */ -{ CPUFUNC(op_81fb_3), 33275 }, /* DIVS */ +{ CPUFUNC(op_81fb_4), 33275 }, /* DIVS */ { CPUFUNC(op_81fc_0), 33276 }, /* DIVS */ { CPUFUNC(op_9000_0), 36864 }, /* SUB */ { CPUFUNC(op_9010_0), 36880 }, /* SUB */ { CPUFUNC(op_9018_0), 36888 }, /* SUB */ { CPUFUNC(op_9020_0), 36896 }, /* SUB */ { CPUFUNC(op_9028_0), 36904 }, /* SUB */ -{ CPUFUNC(op_9030_3), 36912 }, /* SUB */ +{ CPUFUNC(op_9030_4), 36912 }, /* SUB */ { CPUFUNC(op_9038_0), 36920 }, /* SUB */ { CPUFUNC(op_9039_0), 36921 }, /* SUB */ { CPUFUNC(op_903a_0), 36922 }, /* SUB */ -{ CPUFUNC(op_903b_3), 36923 }, /* SUB */ +{ CPUFUNC(op_903b_4), 36923 }, /* SUB */ { CPUFUNC(op_903c_0), 36924 }, /* SUB */ { CPUFUNC(op_9040_0), 36928 }, /* SUB */ { CPUFUNC(op_9048_0), 36936 }, /* SUB */ @@ -8854,11 +9304,11 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_9058_0), 36952 }, /* SUB */ { CPUFUNC(op_9060_0), 36960 }, /* SUB */ { CPUFUNC(op_9068_0), 36968 }, /* SUB */ -{ CPUFUNC(op_9070_3), 36976 }, /* SUB */ +{ CPUFUNC(op_9070_4), 36976 }, /* SUB */ { CPUFUNC(op_9078_0), 36984 }, /* SUB */ { CPUFUNC(op_9079_0), 36985 }, /* SUB */ { CPUFUNC(op_907a_0), 36986 }, /* SUB */ -{ CPUFUNC(op_907b_3), 36987 }, /* SUB */ +{ CPUFUNC(op_907b_4), 36987 }, /* SUB */ { CPUFUNC(op_907c_0), 36988 }, /* SUB */ { CPUFUNC(op_9080_0), 36992 }, /* SUB */ { CPUFUNC(op_9088_0), 37000 }, /* SUB */ @@ -8866,11 +9316,11 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_9098_0), 37016 }, /* SUB */ { CPUFUNC(op_90a0_0), 37024 }, /* SUB */ { CPUFUNC(op_90a8_0), 37032 }, /* SUB */ -{ CPUFUNC(op_90b0_3), 37040 }, /* SUB */ +{ CPUFUNC(op_90b0_4), 37040 }, /* SUB */ { CPUFUNC(op_90b8_0), 37048 }, /* SUB */ { CPUFUNC(op_90b9_0), 37049 }, /* SUB */ { CPUFUNC(op_90ba_0), 37050 }, /* SUB */ -{ CPUFUNC(op_90bb_3), 37051 }, /* SUB */ +{ CPUFUNC(op_90bb_4), 37051 }, /* SUB */ { CPUFUNC(op_90bc_0), 37052 }, /* SUB */ { CPUFUNC(op_90c0_0), 37056 }, /* SUBA */ { CPUFUNC(op_90c8_0), 37064 }, /* SUBA */ @@ -8878,11 +9328,11 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_90d8_0), 37080 }, /* SUBA */ { CPUFUNC(op_90e0_0), 37088 }, /* SUBA */ { CPUFUNC(op_90e8_0), 37096 }, /* SUBA */ -{ CPUFUNC(op_90f0_3), 37104 }, /* SUBA */ +{ CPUFUNC(op_90f0_4), 37104 }, /* SUBA */ { CPUFUNC(op_90f8_0), 37112 }, /* SUBA */ { CPUFUNC(op_90f9_0), 37113 }, /* SUBA */ { CPUFUNC(op_90fa_0), 37114 }, /* SUBA */ -{ CPUFUNC(op_90fb_3), 37115 }, /* SUBA */ +{ CPUFUNC(op_90fb_4), 37115 }, /* SUBA */ { CPUFUNC(op_90fc_0), 37116 }, /* SUBA */ { CPUFUNC(op_9100_0), 37120 }, /* SUBX */ { CPUFUNC(op_9108_0), 37128 }, /* SUBX */ @@ -8890,7 +9340,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_9118_0), 37144 }, /* SUB */ { CPUFUNC(op_9120_0), 37152 }, /* SUB */ { CPUFUNC(op_9128_0), 37160 }, /* SUB */ -{ CPUFUNC(op_9130_3), 37168 }, /* SUB */ +{ CPUFUNC(op_9130_4), 37168 }, /* SUB */ { CPUFUNC(op_9138_0), 37176 }, /* SUB */ { CPUFUNC(op_9139_0), 37177 }, /* SUB */ { CPUFUNC(op_9140_0), 37184 }, /* SUBX */ @@ -8899,7 +9349,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_9158_0), 37208 }, /* SUB */ { CPUFUNC(op_9160_0), 37216 }, /* SUB */ { CPUFUNC(op_9168_0), 37224 }, /* SUB */ -{ CPUFUNC(op_9170_3), 37232 }, /* SUB */ +{ CPUFUNC(op_9170_4), 37232 }, /* SUB */ { CPUFUNC(op_9178_0), 37240 }, /* SUB */ { CPUFUNC(op_9179_0), 37241 }, /* SUB */ { CPUFUNC(op_9180_0), 37248 }, /* SUBX */ @@ -8908,7 +9358,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_9198_0), 37272 }, /* SUB */ { CPUFUNC(op_91a0_0), 37280 }, /* SUB */ { CPUFUNC(op_91a8_0), 37288 }, /* SUB */ -{ CPUFUNC(op_91b0_3), 37296 }, /* SUB */ +{ CPUFUNC(op_91b0_4), 37296 }, /* SUB */ { CPUFUNC(op_91b8_0), 37304 }, /* SUB */ { CPUFUNC(op_91b9_0), 37305 }, /* SUB */ { CPUFUNC(op_91c0_0), 37312 }, /* SUBA */ @@ -8917,22 +9367,22 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_91d8_0), 37336 }, /* SUBA */ { CPUFUNC(op_91e0_0), 37344 }, /* SUBA */ { CPUFUNC(op_91e8_0), 37352 }, /* SUBA */ -{ CPUFUNC(op_91f0_3), 37360 }, /* SUBA */ +{ CPUFUNC(op_91f0_4), 37360 }, /* SUBA */ { CPUFUNC(op_91f8_0), 37368 }, /* SUBA */ { CPUFUNC(op_91f9_0), 37369 }, /* SUBA */ { CPUFUNC(op_91fa_0), 37370 }, /* SUBA */ -{ CPUFUNC(op_91fb_3), 37371 }, /* SUBA */ +{ CPUFUNC(op_91fb_4), 37371 }, /* SUBA */ { CPUFUNC(op_91fc_0), 37372 }, /* SUBA */ { CPUFUNC(op_b000_0), 45056 }, /* CMP */ { CPUFUNC(op_b010_0), 45072 }, /* CMP */ { CPUFUNC(op_b018_0), 45080 }, /* CMP */ { CPUFUNC(op_b020_0), 45088 }, /* CMP */ { CPUFUNC(op_b028_0), 45096 }, /* CMP */ -{ CPUFUNC(op_b030_3), 45104 }, /* CMP */ +{ CPUFUNC(op_b030_4), 45104 }, /* CMP */ { CPUFUNC(op_b038_0), 45112 }, /* CMP */ { CPUFUNC(op_b039_0), 45113 }, /* CMP */ { CPUFUNC(op_b03a_0), 45114 }, /* CMP */ -{ CPUFUNC(op_b03b_3), 45115 }, /* CMP */ +{ CPUFUNC(op_b03b_4), 45115 }, /* CMP */ { CPUFUNC(op_b03c_0), 45116 }, /* CMP */ { CPUFUNC(op_b040_0), 45120 }, /* CMP */ { CPUFUNC(op_b048_0), 45128 }, /* CMP */ @@ -8940,11 +9390,11 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_b058_0), 45144 }, /* CMP */ { CPUFUNC(op_b060_0), 45152 }, /* CMP */ { CPUFUNC(op_b068_0), 45160 }, /* CMP */ -{ CPUFUNC(op_b070_3), 45168 }, /* CMP */ +{ CPUFUNC(op_b070_4), 45168 }, /* CMP */ { CPUFUNC(op_b078_0), 45176 }, /* CMP */ { CPUFUNC(op_b079_0), 45177 }, /* CMP */ { CPUFUNC(op_b07a_0), 45178 }, /* CMP */ -{ CPUFUNC(op_b07b_3), 45179 }, /* CMP */ +{ CPUFUNC(op_b07b_4), 45179 }, /* CMP */ { CPUFUNC(op_b07c_0), 45180 }, /* CMP */ { CPUFUNC(op_b080_0), 45184 }, /* CMP */ { CPUFUNC(op_b088_0), 45192 }, /* CMP */ @@ -8952,11 +9402,11 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_b098_0), 45208 }, /* CMP */ { CPUFUNC(op_b0a0_0), 45216 }, /* CMP */ { CPUFUNC(op_b0a8_0), 45224 }, /* CMP */ -{ CPUFUNC(op_b0b0_3), 45232 }, /* CMP */ +{ CPUFUNC(op_b0b0_4), 45232 }, /* CMP */ { CPUFUNC(op_b0b8_0), 45240 }, /* CMP */ { CPUFUNC(op_b0b9_0), 45241 }, /* CMP */ { CPUFUNC(op_b0ba_0), 45242 }, /* CMP */ -{ CPUFUNC(op_b0bb_3), 45243 }, /* CMP */ +{ CPUFUNC(op_b0bb_4), 45243 }, /* CMP */ { CPUFUNC(op_b0bc_0), 45244 }, /* CMP */ { CPUFUNC(op_b0c0_0), 45248 }, /* CMPA */ { CPUFUNC(op_b0c8_0), 45256 }, /* CMPA */ @@ -8964,11 +9414,11 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_b0d8_0), 45272 }, /* CMPA */ { CPUFUNC(op_b0e0_0), 45280 }, /* CMPA */ { CPUFUNC(op_b0e8_0), 45288 }, /* CMPA */ -{ CPUFUNC(op_b0f0_3), 45296 }, /* CMPA */ +{ CPUFUNC(op_b0f0_4), 45296 }, /* CMPA */ { CPUFUNC(op_b0f8_0), 45304 }, /* CMPA */ { CPUFUNC(op_b0f9_0), 45305 }, /* CMPA */ { CPUFUNC(op_b0fa_0), 45306 }, /* CMPA */ -{ CPUFUNC(op_b0fb_3), 45307 }, /* CMPA */ +{ CPUFUNC(op_b0fb_4), 45307 }, /* CMPA */ { CPUFUNC(op_b0fc_0), 45308 }, /* CMPA */ { CPUFUNC(op_b100_0), 45312 }, /* EOR */ { CPUFUNC(op_b108_0), 45320 }, /* CMPM */ @@ -8976,7 +9426,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_b118_0), 45336 }, /* EOR */ { CPUFUNC(op_b120_0), 45344 }, /* EOR */ { CPUFUNC(op_b128_0), 45352 }, /* EOR */ -{ CPUFUNC(op_b130_3), 45360 }, /* EOR */ +{ CPUFUNC(op_b130_4), 45360 }, /* EOR */ { CPUFUNC(op_b138_0), 45368 }, /* EOR */ { CPUFUNC(op_b139_0), 45369 }, /* EOR */ { CPUFUNC(op_b140_0), 45376 }, /* EOR */ @@ -8985,7 +9435,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_b158_0), 45400 }, /* EOR */ { CPUFUNC(op_b160_0), 45408 }, /* EOR */ { CPUFUNC(op_b168_0), 45416 }, /* EOR */ -{ CPUFUNC(op_b170_3), 45424 }, /* EOR */ +{ CPUFUNC(op_b170_4), 45424 }, /* EOR */ { CPUFUNC(op_b178_0), 45432 }, /* EOR */ { CPUFUNC(op_b179_0), 45433 }, /* EOR */ { CPUFUNC(op_b180_0), 45440 }, /* EOR */ @@ -8994,7 +9444,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_b198_0), 45464 }, /* EOR */ { CPUFUNC(op_b1a0_0), 45472 }, /* EOR */ { CPUFUNC(op_b1a8_0), 45480 }, /* EOR */ -{ CPUFUNC(op_b1b0_3), 45488 }, /* EOR */ +{ CPUFUNC(op_b1b0_4), 45488 }, /* EOR */ { CPUFUNC(op_b1b8_0), 45496 }, /* EOR */ { CPUFUNC(op_b1b9_0), 45497 }, /* EOR */ { CPUFUNC(op_b1c0_0), 45504 }, /* CMPA */ @@ -9003,63 +9453,63 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_b1d8_0), 45528 }, /* CMPA */ { CPUFUNC(op_b1e0_0), 45536 }, /* CMPA */ { CPUFUNC(op_b1e8_0), 45544 }, /* CMPA */ -{ CPUFUNC(op_b1f0_3), 45552 }, /* CMPA */ +{ CPUFUNC(op_b1f0_4), 45552 }, /* CMPA */ { CPUFUNC(op_b1f8_0), 45560 }, /* CMPA */ { CPUFUNC(op_b1f9_0), 45561 }, /* CMPA */ { CPUFUNC(op_b1fa_0), 45562 }, /* CMPA */ -{ CPUFUNC(op_b1fb_3), 45563 }, /* CMPA */ +{ CPUFUNC(op_b1fb_4), 45563 }, /* CMPA */ { CPUFUNC(op_b1fc_0), 45564 }, /* CMPA */ { CPUFUNC(op_c000_0), 49152 }, /* AND */ { CPUFUNC(op_c010_0), 49168 }, /* AND */ { CPUFUNC(op_c018_0), 49176 }, /* AND */ { CPUFUNC(op_c020_0), 49184 }, /* AND */ { CPUFUNC(op_c028_0), 49192 }, /* AND */ -{ CPUFUNC(op_c030_3), 49200 }, /* AND */ +{ CPUFUNC(op_c030_4), 49200 }, /* AND */ { CPUFUNC(op_c038_0), 49208 }, /* AND */ { CPUFUNC(op_c039_0), 49209 }, /* AND */ { CPUFUNC(op_c03a_0), 49210 }, /* AND */ -{ CPUFUNC(op_c03b_3), 49211 }, /* AND */ +{ CPUFUNC(op_c03b_4), 49211 }, /* AND */ { CPUFUNC(op_c03c_0), 49212 }, /* AND */ { CPUFUNC(op_c040_0), 49216 }, /* AND */ { CPUFUNC(op_c050_0), 49232 }, /* AND */ { CPUFUNC(op_c058_0), 49240 }, /* AND */ { CPUFUNC(op_c060_0), 49248 }, /* AND */ { CPUFUNC(op_c068_0), 49256 }, /* AND */ -{ CPUFUNC(op_c070_3), 49264 }, /* AND */ +{ CPUFUNC(op_c070_4), 49264 }, /* AND */ { CPUFUNC(op_c078_0), 49272 }, /* AND */ { CPUFUNC(op_c079_0), 49273 }, /* AND */ { CPUFUNC(op_c07a_0), 49274 }, /* AND */ -{ CPUFUNC(op_c07b_3), 49275 }, /* AND */ +{ CPUFUNC(op_c07b_4), 49275 }, /* AND */ { CPUFUNC(op_c07c_0), 49276 }, /* AND */ { CPUFUNC(op_c080_0), 49280 }, /* AND */ { CPUFUNC(op_c090_0), 49296 }, /* AND */ { CPUFUNC(op_c098_0), 49304 }, /* AND */ { CPUFUNC(op_c0a0_0), 49312 }, /* AND */ { CPUFUNC(op_c0a8_0), 49320 }, /* AND */ -{ CPUFUNC(op_c0b0_3), 49328 }, /* AND */ +{ CPUFUNC(op_c0b0_4), 49328 }, /* AND */ { CPUFUNC(op_c0b8_0), 49336 }, /* AND */ { CPUFUNC(op_c0b9_0), 49337 }, /* AND */ { CPUFUNC(op_c0ba_0), 49338 }, /* AND */ -{ CPUFUNC(op_c0bb_3), 49339 }, /* AND */ +{ CPUFUNC(op_c0bb_4), 49339 }, /* AND */ { CPUFUNC(op_c0bc_0), 49340 }, /* AND */ { CPUFUNC(op_c0c0_0), 49344 }, /* MULU */ { CPUFUNC(op_c0d0_0), 49360 }, /* MULU */ { CPUFUNC(op_c0d8_0), 49368 }, /* MULU */ { CPUFUNC(op_c0e0_0), 49376 }, /* MULU */ { CPUFUNC(op_c0e8_0), 49384 }, /* MULU */ -{ CPUFUNC(op_c0f0_3), 49392 }, /* MULU */ +{ CPUFUNC(op_c0f0_4), 49392 }, /* MULU */ { CPUFUNC(op_c0f8_0), 49400 }, /* MULU */ { CPUFUNC(op_c0f9_0), 49401 }, /* MULU */ { CPUFUNC(op_c0fa_0), 49402 }, /* MULU */ -{ CPUFUNC(op_c0fb_3), 49403 }, /* MULU */ +{ CPUFUNC(op_c0fb_4), 49403 }, /* MULU */ { CPUFUNC(op_c0fc_0), 49404 }, /* MULU */ -{ CPUFUNC(op_c100_0), 49408 }, /* ABCD */ -{ CPUFUNC(op_c108_0), 49416 }, /* ABCD */ +{ CPUFUNC(op_c100_2), 49408 }, /* ABCD */ +{ CPUFUNC(op_c108_2), 49416 }, /* ABCD */ { CPUFUNC(op_c110_0), 49424 }, /* AND */ { CPUFUNC(op_c118_0), 49432 }, /* AND */ { CPUFUNC(op_c120_0), 49440 }, /* AND */ { CPUFUNC(op_c128_0), 49448 }, /* AND */ -{ CPUFUNC(op_c130_3), 49456 }, /* AND */ +{ CPUFUNC(op_c130_4), 49456 }, /* AND */ { CPUFUNC(op_c138_0), 49464 }, /* AND */ { CPUFUNC(op_c139_0), 49465 }, /* AND */ { CPUFUNC(op_c140_0), 49472 }, /* EXG */ @@ -9068,7 +9518,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_c158_0), 49496 }, /* AND */ { CPUFUNC(op_c160_0), 49504 }, /* AND */ { CPUFUNC(op_c168_0), 49512 }, /* AND */ -{ CPUFUNC(op_c170_3), 49520 }, /* AND */ +{ CPUFUNC(op_c170_4), 49520 }, /* AND */ { CPUFUNC(op_c178_0), 49528 }, /* AND */ { CPUFUNC(op_c179_0), 49529 }, /* AND */ { CPUFUNC(op_c188_0), 49544 }, /* EXG */ @@ -9076,7 +9526,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_c198_0), 49560 }, /* AND */ { CPUFUNC(op_c1a0_0), 49568 }, /* AND */ { CPUFUNC(op_c1a8_0), 49576 }, /* AND */ -{ CPUFUNC(op_c1b0_3), 49584 }, /* AND */ +{ CPUFUNC(op_c1b0_4), 49584 }, /* AND */ { CPUFUNC(op_c1b8_0), 49592 }, /* AND */ { CPUFUNC(op_c1b9_0), 49593 }, /* AND */ { CPUFUNC(op_c1c0_0), 49600 }, /* MULS */ @@ -9084,22 +9534,22 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_c1d8_0), 49624 }, /* MULS */ { CPUFUNC(op_c1e0_0), 49632 }, /* MULS */ { CPUFUNC(op_c1e8_0), 49640 }, /* MULS */ -{ CPUFUNC(op_c1f0_3), 49648 }, /* MULS */ +{ CPUFUNC(op_c1f0_4), 49648 }, /* MULS */ { CPUFUNC(op_c1f8_0), 49656 }, /* MULS */ { CPUFUNC(op_c1f9_0), 49657 }, /* MULS */ { CPUFUNC(op_c1fa_0), 49658 }, /* MULS */ -{ CPUFUNC(op_c1fb_3), 49659 }, /* MULS */ +{ CPUFUNC(op_c1fb_4), 49659 }, /* MULS */ { CPUFUNC(op_c1fc_0), 49660 }, /* MULS */ { CPUFUNC(op_d000_0), 53248 }, /* ADD */ { CPUFUNC(op_d010_0), 53264 }, /* ADD */ { CPUFUNC(op_d018_0), 53272 }, /* ADD */ { CPUFUNC(op_d020_0), 53280 }, /* ADD */ { CPUFUNC(op_d028_0), 53288 }, /* ADD */ -{ CPUFUNC(op_d030_3), 53296 }, /* ADD */ +{ CPUFUNC(op_d030_4), 53296 }, /* ADD */ { CPUFUNC(op_d038_0), 53304 }, /* ADD */ { CPUFUNC(op_d039_0), 53305 }, /* ADD */ { CPUFUNC(op_d03a_0), 53306 }, /* ADD */ -{ CPUFUNC(op_d03b_3), 53307 }, /* ADD */ +{ CPUFUNC(op_d03b_4), 53307 }, /* ADD */ { CPUFUNC(op_d03c_0), 53308 }, /* ADD */ { CPUFUNC(op_d040_0), 53312 }, /* ADD */ { CPUFUNC(op_d048_0), 53320 }, /* ADD */ @@ -9107,11 +9557,11 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_d058_0), 53336 }, /* ADD */ { CPUFUNC(op_d060_0), 53344 }, /* ADD */ { CPUFUNC(op_d068_0), 53352 }, /* ADD */ -{ CPUFUNC(op_d070_3), 53360 }, /* ADD */ +{ CPUFUNC(op_d070_4), 53360 }, /* ADD */ { CPUFUNC(op_d078_0), 53368 }, /* ADD */ { CPUFUNC(op_d079_0), 53369 }, /* ADD */ { CPUFUNC(op_d07a_0), 53370 }, /* ADD */ -{ CPUFUNC(op_d07b_3), 53371 }, /* ADD */ +{ CPUFUNC(op_d07b_4), 53371 }, /* ADD */ { CPUFUNC(op_d07c_0), 53372 }, /* ADD */ { CPUFUNC(op_d080_0), 53376 }, /* ADD */ { CPUFUNC(op_d088_0), 53384 }, /* ADD */ @@ -9119,11 +9569,11 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_d098_0), 53400 }, /* ADD */ { CPUFUNC(op_d0a0_0), 53408 }, /* ADD */ { CPUFUNC(op_d0a8_0), 53416 }, /* ADD */ -{ CPUFUNC(op_d0b0_3), 53424 }, /* ADD */ +{ CPUFUNC(op_d0b0_4), 53424 }, /* ADD */ { CPUFUNC(op_d0b8_0), 53432 }, /* ADD */ { CPUFUNC(op_d0b9_0), 53433 }, /* ADD */ { CPUFUNC(op_d0ba_0), 53434 }, /* ADD */ -{ CPUFUNC(op_d0bb_3), 53435 }, /* ADD */ +{ CPUFUNC(op_d0bb_4), 53435 }, /* ADD */ { CPUFUNC(op_d0bc_0), 53436 }, /* ADD */ { CPUFUNC(op_d0c0_0), 53440 }, /* ADDA */ { CPUFUNC(op_d0c8_0), 53448 }, /* ADDA */ @@ -9131,11 +9581,11 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_d0d8_0), 53464 }, /* ADDA */ { CPUFUNC(op_d0e0_0), 53472 }, /* ADDA */ { CPUFUNC(op_d0e8_0), 53480 }, /* ADDA */ -{ CPUFUNC(op_d0f0_3), 53488 }, /* ADDA */ +{ CPUFUNC(op_d0f0_4), 53488 }, /* ADDA */ { CPUFUNC(op_d0f8_0), 53496 }, /* ADDA */ { CPUFUNC(op_d0f9_0), 53497 }, /* ADDA */ { CPUFUNC(op_d0fa_0), 53498 }, /* ADDA */ -{ CPUFUNC(op_d0fb_3), 53499 }, /* ADDA */ +{ CPUFUNC(op_d0fb_4), 53499 }, /* ADDA */ { CPUFUNC(op_d0fc_0), 53500 }, /* ADDA */ { CPUFUNC(op_d100_0), 53504 }, /* ADDX */ { CPUFUNC(op_d108_0), 53512 }, /* ADDX */ @@ -9143,7 +9593,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_d118_0), 53528 }, /* ADD */ { CPUFUNC(op_d120_0), 53536 }, /* ADD */ { CPUFUNC(op_d128_0), 53544 }, /* ADD */ -{ CPUFUNC(op_d130_3), 53552 }, /* ADD */ +{ CPUFUNC(op_d130_4), 53552 }, /* ADD */ { CPUFUNC(op_d138_0), 53560 }, /* ADD */ { CPUFUNC(op_d139_0), 53561 }, /* ADD */ { CPUFUNC(op_d140_0), 53568 }, /* ADDX */ @@ -9152,7 +9602,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_d158_0), 53592 }, /* ADD */ { CPUFUNC(op_d160_0), 53600 }, /* ADD */ { CPUFUNC(op_d168_0), 53608 }, /* ADD */ -{ CPUFUNC(op_d170_3), 53616 }, /* ADD */ +{ CPUFUNC(op_d170_4), 53616 }, /* ADD */ { CPUFUNC(op_d178_0), 53624 }, /* ADD */ { CPUFUNC(op_d179_0), 53625 }, /* ADD */ { CPUFUNC(op_d180_0), 53632 }, /* ADDX */ @@ -9161,7 +9611,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_d198_0), 53656 }, /* ADD */ { CPUFUNC(op_d1a0_0), 53664 }, /* ADD */ { CPUFUNC(op_d1a8_0), 53672 }, /* ADD */ -{ CPUFUNC(op_d1b0_3), 53680 }, /* ADD */ +{ CPUFUNC(op_d1b0_4), 53680 }, /* ADD */ { CPUFUNC(op_d1b8_0), 53688 }, /* ADD */ { CPUFUNC(op_d1b9_0), 53689 }, /* ADD */ { CPUFUNC(op_d1c0_0), 53696 }, /* ADDA */ @@ -9170,11 +9620,11 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_d1d8_0), 53720 }, /* ADDA */ { CPUFUNC(op_d1e0_0), 53728 }, /* ADDA */ { CPUFUNC(op_d1e8_0), 53736 }, /* ADDA */ -{ CPUFUNC(op_d1f0_3), 53744 }, /* ADDA */ +{ CPUFUNC(op_d1f0_4), 53744 }, /* ADDA */ { CPUFUNC(op_d1f8_0), 53752 }, /* ADDA */ { CPUFUNC(op_d1f9_0), 53753 }, /* ADDA */ { CPUFUNC(op_d1fa_0), 53754 }, /* ADDA */ -{ CPUFUNC(op_d1fb_3), 53755 }, /* ADDA */ +{ CPUFUNC(op_d1fb_4), 53755 }, /* ADDA */ { CPUFUNC(op_d1fc_0), 53756 }, /* ADDA */ { CPUFUNC(op_e000_0), 57344 }, /* ASR */ { CPUFUNC(op_e008_0), 57352 }, /* LSR */ @@ -9204,7 +9654,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_e0d8_0), 57560 }, /* ASRW */ { CPUFUNC(op_e0e0_0), 57568 }, /* ASRW */ { CPUFUNC(op_e0e8_0), 57576 }, /* ASRW */ -{ CPUFUNC(op_e0f0_3), 57584 }, /* ASRW */ +{ CPUFUNC(op_e0f0_4), 57584 }, /* ASRW */ { CPUFUNC(op_e0f8_0), 57592 }, /* ASRW */ { CPUFUNC(op_e0f9_0), 57593 }, /* ASRW */ { CPUFUNC(op_e100_0), 57600 }, /* ASL */ @@ -9235,618 +9685,619 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_e1d8_0), 57816 }, /* ASLW */ { CPUFUNC(op_e1e0_0), 57824 }, /* ASLW */ { CPUFUNC(op_e1e8_0), 57832 }, /* ASLW */ -{ CPUFUNC(op_e1f0_3), 57840 }, /* ASLW */ +{ CPUFUNC(op_e1f0_4), 57840 }, /* ASLW */ { CPUFUNC(op_e1f8_0), 57848 }, /* ASLW */ { CPUFUNC(op_e1f9_0), 57849 }, /* ASLW */ { CPUFUNC(op_e2d0_0), 58064 }, /* LSRW */ { CPUFUNC(op_e2d8_0), 58072 }, /* LSRW */ { CPUFUNC(op_e2e0_0), 58080 }, /* LSRW */ { CPUFUNC(op_e2e8_0), 58088 }, /* LSRW */ -{ CPUFUNC(op_e2f0_3), 58096 }, /* LSRW */ +{ CPUFUNC(op_e2f0_4), 58096 }, /* LSRW */ { CPUFUNC(op_e2f8_0), 58104 }, /* LSRW */ { CPUFUNC(op_e2f9_0), 58105 }, /* LSRW */ { CPUFUNC(op_e3d0_0), 58320 }, /* LSLW */ { CPUFUNC(op_e3d8_0), 58328 }, /* LSLW */ { CPUFUNC(op_e3e0_0), 58336 }, /* LSLW */ { CPUFUNC(op_e3e8_0), 58344 }, /* LSLW */ -{ CPUFUNC(op_e3f0_3), 58352 }, /* LSLW */ +{ CPUFUNC(op_e3f0_4), 58352 }, /* LSLW */ { CPUFUNC(op_e3f8_0), 58360 }, /* LSLW */ { CPUFUNC(op_e3f9_0), 58361 }, /* LSLW */ { CPUFUNC(op_e4d0_0), 58576 }, /* ROXRW */ { CPUFUNC(op_e4d8_0), 58584 }, /* ROXRW */ { CPUFUNC(op_e4e0_0), 58592 }, /* ROXRW */ { CPUFUNC(op_e4e8_0), 58600 }, /* ROXRW */ -{ CPUFUNC(op_e4f0_3), 58608 }, /* ROXRW */ +{ CPUFUNC(op_e4f0_4), 58608 }, /* ROXRW */ { CPUFUNC(op_e4f8_0), 58616 }, /* ROXRW */ { CPUFUNC(op_e4f9_0), 58617 }, /* ROXRW */ { CPUFUNC(op_e5d0_0), 58832 }, /* ROXLW */ { CPUFUNC(op_e5d8_0), 58840 }, /* ROXLW */ { CPUFUNC(op_e5e0_0), 58848 }, /* ROXLW */ { CPUFUNC(op_e5e8_0), 58856 }, /* ROXLW */ -{ CPUFUNC(op_e5f0_3), 58864 }, /* ROXLW */ +{ CPUFUNC(op_e5f0_4), 58864 }, /* ROXLW */ { CPUFUNC(op_e5f8_0), 58872 }, /* ROXLW */ { CPUFUNC(op_e5f9_0), 58873 }, /* ROXLW */ { CPUFUNC(op_e6d0_0), 59088 }, /* RORW */ { CPUFUNC(op_e6d8_0), 59096 }, /* RORW */ { CPUFUNC(op_e6e0_0), 59104 }, /* RORW */ { CPUFUNC(op_e6e8_0), 59112 }, /* RORW */ -{ CPUFUNC(op_e6f0_3), 59120 }, /* RORW */ +{ CPUFUNC(op_e6f0_4), 59120 }, /* RORW */ { CPUFUNC(op_e6f8_0), 59128 }, /* RORW */ { CPUFUNC(op_e6f9_0), 59129 }, /* RORW */ { CPUFUNC(op_e7d0_0), 59344 }, /* ROLW */ { CPUFUNC(op_e7d8_0), 59352 }, /* ROLW */ { CPUFUNC(op_e7e0_0), 59360 }, /* ROLW */ { CPUFUNC(op_e7e8_0), 59368 }, /* ROLW */ -{ CPUFUNC(op_e7f0_3), 59376 }, /* ROLW */ +{ CPUFUNC(op_e7f0_4), 59376 }, /* ROLW */ { CPUFUNC(op_e7f8_0), 59384 }, /* ROLW */ { CPUFUNC(op_e7f9_0), 59385 }, /* ROLW */ { 0, 0 }}; -#ifdef CPUEMU_5 +#endif /* CPUEMU_68000_ONLY */ +#ifndef CPUEMU_68000_ONLY const struct cputbl CPUFUNC(op_smalltbl_5)[] = { -{ CPUFUNC(op_0000_5), 0 }, /* OR */ -{ CPUFUNC(op_0010_5), 16 }, /* OR */ -{ CPUFUNC(op_0018_5), 24 }, /* OR */ -{ CPUFUNC(op_0020_5), 32 }, /* OR */ -{ CPUFUNC(op_0028_5), 40 }, /* OR */ -{ CPUFUNC(op_0030_5), 48 }, /* OR */ -{ CPUFUNC(op_0038_5), 56 }, /* OR */ -{ CPUFUNC(op_0039_5), 57 }, /* OR */ -{ CPUFUNC(op_003c_5), 60 }, /* ORSR */ -{ CPUFUNC(op_0040_5), 64 }, /* OR */ -{ CPUFUNC(op_0050_5), 80 }, /* OR */ -{ CPUFUNC(op_0058_5), 88 }, /* OR */ -{ CPUFUNC(op_0060_5), 96 }, /* OR */ -{ CPUFUNC(op_0068_5), 104 }, /* OR */ -{ CPUFUNC(op_0070_5), 112 }, /* OR */ -{ CPUFUNC(op_0078_5), 120 }, /* OR */ -{ CPUFUNC(op_0079_5), 121 }, /* OR */ -{ CPUFUNC(op_007c_5), 124 }, /* ORSR */ -{ CPUFUNC(op_0080_5), 128 }, /* OR */ -{ CPUFUNC(op_0090_5), 144 }, /* OR */ -{ CPUFUNC(op_0098_5), 152 }, /* OR */ -{ CPUFUNC(op_00a0_5), 160 }, /* OR */ -{ CPUFUNC(op_00a8_5), 168 }, /* OR */ -{ CPUFUNC(op_00b0_5), 176 }, /* OR */ -{ CPUFUNC(op_00b8_5), 184 }, /* OR */ -{ CPUFUNC(op_00b9_5), 185 }, /* OR */ -{ CPUFUNC(op_0100_5), 256 }, /* BTST */ -{ CPUFUNC(op_0108_5), 264 }, /* MVPMR */ -{ CPUFUNC(op_0110_5), 272 }, /* BTST */ -{ CPUFUNC(op_0118_5), 280 }, /* BTST */ -{ CPUFUNC(op_0120_5), 288 }, /* BTST */ -{ CPUFUNC(op_0128_5), 296 }, /* BTST */ -{ CPUFUNC(op_0130_5), 304 }, /* BTST */ -{ CPUFUNC(op_0138_5), 312 }, /* BTST */ -{ CPUFUNC(op_0139_5), 313 }, /* BTST */ -{ CPUFUNC(op_013a_5), 314 }, /* BTST */ -{ CPUFUNC(op_013b_5), 315 }, /* BTST */ -{ CPUFUNC(op_013c_5), 316 }, /* BTST */ -{ CPUFUNC(op_0140_5), 320 }, /* BCHG */ -{ CPUFUNC(op_0148_5), 328 }, /* MVPMR */ -{ CPUFUNC(op_0150_5), 336 }, /* BCHG */ -{ CPUFUNC(op_0158_5), 344 }, /* BCHG */ -{ CPUFUNC(op_0160_5), 352 }, /* BCHG */ -{ CPUFUNC(op_0168_5), 360 }, /* BCHG */ -{ CPUFUNC(op_0170_5), 368 }, /* BCHG */ -{ CPUFUNC(op_0178_5), 376 }, /* BCHG */ -{ CPUFUNC(op_0179_5), 377 }, /* BCHG */ -{ CPUFUNC(op_017a_5), 378 }, /* BCHG */ -{ CPUFUNC(op_017b_5), 379 }, /* BCHG */ -{ CPUFUNC(op_0180_5), 384 }, /* BCLR */ -{ CPUFUNC(op_0188_5), 392 }, /* MVPRM */ -{ CPUFUNC(op_0190_5), 400 }, /* BCLR */ -{ CPUFUNC(op_0198_5), 408 }, /* BCLR */ -{ CPUFUNC(op_01a0_5), 416 }, /* BCLR */ -{ CPUFUNC(op_01a8_5), 424 }, /* BCLR */ -{ CPUFUNC(op_01b0_5), 432 }, /* BCLR */ -{ CPUFUNC(op_01b8_5), 440 }, /* BCLR */ -{ CPUFUNC(op_01b9_5), 441 }, /* BCLR */ -{ CPUFUNC(op_01ba_5), 442 }, /* BCLR */ -{ CPUFUNC(op_01bb_5), 443 }, /* BCLR */ -{ CPUFUNC(op_01c0_5), 448 }, /* BSET */ -{ CPUFUNC(op_01c8_5), 456 }, /* MVPRM */ -{ CPUFUNC(op_01d0_5), 464 }, /* BSET */ -{ CPUFUNC(op_01d8_5), 472 }, /* BSET */ -{ CPUFUNC(op_01e0_5), 480 }, /* BSET */ -{ CPUFUNC(op_01e8_5), 488 }, /* BSET */ -{ CPUFUNC(op_01f0_5), 496 }, /* BSET */ -{ CPUFUNC(op_01f8_5), 504 }, /* BSET */ -{ CPUFUNC(op_01f9_5), 505 }, /* BSET */ -{ CPUFUNC(op_01fa_5), 506 }, /* BSET */ -{ CPUFUNC(op_01fb_5), 507 }, /* BSET */ -{ CPUFUNC(op_0200_5), 512 }, /* AND */ -{ CPUFUNC(op_0210_5), 528 }, /* AND */ -{ CPUFUNC(op_0218_5), 536 }, /* AND */ -{ CPUFUNC(op_0220_5), 544 }, /* AND */ -{ CPUFUNC(op_0228_5), 552 }, /* AND */ -{ CPUFUNC(op_0230_5), 560 }, /* AND */ -{ CPUFUNC(op_0238_5), 568 }, /* AND */ -{ CPUFUNC(op_0239_5), 569 }, /* AND */ -{ CPUFUNC(op_023c_5), 572 }, /* ANDSR */ -{ CPUFUNC(op_0240_5), 576 }, /* AND */ -{ CPUFUNC(op_0250_5), 592 }, /* AND */ -{ CPUFUNC(op_0258_5), 600 }, /* AND */ -{ CPUFUNC(op_0260_5), 608 }, /* AND */ -{ CPUFUNC(op_0268_5), 616 }, /* AND */ -{ CPUFUNC(op_0270_5), 624 }, /* AND */ -{ CPUFUNC(op_0278_5), 632 }, /* AND */ -{ CPUFUNC(op_0279_5), 633 }, /* AND */ -{ CPUFUNC(op_027c_5), 636 }, /* ANDSR */ -{ CPUFUNC(op_0280_5), 640 }, /* AND */ -{ CPUFUNC(op_0290_5), 656 }, /* AND */ -{ CPUFUNC(op_0298_5), 664 }, /* AND */ -{ CPUFUNC(op_02a0_5), 672 }, /* AND */ -{ CPUFUNC(op_02a8_5), 680 }, /* AND */ -{ CPUFUNC(op_02b0_5), 688 }, /* AND */ -{ CPUFUNC(op_02b8_5), 696 }, /* AND */ -{ CPUFUNC(op_02b9_5), 697 }, /* AND */ -{ CPUFUNC(op_0400_5), 1024 }, /* SUB */ -{ CPUFUNC(op_0410_5), 1040 }, /* SUB */ -{ CPUFUNC(op_0418_5), 1048 }, /* SUB */ -{ CPUFUNC(op_0420_5), 1056 }, /* SUB */ -{ CPUFUNC(op_0428_5), 1064 }, /* SUB */ -{ CPUFUNC(op_0430_5), 1072 }, /* SUB */ -{ CPUFUNC(op_0438_5), 1080 }, /* SUB */ -{ CPUFUNC(op_0439_5), 1081 }, /* SUB */ -{ CPUFUNC(op_0440_5), 1088 }, /* SUB */ -{ CPUFUNC(op_0450_5), 1104 }, /* SUB */ -{ CPUFUNC(op_0458_5), 1112 }, /* SUB */ -{ CPUFUNC(op_0460_5), 1120 }, /* SUB */ -{ CPUFUNC(op_0468_5), 1128 }, /* SUB */ -{ CPUFUNC(op_0470_5), 1136 }, /* SUB */ -{ CPUFUNC(op_0478_5), 1144 }, /* SUB */ -{ CPUFUNC(op_0479_5), 1145 }, /* SUB */ -{ CPUFUNC(op_0480_5), 1152 }, /* SUB */ -{ CPUFUNC(op_0490_5), 1168 }, /* SUB */ -{ CPUFUNC(op_0498_5), 1176 }, /* SUB */ -{ CPUFUNC(op_04a0_5), 1184 }, /* SUB */ -{ CPUFUNC(op_04a8_5), 1192 }, /* SUB */ -{ CPUFUNC(op_04b0_5), 1200 }, /* SUB */ -{ CPUFUNC(op_04b8_5), 1208 }, /* SUB */ -{ CPUFUNC(op_04b9_5), 1209 }, /* SUB */ -{ CPUFUNC(op_0600_5), 1536 }, /* ADD */ -{ CPUFUNC(op_0610_5), 1552 }, /* ADD */ -{ CPUFUNC(op_0618_5), 1560 }, /* ADD */ -{ CPUFUNC(op_0620_5), 1568 }, /* ADD */ -{ CPUFUNC(op_0628_5), 1576 }, /* ADD */ -{ CPUFUNC(op_0630_5), 1584 }, /* ADD */ -{ CPUFUNC(op_0638_5), 1592 }, /* ADD */ -{ CPUFUNC(op_0639_5), 1593 }, /* ADD */ -{ CPUFUNC(op_0640_5), 1600 }, /* ADD */ -{ CPUFUNC(op_0650_5), 1616 }, /* ADD */ -{ CPUFUNC(op_0658_5), 1624 }, /* ADD */ -{ CPUFUNC(op_0660_5), 1632 }, /* ADD */ -{ CPUFUNC(op_0668_5), 1640 }, /* ADD */ -{ CPUFUNC(op_0670_5), 1648 }, /* ADD */ -{ CPUFUNC(op_0678_5), 1656 }, /* ADD */ -{ CPUFUNC(op_0679_5), 1657 }, /* ADD */ -{ CPUFUNC(op_0680_5), 1664 }, /* ADD */ -{ CPUFUNC(op_0690_5), 1680 }, /* ADD */ -{ CPUFUNC(op_0698_5), 1688 }, /* ADD */ -{ CPUFUNC(op_06a0_5), 1696 }, /* ADD */ -{ CPUFUNC(op_06a8_5), 1704 }, /* ADD */ -{ CPUFUNC(op_06b0_5), 1712 }, /* ADD */ -{ CPUFUNC(op_06b8_5), 1720 }, /* ADD */ -{ CPUFUNC(op_06b9_5), 1721 }, /* ADD */ -{ CPUFUNC(op_0800_5), 2048 }, /* BTST */ -{ CPUFUNC(op_0810_5), 2064 }, /* BTST */ -{ CPUFUNC(op_0818_5), 2072 }, /* BTST */ -{ CPUFUNC(op_0820_5), 2080 }, /* BTST */ -{ CPUFUNC(op_0828_5), 2088 }, /* BTST */ -{ CPUFUNC(op_0830_5), 2096 }, /* BTST */ -{ CPUFUNC(op_0838_5), 2104 }, /* BTST */ -{ CPUFUNC(op_0839_5), 2105 }, /* BTST */ -{ CPUFUNC(op_083a_5), 2106 }, /* BTST */ -{ CPUFUNC(op_083b_5), 2107 }, /* BTST */ -{ CPUFUNC(op_083c_5), 2108 }, /* BTST */ -{ CPUFUNC(op_0840_5), 2112 }, /* BCHG */ -{ CPUFUNC(op_0850_5), 2128 }, /* BCHG */ -{ CPUFUNC(op_0858_5), 2136 }, /* BCHG */ -{ CPUFUNC(op_0860_5), 2144 }, /* BCHG */ -{ CPUFUNC(op_0868_5), 2152 }, /* BCHG */ -{ CPUFUNC(op_0870_5), 2160 }, /* BCHG */ -{ CPUFUNC(op_0878_5), 2168 }, /* BCHG */ -{ CPUFUNC(op_0879_5), 2169 }, /* BCHG */ -{ CPUFUNC(op_087a_5), 2170 }, /* BCHG */ -{ CPUFUNC(op_087b_5), 2171 }, /* BCHG */ -{ CPUFUNC(op_0880_5), 2176 }, /* BCLR */ -{ CPUFUNC(op_0890_5), 2192 }, /* BCLR */ -{ CPUFUNC(op_0898_5), 2200 }, /* BCLR */ -{ CPUFUNC(op_08a0_5), 2208 }, /* BCLR */ -{ CPUFUNC(op_08a8_5), 2216 }, /* BCLR */ -{ CPUFUNC(op_08b0_5), 2224 }, /* BCLR */ -{ CPUFUNC(op_08b8_5), 2232 }, /* BCLR */ -{ CPUFUNC(op_08b9_5), 2233 }, /* BCLR */ -{ CPUFUNC(op_08ba_5), 2234 }, /* BCLR */ -{ CPUFUNC(op_08bb_5), 2235 }, /* BCLR */ -{ CPUFUNC(op_08c0_5), 2240 }, /* BSET */ -{ CPUFUNC(op_08d0_5), 2256 }, /* BSET */ -{ CPUFUNC(op_08d8_5), 2264 }, /* BSET */ -{ CPUFUNC(op_08e0_5), 2272 }, /* BSET */ -{ CPUFUNC(op_08e8_5), 2280 }, /* BSET */ -{ CPUFUNC(op_08f0_5), 2288 }, /* BSET */ -{ CPUFUNC(op_08f8_5), 2296 }, /* BSET */ -{ CPUFUNC(op_08f9_5), 2297 }, /* BSET */ -{ CPUFUNC(op_08fa_5), 2298 }, /* BSET */ -{ CPUFUNC(op_08fb_5), 2299 }, /* BSET */ -{ CPUFUNC(op_0a00_5), 2560 }, /* EOR */ -{ CPUFUNC(op_0a10_5), 2576 }, /* EOR */ -{ CPUFUNC(op_0a18_5), 2584 }, /* EOR */ -{ CPUFUNC(op_0a20_5), 2592 }, /* EOR */ -{ CPUFUNC(op_0a28_5), 2600 }, /* EOR */ -{ CPUFUNC(op_0a30_5), 2608 }, /* EOR */ -{ CPUFUNC(op_0a38_5), 2616 }, /* EOR */ -{ CPUFUNC(op_0a39_5), 2617 }, /* EOR */ -{ CPUFUNC(op_0a3c_5), 2620 }, /* EORSR */ -{ CPUFUNC(op_0a40_5), 2624 }, /* EOR */ -{ CPUFUNC(op_0a50_5), 2640 }, /* EOR */ -{ CPUFUNC(op_0a58_5), 2648 }, /* EOR */ -{ CPUFUNC(op_0a60_5), 2656 }, /* EOR */ -{ CPUFUNC(op_0a68_5), 2664 }, /* EOR */ -{ CPUFUNC(op_0a70_5), 2672 }, /* EOR */ -{ CPUFUNC(op_0a78_5), 2680 }, /* EOR */ -{ CPUFUNC(op_0a79_5), 2681 }, /* EOR */ -{ CPUFUNC(op_0a7c_5), 2684 }, /* EORSR */ -{ CPUFUNC(op_0a80_5), 2688 }, /* EOR */ -{ CPUFUNC(op_0a90_5), 2704 }, /* EOR */ -{ CPUFUNC(op_0a98_5), 2712 }, /* EOR */ -{ CPUFUNC(op_0aa0_5), 2720 }, /* EOR */ -{ CPUFUNC(op_0aa8_5), 2728 }, /* EOR */ -{ CPUFUNC(op_0ab0_5), 2736 }, /* EOR */ -{ CPUFUNC(op_0ab8_5), 2744 }, /* EOR */ -{ CPUFUNC(op_0ab9_5), 2745 }, /* EOR */ -{ CPUFUNC(op_0c00_5), 3072 }, /* CMP */ -{ CPUFUNC(op_0c10_5), 3088 }, /* CMP */ -{ CPUFUNC(op_0c18_5), 3096 }, /* CMP */ -{ CPUFUNC(op_0c20_5), 3104 }, /* CMP */ -{ CPUFUNC(op_0c28_5), 3112 }, /* CMP */ -{ CPUFUNC(op_0c30_5), 3120 }, /* CMP */ -{ CPUFUNC(op_0c38_5), 3128 }, /* CMP */ -{ CPUFUNC(op_0c39_5), 3129 }, /* CMP */ -{ CPUFUNC(op_0c40_5), 3136 }, /* CMP */ -{ CPUFUNC(op_0c50_5), 3152 }, /* CMP */ -{ CPUFUNC(op_0c58_5), 3160 }, /* CMP */ -{ CPUFUNC(op_0c60_5), 3168 }, /* CMP */ -{ CPUFUNC(op_0c68_5), 3176 }, /* CMP */ -{ CPUFUNC(op_0c70_5), 3184 }, /* CMP */ -{ CPUFUNC(op_0c78_5), 3192 }, /* CMP */ -{ CPUFUNC(op_0c79_5), 3193 }, /* CMP */ -{ CPUFUNC(op_0c80_5), 3200 }, /* CMP */ -{ CPUFUNC(op_0c90_5), 3216 }, /* CMP */ -{ CPUFUNC(op_0c98_5), 3224 }, /* CMP */ -{ CPUFUNC(op_0ca0_5), 3232 }, /* CMP */ -{ CPUFUNC(op_0ca8_5), 3240 }, /* CMP */ -{ CPUFUNC(op_0cb0_5), 3248 }, /* CMP */ -{ CPUFUNC(op_0cb8_5), 3256 }, /* CMP */ -{ CPUFUNC(op_0cb9_5), 3257 }, /* CMP */ -{ CPUFUNC(op_1000_5), 4096 }, /* MOVE */ -{ CPUFUNC(op_1010_5), 4112 }, /* MOVE */ -{ CPUFUNC(op_1018_5), 4120 }, /* MOVE */ -{ CPUFUNC(op_1020_5), 4128 }, /* MOVE */ -{ CPUFUNC(op_1028_5), 4136 }, /* MOVE */ -{ CPUFUNC(op_1030_5), 4144 }, /* MOVE */ -{ CPUFUNC(op_1038_5), 4152 }, /* MOVE */ -{ CPUFUNC(op_1039_5), 4153 }, /* MOVE */ -{ CPUFUNC(op_103a_5), 4154 }, /* MOVE */ -{ CPUFUNC(op_103b_5), 4155 }, /* MOVE */ -{ CPUFUNC(op_103c_5), 4156 }, /* MOVE */ -{ CPUFUNC(op_1080_5), 4224 }, /* MOVE */ -{ CPUFUNC(op_1090_5), 4240 }, /* MOVE */ -{ CPUFUNC(op_1098_5), 4248 }, /* MOVE */ -{ CPUFUNC(op_10a0_5), 4256 }, /* MOVE */ -{ CPUFUNC(op_10a8_5), 4264 }, /* MOVE */ -{ CPUFUNC(op_10b0_5), 4272 }, /* MOVE */ -{ CPUFUNC(op_10b8_5), 4280 }, /* MOVE */ -{ CPUFUNC(op_10b9_5), 4281 }, /* MOVE */ -{ CPUFUNC(op_10ba_5), 4282 }, /* MOVE */ -{ CPUFUNC(op_10bb_5), 4283 }, /* MOVE */ -{ CPUFUNC(op_10bc_5), 4284 }, /* MOVE */ -{ CPUFUNC(op_10c0_5), 4288 }, /* MOVE */ -{ CPUFUNC(op_10d0_5), 4304 }, /* MOVE */ -{ CPUFUNC(op_10d8_5), 4312 }, /* MOVE */ -{ CPUFUNC(op_10e0_5), 4320 }, /* MOVE */ -{ CPUFUNC(op_10e8_5), 4328 }, /* MOVE */ -{ CPUFUNC(op_10f0_5), 4336 }, /* MOVE */ -{ CPUFUNC(op_10f8_5), 4344 }, /* MOVE */ -{ CPUFUNC(op_10f9_5), 4345 }, /* MOVE */ -{ CPUFUNC(op_10fa_5), 4346 }, /* MOVE */ -{ CPUFUNC(op_10fb_5), 4347 }, /* MOVE */ -{ CPUFUNC(op_10fc_5), 4348 }, /* MOVE */ -{ CPUFUNC(op_1100_5), 4352 }, /* MOVE */ -{ CPUFUNC(op_1110_5), 4368 }, /* MOVE */ -{ CPUFUNC(op_1118_5), 4376 }, /* MOVE */ -{ CPUFUNC(op_1120_5), 4384 }, /* MOVE */ -{ CPUFUNC(op_1128_5), 4392 }, /* MOVE */ -{ CPUFUNC(op_1130_5), 4400 }, /* MOVE */ -{ CPUFUNC(op_1138_5), 4408 }, /* MOVE */ -{ CPUFUNC(op_1139_5), 4409 }, /* MOVE */ -{ CPUFUNC(op_113a_5), 4410 }, /* MOVE */ -{ CPUFUNC(op_113b_5), 4411 }, /* MOVE */ -{ CPUFUNC(op_113c_5), 4412 }, /* MOVE */ -{ CPUFUNC(op_1140_5), 4416 }, /* MOVE */ -{ CPUFUNC(op_1150_5), 4432 }, /* MOVE */ -{ CPUFUNC(op_1158_5), 4440 }, /* MOVE */ -{ CPUFUNC(op_1160_5), 4448 }, /* MOVE */ -{ CPUFUNC(op_1168_5), 4456 }, /* MOVE */ -{ CPUFUNC(op_1170_5), 4464 }, /* MOVE */ -{ CPUFUNC(op_1178_5), 4472 }, /* MOVE */ -{ CPUFUNC(op_1179_5), 4473 }, /* MOVE */ -{ CPUFUNC(op_117a_5), 4474 }, /* MOVE */ -{ CPUFUNC(op_117b_5), 4475 }, /* MOVE */ -{ CPUFUNC(op_117c_5), 4476 }, /* MOVE */ -{ CPUFUNC(op_1180_5), 4480 }, /* MOVE */ -{ CPUFUNC(op_1190_5), 4496 }, /* MOVE */ -{ CPUFUNC(op_1198_5), 4504 }, /* MOVE */ -{ CPUFUNC(op_11a0_5), 4512 }, /* MOVE */ -{ CPUFUNC(op_11a8_5), 4520 }, /* MOVE */ -{ CPUFUNC(op_11b0_5), 4528 }, /* MOVE */ -{ CPUFUNC(op_11b8_5), 4536 }, /* MOVE */ -{ CPUFUNC(op_11b9_5), 4537 }, /* MOVE */ -{ CPUFUNC(op_11ba_5), 4538 }, /* MOVE */ -{ CPUFUNC(op_11bb_5), 4539 }, /* MOVE */ -{ CPUFUNC(op_11bc_5), 4540 }, /* MOVE */ -{ CPUFUNC(op_11c0_5), 4544 }, /* MOVE */ -{ CPUFUNC(op_11d0_5), 4560 }, /* MOVE */ -{ CPUFUNC(op_11d8_5), 4568 }, /* MOVE */ -{ CPUFUNC(op_11e0_5), 4576 }, /* MOVE */ -{ CPUFUNC(op_11e8_5), 4584 }, /* MOVE */ -{ CPUFUNC(op_11f0_5), 4592 }, /* MOVE */ -{ CPUFUNC(op_11f8_5), 4600 }, /* MOVE */ -{ CPUFUNC(op_11f9_5), 4601 }, /* MOVE */ -{ CPUFUNC(op_11fa_5), 4602 }, /* MOVE */ -{ CPUFUNC(op_11fb_5), 4603 }, /* MOVE */ -{ CPUFUNC(op_11fc_5), 4604 }, /* MOVE */ -{ CPUFUNC(op_13c0_5), 5056 }, /* MOVE */ -{ CPUFUNC(op_13d0_5), 5072 }, /* MOVE */ -{ CPUFUNC(op_13d8_5), 5080 }, /* MOVE */ -{ CPUFUNC(op_13e0_5), 5088 }, /* MOVE */ -{ CPUFUNC(op_13e8_5), 5096 }, /* MOVE */ -{ CPUFUNC(op_13f0_5), 5104 }, /* MOVE */ -{ CPUFUNC(op_13f8_5), 5112 }, /* MOVE */ -{ CPUFUNC(op_13f9_5), 5113 }, /* MOVE */ -{ CPUFUNC(op_13fa_5), 5114 }, /* MOVE */ -{ CPUFUNC(op_13fb_5), 5115 }, /* MOVE */ -{ CPUFUNC(op_13fc_5), 5116 }, /* MOVE */ -{ CPUFUNC(op_2000_5), 8192 }, /* MOVE */ -{ CPUFUNC(op_2008_5), 8200 }, /* MOVE */ -{ CPUFUNC(op_2010_5), 8208 }, /* MOVE */ -{ CPUFUNC(op_2018_5), 8216 }, /* MOVE */ -{ CPUFUNC(op_2020_5), 8224 }, /* MOVE */ -{ CPUFUNC(op_2028_5), 8232 }, /* MOVE */ -{ CPUFUNC(op_2030_5), 8240 }, /* MOVE */ -{ CPUFUNC(op_2038_5), 8248 }, /* MOVE */ -{ CPUFUNC(op_2039_5), 8249 }, /* MOVE */ -{ CPUFUNC(op_203a_5), 8250 }, /* MOVE */ -{ CPUFUNC(op_203b_5), 8251 }, /* MOVE */ -{ CPUFUNC(op_203c_5), 8252 }, /* MOVE */ -{ CPUFUNC(op_2040_5), 8256 }, /* MOVEA */ -{ CPUFUNC(op_2048_5), 8264 }, /* MOVEA */ -{ CPUFUNC(op_2050_5), 8272 }, /* MOVEA */ -{ CPUFUNC(op_2058_5), 8280 }, /* MOVEA */ -{ CPUFUNC(op_2060_5), 8288 }, /* MOVEA */ -{ CPUFUNC(op_2068_5), 8296 }, /* MOVEA */ -{ CPUFUNC(op_2070_5), 8304 }, /* MOVEA */ -{ CPUFUNC(op_2078_5), 8312 }, /* MOVEA */ -{ CPUFUNC(op_2079_5), 8313 }, /* MOVEA */ -{ CPUFUNC(op_207a_5), 8314 }, /* MOVEA */ -{ CPUFUNC(op_207b_5), 8315 }, /* MOVEA */ -{ CPUFUNC(op_207c_5), 8316 }, /* MOVEA */ -{ CPUFUNC(op_2080_5), 8320 }, /* MOVE */ -{ CPUFUNC(op_2088_5), 8328 }, /* MOVE */ -{ CPUFUNC(op_2090_5), 8336 }, /* MOVE */ -{ CPUFUNC(op_2098_5), 8344 }, /* MOVE */ -{ CPUFUNC(op_20a0_5), 8352 }, /* MOVE */ -{ CPUFUNC(op_20a8_5), 8360 }, /* MOVE */ -{ CPUFUNC(op_20b0_5), 8368 }, /* MOVE */ -{ CPUFUNC(op_20b8_5), 8376 }, /* MOVE */ -{ CPUFUNC(op_20b9_5), 8377 }, /* MOVE */ -{ CPUFUNC(op_20ba_5), 8378 }, /* MOVE */ -{ CPUFUNC(op_20bb_5), 8379 }, /* MOVE */ -{ CPUFUNC(op_20bc_5), 8380 }, /* MOVE */ -{ CPUFUNC(op_20c0_5), 8384 }, /* MOVE */ -{ CPUFUNC(op_20c8_5), 8392 }, /* MOVE */ -{ CPUFUNC(op_20d0_5), 8400 }, /* MOVE */ -{ CPUFUNC(op_20d8_5), 8408 }, /* MOVE */ -{ CPUFUNC(op_20e0_5), 8416 }, /* MOVE */ -{ CPUFUNC(op_20e8_5), 8424 }, /* MOVE */ -{ CPUFUNC(op_20f0_5), 8432 }, /* MOVE */ -{ CPUFUNC(op_20f8_5), 8440 }, /* MOVE */ -{ CPUFUNC(op_20f9_5), 8441 }, /* MOVE */ -{ CPUFUNC(op_20fa_5), 8442 }, /* MOVE */ -{ CPUFUNC(op_20fb_5), 8443 }, /* MOVE */ -{ CPUFUNC(op_20fc_5), 8444 }, /* MOVE */ -{ CPUFUNC(op_2100_5), 8448 }, /* MOVE */ -{ CPUFUNC(op_2108_5), 8456 }, /* MOVE */ -{ CPUFUNC(op_2110_5), 8464 }, /* MOVE */ -{ CPUFUNC(op_2118_5), 8472 }, /* MOVE */ -{ CPUFUNC(op_2120_5), 8480 }, /* MOVE */ -{ CPUFUNC(op_2128_5), 8488 }, /* MOVE */ -{ CPUFUNC(op_2130_5), 8496 }, /* MOVE */ -{ CPUFUNC(op_2138_5), 8504 }, /* MOVE */ -{ CPUFUNC(op_2139_5), 8505 }, /* MOVE */ -{ CPUFUNC(op_213a_5), 8506 }, /* MOVE */ -{ CPUFUNC(op_213b_5), 8507 }, /* MOVE */ -{ CPUFUNC(op_213c_5), 8508 }, /* MOVE */ -{ CPUFUNC(op_2140_5), 8512 }, /* MOVE */ -{ CPUFUNC(op_2148_5), 8520 }, /* MOVE */ -{ CPUFUNC(op_2150_5), 8528 }, /* MOVE */ -{ CPUFUNC(op_2158_5), 8536 }, /* MOVE */ -{ CPUFUNC(op_2160_5), 8544 }, /* MOVE */ -{ CPUFUNC(op_2168_5), 8552 }, /* MOVE */ -{ CPUFUNC(op_2170_5), 8560 }, /* MOVE */ -{ CPUFUNC(op_2178_5), 8568 }, /* MOVE */ -{ CPUFUNC(op_2179_5), 8569 }, /* MOVE */ -{ CPUFUNC(op_217a_5), 8570 }, /* MOVE */ -{ CPUFUNC(op_217b_5), 8571 }, /* MOVE */ -{ CPUFUNC(op_217c_5), 8572 }, /* MOVE */ -{ CPUFUNC(op_2180_5), 8576 }, /* MOVE */ -{ CPUFUNC(op_2188_5), 8584 }, /* MOVE */ -{ CPUFUNC(op_2190_5), 8592 }, /* MOVE */ -{ CPUFUNC(op_2198_5), 8600 }, /* MOVE */ -{ CPUFUNC(op_21a0_5), 8608 }, /* MOVE */ -{ CPUFUNC(op_21a8_5), 8616 }, /* MOVE */ -{ CPUFUNC(op_21b0_5), 8624 }, /* MOVE */ -{ CPUFUNC(op_21b8_5), 8632 }, /* MOVE */ -{ CPUFUNC(op_21b9_5), 8633 }, /* MOVE */ -{ CPUFUNC(op_21ba_5), 8634 }, /* MOVE */ -{ CPUFUNC(op_21bb_5), 8635 }, /* MOVE */ -{ CPUFUNC(op_21bc_5), 8636 }, /* MOVE */ -{ CPUFUNC(op_21c0_5), 8640 }, /* MOVE */ -{ CPUFUNC(op_21c8_5), 8648 }, /* MOVE */ -{ CPUFUNC(op_21d0_5), 8656 }, /* MOVE */ -{ CPUFUNC(op_21d8_5), 8664 }, /* MOVE */ -{ CPUFUNC(op_21e0_5), 8672 }, /* MOVE */ -{ CPUFUNC(op_21e8_5), 8680 }, /* MOVE */ -{ CPUFUNC(op_21f0_5), 8688 }, /* MOVE */ -{ CPUFUNC(op_21f8_5), 8696 }, /* MOVE */ -{ CPUFUNC(op_21f9_5), 8697 }, /* MOVE */ -{ CPUFUNC(op_21fa_5), 8698 }, /* MOVE */ -{ CPUFUNC(op_21fb_5), 8699 }, /* MOVE */ -{ CPUFUNC(op_21fc_5), 8700 }, /* MOVE */ -{ CPUFUNC(op_23c0_5), 9152 }, /* MOVE */ -{ CPUFUNC(op_23c8_5), 9160 }, /* MOVE */ -{ CPUFUNC(op_23d0_5), 9168 }, /* MOVE */ -{ CPUFUNC(op_23d8_5), 9176 }, /* MOVE */ -{ CPUFUNC(op_23e0_5), 9184 }, /* MOVE */ -{ CPUFUNC(op_23e8_5), 9192 }, /* MOVE */ -{ CPUFUNC(op_23f0_5), 9200 }, /* MOVE */ -{ CPUFUNC(op_23f8_5), 9208 }, /* MOVE */ -{ CPUFUNC(op_23f9_5), 9209 }, /* MOVE */ -{ CPUFUNC(op_23fa_5), 9210 }, /* MOVE */ -{ CPUFUNC(op_23fb_5), 9211 }, /* MOVE */ -{ CPUFUNC(op_23fc_5), 9212 }, /* MOVE */ -{ CPUFUNC(op_3000_5), 12288 }, /* MOVE */ -{ CPUFUNC(op_3008_5), 12296 }, /* MOVE */ -{ CPUFUNC(op_3010_5), 12304 }, /* MOVE */ -{ CPUFUNC(op_3018_5), 12312 }, /* MOVE */ -{ CPUFUNC(op_3020_5), 12320 }, /* MOVE */ -{ CPUFUNC(op_3028_5), 12328 }, /* MOVE */ -{ CPUFUNC(op_3030_5), 12336 }, /* MOVE */ -{ CPUFUNC(op_3038_5), 12344 }, /* MOVE */ -{ CPUFUNC(op_3039_5), 12345 }, /* MOVE */ -{ CPUFUNC(op_303a_5), 12346 }, /* MOVE */ -{ CPUFUNC(op_303b_5), 12347 }, /* MOVE */ -{ CPUFUNC(op_303c_5), 12348 }, /* MOVE */ -{ CPUFUNC(op_3040_5), 12352 }, /* MOVEA */ -{ CPUFUNC(op_3048_5), 12360 }, /* MOVEA */ -{ CPUFUNC(op_3050_5), 12368 }, /* MOVEA */ -{ CPUFUNC(op_3058_5), 12376 }, /* MOVEA */ -{ CPUFUNC(op_3060_5), 12384 }, /* MOVEA */ -{ CPUFUNC(op_3068_5), 12392 }, /* MOVEA */ -{ CPUFUNC(op_3070_5), 12400 }, /* MOVEA */ -{ CPUFUNC(op_3078_5), 12408 }, /* MOVEA */ -{ CPUFUNC(op_3079_5), 12409 }, /* MOVEA */ -{ CPUFUNC(op_307a_5), 12410 }, /* MOVEA */ -{ CPUFUNC(op_307b_5), 12411 }, /* MOVEA */ -{ CPUFUNC(op_307c_5), 12412 }, /* MOVEA */ -{ CPUFUNC(op_3080_5), 12416 }, /* MOVE */ -{ CPUFUNC(op_3088_5), 12424 }, /* MOVE */ -{ CPUFUNC(op_3090_5), 12432 }, /* MOVE */ -{ CPUFUNC(op_3098_5), 12440 }, /* MOVE */ -{ CPUFUNC(op_30a0_5), 12448 }, /* MOVE */ -{ CPUFUNC(op_30a8_5), 12456 }, /* MOVE */ -{ CPUFUNC(op_30b0_5), 12464 }, /* MOVE */ -{ CPUFUNC(op_30b8_5), 12472 }, /* MOVE */ -{ CPUFUNC(op_30b9_5), 12473 }, /* MOVE */ -{ CPUFUNC(op_30ba_5), 12474 }, /* MOVE */ -{ CPUFUNC(op_30bb_5), 12475 }, /* MOVE */ -{ CPUFUNC(op_30bc_5), 12476 }, /* MOVE */ -{ CPUFUNC(op_30c0_5), 12480 }, /* MOVE */ -{ CPUFUNC(op_30c8_5), 12488 }, /* MOVE */ -{ CPUFUNC(op_30d0_5), 12496 }, /* MOVE */ -{ CPUFUNC(op_30d8_5), 12504 }, /* MOVE */ -{ CPUFUNC(op_30e0_5), 12512 }, /* MOVE */ -{ CPUFUNC(op_30e8_5), 12520 }, /* MOVE */ -{ CPUFUNC(op_30f0_5), 12528 }, /* MOVE */ -{ CPUFUNC(op_30f8_5), 12536 }, /* MOVE */ -{ CPUFUNC(op_30f9_5), 12537 }, /* MOVE */ -{ CPUFUNC(op_30fa_5), 12538 }, /* MOVE */ -{ CPUFUNC(op_30fb_5), 12539 }, /* MOVE */ -{ CPUFUNC(op_30fc_5), 12540 }, /* MOVE */ -{ CPUFUNC(op_3100_5), 12544 }, /* MOVE */ -{ CPUFUNC(op_3108_5), 12552 }, /* MOVE */ -{ CPUFUNC(op_3110_5), 12560 }, /* MOVE */ -{ CPUFUNC(op_3118_5), 12568 }, /* MOVE */ -{ CPUFUNC(op_3120_5), 12576 }, /* MOVE */ -{ CPUFUNC(op_3128_5), 12584 }, /* MOVE */ -{ CPUFUNC(op_3130_5), 12592 }, /* MOVE */ -{ CPUFUNC(op_3138_5), 12600 }, /* MOVE */ -{ CPUFUNC(op_3139_5), 12601 }, /* MOVE */ -{ CPUFUNC(op_313a_5), 12602 }, /* MOVE */ -{ CPUFUNC(op_313b_5), 12603 }, /* MOVE */ -{ CPUFUNC(op_313c_5), 12604 }, /* MOVE */ -{ CPUFUNC(op_3140_5), 12608 }, /* MOVE */ -{ CPUFUNC(op_3148_5), 12616 }, /* MOVE */ -{ CPUFUNC(op_3150_5), 12624 }, /* MOVE */ -{ CPUFUNC(op_3158_5), 12632 }, /* MOVE */ -{ CPUFUNC(op_3160_5), 12640 }, /* MOVE */ -{ CPUFUNC(op_3168_5), 12648 }, /* MOVE */ -{ CPUFUNC(op_3170_5), 12656 }, /* MOVE */ -{ CPUFUNC(op_3178_5), 12664 }, /* MOVE */ -{ CPUFUNC(op_3179_5), 12665 }, /* MOVE */ -{ CPUFUNC(op_317a_5), 12666 }, /* MOVE */ -{ CPUFUNC(op_317b_5), 12667 }, /* MOVE */ -{ CPUFUNC(op_317c_5), 12668 }, /* MOVE */ -{ CPUFUNC(op_3180_5), 12672 }, /* MOVE */ -{ CPUFUNC(op_3188_5), 12680 }, /* MOVE */ -{ CPUFUNC(op_3190_5), 12688 }, /* MOVE */ -{ CPUFUNC(op_3198_5), 12696 }, /* MOVE */ -{ CPUFUNC(op_31a0_5), 12704 }, /* MOVE */ -{ CPUFUNC(op_31a8_5), 12712 }, /* MOVE */ -{ CPUFUNC(op_31b0_5), 12720 }, /* MOVE */ -{ CPUFUNC(op_31b8_5), 12728 }, /* MOVE */ -{ CPUFUNC(op_31b9_5), 12729 }, /* MOVE */ -{ CPUFUNC(op_31ba_5), 12730 }, /* MOVE */ -{ CPUFUNC(op_31bb_5), 12731 }, /* MOVE */ -{ CPUFUNC(op_31bc_5), 12732 }, /* MOVE */ -{ CPUFUNC(op_31c0_5), 12736 }, /* MOVE */ -{ CPUFUNC(op_31c8_5), 12744 }, /* MOVE */ -{ CPUFUNC(op_31d0_5), 12752 }, /* MOVE */ -{ CPUFUNC(op_31d8_5), 12760 }, /* MOVE */ -{ CPUFUNC(op_31e0_5), 12768 }, /* MOVE */ -{ CPUFUNC(op_31e8_5), 12776 }, /* MOVE */ -{ CPUFUNC(op_31f0_5), 12784 }, /* MOVE */ -{ CPUFUNC(op_31f8_5), 12792 }, /* MOVE */ -{ CPUFUNC(op_31f9_5), 12793 }, /* MOVE */ -{ CPUFUNC(op_31fa_5), 12794 }, /* MOVE */ -{ CPUFUNC(op_31fb_5), 12795 }, /* MOVE */ -{ CPUFUNC(op_31fc_5), 12796 }, /* MOVE */ -{ CPUFUNC(op_33c0_5), 13248 }, /* MOVE */ -{ CPUFUNC(op_33c8_5), 13256 }, /* MOVE */ -{ CPUFUNC(op_33d0_5), 13264 }, /* MOVE */ -{ CPUFUNC(op_33d8_5), 13272 }, /* MOVE */ -{ CPUFUNC(op_33e0_5), 13280 }, /* MOVE */ -{ CPUFUNC(op_33e8_5), 13288 }, /* MOVE */ -{ CPUFUNC(op_33f0_5), 13296 }, /* MOVE */ -{ CPUFUNC(op_33f8_5), 13304 }, /* MOVE */ -{ CPUFUNC(op_33f9_5), 13305 }, /* MOVE */ -{ CPUFUNC(op_33fa_5), 13306 }, /* MOVE */ -{ CPUFUNC(op_33fb_5), 13307 }, /* MOVE */ -{ CPUFUNC(op_33fc_5), 13308 }, /* MOVE */ -{ CPUFUNC(op_4000_5), 16384 }, /* NEGX */ -{ CPUFUNC(op_4010_5), 16400 }, /* NEGX */ -{ CPUFUNC(op_4018_5), 16408 }, /* NEGX */ -{ CPUFUNC(op_4020_5), 16416 }, /* NEGX */ -{ CPUFUNC(op_4028_5), 16424 }, /* NEGX */ -{ CPUFUNC(op_4030_5), 16432 }, /* NEGX */ -{ CPUFUNC(op_4038_5), 16440 }, /* NEGX */ -{ CPUFUNC(op_4039_5), 16441 }, /* NEGX */ -{ CPUFUNC(op_4040_5), 16448 }, /* NEGX */ -{ CPUFUNC(op_4050_5), 16464 }, /* NEGX */ -{ CPUFUNC(op_4058_5), 16472 }, /* NEGX */ -{ CPUFUNC(op_4060_5), 16480 }, /* NEGX */ -{ CPUFUNC(op_4068_5), 16488 }, /* NEGX */ -{ CPUFUNC(op_4070_5), 16496 }, /* NEGX */ -{ CPUFUNC(op_4078_5), 16504 }, /* NEGX */ -{ CPUFUNC(op_4079_5), 16505 }, /* NEGX */ -{ CPUFUNC(op_4080_5), 16512 }, /* NEGX */ -{ CPUFUNC(op_4090_5), 16528 }, /* NEGX */ -{ CPUFUNC(op_4098_5), 16536 }, /* NEGX */ -{ CPUFUNC(op_40a0_5), 16544 }, /* NEGX */ -{ CPUFUNC(op_40a8_5), 16552 }, /* NEGX */ -{ CPUFUNC(op_40b0_5), 16560 }, /* NEGX */ -{ CPUFUNC(op_40b8_5), 16568 }, /* NEGX */ -{ CPUFUNC(op_40b9_5), 16569 }, /* NEGX */ +{ CPUFUNC(op_0000_0), 0 }, /* OR */ +{ CPUFUNC(op_0010_0), 16 }, /* OR */ +{ CPUFUNC(op_0018_0), 24 }, /* OR */ +{ CPUFUNC(op_0020_0), 32 }, /* OR */ +{ CPUFUNC(op_0028_0), 40 }, /* OR */ +{ CPUFUNC(op_0030_4), 48 }, /* OR */ +{ CPUFUNC(op_0038_0), 56 }, /* OR */ +{ CPUFUNC(op_0039_0), 57 }, /* OR */ +{ CPUFUNC(op_003c_0), 60 }, /* ORSR */ +{ CPUFUNC(op_0040_0), 64 }, /* OR */ +{ CPUFUNC(op_0050_0), 80 }, /* OR */ +{ CPUFUNC(op_0058_0), 88 }, /* OR */ +{ CPUFUNC(op_0060_0), 96 }, /* OR */ +{ CPUFUNC(op_0068_0), 104 }, /* OR */ +{ CPUFUNC(op_0070_4), 112 }, /* OR */ +{ CPUFUNC(op_0078_0), 120 }, /* OR */ +{ CPUFUNC(op_0079_0), 121 }, /* OR */ +{ CPUFUNC(op_007c_0), 124 }, /* ORSR */ +{ CPUFUNC(op_0080_0), 128 }, /* OR */ +{ CPUFUNC(op_0090_0), 144 }, /* OR */ +{ CPUFUNC(op_0098_0), 152 }, /* OR */ +{ CPUFUNC(op_00a0_0), 160 }, /* OR */ +{ CPUFUNC(op_00a8_0), 168 }, /* OR */ +{ CPUFUNC(op_00b0_4), 176 }, /* OR */ +{ CPUFUNC(op_00b8_0), 184 }, /* OR */ +{ CPUFUNC(op_00b9_0), 185 }, /* OR */ +{ CPUFUNC(op_0100_0), 256 }, /* BTST */ +{ CPUFUNC(op_0108_0), 264 }, /* MVPMR */ +{ CPUFUNC(op_0110_0), 272 }, /* BTST */ +{ CPUFUNC(op_0118_0), 280 }, /* BTST */ +{ CPUFUNC(op_0120_0), 288 }, /* BTST */ +{ CPUFUNC(op_0128_0), 296 }, /* BTST */ +{ CPUFUNC(op_0130_4), 304 }, /* BTST */ +{ CPUFUNC(op_0138_0), 312 }, /* BTST */ +{ CPUFUNC(op_0139_0), 313 }, /* BTST */ +{ CPUFUNC(op_013a_0), 314 }, /* BTST */ +{ CPUFUNC(op_013b_4), 315 }, /* BTST */ +{ CPUFUNC(op_013c_0), 316 }, /* BTST */ +{ CPUFUNC(op_0140_0), 320 }, /* BCHG */ +{ CPUFUNC(op_0148_0), 328 }, /* MVPMR */ +{ CPUFUNC(op_0150_0), 336 }, /* BCHG */ +{ CPUFUNC(op_0158_0), 344 }, /* BCHG */ +{ CPUFUNC(op_0160_0), 352 }, /* BCHG */ +{ CPUFUNC(op_0168_0), 360 }, /* BCHG */ +{ CPUFUNC(op_0170_4), 368 }, /* BCHG */ +{ CPUFUNC(op_0178_0), 376 }, /* BCHG */ +{ CPUFUNC(op_0179_0), 377 }, /* BCHG */ +{ CPUFUNC(op_017a_0), 378 }, /* BCHG */ +{ CPUFUNC(op_017b_4), 379 }, /* BCHG */ +{ CPUFUNC(op_0180_0), 384 }, /* BCLR */ +{ CPUFUNC(op_0188_0), 392 }, /* MVPRM */ +{ CPUFUNC(op_0190_0), 400 }, /* BCLR */ +{ CPUFUNC(op_0198_0), 408 }, /* BCLR */ +{ CPUFUNC(op_01a0_0), 416 }, /* BCLR */ +{ CPUFUNC(op_01a8_0), 424 }, /* BCLR */ +{ CPUFUNC(op_01b0_4), 432 }, /* BCLR */ +{ CPUFUNC(op_01b8_0), 440 }, /* BCLR */ +{ CPUFUNC(op_01b9_0), 441 }, /* BCLR */ +{ CPUFUNC(op_01ba_0), 442 }, /* BCLR */ +{ CPUFUNC(op_01bb_4), 443 }, /* BCLR */ +{ CPUFUNC(op_01c0_0), 448 }, /* BSET */ +{ CPUFUNC(op_01c8_0), 456 }, /* MVPRM */ +{ CPUFUNC(op_01d0_0), 464 }, /* BSET */ +{ CPUFUNC(op_01d8_0), 472 }, /* BSET */ +{ CPUFUNC(op_01e0_0), 480 }, /* BSET */ +{ CPUFUNC(op_01e8_0), 488 }, /* BSET */ +{ CPUFUNC(op_01f0_4), 496 }, /* BSET */ +{ CPUFUNC(op_01f8_0), 504 }, /* BSET */ +{ CPUFUNC(op_01f9_0), 505 }, /* BSET */ +{ CPUFUNC(op_01fa_0), 506 }, /* BSET */ +{ CPUFUNC(op_01fb_4), 507 }, /* BSET */ +{ CPUFUNC(op_0200_0), 512 }, /* AND */ +{ CPUFUNC(op_0210_0), 528 }, /* AND */ +{ CPUFUNC(op_0218_0), 536 }, /* AND */ +{ CPUFUNC(op_0220_0), 544 }, /* AND */ +{ CPUFUNC(op_0228_0), 552 }, /* AND */ +{ CPUFUNC(op_0230_4), 560 }, /* AND */ +{ CPUFUNC(op_0238_0), 568 }, /* AND */ +{ CPUFUNC(op_0239_0), 569 }, /* AND */ +{ CPUFUNC(op_023c_0), 572 }, /* ANDSR */ +{ CPUFUNC(op_0240_0), 576 }, /* AND */ +{ CPUFUNC(op_0250_0), 592 }, /* AND */ +{ CPUFUNC(op_0258_0), 600 }, /* AND */ +{ CPUFUNC(op_0260_0), 608 }, /* AND */ +{ CPUFUNC(op_0268_0), 616 }, /* AND */ +{ CPUFUNC(op_0270_4), 624 }, /* AND */ +{ CPUFUNC(op_0278_0), 632 }, /* AND */ +{ CPUFUNC(op_0279_0), 633 }, /* AND */ +{ CPUFUNC(op_027c_0), 636 }, /* ANDSR */ +{ CPUFUNC(op_0280_0), 640 }, /* AND */ +{ CPUFUNC(op_0290_0), 656 }, /* AND */ +{ CPUFUNC(op_0298_0), 664 }, /* AND */ +{ CPUFUNC(op_02a0_0), 672 }, /* AND */ +{ CPUFUNC(op_02a8_0), 680 }, /* AND */ +{ CPUFUNC(op_02b0_4), 688 }, /* AND */ +{ CPUFUNC(op_02b8_0), 696 }, /* AND */ +{ CPUFUNC(op_02b9_0), 697 }, /* AND */ +{ CPUFUNC(op_0400_0), 1024 }, /* SUB */ +{ CPUFUNC(op_0410_0), 1040 }, /* SUB */ +{ CPUFUNC(op_0418_0), 1048 }, /* SUB */ +{ CPUFUNC(op_0420_0), 1056 }, /* SUB */ +{ CPUFUNC(op_0428_0), 1064 }, /* SUB */ +{ CPUFUNC(op_0430_4), 1072 }, /* SUB */ +{ CPUFUNC(op_0438_0), 1080 }, /* SUB */ +{ CPUFUNC(op_0439_0), 1081 }, /* SUB */ +{ CPUFUNC(op_0440_0), 1088 }, /* SUB */ +{ CPUFUNC(op_0450_0), 1104 }, /* SUB */ +{ CPUFUNC(op_0458_0), 1112 }, /* SUB */ +{ CPUFUNC(op_0460_0), 1120 }, /* SUB */ +{ CPUFUNC(op_0468_0), 1128 }, /* SUB */ +{ CPUFUNC(op_0470_4), 1136 }, /* SUB */ +{ CPUFUNC(op_0478_0), 1144 }, /* SUB */ +{ CPUFUNC(op_0479_0), 1145 }, /* SUB */ +{ CPUFUNC(op_0480_0), 1152 }, /* SUB */ +{ CPUFUNC(op_0490_0), 1168 }, /* SUB */ +{ CPUFUNC(op_0498_0), 1176 }, /* SUB */ +{ CPUFUNC(op_04a0_0), 1184 }, /* SUB */ +{ CPUFUNC(op_04a8_0), 1192 }, /* SUB */ +{ CPUFUNC(op_04b0_4), 1200 }, /* SUB */ +{ CPUFUNC(op_04b8_0), 1208 }, /* SUB */ +{ CPUFUNC(op_04b9_0), 1209 }, /* SUB */ +{ CPUFUNC(op_0600_0), 1536 }, /* ADD */ +{ CPUFUNC(op_0610_0), 1552 }, /* ADD */ +{ CPUFUNC(op_0618_0), 1560 }, /* ADD */ +{ CPUFUNC(op_0620_0), 1568 }, /* ADD */ +{ CPUFUNC(op_0628_0), 1576 }, /* ADD */ +{ CPUFUNC(op_0630_4), 1584 }, /* ADD */ +{ CPUFUNC(op_0638_0), 1592 }, /* ADD */ +{ CPUFUNC(op_0639_0), 1593 }, /* ADD */ +{ CPUFUNC(op_0640_0), 1600 }, /* ADD */ +{ CPUFUNC(op_0650_0), 1616 }, /* ADD */ +{ CPUFUNC(op_0658_0), 1624 }, /* ADD */ +{ CPUFUNC(op_0660_0), 1632 }, /* ADD */ +{ CPUFUNC(op_0668_0), 1640 }, /* ADD */ +{ CPUFUNC(op_0670_4), 1648 }, /* ADD */ +{ CPUFUNC(op_0678_0), 1656 }, /* ADD */ +{ CPUFUNC(op_0679_0), 1657 }, /* ADD */ +{ CPUFUNC(op_0680_0), 1664 }, /* ADD */ +{ CPUFUNC(op_0690_0), 1680 }, /* ADD */ +{ CPUFUNC(op_0698_0), 1688 }, /* ADD */ +{ CPUFUNC(op_06a0_0), 1696 }, /* ADD */ +{ CPUFUNC(op_06a8_0), 1704 }, /* ADD */ +{ CPUFUNC(op_06b0_4), 1712 }, /* ADD */ +{ CPUFUNC(op_06b8_0), 1720 }, /* ADD */ +{ CPUFUNC(op_06b9_0), 1721 }, /* ADD */ +{ CPUFUNC(op_0800_0), 2048 }, /* BTST */ +{ CPUFUNC(op_0810_0), 2064 }, /* BTST */ +{ CPUFUNC(op_0818_0), 2072 }, /* BTST */ +{ CPUFUNC(op_0820_0), 2080 }, /* BTST */ +{ CPUFUNC(op_0828_0), 2088 }, /* BTST */ +{ CPUFUNC(op_0830_4), 2096 }, /* BTST */ +{ CPUFUNC(op_0838_0), 2104 }, /* BTST */ +{ CPUFUNC(op_0839_0), 2105 }, /* BTST */ +{ CPUFUNC(op_083a_0), 2106 }, /* BTST */ +{ CPUFUNC(op_083b_4), 2107 }, /* BTST */ +{ CPUFUNC(op_083c_0), 2108 }, /* BTST */ +{ CPUFUNC(op_0840_0), 2112 }, /* BCHG */ +{ CPUFUNC(op_0850_0), 2128 }, /* BCHG */ +{ CPUFUNC(op_0858_0), 2136 }, /* BCHG */ +{ CPUFUNC(op_0860_0), 2144 }, /* BCHG */ +{ CPUFUNC(op_0868_0), 2152 }, /* BCHG */ +{ CPUFUNC(op_0870_4), 2160 }, /* BCHG */ +{ CPUFUNC(op_0878_0), 2168 }, /* BCHG */ +{ CPUFUNC(op_0879_0), 2169 }, /* BCHG */ +{ CPUFUNC(op_087a_0), 2170 }, /* BCHG */ +{ CPUFUNC(op_087b_4), 2171 }, /* BCHG */ +{ CPUFUNC(op_0880_0), 2176 }, /* BCLR */ +{ CPUFUNC(op_0890_0), 2192 }, /* BCLR */ +{ CPUFUNC(op_0898_0), 2200 }, /* BCLR */ +{ CPUFUNC(op_08a0_0), 2208 }, /* BCLR */ +{ CPUFUNC(op_08a8_0), 2216 }, /* BCLR */ +{ CPUFUNC(op_08b0_4), 2224 }, /* BCLR */ +{ CPUFUNC(op_08b8_0), 2232 }, /* BCLR */ +{ CPUFUNC(op_08b9_0), 2233 }, /* BCLR */ +{ CPUFUNC(op_08ba_0), 2234 }, /* BCLR */ +{ CPUFUNC(op_08bb_4), 2235 }, /* BCLR */ +{ CPUFUNC(op_08c0_0), 2240 }, /* BSET */ +{ CPUFUNC(op_08d0_0), 2256 }, /* BSET */ +{ CPUFUNC(op_08d8_0), 2264 }, /* BSET */ +{ CPUFUNC(op_08e0_0), 2272 }, /* BSET */ +{ CPUFUNC(op_08e8_0), 2280 }, /* BSET */ +{ CPUFUNC(op_08f0_4), 2288 }, /* BSET */ +{ CPUFUNC(op_08f8_0), 2296 }, /* BSET */ +{ CPUFUNC(op_08f9_0), 2297 }, /* BSET */ +{ CPUFUNC(op_08fa_0), 2298 }, /* BSET */ +{ CPUFUNC(op_08fb_4), 2299 }, /* BSET */ +{ CPUFUNC(op_0a00_0), 2560 }, /* EOR */ +{ CPUFUNC(op_0a10_0), 2576 }, /* EOR */ +{ CPUFUNC(op_0a18_0), 2584 }, /* EOR */ +{ CPUFUNC(op_0a20_0), 2592 }, /* EOR */ +{ CPUFUNC(op_0a28_0), 2600 }, /* EOR */ +{ CPUFUNC(op_0a30_4), 2608 }, /* EOR */ +{ CPUFUNC(op_0a38_0), 2616 }, /* EOR */ +{ CPUFUNC(op_0a39_0), 2617 }, /* EOR */ +{ CPUFUNC(op_0a3c_0), 2620 }, /* EORSR */ +{ CPUFUNC(op_0a40_0), 2624 }, /* EOR */ +{ CPUFUNC(op_0a50_0), 2640 }, /* EOR */ +{ CPUFUNC(op_0a58_0), 2648 }, /* EOR */ +{ CPUFUNC(op_0a60_0), 2656 }, /* EOR */ +{ CPUFUNC(op_0a68_0), 2664 }, /* EOR */ +{ CPUFUNC(op_0a70_4), 2672 }, /* EOR */ +{ CPUFUNC(op_0a78_0), 2680 }, /* EOR */ +{ CPUFUNC(op_0a79_0), 2681 }, /* EOR */ +{ CPUFUNC(op_0a7c_0), 2684 }, /* EORSR */ +{ CPUFUNC(op_0a80_0), 2688 }, /* EOR */ +{ CPUFUNC(op_0a90_0), 2704 }, /* EOR */ +{ CPUFUNC(op_0a98_0), 2712 }, /* EOR */ +{ CPUFUNC(op_0aa0_0), 2720 }, /* EOR */ +{ CPUFUNC(op_0aa8_0), 2728 }, /* EOR */ +{ CPUFUNC(op_0ab0_4), 2736 }, /* EOR */ +{ CPUFUNC(op_0ab8_0), 2744 }, /* EOR */ +{ CPUFUNC(op_0ab9_0), 2745 }, /* EOR */ +{ CPUFUNC(op_0c00_0), 3072 }, /* CMP */ +{ CPUFUNC(op_0c10_0), 3088 }, /* CMP */ +{ CPUFUNC(op_0c18_0), 3096 }, /* CMP */ +{ CPUFUNC(op_0c20_0), 3104 }, /* CMP */ +{ CPUFUNC(op_0c28_0), 3112 }, /* CMP */ +{ CPUFUNC(op_0c30_4), 3120 }, /* CMP */ +{ CPUFUNC(op_0c38_0), 3128 }, /* CMP */ +{ CPUFUNC(op_0c39_0), 3129 }, /* CMP */ +{ CPUFUNC(op_0c40_0), 3136 }, /* CMP */ +{ CPUFUNC(op_0c50_0), 3152 }, /* CMP */ +{ CPUFUNC(op_0c58_0), 3160 }, /* CMP */ +{ CPUFUNC(op_0c60_0), 3168 }, /* CMP */ +{ CPUFUNC(op_0c68_0), 3176 }, /* CMP */ +{ CPUFUNC(op_0c70_4), 3184 }, /* CMP */ +{ CPUFUNC(op_0c78_0), 3192 }, /* CMP */ +{ CPUFUNC(op_0c79_0), 3193 }, /* CMP */ +{ CPUFUNC(op_0c80_0), 3200 }, /* CMP */ +{ CPUFUNC(op_0c90_0), 3216 }, /* CMP */ +{ CPUFUNC(op_0c98_0), 3224 }, /* CMP */ +{ CPUFUNC(op_0ca0_0), 3232 }, /* CMP */ +{ CPUFUNC(op_0ca8_0), 3240 }, /* CMP */ +{ CPUFUNC(op_0cb0_4), 3248 }, /* CMP */ +{ CPUFUNC(op_0cb8_0), 3256 }, /* CMP */ +{ CPUFUNC(op_0cb9_0), 3257 }, /* CMP */ +{ CPUFUNC(op_1000_0), 4096 }, /* MOVE */ +{ CPUFUNC(op_1010_0), 4112 }, /* MOVE */ +{ CPUFUNC(op_1018_0), 4120 }, /* MOVE */ +{ CPUFUNC(op_1020_0), 4128 }, /* MOVE */ +{ CPUFUNC(op_1028_0), 4136 }, /* MOVE */ +{ CPUFUNC(op_1030_4), 4144 }, /* MOVE */ +{ CPUFUNC(op_1038_0), 4152 }, /* MOVE */ +{ CPUFUNC(op_1039_0), 4153 }, /* MOVE */ +{ CPUFUNC(op_103a_0), 4154 }, /* MOVE */ +{ CPUFUNC(op_103b_4), 4155 }, /* MOVE */ +{ CPUFUNC(op_103c_0), 4156 }, /* MOVE */ +{ CPUFUNC(op_1080_0), 4224 }, /* MOVE */ +{ CPUFUNC(op_1090_0), 4240 }, /* MOVE */ +{ CPUFUNC(op_1098_0), 4248 }, /* MOVE */ +{ CPUFUNC(op_10a0_0), 4256 }, /* MOVE */ +{ CPUFUNC(op_10a8_0), 4264 }, /* MOVE */ +{ CPUFUNC(op_10b0_4), 4272 }, /* MOVE */ +{ CPUFUNC(op_10b8_0), 4280 }, /* MOVE */ +{ CPUFUNC(op_10b9_0), 4281 }, /* MOVE */ +{ CPUFUNC(op_10ba_0), 4282 }, /* MOVE */ +{ CPUFUNC(op_10bb_4), 4283 }, /* MOVE */ +{ CPUFUNC(op_10bc_0), 4284 }, /* MOVE */ +{ CPUFUNC(op_10c0_0), 4288 }, /* MOVE */ +{ CPUFUNC(op_10d0_0), 4304 }, /* MOVE */ +{ CPUFUNC(op_10d8_0), 4312 }, /* MOVE */ +{ CPUFUNC(op_10e0_0), 4320 }, /* MOVE */ +{ CPUFUNC(op_10e8_0), 4328 }, /* MOVE */ +{ CPUFUNC(op_10f0_4), 4336 }, /* MOVE */ +{ CPUFUNC(op_10f8_0), 4344 }, /* MOVE */ +{ CPUFUNC(op_10f9_0), 4345 }, /* MOVE */ +{ CPUFUNC(op_10fa_0), 4346 }, /* MOVE */ +{ CPUFUNC(op_10fb_4), 4347 }, /* MOVE */ +{ CPUFUNC(op_10fc_0), 4348 }, /* MOVE */ +{ CPUFUNC(op_1100_0), 4352 }, /* MOVE */ +{ CPUFUNC(op_1110_0), 4368 }, /* MOVE */ +{ CPUFUNC(op_1118_0), 4376 }, /* MOVE */ +{ CPUFUNC(op_1120_0), 4384 }, /* MOVE */ +{ CPUFUNC(op_1128_0), 4392 }, /* MOVE */ +{ CPUFUNC(op_1130_4), 4400 }, /* MOVE */ +{ CPUFUNC(op_1138_0), 4408 }, /* MOVE */ +{ CPUFUNC(op_1139_0), 4409 }, /* MOVE */ +{ CPUFUNC(op_113a_0), 4410 }, /* MOVE */ +{ CPUFUNC(op_113b_4), 4411 }, /* MOVE */ +{ CPUFUNC(op_113c_0), 4412 }, /* MOVE */ +{ CPUFUNC(op_1140_0), 4416 }, /* MOVE */ +{ CPUFUNC(op_1150_0), 4432 }, /* MOVE */ +{ CPUFUNC(op_1158_0), 4440 }, /* MOVE */ +{ CPUFUNC(op_1160_0), 4448 }, /* MOVE */ +{ CPUFUNC(op_1168_0), 4456 }, /* MOVE */ +{ CPUFUNC(op_1170_4), 4464 }, /* MOVE */ +{ CPUFUNC(op_1178_0), 4472 }, /* MOVE */ +{ CPUFUNC(op_1179_0), 4473 }, /* MOVE */ +{ CPUFUNC(op_117a_0), 4474 }, /* MOVE */ +{ CPUFUNC(op_117b_4), 4475 }, /* MOVE */ +{ CPUFUNC(op_117c_0), 4476 }, /* MOVE */ +{ CPUFUNC(op_1180_4), 4480 }, /* MOVE */ +{ CPUFUNC(op_1190_4), 4496 }, /* MOVE */ +{ CPUFUNC(op_1198_4), 4504 }, /* MOVE */ +{ CPUFUNC(op_11a0_4), 4512 }, /* MOVE */ +{ CPUFUNC(op_11a8_4), 4520 }, /* MOVE */ +{ CPUFUNC(op_11b0_4), 4528 }, /* MOVE */ +{ CPUFUNC(op_11b8_4), 4536 }, /* MOVE */ +{ CPUFUNC(op_11b9_4), 4537 }, /* MOVE */ +{ CPUFUNC(op_11ba_4), 4538 }, /* MOVE */ +{ CPUFUNC(op_11bb_4), 4539 }, /* MOVE */ +{ CPUFUNC(op_11bc_4), 4540 }, /* MOVE */ +{ CPUFUNC(op_11c0_0), 4544 }, /* MOVE */ +{ CPUFUNC(op_11d0_0), 4560 }, /* MOVE */ +{ CPUFUNC(op_11d8_0), 4568 }, /* MOVE */ +{ CPUFUNC(op_11e0_0), 4576 }, /* MOVE */ +{ CPUFUNC(op_11e8_0), 4584 }, /* MOVE */ +{ CPUFUNC(op_11f0_4), 4592 }, /* MOVE */ +{ CPUFUNC(op_11f8_0), 4600 }, /* MOVE */ +{ CPUFUNC(op_11f9_0), 4601 }, /* MOVE */ +{ CPUFUNC(op_11fa_0), 4602 }, /* MOVE */ +{ CPUFUNC(op_11fb_4), 4603 }, /* MOVE */ +{ CPUFUNC(op_11fc_0), 4604 }, /* MOVE */ +{ CPUFUNC(op_13c0_0), 5056 }, /* MOVE */ +{ CPUFUNC(op_13d0_0), 5072 }, /* MOVE */ +{ CPUFUNC(op_13d8_0), 5080 }, /* MOVE */ +{ CPUFUNC(op_13e0_0), 5088 }, /* MOVE */ +{ CPUFUNC(op_13e8_0), 5096 }, /* MOVE */ +{ CPUFUNC(op_13f0_4), 5104 }, /* MOVE */ +{ CPUFUNC(op_13f8_0), 5112 }, /* MOVE */ +{ CPUFUNC(op_13f9_0), 5113 }, /* MOVE */ +{ CPUFUNC(op_13fa_0), 5114 }, /* MOVE */ +{ CPUFUNC(op_13fb_4), 5115 }, /* MOVE */ +{ CPUFUNC(op_13fc_0), 5116 }, /* MOVE */ +{ CPUFUNC(op_2000_0), 8192 }, /* MOVE */ +{ CPUFUNC(op_2008_0), 8200 }, /* MOVE */ +{ CPUFUNC(op_2010_0), 8208 }, /* MOVE */ +{ CPUFUNC(op_2018_0), 8216 }, /* MOVE */ +{ CPUFUNC(op_2020_0), 8224 }, /* MOVE */ +{ CPUFUNC(op_2028_0), 8232 }, /* MOVE */ +{ CPUFUNC(op_2030_4), 8240 }, /* MOVE */ +{ CPUFUNC(op_2038_0), 8248 }, /* MOVE */ +{ CPUFUNC(op_2039_0), 8249 }, /* MOVE */ +{ CPUFUNC(op_203a_0), 8250 }, /* MOVE */ +{ CPUFUNC(op_203b_4), 8251 }, /* MOVE */ +{ CPUFUNC(op_203c_0), 8252 }, /* MOVE */ +{ CPUFUNC(op_2040_0), 8256 }, /* MOVEA */ +{ CPUFUNC(op_2048_0), 8264 }, /* MOVEA */ +{ CPUFUNC(op_2050_0), 8272 }, /* MOVEA */ +{ CPUFUNC(op_2058_0), 8280 }, /* MOVEA */ +{ CPUFUNC(op_2060_0), 8288 }, /* MOVEA */ +{ CPUFUNC(op_2068_0), 8296 }, /* MOVEA */ +{ CPUFUNC(op_2070_4), 8304 }, /* MOVEA */ +{ CPUFUNC(op_2078_0), 8312 }, /* MOVEA */ +{ CPUFUNC(op_2079_0), 8313 }, /* MOVEA */ +{ CPUFUNC(op_207a_0), 8314 }, /* MOVEA */ +{ CPUFUNC(op_207b_4), 8315 }, /* MOVEA */ +{ CPUFUNC(op_207c_0), 8316 }, /* MOVEA */ +{ CPUFUNC(op_2080_0), 8320 }, /* MOVE */ +{ CPUFUNC(op_2088_0), 8328 }, /* MOVE */ +{ CPUFUNC(op_2090_0), 8336 }, /* MOVE */ +{ CPUFUNC(op_2098_0), 8344 }, /* MOVE */ +{ CPUFUNC(op_20a0_0), 8352 }, /* MOVE */ +{ CPUFUNC(op_20a8_0), 8360 }, /* MOVE */ +{ CPUFUNC(op_20b0_4), 8368 }, /* MOVE */ +{ CPUFUNC(op_20b8_0), 8376 }, /* MOVE */ +{ CPUFUNC(op_20b9_0), 8377 }, /* MOVE */ +{ CPUFUNC(op_20ba_0), 8378 }, /* MOVE */ +{ CPUFUNC(op_20bb_4), 8379 }, /* MOVE */ +{ CPUFUNC(op_20bc_0), 8380 }, /* MOVE */ +{ CPUFUNC(op_20c0_0), 8384 }, /* MOVE */ +{ CPUFUNC(op_20c8_0), 8392 }, /* MOVE */ +{ CPUFUNC(op_20d0_0), 8400 }, /* MOVE */ +{ CPUFUNC(op_20d8_0), 8408 }, /* MOVE */ +{ CPUFUNC(op_20e0_0), 8416 }, /* MOVE */ +{ CPUFUNC(op_20e8_0), 8424 }, /* MOVE */ +{ CPUFUNC(op_20f0_4), 8432 }, /* MOVE */ +{ CPUFUNC(op_20f8_0), 8440 }, /* MOVE */ +{ CPUFUNC(op_20f9_0), 8441 }, /* MOVE */ +{ CPUFUNC(op_20fa_0), 8442 }, /* MOVE */ +{ CPUFUNC(op_20fb_4), 8443 }, /* MOVE */ +{ CPUFUNC(op_20fc_0), 8444 }, /* MOVE */ +{ CPUFUNC(op_2100_0), 8448 }, /* MOVE */ +{ CPUFUNC(op_2108_0), 8456 }, /* MOVE */ +{ CPUFUNC(op_2110_0), 8464 }, /* MOVE */ +{ CPUFUNC(op_2118_0), 8472 }, /* MOVE */ +{ CPUFUNC(op_2120_0), 8480 }, /* MOVE */ +{ CPUFUNC(op_2128_0), 8488 }, /* MOVE */ +{ CPUFUNC(op_2130_4), 8496 }, /* MOVE */ +{ CPUFUNC(op_2138_0), 8504 }, /* MOVE */ +{ CPUFUNC(op_2139_0), 8505 }, /* MOVE */ +{ CPUFUNC(op_213a_0), 8506 }, /* MOVE */ +{ CPUFUNC(op_213b_4), 8507 }, /* MOVE */ +{ CPUFUNC(op_213c_0), 8508 }, /* MOVE */ +{ CPUFUNC(op_2140_0), 8512 }, /* MOVE */ +{ CPUFUNC(op_2148_0), 8520 }, /* MOVE */ +{ CPUFUNC(op_2150_0), 8528 }, /* MOVE */ +{ CPUFUNC(op_2158_0), 8536 }, /* MOVE */ +{ CPUFUNC(op_2160_0), 8544 }, /* MOVE */ +{ CPUFUNC(op_2168_0), 8552 }, /* MOVE */ +{ CPUFUNC(op_2170_4), 8560 }, /* MOVE */ +{ CPUFUNC(op_2178_0), 8568 }, /* MOVE */ +{ CPUFUNC(op_2179_0), 8569 }, /* MOVE */ +{ CPUFUNC(op_217a_0), 8570 }, /* MOVE */ +{ CPUFUNC(op_217b_4), 8571 }, /* MOVE */ +{ CPUFUNC(op_217c_0), 8572 }, /* MOVE */ +{ CPUFUNC(op_2180_4), 8576 }, /* MOVE */ +{ CPUFUNC(op_2188_4), 8584 }, /* MOVE */ +{ CPUFUNC(op_2190_4), 8592 }, /* MOVE */ +{ CPUFUNC(op_2198_4), 8600 }, /* MOVE */ +{ CPUFUNC(op_21a0_4), 8608 }, /* MOVE */ +{ CPUFUNC(op_21a8_4), 8616 }, /* MOVE */ +{ CPUFUNC(op_21b0_4), 8624 }, /* MOVE */ +{ CPUFUNC(op_21b8_4), 8632 }, /* MOVE */ +{ CPUFUNC(op_21b9_4), 8633 }, /* MOVE */ +{ CPUFUNC(op_21ba_4), 8634 }, /* MOVE */ +{ CPUFUNC(op_21bb_4), 8635 }, /* MOVE */ +{ CPUFUNC(op_21bc_4), 8636 }, /* MOVE */ +{ CPUFUNC(op_21c0_0), 8640 }, /* MOVE */ +{ CPUFUNC(op_21c8_0), 8648 }, /* MOVE */ +{ CPUFUNC(op_21d0_0), 8656 }, /* MOVE */ +{ CPUFUNC(op_21d8_0), 8664 }, /* MOVE */ +{ CPUFUNC(op_21e0_0), 8672 }, /* MOVE */ +{ CPUFUNC(op_21e8_0), 8680 }, /* MOVE */ +{ CPUFUNC(op_21f0_4), 8688 }, /* MOVE */ +{ CPUFUNC(op_21f8_0), 8696 }, /* MOVE */ +{ CPUFUNC(op_21f9_0), 8697 }, /* MOVE */ +{ CPUFUNC(op_21fa_0), 8698 }, /* MOVE */ +{ CPUFUNC(op_21fb_4), 8699 }, /* MOVE */ +{ CPUFUNC(op_21fc_0), 8700 }, /* MOVE */ +{ CPUFUNC(op_23c0_0), 9152 }, /* MOVE */ +{ CPUFUNC(op_23c8_0), 9160 }, /* MOVE */ +{ CPUFUNC(op_23d0_0), 9168 }, /* MOVE */ +{ CPUFUNC(op_23d8_0), 9176 }, /* MOVE */ +{ CPUFUNC(op_23e0_0), 9184 }, /* MOVE */ +{ CPUFUNC(op_23e8_0), 9192 }, /* MOVE */ +{ CPUFUNC(op_23f0_4), 9200 }, /* MOVE */ +{ CPUFUNC(op_23f8_0), 9208 }, /* MOVE */ +{ CPUFUNC(op_23f9_0), 9209 }, /* MOVE */ +{ CPUFUNC(op_23fa_0), 9210 }, /* MOVE */ +{ CPUFUNC(op_23fb_4), 9211 }, /* MOVE */ +{ CPUFUNC(op_23fc_0), 9212 }, /* MOVE */ +{ CPUFUNC(op_3000_0), 12288 }, /* MOVE */ +{ CPUFUNC(op_3008_0), 12296 }, /* MOVE */ +{ CPUFUNC(op_3010_0), 12304 }, /* MOVE */ +{ CPUFUNC(op_3018_0), 12312 }, /* MOVE */ +{ CPUFUNC(op_3020_0), 12320 }, /* MOVE */ +{ CPUFUNC(op_3028_0), 12328 }, /* MOVE */ +{ CPUFUNC(op_3030_4), 12336 }, /* MOVE */ +{ CPUFUNC(op_3038_0), 12344 }, /* MOVE */ +{ CPUFUNC(op_3039_0), 12345 }, /* MOVE */ +{ CPUFUNC(op_303a_0), 12346 }, /* MOVE */ +{ CPUFUNC(op_303b_4), 12347 }, /* MOVE */ +{ CPUFUNC(op_303c_0), 12348 }, /* MOVE */ +{ CPUFUNC(op_3040_0), 12352 }, /* MOVEA */ +{ CPUFUNC(op_3048_0), 12360 }, /* MOVEA */ +{ CPUFUNC(op_3050_0), 12368 }, /* MOVEA */ +{ CPUFUNC(op_3058_0), 12376 }, /* MOVEA */ +{ CPUFUNC(op_3060_0), 12384 }, /* MOVEA */ +{ CPUFUNC(op_3068_0), 12392 }, /* MOVEA */ +{ CPUFUNC(op_3070_4), 12400 }, /* MOVEA */ +{ CPUFUNC(op_3078_0), 12408 }, /* MOVEA */ +{ CPUFUNC(op_3079_0), 12409 }, /* MOVEA */ +{ CPUFUNC(op_307a_0), 12410 }, /* MOVEA */ +{ CPUFUNC(op_307b_4), 12411 }, /* MOVEA */ +{ CPUFUNC(op_307c_0), 12412 }, /* MOVEA */ +{ CPUFUNC(op_3080_0), 12416 }, /* MOVE */ +{ CPUFUNC(op_3088_0), 12424 }, /* MOVE */ +{ CPUFUNC(op_3090_0), 12432 }, /* MOVE */ +{ CPUFUNC(op_3098_0), 12440 }, /* MOVE */ +{ CPUFUNC(op_30a0_0), 12448 }, /* MOVE */ +{ CPUFUNC(op_30a8_0), 12456 }, /* MOVE */ +{ CPUFUNC(op_30b0_4), 12464 }, /* MOVE */ +{ CPUFUNC(op_30b8_0), 12472 }, /* MOVE */ +{ CPUFUNC(op_30b9_0), 12473 }, /* MOVE */ +{ CPUFUNC(op_30ba_0), 12474 }, /* MOVE */ +{ CPUFUNC(op_30bb_4), 12475 }, /* MOVE */ +{ CPUFUNC(op_30bc_0), 12476 }, /* MOVE */ +{ CPUFUNC(op_30c0_0), 12480 }, /* MOVE */ +{ CPUFUNC(op_30c8_0), 12488 }, /* MOVE */ +{ CPUFUNC(op_30d0_0), 12496 }, /* MOVE */ +{ CPUFUNC(op_30d8_0), 12504 }, /* MOVE */ +{ CPUFUNC(op_30e0_0), 12512 }, /* MOVE */ +{ CPUFUNC(op_30e8_0), 12520 }, /* MOVE */ +{ CPUFUNC(op_30f0_4), 12528 }, /* MOVE */ +{ CPUFUNC(op_30f8_0), 12536 }, /* MOVE */ +{ CPUFUNC(op_30f9_0), 12537 }, /* MOVE */ +{ CPUFUNC(op_30fa_0), 12538 }, /* MOVE */ +{ CPUFUNC(op_30fb_4), 12539 }, /* MOVE */ +{ CPUFUNC(op_30fc_0), 12540 }, /* MOVE */ +{ CPUFUNC(op_3100_0), 12544 }, /* MOVE */ +{ CPUFUNC(op_3108_0), 12552 }, /* MOVE */ +{ CPUFUNC(op_3110_0), 12560 }, /* MOVE */ +{ CPUFUNC(op_3118_0), 12568 }, /* MOVE */ +{ CPUFUNC(op_3120_0), 12576 }, /* MOVE */ +{ CPUFUNC(op_3128_0), 12584 }, /* MOVE */ +{ CPUFUNC(op_3130_4), 12592 }, /* MOVE */ +{ CPUFUNC(op_3138_0), 12600 }, /* MOVE */ +{ CPUFUNC(op_3139_0), 12601 }, /* MOVE */ +{ CPUFUNC(op_313a_0), 12602 }, /* MOVE */ +{ CPUFUNC(op_313b_4), 12603 }, /* MOVE */ +{ CPUFUNC(op_313c_0), 12604 }, /* MOVE */ +{ CPUFUNC(op_3140_0), 12608 }, /* MOVE */ +{ CPUFUNC(op_3148_0), 12616 }, /* MOVE */ +{ CPUFUNC(op_3150_0), 12624 }, /* MOVE */ +{ CPUFUNC(op_3158_0), 12632 }, /* MOVE */ +{ CPUFUNC(op_3160_0), 12640 }, /* MOVE */ +{ CPUFUNC(op_3168_0), 12648 }, /* MOVE */ +{ CPUFUNC(op_3170_4), 12656 }, /* MOVE */ +{ CPUFUNC(op_3178_0), 12664 }, /* MOVE */ +{ CPUFUNC(op_3179_0), 12665 }, /* MOVE */ +{ CPUFUNC(op_317a_0), 12666 }, /* MOVE */ +{ CPUFUNC(op_317b_4), 12667 }, /* MOVE */ +{ CPUFUNC(op_317c_0), 12668 }, /* MOVE */ +{ CPUFUNC(op_3180_4), 12672 }, /* MOVE */ +{ CPUFUNC(op_3188_4), 12680 }, /* MOVE */ +{ CPUFUNC(op_3190_4), 12688 }, /* MOVE */ +{ CPUFUNC(op_3198_4), 12696 }, /* MOVE */ +{ CPUFUNC(op_31a0_4), 12704 }, /* MOVE */ +{ CPUFUNC(op_31a8_4), 12712 }, /* MOVE */ +{ CPUFUNC(op_31b0_4), 12720 }, /* MOVE */ +{ CPUFUNC(op_31b8_4), 12728 }, /* MOVE */ +{ CPUFUNC(op_31b9_4), 12729 }, /* MOVE */ +{ CPUFUNC(op_31ba_4), 12730 }, /* MOVE */ +{ CPUFUNC(op_31bb_4), 12731 }, /* MOVE */ +{ CPUFUNC(op_31bc_4), 12732 }, /* MOVE */ +{ CPUFUNC(op_31c0_0), 12736 }, /* MOVE */ +{ CPUFUNC(op_31c8_0), 12744 }, /* MOVE */ +{ CPUFUNC(op_31d0_0), 12752 }, /* MOVE */ +{ CPUFUNC(op_31d8_0), 12760 }, /* MOVE */ +{ CPUFUNC(op_31e0_0), 12768 }, /* MOVE */ +{ CPUFUNC(op_31e8_0), 12776 }, /* MOVE */ +{ CPUFUNC(op_31f0_4), 12784 }, /* MOVE */ +{ CPUFUNC(op_31f8_0), 12792 }, /* MOVE */ +{ CPUFUNC(op_31f9_0), 12793 }, /* MOVE */ +{ CPUFUNC(op_31fa_0), 12794 }, /* MOVE */ +{ CPUFUNC(op_31fb_4), 12795 }, /* MOVE */ +{ CPUFUNC(op_31fc_0), 12796 }, /* MOVE */ +{ CPUFUNC(op_33c0_0), 13248 }, /* MOVE */ +{ CPUFUNC(op_33c8_0), 13256 }, /* MOVE */ +{ CPUFUNC(op_33d0_0), 13264 }, /* MOVE */ +{ CPUFUNC(op_33d8_0), 13272 }, /* MOVE */ +{ CPUFUNC(op_33e0_0), 13280 }, /* MOVE */ +{ CPUFUNC(op_33e8_0), 13288 }, /* MOVE */ +{ CPUFUNC(op_33f0_4), 13296 }, /* MOVE */ +{ CPUFUNC(op_33f8_0), 13304 }, /* MOVE */ +{ CPUFUNC(op_33f9_0), 13305 }, /* MOVE */ +{ CPUFUNC(op_33fa_0), 13306 }, /* MOVE */ +{ CPUFUNC(op_33fb_4), 13307 }, /* MOVE */ +{ CPUFUNC(op_33fc_0), 13308 }, /* MOVE */ +{ CPUFUNC(op_4000_0), 16384 }, /* NEGX */ +{ CPUFUNC(op_4010_0), 16400 }, /* NEGX */ +{ CPUFUNC(op_4018_0), 16408 }, /* NEGX */ +{ CPUFUNC(op_4020_0), 16416 }, /* NEGX */ +{ CPUFUNC(op_4028_0), 16424 }, /* NEGX */ +{ CPUFUNC(op_4030_4), 16432 }, /* NEGX */ +{ CPUFUNC(op_4038_0), 16440 }, /* NEGX */ +{ CPUFUNC(op_4039_0), 16441 }, /* NEGX */ +{ CPUFUNC(op_4040_0), 16448 }, /* NEGX */ +{ CPUFUNC(op_4050_0), 16464 }, /* NEGX */ +{ CPUFUNC(op_4058_0), 16472 }, /* NEGX */ +{ CPUFUNC(op_4060_0), 16480 }, /* NEGX */ +{ CPUFUNC(op_4068_0), 16488 }, /* NEGX */ +{ CPUFUNC(op_4070_4), 16496 }, /* NEGX */ +{ CPUFUNC(op_4078_0), 16504 }, /* NEGX */ +{ CPUFUNC(op_4079_0), 16505 }, /* NEGX */ +{ CPUFUNC(op_4080_0), 16512 }, /* NEGX */ +{ CPUFUNC(op_4090_0), 16528 }, /* NEGX */ +{ CPUFUNC(op_4098_0), 16536 }, /* NEGX */ +{ CPUFUNC(op_40a0_0), 16544 }, /* NEGX */ +{ CPUFUNC(op_40a8_0), 16552 }, /* NEGX */ +{ CPUFUNC(op_40b0_4), 16560 }, /* NEGX */ +{ CPUFUNC(op_40b8_0), 16568 }, /* NEGX */ +{ CPUFUNC(op_40b9_0), 16569 }, /* NEGX */ { CPUFUNC(op_40c0_5), 16576 }, /* MVSR2 */ { CPUFUNC(op_40d0_5), 16592 }, /* MVSR2 */ { CPUFUNC(op_40d8_5), 16600 }, /* MVSR2 */ @@ -9855,1000 +10306,2571 @@ const struct cputbl CPUFUNC(op_smalltbl_5)[] = { { CPUFUNC(op_40f0_5), 16624 }, /* MVSR2 */ { CPUFUNC(op_40f8_5), 16632 }, /* MVSR2 */ { CPUFUNC(op_40f9_5), 16633 }, /* MVSR2 */ -{ CPUFUNC(op_4100_5), 16640 }, /* CHK */ -{ CPUFUNC(op_4110_5), 16656 }, /* CHK */ -{ CPUFUNC(op_4118_5), 16664 }, /* CHK */ -{ CPUFUNC(op_4120_5), 16672 }, /* CHK */ -{ CPUFUNC(op_4128_5), 16680 }, /* CHK */ -{ CPUFUNC(op_4130_5), 16688 }, /* CHK */ -{ CPUFUNC(op_4138_5), 16696 }, /* CHK */ -{ CPUFUNC(op_4139_5), 16697 }, /* CHK */ -{ CPUFUNC(op_413a_5), 16698 }, /* CHK */ -{ CPUFUNC(op_413b_5), 16699 }, /* CHK */ -{ CPUFUNC(op_413c_5), 16700 }, /* CHK */ -{ CPUFUNC(op_4180_5), 16768 }, /* CHK */ -{ CPUFUNC(op_4190_5), 16784 }, /* CHK */ -{ CPUFUNC(op_4198_5), 16792 }, /* CHK */ -{ CPUFUNC(op_41a0_5), 16800 }, /* CHK */ -{ CPUFUNC(op_41a8_5), 16808 }, /* CHK */ -{ CPUFUNC(op_41b0_5), 16816 }, /* CHK */ -{ CPUFUNC(op_41b8_5), 16824 }, /* CHK */ -{ CPUFUNC(op_41b9_5), 16825 }, /* CHK */ -{ CPUFUNC(op_41ba_5), 16826 }, /* CHK */ -{ CPUFUNC(op_41bb_5), 16827 }, /* CHK */ -{ CPUFUNC(op_41bc_5), 16828 }, /* CHK */ -{ CPUFUNC(op_41d0_5), 16848 }, /* LEA */ -{ CPUFUNC(op_41e8_5), 16872 }, /* LEA */ -{ CPUFUNC(op_41f0_5), 16880 }, /* LEA */ -{ CPUFUNC(op_41f8_5), 16888 }, /* LEA */ -{ CPUFUNC(op_41f9_5), 16889 }, /* LEA */ -{ CPUFUNC(op_41fa_5), 16890 }, /* LEA */ -{ CPUFUNC(op_41fb_5), 16891 }, /* LEA */ -{ CPUFUNC(op_4200_5), 16896 }, /* CLR */ -{ CPUFUNC(op_4210_5), 16912 }, /* CLR */ -{ CPUFUNC(op_4218_5), 16920 }, /* CLR */ -{ CPUFUNC(op_4220_5), 16928 }, /* CLR */ -{ CPUFUNC(op_4228_5), 16936 }, /* CLR */ -{ CPUFUNC(op_4230_5), 16944 }, /* CLR */ -{ CPUFUNC(op_4238_5), 16952 }, /* CLR */ -{ CPUFUNC(op_4239_5), 16953 }, /* CLR */ -{ CPUFUNC(op_4240_5), 16960 }, /* CLR */ -{ CPUFUNC(op_4250_5), 16976 }, /* CLR */ -{ CPUFUNC(op_4258_5), 16984 }, /* CLR */ -{ CPUFUNC(op_4260_5), 16992 }, /* CLR */ -{ CPUFUNC(op_4268_5), 17000 }, /* CLR */ -{ CPUFUNC(op_4270_5), 17008 }, /* CLR */ -{ CPUFUNC(op_4278_5), 17016 }, /* CLR */ -{ CPUFUNC(op_4279_5), 17017 }, /* CLR */ -{ CPUFUNC(op_4280_5), 17024 }, /* CLR */ -{ CPUFUNC(op_4290_5), 17040 }, /* CLR */ -{ CPUFUNC(op_4298_5), 17048 }, /* CLR */ -{ CPUFUNC(op_42a0_5), 17056 }, /* CLR */ -{ CPUFUNC(op_42a8_5), 17064 }, /* CLR */ -{ CPUFUNC(op_42b0_5), 17072 }, /* CLR */ -{ CPUFUNC(op_42b8_5), 17080 }, /* CLR */ -{ CPUFUNC(op_42b9_5), 17081 }, /* CLR */ -{ CPUFUNC(op_4400_5), 17408 }, /* NEG */ -{ CPUFUNC(op_4410_5), 17424 }, /* NEG */ -{ CPUFUNC(op_4418_5), 17432 }, /* NEG */ -{ CPUFUNC(op_4420_5), 17440 }, /* NEG */ -{ CPUFUNC(op_4428_5), 17448 }, /* NEG */ -{ CPUFUNC(op_4430_5), 17456 }, /* NEG */ -{ CPUFUNC(op_4438_5), 17464 }, /* NEG */ -{ CPUFUNC(op_4439_5), 17465 }, /* NEG */ -{ CPUFUNC(op_4440_5), 17472 }, /* NEG */ -{ CPUFUNC(op_4450_5), 17488 }, /* NEG */ -{ CPUFUNC(op_4458_5), 17496 }, /* NEG */ -{ CPUFUNC(op_4460_5), 17504 }, /* NEG */ -{ CPUFUNC(op_4468_5), 17512 }, /* NEG */ -{ CPUFUNC(op_4470_5), 17520 }, /* NEG */ -{ CPUFUNC(op_4478_5), 17528 }, /* NEG */ -{ CPUFUNC(op_4479_5), 17529 }, /* NEG */ -{ CPUFUNC(op_4480_5), 17536 }, /* NEG */ -{ CPUFUNC(op_4490_5), 17552 }, /* NEG */ -{ CPUFUNC(op_4498_5), 17560 }, /* NEG */ -{ CPUFUNC(op_44a0_5), 17568 }, /* NEG */ -{ CPUFUNC(op_44a8_5), 17576 }, /* NEG */ -{ CPUFUNC(op_44b0_5), 17584 }, /* NEG */ -{ CPUFUNC(op_44b8_5), 17592 }, /* NEG */ -{ CPUFUNC(op_44b9_5), 17593 }, /* NEG */ -{ CPUFUNC(op_44c0_5), 17600 }, /* MV2SR */ -{ CPUFUNC(op_44d0_5), 17616 }, /* MV2SR */ -{ CPUFUNC(op_44d8_5), 17624 }, /* MV2SR */ -{ CPUFUNC(op_44e0_5), 17632 }, /* MV2SR */ -{ CPUFUNC(op_44e8_5), 17640 }, /* MV2SR */ -{ CPUFUNC(op_44f0_5), 17648 }, /* MV2SR */ -{ CPUFUNC(op_44f8_5), 17656 }, /* MV2SR */ -{ CPUFUNC(op_44f9_5), 17657 }, /* MV2SR */ -{ CPUFUNC(op_44fa_5), 17658 }, /* MV2SR */ -{ CPUFUNC(op_44fb_5), 17659 }, /* MV2SR */ -{ CPUFUNC(op_44fc_5), 17660 }, /* MV2SR */ -{ CPUFUNC(op_4600_5), 17920 }, /* NOT */ -{ CPUFUNC(op_4610_5), 17936 }, /* NOT */ -{ CPUFUNC(op_4618_5), 17944 }, /* NOT */ -{ CPUFUNC(op_4620_5), 17952 }, /* NOT */ -{ CPUFUNC(op_4628_5), 17960 }, /* NOT */ -{ CPUFUNC(op_4630_5), 17968 }, /* NOT */ -{ CPUFUNC(op_4638_5), 17976 }, /* NOT */ -{ CPUFUNC(op_4639_5), 17977 }, /* NOT */ -{ CPUFUNC(op_4640_5), 17984 }, /* NOT */ -{ CPUFUNC(op_4650_5), 18000 }, /* NOT */ -{ CPUFUNC(op_4658_5), 18008 }, /* NOT */ -{ CPUFUNC(op_4660_5), 18016 }, /* NOT */ -{ CPUFUNC(op_4668_5), 18024 }, /* NOT */ -{ CPUFUNC(op_4670_5), 18032 }, /* NOT */ -{ CPUFUNC(op_4678_5), 18040 }, /* NOT */ -{ CPUFUNC(op_4679_5), 18041 }, /* NOT */ -{ CPUFUNC(op_4680_5), 18048 }, /* NOT */ -{ CPUFUNC(op_4690_5), 18064 }, /* NOT */ -{ CPUFUNC(op_4698_5), 18072 }, /* NOT */ -{ CPUFUNC(op_46a0_5), 18080 }, /* NOT */ -{ CPUFUNC(op_46a8_5), 18088 }, /* NOT */ -{ CPUFUNC(op_46b0_5), 18096 }, /* NOT */ -{ CPUFUNC(op_46b8_5), 18104 }, /* NOT */ -{ CPUFUNC(op_46b9_5), 18105 }, /* NOT */ -{ CPUFUNC(op_46c0_5), 18112 }, /* MV2SR */ -{ CPUFUNC(op_46d0_5), 18128 }, /* MV2SR */ -{ CPUFUNC(op_46d8_5), 18136 }, /* MV2SR */ -{ CPUFUNC(op_46e0_5), 18144 }, /* MV2SR */ -{ CPUFUNC(op_46e8_5), 18152 }, /* MV2SR */ -{ CPUFUNC(op_46f0_5), 18160 }, /* MV2SR */ -{ CPUFUNC(op_46f8_5), 18168 }, /* MV2SR */ -{ CPUFUNC(op_46f9_5), 18169 }, /* MV2SR */ -{ CPUFUNC(op_46fa_5), 18170 }, /* MV2SR */ -{ CPUFUNC(op_46fb_5), 18171 }, /* MV2SR */ -{ CPUFUNC(op_46fc_5), 18172 }, /* MV2SR */ -{ CPUFUNC(op_4800_5), 18432 }, /* NBCD */ -{ CPUFUNC(op_4810_5), 18448 }, /* NBCD */ -{ CPUFUNC(op_4818_5), 18456 }, /* NBCD */ -{ CPUFUNC(op_4820_5), 18464 }, /* NBCD */ -{ CPUFUNC(op_4828_5), 18472 }, /* NBCD */ -{ CPUFUNC(op_4830_5), 18480 }, /* NBCD */ -{ CPUFUNC(op_4838_5), 18488 }, /* NBCD */ -{ CPUFUNC(op_4839_5), 18489 }, /* NBCD */ -{ CPUFUNC(op_4840_5), 18496 }, /* SWAP */ -{ CPUFUNC(op_4850_5), 18512 }, /* PEA */ -{ CPUFUNC(op_4868_5), 18536 }, /* PEA */ -{ CPUFUNC(op_4870_5), 18544 }, /* PEA */ -{ CPUFUNC(op_4878_5), 18552 }, /* PEA */ -{ CPUFUNC(op_4879_5), 18553 }, /* PEA */ -{ CPUFUNC(op_487a_5), 18554 }, /* PEA */ -{ CPUFUNC(op_487b_5), 18555 }, /* PEA */ -{ CPUFUNC(op_4880_5), 18560 }, /* EXT */ -{ CPUFUNC(op_4890_5), 18576 }, /* MVMLE */ -{ CPUFUNC(op_48a0_5), 18592 }, /* MVMLE */ -{ CPUFUNC(op_48a8_5), 18600 }, /* MVMLE */ -{ CPUFUNC(op_48b0_5), 18608 }, /* MVMLE */ -{ CPUFUNC(op_48b8_5), 18616 }, /* MVMLE */ -{ CPUFUNC(op_48b9_5), 18617 }, /* MVMLE */ -{ CPUFUNC(op_48c0_5), 18624 }, /* EXT */ -{ CPUFUNC(op_48d0_5), 18640 }, /* MVMLE */ -{ CPUFUNC(op_48e0_5), 18656 }, /* MVMLE */ -{ CPUFUNC(op_48e8_5), 18664 }, /* MVMLE */ -{ CPUFUNC(op_48f0_5), 18672 }, /* MVMLE */ -{ CPUFUNC(op_48f8_5), 18680 }, /* MVMLE */ -{ CPUFUNC(op_48f9_5), 18681 }, /* MVMLE */ -{ CPUFUNC(op_49c0_5), 18880 }, /* EXT */ -{ CPUFUNC(op_4a00_5), 18944 }, /* TST */ -{ CPUFUNC(op_4a10_5), 18960 }, /* TST */ -{ CPUFUNC(op_4a18_5), 18968 }, /* TST */ -{ CPUFUNC(op_4a20_5), 18976 }, /* TST */ -{ CPUFUNC(op_4a28_5), 18984 }, /* TST */ -{ CPUFUNC(op_4a30_5), 18992 }, /* TST */ -{ CPUFUNC(op_4a38_5), 19000 }, /* TST */ -{ CPUFUNC(op_4a39_5), 19001 }, /* TST */ -{ CPUFUNC(op_4a40_5), 19008 }, /* TST */ -{ CPUFUNC(op_4a50_5), 19024 }, /* TST */ -{ CPUFUNC(op_4a58_5), 19032 }, /* TST */ -{ CPUFUNC(op_4a60_5), 19040 }, /* TST */ -{ CPUFUNC(op_4a68_5), 19048 }, /* TST */ -{ CPUFUNC(op_4a70_5), 19056 }, /* TST */ -{ CPUFUNC(op_4a78_5), 19064 }, /* TST */ -{ CPUFUNC(op_4a79_5), 19065 }, /* TST */ -{ CPUFUNC(op_4a80_5), 19072 }, /* TST */ -{ CPUFUNC(op_4a90_5), 19088 }, /* TST */ -{ CPUFUNC(op_4a98_5), 19096 }, /* TST */ -{ CPUFUNC(op_4aa0_5), 19104 }, /* TST */ -{ CPUFUNC(op_4aa8_5), 19112 }, /* TST */ -{ CPUFUNC(op_4ab0_5), 19120 }, /* TST */ -{ CPUFUNC(op_4ab8_5), 19128 }, /* TST */ -{ CPUFUNC(op_4ab9_5), 19129 }, /* TST */ -{ CPUFUNC(op_4ac0_5), 19136 }, /* TAS */ -{ CPUFUNC(op_4ad0_5), 19152 }, /* TAS */ -{ CPUFUNC(op_4ad8_5), 19160 }, /* TAS */ -{ CPUFUNC(op_4ae0_5), 19168 }, /* TAS */ -{ CPUFUNC(op_4ae8_5), 19176 }, /* TAS */ -{ CPUFUNC(op_4af0_5), 19184 }, /* TAS */ -{ CPUFUNC(op_4af8_5), 19192 }, /* TAS */ -{ CPUFUNC(op_4af9_5), 19193 }, /* TAS */ -{ CPUFUNC(op_4c90_5), 19600 }, /* MVMEL */ -{ CPUFUNC(op_4c98_5), 19608 }, /* MVMEL */ -{ CPUFUNC(op_4ca8_5), 19624 }, /* MVMEL */ -{ CPUFUNC(op_4cb0_5), 19632 }, /* MVMEL */ -{ CPUFUNC(op_4cb8_5), 19640 }, /* MVMEL */ -{ CPUFUNC(op_4cb9_5), 19641 }, /* MVMEL */ -{ CPUFUNC(op_4cba_5), 19642 }, /* MVMEL */ -{ CPUFUNC(op_4cbb_5), 19643 }, /* MVMEL */ -{ CPUFUNC(op_4cd0_5), 19664 }, /* MVMEL */ -{ CPUFUNC(op_4cd8_5), 19672 }, /* MVMEL */ -{ CPUFUNC(op_4ce8_5), 19688 }, /* MVMEL */ -{ CPUFUNC(op_4cf0_5), 19696 }, /* MVMEL */ -{ CPUFUNC(op_4cf8_5), 19704 }, /* MVMEL */ -{ CPUFUNC(op_4cf9_5), 19705 }, /* MVMEL */ -{ CPUFUNC(op_4cfa_5), 19706 }, /* MVMEL */ -{ CPUFUNC(op_4cfb_5), 19707 }, /* MVMEL */ -{ CPUFUNC(op_4e40_5), 20032 }, /* TRAP */ -{ CPUFUNC(op_4e50_5), 20048 }, /* LINK */ -{ CPUFUNC(op_4e58_5), 20056 }, /* UNLK */ -{ CPUFUNC(op_4e60_5), 20064 }, /* MVR2USP */ -{ CPUFUNC(op_4e68_5), 20072 }, /* MVUSP2R */ -{ CPUFUNC(op_4e70_5), 20080 }, /* RESET */ -{ CPUFUNC(op_4e71_5), 20081 }, /* NOP */ -{ CPUFUNC(op_4e72_5), 20082 }, /* STOP */ +{ CPUFUNC(op_4100_0), 16640 }, /* CHK */ +{ CPUFUNC(op_4110_0), 16656 }, /* CHK */ +{ CPUFUNC(op_4118_0), 16664 }, /* CHK */ +{ CPUFUNC(op_4120_0), 16672 }, /* CHK */ +{ CPUFUNC(op_4128_0), 16680 }, /* CHK */ +{ CPUFUNC(op_4130_4), 16688 }, /* CHK */ +{ CPUFUNC(op_4138_0), 16696 }, /* CHK */ +{ CPUFUNC(op_4139_0), 16697 }, /* CHK */ +{ CPUFUNC(op_413a_0), 16698 }, /* CHK */ +{ CPUFUNC(op_413b_4), 16699 }, /* CHK */ +{ CPUFUNC(op_413c_0), 16700 }, /* CHK */ +{ CPUFUNC(op_4180_0), 16768 }, /* CHK */ +{ CPUFUNC(op_4190_0), 16784 }, /* CHK */ +{ CPUFUNC(op_4198_0), 16792 }, /* CHK */ +{ CPUFUNC(op_41a0_0), 16800 }, /* CHK */ +{ CPUFUNC(op_41a8_0), 16808 }, /* CHK */ +{ CPUFUNC(op_41b0_4), 16816 }, /* CHK */ +{ CPUFUNC(op_41b8_0), 16824 }, /* CHK */ +{ CPUFUNC(op_41b9_0), 16825 }, /* CHK */ +{ CPUFUNC(op_41ba_0), 16826 }, /* CHK */ +{ CPUFUNC(op_41bb_4), 16827 }, /* CHK */ +{ CPUFUNC(op_41bc_0), 16828 }, /* CHK */ +{ CPUFUNC(op_41d0_0), 16848 }, /* LEA */ +{ CPUFUNC(op_41e8_0), 16872 }, /* LEA */ +{ CPUFUNC(op_41f0_4), 16880 }, /* LEA */ +{ CPUFUNC(op_41f8_0), 16888 }, /* LEA */ +{ CPUFUNC(op_41f9_0), 16889 }, /* LEA */ +{ CPUFUNC(op_41fa_0), 16890 }, /* LEA */ +{ CPUFUNC(op_41fb_4), 16891 }, /* LEA */ +{ CPUFUNC(op_4200_0), 16896 }, /* CLR */ +{ CPUFUNC(op_4210_0), 16912 }, /* CLR */ +{ CPUFUNC(op_4218_0), 16920 }, /* CLR */ +{ CPUFUNC(op_4220_0), 16928 }, /* CLR */ +{ CPUFUNC(op_4228_0), 16936 }, /* CLR */ +{ CPUFUNC(op_4230_4), 16944 }, /* CLR */ +{ CPUFUNC(op_4238_0), 16952 }, /* CLR */ +{ CPUFUNC(op_4239_0), 16953 }, /* CLR */ +{ CPUFUNC(op_4240_0), 16960 }, /* CLR */ +{ CPUFUNC(op_4250_0), 16976 }, /* CLR */ +{ CPUFUNC(op_4258_0), 16984 }, /* CLR */ +{ CPUFUNC(op_4260_0), 16992 }, /* CLR */ +{ CPUFUNC(op_4268_0), 17000 }, /* CLR */ +{ CPUFUNC(op_4270_4), 17008 }, /* CLR */ +{ CPUFUNC(op_4278_0), 17016 }, /* CLR */ +{ CPUFUNC(op_4279_0), 17017 }, /* CLR */ +{ CPUFUNC(op_4280_0), 17024 }, /* CLR */ +{ CPUFUNC(op_4290_0), 17040 }, /* CLR */ +{ CPUFUNC(op_4298_0), 17048 }, /* CLR */ +{ CPUFUNC(op_42a0_0), 17056 }, /* CLR */ +{ CPUFUNC(op_42a8_0), 17064 }, /* CLR */ +{ CPUFUNC(op_42b0_4), 17072 }, /* CLR */ +{ CPUFUNC(op_42b8_0), 17080 }, /* CLR */ +{ CPUFUNC(op_42b9_0), 17081 }, /* CLR */ +{ CPUFUNC(op_4400_0), 17408 }, /* NEG */ +{ CPUFUNC(op_4410_0), 17424 }, /* NEG */ +{ CPUFUNC(op_4418_0), 17432 }, /* NEG */ +{ CPUFUNC(op_4420_0), 17440 }, /* NEG */ +{ CPUFUNC(op_4428_0), 17448 }, /* NEG */ +{ CPUFUNC(op_4430_4), 17456 }, /* NEG */ +{ CPUFUNC(op_4438_0), 17464 }, /* NEG */ +{ CPUFUNC(op_4439_0), 17465 }, /* NEG */ +{ CPUFUNC(op_4440_0), 17472 }, /* NEG */ +{ CPUFUNC(op_4450_0), 17488 }, /* NEG */ +{ CPUFUNC(op_4458_0), 17496 }, /* NEG */ +{ CPUFUNC(op_4460_0), 17504 }, /* NEG */ +{ CPUFUNC(op_4468_0), 17512 }, /* NEG */ +{ CPUFUNC(op_4470_4), 17520 }, /* NEG */ +{ CPUFUNC(op_4478_0), 17528 }, /* NEG */ +{ CPUFUNC(op_4479_0), 17529 }, /* NEG */ +{ CPUFUNC(op_4480_0), 17536 }, /* NEG */ +{ CPUFUNC(op_4490_0), 17552 }, /* NEG */ +{ CPUFUNC(op_4498_0), 17560 }, /* NEG */ +{ CPUFUNC(op_44a0_0), 17568 }, /* NEG */ +{ CPUFUNC(op_44a8_0), 17576 }, /* NEG */ +{ CPUFUNC(op_44b0_4), 17584 }, /* NEG */ +{ CPUFUNC(op_44b8_0), 17592 }, /* NEG */ +{ CPUFUNC(op_44b9_0), 17593 }, /* NEG */ +{ CPUFUNC(op_44c0_0), 17600 }, /* MV2SR */ +{ CPUFUNC(op_44d0_0), 17616 }, /* MV2SR */ +{ CPUFUNC(op_44d8_0), 17624 }, /* MV2SR */ +{ CPUFUNC(op_44e0_0), 17632 }, /* MV2SR */ +{ CPUFUNC(op_44e8_0), 17640 }, /* MV2SR */ +{ CPUFUNC(op_44f0_4), 17648 }, /* MV2SR */ +{ CPUFUNC(op_44f8_0), 17656 }, /* MV2SR */ +{ CPUFUNC(op_44f9_0), 17657 }, /* MV2SR */ +{ CPUFUNC(op_44fa_0), 17658 }, /* MV2SR */ +{ CPUFUNC(op_44fb_4), 17659 }, /* MV2SR */ +{ CPUFUNC(op_44fc_0), 17660 }, /* MV2SR */ +{ CPUFUNC(op_4600_0), 17920 }, /* NOT */ +{ CPUFUNC(op_4610_0), 17936 }, /* NOT */ +{ CPUFUNC(op_4618_0), 17944 }, /* NOT */ +{ CPUFUNC(op_4620_0), 17952 }, /* NOT */ +{ CPUFUNC(op_4628_0), 17960 }, /* NOT */ +{ CPUFUNC(op_4630_4), 17968 }, /* NOT */ +{ CPUFUNC(op_4638_0), 17976 }, /* NOT */ +{ CPUFUNC(op_4639_0), 17977 }, /* NOT */ +{ CPUFUNC(op_4640_0), 17984 }, /* NOT */ +{ CPUFUNC(op_4650_0), 18000 }, /* NOT */ +{ CPUFUNC(op_4658_0), 18008 }, /* NOT */ +{ CPUFUNC(op_4660_0), 18016 }, /* NOT */ +{ CPUFUNC(op_4668_0), 18024 }, /* NOT */ +{ CPUFUNC(op_4670_4), 18032 }, /* NOT */ +{ CPUFUNC(op_4678_0), 18040 }, /* NOT */ +{ CPUFUNC(op_4679_0), 18041 }, /* NOT */ +{ CPUFUNC(op_4680_0), 18048 }, /* NOT */ +{ CPUFUNC(op_4690_0), 18064 }, /* NOT */ +{ CPUFUNC(op_4698_0), 18072 }, /* NOT */ +{ CPUFUNC(op_46a0_0), 18080 }, /* NOT */ +{ CPUFUNC(op_46a8_0), 18088 }, /* NOT */ +{ CPUFUNC(op_46b0_4), 18096 }, /* NOT */ +{ CPUFUNC(op_46b8_0), 18104 }, /* NOT */ +{ CPUFUNC(op_46b9_0), 18105 }, /* NOT */ +{ CPUFUNC(op_46c0_0), 18112 }, /* MV2SR */ +{ CPUFUNC(op_46d0_0), 18128 }, /* MV2SR */ +{ CPUFUNC(op_46d8_0), 18136 }, /* MV2SR */ +{ CPUFUNC(op_46e0_0), 18144 }, /* MV2SR */ +{ CPUFUNC(op_46e8_0), 18152 }, /* MV2SR */ +{ CPUFUNC(op_46f0_4), 18160 }, /* MV2SR */ +{ CPUFUNC(op_46f8_0), 18168 }, /* MV2SR */ +{ CPUFUNC(op_46f9_0), 18169 }, /* MV2SR */ +{ CPUFUNC(op_46fa_0), 18170 }, /* MV2SR */ +{ CPUFUNC(op_46fb_4), 18171 }, /* MV2SR */ +{ CPUFUNC(op_46fc_0), 18172 }, /* MV2SR */ +{ CPUFUNC(op_4800_2), 18432 }, /* NBCD */ +{ CPUFUNC(op_4810_2), 18448 }, /* NBCD */ +{ CPUFUNC(op_4818_2), 18456 }, /* NBCD */ +{ CPUFUNC(op_4820_2), 18464 }, /* NBCD */ +{ CPUFUNC(op_4828_2), 18472 }, /* NBCD */ +{ CPUFUNC(op_4830_4), 18480 }, /* NBCD */ +{ CPUFUNC(op_4838_2), 18488 }, /* NBCD */ +{ CPUFUNC(op_4839_2), 18489 }, /* NBCD */ +{ CPUFUNC(op_4840_0), 18496 }, /* SWAP */ +{ CPUFUNC(op_4850_0), 18512 }, /* PEA */ +{ CPUFUNC(op_4868_0), 18536 }, /* PEA */ +{ CPUFUNC(op_4870_4), 18544 }, /* PEA */ +{ CPUFUNC(op_4878_0), 18552 }, /* PEA */ +{ CPUFUNC(op_4879_0), 18553 }, /* PEA */ +{ CPUFUNC(op_487a_0), 18554 }, /* PEA */ +{ CPUFUNC(op_487b_4), 18555 }, /* PEA */ +{ CPUFUNC(op_4880_0), 18560 }, /* EXT */ +{ CPUFUNC(op_4890_0), 18576 }, /* MVMLE */ +{ CPUFUNC(op_48a0_0), 18592 }, /* MVMLE */ +{ CPUFUNC(op_48a8_0), 18600 }, /* MVMLE */ +{ CPUFUNC(op_48b0_4), 18608 }, /* MVMLE */ +{ CPUFUNC(op_48b8_0), 18616 }, /* MVMLE */ +{ CPUFUNC(op_48b9_0), 18617 }, /* MVMLE */ +{ CPUFUNC(op_48c0_0), 18624 }, /* EXT */ +{ CPUFUNC(op_48d0_0), 18640 }, /* MVMLE */ +{ CPUFUNC(op_48e0_0), 18656 }, /* MVMLE */ +{ CPUFUNC(op_48e8_0), 18664 }, /* MVMLE */ +{ CPUFUNC(op_48f0_4), 18672 }, /* MVMLE */ +{ CPUFUNC(op_48f8_0), 18680 }, /* MVMLE */ +{ CPUFUNC(op_48f9_0), 18681 }, /* MVMLE */ +{ CPUFUNC(op_49c0_0), 18880 }, /* EXT */ +{ CPUFUNC(op_4a00_0), 18944 }, /* TST */ +{ CPUFUNC(op_4a10_0), 18960 }, /* TST */ +{ CPUFUNC(op_4a18_0), 18968 }, /* TST */ +{ CPUFUNC(op_4a20_0), 18976 }, /* TST */ +{ CPUFUNC(op_4a28_0), 18984 }, /* TST */ +{ CPUFUNC(op_4a30_4), 18992 }, /* TST */ +{ CPUFUNC(op_4a38_0), 19000 }, /* TST */ +{ CPUFUNC(op_4a39_0), 19001 }, /* TST */ +{ CPUFUNC(op_4a40_0), 19008 }, /* TST */ +{ CPUFUNC(op_4a50_0), 19024 }, /* TST */ +{ CPUFUNC(op_4a58_0), 19032 }, /* TST */ +{ CPUFUNC(op_4a60_0), 19040 }, /* TST */ +{ CPUFUNC(op_4a68_0), 19048 }, /* TST */ +{ CPUFUNC(op_4a70_4), 19056 }, /* TST */ +{ CPUFUNC(op_4a78_0), 19064 }, /* TST */ +{ CPUFUNC(op_4a79_0), 19065 }, /* TST */ +{ CPUFUNC(op_4a80_0), 19072 }, /* TST */ +{ CPUFUNC(op_4a90_0), 19088 }, /* TST */ +{ CPUFUNC(op_4a98_0), 19096 }, /* TST */ +{ CPUFUNC(op_4aa0_0), 19104 }, /* TST */ +{ CPUFUNC(op_4aa8_0), 19112 }, /* TST */ +{ CPUFUNC(op_4ab0_4), 19120 }, /* TST */ +{ CPUFUNC(op_4ab8_0), 19128 }, /* TST */ +{ CPUFUNC(op_4ab9_0), 19129 }, /* TST */ +{ CPUFUNC(op_4ac0_0), 19136 }, /* TAS */ +{ CPUFUNC(op_4ad0_0), 19152 }, /* TAS */ +{ CPUFUNC(op_4ad8_0), 19160 }, /* TAS */ +{ CPUFUNC(op_4ae0_0), 19168 }, /* TAS */ +{ CPUFUNC(op_4ae8_0), 19176 }, /* TAS */ +{ CPUFUNC(op_4af0_4), 19184 }, /* TAS */ +{ CPUFUNC(op_4af8_0), 19192 }, /* TAS */ +{ CPUFUNC(op_4af9_0), 19193 }, /* TAS */ +{ CPUFUNC(op_4c90_0), 19600 }, /* MVMEL */ +{ CPUFUNC(op_4c98_0), 19608 }, /* MVMEL */ +{ CPUFUNC(op_4ca8_0), 19624 }, /* MVMEL */ +{ CPUFUNC(op_4cb0_4), 19632 }, /* MVMEL */ +{ CPUFUNC(op_4cb8_0), 19640 }, /* MVMEL */ +{ CPUFUNC(op_4cb9_0), 19641 }, /* MVMEL */ +{ CPUFUNC(op_4cba_0), 19642 }, /* MVMEL */ +{ CPUFUNC(op_4cbb_4), 19643 }, /* MVMEL */ +{ CPUFUNC(op_4cd0_0), 19664 }, /* MVMEL */ +{ CPUFUNC(op_4cd8_0), 19672 }, /* MVMEL */ +{ CPUFUNC(op_4ce8_0), 19688 }, /* MVMEL */ +{ CPUFUNC(op_4cf0_4), 19696 }, /* MVMEL */ +{ CPUFUNC(op_4cf8_0), 19704 }, /* MVMEL */ +{ CPUFUNC(op_4cf9_0), 19705 }, /* MVMEL */ +{ CPUFUNC(op_4cfa_0), 19706 }, /* MVMEL */ +{ CPUFUNC(op_4cfb_4), 19707 }, /* MVMEL */ +{ CPUFUNC(op_4e40_0), 20032 }, /* TRAP */ +{ CPUFUNC(op_4e50_0), 20048 }, /* LINK */ +{ CPUFUNC(op_4e58_0), 20056 }, /* UNLK */ +{ CPUFUNC(op_4e60_0), 20064 }, /* MVR2USP */ +{ CPUFUNC(op_4e68_0), 20072 }, /* MVUSP2R */ +{ CPUFUNC(op_4e70_0), 20080 }, /* RESET */ +{ CPUFUNC(op_4e71_0), 20081 }, /* NOP */ +{ CPUFUNC(op_4e72_0), 20082 }, /* STOP */ { CPUFUNC(op_4e73_5), 20083 }, /* RTE */ -{ CPUFUNC(op_4e74_5), 20084 }, /* RTD */ -{ CPUFUNC(op_4e75_5), 20085 }, /* RTS */ -{ CPUFUNC(op_4e76_5), 20086 }, /* TRAPV */ -{ CPUFUNC(op_4e77_5), 20087 }, /* RTR */ -{ CPUFUNC(op_4e90_5), 20112 }, /* JSR */ -{ CPUFUNC(op_4ea8_5), 20136 }, /* JSR */ -{ CPUFUNC(op_4eb0_5), 20144 }, /* JSR */ -{ CPUFUNC(op_4eb8_5), 20152 }, /* JSR */ -{ CPUFUNC(op_4eb9_5), 20153 }, /* JSR */ -{ CPUFUNC(op_4eba_5), 20154 }, /* JSR */ -{ CPUFUNC(op_4ebb_5), 20155 }, /* JSR */ -{ CPUFUNC(op_4ed0_5), 20176 }, /* JMP */ -{ CPUFUNC(op_4ee8_5), 20200 }, /* JMP */ -{ CPUFUNC(op_4ef0_5), 20208 }, /* JMP */ -{ CPUFUNC(op_4ef8_5), 20216 }, /* JMP */ -{ CPUFUNC(op_4ef9_5), 20217 }, /* JMP */ -{ CPUFUNC(op_4efa_5), 20218 }, /* JMP */ -{ CPUFUNC(op_4efb_5), 20219 }, /* JMP */ -{ CPUFUNC(op_5000_5), 20480 }, /* ADD */ -{ CPUFUNC(op_5010_5), 20496 }, /* ADD */ -{ CPUFUNC(op_5018_5), 20504 }, /* ADD */ -{ CPUFUNC(op_5020_5), 20512 }, /* ADD */ -{ CPUFUNC(op_5028_5), 20520 }, /* ADD */ -{ CPUFUNC(op_5030_5), 20528 }, /* ADD */ -{ CPUFUNC(op_5038_5), 20536 }, /* ADD */ -{ CPUFUNC(op_5039_5), 20537 }, /* ADD */ -{ CPUFUNC(op_5040_5), 20544 }, /* ADD */ -{ CPUFUNC(op_5048_5), 20552 }, /* ADDA */ -{ CPUFUNC(op_5050_5), 20560 }, /* ADD */ -{ CPUFUNC(op_5058_5), 20568 }, /* ADD */ -{ CPUFUNC(op_5060_5), 20576 }, /* ADD */ -{ CPUFUNC(op_5068_5), 20584 }, /* ADD */ -{ CPUFUNC(op_5070_5), 20592 }, /* ADD */ -{ CPUFUNC(op_5078_5), 20600 }, /* ADD */ -{ CPUFUNC(op_5079_5), 20601 }, /* ADD */ -{ CPUFUNC(op_5080_5), 20608 }, /* ADD */ -{ CPUFUNC(op_5088_5), 20616 }, /* ADDA */ -{ CPUFUNC(op_5090_5), 20624 }, /* ADD */ -{ CPUFUNC(op_5098_5), 20632 }, /* ADD */ -{ CPUFUNC(op_50a0_5), 20640 }, /* ADD */ -{ CPUFUNC(op_50a8_5), 20648 }, /* ADD */ -{ CPUFUNC(op_50b0_5), 20656 }, /* ADD */ -{ CPUFUNC(op_50b8_5), 20664 }, /* ADD */ -{ CPUFUNC(op_50b9_5), 20665 }, /* ADD */ -{ CPUFUNC(op_50c0_5), 20672 }, /* Scc */ -{ CPUFUNC(op_50c8_5), 20680 }, /* DBcc */ -{ CPUFUNC(op_50d0_5), 20688 }, /* Scc */ -{ CPUFUNC(op_50d8_5), 20696 }, /* Scc */ -{ CPUFUNC(op_50e0_5), 20704 }, /* Scc */ -{ CPUFUNC(op_50e8_5), 20712 }, /* Scc */ -{ CPUFUNC(op_50f0_5), 20720 }, /* Scc */ -{ CPUFUNC(op_50f8_5), 20728 }, /* Scc */ -{ CPUFUNC(op_50f9_5), 20729 }, /* Scc */ -{ CPUFUNC(op_5100_5), 20736 }, /* SUB */ -{ CPUFUNC(op_5110_5), 20752 }, /* SUB */ -{ CPUFUNC(op_5118_5), 20760 }, /* SUB */ -{ CPUFUNC(op_5120_5), 20768 }, /* SUB */ -{ CPUFUNC(op_5128_5), 20776 }, /* SUB */ -{ CPUFUNC(op_5130_5), 20784 }, /* SUB */ -{ CPUFUNC(op_5138_5), 20792 }, /* SUB */ -{ CPUFUNC(op_5139_5), 20793 }, /* SUB */ -{ CPUFUNC(op_5140_5), 20800 }, /* SUB */ -{ CPUFUNC(op_5148_5), 20808 }, /* SUBA */ -{ CPUFUNC(op_5150_5), 20816 }, /* SUB */ -{ CPUFUNC(op_5158_5), 20824 }, /* SUB */ -{ CPUFUNC(op_5160_5), 20832 }, /* SUB */ -{ CPUFUNC(op_5168_5), 20840 }, /* SUB */ -{ CPUFUNC(op_5170_5), 20848 }, /* SUB */ -{ CPUFUNC(op_5178_5), 20856 }, /* SUB */ -{ CPUFUNC(op_5179_5), 20857 }, /* SUB */ -{ CPUFUNC(op_5180_5), 20864 }, /* SUB */ -{ CPUFUNC(op_5188_5), 20872 }, /* SUBA */ -{ CPUFUNC(op_5190_5), 20880 }, /* SUB */ -{ CPUFUNC(op_5198_5), 20888 }, /* SUB */ -{ CPUFUNC(op_51a0_5), 20896 }, /* SUB */ -{ CPUFUNC(op_51a8_5), 20904 }, /* SUB */ -{ CPUFUNC(op_51b0_5), 20912 }, /* SUB */ -{ CPUFUNC(op_51b8_5), 20920 }, /* SUB */ -{ CPUFUNC(op_51b9_5), 20921 }, /* SUB */ -{ CPUFUNC(op_51c0_5), 20928 }, /* Scc */ -{ CPUFUNC(op_51c8_5), 20936 }, /* DBcc */ -{ CPUFUNC(op_51d0_5), 20944 }, /* Scc */ -{ CPUFUNC(op_51d8_5), 20952 }, /* Scc */ -{ CPUFUNC(op_51e0_5), 20960 }, /* Scc */ -{ CPUFUNC(op_51e8_5), 20968 }, /* Scc */ -{ CPUFUNC(op_51f0_5), 20976 }, /* Scc */ -{ CPUFUNC(op_51f8_5), 20984 }, /* Scc */ -{ CPUFUNC(op_51f9_5), 20985 }, /* Scc */ -{ CPUFUNC(op_52c0_5), 21184 }, /* Scc */ -{ CPUFUNC(op_52c8_5), 21192 }, /* DBcc */ -{ CPUFUNC(op_52d0_5), 21200 }, /* Scc */ -{ CPUFUNC(op_52d8_5), 21208 }, /* Scc */ -{ CPUFUNC(op_52e0_5), 21216 }, /* Scc */ -{ CPUFUNC(op_52e8_5), 21224 }, /* Scc */ -{ CPUFUNC(op_52f0_5), 21232 }, /* Scc */ -{ CPUFUNC(op_52f8_5), 21240 }, /* Scc */ -{ CPUFUNC(op_52f9_5), 21241 }, /* Scc */ -{ CPUFUNC(op_53c0_5), 21440 }, /* Scc */ -{ CPUFUNC(op_53c8_5), 21448 }, /* DBcc */ -{ CPUFUNC(op_53d0_5), 21456 }, /* Scc */ -{ CPUFUNC(op_53d8_5), 21464 }, /* Scc */ -{ CPUFUNC(op_53e0_5), 21472 }, /* Scc */ -{ CPUFUNC(op_53e8_5), 21480 }, /* Scc */ -{ CPUFUNC(op_53f0_5), 21488 }, /* Scc */ -{ CPUFUNC(op_53f8_5), 21496 }, /* Scc */ -{ CPUFUNC(op_53f9_5), 21497 }, /* Scc */ -{ CPUFUNC(op_54c0_5), 21696 }, /* Scc */ -{ CPUFUNC(op_54c8_5), 21704 }, /* DBcc */ -{ CPUFUNC(op_54d0_5), 21712 }, /* Scc */ -{ CPUFUNC(op_54d8_5), 21720 }, /* Scc */ -{ CPUFUNC(op_54e0_5), 21728 }, /* Scc */ -{ CPUFUNC(op_54e8_5), 21736 }, /* Scc */ -{ CPUFUNC(op_54f0_5), 21744 }, /* Scc */ -{ CPUFUNC(op_54f8_5), 21752 }, /* Scc */ -{ CPUFUNC(op_54f9_5), 21753 }, /* Scc */ -{ CPUFUNC(op_55c0_5), 21952 }, /* Scc */ -{ CPUFUNC(op_55c8_5), 21960 }, /* DBcc */ -{ CPUFUNC(op_55d0_5), 21968 }, /* Scc */ -{ CPUFUNC(op_55d8_5), 21976 }, /* Scc */ -{ CPUFUNC(op_55e0_5), 21984 }, /* Scc */ -{ CPUFUNC(op_55e8_5), 21992 }, /* Scc */ -{ CPUFUNC(op_55f0_5), 22000 }, /* Scc */ -{ CPUFUNC(op_55f8_5), 22008 }, /* Scc */ -{ CPUFUNC(op_55f9_5), 22009 }, /* Scc */ -{ CPUFUNC(op_56c0_5), 22208 }, /* Scc */ -{ CPUFUNC(op_56c8_5), 22216 }, /* DBcc */ -{ CPUFUNC(op_56d0_5), 22224 }, /* Scc */ -{ CPUFUNC(op_56d8_5), 22232 }, /* Scc */ -{ CPUFUNC(op_56e0_5), 22240 }, /* Scc */ -{ CPUFUNC(op_56e8_5), 22248 }, /* Scc */ -{ CPUFUNC(op_56f0_5), 22256 }, /* Scc */ -{ CPUFUNC(op_56f8_5), 22264 }, /* Scc */ -{ CPUFUNC(op_56f9_5), 22265 }, /* Scc */ -{ CPUFUNC(op_57c0_5), 22464 }, /* Scc */ -{ CPUFUNC(op_57c8_5), 22472 }, /* DBcc */ -{ CPUFUNC(op_57d0_5), 22480 }, /* Scc */ -{ CPUFUNC(op_57d8_5), 22488 }, /* Scc */ -{ CPUFUNC(op_57e0_5), 22496 }, /* Scc */ -{ CPUFUNC(op_57e8_5), 22504 }, /* Scc */ -{ CPUFUNC(op_57f0_5), 22512 }, /* Scc */ -{ CPUFUNC(op_57f8_5), 22520 }, /* Scc */ -{ CPUFUNC(op_57f9_5), 22521 }, /* Scc */ -{ CPUFUNC(op_58c0_5), 22720 }, /* Scc */ -{ CPUFUNC(op_58c8_5), 22728 }, /* DBcc */ -{ CPUFUNC(op_58d0_5), 22736 }, /* Scc */ -{ CPUFUNC(op_58d8_5), 22744 }, /* Scc */ -{ CPUFUNC(op_58e0_5), 22752 }, /* Scc */ -{ CPUFUNC(op_58e8_5), 22760 }, /* Scc */ -{ CPUFUNC(op_58f0_5), 22768 }, /* Scc */ -{ CPUFUNC(op_58f8_5), 22776 }, /* Scc */ -{ CPUFUNC(op_58f9_5), 22777 }, /* Scc */ -{ CPUFUNC(op_59c0_5), 22976 }, /* Scc */ -{ CPUFUNC(op_59c8_5), 22984 }, /* DBcc */ -{ CPUFUNC(op_59d0_5), 22992 }, /* Scc */ -{ CPUFUNC(op_59d8_5), 23000 }, /* Scc */ -{ CPUFUNC(op_59e0_5), 23008 }, /* Scc */ -{ CPUFUNC(op_59e8_5), 23016 }, /* Scc */ -{ CPUFUNC(op_59f0_5), 23024 }, /* Scc */ -{ CPUFUNC(op_59f8_5), 23032 }, /* Scc */ -{ CPUFUNC(op_59f9_5), 23033 }, /* Scc */ -{ CPUFUNC(op_5ac0_5), 23232 }, /* Scc */ -{ CPUFUNC(op_5ac8_5), 23240 }, /* DBcc */ -{ CPUFUNC(op_5ad0_5), 23248 }, /* Scc */ -{ CPUFUNC(op_5ad8_5), 23256 }, /* Scc */ -{ CPUFUNC(op_5ae0_5), 23264 }, /* Scc */ -{ CPUFUNC(op_5ae8_5), 23272 }, /* Scc */ -{ CPUFUNC(op_5af0_5), 23280 }, /* Scc */ -{ CPUFUNC(op_5af8_5), 23288 }, /* Scc */ -{ CPUFUNC(op_5af9_5), 23289 }, /* Scc */ -{ CPUFUNC(op_5bc0_5), 23488 }, /* Scc */ -{ CPUFUNC(op_5bc8_5), 23496 }, /* DBcc */ -{ CPUFUNC(op_5bd0_5), 23504 }, /* Scc */ -{ CPUFUNC(op_5bd8_5), 23512 }, /* Scc */ -{ CPUFUNC(op_5be0_5), 23520 }, /* Scc */ -{ CPUFUNC(op_5be8_5), 23528 }, /* Scc */ -{ CPUFUNC(op_5bf0_5), 23536 }, /* Scc */ -{ CPUFUNC(op_5bf8_5), 23544 }, /* Scc */ -{ CPUFUNC(op_5bf9_5), 23545 }, /* Scc */ -{ CPUFUNC(op_5cc0_5), 23744 }, /* Scc */ -{ CPUFUNC(op_5cc8_5), 23752 }, /* DBcc */ -{ CPUFUNC(op_5cd0_5), 23760 }, /* Scc */ -{ CPUFUNC(op_5cd8_5), 23768 }, /* Scc */ -{ CPUFUNC(op_5ce0_5), 23776 }, /* Scc */ -{ CPUFUNC(op_5ce8_5), 23784 }, /* Scc */ -{ CPUFUNC(op_5cf0_5), 23792 }, /* Scc */ -{ CPUFUNC(op_5cf8_5), 23800 }, /* Scc */ -{ CPUFUNC(op_5cf9_5), 23801 }, /* Scc */ -{ CPUFUNC(op_5dc0_5), 24000 }, /* Scc */ -{ CPUFUNC(op_5dc8_5), 24008 }, /* DBcc */ -{ CPUFUNC(op_5dd0_5), 24016 }, /* Scc */ -{ CPUFUNC(op_5dd8_5), 24024 }, /* Scc */ -{ CPUFUNC(op_5de0_5), 24032 }, /* Scc */ -{ CPUFUNC(op_5de8_5), 24040 }, /* Scc */ -{ CPUFUNC(op_5df0_5), 24048 }, /* Scc */ -{ CPUFUNC(op_5df8_5), 24056 }, /* Scc */ -{ CPUFUNC(op_5df9_5), 24057 }, /* Scc */ -{ CPUFUNC(op_5ec0_5), 24256 }, /* Scc */ -{ CPUFUNC(op_5ec8_5), 24264 }, /* DBcc */ -{ CPUFUNC(op_5ed0_5), 24272 }, /* Scc */ -{ CPUFUNC(op_5ed8_5), 24280 }, /* Scc */ -{ CPUFUNC(op_5ee0_5), 24288 }, /* Scc */ -{ CPUFUNC(op_5ee8_5), 24296 }, /* Scc */ -{ CPUFUNC(op_5ef0_5), 24304 }, /* Scc */ -{ CPUFUNC(op_5ef8_5), 24312 }, /* Scc */ -{ CPUFUNC(op_5ef9_5), 24313 }, /* Scc */ -{ CPUFUNC(op_5fc0_5), 24512 }, /* Scc */ -{ CPUFUNC(op_5fc8_5), 24520 }, /* DBcc */ -{ CPUFUNC(op_5fd0_5), 24528 }, /* Scc */ -{ CPUFUNC(op_5fd8_5), 24536 }, /* Scc */ -{ CPUFUNC(op_5fe0_5), 24544 }, /* Scc */ -{ CPUFUNC(op_5fe8_5), 24552 }, /* Scc */ -{ CPUFUNC(op_5ff0_5), 24560 }, /* Scc */ -{ CPUFUNC(op_5ff8_5), 24568 }, /* Scc */ -{ CPUFUNC(op_5ff9_5), 24569 }, /* Scc */ -{ CPUFUNC(op_6000_5), 24576 }, /* Bcc */ -{ CPUFUNC(op_6001_5), 24577 }, /* Bcc */ -{ CPUFUNC(op_60ff_5), 24831 }, /* Bcc */ -{ CPUFUNC(op_6100_5), 24832 }, /* BSR */ -{ CPUFUNC(op_6101_5), 24833 }, /* BSR */ -{ CPUFUNC(op_61ff_5), 25087 }, /* BSR */ -{ CPUFUNC(op_6200_5), 25088 }, /* Bcc */ -{ CPUFUNC(op_6201_5), 25089 }, /* Bcc */ -{ CPUFUNC(op_62ff_5), 25343 }, /* Bcc */ -{ CPUFUNC(op_6300_5), 25344 }, /* Bcc */ -{ CPUFUNC(op_6301_5), 25345 }, /* Bcc */ -{ CPUFUNC(op_63ff_5), 25599 }, /* Bcc */ -{ CPUFUNC(op_6400_5), 25600 }, /* Bcc */ -{ CPUFUNC(op_6401_5), 25601 }, /* Bcc */ -{ CPUFUNC(op_64ff_5), 25855 }, /* Bcc */ -{ CPUFUNC(op_6500_5), 25856 }, /* Bcc */ -{ CPUFUNC(op_6501_5), 25857 }, /* Bcc */ -{ CPUFUNC(op_65ff_5), 26111 }, /* Bcc */ -{ CPUFUNC(op_6600_5), 26112 }, /* Bcc */ -{ CPUFUNC(op_6601_5), 26113 }, /* Bcc */ -{ CPUFUNC(op_66ff_5), 26367 }, /* Bcc */ -{ CPUFUNC(op_6700_5), 26368 }, /* Bcc */ -{ CPUFUNC(op_6701_5), 26369 }, /* Bcc */ -{ CPUFUNC(op_67ff_5), 26623 }, /* Bcc */ -{ CPUFUNC(op_6800_5), 26624 }, /* Bcc */ -{ CPUFUNC(op_6801_5), 26625 }, /* Bcc */ -{ CPUFUNC(op_68ff_5), 26879 }, /* Bcc */ -{ CPUFUNC(op_6900_5), 26880 }, /* Bcc */ -{ CPUFUNC(op_6901_5), 26881 }, /* Bcc */ -{ CPUFUNC(op_69ff_5), 27135 }, /* Bcc */ -{ CPUFUNC(op_6a00_5), 27136 }, /* Bcc */ -{ CPUFUNC(op_6a01_5), 27137 }, /* Bcc */ -{ CPUFUNC(op_6aff_5), 27391 }, /* Bcc */ -{ CPUFUNC(op_6b00_5), 27392 }, /* Bcc */ -{ CPUFUNC(op_6b01_5), 27393 }, /* Bcc */ -{ CPUFUNC(op_6bff_5), 27647 }, /* Bcc */ -{ CPUFUNC(op_6c00_5), 27648 }, /* Bcc */ -{ CPUFUNC(op_6c01_5), 27649 }, /* Bcc */ -{ CPUFUNC(op_6cff_5), 27903 }, /* Bcc */ -{ CPUFUNC(op_6d00_5), 27904 }, /* Bcc */ -{ CPUFUNC(op_6d01_5), 27905 }, /* Bcc */ -{ CPUFUNC(op_6dff_5), 28159 }, /* Bcc */ -{ CPUFUNC(op_6e00_5), 28160 }, /* Bcc */ -{ CPUFUNC(op_6e01_5), 28161 }, /* Bcc */ -{ CPUFUNC(op_6eff_5), 28415 }, /* Bcc */ -{ CPUFUNC(op_6f00_5), 28416 }, /* Bcc */ -{ CPUFUNC(op_6f01_5), 28417 }, /* Bcc */ -{ CPUFUNC(op_6fff_5), 28671 }, /* Bcc */ -{ CPUFUNC(op_7000_5), 28672 }, /* MOVE */ -{ CPUFUNC(op_8000_5), 32768 }, /* OR */ -{ CPUFUNC(op_8010_5), 32784 }, /* OR */ -{ CPUFUNC(op_8018_5), 32792 }, /* OR */ -{ CPUFUNC(op_8020_5), 32800 }, /* OR */ -{ CPUFUNC(op_8028_5), 32808 }, /* OR */ -{ CPUFUNC(op_8030_5), 32816 }, /* OR */ -{ CPUFUNC(op_8038_5), 32824 }, /* OR */ -{ CPUFUNC(op_8039_5), 32825 }, /* OR */ -{ CPUFUNC(op_803a_5), 32826 }, /* OR */ -{ CPUFUNC(op_803b_5), 32827 }, /* OR */ -{ CPUFUNC(op_803c_5), 32828 }, /* OR */ -{ CPUFUNC(op_8040_5), 32832 }, /* OR */ -{ CPUFUNC(op_8050_5), 32848 }, /* OR */ -{ CPUFUNC(op_8058_5), 32856 }, /* OR */ -{ CPUFUNC(op_8060_5), 32864 }, /* OR */ -{ CPUFUNC(op_8068_5), 32872 }, /* OR */ -{ CPUFUNC(op_8070_5), 32880 }, /* OR */ -{ CPUFUNC(op_8078_5), 32888 }, /* OR */ -{ CPUFUNC(op_8079_5), 32889 }, /* OR */ -{ CPUFUNC(op_807a_5), 32890 }, /* OR */ -{ CPUFUNC(op_807b_5), 32891 }, /* OR */ -{ CPUFUNC(op_807c_5), 32892 }, /* OR */ -{ CPUFUNC(op_8080_5), 32896 }, /* OR */ -{ CPUFUNC(op_8090_5), 32912 }, /* OR */ -{ CPUFUNC(op_8098_5), 32920 }, /* OR */ -{ CPUFUNC(op_80a0_5), 32928 }, /* OR */ -{ CPUFUNC(op_80a8_5), 32936 }, /* OR */ -{ CPUFUNC(op_80b0_5), 32944 }, /* OR */ -{ CPUFUNC(op_80b8_5), 32952 }, /* OR */ -{ CPUFUNC(op_80b9_5), 32953 }, /* OR */ -{ CPUFUNC(op_80ba_5), 32954 }, /* OR */ -{ CPUFUNC(op_80bb_5), 32955 }, /* OR */ -{ CPUFUNC(op_80bc_5), 32956 }, /* OR */ -{ CPUFUNC(op_80c0_5), 32960 }, /* DIVU */ -{ CPUFUNC(op_80d0_5), 32976 }, /* DIVU */ -{ CPUFUNC(op_80d8_5), 32984 }, /* DIVU */ -{ CPUFUNC(op_80e0_5), 32992 }, /* DIVU */ -{ CPUFUNC(op_80e8_5), 33000 }, /* DIVU */ -{ CPUFUNC(op_80f0_5), 33008 }, /* DIVU */ -{ CPUFUNC(op_80f8_5), 33016 }, /* DIVU */ -{ CPUFUNC(op_80f9_5), 33017 }, /* DIVU */ -{ CPUFUNC(op_80fa_5), 33018 }, /* DIVU */ -{ CPUFUNC(op_80fb_5), 33019 }, /* DIVU */ -{ CPUFUNC(op_80fc_5), 33020 }, /* DIVU */ -{ CPUFUNC(op_8100_5), 33024 }, /* SBCD */ -{ CPUFUNC(op_8108_5), 33032 }, /* SBCD */ -{ CPUFUNC(op_8110_5), 33040 }, /* OR */ -{ CPUFUNC(op_8118_5), 33048 }, /* OR */ -{ CPUFUNC(op_8120_5), 33056 }, /* OR */ -{ CPUFUNC(op_8128_5), 33064 }, /* OR */ -{ CPUFUNC(op_8130_5), 33072 }, /* OR */ -{ CPUFUNC(op_8138_5), 33080 }, /* OR */ -{ CPUFUNC(op_8139_5), 33081 }, /* OR */ -{ CPUFUNC(op_8150_5), 33104 }, /* OR */ -{ CPUFUNC(op_8158_5), 33112 }, /* OR */ -{ CPUFUNC(op_8160_5), 33120 }, /* OR */ -{ CPUFUNC(op_8168_5), 33128 }, /* OR */ -{ CPUFUNC(op_8170_5), 33136 }, /* OR */ -{ CPUFUNC(op_8178_5), 33144 }, /* OR */ -{ CPUFUNC(op_8179_5), 33145 }, /* OR */ -{ CPUFUNC(op_8190_5), 33168 }, /* OR */ -{ CPUFUNC(op_8198_5), 33176 }, /* OR */ -{ CPUFUNC(op_81a0_5), 33184 }, /* OR */ -{ CPUFUNC(op_81a8_5), 33192 }, /* OR */ -{ CPUFUNC(op_81b0_5), 33200 }, /* OR */ -{ CPUFUNC(op_81b8_5), 33208 }, /* OR */ -{ CPUFUNC(op_81b9_5), 33209 }, /* OR */ -{ CPUFUNC(op_81c0_5), 33216 }, /* DIVS */ -{ CPUFUNC(op_81d0_5), 33232 }, /* DIVS */ -{ CPUFUNC(op_81d8_5), 33240 }, /* DIVS */ -{ CPUFUNC(op_81e0_5), 33248 }, /* DIVS */ -{ CPUFUNC(op_81e8_5), 33256 }, /* DIVS */ -{ CPUFUNC(op_81f0_5), 33264 }, /* DIVS */ -{ CPUFUNC(op_81f8_5), 33272 }, /* DIVS */ -{ CPUFUNC(op_81f9_5), 33273 }, /* DIVS */ -{ CPUFUNC(op_81fa_5), 33274 }, /* DIVS */ -{ CPUFUNC(op_81fb_5), 33275 }, /* DIVS */ -{ CPUFUNC(op_81fc_5), 33276 }, /* DIVS */ -{ CPUFUNC(op_9000_5), 36864 }, /* SUB */ -{ CPUFUNC(op_9010_5), 36880 }, /* SUB */ -{ CPUFUNC(op_9018_5), 36888 }, /* SUB */ -{ CPUFUNC(op_9020_5), 36896 }, /* SUB */ -{ CPUFUNC(op_9028_5), 36904 }, /* SUB */ -{ CPUFUNC(op_9030_5), 36912 }, /* SUB */ -{ CPUFUNC(op_9038_5), 36920 }, /* SUB */ -{ CPUFUNC(op_9039_5), 36921 }, /* SUB */ -{ CPUFUNC(op_903a_5), 36922 }, /* SUB */ -{ CPUFUNC(op_903b_5), 36923 }, /* SUB */ -{ CPUFUNC(op_903c_5), 36924 }, /* SUB */ -{ CPUFUNC(op_9040_5), 36928 }, /* SUB */ -{ CPUFUNC(op_9048_5), 36936 }, /* SUB */ -{ CPUFUNC(op_9050_5), 36944 }, /* SUB */ -{ CPUFUNC(op_9058_5), 36952 }, /* SUB */ -{ CPUFUNC(op_9060_5), 36960 }, /* SUB */ -{ CPUFUNC(op_9068_5), 36968 }, /* SUB */ -{ CPUFUNC(op_9070_5), 36976 }, /* SUB */ -{ CPUFUNC(op_9078_5), 36984 }, /* SUB */ -{ CPUFUNC(op_9079_5), 36985 }, /* SUB */ -{ CPUFUNC(op_907a_5), 36986 }, /* SUB */ -{ CPUFUNC(op_907b_5), 36987 }, /* SUB */ -{ CPUFUNC(op_907c_5), 36988 }, /* SUB */ -{ CPUFUNC(op_9080_5), 36992 }, /* SUB */ -{ CPUFUNC(op_9088_5), 37000 }, /* SUB */ -{ CPUFUNC(op_9090_5), 37008 }, /* SUB */ -{ CPUFUNC(op_9098_5), 37016 }, /* SUB */ -{ CPUFUNC(op_90a0_5), 37024 }, /* SUB */ -{ CPUFUNC(op_90a8_5), 37032 }, /* SUB */ -{ CPUFUNC(op_90b0_5), 37040 }, /* SUB */ -{ CPUFUNC(op_90b8_5), 37048 }, /* SUB */ -{ CPUFUNC(op_90b9_5), 37049 }, /* SUB */ -{ CPUFUNC(op_90ba_5), 37050 }, /* SUB */ -{ CPUFUNC(op_90bb_5), 37051 }, /* SUB */ -{ CPUFUNC(op_90bc_5), 37052 }, /* SUB */ -{ CPUFUNC(op_90c0_5), 37056 }, /* SUBA */ -{ CPUFUNC(op_90c8_5), 37064 }, /* SUBA */ -{ CPUFUNC(op_90d0_5), 37072 }, /* SUBA */ -{ CPUFUNC(op_90d8_5), 37080 }, /* SUBA */ -{ CPUFUNC(op_90e0_5), 37088 }, /* SUBA */ -{ CPUFUNC(op_90e8_5), 37096 }, /* SUBA */ -{ CPUFUNC(op_90f0_5), 37104 }, /* SUBA */ -{ CPUFUNC(op_90f8_5), 37112 }, /* SUBA */ -{ CPUFUNC(op_90f9_5), 37113 }, /* SUBA */ -{ CPUFUNC(op_90fa_5), 37114 }, /* SUBA */ -{ CPUFUNC(op_90fb_5), 37115 }, /* SUBA */ -{ CPUFUNC(op_90fc_5), 37116 }, /* SUBA */ -{ CPUFUNC(op_9100_5), 37120 }, /* SUBX */ -{ CPUFUNC(op_9108_5), 37128 }, /* SUBX */ -{ CPUFUNC(op_9110_5), 37136 }, /* SUB */ -{ CPUFUNC(op_9118_5), 37144 }, /* SUB */ -{ CPUFUNC(op_9120_5), 37152 }, /* SUB */ -{ CPUFUNC(op_9128_5), 37160 }, /* SUB */ -{ CPUFUNC(op_9130_5), 37168 }, /* SUB */ -{ CPUFUNC(op_9138_5), 37176 }, /* SUB */ -{ CPUFUNC(op_9139_5), 37177 }, /* SUB */ -{ CPUFUNC(op_9140_5), 37184 }, /* SUBX */ -{ CPUFUNC(op_9148_5), 37192 }, /* SUBX */ -{ CPUFUNC(op_9150_5), 37200 }, /* SUB */ -{ CPUFUNC(op_9158_5), 37208 }, /* SUB */ -{ CPUFUNC(op_9160_5), 37216 }, /* SUB */ -{ CPUFUNC(op_9168_5), 37224 }, /* SUB */ -{ CPUFUNC(op_9170_5), 37232 }, /* SUB */ -{ CPUFUNC(op_9178_5), 37240 }, /* SUB */ -{ CPUFUNC(op_9179_5), 37241 }, /* SUB */ -{ CPUFUNC(op_9180_5), 37248 }, /* SUBX */ -{ CPUFUNC(op_9188_5), 37256 }, /* SUBX */ -{ CPUFUNC(op_9190_5), 37264 }, /* SUB */ -{ CPUFUNC(op_9198_5), 37272 }, /* SUB */ -{ CPUFUNC(op_91a0_5), 37280 }, /* SUB */ -{ CPUFUNC(op_91a8_5), 37288 }, /* SUB */ -{ CPUFUNC(op_91b0_5), 37296 }, /* SUB */ -{ CPUFUNC(op_91b8_5), 37304 }, /* SUB */ -{ CPUFUNC(op_91b9_5), 37305 }, /* SUB */ -{ CPUFUNC(op_91c0_5), 37312 }, /* SUBA */ -{ CPUFUNC(op_91c8_5), 37320 }, /* SUBA */ -{ CPUFUNC(op_91d0_5), 37328 }, /* SUBA */ -{ CPUFUNC(op_91d8_5), 37336 }, /* SUBA */ -{ CPUFUNC(op_91e0_5), 37344 }, /* SUBA */ -{ CPUFUNC(op_91e8_5), 37352 }, /* SUBA */ -{ CPUFUNC(op_91f0_5), 37360 }, /* SUBA */ -{ CPUFUNC(op_91f8_5), 37368 }, /* SUBA */ -{ CPUFUNC(op_91f9_5), 37369 }, /* SUBA */ -{ CPUFUNC(op_91fa_5), 37370 }, /* SUBA */ -{ CPUFUNC(op_91fb_5), 37371 }, /* SUBA */ -{ CPUFUNC(op_91fc_5), 37372 }, /* SUBA */ -{ CPUFUNC(op_b000_5), 45056 }, /* CMP */ -{ CPUFUNC(op_b010_5), 45072 }, /* CMP */ -{ CPUFUNC(op_b018_5), 45080 }, /* CMP */ -{ CPUFUNC(op_b020_5), 45088 }, /* CMP */ -{ CPUFUNC(op_b028_5), 45096 }, /* CMP */ -{ CPUFUNC(op_b030_5), 45104 }, /* CMP */ -{ CPUFUNC(op_b038_5), 45112 }, /* CMP */ -{ CPUFUNC(op_b039_5), 45113 }, /* CMP */ -{ CPUFUNC(op_b03a_5), 45114 }, /* CMP */ -{ CPUFUNC(op_b03b_5), 45115 }, /* CMP */ -{ CPUFUNC(op_b03c_5), 45116 }, /* CMP */ -{ CPUFUNC(op_b040_5), 45120 }, /* CMP */ -{ CPUFUNC(op_b048_5), 45128 }, /* CMP */ -{ CPUFUNC(op_b050_5), 45136 }, /* CMP */ -{ CPUFUNC(op_b058_5), 45144 }, /* CMP */ -{ CPUFUNC(op_b060_5), 45152 }, /* CMP */ -{ CPUFUNC(op_b068_5), 45160 }, /* CMP */ -{ CPUFUNC(op_b070_5), 45168 }, /* CMP */ -{ CPUFUNC(op_b078_5), 45176 }, /* CMP */ -{ CPUFUNC(op_b079_5), 45177 }, /* CMP */ -{ CPUFUNC(op_b07a_5), 45178 }, /* CMP */ -{ CPUFUNC(op_b07b_5), 45179 }, /* CMP */ -{ CPUFUNC(op_b07c_5), 45180 }, /* CMP */ -{ CPUFUNC(op_b080_5), 45184 }, /* CMP */ -{ CPUFUNC(op_b088_5), 45192 }, /* CMP */ -{ CPUFUNC(op_b090_5), 45200 }, /* CMP */ -{ CPUFUNC(op_b098_5), 45208 }, /* CMP */ -{ CPUFUNC(op_b0a0_5), 45216 }, /* CMP */ -{ CPUFUNC(op_b0a8_5), 45224 }, /* CMP */ -{ CPUFUNC(op_b0b0_5), 45232 }, /* CMP */ -{ CPUFUNC(op_b0b8_5), 45240 }, /* CMP */ -{ CPUFUNC(op_b0b9_5), 45241 }, /* CMP */ -{ CPUFUNC(op_b0ba_5), 45242 }, /* CMP */ -{ CPUFUNC(op_b0bb_5), 45243 }, /* CMP */ -{ CPUFUNC(op_b0bc_5), 45244 }, /* CMP */ -{ CPUFUNC(op_b0c0_5), 45248 }, /* CMPA */ -{ CPUFUNC(op_b0c8_5), 45256 }, /* CMPA */ -{ CPUFUNC(op_b0d0_5), 45264 }, /* CMPA */ -{ CPUFUNC(op_b0d8_5), 45272 }, /* CMPA */ -{ CPUFUNC(op_b0e0_5), 45280 }, /* CMPA */ -{ CPUFUNC(op_b0e8_5), 45288 }, /* CMPA */ -{ CPUFUNC(op_b0f0_5), 45296 }, /* CMPA */ -{ CPUFUNC(op_b0f8_5), 45304 }, /* CMPA */ -{ CPUFUNC(op_b0f9_5), 45305 }, /* CMPA */ -{ CPUFUNC(op_b0fa_5), 45306 }, /* CMPA */ -{ CPUFUNC(op_b0fb_5), 45307 }, /* CMPA */ -{ CPUFUNC(op_b0fc_5), 45308 }, /* CMPA */ -{ CPUFUNC(op_b100_5), 45312 }, /* EOR */ -{ CPUFUNC(op_b108_5), 45320 }, /* CMPM */ -{ CPUFUNC(op_b110_5), 45328 }, /* EOR */ -{ CPUFUNC(op_b118_5), 45336 }, /* EOR */ -{ CPUFUNC(op_b120_5), 45344 }, /* EOR */ -{ CPUFUNC(op_b128_5), 45352 }, /* EOR */ -{ CPUFUNC(op_b130_5), 45360 }, /* EOR */ -{ CPUFUNC(op_b138_5), 45368 }, /* EOR */ -{ CPUFUNC(op_b139_5), 45369 }, /* EOR */ -{ CPUFUNC(op_b140_5), 45376 }, /* EOR */ -{ CPUFUNC(op_b148_5), 45384 }, /* CMPM */ -{ CPUFUNC(op_b150_5), 45392 }, /* EOR */ -{ CPUFUNC(op_b158_5), 45400 }, /* EOR */ -{ CPUFUNC(op_b160_5), 45408 }, /* EOR */ -{ CPUFUNC(op_b168_5), 45416 }, /* EOR */ -{ CPUFUNC(op_b170_5), 45424 }, /* EOR */ -{ CPUFUNC(op_b178_5), 45432 }, /* EOR */ -{ CPUFUNC(op_b179_5), 45433 }, /* EOR */ -{ CPUFUNC(op_b180_5), 45440 }, /* EOR */ -{ CPUFUNC(op_b188_5), 45448 }, /* CMPM */ -{ CPUFUNC(op_b190_5), 45456 }, /* EOR */ -{ CPUFUNC(op_b198_5), 45464 }, /* EOR */ -{ CPUFUNC(op_b1a0_5), 45472 }, /* EOR */ -{ CPUFUNC(op_b1a8_5), 45480 }, /* EOR */ -{ CPUFUNC(op_b1b0_5), 45488 }, /* EOR */ -{ CPUFUNC(op_b1b8_5), 45496 }, /* EOR */ -{ CPUFUNC(op_b1b9_5), 45497 }, /* EOR */ -{ CPUFUNC(op_b1c0_5), 45504 }, /* CMPA */ -{ CPUFUNC(op_b1c8_5), 45512 }, /* CMPA */ -{ CPUFUNC(op_b1d0_5), 45520 }, /* CMPA */ -{ CPUFUNC(op_b1d8_5), 45528 }, /* CMPA */ -{ CPUFUNC(op_b1e0_5), 45536 }, /* CMPA */ -{ CPUFUNC(op_b1e8_5), 45544 }, /* CMPA */ -{ CPUFUNC(op_b1f0_5), 45552 }, /* CMPA */ -{ CPUFUNC(op_b1f8_5), 45560 }, /* CMPA */ -{ CPUFUNC(op_b1f9_5), 45561 }, /* CMPA */ -{ CPUFUNC(op_b1fa_5), 45562 }, /* CMPA */ -{ CPUFUNC(op_b1fb_5), 45563 }, /* CMPA */ -{ CPUFUNC(op_b1fc_5), 45564 }, /* CMPA */ -{ CPUFUNC(op_c000_5), 49152 }, /* AND */ -{ CPUFUNC(op_c010_5), 49168 }, /* AND */ -{ CPUFUNC(op_c018_5), 49176 }, /* AND */ -{ CPUFUNC(op_c020_5), 49184 }, /* AND */ -{ CPUFUNC(op_c028_5), 49192 }, /* AND */ -{ CPUFUNC(op_c030_5), 49200 }, /* AND */ -{ CPUFUNC(op_c038_5), 49208 }, /* AND */ -{ CPUFUNC(op_c039_5), 49209 }, /* AND */ -{ CPUFUNC(op_c03a_5), 49210 }, /* AND */ -{ CPUFUNC(op_c03b_5), 49211 }, /* AND */ -{ CPUFUNC(op_c03c_5), 49212 }, /* AND */ -{ CPUFUNC(op_c040_5), 49216 }, /* AND */ -{ CPUFUNC(op_c050_5), 49232 }, /* AND */ -{ CPUFUNC(op_c058_5), 49240 }, /* AND */ -{ CPUFUNC(op_c060_5), 49248 }, /* AND */ -{ CPUFUNC(op_c068_5), 49256 }, /* AND */ -{ CPUFUNC(op_c070_5), 49264 }, /* AND */ -{ CPUFUNC(op_c078_5), 49272 }, /* AND */ -{ CPUFUNC(op_c079_5), 49273 }, /* AND */ -{ CPUFUNC(op_c07a_5), 49274 }, /* AND */ -{ CPUFUNC(op_c07b_5), 49275 }, /* AND */ -{ CPUFUNC(op_c07c_5), 49276 }, /* AND */ -{ CPUFUNC(op_c080_5), 49280 }, /* AND */ -{ CPUFUNC(op_c090_5), 49296 }, /* AND */ -{ CPUFUNC(op_c098_5), 49304 }, /* AND */ -{ CPUFUNC(op_c0a0_5), 49312 }, /* AND */ -{ CPUFUNC(op_c0a8_5), 49320 }, /* AND */ -{ CPUFUNC(op_c0b0_5), 49328 }, /* AND */ -{ CPUFUNC(op_c0b8_5), 49336 }, /* AND */ -{ CPUFUNC(op_c0b9_5), 49337 }, /* AND */ -{ CPUFUNC(op_c0ba_5), 49338 }, /* AND */ -{ CPUFUNC(op_c0bb_5), 49339 }, /* AND */ -{ CPUFUNC(op_c0bc_5), 49340 }, /* AND */ -{ CPUFUNC(op_c0c0_5), 49344 }, /* MULU */ -{ CPUFUNC(op_c0d0_5), 49360 }, /* MULU */ -{ CPUFUNC(op_c0d8_5), 49368 }, /* MULU */ -{ CPUFUNC(op_c0e0_5), 49376 }, /* MULU */ -{ CPUFUNC(op_c0e8_5), 49384 }, /* MULU */ -{ CPUFUNC(op_c0f0_5), 49392 }, /* MULU */ -{ CPUFUNC(op_c0f8_5), 49400 }, /* MULU */ -{ CPUFUNC(op_c0f9_5), 49401 }, /* MULU */ -{ CPUFUNC(op_c0fa_5), 49402 }, /* MULU */ -{ CPUFUNC(op_c0fb_5), 49403 }, /* MULU */ -{ CPUFUNC(op_c0fc_5), 49404 }, /* MULU */ -{ CPUFUNC(op_c100_5), 49408 }, /* ABCD */ -{ CPUFUNC(op_c108_5), 49416 }, /* ABCD */ -{ CPUFUNC(op_c110_5), 49424 }, /* AND */ -{ CPUFUNC(op_c118_5), 49432 }, /* AND */ -{ CPUFUNC(op_c120_5), 49440 }, /* AND */ -{ CPUFUNC(op_c128_5), 49448 }, /* AND */ -{ CPUFUNC(op_c130_5), 49456 }, /* AND */ -{ CPUFUNC(op_c138_5), 49464 }, /* AND */ -{ CPUFUNC(op_c139_5), 49465 }, /* AND */ -{ CPUFUNC(op_c140_5), 49472 }, /* EXG */ -{ CPUFUNC(op_c148_5), 49480 }, /* EXG */ -{ CPUFUNC(op_c150_5), 49488 }, /* AND */ -{ CPUFUNC(op_c158_5), 49496 }, /* AND */ -{ CPUFUNC(op_c160_5), 49504 }, /* AND */ -{ CPUFUNC(op_c168_5), 49512 }, /* AND */ -{ CPUFUNC(op_c170_5), 49520 }, /* AND */ -{ CPUFUNC(op_c178_5), 49528 }, /* AND */ -{ CPUFUNC(op_c179_5), 49529 }, /* AND */ -{ CPUFUNC(op_c188_5), 49544 }, /* EXG */ -{ CPUFUNC(op_c190_5), 49552 }, /* AND */ -{ CPUFUNC(op_c198_5), 49560 }, /* AND */ -{ CPUFUNC(op_c1a0_5), 49568 }, /* AND */ -{ CPUFUNC(op_c1a8_5), 49576 }, /* AND */ -{ CPUFUNC(op_c1b0_5), 49584 }, /* AND */ -{ CPUFUNC(op_c1b8_5), 49592 }, /* AND */ -{ CPUFUNC(op_c1b9_5), 49593 }, /* AND */ -{ CPUFUNC(op_c1c0_5), 49600 }, /* MULS */ -{ CPUFUNC(op_c1d0_5), 49616 }, /* MULS */ -{ CPUFUNC(op_c1d8_5), 49624 }, /* MULS */ -{ CPUFUNC(op_c1e0_5), 49632 }, /* MULS */ -{ CPUFUNC(op_c1e8_5), 49640 }, /* MULS */ -{ CPUFUNC(op_c1f0_5), 49648 }, /* MULS */ -{ CPUFUNC(op_c1f8_5), 49656 }, /* MULS */ -{ CPUFUNC(op_c1f9_5), 49657 }, /* MULS */ -{ CPUFUNC(op_c1fa_5), 49658 }, /* MULS */ -{ CPUFUNC(op_c1fb_5), 49659 }, /* MULS */ -{ CPUFUNC(op_c1fc_5), 49660 }, /* MULS */ -{ CPUFUNC(op_d000_5), 53248 }, /* ADD */ -{ CPUFUNC(op_d010_5), 53264 }, /* ADD */ -{ CPUFUNC(op_d018_5), 53272 }, /* ADD */ -{ CPUFUNC(op_d020_5), 53280 }, /* ADD */ -{ CPUFUNC(op_d028_5), 53288 }, /* ADD */ -{ CPUFUNC(op_d030_5), 53296 }, /* ADD */ -{ CPUFUNC(op_d038_5), 53304 }, /* ADD */ -{ CPUFUNC(op_d039_5), 53305 }, /* ADD */ -{ CPUFUNC(op_d03a_5), 53306 }, /* ADD */ -{ CPUFUNC(op_d03b_5), 53307 }, /* ADD */ -{ CPUFUNC(op_d03c_5), 53308 }, /* ADD */ -{ CPUFUNC(op_d040_5), 53312 }, /* ADD */ -{ CPUFUNC(op_d048_5), 53320 }, /* ADD */ -{ CPUFUNC(op_d050_5), 53328 }, /* ADD */ -{ CPUFUNC(op_d058_5), 53336 }, /* ADD */ -{ CPUFUNC(op_d060_5), 53344 }, /* ADD */ -{ CPUFUNC(op_d068_5), 53352 }, /* ADD */ -{ CPUFUNC(op_d070_5), 53360 }, /* ADD */ -{ CPUFUNC(op_d078_5), 53368 }, /* ADD */ -{ CPUFUNC(op_d079_5), 53369 }, /* ADD */ -{ CPUFUNC(op_d07a_5), 53370 }, /* ADD */ -{ CPUFUNC(op_d07b_5), 53371 }, /* ADD */ -{ CPUFUNC(op_d07c_5), 53372 }, /* ADD */ -{ CPUFUNC(op_d080_5), 53376 }, /* ADD */ -{ CPUFUNC(op_d088_5), 53384 }, /* ADD */ -{ CPUFUNC(op_d090_5), 53392 }, /* ADD */ -{ CPUFUNC(op_d098_5), 53400 }, /* ADD */ -{ CPUFUNC(op_d0a0_5), 53408 }, /* ADD */ -{ CPUFUNC(op_d0a8_5), 53416 }, /* ADD */ -{ CPUFUNC(op_d0b0_5), 53424 }, /* ADD */ -{ CPUFUNC(op_d0b8_5), 53432 }, /* ADD */ -{ CPUFUNC(op_d0b9_5), 53433 }, /* ADD */ -{ CPUFUNC(op_d0ba_5), 53434 }, /* ADD */ -{ CPUFUNC(op_d0bb_5), 53435 }, /* ADD */ -{ CPUFUNC(op_d0bc_5), 53436 }, /* ADD */ -{ CPUFUNC(op_d0c0_5), 53440 }, /* ADDA */ -{ CPUFUNC(op_d0c8_5), 53448 }, /* ADDA */ -{ CPUFUNC(op_d0d0_5), 53456 }, /* ADDA */ -{ CPUFUNC(op_d0d8_5), 53464 }, /* ADDA */ -{ CPUFUNC(op_d0e0_5), 53472 }, /* ADDA */ -{ CPUFUNC(op_d0e8_5), 53480 }, /* ADDA */ -{ CPUFUNC(op_d0f0_5), 53488 }, /* ADDA */ -{ CPUFUNC(op_d0f8_5), 53496 }, /* ADDA */ -{ CPUFUNC(op_d0f9_5), 53497 }, /* ADDA */ -{ CPUFUNC(op_d0fa_5), 53498 }, /* ADDA */ -{ CPUFUNC(op_d0fb_5), 53499 }, /* ADDA */ -{ CPUFUNC(op_d0fc_5), 53500 }, /* ADDA */ -{ CPUFUNC(op_d100_5), 53504 }, /* ADDX */ -{ CPUFUNC(op_d108_5), 53512 }, /* ADDX */ -{ CPUFUNC(op_d110_5), 53520 }, /* ADD */ -{ CPUFUNC(op_d118_5), 53528 }, /* ADD */ -{ CPUFUNC(op_d120_5), 53536 }, /* ADD */ -{ CPUFUNC(op_d128_5), 53544 }, /* ADD */ -{ CPUFUNC(op_d130_5), 53552 }, /* ADD */ -{ CPUFUNC(op_d138_5), 53560 }, /* ADD */ -{ CPUFUNC(op_d139_5), 53561 }, /* ADD */ -{ CPUFUNC(op_d140_5), 53568 }, /* ADDX */ -{ CPUFUNC(op_d148_5), 53576 }, /* ADDX */ -{ CPUFUNC(op_d150_5), 53584 }, /* ADD */ -{ CPUFUNC(op_d158_5), 53592 }, /* ADD */ -{ CPUFUNC(op_d160_5), 53600 }, /* ADD */ -{ CPUFUNC(op_d168_5), 53608 }, /* ADD */ -{ CPUFUNC(op_d170_5), 53616 }, /* ADD */ -{ CPUFUNC(op_d178_5), 53624 }, /* ADD */ -{ CPUFUNC(op_d179_5), 53625 }, /* ADD */ -{ CPUFUNC(op_d180_5), 53632 }, /* ADDX */ -{ CPUFUNC(op_d188_5), 53640 }, /* ADDX */ -{ CPUFUNC(op_d190_5), 53648 }, /* ADD */ -{ CPUFUNC(op_d198_5), 53656 }, /* ADD */ -{ CPUFUNC(op_d1a0_5), 53664 }, /* ADD */ -{ CPUFUNC(op_d1a8_5), 53672 }, /* ADD */ -{ CPUFUNC(op_d1b0_5), 53680 }, /* ADD */ -{ CPUFUNC(op_d1b8_5), 53688 }, /* ADD */ -{ CPUFUNC(op_d1b9_5), 53689 }, /* ADD */ -{ CPUFUNC(op_d1c0_5), 53696 }, /* ADDA */ -{ CPUFUNC(op_d1c8_5), 53704 }, /* ADDA */ -{ CPUFUNC(op_d1d0_5), 53712 }, /* ADDA */ -{ CPUFUNC(op_d1d8_5), 53720 }, /* ADDA */ -{ CPUFUNC(op_d1e0_5), 53728 }, /* ADDA */ -{ CPUFUNC(op_d1e8_5), 53736 }, /* ADDA */ -{ CPUFUNC(op_d1f0_5), 53744 }, /* ADDA */ -{ CPUFUNC(op_d1f8_5), 53752 }, /* ADDA */ -{ CPUFUNC(op_d1f9_5), 53753 }, /* ADDA */ -{ CPUFUNC(op_d1fa_5), 53754 }, /* ADDA */ -{ CPUFUNC(op_d1fb_5), 53755 }, /* ADDA */ -{ CPUFUNC(op_d1fc_5), 53756 }, /* ADDA */ -{ CPUFUNC(op_e000_5), 57344 }, /* ASR */ -{ CPUFUNC(op_e008_5), 57352 }, /* LSR */ -{ CPUFUNC(op_e010_5), 57360 }, /* ROXR */ -{ CPUFUNC(op_e018_5), 57368 }, /* ROR */ -{ CPUFUNC(op_e020_5), 57376 }, /* ASR */ -{ CPUFUNC(op_e028_5), 57384 }, /* LSR */ -{ CPUFUNC(op_e030_5), 57392 }, /* ROXR */ -{ CPUFUNC(op_e038_5), 57400 }, /* ROR */ -{ CPUFUNC(op_e040_5), 57408 }, /* ASR */ -{ CPUFUNC(op_e048_5), 57416 }, /* LSR */ -{ CPUFUNC(op_e050_5), 57424 }, /* ROXR */ -{ CPUFUNC(op_e058_5), 57432 }, /* ROR */ -{ CPUFUNC(op_e060_5), 57440 }, /* ASR */ -{ CPUFUNC(op_e068_5), 57448 }, /* LSR */ -{ CPUFUNC(op_e070_5), 57456 }, /* ROXR */ -{ CPUFUNC(op_e078_5), 57464 }, /* ROR */ -{ CPUFUNC(op_e080_5), 57472 }, /* ASR */ -{ CPUFUNC(op_e088_5), 57480 }, /* LSR */ -{ CPUFUNC(op_e090_5), 57488 }, /* ROXR */ -{ CPUFUNC(op_e098_5), 57496 }, /* ROR */ -{ CPUFUNC(op_e0a0_5), 57504 }, /* ASR */ -{ CPUFUNC(op_e0a8_5), 57512 }, /* LSR */ -{ CPUFUNC(op_e0b0_5), 57520 }, /* ROXR */ -{ CPUFUNC(op_e0b8_5), 57528 }, /* ROR */ -{ CPUFUNC(op_e0d0_5), 57552 }, /* ASRW */ -{ CPUFUNC(op_e0d8_5), 57560 }, /* ASRW */ -{ CPUFUNC(op_e0e0_5), 57568 }, /* ASRW */ -{ CPUFUNC(op_e0e8_5), 57576 }, /* ASRW */ -{ CPUFUNC(op_e0f0_5), 57584 }, /* ASRW */ -{ CPUFUNC(op_e0f8_5), 57592 }, /* ASRW */ -{ CPUFUNC(op_e0f9_5), 57593 }, /* ASRW */ -{ CPUFUNC(op_e100_5), 57600 }, /* ASL */ -{ CPUFUNC(op_e108_5), 57608 }, /* LSL */ -{ CPUFUNC(op_e110_5), 57616 }, /* ROXL */ -{ CPUFUNC(op_e118_5), 57624 }, /* ROL */ -{ CPUFUNC(op_e120_5), 57632 }, /* ASL */ -{ CPUFUNC(op_e128_5), 57640 }, /* LSL */ -{ CPUFUNC(op_e130_5), 57648 }, /* ROXL */ -{ CPUFUNC(op_e138_5), 57656 }, /* ROL */ -{ CPUFUNC(op_e140_5), 57664 }, /* ASL */ -{ CPUFUNC(op_e148_5), 57672 }, /* LSL */ -{ CPUFUNC(op_e150_5), 57680 }, /* ROXL */ -{ CPUFUNC(op_e158_5), 57688 }, /* ROL */ -{ CPUFUNC(op_e160_5), 57696 }, /* ASL */ -{ CPUFUNC(op_e168_5), 57704 }, /* LSL */ -{ CPUFUNC(op_e170_5), 57712 }, /* ROXL */ -{ CPUFUNC(op_e178_5), 57720 }, /* ROL */ -{ CPUFUNC(op_e180_5), 57728 }, /* ASL */ -{ CPUFUNC(op_e188_5), 57736 }, /* LSL */ -{ CPUFUNC(op_e190_5), 57744 }, /* ROXL */ -{ CPUFUNC(op_e198_5), 57752 }, /* ROL */ -{ CPUFUNC(op_e1a0_5), 57760 }, /* ASL */ -{ CPUFUNC(op_e1a8_5), 57768 }, /* LSL */ -{ CPUFUNC(op_e1b0_5), 57776 }, /* ROXL */ -{ CPUFUNC(op_e1b8_5), 57784 }, /* ROL */ -{ CPUFUNC(op_e1d0_5), 57808 }, /* ASLW */ -{ CPUFUNC(op_e1d8_5), 57816 }, /* ASLW */ -{ CPUFUNC(op_e1e0_5), 57824 }, /* ASLW */ -{ CPUFUNC(op_e1e8_5), 57832 }, /* ASLW */ -{ CPUFUNC(op_e1f0_5), 57840 }, /* ASLW */ -{ CPUFUNC(op_e1f8_5), 57848 }, /* ASLW */ -{ CPUFUNC(op_e1f9_5), 57849 }, /* ASLW */ -{ CPUFUNC(op_e2d0_5), 58064 }, /* LSRW */ -{ CPUFUNC(op_e2d8_5), 58072 }, /* LSRW */ -{ CPUFUNC(op_e2e0_5), 58080 }, /* LSRW */ -{ CPUFUNC(op_e2e8_5), 58088 }, /* LSRW */ -{ CPUFUNC(op_e2f0_5), 58096 }, /* LSRW */ -{ CPUFUNC(op_e2f8_5), 58104 }, /* LSRW */ -{ CPUFUNC(op_e2f9_5), 58105 }, /* LSRW */ -{ CPUFUNC(op_e3d0_5), 58320 }, /* LSLW */ -{ CPUFUNC(op_e3d8_5), 58328 }, /* LSLW */ -{ CPUFUNC(op_e3e0_5), 58336 }, /* LSLW */ -{ CPUFUNC(op_e3e8_5), 58344 }, /* LSLW */ -{ CPUFUNC(op_e3f0_5), 58352 }, /* LSLW */ -{ CPUFUNC(op_e3f8_5), 58360 }, /* LSLW */ -{ CPUFUNC(op_e3f9_5), 58361 }, /* LSLW */ -{ CPUFUNC(op_e4d0_5), 58576 }, /* ROXRW */ -{ CPUFUNC(op_e4d8_5), 58584 }, /* ROXRW */ -{ CPUFUNC(op_e4e0_5), 58592 }, /* ROXRW */ -{ CPUFUNC(op_e4e8_5), 58600 }, /* ROXRW */ -{ CPUFUNC(op_e4f0_5), 58608 }, /* ROXRW */ -{ CPUFUNC(op_e4f8_5), 58616 }, /* ROXRW */ -{ CPUFUNC(op_e4f9_5), 58617 }, /* ROXRW */ -{ CPUFUNC(op_e5d0_5), 58832 }, /* ROXLW */ -{ CPUFUNC(op_e5d8_5), 58840 }, /* ROXLW */ -{ CPUFUNC(op_e5e0_5), 58848 }, /* ROXLW */ -{ CPUFUNC(op_e5e8_5), 58856 }, /* ROXLW */ -{ CPUFUNC(op_e5f0_5), 58864 }, /* ROXLW */ -{ CPUFUNC(op_e5f8_5), 58872 }, /* ROXLW */ -{ CPUFUNC(op_e5f9_5), 58873 }, /* ROXLW */ -{ CPUFUNC(op_e6d0_5), 59088 }, /* RORW */ -{ CPUFUNC(op_e6d8_5), 59096 }, /* RORW */ -{ CPUFUNC(op_e6e0_5), 59104 }, /* RORW */ -{ CPUFUNC(op_e6e8_5), 59112 }, /* RORW */ -{ CPUFUNC(op_e6f0_5), 59120 }, /* RORW */ -{ CPUFUNC(op_e6f8_5), 59128 }, /* RORW */ -{ CPUFUNC(op_e6f9_5), 59129 }, /* RORW */ -{ CPUFUNC(op_e7d0_5), 59344 }, /* ROLW */ -{ CPUFUNC(op_e7d8_5), 59352 }, /* ROLW */ -{ CPUFUNC(op_e7e0_5), 59360 }, /* ROLW */ -{ CPUFUNC(op_e7e8_5), 59368 }, /* ROLW */ -{ CPUFUNC(op_e7f0_5), 59376 }, /* ROLW */ -{ CPUFUNC(op_e7f8_5), 59384 }, /* ROLW */ -{ CPUFUNC(op_e7f9_5), 59385 }, /* ROLW */ +{ CPUFUNC(op_4e74_0), 20084 }, /* RTD */ +{ CPUFUNC(op_4e75_0), 20085 }, /* RTS */ +{ CPUFUNC(op_4e76_0), 20086 }, /* TRAPV */ +{ CPUFUNC(op_4e77_0), 20087 }, /* RTR */ +{ CPUFUNC(op_4e90_0), 20112 }, /* JSR */ +{ CPUFUNC(op_4ea8_0), 20136 }, /* JSR */ +{ CPUFUNC(op_4eb0_4), 20144 }, /* JSR */ +{ CPUFUNC(op_4eb8_0), 20152 }, /* JSR */ +{ CPUFUNC(op_4eb9_0), 20153 }, /* JSR */ +{ CPUFUNC(op_4eba_0), 20154 }, /* JSR */ +{ CPUFUNC(op_4ebb_4), 20155 }, /* JSR */ +{ CPUFUNC(op_4ed0_0), 20176 }, /* JMP */ +{ CPUFUNC(op_4ee8_0), 20200 }, /* JMP */ +{ CPUFUNC(op_4ef0_4), 20208 }, /* JMP */ +{ CPUFUNC(op_4ef8_0), 20216 }, /* JMP */ +{ CPUFUNC(op_4ef9_0), 20217 }, /* JMP */ +{ CPUFUNC(op_4efa_0), 20218 }, /* JMP */ +{ CPUFUNC(op_4efb_4), 20219 }, /* JMP */ +{ CPUFUNC(op_5000_0), 20480 }, /* ADD */ +{ CPUFUNC(op_5010_0), 20496 }, /* ADD */ +{ CPUFUNC(op_5018_0), 20504 }, /* ADD */ +{ CPUFUNC(op_5020_0), 20512 }, /* ADD */ +{ CPUFUNC(op_5028_0), 20520 }, /* ADD */ +{ CPUFUNC(op_5030_4), 20528 }, /* ADD */ +{ CPUFUNC(op_5038_0), 20536 }, /* ADD */ +{ CPUFUNC(op_5039_0), 20537 }, /* ADD */ +{ CPUFUNC(op_5040_0), 20544 }, /* ADD */ +{ CPUFUNC(op_5048_0), 20552 }, /* ADDA */ +{ CPUFUNC(op_5050_0), 20560 }, /* ADD */ +{ CPUFUNC(op_5058_0), 20568 }, /* ADD */ +{ CPUFUNC(op_5060_0), 20576 }, /* ADD */ +{ CPUFUNC(op_5068_0), 20584 }, /* ADD */ +{ CPUFUNC(op_5070_4), 20592 }, /* ADD */ +{ CPUFUNC(op_5078_0), 20600 }, /* ADD */ +{ CPUFUNC(op_5079_0), 20601 }, /* ADD */ +{ CPUFUNC(op_5080_0), 20608 }, /* ADD */ +{ CPUFUNC(op_5088_0), 20616 }, /* ADDA */ +{ CPUFUNC(op_5090_0), 20624 }, /* ADD */ +{ CPUFUNC(op_5098_0), 20632 }, /* ADD */ +{ CPUFUNC(op_50a0_0), 20640 }, /* ADD */ +{ CPUFUNC(op_50a8_0), 20648 }, /* ADD */ +{ CPUFUNC(op_50b0_4), 20656 }, /* ADD */ +{ CPUFUNC(op_50b8_0), 20664 }, /* ADD */ +{ CPUFUNC(op_50b9_0), 20665 }, /* ADD */ +{ CPUFUNC(op_50c0_0), 20672 }, /* Scc */ +{ CPUFUNC(op_50c8_0), 20680 }, /* DBcc */ +{ CPUFUNC(op_50d0_0), 20688 }, /* Scc */ +{ CPUFUNC(op_50d8_0), 20696 }, /* Scc */ +{ CPUFUNC(op_50e0_0), 20704 }, /* Scc */ +{ CPUFUNC(op_50e8_0), 20712 }, /* Scc */ +{ CPUFUNC(op_50f0_4), 20720 }, /* Scc */ +{ CPUFUNC(op_50f8_0), 20728 }, /* Scc */ +{ CPUFUNC(op_50f9_0), 20729 }, /* Scc */ +{ CPUFUNC(op_5100_0), 20736 }, /* SUB */ +{ CPUFUNC(op_5110_0), 20752 }, /* SUB */ +{ CPUFUNC(op_5118_0), 20760 }, /* SUB */ +{ CPUFUNC(op_5120_0), 20768 }, /* SUB */ +{ CPUFUNC(op_5128_0), 20776 }, /* SUB */ +{ CPUFUNC(op_5130_4), 20784 }, /* SUB */ +{ CPUFUNC(op_5138_0), 20792 }, /* SUB */ +{ CPUFUNC(op_5139_0), 20793 }, /* SUB */ +{ CPUFUNC(op_5140_0), 20800 }, /* SUB */ +{ CPUFUNC(op_5148_0), 20808 }, /* SUBA */ +{ CPUFUNC(op_5150_0), 20816 }, /* SUB */ +{ CPUFUNC(op_5158_0), 20824 }, /* SUB */ +{ CPUFUNC(op_5160_0), 20832 }, /* SUB */ +{ CPUFUNC(op_5168_0), 20840 }, /* SUB */ +{ CPUFUNC(op_5170_4), 20848 }, /* SUB */ +{ CPUFUNC(op_5178_0), 20856 }, /* SUB */ +{ CPUFUNC(op_5179_0), 20857 }, /* SUB */ +{ CPUFUNC(op_5180_0), 20864 }, /* SUB */ +{ CPUFUNC(op_5188_0), 20872 }, /* SUBA */ +{ CPUFUNC(op_5190_0), 20880 }, /* SUB */ +{ CPUFUNC(op_5198_0), 20888 }, /* SUB */ +{ CPUFUNC(op_51a0_0), 20896 }, /* SUB */ +{ CPUFUNC(op_51a8_0), 20904 }, /* SUB */ +{ CPUFUNC(op_51b0_4), 20912 }, /* SUB */ +{ CPUFUNC(op_51b8_0), 20920 }, /* SUB */ +{ CPUFUNC(op_51b9_0), 20921 }, /* SUB */ +{ CPUFUNC(op_51c0_0), 20928 }, /* Scc */ +{ CPUFUNC(op_51c8_0), 20936 }, /* DBcc */ +{ CPUFUNC(op_51d0_0), 20944 }, /* Scc */ +{ CPUFUNC(op_51d8_0), 20952 }, /* Scc */ +{ CPUFUNC(op_51e0_0), 20960 }, /* Scc */ +{ CPUFUNC(op_51e8_0), 20968 }, /* Scc */ +{ CPUFUNC(op_51f0_4), 20976 }, /* Scc */ +{ CPUFUNC(op_51f8_0), 20984 }, /* Scc */ +{ CPUFUNC(op_51f9_0), 20985 }, /* Scc */ +{ CPUFUNC(op_52c0_0), 21184 }, /* Scc */ +{ CPUFUNC(op_52c8_0), 21192 }, /* DBcc */ +{ CPUFUNC(op_52d0_0), 21200 }, /* Scc */ +{ CPUFUNC(op_52d8_0), 21208 }, /* Scc */ +{ CPUFUNC(op_52e0_0), 21216 }, /* Scc */ +{ CPUFUNC(op_52e8_0), 21224 }, /* Scc */ +{ CPUFUNC(op_52f0_4), 21232 }, /* Scc */ +{ CPUFUNC(op_52f8_0), 21240 }, /* Scc */ +{ CPUFUNC(op_52f9_0), 21241 }, /* Scc */ +{ CPUFUNC(op_53c0_0), 21440 }, /* Scc */ +{ CPUFUNC(op_53c8_0), 21448 }, /* DBcc */ +{ CPUFUNC(op_53d0_0), 21456 }, /* Scc */ +{ CPUFUNC(op_53d8_0), 21464 }, /* Scc */ +{ CPUFUNC(op_53e0_0), 21472 }, /* Scc */ +{ CPUFUNC(op_53e8_0), 21480 }, /* Scc */ +{ CPUFUNC(op_53f0_4), 21488 }, /* Scc */ +{ CPUFUNC(op_53f8_0), 21496 }, /* Scc */ +{ CPUFUNC(op_53f9_0), 21497 }, /* Scc */ +{ CPUFUNC(op_54c0_0), 21696 }, /* Scc */ +{ CPUFUNC(op_54c8_0), 21704 }, /* DBcc */ +{ CPUFUNC(op_54d0_0), 21712 }, /* Scc */ +{ CPUFUNC(op_54d8_0), 21720 }, /* Scc */ +{ CPUFUNC(op_54e0_0), 21728 }, /* Scc */ +{ CPUFUNC(op_54e8_0), 21736 }, /* Scc */ +{ CPUFUNC(op_54f0_4), 21744 }, /* Scc */ +{ CPUFUNC(op_54f8_0), 21752 }, /* Scc */ +{ CPUFUNC(op_54f9_0), 21753 }, /* Scc */ +{ CPUFUNC(op_55c0_0), 21952 }, /* Scc */ +{ CPUFUNC(op_55c8_0), 21960 }, /* DBcc */ +{ CPUFUNC(op_55d0_0), 21968 }, /* Scc */ +{ CPUFUNC(op_55d8_0), 21976 }, /* Scc */ +{ CPUFUNC(op_55e0_0), 21984 }, /* Scc */ +{ CPUFUNC(op_55e8_0), 21992 }, /* Scc */ +{ CPUFUNC(op_55f0_4), 22000 }, /* Scc */ +{ CPUFUNC(op_55f8_0), 22008 }, /* Scc */ +{ CPUFUNC(op_55f9_0), 22009 }, /* Scc */ +{ CPUFUNC(op_56c0_0), 22208 }, /* Scc */ +{ CPUFUNC(op_56c8_0), 22216 }, /* DBcc */ +{ CPUFUNC(op_56d0_0), 22224 }, /* Scc */ +{ CPUFUNC(op_56d8_0), 22232 }, /* Scc */ +{ CPUFUNC(op_56e0_0), 22240 }, /* Scc */ +{ CPUFUNC(op_56e8_0), 22248 }, /* Scc */ +{ CPUFUNC(op_56f0_4), 22256 }, /* Scc */ +{ CPUFUNC(op_56f8_0), 22264 }, /* Scc */ +{ CPUFUNC(op_56f9_0), 22265 }, /* Scc */ +{ CPUFUNC(op_57c0_0), 22464 }, /* Scc */ +{ CPUFUNC(op_57c8_0), 22472 }, /* DBcc */ +{ CPUFUNC(op_57d0_0), 22480 }, /* Scc */ +{ CPUFUNC(op_57d8_0), 22488 }, /* Scc */ +{ CPUFUNC(op_57e0_0), 22496 }, /* Scc */ +{ CPUFUNC(op_57e8_0), 22504 }, /* Scc */ +{ CPUFUNC(op_57f0_4), 22512 }, /* Scc */ +{ CPUFUNC(op_57f8_0), 22520 }, /* Scc */ +{ CPUFUNC(op_57f9_0), 22521 }, /* Scc */ +{ CPUFUNC(op_58c0_0), 22720 }, /* Scc */ +{ CPUFUNC(op_58c8_0), 22728 }, /* DBcc */ +{ CPUFUNC(op_58d0_0), 22736 }, /* Scc */ +{ CPUFUNC(op_58d8_0), 22744 }, /* Scc */ +{ CPUFUNC(op_58e0_0), 22752 }, /* Scc */ +{ CPUFUNC(op_58e8_0), 22760 }, /* Scc */ +{ CPUFUNC(op_58f0_4), 22768 }, /* Scc */ +{ CPUFUNC(op_58f8_0), 22776 }, /* Scc */ +{ CPUFUNC(op_58f9_0), 22777 }, /* Scc */ +{ CPUFUNC(op_59c0_0), 22976 }, /* Scc */ +{ CPUFUNC(op_59c8_0), 22984 }, /* DBcc */ +{ CPUFUNC(op_59d0_0), 22992 }, /* Scc */ +{ CPUFUNC(op_59d8_0), 23000 }, /* Scc */ +{ CPUFUNC(op_59e0_0), 23008 }, /* Scc */ +{ CPUFUNC(op_59e8_0), 23016 }, /* Scc */ +{ CPUFUNC(op_59f0_4), 23024 }, /* Scc */ +{ CPUFUNC(op_59f8_0), 23032 }, /* Scc */ +{ CPUFUNC(op_59f9_0), 23033 }, /* Scc */ +{ CPUFUNC(op_5ac0_0), 23232 }, /* Scc */ +{ CPUFUNC(op_5ac8_0), 23240 }, /* DBcc */ +{ CPUFUNC(op_5ad0_0), 23248 }, /* Scc */ +{ CPUFUNC(op_5ad8_0), 23256 }, /* Scc */ +{ CPUFUNC(op_5ae0_0), 23264 }, /* Scc */ +{ CPUFUNC(op_5ae8_0), 23272 }, /* Scc */ +{ CPUFUNC(op_5af0_4), 23280 }, /* Scc */ +{ CPUFUNC(op_5af8_0), 23288 }, /* Scc */ +{ CPUFUNC(op_5af9_0), 23289 }, /* Scc */ +{ CPUFUNC(op_5bc0_0), 23488 }, /* Scc */ +{ CPUFUNC(op_5bc8_0), 23496 }, /* DBcc */ +{ CPUFUNC(op_5bd0_0), 23504 }, /* Scc */ +{ CPUFUNC(op_5bd8_0), 23512 }, /* Scc */ +{ CPUFUNC(op_5be0_0), 23520 }, /* Scc */ +{ CPUFUNC(op_5be8_0), 23528 }, /* Scc */ +{ CPUFUNC(op_5bf0_4), 23536 }, /* Scc */ +{ CPUFUNC(op_5bf8_0), 23544 }, /* Scc */ +{ CPUFUNC(op_5bf9_0), 23545 }, /* Scc */ +{ CPUFUNC(op_5cc0_0), 23744 }, /* Scc */ +{ CPUFUNC(op_5cc8_0), 23752 }, /* DBcc */ +{ CPUFUNC(op_5cd0_0), 23760 }, /* Scc */ +{ CPUFUNC(op_5cd8_0), 23768 }, /* Scc */ +{ CPUFUNC(op_5ce0_0), 23776 }, /* Scc */ +{ CPUFUNC(op_5ce8_0), 23784 }, /* Scc */ +{ CPUFUNC(op_5cf0_4), 23792 }, /* Scc */ +{ CPUFUNC(op_5cf8_0), 23800 }, /* Scc */ +{ CPUFUNC(op_5cf9_0), 23801 }, /* Scc */ +{ CPUFUNC(op_5dc0_0), 24000 }, /* Scc */ +{ CPUFUNC(op_5dc8_0), 24008 }, /* DBcc */ +{ CPUFUNC(op_5dd0_0), 24016 }, /* Scc */ +{ CPUFUNC(op_5dd8_0), 24024 }, /* Scc */ +{ CPUFUNC(op_5de0_0), 24032 }, /* Scc */ +{ CPUFUNC(op_5de8_0), 24040 }, /* Scc */ +{ CPUFUNC(op_5df0_4), 24048 }, /* Scc */ +{ CPUFUNC(op_5df8_0), 24056 }, /* Scc */ +{ CPUFUNC(op_5df9_0), 24057 }, /* Scc */ +{ CPUFUNC(op_5ec0_0), 24256 }, /* Scc */ +{ CPUFUNC(op_5ec8_0), 24264 }, /* DBcc */ +{ CPUFUNC(op_5ed0_0), 24272 }, /* Scc */ +{ CPUFUNC(op_5ed8_0), 24280 }, /* Scc */ +{ CPUFUNC(op_5ee0_0), 24288 }, /* Scc */ +{ CPUFUNC(op_5ee8_0), 24296 }, /* Scc */ +{ CPUFUNC(op_5ef0_4), 24304 }, /* Scc */ +{ CPUFUNC(op_5ef8_0), 24312 }, /* Scc */ +{ CPUFUNC(op_5ef9_0), 24313 }, /* Scc */ +{ CPUFUNC(op_5fc0_0), 24512 }, /* Scc */ +{ CPUFUNC(op_5fc8_0), 24520 }, /* DBcc */ +{ CPUFUNC(op_5fd0_0), 24528 }, /* Scc */ +{ CPUFUNC(op_5fd8_0), 24536 }, /* Scc */ +{ CPUFUNC(op_5fe0_0), 24544 }, /* Scc */ +{ CPUFUNC(op_5fe8_0), 24552 }, /* Scc */ +{ CPUFUNC(op_5ff0_4), 24560 }, /* Scc */ +{ CPUFUNC(op_5ff8_0), 24568 }, /* Scc */ +{ CPUFUNC(op_5ff9_0), 24569 }, /* Scc */ +{ CPUFUNC(op_6000_0), 24576 }, /* Bcc */ +{ CPUFUNC(op_6001_0), 24577 }, /* Bcc */ +{ CPUFUNC(op_60ff_4), 24831 }, /* Bcc */ +{ CPUFUNC(op_6100_0), 24832 }, /* BSR */ +{ CPUFUNC(op_6101_0), 24833 }, /* BSR */ +{ CPUFUNC(op_61ff_0), 25087 }, /* BSR */ +{ CPUFUNC(op_6200_0), 25088 }, /* Bcc */ +{ CPUFUNC(op_6201_0), 25089 }, /* Bcc */ +{ CPUFUNC(op_62ff_4), 25343 }, /* Bcc */ +{ CPUFUNC(op_6300_0), 25344 }, /* Bcc */ +{ CPUFUNC(op_6301_0), 25345 }, /* Bcc */ +{ CPUFUNC(op_63ff_4), 25599 }, /* Bcc */ +{ CPUFUNC(op_6400_0), 25600 }, /* Bcc */ +{ CPUFUNC(op_6401_0), 25601 }, /* Bcc */ +{ CPUFUNC(op_64ff_4), 25855 }, /* Bcc */ +{ CPUFUNC(op_6500_0), 25856 }, /* Bcc */ +{ CPUFUNC(op_6501_0), 25857 }, /* Bcc */ +{ CPUFUNC(op_65ff_4), 26111 }, /* Bcc */ +{ CPUFUNC(op_6600_0), 26112 }, /* Bcc */ +{ CPUFUNC(op_6601_0), 26113 }, /* Bcc */ +{ CPUFUNC(op_66ff_4), 26367 }, /* Bcc */ +{ CPUFUNC(op_6700_0), 26368 }, /* Bcc */ +{ CPUFUNC(op_6701_0), 26369 }, /* Bcc */ +{ CPUFUNC(op_67ff_4), 26623 }, /* Bcc */ +{ CPUFUNC(op_6800_0), 26624 }, /* Bcc */ +{ CPUFUNC(op_6801_0), 26625 }, /* Bcc */ +{ CPUFUNC(op_68ff_4), 26879 }, /* Bcc */ +{ CPUFUNC(op_6900_0), 26880 }, /* Bcc */ +{ CPUFUNC(op_6901_0), 26881 }, /* Bcc */ +{ CPUFUNC(op_69ff_4), 27135 }, /* Bcc */ +{ CPUFUNC(op_6a00_0), 27136 }, /* Bcc */ +{ CPUFUNC(op_6a01_0), 27137 }, /* Bcc */ +{ CPUFUNC(op_6aff_4), 27391 }, /* Bcc */ +{ CPUFUNC(op_6b00_0), 27392 }, /* Bcc */ +{ CPUFUNC(op_6b01_0), 27393 }, /* Bcc */ +{ CPUFUNC(op_6bff_4), 27647 }, /* Bcc */ +{ CPUFUNC(op_6c00_0), 27648 }, /* Bcc */ +{ CPUFUNC(op_6c01_0), 27649 }, /* Bcc */ +{ CPUFUNC(op_6cff_4), 27903 }, /* Bcc */ +{ CPUFUNC(op_6d00_0), 27904 }, /* Bcc */ +{ CPUFUNC(op_6d01_0), 27905 }, /* Bcc */ +{ CPUFUNC(op_6dff_4), 28159 }, /* Bcc */ +{ CPUFUNC(op_6e00_0), 28160 }, /* Bcc */ +{ CPUFUNC(op_6e01_0), 28161 }, /* Bcc */ +{ CPUFUNC(op_6eff_4), 28415 }, /* Bcc */ +{ CPUFUNC(op_6f00_0), 28416 }, /* Bcc */ +{ CPUFUNC(op_6f01_0), 28417 }, /* Bcc */ +{ CPUFUNC(op_6fff_4), 28671 }, /* Bcc */ +{ CPUFUNC(op_7000_0), 28672 }, /* MOVE */ +{ CPUFUNC(op_8000_0), 32768 }, /* OR */ +{ CPUFUNC(op_8010_0), 32784 }, /* OR */ +{ CPUFUNC(op_8018_0), 32792 }, /* OR */ +{ CPUFUNC(op_8020_0), 32800 }, /* OR */ +{ CPUFUNC(op_8028_0), 32808 }, /* OR */ +{ CPUFUNC(op_8030_4), 32816 }, /* OR */ +{ CPUFUNC(op_8038_0), 32824 }, /* OR */ +{ CPUFUNC(op_8039_0), 32825 }, /* OR */ +{ CPUFUNC(op_803a_0), 32826 }, /* OR */ +{ CPUFUNC(op_803b_4), 32827 }, /* OR */ +{ CPUFUNC(op_803c_0), 32828 }, /* OR */ +{ CPUFUNC(op_8040_0), 32832 }, /* OR */ +{ CPUFUNC(op_8050_0), 32848 }, /* OR */ +{ CPUFUNC(op_8058_0), 32856 }, /* OR */ +{ CPUFUNC(op_8060_0), 32864 }, /* OR */ +{ CPUFUNC(op_8068_0), 32872 }, /* OR */ +{ CPUFUNC(op_8070_4), 32880 }, /* OR */ +{ CPUFUNC(op_8078_0), 32888 }, /* OR */ +{ CPUFUNC(op_8079_0), 32889 }, /* OR */ +{ CPUFUNC(op_807a_0), 32890 }, /* OR */ +{ CPUFUNC(op_807b_4), 32891 }, /* OR */ +{ CPUFUNC(op_807c_0), 32892 }, /* OR */ +{ CPUFUNC(op_8080_0), 32896 }, /* OR */ +{ CPUFUNC(op_8090_0), 32912 }, /* OR */ +{ CPUFUNC(op_8098_0), 32920 }, /* OR */ +{ CPUFUNC(op_80a0_0), 32928 }, /* OR */ +{ CPUFUNC(op_80a8_0), 32936 }, /* OR */ +{ CPUFUNC(op_80b0_4), 32944 }, /* OR */ +{ CPUFUNC(op_80b8_0), 32952 }, /* OR */ +{ CPUFUNC(op_80b9_0), 32953 }, /* OR */ +{ CPUFUNC(op_80ba_0), 32954 }, /* OR */ +{ CPUFUNC(op_80bb_4), 32955 }, /* OR */ +{ CPUFUNC(op_80bc_0), 32956 }, /* OR */ +{ CPUFUNC(op_80c0_0), 32960 }, /* DIVU */ +{ CPUFUNC(op_80d0_0), 32976 }, /* DIVU */ +{ CPUFUNC(op_80d8_0), 32984 }, /* DIVU */ +{ CPUFUNC(op_80e0_0), 32992 }, /* DIVU */ +{ CPUFUNC(op_80e8_0), 33000 }, /* DIVU */ +{ CPUFUNC(op_80f0_4), 33008 }, /* DIVU */ +{ CPUFUNC(op_80f8_0), 33016 }, /* DIVU */ +{ CPUFUNC(op_80f9_0), 33017 }, /* DIVU */ +{ CPUFUNC(op_80fa_0), 33018 }, /* DIVU */ +{ CPUFUNC(op_80fb_4), 33019 }, /* DIVU */ +{ CPUFUNC(op_80fc_0), 33020 }, /* DIVU */ +{ CPUFUNC(op_8100_2), 33024 }, /* SBCD */ +{ CPUFUNC(op_8108_2), 33032 }, /* SBCD */ +{ CPUFUNC(op_8110_0), 33040 }, /* OR */ +{ CPUFUNC(op_8118_0), 33048 }, /* OR */ +{ CPUFUNC(op_8120_0), 33056 }, /* OR */ +{ CPUFUNC(op_8128_0), 33064 }, /* OR */ +{ CPUFUNC(op_8130_4), 33072 }, /* OR */ +{ CPUFUNC(op_8138_0), 33080 }, /* OR */ +{ CPUFUNC(op_8139_0), 33081 }, /* OR */ +{ CPUFUNC(op_8150_0), 33104 }, /* OR */ +{ CPUFUNC(op_8158_0), 33112 }, /* OR */ +{ CPUFUNC(op_8160_0), 33120 }, /* OR */ +{ CPUFUNC(op_8168_0), 33128 }, /* OR */ +{ CPUFUNC(op_8170_4), 33136 }, /* OR */ +{ CPUFUNC(op_8178_0), 33144 }, /* OR */ +{ CPUFUNC(op_8179_0), 33145 }, /* OR */ +{ CPUFUNC(op_8190_0), 33168 }, /* OR */ +{ CPUFUNC(op_8198_0), 33176 }, /* OR */ +{ CPUFUNC(op_81a0_0), 33184 }, /* OR */ +{ CPUFUNC(op_81a8_0), 33192 }, /* OR */ +{ CPUFUNC(op_81b0_4), 33200 }, /* OR */ +{ CPUFUNC(op_81b8_0), 33208 }, /* OR */ +{ CPUFUNC(op_81b9_0), 33209 }, /* OR */ +{ CPUFUNC(op_81c0_0), 33216 }, /* DIVS */ +{ CPUFUNC(op_81d0_0), 33232 }, /* DIVS */ +{ CPUFUNC(op_81d8_0), 33240 }, /* DIVS */ +{ CPUFUNC(op_81e0_0), 33248 }, /* DIVS */ +{ CPUFUNC(op_81e8_0), 33256 }, /* DIVS */ +{ CPUFUNC(op_81f0_4), 33264 }, /* DIVS */ +{ CPUFUNC(op_81f8_0), 33272 }, /* DIVS */ +{ CPUFUNC(op_81f9_0), 33273 }, /* DIVS */ +{ CPUFUNC(op_81fa_0), 33274 }, /* DIVS */ +{ CPUFUNC(op_81fb_4), 33275 }, /* DIVS */ +{ CPUFUNC(op_81fc_0), 33276 }, /* DIVS */ +{ CPUFUNC(op_9000_0), 36864 }, /* SUB */ +{ CPUFUNC(op_9010_0), 36880 }, /* SUB */ +{ CPUFUNC(op_9018_0), 36888 }, /* SUB */ +{ CPUFUNC(op_9020_0), 36896 }, /* SUB */ +{ CPUFUNC(op_9028_0), 36904 }, /* SUB */ +{ CPUFUNC(op_9030_4), 36912 }, /* SUB */ +{ CPUFUNC(op_9038_0), 36920 }, /* SUB */ +{ CPUFUNC(op_9039_0), 36921 }, /* SUB */ +{ CPUFUNC(op_903a_0), 36922 }, /* SUB */ +{ CPUFUNC(op_903b_4), 36923 }, /* SUB */ +{ CPUFUNC(op_903c_0), 36924 }, /* SUB */ +{ CPUFUNC(op_9040_0), 36928 }, /* SUB */ +{ CPUFUNC(op_9048_0), 36936 }, /* SUB */ +{ CPUFUNC(op_9050_0), 36944 }, /* SUB */ +{ CPUFUNC(op_9058_0), 36952 }, /* SUB */ +{ CPUFUNC(op_9060_0), 36960 }, /* SUB */ +{ CPUFUNC(op_9068_0), 36968 }, /* SUB */ +{ CPUFUNC(op_9070_4), 36976 }, /* SUB */ +{ CPUFUNC(op_9078_0), 36984 }, /* SUB */ +{ CPUFUNC(op_9079_0), 36985 }, /* SUB */ +{ CPUFUNC(op_907a_0), 36986 }, /* SUB */ +{ CPUFUNC(op_907b_4), 36987 }, /* SUB */ +{ CPUFUNC(op_907c_0), 36988 }, /* SUB */ +{ CPUFUNC(op_9080_0), 36992 }, /* SUB */ +{ CPUFUNC(op_9088_0), 37000 }, /* SUB */ +{ CPUFUNC(op_9090_0), 37008 }, /* SUB */ +{ CPUFUNC(op_9098_0), 37016 }, /* SUB */ +{ CPUFUNC(op_90a0_0), 37024 }, /* SUB */ +{ CPUFUNC(op_90a8_0), 37032 }, /* SUB */ +{ CPUFUNC(op_90b0_4), 37040 }, /* SUB */ +{ CPUFUNC(op_90b8_0), 37048 }, /* SUB */ +{ CPUFUNC(op_90b9_0), 37049 }, /* SUB */ +{ CPUFUNC(op_90ba_0), 37050 }, /* SUB */ +{ CPUFUNC(op_90bb_4), 37051 }, /* SUB */ +{ CPUFUNC(op_90bc_0), 37052 }, /* SUB */ +{ CPUFUNC(op_90c0_0), 37056 }, /* SUBA */ +{ CPUFUNC(op_90c8_0), 37064 }, /* SUBA */ +{ CPUFUNC(op_90d0_0), 37072 }, /* SUBA */ +{ CPUFUNC(op_90d8_0), 37080 }, /* SUBA */ +{ CPUFUNC(op_90e0_0), 37088 }, /* SUBA */ +{ CPUFUNC(op_90e8_0), 37096 }, /* SUBA */ +{ CPUFUNC(op_90f0_4), 37104 }, /* SUBA */ +{ CPUFUNC(op_90f8_0), 37112 }, /* SUBA */ +{ CPUFUNC(op_90f9_0), 37113 }, /* SUBA */ +{ CPUFUNC(op_90fa_0), 37114 }, /* SUBA */ +{ CPUFUNC(op_90fb_4), 37115 }, /* SUBA */ +{ CPUFUNC(op_90fc_0), 37116 }, /* SUBA */ +{ CPUFUNC(op_9100_0), 37120 }, /* SUBX */ +{ CPUFUNC(op_9108_0), 37128 }, /* SUBX */ +{ CPUFUNC(op_9110_0), 37136 }, /* SUB */ +{ CPUFUNC(op_9118_0), 37144 }, /* SUB */ +{ CPUFUNC(op_9120_0), 37152 }, /* SUB */ +{ CPUFUNC(op_9128_0), 37160 }, /* SUB */ +{ CPUFUNC(op_9130_4), 37168 }, /* SUB */ +{ CPUFUNC(op_9138_0), 37176 }, /* SUB */ +{ CPUFUNC(op_9139_0), 37177 }, /* SUB */ +{ CPUFUNC(op_9140_0), 37184 }, /* SUBX */ +{ CPUFUNC(op_9148_0), 37192 }, /* SUBX */ +{ CPUFUNC(op_9150_0), 37200 }, /* SUB */ +{ CPUFUNC(op_9158_0), 37208 }, /* SUB */ +{ CPUFUNC(op_9160_0), 37216 }, /* SUB */ +{ CPUFUNC(op_9168_0), 37224 }, /* SUB */ +{ CPUFUNC(op_9170_4), 37232 }, /* SUB */ +{ CPUFUNC(op_9178_0), 37240 }, /* SUB */ +{ CPUFUNC(op_9179_0), 37241 }, /* SUB */ +{ CPUFUNC(op_9180_0), 37248 }, /* SUBX */ +{ CPUFUNC(op_9188_0), 37256 }, /* SUBX */ +{ CPUFUNC(op_9190_0), 37264 }, /* SUB */ +{ CPUFUNC(op_9198_0), 37272 }, /* SUB */ +{ CPUFUNC(op_91a0_0), 37280 }, /* SUB */ +{ CPUFUNC(op_91a8_0), 37288 }, /* SUB */ +{ CPUFUNC(op_91b0_4), 37296 }, /* SUB */ +{ CPUFUNC(op_91b8_0), 37304 }, /* SUB */ +{ CPUFUNC(op_91b9_0), 37305 }, /* SUB */ +{ CPUFUNC(op_91c0_0), 37312 }, /* SUBA */ +{ CPUFUNC(op_91c8_0), 37320 }, /* SUBA */ +{ CPUFUNC(op_91d0_0), 37328 }, /* SUBA */ +{ CPUFUNC(op_91d8_0), 37336 }, /* SUBA */ +{ CPUFUNC(op_91e0_0), 37344 }, /* SUBA */ +{ CPUFUNC(op_91e8_0), 37352 }, /* SUBA */ +{ CPUFUNC(op_91f0_4), 37360 }, /* SUBA */ +{ CPUFUNC(op_91f8_0), 37368 }, /* SUBA */ +{ CPUFUNC(op_91f9_0), 37369 }, /* SUBA */ +{ CPUFUNC(op_91fa_0), 37370 }, /* SUBA */ +{ CPUFUNC(op_91fb_4), 37371 }, /* SUBA */ +{ CPUFUNC(op_91fc_0), 37372 }, /* SUBA */ +{ CPUFUNC(op_b000_0), 45056 }, /* CMP */ +{ CPUFUNC(op_b010_0), 45072 }, /* CMP */ +{ CPUFUNC(op_b018_0), 45080 }, /* CMP */ +{ CPUFUNC(op_b020_0), 45088 }, /* CMP */ +{ CPUFUNC(op_b028_0), 45096 }, /* CMP */ +{ CPUFUNC(op_b030_4), 45104 }, /* CMP */ +{ CPUFUNC(op_b038_0), 45112 }, /* CMP */ +{ CPUFUNC(op_b039_0), 45113 }, /* CMP */ +{ CPUFUNC(op_b03a_0), 45114 }, /* CMP */ +{ CPUFUNC(op_b03b_4), 45115 }, /* CMP */ +{ CPUFUNC(op_b03c_0), 45116 }, /* CMP */ +{ CPUFUNC(op_b040_0), 45120 }, /* CMP */ +{ CPUFUNC(op_b048_0), 45128 }, /* CMP */ +{ CPUFUNC(op_b050_0), 45136 }, /* CMP */ +{ CPUFUNC(op_b058_0), 45144 }, /* CMP */ +{ CPUFUNC(op_b060_0), 45152 }, /* CMP */ +{ CPUFUNC(op_b068_0), 45160 }, /* CMP */ +{ CPUFUNC(op_b070_4), 45168 }, /* CMP */ +{ CPUFUNC(op_b078_0), 45176 }, /* CMP */ +{ CPUFUNC(op_b079_0), 45177 }, /* CMP */ +{ CPUFUNC(op_b07a_0), 45178 }, /* CMP */ +{ CPUFUNC(op_b07b_4), 45179 }, /* CMP */ +{ CPUFUNC(op_b07c_0), 45180 }, /* CMP */ +{ CPUFUNC(op_b080_0), 45184 }, /* CMP */ +{ CPUFUNC(op_b088_0), 45192 }, /* CMP */ +{ CPUFUNC(op_b090_0), 45200 }, /* CMP */ +{ CPUFUNC(op_b098_0), 45208 }, /* CMP */ +{ CPUFUNC(op_b0a0_0), 45216 }, /* CMP */ +{ CPUFUNC(op_b0a8_0), 45224 }, /* CMP */ +{ CPUFUNC(op_b0b0_4), 45232 }, /* CMP */ +{ CPUFUNC(op_b0b8_0), 45240 }, /* CMP */ +{ CPUFUNC(op_b0b9_0), 45241 }, /* CMP */ +{ CPUFUNC(op_b0ba_0), 45242 }, /* CMP */ +{ CPUFUNC(op_b0bb_4), 45243 }, /* CMP */ +{ CPUFUNC(op_b0bc_0), 45244 }, /* CMP */ +{ CPUFUNC(op_b0c0_0), 45248 }, /* CMPA */ +{ CPUFUNC(op_b0c8_0), 45256 }, /* CMPA */ +{ CPUFUNC(op_b0d0_0), 45264 }, /* CMPA */ +{ CPUFUNC(op_b0d8_0), 45272 }, /* CMPA */ +{ CPUFUNC(op_b0e0_0), 45280 }, /* CMPA */ +{ CPUFUNC(op_b0e8_0), 45288 }, /* CMPA */ +{ CPUFUNC(op_b0f0_4), 45296 }, /* CMPA */ +{ CPUFUNC(op_b0f8_0), 45304 }, /* CMPA */ +{ CPUFUNC(op_b0f9_0), 45305 }, /* CMPA */ +{ CPUFUNC(op_b0fa_0), 45306 }, /* CMPA */ +{ CPUFUNC(op_b0fb_4), 45307 }, /* CMPA */ +{ CPUFUNC(op_b0fc_0), 45308 }, /* CMPA */ +{ CPUFUNC(op_b100_0), 45312 }, /* EOR */ +{ CPUFUNC(op_b108_0), 45320 }, /* CMPM */ +{ CPUFUNC(op_b110_0), 45328 }, /* EOR */ +{ CPUFUNC(op_b118_0), 45336 }, /* EOR */ +{ CPUFUNC(op_b120_0), 45344 }, /* EOR */ +{ CPUFUNC(op_b128_0), 45352 }, /* EOR */ +{ CPUFUNC(op_b130_4), 45360 }, /* EOR */ +{ CPUFUNC(op_b138_0), 45368 }, /* EOR */ +{ CPUFUNC(op_b139_0), 45369 }, /* EOR */ +{ CPUFUNC(op_b140_0), 45376 }, /* EOR */ +{ CPUFUNC(op_b148_0), 45384 }, /* CMPM */ +{ CPUFUNC(op_b150_0), 45392 }, /* EOR */ +{ CPUFUNC(op_b158_0), 45400 }, /* EOR */ +{ CPUFUNC(op_b160_0), 45408 }, /* EOR */ +{ CPUFUNC(op_b168_0), 45416 }, /* EOR */ +{ CPUFUNC(op_b170_4), 45424 }, /* EOR */ +{ CPUFUNC(op_b178_0), 45432 }, /* EOR */ +{ CPUFUNC(op_b179_0), 45433 }, /* EOR */ +{ CPUFUNC(op_b180_0), 45440 }, /* EOR */ +{ CPUFUNC(op_b188_0), 45448 }, /* CMPM */ +{ CPUFUNC(op_b190_0), 45456 }, /* EOR */ +{ CPUFUNC(op_b198_0), 45464 }, /* EOR */ +{ CPUFUNC(op_b1a0_0), 45472 }, /* EOR */ +{ CPUFUNC(op_b1a8_0), 45480 }, /* EOR */ +{ CPUFUNC(op_b1b0_4), 45488 }, /* EOR */ +{ CPUFUNC(op_b1b8_0), 45496 }, /* EOR */ +{ CPUFUNC(op_b1b9_0), 45497 }, /* EOR */ +{ CPUFUNC(op_b1c0_0), 45504 }, /* CMPA */ +{ CPUFUNC(op_b1c8_0), 45512 }, /* CMPA */ +{ CPUFUNC(op_b1d0_0), 45520 }, /* CMPA */ +{ CPUFUNC(op_b1d8_0), 45528 }, /* CMPA */ +{ CPUFUNC(op_b1e0_0), 45536 }, /* CMPA */ +{ CPUFUNC(op_b1e8_0), 45544 }, /* CMPA */ +{ CPUFUNC(op_b1f0_4), 45552 }, /* CMPA */ +{ CPUFUNC(op_b1f8_0), 45560 }, /* CMPA */ +{ CPUFUNC(op_b1f9_0), 45561 }, /* CMPA */ +{ CPUFUNC(op_b1fa_0), 45562 }, /* CMPA */ +{ CPUFUNC(op_b1fb_4), 45563 }, /* CMPA */ +{ CPUFUNC(op_b1fc_0), 45564 }, /* CMPA */ +{ CPUFUNC(op_c000_0), 49152 }, /* AND */ +{ CPUFUNC(op_c010_0), 49168 }, /* AND */ +{ CPUFUNC(op_c018_0), 49176 }, /* AND */ +{ CPUFUNC(op_c020_0), 49184 }, /* AND */ +{ CPUFUNC(op_c028_0), 49192 }, /* AND */ +{ CPUFUNC(op_c030_4), 49200 }, /* AND */ +{ CPUFUNC(op_c038_0), 49208 }, /* AND */ +{ CPUFUNC(op_c039_0), 49209 }, /* AND */ +{ CPUFUNC(op_c03a_0), 49210 }, /* AND */ +{ CPUFUNC(op_c03b_4), 49211 }, /* AND */ +{ CPUFUNC(op_c03c_0), 49212 }, /* AND */ +{ CPUFUNC(op_c040_0), 49216 }, /* AND */ +{ CPUFUNC(op_c050_0), 49232 }, /* AND */ +{ CPUFUNC(op_c058_0), 49240 }, /* AND */ +{ CPUFUNC(op_c060_0), 49248 }, /* AND */ +{ CPUFUNC(op_c068_0), 49256 }, /* AND */ +{ CPUFUNC(op_c070_4), 49264 }, /* AND */ +{ CPUFUNC(op_c078_0), 49272 }, /* AND */ +{ CPUFUNC(op_c079_0), 49273 }, /* AND */ +{ CPUFUNC(op_c07a_0), 49274 }, /* AND */ +{ CPUFUNC(op_c07b_4), 49275 }, /* AND */ +{ CPUFUNC(op_c07c_0), 49276 }, /* AND */ +{ CPUFUNC(op_c080_0), 49280 }, /* AND */ +{ CPUFUNC(op_c090_0), 49296 }, /* AND */ +{ CPUFUNC(op_c098_0), 49304 }, /* AND */ +{ CPUFUNC(op_c0a0_0), 49312 }, /* AND */ +{ CPUFUNC(op_c0a8_0), 49320 }, /* AND */ +{ CPUFUNC(op_c0b0_4), 49328 }, /* AND */ +{ CPUFUNC(op_c0b8_0), 49336 }, /* AND */ +{ CPUFUNC(op_c0b9_0), 49337 }, /* AND */ +{ CPUFUNC(op_c0ba_0), 49338 }, /* AND */ +{ CPUFUNC(op_c0bb_4), 49339 }, /* AND */ +{ CPUFUNC(op_c0bc_0), 49340 }, /* AND */ +{ CPUFUNC(op_c0c0_0), 49344 }, /* MULU */ +{ CPUFUNC(op_c0d0_0), 49360 }, /* MULU */ +{ CPUFUNC(op_c0d8_0), 49368 }, /* MULU */ +{ CPUFUNC(op_c0e0_0), 49376 }, /* MULU */ +{ CPUFUNC(op_c0e8_0), 49384 }, /* MULU */ +{ CPUFUNC(op_c0f0_4), 49392 }, /* MULU */ +{ CPUFUNC(op_c0f8_0), 49400 }, /* MULU */ +{ CPUFUNC(op_c0f9_0), 49401 }, /* MULU */ +{ CPUFUNC(op_c0fa_0), 49402 }, /* MULU */ +{ CPUFUNC(op_c0fb_4), 49403 }, /* MULU */ +{ CPUFUNC(op_c0fc_0), 49404 }, /* MULU */ +{ CPUFUNC(op_c100_2), 49408 }, /* ABCD */ +{ CPUFUNC(op_c108_2), 49416 }, /* ABCD */ +{ CPUFUNC(op_c110_0), 49424 }, /* AND */ +{ CPUFUNC(op_c118_0), 49432 }, /* AND */ +{ CPUFUNC(op_c120_0), 49440 }, /* AND */ +{ CPUFUNC(op_c128_0), 49448 }, /* AND */ +{ CPUFUNC(op_c130_4), 49456 }, /* AND */ +{ CPUFUNC(op_c138_0), 49464 }, /* AND */ +{ CPUFUNC(op_c139_0), 49465 }, /* AND */ +{ CPUFUNC(op_c140_0), 49472 }, /* EXG */ +{ CPUFUNC(op_c148_0), 49480 }, /* EXG */ +{ CPUFUNC(op_c150_0), 49488 }, /* AND */ +{ CPUFUNC(op_c158_0), 49496 }, /* AND */ +{ CPUFUNC(op_c160_0), 49504 }, /* AND */ +{ CPUFUNC(op_c168_0), 49512 }, /* AND */ +{ CPUFUNC(op_c170_4), 49520 }, /* AND */ +{ CPUFUNC(op_c178_0), 49528 }, /* AND */ +{ CPUFUNC(op_c179_0), 49529 }, /* AND */ +{ CPUFUNC(op_c188_0), 49544 }, /* EXG */ +{ CPUFUNC(op_c190_0), 49552 }, /* AND */ +{ CPUFUNC(op_c198_0), 49560 }, /* AND */ +{ CPUFUNC(op_c1a0_0), 49568 }, /* AND */ +{ CPUFUNC(op_c1a8_0), 49576 }, /* AND */ +{ CPUFUNC(op_c1b0_4), 49584 }, /* AND */ +{ CPUFUNC(op_c1b8_0), 49592 }, /* AND */ +{ CPUFUNC(op_c1b9_0), 49593 }, /* AND */ +{ CPUFUNC(op_c1c0_0), 49600 }, /* MULS */ +{ CPUFUNC(op_c1d0_0), 49616 }, /* MULS */ +{ CPUFUNC(op_c1d8_0), 49624 }, /* MULS */ +{ CPUFUNC(op_c1e0_0), 49632 }, /* MULS */ +{ CPUFUNC(op_c1e8_0), 49640 }, /* MULS */ +{ CPUFUNC(op_c1f0_4), 49648 }, /* MULS */ +{ CPUFUNC(op_c1f8_0), 49656 }, /* MULS */ +{ CPUFUNC(op_c1f9_0), 49657 }, /* MULS */ +{ CPUFUNC(op_c1fa_0), 49658 }, /* MULS */ +{ CPUFUNC(op_c1fb_4), 49659 }, /* MULS */ +{ CPUFUNC(op_c1fc_0), 49660 }, /* MULS */ +{ CPUFUNC(op_d000_0), 53248 }, /* ADD */ +{ CPUFUNC(op_d010_0), 53264 }, /* ADD */ +{ CPUFUNC(op_d018_0), 53272 }, /* ADD */ +{ CPUFUNC(op_d020_0), 53280 }, /* ADD */ +{ CPUFUNC(op_d028_0), 53288 }, /* ADD */ +{ CPUFUNC(op_d030_4), 53296 }, /* ADD */ +{ CPUFUNC(op_d038_0), 53304 }, /* ADD */ +{ CPUFUNC(op_d039_0), 53305 }, /* ADD */ +{ CPUFUNC(op_d03a_0), 53306 }, /* ADD */ +{ CPUFUNC(op_d03b_4), 53307 }, /* ADD */ +{ CPUFUNC(op_d03c_0), 53308 }, /* ADD */ +{ CPUFUNC(op_d040_0), 53312 }, /* ADD */ +{ CPUFUNC(op_d048_0), 53320 }, /* ADD */ +{ CPUFUNC(op_d050_0), 53328 }, /* ADD */ +{ CPUFUNC(op_d058_0), 53336 }, /* ADD */ +{ CPUFUNC(op_d060_0), 53344 }, /* ADD */ +{ CPUFUNC(op_d068_0), 53352 }, /* ADD */ +{ CPUFUNC(op_d070_4), 53360 }, /* ADD */ +{ CPUFUNC(op_d078_0), 53368 }, /* ADD */ +{ CPUFUNC(op_d079_0), 53369 }, /* ADD */ +{ CPUFUNC(op_d07a_0), 53370 }, /* ADD */ +{ CPUFUNC(op_d07b_4), 53371 }, /* ADD */ +{ CPUFUNC(op_d07c_0), 53372 }, /* ADD */ +{ CPUFUNC(op_d080_0), 53376 }, /* ADD */ +{ CPUFUNC(op_d088_0), 53384 }, /* ADD */ +{ CPUFUNC(op_d090_0), 53392 }, /* ADD */ +{ CPUFUNC(op_d098_0), 53400 }, /* ADD */ +{ CPUFUNC(op_d0a0_0), 53408 }, /* ADD */ +{ CPUFUNC(op_d0a8_0), 53416 }, /* ADD */ +{ CPUFUNC(op_d0b0_4), 53424 }, /* ADD */ +{ CPUFUNC(op_d0b8_0), 53432 }, /* ADD */ +{ CPUFUNC(op_d0b9_0), 53433 }, /* ADD */ +{ CPUFUNC(op_d0ba_0), 53434 }, /* ADD */ +{ CPUFUNC(op_d0bb_4), 53435 }, /* ADD */ +{ CPUFUNC(op_d0bc_0), 53436 }, /* ADD */ +{ CPUFUNC(op_d0c0_0), 53440 }, /* ADDA */ +{ CPUFUNC(op_d0c8_0), 53448 }, /* ADDA */ +{ CPUFUNC(op_d0d0_0), 53456 }, /* ADDA */ +{ CPUFUNC(op_d0d8_0), 53464 }, /* ADDA */ +{ CPUFUNC(op_d0e0_0), 53472 }, /* ADDA */ +{ CPUFUNC(op_d0e8_0), 53480 }, /* ADDA */ +{ CPUFUNC(op_d0f0_4), 53488 }, /* ADDA */ +{ CPUFUNC(op_d0f8_0), 53496 }, /* ADDA */ +{ CPUFUNC(op_d0f9_0), 53497 }, /* ADDA */ +{ CPUFUNC(op_d0fa_0), 53498 }, /* ADDA */ +{ CPUFUNC(op_d0fb_4), 53499 }, /* ADDA */ +{ CPUFUNC(op_d0fc_0), 53500 }, /* ADDA */ +{ CPUFUNC(op_d100_0), 53504 }, /* ADDX */ +{ CPUFUNC(op_d108_0), 53512 }, /* ADDX */ +{ CPUFUNC(op_d110_0), 53520 }, /* ADD */ +{ CPUFUNC(op_d118_0), 53528 }, /* ADD */ +{ CPUFUNC(op_d120_0), 53536 }, /* ADD */ +{ CPUFUNC(op_d128_0), 53544 }, /* ADD */ +{ CPUFUNC(op_d130_4), 53552 }, /* ADD */ +{ CPUFUNC(op_d138_0), 53560 }, /* ADD */ +{ CPUFUNC(op_d139_0), 53561 }, /* ADD */ +{ CPUFUNC(op_d140_0), 53568 }, /* ADDX */ +{ CPUFUNC(op_d148_0), 53576 }, /* ADDX */ +{ CPUFUNC(op_d150_0), 53584 }, /* ADD */ +{ CPUFUNC(op_d158_0), 53592 }, /* ADD */ +{ CPUFUNC(op_d160_0), 53600 }, /* ADD */ +{ CPUFUNC(op_d168_0), 53608 }, /* ADD */ +{ CPUFUNC(op_d170_4), 53616 }, /* ADD */ +{ CPUFUNC(op_d178_0), 53624 }, /* ADD */ +{ CPUFUNC(op_d179_0), 53625 }, /* ADD */ +{ CPUFUNC(op_d180_0), 53632 }, /* ADDX */ +{ CPUFUNC(op_d188_0), 53640 }, /* ADDX */ +{ CPUFUNC(op_d190_0), 53648 }, /* ADD */ +{ CPUFUNC(op_d198_0), 53656 }, /* ADD */ +{ CPUFUNC(op_d1a0_0), 53664 }, /* ADD */ +{ CPUFUNC(op_d1a8_0), 53672 }, /* ADD */ +{ CPUFUNC(op_d1b0_4), 53680 }, /* ADD */ +{ CPUFUNC(op_d1b8_0), 53688 }, /* ADD */ +{ CPUFUNC(op_d1b9_0), 53689 }, /* ADD */ +{ CPUFUNC(op_d1c0_0), 53696 }, /* ADDA */ +{ CPUFUNC(op_d1c8_0), 53704 }, /* ADDA */ +{ CPUFUNC(op_d1d0_0), 53712 }, /* ADDA */ +{ CPUFUNC(op_d1d8_0), 53720 }, /* ADDA */ +{ CPUFUNC(op_d1e0_0), 53728 }, /* ADDA */ +{ CPUFUNC(op_d1e8_0), 53736 }, /* ADDA */ +{ CPUFUNC(op_d1f0_4), 53744 }, /* ADDA */ +{ CPUFUNC(op_d1f8_0), 53752 }, /* ADDA */ +{ CPUFUNC(op_d1f9_0), 53753 }, /* ADDA */ +{ CPUFUNC(op_d1fa_0), 53754 }, /* ADDA */ +{ CPUFUNC(op_d1fb_4), 53755 }, /* ADDA */ +{ CPUFUNC(op_d1fc_0), 53756 }, /* ADDA */ +{ CPUFUNC(op_e000_0), 57344 }, /* ASR */ +{ CPUFUNC(op_e008_0), 57352 }, /* LSR */ +{ CPUFUNC(op_e010_0), 57360 }, /* ROXR */ +{ CPUFUNC(op_e018_0), 57368 }, /* ROR */ +{ CPUFUNC(op_e020_0), 57376 }, /* ASR */ +{ CPUFUNC(op_e028_0), 57384 }, /* LSR */ +{ CPUFUNC(op_e030_0), 57392 }, /* ROXR */ +{ CPUFUNC(op_e038_0), 57400 }, /* ROR */ +{ CPUFUNC(op_e040_0), 57408 }, /* ASR */ +{ CPUFUNC(op_e048_0), 57416 }, /* LSR */ +{ CPUFUNC(op_e050_0), 57424 }, /* ROXR */ +{ CPUFUNC(op_e058_0), 57432 }, /* ROR */ +{ CPUFUNC(op_e060_0), 57440 }, /* ASR */ +{ CPUFUNC(op_e068_0), 57448 }, /* LSR */ +{ CPUFUNC(op_e070_0), 57456 }, /* ROXR */ +{ CPUFUNC(op_e078_0), 57464 }, /* ROR */ +{ CPUFUNC(op_e080_0), 57472 }, /* ASR */ +{ CPUFUNC(op_e088_0), 57480 }, /* LSR */ +{ CPUFUNC(op_e090_0), 57488 }, /* ROXR */ +{ CPUFUNC(op_e098_0), 57496 }, /* ROR */ +{ CPUFUNC(op_e0a0_0), 57504 }, /* ASR */ +{ CPUFUNC(op_e0a8_0), 57512 }, /* LSR */ +{ CPUFUNC(op_e0b0_0), 57520 }, /* ROXR */ +{ CPUFUNC(op_e0b8_0), 57528 }, /* ROR */ +{ CPUFUNC(op_e0d0_0), 57552 }, /* ASRW */ +{ CPUFUNC(op_e0d8_0), 57560 }, /* ASRW */ +{ CPUFUNC(op_e0e0_0), 57568 }, /* ASRW */ +{ CPUFUNC(op_e0e8_0), 57576 }, /* ASRW */ +{ CPUFUNC(op_e0f0_4), 57584 }, /* ASRW */ +{ CPUFUNC(op_e0f8_0), 57592 }, /* ASRW */ +{ CPUFUNC(op_e0f9_0), 57593 }, /* ASRW */ +{ CPUFUNC(op_e100_0), 57600 }, /* ASL */ +{ CPUFUNC(op_e108_0), 57608 }, /* LSL */ +{ CPUFUNC(op_e110_0), 57616 }, /* ROXL */ +{ CPUFUNC(op_e118_0), 57624 }, /* ROL */ +{ CPUFUNC(op_e120_0), 57632 }, /* ASL */ +{ CPUFUNC(op_e128_0), 57640 }, /* LSL */ +{ CPUFUNC(op_e130_0), 57648 }, /* ROXL */ +{ CPUFUNC(op_e138_0), 57656 }, /* ROL */ +{ CPUFUNC(op_e140_0), 57664 }, /* ASL */ +{ CPUFUNC(op_e148_0), 57672 }, /* LSL */ +{ CPUFUNC(op_e150_0), 57680 }, /* ROXL */ +{ CPUFUNC(op_e158_0), 57688 }, /* ROL */ +{ CPUFUNC(op_e160_0), 57696 }, /* ASL */ +{ CPUFUNC(op_e168_0), 57704 }, /* LSL */ +{ CPUFUNC(op_e170_0), 57712 }, /* ROXL */ +{ CPUFUNC(op_e178_0), 57720 }, /* ROL */ +{ CPUFUNC(op_e180_0), 57728 }, /* ASL */ +{ CPUFUNC(op_e188_0), 57736 }, /* LSL */ +{ CPUFUNC(op_e190_0), 57744 }, /* ROXL */ +{ CPUFUNC(op_e198_0), 57752 }, /* ROL */ +{ CPUFUNC(op_e1a0_0), 57760 }, /* ASL */ +{ CPUFUNC(op_e1a8_0), 57768 }, /* LSL */ +{ CPUFUNC(op_e1b0_0), 57776 }, /* ROXL */ +{ CPUFUNC(op_e1b8_0), 57784 }, /* ROL */ +{ CPUFUNC(op_e1d0_0), 57808 }, /* ASLW */ +{ CPUFUNC(op_e1d8_0), 57816 }, /* ASLW */ +{ CPUFUNC(op_e1e0_0), 57824 }, /* ASLW */ +{ CPUFUNC(op_e1e8_0), 57832 }, /* ASLW */ +{ CPUFUNC(op_e1f0_4), 57840 }, /* ASLW */ +{ CPUFUNC(op_e1f8_0), 57848 }, /* ASLW */ +{ CPUFUNC(op_e1f9_0), 57849 }, /* ASLW */ +{ CPUFUNC(op_e2d0_0), 58064 }, /* LSRW */ +{ CPUFUNC(op_e2d8_0), 58072 }, /* LSRW */ +{ CPUFUNC(op_e2e0_0), 58080 }, /* LSRW */ +{ CPUFUNC(op_e2e8_0), 58088 }, /* LSRW */ +{ CPUFUNC(op_e2f0_4), 58096 }, /* LSRW */ +{ CPUFUNC(op_e2f8_0), 58104 }, /* LSRW */ +{ CPUFUNC(op_e2f9_0), 58105 }, /* LSRW */ +{ CPUFUNC(op_e3d0_0), 58320 }, /* LSLW */ +{ CPUFUNC(op_e3d8_0), 58328 }, /* LSLW */ +{ CPUFUNC(op_e3e0_0), 58336 }, /* LSLW */ +{ CPUFUNC(op_e3e8_0), 58344 }, /* LSLW */ +{ CPUFUNC(op_e3f0_4), 58352 }, /* LSLW */ +{ CPUFUNC(op_e3f8_0), 58360 }, /* LSLW */ +{ CPUFUNC(op_e3f9_0), 58361 }, /* LSLW */ +{ CPUFUNC(op_e4d0_0), 58576 }, /* ROXRW */ +{ CPUFUNC(op_e4d8_0), 58584 }, /* ROXRW */ +{ CPUFUNC(op_e4e0_0), 58592 }, /* ROXRW */ +{ CPUFUNC(op_e4e8_0), 58600 }, /* ROXRW */ +{ CPUFUNC(op_e4f0_4), 58608 }, /* ROXRW */ +{ CPUFUNC(op_e4f8_0), 58616 }, /* ROXRW */ +{ CPUFUNC(op_e4f9_0), 58617 }, /* ROXRW */ +{ CPUFUNC(op_e5d0_0), 58832 }, /* ROXLW */ +{ CPUFUNC(op_e5d8_0), 58840 }, /* ROXLW */ +{ CPUFUNC(op_e5e0_0), 58848 }, /* ROXLW */ +{ CPUFUNC(op_e5e8_0), 58856 }, /* ROXLW */ +{ CPUFUNC(op_e5f0_4), 58864 }, /* ROXLW */ +{ CPUFUNC(op_e5f8_0), 58872 }, /* ROXLW */ +{ CPUFUNC(op_e5f9_0), 58873 }, /* ROXLW */ +{ CPUFUNC(op_e6d0_0), 59088 }, /* RORW */ +{ CPUFUNC(op_e6d8_0), 59096 }, /* RORW */ +{ CPUFUNC(op_e6e0_0), 59104 }, /* RORW */ +{ CPUFUNC(op_e6e8_0), 59112 }, /* RORW */ +{ CPUFUNC(op_e6f0_4), 59120 }, /* RORW */ +{ CPUFUNC(op_e6f8_0), 59128 }, /* RORW */ +{ CPUFUNC(op_e6f9_0), 59129 }, /* RORW */ +{ CPUFUNC(op_e7d0_0), 59344 }, /* ROLW */ +{ CPUFUNC(op_e7d8_0), 59352 }, /* ROLW */ +{ CPUFUNC(op_e7e0_0), 59360 }, /* ROLW */ +{ CPUFUNC(op_e7e8_0), 59368 }, /* ROLW */ +{ CPUFUNC(op_e7f0_4), 59376 }, /* ROLW */ +{ CPUFUNC(op_e7f8_0), 59384 }, /* ROLW */ +{ CPUFUNC(op_e7f9_0), 59385 }, /* ROLW */ { 0, 0 }}; -#endif /* CPUEMU_5 */ +#endif /* CPUEMU_68000_ONLY */ +#ifdef CPUEMU_11 +const struct cputbl CPUFUNC(op_smalltbl_11)[] = { +{ CPUFUNC(op_0000_11), 0 }, /* OR */ +{ CPUFUNC(op_0010_11), 16 }, /* OR */ +{ CPUFUNC(op_0018_11), 24 }, /* OR */ +{ CPUFUNC(op_0020_11), 32 }, /* OR */ +{ CPUFUNC(op_0028_11), 40 }, /* OR */ +{ CPUFUNC(op_0030_11), 48 }, /* OR */ +{ CPUFUNC(op_0038_11), 56 }, /* OR */ +{ CPUFUNC(op_0039_11), 57 }, /* OR */ +{ CPUFUNC(op_003c_11), 60 }, /* ORSR */ +{ CPUFUNC(op_0040_11), 64 }, /* OR */ +{ CPUFUNC(op_0050_11), 80 }, /* OR */ +{ CPUFUNC(op_0058_11), 88 }, /* OR */ +{ CPUFUNC(op_0060_11), 96 }, /* OR */ +{ CPUFUNC(op_0068_11), 104 }, /* OR */ +{ CPUFUNC(op_0070_11), 112 }, /* OR */ +{ CPUFUNC(op_0078_11), 120 }, /* OR */ +{ CPUFUNC(op_0079_11), 121 }, /* OR */ +{ CPUFUNC(op_007c_11), 124 }, /* ORSR */ +{ CPUFUNC(op_0080_11), 128 }, /* OR */ +{ CPUFUNC(op_0090_11), 144 }, /* OR */ +{ CPUFUNC(op_0098_11), 152 }, /* OR */ +{ CPUFUNC(op_00a0_11), 160 }, /* OR */ +{ CPUFUNC(op_00a8_11), 168 }, /* OR */ +{ CPUFUNC(op_00b0_11), 176 }, /* OR */ +{ CPUFUNC(op_00b8_11), 184 }, /* OR */ +{ CPUFUNC(op_00b9_11), 185 }, /* OR */ +{ CPUFUNC(op_0100_11), 256 }, /* BTST */ +{ CPUFUNC(op_0108_11), 264 }, /* MVPMR */ +{ CPUFUNC(op_0110_11), 272 }, /* BTST */ +{ CPUFUNC(op_0118_11), 280 }, /* BTST */ +{ CPUFUNC(op_0120_11), 288 }, /* BTST */ +{ CPUFUNC(op_0128_11), 296 }, /* BTST */ +{ CPUFUNC(op_0130_11), 304 }, /* BTST */ +{ CPUFUNC(op_0138_11), 312 }, /* BTST */ +{ CPUFUNC(op_0139_11), 313 }, /* BTST */ +{ CPUFUNC(op_013a_11), 314 }, /* BTST */ +{ CPUFUNC(op_013b_11), 315 }, /* BTST */ +{ CPUFUNC(op_013c_11), 316 }, /* BTST */ +{ CPUFUNC(op_0140_11), 320 }, /* BCHG */ +{ CPUFUNC(op_0148_11), 328 }, /* MVPMR */ +{ CPUFUNC(op_0150_11), 336 }, /* BCHG */ +{ CPUFUNC(op_0158_11), 344 }, /* BCHG */ +{ CPUFUNC(op_0160_11), 352 }, /* BCHG */ +{ CPUFUNC(op_0168_11), 360 }, /* BCHG */ +{ CPUFUNC(op_0170_11), 368 }, /* BCHG */ +{ CPUFUNC(op_0178_11), 376 }, /* BCHG */ +{ CPUFUNC(op_0179_11), 377 }, /* BCHG */ +{ CPUFUNC(op_017a_11), 378 }, /* BCHG */ +{ CPUFUNC(op_017b_11), 379 }, /* BCHG */ +{ CPUFUNC(op_0180_11), 384 }, /* BCLR */ +{ CPUFUNC(op_0188_11), 392 }, /* MVPRM */ +{ CPUFUNC(op_0190_11), 400 }, /* BCLR */ +{ CPUFUNC(op_0198_11), 408 }, /* BCLR */ +{ CPUFUNC(op_01a0_11), 416 }, /* BCLR */ +{ CPUFUNC(op_01a8_11), 424 }, /* BCLR */ +{ CPUFUNC(op_01b0_11), 432 }, /* BCLR */ +{ CPUFUNC(op_01b8_11), 440 }, /* BCLR */ +{ CPUFUNC(op_01b9_11), 441 }, /* BCLR */ +{ CPUFUNC(op_01ba_11), 442 }, /* BCLR */ +{ CPUFUNC(op_01bb_11), 443 }, /* BCLR */ +{ CPUFUNC(op_01c0_11), 448 }, /* BSET */ +{ CPUFUNC(op_01c8_11), 456 }, /* MVPRM */ +{ CPUFUNC(op_01d0_11), 464 }, /* BSET */ +{ CPUFUNC(op_01d8_11), 472 }, /* BSET */ +{ CPUFUNC(op_01e0_11), 480 }, /* BSET */ +{ CPUFUNC(op_01e8_11), 488 }, /* BSET */ +{ CPUFUNC(op_01f0_11), 496 }, /* BSET */ +{ CPUFUNC(op_01f8_11), 504 }, /* BSET */ +{ CPUFUNC(op_01f9_11), 505 }, /* BSET */ +{ CPUFUNC(op_01fa_11), 506 }, /* BSET */ +{ CPUFUNC(op_01fb_11), 507 }, /* BSET */ +{ CPUFUNC(op_0200_11), 512 }, /* AND */ +{ CPUFUNC(op_0210_11), 528 }, /* AND */ +{ CPUFUNC(op_0218_11), 536 }, /* AND */ +{ CPUFUNC(op_0220_11), 544 }, /* AND */ +{ CPUFUNC(op_0228_11), 552 }, /* AND */ +{ CPUFUNC(op_0230_11), 560 }, /* AND */ +{ CPUFUNC(op_0238_11), 568 }, /* AND */ +{ CPUFUNC(op_0239_11), 569 }, /* AND */ +{ CPUFUNC(op_023c_11), 572 }, /* ANDSR */ +{ CPUFUNC(op_0240_11), 576 }, /* AND */ +{ CPUFUNC(op_0250_11), 592 }, /* AND */ +{ CPUFUNC(op_0258_11), 600 }, /* AND */ +{ CPUFUNC(op_0260_11), 608 }, /* AND */ +{ CPUFUNC(op_0268_11), 616 }, /* AND */ +{ CPUFUNC(op_0270_11), 624 }, /* AND */ +{ CPUFUNC(op_0278_11), 632 }, /* AND */ +{ CPUFUNC(op_0279_11), 633 }, /* AND */ +{ CPUFUNC(op_027c_11), 636 }, /* ANDSR */ +{ CPUFUNC(op_0280_11), 640 }, /* AND */ +{ CPUFUNC(op_0290_11), 656 }, /* AND */ +{ CPUFUNC(op_0298_11), 664 }, /* AND */ +{ CPUFUNC(op_02a0_11), 672 }, /* AND */ +{ CPUFUNC(op_02a8_11), 680 }, /* AND */ +{ CPUFUNC(op_02b0_11), 688 }, /* AND */ +{ CPUFUNC(op_02b8_11), 696 }, /* AND */ +{ CPUFUNC(op_02b9_11), 697 }, /* AND */ +{ CPUFUNC(op_0400_11), 1024 }, /* SUB */ +{ CPUFUNC(op_0410_11), 1040 }, /* SUB */ +{ CPUFUNC(op_0418_11), 1048 }, /* SUB */ +{ CPUFUNC(op_0420_11), 1056 }, /* SUB */ +{ CPUFUNC(op_0428_11), 1064 }, /* SUB */ +{ CPUFUNC(op_0430_11), 1072 }, /* SUB */ +{ CPUFUNC(op_0438_11), 1080 }, /* SUB */ +{ CPUFUNC(op_0439_11), 1081 }, /* SUB */ +{ CPUFUNC(op_0440_11), 1088 }, /* SUB */ +{ CPUFUNC(op_0450_11), 1104 }, /* SUB */ +{ CPUFUNC(op_0458_11), 1112 }, /* SUB */ +{ CPUFUNC(op_0460_11), 1120 }, /* SUB */ +{ CPUFUNC(op_0468_11), 1128 }, /* SUB */ +{ CPUFUNC(op_0470_11), 1136 }, /* SUB */ +{ CPUFUNC(op_0478_11), 1144 }, /* SUB */ +{ CPUFUNC(op_0479_11), 1145 }, /* SUB */ +{ CPUFUNC(op_0480_11), 1152 }, /* SUB */ +{ CPUFUNC(op_0490_11), 1168 }, /* SUB */ +{ CPUFUNC(op_0498_11), 1176 }, /* SUB */ +{ CPUFUNC(op_04a0_11), 1184 }, /* SUB */ +{ CPUFUNC(op_04a8_11), 1192 }, /* SUB */ +{ CPUFUNC(op_04b0_11), 1200 }, /* SUB */ +{ CPUFUNC(op_04b8_11), 1208 }, /* SUB */ +{ CPUFUNC(op_04b9_11), 1209 }, /* SUB */ +{ CPUFUNC(op_0600_11), 1536 }, /* ADD */ +{ CPUFUNC(op_0610_11), 1552 }, /* ADD */ +{ CPUFUNC(op_0618_11), 1560 }, /* ADD */ +{ CPUFUNC(op_0620_11), 1568 }, /* ADD */ +{ CPUFUNC(op_0628_11), 1576 }, /* ADD */ +{ CPUFUNC(op_0630_11), 1584 }, /* ADD */ +{ CPUFUNC(op_0638_11), 1592 }, /* ADD */ +{ CPUFUNC(op_0639_11), 1593 }, /* ADD */ +{ CPUFUNC(op_0640_11), 1600 }, /* ADD */ +{ CPUFUNC(op_0650_11), 1616 }, /* ADD */ +{ CPUFUNC(op_0658_11), 1624 }, /* ADD */ +{ CPUFUNC(op_0660_11), 1632 }, /* ADD */ +{ CPUFUNC(op_0668_11), 1640 }, /* ADD */ +{ CPUFUNC(op_0670_11), 1648 }, /* ADD */ +{ CPUFUNC(op_0678_11), 1656 }, /* ADD */ +{ CPUFUNC(op_0679_11), 1657 }, /* ADD */ +{ CPUFUNC(op_0680_11), 1664 }, /* ADD */ +{ CPUFUNC(op_0690_11), 1680 }, /* ADD */ +{ CPUFUNC(op_0698_11), 1688 }, /* ADD */ +{ CPUFUNC(op_06a0_11), 1696 }, /* ADD */ +{ CPUFUNC(op_06a8_11), 1704 }, /* ADD */ +{ CPUFUNC(op_06b0_11), 1712 }, /* ADD */ +{ CPUFUNC(op_06b8_11), 1720 }, /* ADD */ +{ CPUFUNC(op_06b9_11), 1721 }, /* ADD */ +{ CPUFUNC(op_0800_11), 2048 }, /* BTST */ +{ CPUFUNC(op_0810_11), 2064 }, /* BTST */ +{ CPUFUNC(op_0818_11), 2072 }, /* BTST */ +{ CPUFUNC(op_0820_11), 2080 }, /* BTST */ +{ CPUFUNC(op_0828_11), 2088 }, /* BTST */ +{ CPUFUNC(op_0830_11), 2096 }, /* BTST */ +{ CPUFUNC(op_0838_11), 2104 }, /* BTST */ +{ CPUFUNC(op_0839_11), 2105 }, /* BTST */ +{ CPUFUNC(op_083a_11), 2106 }, /* BTST */ +{ CPUFUNC(op_083b_11), 2107 }, /* BTST */ +{ CPUFUNC(op_083c_11), 2108 }, /* BTST */ +{ CPUFUNC(op_0840_11), 2112 }, /* BCHG */ +{ CPUFUNC(op_0850_11), 2128 }, /* BCHG */ +{ CPUFUNC(op_0858_11), 2136 }, /* BCHG */ +{ CPUFUNC(op_0860_11), 2144 }, /* BCHG */ +{ CPUFUNC(op_0868_11), 2152 }, /* BCHG */ +{ CPUFUNC(op_0870_11), 2160 }, /* BCHG */ +{ CPUFUNC(op_0878_11), 2168 }, /* BCHG */ +{ CPUFUNC(op_0879_11), 2169 }, /* BCHG */ +{ CPUFUNC(op_087a_11), 2170 }, /* BCHG */ +{ CPUFUNC(op_087b_11), 2171 }, /* BCHG */ +{ CPUFUNC(op_0880_11), 2176 }, /* BCLR */ +{ CPUFUNC(op_0890_11), 2192 }, /* BCLR */ +{ CPUFUNC(op_0898_11), 2200 }, /* BCLR */ +{ CPUFUNC(op_08a0_11), 2208 }, /* BCLR */ +{ CPUFUNC(op_08a8_11), 2216 }, /* BCLR */ +{ CPUFUNC(op_08b0_11), 2224 }, /* BCLR */ +{ CPUFUNC(op_08b8_11), 2232 }, /* BCLR */ +{ CPUFUNC(op_08b9_11), 2233 }, /* BCLR */ +{ CPUFUNC(op_08ba_11), 2234 }, /* BCLR */ +{ CPUFUNC(op_08bb_11), 2235 }, /* BCLR */ +{ CPUFUNC(op_08c0_11), 2240 }, /* BSET */ +{ CPUFUNC(op_08d0_11), 2256 }, /* BSET */ +{ CPUFUNC(op_08d8_11), 2264 }, /* BSET */ +{ CPUFUNC(op_08e0_11), 2272 }, /* BSET */ +{ CPUFUNC(op_08e8_11), 2280 }, /* BSET */ +{ CPUFUNC(op_08f0_11), 2288 }, /* BSET */ +{ CPUFUNC(op_08f8_11), 2296 }, /* BSET */ +{ CPUFUNC(op_08f9_11), 2297 }, /* BSET */ +{ CPUFUNC(op_08fa_11), 2298 }, /* BSET */ +{ CPUFUNC(op_08fb_11), 2299 }, /* BSET */ +{ CPUFUNC(op_0a00_11), 2560 }, /* EOR */ +{ CPUFUNC(op_0a10_11), 2576 }, /* EOR */ +{ CPUFUNC(op_0a18_11), 2584 }, /* EOR */ +{ CPUFUNC(op_0a20_11), 2592 }, /* EOR */ +{ CPUFUNC(op_0a28_11), 2600 }, /* EOR */ +{ CPUFUNC(op_0a30_11), 2608 }, /* EOR */ +{ CPUFUNC(op_0a38_11), 2616 }, /* EOR */ +{ CPUFUNC(op_0a39_11), 2617 }, /* EOR */ +{ CPUFUNC(op_0a3c_11), 2620 }, /* EORSR */ +{ CPUFUNC(op_0a40_11), 2624 }, /* EOR */ +{ CPUFUNC(op_0a50_11), 2640 }, /* EOR */ +{ CPUFUNC(op_0a58_11), 2648 }, /* EOR */ +{ CPUFUNC(op_0a60_11), 2656 }, /* EOR */ +{ CPUFUNC(op_0a68_11), 2664 }, /* EOR */ +{ CPUFUNC(op_0a70_11), 2672 }, /* EOR */ +{ CPUFUNC(op_0a78_11), 2680 }, /* EOR */ +{ CPUFUNC(op_0a79_11), 2681 }, /* EOR */ +{ CPUFUNC(op_0a7c_11), 2684 }, /* EORSR */ +{ CPUFUNC(op_0a80_11), 2688 }, /* EOR */ +{ CPUFUNC(op_0a90_11), 2704 }, /* EOR */ +{ CPUFUNC(op_0a98_11), 2712 }, /* EOR */ +{ CPUFUNC(op_0aa0_11), 2720 }, /* EOR */ +{ CPUFUNC(op_0aa8_11), 2728 }, /* EOR */ +{ CPUFUNC(op_0ab0_11), 2736 }, /* EOR */ +{ CPUFUNC(op_0ab8_11), 2744 }, /* EOR */ +{ CPUFUNC(op_0ab9_11), 2745 }, /* EOR */ +{ CPUFUNC(op_0c00_11), 3072 }, /* CMP */ +{ CPUFUNC(op_0c10_11), 3088 }, /* CMP */ +{ CPUFUNC(op_0c18_11), 3096 }, /* CMP */ +{ CPUFUNC(op_0c20_11), 3104 }, /* CMP */ +{ CPUFUNC(op_0c28_11), 3112 }, /* CMP */ +{ CPUFUNC(op_0c30_11), 3120 }, /* CMP */ +{ CPUFUNC(op_0c38_11), 3128 }, /* CMP */ +{ CPUFUNC(op_0c39_11), 3129 }, /* CMP */ +{ CPUFUNC(op_0c40_11), 3136 }, /* CMP */ +{ CPUFUNC(op_0c50_11), 3152 }, /* CMP */ +{ CPUFUNC(op_0c58_11), 3160 }, /* CMP */ +{ CPUFUNC(op_0c60_11), 3168 }, /* CMP */ +{ CPUFUNC(op_0c68_11), 3176 }, /* CMP */ +{ CPUFUNC(op_0c70_11), 3184 }, /* CMP */ +{ CPUFUNC(op_0c78_11), 3192 }, /* CMP */ +{ CPUFUNC(op_0c79_11), 3193 }, /* CMP */ +{ CPUFUNC(op_0c80_11), 3200 }, /* CMP */ +{ CPUFUNC(op_0c90_11), 3216 }, /* CMP */ +{ CPUFUNC(op_0c98_11), 3224 }, /* CMP */ +{ CPUFUNC(op_0ca0_11), 3232 }, /* CMP */ +{ CPUFUNC(op_0ca8_11), 3240 }, /* CMP */ +{ CPUFUNC(op_0cb0_11), 3248 }, /* CMP */ +{ CPUFUNC(op_0cb8_11), 3256 }, /* CMP */ +{ CPUFUNC(op_0cb9_11), 3257 }, /* CMP */ +{ CPUFUNC(op_1000_11), 4096 }, /* MOVE */ +{ CPUFUNC(op_1010_11), 4112 }, /* MOVE */ +{ CPUFUNC(op_1018_11), 4120 }, /* MOVE */ +{ CPUFUNC(op_1020_11), 4128 }, /* MOVE */ +{ CPUFUNC(op_1028_11), 4136 }, /* MOVE */ +{ CPUFUNC(op_1030_11), 4144 }, /* MOVE */ +{ CPUFUNC(op_1038_11), 4152 }, /* MOVE */ +{ CPUFUNC(op_1039_11), 4153 }, /* MOVE */ +{ CPUFUNC(op_103a_11), 4154 }, /* MOVE */ +{ CPUFUNC(op_103b_11), 4155 }, /* MOVE */ +{ CPUFUNC(op_103c_11), 4156 }, /* MOVE */ +{ CPUFUNC(op_1080_11), 4224 }, /* MOVE */ +{ CPUFUNC(op_1090_11), 4240 }, /* MOVE */ +{ CPUFUNC(op_1098_11), 4248 }, /* MOVE */ +{ CPUFUNC(op_10a0_11), 4256 }, /* MOVE */ +{ CPUFUNC(op_10a8_11), 4264 }, /* MOVE */ +{ CPUFUNC(op_10b0_11), 4272 }, /* MOVE */ +{ CPUFUNC(op_10b8_11), 4280 }, /* MOVE */ +{ CPUFUNC(op_10b9_11), 4281 }, /* MOVE */ +{ CPUFUNC(op_10ba_11), 4282 }, /* MOVE */ +{ CPUFUNC(op_10bb_11), 4283 }, /* MOVE */ +{ CPUFUNC(op_10bc_11), 4284 }, /* MOVE */ +{ CPUFUNC(op_10c0_11), 4288 }, /* MOVE */ +{ CPUFUNC(op_10d0_11), 4304 }, /* MOVE */ +{ CPUFUNC(op_10d8_11), 4312 }, /* MOVE */ +{ CPUFUNC(op_10e0_11), 4320 }, /* MOVE */ +{ CPUFUNC(op_10e8_11), 4328 }, /* MOVE */ +{ CPUFUNC(op_10f0_11), 4336 }, /* MOVE */ +{ CPUFUNC(op_10f8_11), 4344 }, /* MOVE */ +{ CPUFUNC(op_10f9_11), 4345 }, /* MOVE */ +{ CPUFUNC(op_10fa_11), 4346 }, /* MOVE */ +{ CPUFUNC(op_10fb_11), 4347 }, /* MOVE */ +{ CPUFUNC(op_10fc_11), 4348 }, /* MOVE */ +{ CPUFUNC(op_1100_11), 4352 }, /* MOVE */ +{ CPUFUNC(op_1110_11), 4368 }, /* MOVE */ +{ CPUFUNC(op_1118_11), 4376 }, /* MOVE */ +{ CPUFUNC(op_1120_11), 4384 }, /* MOVE */ +{ CPUFUNC(op_1128_11), 4392 }, /* MOVE */ +{ CPUFUNC(op_1130_11), 4400 }, /* MOVE */ +{ CPUFUNC(op_1138_11), 4408 }, /* MOVE */ +{ CPUFUNC(op_1139_11), 4409 }, /* MOVE */ +{ CPUFUNC(op_113a_11), 4410 }, /* MOVE */ +{ CPUFUNC(op_113b_11), 4411 }, /* MOVE */ +{ CPUFUNC(op_113c_11), 4412 }, /* MOVE */ +{ CPUFUNC(op_1140_11), 4416 }, /* MOVE */ +{ CPUFUNC(op_1150_11), 4432 }, /* MOVE */ +{ CPUFUNC(op_1158_11), 4440 }, /* MOVE */ +{ CPUFUNC(op_1160_11), 4448 }, /* MOVE */ +{ CPUFUNC(op_1168_11), 4456 }, /* MOVE */ +{ CPUFUNC(op_1170_11), 4464 }, /* MOVE */ +{ CPUFUNC(op_1178_11), 4472 }, /* MOVE */ +{ CPUFUNC(op_1179_11), 4473 }, /* MOVE */ +{ CPUFUNC(op_117a_11), 4474 }, /* MOVE */ +{ CPUFUNC(op_117b_11), 4475 }, /* MOVE */ +{ CPUFUNC(op_117c_11), 4476 }, /* MOVE */ +{ CPUFUNC(op_1180_11), 4480 }, /* MOVE */ +{ CPUFUNC(op_1190_11), 4496 }, /* MOVE */ +{ CPUFUNC(op_1198_11), 4504 }, /* MOVE */ +{ CPUFUNC(op_11a0_11), 4512 }, /* MOVE */ +{ CPUFUNC(op_11a8_11), 4520 }, /* MOVE */ +{ CPUFUNC(op_11b0_11), 4528 }, /* MOVE */ +{ CPUFUNC(op_11b8_11), 4536 }, /* MOVE */ +{ CPUFUNC(op_11b9_11), 4537 }, /* MOVE */ +{ CPUFUNC(op_11ba_11), 4538 }, /* MOVE */ +{ CPUFUNC(op_11bb_11), 4539 }, /* MOVE */ +{ CPUFUNC(op_11bc_11), 4540 }, /* MOVE */ +{ CPUFUNC(op_11c0_11), 4544 }, /* MOVE */ +{ CPUFUNC(op_11d0_11), 4560 }, /* MOVE */ +{ CPUFUNC(op_11d8_11), 4568 }, /* MOVE */ +{ CPUFUNC(op_11e0_11), 4576 }, /* MOVE */ +{ CPUFUNC(op_11e8_11), 4584 }, /* MOVE */ +{ CPUFUNC(op_11f0_11), 4592 }, /* MOVE */ +{ CPUFUNC(op_11f8_11), 4600 }, /* MOVE */ +{ CPUFUNC(op_11f9_11), 4601 }, /* MOVE */ +{ CPUFUNC(op_11fa_11), 4602 }, /* MOVE */ +{ CPUFUNC(op_11fb_11), 4603 }, /* MOVE */ +{ CPUFUNC(op_11fc_11), 4604 }, /* MOVE */ +{ CPUFUNC(op_13c0_11), 5056 }, /* MOVE */ +{ CPUFUNC(op_13d0_11), 5072 }, /* MOVE */ +{ CPUFUNC(op_13d8_11), 5080 }, /* MOVE */ +{ CPUFUNC(op_13e0_11), 5088 }, /* MOVE */ +{ CPUFUNC(op_13e8_11), 5096 }, /* MOVE */ +{ CPUFUNC(op_13f0_11), 5104 }, /* MOVE */ +{ CPUFUNC(op_13f8_11), 5112 }, /* MOVE */ +{ CPUFUNC(op_13f9_11), 5113 }, /* MOVE */ +{ CPUFUNC(op_13fa_11), 5114 }, /* MOVE */ +{ CPUFUNC(op_13fb_11), 5115 }, /* MOVE */ +{ CPUFUNC(op_13fc_11), 5116 }, /* MOVE */ +{ CPUFUNC(op_2000_11), 8192 }, /* MOVE */ +{ CPUFUNC(op_2008_11), 8200 }, /* MOVE */ +{ CPUFUNC(op_2010_11), 8208 }, /* MOVE */ +{ CPUFUNC(op_2018_11), 8216 }, /* MOVE */ +{ CPUFUNC(op_2020_11), 8224 }, /* MOVE */ +{ CPUFUNC(op_2028_11), 8232 }, /* MOVE */ +{ CPUFUNC(op_2030_11), 8240 }, /* MOVE */ +{ CPUFUNC(op_2038_11), 8248 }, /* MOVE */ +{ CPUFUNC(op_2039_11), 8249 }, /* MOVE */ +{ CPUFUNC(op_203a_11), 8250 }, /* MOVE */ +{ CPUFUNC(op_203b_11), 8251 }, /* MOVE */ +{ CPUFUNC(op_203c_11), 8252 }, /* MOVE */ +{ CPUFUNC(op_2040_11), 8256 }, /* MOVEA */ +{ CPUFUNC(op_2048_11), 8264 }, /* MOVEA */ +{ CPUFUNC(op_2050_11), 8272 }, /* MOVEA */ +{ CPUFUNC(op_2058_11), 8280 }, /* MOVEA */ +{ CPUFUNC(op_2060_11), 8288 }, /* MOVEA */ +{ CPUFUNC(op_2068_11), 8296 }, /* MOVEA */ +{ CPUFUNC(op_2070_11), 8304 }, /* MOVEA */ +{ CPUFUNC(op_2078_11), 8312 }, /* MOVEA */ +{ CPUFUNC(op_2079_11), 8313 }, /* MOVEA */ +{ CPUFUNC(op_207a_11), 8314 }, /* MOVEA */ +{ CPUFUNC(op_207b_11), 8315 }, /* MOVEA */ +{ CPUFUNC(op_207c_11), 8316 }, /* MOVEA */ +{ CPUFUNC(op_2080_11), 8320 }, /* MOVE */ +{ CPUFUNC(op_2088_11), 8328 }, /* MOVE */ +{ CPUFUNC(op_2090_11), 8336 }, /* MOVE */ +{ CPUFUNC(op_2098_11), 8344 }, /* MOVE */ +{ CPUFUNC(op_20a0_11), 8352 }, /* MOVE */ +{ CPUFUNC(op_20a8_11), 8360 }, /* MOVE */ +{ CPUFUNC(op_20b0_11), 8368 }, /* MOVE */ +{ CPUFUNC(op_20b8_11), 8376 }, /* MOVE */ +{ CPUFUNC(op_20b9_11), 8377 }, /* MOVE */ +{ CPUFUNC(op_20ba_11), 8378 }, /* MOVE */ +{ CPUFUNC(op_20bb_11), 8379 }, /* MOVE */ +{ CPUFUNC(op_20bc_11), 8380 }, /* MOVE */ +{ CPUFUNC(op_20c0_11), 8384 }, /* MOVE */ +{ CPUFUNC(op_20c8_11), 8392 }, /* MOVE */ +{ CPUFUNC(op_20d0_11), 8400 }, /* MOVE */ +{ CPUFUNC(op_20d8_11), 8408 }, /* MOVE */ +{ CPUFUNC(op_20e0_11), 8416 }, /* MOVE */ +{ CPUFUNC(op_20e8_11), 8424 }, /* MOVE */ +{ CPUFUNC(op_20f0_11), 8432 }, /* MOVE */ +{ CPUFUNC(op_20f8_11), 8440 }, /* MOVE */ +{ CPUFUNC(op_20f9_11), 8441 }, /* MOVE */ +{ CPUFUNC(op_20fa_11), 8442 }, /* MOVE */ +{ CPUFUNC(op_20fb_11), 8443 }, /* MOVE */ +{ CPUFUNC(op_20fc_11), 8444 }, /* MOVE */ +{ CPUFUNC(op_2100_11), 8448 }, /* MOVE */ +{ CPUFUNC(op_2108_11), 8456 }, /* MOVE */ +{ CPUFUNC(op_2110_11), 8464 }, /* MOVE */ +{ CPUFUNC(op_2118_11), 8472 }, /* MOVE */ +{ CPUFUNC(op_2120_11), 8480 }, /* MOVE */ +{ CPUFUNC(op_2128_11), 8488 }, /* MOVE */ +{ CPUFUNC(op_2130_11), 8496 }, /* MOVE */ +{ CPUFUNC(op_2138_11), 8504 }, /* MOVE */ +{ CPUFUNC(op_2139_11), 8505 }, /* MOVE */ +{ CPUFUNC(op_213a_11), 8506 }, /* MOVE */ +{ CPUFUNC(op_213b_11), 8507 }, /* MOVE */ +{ CPUFUNC(op_213c_11), 8508 }, /* MOVE */ +{ CPUFUNC(op_2140_11), 8512 }, /* MOVE */ +{ CPUFUNC(op_2148_11), 8520 }, /* MOVE */ +{ CPUFUNC(op_2150_11), 8528 }, /* MOVE */ +{ CPUFUNC(op_2158_11), 8536 }, /* MOVE */ +{ CPUFUNC(op_2160_11), 8544 }, /* MOVE */ +{ CPUFUNC(op_2168_11), 8552 }, /* MOVE */ +{ CPUFUNC(op_2170_11), 8560 }, /* MOVE */ +{ CPUFUNC(op_2178_11), 8568 }, /* MOVE */ +{ CPUFUNC(op_2179_11), 8569 }, /* MOVE */ +{ CPUFUNC(op_217a_11), 8570 }, /* MOVE */ +{ CPUFUNC(op_217b_11), 8571 }, /* MOVE */ +{ CPUFUNC(op_217c_11), 8572 }, /* MOVE */ +{ CPUFUNC(op_2180_11), 8576 }, /* MOVE */ +{ CPUFUNC(op_2188_11), 8584 }, /* MOVE */ +{ CPUFUNC(op_2190_11), 8592 }, /* MOVE */ +{ CPUFUNC(op_2198_11), 8600 }, /* MOVE */ +{ CPUFUNC(op_21a0_11), 8608 }, /* MOVE */ +{ CPUFUNC(op_21a8_11), 8616 }, /* MOVE */ +{ CPUFUNC(op_21b0_11), 8624 }, /* MOVE */ +{ CPUFUNC(op_21b8_11), 8632 }, /* MOVE */ +{ CPUFUNC(op_21b9_11), 8633 }, /* MOVE */ +{ CPUFUNC(op_21ba_11), 8634 }, /* MOVE */ +{ CPUFUNC(op_21bb_11), 8635 }, /* MOVE */ +{ CPUFUNC(op_21bc_11), 8636 }, /* MOVE */ +{ CPUFUNC(op_21c0_11), 8640 }, /* MOVE */ +{ CPUFUNC(op_21c8_11), 8648 }, /* MOVE */ +{ CPUFUNC(op_21d0_11), 8656 }, /* MOVE */ +{ CPUFUNC(op_21d8_11), 8664 }, /* MOVE */ +{ CPUFUNC(op_21e0_11), 8672 }, /* MOVE */ +{ CPUFUNC(op_21e8_11), 8680 }, /* MOVE */ +{ CPUFUNC(op_21f0_11), 8688 }, /* MOVE */ +{ CPUFUNC(op_21f8_11), 8696 }, /* MOVE */ +{ CPUFUNC(op_21f9_11), 8697 }, /* MOVE */ +{ CPUFUNC(op_21fa_11), 8698 }, /* MOVE */ +{ CPUFUNC(op_21fb_11), 8699 }, /* MOVE */ +{ CPUFUNC(op_21fc_11), 8700 }, /* MOVE */ +{ CPUFUNC(op_23c0_11), 9152 }, /* MOVE */ +{ CPUFUNC(op_23c8_11), 9160 }, /* MOVE */ +{ CPUFUNC(op_23d0_11), 9168 }, /* MOVE */ +{ CPUFUNC(op_23d8_11), 9176 }, /* MOVE */ +{ CPUFUNC(op_23e0_11), 9184 }, /* MOVE */ +{ CPUFUNC(op_23e8_11), 9192 }, /* MOVE */ +{ CPUFUNC(op_23f0_11), 9200 }, /* MOVE */ +{ CPUFUNC(op_23f8_11), 9208 }, /* MOVE */ +{ CPUFUNC(op_23f9_11), 9209 }, /* MOVE */ +{ CPUFUNC(op_23fa_11), 9210 }, /* MOVE */ +{ CPUFUNC(op_23fb_11), 9211 }, /* MOVE */ +{ CPUFUNC(op_23fc_11), 9212 }, /* MOVE */ +{ CPUFUNC(op_3000_11), 12288 }, /* MOVE */ +{ CPUFUNC(op_3008_11), 12296 }, /* MOVE */ +{ CPUFUNC(op_3010_11), 12304 }, /* MOVE */ +{ CPUFUNC(op_3018_11), 12312 }, /* MOVE */ +{ CPUFUNC(op_3020_11), 12320 }, /* MOVE */ +{ CPUFUNC(op_3028_11), 12328 }, /* MOVE */ +{ CPUFUNC(op_3030_11), 12336 }, /* MOVE */ +{ CPUFUNC(op_3038_11), 12344 }, /* MOVE */ +{ CPUFUNC(op_3039_11), 12345 }, /* MOVE */ +{ CPUFUNC(op_303a_11), 12346 }, /* MOVE */ +{ CPUFUNC(op_303b_11), 12347 }, /* MOVE */ +{ CPUFUNC(op_303c_11), 12348 }, /* MOVE */ +{ CPUFUNC(op_3040_11), 12352 }, /* MOVEA */ +{ CPUFUNC(op_3048_11), 12360 }, /* MOVEA */ +{ CPUFUNC(op_3050_11), 12368 }, /* MOVEA */ +{ CPUFUNC(op_3058_11), 12376 }, /* MOVEA */ +{ CPUFUNC(op_3060_11), 12384 }, /* MOVEA */ +{ CPUFUNC(op_3068_11), 12392 }, /* MOVEA */ +{ CPUFUNC(op_3070_11), 12400 }, /* MOVEA */ +{ CPUFUNC(op_3078_11), 12408 }, /* MOVEA */ +{ CPUFUNC(op_3079_11), 12409 }, /* MOVEA */ +{ CPUFUNC(op_307a_11), 12410 }, /* MOVEA */ +{ CPUFUNC(op_307b_11), 12411 }, /* MOVEA */ +{ CPUFUNC(op_307c_11), 12412 }, /* MOVEA */ +{ CPUFUNC(op_3080_11), 12416 }, /* MOVE */ +{ CPUFUNC(op_3088_11), 12424 }, /* MOVE */ +{ CPUFUNC(op_3090_11), 12432 }, /* MOVE */ +{ CPUFUNC(op_3098_11), 12440 }, /* MOVE */ +{ CPUFUNC(op_30a0_11), 12448 }, /* MOVE */ +{ CPUFUNC(op_30a8_11), 12456 }, /* MOVE */ +{ CPUFUNC(op_30b0_11), 12464 }, /* MOVE */ +{ CPUFUNC(op_30b8_11), 12472 }, /* MOVE */ +{ CPUFUNC(op_30b9_11), 12473 }, /* MOVE */ +{ CPUFUNC(op_30ba_11), 12474 }, /* MOVE */ +{ CPUFUNC(op_30bb_11), 12475 }, /* MOVE */ +{ CPUFUNC(op_30bc_11), 12476 }, /* MOVE */ +{ CPUFUNC(op_30c0_11), 12480 }, /* MOVE */ +{ CPUFUNC(op_30c8_11), 12488 }, /* MOVE */ +{ CPUFUNC(op_30d0_11), 12496 }, /* MOVE */ +{ CPUFUNC(op_30d8_11), 12504 }, /* MOVE */ +{ CPUFUNC(op_30e0_11), 12512 }, /* MOVE */ +{ CPUFUNC(op_30e8_11), 12520 }, /* MOVE */ +{ CPUFUNC(op_30f0_11), 12528 }, /* MOVE */ +{ CPUFUNC(op_30f8_11), 12536 }, /* MOVE */ +{ CPUFUNC(op_30f9_11), 12537 }, /* MOVE */ +{ CPUFUNC(op_30fa_11), 12538 }, /* MOVE */ +{ CPUFUNC(op_30fb_11), 12539 }, /* MOVE */ +{ CPUFUNC(op_30fc_11), 12540 }, /* MOVE */ +{ CPUFUNC(op_3100_11), 12544 }, /* MOVE */ +{ CPUFUNC(op_3108_11), 12552 }, /* MOVE */ +{ CPUFUNC(op_3110_11), 12560 }, /* MOVE */ +{ CPUFUNC(op_3118_11), 12568 }, /* MOVE */ +{ CPUFUNC(op_3120_11), 12576 }, /* MOVE */ +{ CPUFUNC(op_3128_11), 12584 }, /* MOVE */ +{ CPUFUNC(op_3130_11), 12592 }, /* MOVE */ +{ CPUFUNC(op_3138_11), 12600 }, /* MOVE */ +{ CPUFUNC(op_3139_11), 12601 }, /* MOVE */ +{ CPUFUNC(op_313a_11), 12602 }, /* MOVE */ +{ CPUFUNC(op_313b_11), 12603 }, /* MOVE */ +{ CPUFUNC(op_313c_11), 12604 }, /* MOVE */ +{ CPUFUNC(op_3140_11), 12608 }, /* MOVE */ +{ CPUFUNC(op_3148_11), 12616 }, /* MOVE */ +{ CPUFUNC(op_3150_11), 12624 }, /* MOVE */ +{ CPUFUNC(op_3158_11), 12632 }, /* MOVE */ +{ CPUFUNC(op_3160_11), 12640 }, /* MOVE */ +{ CPUFUNC(op_3168_11), 12648 }, /* MOVE */ +{ CPUFUNC(op_3170_11), 12656 }, /* MOVE */ +{ CPUFUNC(op_3178_11), 12664 }, /* MOVE */ +{ CPUFUNC(op_3179_11), 12665 }, /* MOVE */ +{ CPUFUNC(op_317a_11), 12666 }, /* MOVE */ +{ CPUFUNC(op_317b_11), 12667 }, /* MOVE */ +{ CPUFUNC(op_317c_11), 12668 }, /* MOVE */ +{ CPUFUNC(op_3180_11), 12672 }, /* MOVE */ +{ CPUFUNC(op_3188_11), 12680 }, /* MOVE */ +{ CPUFUNC(op_3190_11), 12688 }, /* MOVE */ +{ CPUFUNC(op_3198_11), 12696 }, /* MOVE */ +{ CPUFUNC(op_31a0_11), 12704 }, /* MOVE */ +{ CPUFUNC(op_31a8_11), 12712 }, /* MOVE */ +{ CPUFUNC(op_31b0_11), 12720 }, /* MOVE */ +{ CPUFUNC(op_31b8_11), 12728 }, /* MOVE */ +{ CPUFUNC(op_31b9_11), 12729 }, /* MOVE */ +{ CPUFUNC(op_31ba_11), 12730 }, /* MOVE */ +{ CPUFUNC(op_31bb_11), 12731 }, /* MOVE */ +{ CPUFUNC(op_31bc_11), 12732 }, /* MOVE */ +{ CPUFUNC(op_31c0_11), 12736 }, /* MOVE */ +{ CPUFUNC(op_31c8_11), 12744 }, /* MOVE */ +{ CPUFUNC(op_31d0_11), 12752 }, /* MOVE */ +{ CPUFUNC(op_31d8_11), 12760 }, /* MOVE */ +{ CPUFUNC(op_31e0_11), 12768 }, /* MOVE */ +{ CPUFUNC(op_31e8_11), 12776 }, /* MOVE */ +{ CPUFUNC(op_31f0_11), 12784 }, /* MOVE */ +{ CPUFUNC(op_31f8_11), 12792 }, /* MOVE */ +{ CPUFUNC(op_31f9_11), 12793 }, /* MOVE */ +{ CPUFUNC(op_31fa_11), 12794 }, /* MOVE */ +{ CPUFUNC(op_31fb_11), 12795 }, /* MOVE */ +{ CPUFUNC(op_31fc_11), 12796 }, /* MOVE */ +{ CPUFUNC(op_33c0_11), 13248 }, /* MOVE */ +{ CPUFUNC(op_33c8_11), 13256 }, /* MOVE */ +{ CPUFUNC(op_33d0_11), 13264 }, /* MOVE */ +{ CPUFUNC(op_33d8_11), 13272 }, /* MOVE */ +{ CPUFUNC(op_33e0_11), 13280 }, /* MOVE */ +{ CPUFUNC(op_33e8_11), 13288 }, /* MOVE */ +{ CPUFUNC(op_33f0_11), 13296 }, /* MOVE */ +{ CPUFUNC(op_33f8_11), 13304 }, /* MOVE */ +{ CPUFUNC(op_33f9_11), 13305 }, /* MOVE */ +{ CPUFUNC(op_33fa_11), 13306 }, /* MOVE */ +{ CPUFUNC(op_33fb_11), 13307 }, /* MOVE */ +{ CPUFUNC(op_33fc_11), 13308 }, /* MOVE */ +{ CPUFUNC(op_4000_11), 16384 }, /* NEGX */ +{ CPUFUNC(op_4010_11), 16400 }, /* NEGX */ +{ CPUFUNC(op_4018_11), 16408 }, /* NEGX */ +{ CPUFUNC(op_4020_11), 16416 }, /* NEGX */ +{ CPUFUNC(op_4028_11), 16424 }, /* NEGX */ +{ CPUFUNC(op_4030_11), 16432 }, /* NEGX */ +{ CPUFUNC(op_4038_11), 16440 }, /* NEGX */ +{ CPUFUNC(op_4039_11), 16441 }, /* NEGX */ +{ CPUFUNC(op_4040_11), 16448 }, /* NEGX */ +{ CPUFUNC(op_4050_11), 16464 }, /* NEGX */ +{ CPUFUNC(op_4058_11), 16472 }, /* NEGX */ +{ CPUFUNC(op_4060_11), 16480 }, /* NEGX */ +{ CPUFUNC(op_4068_11), 16488 }, /* NEGX */ +{ CPUFUNC(op_4070_11), 16496 }, /* NEGX */ +{ CPUFUNC(op_4078_11), 16504 }, /* NEGX */ +{ CPUFUNC(op_4079_11), 16505 }, /* NEGX */ +{ CPUFUNC(op_4080_11), 16512 }, /* NEGX */ +{ CPUFUNC(op_4090_11), 16528 }, /* NEGX */ +{ CPUFUNC(op_4098_11), 16536 }, /* NEGX */ +{ CPUFUNC(op_40a0_11), 16544 }, /* NEGX */ +{ CPUFUNC(op_40a8_11), 16552 }, /* NEGX */ +{ CPUFUNC(op_40b0_11), 16560 }, /* NEGX */ +{ CPUFUNC(op_40b8_11), 16568 }, /* NEGX */ +{ CPUFUNC(op_40b9_11), 16569 }, /* NEGX */ +{ CPUFUNC(op_40c0_11), 16576 }, /* MVSR2 */ +{ CPUFUNC(op_40d0_11), 16592 }, /* MVSR2 */ +{ CPUFUNC(op_40d8_11), 16600 }, /* MVSR2 */ +{ CPUFUNC(op_40e0_11), 16608 }, /* MVSR2 */ +{ CPUFUNC(op_40e8_11), 16616 }, /* MVSR2 */ +{ CPUFUNC(op_40f0_11), 16624 }, /* MVSR2 */ +{ CPUFUNC(op_40f8_11), 16632 }, /* MVSR2 */ +{ CPUFUNC(op_40f9_11), 16633 }, /* MVSR2 */ +{ CPUFUNC(op_4100_11), 16640 }, /* CHK */ +{ CPUFUNC(op_4110_11), 16656 }, /* CHK */ +{ CPUFUNC(op_4118_11), 16664 }, /* CHK */ +{ CPUFUNC(op_4120_11), 16672 }, /* CHK */ +{ CPUFUNC(op_4128_11), 16680 }, /* CHK */ +{ CPUFUNC(op_4130_11), 16688 }, /* CHK */ +{ CPUFUNC(op_4138_11), 16696 }, /* CHK */ +{ CPUFUNC(op_4139_11), 16697 }, /* CHK */ +{ CPUFUNC(op_413a_11), 16698 }, /* CHK */ +{ CPUFUNC(op_413b_11), 16699 }, /* CHK */ +{ CPUFUNC(op_413c_11), 16700 }, /* CHK */ +{ CPUFUNC(op_4180_11), 16768 }, /* CHK */ +{ CPUFUNC(op_4190_11), 16784 }, /* CHK */ +{ CPUFUNC(op_4198_11), 16792 }, /* CHK */ +{ CPUFUNC(op_41a0_11), 16800 }, /* CHK */ +{ CPUFUNC(op_41a8_11), 16808 }, /* CHK */ +{ CPUFUNC(op_41b0_11), 16816 }, /* CHK */ +{ CPUFUNC(op_41b8_11), 16824 }, /* CHK */ +{ CPUFUNC(op_41b9_11), 16825 }, /* CHK */ +{ CPUFUNC(op_41ba_11), 16826 }, /* CHK */ +{ CPUFUNC(op_41bb_11), 16827 }, /* CHK */ +{ CPUFUNC(op_41bc_11), 16828 }, /* CHK */ +{ CPUFUNC(op_41d0_11), 16848 }, /* LEA */ +{ CPUFUNC(op_41e8_11), 16872 }, /* LEA */ +{ CPUFUNC(op_41f0_11), 16880 }, /* LEA */ +{ CPUFUNC(op_41f8_11), 16888 }, /* LEA */ +{ CPUFUNC(op_41f9_11), 16889 }, /* LEA */ +{ CPUFUNC(op_41fa_11), 16890 }, /* LEA */ +{ CPUFUNC(op_41fb_11), 16891 }, /* LEA */ +{ CPUFUNC(op_4200_11), 16896 }, /* CLR */ +{ CPUFUNC(op_4210_11), 16912 }, /* CLR */ +{ CPUFUNC(op_4218_11), 16920 }, /* CLR */ +{ CPUFUNC(op_4220_11), 16928 }, /* CLR */ +{ CPUFUNC(op_4228_11), 16936 }, /* CLR */ +{ CPUFUNC(op_4230_11), 16944 }, /* CLR */ +{ CPUFUNC(op_4238_11), 16952 }, /* CLR */ +{ CPUFUNC(op_4239_11), 16953 }, /* CLR */ +{ CPUFUNC(op_4240_11), 16960 }, /* CLR */ +{ CPUFUNC(op_4250_11), 16976 }, /* CLR */ +{ CPUFUNC(op_4258_11), 16984 }, /* CLR */ +{ CPUFUNC(op_4260_11), 16992 }, /* CLR */ +{ CPUFUNC(op_4268_11), 17000 }, /* CLR */ +{ CPUFUNC(op_4270_11), 17008 }, /* CLR */ +{ CPUFUNC(op_4278_11), 17016 }, /* CLR */ +{ CPUFUNC(op_4279_11), 17017 }, /* CLR */ +{ CPUFUNC(op_4280_11), 17024 }, /* CLR */ +{ CPUFUNC(op_4290_11), 17040 }, /* CLR */ +{ CPUFUNC(op_4298_11), 17048 }, /* CLR */ +{ CPUFUNC(op_42a0_11), 17056 }, /* CLR */ +{ CPUFUNC(op_42a8_11), 17064 }, /* CLR */ +{ CPUFUNC(op_42b0_11), 17072 }, /* CLR */ +{ CPUFUNC(op_42b8_11), 17080 }, /* CLR */ +{ CPUFUNC(op_42b9_11), 17081 }, /* CLR */ +{ CPUFUNC(op_4400_11), 17408 }, /* NEG */ +{ CPUFUNC(op_4410_11), 17424 }, /* NEG */ +{ CPUFUNC(op_4418_11), 17432 }, /* NEG */ +{ CPUFUNC(op_4420_11), 17440 }, /* NEG */ +{ CPUFUNC(op_4428_11), 17448 }, /* NEG */ +{ CPUFUNC(op_4430_11), 17456 }, /* NEG */ +{ CPUFUNC(op_4438_11), 17464 }, /* NEG */ +{ CPUFUNC(op_4439_11), 17465 }, /* NEG */ +{ CPUFUNC(op_4440_11), 17472 }, /* NEG */ +{ CPUFUNC(op_4450_11), 17488 }, /* NEG */ +{ CPUFUNC(op_4458_11), 17496 }, /* NEG */ +{ CPUFUNC(op_4460_11), 17504 }, /* NEG */ +{ CPUFUNC(op_4468_11), 17512 }, /* NEG */ +{ CPUFUNC(op_4470_11), 17520 }, /* NEG */ +{ CPUFUNC(op_4478_11), 17528 }, /* NEG */ +{ CPUFUNC(op_4479_11), 17529 }, /* NEG */ +{ CPUFUNC(op_4480_11), 17536 }, /* NEG */ +{ CPUFUNC(op_4490_11), 17552 }, /* NEG */ +{ CPUFUNC(op_4498_11), 17560 }, /* NEG */ +{ CPUFUNC(op_44a0_11), 17568 }, /* NEG */ +{ CPUFUNC(op_44a8_11), 17576 }, /* NEG */ +{ CPUFUNC(op_44b0_11), 17584 }, /* NEG */ +{ CPUFUNC(op_44b8_11), 17592 }, /* NEG */ +{ CPUFUNC(op_44b9_11), 17593 }, /* NEG */ +{ CPUFUNC(op_44c0_11), 17600 }, /* MV2SR */ +{ CPUFUNC(op_44d0_11), 17616 }, /* MV2SR */ +{ CPUFUNC(op_44d8_11), 17624 }, /* MV2SR */ +{ CPUFUNC(op_44e0_11), 17632 }, /* MV2SR */ +{ CPUFUNC(op_44e8_11), 17640 }, /* MV2SR */ +{ CPUFUNC(op_44f0_11), 17648 }, /* MV2SR */ +{ CPUFUNC(op_44f8_11), 17656 }, /* MV2SR */ +{ CPUFUNC(op_44f9_11), 17657 }, /* MV2SR */ +{ CPUFUNC(op_44fa_11), 17658 }, /* MV2SR */ +{ CPUFUNC(op_44fb_11), 17659 }, /* MV2SR */ +{ CPUFUNC(op_44fc_11), 17660 }, /* MV2SR */ +{ CPUFUNC(op_4600_11), 17920 }, /* NOT */ +{ CPUFUNC(op_4610_11), 17936 }, /* NOT */ +{ CPUFUNC(op_4618_11), 17944 }, /* NOT */ +{ CPUFUNC(op_4620_11), 17952 }, /* NOT */ +{ CPUFUNC(op_4628_11), 17960 }, /* NOT */ +{ CPUFUNC(op_4630_11), 17968 }, /* NOT */ +{ CPUFUNC(op_4638_11), 17976 }, /* NOT */ +{ CPUFUNC(op_4639_11), 17977 }, /* NOT */ +{ CPUFUNC(op_4640_11), 17984 }, /* NOT */ +{ CPUFUNC(op_4650_11), 18000 }, /* NOT */ +{ CPUFUNC(op_4658_11), 18008 }, /* NOT */ +{ CPUFUNC(op_4660_11), 18016 }, /* NOT */ +{ CPUFUNC(op_4668_11), 18024 }, /* NOT */ +{ CPUFUNC(op_4670_11), 18032 }, /* NOT */ +{ CPUFUNC(op_4678_11), 18040 }, /* NOT */ +{ CPUFUNC(op_4679_11), 18041 }, /* NOT */ +{ CPUFUNC(op_4680_11), 18048 }, /* NOT */ +{ CPUFUNC(op_4690_11), 18064 }, /* NOT */ +{ CPUFUNC(op_4698_11), 18072 }, /* NOT */ +{ CPUFUNC(op_46a0_11), 18080 }, /* NOT */ +{ CPUFUNC(op_46a8_11), 18088 }, /* NOT */ +{ CPUFUNC(op_46b0_11), 18096 }, /* NOT */ +{ CPUFUNC(op_46b8_11), 18104 }, /* NOT */ +{ CPUFUNC(op_46b9_11), 18105 }, /* NOT */ +{ CPUFUNC(op_46c0_11), 18112 }, /* MV2SR */ +{ CPUFUNC(op_46d0_11), 18128 }, /* MV2SR */ +{ CPUFUNC(op_46d8_11), 18136 }, /* MV2SR */ +{ CPUFUNC(op_46e0_11), 18144 }, /* MV2SR */ +{ CPUFUNC(op_46e8_11), 18152 }, /* MV2SR */ +{ CPUFUNC(op_46f0_11), 18160 }, /* MV2SR */ +{ CPUFUNC(op_46f8_11), 18168 }, /* MV2SR */ +{ CPUFUNC(op_46f9_11), 18169 }, /* MV2SR */ +{ CPUFUNC(op_46fa_11), 18170 }, /* MV2SR */ +{ CPUFUNC(op_46fb_11), 18171 }, /* MV2SR */ +{ CPUFUNC(op_46fc_11), 18172 }, /* MV2SR */ +{ CPUFUNC(op_4800_11), 18432 }, /* NBCD */ +{ CPUFUNC(op_4810_11), 18448 }, /* NBCD */ +{ CPUFUNC(op_4818_11), 18456 }, /* NBCD */ +{ CPUFUNC(op_4820_11), 18464 }, /* NBCD */ +{ CPUFUNC(op_4828_11), 18472 }, /* NBCD */ +{ CPUFUNC(op_4830_11), 18480 }, /* NBCD */ +{ CPUFUNC(op_4838_11), 18488 }, /* NBCD */ +{ CPUFUNC(op_4839_11), 18489 }, /* NBCD */ +{ CPUFUNC(op_4840_11), 18496 }, /* SWAP */ +{ CPUFUNC(op_4850_11), 18512 }, /* PEA */ +{ CPUFUNC(op_4868_11), 18536 }, /* PEA */ +{ CPUFUNC(op_4870_11), 18544 }, /* PEA */ +{ CPUFUNC(op_4878_11), 18552 }, /* PEA */ +{ CPUFUNC(op_4879_11), 18553 }, /* PEA */ +{ CPUFUNC(op_487a_11), 18554 }, /* PEA */ +{ CPUFUNC(op_487b_11), 18555 }, /* PEA */ +{ CPUFUNC(op_4880_11), 18560 }, /* EXT */ +{ CPUFUNC(op_4890_11), 18576 }, /* MVMLE */ +{ CPUFUNC(op_48a0_11), 18592 }, /* MVMLE */ +{ CPUFUNC(op_48a8_11), 18600 }, /* MVMLE */ +{ CPUFUNC(op_48b0_11), 18608 }, /* MVMLE */ +{ CPUFUNC(op_48b8_11), 18616 }, /* MVMLE */ +{ CPUFUNC(op_48b9_11), 18617 }, /* MVMLE */ +{ CPUFUNC(op_48c0_11), 18624 }, /* EXT */ +{ CPUFUNC(op_48d0_11), 18640 }, /* MVMLE */ +{ CPUFUNC(op_48e0_11), 18656 }, /* MVMLE */ +{ CPUFUNC(op_48e8_11), 18664 }, /* MVMLE */ +{ CPUFUNC(op_48f0_11), 18672 }, /* MVMLE */ +{ CPUFUNC(op_48f8_11), 18680 }, /* MVMLE */ +{ CPUFUNC(op_48f9_11), 18681 }, /* MVMLE */ +{ CPUFUNC(op_49c0_11), 18880 }, /* EXT */ +{ CPUFUNC(op_4a00_11), 18944 }, /* TST */ +{ CPUFUNC(op_4a10_11), 18960 }, /* TST */ +{ CPUFUNC(op_4a18_11), 18968 }, /* TST */ +{ CPUFUNC(op_4a20_11), 18976 }, /* TST */ +{ CPUFUNC(op_4a28_11), 18984 }, /* TST */ +{ CPUFUNC(op_4a30_11), 18992 }, /* TST */ +{ CPUFUNC(op_4a38_11), 19000 }, /* TST */ +{ CPUFUNC(op_4a39_11), 19001 }, /* TST */ +{ CPUFUNC(op_4a40_11), 19008 }, /* TST */ +{ CPUFUNC(op_4a50_11), 19024 }, /* TST */ +{ CPUFUNC(op_4a58_11), 19032 }, /* TST */ +{ CPUFUNC(op_4a60_11), 19040 }, /* TST */ +{ CPUFUNC(op_4a68_11), 19048 }, /* TST */ +{ CPUFUNC(op_4a70_11), 19056 }, /* TST */ +{ CPUFUNC(op_4a78_11), 19064 }, /* TST */ +{ CPUFUNC(op_4a79_11), 19065 }, /* TST */ +{ CPUFUNC(op_4a80_11), 19072 }, /* TST */ +{ CPUFUNC(op_4a90_11), 19088 }, /* TST */ +{ CPUFUNC(op_4a98_11), 19096 }, /* TST */ +{ CPUFUNC(op_4aa0_11), 19104 }, /* TST */ +{ CPUFUNC(op_4aa8_11), 19112 }, /* TST */ +{ CPUFUNC(op_4ab0_11), 19120 }, /* TST */ +{ CPUFUNC(op_4ab8_11), 19128 }, /* TST */ +{ CPUFUNC(op_4ab9_11), 19129 }, /* TST */ +{ CPUFUNC(op_4ac0_11), 19136 }, /* TAS */ +{ CPUFUNC(op_4ad0_11), 19152 }, /* TAS */ +{ CPUFUNC(op_4ad8_11), 19160 }, /* TAS */ +{ CPUFUNC(op_4ae0_11), 19168 }, /* TAS */ +{ CPUFUNC(op_4ae8_11), 19176 }, /* TAS */ +{ CPUFUNC(op_4af0_11), 19184 }, /* TAS */ +{ CPUFUNC(op_4af8_11), 19192 }, /* TAS */ +{ CPUFUNC(op_4af9_11), 19193 }, /* TAS */ +{ CPUFUNC(op_4c90_11), 19600 }, /* MVMEL */ +{ CPUFUNC(op_4c98_11), 19608 }, /* MVMEL */ +{ CPUFUNC(op_4ca8_11), 19624 }, /* MVMEL */ +{ CPUFUNC(op_4cb0_11), 19632 }, /* MVMEL */ +{ CPUFUNC(op_4cb8_11), 19640 }, /* MVMEL */ +{ CPUFUNC(op_4cb9_11), 19641 }, /* MVMEL */ +{ CPUFUNC(op_4cba_11), 19642 }, /* MVMEL */ +{ CPUFUNC(op_4cbb_11), 19643 }, /* MVMEL */ +{ CPUFUNC(op_4cd0_11), 19664 }, /* MVMEL */ +{ CPUFUNC(op_4cd8_11), 19672 }, /* MVMEL */ +{ CPUFUNC(op_4ce8_11), 19688 }, /* MVMEL */ +{ CPUFUNC(op_4cf0_11), 19696 }, /* MVMEL */ +{ CPUFUNC(op_4cf8_11), 19704 }, /* MVMEL */ +{ CPUFUNC(op_4cf9_11), 19705 }, /* MVMEL */ +{ CPUFUNC(op_4cfa_11), 19706 }, /* MVMEL */ +{ CPUFUNC(op_4cfb_11), 19707 }, /* MVMEL */ +{ CPUFUNC(op_4e40_11), 20032 }, /* TRAP */ +{ CPUFUNC(op_4e50_11), 20048 }, /* LINK */ +{ CPUFUNC(op_4e58_11), 20056 }, /* UNLK */ +{ CPUFUNC(op_4e60_11), 20064 }, /* MVR2USP */ +{ CPUFUNC(op_4e68_11), 20072 }, /* MVUSP2R */ +{ CPUFUNC(op_4e70_11), 20080 }, /* RESET */ +{ CPUFUNC(op_4e71_11), 20081 }, /* NOP */ +{ CPUFUNC(op_4e72_11), 20082 }, /* STOP */ +{ CPUFUNC(op_4e73_11), 20083 }, /* RTE */ +{ CPUFUNC(op_4e74_11), 20084 }, /* RTD */ +{ CPUFUNC(op_4e75_11), 20085 }, /* RTS */ +{ CPUFUNC(op_4e76_11), 20086 }, /* TRAPV */ +{ CPUFUNC(op_4e77_11), 20087 }, /* RTR */ +{ CPUFUNC(op_4e90_11), 20112 }, /* JSR */ +{ CPUFUNC(op_4ea8_11), 20136 }, /* JSR */ +{ CPUFUNC(op_4eb0_11), 20144 }, /* JSR */ +{ CPUFUNC(op_4eb8_11), 20152 }, /* JSR */ +{ CPUFUNC(op_4eb9_11), 20153 }, /* JSR */ +{ CPUFUNC(op_4eba_11), 20154 }, /* JSR */ +{ CPUFUNC(op_4ebb_11), 20155 }, /* JSR */ +{ CPUFUNC(op_4ed0_11), 20176 }, /* JMP */ +{ CPUFUNC(op_4ee8_11), 20200 }, /* JMP */ +{ CPUFUNC(op_4ef0_11), 20208 }, /* JMP */ +{ CPUFUNC(op_4ef8_11), 20216 }, /* JMP */ +{ CPUFUNC(op_4ef9_11), 20217 }, /* JMP */ +{ CPUFUNC(op_4efa_11), 20218 }, /* JMP */ +{ CPUFUNC(op_4efb_11), 20219 }, /* JMP */ +{ CPUFUNC(op_5000_11), 20480 }, /* ADD */ +{ CPUFUNC(op_5010_11), 20496 }, /* ADD */ +{ CPUFUNC(op_5018_11), 20504 }, /* ADD */ +{ CPUFUNC(op_5020_11), 20512 }, /* ADD */ +{ CPUFUNC(op_5028_11), 20520 }, /* ADD */ +{ CPUFUNC(op_5030_11), 20528 }, /* ADD */ +{ CPUFUNC(op_5038_11), 20536 }, /* ADD */ +{ CPUFUNC(op_5039_11), 20537 }, /* ADD */ +{ CPUFUNC(op_5040_11), 20544 }, /* ADD */ +{ CPUFUNC(op_5048_11), 20552 }, /* ADDA */ +{ CPUFUNC(op_5050_11), 20560 }, /* ADD */ +{ CPUFUNC(op_5058_11), 20568 }, /* ADD */ +{ CPUFUNC(op_5060_11), 20576 }, /* ADD */ +{ CPUFUNC(op_5068_11), 20584 }, /* ADD */ +{ CPUFUNC(op_5070_11), 20592 }, /* ADD */ +{ CPUFUNC(op_5078_11), 20600 }, /* ADD */ +{ CPUFUNC(op_5079_11), 20601 }, /* ADD */ +{ CPUFUNC(op_5080_11), 20608 }, /* ADD */ +{ CPUFUNC(op_5088_11), 20616 }, /* ADDA */ +{ CPUFUNC(op_5090_11), 20624 }, /* ADD */ +{ CPUFUNC(op_5098_11), 20632 }, /* ADD */ +{ CPUFUNC(op_50a0_11), 20640 }, /* ADD */ +{ CPUFUNC(op_50a8_11), 20648 }, /* ADD */ +{ CPUFUNC(op_50b0_11), 20656 }, /* ADD */ +{ CPUFUNC(op_50b8_11), 20664 }, /* ADD */ +{ CPUFUNC(op_50b9_11), 20665 }, /* ADD */ +{ CPUFUNC(op_50c0_11), 20672 }, /* Scc */ +{ CPUFUNC(op_50c8_11), 20680 }, /* DBcc */ +{ CPUFUNC(op_50d0_11), 20688 }, /* Scc */ +{ CPUFUNC(op_50d8_11), 20696 }, /* Scc */ +{ CPUFUNC(op_50e0_11), 20704 }, /* Scc */ +{ CPUFUNC(op_50e8_11), 20712 }, /* Scc */ +{ CPUFUNC(op_50f0_11), 20720 }, /* Scc */ +{ CPUFUNC(op_50f8_11), 20728 }, /* Scc */ +{ CPUFUNC(op_50f9_11), 20729 }, /* Scc */ +{ CPUFUNC(op_5100_11), 20736 }, /* SUB */ +{ CPUFUNC(op_5110_11), 20752 }, /* SUB */ +{ CPUFUNC(op_5118_11), 20760 }, /* SUB */ +{ CPUFUNC(op_5120_11), 20768 }, /* SUB */ +{ CPUFUNC(op_5128_11), 20776 }, /* SUB */ +{ CPUFUNC(op_5130_11), 20784 }, /* SUB */ +{ CPUFUNC(op_5138_11), 20792 }, /* SUB */ +{ CPUFUNC(op_5139_11), 20793 }, /* SUB */ +{ CPUFUNC(op_5140_11), 20800 }, /* SUB */ +{ CPUFUNC(op_5148_11), 20808 }, /* SUBA */ +{ CPUFUNC(op_5150_11), 20816 }, /* SUB */ +{ CPUFUNC(op_5158_11), 20824 }, /* SUB */ +{ CPUFUNC(op_5160_11), 20832 }, /* SUB */ +{ CPUFUNC(op_5168_11), 20840 }, /* SUB */ +{ CPUFUNC(op_5170_11), 20848 }, /* SUB */ +{ CPUFUNC(op_5178_11), 20856 }, /* SUB */ +{ CPUFUNC(op_5179_11), 20857 }, /* SUB */ +{ CPUFUNC(op_5180_11), 20864 }, /* SUB */ +{ CPUFUNC(op_5188_11), 20872 }, /* SUBA */ +{ CPUFUNC(op_5190_11), 20880 }, /* SUB */ +{ CPUFUNC(op_5198_11), 20888 }, /* SUB */ +{ CPUFUNC(op_51a0_11), 20896 }, /* SUB */ +{ CPUFUNC(op_51a8_11), 20904 }, /* SUB */ +{ CPUFUNC(op_51b0_11), 20912 }, /* SUB */ +{ CPUFUNC(op_51b8_11), 20920 }, /* SUB */ +{ CPUFUNC(op_51b9_11), 20921 }, /* SUB */ +{ CPUFUNC(op_51c0_11), 20928 }, /* Scc */ +{ CPUFUNC(op_51c8_11), 20936 }, /* DBcc */ +{ CPUFUNC(op_51d0_11), 20944 }, /* Scc */ +{ CPUFUNC(op_51d8_11), 20952 }, /* Scc */ +{ CPUFUNC(op_51e0_11), 20960 }, /* Scc */ +{ CPUFUNC(op_51e8_11), 20968 }, /* Scc */ +{ CPUFUNC(op_51f0_11), 20976 }, /* Scc */ +{ CPUFUNC(op_51f8_11), 20984 }, /* Scc */ +{ CPUFUNC(op_51f9_11), 20985 }, /* Scc */ +{ CPUFUNC(op_52c0_11), 21184 }, /* Scc */ +{ CPUFUNC(op_52c8_11), 21192 }, /* DBcc */ +{ CPUFUNC(op_52d0_11), 21200 }, /* Scc */ +{ CPUFUNC(op_52d8_11), 21208 }, /* Scc */ +{ CPUFUNC(op_52e0_11), 21216 }, /* Scc */ +{ CPUFUNC(op_52e8_11), 21224 }, /* Scc */ +{ CPUFUNC(op_52f0_11), 21232 }, /* Scc */ +{ CPUFUNC(op_52f8_11), 21240 }, /* Scc */ +{ CPUFUNC(op_52f9_11), 21241 }, /* Scc */ +{ CPUFUNC(op_53c0_11), 21440 }, /* Scc */ +{ CPUFUNC(op_53c8_11), 21448 }, /* DBcc */ +{ CPUFUNC(op_53d0_11), 21456 }, /* Scc */ +{ CPUFUNC(op_53d8_11), 21464 }, /* Scc */ +{ CPUFUNC(op_53e0_11), 21472 }, /* Scc */ +{ CPUFUNC(op_53e8_11), 21480 }, /* Scc */ +{ CPUFUNC(op_53f0_11), 21488 }, /* Scc */ +{ CPUFUNC(op_53f8_11), 21496 }, /* Scc */ +{ CPUFUNC(op_53f9_11), 21497 }, /* Scc */ +{ CPUFUNC(op_54c0_11), 21696 }, /* Scc */ +{ CPUFUNC(op_54c8_11), 21704 }, /* DBcc */ +{ CPUFUNC(op_54d0_11), 21712 }, /* Scc */ +{ CPUFUNC(op_54d8_11), 21720 }, /* Scc */ +{ CPUFUNC(op_54e0_11), 21728 }, /* Scc */ +{ CPUFUNC(op_54e8_11), 21736 }, /* Scc */ +{ CPUFUNC(op_54f0_11), 21744 }, /* Scc */ +{ CPUFUNC(op_54f8_11), 21752 }, /* Scc */ +{ CPUFUNC(op_54f9_11), 21753 }, /* Scc */ +{ CPUFUNC(op_55c0_11), 21952 }, /* Scc */ +{ CPUFUNC(op_55c8_11), 21960 }, /* DBcc */ +{ CPUFUNC(op_55d0_11), 21968 }, /* Scc */ +{ CPUFUNC(op_55d8_11), 21976 }, /* Scc */ +{ CPUFUNC(op_55e0_11), 21984 }, /* Scc */ +{ CPUFUNC(op_55e8_11), 21992 }, /* Scc */ +{ CPUFUNC(op_55f0_11), 22000 }, /* Scc */ +{ CPUFUNC(op_55f8_11), 22008 }, /* Scc */ +{ CPUFUNC(op_55f9_11), 22009 }, /* Scc */ +{ CPUFUNC(op_56c0_11), 22208 }, /* Scc */ +{ CPUFUNC(op_56c8_11), 22216 }, /* DBcc */ +{ CPUFUNC(op_56d0_11), 22224 }, /* Scc */ +{ CPUFUNC(op_56d8_11), 22232 }, /* Scc */ +{ CPUFUNC(op_56e0_11), 22240 }, /* Scc */ +{ CPUFUNC(op_56e8_11), 22248 }, /* Scc */ +{ CPUFUNC(op_56f0_11), 22256 }, /* Scc */ +{ CPUFUNC(op_56f8_11), 22264 }, /* Scc */ +{ CPUFUNC(op_56f9_11), 22265 }, /* Scc */ +{ CPUFUNC(op_57c0_11), 22464 }, /* Scc */ +{ CPUFUNC(op_57c8_11), 22472 }, /* DBcc */ +{ CPUFUNC(op_57d0_11), 22480 }, /* Scc */ +{ CPUFUNC(op_57d8_11), 22488 }, /* Scc */ +{ CPUFUNC(op_57e0_11), 22496 }, /* Scc */ +{ CPUFUNC(op_57e8_11), 22504 }, /* Scc */ +{ CPUFUNC(op_57f0_11), 22512 }, /* Scc */ +{ CPUFUNC(op_57f8_11), 22520 }, /* Scc */ +{ CPUFUNC(op_57f9_11), 22521 }, /* Scc */ +{ CPUFUNC(op_58c0_11), 22720 }, /* Scc */ +{ CPUFUNC(op_58c8_11), 22728 }, /* DBcc */ +{ CPUFUNC(op_58d0_11), 22736 }, /* Scc */ +{ CPUFUNC(op_58d8_11), 22744 }, /* Scc */ +{ CPUFUNC(op_58e0_11), 22752 }, /* Scc */ +{ CPUFUNC(op_58e8_11), 22760 }, /* Scc */ +{ CPUFUNC(op_58f0_11), 22768 }, /* Scc */ +{ CPUFUNC(op_58f8_11), 22776 }, /* Scc */ +{ CPUFUNC(op_58f9_11), 22777 }, /* Scc */ +{ CPUFUNC(op_59c0_11), 22976 }, /* Scc */ +{ CPUFUNC(op_59c8_11), 22984 }, /* DBcc */ +{ CPUFUNC(op_59d0_11), 22992 }, /* Scc */ +{ CPUFUNC(op_59d8_11), 23000 }, /* Scc */ +{ CPUFUNC(op_59e0_11), 23008 }, /* Scc */ +{ CPUFUNC(op_59e8_11), 23016 }, /* Scc */ +{ CPUFUNC(op_59f0_11), 23024 }, /* Scc */ +{ CPUFUNC(op_59f8_11), 23032 }, /* Scc */ +{ CPUFUNC(op_59f9_11), 23033 }, /* Scc */ +{ CPUFUNC(op_5ac0_11), 23232 }, /* Scc */ +{ CPUFUNC(op_5ac8_11), 23240 }, /* DBcc */ +{ CPUFUNC(op_5ad0_11), 23248 }, /* Scc */ +{ CPUFUNC(op_5ad8_11), 23256 }, /* Scc */ +{ CPUFUNC(op_5ae0_11), 23264 }, /* Scc */ +{ CPUFUNC(op_5ae8_11), 23272 }, /* Scc */ +{ CPUFUNC(op_5af0_11), 23280 }, /* Scc */ +{ CPUFUNC(op_5af8_11), 23288 }, /* Scc */ +{ CPUFUNC(op_5af9_11), 23289 }, /* Scc */ +{ CPUFUNC(op_5bc0_11), 23488 }, /* Scc */ +{ CPUFUNC(op_5bc8_11), 23496 }, /* DBcc */ +{ CPUFUNC(op_5bd0_11), 23504 }, /* Scc */ +{ CPUFUNC(op_5bd8_11), 23512 }, /* Scc */ +{ CPUFUNC(op_5be0_11), 23520 }, /* Scc */ +{ CPUFUNC(op_5be8_11), 23528 }, /* Scc */ +{ CPUFUNC(op_5bf0_11), 23536 }, /* Scc */ +{ CPUFUNC(op_5bf8_11), 23544 }, /* Scc */ +{ CPUFUNC(op_5bf9_11), 23545 }, /* Scc */ +{ CPUFUNC(op_5cc0_11), 23744 }, /* Scc */ +{ CPUFUNC(op_5cc8_11), 23752 }, /* DBcc */ +{ CPUFUNC(op_5cd0_11), 23760 }, /* Scc */ +{ CPUFUNC(op_5cd8_11), 23768 }, /* Scc */ +{ CPUFUNC(op_5ce0_11), 23776 }, /* Scc */ +{ CPUFUNC(op_5ce8_11), 23784 }, /* Scc */ +{ CPUFUNC(op_5cf0_11), 23792 }, /* Scc */ +{ CPUFUNC(op_5cf8_11), 23800 }, /* Scc */ +{ CPUFUNC(op_5cf9_11), 23801 }, /* Scc */ +{ CPUFUNC(op_5dc0_11), 24000 }, /* Scc */ +{ CPUFUNC(op_5dc8_11), 24008 }, /* DBcc */ +{ CPUFUNC(op_5dd0_11), 24016 }, /* Scc */ +{ CPUFUNC(op_5dd8_11), 24024 }, /* Scc */ +{ CPUFUNC(op_5de0_11), 24032 }, /* Scc */ +{ CPUFUNC(op_5de8_11), 24040 }, /* Scc */ +{ CPUFUNC(op_5df0_11), 24048 }, /* Scc */ +{ CPUFUNC(op_5df8_11), 24056 }, /* Scc */ +{ CPUFUNC(op_5df9_11), 24057 }, /* Scc */ +{ CPUFUNC(op_5ec0_11), 24256 }, /* Scc */ +{ CPUFUNC(op_5ec8_11), 24264 }, /* DBcc */ +{ CPUFUNC(op_5ed0_11), 24272 }, /* Scc */ +{ CPUFUNC(op_5ed8_11), 24280 }, /* Scc */ +{ CPUFUNC(op_5ee0_11), 24288 }, /* Scc */ +{ CPUFUNC(op_5ee8_11), 24296 }, /* Scc */ +{ CPUFUNC(op_5ef0_11), 24304 }, /* Scc */ +{ CPUFUNC(op_5ef8_11), 24312 }, /* Scc */ +{ CPUFUNC(op_5ef9_11), 24313 }, /* Scc */ +{ CPUFUNC(op_5fc0_11), 24512 }, /* Scc */ +{ CPUFUNC(op_5fc8_11), 24520 }, /* DBcc */ +{ CPUFUNC(op_5fd0_11), 24528 }, /* Scc */ +{ CPUFUNC(op_5fd8_11), 24536 }, /* Scc */ +{ CPUFUNC(op_5fe0_11), 24544 }, /* Scc */ +{ CPUFUNC(op_5fe8_11), 24552 }, /* Scc */ +{ CPUFUNC(op_5ff0_11), 24560 }, /* Scc */ +{ CPUFUNC(op_5ff8_11), 24568 }, /* Scc */ +{ CPUFUNC(op_5ff9_11), 24569 }, /* Scc */ +{ CPUFUNC(op_6000_11), 24576 }, /* Bcc */ +{ CPUFUNC(op_6001_11), 24577 }, /* Bcc */ +{ CPUFUNC(op_60ff_11), 24831 }, /* Bcc */ +{ CPUFUNC(op_6100_11), 24832 }, /* BSR */ +{ CPUFUNC(op_6101_11), 24833 }, /* BSR */ +{ CPUFUNC(op_61ff_11), 25087 }, /* BSR */ +{ CPUFUNC(op_6200_11), 25088 }, /* Bcc */ +{ CPUFUNC(op_6201_11), 25089 }, /* Bcc */ +{ CPUFUNC(op_62ff_11), 25343 }, /* Bcc */ +{ CPUFUNC(op_6300_11), 25344 }, /* Bcc */ +{ CPUFUNC(op_6301_11), 25345 }, /* Bcc */ +{ CPUFUNC(op_63ff_11), 25599 }, /* Bcc */ +{ CPUFUNC(op_6400_11), 25600 }, /* Bcc */ +{ CPUFUNC(op_6401_11), 25601 }, /* Bcc */ +{ CPUFUNC(op_64ff_11), 25855 }, /* Bcc */ +{ CPUFUNC(op_6500_11), 25856 }, /* Bcc */ +{ CPUFUNC(op_6501_11), 25857 }, /* Bcc */ +{ CPUFUNC(op_65ff_11), 26111 }, /* Bcc */ +{ CPUFUNC(op_6600_11), 26112 }, /* Bcc */ +{ CPUFUNC(op_6601_11), 26113 }, /* Bcc */ +{ CPUFUNC(op_66ff_11), 26367 }, /* Bcc */ +{ CPUFUNC(op_6700_11), 26368 }, /* Bcc */ +{ CPUFUNC(op_6701_11), 26369 }, /* Bcc */ +{ CPUFUNC(op_67ff_11), 26623 }, /* Bcc */ +{ CPUFUNC(op_6800_11), 26624 }, /* Bcc */ +{ CPUFUNC(op_6801_11), 26625 }, /* Bcc */ +{ CPUFUNC(op_68ff_11), 26879 }, /* Bcc */ +{ CPUFUNC(op_6900_11), 26880 }, /* Bcc */ +{ CPUFUNC(op_6901_11), 26881 }, /* Bcc */ +{ CPUFUNC(op_69ff_11), 27135 }, /* Bcc */ +{ CPUFUNC(op_6a00_11), 27136 }, /* Bcc */ +{ CPUFUNC(op_6a01_11), 27137 }, /* Bcc */ +{ CPUFUNC(op_6aff_11), 27391 }, /* Bcc */ +{ CPUFUNC(op_6b00_11), 27392 }, /* Bcc */ +{ CPUFUNC(op_6b01_11), 27393 }, /* Bcc */ +{ CPUFUNC(op_6bff_11), 27647 }, /* Bcc */ +{ CPUFUNC(op_6c00_11), 27648 }, /* Bcc */ +{ CPUFUNC(op_6c01_11), 27649 }, /* Bcc */ +{ CPUFUNC(op_6cff_11), 27903 }, /* Bcc */ +{ CPUFUNC(op_6d00_11), 27904 }, /* Bcc */ +{ CPUFUNC(op_6d01_11), 27905 }, /* Bcc */ +{ CPUFUNC(op_6dff_11), 28159 }, /* Bcc */ +{ CPUFUNC(op_6e00_11), 28160 }, /* Bcc */ +{ CPUFUNC(op_6e01_11), 28161 }, /* Bcc */ +{ CPUFUNC(op_6eff_11), 28415 }, /* Bcc */ +{ CPUFUNC(op_6f00_11), 28416 }, /* Bcc */ +{ CPUFUNC(op_6f01_11), 28417 }, /* Bcc */ +{ CPUFUNC(op_6fff_11), 28671 }, /* Bcc */ +{ CPUFUNC(op_7000_11), 28672 }, /* MOVE */ +{ CPUFUNC(op_8000_11), 32768 }, /* OR */ +{ CPUFUNC(op_8010_11), 32784 }, /* OR */ +{ CPUFUNC(op_8018_11), 32792 }, /* OR */ +{ CPUFUNC(op_8020_11), 32800 }, /* OR */ +{ CPUFUNC(op_8028_11), 32808 }, /* OR */ +{ CPUFUNC(op_8030_11), 32816 }, /* OR */ +{ CPUFUNC(op_8038_11), 32824 }, /* OR */ +{ CPUFUNC(op_8039_11), 32825 }, /* OR */ +{ CPUFUNC(op_803a_11), 32826 }, /* OR */ +{ CPUFUNC(op_803b_11), 32827 }, /* OR */ +{ CPUFUNC(op_803c_11), 32828 }, /* OR */ +{ CPUFUNC(op_8040_11), 32832 }, /* OR */ +{ CPUFUNC(op_8050_11), 32848 }, /* OR */ +{ CPUFUNC(op_8058_11), 32856 }, /* OR */ +{ CPUFUNC(op_8060_11), 32864 }, /* OR */ +{ CPUFUNC(op_8068_11), 32872 }, /* OR */ +{ CPUFUNC(op_8070_11), 32880 }, /* OR */ +{ CPUFUNC(op_8078_11), 32888 }, /* OR */ +{ CPUFUNC(op_8079_11), 32889 }, /* OR */ +{ CPUFUNC(op_807a_11), 32890 }, /* OR */ +{ CPUFUNC(op_807b_11), 32891 }, /* OR */ +{ CPUFUNC(op_807c_11), 32892 }, /* OR */ +{ CPUFUNC(op_8080_11), 32896 }, /* OR */ +{ CPUFUNC(op_8090_11), 32912 }, /* OR */ +{ CPUFUNC(op_8098_11), 32920 }, /* OR */ +{ CPUFUNC(op_80a0_11), 32928 }, /* OR */ +{ CPUFUNC(op_80a8_11), 32936 }, /* OR */ +{ CPUFUNC(op_80b0_11), 32944 }, /* OR */ +{ CPUFUNC(op_80b8_11), 32952 }, /* OR */ +{ CPUFUNC(op_80b9_11), 32953 }, /* OR */ +{ CPUFUNC(op_80ba_11), 32954 }, /* OR */ +{ CPUFUNC(op_80bb_11), 32955 }, /* OR */ +{ CPUFUNC(op_80bc_11), 32956 }, /* OR */ +{ CPUFUNC(op_80c0_11), 32960 }, /* DIVU */ +{ CPUFUNC(op_80d0_11), 32976 }, /* DIVU */ +{ CPUFUNC(op_80d8_11), 32984 }, /* DIVU */ +{ CPUFUNC(op_80e0_11), 32992 }, /* DIVU */ +{ CPUFUNC(op_80e8_11), 33000 }, /* DIVU */ +{ CPUFUNC(op_80f0_11), 33008 }, /* DIVU */ +{ CPUFUNC(op_80f8_11), 33016 }, /* DIVU */ +{ CPUFUNC(op_80f9_11), 33017 }, /* DIVU */ +{ CPUFUNC(op_80fa_11), 33018 }, /* DIVU */ +{ CPUFUNC(op_80fb_11), 33019 }, /* DIVU */ +{ CPUFUNC(op_80fc_11), 33020 }, /* DIVU */ +{ CPUFUNC(op_8100_11), 33024 }, /* SBCD */ +{ CPUFUNC(op_8108_11), 33032 }, /* SBCD */ +{ CPUFUNC(op_8110_11), 33040 }, /* OR */ +{ CPUFUNC(op_8118_11), 33048 }, /* OR */ +{ CPUFUNC(op_8120_11), 33056 }, /* OR */ +{ CPUFUNC(op_8128_11), 33064 }, /* OR */ +{ CPUFUNC(op_8130_11), 33072 }, /* OR */ +{ CPUFUNC(op_8138_11), 33080 }, /* OR */ +{ CPUFUNC(op_8139_11), 33081 }, /* OR */ +{ CPUFUNC(op_8150_11), 33104 }, /* OR */ +{ CPUFUNC(op_8158_11), 33112 }, /* OR */ +{ CPUFUNC(op_8160_11), 33120 }, /* OR */ +{ CPUFUNC(op_8168_11), 33128 }, /* OR */ +{ CPUFUNC(op_8170_11), 33136 }, /* OR */ +{ CPUFUNC(op_8178_11), 33144 }, /* OR */ +{ CPUFUNC(op_8179_11), 33145 }, /* OR */ +{ CPUFUNC(op_8190_11), 33168 }, /* OR */ +{ CPUFUNC(op_8198_11), 33176 }, /* OR */ +{ CPUFUNC(op_81a0_11), 33184 }, /* OR */ +{ CPUFUNC(op_81a8_11), 33192 }, /* OR */ +{ CPUFUNC(op_81b0_11), 33200 }, /* OR */ +{ CPUFUNC(op_81b8_11), 33208 }, /* OR */ +{ CPUFUNC(op_81b9_11), 33209 }, /* OR */ +{ CPUFUNC(op_81c0_11), 33216 }, /* DIVS */ +{ CPUFUNC(op_81d0_11), 33232 }, /* DIVS */ +{ CPUFUNC(op_81d8_11), 33240 }, /* DIVS */ +{ CPUFUNC(op_81e0_11), 33248 }, /* DIVS */ +{ CPUFUNC(op_81e8_11), 33256 }, /* DIVS */ +{ CPUFUNC(op_81f0_11), 33264 }, /* DIVS */ +{ CPUFUNC(op_81f8_11), 33272 }, /* DIVS */ +{ CPUFUNC(op_81f9_11), 33273 }, /* DIVS */ +{ CPUFUNC(op_81fa_11), 33274 }, /* DIVS */ +{ CPUFUNC(op_81fb_11), 33275 }, /* DIVS */ +{ CPUFUNC(op_81fc_11), 33276 }, /* DIVS */ +{ CPUFUNC(op_9000_11), 36864 }, /* SUB */ +{ CPUFUNC(op_9010_11), 36880 }, /* SUB */ +{ CPUFUNC(op_9018_11), 36888 }, /* SUB */ +{ CPUFUNC(op_9020_11), 36896 }, /* SUB */ +{ CPUFUNC(op_9028_11), 36904 }, /* SUB */ +{ CPUFUNC(op_9030_11), 36912 }, /* SUB */ +{ CPUFUNC(op_9038_11), 36920 }, /* SUB */ +{ CPUFUNC(op_9039_11), 36921 }, /* SUB */ +{ CPUFUNC(op_903a_11), 36922 }, /* SUB */ +{ CPUFUNC(op_903b_11), 36923 }, /* SUB */ +{ CPUFUNC(op_903c_11), 36924 }, /* SUB */ +{ CPUFUNC(op_9040_11), 36928 }, /* SUB */ +{ CPUFUNC(op_9048_11), 36936 }, /* SUB */ +{ CPUFUNC(op_9050_11), 36944 }, /* SUB */ +{ CPUFUNC(op_9058_11), 36952 }, /* SUB */ +{ CPUFUNC(op_9060_11), 36960 }, /* SUB */ +{ CPUFUNC(op_9068_11), 36968 }, /* SUB */ +{ CPUFUNC(op_9070_11), 36976 }, /* SUB */ +{ CPUFUNC(op_9078_11), 36984 }, /* SUB */ +{ CPUFUNC(op_9079_11), 36985 }, /* SUB */ +{ CPUFUNC(op_907a_11), 36986 }, /* SUB */ +{ CPUFUNC(op_907b_11), 36987 }, /* SUB */ +{ CPUFUNC(op_907c_11), 36988 }, /* SUB */ +{ CPUFUNC(op_9080_11), 36992 }, /* SUB */ +{ CPUFUNC(op_9088_11), 37000 }, /* SUB */ +{ CPUFUNC(op_9090_11), 37008 }, /* SUB */ +{ CPUFUNC(op_9098_11), 37016 }, /* SUB */ +{ CPUFUNC(op_90a0_11), 37024 }, /* SUB */ +{ CPUFUNC(op_90a8_11), 37032 }, /* SUB */ +{ CPUFUNC(op_90b0_11), 37040 }, /* SUB */ +{ CPUFUNC(op_90b8_11), 37048 }, /* SUB */ +{ CPUFUNC(op_90b9_11), 37049 }, /* SUB */ +{ CPUFUNC(op_90ba_11), 37050 }, /* SUB */ +{ CPUFUNC(op_90bb_11), 37051 }, /* SUB */ +{ CPUFUNC(op_90bc_11), 37052 }, /* SUB */ +{ CPUFUNC(op_90c0_11), 37056 }, /* SUBA */ +{ CPUFUNC(op_90c8_11), 37064 }, /* SUBA */ +{ CPUFUNC(op_90d0_11), 37072 }, /* SUBA */ +{ CPUFUNC(op_90d8_11), 37080 }, /* SUBA */ +{ CPUFUNC(op_90e0_11), 37088 }, /* SUBA */ +{ CPUFUNC(op_90e8_11), 37096 }, /* SUBA */ +{ CPUFUNC(op_90f0_11), 37104 }, /* SUBA */ +{ CPUFUNC(op_90f8_11), 37112 }, /* SUBA */ +{ CPUFUNC(op_90f9_11), 37113 }, /* SUBA */ +{ CPUFUNC(op_90fa_11), 37114 }, /* SUBA */ +{ CPUFUNC(op_90fb_11), 37115 }, /* SUBA */ +{ CPUFUNC(op_90fc_11), 37116 }, /* SUBA */ +{ CPUFUNC(op_9100_11), 37120 }, /* SUBX */ +{ CPUFUNC(op_9108_11), 37128 }, /* SUBX */ +{ CPUFUNC(op_9110_11), 37136 }, /* SUB */ +{ CPUFUNC(op_9118_11), 37144 }, /* SUB */ +{ CPUFUNC(op_9120_11), 37152 }, /* SUB */ +{ CPUFUNC(op_9128_11), 37160 }, /* SUB */ +{ CPUFUNC(op_9130_11), 37168 }, /* SUB */ +{ CPUFUNC(op_9138_11), 37176 }, /* SUB */ +{ CPUFUNC(op_9139_11), 37177 }, /* SUB */ +{ CPUFUNC(op_9140_11), 37184 }, /* SUBX */ +{ CPUFUNC(op_9148_11), 37192 }, /* SUBX */ +{ CPUFUNC(op_9150_11), 37200 }, /* SUB */ +{ CPUFUNC(op_9158_11), 37208 }, /* SUB */ +{ CPUFUNC(op_9160_11), 37216 }, /* SUB */ +{ CPUFUNC(op_9168_11), 37224 }, /* SUB */ +{ CPUFUNC(op_9170_11), 37232 }, /* SUB */ +{ CPUFUNC(op_9178_11), 37240 }, /* SUB */ +{ CPUFUNC(op_9179_11), 37241 }, /* SUB */ +{ CPUFUNC(op_9180_11), 37248 }, /* SUBX */ +{ CPUFUNC(op_9188_11), 37256 }, /* SUBX */ +{ CPUFUNC(op_9190_11), 37264 }, /* SUB */ +{ CPUFUNC(op_9198_11), 37272 }, /* SUB */ +{ CPUFUNC(op_91a0_11), 37280 }, /* SUB */ +{ CPUFUNC(op_91a8_11), 37288 }, /* SUB */ +{ CPUFUNC(op_91b0_11), 37296 }, /* SUB */ +{ CPUFUNC(op_91b8_11), 37304 }, /* SUB */ +{ CPUFUNC(op_91b9_11), 37305 }, /* SUB */ +{ CPUFUNC(op_91c0_11), 37312 }, /* SUBA */ +{ CPUFUNC(op_91c8_11), 37320 }, /* SUBA */ +{ CPUFUNC(op_91d0_11), 37328 }, /* SUBA */ +{ CPUFUNC(op_91d8_11), 37336 }, /* SUBA */ +{ CPUFUNC(op_91e0_11), 37344 }, /* SUBA */ +{ CPUFUNC(op_91e8_11), 37352 }, /* SUBA */ +{ CPUFUNC(op_91f0_11), 37360 }, /* SUBA */ +{ CPUFUNC(op_91f8_11), 37368 }, /* SUBA */ +{ CPUFUNC(op_91f9_11), 37369 }, /* SUBA */ +{ CPUFUNC(op_91fa_11), 37370 }, /* SUBA */ +{ CPUFUNC(op_91fb_11), 37371 }, /* SUBA */ +{ CPUFUNC(op_91fc_11), 37372 }, /* SUBA */ +{ CPUFUNC(op_b000_11), 45056 }, /* CMP */ +{ CPUFUNC(op_b010_11), 45072 }, /* CMP */ +{ CPUFUNC(op_b018_11), 45080 }, /* CMP */ +{ CPUFUNC(op_b020_11), 45088 }, /* CMP */ +{ CPUFUNC(op_b028_11), 45096 }, /* CMP */ +{ CPUFUNC(op_b030_11), 45104 }, /* CMP */ +{ CPUFUNC(op_b038_11), 45112 }, /* CMP */ +{ CPUFUNC(op_b039_11), 45113 }, /* CMP */ +{ CPUFUNC(op_b03a_11), 45114 }, /* CMP */ +{ CPUFUNC(op_b03b_11), 45115 }, /* CMP */ +{ CPUFUNC(op_b03c_11), 45116 }, /* CMP */ +{ CPUFUNC(op_b040_11), 45120 }, /* CMP */ +{ CPUFUNC(op_b048_11), 45128 }, /* CMP */ +{ CPUFUNC(op_b050_11), 45136 }, /* CMP */ +{ CPUFUNC(op_b058_11), 45144 }, /* CMP */ +{ CPUFUNC(op_b060_11), 45152 }, /* CMP */ +{ CPUFUNC(op_b068_11), 45160 }, /* CMP */ +{ CPUFUNC(op_b070_11), 45168 }, /* CMP */ +{ CPUFUNC(op_b078_11), 45176 }, /* CMP */ +{ CPUFUNC(op_b079_11), 45177 }, /* CMP */ +{ CPUFUNC(op_b07a_11), 45178 }, /* CMP */ +{ CPUFUNC(op_b07b_11), 45179 }, /* CMP */ +{ CPUFUNC(op_b07c_11), 45180 }, /* CMP */ +{ CPUFUNC(op_b080_11), 45184 }, /* CMP */ +{ CPUFUNC(op_b088_11), 45192 }, /* CMP */ +{ CPUFUNC(op_b090_11), 45200 }, /* CMP */ +{ CPUFUNC(op_b098_11), 45208 }, /* CMP */ +{ CPUFUNC(op_b0a0_11), 45216 }, /* CMP */ +{ CPUFUNC(op_b0a8_11), 45224 }, /* CMP */ +{ CPUFUNC(op_b0b0_11), 45232 }, /* CMP */ +{ CPUFUNC(op_b0b8_11), 45240 }, /* CMP */ +{ CPUFUNC(op_b0b9_11), 45241 }, /* CMP */ +{ CPUFUNC(op_b0ba_11), 45242 }, /* CMP */ +{ CPUFUNC(op_b0bb_11), 45243 }, /* CMP */ +{ CPUFUNC(op_b0bc_11), 45244 }, /* CMP */ +{ CPUFUNC(op_b0c0_11), 45248 }, /* CMPA */ +{ CPUFUNC(op_b0c8_11), 45256 }, /* CMPA */ +{ CPUFUNC(op_b0d0_11), 45264 }, /* CMPA */ +{ CPUFUNC(op_b0d8_11), 45272 }, /* CMPA */ +{ CPUFUNC(op_b0e0_11), 45280 }, /* CMPA */ +{ CPUFUNC(op_b0e8_11), 45288 }, /* CMPA */ +{ CPUFUNC(op_b0f0_11), 45296 }, /* CMPA */ +{ CPUFUNC(op_b0f8_11), 45304 }, /* CMPA */ +{ CPUFUNC(op_b0f9_11), 45305 }, /* CMPA */ +{ CPUFUNC(op_b0fa_11), 45306 }, /* CMPA */ +{ CPUFUNC(op_b0fb_11), 45307 }, /* CMPA */ +{ CPUFUNC(op_b0fc_11), 45308 }, /* CMPA */ +{ CPUFUNC(op_b100_11), 45312 }, /* EOR */ +{ CPUFUNC(op_b108_11), 45320 }, /* CMPM */ +{ CPUFUNC(op_b110_11), 45328 }, /* EOR */ +{ CPUFUNC(op_b118_11), 45336 }, /* EOR */ +{ CPUFUNC(op_b120_11), 45344 }, /* EOR */ +{ CPUFUNC(op_b128_11), 45352 }, /* EOR */ +{ CPUFUNC(op_b130_11), 45360 }, /* EOR */ +{ CPUFUNC(op_b138_11), 45368 }, /* EOR */ +{ CPUFUNC(op_b139_11), 45369 }, /* EOR */ +{ CPUFUNC(op_b140_11), 45376 }, /* EOR */ +{ CPUFUNC(op_b148_11), 45384 }, /* CMPM */ +{ CPUFUNC(op_b150_11), 45392 }, /* EOR */ +{ CPUFUNC(op_b158_11), 45400 }, /* EOR */ +{ CPUFUNC(op_b160_11), 45408 }, /* EOR */ +{ CPUFUNC(op_b168_11), 45416 }, /* EOR */ +{ CPUFUNC(op_b170_11), 45424 }, /* EOR */ +{ CPUFUNC(op_b178_11), 45432 }, /* EOR */ +{ CPUFUNC(op_b179_11), 45433 }, /* EOR */ +{ CPUFUNC(op_b180_11), 45440 }, /* EOR */ +{ CPUFUNC(op_b188_11), 45448 }, /* CMPM */ +{ CPUFUNC(op_b190_11), 45456 }, /* EOR */ +{ CPUFUNC(op_b198_11), 45464 }, /* EOR */ +{ CPUFUNC(op_b1a0_11), 45472 }, /* EOR */ +{ CPUFUNC(op_b1a8_11), 45480 }, /* EOR */ +{ CPUFUNC(op_b1b0_11), 45488 }, /* EOR */ +{ CPUFUNC(op_b1b8_11), 45496 }, /* EOR */ +{ CPUFUNC(op_b1b9_11), 45497 }, /* EOR */ +{ CPUFUNC(op_b1c0_11), 45504 }, /* CMPA */ +{ CPUFUNC(op_b1c8_11), 45512 }, /* CMPA */ +{ CPUFUNC(op_b1d0_11), 45520 }, /* CMPA */ +{ CPUFUNC(op_b1d8_11), 45528 }, /* CMPA */ +{ CPUFUNC(op_b1e0_11), 45536 }, /* CMPA */ +{ CPUFUNC(op_b1e8_11), 45544 }, /* CMPA */ +{ CPUFUNC(op_b1f0_11), 45552 }, /* CMPA */ +{ CPUFUNC(op_b1f8_11), 45560 }, /* CMPA */ +{ CPUFUNC(op_b1f9_11), 45561 }, /* CMPA */ +{ CPUFUNC(op_b1fa_11), 45562 }, /* CMPA */ +{ CPUFUNC(op_b1fb_11), 45563 }, /* CMPA */ +{ CPUFUNC(op_b1fc_11), 45564 }, /* CMPA */ +{ CPUFUNC(op_c000_11), 49152 }, /* AND */ +{ CPUFUNC(op_c010_11), 49168 }, /* AND */ +{ CPUFUNC(op_c018_11), 49176 }, /* AND */ +{ CPUFUNC(op_c020_11), 49184 }, /* AND */ +{ CPUFUNC(op_c028_11), 49192 }, /* AND */ +{ CPUFUNC(op_c030_11), 49200 }, /* AND */ +{ CPUFUNC(op_c038_11), 49208 }, /* AND */ +{ CPUFUNC(op_c039_11), 49209 }, /* AND */ +{ CPUFUNC(op_c03a_11), 49210 }, /* AND */ +{ CPUFUNC(op_c03b_11), 49211 }, /* AND */ +{ CPUFUNC(op_c03c_11), 49212 }, /* AND */ +{ CPUFUNC(op_c040_11), 49216 }, /* AND */ +{ CPUFUNC(op_c050_11), 49232 }, /* AND */ +{ CPUFUNC(op_c058_11), 49240 }, /* AND */ +{ CPUFUNC(op_c060_11), 49248 }, /* AND */ +{ CPUFUNC(op_c068_11), 49256 }, /* AND */ +{ CPUFUNC(op_c070_11), 49264 }, /* AND */ +{ CPUFUNC(op_c078_11), 49272 }, /* AND */ +{ CPUFUNC(op_c079_11), 49273 }, /* AND */ +{ CPUFUNC(op_c07a_11), 49274 }, /* AND */ +{ CPUFUNC(op_c07b_11), 49275 }, /* AND */ +{ CPUFUNC(op_c07c_11), 49276 }, /* AND */ +{ CPUFUNC(op_c080_11), 49280 }, /* AND */ +{ CPUFUNC(op_c090_11), 49296 }, /* AND */ +{ CPUFUNC(op_c098_11), 49304 }, /* AND */ +{ CPUFUNC(op_c0a0_11), 49312 }, /* AND */ +{ CPUFUNC(op_c0a8_11), 49320 }, /* AND */ +{ CPUFUNC(op_c0b0_11), 49328 }, /* AND */ +{ CPUFUNC(op_c0b8_11), 49336 }, /* AND */ +{ CPUFUNC(op_c0b9_11), 49337 }, /* AND */ +{ CPUFUNC(op_c0ba_11), 49338 }, /* AND */ +{ CPUFUNC(op_c0bb_11), 49339 }, /* AND */ +{ CPUFUNC(op_c0bc_11), 49340 }, /* AND */ +{ CPUFUNC(op_c0c0_11), 49344 }, /* MULU */ +{ CPUFUNC(op_c0d0_11), 49360 }, /* MULU */ +{ CPUFUNC(op_c0d8_11), 49368 }, /* MULU */ +{ CPUFUNC(op_c0e0_11), 49376 }, /* MULU */ +{ CPUFUNC(op_c0e8_11), 49384 }, /* MULU */ +{ CPUFUNC(op_c0f0_11), 49392 }, /* MULU */ +{ CPUFUNC(op_c0f8_11), 49400 }, /* MULU */ +{ CPUFUNC(op_c0f9_11), 49401 }, /* MULU */ +{ CPUFUNC(op_c0fa_11), 49402 }, /* MULU */ +{ CPUFUNC(op_c0fb_11), 49403 }, /* MULU */ +{ CPUFUNC(op_c0fc_11), 49404 }, /* MULU */ +{ CPUFUNC(op_c100_11), 49408 }, /* ABCD */ +{ CPUFUNC(op_c108_11), 49416 }, /* ABCD */ +{ CPUFUNC(op_c110_11), 49424 }, /* AND */ +{ CPUFUNC(op_c118_11), 49432 }, /* AND */ +{ CPUFUNC(op_c120_11), 49440 }, /* AND */ +{ CPUFUNC(op_c128_11), 49448 }, /* AND */ +{ CPUFUNC(op_c130_11), 49456 }, /* AND */ +{ CPUFUNC(op_c138_11), 49464 }, /* AND */ +{ CPUFUNC(op_c139_11), 49465 }, /* AND */ +{ CPUFUNC(op_c140_11), 49472 }, /* EXG */ +{ CPUFUNC(op_c148_11), 49480 }, /* EXG */ +{ CPUFUNC(op_c150_11), 49488 }, /* AND */ +{ CPUFUNC(op_c158_11), 49496 }, /* AND */ +{ CPUFUNC(op_c160_11), 49504 }, /* AND */ +{ CPUFUNC(op_c168_11), 49512 }, /* AND */ +{ CPUFUNC(op_c170_11), 49520 }, /* AND */ +{ CPUFUNC(op_c178_11), 49528 }, /* AND */ +{ CPUFUNC(op_c179_11), 49529 }, /* AND */ +{ CPUFUNC(op_c188_11), 49544 }, /* EXG */ +{ CPUFUNC(op_c190_11), 49552 }, /* AND */ +{ CPUFUNC(op_c198_11), 49560 }, /* AND */ +{ CPUFUNC(op_c1a0_11), 49568 }, /* AND */ +{ CPUFUNC(op_c1a8_11), 49576 }, /* AND */ +{ CPUFUNC(op_c1b0_11), 49584 }, /* AND */ +{ CPUFUNC(op_c1b8_11), 49592 }, /* AND */ +{ CPUFUNC(op_c1b9_11), 49593 }, /* AND */ +{ CPUFUNC(op_c1c0_11), 49600 }, /* MULS */ +{ CPUFUNC(op_c1d0_11), 49616 }, /* MULS */ +{ CPUFUNC(op_c1d8_11), 49624 }, /* MULS */ +{ CPUFUNC(op_c1e0_11), 49632 }, /* MULS */ +{ CPUFUNC(op_c1e8_11), 49640 }, /* MULS */ +{ CPUFUNC(op_c1f0_11), 49648 }, /* MULS */ +{ CPUFUNC(op_c1f8_11), 49656 }, /* MULS */ +{ CPUFUNC(op_c1f9_11), 49657 }, /* MULS */ +{ CPUFUNC(op_c1fa_11), 49658 }, /* MULS */ +{ CPUFUNC(op_c1fb_11), 49659 }, /* MULS */ +{ CPUFUNC(op_c1fc_11), 49660 }, /* MULS */ +{ CPUFUNC(op_d000_11), 53248 }, /* ADD */ +{ CPUFUNC(op_d010_11), 53264 }, /* ADD */ +{ CPUFUNC(op_d018_11), 53272 }, /* ADD */ +{ CPUFUNC(op_d020_11), 53280 }, /* ADD */ +{ CPUFUNC(op_d028_11), 53288 }, /* ADD */ +{ CPUFUNC(op_d030_11), 53296 }, /* ADD */ +{ CPUFUNC(op_d038_11), 53304 }, /* ADD */ +{ CPUFUNC(op_d039_11), 53305 }, /* ADD */ +{ CPUFUNC(op_d03a_11), 53306 }, /* ADD */ +{ CPUFUNC(op_d03b_11), 53307 }, /* ADD */ +{ CPUFUNC(op_d03c_11), 53308 }, /* ADD */ +{ CPUFUNC(op_d040_11), 53312 }, /* ADD */ +{ CPUFUNC(op_d048_11), 53320 }, /* ADD */ +{ CPUFUNC(op_d050_11), 53328 }, /* ADD */ +{ CPUFUNC(op_d058_11), 53336 }, /* ADD */ +{ CPUFUNC(op_d060_11), 53344 }, /* ADD */ +{ CPUFUNC(op_d068_11), 53352 }, /* ADD */ +{ CPUFUNC(op_d070_11), 53360 }, /* ADD */ +{ CPUFUNC(op_d078_11), 53368 }, /* ADD */ +{ CPUFUNC(op_d079_11), 53369 }, /* ADD */ +{ CPUFUNC(op_d07a_11), 53370 }, /* ADD */ +{ CPUFUNC(op_d07b_11), 53371 }, /* ADD */ +{ CPUFUNC(op_d07c_11), 53372 }, /* ADD */ +{ CPUFUNC(op_d080_11), 53376 }, /* ADD */ +{ CPUFUNC(op_d088_11), 53384 }, /* ADD */ +{ CPUFUNC(op_d090_11), 53392 }, /* ADD */ +{ CPUFUNC(op_d098_11), 53400 }, /* ADD */ +{ CPUFUNC(op_d0a0_11), 53408 }, /* ADD */ +{ CPUFUNC(op_d0a8_11), 53416 }, /* ADD */ +{ CPUFUNC(op_d0b0_11), 53424 }, /* ADD */ +{ CPUFUNC(op_d0b8_11), 53432 }, /* ADD */ +{ CPUFUNC(op_d0b9_11), 53433 }, /* ADD */ +{ CPUFUNC(op_d0ba_11), 53434 }, /* ADD */ +{ CPUFUNC(op_d0bb_11), 53435 }, /* ADD */ +{ CPUFUNC(op_d0bc_11), 53436 }, /* ADD */ +{ CPUFUNC(op_d0c0_11), 53440 }, /* ADDA */ +{ CPUFUNC(op_d0c8_11), 53448 }, /* ADDA */ +{ CPUFUNC(op_d0d0_11), 53456 }, /* ADDA */ +{ CPUFUNC(op_d0d8_11), 53464 }, /* ADDA */ +{ CPUFUNC(op_d0e0_11), 53472 }, /* ADDA */ +{ CPUFUNC(op_d0e8_11), 53480 }, /* ADDA */ +{ CPUFUNC(op_d0f0_11), 53488 }, /* ADDA */ +{ CPUFUNC(op_d0f8_11), 53496 }, /* ADDA */ +{ CPUFUNC(op_d0f9_11), 53497 }, /* ADDA */ +{ CPUFUNC(op_d0fa_11), 53498 }, /* ADDA */ +{ CPUFUNC(op_d0fb_11), 53499 }, /* ADDA */ +{ CPUFUNC(op_d0fc_11), 53500 }, /* ADDA */ +{ CPUFUNC(op_d100_11), 53504 }, /* ADDX */ +{ CPUFUNC(op_d108_11), 53512 }, /* ADDX */ +{ CPUFUNC(op_d110_11), 53520 }, /* ADD */ +{ CPUFUNC(op_d118_11), 53528 }, /* ADD */ +{ CPUFUNC(op_d120_11), 53536 }, /* ADD */ +{ CPUFUNC(op_d128_11), 53544 }, /* ADD */ +{ CPUFUNC(op_d130_11), 53552 }, /* ADD */ +{ CPUFUNC(op_d138_11), 53560 }, /* ADD */ +{ CPUFUNC(op_d139_11), 53561 }, /* ADD */ +{ CPUFUNC(op_d140_11), 53568 }, /* ADDX */ +{ CPUFUNC(op_d148_11), 53576 }, /* ADDX */ +{ CPUFUNC(op_d150_11), 53584 }, /* ADD */ +{ CPUFUNC(op_d158_11), 53592 }, /* ADD */ +{ CPUFUNC(op_d160_11), 53600 }, /* ADD */ +{ CPUFUNC(op_d168_11), 53608 }, /* ADD */ +{ CPUFUNC(op_d170_11), 53616 }, /* ADD */ +{ CPUFUNC(op_d178_11), 53624 }, /* ADD */ +{ CPUFUNC(op_d179_11), 53625 }, /* ADD */ +{ CPUFUNC(op_d180_11), 53632 }, /* ADDX */ +{ CPUFUNC(op_d188_11), 53640 }, /* ADDX */ +{ CPUFUNC(op_d190_11), 53648 }, /* ADD */ +{ CPUFUNC(op_d198_11), 53656 }, /* ADD */ +{ CPUFUNC(op_d1a0_11), 53664 }, /* ADD */ +{ CPUFUNC(op_d1a8_11), 53672 }, /* ADD */ +{ CPUFUNC(op_d1b0_11), 53680 }, /* ADD */ +{ CPUFUNC(op_d1b8_11), 53688 }, /* ADD */ +{ CPUFUNC(op_d1b9_11), 53689 }, /* ADD */ +{ CPUFUNC(op_d1c0_11), 53696 }, /* ADDA */ +{ CPUFUNC(op_d1c8_11), 53704 }, /* ADDA */ +{ CPUFUNC(op_d1d0_11), 53712 }, /* ADDA */ +{ CPUFUNC(op_d1d8_11), 53720 }, /* ADDA */ +{ CPUFUNC(op_d1e0_11), 53728 }, /* ADDA */ +{ CPUFUNC(op_d1e8_11), 53736 }, /* ADDA */ +{ CPUFUNC(op_d1f0_11), 53744 }, /* ADDA */ +{ CPUFUNC(op_d1f8_11), 53752 }, /* ADDA */ +{ CPUFUNC(op_d1f9_11), 53753 }, /* ADDA */ +{ CPUFUNC(op_d1fa_11), 53754 }, /* ADDA */ +{ CPUFUNC(op_d1fb_11), 53755 }, /* ADDA */ +{ CPUFUNC(op_d1fc_11), 53756 }, /* ADDA */ +{ CPUFUNC(op_e000_11), 57344 }, /* ASR */ +{ CPUFUNC(op_e008_11), 57352 }, /* LSR */ +{ CPUFUNC(op_e010_11), 57360 }, /* ROXR */ +{ CPUFUNC(op_e018_11), 57368 }, /* ROR */ +{ CPUFUNC(op_e020_11), 57376 }, /* ASR */ +{ CPUFUNC(op_e028_11), 57384 }, /* LSR */ +{ CPUFUNC(op_e030_11), 57392 }, /* ROXR */ +{ CPUFUNC(op_e038_11), 57400 }, /* ROR */ +{ CPUFUNC(op_e040_11), 57408 }, /* ASR */ +{ CPUFUNC(op_e048_11), 57416 }, /* LSR */ +{ CPUFUNC(op_e050_11), 57424 }, /* ROXR */ +{ CPUFUNC(op_e058_11), 57432 }, /* ROR */ +{ CPUFUNC(op_e060_11), 57440 }, /* ASR */ +{ CPUFUNC(op_e068_11), 57448 }, /* LSR */ +{ CPUFUNC(op_e070_11), 57456 }, /* ROXR */ +{ CPUFUNC(op_e078_11), 57464 }, /* ROR */ +{ CPUFUNC(op_e080_11), 57472 }, /* ASR */ +{ CPUFUNC(op_e088_11), 57480 }, /* LSR */ +{ CPUFUNC(op_e090_11), 57488 }, /* ROXR */ +{ CPUFUNC(op_e098_11), 57496 }, /* ROR */ +{ CPUFUNC(op_e0a0_11), 57504 }, /* ASR */ +{ CPUFUNC(op_e0a8_11), 57512 }, /* LSR */ +{ CPUFUNC(op_e0b0_11), 57520 }, /* ROXR */ +{ CPUFUNC(op_e0b8_11), 57528 }, /* ROR */ +{ CPUFUNC(op_e0d0_11), 57552 }, /* ASRW */ +{ CPUFUNC(op_e0d8_11), 57560 }, /* ASRW */ +{ CPUFUNC(op_e0e0_11), 57568 }, /* ASRW */ +{ CPUFUNC(op_e0e8_11), 57576 }, /* ASRW */ +{ CPUFUNC(op_e0f0_11), 57584 }, /* ASRW */ +{ CPUFUNC(op_e0f8_11), 57592 }, /* ASRW */ +{ CPUFUNC(op_e0f9_11), 57593 }, /* ASRW */ +{ CPUFUNC(op_e100_11), 57600 }, /* ASL */ +{ CPUFUNC(op_e108_11), 57608 }, /* LSL */ +{ CPUFUNC(op_e110_11), 57616 }, /* ROXL */ +{ CPUFUNC(op_e118_11), 57624 }, /* ROL */ +{ CPUFUNC(op_e120_11), 57632 }, /* ASL */ +{ CPUFUNC(op_e128_11), 57640 }, /* LSL */ +{ CPUFUNC(op_e130_11), 57648 }, /* ROXL */ +{ CPUFUNC(op_e138_11), 57656 }, /* ROL */ +{ CPUFUNC(op_e140_11), 57664 }, /* ASL */ +{ CPUFUNC(op_e148_11), 57672 }, /* LSL */ +{ CPUFUNC(op_e150_11), 57680 }, /* ROXL */ +{ CPUFUNC(op_e158_11), 57688 }, /* ROL */ +{ CPUFUNC(op_e160_11), 57696 }, /* ASL */ +{ CPUFUNC(op_e168_11), 57704 }, /* LSL */ +{ CPUFUNC(op_e170_11), 57712 }, /* ROXL */ +{ CPUFUNC(op_e178_11), 57720 }, /* ROL */ +{ CPUFUNC(op_e180_11), 57728 }, /* ASL */ +{ CPUFUNC(op_e188_11), 57736 }, /* LSL */ +{ CPUFUNC(op_e190_11), 57744 }, /* ROXL */ +{ CPUFUNC(op_e198_11), 57752 }, /* ROL */ +{ CPUFUNC(op_e1a0_11), 57760 }, /* ASL */ +{ CPUFUNC(op_e1a8_11), 57768 }, /* LSL */ +{ CPUFUNC(op_e1b0_11), 57776 }, /* ROXL */ +{ CPUFUNC(op_e1b8_11), 57784 }, /* ROL */ +{ CPUFUNC(op_e1d0_11), 57808 }, /* ASLW */ +{ CPUFUNC(op_e1d8_11), 57816 }, /* ASLW */ +{ CPUFUNC(op_e1e0_11), 57824 }, /* ASLW */ +{ CPUFUNC(op_e1e8_11), 57832 }, /* ASLW */ +{ CPUFUNC(op_e1f0_11), 57840 }, /* ASLW */ +{ CPUFUNC(op_e1f8_11), 57848 }, /* ASLW */ +{ CPUFUNC(op_e1f9_11), 57849 }, /* ASLW */ +{ CPUFUNC(op_e2d0_11), 58064 }, /* LSRW */ +{ CPUFUNC(op_e2d8_11), 58072 }, /* LSRW */ +{ CPUFUNC(op_e2e0_11), 58080 }, /* LSRW */ +{ CPUFUNC(op_e2e8_11), 58088 }, /* LSRW */ +{ CPUFUNC(op_e2f0_11), 58096 }, /* LSRW */ +{ CPUFUNC(op_e2f8_11), 58104 }, /* LSRW */ +{ CPUFUNC(op_e2f9_11), 58105 }, /* LSRW */ +{ CPUFUNC(op_e3d0_11), 58320 }, /* LSLW */ +{ CPUFUNC(op_e3d8_11), 58328 }, /* LSLW */ +{ CPUFUNC(op_e3e0_11), 58336 }, /* LSLW */ +{ CPUFUNC(op_e3e8_11), 58344 }, /* LSLW */ +{ CPUFUNC(op_e3f0_11), 58352 }, /* LSLW */ +{ CPUFUNC(op_e3f8_11), 58360 }, /* LSLW */ +{ CPUFUNC(op_e3f9_11), 58361 }, /* LSLW */ +{ CPUFUNC(op_e4d0_11), 58576 }, /* ROXRW */ +{ CPUFUNC(op_e4d8_11), 58584 }, /* ROXRW */ +{ CPUFUNC(op_e4e0_11), 58592 }, /* ROXRW */ +{ CPUFUNC(op_e4e8_11), 58600 }, /* ROXRW */ +{ CPUFUNC(op_e4f0_11), 58608 }, /* ROXRW */ +{ CPUFUNC(op_e4f8_11), 58616 }, /* ROXRW */ +{ CPUFUNC(op_e4f9_11), 58617 }, /* ROXRW */ +{ CPUFUNC(op_e5d0_11), 58832 }, /* ROXLW */ +{ CPUFUNC(op_e5d8_11), 58840 }, /* ROXLW */ +{ CPUFUNC(op_e5e0_11), 58848 }, /* ROXLW */ +{ CPUFUNC(op_e5e8_11), 58856 }, /* ROXLW */ +{ CPUFUNC(op_e5f0_11), 58864 }, /* ROXLW */ +{ CPUFUNC(op_e5f8_11), 58872 }, /* ROXLW */ +{ CPUFUNC(op_e5f9_11), 58873 }, /* ROXLW */ +{ CPUFUNC(op_e6d0_11), 59088 }, /* RORW */ +{ CPUFUNC(op_e6d8_11), 59096 }, /* RORW */ +{ CPUFUNC(op_e6e0_11), 59104 }, /* RORW */ +{ CPUFUNC(op_e6e8_11), 59112 }, /* RORW */ +{ CPUFUNC(op_e6f0_11), 59120 }, /* RORW */ +{ CPUFUNC(op_e6f8_11), 59128 }, /* RORW */ +{ CPUFUNC(op_e6f9_11), 59129 }, /* RORW */ +{ CPUFUNC(op_e7d0_11), 59344 }, /* ROLW */ +{ CPUFUNC(op_e7d8_11), 59352 }, /* ROLW */ +{ CPUFUNC(op_e7e0_11), 59360 }, /* ROLW */ +{ CPUFUNC(op_e7e8_11), 59368 }, /* ROLW */ +{ CPUFUNC(op_e7f0_11), 59376 }, /* ROLW */ +{ CPUFUNC(op_e7f8_11), 59384 }, /* ROLW */ +{ CPUFUNC(op_e7f9_11), 59385 }, /* ROLW */ +{ 0, 0 }}; +#endif /* CPUEMU_11 */ diff --git a/src/crc32.cpp b/src/crc32.cpp index 6c790118..421107ad 100644 --- a/src/crc32.cpp +++ b/src/crc32.cpp @@ -2,6 +2,8 @@ #include "sysconfig.h" #include "sysdeps.h" +#include "crc32.h" + static unsigned long crc_table32[256]; static unsigned short crc_table16[256]; static void make_crc_table() @@ -40,3 +42,304 @@ uae_u16 get_crc16( uae_u8 *buf, int len) crc = (crc << 8) ^ crc_table16[((crc >> 8) ^ (*buf++)) & 0xff]; return crc; } + +#ifndef GET_UINT32_BE +#define GET_UINT32_BE(n,b,i) \ +{ \ + (n) = ( (unsigned long) (b)[(i) ] << 24 ) \ + | ( (unsigned long) (b)[(i) + 1] << 16 ) \ + | ( (unsigned long) (b)[(i) + 2] << 8 ) \ + | ( (unsigned long) (b)[(i) + 3] ); \ +} +#endif +#ifndef PUT_UINT32_BE +#define PUT_UINT32_BE(n,b,i) \ +{ \ + (b)[(i) ] = (unsigned char) ( (n) >> 24 ); \ + (b)[(i) + 1] = (unsigned char) ( (n) >> 16 ); \ + (b)[(i) + 2] = (unsigned char) ( (n) >> 8 ); \ + (b)[(i) + 3] = (unsigned char) ( (n) ); \ +} +#endif + +typedef struct +{ + unsigned long total[2]; /*!< number of bytes processed */ + unsigned long state[5]; /*!< intermediate digest state */ + unsigned char buffer[64]; /*!< data block being processed */ +} +sha1_context; + +static void sha1_starts( sha1_context *ctx ) +{ + ctx->total[0] = 0; + ctx->total[1] = 0; + + ctx->state[0] = 0x67452301; + ctx->state[1] = 0xEFCDAB89; + ctx->state[2] = 0x98BADCFE; + ctx->state[3] = 0x10325476; + ctx->state[4] = 0xC3D2E1F0; +} + +static void sha1_process( sha1_context *ctx, unsigned char data[64] ) +{ + unsigned long temp, W[16], A, B, C, D, E; + + GET_UINT32_BE( W[0], data, 0 ); + GET_UINT32_BE( W[1], data, 4 ); + GET_UINT32_BE( W[2], data, 8 ); + GET_UINT32_BE( W[3], data, 12 ); + GET_UINT32_BE( W[4], data, 16 ); + GET_UINT32_BE( W[5], data, 20 ); + GET_UINT32_BE( W[6], data, 24 ); + GET_UINT32_BE( W[7], data, 28 ); + GET_UINT32_BE( W[8], data, 32 ); + GET_UINT32_BE( W[9], data, 36 ); + GET_UINT32_BE( W[10], data, 40 ); + GET_UINT32_BE( W[11], data, 44 ); + GET_UINT32_BE( W[12], data, 48 ); + GET_UINT32_BE( W[13], data, 52 ); + GET_UINT32_BE( W[14], data, 56 ); + GET_UINT32_BE( W[15], data, 60 ); + +#define S(x,n) ((x << n) | ((x & 0xFFFFFFFF) >> (32 - n))) + +#define R(t) \ +( \ + temp = W[(t - 3) & 0x0F] ^ W[(t - 8) & 0x0F] ^ \ + W[(t - 14) & 0x0F] ^ W[ t & 0x0F], \ + ( W[t & 0x0F] = S(temp,1) ) \ +) + +#define P(a,b,c,d,e,x) \ +{ \ + e += S(a,5) + F(b,c,d) + K + x; b = S(b,30); \ +} + + A = ctx->state[0]; + B = ctx->state[1]; + C = ctx->state[2]; + D = ctx->state[3]; + E = ctx->state[4]; + +#define F(x,y,z) (z ^ (x & (y ^ z))) +#define K 0x5A827999 + + P( A, B, C, D, E, W[0] ); + P( E, A, B, C, D, W[1] ); + P( D, E, A, B, C, W[2] ); + P( C, D, E, A, B, W[3] ); + P( B, C, D, E, A, W[4] ); + P( A, B, C, D, E, W[5] ); + P( E, A, B, C, D, W[6] ); + P( D, E, A, B, C, W[7] ); + P( C, D, E, A, B, W[8] ); + P( B, C, D, E, A, W[9] ); + P( A, B, C, D, E, W[10] ); + P( E, A, B, C, D, W[11] ); + P( D, E, A, B, C, W[12] ); + P( C, D, E, A, B, W[13] ); + P( B, C, D, E, A, W[14] ); + P( A, B, C, D, E, W[15] ); + P( E, A, B, C, D, R(16) ); + P( D, E, A, B, C, R(17) ); + P( C, D, E, A, B, R(18) ); + P( B, C, D, E, A, R(19) ); + +#undef K +#undef F + +#define F(x,y,z) (x ^ y ^ z) +#define K 0x6ED9EBA1 + + P( A, B, C, D, E, R(20) ); + P( E, A, B, C, D, R(21) ); + P( D, E, A, B, C, R(22) ); + P( C, D, E, A, B, R(23) ); + P( B, C, D, E, A, R(24) ); + P( A, B, C, D, E, R(25) ); + P( E, A, B, C, D, R(26) ); + P( D, E, A, B, C, R(27) ); + P( C, D, E, A, B, R(28) ); + P( B, C, D, E, A, R(29) ); + P( A, B, C, D, E, R(30) ); + P( E, A, B, C, D, R(31) ); + P( D, E, A, B, C, R(32) ); + P( C, D, E, A, B, R(33) ); + P( B, C, D, E, A, R(34) ); + P( A, B, C, D, E, R(35) ); + P( E, A, B, C, D, R(36) ); + P( D, E, A, B, C, R(37) ); + P( C, D, E, A, B, R(38) ); + P( B, C, D, E, A, R(39) ); + +#undef K +#undef F + +#define F(x,y,z) ((x & y) | (z & (x | y))) +#define K 0x8F1BBCDC + + P( A, B, C, D, E, R(40) ); + P( E, A, B, C, D, R(41) ); + P( D, E, A, B, C, R(42) ); + P( C, D, E, A, B, R(43) ); + P( B, C, D, E, A, R(44) ); + P( A, B, C, D, E, R(45) ); + P( E, A, B, C, D, R(46) ); + P( D, E, A, B, C, R(47) ); + P( C, D, E, A, B, R(48) ); + P( B, C, D, E, A, R(49) ); + P( A, B, C, D, E, R(50) ); + P( E, A, B, C, D, R(51) ); + P( D, E, A, B, C, R(52) ); + P( C, D, E, A, B, R(53) ); + P( B, C, D, E, A, R(54) ); + P( A, B, C, D, E, R(55) ); + P( E, A, B, C, D, R(56) ); + P( D, E, A, B, C, R(57) ); + P( C, D, E, A, B, R(58) ); + P( B, C, D, E, A, R(59) ); + +#undef K +#undef F + +#define F(x,y,z) (x ^ y ^ z) +#define K 0xCA62C1D6 + + P( A, B, C, D, E, R(60) ); + P( E, A, B, C, D, R(61) ); + P( D, E, A, B, C, R(62) ); + P( C, D, E, A, B, R(63) ); + P( B, C, D, E, A, R(64) ); + P( A, B, C, D, E, R(65) ); + P( E, A, B, C, D, R(66) ); + P( D, E, A, B, C, R(67) ); + P( C, D, E, A, B, R(68) ); + P( B, C, D, E, A, R(69) ); + P( A, B, C, D, E, R(70) ); + P( E, A, B, C, D, R(71) ); + P( D, E, A, B, C, R(72) ); + P( C, D, E, A, B, R(73) ); + P( B, C, D, E, A, R(74) ); + P( A, B, C, D, E, R(75) ); + P( E, A, B, C, D, R(76) ); + P( D, E, A, B, C, R(77) ); + P( C, D, E, A, B, R(78) ); + P( B, C, D, E, A, R(79) ); + +#undef K +#undef F + + ctx->state[0] += A; + ctx->state[1] += B; + ctx->state[2] += C; + ctx->state[3] += D; + ctx->state[4] += E; +} + +/* + * SHA-1 process buffer + */ +static void sha1_update( sha1_context *ctx, unsigned char *input, int ilen ) +{ + int fill; + unsigned long left; + + if( ilen <= 0 ) + return; + + left = ctx->total[0] & 0x3F; + fill = 64 - left; + + ctx->total[0] += ilen; + ctx->total[0] &= 0xFFFFFFFF; + + if( ctx->total[0] < (unsigned long) ilen ) + ctx->total[1]++; + + if( left && ilen >= fill ) + { + memcpy( (void *) (ctx->buffer + left), + (void *) input, fill ); + sha1_process( ctx, ctx->buffer ); + input += fill; + ilen -= fill; + left = 0; + } + + while( ilen >= 64 ) + { + sha1_process( ctx, input ); + input += 64; + ilen -= 64; + } + + if( ilen > 0 ) + { + memcpy( (void *) (ctx->buffer + left), + (void *) input, ilen ); + } +} + +static const unsigned char sha1_padding[64] = +{ + 0x80, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 +}; + +/* + * SHA-1 final digest + */ +static void sha1_finish( sha1_context *ctx, unsigned char output[20] ) +{ + unsigned long last, padn; + unsigned long high, low; + unsigned char msglen[8]; + + high = ( ctx->total[0] >> 29 ) + | ( ctx->total[1] << 3 ); + low = ( ctx->total[0] << 3 ); + + PUT_UINT32_BE( high, msglen, 0 ); + PUT_UINT32_BE( low, msglen, 4 ); + + last = ctx->total[0] & 0x3F; + padn = ( last < 56 ) ? ( 56 - last ) : ( 120 - last ); + + sha1_update( ctx, (unsigned char *) sha1_padding, padn ); + sha1_update( ctx, msglen, 8 ); + + PUT_UINT32_BE( ctx->state[0], output, 0 ); + PUT_UINT32_BE( ctx->state[1], output, 4 ); + PUT_UINT32_BE( ctx->state[2], output, 8 ); + PUT_UINT32_BE( ctx->state[3], output, 12 ); + PUT_UINT32_BE( ctx->state[4], output, 16 ); +} + +void get_sha1(uae_u8 *input, int len, uae_u8 *out) +{ + sha1_context ctx; + + sha1_starts( &ctx ); + sha1_update( &ctx, input, len ); + sha1_finish( &ctx, out ); +} +char *get_sha1_txt(uae_u8 *input, int len) +{ + static char outtxt[SHA1_SIZE * 2 + 1]; + uae_u8 out[SHA1_SIZE]; + int i; + char *p; + + p = outtxt; + get_sha1(input, len, out); + for (i = 0; i < SHA1_SIZE; i++) { + sprintf(p, "%02X", out[i]); + p += 2; + } + *p = 0; + return outtxt; +} diff --git a/src/custom.cpp b/src/custom.cpp index 0ac9a939..b256d88a 100644 --- a/src/custom.cpp +++ b/src/custom.cpp @@ -5,7 +5,7 @@ * * Copyright 1995-2002 Bernd Schmidt * Copyright 1995 Alessandro Bissacco - * Copyright 2000-2004 Toni Wilen + * Copyright 2000-2008 Toni Wilen */ #define SPR0_HPOS 0x15 @@ -18,6 +18,7 @@ #include "options.h" #include "uae.h" #include "gensound.h" +#include "audio.h" #include "sd-pandora/sound.h" #include "events.h" #include "memory.h" @@ -28,7 +29,6 @@ #include "blitter.h" #include "xwin.h" #include "inputdevice.h" -#include "audio.h" #include "keybuf.h" #include "serial.h" #include "osemu.h" @@ -66,6 +66,7 @@ int speedup_timelimit = -1000; static int rpt_did_reset; struct ev eventtab[ev_max]; +struct ev2 eventtab2[ev2_max]; volatile frame_time_t vsynctime, vsyncmintime; @@ -90,7 +91,7 @@ static uae_u32 sprclx[16], clxmask[16]; */ static int REGPARAM3 custom_wput_1 (int, uaecptr, uae_u32, int) REGPARAM; -uae_u16 intena,intreq; +uae_u16 intena, intreq, intreqr; uae_u16 dmacon; uae_u16 adkcon; /* used by audio code */ @@ -129,7 +130,8 @@ static uae_u16 sprdata[MAX_SPRITES][4], sprdatb[MAX_SPRITES][4]; static int sprite_last_drawn_at[MAX_SPRITES]; static int last_sprite_point, nr_armed; -static int sprite_width, sprres, sprite_buffer_res; +static int sprite_width, sprres; +int sprite_buffer_res; static uae_u32 bpl1dat; static uae_s16 bpl1mod, bpl2mod; @@ -161,7 +163,6 @@ static enum diw_states diwstate, hdiwstate, ddfstate; /* Sprite collisions */ static unsigned int clxdat, clxcon, clxcon2, clxcon_bpl_enable, clxcon_bpl_match; -#define FAST_COPPER enum copper_states { COP_stop, COP_read1_in2, @@ -200,7 +201,6 @@ struct copper { unsigned int regtypes_modified; #endif int strobe; /* COPJMP1 / COPJMP2 accessed */ - int last_write, last_write_hpos; }; #ifdef FAST_COPPER @@ -219,7 +219,6 @@ struct copper { DMACON, BPLCON0, COPJMPx get written. */ #define REGTYPE_FORCE 256 - static unsigned int regtypes[512]; #endif @@ -231,7 +230,7 @@ static int copper_enabled_thisline; */ static unsigned long int lastframetime = 0, timeframes = 0; -unsigned long int hsync_counter = 0; +unsigned long hsync_counter = 0, vsync_counter = 0, ciavsync_counter = 0; /* Recording of custom chip register changes. */ struct sprite_entry *curr_sprite_entries; @@ -292,6 +291,32 @@ STATIC_INLINE void setclr (uae_u16 *_GCCRES_ p, uae_u16 val) *p &= ~val; } +STATIC_INLINE void alloc_cycle(int hpos, int type) +{ +#ifdef CPUEMU_12 +#if 0 + if (cycle_line[hpos]) + write_log ("hpos=%d, old=%d, new=%d\n", hpos, cycle_line[hpos], type); + if ((type == CYCLE_CPU || type == CYCLE_COPPER) && (hpos & 1)) + write_log ("odd %d cycle %d\n", hpos); + if (!(hpos & 1) && (type == CYCLE_SPRITE || type == CYCLE_REFRESH || type == CYCLE_MISC)) + write_log ("even %d cycle %d\n", type, hpos); +#endif + cycle_line[hpos] = type; +#endif +} + +void alloc_cycle_ext(int hpos, int type) +{ + alloc_cycle (hpos, type); +} + +static void update_mirrors(void) +{ + aga_mode = (currprefs.chipset_mask & CSMASK_AGA) ? 1 : 0; + direct_rgb = aga_mode; +} + STATIC_INLINE uae_u8 *_GCCRES_ pfield_xlateptr (uaecptr plpt, int bytecount) { plpt &= chipmem_mask; @@ -321,11 +346,15 @@ STATIC_INLINE void docols (struct color_entry *_GCCRES_ colentry) } } +extern struct color_entry colors_for_drawing; + void notice_new_xcolors (void) { int i; + update_mirrors (); docols(¤t_colors); + docols(&colors_for_drawing); for (i = 0; i < (MAXVPOS + 1)*2; i++) { docols(curr_color_tables + i); } @@ -349,7 +378,8 @@ static void remember_ctable (void) * checked. */ static void decide_diw (int hpos) { - int pix_hpos = coord_diw_to_window_x (hpos == 227 ? 455 : hpos * 2); /* (227.5*2 = 455) */ + /* Last hpos = hpos + 0.5, eg. normal PAL end hpos is 227.5 * 2 = 455 */ + int pix_hpos = coord_diw_to_window_x (hpos == maxhpos ? hpos * 2 + 1 : hpos * 2); if (hdiwstate == DIW_waiting_start && thisline_decision.diwfirstword == -1 && pix_hpos >= diwfirstword && last_diw_pix_hpos < diwfirstword) { @@ -1425,6 +1455,31 @@ static void record_register_change (int hpos, int regno, unsigned long value) typedef int sprbuf_res_t, cclockres_t, hwres_t, bplres_t; +static int expand_sprres (uae_u16 con0, uae_u16 con3) +{ + int res; + + switch ((con3 >> 6) & 3) + { + default: + res = RES_LORES; + break; + case 0: /* ECS defaults (LORES,HIRES=LORES sprite,SHRES=HIRES sprite) */ + res = RES_LORES; + break; + case 1: + res = RES_LORES; + break; + case 2: + res = RES_HIRES; + break; + case 3: + res = RES_SUPERHIRES; + break; + } + return res; +} + #define DO_PLAYFIELD_COLLISIONS \ { \ if (!clxcon_bpl_enable) \ @@ -1555,24 +1610,6 @@ static void do_sprite_collisions (void) } } -static void expand_sprres (void) -{ - switch ((bplcon3 >> 6) & 3) { - case 0: /* ECS defaults (LORES,HIRES=140ns,SHRES=70ns) */ - sprres = RES_LORES; - break; - case 1: - sprres = RES_LORES; - break; - case 2: - sprres = RES_HIRES; - break; - case 3: - sprres = RES_SUPERHIRES; - break; - } -} - STATIC_INLINE void record_sprite_1 (uae_u16 *_GCCRES_ buf, uae_u32 datab, int num, int dbl, unsigned int mask, int do_collisions, uae_u32 collision_mask) { @@ -1583,7 +1620,7 @@ STATIC_INLINE void record_sprite_1 (uae_u16 *_GCCRES_ buf, uae_u32 datab, int nu tmp |= col; if ((j & mask) == 0) *buf++ = tmp; - if (dbl) + if (dbl > 0) *buf++ = tmp; j++; datab >>= 2; @@ -1613,19 +1650,17 @@ static void record_sprite (int line, int num, int sprxp, uae_u16 *_GCCRES_ data, int word_offs; uae_u16 *buf; uae_u32 collision_mask; - int width = sprite_width; - int dbl = 0, half = 0; + int width, dbl, half; unsigned int mask = 0; - if (currprefs.chipset_mask & CSMASK_AGA) { - width = (width << 1) >> sprres; - dbl = sprite_buffer_res - sprres; - if (dbl < 0) { - half = -dbl; - dbl = 0; - } - mask = sprres == RES_SUPERHIRES ? 1 : 0; - } + half = 0; + dbl = sprite_buffer_res - sprres; + if (dbl < 0) { + half = -dbl; + dbl = 0; + } + mask = sprres == RES_SUPERHIRES ? 1 : 0; + width = (sprite_width << sprite_buffer_res) >> sprres; /* Try to coalesce entries if they aren't too far apart. */ if (! next_sprite_forced && e[-1].max + 16 >= sprxp) { @@ -1663,8 +1698,7 @@ static void record_sprite (int line, int num, int sprxp, uae_u16 *_GCCRES_ data, /* We have 8 bits per pixel in spixstate, two for every sprite pair. The low order bit records whether the attach bit was set for this pair. */ - - if ((sprctl[num] & 0x80) || (!(currprefs.chipset_mask & CSMASK_AGA) && (sprctl[num ^ 1] & 0x80))) { + if (spr[num & ~1].armed && ((sprctl[num | 1] & 0x80) || (!(currprefs.chipset_mask & CSMASK_AGA) && (sprctl[num & ~1] & 0x80)))) { uae_u8 state = 0x03 << (num & ~1); uae_u8 *stb1 = spixstate.bytes + word_offs; for (i = 0; i < width; i += 8) { @@ -1701,12 +1735,16 @@ static void decide_sprites (int hpos) count = 0; for (i = 0; i < MAX_SPRITES; i++) { int sprxp = spr[i].xpos; - int hw_xp = (sprxp >> sprite_buffer_res); + int hw_xp = sprxp >> sprite_buffer_res; int window_xp = coord_hw_to_window_x (hw_xp) + (DIW_DDF_OFFSET); int j, bestp; - if (! spr[i].armed || sprxp < 0 || hw_xp <= last_sprite_point || hw_xp > point) + if (! spr[i].armed) continue; + + if (sprxp < 0 || hw_xp <= last_sprite_point || hw_xp > point) + continue; + if ( !(bplcon3 & 2) && /* sprites outside playfields enabled? */ ((thisline_decision.diwfirstword >= 0 && window_xp + window_width < thisline_decision.diwfirstword) || (thisline_decision.diwlastword >= 0 && window_xp > thisline_decision.diwlastword))) @@ -1765,7 +1803,7 @@ static __inline__ void finish_decisions (void) thisline_decision.diwlastword = max_diwlastword; if (thisline_decision.plfleft != -1 || (bplcon3 & 2)) - decide_sprites (hpos); + decide_sprites (hpos + 1); dip = curr_drawinfo + next_lineno; @@ -1888,7 +1926,6 @@ void init_hz (void) int isntsc; beamcon0 = new_beamcon0; - isntsc = beamcon0 & 0x20 ? 0 : 1; if (hack_vpos > 0) { if (maxvpos == hack_vpos) @@ -1925,6 +1962,8 @@ void init_hz (void) minfirstline = vsstop; if (minfirstline < 2) minfirstline = 2; + if (minfirstline >= maxvpos) + minfirstline = maxvpos - 1; sprite_vblank_endline = minfirstline - 2; } /* limit to sane values */ @@ -1982,6 +2021,7 @@ static void calcdiw (void) /* display mode changed (lores, doubling etc..), recalculate everything */ void init_custom (void) { + update_mirrors(); create_cycle_diagram_table (); reset_drawing (); init_hz (); @@ -2029,7 +2069,7 @@ STATIC_INLINE uae_u16 INTENAR (void) } uae_u16 INTREQR (void) { - return intreq; + return intreqr; } STATIC_INLINE uae_u16 ADKCONR (void) { @@ -2038,8 +2078,8 @@ STATIC_INLINE uae_u16 ADKCONR (void) STATIC_INLINE uae_u16 VPOSR (void) { - unsigned int csbit = 0; - int vp = (vpos >> 8) & 7; + unsigned int csbit = 0; + int vp = (vpos >> 8) & 7; csbit |= (currprefs.chipset_mask & CSMASK_AGA) ? 0x2300 : 0; csbit |= (currprefs.chipset_mask & CSMASK_ECS_AGNUS) ? 0x2000 : 0; @@ -2065,21 +2105,40 @@ static void VPOSW (uae_u16 v) #define VHPOSR() ((uae_u16)((vpos << 8) | current_hpos ())) -static void perform_copper_write (int old_hpos); +static __inline__ int test_copper_dangerous (unsigned int address) +{ + if ((address & 0x1fe) < ((copcon & 2) ? ((currprefs.chipset_mask & CSMASK_ECS_AGNUS) ? 0 : 0x40) : 0x80)) { + cop_state.state = COP_stop; + copper_enabled_thisline = 0; + unset_special (®s, SPCFLAG_COPPER); + return 1; + } + return 0; +} + static void immediate_copper (int num) { + int pos = 0; + int oldpos = 0; + cop_state.state = COP_stop; - if (!dmaen (DMA_COPPER)) - return; cop_state.vpos = vpos; cop_state.hpos = current_hpos () & ~1; cop_state.ip = num == 1 ? cop1lc : cop2lc; - for (;;) { + while (pos < (maxvpos << 5)) { + if (oldpos > pos) + pos = oldpos; + if (!dmaen(DMA_COPPER)) + break; + if (cop_state.ip >= currprefs.chipmem_size) + break; + pos++; + oldpos = pos; cop_state.i1 = chipmem_agnus_wget (cop_state.ip); cop_state.i2 = chipmem_agnus_wget (cop_state.ip + 2); cop_state.ip += 4; if (!(cop_state.i1 & 1)) { // move - cop_state.i1 &= 0x1ff; + cop_state.i1 &= 0x1fe; if (cop_state.i1 == 0x88) { cop_state.ip = cop1lc; continue; @@ -2088,13 +2147,18 @@ static void immediate_copper (int num) cop_state.ip = cop2lc; continue; } - perform_copper_write (0); + if (test_copper_dangerous (cop_state.i1)) + break; + custom_wput_1 (0, cop_state.i1, cop_state.i2, 0); } else { // wait or skip + if ((cop_state.i1 >> 8) > ((pos >> 5) & 0xff)) + pos = (((pos >> 5) & 0x100) | ((cop_state.i1 >> 8)) << 5) | ((cop_state.i1 & 0xff) >> 3); if (cop_state.i1 >= 0xffdf && cop_state.i2 == 0xfffe) - return; + break; } } - + cop_state.state = COP_stop; + unset_special (®s, SPCFLAG_COPPER); } #define COP1LCH(V) cop1lc = (cop1lc & 0xffff) | ((uae_u32)V << 16) @@ -2102,19 +2166,15 @@ static void immediate_copper (int num) #define COP2LCH(V) cop2lc = (cop2lc & 0xffff) | ((uae_u32)V << 16) #define COP2LCL(V) cop2lc = (cop2lc & ~0xffff) | (V & 0xfffe) +static void compute_spcflag_copper (void); + static void COPJMP (int num) { +#ifdef FAST_COPPER int was_active = eventtab[ev_copper].active; +#endif int oldstrobe = cop_state.strobe; - eventtab[ev_copper].active = 0; - if (nocustom()) { - immediate_copper (num); - return; - } - if (was_active) - events_schedule (); - unset_special (®s, SPCFLAG_COPPER); cop_state.ignore_next = 0; if (!oldstrobe) @@ -2125,9 +2185,20 @@ static void COPJMP (int num) copper_enabled_thisline = 0; cop_state.strobe = num; +#ifdef FAST_COPPER + eventtab[ev_copper].active = 0; +#endif + if (nocustom()) { + immediate_copper (num); + return; + } +#ifdef FAST_COPPER + if (was_active) + events_schedule (); +#endif + if (dmaen (DMA_COPPER)) { - copper_enabled_thisline = 1; - set_special(®s, SPCFLAG_COPPER); + compute_spcflag_copper (); } else if (oldstrobe > 0 && oldstrobe != num && cop_state.state_prev == COP_wait) { /* dma disabled, copper idle and accessing both COPxJMPs -> copper stops! */ cop_state.state = COP_stop; @@ -2139,7 +2210,6 @@ STATIC_INLINE void COPCON (uae_u16 a) copcon = a; } -static void compute_spcflag_copper (void); static void DMACON (int hpos, uae_u16 v) { int oldcop, newcop; @@ -2158,12 +2228,14 @@ static void DMACON (int hpos, uae_u16 v) newcop = (dmacon & DMA_COPPER) && (dmacon & DMA_MASTER); if (oldcop != newcop) { +#ifdef FAST_COPPER eventtab[ev_copper].active = 0; +#endif if (newcop && !oldcop) { compute_spcflag_copper (); } else if (!newcop) { copper_enabled_thisline = 0; - unset_special (®s, SPCFLAG_COPPER); + unset_special (®s, SPCFLAG_COPPER); } } if (((dmacon & DMA_BLITPRI) > (oldcon & DMA_BLITPRI)) && (bltstate != BLT_done)) { @@ -2197,125 +2269,72 @@ static void DMACON (int hpos, uae_u16 v) events_schedule(); } -#define INTDELAY - -static int intlev_2 (void) +int intlev (void) { uae_u16 imask = intreq & intena; - unsigned long cycles = get_cycles (); - int c = 4; - int i; - - if (!(imask && (intena & 0x4000))) { - unset_special (®s, SPCFLAG_INT); + if (!(imask && (intena & 0x4000))) return -1; - } - for (i = 14; i >= 0; i--) { - if (imask & (1 << i)) { -#ifdef INTDELAY - if (!(irqdelay[i] && (cycles - irqcycles[i]) < c * CYCLE_UNIT)) { -#endif - irqdelay[i] = 0; - if (i == 13 || i == 14) + if (imask & (0x4000 | 0x2000)) // 13 14 return 6; - else if (i == 11 || i == 12) + if (imask & (0x1000 | 0x0800)) // 11 12 return 5; - else if (i >= 7 && i <= 10) + if (imask & (0x0400 | 0x0200 | 0x0100 | 0x0080)) // 7 8 9 10 return 4; - else if (i >= 4 && i <= 6) + if (imask & (0x0040 | 0x0020 | 0x0010)) // 4 5 6 return 3; - else if (i == 3) + if (imask & 0x0008) // 3 return 2; - else + if (imask & (0x0001 | 0x0002 | 0x0004)) // 0 1 2 return 1; - } -#ifdef INTDELAY - } -#endif - } return -1; } -int intlev (void) +static void INTENA_f(uae_u32 data) { - int il = -1; -#ifdef JIT - if (currprefs.cachesize) { - uae_u16 imask = intreq & intena; - if (imask && (intena & 0x4000)) { - if (imask & 0x6000) - il = 6; - if (imask & 0x1800) - il = 5; - if (imask & 0x0780) - il = 4; - if (imask & 0x0070) - il = 3; - if (imask & 0x0008) - il = 2; - if (imask & 0x0007) - il = 1; - } - } else { -#endif - il = intlev_2 (); - if (il >= 0 && il <= regs.intmask) - unset_special (®s, SPCFLAG_INT); -#ifdef JIT - } -#endif - return il; + doint(); } - -static void doint (void) -{ - int i; - uae_u16 imask; - - set_special (®s, SPCFLAG_INT); -#ifdef JIT - if (currprefs.cachesize) - return; -#endif - imask = intreq & intena; - if (imask && (intena & 0x4000)) { - for (i = 0; i < 15; i++) { - if ((imask & (1 << i)) && irqdelay[i] == 0) { - irqdelay[i] = 1; - irqcycles[i] = get_cycles (); - } - } - } -} - - STATIC_INLINE void INTENA (uae_u16 v) { setclr (&intena,v); - if (v & 0x8000) - doint (); + if (v & 0x8000) { + if (!currprefs.cpu_compatible > 0) + INTENA_f(0); + else + event2_newevent2 (6, 0, INTENA_f); + } } void INTREQ_0 (uae_u16 v) { - int i; setclr(&intreq, v); - - if (!(v & 0x8000)) { - for (i = 0; i < 15; i++) { - if (v & (1 << i)) - irqdelay[i] = 0; - } - } - + intreqr = intreq; doint(); } +void INTREQ_f(uae_u32 data) +{ + INTREQ_0 (data); +// serial_check_irq (); + rethink_cias (); +} + +static void INTREQ_d (uae_u16 v, int d) +{ + intreqr = intreq; + /* data in intreq is immediately available (vsync only currently because there is something unknown..) */ + setclr (&intreqr, v & (0x8000 | 0x20)); + if (!currprefs.cpu_compatible || v == 0) + INTREQ_f(v); + else + event2_newevent2(d, v, INTREQ_f); +} + void INTREQ (uae_u16 v) { - INTREQ_0 (v); -// serial_check_irq (); - rethink_cias (); + if (!currprefs.cpu_compatible) + INTREQ_f(v); + else + INTREQ_d(v, 6); } static void ADKCON (int hpos, uae_u16 v) @@ -2399,9 +2418,9 @@ static void BPLCON0 (int hpos, uae_u16 v) curr_diagram = cycle_diagram_table[fetchmode][res_bplcon0][planes_limit_bplcon0]; record_register_change (hpos, 0x100, v); - if (currprefs.chipset_mask & CSMASK_AGA) { + if (currprefs.chipset_mask & CSMASK_ECS_DENISE) { decide_sprites (hpos); - expand_sprres (); + sprres = expand_sprres (bplcon0, bplcon3); } expand_fmodes (); @@ -2434,14 +2453,18 @@ STATIC_INLINE void BPLCON2 (int hpos, uae_u16 v) STATIC_INLINE void BPLCON3 (int hpos, uae_u16 v) { - if (! (currprefs.chipset_mask & CSMASK_AGA)) + if (! (currprefs.chipset_mask & CSMASK_ECS_DENISE)) return; + if (!(currprefs.chipset_mask & CSMASK_AGA)) { + v &= 0x3f; + v |= 0x0c00; + } if (bplcon3 == v) return; decide_line (hpos); decide_sprites (hpos); bplcon3 = v; - expand_sprres (); + sprres = expand_sprres (bplcon0, bplcon3); record_register_change (hpos, 0x106, v); } @@ -2506,6 +2529,7 @@ static void DIWSTOP (int hpos, uae_u16 v) static void DIWHIGH (int hpos, uae_u16 v) { + v &= ~(0x8000 | 0x4000 | 0x0080 | 0x0040); if (diwhigh_written && diwhigh == v) return; decide_line (hpos); @@ -2628,8 +2652,10 @@ static void BLTSIZE (uae_u16 v) blt_info.vblitsize = v >> 6; blt_info.hblitsize = v & 0x3F; - if (!blt_info.vblitsize) blt_info.vblitsize = 1024; - if (!blt_info.hblitsize) blt_info.hblitsize = 64; + if (!blt_info.vblitsize) + blt_info.vblitsize = 1024; + if (!blt_info.hblitsize) + blt_info.hblitsize = 64; do_blitter (); } @@ -2657,8 +2683,7 @@ static void BLTSIZH (uae_u16 v) STATIC_INLINE void spr_arm (int num, int state) { - switch (state) - { + switch (state) { case 0: nr_armed -= spr[num].armed; spr[num].armed = 0; @@ -2685,12 +2710,9 @@ STATIC_INLINE void SPRxCTLPOS (int num) sprstartstop (s); sprxp = (sprpos[num] & 0xFF) * 2 + (sprctl[num] & 1); + sprxp <<= sprite_buffer_res; /* Quite a bit salad in this register... */ - if (currprefs.chipset_mask & CSMASK_AGA) { - /* We ignore the SHRES 35ns increment for now; SHRES support doesn't - work anyway, so we may as well restrict AGA sprites to a 70ns - resolution. */ - sprxp <<= 1; + if (currprefs.chipset_mask & CSMASK_ECS_DENISE) { sprxp |= (sprctl[num] >> 4) & 1; } s->xpos = sprxp; @@ -2785,11 +2807,12 @@ static uae_u16 COLOR_READ (int num) cr = current_colors.color_regs_aga[colreg] >> 16; cg = (current_colors.color_regs_aga[colreg] >> 8) & 0xFF; cb = current_colors.color_regs_aga[colreg] & 0xFF; - if (bplcon3 & 0x200) + if (bplcon3 & 0x200) { cval = ((cr & 15) << 8) | ((cg & 15) << 4) | ((cb & 15) << 0); - else + } else { cval = ((cr >> 4) << 8) | ((cg >> 4) << 4) | ((cb >> 4) << 0); - return cval; + } + return cval; } static void COLOR_WRITE (int hpos, uae_u16 v, int num) @@ -3041,17 +3064,6 @@ static void predict_copper (void) } #endif -static __inline__ int test_copper_dangerous (unsigned int address) -{ - if ((address & 0x1fe) < (copcon & 2 ? ((currprefs.chipset_mask & CSMASK_AGA) ? 0 : 0x40u) : 0x80u)) { - cop_state.state = COP_stop; - copper_enabled_thisline = 0; - unset_special (®s, SPCFLAG_COPPER); - return 1; - } - return 0; -} - static __inline__ void perform_copper_write (int old_hpos) { unsigned int address = cop_state.saved_i1 & 0x1FE; @@ -3067,8 +3079,6 @@ static __inline__ void perform_copper_write (int old_hpos) cop_state.state = COP_strobe_delay; } else { custom_wput_1 (old_hpos, cop_state.saved_i1, cop_state.saved_i2, 0); - cop_state.last_write = cop_state.saved_i1; - cop_state.last_write_hpos = old_hpos; old_hpos++; if (!nocustom() && cop_state.saved_i1 >= 0x140 && cop_state.saved_i1 < 0x180 && old_hpos >= SPR0_HPOS && old_hpos < SPR0_HPOS + 4 * MAX_SPRITES) { //write_log ("%d:%d %04.4X:%04.4X\n", vpos, old_hpos, cop_state.saved_i1, cop_state.saved_i2); @@ -3102,18 +3112,26 @@ static void update_copper (int until_hpos) int c_hpos = cop_state.hpos; if (nocustom()) { +#ifdef FAST_COPPER eventtab[ev_copper].active = 0; +#endif return; } +#ifdef FAST_COPPER if (eventtab[ev_copper].active) { eventtab[ev_copper].active = 0; return; } +#endif if (cop_state.state == COP_wait && vp < cop_state.vcmp) { +#ifdef FAST_COPPER eventtab[ev_copper].active = 0; +#endif copper_enabled_thisline = 0; + cop_state.state = COP_stop; + unset_special(®s, SPCFLAG_COPPER); return; } @@ -3176,14 +3194,8 @@ static void update_copper (int until_hpos) } c_hpos += 2; -#if 0 - if (copper_cant_read (old_hpos)) - continue; - -#endif if (cop_state.strobe) { - if (cop_state.strobe > 0) - cop_state.ip = cop_state.strobe == 1 ? cop1lc : cop2lc; + cop_state.ip = cop_state.strobe == 1 ? cop1lc : cop2lc; cop_state.strobe = 0; } @@ -3305,14 +3317,8 @@ static void update_copper (int until_hpos) case COP_skip1: { - //static int skipped_before; unsigned int vcmp, hcmp, vp1, hp1; - //if (! skipped_before) { - // skipped_before = 1; - // write_log ("Program uses Copper SKIP instruction.\n"); - //} - if (c_hpos >= (maxhpos & ~1)) break; @@ -3374,12 +3380,12 @@ static void compute_spcflag_copper (void) #ifdef FAST_COPPER predict_copper (); -#endif - if (! eventtab[ev_copper].active) +#endif set_special (®s, SPCFLAG_COPPER); } +#ifdef FAST_COPPER static void copper_handler (void) { /* This will take effect immediately, within the same cycle. */ @@ -3390,6 +3396,7 @@ static void copper_handler (void) eventtab[ev_copper].active = 0; } +#endif void blitter_done_notify (void) { @@ -3419,9 +3426,9 @@ STATIC_INLINE void sync_copper_with_cpu (int hpos, int do_schedule, unsigned int STATIC_INLINE void sync_copper_with_cpu (int hpos, int do_schedule) #endif { +#ifdef FAST_COPPER /* Need to let the copper advance to the current position. */ if (eventtab[ev_copper].active) { -#ifdef FAST_COPPER if (hpos != maxhpos) { /* There might be reasons why we don't actually need to bother updating the copper. */ @@ -3431,13 +3438,13 @@ STATIC_INLINE void sync_copper_with_cpu (int hpos, int do_schedule) if ((cop_state.regtypes_modified & regtypes[addr & 0x1FE]) == 0) return; } -#endif eventtab[ev_copper].active = 0; if (do_schedule) events_schedule (); set_special (®s, SPCFLAG_COPPER); } +#endif if (copper_enabled_thisline) update_copper (hpos); } @@ -3554,23 +3561,6 @@ static void do_sprites (int hpos) int maxspr, minspr; int i; - /* I don't know whether this is right. Some programs write the sprite pointers - * directly at the start of the copper list. With the test against currvp, the - * first two words of data are read on the second line in the frame. The problem - * occurs when the program jumps to another copperlist a few lines further down - * which _also_ writes the sprite pointer registers. This means that a) writing - * to the sprite pointers sets the state to SPR_restart; or b) that sprite DMA - * is disabled until the end of the vertical blanking interval. The HRM - * isn't clear - it says that the vertical sprite position can be set to any - * value, but this wouldn't be the first mistake... */ - /* Update: I modified one of the programs to write the sprite pointers the - * second time only _after_ the VBlank interval, and it showed the same behaviour - * as it did unmodified under UAE with the above check. This indicates that the - * solution below is correct. */ - /* Another update: seems like we have to use the NTSC value here (see Sanity Turmoil - * demo). */ - /* Maximum for Sanity Turmoil: 27. - Minimum for Sanity Arte: 22. */ if (vpos < sprite_vblank_endline) return; @@ -3727,8 +3717,7 @@ static void vsync_handler (void) handle_events (); - INTREQ (0x8020); - + INTREQ_d (0x8000 | 0x0020, 3); if (bplcon0 & 4) lof ^= 0x8000; @@ -3738,6 +3727,20 @@ static void vsync_handler (void) picasso_handle_vsync (); #endif + if (quit_program > 0) { + /* prevent possible infinite loop at wait_cycles().. */ + framecnt = 0; + reset_decisions (); + return; + } + + if (vsync_handler_cnt_disk_change == 0) { + /* resolution_check_change (); */ + DISK_check_change (); + vsync_handler_cnt_disk_change = 5; //20; + } + vsync_handler_cnt_disk_change--; + vsync_handle_redraw (lof, lof_changed); #ifdef JIT @@ -3755,35 +3758,24 @@ static void vsync_handler (void) speedup_timelimit = -2000; // 2 ms for non JIT } - if (quit_program > 0) { - /* prevent possible infinite loop at wait_cycles().. */ - framecnt = 0; - reset_decisions (); - return; - } - - if (vsync_handler_cnt_disk_change == 0) { - /* resolution_check_change (); */ - DISK_check_change (); - vsync_handler_cnt_disk_change = 5; //20; - } - vsync_handler_cnt_disk_change--; - - /* For now, let's only allow this to change at vsync time. It gets too +/* For now, let's only allow this to change at vsync time. It gets too * hairy otherwise. */ if ((beamcon0 & (0x20|0x80)) != (new_beamcon0 & (0x20|0x80)) || hack_vpos) init_hz (); lof_changed = 0; +#ifdef FAST_COPPER eventtab[ev_copper].active = 0; +#endif COPJMP (1); - init_hardware_frame (); - if (timehack_alive > 0) timehack_alive--; inputdevice_vsync (); + filesys_vsync (); + + init_hardware_frame (); } #ifdef JIT @@ -3819,10 +3811,14 @@ static void frh_handler(void) } #endif +static void CIA_vsync_prehandler(void) +{ + CIA_vsync_handler (); + ciavsync_counter++; +} + static void hsync_handler (void) { - static int ciahsync; - if (!nocustom()) { #ifdef FAST_COPPER /* Using 0x8A makes sure that we don't accidentally trip over the @@ -3854,15 +3850,9 @@ static void hsync_handler (void) picasso_handle_hsync (); #endif - ciahsync++; - if (ciahsync >= (currprefs.ntscmode ? MAXVPOS_NTSC : MAXVPOS_PAL) * MAXHPOS_PAL / maxhpos) { /* not so perfect.. */ - CIA_vsync_handler (); - ciahsync = 0; - } - // Slows down emulation without improving compatability a lot // if ((currprefs.chipset_mask & CSMASK_AGA) || (!currprefs.chipset_mask & CSMASK_ECS_AGNUS)) -// last_custom_value = rand (); +// last_custom_value = uaerand (); // else // last_custom_value = 0xffff; @@ -3887,6 +3877,8 @@ static void hsync_handler (void) { vpos=0; vsync_handler (); + vsync_counter++; + CIA_vsync_prehandler(); } DISK_hsync (maxhpos); @@ -3910,22 +3902,17 @@ static void hsync_handler (void) #endif if (!nocustom()) { - if (!nodraw ()) { int lineno = vpos; next_lineno = lineno; reset_decisions (); - } } -#ifdef FILESYS if (uae_int_requested) { - set_uae_int_flag (); INTREQ (0x8000 | 0x0008); } -#endif + /* See if there's a chance of a copper wait ending this line. */ cop_state.hpos = 0; - cop_state.last_write = 0; compute_spcflag_copper (); inputdevice_hsync (); @@ -3986,6 +3973,83 @@ static void init_regtypes (void) } #endif +static void MISC_handler(void) +{ + int i, recheck; + evt mintime; + evt ct = get_cycles(); + static int recursive; + + if (recursive) + return; + recursive++; + eventtab[ev_misc].active = 0; + recheck = 1; + while (recheck) { + recheck = 0; + mintime = ~0L; + for (i = 0; i < ev2_max; i++) { + if (eventtab2[i].active) { + if (eventtab2[i].evtime == ct) { + eventtab2[i].active = 0; + eventtab2[i].handler(eventtab2[i].data); + if (eventtab2[i].active) + recheck = 1; + } else { + evt eventtime = eventtab2[i].evtime - ct; + if (eventtime < mintime) + mintime = eventtime; + } + } + } + } + if (mintime != ~0L) { + eventtab[ev_misc].active = 1; + eventtab[ev_misc].oldcycles = ct; + eventtab[ev_misc].evtime = ct + mintime; + events_schedule(); + } + recursive--; +} + +STATIC_INLINE void event2_newevent_x(int no, evt t, uae_u32 data, evfunc2 func) +{ + evt et = t * CYCLE_UNIT + get_cycles(); + + if (no < 0) { + for (no = ev2_misc; no < ev2_max; no++) { + if (!eventtab2[no].active) + break; + if (eventtab2[no].evtime == et && eventtab2[no].handler == func) { + eventtab2[no].handler(eventtab2[no].data); + break; + } + } + if (no == ev2_max) { + write_log("out of event2's! PC=%x\n", M68K_GETPC); + return; + } + } + eventtab2[no].active = 1; + eventtab2[no].evtime = et; + eventtab2[no].handler = func; + eventtab2[no].data = data; + MISC_handler(); +} +void event2_newevent(int no, evt t) +{ + event2_newevent_x(no, t, 0, eventtab2[no].handler); +} +void event2_newevent2(evt t, uae_u32 data, evfunc2 func) +{ + event2_newevent_x(-1, t, data, func); +} + +void event2_remevent(int no) +{ + eventtab2[no].active = 0; +} + void init_eventtab (void) { int i; @@ -3996,32 +4060,41 @@ void init_eventtab (void) eventtab[i].active = 0; eventtab[i].oldcycles = 0; } + for (i = 0; i < ev2_max; i++) { + eventtab2[i].active = 0; + } eventtab[ev_cia].handler = CIA_handler; eventtab[ev_hsync].handler = hsync_handler; eventtab[ev_hsync].evtime = get_cycles () + HSYNCTIME; eventtab[ev_hsync].active = 1; - +#ifdef FAST_COPPER eventtab[ev_copper].handler = copper_handler; eventtab[ev_copper].active = 0; - eventtab[ev_blitter].handler = blitter_handler; - eventtab[ev_blitter].active = 0; - eventtab[ev_disk].handler = DISK_handler; - eventtab[ev_disk].active = 0; +#endif + eventtab[ev_misc].handler = MISC_handler; eventtab[ev_audio].handler = audio_evhandler; - eventtab[ev_audio].active = 0; + + eventtab2[ev2_blitter].handler = blitter_handler; + eventtab2[ev2_disk].handler = DISK_handler; + events_schedule (); } -void customreset (void) +void customreset (int hardreset) { int i; int zero = 0; + reset_all_systems (); + hsync_counter = 0; + vsync_counter = 0; + ciavsync_counter = 0; if (! savestate_state) { currprefs.chipset_mask = changed_prefs.chipset_mask; - if ((currprefs.chipset_mask & CSMASK_AGA) == 0) { + update_mirrors(); + if (!aga_mode) { for (i = 0; i < 32; i++) { current_colors.color_regs_ecs[i] = 0; current_colors.acolors[i] = xcolors[0]; @@ -4048,8 +4121,8 @@ void customreset (void) planes_bplcon0=0; planes_limit_bplcon0=0; res_bplcon0=0; - bplcon4 = 0x11; /* Get AGA chipset into ECS compatibility mode */ - bplcon3 = 0xC00; + bplcon4 = 0x0011; /* Get AGA chipset into ECS compatibility mode */ + bplcon3 = 0x0C00; diwhigh = 0; diwhigh_written = 0; hdiwstate = DIW_waiting_start; // this does not reset at vblank @@ -4119,8 +4192,8 @@ void customreset (void) uae_u32 vv; audio_update_adkmasks (); - INTENA (0); - INTREQ (0); + INTENA_f (0); + INTREQ_f (0); if (diwhigh) diwhigh_written = 1; @@ -4161,7 +4234,10 @@ void customreset (void) events_schedule (); } } - expand_sprres (); + sprres = expand_sprres (bplcon0, bplcon3); + + if (hardreset) + rtc_hardreset(); } void dumpcustom (void) @@ -4225,15 +4301,15 @@ int custom_init (void) return 0; #ifdef AUTOCONFIG - { + if (uae_boot_rom) { uaecptr pos; pos = here (); - org (RTAREA_BASE+0xFF70); + org (rtarea_base + 0xFF70); calltrap (deftrap (mousehack_helper_old)); dw (RTS); - org (RTAREA_BASE+0xFFA0); + org (rtarea_base + 0xFFA0); calltrap (deftrap (timehack_helper)); dw (RTS); @@ -4257,6 +4333,8 @@ int custom_init (void) static uae_u32 REGPARAM3 custom_lget (uaecptr) REGPARAM; static uae_u32 REGPARAM3 custom_wget (uaecptr) REGPARAM; static uae_u32 REGPARAM3 custom_bget (uaecptr) REGPARAM; +static uae_u32 REGPARAM3 custom_lgeti (uaecptr) REGPARAM; +static uae_u32 REGPARAM3 custom_wgeti (uaecptr) REGPARAM; static void REGPARAM3 custom_lput (uaecptr, uae_u32) REGPARAM; static void REGPARAM3 custom_wput (uaecptr, uae_u32) REGPARAM; static void REGPARAM3 custom_bput (uaecptr, uae_u32) REGPARAM; @@ -4264,9 +4342,23 @@ static void REGPARAM3 custom_bput (uaecptr, uae_u32) REGPARAM; addrbank custom_bank = { custom_lget, custom_wget, custom_bget, custom_lput, custom_wput, custom_bput, - default_xlate, default_check, NULL, "Custom chipset" + default_xlate, default_check, NULL, "Custom chipset", + custom_lgeti, custom_wgeti, ABFLAG_IO }; +static uae_u32 REGPARAM2 custom_wgeti (uaecptr addr) +{ + if (currprefs.cpu_model >= 68020) + return dummy_wgeti(addr); + return custom_wget(addr); +} +static uae_u32 REGPARAM2 custom_lgeti (uaecptr addr) +{ + if (currprefs.cpu_model >= 68020) + return dummy_lgeti(addr); + return custom_lget(addr); +} + STATIC_INLINE uae_u32 REGPARAM2 custom_wget_1 (uaecptr addr, int noput) { uae_u16 v; @@ -4558,6 +4650,12 @@ static void REGPARAM2 custom_wput (uaecptr addr, uae_u32 value) #else sync_copper_with_cpu (hpos, 1); #endif + if (addr & 1) { + addr &= ~1; + custom_wput_1 (hpos, addr, (value >> 8) | (value & 0xff00), 0); + custom_wput_1 (hpos, addr + 2, (value << 8) | (value & 0x00ff), 0); + return; + } custom_wput_1 (hpos, addr, value, 0); } @@ -4583,6 +4681,14 @@ static void REGPARAM2 custom_lput(uaecptr addr, uae_u32 value) void custom_prepare_savestate (void) { + int i; + + for (i = 0; i < ev2_max; i++) { + if (eventtab2[i].active) { + eventtab2[i].active = 0; + eventtab2[i].handler(eventtab2[i].data); + } + } } #define RB restore_u8 () @@ -4598,6 +4704,7 @@ uae_u8 *restore_custom (uae_u8 *src) audio_reset (); changed_prefs.chipset_mask = currprefs.chipset_mask = RL; + update_mirrors(); blt_info.bltddat = RW; /* 000 BLTDDAT */ ru16 = RW; /* 002 DMACONR -> see also 096 */ if((ru16 & 0x4000) == 0) @@ -4672,7 +4779,7 @@ uae_u8 *restore_custom (uae_u8 *src) dmacon = RW & ~(0x2000|0x4000); /* 096 DMACON */ ru16=RW; CLXCON(ru16); /* 098 CLXCON */ intena = RW; /* 09A INTENA */ - intreq = RW; /* 09C INTREQ */ + intreq = intreqr = RW; /* 09C INTREQ */ adkcon = RW; /* 09E ADKCON */ /* 0A0 - 0DE Audio regs */ for (i = 0; i < 8; i++) @@ -4709,10 +4816,7 @@ uae_u8 *restore_custom (uae_u8 *src) vsstrt = RW; /* 1E0 VSSTT */ hcenter = RW; /* 1E2 HCENTER */ diwhigh = RW; /* 1E4 DIWHIGH */ - if (diwhigh & 0x8000) - diwhigh_written = 1; - else - diwhigh_written = 0; + diwhigh_written = (diwhigh & 0x8000) ? 1 : 0; diwhigh &= 0x7fff; RW; /* 1E6 ? */ @@ -4899,8 +5003,9 @@ uae_u8 *restore_custom_agacolors (uae_u8 *src) { int i; - for (i = 0; i < 256; i++) + for (i = 0; i < 256; i++) { current_colors.color_regs_aga[i] = RL; + } return src; } @@ -4943,7 +5048,7 @@ uae_u8 *save_custom_sprite(int num, int *len, uae_u8 *dstptr) if (dstptr) dstbak = dst = dstptr; else - dstbak = dst = (uae_u8 *)malloc (25); + dstbak = dst = (uae_u8 *)malloc (30); SL (spr[num].pt); /* 120-13E SPRxPT */ SW (sprpos[num]); /* 1x0 SPRxPOS */ SW (sprctl[num]); /* 1x2 SPRxPOS */ @@ -4965,10 +5070,8 @@ uae_u8 *save_custom_sprite(int num, int *len, uae_u8 *dstptr) void check_prefs_changed_custom (void) { currprefs.gfx_framerate = changed_prefs.gfx_framerate; - if (inputdevice_config_change_test ()) { + if (inputdevice_config_change_test ()) inputdevice_copyconfig (&changed_prefs, &currprefs); - inputdevice_updateconfig (&currprefs); - } currprefs.immediate_blits = changed_prefs.immediate_blits; currprefs.pandora_partial_blits = changed_prefs.pandora_partial_blits; currprefs.collision_level = changed_prefs.collision_level; diff --git a/src/disk.cpp b/src/disk.cpp index f9b0c0e4..83a6e104 100644 --- a/src/disk.cpp +++ b/src/disk.cpp @@ -75,8 +75,7 @@ static uae_u8 writebuffer[544 * 11 * DDHDMULT]; #define DISK_INDEXSYNC 1 #define DISK_WORDSYNC 2 -#define DISK_MOTORDELAY 4 -#define DISK_REVOLUTION 8 /* 8,16,32,64 */ +#define DISK_REVOLUTION 4 /* 8,16,32,64 */ #define DSKREADY_TIME 4 #define DSKREADY_DOWN_TIME 10 @@ -464,6 +463,14 @@ static int get_floppy_speed (void) return m; } +static int get_floppy_speed2 (drive *drv) +{ + int m = get_floppy_speed () * drv->tracklen / (2 * 8 * FLOPPY_WRITE_LEN * drv->ddhd); + if (m <= 0) + m = 1; + return m; +} + static const char *drive_id_name (drive *drv) { switch (drv->drive_id) @@ -471,6 +478,7 @@ static const char *drive_id_name (drive *drv) case DRIVE_ID_35HD : return "3.5HD"; case DRIVE_ID_525SD: return "5.25SD"; case DRIVE_ID_35DD : return "3.5DD"; + case DRIVE_ID_NONE : return "NONE"; } return "UNKNOWN"; } @@ -538,19 +546,24 @@ static void drive_image_free (drive *drv) static int drive_insert (drive * drv, struct uae_prefs *p, int dnum, const char *fname); +static void reset_drive_gui(int i) +{ + gui_data.drive_disabled[i] = 0; + gui_data.df[i][0] = 0; + gui_data.crc32[i] = 0; + if (currprefs.dfxtype[i] < 0) + gui_data.drive_disabled[i] = 1; +} + static void reset_drive(int i) { drive *drv = &floppy[i]; drive_image_free (drv); drv->motoroff = 1; disabled &= ~(1 << i); - gui_data.drive_disabled[i] = 0; - gui_data.df[i][0] = 0; - gui_data.crc32[i] = 0; - if (currprefs.dfxtype[i] < 0) { + if (currprefs.dfxtype[i] < 0) disabled |= 1 << i; - gui_data.drive_disabled[i] = 1; - } + reset_drive_gui(i); /* most internal Amiga floppy drives won't enable * diskready until motor is running at full speed * and next indexsync has been passed @@ -948,7 +961,7 @@ static int drive_insert (drive *drv, struct uae_prefs *p, int dnum, const char * drv->num_tracks = size / (512 * (drv->num_secs = 11)); if (drv->num_tracks > MAX_TRACKS) - write_log ("Your diskfile is too big!\n"); + write_log ("Your diskfile is too big, %d bytes!\n", size); for (i = 0; i < drv->num_tracks; i++) { tid = &drv->trackdata[i]; tid->type = TRACK_AMIGADOS; @@ -960,17 +973,19 @@ static int drive_insert (drive *drv, struct uae_prefs *p, int dnum, const char * openwritefile (drv, 0); drive_settype_id (drv); /* Set DD or HD drive */ drive_fill_bigbuf (drv, 1); - drv->mfmpos = (rand () | (rand () << 16)) % drv->tracklen; + drv->mfmpos = uaerand (); + drv->mfmpos |= (uaerand () << 16); + drv->mfmpos %= drv->tracklen; drv->prevtracklen = 0; return 1; } static void rand_shifter (drive *drv) { - int r = ((rand () >> 4) & 7) + 1; + int r = ((uaerand () >> 4) & 7) + 1; while (r-- > 0) { word <<= 1; - word |= (rand () & 0x1000) ? 1 : 0; + word |= (uaerand () & 0x1000) ? 1 : 0; bitoffset++; bitoffset &= 15; } @@ -1026,6 +1041,11 @@ static int drive_running (drive * drv) return !drv->motoroff; } +static void motordelay_func(uae_u32 v) +{ + floppy[v].motordelay = 0; +} + static void drive_motor (drive * drv, int off) { if (drv->motoroff && !off) { @@ -1035,13 +1055,9 @@ static void drive_motor (drive * drv, int off) if (!drv->motoroff && off) { drv->drive_id_scnt = 0; /* Reset id shift reg counter */ drv->dskready_down_time = DSKREADY_DOWN_TIME; - if (currprefs.cpu_level <= 1) { + if (currprefs.cpu_model <= 68010 && currprefs.m68k_speed == 0) { drv->motordelay = 1; - diskevent_flag = DISK_MOTORDELAY; - eventtab[ev_disk].oldcycles = get_cycles (); - eventtab[ev_disk].evtime = get_cycles () + 30 * CYCLE_UNIT; - eventtab[ev_disk].active = 1; - events_schedule (); + event2_newevent2(30, drv - floppy, motordelay_func); } } drv->motoroff = off; @@ -1113,20 +1129,21 @@ static void decode_pcdos (drive *drv) uae_u8 secbuf[700]; uae_u16 crc16; trackid *ti = drv->trackdata + tr; + int tracklen = 12500; mfm2 = drv->bigmfmbuf; *mfm2++ = 0x9254; - memset (secbuf, 0x4e, 80); // 94 - memset (secbuf + 80, 0x00, 12); // 12 - secbuf[92] = 0xc2; - secbuf[93] = 0xc2; - secbuf[94] = 0xc2; - secbuf[95] = 0xfc; - memset (secbuf + 96, 0x4e, 50); // 50 - dstmfmbuf = mfmcoder(secbuf, mfm2, 146); - mfm2[92] = 0x5224; - mfm2[93] = 0x5224; - mfm2[94] = 0x5224; + memset (secbuf, 0x4e, 40); + memset (secbuf + 40, 0x00, 12); + secbuf[52] = 0xc2; + secbuf[53] = 0xc2; + secbuf[54] = 0xc2; + secbuf[55] = 0xfc; + memset (secbuf + 56, 0x4e, 40); + dstmfmbuf = mfmcoder (secbuf, mfm2, 96); + mfm2[52] = 0x5224; + mfm2[53] = 0x5224; + mfm2[54] = 0x5224; for (i = 0; i < drv->num_secs; i++) { mfm2 = dstmfmbuf; memset (secbuf, 0x00, 12); @@ -1151,7 +1168,7 @@ static void decode_pcdos (drive *drv) crc16 = get_crc16(secbuf + 56, 3 + 1 + 512); secbuf[60 + 512] = crc16 >> 8; secbuf[61 + 512] = crc16 & 0xff; - memset(secbuf + 512 + 62, 0x4e, 76 / drv->ddhd); + memset(secbuf + 512 + 62, 0x4e, (tracklen / 2 - 96) / drv->num_secs - 574); dstmfmbuf = mfmcoder(secbuf, mfm2, 60 + 512 + 2 + 76 / drv->ddhd); mfm2[12] = 0x4489; mfm2[13] = 0x4489; @@ -1160,7 +1177,7 @@ static void decode_pcdos (drive *drv) mfm2[57] = 0x4489; mfm2[58] = 0x4489; } - for (i = 0; i < 200; i++) + while (dstmfmbuf - drv->bigmfmbuf < tracklen / 2) *dstmfmbuf++ = 0x9254; drv->skipoffset = 0; drv->tracklen = (dstmfmbuf - drv->bigmfmbuf) * 16; @@ -1333,7 +1350,7 @@ static void drive_fill_bigbuf (drive * drv, int force) drv->tracklen = FLOPPY_WRITE_LEN * drv->ddhd * 2 * 8; memset (drv->bigmfmbuf, 0, FLOPPY_WRITE_LEN * 2 * drv->ddhd); } - drv->trackspeed = get_floppy_speed() * drv->tracklen / (2 * 8 * FLOPPY_WRITE_LEN * drv->ddhd); + drv->trackspeed = get_floppy_speed2 (drv); updatemfmpos (drv); } @@ -1933,13 +1950,13 @@ void DISK_check_change (void) currprefs.dfxtype[i] = changed_prefs.dfxtype[i]; reset_drive (i); } - if (strcmp (currprefs.df[i], changed_prefs.df[i])) + if (drv->dskchange_time == 0 && strcmp (currprefs.df[i], changed_prefs.df[i])) disk_insert (i, changed_prefs.df[i]); gui_unlock (); if (drv->dskready_down_time > 0) drv->dskready_down_time--; /* emulate drive motor turn on time */ - if (drv->dskready_time) { + if (drv->dskready_time && !drive_empty(drv)) { drv->dskready_time--; if (drv->dskready_time == 0) drv->dskready = 1; @@ -1990,12 +2007,11 @@ void DISK_select (uae_u8 data) } } - selected |= disabled; if (step != step_pulse) { step = step_pulse; if (step && !savestate_state) { for (dr = 0; dr < MAX_FLOPPY_DRIVES; dr++) { - if (!(selected & (1 << dr))) { + if (!((selected | disabled) & (1 << dr))) { drive_step (floppy + dr); if (floppy[dr].indexhackmode > 1 && (data & 0x80)) floppy[dr].indexhack = 1; @@ -2012,6 +2028,7 @@ void DISK_select (uae_u8 data) drv->drive_id_scnt++; drv->drive_id_scnt &= 31; drv->idbit = (drv->drive_id & (1L << (31 - drv->drive_id_scnt))) ? 1 : 0; + if (!(disabled & (1 << dr))) { if ((prevdata & 0x80) == 0 || (data & 0x80) == 0) { /* motor off: if motor bit = 0 in prevdata or data -> turn motor on */ drive_motor (drv, 0); @@ -2020,6 +2037,7 @@ void DISK_select (uae_u8 data) -> turn motor off */ drive_motor (drv, 1); } + } if (currprefs.dfxtype[dr] == DRV_35_DD) { if (dr == 0) /* A500/A2000 internal drive always returns 0 */ drv->idbit = 0; @@ -2043,7 +2061,7 @@ uae_u8 DISK_status (void) for (dr = 0; dr < MAX_FLOPPY_DRIVES; dr++) { drive *drv = floppy + dr; - if (!(selected & (1 << dr))) { + if (!((selected | disabled) & (1 << dr))) { if (drive_running (drv)) { if (drv->dskready && !drv->indexhack && currprefs.dfxtype[dr] != DRV_35_DD_ESCOM) st &= ~0x20; @@ -2111,14 +2129,14 @@ void dumpdisk (void) static void disk_dmafinished (void) { - INTREQ (0x8002); + INTREQ (0x8000 | 0x0002); longwritemode = 0; dskdmaen = 0; } static void fetchnextrevolution (drive *drv) { - drv->trackspeed = get_floppy_speed () * drv->tracklen / (2 * 8 * FLOPPY_WRITE_LEN * drv->ddhd); + drv->trackspeed = get_floppy_speed2 (drv); if (!drv->multi_revolution) return; switch (drv->filetype) @@ -2136,10 +2154,11 @@ static void fetchnextrevolution (drive *drv) } } -void DISK_handler (void) +void DISK_handler (uae_u32 data) { int flag = diskevent_flag; - eventtab[ev_disk].active = 0; + + event2_remevent(ev2_disk); DISK_update (disk_sync_cycle); if (flag & (DISK_REVOLUTION << 0)) fetchnextrevolution (&floppy[0]); @@ -2153,7 +2172,6 @@ void DISK_handler (void) INTREQ (0x8000 | 0x1000); if (flag & DISK_INDEXSYNC) cia_diskindex (); - floppy[0].motordelay = floppy[1].motordelay = floppy[2].motordelay = floppy[3].motordelay = 0; } static void disk_doupdate_write (drive * drv, int floppybits) @@ -2184,8 +2202,11 @@ static void disk_doupdate_write (drive * drv, int floppybits) if (!bitoffset) { for (dr = 0; dr < MAX_FLOPPY_DRIVES ; dr++) { drive *drv2 = &floppy[dr]; - if (drives[dr]) - drv2->bigmfmbuf[drv2->mfmpos >> 4] = get_word (dskpt); + uae_u16 w = get_word (dskpt); + if (drives[dr]) { + drv2->bigmfmbuf[drv2->mfmpos >> 4] = w; + drv2->bigmfmbuf[(drv2->mfmpos >> 4) + 1] = 0x5555; + } } dskpt += 2; dsklength--; @@ -2208,8 +2229,11 @@ static void updatetrackspeed (drive *drv, int mfmpos) if (dskdmaen < 3) { uae_u16 *p = drv->tracktiming; p += mfmpos / 8; - drv->trackspeed = get_floppy_speed () * drv->tracklen / (2 * 8 * FLOPPY_WRITE_LEN * drv->ddhd); + drv->trackspeed = get_floppy_speed2 (drv); drv->trackspeed = drv->trackspeed * p[0] / 1000; + if (drv->trackspeed < 700 || drv->trackspeed > 3000) { + drv->trackspeed = 1000; + } } } @@ -2230,7 +2254,7 @@ static void disk_doupdate_predict (drive * drv, int startcycle) tword <<= 1; if (!drive_empty (drv)) { if (unformatted (drv)) - tword |= (rand() & 0x1000) ? 1 : 0; + tword |= (uaerand() & 0x1000) ? 1 : 0; else tword |= getonebit (drv->bigmfmbuf, mfmpos); } @@ -2264,10 +2288,32 @@ static void disk_doupdate_predict (drive * drv, int startcycle) updatetrackspeed (drv, drv->mfmpos); if (diskevent_flag) { disk_sync_cycle = startcycle >> 8; - eventtab[ev_disk].oldcycles = get_cycles (); - eventtab[ev_disk].evtime = get_cycles () + startcycle - firstcycle; - eventtab[ev_disk].active = 1; - events_schedule (); + event2_newevent(ev2_disk, (startcycle - firstcycle) / CYCLE_UNIT); + } +} + +static void disk_doupdate_read_nothing (int floppybits) +{ + int j = 0, k = 1, l = 0; + + while (floppybits >= get_floppy_speed()) { + word <<= 1; + if (bitoffset == 15 && dma_enable && dskdmaen == 2 && dsklength >= 0) { + if (dsklength > 0) { + put_word (dskpt, word); + dskpt += 2; + } + dsklength--; + if (dsklength <= 0) + disk_dmafinished (); + } + if ((bitoffset & 7) == 7) { + dskbytr_val = word & 0xff; + dskbytr_val |= 0x8000; + } + bitoffset++; + bitoffset &= 15; + floppybits -= get_floppy_speed(); } } @@ -2281,7 +2327,7 @@ static void disk_doupdate_read (drive * drv, int floppybits) word <<= 1; if (!drive_empty (drv)) { if (unformatted (drv)) - word |= (rand() & 0x1000) ? 1 : 0; + word |= (uaerand() & 0x1000) ? 1 : 0; else word |= getonebit (drv->bigmfmbuf, drv->mfmpos); } @@ -2419,8 +2465,9 @@ void DISK_update (int tohpos) int dr; int cycles = (tohpos << 8) - disk_hpos; int startcycle = disk_hpos; + int didread; - disk_jitter = ((rand () >> 4) & 3) + 1; + disk_jitter = ((uaerand () >> 4) & 3) + 1; if (disk_jitter > 2) disk_jitter = 1; if (cycles <= 0) @@ -2447,7 +2494,7 @@ void DISK_update (int tohpos) drive_fill_bigbuf (drv, 0); drv->mfmpos %= drv->tracklen; } - + didread = 0; for (dr = 0; dr < MAX_FLOPPY_DRIVES; dr++) { drive *drv = &floppy[dr]; if (drv->motoroff) @@ -2460,13 +2507,21 @@ void DISK_update (int tohpos) disk_doupdate_read (drv, drv->floppybitcounter); disk_doupdate_predict (drv, disk_hpos); drv->floppybitcounter %= drv->trackspeed; + didread = 1; break; } + /* no floppy selected but read dma */ + if (!didread && dskdmaen == 2) { + disk_doupdate_read_nothing (cycles); + } + } void DSKLEN (uae_u16 v, int hpos) { int dr, prev = dsklen; + int noselected = 0; + int motormask; DISK_update (hpos); if ((v & 0x8000) && (dsklen & 0x8000)) { @@ -2499,6 +2554,18 @@ void DSKLEN (uae_u16 v, int hpos) if (dsklength == 1) dsklength = 0; + motormask = 0; + for (dr = 0; dr < MAX_FLOPPY_DRIVES; dr++) { + drive *drv = &floppy[dr]; + if (drv->motoroff) + continue; + motormask |= 1 << dr; + if ((selected & (1 << dr)) == 0) + break; + } + if (dr == 4) { + noselected = 1; + } for (dr = 0; dr < MAX_FLOPPY_DRIVES; dr++) update_drive_gui (dr); @@ -2552,13 +2619,14 @@ void DSKLEN (uae_u16 v, int hpos) pos += 16; pos %= drv->tracklen; } - INTREQ (0x9000); + INTREQ_f (0x8000 | 0x1000); done = 1; } else if (dskdmaen == 3) { /* TURBO write */ for (i = 0; i < dsklength; i++) { - drv->bigmfmbuf[pos >> 4] = get_word (dskpt + i * 2); + uae_u16 w = get_word (dskpt + i * 2); + drv->bigmfmbuf[pos >> 4] = w; pos += 16; pos %= drv->tracklen; } @@ -2566,6 +2634,19 @@ void DSKLEN (uae_u16 v, int hpos) done = 1; } } + if (!done && noselected) { + while (dsklength-- > 0) { + if (dskdmaen == 3) { + uae_u16 w = get_word (dskpt); + } else { + put_word (dskpt, 0); + } + dskpt += 2; + } + INTREQ_f (0x8000 | 0x1000); + done = 1; + } + if (done) { linecounter = 2; dskdmaen = 0; @@ -2644,6 +2725,7 @@ int DISK_examine_image (struct uae_prefs *p, int num, uae_u32 *crc32) int ret, i; drive *drv = &floppy[num]; uae_u32 dos, crc, crc2; + int wasdelayed = drv->dskchange_time; ret = 0; drv->cyl = 0; @@ -2671,9 +2753,15 @@ int DISK_examine_image (struct uae_prefs *p, int num, uae_u32 *crc32) crc++; crc += v; } + if (dos == 0x4b49434b) { /* KICK */ + ret = 10; + goto end; + } crc ^= 0xffffffff; - if (crc != crc2) - return 3; + if (crc != crc2) { + ret = 3; + goto end; + } if (dos == 0x444f5300) ret = 10; else if (dos == 0x444f5301 || dos == 0x444f5302 || dos == 0x444f5303) @@ -2684,6 +2772,12 @@ int DISK_examine_image (struct uae_prefs *p, int num, uae_u32 *crc32) ret = 4; end: drive_image_free (drv); + if (wasdelayed > 1) { + drive_eject (drv); + currprefs.df[num][0] = 0; + drv->dskchange_time = wasdelayed; + disk_insert (num, drv->newname); + } return ret; } @@ -2706,10 +2800,16 @@ void DISK_restore_custom (uae_u32 pdskpt, uae_u16 pdsklength, uae_u16 pdskbytr) dskbytr_val = pdskbytr; } +void restore_disk_finish (void) +{ +} + uae_u8 *restore_disk(int num,uae_u8 *src) { drive *drv; int state; + char old[MAX_DPATH]; + int newis; drive_type dfxtype; drv = &floppy[num]; @@ -2742,6 +2842,11 @@ uae_u8 *restore_disk(int num,uae_u8 *src) } changed_prefs.dfxtype[num] = dfxtype; } + drv->indexhackmode = 0; + if (num == 0 && currprefs.dfxtype[num] == 0) + drv->indexhackmode = 1; + drv->buffered_cyl = -1; + drv->buffered_side = -1; drv->cyl = restore_u8 (); drv->dskready = restore_u8 (); drv->drive_id_scnt = restore_u8 (); @@ -2749,12 +2854,26 @@ uae_u8 *restore_disk(int num,uae_u8 *src) drv->dskchange = 0; drv->dskchange_time = 0; restore_u32 (); + strcpy (old, currprefs.df[num]); strncpy(changed_prefs.df[num], (char *)src,255); + newis = changed_prefs.df[num][0] ? 1 : 0; src+=strlen((char *)src)+1; - drive_insert (floppy + num, &currprefs, num, changed_prefs.df[num]); - if (drive_empty (floppy + num)) - drv->dskchange = 1; - + if (!(disabled & (1 << num))) { + if (!newis) { + drv->dskchange = 1; + } else { + drive_insert (floppy + num, &currprefs, num, changed_prefs.df[num]); + if (drive_empty (floppy + num)) { + if (newis && old[0]) { + strcpy (changed_prefs.df[num], old); + drive_insert (floppy + num, &currprefs, num, changed_prefs.df[num]); + if (drive_empty (floppy + num)) + drv->dskchange = 1; + } + } + } + } + reset_drive_gui(num); return src; } @@ -2789,7 +2908,7 @@ uae_u8 *save_disk(int num, int *len, uae_u8 *dstptr) else dstbak = dst = (uae_u8 *)malloc (2+1+1+1+1+4+4+256); save_u32 (drv->drive_id); /* drive type ID */ - save_u8 ((drv->motoroff ? 0:1) | ((disabled & (1 << num)) ? 2 : 0) | (drv->idbit ? 4 : 0)); + save_u8 ((drv->motoroff ? 0:1) | ((disabled & (1 << num)) ? 2 : 0) | (drv->idbit ? 4 : 0) | (drv->dskchange ? 8 : 0)); save_u8 (drv->cyl); /* cylinder */ save_u8 (drv->dskready); /* dskready */ save_u8 (drv->drive_id_scnt); /* id mode position */ diff --git a/src/drawing.cpp b/src/drawing.cpp index 02372222..028fd4de 100644 --- a/src/drawing.cpp +++ b/src/drawing.cpp @@ -5,7 +5,7 @@ * * Copyright 1995-2000 Bernd Schmidt * Copyright 1995 Alessandro Bissacco - * Copyright 2000,2001 Toni Wilen + * Copyright 2000-2008 Toni Wilen */ @@ -49,6 +49,8 @@ // In UAE4all, lores_shift is always 0, so use a constant instead of a var #define lores_shift 0 +int aga_mode; /* mirror of chipset_mask & CSMASK_AGA */ +int direct_rgb; #ifdef PANDORA #define OFFSET_Y_ADJUST 15 @@ -91,7 +93,8 @@ struct vidbuf_description gfxvidinfo; /* OCS/ECS color lookup table. */ xcolnr xcolors[4096]; -static uae_u8 spriteagadpfpixels[MAX_PIXELS_PER_LINE * 2]; /* AGA dualplayfield sprite */ +static uae_u8 spritepixels[MAX_PIXELS_PER_LINE * 2]; /* used when sprite resolution > lores */ + /* AGA mode color lookup tables */ unsigned int xredcolors[256], xgreencolors[256], xbluecolors[256]; static int dblpf_ind1_aga[256], dblpf_ind2_aga[256]; @@ -106,8 +109,8 @@ union pixdata_u { double uupzuq; long int cruxmedo; uae_u8 apixels[MAX_PIXELS_PER_LINE * 2]; - uae_u16 apixels_w[MAX_PIXELS_PER_LINE * 2 / 2]; - uae_u32 apixels_l[MAX_PIXELS_PER_LINE * 2 / 4]; + uae_u16 apixels_w[MAX_PIXELS_PER_LINE * 2 / sizeof (uae_u16)]; + uae_u32 apixels_l[MAX_PIXELS_PER_LINE * 2 / sizeof (uae_u32)]; } pixdata; uae_u16 spixels[MAX_SPR_PIXELS]; @@ -196,7 +199,9 @@ static __inline__ void count_frame (void) if (fs_framecnt > 1) fs_framecnt = 0; break; - } + } + if (inhibit_frame) + fs_framecnt = 1; } int coord_native_to_amiga_x (int x) @@ -1008,9 +1013,9 @@ STATIC_INLINE void draw_sprites_aga_1 (struct sprite_entry *e, int ham, int dual } if (dualpf) { - spriteagadpfpixels[window_pos] = col; + spritepixels[window_pos] = col; if (doubling) - spriteagadpfpixels[window_pos + 1] = col; + spritepixels[window_pos + 1] = col; } else if (ham) { col = color_reg_get (&colors_for_drawing, col); col ^= xor_val; @@ -1722,31 +1727,8 @@ static void init_aspect_maps (void) */ STATIC_INLINE void do_flush_screen () { - flush_block (); unlockscr (); -} - -static int drawing_color_matches; -static enum { color_match_acolors, color_match_full } color_match_type; - -/* Set up colors_for_drawing to the state at the beginning of the currently drawn - line. Try to avoid copying color tables around whenever possible. */ -static __inline__ void adjust_drawing_colors (int ctable, int need_full) -{ - if (drawing_color_matches != ctable) { - if (need_full) { - color_reg_cpy (&colors_for_drawing, curr_color_tables + ctable); - color_match_type = color_match_full; - } else { - memcpy (colors_for_drawing.acolors, curr_color_tables[ctable].acolors, - sizeof colors_for_drawing.acolors); - color_match_type = color_match_acolors; - } - drawing_color_matches = ctable; - } else if (need_full && color_match_type != color_match_full) { - color_reg_cpy (&colors_for_drawing, &curr_color_tables[ctable]); - color_match_type = color_match_full; - } + flush_block (); } /* We only save hardware registers during the hardware frame. Now, when @@ -1762,12 +1744,14 @@ static __inline__ void pfield_expand_dp_bplcon (void) /* The KILLEHB bit exists in ECS, but is apparently meant for Genlock * stuff, and it's set by some demos (e.g. Andromeda Seven Seas) */ bplehb = ((dp_for_drawing->bplcon0 & 0x7010) == 0x6000 && !(dp_for_drawing->bplcon2 & 0x200)); - bpldualpf2of = (dp_for_drawing->bplcon3 >> 10) & 7; - sbasecol[0] = ((dp_for_drawing->bplcon4 >> 4) & 15) << 4; - sbasecol[1] = ((dp_for_drawing->bplcon4 >> 0) & 15) << 4; - } else { + bpldualpf2of = (dp_for_drawing->bplcon3 >> 10) & 7; + sbasecol[0] = ((dp_for_drawing->bplcon4 >> 4) & 15) << 4; + sbasecol[1] = ((dp_for_drawing->bplcon4 >> 0) & 15) << 4; + } else if (currprefs.chipset_mask & CSMASK_ECS_DENISE) + bplehb = (dp_for_drawing->bplcon0 & 0xFC00) == 0x6000 && !(dp_for_drawing->bplcon2 & 0x200); + else bplehb = (dp_for_drawing->bplcon0 & 0xFC00) == 0x6000; - } + plf1pri = dp_for_drawing->bplcon2 & 7; plf2pri = (dp_for_drawing->bplcon2 >> 3) & 7; plf_sprite_mask = 0xFFFF0000 << (4 * plf2pri); @@ -1801,6 +1785,29 @@ static void pfield_expand_dp_bplcon2(int regno, int v) // res_shift = lores_shift - bplres; } +static int drawing_color_matches; +static enum { color_match_acolors, color_match_full } color_match_type; + +/* Set up colors_for_drawing to the state at the beginning of the currently drawn + line. Try to avoid copying color tables around whenever possible. */ +static __inline__ void adjust_drawing_colors (int ctable, int need_full) +{ + if (drawing_color_matches != ctable) { + if (need_full) { + color_reg_cpy (&colors_for_drawing, curr_color_tables + ctable); + color_match_type = color_match_full; + } else { + memcpy (colors_for_drawing.acolors, curr_color_tables[ctable].acolors, + sizeof colors_for_drawing.acolors); + color_match_type = color_match_acolors; + } + drawing_color_matches = ctable; + } else if (need_full && color_match_type != color_match_full) { + color_reg_cpy (&colors_for_drawing, &curr_color_tables[ctable]); + color_match_type = color_match_full; + } +} + STATIC_INLINE void do_color_changes (line_draw_func worker_border, line_draw_func worker_pfield) { int i; @@ -1853,13 +1860,13 @@ STATIC_INLINE void do_color_changes (line_draw_func worker_border, line_draw_fun } } -/* move color changes in horizontal cycles 0 to HBLANK_OFFSET to previous line - * cycles 0 to HBLANK_OFFSET must be visible in right border +/* Move color changes in horizontal cycles 0 to HBLANK_OFFSET - 1 to previous line. + * Cycles 0 to HBLANK_OFFSET are visible in right border on real Amigas. */ -static void mungedip(int lineno) +static void mungedip(int lineno, int next) { int i = dip_for_drawing->last_color_change; - struct draw_info *dip_for_drawing_next = curr_drawinfo + (lineno + 1); + struct draw_info *dip_for_drawing_next = curr_drawinfo + (lineno + next); if (dip_for_drawing_next->first_color_change == 0) dip_for_drawing_next = curr_drawinfo + (lineno + 2); while (i < dip_for_drawing_next->last_color_change) { @@ -1910,7 +1917,7 @@ static __inline__ void pfield_draw_line (int lineno, int gfx_ypos) dp_for_drawing = line_decisions + lineno; dip_for_drawing = curr_drawinfo + lineno; - //mungedip(lineno); + //mungedip(lineno, (dp_for_drawing->bplcon0 & 4) ? 2 : 1)); if (dp_for_drawing->plfleft != -1) { @@ -2160,7 +2167,7 @@ static void draw_status_line (int line) write_tdnumber (x + offs, y - TD_PADY, (track / 10) % 10); write_tdnumber (x + offs + TD_NUM_WIDTH, y - TD_PADY, track % 10); } - else if (nr_units(currprefs.mountinfo) > 0) { + else if (nr_units() > 0) { int offs = (TD_LED_WIDTH - 2 * TD_NUM_WIDTH) / 2; write_tdletter(x + offs, y - TD_PADY, 'H'); write_tdletter(x + offs + TD_NUM_WIDTH, y - TD_PADY, 'D'); @@ -2200,7 +2207,7 @@ static void finish_drawing_frame (void) where = amiga2aspect_line_map[i1]; if (where >= currprefs.gfx_size.height) break; - if (where == -1) + if (where < 0) continue; pfield_draw_line (active_line, where); @@ -2213,6 +2220,19 @@ static void finish_drawing_frame (void) } } do_flush_screen (); + +#ifdef DEBUG_M68K +extern int debug_frame_counter; +extern int debug_frame_start; +extern int debug_frame_end; + ++debug_frame_counter; + if(debug_frame_counter >= debug_frame_start && debug_frame_counter < debug_frame_end) + { + write_log("FRAME_SYNC ------------------------ FRAME_SYNC\n"); + write_log("FRAME_SYNC --- start frame %4d --- FRAME_SYNC\n", debug_frame_counter); + write_log("FRAME_SYNC ------------------------ FRAME_SYNC\n"); + } +#endif } STATIC_INLINE void check_picasso (void) @@ -2237,6 +2257,7 @@ STATIC_INLINE void check_picasso (void) notice_screen_contents_lost (); notice_new_xcolors (); + count_frame (); #endif } @@ -2289,9 +2310,6 @@ void vsync_handle_redraw (int long_frame, int lof_changed) quit_program = -quit_program; set_inhibit_frame (IHF_QUIT_PROGRAM); set_special (®s, SPCFLAG_BRK); -#ifdef FILESYS - filesys_prepare_reset (); -#endif return; } @@ -2303,15 +2321,10 @@ void vsync_handle_redraw (int long_frame, int lof_changed) } check_prefs_changed_audio (); -#ifdef JIT - check_prefs_changed_comp (); -#endif check_prefs_changed_custom (); check_prefs_changed_cpu (); framecnt = fs_framecnt; - if (inhibit_frame != 0) - framecnt = 1; if (framecnt == 0) init_drawing_frame (); @@ -2385,10 +2398,12 @@ void drawing_init (void) gen_pfield_tables(); #ifdef PICASSO96 - InitPicasso96 (); - picasso_on = 0; - picasso_requested_on = 0; - gfx_set_picasso_state (0); + if (savestate_state != STATE_RESTORE) { + InitPicasso96 (); + picasso_on = 0; + picasso_requested_on = 0; + gfx_set_picasso_state (0); + } #endif xlinebuffer = gfxvidinfo.bufmem; inhibit_frame = 0; diff --git a/src/ersatz.cpp b/src/ersatz.cpp index c4fa5922..91f31fce 100644 --- a/src/ersatz.cpp +++ b/src/ersatz.cpp @@ -73,7 +73,7 @@ static void ersatz_failed (void) if (already_failed) return; already_failed = 1; - //notify_user (NUMSG_KICKREPNO); + notify_user (NUMSG_KICKREPNO); uae_restart (-1, NULL); } @@ -82,6 +82,7 @@ static void ersatz_doio (void) uaecptr request = m68k_areg(®s, 1); switch (get_word (request + 0x1C)) { case 9: /* TD_MOTOR is harmless */ + return; case 2: case 0x8002: /* READ commands */ break; @@ -114,7 +115,7 @@ static void ersatz_init (void) write_log ("initializing kickstart replacement\n"); if (disk_empty (0)) { already_failed = 1; - //notify_user (NUMSG_KICKREP); + notify_user (NUMSG_KICKREP); uae_restart (-1, NULL); return; } diff --git a/src/expansion.cpp b/src/expansion.cpp index c4f30756..9c2bec4c 100644 --- a/src/expansion.cpp +++ b/src/expansion.cpp @@ -20,6 +20,7 @@ #include "newcpu.h" #include "savestate.h" #include "zfile.h" +#include #define MAX_EXPANSION_BOARDS 8 @@ -93,7 +94,7 @@ #define force_z3 0x10 /* *MUST* be set if card is Z3 */ #define ext_size 0x20 /* Use extended size table for bits 0-2 of er_Type */ #define no_shutup 0x40 /* Card cannot receive Shut_up_forever */ -#define care_addr 0x80 /* Adress HAS to be $200000-$9fffff */ +#define care_addr 0x80 /* Z2=Adress HAS to be $200000-$9fffff Z3=1->mem,0=io */ /* ********************************************************** */ /* 40-42 */ @@ -122,15 +123,17 @@ uaecptr ROM_filesys_resname, ROM_filesys_resid; uaecptr ROM_filesys_diagentry; uaecptr ROM_hardfile_resname, ROM_hardfile_resid; uaecptr ROM_hardfile_init; +int uae_boot_rom, uae_boot_rom_size; /* size = code size only */ /* ********************************************************** */ static void (*card_init[MAX_EXPANSION_BOARDS]) (void); static void (*card_map[MAX_EXPANSION_BOARDS]) (void); -static int card_is_gfx[MAX_EXPANSION_BOARDS]; static int ecard; +static uae_u16 uae_id; + /* ********************************************************** */ /* Please note: ZorroIII implementation seems to work different @@ -177,6 +180,11 @@ static void expamem_init_clear2 (void) ecard = MAX_EXPANSION_BOARDS - 1; } +static void expamem_init_last (void) +{ + expamem_init_clear(); +} + static uae_u32 REGPARAM3 expamem_lget (uaecptr) REGPARAM; static uae_u32 REGPARAM3 expamem_wget (uaecptr) REGPARAM; static uae_u32 REGPARAM3 expamem_bget (uaecptr) REGPARAM; @@ -187,34 +195,32 @@ static void REGPARAM3 expamem_bput (uaecptr, uae_u32) REGPARAM; addrbank expamem_bank = { expamem_lget, expamem_wget, expamem_bget, expamem_lput, expamem_wput, expamem_bput, - default_xlate, default_check, NULL, "Autoconfig" + default_xlate, default_check, NULL, "Autoconfig", + dummy_lgeti, dummy_wgeti, ABFLAG_IO | ABFLAG_SAFE }; static uae_u32 REGPARAM2 expamem_lget (uaecptr addr) { -#ifdef JIT - special_mem |= S_READ; -#endif - write_log ("warning: READ.L from address $%lx \n", addr); - return 0xfffffffful; + write_log ("warning: READ.L from address $%lx PC=%x\n", addr, M68K_GETPC); + return (expamem_wget (addr) << 16) | expamem_wget (addr + 2); } static uae_u32 REGPARAM2 expamem_wget (uaecptr addr) { -#ifdef JIT - special_mem |= S_READ; -#endif - write_log ("warning: READ.W from address $%lx \n", addr); - return 0xffff; + write_log ("warning: READ.W from address $%lx PC=%x\n", addr, M68K_GETPC); + return (expamem_bget (addr) << 8) | expamem_bget (addr + 1); } static uae_u32 REGPARAM2 expamem_bget (uaecptr addr) { + uae_u8 b; #ifdef JIT special_mem |= S_READ; #endif addr &= 0xFFFF; - return do_get_mem_byte (expamem + addr); + b = expamem[addr]; + //write_log("%08x=%02.2X\n", addr, b); + return b; } static void REGPARAM2 expamem_write (uaecptr addr, uae_u32 value) @@ -250,19 +256,23 @@ static void REGPARAM2 expamem_wput (uaecptr addr, uae_u32 value) #ifdef JIT special_mem |= S_WRITE; #endif + value &= 0xffff; if (expamem_type() != zorroIII) write_log ("warning: WRITE.W to address $%lx : value $%x\n", addr, value); else { switch (addr & 0xff) { case 0x44: if (expamem_type() == zorroIII) { - // +Bernd Roesch - if(card_is_gfx[ecard]) - value = (gfxmem_start >> 16); /* hack address (TB) */ - else - value = (value - 0x4000) + (z3fastmem_start >> 16); /* hack address (TW) */ - chipmem_wput (regs.regs[11] + 0x20, value); - chipmem_wput (regs.regs[11] + 0x28, value); + // +Bernd Roesch & Toni Wilen + if (expamem[0] & add_memory) { + // Z3 RAM expansion + value = z3fastmem_start >> 16; + } else { + // Z3 P96 RAM + value = p96ram_start >> 16; + } + put_word (regs.regs[11] + 0x20, value); + put_word (regs.regs[11] + 0x28, value); // -Bernd Roesch expamem_hi = value; (*card_map[ecard]) (); @@ -283,6 +293,7 @@ static void REGPARAM2 expamem_bput (uaecptr addr, uae_u32 value) #ifdef JIT special_mem |= S_WRITE; #endif + value &= 0xff; switch (addr & 0xff) { case 0x30: case 0x32: @@ -293,7 +304,7 @@ static void REGPARAM2 expamem_bput (uaecptr addr, uae_u32 value) case 0x48: if (expamem_type () == zorroII) { - expamem_hi = value & 0xFF; + expamem_hi = value; (*card_map[ecard]) (); write_log (" Card %d (Zorro%s) done.\n", ecard + 1, expamem_type() == 0xc0 ? "II" : "III"); ++ecard; @@ -341,7 +352,7 @@ static uae_u8 *REGPARAM3 fastmem_xlate (uaecptr addr) REGPARAM; uaecptr fastmem_start; /* Determined by the OS */ static uae_u8 *fastmemory; -uae_u32 REGPARAM2 fastmem_lget (uaecptr addr) +static uae_u32 REGPARAM2 fastmem_lget (uaecptr addr) { uae_u8 *m; addr -= fastmem_start /*& fastmem_mask*/; @@ -350,7 +361,7 @@ uae_u32 REGPARAM2 fastmem_lget (uaecptr addr) return do_get_mem_long ((uae_u32 *)m); } -uae_u32 REGPARAM2 fastmem_wget (uaecptr addr) +static uae_u32 REGPARAM2 fastmem_wget (uaecptr addr) { uae_u8 *m; addr -= fastmem_start /*& fastmem_mask*/; @@ -359,7 +370,7 @@ uae_u32 REGPARAM2 fastmem_wget (uaecptr addr) return do_get_mem_word ((uae_u16 *)m); } -uae_u32 REGPARAM2 fastmem_bget (uaecptr addr) +static uae_u32 REGPARAM2 fastmem_bget (uaecptr addr) { uae_u8 *m; addr -= fastmem_start /*& fastmem_mask*/; @@ -368,7 +379,7 @@ uae_u32 REGPARAM2 fastmem_bget (uaecptr addr) return do_get_mem_byte(m); } -void REGPARAM2 fastmem_lput (uaecptr addr, uae_u32 l) +static void REGPARAM2 fastmem_lput (uaecptr addr, uae_u32 l) { uae_u8 *m; addr -= fastmem_start /*& fastmem_mask*/; @@ -377,7 +388,7 @@ void REGPARAM2 fastmem_lput (uaecptr addr, uae_u32 l) do_put_mem_long ((uae_u32 *)m, l); } -void REGPARAM2 fastmem_wput (uaecptr addr, uae_u32 w) +static void REGPARAM2 fastmem_wput (uaecptr addr, uae_u32 w) { uae_u8 *m; addr -= fastmem_start /*& fastmem_mask*/; @@ -386,7 +397,7 @@ void REGPARAM2 fastmem_wput (uaecptr addr, uae_u32 w) do_put_mem_word ((uae_u16 *)m, w); } -void REGPARAM2 fastmem_bput (uaecptr addr, uae_u32 b) +static void REGPARAM2 fastmem_bput (uaecptr addr, uae_u32 b) { uae_u8 *m; addr -= fastmem_start /*& fastmem_mask*/; @@ -412,7 +423,8 @@ static uae_u8 *REGPARAM2 fastmem_xlate (uaecptr addr) addrbank fastmem_bank = { fastmem_lget, fastmem_wget, fastmem_bget, fastmem_lput, fastmem_wput, fastmem_bput, - fastmem_xlate, fastmem_check, NULL, "Fast memory" + fastmem_xlate, fastmem_check, NULL, "Fast memory", + fastmem_lget, fastmem_wget, ABFLAG_RAM }; #ifdef FILESYS @@ -432,7 +444,7 @@ static void REGPARAM3 filesys_bput (uaecptr, uae_u32) REGPARAM; static uae_u32 filesys_start; /* Determined by the OS */ uae_u8 *filesysory; -uae_u32 REGPARAM2 filesys_lget (uaecptr addr) +static uae_u32 REGPARAM2 filesys_lget (uaecptr addr) { uae_u8 *m; #ifdef JIT @@ -444,7 +456,7 @@ uae_u32 REGPARAM2 filesys_lget (uaecptr addr) return do_get_mem_long ((uae_u32 *)m); } -uae_u32 REGPARAM2 filesys_wget (uaecptr addr) +static uae_u32 REGPARAM2 filesys_wget (uaecptr addr) { uae_u8 *m; #ifdef JIT @@ -456,7 +468,7 @@ uae_u32 REGPARAM2 filesys_wget (uaecptr addr) return do_get_mem_word ((uae_u16 *)m); } -uae_u32 REGPARAM2 filesys_bget (uaecptr addr) +static uae_u32 REGPARAM2 filesys_bget (uaecptr addr) { #ifdef JIT special_mem |= S_READ; @@ -487,18 +499,13 @@ static void REGPARAM2 filesys_bput (uaecptr addr, uae_u32 b) #ifdef JIT special_mem |= S_WRITE; #endif - write_log ("filesys_bput called. This usually means that you are using\n"); - write_log ("Kickstart 1.2. Please give UAE the \"-a\" option next time\n"); - write_log ("you start it. If you are _not_ using Kickstart 1.2, then\n"); - write_log ("there's a bug somewhere.\n"); - write_log ("Exiting...\n"); - uae_quit (); } static addrbank filesys_bank = { filesys_lget, filesys_wget, filesys_bget, filesys_lput, filesys_wput, filesys_bput, - default_xlate, default_check, NULL, "Filesystem Autoconfig Area" + default_xlate, default_check, NULL, "Filesystem Autoconfig Area", + dummy_lgeti, dummy_wgeti, ABFLAG_IO | ABFLAG_SAFE }; #endif /* FILESYS */ @@ -522,7 +529,7 @@ static uae_u8 *REGPARAM3 z3fastmem_xlate (uaecptr addr) REGPARAM; uaecptr z3fastmem_start; /* Determined by the OS */ static uae_u8 *z3fastmem; -uae_u32 REGPARAM2 z3fastmem_lget (uaecptr addr) +static uae_u32 REGPARAM2 z3fastmem_lget (uaecptr addr) { uae_u8 *m; addr -= z3fastmem_start /*& z3fastmem_mask*/; @@ -531,7 +538,7 @@ uae_u32 REGPARAM2 z3fastmem_lget (uaecptr addr) return do_get_mem_long ((uae_u32 *)m); } -uae_u32 REGPARAM2 z3fastmem_wget (uaecptr addr) +static uae_u32 REGPARAM2 z3fastmem_wget (uaecptr addr) { uae_u8 *m; addr -= z3fastmem_start /*& z3fastmem_mask*/; @@ -540,7 +547,7 @@ uae_u32 REGPARAM2 z3fastmem_wget (uaecptr addr) return do_get_mem_word ((uae_u16 *)m); } -uae_u32 REGPARAM2 z3fastmem_bget (uaecptr addr) +static uae_u32 REGPARAM2 z3fastmem_bget (uaecptr addr) { uae_u8 *m; addr -= z3fastmem_start /*& z3fastmem_mask*/; @@ -549,7 +556,7 @@ uae_u32 REGPARAM2 z3fastmem_bget (uaecptr addr) return do_get_mem_byte (m); } -void REGPARAM2 z3fastmem_lput (uaecptr addr, uae_u32 l) +static void REGPARAM2 z3fastmem_lput (uaecptr addr, uae_u32 l) { uae_u8 *m; addr -= z3fastmem_start /*& z3fastmem_mask*/; @@ -558,7 +565,7 @@ void REGPARAM2 z3fastmem_lput (uaecptr addr, uae_u32 l) do_put_mem_long ((uae_u32 *)m, l); } -void REGPARAM2 z3fastmem_wput (uaecptr addr, uae_u32 w) +static void REGPARAM2 z3fastmem_wput (uaecptr addr, uae_u32 w) { uae_u8 *m; addr -= z3fastmem_start /*& z3fastmem_mask*/; @@ -567,7 +574,7 @@ void REGPARAM2 z3fastmem_wput (uaecptr addr, uae_u32 w) do_put_mem_word ((uae_u16 *)m, w); } -void REGPARAM2 z3fastmem_bput (uaecptr addr, uae_u32 b) +static void REGPARAM2 z3fastmem_bput (uaecptr addr, uae_u32 b) { uae_u8 *m; addr -= z3fastmem_start /*& z3fastmem_mask*/; @@ -593,7 +600,8 @@ static uae_u8 *REGPARAM2 z3fastmem_xlate (uaecptr addr) addrbank z3fastmem_bank = { z3fastmem_lget, z3fastmem_wget, z3fastmem_bget, z3fastmem_lput, z3fastmem_wput, z3fastmem_bput, - z3fastmem_xlate, z3fastmem_check, NULL, "ZorroIII Fast RAM" + z3fastmem_xlate, z3fastmem_check, NULL, "ZorroIII Fast RAM", + z3fastmem_lget, z3fastmem_wget, ABFLAG_RAM }; /* Z3-based UAEGFX-card */ @@ -610,12 +618,15 @@ uae_u32 gfxmem_start; static void expamem_map_fastcard (void) { fastmem_start = ((expamem_hi | (expamem_lo >> 4)) << 16); - map_banks (&fastmem_bank, fastmem_start >> 16, allocated_fastmem >> 16, allocated_fastmem); + map_banks (&fastmem_bank, fastmem_start >> 16, allocated_fastmem >> 16, 0); write_log ("Fastcard: mapped @$%lx: %dMB fast memory\n", fastmem_start, allocated_fastmem >> 20); } static void expamem_init_fastcard (void) { + uae_u16 mid = /*currprefs.cs_a2091 ? commodore :*/ uae_id; + uae_u8 pid = /*currprefs.cs_a2091 ? commodore_a2091_ram :*/ 1; + expamem_init_clear(); if (allocated_fastmem == 0x100000) expamem_write (0x00, Z2_MEM_1MB + add_memory + zorroII); @@ -628,10 +639,10 @@ static void expamem_init_fastcard (void) expamem_write (0x08, care_addr); - expamem_write (0x04, 1); + expamem_write (0x04, pid); - expamem_write (0x10, hackers_id >> 8); - expamem_write (0x14, hackers_id & 0xff); + expamem_write (0x10, mid >> 8); + expamem_write (0x14, mid & 0xff); expamem_write (0x18, 0x00); /* ser.no. Byte 0 */ expamem_write (0x1c, 0x00); /* ser.no. Byte 1 */ @@ -661,7 +672,7 @@ static void expamem_map_filesys (void) write_log ("Filesystem: mapped memory @$%lx.\n", filesys_start); /* 68k code needs to know this. */ a = here (); - org (RTAREA_BASE+0xFFFC); + org (rtarea_base + 0xFFFC); dl (filesys_start + 0x2000); org (a); } @@ -681,8 +692,8 @@ static void expamem_init_filesys (void) expamem_write (0x08, no_shutup); expamem_write (0x04, 2); - expamem_write (0x10, hackers_id >> 8); - expamem_write (0x14, hackers_id & 0xff); + expamem_write (0x10, uae_id >> 8); + expamem_write (0x14, uae_id & 0xff); expamem_write (0x18, 0x00); /* ser.no. Byte 0 */ expamem_write (0x1c, 0x00); /* ser.no. Byte 1 */ @@ -748,12 +759,12 @@ static void expamem_init_z3fastmem (void) expamem_init_clear(); expamem_write (0x00, add_memory | zorroIII | code); - expamem_write (0x08, no_shutup | force_z3 | (allocated_z3fastmem > 0x800000 ? ext_size : Z3_MEM_AUTO)); + expamem_write (0x08, care_addr | no_shutup | force_z3 | (allocated_z3fastmem > 0x800000 ? ext_size : Z3_MEM_AUTO)); expamem_write (0x04, 3); - expamem_write (0x10, hackers_id >> 8); - expamem_write (0x14, hackers_id & 0xff); + expamem_write (0x10, uae_id >> 8); + expamem_write (0x14, uae_id & 0xff); expamem_write (0x18, 0x00); /* ser.no. Byte 0 */ expamem_write (0x1c, 0x00); /* ser.no. Byte 1 */ @@ -774,11 +785,13 @@ static void expamem_init_z3fastmem (void) * Fake Graphics Card (ZORRO III) - BDK */ +uaecptr p96ram_start; + static void expamem_map_gfxcard (void) { - gfxmem_start = ((expamem_hi | (expamem_lo >> 4)) << 16); + gfxmem_start = (expamem_hi | (expamem_lo >> 4)) << 16; map_banks (&gfxmem_bank, gfxmem_start >> 16, allocated_gfxmem >> 16, allocated_gfxmem); - write_log ("UAEGFX-card: mapped @$%lx \n", gfxmem_start); + write_log ("UAEGFX-card: mapped @$%lx, %d MB RTG RAM\n", gfxmem_start, allocated_gfxmem / 0x100000); } static void expamem_init_gfxcard (void) @@ -790,17 +803,25 @@ static void expamem_init_gfxcard (void) : allocated_gfxmem == 0x1000000 ? Z2_MEM_16MB : allocated_gfxmem == 0x2000000 ? Z2_MEM_32MB : allocated_gfxmem == 0x4000000 ? Z2_MEM_64MB - : Z2_MEM_128MB); + : allocated_gfxmem == 0x8000000 ? Z2_MEM_128MB + : allocated_gfxmem == 0x10000000 ? Z2_MEM_256MB + : allocated_gfxmem == 0x20000000 ? Z2_MEM_512MB + : Z2_MEM_1GB); + int subsize = (allocated_gfxmem == 0x100000 ? Z3_MEM_1MB + : allocated_gfxmem == 0x200000 ? Z3_MEM_2MB + : allocated_gfxmem == 0x400000 ? Z3_MEM_4MB + : allocated_gfxmem == 0x800000 ? Z3_MEM_8MB + : 0); expamem_init_clear(); expamem_write (0x00, zorroIII | code); - expamem_write (0x08, no_shutup | force_z3 | (allocated_gfxmem > 0x800000 ? ext_size : Z3_MEM_AUTO)); + expamem_write (0x08, care_addr | no_shutup | force_z3 | ext_size | subsize); expamem_write (0x04, 96); - expamem_write (0x10, hackers_id >> 8); - expamem_write (0x14, hackers_id & 0xff); + expamem_write (0x10, uae_id >> 8); + expamem_write (0x14, uae_id & 0xff); expamem_write (0x18, 0x00); /* ser.no. Byte 0 */ expamem_write (0x1c, 0x00); /* ser.no. Byte 1 */ @@ -816,6 +837,13 @@ static void expamem_init_gfxcard (void) static size_t fast_filepos, z3_filepos, p96_filepos; +void free_fastmemory (void) +{ + if (fastmemory) + mapped_free (fastmemory); + fastmemory = 0; +} + static void allocate_expamem (void) { currprefs.fastmem_size = changed_prefs.fastmem_size; @@ -823,9 +851,7 @@ static void allocate_expamem (void) currprefs.gfxmem_size = changed_prefs.gfxmem_size; if (allocated_fastmem != currprefs.fastmem_size) { - if (fastmemory) - mapped_free (fastmemory); - fastmemory = 0; + free_fastmemory (); allocated_fastmem = currprefs.fastmem_size; fastmem_mask = allocated_fastmem - 1; @@ -847,8 +873,6 @@ static void allocate_expamem (void) z3fastmem_mask = allocated_z3fastmem - 1; if (allocated_z3fastmem) { - if(z3fastmem_start != currprefs.z3fastmem_start) - z3fastmem_start = currprefs.z3fastmem_start; if(z3fastmem_start != 0x1000000) z3fastmem_start = 0x1000000; z3fastmem = mapped_malloc (allocated_z3fastmem, "z3"); @@ -869,7 +893,6 @@ static void allocate_expamem (void) gfxmem_mask = allocated_gfxmem - 1; if (allocated_gfxmem) { - gfxmem_start = 0x3000000; gfxmemory = mapped_malloc (allocated_gfxmem, "gfx"); if (gfxmemory == 0) { write_log ("Out of memory for graphics card memory\n"); @@ -882,6 +905,8 @@ static void allocate_expamem (void) z3fastmem_bank.baseaddr = z3fastmem; fastmem_bank.baseaddr = fastmemory; + gfxmem_bank.baseaddr = NULL; + gfxmem_bankx.baseaddr = gfxmemory; #ifdef SAVESTATE if (savestate_state == STATE_RESTORE) { @@ -898,20 +923,86 @@ static void allocate_expamem (void) #ifdef PICASSO96 if (allocated_gfxmem > 0 && gfxmem_start > 0) { restore_ram (p96_filepos, gfxmemory); - map_banks (&gfxmem_bank, gfxmem_start >> 16, currprefs.gfxmem_size >> 16, - allocated_gfxmem); + map_banks (&gfxmem_bank, gfxmem_start >> 16, currprefs.gfxmem_size >> 16, + allocated_gfxmem); } #endif } #endif /* SAVESTATE */ } +static uaecptr check_boot_rom (void) +{ + int i; + uaecptr b = 0xf00000; + addrbank *ab; + + ab = &get_mem_bank (0xf00000); + if (ab) { + if (valid_address (0xf00000, 65536)) + b = 0xe70000; + } + for (i = 0; i < currprefs.mountitems; i++) { + struct uaedev_config_info *uci = &currprefs.mountconfig[i]; + if (uci->controller == 0) + return b; + } +/* + if (currprefs.socket_emu) + return b; + if (currprefs.uaeserial) + return b; + if (currprefs.scsi == 1) + return b; + if (currprefs.sana2) + return b; + if (currprefs.win32_outsidemouse) + return b; +*/ + if (currprefs.gfxmem_size) + return b; +// if (currprefs.win32_automount_removable) +// return b; + if (currprefs.chipmem_size > 2 * 1024 * 1024) + return b; + return 0; +} + +uaecptr need_uae_boot_rom (void) +{ + uaecptr v; + + uae_boot_rom = 0; + v = check_boot_rom (); + if (v) + uae_boot_rom = 1; + return v; +} + +void expamem_next(void) +{ + expamem_init_clear(); + map_banks (&expamem_bank, 0xE8, 1, 0); + ++ecard; + if (ecard < MAX_EXPANSION_BOARDS) + (*card_init[ecard]) (); + else + expamem_init_clear2 (); +} + +void p96memstart(void) +{ + p96ram_start = 0x3000000; +} + void expamem_reset (void) { int do_mount = 1; int cardno = 0; ecard = 0; + uae_id = hackers_id; + allocate_expamem (); /* check if Kickstart version is below 1.3 */ @@ -925,43 +1016,39 @@ void expamem_reset (void) write_log ("Kickstart version is below 1.3! Disabling autoconfig devices.\n"); do_mount = 0; } -#ifdef FILESYS - /* No need for filesystem stuff if there aren't any mounted. */ - if (nr_units (currprefs.mountinfo) == 0) + if (need_uae_boot_rom() == 0) do_mount = 0; -#endif if (fastmemory != NULL) { - card_is_gfx[cardno] = 0; card_init[cardno] = expamem_init_fastcard; card_map[cardno++] = expamem_map_fastcard; } if (z3fastmem != NULL) { - card_is_gfx[cardno] = 0; card_init[cardno] = expamem_init_z3fastmem; card_map[cardno++] = expamem_map_z3fastmem; } #ifdef PICASSO96 if (gfxmemory != NULL) { - card_is_gfx[cardno] = 1; card_init[cardno] = expamem_init_gfxcard; card_map[cardno++] = expamem_map_gfxcard; } #endif #ifdef FILESYS if (do_mount && ! ersatzkickfile) { - card_is_gfx[cardno] = 0; card_init[cardno] = expamem_init_filesys; card_map[cardno++] = expamem_map_filesys; } #endif + if (cardno > 0 && cardno < MAX_EXPANSION_BOARDS) { + card_init[cardno] = expamem_init_last; + card_map[cardno++] = expamem_map_clear; + } while (cardno < MAX_EXPANSION_BOARDS) { - card_is_gfx[cardno] = 0; card_init[cardno] = expamem_init_clear; card_map[cardno++] = expamem_map_clear; } z3fastmem_start = currprefs.z3fastmem_start; - gfxmem_start = 0x3000000; + p96memstart(); (*card_init[0]) (); } @@ -991,7 +1078,7 @@ void expansion_init (void) filesysory = (uae_u8 *) malloc (0x10000); //mapped_malloc (0x10000, "filesys"); if (!filesysory) { write_log ("virtual memory exhausted (filesysory)!\n"); - exit (0); + abort(); } filesys_bank.baseaddr = (uae_u8*)filesysory; #endif @@ -1073,10 +1160,11 @@ uae_u8 *save_expansion (int *len, uae_u8 *dstptr) if (dstptr) dst = dstbak = dstptr; else - dstbak = dst = (uae_u8 *)malloc (16); + dstbak = dst = (uae_u8 *)malloc (20); save_u32 (fastmem_start); save_u32 (z3fastmem_start); save_u32 (gfxmem_start); + save_u32 (rtarea_base); *len = dst - dstbak; return dstbak; } @@ -1086,6 +1174,7 @@ uae_u8 *restore_expansion (uae_u8 *src) fastmem_start = restore_u32 (); z3fastmem_start = restore_u32 (); gfxmem_start = restore_u32 (); + restore_u32(); return src; } diff --git a/src/filesys.asm b/src/filesys.asm index b8a15c79..270a1bee 100644 --- a/src/filesys.asm +++ b/src/filesys.asm @@ -12,6 +12,12 @@ ; 200?.??.?? Picasso96 vblank hack (TW) ; 2006.03.04 Mousehack code integrated (TW) ; 2006.18.07 FileSystem.resource find routine access fault fixed (TW) +; 2007.03.30 mousehack do not start multiple times anymore (TW) +; 2007.06.15 uninitialized variable in memory type selection fixed (stupid me) (TW) +; 2007.08.09 started implementing removable drive support (TW) +; 2007.09.01 ACTION_EXAMINE_ALL (TW) +; 2007.09.05 fully filesystem device mounting on the fly (TW) +; 2008.01.09 ACTION_EXAMINE_ALL does not anymore return eac_Entries = 0 with continue (fixes some broken programs) AllocMem = -198 FreeMem = -210 @@ -64,30 +70,36 @@ filesys_init: move.l (a0),a5 lea.l explibname(pc),a1 ; expansion lib name moveq #36,d0 - moveq #0,d5 + moveq #1,d5 jsr -552(a6) ; OpenLibrary tst.l d0 bne.b FSIN_explibok lea.l explibname(pc),a1 ; expansion lib name moveq #0,d0 - moveq #1,d5 + moveq #0,d5 jsr -552(a6) ; OpenLibrary FSIN_explibok: move.l d0,a4 + + tst.l $10c(a5) + beq.s FSIN_none + move.l #PP_TOTAL,d0 - moveq #1,d1 ; MEMF_PUBLIC + move.l #$10001,d1 jsr AllocMem(a6) move.l d0,a3 ; param packet move.l a4,PP_EXPLIB(a3) - moveq #0,d6 FSIN_init_units: - cmp.l $10c(a5),d6 + cmp.l $10c(a5),d6 bcc.b FSIN_units_ok move.l d6,-(sp) FSIN_nextsub: - moveq #1,d7 - move.l a3,-(sp) + moveq #1,d7 + tst.w d5 + beq.s .oldks + bset #2,d7 +.oldks move.l a3,-(sp) move.l a3,a0 bsr.w make_dev move.l (sp)+,a3 @@ -101,8 +113,13 @@ FSIN_nomoresub: move.l (sp)+,d6 addq.w #1,d6 bra.b FSIN_init_units - FSIN_units_ok: + move.l 4.w,a6 + move.l a3,a1 + move.l #PP_TOTAL,d0 + jsr FreeMem(a6) + +FSIN_none: move.l 4.w,a6 move.l a4,a1 jsr -414(a6) ; CloseLibrary @@ -138,7 +155,8 @@ FSIN_units_ok: ;FSIN_scandone: ; jsr -$007e(a6) ; Enable - ; add >2MB chip RAM to memory list + +filesys_dev_storeinfo ; add >2MB chip RAM to memory list move.w #$FF80,d0 bsr.w getrtbase jsr (a0) @@ -153,14 +171,65 @@ FSIN_units_ok: jsr -618(a6) ; AddMemList FSIN_chip_done + lea fstaskname(pc),a0 + lea fsmounttask(pc),a1 + moveq #10,d0 + bsr createtask + move.l d0,a1 + moveq #1,d1 + move.w #$FF48,d0 ; store task pointer + bsr.w getrtbase + jsr (a0) + movem.l (sp)+,d0-d7/a0-a6 general_ret: rts + ; this is getting ridiculous but I don't see any other solutions.. +fsmounttask +.fsm1 move.l 4.w,a6 + moveq #0,d0 + bset #17,d0 ; SIGBREAK_CTRL_D + jsr -$013e(a6) ;Wait + lea doslibname(pc),a1 + moveq #0,d0 + jsr -$0228(a6) ; OpenLibrary + tst.l d0 + beq.s .fsm1 + move.l d0,a6 + lea fsprocname(pc),a0 + move.l a0,d1 + moveq #15,d2 + lea mountproc(pc),a0 + move.l a0,d3 + lsr.l #2,d3 + move.l #8000,d4 + jsr -$08a(a6) ; CreateProc + move.l a6,a1 + move.l 4.w,a6 + jsr -$019e(a6); CloseLibrary + bra.s .fsm1 + + ; dummy process here because can't mount devices with ADNF_STARTPROC from task.. + ; (AddDosNode() internally calls GetDeviceProc() which accesses ExecBase->ThisTask->pr_GlobVec) + cnop 0,4 + dc.l 16 +mountproc + dc.l 0 + moveq #2,d1 + move.w #$FF48,d0 ; get new unit number + bsr.w getrtbase + jsr (a0) + move.l d0,d1 + bmi.s .out + bsr.w addfsonthefly +.out moveq #0,d0 + rts + exter_data: exter_server: movem.l a2,-(sp) - move.w #$FF50,d0 + move.w #$FF50,d0 ; exter_int_helper bsr.w getrtbase moveq.l #0,d0 jsr (a0) @@ -169,12 +238,12 @@ exter_server: ; This is the hard part - we have to send some messages. move.l 4.w,a6 EXTS_loop: - move.w #$FF50,d0 ;exter_int_helper + move.w #$FF50,d0 ; exter_int_helper bsr.w getrtbase moveq.l #2,d0 jsr (a0) cmp.w #1,d0 - blt.b EXTS_done + blt.w EXTS_done bgt.b EXTS_signal_reply jsr -366(a6) ; PutMsg bra.b EXTS_loop @@ -290,14 +359,12 @@ relocate: ;a0=pointer to executable, returns first segment in A0 sub.l a5,a5 ;prev segment moveq #0,d6 r15 move.l (a2),d2 ; hunk size (header) - lsl.l #2,d2 moveq #1,d1 - btst #30,d3 ; chip mem? + btst #30,d2 ; chip mem? beq.s r2 bset #1,d1 r2 bset #16,d1 - bclr #31,d3 - bclr #30,d3 + lsl.l #2,d2 move.l d2,d0 bne.s r17 clr.l (a2)+ ; empty hunk @@ -380,12 +447,7 @@ r13 r0 move.l d7,d0 movem.l (sp)+,d1-d7/a1-a6 rts -ree move.w #30000,d0 -re1 move.w #$f00,$dff180 - move.w #$00f,$dff180 - move.w #$0f0,$dff180 - dbf d0,re1 - moveq #0,d7 +ree moveq #0,d7 bra.s r0 fsres @@ -432,8 +494,308 @@ fsres4 move.l a0,d0 movem.l (sp)+,d1/a0-a2/a6 rts - -make_dev: ; IN: A0 param_packet, D6: unit_no, D7: boot, A4: expansionbase + +addvolumenode + movem.l d7/a6,-(sp) + move.l d0,d7 + tst.b 32+44(a3) + beq.s .end ;empty volume string = empty drive + move.l 160(a3),a6 + cmp.w #37, 20(a6) + bcs.s .prev37 + moveq #(1<<1)+(1<<3)+(1<<2),d1 ;LDF_WRITE | LDF_VOLUMES | LDF_DEVICES + jsr -$29A(a6) ;AttemptLockDosList + and.l #~1,d0 + beq.s .end + btst #0,d7 + beq.s .nvol + lea 32(a3),a0 + move.l a0,d1 + jsr -$2A6(a6) ;AddDosEntry (Volume) +.nvol btst #1,d7 + beq.s .ndev + tst.b 158(a3) + bne.s .ndev + st 158(a3) + move.l 180(a3),d1 + jsr -$2A6(a6) ;AddDosEntry (Device) +.ndev moveq #(1<<1)+(1<<3)+(1<<2),d1 ;LDF_WRITE | LDF_VOLUMES | LDF_DEVICES + jsr -$294(a6) ;UnLockDosList + bra.s .end +.prev37 move.l 4.w,a6 + jsr -$0084(a6) ; Forbid + btst #0,d7 + beq.s .nvol13 + lea 32(a3),a0 + bsr.w adddosentry13 +.nvol13 btst #1,d7 + beq.s .ndev13 + tst.b 158(a3) + bne.s .ndev13 + st 158(a3) + move.l 180(a3),a0 + bsr.w adddosentry13 +.ndev13 jsr -$008a(a6) ;Permit +.end movem.l (sp)+,d7/a6 + rts + +remvolumenode + movem.l d7/a2/a6,-(sp) + move.l d0,d7 + move.l 160(a3),a6 + cmp.w #37,20(a6) + bcs.s .prev37 + moveq #(1<<1)+(1<<3)+(1<<2),d1 ;LDF_WRITE | LDF_VOLUMES | LDF_DEVICES + jsr -$29A(a6) ;AttemptLockDosList + and.l #~1,d0 + beq.s .end + btst #0,d7 + beq.s .nvol + lea 32(a3),a0 + move.l a0,d1 + jsr -$2A0(a6) ;RemDosEntry (Volume) +.nvol btst #1,d7 + beq.s .ndev + tst.b 158(a3) + beq.s .ndev + clr.b 158(a3) + move.l 180(a3),d1 + jsr -$2A0(a6) ;RemDosEntry (Device) +.ndev moveq #(1<<1)+(1<<3)+(1<<2),d1 ;LDF_WRITE | LDF_VOLUMES | LDF_DEVICES + jsr -$294(a6) ;UnLockDosList + bra.s .end +.prev37 move.l 4.w,a6 + jsr -$0084(a6) ; Forbid + btst #0,d7 + beq.s .nvol13 + lea 32(a3),a0 + bsr.w remdosentry13 +.nvol13 btst #1,d7 + beq.s .ndev13 + tst.b 158(a3) + beq.s .ndev13 + clr.b 158(a3) + move.l 180(a3),a0 + bsr.w remdosentry13 +.ndev13 jsr -$008a(a6) ;Permit +.end movem.l (sp)+,d7/a2/a6 + rts + +adddosentry13: + move.l a0,a1 + move.l 160(a3),a0 + move.l 34(a0),a0 ; RootNode + move.l 24(a0),a0 ; DosInfo + add.l a0,a0 + add.l a0,a0 + move.l 4(a0),(a1) ; myentry->dl_Next = di_DevInfo + move.l a1,d0 + lsr.l #2,d0 + move.l d0,4(a0) ; di_DevInfo = myentry + rts + +remdosentry13: + move.l a0,a2 + move.l 160(a3),a0 + move.l 34(a0),a0 ; RootNode + move.l 24(a0),a0 ; DosInfo + add.l a0,a0 + add.l a0,a0 + move.l 4(a0),a1 ; DosInfo->di_DevInfo + add.l a1,a1 + add.l a1,a1 + cmp.l a2,a1 + bne.s .pr2 + ; was first entry + move.l (a2),4(a0) ; di_DevInfo = myentry->dl_Next + bra.s .pr1 +.pr2 move.l a1,d0 + beq.s .pr3 + move.l (a1),d0 ; prevEntry->dl_Next + add.l d0,d0 + add.l d0,d0 + cmp.l d0,a2 ; next is our entry? + beq.s .pr3 + move.l d0,a1 + bra.s .pr2 +.pr3 move.l a1,d0 + beq.s .pr1 + move.l (a2),(a1) ; prevEntry->dl_Next = myentry->dl_Next +.pr1 rts + +diskinsertremove: + movem.l d2/a2/a6,-(sp) + moveq #22,d2 + sub.l d2,sp + move.l sp,a2 + move.w d2,d1 +.l1 clr.b -1(a2,d1.w) + subq.w #1,d1 + bne.s .l1 + move.l 4.w,a6 + moveq #15,d1 ;IECLASS_DISKREMOVED + tst.l d0 + beq.s .l2 + moveq #16,d1 ;IECLASS_DISKINSERTED +.l2 move.b d1,4(a2) ;ie_Class + move.w #$0800,8(a2); ie_Qualifier=IEQUALIFIER_MULTIBROADCAST + + move.l 164(a3),a1 + move.w #11,28(a1) ;IND_WRITEEVENT + move.l #22,36(a1) ;sizeof(struct InputEvent) + move.l a2,40(a1) + move.b #1,30(a1) ;IOF_QUICK + + move.l 168(a3),a1 + move.w #10,28(a1) ;TR_GETSYSTIME + move.b #1,30(a1) ;IOF_QUICK + jsr -$01c8(a6) ;DoIO + + move.l 168(a3),a1 + move.l 32(a1),14(a2) + move.l 36(a1),18(a2) + + move.l 164(a3),a1 + jsr -$01c8(a6) ;DoIO + + add.l d2,sp + movem.l (sp)+,d2/a2/a6 + rts + +dodiskchange + tst.b d0 + beq.s .eject + tst.b 32+44(a3) + bne.s .end + moveq #0,d0 +.dc2 + tst.b 32+45(a3,d0.w) + beq.s .dc1 + addq.b #1,d0 + bra.s .dc2 +.dc1 + move.b d0,32+44(a3) + beq.s .end + move.l d1,d0 + bsr.w addvolumenode + moveq #1,d0 + bsr.w diskinsertremove + bra.s .end +.eject + tst.b 32+44(a3) + beq.s .end + clr.b 32+44(a3) + move.l d1,d0 + bsr.w remvolumenode + moveq #0,d0 + bsr.w diskinsertremove +.end + rts + +action_inhibit + tst.l 20(a4) ;dp_Arg1 + beq.s .add + moveq #0,d0 + moveq #1,d1 + bsr dodiskchange + rts +.add + moveq #1,d0 + moveq #3,d1 + bsr dodiskchange + rts + +diskchange + move.b 172(a3),d0 + bmi.s .nodisk + moveq #1,d0 + moveq #3,d1 + bsr dodiskchange + rts +.nodisk + moveq #1,d1 + cmp.b #-2,d0 ;remove device node? + bne.s .nod1 + moveq #3,d1 +.nod1 moveq #0,d0 + bsr dodiskchange + rts + + ; exall is complex, need to emulate eac_MatchString and/or eac_MatchFunc +action_exall + move.l 36(a4),a0 ; dp_Arg5, struct ExAllControl + tst.l (a0) + beq.s .ex0 + tst.l 8(a0) ; eac_MatchString + bne.s .ex1 + tst.l 12(a0) ; eac_MatchFunc + bne.s .ex1 +.ex0 moveq #1,d0 ; no need to get more entries + rts ;nothing to do here +.ex1: movem.l d2-d7/a2-a6,-(sp) + move.l a0,a5 + move.l 24(a4),a2 ;dp_Arg2, ExAllData + move.l (a5),d7 ; eac_Entries + moveq #0,d5 ; previous entry +.ex4 tst.l d7 + beq.s .ex3 + move.l a2,d0 + beq.s .ex3 + moveq #0,d6 + move.l 8(a5),d1 ; MatchString + beq.s .ex5 + move.l 4(a2),d2 ; dir/file name + move.l 160(a3),a6 ; dosbase + jsr -$03cc(a6) ; MatchPatternNoCase + tst.l d0 + bne.s .ex5 + st d6 +.ex5 move.l 12(a5),d1 ; MatchFunc + beq.s .ex6 + move.l d1,a0 + move.l a2,a1 + move.l a2,-(sp) + lea 32(a4),a2 ; dp_Arg4, Type + pea .pop(pc) + move.l 8(a0),-(sp) + rts +.pop move.l (sp)+,a2 + tst.l d0 + bne.s .ex6 + st d6 +.ex6 tst.b d6 + beq.s .ex7 + ; need to delete current entry.. this is not really the proper way.. + move.l 4(a2),d0 ; pointer to filename (which is first address after structure) + sub.l a2,d0 ; copy this much data + tst.l (a2) ; delete last? (eac_Next) + bne.s .ex10 + ; need to clear previous eac_Next + move.l d5,d0 + beq.s .ex8 + move.l d0,a0 + clr.l (a0) + bra.s .ex8 +.ex10 move.l (a2),a0 + move.l a2,a1 +.ex9 move.l (a0)+,(a1)+ + subq.l #4,d0 + bpl.s .ex9 +.ex8 subq.l #1,(a5) ; eac_Entries + subq.l #1,d7 + bra.s .ex4 +.ex7 move.l a2,d5 + move.l (a2),a2 ; eac_Next + subq.l #1,d7 + bra.s .ex4 +.ex3 movem.l (sp)+,d2-d7/a2-a6 + move.l 36(a4),a0 ; dp_Arg5, struct ExAllControl + tst.l (a0) ; eac_Entries == 0 -> get more + rts + + +make_dev: ; IN: A0 param_packet, D6: unit_no, D7: b0=autoboot,b1=onthefly,b2=v36+ + ; A4: expansionbase bsr.w fsres move.l d0,PP_FSRES(a0) ; pointer to FileSystem.resource @@ -450,21 +812,22 @@ make_dev: ; IN: A0 param_packet, D6: unit_no, D7: boot, A4: expansionbase jsr (a1) ; ret:0=virtual,1=hardfile,2=rdbhardfile,-1=hardfile-donotmount,-2=no more subunits move.l d0,d3 - cmp.l #-2,d3 + cmp.w #-2,d3 beq.w general_ret - cmp.l #2,d3 - beq.s mountalways - + cmp.w #1,d3 + bne.s mountalways + ; KS < V36: init regular hardfiles only if filesystem is loaded - and.l d5,d0 - beq.s mountalways ; >= 36 - tst.l PP_FSSIZE(a0) - beq.w general_ret ; no filesystem -> don't mount + btst #2,d7 + bne.s mountalways ; >= 36 + btst #1,d7 + bne.w mountalways mountalways ; allocate memory for loaded filesystem move.l PP_FSSIZE(a0),d0 beq.s nordbfs1 + bmi.s nordbfs1 move.l a0,-(sp) moveq #1,d1 move.l 4.w,a6 @@ -481,7 +844,7 @@ nordbfs1: move.w #$FF20,d0 ; record in ui.startup (filesys_dev_remember) bsr.w getrtbase jsr (a0) - bra.w dont_mount + bra.s dont_mount do_mount: move.l a4,a6 @@ -498,7 +861,7 @@ do_mount: move.l d0,16(a3) ; dn_Handler move.l d0,32(a3) ; dn_SegList -dont_mount +dont_mount: tst.l PP_FSPTR(a1) ; filesystem? beq.s nordbfs2 move.l PP_FSPTR(a1),a0 @@ -527,16 +890,16 @@ nordbfs2: bne.b MKDV_doboot MKDV_is_filesys: - move.l #4000,20(a3) ; dn_StackSize - lea.l our_seglist(pc),a1 - move.l a1,d0 + move.l #6000,20(a3) ; dn_StackSize + lea.l our_seglist(pc),a0 + move.l a0,d0 lsr.l #2,d0 move.l d0,32(a3) ; dn_SegList moveq #-1,d0 move.l d0,36(a3) ; dn_GlobalVec MKDV_doboot: - tst.l d7 + btst #0,d7 beq.b MKDV_noboot move.l 4.w,a6 @@ -554,20 +917,106 @@ MKDV_doboot: move.l $104(a5),10(a1) ; filesys_configdev move.l a3,16(a1) ; devicenode lea.l 74(a4),a0 ; MountList - jmp -270(a6) ; Enqueue() + jsr -270(a6) ; Enqueue() + moveq #0,d0 + rts MKDV_noboot: - move.l a3,a0 + move.l a1,a2 ; bootnode + move.l a3,a0 ; parmpacket moveq #0,d1 move.l d1,a1 - moveq #-1,d0 + btst #1,d7 + beq.s .nob + btst #2,d7 + beq.s .nob + moveq #1,d1 ; ADNF_STARTPROC (v36+) +.nob moveq #-20,d0 move.l a4,a6 ; expansion base - jmp -150(a6) ; AddDosNode + jsr -150(a6) ; AddDosNode + btst #1,d7 + beq.s .noproc + btst #2,d7 + bne.s .noproc + + ; 1.3 and need to start immediately + move.l (a2),a0 ; 'dh0' but need 'dh0:' + moveq #2,d2 +.devpr1 addq.l #1,d2 + tst.b -3(a0,d2.l) + bne.s .devpr1 + move.l 4.w,a6 + move.l d2,d0 + moveq #1,d1 + jsr AllocMem(a6) + tst.l d0 + beq.s .noproc + move.l (a2),a0 + move.l d0,a2 + move.l a2,a1 +.devpr2 move.b (a0)+,(a1)+ + bne.s .devpr2 + move.b #':',-1(a1) + clr.b (a1) + move.l 4.w,a6 + lea doslibname(pc),a1 + moveq #0,d0 + jsr -$0228(a6) ; OpenLibrary + move.l d0,a6 + move.l a2,d1 + jsr -$0AE(a6) ; DeviceProc (start fs handler, ignore return code) + move.l a6,a1 + move.l 4.w,a6 + jsr -$019e(a6); CloseLibrary + move.l a2,a1 + move.l d2,d0 + jsr FreeMem(a6) +.noproc + moveq #0,d0 + rts + +addfsonthefly ; d1 = fs index + movem.l d2-d7/a2-a6,-(sp) + move.l d1,d6 + moveq #2+4,d7 + move.l 4.w,a6 + lea.l explibname(pc),a1 ; expansion lib name + moveq #36,d0 + jsr -552(a6) ; OpenLibrary + tst.l d0 + bne.s .newks + bclr #2,d7 + lea.l explibname(pc),a1 ; expansion lib name + moveq #0,d0 + jsr -552(a6) ; OpenLibrary +.newks move.l d0,a4 + move.l #PP_TOTAL,d0 + move.l #$10001,d1 + jsr AllocMem(a6) + move.l d0,a0 ; param packet + tst.l d0 + beq.s .nomem + move.l a4,PP_EXPLIB(a0) +.next movem.l a0/a4/a6,-(sp) + bsr.w make_dev + movem.l (sp)+,a0/a4/a6 + cmp.l #-2,d0 + beq.s .nomsub + swap d6 + addq.w #1,d6 + swap d6 + bra.s .next +.nomsub move.l a0,a1 + move.l #PP_TOTAL,d0 + jsr FreeMem(a6) +.nomem move.l a4,a1 + jsr -414(a6) ; CloseLibrary + movem.l (sp)+,d2-d7/a2-a6 + rts filesys_mainloop: move.l 4.w,a6 - moveq.l #0,d0 - move.l d0,a1 + sub.l a1,a1 jsr -294(a6) ; FindTask move.l d0,a0 lea.l $5c(a0),a5 ; pr_MsgPort @@ -583,9 +1032,16 @@ filesys_mainloop: ; 4: command chain ; 8: second thread's lock chain ; 12: dummy message - ; 32: the volume (80+44+1 bytes) + ; 32: the volume (44+80+1 bytes) ; 157: mousehack started-flag - move.l #80+44+1+20+12+1,d0 + ; 158: device node on/off status + ; 160: dosbase + ; 164: input.device ioreq (disk inserted/removed input message) + ; 168: timer.device ioreq + ; 172: disk change from host + ; 176: my task + ; 180: device node + move.l #12+20+(80+44+1)+(1+3)+4+4+4+(1+3)+4+4,d0 move.l #$10001,d1 ; MEMF_PUBLIC | MEMF_CLEAR jsr AllocMem(a6) move.l d0,a3 @@ -593,6 +1049,17 @@ filesys_mainloop: move.l d6,(a3) move.l d6,4(a3) move.l d6,8(a3) + move.l a2,160(a3) + st 158(a3) + + sub.l a1,a1 + jsr -294(a6) ; FindTask + move.l d0,176(a3) + + bsr.w allocinputdevice + move.l d0,164(a3) + bsr.w alloctimerdevice + move.l d0,168(a3) moveq.l #0,d5 ; No commands queued. @@ -607,7 +1074,17 @@ filesys_mainloop: bsr.w getrtbase moveq.l #0,d0 jsr (a0) - + move.l d0,d2 + + moveq #1,d0 + bsr.w addvolumenode + + btst #1,d2 + beq.s .nonotif + moveq #1,d0 + bsr.w diskinsertremove +.nonotif + bsr.w mousehack_init bra.w FSML_Reply @@ -621,11 +1098,27 @@ filesys_mainloop: FSML_loop: bsr.w mousehack_init - move.l a5,a0 - jsr -384(a6) ; WaitPort + move.l a5,a0 jsr -372(a6) ; GetMsg move.l d0,a4 + tst.l d0 + bne.s .msg + + moveq #0,d0 + move.b 15(a5),d1 ;mp_SigBit + bset d1,d0 + bset #17,d0 ; SIGBREAK_CTRL_D + jsr -$013e(a6) ;Wait +.msg + ; disk changed? + tst.b 172(a3) + beq.s .nodc + bsr.w diskchange + clr.b 172(a3) +.nodc + move.l a4,d0 + beq.s FSML_loop ; notify reply? cmp.w #38, 18(a4) @@ -649,7 +1142,7 @@ nonoti move.l a4,a1 moveq #38,d0 jsr FreeMem(a6) - bra.s FSML_loop + bra.w FSML_loop nonotif move.l 10(a4),d3 ; ln_Name @@ -665,7 +1158,7 @@ nonotif move.l (a2),a0 FSML_check_old: move.l a0,d0 - beq.b FSML_loop + beq.w FSML_loop move.l (a0),a1 move.l d0,a0 ; This field may be accessed concurrently by several UAE threads. @@ -697,7 +1190,7 @@ FSML_FromDOS: FSML_DoCommand: bsr.b LockCheck ; Make sure there are enough locks for the C code to grab. - move.w #$FF30,d0 + move.w #$FF30,d0 ; filesys_handler bsr.w getrtbase jsr (a0) tst.l d0 @@ -717,6 +1210,22 @@ FSML_Reply: bra.w FSML_loop ReplyOne: + cmp.l #31,8(a4) ;ACTION_INHIBIT? + bne.s FSML_ReplyOne2 + bsr.w action_inhibit +FSML_ReplyOne2: + cmp.l #1033,8(a4) ;ACTION_EXAMINE_ALL + bne.s FSML_ReplyOne3 +.exaretry: + bsr.w action_exall + bne.s FSML_ReplyOne3 + ; Arghh.. we need more entries. (some buggy programs fail if eac_Entries = 0 with continue enabled) + move.w #$ff58,d0 + bsr.w getrtbase + jsr (a0) + bra.s .exaretry + +FSML_ReplyOne3: move.l (a4),a1 ; dp_Link move.l 4(a4),a0 ; dp_Port move.l a5,4(a4) @@ -859,12 +1368,56 @@ createio: move.b #10,8(a0) ;NT_MESSAGE move.l d2,18(a0) move.l a2,14(a0) -.f movem.l (sp)+,d2/a2/a6 +.f tst.l d0 + movem.l (sp)+,d2/a2/a6 + rts + +allocinputdevice + movem.l a2/a6,-(sp) + move.l 4.w,a6 + bsr.w createport + bsr.w createio + beq.s .f + move.l d0,a1 + move.l d0,a2 + lea inp_dev(pc),a0 + moveq #0,d0 + moveq #0,d1 + jsr -$01bc(a6) ;OpenDevice + move.l d0,d1 + moveq #0,d0 + tst.l d1 + bne.s .f + move.l a2,d0 +.f tst.l d0 + movem.l (sp)+,a2/a6 + rts + +alloctimerdevice + movem.l a2/a6,-(sp) + move.l 4.w,a6 + bsr.w createport + bsr.w createio + beq.s .f + move.l d0,a2 + move.l d0,a1 + lea tim_dev(pc),a0 + moveq #0,d0 + moveq #0,d1 + jsr -$01bc(a6) ;OpenDevice + move.l d0,d1 + moveq #0,d0 + tst.l d1 + bne.s .f + move.l a2,d0 +.f tst.l d0 + movem.l (sp)+,a2/a6 rts createtask: - movem.l d2/d3/a2/a3/a6,-(sp) + movem.l d2/d3/d4/a2/a3/a6,-(sp) move.l 4,a6 + move.l d0,d4 move.l a0,d2 move.l a1,d3 move.l #92+2048,d0 @@ -874,6 +1427,7 @@ createtask: beq .f move.l d0,a2 move.b #1,8(a2) ;NT_TASK + move.b d4,9(a2) ; priority move.l d2,10(a2) lea 92(a2),a3 move.l a3,58(a2) @@ -883,8 +1437,10 @@ createtask: move.l a2,a1 move.l d3,a2 sub.l a3,a3 + move.l a1,d2 jsr -$011a(a6) ;AddTask -.f movem.l (sp)+,d2/d3/a2/a3/a6 + move.l d2,d0 +.f movem.l (sp)+,d2/d3/d4/a2/a3/a6 rts mousehack_e: dc.w 0 @@ -903,12 +1459,17 @@ mousehack_init: tst.b 157(a3) bne.s .no lea mousehack_e(pc),a0 - tst.w (a0) - beq.s .no + cmp.b #1,(a0) + bne.s .no lea mhname(pc),a0 lea mousehack_task(pc),a1 + moveq #5,d0 bsr createtask st 157(a3) + ;tell native side that mousehack is active + move.w #$FF38,d0 + bsr.w getrtbase + jsr (a0) .no move.l (sp)+,a0 rts @@ -939,29 +1500,12 @@ mousehack_task: jsr AllocMem(a6) move.l d0,a5 - bsr.w createport - bsr.w createio + bsr.w allocinputdevice move.l d0,MH_IO(a5) - beq .f - move.l d0,a1 - lea inp_dev(pc),a0 - moveq #0,d0 - moveq #0,d1 - jsr -$01bc(a6) ;OpenDevice - tst.l d0 - bne .f - - bsr.w createport - bsr.w createio + beq.w .f + bsr.w alloctimerdevice move.l d0,MH_TM(a5) - beq .f - move.l d0,a1 - lea tim_dev(pc),a0 - moveq #0,d0 - moveq #0,d1 - jsr -$01bc(a6) ;OpenDevice - tst.l d0 - bne .f + beq.w .f lea MH_FOO(a5),a3 move.l a4,12(a3);task @@ -1050,6 +1594,8 @@ inp_dev: dc.b 'input.device',0 tim_dev: dc.b 'timer.device',0 mhname: dc.b 'UAE mouse hack',0 exter_name: dc.b 'UAE filesystem',0 +fstaskname: dc.b 'UAE fs automounter',0 +fsprocname: dc.b 'UAE fs automount process',0 doslibname: dc.b 'dos.library',0 intlibname: dc.b 'intuition.library',0 explibname: dc.b 'expansion.library',0 diff --git a/src/filesys.cpp b/src/filesys.cpp index 0a1c553a..d99f5067 100644 --- a/src/filesys.cpp +++ b/src/filesys.cpp @@ -13,9 +13,7 @@ * (May - August 1989) * * Known limitations: - * Does not support ACTION_INHIBIT (big deal). - * Does not support several 2.0+ packet types. - * Does not support removable volumes. + * Does not support several (useless) 2.0+ packet types. * May not return the correct error code in some cases. * Does not check for sane values passed by AmigaDOS. May crash the emulation * if passed garbage values. @@ -86,21 +84,32 @@ static void aino_test_init (a_inode *aino) uaecptr filesys_initcode; static uae_u32 fsdevname, filesys_configdev; +static int filesys_in_interrupt; +static uae_u32 mountertask; +static int automountunit = -1; #define FS_STARTUP 0 #define FS_GO_DOWN 1 +#define DEVNAMES_PER_HDF 32 + typedef struct { + int open; char *devname; /* device name, e.g. UAE0: */ uaecptr devname_amiga; uaecptr startup; char *volname; /* volume name, e.g. CDROM, WORK, etc. */ int volflags; /* volume flags, readonly, stream uaefsdb support */ - char *rootdir; /* root unix directory */ + char *rootdir; /* root native directory/hdf. empty drive if invalid path */ + struct zvolume *zarchive; + char *rootdirdiff; /* "diff" file/directory */ int readonly; /* disallow write access? */ - int bootpri; /* boot priority */ + int bootpri; /* boot priority. -128 = no autoboot, -129 = no mount */ int devno; - int automounted; /* don't save to config if set */ + int controller; + int wasisempty; /* if true, this unit was created empty */ + int canremove; /* if true, this unit can be safely ejected and remounted */ + int configureddrive; /* if true, this is drive that was manually configured */ struct hardfiledata hf; @@ -114,25 +123,26 @@ typedef struct { } UnitInfo; struct uaedev_mount_info { - int num_units; UnitInfo ui[MAX_FILESYSTEM_UNITS]; }; -static struct uaedev_mount_info current_mountinfo; -struct uaedev_mount_info options_mountinfo; +static struct uaedev_mount_info mountinfo; -int nr_units (struct uaedev_mount_info *mountinfo) +int nr_units (void) { - return mountinfo->num_units; + int i, cnt = 0; + for (i = 0; i < MAX_FILESYSTEM_UNITS; i++) { + if (mountinfo.ui[i].open) + cnt++; + } + return cnt; } -int is_hardfile (struct uaedev_mount_info *mountinfo, int unit_no) +int is_hardfile (int unit_no) { - if (!mountinfo) - mountinfo = ¤t_mountinfo; - if (mountinfo->ui[unit_no].volname) + if (mountinfo.ui[unit_no].volname || mountinfo.ui[unit_no].wasisempty) return FILESYS_VIRTUAL; - if (mountinfo->ui[unit_no].hf.secspertrack == 0) { + if (mountinfo.ui[unit_no].hf.secspertrack == 0) { return FILESYS_HARDDRIVE; } return FILESYS_HARDFILE; @@ -140,6 +150,8 @@ int is_hardfile (struct uaedev_mount_info *mountinfo, int unit_no) static void close_filesys_unit (UnitInfo *uip) { + if (!uip->open) + return; if (uip->hf.fd != 0) fclose (uip->hf.fd); if (uip->volname != 0) @@ -160,37 +172,82 @@ static void close_filesys_unit (UnitInfo *uip) uip->volname = 0; uip->devname = 0; uip->rootdir = 0; + uip->open = 0; } -char *get_filesys_unit (struct uaedev_mount_info *mountinfo, int nr, - char **devname, char **volname, char **rootdir, int *readonly, - int *secspertrack, int *surfaces, int *reserved, - int *cylinders, uae_u64 *size, int *blocksize, int *bootpri, char **filesysdir, int *flags) +static UnitInfo *getuip(struct uae_prefs *p, int index) { - UnitInfo *uip = mountinfo->ui + nr; + if (index < 0) + return NULL; + index = p->mountconfig[index].configoffset; + if (index < 0) + return NULL; + return &mountinfo.ui[index]; +} - if (nr >= mountinfo->num_units) - return "No slot allocated for this unit"; - - *volname = uip->volname ? my_strdup (uip->volname) : 0; - if (uip->devname == 0 || strlen(uip->devname) == 0) { - *devname = (char *)xmalloc (10); - sprintf (*devname, "DH%d", nr); +int get_filesys_unitconfig (struct uae_prefs *p, int index, struct mountedinfo *mi) +{ + UnitInfo *ui = getuip(p, index); + struct uaedev_config_info *uci = &p->mountconfig[index]; + UnitInfo uitmp; + + memset(mi, 0, sizeof (struct mountedinfo)); + memset(&uitmp, 0, sizeof uitmp); + if (!ui) { + ui = &uitmp; + if (!uci->ishdf) { + mi->ismounted = 1; + if (uci->rootdir && strlen(uci->rootdir) == 0) + return FILESYS_VIRTUAL; + if (my_existsfile (uci->rootdir)) { + mi->ismedia = 1; + return FILESYS_VIRTUAL; + } + if (my_getvolumeinfo (uci->rootdir) < 0) + return -1; + mi->ismedia = 1; + return FILESYS_VIRTUAL; } else { - *devname = my_strdup (uip->devname); + ui->hf.readonly = 1; + ui->hf.blocksize = uci->blocksize; + ui->hf.fd = fopen (uci->rootdir, "r+b"); + if (ui->hf.fd == 0) { + mi->ismedia = 0; + mi->ismounted = 1; + if (uci->reserved == 0 && uci->sectors == 0 && uci->surfaces == 0) { + return FILESYS_HARDDRIVE; + } + return -1; + } + fseek(ui->hf.fd, 0, SEEK_END); + ui->hf.size = ftell(ui->hf.fd); + ui->hf.size &= ~(ui->hf.blocksize - 1); + fseek (ui->hf.fd, 0, SEEK_SET); + mi->ismedia = 1; + if (ui->hf.drive_empty) + mi->ismedia = 0; + fclose (ui->hf.fd); + ui->hf.fd = 0; } - *rootdir = uip->rootdir ? my_strdup (uip->rootdir) : 0; - *readonly = uip->readonly; - *secspertrack = uip->hf.secspertrack; - *surfaces = uip->hf.surfaces; - *reserved = uip->hf.reservedblocks; - *cylinders = uip->hf.nrcyls; - *blocksize = uip->hf.blocksize; - *size = uip->hf.size; - *bootpri = uip->bootpri; - if (flags) - *flags = uip->automounted ? FILESYS_FLAG_DONOTSAVE : 0; - return 0; + } else { + if (!ui->controller /*|| (ui->controller && p->cs_ide)*/) { + mi->ismounted = 1; + if (uci->ishdf) + mi->ismedia = ui->hf.drive_empty ? 0 : 1; + else + mi->ismedia = 1; + } + } + mi->size = ui->hf.size; + mi->nrcyls = (int)(uci->sectors * uci->surfaces ? (ui->hf.size / uci->blocksize) / (uci->sectors * uci->surfaces) : 0); + if (!uci->ishdf) + return FILESYS_VIRTUAL; + if (uci->reserved == 0 && uci->sectors == 0 && uci->surfaces == 0) { + if (ui->hf.flags & 1) + return FILESYS_HARDDRIVE; + return FILESYS_HARDFILE_RDB; + } + return FILESYS_HARDFILE; } static void stripsemicolon(char *s) @@ -201,27 +258,120 @@ static void stripsemicolon(char *s) s[strlen(s) - 1] = 0; } -static char *set_filesys_unit_1 (struct uaedev_mount_info *mountinfo, int nr, - char *devname, char *volname, char *rootdir, int readonly, - int secspertrack, int surfaces, int reserved, - int blocksize, int bootpri, char *filesysdir, int flags) +char *filesys_createvolname (const char *volname, const char *rootdir, const char *def) { - UnitInfo *ui = mountinfo->ui + nr; - static char errmsg[1024]; + char *nvol = NULL; + int i, archivehd; + char *p = NULL; + + archivehd = -1; + if (my_existsfile(rootdir)) + archivehd = 1; + else if (my_existsdir(rootdir)) + archivehd = 0; + + if ((!volname || strlen (volname) == 0) && rootdir && archivehd >= 0) { + p = my_strdup (rootdir); + for (i = strlen (p) - 1; i >= 0; i--) { + char c = p[i]; + if (c == ':' || c == '/' || c == '\\') { + if (i == strlen (p) - 1) + continue; + if (!strcmp (p + i, ":\\")) { + xfree (p); + p = (char *) xmalloc (10); + p[0] = rootdir[0]; + p[1] = 0; + i = 0; + } else { + i++; + } + break; + } + } + if (i >= 0) + nvol = my_strdup (p + i); + } + if (!nvol && archivehd >= 0) { + char *s = NULL; + if (volname && strlen(volname) > 0) + nvol = my_strdup (volname); + else + nvol = my_strdup (def); + } + if (!nvol) { + if (volname && strlen (volname)) + nvol = my_strdup (volname); + else + nvol = my_strdup (""); + } + stripsemicolon(nvol); + xfree (p); + return nvol; +} + +static int set_filesys_volume(const char *rootdir, int *flags, int *readonly, int *emptydrive, struct zvolume **zvp) +{ + *emptydrive = 0; + if (my_existsfile(rootdir)) { + struct zvolume *zv; + zv = zfile_fopen_archive(rootdir); + if (!zv) { + write_log ("'%s' is not a supported archive file\n", rootdir); + return -1; + } + *zvp = zv; + *flags = MYVOLUMEINFO_ARCHIVE; + *readonly = 1; + } else { + *flags = my_getvolumeinfo (rootdir); + if (*flags < 0) { + if (rootdir && rootdir[0]) + write_log ("directory '%s' not found, mounting as empty drive\n", rootdir); + *emptydrive = 1; + *flags = 0; + } else if ((*flags) & MYVOLUMEINFO_READONLY) { + write_log ("'%s' set to read-only\n", rootdir); + *readonly = 1; + } + } + return 1; +} + +static int set_filesys_unit_1 (int nr, + char *devname, char *volname, const char *rootdir, int readonly, + int secspertrack, int surfaces, int reserved, + int blocksize, int bootpri, int donotmount, int autoboot, + char *filesysdir, int hdc, int flags) +{ + UnitInfo *ui; int i; + int emptydrive = 0; - if (nr >= mountinfo->num_units) - return "No slot allocated for this unit"; - - for (i = 0; i < mountinfo->num_units; i++) { - if (nr == i) - continue; - if (!strcmpi (mountinfo->ui[i].rootdir, rootdir)) { - sprintf (errmsg, "directory/hardfile '%s' already added", rootdir); - return errmsg; + if (hdc) + return -1; + if (nr < 0) { + for (nr = 0; nr < MAX_FILESYSTEM_UNITS; nr++) { + if (!mountinfo.ui[nr].open) + break; + } + if (nr == MAX_FILESYSTEM_UNITS) { + write_log("No slot allocated for this unit\n"); + return -1; } } + for (i = 0; i < MAX_FILESYSTEM_UNITS; i++) { + if (nr == i || !mountinfo.ui[i].open) + continue; + if (rootdir && strlen(rootdir) > 0 && !strcmpi (mountinfo.ui[i].rootdir, rootdir)) { + write_log ("directory/hardfile '%s' already added\n", rootdir); + return -1; + } + } + + ui = &mountinfo.ui[nr]; + ui->open = 0; ui->devname = 0; ui->volname = 0; ui->rootdir = 0; @@ -229,11 +379,16 @@ static char *set_filesys_unit_1 (struct uaedev_mount_info *mountinfo, int nr, ui->back_pipe = 0; ui->hf.fd = 0; ui->bootpri = 0; - ui->automounted = flags & FILESYS_FLAG_DONOTSAVE; - if (volname != 0) { - ui->volname = my_strdup (volname); - stripsemicolon(ui->volname); + if (volname != NULL) { + int flags = 0; + emptydrive = 1; + if (rootdir) { + if (set_filesys_volume (rootdir, &flags, &readonly, &emptydrive, &ui->zarchive) < 0) + return -1; + } + ui->volname = filesys_createvolname (volname, rootdir, "harddrive"); + ui->volflags = flags; } else { ui->hf.secspertrack = secspertrack; ui->hf.surfaces = surfaces; @@ -246,118 +401,168 @@ static char *set_filesys_unit_1 (struct uaedev_mount_info *mountinfo, int nr, ui->hf.readonly = readonly = 1; ui->hf.fd = fopen (rootdir, "rb"); } - if (ui->hf.fd == 0) - return "Hardfile not found"; - fseek(ui->hf.fd, 0, SEEK_END); - ui->hf.size = ftell(ui->hf.fd); - ui->hf.size &= ~(ui->hf.blocksize - 1); - fseek (ui->hf.fd, 0, SEEK_SET); - if ((ui->hf.blocksize & (ui->hf.blocksize - 1)) != 0 || ui->hf.blocksize == 0) - return "Bad blocksize"; - if ((ui->hf.secspertrack || ui->hf.surfaces || ui->hf.reservedblocks) && - (ui->hf.secspertrack < 1 || ui->hf.surfaces < 1 || ui->hf.surfaces > 1023 || - ui->hf.reservedblocks < 0 || ui->hf.reservedblocks > 1023) != 0) - return "Bad hardfile geometry"; - if (ui->hf.blocksize > ui->hf.size || ui->hf.size == 0) - return "Hardfile too small"; - ui->hf.nrcyls = (int)(ui->hf.secspertrack * ui->hf.surfaces ? (ui->hf.size / ui->hf.blocksize) / (ui->hf.secspertrack * ui->hf.surfaces) : 0); + if (!ui->hf.drive_empty) { + if (ui->hf.fd == 0) { + write_log ("Hardfile %s not found\n", ui->hf.device_name); + goto err; } + fseek(ui->hf.fd, 0, SEEK_END); + ui->hf.size = ftell(ui->hf.fd); + ui->hf.size &= ~(ui->hf.blocksize - 1); + fseek (ui->hf.fd, 0, SEEK_SET); + if ((ui->hf.blocksize & (ui->hf.blocksize - 1)) != 0 || ui->hf.blocksize == 0) { + write_log("Hardfile %s bad blocksize\n", ui->hf.device_name); + goto err; + } + if ((ui->hf.secspertrack || ui->hf.surfaces || ui->hf.reservedblocks) && + (ui->hf.secspertrack < 1 || ui->hf.surfaces < 1 || ui->hf.surfaces > 1023 || + ui->hf.reservedblocks < 0 || ui->hf.reservedblocks > 1023) != 0) { + write_log("Hardfile %s bad hardfile geometry\n", ui->hf.device_name); + goto err; + } + if (ui->hf.blocksize > ui->hf.size || ui->hf.size == 0) { + write_log("Hardfile %s too small\n", ui->hf.device_name); + goto err; + } + ui->hf.nrcyls = (int)(ui->hf.secspertrack * ui->hf.surfaces ? (ui->hf.size / ui->hf.blocksize) / (ui->hf.secspertrack * ui->hf.surfaces) : 0); + } + } ui->self = 0; ui->reset_state = FS_STARTUP; + ui->wasisempty = emptydrive; + ui->canremove = emptydrive && (flags & MYVOLUMEINFO_REUSABLE); ui->rootdir = my_strdup (rootdir); if(devname != 0) { ui->devname = my_strdup (devname); stripsemicolon(ui->devname); } ui->readonly = readonly; - if (bootpri < -128) bootpri = -128; + if (!autoboot) + bootpri = -128; + if (donotmount) + bootpri = -129; + if (bootpri < -129) bootpri = -129; if (bootpri > 127) bootpri = 127; ui->bootpri = bootpri; - - return 0; + ui->open = 1; + return nr; +err: + if (ui->hf.fd != 0) + { + fclose(ui->hf.fd); + ui->hf.fd = 0; + } + return -1; } -char *set_filesys_unit (struct uaedev_mount_info *mountinfo, int nr, - char *devname, char *volname, char *rootdir, int readonly, +static int set_filesys_unit (int nr, + char *devname, char *volname, const char *rootdir, int readonly, int secspertrack, int surfaces, int reserved, - int blocksize, int bootpri, char *filesysdir, int flags) + int blocksize, int bootpri, int donotmount, int autoboot, + char *filesysdir, int hdc, int flags) { - char *result; - UnitInfo ui = mountinfo->ui[nr]; - fclose (ui.hf.fd); - result = set_filesys_unit_1 (mountinfo, nr, devname, volname, rootdir, readonly, - secspertrack, surfaces, reserved, blocksize, bootpri, filesysdir, flags); - if (result) - mountinfo->ui[nr] = ui; - else - close_filesys_unit (&ui); + int ret; - return result; + ret = set_filesys_unit_1 (nr, devname, volname, rootdir, readonly, + secspertrack, surfaces, reserved, blocksize, bootpri, donotmount, autoboot, + filesysdir, hdc, flags); + return ret; } -char *add_filesys_unit (struct uaedev_mount_info *mountinfo, - char *devname, char *volname, char *rootdir, int readonly, +static int add_filesys_unit (char *devname, char *volname, const char *rootdir, int readonly, int secspertrack, int surfaces, int reserved, - int blocksize, int bootpri, char *filesysdir, int flags) + int blocksize, int bootpri, int donotmount, int autoboot, + char *filesysdir, int hdc, int flags) { - char *retval; - int nr = mountinfo->num_units; - UnitInfo *uip = mountinfo->ui + nr; + int ret; - if (nr >= MAX_FILESYSTEM_UNITS) - return "Maximum number of file systems mounted"; - - mountinfo->num_units++; - retval = set_filesys_unit_1 (mountinfo, nr, devname, volname, rootdir, readonly, - secspertrack, surfaces, reserved, blocksize, bootpri, filesysdir, flags); - if (retval) - mountinfo->num_units--; - return retval; -} - -int kill_filesys_unit (struct uaedev_mount_info *mountinfo, int nr) -{ - UnitInfo *uip = mountinfo->ui; - if (nr >= mountinfo->num_units || nr < 0) + if (nr_units() >= MAX_FILESYSTEM_UNITS) return -1; - close_filesys_unit (mountinfo->ui + nr); + ret = set_filesys_unit_1 (-1, devname, volname, rootdir, readonly, + secspertrack, surfaces, reserved, blocksize, + bootpri, donotmount, autoboot, filesysdir, hdc, flags); + return ret; +} - mountinfo->num_units--; - for (; nr < mountinfo->num_units; nr++) { - uip[nr] = uip[nr+1]; +int kill_filesys_unitconfig (struct uae_prefs *p, int nr) +{ + struct uaedev_config_info *uci; + + if (nr < 0) + return 0; + uci = &p->mountconfig[nr]; + if (uci->configoffset >= 0) + filesys_media_change (uci->rootdir, 0, uci); + while (nr < MOUNT_CONFIG_SIZE) { + memmove (&p->mountconfig[nr], &p->mountconfig[nr + 1], sizeof (struct uaedev_config_info)); + nr++; } - return 0; + p->mountitems--; + memset (&p->mountconfig[MOUNT_CONFIG_SIZE - 1], 0, sizeof (struct uaedev_config_info)); + return 1; } -int move_filesys_unit (struct uaedev_mount_info *mountinfo, int nr, int to) +int move_filesys_unitconfig (struct uae_prefs *p, int nr, int to) { - UnitInfo tmpui; - UnitInfo *uip = mountinfo->ui; + struct uaedev_config_info *uci1, *uci2, tmpuci; - if (nr >= mountinfo->num_units || nr < 0 - || to >= mountinfo->num_units || to < 0 - || to == nr) - return -1; - tmpui = uip[nr]; - if (to > nr) { - int i; - for (i = nr; i < to; i++) - uip[i] = uip[i + 1]; - } else { - int i; - for (i = nr; i > to; i--) - uip[i] = uip[i - 1]; + uci1 = &p->mountconfig[nr]; + uci2 = &p->mountconfig[to]; + if (nr == to) + return 0; + memcpy (&tmpuci, uci1, sizeof (struct uaedev_config_info)); + memcpy (uci1, uci2, sizeof (struct uaedev_config_info)); + memcpy (uci2, &tmpuci, sizeof (struct uaedev_config_info)); + return 1; +} + +static void initialize_mountinfo(void) +{ + int i; + struct uaedev_config_info *uci; + UnitInfo *uip = &mountinfo.ui[0]; + + for (i = 0; i < currprefs.mountitems; i++) { + int idx; + uci = &currprefs.mountconfig[i]; + if (uci->controller == HD_CONTROLLER_UAE) { + idx = set_filesys_unit_1 (-1, uci->devname, uci->ishdf ? NULL : uci->volname, uci->rootdir, + uci->readonly, uci->sectors, uci->surfaces, uci->reserved, + uci->blocksize, uci->bootpri, uci->donotmount, uci->autoboot, uci->filesys, 0, MYVOLUMEINFO_REUSABLE); + if (idx >= 0) { + UnitInfo *ui; + uci->configoffset = idx; + ui = &mountinfo.ui[idx]; + ui->configureddrive = 1; + } + } /* else if (uci->controller <= HD_CONTROLLER_IDE3 ) { + gayle_add_ide_unit (uci->controller - HD_CONTROLLER_IDE0, uci->rootdir, uci->blocksize, uci->readonly, + uci->devname, uci->sectors, uci->surfaces, uci->reserved, + uci->bootpri, uci->filesys); + } else if (uci->controller <= HD_CONTROLLER_SCSI6) { + if (currprefs.cs_mbdmac) { + a3000_add_scsi_unit (uci->controller - HD_CONTROLLER_SCSI0, uci->rootdir, uci->blocksize, uci->readonly, + uci->devname, uci->sectors, uci->surfaces, uci->reserved, + uci->bootpri, uci->filesys); + } else if (currprefs.cs_a2091) { + a2091_add_scsi_unit (uci->controller - HD_CONTROLLER_SCSI0, uci->rootdir, uci->blocksize, uci->readonly, + uci->devname, uci->sectors, uci->surfaces, uci->reserved, + uci->bootpri, uci->filesys); + } else if (currprefs.cs_cdtvscsi) { + cdtv_add_scsi_unit (uci->controller - HD_CONTROLLER_SCSI0, uci->rootdir, uci->blocksize, uci->readonly, + uci->devname, uci->sectors, uci->surfaces, uci->reserved, + uci->bootpri, uci->filesys); + } + } else if (uci->controller == HD_CONTROLLER_PCMCIA_SRAM) { + gayle_add_pcmcia_sram_unit (uci->rootdir, uci->readonly); + } */ } - uip[to] = tmpui; - return 0; } -int sprintf_filesys_unit (struct uaedev_mount_info *mountinfo, char *buffer, int num) +int sprintf_filesys_unit (char *buffer, int num) { - UnitInfo *uip = mountinfo->ui; - if (num >= mountinfo->num_units) - return -1; + UnitInfo *uip = mountinfo.ui; if (uip[num].volname != 0) sprintf (buffer, "(DH%d:) Filesystem, %s: %s %s", num, uip[num].volname, @@ -368,80 +573,18 @@ int sprintf_filesys_unit (struct uaedev_mount_info *mountinfo, char *buffer, int return 0; } -void write_filesys_config (struct uae_prefs *p, struct uaedev_mount_info *mountinfo, - const char *unexpanded, const char *default_path, struct zfile *f) -{ - UnitInfo *uip = mountinfo->ui; - int i; - char tmp[MAX_DPATH]; - - for (i = 0; i < mountinfo->num_units; i++) { - int dosave = 1; - char *str; -#ifdef _WIN32 - if (p->win32_automount_drives && uip[i].automounted) - dosave = 0; -#endif - if (!dosave) - continue; - str = cfgfile_subst_path (default_path, unexpanded, uip[i].rootdir); - if (uip[i].volname != 0) { - sprintf (tmp, "filesystem2=%s,%s:%s:%s,%d\n", uip[i].readonly ? "ro" : "rw", - uip[i].devname ? uip[i].devname : "", uip[i].volname, str, uip[i].bootpri); - zfile_fputs (f, tmp); - sprintf (tmp, "filesystem=%s,%s:%s\n", uip[i].readonly ? "ro" : "rw", - uip[i].volname, str); - zfile_fputs (f, tmp); - } else { - sprintf (tmp, "hardfile2=%s,%s:%s,%d,%d,%d,%d,%d,%s\n", - uip[i].readonly ? "ro" : "rw", - uip[i].devname ? uip[i].devname : "", str, - uip[i].hf.secspertrack, uip[i].hf.surfaces, uip[i].hf.reservedblocks, uip[i].hf.blocksize, - uip[i].bootpri,/*uip[i].filesysdir ? uip[i].filesysdir :*/ ""); - zfile_fputs (f, tmp); - sprintf (tmp, "hardfile=%s,%d,%d,%d,%d,%s\n", - uip[i].readonly ? "ro" : "rw", uip[i].hf.secspertrack, - uip[i].hf.surfaces, uip[i].hf.reservedblocks, uip[i].hf.blocksize, str); - zfile_fputs (f, tmp); - } - xfree (str); - } -} - -static void dup_mountinfo (struct uaedev_mount_info *mip, struct uaedev_mount_info *mip_d) +void free_mountinfo (void) { int i; - struct uaedev_mount_info *i2 = mip_d; - - memcpy (i2, mip, sizeof *i2); - - for (i = 0; i < i2->num_units; i++) { - UnitInfo *uip = i2->ui + i; - if (uip->volname) - uip->volname = my_strdup (uip->volname); - if (uip->devname) - uip->devname = my_strdup (uip->devname); - if (uip->rootdir) - uip->rootdir = my_strdup (uip->rootdir); - if (uip->hf.fd) - uip->hf.fd = fdopen ( dup (fileno (uip->hf.fd)), uip->readonly ? "rb" : "r+b"); - } -} - -void free_mountinfo (struct uaedev_mount_info *mip) -{ - int i; - if (!mip) - return; - for (i = 0; i < mip->num_units; i++) - close_filesys_unit (mip->ui + i); - mip->num_units = 0; + for (i = 0; i < MAX_FILESYSTEM_UNITS; i++) + close_filesys_unit (mountinfo.ui + i); + //gayle_free_units(); } struct hardfiledata *get_hardfile_data (int nr) { - UnitInfo *uip = current_mountinfo.ui; - if (nr < 0 || nr >= current_mountinfo.num_units || uip[nr].volname != 0) + UnitInfo *uip = mountinfo.ui; + if (nr < 0 || nr >= MAX_FILESYSTEM_UNITS || uip[nr].open == 0 || is_hardfile(nr) == FILESYS_VIRTUAL) return 0; return &uip[nr].hf; } @@ -456,6 +599,7 @@ struct hardfiledata *get_hardfile_data (int nr) #define dp_Arg2 24 #define dp_Arg3 28 #define dp_Arg4 32 +#define dp_Arg5 36 /* result codes */ #define DOS_TRUE ((unsigned long)-1L) @@ -474,6 +618,7 @@ struct hardfiledata *get_hardfile_data (int nr) #define ACTION_FREE_LOCK 15 #define ACTION_DELETE_OBJECT 16 #define ACTION_RENAME_OBJECT 17 +#define ACTION_MORE_CACHE 18 #define ACTION_COPY_DIR 19 #define ACTION_SET_PROTECT 21 #define ACTION_CREATE_DIR 22 @@ -490,6 +635,7 @@ struct hardfiledata *get_hardfile_data (int nr) #define ACTION_FIND_OUTPUT 1006 #define ACTION_END 1007 #define ACTION_SEEK 1008 +#define ACTION_WRITE_PROTECT 1023 #define ACTION_IS_FILESYSTEM 1027 #define ACTION_READ 'R' #define ACTION_WRITE 'W' @@ -504,8 +650,9 @@ struct hardfiledata *get_hardfile_data (int nr) #define ACTION_FH_FROM_LOCK 1026 #define ACTION_COPY_DIR_FH 1030 #define ACTION_PARENT_FH 1031 +#define ACTION_EXAMINE_ALL 1033 #define ACTION_EXAMINE_FH 1034 -#define ACTION_EXAMINE_ALL 1033 +#define ACTION_EXAMINE_ALL_END 1035 #define ACTION_MAKE_LINK 1021 #define ACTION_READ_LINK 1024 #define ACTION_FORMAT 1020 @@ -541,11 +688,19 @@ typedef struct notify { char *partname; } Notify; +typedef struct exallkey { + uae_u32 id; + void *dirhandle; + char *fn; + uaecptr control; +} ExAllKey; + /* Since ACTION_EXAMINE_NEXT is so braindamaged, we have to keep * some of these around */ -#define EXKEYS 100 +#define EXKEYS 128 +#define EXALLKEYS 100 #define MAX_AINO_HASH 128 #define NOTIFY_HASH_SIZE 127 @@ -576,10 +731,12 @@ typedef struct _unit { int next_exkey; unsigned long total_locked_ainos; + /* ExAll */ + ExAllKey exalls[EXALLKEYS]; + int exallid; + /* Keys */ struct key *keys; - uae_u32 key_uniq; - uae_u32 a_uniq; a_inode rootnode; unsigned long aino_cache_size; @@ -590,8 +747,21 @@ typedef struct _unit { struct notify *notifyhash[NOTIFY_HASH_SIZE]; int volflags; + uae_u32 lockkey; + int inhibited; + int canremovable; + int mountcount; + struct zvolume *zarchive; + + int reinsertdelay; + char *newvolume; + char *newrootdir; + int newreadonly; + int newflags; } Unit; +static uae_u32 a_uniq, key_uniq; + typedef uae_u8 *dpacket; #define PUT_PCK_RES1(p,v) do { do_put_mem_long ((uae_u32 *)((p) + dp_Res1), (v)); } while (0) #define PUT_PCK_RES2(p,v) do { do_put_mem_long ((uae_u32 *)((p) + dp_Res2), (v)); } while (0) @@ -602,6 +772,9 @@ typedef uae_u8 *dpacket; #define GET_PCK_ARG2(p) ((uae_s32)(do_get_mem_long ((uae_u32 *)((p) + dp_Arg2)))) #define GET_PCK_ARG3(p) ((uae_s32)(do_get_mem_long ((uae_u32 *)((p) + dp_Arg3)))) #define GET_PCK_ARG4(p) ((uae_s32)(do_get_mem_long ((uae_u32 *)((p) + dp_Arg4)))) +#define GET_PCK_ARG5(p) ((uae_s32)(do_get_mem_long ((uae_u32 *)((p) + dp_Arg5)))) + +static int flush_cache(Unit *unit, int num); static char *char1 (uaecptr addr) { @@ -657,7 +830,6 @@ static char *bstr_cut (Unit *unit, uaecptr addr) } static Unit *units = 0; -static int unit_num = 0; static Unit* find_unit (uaecptr port) @@ -670,9 +842,341 @@ find_unit (uaecptr port) return u; } +static void *fs_opendir (Unit *u, const char *nname) +{ + if (u->volflags & MYVOLUMEINFO_ARCHIVE) + return zfile_opendir_archive (nname); + else + return my_opendir (nname); +} +static void fs_closedir (Unit *u, void *d) +{ + if (u->volflags & MYVOLUMEINFO_ARCHIVE) + zfile_closedir_archive ((zdirectory *)d); + else + my_closedir (d); +} +static void *fs_open (Unit *unit, const char *name, int flags) +{ + int isarch = unit->volflags & MYVOLUMEINFO_ARCHIVE; + if (isarch) + return zfile_open_archive(name, flags); + else + return my_open(name, flags); +} +static void fs_close(Unit *unit, void *fd) +{ + int isarch = unit->volflags & MYVOLUMEINFO_ARCHIVE; + if (isarch) + zfile_close_archive(fd); + else + my_close(fd); +} +static unsigned int fs_read (Unit *unit, void *d, void *b, unsigned int size) +{ + int isarch = unit->volflags & MYVOLUMEINFO_ARCHIVE; + if (isarch) + return zfile_read_archive(d, b, size); + else + return my_read (d, b, size); +} +static unsigned int fs_lseek (Unit *unit, void *d, unsigned int offset, int whence) +{ + int isarch = unit->volflags & MYVOLUMEINFO_ARCHIVE; + if (isarch) + return zfile_lseek_archive(d, offset, whence); + else + return my_lseek (d, offset, whence); +} + +static void set_volume_name(Unit *unit) +{ + int namelen; + int i; + + namelen = strlen (unit->ui.volname); + put_byte (unit->volume + 44, namelen); + for (i = 0; i < namelen; i++) + put_byte (unit->volume + 45 + i, unit->ui.volname[i]); + put_byte (unit->volume + 45 + namelen, 0); + unit->rootnode.aname = unit->ui.volname; + unit->rootnode.nname = unit->ui.rootdir; + unit->rootnode.mountcount = unit->mountcount; +} + +static int filesys_isvolume(Unit *unit) +{ + return get_byte (unit->volume + 44); +} + +static void clear_exkeys(Unit *unit) +{ + int i; + a_inode *a; + for (i = 0; i < EXKEYS; i++) { + unit->examine_keys[i].aino = 0; + unit->examine_keys[i].curr_file = 0; + unit->examine_keys[i].uniq = 0; + } + for (i = 0; i < EXALLKEYS; i++) { + fs_closedir (unit, unit->exalls[i].dirhandle); + unit->exalls[i].dirhandle = NULL; + xfree (unit->exalls[i].fn); + unit->exalls[i].fn = NULL; + unit->exalls[i].id = 0; + } + unit->exallid = 0; + unit->next_exkey = 1; + a = &unit->rootnode; + while (a) { + a->exnext_count = 0; + if (a->locked_children) { + a->locked_children = 0; + unit->total_locked_ainos--; + } + a = a->next; + if (a == &unit->rootnode) + break; + } +} + +int filesys_eject (int nr) +{ + UnitInfo *ui = &mountinfo.ui[nr]; + Unit *u = ui->self; + + if (!mountertask) + return 0; + if (!ui->open || u == NULL) + return 0; + if (is_hardfile(nr) != FILESYS_VIRTUAL) + return 0; + if (!filesys_isvolume(u)) + return 0; + zfile_fclose_archive (u->zarchive); + u->zarchive = NULL; + u->mountcount++; + write_log ("FILESYS: removed volume '%s'\n", u->ui.volname); + flush_cache(u, -1); + put_byte (u->volume + 172 - 32, -2); + uae_Signal(get_long(u->volume + 176 - 32), 1 << 17); + return 1; +} + +void filesys_vsync (void) +{ + Unit *u; + + for (u = units; u; u = u->next) { + if (u->reinsertdelay > 0) { + u->reinsertdelay--; + if (u->reinsertdelay == 0) { + filesys_insert (u->unit, u->newvolume, u->newrootdir, u->newreadonly, u->newflags); + xfree (u->newvolume); + u->newvolume = NULL; + xfree (u->newrootdir); + u->newrootdir = NULL; + } + } + } +} + +static void filesys_delayed_change (Unit *u, int frames, const char *rootdir, const char *volume, int readonly, int flags) +{ + u->reinsertdelay = 50; + u->newflags = flags; + u->newreadonly = readonly; + u->newrootdir = my_strdup (rootdir); + if (volume) + u->newvolume = my_strdup (volume); + filesys_eject(u->unit); + if (!rootdir || strlen (rootdir) == 0) + u->reinsertdelay = 0; + if (u->reinsertdelay > 0) + write_log ("FILESYS: delayed insert %d: '%s' ('%s')\n", u->unit, volume ? volume : "", rootdir); +} + +int filesys_media_change (const char *rootdir, int inserted, struct uaedev_config_info *uci) +{ + Unit *u; + UnitInfo *ui; + int nr = -1; + char volname[MAX_DPATH], *volptr; + char devname[MAX_DPATH]; + + if (!mountertask) + return 0; + if (automountunit >= 0) + return -1; + nr = -1; + for (u = units; u; u = u->next) { + if (is_hardfile (u->unit) == FILESYS_VIRTUAL) { + ui = &mountinfo.ui[u->unit]; + if (ui->rootdir && !memcmp (ui->rootdir, rootdir, strlen (rootdir)) && strlen (rootdir) + 3 >= strlen (ui->rootdir)) { + if (filesys_isvolume (u) && inserted) { + if (uci) + filesys_delayed_change (u, 50, rootdir, uci->volname, uci->readonly, 0); + return 0; + } + nr = u->unit; + break; + } + } + } + ui = NULL; + if (nr >= 0) + ui = &mountinfo.ui[nr]; + /* only configured drives have automount support if automount is disabled */ + if (/*!currprefs.win32_automount_removable &&*/ (!ui || !ui->configureddrive) && (inserted == 0 || inserted == 1)) + return 0; + if (nr < 0 && !inserted) + return 0; + /* already mounted volume was ejected? */ + if (nr >= 0 && !inserted) + return filesys_eject (nr); + if (inserted) { + if (uci) { + volptr = my_strdup (uci->volname); + } else { + volname[0] = 0; + target_get_volume_name (&mountinfo, rootdir, volname, MAX_DPATH, 1, 0); + volptr = volname; + if (!volname[0]) + volptr = NULL; + if (ui && ui->configureddrive && ui->volname) { + volptr = volname; + strcpy (volptr, ui->volname); + } + } + if (!volptr) { + volptr = filesys_createvolname (NULL, rootdir, "removable"); + strcpy (volname, volptr); + xfree (volptr); + volptr = volname; + } + + /* new volume inserted and it was previously mounted? */ + if (nr >= 0) { + if (!filesys_isvolume (u)) /* not going to mount twice */ + return filesys_insert (nr, volptr, rootdir, -1, -1); + return 0; + } + if (inserted < 0) /* -1 = only mount if already exists */ + return 0; + /* new volume inserted and it was not previously mounted? + * perhaps we have some empty device slots? */ + nr = filesys_insert (-1, volptr, rootdir, 0, 0); + if (nr >= 100) { + if (uci) + uci->configoffset = nr - 100; + return nr; + } + /* nope, uh, need black magic now.. */ + if (uci) + strcpy (devname, uci->devname); + else + sprintf (devname, "RDH%d", nr_units()); + nr = add_filesys_unit (devname, volptr, rootdir, 0, 0, 0, 0, 0, 0, 0, 1, NULL, 0, MYVOLUMEINFO_REUSABLE); + if (nr < 0) + return 0; + if (inserted > 1) + mountinfo.ui[nr].canremove = 1; + automountunit = nr; + uae_Signal (mountertask, 1 << 17); + /* poof */ + if (uci) + uci->configoffset = nr; + return 100 + nr; + } + return 0; +} + +int hardfile_remount (int nr) +{ + /* this does work but every media reinsert duplicates the device.. */ +#if 0 + if (!mountertask) + return 0; + automountunit = nr; + uae_Signal (mountertask, 1 << 17); +#endif + return 1; +} + +int filesys_insert (int nr, char *volume, const char *rootdir, int readonly, int flags) +{ + struct uaedev_config_info *uci; + int emptydrive = 0; + UnitInfo *ui; + Unit *u; + + if (!mountertask) + return 0; + if (nr < 0) { + for (u = units; u; u = u->next) { + if (is_hardfile (u->unit) == FILESYS_VIRTUAL) { + if (!filesys_isvolume (u) && mountinfo.ui[u->unit].canremove) + break; + } + } + if (!u) { + for (u = units; u; u = u->next) { + if (is_hardfile (u->unit) == FILESYS_VIRTUAL) { + if (mountinfo.ui[u->unit].canremove) + break; + } + } + } + if (!u) + return 0; + nr = u->unit; + ui = &mountinfo.ui[nr]; + } else { + ui = &mountinfo.ui[nr]; + u = ui->self; + } + uci = &currprefs.mountconfig[nr]; + + if (!ui->open || u == NULL) + return 0; + if (u->reinsertdelay) + return -1; + if (is_hardfile(nr) != FILESYS_VIRTUAL) + return 0; + if (filesys_isvolume (u)) { + filesys_delayed_change (u, 50, rootdir, volume, readonly, flags); + return -1; + } + u->mountcount++; + clear_exkeys (u); + xfree (u->ui.rootdir); + ui->rootdir = u->ui.rootdir = my_strdup (rootdir); + flush_cache(u, -1); + if (set_filesys_volume (rootdir, &flags, &readonly, &emptydrive, &u->zarchive) < 0) + return 0; + if (emptydrive) + return 0; + xfree (u->ui.volname); + ui->volname = u->ui.volname = filesys_createvolname (volume, rootdir, "removable"); + set_volume_name (u); + write_log ("FILESYS: inserted volume NR=%d RO=%d '%s' ('%s')\n", nr, readonly, ui->volname, rootdir); + if (flags >= 0) + ui->volflags = u->volflags = u->ui.volflags = flags; + strcpy (uci->volname, ui->volname); + strcpy (uci->rootdir, rootdir); + if (readonly >= 0) + uci->readonly = ui->readonly = u->ui.readonly = readonly; + put_byte (u->volume + 44, 0); + put_byte (u->volume + 172 - 32, 1); + uae_Signal (get_long(u->volume + 176 - 32), 1 << 17); + return 100 + nr; +} + /* flags and comments supported? */ static int fsdb_cando (Unit *unit) { + if (unit->volflags & MYVOLUMEINFO_ARCHIVE) + return 1; // if (currprefs.filesys_custom_uaefsdb && (unit->volflags & MYVOLUMEINFO_STREAMS)) // return 1; // if (!currprefs.filesys_no_uaefsdb) @@ -706,12 +1210,78 @@ static void dispose_aino (Unit *unit, a_inode **aip, a_inode *aino) *aip = aino->sibling; xfree (aino->aname); - if (aino->comment) - xfree (aino->comment); + xfree (aino->comment); xfree (aino->nname); xfree (aino); } +static void free_all_ainos (Unit *u, a_inode *parent) +{ + a_inode *a; + while (a = parent->child) { + free_all_ainos (u, a); + dispose_aino (u, &parent->child, a); + } +} + +static int flush_cache(Unit *unit, int num) +{ + int i = 0; + int cnt = 100; + + write_log ("FILESYS: flushing cache unit %d (max %d items)\n", unit->unit, num); + if (num == 0) + num = -1; + while (i < num || num < 0) { + int ii = i; + a_inode *parent = unit->rootnode.prev->parent; + a_inode **aip; + + aip = &parent->child; + aino_test (parent); + if (parent && !parent->locked_children) { + for (;;) { + a_inode *aino = *aip; + aino_test (aino); + if (aino == 0) + break; + /* Not recyclable if next == 0 (i.e., not chained into + recyclable list), or if parent directory is being + ExNext()ed. */ + if (aino->next == 0) { + aip = &aino->sibling; + } else { + if (aino->shlock > 0 || aino->elock) + write_log ("panic: freeing locked a_inode!\n"); + de_recycle_aino (unit, aino); + dispose_aino (unit, aip, aino); + i++; + } + } + } + { //if (unit->rootnode.next != unit->rootnode.prev) { + /* In the previous loop, we went through all children of one + parent. Re-arrange the recycled list so that we'll find a + different parent the next time around. + (infinite loop if there is only one parent?) + */ + int maxloop = 10000; + do { + unit->rootnode.next->prev = unit->rootnode.prev; + unit->rootnode.prev->next = unit->rootnode.next; + unit->rootnode.next = unit->rootnode.prev; + unit->rootnode.prev = unit->rootnode.prev->prev; + unit->rootnode.prev->next = unit->rootnode.next->prev = &unit->rootnode; + } while (unit->rootnode.prev->parent == parent && maxloop-- > 0); + } + if (i == ii) + cnt--; + if (cnt <= 0) + break; + } + return unit->aino_cache_size > 0 ? 0 : 1; +} + static void recycle_aino (Unit *unit, a_inode *new_aino) { aino_test (new_aino); @@ -724,48 +1294,7 @@ static void recycle_aino (Unit *unit, a_inode *new_aino) unit->aino_cache_size, unit->total_locked_ainos)); if (unit->aino_cache_size > 5000 + unit->total_locked_ainos) { /* Reap a few. */ - int i = 0; - while (i < 50) { - a_inode *parent = unit->rootnode.prev->parent; - a_inode **aip, *old_prev; - aip = &parent->child; - - aino_test (parent); - if (! parent->locked_children) { - for (;;) { - a_inode *aino = *aip; - aino_test (aino); - if (aino == 0) - break; - - /* Not recyclable if next == 0 (i.e., not chained into - recyclable list), or if parent directory is being - ExNext()ed. */ - if (aino->next == 0) { - aip = &aino->sibling; - } else { - if (aino->shlock > 0 || aino->elock) - write_log ("panic: freeing locked a_inode!\n"); - - de_recycle_aino (unit, aino); - dispose_aino (unit, aip, aino); - i++; - } - } - } - /* In the previous loop, we went through all children of one - parent. Re-arrange the recycled list so that we'll find a - different parent the next time around. */ - old_prev = unit->rootnode.prev; - do { - unit->rootnode.next->prev = unit->rootnode.prev; - unit->rootnode.prev->next = unit->rootnode.next; - unit->rootnode.next = unit->rootnode.prev; - unit->rootnode.prev = unit->rootnode.prev->prev; - unit->rootnode.prev->next = unit->rootnode.next->prev = &unit->rootnode; - } while (unit->rootnode.prev != old_prev - && unit->rootnode.prev->parent == parent); - } + flush_cache (unit, 50); } aino_test (new_aino); @@ -780,6 +1309,10 @@ static void recycle_aino (Unit *unit, a_inode *new_aino) unit->aino_cache_size++; } +void filesys_flush_cache (void) +{ +} + static void update_child_names (Unit *unit, a_inode *a, a_inode *parent) { int l0 = strlen (parent->nname) + 2; @@ -934,10 +1467,16 @@ static char *get_nname (Unit *unit, a_inode *base, char *rel, char *found; char *p = 0; - aino_test (base); - *modified_rel = 0; + if (unit->volflags & MYVOLUMEINFO_ARCHIVE) { + if (zfile_exists_archive(base->nname, rel)) + return build_nname(base->nname, rel); + return 0; + } + + aino_test (base); + /* If we have a mapping of some other aname to "rel", we must pretend * it does not exist. * This can happen for example if an Amiga program creates a @@ -994,6 +1533,22 @@ static char *create_nname (Unit *unit, a_inode *base, char *rel) return p; } +static int fill_file_attrs(Unit *u, a_inode *base, a_inode *c) +{ + if (u->volflags & MYVOLUMEINFO_ARCHIVE) { + int isdir, flags; + char *comment; + zfile_fill_file_attrs_archive(c->nname, &isdir, &flags, &comment); + c->dir = isdir; + c->amigaos_mode = flags; + c->comment = comment; + return 1; + } else { + return fsdb_fill_file_attrs (base, c); + } + return 0; +} + /* * This gets called if an ACTION_EXAMINE_NEXT happens and we hit an object * for which we know the name on the native filesystem, but no corresponding @@ -1010,10 +1565,21 @@ static char *get_aname (Unit *unit, a_inode *base, char *rel) return my_strdup (rel); } +static void init_child_aino_tree(Unit *unit, a_inode *base, a_inode *aino) +{ + /* Update tree structure */ + aino->parent = base; + aino->child = 0; + aino->sibling = base->child; + base->child = aino; + aino->next = aino->prev = 0; + aino->volflags = unit->volflags; +} + static void init_child_aino (Unit *unit, a_inode *base, a_inode *aino) { - aino->uniq = ++unit->a_uniq; - if (unit->a_uniq == 0xFFFFFFFF) { + aino->uniq = ++a_uniq; + if (a_uniq == 0xFFFFFFFF) { write_log ("Running out of a_inodes (prepare for big trouble)!\n"); } aino->shlock = 0; @@ -1021,6 +1587,7 @@ static void init_child_aino (Unit *unit, a_inode *base, a_inode *aino) aino->dirty = 0; aino->deleted = 0; + aino->mountcount = unit->mountcount; /* For directories - this one isn't being ExNext()ed yet. */ aino->locked_children = 0; @@ -1030,13 +1597,7 @@ static void init_child_aino (Unit *unit, a_inode *base, a_inode *aino) unit->total_locked_ainos++; base->locked_children++; } - /* Update tree structure */ - aino->parent = base; - aino->child = 0; - aino->sibling = base->child; - base->child = aino; - aino->next = aino->prev = 0; - aino->volflags = unit->volflags; + init_child_aino_tree(unit, base, aino); aino_test_init (aino); aino_test (aino); @@ -1046,11 +1607,13 @@ static a_inode *new_child_aino (Unit *unit, a_inode *base, char *rel) { char *modified_rel; char *nn; - a_inode *aino; + a_inode *aino = NULL; + int isarch = unit->volflags & MYVOLUMEINFO_ARCHIVE; TRACE(("new_child_aino %s, %s\n", base->aname, rel)); - aino = fsdb_lookup_aino_aname (base, rel); + if (!isarch) + aino = fsdb_lookup_aino_aname (base, rel); if (aino == 0) { nn = get_nname (unit, base, rel, &modified_rel); if (nn == 0) @@ -1065,7 +1628,7 @@ static a_inode *new_child_aino (Unit *unit, a_inode *base, char *rel) aino->comment = 0; aino->has_dbentry = 0; - if (!fsdb_fill_file_attrs (base, aino)) { + if (!fill_file_attrs (unit, base, aino)) { xfree (aino); return 0; } @@ -1121,7 +1684,7 @@ static a_inode *lookup_child_aino (Unit *unit, a_inode *base, char *rel, uae_u32 while (c != 0) { int l1 = strlen (c->aname); if (l0 <= l1 && same_aname (rel, c->aname + l1 - l0) - && (l0 == l1 || c->aname[l1-l0-1] == '/')) + && (l0 == l1 || c->aname[l1-l0-1] == '/') && c->mountcount == unit->mountcount) break; c = c->sibling; } @@ -1138,6 +1701,7 @@ static a_inode *lookup_child_aino_for_exnext (Unit *unit, a_inode *base, char *r { a_inode *c = base->child; int l0 = strlen (rel); + int isarch = unit->volflags & MYVOLUMEINFO_ARCHIVE; aino_test (base); aino_test (c); @@ -1147,13 +1711,14 @@ static a_inode *lookup_child_aino_for_exnext (Unit *unit, a_inode *base, char *r int l1 = strlen (c->nname); /* Note: using strcmp here. */ if (l0 <= l1 && strcmp (rel, c->nname + l1 - l0) == 0 - && (l0 == l1 || c->nname[l1-l0-1] == FSDB_DIR_SEPARATOR)) + && (l0 == l1 || c->nname[l1-l0-1] == FSDB_DIR_SEPARATOR) && c->mountcount == unit->mountcount) break; c = c->sibling; } if (c != 0) return c; - c = fsdb_lookup_aino_nname (base, rel); + if (!isarch) + c = fsdb_lookup_aino_nname (base, rel); if (c == 0) { c = (a_inode *)xcalloc (sizeof (a_inode), 1); if (c == 0) { @@ -1165,12 +1730,12 @@ static a_inode *lookup_child_aino_for_exnext (Unit *unit, a_inode *base, char *r c->aname = get_aname (unit, base, rel); c->comment = 0; c->has_dbentry = 0; - if (!fsdb_fill_file_attrs (base, c)) { + if (!fill_file_attrs(unit, base, c)) { xfree (c); *err = ERROR_NO_FREE_STORE; return 0; } - if (c->dir) + if (c->dir && !isarch) fsdb_clean_dir (c); } init_child_aino (unit, base, c); @@ -1236,6 +1801,47 @@ static a_inode *get_aino (Unit *unit, a_inode *base, const char *rel, uae_u32 *e return curr; } + +static uae_u32 notifyhash (char *s) +{ + uae_u32 hash = 0; + while (*s) + hash = (hash << 5) + *s++; + return hash % NOTIFY_HASH_SIZE; +} + +static Notify *new_notify (Unit *unit, char *name) +{ + Notify *n = (Notify *)xmalloc(sizeof(Notify)); + uae_u32 hash = notifyhash (name); + n->next = unit->notifyhash[hash]; + unit->notifyhash[hash] = n; + n->partname = name; + return n; +} + +static void free_notify_item(Notify *n) +{ + xfree(n->fullname); + xfree(n->partname); + xfree(n); +} + +static void free_notify (Unit *unit, int hash, Notify *n) +{ + Notify *n1, *prev = 0; + for (n1 = unit->notifyhash[hash]; n1; n1 = n1->next) { + if (n == n1) { + if (prev) + prev->next = n->next; + else + unit->notifyhash[hash] = n->next; + break; + } + prev = n1; + } +} + static void startup_update_unit (Unit *unit, UnitInfo *uinfo) { if (!unit) @@ -1247,36 +1853,50 @@ static void startup_update_unit (Unit *unit, UnitInfo *uinfo) unit->ui.readonly = uinfo->readonly; unit->ui.unit_pipe = uinfo->unit_pipe; unit->ui.back_pipe = uinfo->back_pipe; + unit->ui.wasisempty = uinfo->wasisempty; + unit->ui.canremove = uinfo->canremove; } -static Unit *startup_create_unit (UnitInfo *uinfo) +static Unit *startup_create_unit (UnitInfo *uinfo, int num) { int i; - Unit *unit; + Unit *unit, *u; unit = (Unit *) xcalloc (sizeof (Unit), 1); - unit->next = units; - units = unit; + /* keep list in insertion order */ + u = units; + if (u) { + while (u->next) + u = u->next; + u->next = unit; + } else { + units = unit; + } uinfo->self = unit; unit->volume = 0; unit->port = m68k_areg (®s, 5); - unit->unit = unit_num++; + unit->unit = num; startup_update_unit (unit, uinfo); unit->cmds_complete = 0; unit->cmds_sent = 0; unit->cmds_acked = 0; - for (i = 0; i < EXKEYS; i++) { - unit->examine_keys[i].aino = 0; - unit->examine_keys[i].curr_file = 0; - unit->examine_keys[i].uniq = 0; - } + clear_exkeys(unit); unit->total_locked_ainos = 0; - unit->next_exkey = 1; unit->keys = 0; - unit->a_uniq = unit->key_uniq = 0; + for (i = 0; i < NOTIFY_HASH_SIZE; i++) { + Notify *n = unit->notifyhash[i]; + while (n) { + Notify *n2 = n; + n = n->next; + xfree(n2->fullname); + xfree(n2->partname); + xfree(n2); + } + unit->notifyhash[i] = 0; + } unit->rootnode.aname = uinfo->volname; unit->rootnode.nname = uinfo->rootdir; @@ -1299,45 +1919,84 @@ static Unit *startup_create_unit (UnitInfo *uinfo) return unit; } +#ifdef UAE_FILESYS_THREADS +static void *filesys_thread (void *unit_v); +#endif +static void filesys_start_thread (UnitInfo *ui, int nr) +{ + ui->unit_pipe = 0; + ui->back_pipe = 0; + ui->reset_state = FS_STARTUP; + if (savestate_state != STATE_RESTORE) { + ui->startup = 0; + ui->self = 0; + } +#ifdef UAE_FILESYS_THREADS + if (is_hardfile (nr) == FILESYS_VIRTUAL) { + ui->unit_pipe = (smp_comm_pipe *)xmalloc (sizeof (smp_comm_pipe)); + ui->back_pipe = (smp_comm_pipe *)xmalloc (sizeof (smp_comm_pipe)); + init_comm_pipe (ui->unit_pipe, 100, 3); + init_comm_pipe (ui->back_pipe, 100, 1); + uae_start_thread ("filesys", filesys_thread, (void *)ui, &ui->tid); + } +#endif + if (savestate_state == STATE_RESTORE) + startup_update_unit (ui->self, ui); +} + static uae_u32 REGPARAM2 startup_handler (TrapContext *context) { /* Just got the startup packet. It's in A4. DosBase is in A2, - * our allocated volume structure is in D6, A5 is a pointer to + * our allocated volume structure is in A3, A5 is a pointer to * our port. */ uaecptr rootnode = get_long (m68k_areg (&context->regs, 2) + 34); uaecptr dos_info = get_long (rootnode + 24) << 2; uaecptr pkt = m68k_dreg (&context->regs, 3); uaecptr arg2 = get_long (pkt + dp_Arg2); - int i, namelen; + uaecptr devnode; + int i; char* devname = bstr1 (get_long (pkt + dp_Arg1) << 2); char* s; Unit *unit; UnitInfo *uinfo; + int late = 0; /* find UnitInfo with correct device name */ s = strchr (devname, ':'); if (s) *s = '\0'; - for (i = 0; i < current_mountinfo.num_units; i++) { + for (i = 0; i < MAX_FILESYSTEM_UNITS; i++) { /* Hardfile volume name? */ - if (current_mountinfo.ui[i].volname == 0) + if (!mountinfo.ui[i].open) + continue; + if (is_hardfile(i) != FILESYS_VIRTUAL) continue; - if (current_mountinfo.ui[i].startup == arg2) + if (mountinfo.ui[i].startup == arg2) break; } - if (i == current_mountinfo.num_units - || !my_existsdir (current_mountinfo.ui[i].rootdir)) + if (i == MAX_FILESYSTEM_UNITS) { + write_log ("Failed attempt to mount device '%s'\n", devname); + put_long (pkt + dp_Res1, DOS_FALSE); + put_long (pkt + dp_Res2, ERROR_DEVICE_NOT_MOUNTED); + return 0; + } + + if (!mountinfo.ui[i].wasisempty && !my_existsdir (mountinfo.ui[i].rootdir) && !my_existsfile (mountinfo.ui[i].rootdir)) { write_log ("Failed attempt to mount device '%s'\n", devname); put_long (pkt + dp_Res1, DOS_FALSE); put_long (pkt + dp_Res2, ERROR_DEVICE_NOT_MOUNTED); - return 1; + return 0; } - uinfo = current_mountinfo.ui + i; - unit = startup_create_unit (uinfo); + uinfo = mountinfo.ui + i; + if (!uinfo->unit_pipe) { + late = 1; + filesys_start_thread (uinfo, i); + } + unit = startup_create_unit (uinfo, i); unit->volflags = uinfo->volflags; /* write_comm_pipe_int (unit->ui.unit_pipe, -1, 1);*/ @@ -1345,11 +2004,13 @@ static uae_u32 REGPARAM2 startup_handler (TrapContext *context) write_log ("FS: %s (flags=%08.8X) starting..\n", unit->ui.volname, unit->volflags); /* fill in our process in the device node */ - put_long ((get_long (pkt + dp_Arg3) << 2) + 8, unit->port); + devnode = get_long (pkt + dp_Arg3) << 2; + put_long (devnode + 8, unit->port); unit->dosbase = m68k_areg (&context->regs, 2); /* make new volume */ unit->volume = m68k_areg (&context->regs, 3) + 32; + put_long (unit->volume + 180 - 32, devnode); #ifdef UAE_FILESYS_THREADS unit->locklist = m68k_areg (&context->regs, 3) + 8; #else @@ -1361,36 +2022,37 @@ static uae_u32 REGPARAM2 startup_handler (TrapContext *context) put_long (unit->volume + 4, 2); /* Type = dt_volume */ put_long (unit->volume + 12, 0); /* Lock */ - put_long (unit->volume + 16, 3800); /* Creation Date */ + put_long (unit->volume + 16, 3800 + i); /* Creation Date */ put_long (unit->volume + 20, 0); put_long (unit->volume + 24, 0); put_long (unit->volume + 28, 0); /* lock list */ put_long (unit->volume + 40, (unit->volume + 44) >> 2); /* Name */ - namelen = strlen (unit->ui.volname); - put_byte (unit->volume + 44, namelen); - for (i = 0; i < namelen; i++) - put_byte (unit->volume + 45 + i, unit->ui.volname[i]); - /* link into DOS list */ - put_long (unit->volume, get_long (dos_info + 4)); - put_long (dos_info + 4, unit->volume >> 2); + put_byte (unit->volume + 44, 0); + if (!uinfo->wasisempty) { + set_volume_name(unit); + fsdb_clean_dir (&unit->rootnode); + } put_long (unit->volume + 8, unit->port); put_long (unit->volume + 32, DISK_TYPE); put_long (pkt + dp_Res1, DOS_TRUE); - fsdb_clean_dir (&unit->rootnode); - - return 0; + return 1 | (late ? 2 : 0); } static void do_info (Unit *unit, dpacket packet, uaecptr info) { struct fs_usage fsu; + int ret; - if (get_fs_usage (unit->ui.rootdir, 0, &fsu) != 0) { + if (unit->volflags & MYVOLUMEINFO_ARCHIVE) + ret = zfile_fs_usage_archive (unit->ui.rootdir, 0, &fsu); + else + ret = get_fs_usage (unit->ui.rootdir, 0, &fsu); + if (ret != 0) { PUT_PCK_RES1 (packet, DOS_FALSE); PUT_PCK_RES2 (packet, dos_errno ()); return; @@ -1438,7 +2100,7 @@ static void free_key (Unit *unit, Key *k) } if (k->fd != NULL) - my_close (k->fd); + fs_close (unit, k->fd); xfree(k); } @@ -1463,7 +2125,7 @@ static Key *lookup_key (Unit *unit, uae_u32 uniq) static Key *new_key (Unit *unit) { Key *k = (Key *) xmalloc(sizeof(Key)); - k->uniq = ++unit->key_uniq; + k->uniq = ++key_uniq; k->fd = NULL; k->file_pos = 0; k->next = unit->keys; @@ -1540,39 +2202,6 @@ static uaecptr make_lock (Unit *unit, uae_u32 uniq, long mode) return lock; } -static uae_u32 notifyhash (char *s) -{ - uae_u32 hash = 0; - while (*s) hash = (hash << 5) + *s++; - return hash % NOTIFY_HASH_SIZE; -} - -static Notify *new_notify (Unit *unit, char *name) -{ - Notify *n = (Notify *)xmalloc(sizeof(Notify)); - int hash = notifyhash (name); - n->next = unit->notifyhash[hash]; - unit->notifyhash[hash] = n; - n->partname = name; - return n; -} - -static void free_notify (Unit *unit, int hash, Notify *n) -{ - Notify *n1, *prev = 0; - for (n1 = unit->notifyhash[hash]; n1; n1 = n1->next) { - if (n == n1) { - if (prev) - prev->next = n->next; - else - unit->notifyhash[hash] = n->next; - break; - } - prev = n1; - } - xfree(n); -} - #define NOTIFY_CLASS 0x40000000 #define NOTIFY_CODE 0x1234 @@ -1714,6 +2343,10 @@ static void free_lock (Unit *unit, uaecptr lock) break; current = next; } + if (!current) { + write_log("tried to unlock non-existing lock %x\n", lock); + return; + } put_long (current << 2, get_long (lock)); } lock -= 4; @@ -1780,18 +2413,12 @@ static void action_free_lock (Unit *unit, dpacket packet) } static uaecptr -action_dup_lock_2 (Unit *unit, dpacket packet, uaecptr lock) +action_dup_lock_2 (Unit *unit, dpacket packet, uae_u32 uniq) { uaecptr out; a_inode *a; - TRACE(("ACTION_DUP_LOCK(0x%lx)\n", lock)); - DUMPLOCK(unit, lock); - if (!lock) { - PUT_PCK_RES1 (packet, 0); - return 0; - } - a = lookup_aino (unit, get_long (lock + 4)); + a = lookup_aino (unit, uniq); if (a == 0) { PUT_PCK_RES1 (packet, DOS_FALSE); PUT_PCK_RES2 (packet, ERROR_OBJECT_NOT_AROUND); @@ -1816,12 +2443,28 @@ static void action_dup_lock (Unit *unit, dpacket packet) { uaecptr lock = GET_PCK_ARG1 (packet) << 2; - action_dup_lock_2 (unit, packet, lock); + if (!lock) { + PUT_PCK_RES1 (packet, 0); + return; + } + action_dup_lock_2 (unit, packet, get_long(lock + 4)); +} + + +static void +action_lock_from_fh (Unit *unit, dpacket packet) +{ + Key *k = lookup_key (unit, GET_PCK_ARG1 (packet)); + if (k == 0) { + PUT_PCK_RES1 (packet, DOS_FALSE); + return; + } + action_dup_lock_2 (unit, packet, k->aino->uniq); } /* convert time_t to/from AmigaDOS time */ -const int secs_per_day = 24 * 60 * 60; -const int diff = (8 * 365 + 2) * (24 * 60 * 60); +static const int secs_per_day = 24 * 60 * 60; +static const int diff = (8 * 365 + 2) * (24 * 60 * 60); static void get_time (time_t t, long* days, long* mins, long* ticks) @@ -1949,12 +2592,16 @@ get_fileinfo (Unit *unit, dpacket packet, uaecptr info, a_inode *aino) int fsdb_can = fsdb_cando (unit); char *x; + memset(&statbuf, 0, sizeof statbuf); /* No error checks - this had better work. */ - stat (aino->nname, &statbuf); + if (unit->volflags & MYVOLUMEINFO_ARCHIVE) + zfile_stat_archive (aino->nname, &statbuf); + else + stat (aino->nname, &statbuf); if (aino->parent == 0) { /* Guru book says ST_ROOT = 1 (root directory, not currently used) - * and some programs really expect 2 from root dir.. + * but some programs really expect 2 from root dir.. */ entrytype = 2; x = unit->ui.volname; @@ -2007,6 +2654,369 @@ get_fileinfo (Unit *unit, dpacket packet, uaecptr info, a_inode *aino) PUT_PCK_RES1 (packet, DOS_TRUE); } +int get_native_path(uae_u32 lock, char *out) +{ + int i = 0; + for (i = 0; i < MAX_FILESYSTEM_UNITS; i++) { + if (mountinfo.ui[i].self) { + a_inode *a = lookup_aino (mountinfo.ui[i].self, get_long ((lock << 2) + 4)); + if (a) { + strcpy (out, a->nname); + return 0; + } + } + } + return -1; +} + +#define EXALL_DEBUG 0 +#define EXALL_END 0xde1111ad + +static ExAllKey *getexall (Unit *unit, uaecptr control, int id) +{ + int i; + if (id < 0) { + for (i = 0; i < EXALLKEYS; i++) { + if (unit->exalls[i].id == 0) { + unit->exallid++; + if (unit->exallid == EXALL_END) + unit->exallid++; + unit->exalls[i].id = unit->exallid; + unit->exalls[i].control = control; + return &unit->exalls[i]; + } + } + } else if (id > 0) { + for (i = 0; i < EXALLKEYS; i++) { + if (unit->exalls[i].id == id) + return &unit->exalls[i]; + } + } + return NULL; +} + +static int exalldo (uaecptr exalldata, uae_u32 exalldatasize, uae_u32 type, uaecptr control, Unit *unit, a_inode *aino) +{ + uaecptr exp = exalldata; + int i; + int size, size2; + int entrytype; + char *x = NULL, *comment = NULL; + uae_u32 flags = 15, days, mins, ticks; + struct stat statbuf; + int fsdb_can = fsdb_cando (unit); + uae_u16 uid = 0, gid = 0; + + memset(&statbuf, 0, sizeof statbuf); + if (unit->volflags & MYVOLUMEINFO_ARCHIVE) + zfile_stat_archive (aino->nname, &statbuf); + else + stat (aino->nname, &statbuf); + + if (aino->parent == 0) { + entrytype = 2; + x = unit->ui.volname; + } else { + entrytype = aino->dir ? 2 : -3; + x = aino->aname; + } + + size = 0; + size2 = 4; + if (control >= 1) { + size2 += 4; + size += strlen (x) + 1; + size = (size + 3) & ~3; + } + if (control >= 2) + size2 += 4; + if (control >= 3) + size2 += 4; + if (control >= 4) { + flags = fsdb_can ? aino->amigaos_mode : fsdb_mode_supported(aino); + size2 += 4; + } + if (control >= 5) { + get_time (statbuf.st_mtime, (long int *)&days, (long int *)&mins, (long int *)&ticks); + size2 += 12; + } + if (control >= 6) { + size2 += 4; + if (aino->comment == 0 || !fsdb_can) + comment = ""; + else + comment = aino->comment; + size += strlen (comment) + 1; + size = (size + 3) & ~3; + } + if (control >= 7) { + size2 += 4; + uid = 0; + gid = 0; + } + + i = get_long (control + 0); + while (i > 0) { + exp = get_long (exp); /* ed_Next */ + i--; + } + + if (exalldata + exalldatasize - exp < size + size2) + return 0; /* not enough space */ + +#if EXALL_DEBUG > 0 + write_log("ID=%d, %d, %08x: '%s'%s\n", + get_long (control + 4), get_long (control + 0), exp, x, aino->dir ? " [DIR]" : ""); +#endif + + put_long (exp, exp + size + size2); /* ed_Next */ + if (control >= 1) { + put_long (exp + 4, exp + size2); + for (i = 0; i <= strlen (x); i++) { + put_byte (exp + size2, x[i]); + size2++; + } + } + if (control >= 2) + put_long (exp + 8, entrytype); + if (control >= 3) + put_long (exp + 12, statbuf.st_size); + if (control >= 4) + put_long (exp + 16, flags); + if (control >= 5) { + put_long (exp + 20, days); + put_long (exp + 24, mins); + put_long (exp + 28, ticks); + } + if (control >= 6) { + put_long (exp + 32, exp + size2); + put_byte (exp + size2, strlen (comment)); + for (i = 0; i <= strlen (comment); i++) { + put_byte (exp + size2, comment[i]); + size2++; + } + } + if (control >= 7) { + put_word (exp + 36, uid); + put_word (exp + 38, gid); + } + put_long (control + 0, get_long (control + 0) + 1); + return 1; +} + +static int action_examine_all_do (Unit *unit, uaecptr lock, ExAllKey *eak, uaecptr exalldata, uae_u32 exalldatasize, uae_u32 type, uaecptr control) +{ + a_inode *aino, *base; + int ok; + uae_u32 err; + int isarch = unit->volflags & MYVOLUMEINFO_ARCHIVE; + void *d; + char fn[MAX_DPATH]; + + if (lock != 0) + base = lookup_aino (unit, get_long (lock + 4)); + if (base == 0) + base = &unit->rootnode; + for (;;) { + d = eak->dirhandle; + if (!eak->fn) { + do { + if (isarch) + ok = zfile_readdir_archive((zdirectory*)d, fn); + else + ok = my_readdir (d, fn); + } while (ok && !isarch && fsdb_name_invalid (fn)); + if (!ok) + return 0; + } else { + strcpy (fn, eak->fn); + xfree (eak->fn); + eak->fn = NULL; + } + aino = lookup_child_aino_for_exnext (unit, base, fn, &err); + if (!aino) + return 0; + eak->id = unit->exallid++; + put_long (control + 4, eak->id); + if (!exalldo (exalldata, exalldatasize, type, control, unit, aino)) { + eak->fn = my_strdup (fn); /* no space in exallstruct, save current entry */ + break; + } + } + return 1; +} + +static int action_examine_all_end (Unit *unit, dpacket packet) +{ + uae_u32 id; + uae_u32 doserr = 0; + ExAllKey *eak; + uaecptr control = GET_PCK_ARG5 (packet); + + if (kickstart_version < 36) + return 0; + id = get_long (control + 4); + eak = getexall (unit, control, id); +#if EXALL_DEBUG > 0 + write_log ("EXALL_END ID=%d %x\n", id, eak); +#endif + if (!eak) { + write_log ("FILESYS: EXALL_END non-existing ID %d\n", id); + doserr = ERROR_OBJECT_WRONG_TYPE; + } else { + eak->id = 0; + fs_closedir (unit, eak->dirhandle); + xfree (eak->fn); + eak->fn = NULL; + eak->dirhandle = NULL; + } + if (doserr) { + PUT_PCK_RES1 (packet, DOS_FALSE); + PUT_PCK_RES2 (packet, doserr); + } else { + PUT_PCK_RES1 (packet, DOS_TRUE); + } + return 1; +} + +static int action_examine_all (Unit *unit, dpacket packet) +{ + uaecptr lock = GET_PCK_ARG1 (packet) << 2; + uaecptr exalldata = GET_PCK_ARG2 (packet); + uae_u32 exalldatasize = GET_PCK_ARG3 (packet); + uae_u32 type = GET_PCK_ARG4 (packet); + uaecptr control = GET_PCK_ARG5 (packet); + + ExAllKey *eak = NULL; + int isarch = unit->volflags & MYVOLUMEINFO_ARCHIVE; + a_inode *base; + void *d; + int ok, i; + uaecptr exp; + uae_u32 id, doserr = ERROR_NO_MORE_ENTRIES; + + ok = 0; + +#if EXALL_DEBUG > 0 + write_log ("exall: %08x %08x-%08x %d %d %08x\n", + lock, exalldata, exalldata + exalldatasize, exalldatasize, type, control); + write_log ("exall: MatchString %08x, MatchFunc %08x\n", + get_long (control + 8), get_long (control + 12)); +#endif + + put_long (control + 0, 0); /* eac_Entries */ + + /* EXAMINE ALL might use dos.library MatchPatternNoCase() which is >=36 */ + if (kickstart_version < 36) + return 0; + + if (type == 0 || type > 7) { + doserr = ERROR_BAD_NUMBER; + goto fail; + } + + PUT_PCK_RES1 (packet, DOS_TRUE); + id = get_long (control + 4); + if (id == EXALL_END) { + write_log ("FILESYS: EXALL called twice with ERROR_NO_MORE_ENTRIES\n"); + goto fail; /* already ended exall() */ + } + if (id) { + eak = getexall (unit, control, id); + if (!eak) { + write_log ("FILESYS: EXALL non-existing ID %d\n", id); + doserr = ERROR_OBJECT_WRONG_TYPE; + goto fail; + } + if (!action_examine_all_do (unit, lock, eak, exalldata, exalldatasize, type, control)) + goto fail; + if (get_long (control + 0) == 0) { + /* uh, no space for first entry.. */ + doserr = ERROR_NO_FREE_STORE; + goto fail; + } + + } else { + + eak = getexall (unit, control, -1); + if (!eak) + goto fail; + if (lock != 0) + base = lookup_aino (unit, get_long (lock + 4)); + if (base == 0) + base = &unit->rootnode; +#if EXALL_DEBUG > 0 + write_log("exall: ID=%d '%s'\n", eak->id, base->nname); +#endif + d = fs_opendir (unit, base->nname); + if (!d) + goto fail; + eak->dirhandle = d; + put_long (control + 4, eak->id); + if (!action_examine_all_do (unit, lock, eak, exalldata, exalldatasize, type, control)) + goto fail; + if (get_long (control + 0) == 0) { + /* uh, no space for first entry.. */ + doserr = ERROR_NO_FREE_STORE; + goto fail; + } + + } + ok = 1; + +fail: + /* Clear last ed_Next. This "list" is quite non-Amiga like.. */ + exp = exalldata; + i = get_long (control + 0); + for (;;) { + if (i <= 1) { + if (exp) + put_long (exp, 0); + break; + } + exp = get_long (exp); /* ed_Next */ + i--; + } +#if EXALL_DEBUG > 0 + write_log("ok=%d, err=%d, eac_Entries = %d\n", ok, ok ? -1 : doserr, get_long (control + 0)); +#endif + + if (!ok) { + PUT_PCK_RES1 (packet, DOS_FALSE); + PUT_PCK_RES2 (packet, doserr); + if (eak) { + eak->id = 0; + fs_closedir (unit, eak->dirhandle); + eak->dirhandle = NULL; + xfree (eak->fn); + eak->fn = NULL; + } + if (doserr == ERROR_NO_MORE_ENTRIES) + put_long (control + 4, EXALL_END); + } + return 1; +} + +static uae_u32 REGPARAM2 exall_helper (TrapContext *context) +{ + int i; + Unit *u; + uaecptr packet = m68k_areg (&context->regs, 4); + uaecptr control = get_long (packet + dp_Arg5); + uae_u32 id = get_long (control + 4); + + if (id == EXALL_END) + return 1; + for (u = units; u; u = u->next) { + for (i = 0; i < EXALLKEYS; i++) { + if (u->exalls[i].id == id && u->exalls[i].control == control) { + action_examine_all (u, get_real_address (packet)); + } + } + } + return 1; +} + static void action_examine_object (Unit *unit, dpacket packet) { uaecptr lock = GET_PCK_ARG1 (packet) << 2; @@ -2037,9 +3047,11 @@ static void action_examine_object (Unit *unit, dpacket packet) static void populate_directory (Unit *unit, a_inode *base) { - void *d = my_opendir (base->nname); + void *d; a_inode *aino; + int isarch = unit->volflags & MYVOLUMEINFO_ARCHIVE; + d = fs_opendir (unit, base->nname); if (!d) return; for (aino = base->child; aino; aino = aino->sibling) { @@ -2056,15 +3068,18 @@ static void populate_directory (Unit *unit, a_inode *base) /* Find next file that belongs to the Amiga fs (skipping things like "..", "." etc. */ do { - ok = my_readdir (d, fn); - } while (ok && fsdb_name_invalid (fn)); + if (isarch) + ok = zfile_readdir_archive((struct zdirectory *)d, fn); + else + ok = my_readdir (d, fn); + } while (ok && !isarch && fsdb_name_invalid (fn)); if (!ok) break; /* This calls init_child_aino, which will notice that the parent is being ExNext()ed, and it will increment the locked counts. */ aino = lookup_child_aino_for_exnext (unit, base, fn, &err); } - my_closedir (d); + fs_closedir (unit, d); } static void do_examine (Unit *unit, dpacket packet, ExamineKey *ek, uaecptr info) @@ -2076,7 +3091,7 @@ static void do_examine (Unit *unit, dpacket packet, ExamineKey *ek, uaecptr info name = ek->curr_file->nname; get_fileinfo (unit, packet, info, ek->curr_file); ek->curr_file = ek->curr_file->sibling; - if (!fsdb_exists(name)) { + if (!(unit->volflags & MYVOLUMEINFO_ARCHIVE) && !fsdb_exists(name)) { TRACE (("%s orphaned", name)); continue; } @@ -2107,31 +3122,38 @@ static void action_examine_next (Unit *unit, dpacket packet) if (aino == 0) aino = &unit->rootnode; - uniq = get_long (info); - if (uniq == 0) { - write_log ("ExNext called for a file! (Houston?)\n"); - goto no_more_entries; - } else if (uniq == 0xFFFFFFFE) - goto no_more_entries; - else if (uniq == 0xFFFFFFFF) { - TRACE(("Creating new ExKey\n")); - ek = new_exkey (unit, aino); - if (ek) { - if (aino->exnext_count++ == 0) - populate_directory (unit, aino); - } - ek->curr_file = aino->child; - TRACE(("Initial curr_file: %p %s\n", ek->curr_file, - ek->curr_file ? ek->curr_file->aname : "NULL")); - } else { - TRACE(("Looking up ExKey\n")); - ek = lookup_exkey (unit, get_long (info)); - } - if (ek == 0) { - write_log ("Couldn't find a matching ExKey. Prepare for trouble.\n"); - goto no_more_entries; - } - put_long (info, ek->uniq); + for(;;) { + uniq = get_long (info); + if (uniq == 0) { + write_log ("ExNext called for a file! (Houston?)\n"); + goto no_more_entries; + } else if (uniq == 0xFFFFFFFE) + goto no_more_entries; + else if (uniq == 0xFFFFFFFF) { + TRACE(("Creating new ExKey\n")); + ek = new_exkey (unit, aino); + if (ek) { + if (aino->exnext_count++ == 0) + populate_directory (unit, aino); + ek->curr_file = aino->child; + TRACE(("Initial curr_file: %p %s\n", ek->curr_file, + ek->curr_file ? ek->curr_file->aname : "NULL")); + } + } else { + TRACE(("Looking up ExKey\n")); + ek = lookup_exkey (unit, get_long (info)); + } + if (ek == 0) { + write_log ("Couldn't find a matching ExKey. Prepare for trouble.\n"); + goto no_more_entries; + } + put_long (info, ek->uniq); + if (!ek->curr_file || ek->curr_file->mountcount == unit->mountcount) + break; + ek->curr_file = ek->curr_file->sibling; + if (!ek->curr_file) + goto no_more_entries; + } do_examine (unit, packet, ek, info); return; @@ -2151,6 +3173,7 @@ static void do_find (Unit *unit, dpacket packet, int mode, int create, int fallb uae_u32 err; mode_t openmode; int aino_created = 0; + int isarch = unit->volflags & MYVOLUMEINFO_ARCHIVE; TRACE(("ACTION_FIND_*(0x%lx,0x%lx,\"%s\",%d,%d)\n", fh, lock, bstr (unit, name), mode, create)); DUMPLOCK(unit, lock); @@ -2229,13 +3252,14 @@ static void do_find (Unit *unit, dpacket packet, int mode, int create, int fallb | (create ? O_CREAT : 0) | (create == 2 ? O_TRUNC : 0)); - fd = my_open (aino->nname, openmode | O_BINARY); + fd = fs_open (unit, aino->nname, openmode | O_BINARY); if (fd == NULL) { if (aino_created) delete_aino (unit, aino); PUT_PCK_RES1 (packet, DOS_FALSE); - PUT_PCK_RES2 (packet, dos_errno ()); + /* archive and fd == NULL = corrupt archive or out of memory */ + PUT_PCK_RES2 (packet, isarch ? ERROR_OBJECT_NOT_AROUND : dos_errno ()); return; } k = new_key (unit); @@ -2245,7 +3269,7 @@ static void do_find (Unit *unit, dpacket packet, int mode, int create, int fallb k->createmode = create; k->notifyactive = create ? 1 : 0; - if (create) + if (create && isarch) fsdb_set_file_attrs (aino); put_long (fh+36, k->uniq); @@ -2257,20 +3281,6 @@ static void do_find (Unit *unit, dpacket packet, int mode, int create, int fallb PUT_PCK_RES1 (packet, DOS_TRUE); } -static void -action_lock_from_fh (Unit *unit, dpacket packet) -{ - uaecptr out; - Key *k = lookup_key (unit, GET_PCK_ARG1 (packet)); - write_log("lock_from_fh %x\n", k); - if (k == 0) { - PUT_PCK_RES1 (packet, DOS_FALSE); - return; - } - out = action_dup_lock_2 (unit, packet, make_lock (unit, k->aino->uniq, -2)); - write_log("=%x\n", out); -} - static void action_fh_from_lock (Unit *unit, dpacket packet) { @@ -2281,6 +3291,7 @@ action_fh_from_lock (Unit *unit, dpacket packet) void *fd; mode_t openmode; int mode; + int isarch = unit->volflags & MYVOLUMEINFO_ARCHIVE; TRACE(("ACTION_FH_FROM_LOCK(0x%lx,0x%lx)\n",fh,lock)); DUMPLOCK(unit,lock); @@ -2306,7 +3317,7 @@ action_fh_from_lock (Unit *unit, dpacket packet) if (unit->ui.readonly) openmode = O_RDONLY; - fd = my_open (aino->nname, openmode | O_BINARY); + fd = fs_open (unit, aino->nname, openmode | O_BINARY); if (fd == NULL) { PUT_PCK_RES1 (packet, DOS_FALSE); @@ -2321,9 +3332,8 @@ action_fh_from_lock (Unit *unit, dpacket packet) /* I don't think I need to play with shlock count here, because I'm opening from an existing lock ??? */ - /* Is this right? I don't completely understand how this works. Do I - also need to free_lock() my lock, since nobody else is going to? */ de_recycle_aino (unit, aino); + free_lock (unit, lock); /* lock must be unlocked */ PUT_PCK_RES1 (packet, DOS_TRUE); /* PUT_PCK_RES2 (packet, k->uniq); - this shouldn't be necessary, try without it */ } @@ -2419,9 +3429,9 @@ action_read (Unit *unit, dpacket packet) * Try to detect a LoadSeg() */ if (k->file_pos == 0 && size >= 4) { unsigned char buf[4]; - off_t currpos = my_lseek(k->fd, 0, SEEK_CUR); - my_read(k->fd, buf, 4); - my_lseek(k->fd, currpos, SEEK_SET); + off_t currpos = fs_lseek (unit, k->fd, 0, SEEK_CUR); + my_read(k->fd, buf, 4); + fs_lseek (unit, k->fd, currpos, SEEK_SET); if (buf[0] == 0 && buf[1] == 0 && buf[2] == 3 && buf[3] == 0xF3) possible_loadseg(); } @@ -2430,7 +3440,7 @@ action_read (Unit *unit, dpacket packet) uae_u8 *realpt; realpt = get_real_address (addr); - actual = my_read(k->fd, (char *) realpt, size); + actual = fs_read (unit, k->fd, realpt, size); if (actual == 0) { PUT_PCK_RES1 (packet, 0); @@ -2449,9 +3459,9 @@ action_read (Unit *unit, dpacket packet) write_log ("unixfs warning: Bad pointer passed for read: %08x, size %d\n", addr, size); /* ugh this is inefficient but easy */ - old = my_lseek (k->fd, 0, SEEK_CUR); - filesize = my_lseek (k->fd, 0, SEEK_END); - my_lseek (k->fd, old, SEEK_SET); + old = fs_lseek (unit, k->fd, 0, SEEK_CUR); + filesize = fs_lseek (unit, k->fd, 0, SEEK_END); + fs_lseek (unit, k->fd, old, SEEK_SET); if (size > filesize) size = filesize; @@ -2461,7 +3471,7 @@ action_read (Unit *unit, dpacket packet) PUT_PCK_RES2 (packet, ERROR_NO_FREE_STORE); return; } - actual = my_read(k->fd, buf, size); + actual = fs_read (unit, k->fd, buf, size); if (actual < 0) { PUT_PCK_RES1 (packet, 0); @@ -2502,8 +3512,14 @@ action_write (Unit *unit, dpacket packet) return; } + if (valid_address (addr, size)) { + uae_u8 *realpt = get_real_address (addr); + actual = my_write (k->fd, realpt, size); + + } else { + /* ugh this is inefficient but easy */ - buf = (char *)xmalloc(size); + buf = (char *)malloc(size); if (!buf) { PUT_PCK_RES1 (packet, -1); PUT_PCK_RES2 (packet, ERROR_NO_FREE_STORE); @@ -2514,6 +3530,9 @@ action_write (Unit *unit, dpacket packet) buf[i] = get_byte(addr + i); actual = my_write(k->fd, buf, size); + xfree (buf); + } + PUT_PCK_RES1 (packet, actual); if (actual != size) PUT_PCK_RES2 (packet, dos_errno ()); @@ -2521,7 +3540,6 @@ action_write (Unit *unit, dpacket packet) k->file_pos += actual; k->notifyactive = 1; - xfree (buf); } static void @@ -2546,15 +3564,18 @@ action_seek (Unit *unit, dpacket packet) TRACE(("ACTION_SEEK(%s,%d,%d)\n", k->aino->nname, pos, mode)); gui_hd_led (1); - old = my_lseek (k->fd, 0, SEEK_CUR); + old = fs_lseek (unit, k->fd, 0, SEEK_CUR); { uae_s32 temppos; - long filesize = my_lseek (k->fd, 0, SEEK_END); - my_lseek (k->fd, old, SEEK_SET); + long filesize = fs_lseek (unit, k->fd, 0, SEEK_END); + fs_lseek (unit, k->fd, old, SEEK_SET); - if (whence == SEEK_CUR) temppos = old + pos; - if (whence == SEEK_SET) temppos = pos; - if (whence == SEEK_END) temppos = filesize + pos; + if (whence == SEEK_CUR) + temppos = old + pos; + if (whence == SEEK_SET) + temppos = pos; + if (whence == SEEK_END) + temppos = filesize + pos; if (filesize < temppos) { res = -1; PUT_PCK_RES1 (packet,res); @@ -2562,8 +3583,7 @@ action_seek (Unit *unit, dpacket packet) return; } } - - res = my_lseek (k->fd, pos, whence); + res = fs_lseek (unit, k->fd, pos, whence); if (-1 == res) { PUT_PCK_RES1 (packet, res); @@ -2628,7 +3648,14 @@ static void action_set_comment (Unit * unit, dpacket packet) if (fsdb_cando (unit)) { commented = bstr (unit, comment); - commented = strlen (commented) > 0 ? my_strdup (commented) : NULL; + if (strlen (commented) > 0) { + char *p = commented; + commented = (char *)xmalloc (81); + strncpy (commented, p, 80); + commented[80] = 0; + } else { + commented = NULL; + } } TRACE (("ACTION_SET_COMMENT(0x%lx,\"%s\")\n", lock, commented)); @@ -2903,11 +3930,11 @@ action_set_file_size (Unit *unit, dpacket packet) } /* Write one then truncate: that should give the right size in all cases. */ - offset = my_lseek (k->fd, offset, whence); + offset = fs_lseek (unit, k->fd, offset, whence); my_write (k->fd, /* whatever */(char *)&k1, 1); if (k->file_pos > offset) k->file_pos = offset; - my_lseek (k->fd, k->file_pos, SEEK_SET); + fs_lseek (unit, k->fd, k->file_pos, SEEK_SET); /* Brian: no bug here; the file _must_ be one byte too large after writing The write is supposed to guarantee that the file can't be smaller than @@ -2932,7 +3959,7 @@ static int relock_do(Unit *unit, a_inode *a1) knext = k1->next; if (k1->aino == a1 && k1->fd) { wehavekeys++; - my_close (k1->fd); + fs_close (unit, k1->fd); write_log ("handle %p freed\n", k1->fd); } } @@ -2950,13 +3977,13 @@ static void relock_re(Unit *unit, a_inode *a1, a_inode *a2, int failed) mode |= O_BINARY; if (failed) { /* rename still failed, restore fd */ - k1->fd = my_open (a1->nname, mode); + k1->fd = fs_open (unit, a1->nname, mode); write_log ("restoring old handle '%s' %d\n", a1->nname, k1->dosmode); } else { /* transfer fd to new name */ if (a2) { k1->aino = a2; - k1->fd = my_open (a2->nname, mode); + k1->fd = fs_open (unit, a2->nname, mode); write_log ("restoring new handle '%s' %d\n", a2->nname, k1->dosmode); } else { write_log ("no new handle, deleting old lock(s).\n"); @@ -2966,7 +3993,7 @@ static void relock_re(Unit *unit, a_inode *a1, a_inode *a2, int failed) write_log ("relocking failed '%s' -> '%s'\n", a1->nname, a2->nname); free_key (unit, k1); } else { - my_lseek (k1->fd, k1->file_pos, SEEK_SET); + fs_lseek (unit, k1->fd, k1->file_pos, SEEK_SET); } } } @@ -3059,9 +4086,10 @@ action_set_date (Unit *unit, dpacket packet) if (err != 0) { PUT_PCK_RES1 (packet, DOS_FALSE); PUT_PCK_RES2 (packet, err); - } else + } else { + notify_check (unit, a); PUT_PCK_RES1 (packet, DOS_TRUE); - notify_check (unit, a); + } gui_hd_led (2); } @@ -3131,6 +4159,7 @@ action_rename_object (Unit *unit, dpacket packet) if (-1 == my_rename (a1->nname, a2->nname)) { int ret = -1; /* maybe we have open file handles that caused failure? */ + write_log ("rename '%s' -> '%s' failed, trying relocking..\n", a1->nname, a2->nname); wehavekeys = relock_do(unit, a1); /* try again... */ ret = my_rename (a1->nname, a2->nname); @@ -3172,7 +4201,10 @@ action_rename_object (Unit *unit, dpacket packet) static void action_current_volume (Unit *unit, dpacket packet) { - PUT_PCK_RES1 (packet, unit->volume >> 2); + if (filesys_isvolume(unit)) + PUT_PCK_RES1 (packet, unit->volume >> 2); + else + PUT_PCK_RES1 (packet, 0); } static void @@ -3197,10 +4229,7 @@ action_rename_disk (Unit *unit, dpacket packet) for (i = 0; i < namelen; i++, name++) unit->ui.volname[i] = get_byte (name); unit->ui.volname[i] = 0; - - put_byte (unit->volume + 44, namelen); - for (i = 0; i < namelen; i++) - put_byte (unit->volume + 45 + i, unit->ui.volname[i]); + set_volume_name (unit); PUT_PCK_RES1 (packet, DOS_TRUE); } @@ -3214,14 +4243,46 @@ action_is_filesystem (Unit *unit, dpacket packet) static void action_flush (Unit *unit, dpacket packet) { - /* sync(); */ /* pretty drastic, eh */ PUT_PCK_RES1 (packet, DOS_TRUE); + flush_cache(unit, 0); } -int last_n, last_n2; -void blehint(void) +static void +action_more_cache (Unit *unit, dpacket packet) { - do_uae_int_requested(); + PUT_PCK_RES1 (packet, 50); /* bug but AmigaOS expects it */ + if (GET_PCK_ARG1 (packet) != 0) + flush_cache(unit, 0); +} + +static void +action_inhibit (Unit *unit, dpacket packet) +{ + PUT_PCK_RES1 (packet, DOS_TRUE); + flush_cache(unit, 0); + unit->inhibited = GET_PCK_ARG1 (packet); + write_log("ACTION_INHIBIT %d:%d\n", unit->unit, unit->inhibited); +} + +static void +action_write_protect (Unit *unit, dpacket packet) +{ + PUT_PCK_RES1 (packet, DOS_TRUE); + if (GET_PCK_ARG1 (packet)) { + if (!(unit->ui.readonly & 2)) { + unit->ui.readonly |= 2; + unit->lockkey = GET_PCK_ARG2 (packet); + } + } else { + if (unit->ui.readonly & 2) { + if (unit->lockkey == GET_PCK_ARG2 (packet) || unit->lockkey == 0) { + unit->ui.readonly &= ~2; + } else { + PUT_PCK_RES1 (packet, DOS_FALSE); + PUT_PCK_RES2 (packet, 0); + } + } + } } /* We don't want multiple interrupts to be active at the same time. I don't @@ -3230,25 +4291,23 @@ static uae_sem_t singlethread_int_sem; static uae_u32 REGPARAM2 exter_int_helper (TrapContext *context) { - UnitInfo *uip = current_mountinfo.ui; + UnitInfo *uip = mountinfo.ui; uaecptr port; int n = m68k_dreg (&context->regs, 0); static int unit_no; - last_n = n; - last_n2 = -1; - switch (n) { case 0: /* Determine whether a given EXTER interrupt is for us. */ - if (uae_int_requested) { + if (uae_int_requested & 1) { if (uae_sem_trywait (&singlethread_int_sem) != 0) /* Pretend it isn't for us. We might get it again later. */ return 0; /* Clear the interrupt flag _before_ we do any processing. * That way, we can get too many interrupts, but never not * enough. */ - uae_int_requested = 0; + filesys_in_interrupt++; + uae_int_requested &= ~1; unit_no = 0; return 1; } @@ -3295,8 +4354,7 @@ static uae_u32 REGPARAM2 exter_int_helper (TrapContext *context) * d0 = 2: Signal(), task in a1, signal set in d1 * d0 = 3: ReplyMsg(), message in a1 * d0 = 4: Cause(), interrupt in a1 - * d0 = 5: AllocMem(), size in d0, flags in d1, pointer to address at a0 - * d0 = 6: FreeMem(), memory in a1, size in d0 + * d0 = 5: Send FileNofication message, port in a0, notifystruct in a1 */ #ifdef SUPPORT_THREADS @@ -3339,10 +4397,10 @@ static uae_u32 REGPARAM2 exter_int_helper (TrapContext *context) * Take care not to dereference self for units that didn't have their * startup packet sent. */ for (;;) { - if (unit_no >= current_mountinfo.num_units) + if (unit_no >= MAX_FILESYSTEM_UNITS) return 0; - if (uip[unit_no].self != 0 + if (uip[unit_no].open && uip[unit_no].self != 0 && uip[unit_no].self->cmds_acked == uip[unit_no].self->cmds_complete && uip[unit_no].self->cmds_acked != uip[unit_no].self->cmds_sent) break; @@ -3362,6 +4420,7 @@ static uae_u32 REGPARAM2 exter_int_helper (TrapContext *context) break; case 4: /* Exit the interrupt, and release the single-threading lock. */ + filesys_in_interrupt--; uae_sem_post (&singlethread_int_sem); break; @@ -3376,6 +4435,22 @@ static int handle_packet (Unit *unit, dpacket pck) { uae_s32 type = GET_PCK_TYPE (pck); PUT_PCK_RES2 (pck, 0); + + if (unit->inhibited && filesys_isvolume(unit) + && type != ACTION_INHIBIT && type != ACTION_MORE_CACHE + && type != ACTION_DISK_INFO) { + PUT_PCK_RES1 (pck, DOS_FALSE); + PUT_PCK_RES2 (pck, ERROR_NOT_A_DOS_DISK); + return 1; + } + if (type != ACTION_INHIBIT && type != ACTION_CURRENT_VOLUME + && type != ACTION_IS_FILESYSTEM && type != ACTION_MORE_CACHE + && type != ACTION_WRITE_PROTECT + && !filesys_isvolume(unit)) { + PUT_PCK_RES1 (pck, DOS_FALSE); + PUT_PCK_RES2 (pck, ERROR_NO_DISK); + return 1; + } switch (type) { case ACTION_LOCATE_OBJECT: action_lock (unit, pck); break; @@ -3404,6 +4479,9 @@ static int handle_packet (Unit *unit, dpacket pck) case ACTION_RENAME_DISK: action_rename_disk (unit, pck); break; case ACTION_IS_FILESYSTEM: action_is_filesystem (unit, pck); break; case ACTION_FLUSH: action_flush (unit, pck); break; + case ACTION_MORE_CACHE: action_more_cache (unit, pck); break; + case ACTION_INHIBIT: action_inhibit (unit, pck); break; + case ACTION_WRITE_PROTECT: action_write_protect (unit, pck); break; /* 2.0+ packet types */ case ACTION_SET_FILE_SIZE: action_set_file_size (unit, pck); break; @@ -3414,11 +4492,12 @@ static int handle_packet (Unit *unit, dpacket pck) case ACTION_PARENT_FH: action_parent_fh (unit, pck); break; case ACTION_ADD_NOTIFY: action_add_notify (unit, pck); break; case ACTION_REMOVE_NOTIFY: action_remove_notify (unit, pck); break; - + case ACTION_EXAMINE_ALL: return action_examine_all (unit, pck); + case ACTION_EXAMINE_ALL_END: return action_examine_all_end (unit, pck); + /* unsupported packets */ case ACTION_LOCK_RECORD: case ACTION_FREE_RECORD: - case ACTION_EXAMINE_ALL: case ACTION_MAKE_LINK: case ACTION_READ_LINK: case ACTION_FORMAT: @@ -3533,45 +4612,47 @@ static void init_filesys_diagentry (void) do_put_mem_long ((uae_u32 *)(filesysory + 0x2100), EXPANSION_explibname); do_put_mem_long ((uae_u32 *)(filesysory + 0x2104), filesys_configdev); do_put_mem_long ((uae_u32 *)(filesysory + 0x2108), EXPANSION_doslibname); - do_put_mem_long ((uae_u32 *)(filesysory + 0x210c), current_mountinfo.num_units); + do_put_mem_long ((uae_u32 *)(filesysory + 0x210c), nr_units()); native2amiga_startup(); - //cartridge_init(); } void filesys_start_threads (void) { - UnitInfo *uip; int i; - free_mountinfo (¤t_mountinfo); - dup_mountinfo (&options_mountinfo, ¤t_mountinfo); - uip = current_mountinfo.ui; - for (i = 0; i < current_mountinfo.num_units; i++) { - UnitInfo *ui = &uip[i]; - ui->unit_pipe = 0; - ui->back_pipe = 0; - ui->reset_state = FS_STARTUP; - if (savestate_state != STATE_RESTORE) { - ui->startup = 0; - ui->self = 0; - } -#ifdef UAE_FILESYS_THREADS - if (is_hardfile (¤t_mountinfo, i) == FILESYS_VIRTUAL) { - ui->unit_pipe = (smp_comm_pipe *)xmalloc (sizeof (smp_comm_pipe)); - ui->back_pipe = (smp_comm_pipe *)xmalloc (sizeof (smp_comm_pipe)); - init_comm_pipe (uip[i].unit_pipe, 100, 3); - init_comm_pipe (uip[i].back_pipe, 100, 1); - uae_start_thread (filesys_thread, (void *)(uip + i), &uip[i].tid); - } -#endif - if (savestate_state == STATE_RESTORE) - startup_update_unit (uip->self, uip); + filesys_in_interrupt = 0; + for (i = 0; i < MAX_FILESYSTEM_UNITS; i++) { + UnitInfo *ui = &mountinfo.ui[i]; + if (!ui->open) + continue; + filesys_start_thread (ui, i); } } void filesys_cleanup (void) { - free_mountinfo (¤t_mountinfo); + filesys_free_handles(); + free_mountinfo (); +} + +void filesys_free_handles(void) +{ + Unit *u, *u1; + for (u = units; u; u = u1) { + Key *k1, *knext; + u1 = u->next; + for (k1 = u->keys; k1; k1 = knext) { + knext = k1->next; + if (k1->fd) + fs_close (u, k1->fd); + xfree(k1); + } + u->keys = NULL; + xfree(u->newrootdir); + xfree(u->newvolume); + u->newrootdir = NULL; + u->newvolume = NULL; + } } void filesys_reset (void) @@ -3583,25 +4664,16 @@ void filesys_reset (void) if (savestate_state == STATE_RESTORE) return; + filesys_free_handles(); for (u = units; u; u = u1) { u1 = u->next; xfree (u); } - unit_num = 0; units = 0; -} - -static void free_all_ainos (Unit *u, a_inode *parent) -{ - a_inode *a; - while (a = parent->child) { - free_all_ainos (u, a); - dispose_aino (u, &parent->child, a); - } -} - -void filesys_flush_cache (void) -{ + key_uniq = 0; + a_uniq = 0; + free_mountinfo (); + initialize_mountinfo(); } void filesys_prepare_reset (void) @@ -3612,10 +4684,10 @@ void filesys_prepare_reset (void) if (savestate_state == STATE_RESTORE) return; - uip = current_mountinfo.ui; + uip = mountinfo.ui; #ifdef UAE_FILESYS_THREADS - for (i = 0; i < current_mountinfo.num_units; i++) { - if (uip[i].unit_pipe != 0) { + for (i = 0; i < MAX_FILESYSTEM_UNITS; i++) { + if (uip[i].open && uip[i].unit_pipe != 0) { uae_sem_init (&uip[i].reset_sync_sem, 0, 0); uip[i].reset_state = FS_GO_DOWN; /* send death message */ @@ -3626,6 +4698,7 @@ void filesys_prepare_reset (void) } } #endif + filesys_free_handles(); u = units; while (u != 0) { free_all_ainos (u, &u->rootnode); @@ -3646,7 +4719,6 @@ static uae_u32 REGPARAM2 filesys_diagentry (TrapContext *context) filesys_configdev = m68k_areg (&context->regs, 3); init_filesys_diagentry (); - uae_sem_init (&singlethread_int_sem, 0, 1); if (ROM_hardfile_resid != 0) { /* Build a struct Resident. This will set up and initialize * the uae.device */ @@ -3670,8 +4742,9 @@ static uae_u32 REGPARAM2 filesys_diagentry (TrapContext *context) * Resident structures and call InitResident() for them at the end of the * diag entry. */ +#ifdef SCSIEMU resaddr = scsidev_startup(resaddr); - +#endif /* scan for Residents and return pointer to array of them */ residents = resaddr; while (tmp < residents && tmp > start) { @@ -3689,9 +4762,9 @@ static uae_u32 REGPARAM2 filesys_diagentry (TrapContext *context) } /* call setup_exter */ put_word (resaddr + 0, 0x2079); - put_long (resaddr + 2, RTAREA_BASE + 28 + 4); /* move.l RTAREA_BASE+32,a0 */ + put_long (resaddr + 2, rtarea_base + 28 + 4); /* move.l RTAREA_BASE+32,a0 */ put_word (resaddr + 6, 0xd1fc); - put_long (resaddr + 8, RTAREA_BASE + 8 + 4); /* add.l #RTAREA_BASE+12,a0 */ + put_long (resaddr + 8, rtarea_base + 8 + 4); /* add.l #RTAREA_BASE+12,a0 */ put_word (resaddr + 12, 0x4e90); /* jsr (a0) */ put_word (resaddr + 14, 0x7001); /* moveq.l #1,d0 */ @@ -3716,10 +4789,10 @@ static uae_u32 REGPARAM2 filesys_dev_bootfilesys (TrapContext *context) uaecptr fsres = get_long (parmpacket + PP_FSRES); uaecptr fsnode; uae_u32 dostype, dostype2; - UnitInfo *uip = current_mountinfo.ui; + UnitInfo *uip = mountinfo.ui; int no = m68k_dreg (&context->regs, 6); int unit_no = no & 65535; - int type = is_hardfile (¤t_mountinfo, unit_no); + int type = is_hardfile (unit_no); if (type == FILESYS_VIRTUAL) return 0; @@ -3739,6 +4812,26 @@ static uae_u32 REGPARAM2 filesys_dev_bootfilesys (TrapContext *context) return 0; } +extern void picasso96_alloc (TrapContext*); +static uae_u32 REGPARAM2 filesys_init_storeinfo (TrapContext *context) +{ + int ret = -1; + switch (m68k_dreg (&context->regs, 1)) + { + case 1: + mountertask = m68k_areg (&context->regs, 1); + picasso96_alloc (context); + break; + case 2: + ret = automountunit; + automountunit = -1; + break; + case 3: + return 0; + } + return ret; +} + /* Remember a pointer AmigaOS gave us so we can later use it to identify * which unit a given startup message belongs to. */ static uae_u32 REGPARAM2 filesys_dev_remember (TrapContext *context) @@ -3746,7 +4839,7 @@ static uae_u32 REGPARAM2 filesys_dev_remember (TrapContext *context) int no = m68k_dreg (&context->regs, 6); int unit_no = no & 65535; int sub_no = no >> 16; - UnitInfo *uip = ¤t_mountinfo.ui[unit_no]; + UnitInfo *uip = &mountinfo.ui[unit_no]; uaecptr devicenode = m68k_areg (&context->regs, 3); if (m68k_dreg (&context->regs, 3) >= 0) @@ -3754,69 +4847,81 @@ static uae_u32 REGPARAM2 filesys_dev_remember (TrapContext *context) return devicenode; } -static char *device_dupfix (uaecptr expbase, char *devname) +static int device_isdup (uaecptr expbase, char *devname) { uaecptr bnode, dnode, name; - int len, i, modified; - char dname[256], newname[256]; + int len, i; + char dname[256]; + + bnode = get_long (expbase + 74); /* expansion.library bootnode list */ + while (get_long (bnode)) { + dnode = get_long (bnode + 16); /* device node */ + name = get_long (dnode + 40) << 2; /* device name BSTR */ + len = get_byte (name); + for (i = 0; i < len; i++) + dname[i] = get_byte (name + 1 + i); + dname[len] = 0; + if (!strcmpi (devname, dname)) + return 1; + bnode = get_long (bnode); + } + return 0; +} + +static char *device_dupfix (uaecptr expbase, char *devname) +{ + int modified; + char newname[256]; strcpy (newname, devname); modified = 1; while (modified) { modified = 0; - bnode = get_long (expbase + 74); /* expansion.library bootnode list */ - while (get_long (bnode)) { - dnode = get_long (bnode + 16); /* device node */ - name = get_long (dnode + 40) << 2; /* device name BSTR */ - len = get_byte(name); - for (i = 0; i < len; i++) - dname[i] = get_byte (name + 1 + i); - dname[len] = 0; - for (;;) { - if (!strcmpi (newname, dname)) { + if (device_isdup (expbase, newname)) { if (strlen (newname) > 2 && newname[strlen (newname) - 2] == '_') { newname[strlen (newname) - 1]++; } else { strcat (newname, "_0"); } modified = 1; - } else { - break; } } - bnode = get_long (bnode); - } - } - return strdup (newname); + return my_strdup (newname); } static void get_new_device (int type, uaecptr parmpacket, char **devname, uaecptr *devname_amiga, int unit_no) { char buffer[80]; + uaecptr expbase = get_long (parmpacket + PP_EXPLIB); if (*devname == 0 || strlen(*devname) == 0) { - sprintf (buffer, "DH%d", unit_no); + int un = unit_no; + for (;;) { + sprintf (buffer, "DH%d", un++); + if (!device_isdup (expbase, buffer)) + break; + } } else { strcpy (buffer, *devname); } - *devname_amiga = ds (device_dupfix (get_long (parmpacket + PP_EXPLIB), buffer)); + *devname_amiga = ds (device_dupfix (expbase, buffer)); if (type == FILESYS_VIRTUAL) - write_log ("FS: mounted virtual unit %s (%s)\n", buffer, current_mountinfo.ui[unit_no].rootdir); + write_log ("FS: mounted virtual unit %s (%s)\n", buffer, mountinfo.ui[unit_no].rootdir); else write_log ("FS: mounted HDF unit %s (%04.4x-%08.8x, %s)\n", buffer, - (uae_u32)(current_mountinfo.ui[unit_no].hf.size >> 32), - (uae_u32)(current_mountinfo.ui[unit_no].hf.size), - current_mountinfo.ui[unit_no].rootdir); + (uae_u32)(mountinfo.ui[unit_no].hf.size >> 32), + (uae_u32)(mountinfo.ui[unit_no].hf.size), + mountinfo.ui[unit_no].rootdir); } /* Fill in per-unit fields of a parampacket */ static uae_u32 REGPARAM2 filesys_dev_storeinfo (TrapContext *context) { - UnitInfo *uip = current_mountinfo.ui; + UnitInfo *uip = mountinfo.ui; int no = m68k_dreg (&context->regs, 6); int unit_no = no & 65535; int sub_no = no >> 16; - int type = is_hardfile (¤t_mountinfo, unit_no); + int type = is_hardfile (unit_no); uaecptr parmpacket = m68k_areg (&context->regs, 0); if (sub_no) @@ -3846,15 +4951,28 @@ static uae_u32 REGPARAM2 filesys_dev_storeinfo (TrapContext *context) put_long (parmpacket + 72, ~1); /* addMask (?) */ put_long (parmpacket + 76, uip[unit_no].bootpri); /* bootPri */ put_long (parmpacket + 80, 0x444f5300); /* DOS\0 */ + if (uip[unit_no].bootpri < -127) + m68k_dreg (®s, 7) = m68k_dreg (®s, 7) & ~1; /* do not boot */ + if (uip[unit_no].bootpri < -128) + return -1; /* do not mount */ return type; } +static uae_u32 REGPARAM2 mousehack_done (TrapContext *context) +{ + /* do not allow other fs threads to start another mousehack */ + rtarea[get_long (rtarea_base + 40) + 12 - 2] = 0xff; + return 1; +} + void filesys_install (void) { uaecptr loop; TRACE (("Installing filesystem\n")); + uae_sem_init (&singlethread_int_sem, 0, 1); + ROM_filesys_resname = ds("UAEunixfs.resource"); ROM_filesys_resid = ds("UAE unixfs 0.4"); @@ -3866,31 +4984,43 @@ void filesys_install (void) loop = here (); - org (RTAREA_BASE + 0xFF18); + org (rtarea_base + 0xFF18); calltrap (deftrap2 (filesys_dev_bootfilesys, 0, "filesys_dev_bootfilesys")); dw (RTS); /* Special trap for the assembly make_dev routine */ - org (RTAREA_BASE + 0xFF20); + org (rtarea_base + 0xFF20); calltrap (deftrap2 (filesys_dev_remember, 0, "filesys_dev_remember")); dw (RTS); - org (RTAREA_BASE + 0xFF28); + org (rtarea_base + 0xFF28); calltrap (deftrap2 (filesys_dev_storeinfo, 0, "filesys_dev_storeinfo")); dw (RTS); - org (RTAREA_BASE + 0xFF30); + org (rtarea_base + 0xFF30); calltrap (deftrap2 (filesys_handler, 0, "filesys_handler")); dw (RTS); - org (RTAREA_BASE + 0xFF40); + org (rtarea_base + 0xFF38); + calltrap (deftrap2 (mousehack_done, 0, "mousehack_done")); + dw (RTS); + + org (rtarea_base + 0xFF40); calltrap (deftrap2 (startup_handler, 0, "startup_handler")); dw (RTS); - org (RTAREA_BASE + 0xFF50); + org (rtarea_base + 0xFF48); + calltrap (deftrap2 (filesys_init_storeinfo, TRAPFLAG_EXTRA_STACK, "filesys_init_storeinfo")); + dw (RTS); + + org (rtarea_base + 0xFF50); calltrap (deftrap2 (exter_int_helper, 0, "exter_int_helper")); dw (RTS); + org (rtarea_base + 0xFF58); + calltrap (deftrap2 (exall_helper, 0, "exall_helper")); + dw (RTS); + org (loop); } @@ -3906,13 +5036,340 @@ void filesys_install_code (void) #include "filesys_bootrom.c" } -static uae_u8 *restore_filesys_virtual (UnitInfo *ui, uae_u8 *src) +static uae_u8 *restore_filesys_hardfile (UnitInfo *ui, uae_u8 *src) { - Unit *u = startup_create_unit (ui); + struct hardfiledata *hfd = &ui->hf; + char *s; + + hfd->size = restore_u64(); + hfd->offset = restore_u64(); + hfd->nrcyls = restore_u32(); + hfd->secspertrack = restore_u32(); + hfd->surfaces = restore_u32(); + hfd->reservedblocks = restore_u32(); + hfd->blocksize = restore_u32(); + hfd->readonly = restore_u32(); + hfd->flags = restore_u32(); + hfd->cylinders = restore_u32(); + hfd->sectors = restore_u32(); + hfd->heads = restore_u32(); + s = restore_string(); + strcpy (hfd->vendor_id, s); + xfree(s); + s = restore_string(); + strcpy (hfd->product_id, s); + xfree(s); + s = restore_string(); + strcpy (hfd->product_rev, s); + xfree(s); + s = restore_string(); + strcpy (hfd->device_name, s); + xfree(s); + return src; +} + +static uae_u8 *save_filesys_hardfile (UnitInfo *ui, uae_u8 *dst) +{ + struct hardfiledata *hfd = &ui->hf; + + save_u64 (hfd->size); + save_u64 (hfd->offset); + save_u32 (hfd->nrcyls); + save_u32 (hfd->secspertrack); + save_u32 (hfd->surfaces); + save_u32 (hfd->reservedblocks); + save_u32 (hfd->blocksize); + save_u32 (hfd->readonly); + save_u32 (hfd->flags); + save_u32 (hfd->cylinders); + save_u32 (hfd->sectors); + save_u32 (hfd->heads); + save_string (hfd->vendor_id); + save_string (hfd->product_id); + save_string (hfd->product_rev); + save_string (hfd->device_name); + return dst; +} + +static a_inode *restore_filesys_get_base(Unit *u, char *npath) +{ + char *path, *p, *p2; + a_inode *a; + int cnt, err, i; + + /* no '/' = parent is root */ + if (!strchr(npath, '/')) + return &u->rootnode; + + /* iterate from root to last to previous path part, + * create ainos if not already created. + */ + path = (char *)xcalloc(strlen(npath) + 2, 1); + cnt = 1; + for (;;) { + strcpy (path, npath); + strcat (path, "/"); + p = path; + for (i = 0; i < cnt ;i++) { + if (i > 0) + p++; + while (*p != '/' && *p != 0) + p++; + } + if (*p) { + *p = 0; + err = 0; + get_aino (u, &u->rootnode, path, (uae_u32 *)&err); + if (err) { + write_log("*** FS: missing path '%s'!\n", path); + return NULL; + } + cnt++; + } else { + break; + } + } + + /* find base (parent) of last path part */ + strcpy (path, npath); + p = path; + a = u->rootnode.child; + for (;;) { + if (*p == 0) { + write_log("*** FS: base aino NOT found '%s' ('%s')\n", a->nname, npath); + xfree (path); + return NULL; + } + p2 = p; + while(*p2 != '/' && *p2 != '\\' && *p2 != 0) + p2++; + *p2 = 0; + while (a) { + if (!same_aname(p, a->aname)) { + a = a->sibling; + continue; + } + p = p2 + 1; + if (*p == 0) { + write_log("FS: base aino found '%s' ('%s')\n", a->nname, npath); + xfree (path); + return a; + } + a = a->child; + break; + } + if (!a) { + write_log("*** FS: path part '%s' not found ('%s')\n", p, npath); + xfree (path); + return NULL; + } + } +} + +static char *makenativepath(UnitInfo *ui, char *apath) +{ + int i; + char *pn; + /* create native path. FIXME: handle 'illegal' characters */ + pn = (char *)xcalloc (strlen (apath) + 1 + strlen (ui->rootdir) + 1, 1); + sprintf (pn, "%s/%s", ui->rootdir, apath); + if (FSDB_DIR_SEPARATOR != '/') { + for (i = 0; i < strlen (pn); i++) { + if (pn[i] == '/') + pn[i] = FSDB_DIR_SEPARATOR; + } + } + return pn; +} + +static uae_u8 *restore_aino(UnitInfo *ui, Unit *u, uae_u8 *src) +{ + char *p, *p2, *pn; + uae_u32 flags; + int missing; + a_inode *base, *a; + + missing = 0; + a = (a_inode *)xcalloc (sizeof (a_inode), 1); + a->uniq = restore_u64 (); + a->locked_children = restore_u32 (); + a->exnext_count = restore_u32 (); + a->shlock = restore_u32 (); + flags = restore_u32 (); + if (flags & 1) + a->elock = 1; + /* full Amiga-side path without drive, eg. "C/SetPatch" */ + p = restore_string (); + /* root (p = volume label) */ + if (a->uniq == 0) { + a->nname = my_strdup(ui->rootdir); + a->aname = p; + a->dir = 1; + if (ui->volflags < 0) { + write_log ("FS: Volume '%s' ('%s') missing!\n", a->aname, a->nname); + } else { + a->volflags = ui->volflags; + recycle_aino (u, a); + write_log("FS: Lock (root) '%s' ('%s')\n", a->aname, a->nname); + } + return src; + } + p2 = strrchr(p, '/'); + if (p2) + p2++; + else + p2 = p; + pn = makenativepath(ui, p); + a->nname = pn; + a->aname = my_strdup(p2); + /* find parent of a->aname (Already restored previously. I hope..) */ + if (p2 != p) + p2[-1] = 0; + base = restore_filesys_get_base(u, p); + xfree(p); + if (flags & 2) { + a->dir = 1; + if (!my_existsdir(a->nname)) + write_log("*** FS: Directory '%s' missing!\n", a->nname); + else + fsdb_clean_dir (a); + } else { + if (!my_existsfile(a->nname)) + write_log("*** FS: File '%s' missing!\n", a->nname); + } + if (base) { + fill_file_attrs (u, base, a); + init_child_aino_tree (u, base, a); + } else { + write_log("*** FS: parent directory missing '%s' ('%s')\n", a->aname, a->nname); + missing = 1; + } + if (missing) { + write_log("*** FS: Lock restore failed '%s' ('%s')\n", a->aname, a->nname); + xfree (a->nname); + xfree (a->aname); + xfree (a); + } else { + write_log("FS: Lock '%s' ('%s')\n", a->aname, a->nname); + recycle_aino (u, a); + } + return src; +} + +static uae_u8 *restore_key(UnitInfo *ui, Unit *u, uae_u8 *src) +{ + int savedsize, uniq; + char *p, *pn; + mode_t openmode; + uae_u32 err; + int missing; + a_inode *a; + Key *k; + + missing = 0; + k = (Key *)xcalloc(sizeof(Key), 1); + k->uniq = restore_u64(); + k->file_pos = restore_u32(); + k->createmode = restore_u32(); + k->dosmode = restore_u32(); + savedsize = restore_u32(); + uniq = restore_u64(); + p = restore_string(); + pn = makenativepath (ui, p); + openmode = ((k->dosmode & A_FIBF_READ) == 0 ? O_WRONLY + : (k->dosmode & A_FIBF_WRITE) == 0 ? O_RDONLY + : O_RDWR); + write_log("FS: open file '%s' ('%s'), pos=%d\n", p, pn, k->file_pos); + a = get_aino (u, &u->rootnode, p, &err); + if (!a) + write_log ("*** FS: Open file aino creation failed '%s'\n", p); + missing = 1; + if (a) { + missing = 0; + k->aino = a; + if (a->uniq != uniq) + write_log("*** FS: Open file '%s' aino id %d != %d\n", p, uniq, a->uniq); + if (!my_existsfile(pn)) { + write_log("*** FS: Open file '%s' is missing, creating dummy file!\n", p); + k->fd = fs_open (u, pn, openmode | O_CREAT |O_BINARY); + if (k->fd) { + uae_u8 *buf = (uae_u8 *)xcalloc (10000, 1); + int sp = savedsize; + while (sp) { + int s = sp >= 10000 ? 10000 : sp; + my_write(k->fd, buf, s); + sp -= s; + } + xfree(buf); + write_log("*** FS: dummy file created\n"); + } else { + write_log("*** FS: Open file '%s', couldn't create dummy file!\n", p); + } + } else { + k->fd = fs_open (u, pn, openmode | O_BINARY); + } + if (!k->fd) { + write_log("*** FS: Open file '%s' failed to open!\n", p); + missing = 1; + } else { + size_t s; + s = fs_lseek (u, k->fd, 0, SEEK_END); + if (s != savedsize) + write_log("FS: restored file '%s' size changed! orig=%d, now=%d!!\n", p, savedsize, s); + if (k->file_pos > s) { + write_log("FS: restored filepos larger than size of file '%s'!! %d > %d\n", p, k->file_pos, s); + k->file_pos = s; + } + fs_lseek (u,k->fd, k->file_pos, SEEK_SET); + } + } + xfree (p); + if (missing) { + xfree(k); + } else { + k->next = u->keys; + u->keys = k; + } + return src; +} + +static uae_u8 *restore_notify(UnitInfo *ui, Unit *u, uae_u8 *src) +{ + Notify *n = (Notify *)xcalloc (sizeof (Notify), 1); + uae_u32 hash; + char *s; + + n->notifyrequest = restore_u32(); + s = restore_string(); + n->fullname = (char *)xmalloc (strlen(ui->volname) + 2 + strlen(s) + 1); + sprintf (n->fullname, "%s:%s", ui->volname, s); + xfree(s); + s = strrchr(n->fullname, '/'); + if (s) + s++; + else + s = n->fullname; + n->partname = my_strdup(s); + hash = notifyhash (n->fullname); + n->next = u->notifyhash[hash]; + u->notifyhash[hash] = n; + write_log("FS: notify %08.8X '%s' '%s'\n", n->notifyrequest, n->fullname, n->partname); + return src; +} + +static uae_u8 *restore_exkey(UnitInfo *ui, Unit *u, uae_u8 *src) +{ + restore_u64(); + restore_u64(); + restore_u64(); + return src; +} + +static uae_u8 *restore_filesys_virtual (UnitInfo *ui, uae_u8 *src, int num) +{ + Unit *u = startup_create_unit (ui, num); int cnt; - u->a_uniq = restore_u64 (); - u->key_uniq = restore_u64 (); u->dosbase = restore_u32 (); u->volume = restore_u32 (); u->port = restore_u32 (); @@ -3921,25 +5378,138 @@ static uae_u8 *restore_filesys_virtual (UnitInfo *ui, uae_u8 *src) u->cmds_sent = restore_u64 (); u->cmds_complete = restore_u64 (); u->cmds_acked = restore_u64 (); + u->next_exkey = restore_u32 (); + u->total_locked_ainos = restore_u32 (); + u->volflags = ui->volflags; + cnt = restore_u32 (); - while (cnt-- > 0) { - restore_u64 (); - restore_u32 (); - restore_u32 (); - restore_u32 (); - xfree (restore_string ()); - } + write_log("FS: restoring %d locks\n", cnt); + while (cnt-- > 0) + src = restore_aino(ui, u, src); + + cnt = restore_u32 (); + write_log("FS: restoring %d open files\n", cnt); + while (cnt-- > 0) + src = restore_key(ui, u, src); + + cnt = restore_u32 (); + write_log("FS: restoring %d notifications\n", cnt); + while (cnt-- > 0) + src = restore_notify (ui, u, src); + + cnt = restore_u32 (); + write_log("FS: restoring %d exkeys\n", cnt); + while (cnt-- > 0) + src = restore_exkey (ui, u, src); + return src; } +static char *getfullaname(a_inode *a) +{ + char *p; + int first = 1; + + p = (char *)xcalloc (2000, 1); + while (a) { + int len = strlen(a->aname); + memmove (p + len + 1, p, strlen(p) + 1); + memcpy (p, a->aname, strlen(a->aname)); + if (!first) + p[len] = '/'; + first = 0; + a = a->parent; + if (a && a->uniq == 0) + return p; + } + return p; +} + +/* scan and save all Lock()'d files */ +static int recurse_aino (UnitInfo *ui, a_inode *a, int cnt, uae_u8 **dstp) +{ + uae_u8 *dst = NULL; + int dirty = 0; + a_inode *a2 = a; + + if (dstp) + dst = *dstp; + while (a) { + if (a->elock || a->shlock || a->uniq == 0) { + if (dst) { + char *fn; + write_log ("%04x s=%d e=%d d=%d '%s' '%s'\n", a->uniq, a->shlock, a->elock, a->dir, a->aname, a->nname); + fn = getfullaname(a); + write_log ("->'%s'\n", fn); + save_u64 (a->uniq); + save_u32 (a->locked_children); + save_u32 (a->exnext_count); + save_u32 (a->shlock); + save_u32 ((a->elock ? 1 : 0) | (a->dir ? 2 : 0)); + save_string (fn); + xfree(fn); + } + cnt++; + } + if (a->dirty) + dirty = 1; + if (a->child) + cnt = recurse_aino (ui, a->child, cnt, &dst); + a = a->sibling; + } + if (dirty && a2->parent) + fsdb_dir_writeback (a2->parent); + if (dst) + *dstp = dst; + return cnt; +} + +static uae_u8 *save_key(uae_u8 *dst, Key *k) +{ + char *fn = getfullaname(k->aino); + int size; + save_u64 (k->uniq); + save_u32 (k->file_pos); + save_u32 (k->createmode); + save_u32 (k->dosmode); + size = my_lseek(k->fd, 0, SEEK_END); + save_u32 (size); + save_u64 (k->aino->uniq); + my_lseek(k->fd, k->file_pos, SEEK_SET); + save_string (fn); + write_log("'%s' uniq=%d size=%d seekpos=%d mode=%d dosmode=%d\n", + fn, k->uniq, size, k->file_pos, k->createmode, k->dosmode); + xfree(fn); + return dst; +} + +static uae_u8 *save_notify (UnitInfo *ui, uae_u8 *dst, Notify *n) +{ + char *s; + save_u32(n->notifyrequest); + s = n->fullname; + if (strlen(s) >= strlen(ui->volname) && !memcmp(n->fullname, ui->volname, strlen(ui->volname))) + s = n->fullname + strlen(ui->volname) + 1; + save_string(s); + write_log("FS: notify %08.8X '%s'\n", n->notifyrequest, n->fullname); + return dst; +} + +static uae_u8 *save_exkey (uae_u8 *dst, ExamineKey *ek) +{ + save_u64(ek->uniq); + save_u64(ek->aino->uniq); + save_u64(ek->curr_file->uniq); + return dst; +} + static uae_u8 *save_filesys_virtual (UnitInfo *ui, uae_u8 *dst) { Unit *u = ui->self; Key *k; - int cnt; + int cnt, i, j; - save_u64 (u->a_uniq); - save_u64 (u->key_uniq); + write_log("FSSAVE: '%s'\n", ui->devname); save_u32 (u->dosbase); save_u32 (u->volume); save_u32 (u->port); @@ -3948,29 +5518,92 @@ static uae_u8 *save_filesys_virtual (UnitInfo *ui, uae_u8 *dst) save_u64 (u->cmds_sent); save_u64 (u->cmds_complete); save_u64 (u->cmds_acked); + save_u32 (u->next_exkey); + save_u32 (u->total_locked_ainos); + cnt = recurse_aino (ui, &u->rootnode, 0, NULL); + save_u32 (cnt); + write_log("%d open locks\n", cnt); + cnt = recurse_aino (ui, &u->rootnode, 0, &dst); cnt = 0; for (k = u->keys; k; k = k->next) cnt++; save_u32 (cnt); - for (k = u->keys; k; k = k->next) { - save_u64 (k->uniq); - save_u32 (k->file_pos); - save_u32 (k->createmode); - save_u32 (k->dosmode); - save_string (k->aino->nname); + write_log("%d open files\n", cnt); + for (k = u->keys; k; k = k->next) + dst = save_key (dst, k); + for (j = 0; j < 2; j++) { + cnt = 0; + for (i = 0; i < NOTIFY_HASH_SIZE; i++) { + Notify *n = u->notifyhash[i]; + while (n) { + if (j > 0) + dst = save_notify (ui, dst, n); + cnt++; + n = n->next; + } + } + if (j == 0) { + save_u32 (cnt); + write_log("%d notify requests\n", cnt); + } } + for (j = 0; j < 2; j++) { + cnt = 0; + for (i = 0; i < EXKEYS; i++) { + ExamineKey *ek = &u->examine_keys[i]; + if (ek->uniq) { + cnt++; + if (j > 0) + dst = save_exkey (dst, ek); + } + } + if (j == 0) { + save_u32 (cnt); + write_log("%d exkeys\n", cnt); + } + } + write_log("END\n"); return dst; } +uae_u8 *save_filesys_common (int *len) +{ + uae_u8 *dstbak, *dst; + if (nr_units() == 0) + return NULL; + dstbak = dst = (uae_u8 *)xmalloc (1000); + save_u32 (2); + save_u64 (a_uniq); + save_u64 (key_uniq); + *len = dst - dstbak; + return dstbak; +} + +uae_u8 *restore_filesys_common (uae_u8 *src) +{ + if (restore_u32 () != 2) + return src; + free_mountinfo(); + a_uniq = restore_u64 (); + key_uniq = restore_u64 (); + return src; +} + uae_u8 *save_filesys (int num, int *len) { uae_u8 *dstbak, *dst; UnitInfo *ui; - int type = is_hardfile (¤t_mountinfo, num); + int type = is_hardfile (num); - dstbak = dst = (uae_u8 *) malloc (10000); - ui = ¤t_mountinfo.ui[num]; - save_u32 (1); /* version */ + ui = &mountinfo.ui[num]; + if (!ui->open) + return NULL; + /* not initialized yet, do not save */ + if (type == FILESYS_VIRTUAL && (ui->self == NULL || ui->volname == NULL)) + return NULL; + write_log("FS_FILESYS: '%s' '%s'\n", ui->devname, ui->volname); + dstbak = dst = (uae_u8 *)xmalloc (100000); + save_u32 (2); /* version */ save_u32 (ui->devno); save_u16 (type); save_string (ui->rootdir); @@ -3983,6 +5616,8 @@ uae_u8 *save_filesys (int num, int *len) save_u32 (filesys_configdev); if (type == FILESYS_VIRTUAL) dst = save_filesys_virtual (ui, dst); + if (type == FILESYS_HARDFILE /*|| type == FILESYS_HARDFILE_RDB*/) + dst = save_filesys_hardfile (ui, dst); *len = dst - dstbak; return dstbak; } @@ -3994,11 +5629,9 @@ uae_u8 *restore_filesys (uae_u8 *src) char *devname = 0, *volname = 0, *rootdir = 0, *filesysdir = 0; int bootpri, readonly; - if (restore_u32 () != 1) + if (restore_u32 () != 2) return src; devno = restore_u32 (); - if (devno >= current_mountinfo.num_units) - return src; type = restore_u16 (); rootdir = restore_string (); devname = restore_string (); @@ -4006,16 +5639,19 @@ uae_u8 *restore_filesys (uae_u8 *src) filesysdir = restore_string (); bootpri = restore_u8 (); readonly = restore_u8 (); - if (set_filesys_unit (¤t_mountinfo, devno, devname, volname, rootdir, readonly, - 0, 0, 0, 0, bootpri, filesysdir[0] ? filesysdir : NULL, 0)) { + ui = &mountinfo.ui[devno]; + ui->startup = restore_u32 (); + filesys_configdev = restore_u32 (); + if (type == FILESYS_HARDFILE /*|| type == FILESYS_HARDFILE_RDB*/) + src = restore_filesys_hardfile(ui, src); + if (set_filesys_unit (devno, devname, volname, rootdir, readonly, + ui->hf.secspertrack, ui->hf.surfaces, ui->hf.reservedblocks, ui->hf.blocksize, + bootpri, 0, 1, filesysdir[0] ? filesysdir : NULL, 0, 0) < 0) { write_log ("filesys '%s' failed to restore\n", rootdir); goto end; } - ui = ¤t_mountinfo.ui[devno]; - ui->startup = restore_u32 (); - filesys_configdev = restore_u32 (); if (type == FILESYS_VIRTUAL) - src = restore_filesys_virtual (ui, src); + src = restore_filesys_virtual (ui, src, devno); end: xfree (rootdir); xfree (devname); @@ -4024,6 +5660,13 @@ end: return src; } +int save_filesys_cando(void) +{ + if (nr_units() == 0) + return -1; + return filesys_in_interrupt ? 0 : 1; +} + #ifdef WIN32 #include #include diff --git a/src/filesys_bootrom.c b/src/filesys_bootrom.c index 30267c1c..298a46ca 100644 --- a/src/filesys_bootrom.c +++ b/src/filesys_bootrom.c @@ -1,318 +1,494 @@ db(0x00); db(0x00); db(0x00); db(0x10); db(0x00); db(0x00); db(0x00); db(0x00); - db(0x60); db(0x00); db(0x04); db(0xf6); db(0x00); db(0x00); db(0x03); db(0xb2); - db(0x00); db(0x00); db(0x00); db(0x34); db(0x00); db(0x00); db(0x00); db(0xd4); - db(0x00); db(0x00); db(0x00); db(0x20); db(0x00); db(0x00); db(0x01); db(0x8e); - db(0x00); db(0x00); db(0x06); db(0xb8); db(0x00); db(0x00); db(0x07); db(0xdc); - db(0x43); db(0xfa); db(0x09); db(0xa8); db(0x4e); db(0xae); db(0xff); db(0xa0); + db(0x60); db(0x00); db(0x09); db(0x78); db(0x00); db(0x00); db(0x07); db(0x42); + db(0x00); db(0x00); db(0x00); db(0x34); db(0x00); db(0x00); db(0x01); db(0x78); + db(0x00); db(0x00); db(0x00); db(0x20); db(0x00); db(0x00); db(0x02); db(0x34); + db(0x00); db(0x00); db(0x0b); db(0xba); db(0x00); db(0x00); db(0x0d); db(0x52); + db(0x43); db(0xfa); db(0x0f); db(0x28); db(0x4e); db(0xae); db(0xff); db(0xa0); db(0x20); db(0x40); db(0x20); db(0x28); db(0x00); db(0x16); db(0x20); db(0x40); db(0x4e); db(0x90); db(0x4e); db(0x75); db(0x48); db(0xe7); db(0xff); db(0xfe); db(0x2c); db(0x78); db(0x00); db(0x04); db(0x30); db(0x3c); db(0xff); db(0xfc); - db(0x61); db(0x00); db(0x06); db(0x66); db(0x2a); db(0x50); db(0x43); db(0xfa); - db(0x09); db(0xa0); db(0x70); db(0x24); db(0x7a); db(0x00); db(0x4e); db(0xae); + db(0x61); db(0x00); db(0x0b); db(0x68); db(0x2a); db(0x50); db(0x43); db(0xfa); + db(0x0f); db(0x20); db(0x70); db(0x24); db(0x7a); db(0x01); db(0x4e); db(0xae); db(0xfd); db(0xd8); db(0x4a); db(0x80); db(0x66); db(0x0c); db(0x43); db(0xfa); - db(0x09); db(0x90); db(0x70); db(0x00); db(0x7a); db(0x01); db(0x4e); db(0xae); - db(0xfd); db(0xd8); db(0x28); db(0x40); db(0x20); db(0x3c); db(0x00); db(0x00); - db(0x02); db(0x2c); db(0x72); db(0x01); db(0x4e); db(0xae); db(0xff); db(0x3a); - db(0x26); db(0x40); db(0x27); db(0x4c); db(0x01); db(0x9c); db(0x7c); db(0x00); - db(0xbc); db(0xad); db(0x01); db(0x0c); db(0x64); db(0x24); db(0x2f); db(0x06); - db(0x7e); db(0x01); db(0x2f); db(0x0b); db(0x20); db(0x4b); db(0x61); db(0x00); - db(0x03); db(0x2a); db(0x26); db(0x5f); db(0x0c); db(0x80); db(0xff); db(0xff); - db(0xff); db(0xfe); db(0x67); db(0x08); db(0x48); db(0x46); db(0x52); db(0x46); - db(0x48); db(0x46); db(0x60); db(0xe4); db(0x2c); db(0x1f); db(0x52); db(0x46); - db(0x60); db(0xd6); db(0x2c); db(0x78); db(0x00); db(0x04); db(0x22); db(0x4c); - db(0x4e); db(0xae); db(0xfe); db(0x62); db(0x30); db(0x3c); db(0xff); db(0x80); - db(0x61); db(0x00); db(0x05); db(0xf6); db(0x4e); db(0x90); db(0x72); db(0x03); - db(0x74); db(0xf6); db(0x20); db(0x7c); db(0x00); db(0x20); db(0x00); db(0x00); - db(0x90); db(0x88); db(0x65); db(0x0a); db(0x67); db(0x08); db(0x78); db(0x00); - db(0x22); db(0x44); db(0x4e); db(0xae); db(0xfd); db(0x96); db(0x4c); db(0xdf); - db(0x7f); db(0xff); db(0x4e); db(0x75); db(0x48); db(0xe7); db(0x00); db(0x20); - db(0x30); db(0x3c); db(0xff); db(0x50); db(0x61); db(0x00); db(0x05); db(0xca); - db(0x70); db(0x00); db(0x4e); db(0x90); db(0x4a); db(0x80); db(0x67); db(0x00); - db(0x00); db(0xa0); db(0x2c); db(0x78); db(0x00); db(0x04); db(0x30); db(0x3c); - db(0xff); db(0x50); db(0x61); db(0x00); db(0x05); db(0xb4); db(0x70); db(0x02); - db(0x4e); db(0x90); db(0x0c); db(0x40); db(0x00); db(0x01); db(0x6d); db(0x7a); - db(0x6e); db(0x06); db(0x4e); db(0xae); db(0xfe); db(0x92); db(0x60); db(0xe6); - db(0x0c); db(0x40); db(0x00); db(0x02); db(0x6e); db(0x08); db(0x20); db(0x01); - db(0x4e); db(0xae); db(0xfe); db(0xbc); db(0x60); db(0xd8); db(0x0c); db(0x40); - db(0x00); db(0x03); db(0x6e); db(0x06); db(0x4e); db(0xae); db(0xfe); db(0x86); - db(0x60); db(0xcc); db(0x0c); db(0x40); db(0x00); db(0x04); db(0x6e); db(0x06); - db(0x4e); db(0xae); db(0xff); db(0x4c); db(0x60); db(0xc0); db(0x0c); db(0x40); - db(0x00); db(0x05); db(0x6e); db(0x46); db(0x48); db(0xe7); db(0x00); db(0xc0); - db(0x70); db(0x26); db(0x22); db(0x3c); db(0x00); db(0x01); db(0x00); db(0x01); - db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x4c); db(0xdf); db(0x03); db(0x00); - db(0x24); db(0x40); db(0x15); db(0x7c); db(0x00); db(0x08); db(0x00); db(0x08); - db(0x25); db(0x48); db(0x00); db(0x0e); db(0x35); db(0x7c); db(0x00); db(0x26); - db(0x00); db(0x12); db(0x25); db(0x7c); db(0x40); db(0x00); db(0x00); db(0x00); - db(0x00); db(0x14); db(0x35); db(0x7c); db(0x12); db(0x34); db(0x00); db(0x18); - db(0x25); db(0x49); db(0x00); db(0x1a); db(0x20); db(0x69); db(0x00); db(0x10); - db(0x22); db(0x4a); db(0x4e); db(0xae); db(0xfe); db(0x92); db(0x60); db(0x00); - db(0xff); db(0x76); db(0x30); db(0x3c); db(0xff); db(0x50); db(0x61); db(0x00); - db(0x05); db(0x28); db(0x70); db(0x04); db(0x4e); db(0x90); db(0x70); db(0x01); - db(0x4c); db(0xdf); db(0x04); db(0x00); db(0x4e); db(0x75); db(0x48); db(0xe7); - db(0xc0); db(0xc0); db(0x70); db(0x1a); db(0x22); db(0x3c); db(0x00); db(0x01); - db(0x00); db(0x01); db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x22); db(0x40); - db(0x41); db(0xfa); db(0x08); db(0x19); db(0x23); db(0x48); db(0x00); db(0x0a); - db(0x41); db(0xfa); db(0xff); db(0x2a); db(0x23); db(0x48); db(0x00); db(0x0e); - db(0x41); db(0xfa); db(0xff); db(0x22); db(0x23); db(0x48); db(0x00); db(0x12); - db(0x33); db(0x7c); db(0x02); db(0x14); db(0x00); db(0x08); db(0x70); db(0x03); - db(0x4e); db(0xae); db(0xff); db(0x58); db(0x4c); db(0xdf); db(0x03); db(0x03); - db(0x4e); db(0x75); db(0x48); db(0xe7); db(0xc0); db(0xf2); db(0x2c); db(0x78); - db(0x00); db(0x04); db(0x24); db(0x48); db(0x26); db(0x49); db(0x20); db(0x3c); - db(0x00); db(0x00); db(0x00); db(0xbe); db(0x22); db(0x3c); db(0x00); db(0x01); - db(0x00); db(0x01); db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x20); db(0x40); - db(0x70); db(0x00); db(0x43); db(0xeb); db(0x01); db(0xa0); db(0x11); db(0xb1); - db(0x00); db(0x00); db(0x00); db(0x0e); db(0x52); db(0x40); db(0x0c); db(0x40); - db(0x00); db(0x8c); db(0x66); db(0xf2); db(0x20); db(0x0a); db(0xe4); db(0x88); - db(0x21); db(0x40); db(0x00); db(0x36); db(0x22); db(0x48); db(0x41); db(0xfa); - db(0x07); db(0xb3); db(0x23); db(0x48); db(0x00); db(0x0a); db(0x20); db(0x6b); - db(0x01); db(0x98); db(0x41); db(0xe8); db(0x00); db(0x12); db(0x4e); db(0xae); - db(0xff); db(0x10); db(0x4c); db(0xdf); db(0x4f); db(0x03); db(0x4e); db(0x75); - db(0x48); db(0xe7); db(0x7f); db(0x7e); db(0x2c); db(0x78); db(0x00); db(0x04); - db(0x24); db(0x48); db(0x0c); db(0x9a); db(0x00); db(0x00); db(0x03); db(0xf3); - db(0x66); db(0x00); db(0x00); db(0xec); db(0x50); db(0x8a); db(0x2e); db(0x2a); - db(0x00); db(0x04); db(0x9e); db(0x92); db(0x50); db(0x8a); db(0x52); db(0x87); - db(0x26); db(0x4a); db(0x20); db(0x07); db(0xd0); db(0x80); db(0xd0); db(0x80); - db(0xd7); db(0xc0); db(0x28); db(0x4a); db(0x9b); db(0xcd); db(0x7c); db(0x00); - db(0x24); db(0x12); db(0xe5); db(0x8a); db(0x72); db(0x01); db(0x08); db(0x03); - db(0x00); db(0x1e); db(0x67); db(0x04); db(0x08); db(0xc1); db(0x00); db(0x01); - db(0x08); db(0xc1); db(0x00); db(0x10); db(0x08); db(0x83); db(0x00); db(0x1f); - db(0x08); db(0x83); db(0x00); db(0x1e); db(0x20); db(0x02); db(0x66); db(0x04); - db(0x42); db(0x9a); db(0x60); db(0x1e); db(0x50); db(0x80); db(0x4e); db(0xae); - db(0xff); db(0x3a); db(0x4a); db(0x80); db(0x67); db(0x00); db(0x00); db(0xa0); - db(0x20); db(0x40); db(0x20); db(0xc2); db(0x24); db(0xc8); db(0x22); db(0x0d); - db(0x67); db(0x06); db(0x20); db(0x08); db(0xe4); db(0x88); db(0x2a); db(0x80); - db(0x2a); db(0x48); db(0x52); db(0x86); db(0xbe); db(0x86); db(0x66); db(0xb8); - db(0x7c); db(0x00); db(0x22); db(0x06); db(0xd2); db(0x81); db(0xd2); db(0x81); - db(0x20); db(0x74); db(0x18); db(0x00); db(0x58); db(0x88); db(0x26); db(0x1b); - db(0x28); db(0x1b); db(0xe5); db(0x8c); db(0x0c); db(0x83); db(0x00); db(0x00); - db(0x03); db(0xe9); db(0x67); db(0x08); db(0x0c); db(0x83); db(0x00); db(0x00); - db(0x03); db(0xea); db(0x66); db(0x0c); db(0x20); db(0x04); db(0x4a); db(0x80); - db(0x67); db(0x0e); db(0x10); db(0xdb); db(0x53); db(0x80); db(0x60); db(0xf6); - db(0x0c); db(0x83); db(0x00); db(0x00); db(0x03); db(0xeb); db(0x66); db(0x4e); - db(0x26); db(0x1b); db(0x0c); db(0x83); db(0x00); db(0x00); db(0x03); db(0xec); - db(0x66); db(0x28); db(0x22); db(0x06); db(0xd2); db(0x81); db(0xd2); db(0x81); - db(0x20); db(0x74); db(0x18); db(0x00); db(0x58); db(0x88); db(0x20); db(0x1b); - db(0x67); db(0xe6); db(0x22); db(0x1b); db(0xd2); db(0x81); db(0xd2); db(0x81); - db(0x26); db(0x34); db(0x18); db(0x00); db(0x58); db(0x83); db(0x24); db(0x1b); - db(0xd7); db(0xb0); db(0x28); db(0x00); db(0x53); db(0x80); db(0x66); db(0xf6); - db(0x60); db(0xe4); db(0x0c); db(0x83); db(0x00); db(0x00); db(0x03); db(0xf2); - db(0x66); db(0x14); db(0x52); db(0x86); db(0xbe); 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db(0x08); db(0xe4); db(0x8b); + db(0x28); db(0x3c); db(0x00); db(0x00); db(0x1f); db(0x40); db(0x4e); db(0xae); + db(0xff); db(0x76); db(0x22); db(0x4e); db(0x2c); db(0x78); db(0x00); db(0x04); + db(0x4e); db(0xae); db(0xfe); db(0x62); db(0x60); db(0xbc); db(0x00); db(0x00); + db(0x00); db(0x00); db(0x00); db(0x10); db(0x00); db(0x00); db(0x00); db(0x00); + db(0x72); db(0x02); db(0x30); db(0x3c); db(0xff); db(0x48); db(0x61); db(0x00); + db(0x0a); db(0x42); db(0x4e); db(0x90); db(0x22); db(0x00); db(0x6b); db(0x04); + db(0x61); db(0x00); db(0x07); db(0x90); db(0x70); db(0x00); db(0x4e); db(0x75); + db(0x48); db(0xe7); db(0x00); db(0x20); db(0x30); db(0x3c); db(0xff); db(0x50); + db(0x61); db(0x00); db(0x0a); db(0x28); db(0x70); db(0x00); db(0x4e); db(0x90); + db(0x4a); db(0x80); db(0x67); db(0x00); db(0x00); db(0xa2); db(0x2c); db(0x78); + db(0x00); db(0x04); db(0x30); db(0x3c); db(0xff); db(0x50); db(0x61); db(0x00); + db(0x0a); db(0x12); db(0x70); db(0x02); db(0x4e); db(0x90); db(0x0c); db(0x40); + db(0x00); db(0x01); db(0x6d); db(0x00); db(0x00); db(0x7c); db(0x6e); db(0x06); + db(0x4e); db(0xae); db(0xfe); db(0x92); db(0x60); db(0xe4); db(0x0c); db(0x40); + db(0x00); db(0x02); db(0x6e); db(0x08); db(0x20); db(0x01); db(0x4e); db(0xae); + db(0xfe); db(0xbc); db(0x60); db(0xd6); db(0x0c); db(0x40); db(0x00); db(0x03); + db(0x6e); db(0x06); db(0x4e); db(0xae); db(0xfe); db(0x86); db(0x60); db(0xca); + db(0x0c); db(0x40); db(0x00); db(0x04); db(0x6e); db(0x06); db(0x4e); db(0xae); + db(0xff); db(0x4c); db(0x60); db(0xbe); db(0x0c); db(0x40); db(0x00); db(0x05); + db(0x6e); db(0x46); db(0x48); db(0xe7); db(0x00); db(0xc0); db(0x70); db(0x26); + db(0x22); db(0x3c); db(0x00); db(0x01); db(0x00); db(0x01); db(0x4e); db(0xae); + db(0xff); db(0x3a); db(0x4c); db(0xdf); db(0x03); db(0x00); db(0x24); db(0x40); + db(0x15); db(0x7c); db(0x00); db(0x08); db(0x00); db(0x08); db(0x25); db(0x48); + db(0x00); db(0x0e); db(0x35); db(0x7c); db(0x00); db(0x26); db(0x00); db(0x12); + db(0x25); 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db(0x06); + db(0x20); db(0x08); db(0xe4); db(0x88); db(0x2a); db(0x80); db(0x2a); db(0x48); + db(0x52); db(0x86); db(0xbe); db(0x86); db(0x66); db(0xc0); db(0x7c); db(0x00); + db(0x22); db(0x06); db(0xd2); db(0x81); db(0xd2); db(0x81); db(0x20); db(0x74); + db(0x18); db(0x00); db(0x58); db(0x88); db(0x26); db(0x1b); db(0x28); db(0x1b); + db(0xe5); db(0x8c); db(0x0c); db(0x83); db(0x00); db(0x00); db(0x03); db(0xe9); + db(0x67); db(0x08); db(0x0c); db(0x83); db(0x00); db(0x00); db(0x03); db(0xea); + db(0x66); db(0x0c); db(0x20); db(0x04); db(0x4a); db(0x80); db(0x67); db(0x0e); + db(0x10); db(0xdb); db(0x53); db(0x80); db(0x60); db(0xf6); db(0x0c); db(0x83); + db(0x00); db(0x00); db(0x03); db(0xeb); db(0x66); db(0x4e); db(0x26); db(0x1b); + db(0x0c); db(0x83); db(0x00); db(0x00); db(0x03); db(0xec); db(0x66); db(0x28); + db(0x22); db(0x06); db(0xd2); db(0x81); db(0xd2); db(0x81); db(0x20); db(0x74); + db(0x18); db(0x00); db(0x58); db(0x88); db(0x20); db(0x1b); db(0x67); db(0xe6); + db(0x22); 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db(0xe2); db(0x70); db(0x20); db(0x22); db(0x3c); + db(0x00); db(0x01); db(0x00); db(0x01); db(0x4e); db(0xae); db(0xff); db(0x3a); + db(0x24); db(0x40); db(0x15); db(0x7c); db(0x00); db(0x08); db(0x00); db(0x08); + db(0x41); db(0xfa); db(0x0b); db(0x78); db(0x25); db(0x48); db(0x00); db(0x0a); + db(0x41); db(0xfa); db(0x0b); db(0x05); db(0x25); db(0x48); db(0x00); db(0x0e); + db(0x41); db(0xea); db(0x00); db(0x12); db(0x20); db(0x88); db(0x58); db(0x90); + db(0x21); db(0x48); db(0x00); db(0x08); db(0x41); db(0xee); db(0x01); db(0x50); + db(0x22); db(0x4a); db(0x4e); db(0xae); db(0xff); db(0x0a); db(0x20); db(0x4a); + db(0x20); db(0x08); db(0x4c); db(0xdf); db(0x47); db(0x02); db(0x4e); db(0x75); + db(0x48); db(0xe7); db(0x01); db(0x02); db(0x2e); db(0x00); db(0x4a); db(0x2b); + db(0x00); db(0x4c); db(0x67); db(0x7c); db(0x2c); db(0x6b); db(0x00); db(0xa0); + db(0x0c); db(0x6e); db(0x00); db(0x25); db(0x00); db(0x14); db(0x65); db(0x3e); + db(0x72); db(0x0e); db(0x4e); db(0xae); db(0xfd); db(0x66); db(0x02); db(0x80); + db(0xff); db(0xff); db(0xff); db(0xfe); db(0x67); db(0x62); db(0x08); db(0x07); + db(0x00); db(0x00); db(0x67); db(0x0a); db(0x41); db(0xeb); db(0x00); db(0x20); + db(0x22); db(0x08); db(0x4e); db(0xae); db(0xfd); db(0x5a); db(0x08); db(0x07); + db(0x00); db(0x01); db(0x67); db(0x12); db(0x4a); db(0x2b); db(0x00); db(0x9e); + db(0x66); db(0x0c); db(0x50); db(0xeb); db(0x00); db(0x9e); db(0x22); db(0x2b); + db(0x00); db(0xb4); db(0x4e); db(0xae); db(0xfd); db(0x5a); db(0x72); db(0x0e); + db(0x4e); db(0xae); db(0xfd); db(0x6c); db(0x60); db(0x32); db(0x2c); db(0x78); + db(0x00); db(0x04); db(0x4e); db(0xae); db(0xff); db(0x7c); db(0x08); db(0x07); + db(0x00); db(0x00); db(0x67); db(0x08); db(0x41); db(0xeb); db(0x00); db(0x20); + db(0x61); db(0x00); db(0x00); db(0xac); db(0x08); db(0x07); db(0x00); db(0x01); + db(0x67); db(0x12); db(0x4a); db(0x2b); db(0x00); db(0x9e); db(0x66); db(0x0c); + db(0x50); db(0xeb); db(0x00); db(0x9e); db(0x20); db(0x6b); db(0x00); db(0xb4); + db(0x61); db(0x00); db(0x00); db(0x94); db(0x4e); db(0xae); db(0xff); db(0x76); + db(0x4c); db(0xdf); db(0x40); db(0x80); db(0x4e); db(0x75); db(0x48); db(0xe7); + db(0x01); db(0x22); db(0x2e); db(0x00); db(0x2c); db(0x6b); db(0x00); db(0xa0); + db(0x0c); db(0x6e); db(0x00); db(0x25); db(0x00); db(0x14); db(0x65); db(0x3e); + db(0x72); db(0x0e); db(0x4e); db(0xae); db(0xfd); db(0x66); db(0x02); db(0x80); + db(0xff); db(0xff); db(0xff); db(0xfe); db(0x67); db(0x62); db(0x08); db(0x07); + db(0x00); db(0x00); db(0x67); db(0x0a); db(0x41); db(0xeb); db(0x00); db(0x20); + db(0x22); db(0x08); db(0x4e); db(0xae); db(0xfd); db(0x60); db(0x08); db(0x07); + db(0x00); db(0x01); db(0x67); db(0x12); db(0x4a); db(0x2b); db(0x00); db(0x9e); + db(0x67); db(0x0c); db(0x42); db(0x2b); db(0x00); db(0x9e); db(0x22); db(0x2b); + db(0x00); db(0xb4); db(0x4e); db(0xae); db(0xfd); db(0x60); db(0x72); db(0x0e); + db(0x4e); db(0xae); db(0xfd); db(0x6c); db(0x60); db(0x32); db(0x2c); db(0x78); + db(0x00); db(0x04); db(0x4e); db(0xae); db(0xff); db(0x7c); db(0x08); db(0x07); + db(0x00); db(0x00); db(0x67); db(0x08); db(0x41); db(0xeb); db(0x00); db(0x20); + db(0x61); db(0x00); db(0x00); db(0x44); db(0x08); db(0x07); db(0x00); db(0x01); + db(0x67); db(0x12); db(0x4a); db(0x2b); db(0x00); db(0x9e); db(0x67); db(0x0c); + db(0x42); db(0x2b); db(0x00); db(0x9e); db(0x20); db(0x6b); db(0x00); db(0xb4); + db(0x61); db(0x00); db(0x00); db(0x2c); db(0x4e); db(0xae); db(0xff); db(0x76); + db(0x4c); db(0xdf); db(0x44); db(0x80); db(0x4e); db(0x75); db(0x22); db(0x48); + db(0x20); db(0x6b); db(0x00); db(0xa0); db(0x20); db(0x68); db(0x00); db(0x22); + db(0x20); db(0x68); db(0x00); db(0x18); db(0xd1); db(0xc8); db(0xd1); db(0xc8); + db(0x22); db(0xa8); db(0x00); db(0x04); db(0x20); db(0x09); db(0xe4); db(0x88); + db(0x21); db(0x40); db(0x00); db(0x04); db(0x4e); db(0x75); db(0x24); db(0x48); + db(0x20); db(0x6b); db(0x00); db(0xa0); db(0x20); db(0x68); db(0x00); db(0x22); + db(0x20); db(0x68); db(0x00); db(0x18); db(0xd1); db(0xc8); db(0xd1); db(0xc8); + db(0x22); db(0x68); db(0x00); db(0x04); db(0xd3); db(0xc9); db(0xd3); db(0xc9); + db(0xb3); db(0xca); db(0x66); db(0x06); db(0x21); db(0x52); db(0x00); db(0x04); + db(0x60); db(0x18); db(0x20); db(0x09); db(0x67); db(0x0e); db(0x20); db(0x11); + db(0xd0); db(0x80); db(0xd0); db(0x80); db(0xb5); db(0xc0); db(0x67); db(0x04); + db(0x22); db(0x40); db(0x60); db(0xee); db(0x20); db(0x09); db(0x67); db(0x02); + db(0x22); db(0x92); db(0x4e); db(0x75); db(0x48); db(0xe7); db(0x20); db(0x22); + db(0x74); db(0x16); db(0x9f); db(0xc2); db(0x24); db(0x4f); db(0x32); db(0x02); + db(0x42); db(0x32); db(0x10); db(0xff); db(0x53); db(0x41); db(0x66); db(0xf8); + db(0x2c); db(0x78); db(0x00); db(0x04); db(0x72); db(0x0f); db(0x4a); db(0x80); + db(0x67); db(0x02); db(0x72); db(0x10); db(0x15); db(0x41); db(0x00); db(0x04); + db(0x35); db(0x7c); db(0x08); db(0x00); db(0x00); db(0x08); db(0x22); db(0x6b); + db(0x00); db(0xa4); db(0x33); db(0x7c); db(0x00); db(0x0b); db(0x00); db(0x1c); + db(0x23); db(0x7c); db(0x00); db(0x00); db(0x00); db(0x16); db(0x00); db(0x24); + db(0x23); db(0x4a); db(0x00); db(0x28); db(0x13); db(0x7c); db(0x00); db(0x01); + db(0x00); db(0x1e); db(0x22); db(0x6b); db(0x00); db(0xa8); db(0x33); db(0x7c); + db(0x00); db(0x0a); db(0x00); db(0x1c); db(0x13); db(0x7c); db(0x00); db(0x01); + db(0x00); db(0x1e); db(0x4e); db(0xae); db(0xfe); db(0x38); db(0x22); db(0x6b); + db(0x00); db(0xa8); db(0x25); db(0x69); db(0x00); db(0x20); db(0x00); db(0x0e); + db(0x25); db(0x69); db(0x00); db(0x24); db(0x00); db(0x12); db(0x22); db(0x6b); + db(0x00); db(0xa4); db(0x4e); db(0xae); db(0xfe); db(0x38); db(0xdf); db(0xc2); + db(0x4c); db(0xdf); db(0x44); db(0x04); db(0x4e); db(0x75); db(0x4a); db(0x00); + db(0x67); db(0x26); db(0x4a); db(0x2b); db(0x00); db(0x4c); db(0x66); db(0x36); + db(0x70); db(0x00); db(0x4a); db(0x33); db(0x00); db(0x4d); db(0x67); db(0x04); + db(0x52); db(0x00); db(0x60); db(0xf6); db(0x17); db(0x40); db(0x00); db(0x4c); + db(0x67); db(0x24); db(0x20); db(0x01); db(0x61); db(0x00); db(0xfd); db(0xf2); + db(0x70); db(0x01); db(0x61); db(0x00); db(0xff); db(0x60); db(0x60); db(0x16); + db(0x4a); db(0x2b); db(0x00); db(0x4c); db(0x67); db(0x10); db(0x42); db(0x2b); + db(0x00); db(0x4c); db(0x20); db(0x01); db(0x61); db(0x00); db(0xfe); db(0x68); + db(0x70); db(0x00); db(0x61); db(0x00); db(0xff); db(0x48); db(0x4e); db(0x75); + db(0x4a); db(0xac); db(0x00); db(0x14); db(0x67); db(0x0a); db(0x70); db(0x00); + db(0x72); db(0x01); db(0x61); db(0x00); db(0xff); db(0xb2); db(0x4e); db(0x75); + db(0x70); db(0x01); db(0x72); db(0x03); db(0x61); db(0x00); db(0xff); db(0xa8); + db(0x4e); db(0x75); db(0x10); db(0x2b); db(0x00); db(0xac); db(0x6b); db(0x0a); + db(0x70); db(0x01); db(0x72); db(0x03); db(0x61); db(0x00); db(0xff); db(0x98); + db(0x4e); db(0x75); db(0x72); db(0x01); db(0x0c); db(0x00); db(0x00); db(0xfe); + db(0x66); db(0x02); db(0x72); db(0x03); db(0x70); db(0x00); db(0x61); db(0x00); + db(0xff); db(0x86); db(0x4e); db(0x75); db(0x20); db(0x6c); db(0x00); db(0x24); + db(0x4a); db(0x90); db(0x67); db(0x0c); db(0x4a); db(0xa8); db(0x00); db(0x08); + db(0x66); db(0x0a); db(0x4a); db(0xa8); db(0x00); db(0x0c); db(0x66); db(0x04); + db(0x70); db(0x01); db(0x4e); db(0x75); db(0x48); db(0xe7); db(0x3f); db(0x3e); + db(0x2a); db(0x48); db(0x24); db(0x6c); db(0x00); db(0x18); db(0x2e); db(0x15); + db(0x7a); db(0x00); db(0x4a); db(0x87); db(0x67); db(0x70); db(0x20); db(0x0a); + db(0x67); db(0x6c); db(0x7c); db(0x00); db(0x22); db(0x2d); db(0x00); db(0x08); + db(0x67); db(0x12); db(0x24); db(0x2a); db(0x00); db(0x04); db(0x2c); db(0x6b); + db(0x00); db(0xa0); db(0x4e); db(0xae); db(0xfc); db(0x34); db(0x4a); db(0x80); + db(0x66); db(0x02); db(0x50); db(0xc6); db(0x22); db(0x2d); db(0x00); db(0x0c); + db(0x67); db(0x1c); db(0x20); db(0x41); db(0x22); db(0x4a); db(0x2f); db(0x0a); + db(0x45); db(0xec); db(0x00); db(0x20); db(0x48); db(0x7a); db(0x00); db(0x08); + db(0x2f); db(0x28); db(0x00); db(0x08); db(0x4e); db(0x75); db(0x24); db(0x5f); + db(0x4a); db(0x80); db(0x66); db(0x02); db(0x50); db(0xc6); db(0x4a); db(0x06); + db(0x67); db(0x24); db(0x20); db(0x2a); db(0x00); db(0x04); db(0x90); db(0x8a); + db(0x4a); db(0x92); db(0x66); db(0x0a); db(0x20); db(0x05); db(0x67); db(0x10); + db(0x20); db(0x40); db(0x42); db(0x90); db(0x60); db(0x0a); db(0x20); db(0x52); + db(0x22); db(0x4a); db(0x22); db(0xd8); db(0x59); db(0x80); db(0x6a); db(0xfa); + db(0x53); db(0x95); db(0x53); db(0x87); db(0x60); db(0x94); db(0x2a); db(0x0a); + db(0x24); db(0x52); db(0x53); db(0x87); db(0x60); db(0x8c); db(0x4c); db(0xdf); + db(0x7c); db(0xfc); db(0x20); db(0x6c); db(0x00); db(0x24); db(0x4a); db(0x90); + db(0x4e); db(0x75); db(0x61); db(0x00); db(0xfc); db(0x7c); db(0x21); db(0x40); db(0x01); db(0x98); db(0x2f); db(0x08); db(0x30); db(0x3c); db(0xff); db(0xfc); - db(0x61); db(0x00); db(0x02); db(0xe6); db(0x2a); db(0x50); db(0x30); db(0x3c); - db(0xff); db(0x28); db(0x61); db(0x00); db(0x02); db(0xdc); db(0x22); db(0x48); + db(0x61); db(0x00); db(0x04); db(0x58); db(0x2a); db(0x50); db(0x30); db(0x3c); + db(0xff); db(0x28); db(0x61); db(0x00); db(0x04); db(0x4e); db(0x22); db(0x48); db(0x20); db(0x5f); db(0x42); db(0xa8); db(0x01); db(0x90); db(0x42); db(0xa8); - db(0x01); db(0x94); db(0x4e); db(0x91); db(0x26); db(0x00); db(0x0c); db(0x83); - db(0xff); db(0xff); db(0xff); db(0xfe); db(0x67); db(0x00); db(0xfc); db(0xec); - db(0x0c); db(0x83); db(0x00); db(0x00); db(0x00); db(0x02); db(0x67); db(0x0c); - db(0xc0); db(0x85); db(0x67); db(0x08); db(0x4a); db(0xa8); db(0x01); db(0x90); - db(0x67); db(0x00); db(0xfc); db(0xd8); db(0x20); db(0x28); db(0x01); db(0x90); - db(0x67); db(0x12); db(0x2f); db(0x08); db(0x72); db(0x01); db(0x2c); db(0x78); + db(0x01); db(0x94); db(0x4e); db(0x91); db(0x26); db(0x00); db(0x0c); db(0x43); + db(0xff); db(0xfe); db(0x67); db(0x00); db(0xf9); db(0x9c); db(0x0c); db(0x43); + db(0x00); db(0x01); db(0x66); db(0x0e); db(0x08); db(0x07); db(0x00); db(0x02); + db(0x66); db(0x08); db(0x08); db(0x07); db(0x00); db(0x01); db(0x66); db(0x00); + db(0x00); db(0x02); db(0x20); db(0x28); db(0x01); db(0x90); db(0x67); db(0x14); + db(0x6b); db(0x12); db(0x2f); db(0x08); db(0x72); db(0x01); db(0x2c); db(0x78); db(0x00); db(0x04); db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x20); db(0x5f); - db(0x21); db(0x40); db(0x01); db(0x94); db(0x4a); db(0x83); db(0x6a); db(0x10); + db(0x21); db(0x40); db(0x01); db(0x94); db(0x4a); db(0x83); db(0x6a); db(0x0e); db(0x22); db(0x48); db(0x30); db(0x3c); db(0xff); db(0x20); db(0x61); db(0x00); - db(0x02); db(0x88); db(0x4e); db(0x90); db(0x60); db(0x00); db(0x00); db(0x28); - db(0x2c); db(0x4c); db(0x2f); db(0x08); db(0x4e); db(0xae); db(0xff); db(0x70); - db(0x20); db(0x5f); db(0x22); db(0x48); db(0x26); db(0x40); db(0x30); db(0x3c); - db(0xff); db(0x20); db(0x61); db(0x00); db(0x02); db(0x6c); db(0x4e); db(0x90); - db(0x70); db(0x00); db(0x27); db(0x40); db(0x00); db(0x08); db(0x27); db(0x40); - db(0x00); db(0x10); db(0x27); db(0x40); db(0x00); db(0x20); db(0x4a); db(0xa9); - db(0x01); db(0x94); db(0x67); db(0x28); db(0x20); db(0x69); db(0x01); db(0x94); - db(0x61); db(0x00); db(0xfd); db(0xc6); db(0x48); db(0xe7); db(0x80); db(0xc0); - db(0x20); db(0x29); db(0x01); db(0x90); db(0x22); db(0x69); db(0x01); db(0x94); - db(0x2c); db(0x78); db(0x00); db(0x04); db(0x4e); db(0xae); db(0xff); db(0x2e); - db(0x4c); db(0xdf); db(0x03); db(0x01); db(0x4a); db(0x80); db(0x67); db(0x04); - db(0x61); db(0x00); db(0xfd); db(0x50); db(0x4a); db(0x83); db(0x6b); db(0x00); - db(0xfc); db(0x52); db(0x30); db(0x3c); db(0xff); db(0x18); db(0x61); db(0x00); - db(0x02); db(0x20); db(0x4e); db(0x90); db(0x20); db(0x03); db(0x16); db(0x29); - db(0x00); db(0x4f); db(0x4a); db(0x80); db(0x66); db(0x1a); db(0x27); db(0x7c); - db(0x00); db(0x00); db(0x0f); db(0xa0); db(0x00); db(0x14); db(0x43); db(0xfa); - db(0xfb); db(0x5c); db(0x20); db(0x09); db(0xe4); db(0x88); db(0x27); db(0x40); - db(0x00); db(0x20); db(0x70); db(0xff); db(0x27); db(0x40); db(0x00); db(0x24); - db(0x4a); db(0x87); db(0x67); db(0x36); db(0x2c); db(0x78); db(0x00); db(0x04); + db(0x03); db(0xfa); db(0x4e); db(0x90); db(0x60); db(0x26); db(0x2c); db(0x4c); + db(0x2f); db(0x08); db(0x4e); db(0xae); db(0xff); db(0x70); db(0x20); db(0x5f); + db(0x22); db(0x48); db(0x26); db(0x40); db(0x30); db(0x3c); db(0xff); db(0x20); + db(0x61); db(0x00); db(0x03); db(0xe0); db(0x4e); db(0x90); db(0x70); db(0x00); + db(0x27); db(0x40); db(0x00); db(0x08); db(0x27); db(0x40); db(0x00); db(0x10); + db(0x27); db(0x40); db(0x00); db(0x20); db(0x4a); db(0xa9); db(0x01); db(0x94); + db(0x67); db(0x28); db(0x20); db(0x69); db(0x01); db(0x94); db(0x61); db(0x00); + db(0xfa); db(0xde); db(0x48); db(0xe7); db(0x80); db(0xc0); db(0x20); db(0x29); + db(0x01); db(0x90); db(0x22); db(0x69); db(0x01); db(0x94); db(0x2c); db(0x78); + db(0x00); db(0x04); db(0x4e); db(0xae); db(0xff); db(0x2e); db(0x4c); db(0xdf); + db(0x03); db(0x01); db(0x4a); db(0x80); db(0x67); db(0x04); db(0x61); db(0x00); + db(0xfa); db(0x68); db(0x4a); db(0x83); db(0x6b); db(0x00); db(0xf9); db(0x02); + db(0x30); db(0x3c); db(0xff); db(0x18); db(0x61); db(0x00); db(0x03); db(0x94); + db(0x4e); db(0x90); db(0x20); db(0x03); db(0x16); db(0x29); db(0x00); db(0x4f); + db(0x4a); db(0x80); db(0x66); db(0x1a); db(0x27); db(0x7c); db(0x00); db(0x00); + db(0x17); db(0x70); db(0x00); db(0x14); db(0x41); db(0xfa); db(0xf7); db(0xce); + db(0x20); db(0x08); db(0xe4); db(0x88); db(0x27); db(0x40); db(0x00); db(0x20); + db(0x70); db(0xff); db(0x27); db(0x40); db(0x00); db(0x24); db(0x08); db(0x07); + db(0x00); db(0x00); db(0x67); db(0x3a); db(0x2c); db(0x78); db(0x00); db(0x04); db(0x70); db(0x14); db(0x72); db(0x00); db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x22); db(0x40); db(0x70); db(0x00); db(0x22); db(0x80); db(0x23); db(0x40); db(0x00); db(0x04); db(0x33); db(0x40); db(0x00); db(0x0e); db(0x30); db(0x3c); db(0x10); db(0x00); db(0x80); db(0x03); db(0x33); db(0x40); db(0x00); db(0x08); db(0x23); db(0x6d); db(0x01); db(0x04); db(0x00); db(0x0a); db(0x23); db(0x4b); - db(0x00); db(0x10); db(0x41); db(0xec); db(0x00); db(0x4a); db(0x4e); db(0xee); - db(0xfe); db(0xf2); db(0x20); db(0x4b); db(0x72); db(0x00); db(0x22); db(0x41); - db(0x70); db(0xff); db(0x2c); db(0x4c); db(0x4e); db(0xee); db(0xff); db(0x6a); - db(0x2c); db(0x78); db(0x00); db(0x04); db(0x70); db(0x00); db(0x22); db(0x40); + db(0x00); db(0x10); db(0x41); db(0xec); db(0x00); db(0x4a); db(0x4e); db(0xae); + db(0xfe); db(0xf2); db(0x70); db(0x00); db(0x4e); db(0x75); db(0x24); db(0x49); + db(0x20); db(0x4b); db(0x72); db(0x00); db(0x22); db(0x41); db(0x08); db(0x07); + db(0x00); db(0x01); db(0x67); db(0x08); db(0x08); db(0x07); db(0x00); db(0x02); + db(0x67); db(0x02); db(0x72); db(0x01); db(0x70); db(0xec); db(0x2c); db(0x4c); + db(0x4e); db(0xae); db(0xff); db(0x6a); db(0x08); db(0x07); db(0x00); db(0x01); + db(0x67); db(0x5c); db(0x08); db(0x07); db(0x00); db(0x02); db(0x66); db(0x56); + db(0x20); db(0x52); db(0x74); db(0x02); db(0x52); db(0x82); db(0x4a); db(0x30); + db(0x28); db(0xfd); db(0x66); db(0xf8); db(0x2c); db(0x78); db(0x00); db(0x04); + db(0x20); db(0x02); db(0x72); db(0x01); db(0x4e); db(0xae); db(0xff); db(0x3a); + db(0x4a); db(0x80); db(0x67); db(0x3a); db(0x20); db(0x52); db(0x24); db(0x40); + db(0x22); db(0x4a); db(0x12); db(0xd8); db(0x66); db(0xfc); db(0x13); db(0x7c); + db(0x00); db(0x3a); db(0xff); db(0xff); db(0x42); db(0x11); db(0x2c); db(0x78); + db(0x00); db(0x04); db(0x43); db(0xfa); db(0x06); db(0x6e); db(0x70); db(0x00); + db(0x4e); db(0xae); db(0xfd); db(0xd8); db(0x2c); db(0x40); db(0x22); db(0x0a); + db(0x4e); db(0xae); db(0xff); db(0x52); db(0x22); db(0x4e); db(0x2c); db(0x78); + db(0x00); db(0x04); db(0x4e); db(0xae); db(0xfe); db(0x62); db(0x22); db(0x4a); + db(0x20); db(0x02); db(0x4e); db(0xae); db(0xff); db(0x2e); db(0x70); db(0x00); + db(0x4e); db(0x75); db(0x48); db(0xe7); db(0x3f); db(0x3e); db(0x2c); db(0x01); + db(0x7e); db(0x06); db(0x2c); db(0x78); db(0x00); db(0x04); db(0x43); db(0xfa); + db(0x06); db(0x58); db(0x70); db(0x24); db(0x4e); db(0xae); db(0xfd); db(0xd8); + db(0x4a); db(0x80); db(0x66); db(0x0e); db(0x08); db(0x87); db(0x00); db(0x02); + db(0x43); db(0xfa); db(0x06); db(0x46); db(0x70); db(0x00); db(0x4e); db(0xae); + db(0xfd); db(0xd8); db(0x28); db(0x40); db(0x20); db(0x3c); db(0x00); db(0x00); + db(0x02); db(0x2c); db(0x22); db(0x3c); db(0x00); db(0x01); db(0x00); db(0x01); + db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x20); db(0x40); db(0x4a); db(0x80); + db(0x67); db(0x2c); db(0x21); db(0x4c); db(0x01); db(0x9c); db(0x48); db(0xe7); + db(0x00); db(0x8a); db(0x61); db(0x00); db(0xfd); db(0xf6); db(0x4c); db(0xdf); + db(0x51); db(0x00); db(0x0c); db(0x80); db(0xff); db(0xff); db(0xff); db(0xfe); + db(0x67); db(0x08); db(0x48); db(0x46); db(0x52); db(0x46); db(0x48); db(0x46); + db(0x60); db(0xe4); db(0x22); db(0x48); db(0x20); db(0x3c); db(0x00); db(0x00); + db(0x02); db(0x2c); db(0x4e); db(0xae); db(0xff); db(0x2e); db(0x22); db(0x4c); + db(0x4e); db(0xae); db(0xfe); db(0x62); db(0x4c); db(0xdf); db(0x7c); db(0xfc); + db(0x4e); db(0x75); db(0x2c); db(0x78); db(0x00); db(0x04); db(0x93); db(0xc9); db(0x4e); db(0xae); db(0xfe); db(0xda); db(0x20); db(0x40); db(0x4b); db(0xe8); - db(0x00); db(0x5c); db(0x43); db(0xfa); db(0x04); db(0xbe); db(0x70); db(0x00); + db(0x00); db(0x5c); db(0x43); db(0xfa); db(0x05); db(0xbe); db(0x70); db(0x00); db(0x4e); db(0xae); db(0xfd); db(0xd8); db(0x24); db(0x40); db(0x20); db(0x3c); - db(0x00); db(0x00); db(0x00); db(0x9e); db(0x22); db(0x3c); db(0x00); db(0x01); + db(0x00); db(0x00); db(0x00); db(0xb9); db(0x22); db(0x3c); db(0x00); db(0x01); db(0x00); db(0x01); db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x26); db(0x40); db(0x7c); db(0x00); db(0x26); db(0x86); db(0x27); db(0x46); db(0x00); db(0x04); - db(0x27); db(0x46); db(0x00); db(0x08); db(0x7a); db(0x00); db(0x20); db(0x4d); - db(0x4e); db(0xae); db(0xfe); db(0x80); db(0x20); db(0x4d); db(0x4e); db(0xae); - db(0xfe); db(0x8c); db(0x28); db(0x40); db(0x26); db(0x2c); db(0x00); db(0x0a); - db(0x30); db(0x3c); db(0xff); db(0x40); db(0x61); db(0x00); db(0x01); db(0x5a); - db(0x70); db(0x00); db(0x4e); db(0x90); db(0x61); db(0x00); db(0x02); db(0x8a); - db(0x60); db(0x00); db(0x00); db(0xda); db(0x61); db(0x00); db(0x02); db(0x82); + db(0x27); db(0x46); db(0x00); db(0x08); db(0x27); db(0x4a); db(0x00); db(0xa0); + db(0x50); db(0xeb); db(0x00); db(0x9e); db(0x93); db(0xc9); db(0x4e); db(0xae); + db(0xfe); db(0xda); db(0x27); db(0x40); db(0x00); db(0xb0); db(0x61); db(0x00); + db(0x02); db(0xc2); db(0x27); db(0x40); db(0x00); db(0xa4); db(0x61); db(0x00); + db(0x02); db(0xee); db(0x27); db(0x40); db(0x00); db(0xa8); db(0x7a); db(0x00); db(0x20); db(0x4d); db(0x4e); db(0xae); db(0xfe); db(0x80); db(0x20); db(0x4d); - db(0x4e); db(0xae); db(0xfe); db(0x8c); db(0x28); db(0x40); db(0x0c); db(0x6c); - db(0x00); db(0x26); db(0x00); db(0x12); db(0x66); db(0x4a); db(0x0c); db(0xac); - db(0x40); db(0x00); db(0x00); db(0x00); db(0x00); db(0x14); db(0x66); db(0x40); - db(0x0c); db(0x6c); db(0x12); db(0x34); db(0x00); db(0x18); db(0x66); db(0x38); - db(0x20); db(0x6c); db(0x00); db(0x1a); db(0x20); db(0x28); db(0x00); db(0x0c); - db(0x02); db(0x80); db(0x80); db(0x00); db(0x00); db(0x08); db(0x0c); db(0x80); - db(0x80); db(0x00); db(0x00); db(0x08); db(0x66); db(0x18); db(0x02); db(0xa8); - db(0x7f); db(0xff); db(0xff); db(0xff); db(0x00); db(0x0c); db(0x20); db(0x68); - db(0x00); db(0x10); db(0x22); db(0x4c); db(0x12); db(0xbc); db(0x00); db(0x08); - db(0x4e); db(0xae); db(0xfe); db(0x92); db(0x60); db(0xa6); db(0x22); db(0x4c); - db(0x70); db(0x26); db(0x4e); db(0xae); db(0xff); db(0x2e); db(0x60); db(0x9c); + db(0x4e); db(0xae); db(0xfe); db(0x8c); db(0x28); db(0x40); db(0x26); db(0x2c); + db(0x00); db(0x0a); db(0x30); db(0x3c); db(0xff); db(0x40); db(0x61); db(0x00); + db(0x01); db(0xba); db(0x70); db(0x00); db(0x4e); db(0x90); db(0x24); db(0x00); + db(0x70); db(0x01); db(0x61); db(0x00); db(0xfa); db(0x34); db(0x08); db(0x02); + db(0x00); db(0x01); db(0x67); db(0x06); db(0x70); db(0x01); db(0x61); db(0x00); + db(0xfb); db(0x9c); db(0x61); db(0x00); db(0x03); db(0x4a); db(0x60); db(0x00); + db(0x00); db(0xfc); db(0x61); db(0x00); db(0x03); db(0x42); db(0x20); db(0x4d); + db(0x4e); db(0xae); db(0xfe); db(0x8c); db(0x28); db(0x40); db(0x4a); db(0x80); + db(0x66); db(0x10); db(0x70); db(0x00); db(0x12); db(0x2d); db(0x00); db(0x0f); + db(0x03); db(0xc0); db(0x08); db(0xc0); db(0x00); db(0x11); db(0x4e); db(0xae); + db(0xfe); db(0xc2); db(0x4a); db(0x2b); db(0x00); db(0xac); db(0x67); db(0x08); + db(0x61); db(0x00); db(0xfc); db(0x40); db(0x42); db(0x2b); db(0x00); db(0xac); + db(0x20); db(0x0c); db(0x67); db(0xce); db(0x0c); db(0x6c); db(0x00); db(0x26); + db(0x00); db(0x12); db(0x66); db(0x4c); db(0x0c); db(0xac); db(0x40); db(0x00); + db(0x00); db(0x00); db(0x00); db(0x14); db(0x66); db(0x42); db(0x0c); db(0x6c); + db(0x12); db(0x34); db(0x00); db(0x18); db(0x66); db(0x3a); db(0x20); db(0x6c); + db(0x00); db(0x1a); db(0x20); db(0x28); db(0x00); db(0x0c); db(0x02); db(0x80); + db(0x80); db(0x00); db(0x00); db(0x08); db(0x0c); db(0x80); db(0x80); db(0x00); + db(0x00); db(0x08); db(0x66); db(0x18); db(0x02); db(0xa8); db(0x7f); db(0xff); + db(0xff); db(0xff); db(0x00); db(0x0c); db(0x20); db(0x68); db(0x00); db(0x10); + db(0x22); db(0x4c); db(0x12); db(0xbc); db(0x00); db(0x08); db(0x4e); db(0xae); + db(0xfe); db(0x92); db(0x60); db(0x86); db(0x22); db(0x4c); db(0x70); db(0x26); + db(0x4e); db(0xae); db(0xff); db(0x2e); db(0x60); db(0x00); db(0xff); db(0x7c); db(0x26); db(0x2c); db(0x00); db(0x0a); db(0x66); db(0x3e); db(0x30); db(0x3c); - db(0xff); db(0x50); db(0x61); db(0x00); db(0x00); db(0xdc); db(0x70); db(0x01); + db(0xff); db(0x50); db(0x61); db(0x00); db(0x01); db(0x06); db(0x70); db(0x01); db(0x4e); db(0x90); db(0x45); db(0xeb); db(0x00); db(0x04); db(0x20); db(0x52); - db(0x20); db(0x08); db(0x67); db(0x00); db(0xff); db(0x80); db(0x22); db(0x50); + db(0x20); db(0x08); db(0x67); db(0x00); db(0xff); db(0x5e); db(0x22); db(0x50); db(0x20); db(0x40); db(0x20); db(0x28); db(0x00); db(0x04); db(0x6a); db(0x16); db(0x48); db(0xe7); db(0x00); db(0xc0); db(0x28); db(0x68); db(0x00); db(0x0a); db(0x61); db(0x4a); db(0x53); db(0x85); db(0x4c); db(0xdf); db(0x03); db(0x00); db(0x24); db(0x89); db(0x20); db(0x49); db(0x60); db(0xda); db(0x24); db(0x48); db(0x20); db(0x49); db(0x60); db(0xd4); db(0x0c); db(0x85); db(0x00); db(0x00); db(0x00); db(0x14); db(0x65); db(0x00); db(0x00); db(0x0a); db(0x70); db(0x01); - db(0x29); db(0x40); db(0x00); db(0x04); db(0x60); db(0x12); db(0x61); db(0x32); - db(0x30); db(0x3c); db(0xff); db(0x30); db(0x61); db(0x00); db(0x00); db(0x8a); + db(0x29); db(0x40); db(0x00); db(0x04); db(0x60); db(0x12); db(0x61); db(0x5c); + db(0x30); db(0x3c); db(0xff); db(0x30); db(0x61); db(0x00); db(0x00); db(0xb4); db(0x4e); db(0x90); db(0x4a); db(0x80); db(0x67); db(0x0e); db(0x52); db(0x85); db(0x28); db(0xab); db(0x00); db(0x04); db(0x27); db(0x4c); db(0x00); db(0x04); - db(0x60); db(0x00); db(0xff); db(0x2a); db(0x28); db(0x43); db(0x61); db(0x04); - db(0x60); db(0x00); db(0xff); db(0x22); db(0x22); db(0x54); db(0x20); db(0x6c); - db(0x00); db(0x04); db(0x29); db(0x4d); db(0x00); db(0x04); db(0x4e); db(0xee); - db(0xfe); db(0x92); db(0x2f); db(0x05); db(0x7a); db(0xfc); db(0x24); db(0x53); - db(0x2e); db(0x0a); db(0x22); db(0x0a); db(0x67); db(0x00); db(0x00); db(0x0c); - db(0x52); db(0x85); db(0x67); db(0x1e); db(0x22); db(0x4a); db(0x24); db(0x52); - db(0x60); db(0xf0); db(0x52); db(0x85); db(0x67); db(0x3c); db(0x24); db(0x47); - db(0x70); db(0x18); db(0x72); db(0x01); db(0x4e); db(0xae); db(0xff); db(0x3a); - db(0x52); db(0x46); db(0x24); db(0x40); db(0x24); db(0x87); db(0x2e); db(0x0a); - db(0x60); db(0xe8); db(0x20); db(0x12); db(0x67); db(0x24); db(0x20); db(0x40); - db(0x20); db(0x10); db(0x67); db(0x1e); db(0x20); db(0x40); db(0x20); db(0x10); - db(0x67); db(0x18); db(0x70); db(0x00); db(0x22); db(0x80); db(0x22); db(0x4a); - db(0x24); db(0x51); db(0x70); db(0x18); db(0x4e); db(0xae); db(0xff); db(0x2e); - db(0x06); db(0x86); db(0x00); db(0x01); db(0x00); db(0x00); db(0x20); db(0x0a); - db(0x66); db(0xec); db(0x26); db(0x87); db(0x2a); db(0x1f); db(0x4e); db(0x75); - db(0x41); db(0xfa); db(0xf9); db(0x4a); db(0x02); db(0x80); db(0x00); db(0x00); - db(0xff); db(0xff); db(0xd1); db(0xc0); db(0x4e); db(0x75); db(0x00); db(0x00); - db(0x0c); db(0xaf); db(0x00); db(0x00); db(0x00); db(0x22); db(0x00); db(0x08); - db(0x66); db(0x30); db(0x48); db(0xe7); db(0xc0); db(0xe2); db(0x2c); db(0x78); - db(0x00); db(0x04); db(0x93); db(0xc9); db(0x4e); db(0xae); db(0xfe); db(0xda); - db(0x24); db(0x40); db(0x22); db(0x4a); db(0x70); db(0xec); db(0x4e); db(0xae); - db(0xfe); db(0xd4); db(0x41); db(0xfa); db(0xff); db(0xda); db(0x32); db(0x10); - db(0xb2); db(0x50); db(0x67); db(0xfc); db(0x22); db(0x4a); db(0x4e); db(0xae); - db(0xfe); db(0xd4); db(0x72); db(0x01); db(0x4c); db(0xdf); db(0x47); db(0x03); - db(0x58); db(0x8f); db(0x4e); db(0x75); db(0x20); db(0x88); db(0x58); db(0x90); - db(0x42); db(0xa8); db(0x00); db(0x04); db(0x21); db(0x48); db(0x00); db(0x08); - db(0x4e); db(0x75); db(0x48); db(0xe7); db(0x20); db(0x22); db(0x2c); db(0x79); - db(0x00); db(0x00); db(0x00); db(0x04); db(0x70); db(0xff); db(0x4e); db(0xae); - db(0xfe); db(0xb6); db(0x91); db(0xc8); db(0x24); db(0x00); db(0x6b); db(0x32); - db(0x70); db(0x22); db(0x22); db(0x3c); db(0x00); db(0x01); db(0x00); db(0x01); - db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x91); db(0xc8); db(0x24); db(0x40); - db(0x4a); db(0x80); db(0x67); db(0x1e); db(0x15); db(0x7c); db(0x00); db(0x04); - db(0x00); db(0x08); db(0x15); db(0x42); db(0x00); db(0x0f); db(0x93); db(0xc9); - db(0x4e); db(0xae); db(0xfe); db(0xda); db(0x25); db(0x40); db(0x00); db(0x10); - db(0x41); db(0xea); db(0x00); db(0x14); db(0x61); db(0x00); db(0xff); db(0xae); - db(0x20); db(0x4a); db(0x20); db(0x08); db(0x4c); db(0xdf); db(0x44); db(0x04); - db(0x4e); db(0x75); db(0x48); db(0xe7); db(0x20); db(0x22); db(0x2c); db(0x79); - db(0x00); db(0x00); db(0x00); db(0x04); db(0x4a); db(0x80); db(0x67); db(0x20); - db(0x24); db(0x40); db(0x74); db(0x30); db(0x20); db(0x02); db(0x22); db(0x3c); - db(0x00); db(0x01); db(0x00); db(0x01); db(0x4e); db(0xae); db(0xff); db(0x3a); - db(0x20); db(0x40); db(0x11); db(0x7c); db(0x00); db(0x0a); db(0x00); db(0x08); - db(0x21); db(0x42); db(0x00); db(0x12); db(0x21); db(0x4a); db(0x00); db(0x0e); - db(0x4c); db(0xdf); db(0x44); db(0x04); db(0x4e); db(0x75); db(0x48); db(0xe7); - db(0x30); db(0x32); db(0x2c); db(0x79); db(0x00); db(0x00); db(0x00); db(0x04); - db(0x24); db(0x08); db(0x26); db(0x09); db(0x20); db(0x3c); db(0x00); db(0x00); - db(0x08); db(0x5c); db(0x22); db(0x3c); db(0x00); db(0x01); db(0x00); db(0x01); - db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x4a); db(0x80); db(0x67); db(0x00); - db(0x00); db(0x2c); db(0x24); db(0x40); db(0x15); db(0x7c); db(0x00); db(0x01); - db(0x00); db(0x08); db(0x25); db(0x42); db(0x00); db(0x0a); db(0x47); db(0xea); - db(0x00); db(0x5c); db(0x25); db(0x4b); db(0x00); db(0x3a); db(0x47); db(0xeb); - db(0x08); db(0x00); db(0x25); db(0x4b); db(0x00); db(0x3e); db(0x25); db(0x4b); - db(0x00); db(0x36); db(0x22); db(0x4a); db(0x24); db(0x43); db(0x97); db(0xcb); - db(0x4e); db(0xae); db(0xfe); db(0xe6); db(0x4c); db(0xdf); db(0x4c); db(0x0c); - db(0x4e); db(0x75); db(0x00); db(0x00); db(0x00); db(0x00); db(0x00); db(0x00); - db(0x2f); db(0x08); db(0x4a); db(0x2b); db(0x00); db(0x9d); db(0x66); db(0x18); - db(0x41); db(0xfa); db(0xff); db(0xf0); db(0x4a); db(0x50); db(0x67); db(0x10); - db(0x41); db(0xfa); db(0x01); db(0xba); db(0x43); db(0xfa); db(0x00); db(0x0e); - db(0x61); db(0x00); db(0xff); db(0x8c); db(0x50); db(0xeb); db(0x00); db(0x9d); - db(0x20); db(0x5f); db(0x4e); db(0x75); db(0x2c); db(0x79); db(0x00); db(0x00); - db(0x00); db(0x04); db(0x70); db(0xff); db(0x4e); db(0xae); db(0xfe); db(0xb6); - db(0x74); db(0x00); db(0x01); db(0xc2); db(0x93); db(0xc9); db(0x4e); db(0xae); - db(0xfe); db(0xda); db(0x28); db(0x40); db(0x70); db(0x14); db(0x22); db(0x4c); - db(0x4e); db(0xae); db(0xfe); db(0xd4); db(0x70); db(0x00); db(0x43); db(0xfa); - db(0x01); db(0xae); db(0x4e); db(0xae); db(0xfd); db(0xd8); db(0x2e); db(0x00); - db(0x70); db(0x00); db(0x30); db(0x3c); db(0x00); db(0x44); db(0x22); db(0x3c); - db(0x00); db(0x01); db(0x00); db(0x01); db(0x4e); db(0xae); db(0xff); db(0x3a); - db(0x2a); db(0x40); db(0x61); db(0x00); db(0xfe); db(0xbe); db(0x61); db(0x00); - db(0xff); db(0x0a); db(0x2b); db(0x40); db(0x00); db(0x3c); db(0x67); db(0x00); - db(0x00); db(0x7a); db(0x22); db(0x40); db(0x41); db(0xfa); db(0x01); db(0x3c); + db(0x60); db(0x00); db(0xff); db(0x08); db(0x28); db(0x43); db(0x61); db(0x04); + db(0x60); db(0x00); db(0xff); db(0x00); db(0x0c); db(0xac); db(0x00); db(0x00); + db(0x00); db(0x1f); db(0x00); db(0x08); db(0x66); db(0x04); db(0x61); db(0x00); + db(0xfb); db(0x40); db(0x0c); db(0xac); db(0x00); db(0x00); db(0x04); db(0x09); + db(0x00); db(0x08); db(0x66); db(0x12); db(0x61); db(0x00); db(0xfb); db(0x6e); + db(0x66); db(0x0c); db(0x30); db(0x3c); db(0xff); db(0x58); db(0x61); db(0x00); + db(0x00); db(0x72); db(0x4e); db(0x90); db(0x60); db(0xee); db(0x22); db(0x54); + db(0x20); db(0x6c); db(0x00); db(0x04); db(0x29); db(0x4d); db(0x00); db(0x04); + db(0x4e); db(0xee); db(0xfe); db(0x92); db(0x2f); db(0x05); db(0x7a); db(0xfc); + db(0x24); db(0x53); db(0x2e); db(0x0a); db(0x22); db(0x0a); db(0x67); db(0x00); + db(0x00); db(0x0c); db(0x52); db(0x85); db(0x67); db(0x1e); db(0x22); db(0x4a); + db(0x24); db(0x52); db(0x60); db(0xf0); db(0x52); db(0x85); db(0x67); db(0x3c); + db(0x24); db(0x47); db(0x70); db(0x18); db(0x72); db(0x01); db(0x4e); db(0xae); + db(0xff); db(0x3a); db(0x52); db(0x46); db(0x24); db(0x40); db(0x24); db(0x87); + db(0x2e); db(0x0a); db(0x60); db(0xe8); db(0x20); db(0x12); db(0x67); db(0x24); + db(0x20); db(0x40); db(0x20); db(0x10); db(0x67); db(0x1e); db(0x20); db(0x40); + db(0x20); db(0x10); db(0x67); db(0x18); db(0x70); db(0x00); db(0x22); db(0x80); + db(0x22); db(0x4a); db(0x24); db(0x51); db(0x70); db(0x18); db(0x4e); db(0xae); + db(0xff); db(0x2e); db(0x06); db(0x86); db(0x00); db(0x01); db(0x00); db(0x00); + db(0x20); db(0x0a); db(0x66); db(0xec); db(0x26); db(0x87); db(0x2a); db(0x1f); + db(0x4e); db(0x75); db(0x41); db(0xfa); db(0xf4); db(0x48); db(0x02); db(0x80); + db(0x00); db(0x00); db(0xff); db(0xff); db(0xd1); db(0xc0); db(0x4e); db(0x75); + db(0x00); db(0x00); db(0x0c); db(0xaf); db(0x00); db(0x00); db(0x00); db(0x22); + db(0x00); db(0x08); db(0x66); db(0x30); db(0x48); db(0xe7); db(0xc0); db(0xe2); + db(0x2c); db(0x78); db(0x00); db(0x04); db(0x93); db(0xc9); db(0x4e); db(0xae); + db(0xfe); db(0xda); db(0x24); db(0x40); db(0x22); db(0x4a); db(0x70); db(0xec); + db(0x4e); db(0xae); db(0xfe); db(0xd4); db(0x41); db(0xfa); db(0xff); db(0xda); + db(0x32); db(0x10); db(0xb2); db(0x50); db(0x67); db(0xfc); db(0x22); db(0x4a); + db(0x4e); db(0xae); db(0xfe); db(0xd4); db(0x72); db(0x01); db(0x4c); db(0xdf); + db(0x47); db(0x03); db(0x58); db(0x8f); db(0x4e); db(0x75); db(0x20); db(0x88); + db(0x58); db(0x90); db(0x42); db(0xa8); db(0x00); db(0x04); db(0x21); db(0x48); + db(0x00); db(0x08); db(0x4e); db(0x75); db(0x48); db(0xe7); db(0x20); db(0x22); + db(0x2c); db(0x79); db(0x00); db(0x00); db(0x00); db(0x04); db(0x70); db(0xff); + db(0x4e); db(0xae); db(0xfe); db(0xb6); db(0x91); db(0xc8); db(0x24); db(0x00); + db(0x6b); db(0x32); db(0x70); db(0x22); db(0x22); db(0x3c); db(0x00); db(0x01); + db(0x00); db(0x01); db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x91); db(0xc8); + db(0x24); db(0x40); db(0x4a); db(0x80); db(0x67); db(0x1e); db(0x15); db(0x7c); + db(0x00); db(0x04); db(0x00); db(0x08); db(0x15); db(0x42); db(0x00); db(0x0f); + db(0x93); db(0xc9); db(0x4e); db(0xae); db(0xfe); db(0xda); db(0x25); db(0x40); + db(0x00); db(0x10); db(0x41); db(0xea); db(0x00); db(0x14); db(0x61); db(0x00); + db(0xff); db(0xae); db(0x20); db(0x4a); db(0x20); db(0x08); db(0x4c); db(0xdf); + db(0x44); db(0x04); db(0x4e); db(0x75); db(0x48); db(0xe7); db(0x20); db(0x22); + db(0x2c); db(0x79); db(0x00); db(0x00); db(0x00); db(0x04); db(0x4a); db(0x80); + db(0x67); db(0x20); db(0x24); db(0x40); db(0x74); db(0x30); db(0x20); db(0x02); + db(0x22); db(0x3c); db(0x00); db(0x01); db(0x00); db(0x01); db(0x4e); db(0xae); + db(0xff); db(0x3a); db(0x20); db(0x40); db(0x11); db(0x7c); db(0x00); db(0x0a); + db(0x00); db(0x08); db(0x21); db(0x42); db(0x00); db(0x12); db(0x21); db(0x4a); + db(0x00); db(0x0e); db(0x4a); db(0x80); db(0x4c); db(0xdf); db(0x44); db(0x04); + db(0x4e); db(0x75); db(0x48); db(0xe7); db(0x00); db(0x22); db(0x2c); db(0x78); + db(0x00); db(0x04); db(0x61); db(0x00); db(0xff); db(0x70); db(0x61); db(0x00); + db(0xff); db(0xbc); db(0x67); db(0x1a); db(0x22); db(0x40); db(0x24); db(0x40); + db(0x41); db(0xfa); db(0x02); db(0x44); db(0x70); db(0x00); db(0x72); db(0x00); + db(0x4e); db(0xae); db(0xfe); db(0x44); db(0x22); db(0x00); db(0x70); db(0x00); + db(0x4a); db(0x81); db(0x66); db(0x02); db(0x20); db(0x0a); db(0x4a); db(0x80); + db(0x4c); db(0xdf); db(0x44); db(0x00); db(0x4e); db(0x75); db(0x48); db(0xe7); + db(0x00); db(0x22); db(0x2c); db(0x78); db(0x00); db(0x04); db(0x61); db(0x00); + db(0xff); db(0x3c); db(0x61); db(0x00); db(0xff); db(0x88); db(0x67); db(0x1a); + db(0x24); db(0x40); db(0x22); db(0x40); db(0x41); db(0xfa); db(0x02); db(0x1d); db(0x70); db(0x00); db(0x72); db(0x00); db(0x4e); db(0xae); db(0xfe); db(0x44); - db(0x4a); db(0x80); db(0x66); db(0x00); db(0x00); db(0x66); db(0x61); db(0x00); - db(0xfe); db(0x9a); db(0x61); db(0x00); db(0xfe); db(0xe6); db(0x2b); db(0x40); - db(0x00); db(0x40); db(0x67); db(0x00); db(0x00); db(0x56); db(0x22); db(0x40); - db(0x41); db(0xfa); db(0x01); db(0x25); db(0x70); db(0x00); db(0x72); db(0x00); - db(0x4e); db(0xae); db(0xfe); db(0x44); db(0x4a); db(0x80); db(0x66); db(0x00); - db(0x00); db(0x42); db(0x47); db(0xed); db(0x00); db(0x16); db(0x27); db(0x4c); - db(0x00); db(0x0c); db(0x27); db(0x42); db(0x00); db(0x08); db(0x70); db(0xff); - db(0x26); db(0x80); db(0x27); db(0x40); db(0x00); db(0x04); db(0x43); db(0xed); - db(0x00); db(0x00); db(0x13); db(0x7c); db(0x00); db(0x02); db(0x00); db(0x08); - db(0x13); db(0x7c); db(0x00); db(0x05); db(0x00); db(0x09); db(0x41); db(0xfa); - db(0x00); db(0xfc); db(0x23); db(0x48); db(0x00); db(0x0a); db(0x41); db(0xfa); - db(0x00); db(0xa0); db(0x23); db(0x48); db(0x00); db(0x12); db(0x23); db(0x4b); - db(0x00); db(0x0e); db(0x70); db(0x05); db(0x4e); db(0xae); db(0xff); db(0x58); - db(0x60); db(0x02); db(0x4e); db(0x75); db(0x20); db(0x02); db(0x4e); db(0xae); - db(0xfe); db(0xc2); db(0x22); db(0x6d); db(0x00); db(0x3c); db(0x45); db(0xed); - db(0x00); db(0x26); db(0x33); db(0x7c); db(0x00); db(0x0b); db(0x00); db(0x1c); - db(0x23); db(0x7c); db(0x00); db(0x00); db(0x00); db(0x16); db(0x00); db(0x24); - db(0x23); db(0x4a); db(0x00); db(0x28); db(0x13); db(0x7c); db(0x00); db(0x01); - db(0x00); db(0x1e); db(0x15); db(0x7c); db(0x00); db(0x04); db(0x00); db(0x04); - db(0x42); db(0x2a); db(0x00); db(0x05); db(0x42); db(0x6a); db(0x00); db(0x06); - db(0x42); db(0x6a); db(0x00); db(0x08); db(0x20); db(0x47); db(0x20); db(0x2d); - db(0x00); db(0x16); db(0x32); db(0x28); db(0x00); db(0x30); db(0xd2); db(0x41); - db(0x90); db(0x41); db(0x35); db(0x40); db(0x00); db(0x0a); db(0x20); db(0x2d); - db(0x00); db(0x1a); db(0x32); db(0x28); db(0x00); db(0x2e); db(0xd2); db(0x41); - db(0x90); db(0x41); db(0x48); db(0xc0); db(0x35); db(0x40); db(0x00); db(0x0c); - db(0x22); db(0x6d); db(0x00); db(0x40); db(0x33); db(0x7c); db(0x00); db(0x0a); - db(0x00); db(0x1c); db(0x13); db(0x7c); db(0x00); db(0x01); db(0x00); db(0x1e); - db(0x4e); db(0xae); db(0xfe); db(0x38); db(0x22); db(0x6d); db(0x00); db(0x40); - db(0x25); db(0x69); db(0x00); db(0x20); db(0x00); db(0x0e); db(0x25); db(0x69); - db(0x00); db(0x24); db(0x00); db(0x12); db(0x22); db(0x6d); db(0x00); db(0x3c); - db(0x4e); db(0xae); db(0xfe); db(0x38); db(0x60); db(0x00); db(0xff); db(0x76); - db(0x30); db(0x3a); db(0xfe); db(0x82); db(0x48); db(0xc0); db(0x32); db(0x3a); - db(0xfe); db(0x7e); db(0x48); db(0xc1); db(0xb0); db(0x91); db(0x66); db(0x00); - db(0x00); db(0x0a); db(0xb2); db(0xa9); db(0x00); db(0x04); db(0x67); db(0x00); - db(0x00); db(0x18); db(0x23); db(0x41); db(0x00); db(0x04); db(0x22); db(0x80); - db(0x20); db(0x29); db(0x00); db(0x08); db(0x22); db(0x69); db(0x00); db(0x0c); - db(0x2c); db(0x78); db(0x00); db(0x04); db(0x4e); db(0xae); db(0xfe); db(0xbc); - db(0x41); db(0xf9); db(0x00); db(0xdf); db(0xf0); db(0x00); db(0x70); db(0x00); - db(0x4e); db(0x75); db(0x69); db(0x6e); db(0x70); db(0x75); db(0x74); db(0x2e); - db(0x64); db(0x65); db(0x76); db(0x69); db(0x63); db(0x65); db(0x00); db(0x74); - db(0x69); db(0x6d); db(0x65); db(0x72); db(0x2e); db(0x64); db(0x65); db(0x76); - db(0x69); db(0x63); db(0x65); db(0x00); db(0x55); db(0x41); db(0x45); db(0x20); - db(0x6d); db(0x6f); db(0x75); db(0x73); db(0x65); db(0x20); db(0x68); db(0x61); - db(0x63); db(0x6b); db(0x00); db(0x55); db(0x41); db(0x45); db(0x20); db(0x66); - db(0x69); db(0x6c); db(0x65); db(0x73); db(0x79); db(0x73); db(0x74); db(0x65); - db(0x6d); db(0x00); db(0x64); db(0x6f); db(0x73); db(0x2e); db(0x6c); db(0x69); + db(0x22); db(0x00); db(0x70); db(0x00); db(0x4a); db(0x81); db(0x66); db(0x02); + db(0x20); db(0x0a); db(0x4a); db(0x80); db(0x4c); db(0xdf); db(0x44); db(0x00); + db(0x4e); db(0x75); db(0x48); db(0xe7); db(0x38); db(0x32); db(0x2c); db(0x79); + db(0x00); db(0x00); db(0x00); db(0x04); db(0x28); db(0x00); db(0x24); db(0x08); + db(0x26); db(0x09); db(0x20); db(0x3c); db(0x00); db(0x00); db(0x08); db(0x5c); + db(0x22); db(0x3c); db(0x00); db(0x01); db(0x00); db(0x01); db(0x4e); db(0xae); + db(0xff); db(0x3a); db(0x4a); db(0x80); db(0x67); db(0x00); db(0x00); db(0x34); + db(0x24); db(0x40); db(0x15); db(0x7c); db(0x00); db(0x01); db(0x00); db(0x08); + db(0x15); db(0x44); db(0x00); db(0x09); db(0x25); db(0x42); db(0x00); db(0x0a); + db(0x47); db(0xea); db(0x00); db(0x5c); db(0x25); db(0x4b); db(0x00); db(0x3a); + db(0x47); db(0xeb); db(0x08); db(0x00); db(0x25); db(0x4b); db(0x00); db(0x3e); + db(0x25); db(0x4b); db(0x00); db(0x36); db(0x22); db(0x4a); db(0x24); db(0x43); + db(0x97); db(0xcb); db(0x24); db(0x09); db(0x4e); db(0xae); db(0xfe); db(0xe6); + db(0x20); db(0x02); db(0x4c); db(0xdf); db(0x4c); db(0x1c); db(0x4e); db(0x75); + db(0x00); db(0x00); db(0x00); db(0x00); db(0x00); db(0x00); db(0x2f); db(0x08); + db(0x4a); db(0x2b); db(0x00); db(0x9d); db(0x66); db(0x26); db(0x41); db(0xfa); + db(0xff); db(0xf0); db(0x0c); db(0x10); db(0x00); db(0x01); db(0x66); db(0x1c); + db(0x41); db(0xfa); db(0x01); db(0x96); db(0x43); db(0xfa); db(0x00); db(0x1a); + db(0x70); db(0x05); db(0x61); db(0x00); db(0xff); db(0x7e); db(0x50); db(0xeb); + db(0x00); db(0x9d); db(0x30); db(0x3c); db(0xff); db(0x38); db(0x61); db(0x00); + db(0xfe); db(0x2a); db(0x4e); db(0x90); db(0x20); db(0x5f); db(0x4e); db(0x75); + db(0x2c); db(0x79); db(0x00); db(0x00); db(0x00); db(0x04); db(0x70); db(0xff); + db(0x4e); db(0xae); db(0xfe); db(0xb6); db(0x74); db(0x00); db(0x01); db(0xc2); + db(0x93); db(0xc9); db(0x4e); db(0xae); db(0xfe); db(0xda); db(0x28); db(0x40); + db(0x70); db(0x14); db(0x22); db(0x4c); db(0x4e); db(0xae); db(0xfe); db(0xd4); + db(0x70); db(0x00); db(0x43); db(0xfa); db(0x01); db(0xaa); db(0x4e); db(0xae); + db(0xfd); db(0xd8); db(0x2e); db(0x00); db(0x70); db(0x00); db(0x30); db(0x3c); + db(0x00); db(0x44); db(0x22); db(0x3c); db(0x00); db(0x01); db(0x00); db(0x01); + db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x2a); db(0x40); db(0x61); db(0x00); + db(0xfe); db(0xc2); db(0x2b); db(0x40); db(0x00); db(0x3c); db(0x67); db(0x00); + db(0x00); db(0x4e); db(0x61); db(0x00); db(0xfe); db(0xea); db(0x2b); db(0x40); + db(0x00); db(0x40); db(0x67); db(0x00); db(0x00); db(0x42); db(0x47); db(0xed); + db(0x00); db(0x16); db(0x27); db(0x4c); db(0x00); db(0x0c); db(0x27); db(0x42); + db(0x00); db(0x08); db(0x70); db(0xff); db(0x26); db(0x80); db(0x27); db(0x40); + db(0x00); db(0x04); db(0x43); db(0xed); db(0x00); db(0x00); db(0x13); db(0x7c); + db(0x00); db(0x02); db(0x00); db(0x08); db(0x13); db(0x7c); db(0x00); db(0x05); + db(0x00); db(0x09); db(0x41); db(0xfa); db(0x00); db(0xfc); db(0x23); db(0x48); + db(0x00); db(0x0a); db(0x41); db(0xfa); db(0x00); db(0xa0); db(0x23); db(0x48); + db(0x00); db(0x12); db(0x23); db(0x4b); db(0x00); db(0x0e); db(0x70); db(0x05); + db(0x4e); db(0xae); db(0xff); db(0x58); db(0x60); db(0x02); db(0x4e); db(0x75); + db(0x20); db(0x02); db(0x4e); db(0xae); db(0xfe); db(0xc2); db(0x22); db(0x6d); + db(0x00); db(0x3c); db(0x45); db(0xed); db(0x00); db(0x26); db(0x33); db(0x7c); + db(0x00); db(0x0b); db(0x00); db(0x1c); db(0x23); db(0x7c); db(0x00); db(0x00); + db(0x00); db(0x16); db(0x00); db(0x24); db(0x23); db(0x4a); db(0x00); db(0x28); + db(0x13); db(0x7c); db(0x00); db(0x01); db(0x00); db(0x1e); db(0x15); db(0x7c); + db(0x00); db(0x04); db(0x00); db(0x04); db(0x42); db(0x2a); db(0x00); db(0x05); + db(0x42); db(0x6a); db(0x00); db(0x06); db(0x42); db(0x6a); db(0x00); db(0x08); + db(0x20); db(0x47); db(0x20); db(0x2d); db(0x00); db(0x16); db(0x32); db(0x28); + db(0x00); db(0x30); db(0xd2); db(0x41); db(0x90); db(0x41); db(0x35); db(0x40); + db(0x00); db(0x0a); db(0x20); db(0x2d); db(0x00); db(0x1a); db(0x32); db(0x28); + db(0x00); db(0x2e); db(0xd2); db(0x41); db(0x90); db(0x41); db(0x48); db(0xc0); + db(0x35); db(0x40); db(0x00); db(0x0c); db(0x22); db(0x6d); db(0x00); db(0x40); + db(0x33); db(0x7c); db(0x00); db(0x0a); db(0x00); db(0x1c); db(0x13); db(0x7c); + db(0x00); db(0x01); db(0x00); db(0x1e); db(0x4e); db(0xae); db(0xfe); db(0x38); + db(0x22); db(0x6d); db(0x00); db(0x40); db(0x25); db(0x69); db(0x00); db(0x20); + db(0x00); db(0x0e); db(0x25); db(0x69); db(0x00); db(0x24); db(0x00); db(0x12); + db(0x22); db(0x6d); db(0x00); db(0x3c); db(0x4e); db(0xae); db(0xfe); db(0x38); + db(0x60); db(0x00); db(0xff); db(0x76); db(0x30); db(0x3a); db(0xfe); db(0xa4); + db(0x48); db(0xc0); db(0x32); db(0x3a); db(0xfe); db(0xa0); db(0x48); db(0xc1); + db(0xb0); db(0x91); db(0x66); db(0x00); db(0x00); db(0x0a); db(0xb2); db(0xa9); + db(0x00); db(0x04); db(0x67); db(0x00); db(0x00); db(0x18); db(0x23); db(0x41); + db(0x00); db(0x04); db(0x22); db(0x80); db(0x20); db(0x29); db(0x00); db(0x08); + db(0x22); db(0x69); db(0x00); db(0x0c); db(0x2c); db(0x78); db(0x00); db(0x04); + db(0x4e); db(0xae); db(0xfe); db(0xbc); db(0x41); db(0xf9); db(0x00); db(0xdf); + db(0xf0); db(0x00); db(0x70); db(0x00); db(0x4e); db(0x75); db(0x69); db(0x6e); + db(0x70); db(0x75); db(0x74); db(0x2e); db(0x64); db(0x65); db(0x76); db(0x69); + db(0x63); db(0x65); db(0x00); db(0x74); db(0x69); db(0x6d); db(0x65); db(0x72); + db(0x2e); db(0x64); db(0x65); db(0x76); db(0x69); db(0x63); db(0x65); db(0x00); + db(0x55); db(0x41); db(0x45); db(0x20); db(0x6d); db(0x6f); db(0x75); db(0x73); + db(0x65); db(0x20); db(0x68); db(0x61); db(0x63); db(0x6b); db(0x00); db(0x55); + db(0x41); db(0x45); db(0x20); db(0x66); db(0x69); db(0x6c); db(0x65); db(0x73); + db(0x79); db(0x73); db(0x74); db(0x65); db(0x6d); db(0x00); db(0x55); db(0x41); + db(0x45); db(0x20); db(0x66); db(0x73); db(0x20); db(0x61); db(0x75); db(0x74); + db(0x6f); db(0x6d); db(0x6f); db(0x75); db(0x6e); db(0x74); db(0x65); db(0x72); + db(0x00); db(0x55); db(0x41); db(0x45); db(0x20); db(0x66); db(0x73); db(0x20); + db(0x61); db(0x75); db(0x74); db(0x6f); db(0x6d); db(0x6f); db(0x75); db(0x6e); + db(0x74); db(0x20); db(0x70); db(0x72); db(0x6f); db(0x63); db(0x65); db(0x73); + db(0x73); db(0x00); db(0x64); db(0x6f); db(0x73); db(0x2e); db(0x6c); db(0x69); db(0x62); db(0x72); db(0x61); db(0x72); db(0x79); db(0x00); db(0x69); db(0x6e); db(0x74); db(0x75); db(0x69); db(0x74); db(0x69); db(0x6f); db(0x6e); db(0x2e); db(0x6c); db(0x69); db(0x62); db(0x72); db(0x61); db(0x72); db(0x79); db(0x00); diff --git a/src/fpp.cpp b/src/fpp.cpp index 80f6797a..538e852a 100644 --- a/src/fpp.cpp +++ b/src/fpp.cpp @@ -10,6 +10,7 @@ #define __USE_ISOC9X /* We might be able to pick up a NaN */ #include +#include #include "sysconfig.h" #include "sysdeps.h" @@ -137,11 +138,92 @@ typedef uae_s64 tointtype; typedef uae_s32 tointtype; #endif -static __inline__ tointtype toint(fptype src) +static void fpu_op_illg (uae_u32 opcode, struct regstruct *regs, int pcoffset) { + if ((currprefs.cpu_model == 68060 && (currprefs.fpu_model == 0 || (regs->pcr & 2))) + || (currprefs.cpu_model == 68040 && currprefs.fpu_model == 0)) { + /* 68040 unimplemented/68060 FPU disabled exception. + * Line F exception with different stack frame.. */ + uaecptr newpc = m68k_getpc(regs); + uaecptr oldpc = newpc - pcoffset; + MakeSR(regs); + if (!regs->s) { + regs->usp = m68k_areg(regs, 7); + m68k_areg(regs, 7) = regs->isp; + } + regs->s = 1; + m68k_areg(regs, 7) -= 4; + put_long (m68k_areg(regs, 7), oldpc); + m68k_areg(regs, 7) -= 4; + put_long (m68k_areg(regs, 7), oldpc); + m68k_areg(regs, 7) -= 2; + put_word (m68k_areg(regs, 7), 0x4000 + 11 * 4); + m68k_areg(regs, 7) -= 4; + put_long (m68k_areg(regs, 7), newpc); + m68k_areg(regs, 7) -= 2; + put_word (m68k_areg(regs, 7), regs->sr); + write_log("68040/060 FPU disabled exception PC=%x\n", newpc); + newpc = get_long (regs->vbr + 11 * 4); + m68k_setpc(regs, newpc); + set_special(regs, SPCFLAG_END_COMPILE); + return; + } + op_illg (opcode, regs); +} + +STATIC_INLINE int fault_if_no_fpu(uae_u32 opcode, struct regstruct *regs, int pcoffset) +{ + if ((regs->pcr & 2) || currprefs.fpu_model <= 0) { + fpu_op_illg (opcode, regs, pcoffset); + return 1; + } + return 0; +} + +static int get_fpu_version(void) +{ + int v = 0; +// if (currprefs.fpu_revision >= 0) +// return currprefs.fpu_revision; + switch (currprefs.fpu_model) + { + case 68881: + v = 0x1f; + break; + case 68882: + v = 0x20; /* ??? */ + break; + case 68040: + v = 0x41; + break; + } + return v; +} + +#define fp_round_to_minus_infinity(x) fp_floor(x) +#define fp_round_to_plus_infinity(x) fp_ceil(x) +#define fp_round_to_zero(x) ((int)(x)) +#define fp_round_to_nearest(x) ((int)((x) + 0.5)) + +STATIC_INLINE tointtype toint(fptype src, fptype minval, fptype maxval) +{ + if (src < minval) + src = minval; + if (src > maxval) + src = maxval; +#if defined(X86_MSVC_ASSEMBLY) + { + fptype tmp_fp; + __asm { + fld LDPTR src + frndint + fstp LDPTR tmp_fp + } + return (tointtype)tmp_fp; + } +#else /* no X86_MSVC */ switch ((regs.fpcr >> 4) & 3) { case 0: /* to nearest */ - if (regs.fpcr & 0xf0) /* if not Extended RN */ return (tointtype)floor (src + 0.5); case 1: /* to zero */ return (tointtype) src; @@ -150,7 +232,7 @@ static __inline__ tointtype toint(fptype src) case 3: /* up */ return (tointtype)ceil (src); } - return (tointtype)src; /* never reached */ +#endif } uae_u32 get_fpsr (void) @@ -287,15 +369,15 @@ STATIC_INLINE int get_fp_value (uae_u32 opcode, uae_u16 extra, fptype *src) uae_u16 tmp; int size, mode, reg; uae_u32 ad = 0; - static int sz1[8] = { 4, 4, 12, 12, 2, 8, 1, 0 }; - static int sz2[8] = { 4, 4, 12, 12, 2, 8, 2, 0 }; + static const int sz1[8] = { 4, 4, 12, 12, 2, 8, 1, 0 }; + static const int sz2[8] = { 4, 4, 12, 12, 2, 8, 2, 0 }; if (!(extra & 0x4000)) { *src = regs.fp[(extra >> 10) & 7]; return 1; } - reg = opcode & 7; mode = (opcode >> 3) & 7; + reg = opcode & 7; size = (extra >> 10) & 7; switch (mode) { case 0: @@ -434,15 +516,15 @@ STATIC_INLINE int put_fp_value (struct regstruct *regs, fptype value, uae_u32 op case 0: switch (size) { case 6: - m68k_dreg (regs, reg) = (uae_u32)(((toint(value) & 0xff) + m68k_dreg (regs, reg) = (uae_u32)(((toint(value, -128.0, 127.0) & 0xff) | (m68k_dreg (regs, reg) & ~0xff))); break; case 4: - m68k_dreg (regs, reg) = (uae_u32)(((toint(value) & 0xffff) + m68k_dreg (regs, reg) = (uae_u32)(((toint(value, -32768.0, 32767.0) & 0xffff) | (m68k_dreg (regs, reg) & ~0xffff))); break; case 0: - m68k_dreg (regs, reg) = (uae_u32)toint(value); + m68k_dreg (regs, reg) = (uae_u32)toint(value, -2147483648.0, 2147483647.0); break; case 1: m68k_dreg (regs, reg) = from_single (value); @@ -497,7 +579,7 @@ STATIC_INLINE int put_fp_value (struct regstruct *regs, fptype value, uae_u32 op } switch (size) { case 0: - put_long (ad, (uae_u32)toint(value)); + put_long (ad, (uae_u32)toint(value, -2147483648.0, 2147483647.0)); break; case 1: put_long (ad, from_single (value)); @@ -525,7 +607,7 @@ STATIC_INLINE int put_fp_value (struct regstruct *regs, fptype value, uae_u32 op } break; case 4: - put_word (ad, (uae_s16) toint(value)); + put_word (ad, (uae_s16) toint(value, -32768.0, 32767.0)); break; case 5:{ uae_u32 wrd1, wrd2; @@ -536,7 +618,7 @@ STATIC_INLINE int put_fp_value (struct regstruct *regs, fptype value, uae_u32 op } break; case 6: - put_byte (ad, (uae_s8)toint(value)); + put_byte (ad, (uae_s8)toint(value, -128.0, 127.0)); break; default: return 0; @@ -598,9 +680,8 @@ STATIC_INLINE int get_fp_ad (uae_u32 opcode, uae_u32 * ad) STATIC_INLINE int fpp_cond (uae_u32 opcode, int contition) { - int N = (regs.fp_result<0); - int Z = (regs.fp_result==0); - /* int I = (regs.fpsr & 0x2000000) != 0; */ + int N = (regs.fp_result < 0.0); + int Z = (regs.fp_result == 0.0); int NotANumber = 0; #ifdef HAVE_ISNAN @@ -668,11 +749,7 @@ STATIC_INLINE int fpp_cond (uae_u32 opcode, int contition) case 0x1b: return NotANumber || Z || !N; case 0x1c: -#if 0 - return NotANumber || (Z && N); /* This is wrong, compare 0x0c */ -#else return NotANumber || (N && !Z); -#endif case 0x1d: return NotANumber || Z || N; case 0x1e: @@ -683,31 +760,34 @@ STATIC_INLINE int fpp_cond (uae_u32 opcode, int contition) return -1; } -void fdbcc_opp (uae_u32 opcode, struct regstruct *regs, uae_u16 extra) +void fpuop_dbcc (uae_u32 opcode, struct regstruct *regs, uae_u16 extra) { uaecptr pc = (uae_u32) m68k_getpc (regs); - uae_s32 disp = (uae_s32) (uae_s16) next_iword (regs); + uae_s32 disp; int cc; #if DEBUG_FPP if (!isinrom ()) write_log ("fdbcc_opp at %08lx\n", m68k_getpc (regs)); #endif + if (fault_if_no_fpu (opcode, regs, 4)) + return; + + disp = (uae_s32) (uae_s16) next_iword (regs); cc = fpp_cond (opcode, extra & 0x3f); if (cc == -1) { - m68k_setpc (regs, pc - 4); - op_illg (opcode, regs); + fpu_op_illg (opcode, regs, 4); } else if (!cc) { int reg = opcode & 0x7; - m68k_dreg (regs, reg) = ((m68k_dreg (regs, reg) & ~0xffff) - | ((m68k_dreg (regs, reg) - 1) & 0xffff)); - if ((m68k_dreg (regs, reg) & 0xffff) == 0xffff) + m68k_dreg (regs, reg) = ((m68k_dreg (regs, reg) & 0xffff0000) + | (((m68k_dreg (regs, reg) & 0xffff) - 1) & 0xffff)); + if ((m68k_dreg (regs, reg) & 0xffff) != 0xffff) m68k_setpc (regs, pc + disp); } } -void fscc_opp (uae_u32 opcode, struct regstruct *regs, uae_u16 extra) +void fpuop_scc (uae_u32 opcode, struct regstruct *regs, uae_u16 extra) { uae_u32 ad; int cc; @@ -716,10 +796,11 @@ void fscc_opp (uae_u32 opcode, struct regstruct *regs, uae_u16 extra) if (!isinrom ()) write_log ("fscc_opp at %08lx\n", m68k_getpc (regs)); #endif + if (fault_if_no_fpu (opcode, regs, 4)) + return; cc = fpp_cond (opcode, extra & 0x3f); - if (cc == -1) { - m68k_setpc (regs, m68k_getpc (regs) - 4); - op_illg (opcode, regs); + if (cc == -1) { + fpu_op_illg (opcode, regs, 4); } else if ((opcode & 0x38) == 0) { m68k_dreg (regs, opcode & 7) = (m68k_dreg (regs, opcode & 7) & ~0xff) | (cc ? 0xff : 0x00); } else { @@ -731,7 +812,7 @@ void fscc_opp (uae_u32 opcode, struct regstruct *regs, uae_u16 extra) } } -void ftrapcc_opp (uae_u32 opcode, struct regstruct *regs, uaecptr oldpc) +void fpuop_trapcc (uae_u32 opcode, struct regstruct *regs, uaecptr oldpc) { int cc; @@ -739,16 +820,18 @@ void ftrapcc_opp (uae_u32 opcode, struct regstruct *regs, uaecptr oldpc) if (!isinrom ()) write_log ("ftrapcc_opp at %08lx\n", m68k_getpc (regs)); #endif + if (fault_if_no_fpu (opcode, regs, m68k_getpc(regs) - oldpc)) + return; + cc = fpp_cond (opcode, opcode & 0x3f); if (cc == -1) { - m68k_setpc (regs, oldpc); - op_illg (opcode, regs); + fpu_op_illg (opcode, regs, m68k_getpc(regs) - oldpc); } if (cc) Exception (7, regs, oldpc - 2); } -void fbcc_opp (uae_u32 opcode, struct regstruct *regs, uaecptr pc, uae_u32 extra) +void fpuop_bcc (uae_u32 opcode, struct regstruct *regs, uaecptr pc, uae_u32 extra) { int cc; @@ -756,10 +839,12 @@ void fbcc_opp (uae_u32 opcode, struct regstruct *regs, uaecptr pc, uae_u32 extra if (!isinrom ()) write_log ("fbcc_opp at %08lx\n", m68k_getpc (regs)); #endif + if (fault_if_no_fpu (opcode, regs, m68k_getpc(regs) - pc)) + return; + cc = fpp_cond (opcode, opcode & 0x3f); if (cc == -1) { - m68k_setpc (regs, pc); - op_illg (opcode, regs); + fpu_op_illg (opcode, regs, m68k_getpc(regs) - pc); } else if (cc) { if ((opcode & 0x40) == 0) extra = (uae_s32) (uae_s16) extra; @@ -767,60 +852,66 @@ void fbcc_opp (uae_u32 opcode, struct regstruct *regs, uaecptr pc, uae_u32 extra } } -void fsave_opp (uae_u32 opcode, struct regstruct *regs) +void fpuop_save (uae_u32 opcode, struct regstruct *regs) { uae_u32 ad; int incr = (opcode & 0x38) == 0x20 ? -1 : 1; - int fpu_version = 0x18; /* 68881 */ -// int fpu_version = 0x38; /* 68882 */ + int fpu_version = get_fpu_version(); int i; - #if DEBUG_FPP if (!isinrom ()) write_log ("fsave_opp at %08lx\n", m68k_getpc (regs)); #endif + if (fault_if_no_fpu (opcode, regs, 2)) + return; + if (get_fp_ad (opcode, &ad) == 0) { - m68k_setpc (regs, m68k_getpc (regs) - 2); - op_illg (opcode, regs); + fpu_op_illg (opcode, regs, 2); return; } -#if 0 - if (currprefs.cpu_level >= 6) { - /* 6 byte 68060 IDLE frame. */ + if (currprefs.fpu_model == 68060) { + /* 12 byte 68060 IDLE frame. */ if (incr < 0) { - ad -= 6; + ad -= 4; + put_long (ad, 0x00000000); + ad -= 4; + put_long (ad, 0x00000000); + ad -= 4; put_long (ad, 0x00006000); } else { put_long (ad, 0x00006000); - ad += 6; + ad += 4; + put_long (ad, 0x00000000); + ad += 4; + put_long (ad, 0x00000000); + ad += 4; } - } else -#endif - if (currprefs.cpu_level >= 4) { + } else if (currprefs.fpu_model == 68040) { /* 4 byte 68040 IDLE frame. */ if (incr < 0) { ad -= 4; - put_long (ad, 0x41000000); + put_long (ad, fpu_version << 24); } else { - put_long (ad, 0x41000000); + put_long (ad, fpu_version << 24); ad += 4; } - } else { + } else { /* 68881/68882 */ + int idle_size = currprefs.fpu_model == 68882 ? 0x38 : 0x18; if (incr < 0) { ad -= 4; put_long (ad, 0x70000000); - for (i = 0; i < 5; i++) { + for (i = 0; i < (idle_size - 1) / 4; i++) { ad -= 4; put_long (ad, 0x00000000); } ad -= 4; - put_long (ad, 0x1f000000 | (fpu_version << 16)); + put_long (ad, (fpu_version << 24) | (idle_size << 16)); } else { - put_long (ad, 0x1f000000 | (fpu_version << 16)); + put_long (ad, (fpu_version << 24) | (idle_size << 16)); ad += 4; - for (i = 0; i < 5; i++) { + for (i = 0; i < (idle_size - 1) / 4; i++) { put_long (ad, 0x00000000); ad += 4; } @@ -834,7 +925,7 @@ void fsave_opp (uae_u32 opcode, struct regstruct *regs) m68k_areg (regs, opcode & 7) = ad; } -void frestore_opp (uae_u32 opcode, struct regstruct *regs) +void fpuop_restore (uae_u32 opcode, struct regstruct *regs) { uae_u32 ad; uae_u32 d; @@ -844,23 +935,26 @@ void frestore_opp (uae_u32 opcode, struct regstruct *regs) if (!isinrom ()) write_log ("frestore_opp at %08lx\n", m68k_getpc (regs)); #endif + if (fault_if_no_fpu (opcode, regs, 2)) + return; + if (get_fp_ad (opcode, &ad) == 0) { - m68k_setpc (regs, m68k_getpc (regs) - 2); - op_illg (opcode, regs); + fpu_op_illg (opcode, regs, 2); return; } -#if 0 - if (currprefs.cpu_level >= 6) { - /* 68060 */ - d = get_long (ad); + if (currprefs.fpu_model == 68060) { + /* all 68060 FPU frames are 12 bytes */ if (incr < 0) { - ad -= 6; + ad -= 4; d = get_long (ad); - } else - ad += 6; - } else -#endif - if (currprefs.cpu_level >= 4) { + ad -= 8; + } else { + d = get_long (ad); + ad += 4; + ad += 8; + } + + } else if (currprefs.fpu_model == 68040) { /* 68040 */ if (incr < 0) { /* @@@ This may be wrong. */ @@ -886,7 +980,7 @@ void frestore_opp (uae_u32 opcode, struct regstruct *regs) } } } - } else { + } else { /* 68881/68882 */ if (incr < 0) { ad -= 4; d = get_long (ad); @@ -922,569 +1016,599 @@ static void fround (int reg) regs.fp[reg] = (float)regs.fp[reg]; } -void fpp_opp (uae_u32 opcode, struct regstruct *regs, uae_u16 extra) +void fpuop_arithmetic (uae_u32 opcode, struct regstruct *regs, uae_u16 extra) { - int reg; - fptype src; + int reg; + fptype src; #if DEBUG_FPP - if (!isinrom ()) - write_log ("FPP %04lx %04x at %08lx\n", opcode & 0xffff, extra, m68k_getpc (regs) - 4); + if (!isinrom ()) + write_log ("FPP %04lx %04x at %08lx\n", opcode & 0xffff, extra, m68k_getpc (regs) - 4); #endif - switch ((extra >> 13) & 0x7) { + if (fault_if_no_fpu (opcode, regs, 4)) + return; + + switch ((extra >> 13) & 0x7) { case 3: - if (put_fp_value (regs, regs->fp[(extra >> 7) & 7], opcode, extra) == 0) { - m68k_setpc (regs, m68k_getpc (regs) - 4); - op_illg (opcode, regs); - } - return; + if (put_fp_value (regs, regs->fp[(extra >> 7) & 7], opcode, extra) == 0) { + m68k_setpc (regs, m68k_getpc (regs) - 4); + op_illg (opcode, regs); + } + return; case 4: case 5: - if ((opcode & 0x38) == 0) { - if (extra & 0x2000) { - if (extra & 0x1000) - m68k_dreg (regs, opcode & 7) = regs->fpcr; - if (extra & 0x0800) - m68k_dreg (regs, opcode & 7) = get_fpsr (); - if (extra & 0x0400) - m68k_dreg (regs, opcode & 7) = regs->fpiar; - } else { - if (extra & 0x1000) { - regs->fpcr = m68k_dreg (regs, opcode & 7); - native_set_fpucw (regs->fpcr); - } - if (extra & 0x0800) - set_fpsr (m68k_dreg (regs, opcode & 7)); - if (extra & 0x0400) - regs->fpiar = m68k_dreg (regs, opcode & 7); - } - } else if ((opcode & 0x38) == 0x08) { - if (extra & 0x2000) { - if (extra & 0x1000) - m68k_areg (regs, opcode & 7) = regs->fpcr; - if (extra & 0x0800) - m68k_areg (regs, opcode & 7) = get_fpsr (); - if (extra & 0x0400) - m68k_areg (regs, opcode & 7) = regs->fpiar; - } else { - if (extra & 0x1000) { - regs->fpcr = m68k_areg (regs, opcode & 7); - native_set_fpucw (regs->fpcr); - } - if (extra & 0x0800) - set_fpsr (m68k_areg (regs, opcode & 7)); - if (extra & 0x0400) - regs->fpiar = m68k_areg (regs, opcode & 7); - } - } else if ((opcode & 0x3f) == 0x3c) { - if ((extra & 0x2000) == 0) { - if (extra & 0x1000) { - regs->fpcr = next_ilong (regs); - native_set_fpucw (regs->fpcr); - } - if (extra & 0x0800) - set_fpsr (next_ilong (regs)); - if (extra & 0x0400) - regs->fpiar = next_ilong (regs); - } - } else if (extra & 0x2000) { - /* FMOVEM FPP->memory */ - uae_u32 ad; - int incr = 0; + if ((opcode & 0x38) == 0) { + if (extra & 0x2000) { + if (extra & 0x1000) + m68k_dreg (regs, opcode & 7) = regs->fpcr & 0xffff; + if (extra & 0x0800) + m68k_dreg (regs, opcode & 7) = get_fpsr (); + if (extra & 0x0400) + m68k_dreg (regs, opcode & 7) = regs->fpiar; + } else { + if (extra & 0x1000) { + regs->fpcr = m68k_dreg (regs, opcode & 7); + native_set_fpucw (regs->fpcr); + } + if (extra & 0x0800) + set_fpsr (m68k_dreg (regs, opcode & 7)); + if (extra & 0x0400) + regs->fpiar = m68k_dreg (regs, opcode & 7); + } + } else if ((opcode & 0x38) == 0x08) { + if (extra & 0x2000) { + if (extra & 0x1000) + m68k_areg (regs, opcode & 7) = regs->fpcr & 0xffff; + if (extra & 0x0800) + m68k_areg (regs, opcode & 7) = get_fpsr (); + if (extra & 0x0400) + m68k_areg (regs, opcode & 7) = regs->fpiar; + } else { + if (extra & 0x1000) { + regs->fpcr = m68k_areg (regs, opcode & 7); + native_set_fpucw (regs->fpcr); + } + if (extra & 0x0800) + set_fpsr (m68k_areg (regs, opcode & 7)); + if (extra & 0x0400) + regs->fpiar = m68k_areg (regs, opcode & 7); + } + } else if ((opcode & 0x3f) == 0x3c) { + if ((extra & 0x2000) == 0) { + if (extra & 0x1000) { + regs->fpcr = next_ilong (regs); + native_set_fpucw (regs->fpcr); + } + if (extra & 0x0800) + set_fpsr (next_ilong (regs)); + if (extra & 0x0400) + regs->fpiar = next_ilong (regs); + } + } else if (extra & 0x2000) { + /* FMOVEM FPP->memory */ + uae_u32 ad; + int incr = 0; - if (get_fp_ad (opcode, &ad) == 0) { - m68k_setpc (regs, m68k_getpc (regs) - 4); - op_illg (opcode, regs); - return; - } - if ((opcode & 0x38) == 0x20) { - if (extra & 0x1000) - incr += 4; - if (extra & 0x0800) - incr += 4; - if (extra & 0x0400) - incr += 4; - } - ad -= incr; - if (extra & 0x1000) { - put_long (ad, regs->fpcr); - ad += 4; - } - if (extra & 0x0800) { - put_long (ad, get_fpsr()); - ad += 4; - } - if (extra & 0x0400) { - put_long (ad, regs->fpiar); - ad += 4; - } - ad -= incr; - if ((opcode & 0x38) == 0x18) - m68k_areg (regs, opcode & 7) = ad; - if ((opcode & 0x38) == 0x20) - m68k_areg (regs, opcode & 7) = ad; - } else { - /* FMOVEM memory->FPP */ - uae_u32 ad; + if (get_fp_ad (opcode, &ad) == 0) { + m68k_setpc (regs, m68k_getpc (regs) - 4); + op_illg (opcode, regs); + return; + } + if ((opcode & 0x38) == 0x20) { + if (extra & 0x1000) + incr += 4; + if (extra & 0x0800) + incr += 4; + if (extra & 0x0400) + incr += 4; + } + ad -= incr; + if (extra & 0x1000) { + put_long (ad, regs->fpcr & 0xffff); + ad += 4; + } + if (extra & 0x0800) { + put_long (ad, get_fpsr()); + ad += 4; + } + if (extra & 0x0400) { + put_long (ad, regs->fpiar); + ad += 4; + } + ad -= incr; + if ((opcode & 0x38) == 0x18) + m68k_areg (regs, opcode & 7) = ad; + if ((opcode & 0x38) == 0x20) + m68k_areg (regs, opcode & 7) = ad; + } else { + /* FMOVEM memory->FPP */ + uae_u32 ad; + int incr = 0; - if (get_fp_ad (opcode, &ad) == 0) { - m68k_setpc (regs, m68k_getpc (regs) - 4); - op_illg (opcode, regs); - return; + if (get_fp_ad (opcode, &ad) == 0) { + m68k_setpc (regs, m68k_getpc (regs) - 4); + op_illg (opcode, regs); + return; + } + if((opcode & 0x38) == 0x20) { + if (extra & 0x1000) + incr += 4; + if (extra & 0x0800) + incr += 4; + if (extra & 0x0400) + incr += 4; + ad = ad - incr; + } + if (extra & 0x1000) { + regs->fpcr = get_long (ad); + native_set_fpucw(regs->fpcr); + ad += 4; + } + if (extra & 0x0800) { + set_fpsr(get_long (ad)); + ad += 4; + } + if (extra & 0x0400) { + regs->fpiar = get_long (ad); + ad += 4; + } + if ((opcode & 0x38) == 0x18) + m68k_areg (regs, opcode & 7) = ad; + if ((opcode & 0x38) == 0x20) + m68k_areg (regs, opcode & 7) = ad - incr; } - ad = (opcode & 0x38) == 0x20 ? ad - 12 : ad; - if (extra & 0x1000) { - regs->fpcr = get_long (ad); - native_set_fpucw(regs->fpcr); - ad += 4; - } - if (extra & 0x0800) { - set_fpsr(get_long (ad)); - ad += 4; - } - if (extra & 0x0400) { - regs->fpiar = get_long (ad); - ad += 4; - } - if ((opcode & 0x38) == 0x18) - m68k_areg (regs, opcode & 7) = ad; - if ((opcode & 0x38) == 0x20) - m68k_areg (regs, opcode & 7) = ad - 12; - } - return; + return; case 6: case 7: - { - uae_u32 ad, list = 0; - int incr = 0; - if (extra & 0x2000) { - /* FMOVEM FPP->memory */ - if (get_fp_ad (opcode, &ad) == 0) { - m68k_setpc (regs, m68k_getpc (regs) - 4); - op_illg (opcode, regs); - return; - } - switch ((extra >> 11) & 3) { - case 0: /* static pred */ - list = extra & 0xff; - incr = -1; - break; - case 1: /* dynamic pred */ - list = m68k_dreg (regs, (extra >> 4) & 3) & 0xff; - incr = -1; - break; - case 2: /* static postinc */ - list = extra & 0xff; - incr = 1; - break; - case 3: /* dynamic postinc */ - list = m68k_dreg (regs, (extra >> 4) & 3) & 0xff; - incr = 1; - break; - } - while (list) { - uae_u32 wrd1, wrd2, wrd3; - if (incr < 0) { - from_exten (regs->fp[fpp_movem_index2[list]], &wrd1, &wrd2, &wrd3); - ad -= 4; - put_long (ad, wrd3); - ad -= 4; - put_long (ad, wrd2); - ad -= 4; - put_long (ad, wrd1); - } else { - from_exten (regs->fp[fpp_movem_index1[list]], &wrd1, &wrd2, &wrd3); - put_long (ad, wrd1); - ad += 4; - put_long (ad, wrd2); - ad += 4; - put_long (ad, wrd3); - ad += 4; - } - list = fpp_movem_next[list]; - } - if ((opcode & 0x38) == 0x18) - m68k_areg (regs, opcode & 7) = ad; - if ((opcode & 0x38) == 0x20) - m68k_areg (regs, opcode & 7) = ad; - } else { - /* FMOVEM memory->FPP */ - if (get_fp_ad (opcode, &ad) == 0) { - m68k_setpc (regs, m68k_getpc (regs) - 4); - op_illg (opcode, regs); - return; - } - switch ((extra >> 11) & 3) { - case 0: /* static pred */ - list = extra & 0xff; - incr = -1; - break; - case 1: /* dynamic pred */ - list = m68k_dreg (regs, (extra >> 4) & 3) & 0xff; - incr = -1; - break; - case 2: /* static postinc */ - list = extra & 0xff; - incr = 1; - break; - case 3: /* dynamic postinc */ - list = m68k_dreg (regs, (extra >> 4) & 3) & 0xff; - incr = 1; - break; - } - while (list) { - uae_u32 wrd1, wrd2, wrd3; - if (incr < 0) { - ad -= 4; - wrd3 = get_long (ad); - ad -= 4; - wrd2 = get_long (ad); - ad -= 4; - wrd1 = get_long (ad); - regs->fp[fpp_movem_index2[list]] = to_exten (wrd1, wrd2, wrd3); - } else { - wrd1 = get_long (ad); - ad += 4; - wrd2 = get_long (ad); - ad += 4; - wrd3 = get_long (ad); - ad += 4; - regs->fp[fpp_movem_index1[list]] = to_exten (wrd1, wrd2, wrd3); - } - list = fpp_movem_next[list]; - } - if ((opcode & 0x38) == 0x18) - m68k_areg (regs, opcode & 7) = ad; - if ((opcode & 0x38) == 0x20) - m68k_areg (regs, opcode & 7) = ad; - } - } - return; + { + uae_u32 ad, list = 0; + int incr = 0; + if (extra & 0x2000) { + /* FMOVEM FPP->memory */ + if (get_fp_ad (opcode, &ad) == 0) { + m68k_setpc (regs, m68k_getpc (regs) - 4); + op_illg (opcode, regs); + return; + } + switch ((extra >> 11) & 3) { + case 0: /* static pred */ + list = extra & 0xff; + incr = -1; + break; + case 1: /* dynamic pred */ + list = m68k_dreg (regs, (extra >> 4) & 3) & 0xff; + incr = -1; + break; + case 2: /* static postinc */ + list = extra & 0xff; + incr = 1; + break; + case 3: /* dynamic postinc */ + list = m68k_dreg (regs, (extra >> 4) & 3) & 0xff; + incr = 1; + break; + } + if (incr < 0) { + for (reg = 7; reg >= 0; reg--) { + uae_u32 wrd1, wrd2, wrd3; + if (list & 0x80) { + from_exten (regs->fp[reg], &wrd1, &wrd2, &wrd3); + ad -= 4; + put_long (ad, wrd3); + ad -= 4; + put_long (ad, wrd2); + ad -= 4; + put_long (ad, wrd1); + } + list <<= 1; + } + } else { + for (reg = 0; reg <= 7; reg++) { + uae_u32 wrd1, wrd2, wrd3; + if (list & 0x80) { + from_exten (regs->fp[reg], &wrd1, &wrd2, &wrd3); + put_long (ad, wrd1); + ad += 4; + put_long (ad, wrd2); + ad += 4; + put_long (ad, wrd3); + ad += 4; + } + list <<= 1; + } + } + if ((opcode & 0x38) == 0x18) + m68k_areg (regs, opcode & 7) = ad; + if ((opcode & 0x38) == 0x20) + m68k_areg (regs, opcode & 7) = ad; + } else { + /* FMOVEM memory->FPP */ + if (get_fp_ad (opcode, &ad) == 0) { + m68k_setpc (regs, m68k_getpc (regs) - 4); + op_illg (opcode, regs); + return; + } + switch ((extra >> 11) & 3) { + case 0: /* static pred */ + list = extra & 0xff; + incr = -1; + break; + case 1: /* dynamic pred */ + list = m68k_dreg (regs, (extra >> 4) & 3) & 0xff; + incr = -1; + break; + case 2: /* static postinc */ + list = extra & 0xff; + incr = 1; + break; + case 3: /* dynamic postinc */ + list = m68k_dreg (regs, (extra >> 4) & 3) & 0xff; + incr = 1; + break; + } + if (incr < 0) { + for (reg = 7; reg >= 0; reg--) { + uae_u32 wrd1, wrd2, wrd3; + if (list & 0x80) { + ad -= 4; + wrd3 = get_long (ad); + ad -= 4; + wrd2 = get_long (ad); + ad -= 4; + wrd1 = get_long (ad); + regs->fp[reg] = to_exten(wrd1, wrd2, wrd3); + } + list <<= 1; + } + } else { + for (reg = 0; reg <= 7; reg++) { + uae_u32 wrd1, wrd2, wrd3; + if (list & 0x80) { + wrd1 = get_long (ad); + ad += 4; + wrd2 = get_long (ad); + ad += 4; + wrd3 = get_long (ad); + ad += 4; + regs->fp[reg] = to_exten(wrd1, wrd2, wrd3); + } + list <<= 1; + } + } + if ((opcode & 0x38) == 0x18) + m68k_areg (regs, opcode & 7) = ad; + if ((opcode & 0x38) == 0x20) + m68k_areg (regs, opcode & 7) = ad; + } + } + return; case 0: case 2: /* Extremely common */ - reg = (extra >> 7) & 7; - if ((extra & 0xfc00) == 0x5c00) { - switch (extra & 0x7f) { - case 0x00: - regs->fp[reg] = *fp_pi; - break; - case 0x0b: - regs->fp[reg] = *fp_l10_2; - break; - case 0x0c: - regs->fp[reg] = *fp_exp_1; - break; - case 0x0d: - regs->fp[reg] = *fp_l2_e; - break; - case 0x0e: - regs->fp[reg] = *fp_l10_e; - break; - case 0x0f: - regs->fp[reg] = 0.0; - break; - case 0x30: - regs->fp[reg] = *fp_ln_2; - break; - case 0x31: - regs->fp[reg] = *fp_ln_10; - break; - case 0x32: - regs->fp[reg] = (fptype)fp_1e0; - break; - case 0x33: - regs->fp[reg] = (fptype)fp_1e1; - break; - case 0x34: - regs->fp[reg] = (fptype)fp_1e2; - break; - case 0x35: - regs->fp[reg] = (fptype)fp_1e4; - break; - case 0x36: - regs->fp[reg] = (fptype)fp_1e8; - break; - case 0x37: - regs->fp[reg] = *fp_1e16; - break; - case 0x38: - regs->fp[reg] = *fp_1e32; - break; - case 0x39: - regs->fp[reg] = *fp_1e64; - break; - case 0x3a: - regs->fp[reg] = *fp_1e128; - break; - case 0x3b: - regs->fp[reg] = *fp_1e256; - break; - case 0x3c: - regs->fp[reg] = *fp_1e512; - break; - case 0x3d: - regs->fp[reg] = *fp_1e1024; - break; - case 0x3e: - regs->fp[reg] = *fp_1e2048; - break; - case 0x3f: - regs->fp[reg] = *fp_1e4096; - break; - default: - m68k_setpc (regs, m68k_getpc (regs) - 4); - op_illg (opcode, regs); - return; - } - MAKE_FPSR (regs, regs->fp[reg]); /* see Motorola 68k Manual */ - return; - } - if (get_fp_value (opcode, extra, &src) == 0) { - m68k_setpc (regs, m68k_getpc (regs) - 4); - op_illg (opcode, regs); - return; - } - switch (extra & 0x7f) { - case 0x00: /* FMOVE */ - case 0x40: /* Explicit rounding. This is just a quick fix. */ - case 0x44: /* Same for all other cases that have three choices */ - regs->fp[reg] = src; /* Brian King was here. */ - /* to register needs FPSR updated. See Motorola 68K Manual. */ - if ((extra & 0x44) == 0x40) - fround (reg); - break; - case 0x01: /* FINT */ - /* need to take the current rounding mode into account */ -#if defined(X86_MSVC_ASSEMBLY) - { - fptype tmp_fp; - - __asm { - fld LDPTR src - frndint - fstp LDPTR tmp_fp + reg = (extra >> 7) & 7; + if ((extra & 0xfc00) == 0x5c00) { + switch (extra & 0x7f) { + case 0x00: + regs->fp[reg] = *fp_pi; + break; + case 0x0b: + regs->fp[reg] = *fp_l10_2; + break; + case 0x0c: + regs->fp[reg] = *fp_exp_1; + break; + case 0x0d: + regs->fp[reg] = *fp_l2_e; + break; + case 0x0e: + regs->fp[reg] = *fp_l10_e; + break; + case 0x0f: + regs->fp[reg] = 0.0; + break; + case 0x30: + regs->fp[reg] = *fp_ln_2; + break; + case 0x31: + regs->fp[reg] = *fp_ln_10; + break; + case 0x32: + regs->fp[reg] = (fptype)fp_1e0; + break; + case 0x33: + regs->fp[reg] = (fptype)fp_1e1; + break; + case 0x34: + regs->fp[reg] = (fptype)fp_1e2; + break; + case 0x35: + regs->fp[reg] = (fptype)fp_1e4; + break; + case 0x36: + regs->fp[reg] = (fptype)fp_1e8; + break; + case 0x37: + regs->fp[reg] = *fp_1e16; + break; + case 0x38: + regs->fp[reg] = *fp_1e32; + break; + case 0x39: + regs->fp[reg] = *fp_1e64; + break; + case 0x3a: + regs->fp[reg] = *fp_1e128; + break; + case 0x3b: + regs->fp[reg] = *fp_1e256; + break; + case 0x3c: + regs->fp[reg] = *fp_1e512; + break; + case 0x3d: + regs->fp[reg] = *fp_1e1024; + break; + case 0x3e: + regs->fp[reg] = *fp_1e2048; + break; + case 0x3f: + regs->fp[reg] = *fp_1e4096; + break; + default: + m68k_setpc (regs, m68k_getpc (regs) - 4); + op_illg (opcode, regs); + return; } - regs->fp[reg] = tmp_fp; + MAKE_FPSR (regs, regs->fp[reg]); + return; } -#else /* no X86_MSVC */ - switch ((regs->fpcr >> 4) & 3) { - case 0: /* to nearest */ - regs->fp[reg] = floor (src + 0.5); - break; - case 1: /* to zero */ - if (src >= 0.0) - regs->fp[reg] = floor (src); - else - regs->fp[reg] = ceil (src); - break; - case 2: /* down */ - regs->fp[reg] = floor (src); - break; - case 3: /* up */ - regs->fp[reg] = ceil (src); - break; - default: /* never reached */ - regs->fp[reg] = src; + if (get_fp_value (opcode, extra, &src) == 0) { + m68k_setpc (regs, m68k_getpc (regs) - 4); + op_illg (opcode, regs); + return; } -#endif /* X86_MSVC */ - break; - case 0x02: /* FSINH */ - regs->fp[reg] = sinh (src); - break; - case 0x03: /* FINTRZ */ - if (src >= 0.0) - regs->fp[reg] = floor (src); - else - regs->fp[reg] = ceil (src); - break; - case 0x04: /* FSQRT */ - case 0x41: - case 0x45: - regs->fp[reg] = sqrt (src); - if ((extra & 0x44) == 0x40) - fround (reg); - break; - case 0x06: /* FLOGNP1 */ - regs->fp[reg] = log (src + 1.0); - break; - case 0x08: /* FETOXM1 */ - regs->fp[reg] = exp (src) - 1.0; - break; - case 0x09: /* FTANH */ - regs->fp[reg] = tanh (src); - break; - case 0x0a: /* FATAN */ - regs->fp[reg] = atan (src); - break; - case 0x0c: /* FASIN */ - regs->fp[reg] = asin (src); - break; - case 0x0d: /* FATANH */ -#if 1 /* The BeBox doesn't have atanh, and it isn't in the HPUX libm either */ - regs->fp[reg] = 0.5 * log ((1 + src) / (1 - src)); -#else - regs->fp[reg] = atanh (src); -#endif - break; - case 0x0e: /* FSIN */ - regs->fp[reg] = sin (src); - break; - case 0x0f: /* FTAN */ - regs->fp[reg] = tan (src); - break; - case 0x10: /* FETOX */ - regs->fp[reg] = exp (src); - break; - case 0x11: /* FTWOTOX */ - regs->fp[reg] = pow (2.0, src); - break; - case 0x12: /* FTENTOX */ - regs->fp[reg] = pow (10.0, src); - break; - case 0x14: /* FLOGN */ - regs->fp[reg] = log (src); - break; - case 0x15: /* FLOG10 */ - regs->fp[reg] = log10 (src); - break; - case 0x16: /* FLOG2 */ - regs->fp[reg] = *fp_l2_e * log (src); - break; - case 0x18: /* FABS */ - case 0x58: - case 0x5c: - regs->fp[reg] = src < 0 ? -src : src; - if ((extra & 0x44) == 0x40) - fround (reg); - break; - case 0x19: /* FCOSH */ - regs->fp[reg] = cosh (src); - break; - case 0x1a: /* FNEG */ - case 0x5a: - case 0x5e: - regs->fp[reg] = -src; - if ((extra & 0x44) == 0x40) - fround (reg); - break; - case 0x1c: /* FACOS */ - regs->fp[reg] = acos (src); - break; - case 0x1d: /* FCOS */ - regs->fp[reg] = cos (src); - break; - case 0x1e: /* FGETEXP */ - { - int expon; - frexp (src, &expon); - regs->fp[reg] = (double) (expon - 1); - } - break; - case 0x1f: /* FGETMAN */ - { - int expon; - regs->fp[reg] = frexp (src, &expon) * 2.0; - } - break; - case 0x20: /* FDIV */ - case 0x60: - case 0x64: - regs->fp[reg] /= src; - if ((extra & 0x44) == 0x40) - fround (reg); - break; - case 0x21: /* FMOD */ - { - fptype divi = regs->fp[reg] / src; + switch (extra & 0x7f) { + case 0x00: /* FMOVE */ + case 0x40: /* Explicit rounding. This is just a quick fix. */ + case 0x44: /* Same for all other cases that have three choices */ + regs->fp[reg] = src; /* Brian King was here. */ + /* to register needs FPSR updated. See Motorola 68K Manual. */ + if ((extra & 0x44) == 0x40) + fround (reg); + break; + case 0x01: /* FINT */ + /* need to take the current rounding mode into account */ +#if defined(X86_MSVC_ASSEMBLY) + { + fptype tmp_fp; - if (divi >= 0.0) - regs->fp[reg] -= src * floor (divi); - else - regs->fp[reg] -= src * ceil (divi); - } - break; - case 0x22: /* FADD */ - case 0x62: - case 0x66: - regs->fp[reg] += src; - if ((extra & 0x44) == 0x40) - fround (reg); - break; - case 0x23: /* FMUL */ - case 0x63: - case 0x67: - regs->fp[reg] *= src; - if ((extra & 0x44) == 0x40) - fround (reg); - break; - case 0x24: /* FSGLDIV */ - regs->fp[reg] /= src; - break; - case 0x25: /* FREM */ - regs->fp[reg] -= src * floor ((regs->fp[reg] / src) + 0.5); - break; - case 0x26: /* FSCALE */ -#ifdef ldexp - regs->fp[reg] = ldexp (regs->fp[reg], (int) src); + __asm { + fld LDPTR src + frndint + fstp LDPTR tmp_fp + } + regs->fp[reg] = tmp_fp; + } +#else /* no X86_MSVC */ + switch ((regs->fpcr >> 4) & 3) { + case 0: /* to nearest */ + regs->fp[reg] = floor (src + 0.5); + break; + case 1: /* to zero */ + if (src >= 0.0) + regs->fp[reg] = floor (src); + else + regs->fp[reg] = ceil (src); + break; + case 2: /* down */ + regs->fp[reg] = floor (src); + break; + case 3: /* up */ + regs->fp[reg] = ceil (src); + break; + default: /* never reached */ + regs->fp[reg] = src; + } +#endif /* X86_MSVC */ + break; + case 0x02: /* FSINH */ + regs->fp[reg] = sinh (src); + break; + case 0x03: /* FINTRZ */ + regs->fp[reg] = fp_round_to_zero(src); + break; + case 0x04: /* FSQRT */ + case 0x41: + case 0x45: + regs->fp[reg] = sqrt (src); + if ((extra & 0x44) == 0x40) + fround (reg); + break; + case 0x06: /* FLOGNP1 */ + regs->fp[reg] = log (src + 1.0); + break; + case 0x08: /* FETOXM1 */ + regs->fp[reg] = exp (src) - 1.0; + break; + case 0x09: /* FTANH */ + regs->fp[reg] = tanh (src); + break; + case 0x0a: /* FATAN */ + regs->fp[reg] = atan (src); + break; + case 0x0c: /* FASIN */ + regs->fp[reg] = asin (src); + break; + case 0x0d: /* FATANH */ +#if 1 /* The BeBox doesn't have atanh, and it isn't in the HPUX libm either */ + regs->fp[reg] = 0.5 * log ((1 + src) / (1 - src)); #else - regs->fp[reg] *= exp (*fp_ln_2 * (int) src); + regs->fp[reg] = atanh (src); #endif - break; - case 0x27: /* FSGLMUL */ - regs->fp[reg] *= src; - break; - case 0x28: /* FSUB */ - case 0x68: - case 0x6c: - regs->fp[reg] -= src; - if ((extra & 0x44) == 0x40) - fround (reg); - break; - case 0x30: /* FSINCOS */ - case 0x31: - case 0x32: - case 0x33: - case 0x34: - case 0x35: - case 0x36: - case 0x37: - regs->fp[extra & 7] = cos (src); - regs->fp[reg] = sin (src); - break; - case 0x38: /* FCMP */ - { - fptype tmp = regs->fp[reg] - src; + break; + case 0x0e: /* FSIN */ + regs->fp[reg] = sin (src); + break; + case 0x0f: /* FTAN */ + regs->fp[reg] = tan (src); + break; + case 0x10: /* FETOX */ + regs->fp[reg] = exp (src); + break; + case 0x11: /* FTWOTOX */ + regs->fp[reg] = pow (2.0, src); + break; + case 0x12: /* FTENTOX */ + regs->fp[reg] = pow (10.0, src); + break; + case 0x14: /* FLOGN */ + regs->fp[reg] = log (src); + break; + case 0x15: /* FLOG10 */ + regs->fp[reg] = log10 (src); + break; + case 0x16: /* FLOG2 */ + regs->fp[reg] = *fp_l2_e * log (src); + break; + case 0x18: /* FABS */ + case 0x58: + case 0x5c: + regs->fp[reg] = src < 0 ? -src : src; + if ((extra & 0x44) == 0x40) + fround (reg); + break; + case 0x19: /* FCOSH */ + regs->fp[reg] = cosh (src); + break; + case 0x1a: /* FNEG */ + case 0x5a: + case 0x5e: + regs->fp[reg] = -src; + if ((extra & 0x44) == 0x40) + fround (reg); + break; + case 0x1c: /* FACOS */ + regs->fp[reg] = acos (src); + break; + case 0x1d: /* FCOS */ + regs->fp[reg] = cos (src); + break; + case 0x1e: /* FGETEXP */ + { + if (src == 0) { + regs->fp[reg] = 0; + } else { + int expon; + frexp (src, &expon); + regs->fp[reg] = (double) (expon - 1); + } + } + break; + case 0x1f: /* FGETMAN */ + { + if (src == 0) { + regs->fp[reg] = 0; + } else { + int expon; + regs->fp[reg] = frexp (src, &expon) * 2.0; + } + } + break; + case 0x20: /* FDIV */ + case 0x60: + case 0x64: + regs->fp[reg] /= src; + if ((extra & 0x44) == 0x40) + fround (reg); + break; + case 0x21: /* FMOD */ + { + fptype quot = fp_round_to_zero(regs->fp[reg] / src); + regs->fp[reg] = regs->fp[reg] - quot * src; + } + break; + case 0x22: /* FADD */ + case 0x62: + case 0x66: + regs->fp[reg] += src; + if ((extra & 0x44) == 0x40) + fround (reg); + break; + case 0x23: /* FMUL */ + case 0x63: + case 0x67: + regs->fp[reg] *= src; + if ((extra & 0x44) == 0x40) + fround (reg); + break; + case 0x24: /* FSGLDIV */ + regs->fp[reg] /= src; + break; + case 0x25: /* FREM */ + { + fptype quot = fp_round_to_nearest(regs->fp[reg] / src); + regs->fp[reg] = regs->fp[reg] - quot * src; + } + break; + case 0x26: /* FSCALE */ + if (src != 0) { +#ifdef ldexp + regs->fp[reg] = ldexp (regs->fp[reg], (int) src); +#else + regs->fp[reg] *= exp (*fp_ln_2 * (int) src); +#endif + } + break; + case 0x27: /* FSGLMUL */ + regs->fp[reg] *= src; + break; + case 0x28: /* FSUB */ + case 0x68: + case 0x6c: + regs->fp[reg] -= src; + if ((extra & 0x44) == 0x40) + fround (reg); + break; + case 0x30: /* FSINCOS */ + case 0x31: + case 0x32: + case 0x33: + case 0x34: + case 0x35: + case 0x36: + case 0x37: + regs->fp[extra & 7] = cos (src); + regs->fp[reg] = sin (src); + break; + case 0x38: /* FCMP */ + { + fptype tmp = regs->fp[reg] - src; + regs->fpsr = 0; + MAKE_FPSR (regs, tmp); + } + return; + case 0x3a: /* FTST */ regs->fpsr = 0; - MAKE_FPSR (regs, tmp); - } - return; - case 0x3a: /* FTST */ - regs->fpsr = 0; - MAKE_FPSR (regs, src); - return; - default: - m68k_setpc (regs, m68k_getpc (regs) - 4); - op_illg (opcode, regs); - return; - } - MAKE_FPSR (regs, regs->fp[reg]); - return; - } - m68k_setpc (regs, m68k_getpc (regs) - 4); - op_illg (opcode, regs); + MAKE_FPSR (regs, src); + return; + default: + m68k_setpc (regs, m68k_getpc (regs) - 4); + op_illg (opcode, regs); + return; + } + MAKE_FPSR (regs, regs->fp[reg]); + return; + } + m68k_setpc (regs, m68k_getpc (regs) - 4); + op_illg (opcode, regs); } uae_u8 *restore_fpu (uae_u8 *src) { - int model, i; + int i; + uae_u32 flags; - model = restore_u32(); - restore_u32 (); - if (currprefs.cpu_level == 2) { - currprefs.cpu_level++; - init_m68k (); - } - changed_prefs.cpu_level = currprefs.cpu_level; + changed_prefs.fpu_model = currprefs.fpu_model = restore_u32(); + flags = restore_u32 (); for (i = 0; i < 8; i++) { uae_u32 w1 = restore_u32 (); uae_u32 w2 = restore_u32 (); @@ -1494,35 +1618,28 @@ uae_u8 *restore_fpu (uae_u8 *src) regs.fpcr = restore_u32 (); regs.fpsr = restore_u32 (); regs.fpiar = restore_u32 (); + if (flags & 0x80000000) { + restore_u32(); + restore_u32(); + } + write_log("FPU=%d\n", currprefs.fpu_model); return src; } uae_u8 *save_fpu (int *len, uae_u8 *dstptr) { uae_u8 *dstbak,*dst; - int model,i; + int i; *len = 0; - switch (currprefs.cpu_level) - { - case 3: - model = 68881; - break; - case 4: - model = 68040; - break; - case 6: - model = 68060; - break; - default: + if (currprefs.fpu_model == 0) return 0; - } if (dstptr) dstbak = dst = dstptr; else - dstbak = dst = (uae_u8 *)malloc(4+4+8*10+4+4+4); - save_u32 (model); - save_u32 (0); + dstbak = dst = (uae_u8 *)malloc(4+4+8*10+4+4+4+4+4); + save_u32 (currprefs.fpu_model); + save_u32 (0x80000000); for (i = 0; i < 8; i++) { uae_u32 w1, w2, w3; from_exten (regs.fp[i], &w1, &w2, &w3); @@ -1533,6 +1650,8 @@ uae_u8 *save_fpu (int *len, uae_u8 *dstptr) save_u32 (regs.fpcr); save_u32 (regs.fpsr); save_u32 (regs.fpiar); + save_u32 (-1); + save_u32 (0); *len = dst - dstbak; return dstbak; } diff --git a/src/fsdb_unix.cpp b/src/fsdb_unix.cpp index 9280945e..7dd72065 100644 --- a/src/fsdb_unix.cpp +++ b/src/fsdb_unix.cpp @@ -64,8 +64,7 @@ int fsdb_set_file_attrs (a_inode *aino) return ERROR_OBJECT_NOT_AROUND; mode = statbuf.st_mode; - /* Unix dirs behave differently than AmigaOS ones. */ - if (! aino->dir) { + if (tmpmask & A_FIBF_READ) mode &= ~S_IRUSR; else @@ -82,7 +81,6 @@ int fsdb_set_file_attrs (a_inode *aino) mode |= S_IXUSR; chmod (aino->nname, mode); - } aino->dirty = 1; return 0; @@ -114,7 +112,7 @@ int fsdb_mode_representable_p (const a_inode *aino, int amigaos_mode) { int mask = amigaos_mode ^ 15; - if (aino->dir) + if (0 && aino->dir) return amigaos_mode == 0; if (mask & A_FIBF_SCRIPT) /* script */ @@ -138,7 +136,7 @@ char *fsdb_create_unique_nname (a_inode *base, const char *suggestion) int i; char *p = build_nname (base->nname, tmp); if (access (p, R_OK) < 0 && errno == ENOENT) { - printf ("unique name: %s\n", p); + write_log ("unique name: %s\n", p); return p; } free (p); diff --git a/src/genblitter.c b/src/genblitter.c new file mode 100644 index 00000000..078ff701 --- /dev/null +++ b/src/genblitter.c @@ -0,0 +1,270 @@ + /* + * UAE - The Un*x Amiga Emulator + * + * Optimized blitter minterm function generator + * + * Copyright 1995,1996 Bernd Schmidt + * Copyright 1996 Alessandro Bissacco + */ + +#include "sysconfig.h" +#include +#include + +#include "genblitter.h" + +/* Here is the minterm table used in blitter function generation */ + +static unsigned char blttbl[]= { + 0x00, 0x0a, 0x2a, 0x30, 0x3a, 0x3c, 0x4a, 0x6a, 0x8a, 0x8c, 0x9a, 0xa8, + 0xaa, 0xb1, 0xca, 0xcc, 0xd8, 0xe2, 0xea, 0xf0, 0xfa, 0xfc +}; + +static void generate_include(void) +{ + int minterm; + printf("STATIC_INLINE uae_u32 blit_func(uae_u32 srca, uae_u32 srcb, uae_u32 srcc, uae_u8 mt)\n{\nswitch(mt){\n"); + for (minterm = 0; minterm < 256; minterm++) { + printf("case 0x%x:\n", minterm); + printf("\treturn %s;\n", blitops[minterm].s); + } + printf("}\n"); + printf("return 0;\n"); /* No, sir, it doesn't! */ + printf("}\n"); +} + +static void generate_func(void) +{ + unsigned int i; + printf("#include \"sysconfig.h\"\n"); + printf("#include \"sysdeps.h\"\n"); + printf("#include \"options.h\"\n"); + printf("#include \"custom.h\"\n"); + printf("#include \"memory.h\"\n"); + printf("#include \"blitter.h\"\n"); + printf("#include \"blitfunc.h\"\n\n"); + + for (i = 0; i < sizeof(blttbl); i++) { + int active = blitops[blttbl[i]].used; + int a_is_on = active & 1, b_is_on = active & 2, c_is_on = active & 4; + printf("void blitdofast_%x (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b)\n",blttbl[i]); + printf("{\n"); + printf("int i,j;\n"); + printf("uae_u32 totald = 0;\n"); +#if 0 + printf("if (currprefs.blits_32bit_enabled && b->hblitsize > 1"); + if (a_is_on) printf(" && !b->blitashift && b->bltafwm==0xffff && b->bltalwm==0xffff"); + if (b_is_on) printf(" && !b->blitbshift"); + printf(") {\n"); + if (a_is_on) printf("uae_u32 srca=((uae_u32)b->bltadat << 16) | b->bltadat;\n"); + if (b_is_on) printf("uae_u32 srcb=((uae_u32)b->bltbdat << 16) | b->bltbdat;\n"); + if (c_is_on) printf("uae_u32 srcc=((uae_u32)b->bltcdat << 16) | b->bltcdat;\n"); + printf("uae_u32 dest;\n"); + printf("int count=b->hblitsize/2, oddword=b->hblitsize&1;\n"); + printf("for (j=0;jvblitsize;j++) {\n"); + printf("\tfor(i=0;ibltamod;\n"); + if (b_is_on) printf("\tif (ptb) ptb += b->bltbmod;\n"); + if (c_is_on) printf("\tif (ptc) ptc += b->bltcmod;\n"); + printf("\tif (ptd) ptd += b->bltdmod;\n"); + printf("}\n"); + if (a_is_on) printf("if (pta) b->bltadat = (*(pta-b->bltamod-2) << 8) | *(pta - b->bltamod - 1);\n"); /* Maybe not necessary, but I don't want problems */ + if (b_is_on) printf("if (ptb) b->bltbdat = (*(ptb-b->bltbmod-2) << 8) | *(ptb - b->bltbmod - 1);\n"); + if (c_is_on) printf("if (ptc) b->bltcdat = (*(ptc-b->bltcmod-2) << 8) | *(ptc - b->bltcmod - 1);\n"); + printf("if (ptd) b->bltddat = (*(ptd-b->bltdmod-2) << 8) | *(ptd - b->bltdmod - 1);\n"); + + printf("} else {\n"); +#endif + if (a_is_on) printf("uae_u32 preva = 0;\n"); + if (b_is_on) printf("uae_u32 prevb = 0, srcb = b->bltbhold;\n"); + if (c_is_on) printf("uae_u32 srcc = b->bltcdat;\n"); + printf("uae_u32 dstd=0;\n"); + printf("uaecptr dstp = 0;\n"); + printf("for (j = 0; j < b->vblitsize; j++) {\n"); + printf("\tfor (i = 0; i < b->hblitsize; i++) {\n\t\tuae_u32 bltadat, srca;\n\n"); + if (c_is_on) printf("\t\tif (ptc) { srcc = chipmem_agnus_wget (ptc); ptc += 2; }\n"); + if (b_is_on) printf("\t\tif (ptb) {\n\t\t\tuae_u32 bltbdat = blt_info.bltbdat = chipmem_agnus_wget (ptb); ptb += 2;\n"); + if (b_is_on) printf("\t\t\tsrcb = (((uae_u32)prevb << 16) | bltbdat) >> b->blitbshift;\n"); + if (b_is_on) printf("\t\t\tprevb = bltbdat;\n\t\t}\n"); + if (a_is_on) printf("\t\tif (pta) { bltadat = blt_info.bltadat = chipmem_agnus_wget (pta); pta += 2; } else { bltadat = blt_info.bltadat; }\n"); + if (a_is_on) printf("\t\tbltadat &= blit_masktable[i];\n"); + if (a_is_on) printf("\t\tsrca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift;\n"); + if (a_is_on) printf("\t\tpreva = bltadat;\n"); + printf("\t\tif (dstp) chipmem_agnus_wput (dstp, dstd);\n"); + printf("\t\tdstd = (%s) & 0xFFFF;\n", blitops[blttbl[i]].s); + printf("\t\ttotald |= dstd;\n"); + printf("\t\tif (ptd) { dstp = ptd; ptd += 2; }\n"); + printf("\t}\n"); + if (a_is_on) printf("\tif (pta) pta += b->bltamod;\n"); + if (b_is_on) printf("\tif (ptb) ptb += b->bltbmod;\n"); + if (c_is_on) printf("\tif (ptc) ptc += b->bltcmod;\n"); + printf("\tif (ptd) ptd += b->bltdmod;\n"); + printf("}\n"); + if (b_is_on) printf("b->bltbhold = srcb;\n"); + if (c_is_on) printf("b->bltcdat = srcc;\n"); + printf("\t\tif (dstp) chipmem_agnus_wput (dstp, dstd);\n"); +#if 0 + printf("}\n"); +#endif + printf("if (totald != 0) b->blitzero = 0;\n"); + printf("}\n"); + + printf("void blitdofast_desc_%x (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b)\n",blttbl[i]); + printf("{\n"); + printf("uae_u32 totald = 0;\n"); + printf("int i,j;\n"); +#if 0 + printf("if (currprefs.blits_32bit_enabled && b->hblitsize > 1"); + if (a_is_on) printf(" && !b->blitashift && b->bltafwm==0xffff && b->bltalwm==0xffff"); + if (b_is_on) printf(" && !b->blitbshift"); + printf(") {\n"); + if (a_is_on) printf("uae_u32 srca = ((uae_u32)b->bltadat << 16) | b->bltadat;\n"); + if (b_is_on) printf("uae_u32 srcb = ((uae_u32)b->bltbdat << 16) | b->bltbdat;\n"); + if (c_is_on) printf("uae_u32 srcc = ((uae_u32)b->bltcdat << 16) | b->bltcdat;\n"); + printf("uae_u32 dest;\n"); + printf("int count=b->hblitsize/2, oddword=b->hblitsize&1;\n"); + printf("for (j=0;jvblitsize;j++) {\n"); + printf("\tfor(i=0;ibltamod;\n"); + if (b_is_on) printf("\tif (ptb) ptb -= b->bltbmod;\n"); + if (c_is_on) printf("\tif (ptc) ptc -= b->bltcmod;\n"); + printf("\tif (ptd) ptd-=b->bltdmod;\n"); + printf("}\n"); + if (a_is_on) printf("if (pta) b->bltadat = (*(pta + b->bltamod + 2) << 8) | *(pta + b->bltamod + 1);\n"); /* Maybe not necessary, but I don't want problems */ + if (b_is_on) printf("if (ptb) b->bltbdat = (*(ptb + b->bltbmod + 2) << 8) | *(ptb + b->bltbmod + 1);\n"); + if (c_is_on) printf("if (ptc) b->bltcdat = (*(ptc + b->bltcmod + 2) << 8) | *(ptc + b->bltcmod + 1);\n"); + printf("if (ptd) b->bltddat = (*(ptd + b->bltdmod + 2) << 8) | *(ptd + b->bltdmod + 1);\n"); + + printf("} else {\n"); +#endif + if (a_is_on) printf("uae_u32 preva = 0;\n"); + if (b_is_on) printf("uae_u32 prevb = 0, srcb = b->bltbhold;\n"); + if (c_is_on) printf("uae_u32 srcc = b->bltcdat;\n"); + printf("uae_u32 dstd=0;\n"); + printf("uaecptr dstp = 0;\n"); + printf("for (j = 0; j < b->vblitsize; j++) {\n"); + printf("\tfor (i = 0; i < b->hblitsize; i++) {\n\t\tuae_u32 bltadat, srca;\n"); + if (c_is_on) printf("\t\tif (ptc) { srcc = chipmem_agnus_wget (ptc); ptc -= 2; }\n"); + if (b_is_on) printf("\t\tif (ptb) {\n\t\t\tuae_u32 bltbdat = blt_info.bltbdat = chipmem_agnus_wget (ptb); ptb -= 2;\n"); + if (b_is_on) printf("\t\t\tsrcb = ((bltbdat << 16) | prevb) >> b->blitdownbshift;\n"); + if (b_is_on) printf("\t\t\tprevb = bltbdat;\n\t\t}\n"); + if (a_is_on) printf("\t\tif (pta) { bltadat = blt_info.bltadat = chipmem_agnus_wget (pta); pta -= 2; } else { bltadat = blt_info.bltadat; }\n"); + if (a_is_on) printf("\t\tbltadat &= blit_masktable[i];\n"); + if (a_is_on) printf("\t\tsrca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift;\n"); + if (a_is_on) printf("\t\tpreva = bltadat;\n"); + printf("\t\tif (dstp) chipmem_agnus_wput (dstp, dstd);\n"); + printf("\t\tdstd = (%s) & 0xFFFF;\n", blitops[blttbl[i]].s); + printf("\t\ttotald |= dstd;\n"); + printf("\t\tif (ptd) { dstp = ptd; ptd -= 2; }\n"); + printf("\t}\n"); + if (a_is_on) printf("\tif (pta) pta -= b->bltamod;\n"); + if (b_is_on) printf("\tif (ptb) ptb -= b->bltbmod;\n"); + if (c_is_on) printf("\tif (ptc) ptc -= b->bltcmod;\n"); + printf("\tif (ptd) ptd -= b->bltdmod;\n"); + printf("}\n"); + if (b_is_on) printf("b->bltbhold = srcb;\n"); + if (c_is_on) printf("b->bltcdat = srcc;\n"); + printf("\t\tif (dstp) chipmem_agnus_wput (dstp, dstd);\n"); +#if 0 + printf("}\n"); +#endif + printf("if (totald != 0) b->blitzero = 0;\n"); + printf("}\n"); + } +} + +static void generate_table(void) +{ + unsigned int index = 0; + unsigned int i; + printf("#include \"sysconfig.h\"\n"); + printf("#include \"sysdeps.h\"\n"); + printf("#include \"options.h\"\n"); + printf("#include \"custom.h\"\n"); + printf("#include \"memory.h\"\n"); + printf("#include \"blitter.h\"\n"); + printf("#include \"blitfunc.h\"\n\n"); + printf("blitter_func * const blitfunc_dofast[256] = {\n"); + for (i = 0; i < 256; i++) { + if (index < sizeof(blttbl) && i == blttbl[index]) { + printf("blitdofast_%x",i); + index++; + } + else printf("0"); + if (i < 255) printf(", "); + if ((i & 7) == 7) printf("\n"); + } + printf("};\n\n"); + + index = 0; + printf("blitter_func * const blitfunc_dofast_desc[256] = {\n"); + for (i = 0; i < 256; i++) { + if (index < sizeof(blttbl) && i == blttbl[index]) { + printf("blitdofast_desc_%x",i); + index++; + } + else printf("0"); + if (i < 255) printf(", "); + if ((i & 7) == 7) printf("\n"); + } + printf("};\n"); +} + +static void generate_header(void) +{ + unsigned int i; + for (i = 0; i < sizeof(blttbl); i++) { + printf("extern blitter_func blitdofast_%x;\n",blttbl[i]); + printf("extern blitter_func blitdofast_desc_%x;\n",blttbl[i]); + } +} + +int main(int argc, char **argv) +{ + char mode = 'i'; + + if (argc == 2) mode = *argv[1]; + switch (mode) { + case 'i': generate_include(); + break; + case 'f': generate_func(); + break; + case 't': generate_table(); + break; + case 'h': generate_header(); + break; + default: abort(); + } + return 0; +} + diff --git a/src/gencomp.c b/src/gencomp.c new file mode 100644 index 00000000..a1f6621c --- /dev/null +++ b/src/gencomp.c @@ -0,0 +1,3126 @@ +/* + * compiler/gencomp.c - MC680x0 compilation generator + * + * Based on work Copyright 1995, 1996 Bernd Schmidt + * Changes for UAE-JIT Copyright 2000 Bernd Meyer + * + * Adaptation for ARAnyM/ARM, copyright 2001-2014 + * Milan Jurik, Jens Heitmann + * + * Adaptation for Basilisk II and improvements, copyright 2000-2005 + * Gwenole Beauchesne + * + * Basilisk II (C) 1997-2005 Christian Bauer + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include "sysconfig.h" +#include "sysdeps.h" +#include + +#include "readcpu.h" + +#include +#include + +#define BOOL_TYPE "int" +#define failure global_failure=1 +#define FAILURE global_failure=1 +#define isjump global_isjump=1 +#define is_const_jump global_iscjump=1; +#define isaddx global_isaddx=1 +#define uses_cmov global_cmov=1 +#define mayfail global_mayfail=1 + +int hack_opcode; + +static int global_failure; +static int global_isjump; +static int global_iscjump; +static int global_isaddx; +static int global_cmov; +static int long_opcode; +static int global_mayfail; + +static char endstr[1000]; +static char lines[100000]; +static int comp_index=0; + +#include "flags_x86.h" + +static int cond_codes[]={-1,-1, + NATIVE_CC_HI,NATIVE_CC_LS, + NATIVE_CC_CC,NATIVE_CC_CS, + NATIVE_CC_NE,NATIVE_CC_EQ, + -1,-1, + NATIVE_CC_PL,NATIVE_CC_MI, + NATIVE_CC_GE,NATIVE_CC_LT, + NATIVE_CC_GT,NATIVE_CC_LE + }; + +static void comprintf(const char* format, ...) +{ + va_list args; + + va_start(args,format); + comp_index+=vsprintf(lines+comp_index,format,args); +} + +static void com_discard(void) +{ + comp_index=0; +} + +static void com_flush(void) +{ + int i; + for (i=0;i 0); + n_braces--; + comprintf ("}"); +} + +static void +finish_braces (void) +{ + while (n_braces > 0) + close_brace (); +} + +static void +pop_braces (int to) +{ + while (n_braces > to) + close_brace (); +} + +static int +bit_size (int size) +{ + switch (size) + { + case sz_byte: + return 8; + case sz_word: + return 16; + case sz_long: + return 32; + default: + abort (); + } + return 0; +} + +static const char * +bit_mask (int size) +{ + switch (size) + { + case sz_byte: + return "0xff"; + case sz_word: + return "0xffff"; + case sz_long: + return "0xffffffff"; + default: + abort (); + } + return 0; +} + +static __inline__ void gen_update_next_handler(void) +{ + return; /* Can anything clever be done here? */ +} + +static void gen_writebyte(char* address, char* source) +{ + comprintf("\twritebyte(%s,%s,scratchie);\n",address,source); +} + +static void gen_writeword(char* address, char* source) +{ + comprintf("\twriteword(%s,%s,scratchie);\n",address,source); +} + +static void gen_writelong(char* address, char* source) +{ + comprintf("\twritelong(%s,%s,scratchie);\n",address,source); +} + +static void gen_readbyte(char* address, char* dest) +{ + comprintf("\treadbyte(%s,%s,scratchie);\n",address,dest); +} + +static void gen_readword(char* address, char* dest) +{ + comprintf("\treadword(%s,%s,scratchie);\n",address,dest); +} + +static void gen_readlong(char* address, char* dest) +{ + comprintf("\treadlong(%s,%s,scratchie);\n",address,dest); +} + + + +static const char * +gen_nextilong (void) +{ + static char buffer[80]; + + sprintf (buffer, "comp_get_ilong((m68k_pc_offset+=4)-4)"); + insn_n_cycles += 4; + + long_opcode=1; + return buffer; +} + +static const char * +gen_nextiword (void) +{ + static char buffer[80]; + + sprintf (buffer, "comp_get_iword((m68k_pc_offset+=2)-2)"); + insn_n_cycles+=2; + + long_opcode=1; + return buffer; +} + +static const char * +gen_nextibyte (void) +{ + static char buffer[80]; + + sprintf (buffer, "comp_get_ibyte((m68k_pc_offset+=2)-2)"); + insn_n_cycles += 2; + + long_opcode=1; + return buffer; +} + +static void +swap_opcode (void) +{ + comprintf("#ifdef HAVE_GET_WORD_UNSWAPPED\n"); + comprintf("\topcode = do_byteswap_16(opcode);\n"); + comprintf("#endif\n"); +} + +static void +sync_m68k_pc (void) +{ + comprintf("\t if (m68k_pc_offset>100) sync_m68k_pc();\n"); +} + + +/* getv == 1: fetch data; getv != 0: check for odd address. If movem != 0, + * the calling routine handles Apdi and Aipi modes. + * gb-- movem == 2 means the same thing but for a MOVE16 instruction */ +static void +genamode (amodes mode, char *reg, wordsizes size, char *name, int getv, int movem) +{ + start_brace (); + switch (mode) + { + case Dreg: /* Do we need to check dodgy here? */ + if (movem) + abort (); + if (getv == 1 || getv==2) { + /* We generate the variable even for getv==2, so we can use + it as a destination for MOVE */ + comprintf ("\tint %s=%s;\n",name,reg); + } + return; + + case Areg: + if (movem) + abort (); + if (getv == 1 || getv==2) { + /* see above */ + comprintf ("\tint %s=dodgy?scratchie++:%s+8;\n",name,reg); + if (getv==1) { + comprintf ("\tif (dodgy) \n"); + comprintf ("\t\tmov_l_rr(%s,%s+8);\n",name, reg); + } + } + return; + + case Aind: + comprintf ("\tint %sa=dodgy?scratchie++:%s+8;\n",name,reg); + comprintf ("\tif (dodgy) \n"); + comprintf ("\t\tmov_l_rr(%sa,%s+8);\n",name, reg); + break; + case Aipi: + comprintf ("\tint %sa=scratchie++;\n",name,reg); + comprintf ("\tmov_l_rr(%sa,%s+8);\n",name, reg); + break; + case Apdi: + switch (size) + { + case sz_byte: + if (movem) { + comprintf ("\tint %sa=dodgy?scratchie++:%s+8;\n",name,reg); + comprintf ("\tif (dodgy) \n"); + comprintf("\tmov_l_rr(%sa,8+%s);\n",name,reg); + } + else { + start_brace(); + comprintf ("\tint %sa=dodgy?scratchie++:%s+8;\n",name,reg); + comprintf("\tlea_l_brr(%s+8,%s+8,(uae_s32)-areg_byteinc[%s]);\n",reg,reg,reg); + comprintf ("\tif (dodgy) \n"); + comprintf("\tmov_l_rr(%sa,8+%s);\n",name,reg); + } + break; + case sz_word: + if (movem) { + comprintf ("\tint %sa=dodgy?scratchie++:%s+8;\n",name,reg); + comprintf ("\tif (dodgy) \n"); + comprintf("\tmov_l_rr(%sa,8+%s);\n",name,reg); + } + else { + start_brace(); + comprintf ("\tint %sa=dodgy?scratchie++:%s+8;\n",name,reg); + comprintf("\tlea_l_brr(%s+8,%s+8,-2);\n",reg,reg); + comprintf ("\tif (dodgy) \n"); + comprintf("\tmov_l_rr(%sa,8+%s);\n",name,reg); + } + break; + case sz_long: + if (movem) { + comprintf ("\tint %sa=dodgy?scratchie++:%s+8;\n",name,reg); + comprintf ("\tif (dodgy) \n"); + comprintf("\tmov_l_rr(%sa,8+%s);\n",name,reg); + } + else { + start_brace(); + comprintf ("\tint %sa=dodgy?scratchie++:%s+8;\n",name,reg); + comprintf("\tlea_l_brr(%s+8,%s+8,-4);\n",reg,reg); + comprintf ("\tif (dodgy) \n"); + comprintf("\tmov_l_rr(%sa,8+%s);\n",name,reg); + } + break; + default: + abort (); + } + break; + case Ad16: + comprintf("\tint %sa=scratchie++;\n",name); + comprintf("\tmov_l_rr(%sa,8+%s);\n",name,reg); + comprintf("\tlea_l_brr(%sa,%sa,(uae_s32)(uae_s16)%s);\n",name,name,gen_nextiword()); + break; + case Ad8r: + comprintf("\tint %sa=scratchie++;\n",name); + comprintf("\tcalc_disp_ea_020(%s+8,%s,%sa,scratchie);\n", + reg,gen_nextiword(),name); + break; + + case PC16: + comprintf("\tint %sa=scratchie++;\n",name); + comprintf("\tuae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset;\n"); + comprintf ("\tuae_s32 PC16off = (uae_s32)(uae_s16)%s;\n", gen_nextiword ()); + comprintf("\tmov_l_ri(%sa,address+PC16off);\n",name); + break; + + case PC8r: + comprintf("\tint pctmp=scratchie++;\n"); + comprintf("\tint %sa=scratchie++;\n",name); + comprintf("\tuae_u32 address=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset;\n"); + start_brace(); + comprintf("\tmov_l_ri(pctmp,address);\n"); + + comprintf("\tcalc_disp_ea_020(pctmp,%s,%sa,scratchie);\n", + gen_nextiword(),name); + break; + case absw: + comprintf ("\tint %sa = scratchie++;\n",name); + comprintf ("\tmov_l_ri(%sa,(uae_s32)(uae_s16)%s);\n", name, gen_nextiword ()); + break; + case absl: + comprintf ("\tint %sa = scratchie++;\n",name); + comprintf ("\tmov_l_ri(%sa,%s); /* absl */\n", name, gen_nextilong ()); + break; + case imm: + if (getv != 1) + abort (); + switch (size) + { + case sz_byte: + comprintf ("\tint %s = scratchie++;\n",name); + comprintf ("\tmov_l_ri(%s,(uae_s32)(uae_s8)%s);\n", name, gen_nextibyte ()); + break; + case sz_word: + comprintf ("\tint %s = scratchie++;\n",name); + comprintf ("\tmov_l_ri(%s,(uae_s32)(uae_s16)%s);\n", name, gen_nextiword ()); + break; + case sz_long: + comprintf ("\tint %s = scratchie++;\n",name); + comprintf ("\tmov_l_ri(%s,%s);\n", name, gen_nextilong ()); + break; + default: + abort (); + } + return; + case imm0: + if (getv != 1) + abort (); + comprintf ("\tint %s = scratchie++;\n",name); + comprintf ("\tmov_l_ri(%s,(uae_s32)(uae_s8)%s);\n", name, gen_nextibyte ()); + return; + case imm1: + if (getv != 1) + abort (); + comprintf ("\tint %s = scratchie++;\n",name); + comprintf ("\tmov_l_ri(%s,(uae_s32)(uae_s16)%s);\n", name, gen_nextiword ()); + return; + case imm2: + if (getv != 1) + abort (); + comprintf ("\tint %s = scratchie++;\n",name); + comprintf ("\tmov_l_ri(%s,%s);\n", name, gen_nextilong ()); + return; + case immi: + if (getv != 1) + abort (); + comprintf ("\tint %s = scratchie++;\n",name); + comprintf ("\tmov_l_ri(%s,%s);\n", name, reg); + return; + default: + abort (); + } + + /* We get here for all non-reg non-immediate addressing modes to + * actually fetch the value. */ + if (getv == 1) + { + char astring[80]; + sprintf(astring,"%sa",name); + switch (size) + { + case sz_byte: + insn_n_cycles += 2; + break; + case sz_word: + insn_n_cycles += 2; + break; + case sz_long: + insn_n_cycles += 4; + break; + default: + abort (); + } + start_brace (); + comprintf("\tint %s=scratchie++;\n",name); + switch (size) + { + case sz_byte: + gen_readbyte(astring,name); + break; + case sz_word: + gen_readword(astring,name); + break; + case sz_long: + gen_readlong(astring,name); + break; + default: + abort (); + } + } + + /* We now might have to fix up the register for pre-dec or post-inc + * addressing modes. */ + if (!movem) { + switch (mode) + { + case Aipi: + switch (size) + { + case sz_byte: + comprintf("\tlea_l_brr(%s+8,%s+8,areg_byteinc[%s]);\n",reg,reg,reg); + break; + case sz_word: + comprintf("\tlea_l_brr(%s+8,%s+8,2);\n",reg,reg,reg); + break; + case sz_long: + comprintf("\tlea_l_brr(%s+8,%s+8,4);\n",reg,reg); + break; + default: + abort (); + } + break; + case Apdi: + break; + default: + break; + } + } +} + +static void +genastore (char *from, amodes mode, char *reg, wordsizes size, char *to) +{ + switch (mode) + { + case Dreg: + switch (size) + { + case sz_byte: + comprintf("\tif(%s!=%s)\n",reg,from); + comprintf ("\t\tmov_b_rr(%s,%s);\n", reg, from); + break; + case sz_word: + comprintf("\tif(%s!=%s)\n",reg,from); + comprintf ("\t\tmov_w_rr(%s,%s);\n", reg, from); + break; + case sz_long: + comprintf("\tif(%s!=%s)\n",reg,from); + comprintf ("\t\tmov_l_rr(%s,%s);\n", reg, from); + break; + default: + abort (); + } + break; + case Areg: + switch (size) + { + case sz_word: + comprintf("\tif(%s+8!=%s)\n",reg,from); + comprintf ("\t\tmov_w_rr(%s+8,%s);\n", reg, from); + break; + case sz_long: + comprintf("\tif(%s+8!=%s)\n",reg,from); + comprintf ("\t\tmov_l_rr(%s+8,%s);\n", reg, from); + break; + default: + abort (); + } + break; + + case Apdi: + case absw: + case PC16: + case PC8r: + case Ad16: + case Ad8r: + case Aipi: + case Aind: + case absl: + { + char astring[80]; + sprintf(astring,"%sa",to); + + switch (size) + { + case sz_byte: + insn_n_cycles += 2; + gen_writebyte(astring,from); + break; + case sz_word: + insn_n_cycles += 2; + gen_writeword(astring,from); + break; + case sz_long: + insn_n_cycles += 4; + gen_writelong(astring,from); + break; + default: + abort (); + } + } + break; + case imm: + case imm0: + case imm1: + case imm2: + case immi: + abort (); + break; + default: + abort (); + } +} + +static void genmov16(uae_u32 opcode, struct instr *curi) +{ + comprintf("\tint src=scratchie++;\n"); + comprintf("\tint dst=scratchie++;\n"); + + if ((opcode & 0xfff8) == 0xf620) { + /* MOVE16 (Ax)+,(Ay)+ */ + comprintf("\tuae_u16 dstreg=((%s)>>12)&0x07;\n", gen_nextiword()); + comprintf("\tmov_l_rr(src,8+srcreg);\n"); + comprintf("\tmov_l_rr(dst,8+dstreg);\n"); + } else { + /* Other variants */ + genamode (curi->smode, "srcreg", curi->size, "src", 0, 2); + genamode (curi->dmode, "dstreg", curi->size, "dst", 0, 2); + comprintf("\tmov_l_rr(src,srca);\n"); + comprintf("\tmov_l_rr(dst,dsta);\n"); + } + + /* Align on 16-byte boundaries */ + comprintf("\tand_l_ri(src,~15);\n"); + comprintf("\tand_l_ri(dst,~15);\n"); + + + if ((opcode & 0xfff8) == 0xf620) { + comprintf("\tif (srcreg != dstreg)\n"); + comprintf("\tadd_l_ri(srcreg+8,16);\n"); + comprintf("\tadd_l_ri(dstreg+8,16);\n"); + } else if ((opcode & 0xfff8) == 0xf600) + comprintf("\tadd_l_ri(srcreg+8,16);\n"); + else if ((opcode & 0xfff8) == 0xf608) + comprintf("\tadd_l_ri(dstreg+8,16);\n"); + + comprintf("\tif (special_mem) {\n"); + comprintf("\t\tint tmp=scratchie;\n"); + comprintf("\tscratchie+=4;\n" + "\treadlong(src,tmp,scratchie);\n" + "\twritelong_clobber(dst,tmp,scratchie);\n" + "\tadd_l_ri(src,4);\n" + "\tadd_l_ri(dst,4);\n" + "\treadlong(src,tmp,scratchie);\n" + "\twritelong_clobber(dst,tmp,scratchie);\n" + "\tadd_l_ri(src,4);\n" + "\tadd_l_ri(dst,4);\n" + "\treadlong(src,tmp,scratchie);\n" + "\twritelong_clobber(dst,tmp,scratchie);\n" + "\tadd_l_ri(src,4);\n" + "\tadd_l_ri(dst,4);\n" + "\treadlong(src,tmp,scratchie);\n" + "\twritelong_clobber(dst,tmp,scratchie);\n"); + comprintf("\t} else {\n"); + comprintf("\t\tint tmp=scratchie;\n"); + comprintf("\tscratchie+=4;\n"); + comprintf("\tget_n_addr(src,src,scratchie);\n" + "\tget_n_addr(dst,dst,scratchie);\n" + "\tmov_l_rR(tmp+0,src,0);\n" + "\tmov_l_rR(tmp+1,src,4);\n" + "\tmov_l_rR(tmp+2,src,8);\n" + "\tmov_l_rR(tmp+3,src,12);\n" + "\tmov_l_Rr(dst,tmp+0,0);\n" + "\tforget_about(tmp+0);\n" + "\tmov_l_Rr(dst,tmp+1,4);\n" + "\tforget_about(tmp+1);\n" + "\tmov_l_Rr(dst,tmp+2,8);\n" + "\tforget_about(tmp+2);\n" + "\tmov_l_Rr(dst,tmp+3,12);\t}\n"); + +} + +static void +genmovemel (uae_u16 opcode) +{ + comprintf ("\tuae_u16 mask = %s;\n", gen_nextiword ()); + comprintf ("\tint native=scratchie++;\n"); + comprintf ("\tint i;\n"); + comprintf ("\tint offset=0;\n"); + genamode (table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1); + comprintf("\tif (1 && !special_mem) {\n"); + + /* Fast but unsafe... */ + comprintf("\tget_n_addr(srca,native,scratchie);\n"); + + + comprintf("\tfor (i=0;i<16;i++) {\n" + "\t\tif ((mask>>i)&1) {\n"); + switch(table68k[opcode].size) { + case sz_long: + comprintf("\t\t\tmov_l_rR(i,native,offset);\n" + "\t\t\tmid_bswap_32(i);\n" + "\t\t\toffset+=4;\n"); + break; + case sz_word: + comprintf("\t\t\tmov_w_rR(i,native,offset);\n" + "\t\t\tmid_bswap_16(i);\n" + "\t\t\tsign_extend_16_rr(i,i);\n" + "\t\t\toffset+=2;\n"); + break; + default: abort(); + } + comprintf("\t\t}\n" + "\t}"); + if (table68k[opcode].dmode == Aipi) { + comprintf("\t\t\tlea_l_brr(8+dstreg,srca,offset);\n"); + } + /* End fast but unsafe. */ + + comprintf("\t} else {\n"); + + comprintf ("\tint tmp=scratchie++;\n"); + + comprintf("\tmov_l_rr(tmp,srca);\n"); + comprintf("\tfor (i=0;i<16;i++) {\n" + "\t\tif ((mask>>i)&1) {\n"); + switch(table68k[opcode].size) { + case sz_long: + comprintf("\t\t\treadlong(tmp,i,scratchie);\n" + "\t\t\tadd_l_ri(tmp,4);\n"); + break; + case sz_word: + comprintf("\t\t\treadword(tmp,i,scratchie);\n" + "\t\t\tadd_l_ri(tmp,2);\n"); + break; + default: abort(); + } + + comprintf("\t\t}\n" + "\t}"); + if (table68k[opcode].dmode == Aipi) { + comprintf("\t\t\tmov_l_rr(8+dstreg,tmp);\n"); + } + comprintf("\t}\n"); + +} + + +static void +genmovemle (uae_u16 opcode) +{ + comprintf ("\tuae_u16 mask = %s;\n", gen_nextiword ()); + comprintf ("\tint native=scratchie++;\n"); + comprintf ("\tint i;\n"); + comprintf ("\tint tmp=scratchie++;\n"); + comprintf ("\tsigned char offset=0;\n"); + genamode (table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1); + + /* *Sigh* Some clever geek realized that the fastest way to copy a + buffer from main memory to the gfx card is by using movmle. Good + on her, but unfortunately, gfx mem isn't "real" mem, and thus that + act of cleverness means that movmle must pay attention to special_mem, + or Genetic Species is a rather boring-looking game ;-) */ + comprintf("\tif (1 && !special_mem) {\n"); + comprintf("\tget_n_addr(srca,native,scratchie);\n"); + + if (table68k[opcode].dmode!=Apdi) { + comprintf("\tfor (i=0;i<16;i++) {\n" + "\t\tif ((mask>>i)&1) {\n"); + switch(table68k[opcode].size) { + case sz_long: + comprintf("\t\t\tmov_l_rr(tmp,i);\n" + "\t\t\tmid_bswap_32(tmp);\n" + "\t\t\tmov_l_Rr(native,tmp,offset);\n" + "\t\t\toffset+=4;\n"); + break; + case sz_word: + comprintf("\t\t\tmov_l_rr(tmp,i);\n" + "\t\t\tmid_bswap_16(tmp);\n" + "\t\t\tmov_w_Rr(native,tmp,offset);\n" + "\t\t\toffset+=2;\n"); + break; + default: abort(); + } + } else { /* Pre-decrement */ + comprintf("\tfor (i=0;i<16;i++) {\n" + "\t\tif ((mask>>i)&1) {\n"); + switch(table68k[opcode].size) { + case sz_long: + comprintf("\t\t\toffset-=4;\n" + "\t\t\tmov_l_rr(tmp,15-i);\n" + "\t\t\tmid_bswap_32(tmp);\n" + "\t\t\tmov_l_Rr(native,tmp,offset);\n" + ); + break; + case sz_word: + comprintf("\t\t\toffset-=2;\n" + "\t\t\tmov_l_rr(tmp,15-i);\n" + "\t\t\tmid_bswap_16(tmp);\n" + "\t\t\tmov_w_Rr(native,tmp,offset);\n" + ); + break; + default: abort(); + } + } + + comprintf("\t\t}\n" + "\t}"); + if (table68k[opcode].dmode == Apdi) { + comprintf("\t\t\tlea_l_brr(8+dstreg,srca,(uae_s32)offset);\n"); + } + comprintf("\t} else {\n"); + + if (table68k[opcode].dmode!=Apdi) { + comprintf("\tmov_l_rr(tmp,srca);\n"); + comprintf("\tfor (i=0;i<16;i++) {\n" + "\t\tif ((mask>>i)&1) {\n"); + switch(table68k[opcode].size) { + case sz_long: + comprintf("\t\t\twritelong(tmp,i,scratchie);\n" + "\t\t\tadd_l_ri(tmp,4);\n"); + break; + case sz_word: + comprintf("\t\t\twriteword(tmp,i,scratchie);\n" + "\t\t\tadd_l_ri(tmp,2);\n"); + break; + default: abort(); + } + } + else { /* Pre-decrement */ + comprintf("\tfor (i=0;i<16;i++) {\n" + "\t\tif ((mask>>i)&1) {\n"); + switch(table68k[opcode].size) { + case sz_long: + comprintf("\t\t\tsub_l_ri(srca,4);\n" + "\t\t\twritelong(srca,15-i,scratchie);\n"); + break; + case sz_word: + comprintf("\t\t\tsub_l_ri(srca,2);\n" + "\t\t\twriteword(srca,15-i,scratchie);\n"); + break; + default: abort(); + } + } + + + comprintf("\t\t}\n" + "\t}"); + if (table68k[opcode].dmode == Apdi) { + comprintf("\t\t\tmov_l_rr(8+dstreg,srca);\n"); + } + comprintf("\t}\n"); +} + + +static void +duplicate_carry (void) +{ + comprintf ("\tif (needed_flags&FLAG_X) duplicate_carry();\n"); +} + +typedef enum +{ + flag_logical_noclobber, flag_logical, flag_add, flag_sub, flag_cmp, + flag_addx, flag_subx, flag_zn, flag_av, flag_sv, flag_and, flag_or, + flag_eor, flag_mov +} +flagtypes; + + +static void +genflags (flagtypes type, wordsizes size, char *value, char *src, char *dst) +{ + if (noflags) { + switch(type) { + case flag_cmp: + comprintf("\tdont_care_flags();\n"); + comprintf("/* Weird --- CMP with noflags ;-) */\n"); + return; + case flag_add: + case flag_sub: + comprintf("\tdont_care_flags();\n"); + { + char* op; + switch(type) { + case flag_add: op="add"; break; + case flag_sub: op="sub"; break; + default: abort(); + } + switch (size) + { + case sz_byte: + comprintf("\t%s_b(%s,%s);\n",op,dst,src); + break; + case sz_word: + comprintf("\t%s_w(%s,%s);\n",op,dst,src); + break; + case sz_long: + comprintf("\t%s_l(%s,%s);\n",op,dst,src); + break; + } + return; + } + break; + + case flag_and: + comprintf("\tdont_care_flags();\n"); + switch (size) + { + case sz_byte: + comprintf("if (kill_rodent(dst)) {\n"); + comprintf("\tzero_extend_8_rr(scratchie,%s);\n",src); + comprintf("\tor_l_ri(scratchie,0xffffff00);\n"); + comprintf("\tand_l(%s,scratchie);\n",dst); + comprintf("\tforget_about(scratchie);\n"); + comprintf("\t} else \n" + "\tand_b(%s,%s);\n",dst,src); + break; + case sz_word: + comprintf("if (kill_rodent(dst)) {\n"); + comprintf("\tzero_extend_16_rr(scratchie,%s);\n",src); + comprintf("\tor_l_ri(scratchie,0xffff0000);\n"); + comprintf("\tand_l(%s,scratchie);\n",dst); + comprintf("\tforget_about(scratchie);\n"); + comprintf("\t} else \n" + "\tand_w(%s,%s);\n",dst,src); + break; + case sz_long: + comprintf("\tand_l(%s,%s);\n",dst,src); + break; + } + return; + + case flag_mov: + comprintf("\tdont_care_flags();\n"); + switch (size) + { + case sz_byte: + comprintf("if (kill_rodent(dst)) {\n"); + comprintf("\tzero_extend_8_rr(scratchie,%s);\n",src); + comprintf("\tand_l_ri(%s,0xffffff00);\n",dst); + comprintf("\tor_l(%s,scratchie);\n",dst); + comprintf("\tforget_about(scratchie);\n"); + comprintf("\t} else \n" + "\tmov_b_rr(%s,%s);\n",dst,src); + break; + case sz_word: + comprintf("if (kill_rodent(dst)) {\n"); + comprintf("\tzero_extend_16_rr(scratchie,%s);\n",src); + comprintf("\tand_l_ri(%s,0xffff0000);\n",dst); + comprintf("\tor_l(%s,scratchie);\n",dst); + comprintf("\tforget_about(scratchie);\n"); + comprintf("\t} else \n" + "\tmov_w_rr(%s,%s);\n",dst,src); + break; + case sz_long: + comprintf("\tmov_l_rr(%s,%s);\n",dst,src); + break; + } + return; + + case flag_or: + case flag_eor: + comprintf("\tdont_care_flags();\n"); + start_brace(); + { + char* op; + switch(type) { + case flag_or: op="or"; break; + case flag_eor: op="xor"; break; + default: abort(); + } + switch (size) + { + case sz_byte: + comprintf("if (kill_rodent(dst)) {\n"); + comprintf("\tzero_extend_8_rr(scratchie,%s);\n",src); + comprintf("\t%s_l(%s,scratchie);\n",op,dst); + comprintf("\tforget_about(scratchie);\n"); + comprintf("\t} else \n" + "\t%s_b(%s,%s);\n",op,dst,src); + break; + case sz_word: + comprintf("if (kill_rodent(dst)) {\n"); + comprintf("\tzero_extend_16_rr(scratchie,%s);\n",src); + comprintf("\t%s_l(%s,scratchie);\n",op,dst); + comprintf("\tforget_about(scratchie);\n"); + comprintf("\t} else \n" + "\t%s_w(%s,%s);\n",op,dst,src); + break; + case sz_long: + comprintf("\t%s_l(%s,%s);\n",op,dst,src); + break; + } + close_brace(); + return; + } + + + case flag_addx: + case flag_subx: + + comprintf("\tdont_care_flags();\n"); + { + char* op; + switch(type) { + case flag_addx: op="adc"; break; + case flag_subx: op="sbb"; break; + default: abort(); + } + comprintf("\trestore_carry();\n"); /* Reload the X flag into C */ + switch (size) + { + case sz_byte: + comprintf("\t%s_b(%s,%s);\n",op,dst,src); + break; + case sz_word: + comprintf("\t%s_w(%s,%s);\n",op,dst,src); + break; + case sz_long: + comprintf("\t%s_l(%s,%s);\n",op,dst,src); + break; + } + return; + } + break; + default: return; + } + } + + /* Need the flags, but possibly not all of them */ + switch (type) + { + case flag_logical_noclobber: + failure; + + case flag_and: + case flag_or: + case flag_eor: + comprintf("\tdont_care_flags();\n"); + start_brace(); + { + char* op; + switch(type) { + case flag_and: op="and"; break; + case flag_or: op="or"; break; + case flag_eor: op="xor"; break; + default: abort(); + } + switch (size) + { + case sz_byte: + comprintf("\tstart_needflags();\n" + "\t%s_b(%s,%s);\n",op,dst,src); + break; + case sz_word: + comprintf("\tstart_needflags();\n" + "\t%s_w(%s,%s);\n",op,dst,src); + break; + case sz_long: + comprintf("\tstart_needflags();\n" + "\t%s_l(%s,%s);\n",op,dst,src); + break; + } + comprintf("\tlive_flags();\n"); + comprintf("\tend_needflags();\n"); + close_brace(); + return; + } + + case flag_mov: + comprintf("\tdont_care_flags();\n"); + start_brace(); + { + switch (size) + { + case sz_byte: + comprintf("\tif (%s!=%s) {\n",src,dst); + comprintf("\tmov_b_ri(%s,0);\n" + "\tstart_needflags();\n",dst); + comprintf("\tor_b(%s,%s);\n",dst,src); + comprintf("\t} else {\n"); + comprintf("\tmov_b_rr(%s,%s);\n",dst,src); + comprintf("\ttest_b_rr(%s,%s);\n",dst,dst); + comprintf("\t}\n"); + break; + case sz_word: + comprintf("\tif (%s!=%s) {\n",src,dst); + comprintf("\tmov_w_ri(%s,0);\n" + "\tstart_needflags();\n",dst); + comprintf("\tor_w(%s,%s);\n",dst,src); + comprintf("\t} else {\n"); + comprintf("\tmov_w_rr(%s,%s);\n",dst,src); + comprintf("\ttest_w_rr(%s,%s);\n",dst,dst); + comprintf("\t}\n"); + break; + case sz_long: + comprintf("\tif (%s!=%s) {\n",src,dst); + comprintf("\tmov_l_ri(%s,0);\n" + "\tstart_needflags();\n",dst); + comprintf("\tor_l(%s,%s);\n",dst,src); + comprintf("\t} else {\n"); + comprintf("\tmov_l_rr(%s,%s);\n",dst,src); + comprintf("\ttest_l_rr(%s,%s);\n",dst,dst); + comprintf("\t}\n"); + break; + } + comprintf("\tlive_flags();\n"); + comprintf("\tend_needflags();\n"); + close_brace(); + return; + } + + case flag_logical: + comprintf("\tdont_care_flags();\n"); + start_brace(); + switch (size) + { + case sz_byte: + comprintf("\tstart_needflags();\n" + "\ttest_b_rr(%s,%s);\n",value,value); + break; + case sz_word: + comprintf("\tstart_needflags();\n" + "\ttest_w_rr(%s,%s);\n",value,value); + break; + case sz_long: + comprintf("\tstart_needflags();\n" + "\ttest_l_rr(%s,%s);\n",value,value); + break; + } + comprintf("\tlive_flags();\n"); + comprintf("\tend_needflags();\n"); + close_brace(); + return; + + + case flag_add: + case flag_sub: + case flag_cmp: + comprintf("\tdont_care_flags();\n"); + { + char* op; + switch(type) { + case flag_add: op="add"; break; + case flag_sub: op="sub"; break; + case flag_cmp: op="cmp"; break; + default: abort(); + } + switch (size) + { + case sz_byte: + comprintf("\tstart_needflags();\n" + "\t%s_b(%s,%s);\n",op,dst,src); + break; + case sz_word: + comprintf("\tstart_needflags();\n" + "\t%s_w(%s,%s);\n",op,dst,src); + break; + case sz_long: + comprintf("\tstart_needflags();\n" + "\t%s_l(%s,%s);\n",op,dst,src); + break; + } + comprintf("\tlive_flags();\n"); + comprintf("\tend_needflags();\n"); + if (type!=flag_cmp) { + duplicate_carry(); + } + comprintf("if (!(needed_flags & FLAG_CZNV)) dont_care_flags();\n"); + + return; + } + + case flag_addx: + case flag_subx: + uses_cmov; + comprintf("\tdont_care_flags();\n"); + { + char* op; + switch(type) { + case flag_addx: op="adc"; break; + case flag_subx: op="sbb"; break; + default: abort(); + } + start_brace(); + comprintf("\tint zero=scratchie++;\n" + "\tint one=scratchie++;\n" + "\tif (needed_flags&FLAG_Z) {\n" + "\tmov_l_ri(zero,0);\n" + "\tmov_l_ri(one,1);\n" + "\tmake_flags_live();\n" + "\tcmov_l_rr(zero,one,%d);\n" + "\t}\n",NATIVE_CC_NE); + comprintf("\trestore_carry();\n"); /* Reload the X flag into C */ + switch (size) + { + case sz_byte: + comprintf("\tstart_needflags();\n" + "\t%s_b(%s,%s);\n",op,dst,src); + break; + case sz_word: + comprintf("\tstart_needflags();\n" + "\t%s_w(%s,%s);\n",op,dst,src); + break; + case sz_long: + comprintf("\tstart_needflags();\n" + "\t%s_l(%s,%s);\n",op,dst,src); + break; + } + comprintf("\tlive_flags();\n"); + comprintf("\tif (needed_flags&FLAG_Z) {\n" + "\tcmov_l_rr(zero,one,%d);\n" + "\tsetzflg_l(zero);\n" + "\tlive_flags();\n" + "\t}\n",NATIVE_CC_NE); + comprintf("\tend_needflags();\n"); + duplicate_carry(); + comprintf("if (!(needed_flags & FLAG_CZNV)) dont_care_flags();\n"); + return; + } + default: + failure; + break; + } +} + +static void +force_range_for_rox (const char *var, wordsizes size) +{ + /* Could do a modulo operation here... which one is faster? */ + switch (size) + { + case sz_long: + comprintf ("\tif (%s >= 33) %s -= 33;\n", var, var); + break; + case sz_word: + comprintf ("\tif (%s >= 34) %s -= 34;\n", var, var); + comprintf ("\tif (%s >= 17) %s -= 17;\n", var, var); + break; + case sz_byte: + comprintf ("\tif (%s >= 36) %s -= 36;\n", var, var); + comprintf ("\tif (%s >= 18) %s -= 18;\n", var, var); + comprintf ("\tif (%s >= 9) %s -= 9;\n", var, var); + break; + } +} + +static const char * +cmask (wordsizes size) +{ + switch (size) + { + case sz_byte: + return "0x80"; + case sz_word: + return "0x8000"; + case sz_long: + return "0x80000000"; + default: + abort (); + } +} + +static int +source_is_imm1_8 (struct instr *i) +{ + return i->stype == 3; +} + +static int /* returns zero for success, non-zero for failure */ +gen_opcode (unsigned long int opcode) +{ + struct instr *curi = table68k + opcode; + char* ssize=NULL; + + insn_n_cycles = 2; + global_failure=0; + long_opcode=0; + global_isjump=0; + global_iscjump=0; + global_isaddx=0; + global_cmov=0; + global_mayfail=0; + hack_opcode=opcode; + endstr[0]=0; + + start_brace (); + comprintf("\tuae_u8 scratchie=S1;\n"); + switch (curi->plev) + { + case 0: /* not privileged */ + break; + case 1: /* unprivileged only on 68000 */ + if (cpu_level == 0) + break; + if (next_cpu_level < 0) + next_cpu_level = 0; + + /* fall through */ + case 2: /* priviledged */ + failure; /* Easy ones first */ + break; + case 3: /* privileged if size == word */ + if (curi->size == sz_byte) + break; + failure; + break; + } + switch (curi->size) { + case sz_byte: ssize="b"; break; + case sz_word: ssize="w"; break; + case sz_long: ssize="l"; break; + default: abort(); + } + + switch (curi->mnemo) + { + case i_OR: + case i_AND: + case i_EOR: + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); + switch(curi->mnemo) { + case i_OR: genflags (flag_or, curi->size, "", "src", "dst"); break; + case i_AND: genflags (flag_and, curi->size, "", "src", "dst"); break; + case i_EOR: genflags (flag_eor, curi->size, "", "src", "dst"); break; + } + genastore ("dst", curi->dmode, "dstreg", curi->size, "dst"); + break; + + case i_ORSR: + case i_EORSR: + failure; + isjump; + break; + case i_ANDSR: + failure; + isjump; + break; + case i_SUB: + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); + genflags (flag_sub, curi->size, "", "src", "dst"); + genastore ("dst", curi->dmode, "dstreg", curi->size, "dst"); + break; + case i_SUBA: + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0); + start_brace(); + comprintf("\tint tmp=scratchie++;\n"); + switch(curi->size) { + case sz_byte: comprintf("\tsign_extend_8_rr(tmp,src);\n"); break; + case sz_word: comprintf("\tsign_extend_16_rr(tmp,src);\n"); break; + case sz_long: comprintf("\ttmp=src;\n"); break; + default: abort(); + } + comprintf("\tsub_l(dst,tmp);\n"); + genastore ("dst", curi->dmode, "dstreg", sz_long, "dst"); + break; + case i_SUBX: + isaddx; + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); + genflags (flag_subx, curi->size, "", "src", "dst"); + genastore ("dst", curi->dmode, "dstreg", curi->size, "dst"); + break; + case i_SBCD: + failure; + /* I don't think so! */ + break; + case i_ADD: + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); + genflags (flag_add, curi->size, "", "src", "dst"); + genastore ("dst", curi->dmode, "dstreg", curi->size, "dst"); + break; + case i_ADDA: + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0); + start_brace(); + comprintf("\tint tmp=scratchie++;\n"); + switch(curi->size) { + case sz_byte: comprintf("\tsign_extend_8_rr(tmp,src);\n"); break; + case sz_word: comprintf("\tsign_extend_16_rr(tmp,src);\n"); break; + case sz_long: comprintf("\ttmp=src;\n"); break; + default: abort(); + } + comprintf("\tadd_l(dst,tmp);\n"); + genastore ("dst", curi->dmode, "dstreg", sz_long, "dst"); + break; + case i_ADDX: + isaddx; + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); + start_brace(); + genflags (flag_addx, curi->size, "", "src", "dst"); + genastore ("dst", curi->dmode, "dstreg", curi->size, "dst"); + break; + case i_ABCD: + failure; + /* No BCD maths for me.... */ + break; + case i_NEG: + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + start_brace (); + comprintf("\tint dst=scratchie++;\n"); + comprintf("\tmov_l_ri(dst,0);\n"); + genflags (flag_sub, curi->size, "", "src", "dst"); + genastore ("dst", curi->smode, "srcreg", curi->size, "src"); + break; + case i_NEGX: + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + start_brace (); + comprintf("\tint dst=scratchie++;\n"); + comprintf("\tmov_l_ri(dst,0);\n"); + genflags (flag_subx, curi->size, "", "src", "dst"); + genastore ("dst", curi->smode, "srcreg", curi->size, "src"); + break; + + case i_NBCD: + failure; + /* Nope! */ + break; + case i_CLR: + genamode (curi->smode, "srcreg", curi->size, "src", 2, 0); + start_brace(); + comprintf("\tint dst=scratchie++;\n"); + comprintf("\tmov_l_ri(dst,0);\n"); + genflags (flag_logical, curi->size, "dst", "", ""); + genastore ("dst", curi->smode, "srcreg", curi->size, "src"); + break; + case i_NOT: + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + start_brace (); + comprintf("\tint dst=scratchie++;\n"); + comprintf("\tmov_l_ri(dst,0xffffffff);\n"); + genflags (flag_eor, curi->size, "", "src", "dst"); + genastore ("dst", curi->smode, "srcreg", curi->size, "src"); + break; + case i_TST: + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genflags (flag_logical, curi->size, "src", "", ""); + break; + case i_BCHG: + case i_BCLR: + case i_BSET: + case i_BTST: + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); + start_brace(); + comprintf("\tint s=scratchie++;\n" + "\tmov_l_rr(s,src);\n"); + if (curi->size == sz_byte) + comprintf("\tand_l_ri(s,7);\n"); + else + comprintf("\tand_l_ri(s,31);\n"); + + { + char* op; + int need_write=1; + + switch(curi->mnemo) { + case i_BCHG: op="btc"; break; + case i_BCLR: op="btr"; break; + case i_BSET: op="bts"; break; + case i_BTST: op="bt"; need_write=0; break; + } + comprintf("\t%s_l_rr(dst,s);\n" /* Answer now in C */ + "\tsbb_l(s,s);\n" /* s is 0 if bit was 0, -1 otherwise */ + "\tmake_flags_live();\n" /* Get the flags back */ + "\tdont_care_flags();\n",op); + if (!noflags) { + comprintf("\tstart_needflags();\n" + "\tsetzflg_l(s);\n" + "\tlive_flags();\n" + "\tend_needflags();\n"); + } + if (need_write) + genastore ("dst", curi->dmode, "dstreg", curi->size, "dst"); + } + break; + + case i_CMPM: + case i_CMP: + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); + start_brace (); + genflags (flag_cmp, curi->size, "", "src", "dst"); + break; + case i_CMPA: + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0); + start_brace(); + comprintf("\tint tmps=scratchie++;\n"); + switch(curi->size) { + case sz_byte: comprintf("\tsign_extend_8_rr(tmps,src);\n"); break; + case sz_word: comprintf("\tsign_extend_16_rr(tmps,src);\n"); break; + case sz_long: comprintf("tmps=src;\n"); break; + default: abort(); + } + genflags (flag_cmp, sz_long, "", "tmps", "dst"); + break; + /* The next two are coded a little unconventional, but they are doing + * weird things... */ + case i_MVPRM: + isjump; + failure; + break; + case i_MVPMR: + isjump; + failure; + break; + case i_MOVE: + switch(curi->dmode) { + case Dreg: + case Areg: + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0); + genflags (flag_mov, curi->size, "", "src", "dst"); + genastore ("dst", curi->dmode, "dstreg", curi->size, "dst"); + break; + default: /* It goes to memory, not a register */ + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0); + genflags (flag_logical, curi->size, "src", "", ""); + genastore ("src", curi->dmode, "dstreg", curi->size, "dst"); + break; + } + break; + case i_MOVEA: + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0); + + start_brace(); + comprintf("\tint tmps=scratchie++;\n"); + switch(curi->size) { + case sz_word: comprintf("\tsign_extend_16_rr(dst,src);\n"); break; + case sz_long: comprintf("\tmov_l_rr(dst,src);\n"); break; + default: abort(); + } + genastore ("dst", curi->dmode, "dstreg", sz_long, "dst"); + break; + + case i_MVSR2: + isjump; + failure; + break; + case i_MV2SR: + isjump; + failure; + break; + case i_SWAP: + genamode (curi->smode, "srcreg", sz_long, "src", 1, 0); + comprintf("\tdont_care_flags();\n"); + comprintf("\trol_l_ri(src,16);\n"); + genflags (flag_logical, sz_long, "src", "", ""); + genastore ("src", curi->smode, "srcreg", sz_long, "src"); + break; + case i_EXG: + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); + start_brace(); + comprintf("\tint tmp=scratchie++;\n" + "\tmov_l_rr(tmp,src);\n"); + genastore ("dst", curi->smode, "srcreg", curi->size, "src"); + genastore ("tmp", curi->dmode, "dstreg", curi->size, "dst"); + break; + case i_EXT: + genamode (curi->smode, "srcreg", sz_long, "src", 1, 0); + comprintf("\tdont_care_flags();\n"); + start_brace (); + switch (curi->size) + { + case sz_byte: + comprintf ("\tint dst = src;\n" + "\tsign_extend_8_rr(src,src);\n"); + break; + case sz_word: + comprintf ("\tint dst = scratchie++;\n" + "\tsign_extend_8_rr(dst,src);\n"); + break; + case sz_long: + comprintf ("\tint dst = src;\n" + "\tsign_extend_16_rr(src,src);\n"); + break; + default: + abort (); + } + genflags (flag_logical, + curi->size == sz_word ? sz_word : sz_long, "dst", "", ""); + genastore ("dst", curi->smode, "srcreg", + curi->size == sz_word ? sz_word : sz_long, "src"); + break; + case i_MVMEL: + genmovemel (opcode); + break; + case i_MVMLE: + genmovemle (opcode); + break; + case i_TRAP: + isjump; + failure; + break; + case i_MVR2USP: + isjump; + failure; + break; + case i_MVUSP2R: + isjump; + failure; + break; + case i_RESET: + isjump; + failure; + break; + case i_NOP: + break; + case i_STOP: + isjump; + failure; + break; + case i_RTE: + isjump; + failure; + break; + case i_RTD: + genamode (curi->smode, "srcreg", curi->size, "offs", 1, 0); + /* offs is constant */ + comprintf("\tadd_l_ri(offs,4);\n"); + start_brace(); + comprintf("\tint newad=scratchie++;\n" + "\treadlong(15,newad,scratchie);\n" + "\tand_l_ri(newad,~1);\n" + "\tmov_l_mr((uintptr)®s.pc,newad);\n" + "\tget_n_addr_jmp(newad,PC_P,scratchie);\n" + "\tmov_l_mr((uintptr)®s.pc_oldp,PC_P);\n" + "\tm68k_pc_offset=0;\n" + "\tadd_l(15,offs);\n"); + gen_update_next_handler(); + isjump; + break; + case i_LINK: + genamode (curi->smode, "srcreg", sz_long, "src", 1, 0); + genamode (curi->dmode, "dstreg", curi->size, "offs", 1, 0); + comprintf("\tsub_l_ri(15,4);\n" + "\twritelong_clobber(15,src,scratchie);\n" + "\tmov_l_rr(src,15);\n"); + if (curi->size==sz_word) + comprintf("\tsign_extend_16_rr(offs,offs);\n"); + comprintf("\tadd_l(15,offs);\n"); + genastore ("src", curi->smode, "srcreg", sz_long, "src"); + break; + case i_UNLK: + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + comprintf("\tmov_l_rr(15,src);\n" + "\treadlong(15,src,scratchie);\n" + "\tadd_l_ri(15,4);\n"); + genastore ("src", curi->smode, "srcreg", curi->size, "src"); + break; + case i_RTS: + comprintf("\tint newad=scratchie++;\n" + "\treadlong(15,newad,scratchie);\n" + "\tand_l_ri(newad,~1);\n" + "\tmov_l_mr((uintptr)®s.pc,newad);\n" + "\tget_n_addr_jmp(newad,PC_P,scratchie);\n" + "\tmov_l_mr((uintptr)®s.pc_oldp,PC_P);\n" + "\tm68k_pc_offset=0;\n" + "\tlea_l_brr(15,15,4);\n"); + gen_update_next_handler(); + isjump; + break; + case i_TRAPV: + isjump; + failure; + break; + case i_RTR: + isjump; + failure; + break; + case i_JSR: + isjump; + genamode (curi->smode, "srcreg", curi->size, "src", 0, 0); + start_brace(); + comprintf("\tuae_u32 retadd=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset;\n"); + comprintf("\tint ret=scratchie++;\n" + "\tmov_l_ri(ret,retadd);\n" + "\tsub_l_ri(15,4);\n" + "\twritelong_clobber(15,ret,scratchie);\n"); + comprintf("\tand_l_ri(srca,~1);\n" + "\tmov_l_mr((uintptr)®s.pc,srca);\n" + "\tget_n_addr_jmp(srca,PC_P,scratchie);\n" + "\tmov_l_mr((uintptr)®s.pc_oldp,PC_P);\n" + "\tm68k_pc_offset=0;\n"); + gen_update_next_handler(); + break; + case i_JMP: + isjump; + genamode (curi->smode, "srcreg", curi->size, "src", 0, 0); + comprintf("\tand_l_ri(srca,~1);\n" + "\tmov_l_mr((uintptr)®s.pc,srca);\n" + "\tget_n_addr_jmp(srca,PC_P,scratchie);\n" + "\tmov_l_mr((uintptr)®s.pc_oldp,PC_P);\n" + "\tm68k_pc_offset=0;\n"); + gen_update_next_handler(); + break; + case i_BSR: + if (curi->size==sz_long) + failure; + is_const_jump; + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + comprintf("\tand_l_ri(src,~1);\n"); + start_brace(); + comprintf("\tuae_u32 retadd=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset;\n"); + comprintf("\tint ret=scratchie++;\n" + "\tmov_l_ri(ret,retadd);\n" + "\tsub_l_ri(15,4);\n" + "\twritelong_clobber(15,ret,scratchie);\n"); + comprintf("\tadd_l_ri(src,m68k_pc_offset_thisinst+2);\n"); + comprintf("\tm68k_pc_offset=0;\n"); + comprintf("\tadd_l(PC_P,src);\n"); + + comprintf("\tcomp_pc_p=(uae_u8*)get_const(PC_P);\n"); + break; + case i_Bcc: + comprintf("\tuae_u32 v1,v2;\n"); + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + /* That source is an immediate, so we can clobber it with abandon */ + switch(curi->size) { + case sz_byte: comprintf("\tsign_extend_8_rr(src,src);\n"); break; + case sz_word: comprintf("\tsign_extend_16_rr(src,src);\n"); break; + case sz_long: break; + } + comprintf("\tand_l_ri(src,~1);\n"); + comprintf("\tsub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2);\n"); + /* Leave the following as "add" --- it will allow it to be optimized + away due to src being a constant ;-) */ + comprintf("\tadd_l_ri(src,(uintptr)comp_pc_p);\n"); + comprintf("\tmov_l_ri(PC_P,(uintptr)comp_pc_p);\n"); + /* Now they are both constant. Might as well fold in m68k_pc_offset */ + comprintf("\tadd_l_ri(src,m68k_pc_offset);\n"); + comprintf("\tadd_l_ri(PC_P,m68k_pc_offset);\n"); + comprintf("\tm68k_pc_offset=0;\n"); + + if (curi->cc>=2) { + comprintf("\tv1=get_const(PC_P);\n" + "\tv2=get_const(src);\n" + "\tregister_branch(v1,v2,%d);\n", + cond_codes[curi->cc]); + comprintf("\tmake_flags_live();\n"); /* Load the flags */ + isjump; + } + else { + is_const_jump; + } + + switch(curi->cc) { + case 0: /* Unconditional jump */ + comprintf("\tmov_l_rr(PC_P,src);\n"); + comprintf("\tcomp_pc_p=(uae_u8*)get_const(PC_P);\n"); + break; + case 1: break; /* This is silly! */ + case 8: failure; break; /* Work out details! FIXME */ + case 9: failure; break; /* Not critical, though! */ + + case 2: + case 3: + case 4: + case 5: + case 6: + case 7: + case 10: + case 11: + case 12: + case 13: + case 14: + case 15: + break; + default: abort(); + } + break; + case i_LEA: + genamode (curi->smode, "srcreg", curi->size, "src", 0, 0); + genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0); + genastore ("srca", curi->dmode, "dstreg", curi->size, "dst"); + break; + case i_PEA: + if (table68k[opcode].smode==Areg || + table68k[opcode].smode==Aind || + table68k[opcode].smode==Aipi || + table68k[opcode].smode==Apdi || + table68k[opcode].smode==Ad16 || + table68k[opcode].smode==Ad8r) + comprintf("if (srcreg==7) dodgy=1;\n"); + + genamode (curi->smode, "srcreg", curi->size, "src", 0, 0); + genamode (Apdi, "7", sz_long, "dst", 2, 0); + genastore ("srca", Apdi, "7", sz_long, "dst"); + break; + case i_DBcc: + isjump; + uses_cmov; + genamode (curi->smode, "srcreg", curi->size, "src", 1, 0); + genamode (curi->dmode, "dstreg", curi->size, "offs", 1, 0); + + /* That offs is an immediate, so we can clobber it with abandon */ + switch(curi->size) { + case sz_word: comprintf("\tsign_extend_16_rr(offs,offs);\n"); break; + default: abort(); /* Seems this only comes in word flavour */ + } + comprintf("\tsub_l_ri(offs,m68k_pc_offset-m68k_pc_offset_thisinst-2);\n"); + comprintf("\tadd_l_ri(offs,(uintptr)comp_pc_p);\n"); /* New PC, + once the + offset_68k is + * also added */ + /* Let's fold in the m68k_pc_offset at this point */ + comprintf("\tadd_l_ri(offs,m68k_pc_offset);\n"); + comprintf("\tadd_l_ri(PC_P,m68k_pc_offset);\n"); + comprintf("\tm68k_pc_offset=0;\n"); + + start_brace(); + comprintf("\tint nsrc=scratchie++;\n"); + + if (curi->cc>=2) { + comprintf("\tmake_flags_live();\n"); /* Load the flags */ + } + + if (curi->size!=sz_word) + abort(); + + + switch(curi->cc) { + case 0: /* This is an elaborate nop? */ + break; + case 1: + comprintf("\tstart_needflags();\n"); + comprintf("\tsub_w_ri(src,1);\n"); + comprintf("\t end_needflags();\n"); + start_brace(); + comprintf("\tuae_u32 v2;\n" + "\tuae_u32 v1=get_const(PC_P);\n"); + comprintf("\tv2=get_const(offs);\n" + "\tregister_branch(v1,v2,%d);\n", NATIVE_CC_CC); + break; + + case 8: failure; break; /* Work out details! FIXME */ + case 9: failure; break; /* Not critical, though! */ + + case 2: + case 3: + case 4: + case 5: + case 6: + case 7: + case 10: + case 11: + case 12: + case 13: + case 14: + case 15: + comprintf("\tmov_l_rr(nsrc,src);\n"); + comprintf("\tlea_l_brr(scratchie,src,(uae_s32)-1);\n" + "\tmov_w_rr(src,scratchie);\n"); + comprintf("\tcmov_l_rr(offs,PC_P,%d);\n", + cond_codes[curi->cc]); + comprintf("\tcmov_l_rr(src,nsrc,%d);\n", + cond_codes[curi->cc]); + /* OK, now for cc=true, we have src==nsrc and offs==PC_P, + so whether we move them around doesn't matter. However, + if cc=false, we have offs==jump_pc, and src==nsrc-1 */ + + comprintf("\t start_needflags();\n"); + comprintf("\ttest_w_rr(nsrc,nsrc);\n"); + comprintf("\t end_needflags();\n"); + comprintf("\tcmov_l_rr(PC_P,offs,%d);\n", NATIVE_CC_NE); + break; + default: abort(); + } + genastore ("src", curi->smode, "srcreg", curi->size, "src"); + gen_update_next_handler(); + break; + + case i_Scc: + genamode (curi->smode, "srcreg", curi->size, "src", 2, 0); + start_brace (); + comprintf ("\tint val = scratchie++;\n"); + + /* We set val to 0 if we really should use 255, and to 1 for real 0 */ + switch(curi->cc) { + case 0: /* Unconditional set */ + comprintf("\tmov_l_ri(val,0);\n"); + break; + case 1: + /* Unconditional not-set */ + comprintf("\tmov_l_ri(val,1);\n"); + break; + case 8: failure; break; /* Work out details! FIXME */ + case 9: failure; break; /* Not critical, though! */ + + case 2: + case 3: + case 4: + case 5: + case 6: + case 7: + case 10: + case 11: + case 12: + case 13: + case 14: + case 15: + comprintf("\tmake_flags_live();\n"); /* Load the flags */ + /* All condition codes can be inverted by changing the LSB */ + comprintf("\tsetcc(val,%d);\n", + cond_codes[curi->cc]^1); break; + default: abort(); + } + comprintf("\tsub_b_ri(val,1);\n"); + genastore ("val", curi->smode, "srcreg", curi->size, "src"); + break; + case i_DIVU: + isjump; + failure; + break; + case i_DIVS: + isjump; + failure; + break; + case i_MULU: + comprintf("\tdont_care_flags();\n"); + genamode (curi->smode, "srcreg", sz_word, "src", 1, 0); + genamode (curi->dmode, "dstreg", sz_word, "dst", 1, 0); + /* To do 16x16 unsigned multiplication, we actually use + 32x32 signed, and zero-extend the registers first. + That solves the problem of MUL needing dedicated registers + on the x86 */ + comprintf("\tzero_extend_16_rr(scratchie,src);\n" + "\tzero_extend_16_rr(dst,dst);\n" + "\timul_32_32(dst,scratchie);\n"); + genflags (flag_logical, sz_long, "dst", "", ""); + genastore ("dst", curi->dmode, "dstreg", sz_long, "dst"); + break; + case i_MULS: + comprintf("\tdont_care_flags();\n"); + genamode (curi->smode, "srcreg", sz_word, "src", 1, 0); + genamode (curi->dmode, "dstreg", sz_word, "dst", 1, 0); + comprintf("\tsign_extend_16_rr(scratchie,src);\n" + "\tsign_extend_16_rr(dst,dst);\n" + "\timul_32_32(dst,scratchie);\n"); + genflags (flag_logical, sz_long, "dst", "", ""); + genastore ("dst", curi->dmode, "dstreg", sz_long, "dst"); + break; + case i_CHK: + isjump; + failure; + break; + + case i_CHK2: + isjump; + failure; + break; + + case i_ASR: + mayfail; + if (curi->smode==Dreg) { + comprintf("if ((uae_u32)srcreg==(uae_u32)dstreg) {\n" + " FAIL(1);\n" + " return 0;\n" + "} \n"); + start_brace(); + } + comprintf("\tdont_care_flags();\n"); + + genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0); + genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0); + if (curi->smode!=immi) { + if (!noflags) { + uses_cmov; + start_brace(); + comprintf("\tint highmask;\n" + "\tint width;\n" + "\tint cdata=scratchie++;\n" + "\tint tmpcnt=scratchie++;\n" + "\tint highshift=scratchie++;\n"); + comprintf("\tmov_l_rr(tmpcnt,cnt);\n" + "\tand_l_ri(tmpcnt,63);\n" + "\tmov_l_ri(cdata,0);\n" + "\tcmov_l_rr(cdata,data,%d);\n", NATIVE_CC_NE); + /* cdata is now either data (for shift count!=0) or + 0 (for shift count==0) */ + switch(curi->size) { + case sz_byte: comprintf("\tshra_b_rr(data,cnt);\n" + "\thighmask=0x38;\n" + "\twidth=8;\n"); + break; + case sz_word: comprintf("\tshra_w_rr(data,cnt);\n" + "\thighmask=0x30;\n" + "\twidth=16;\n"); + break; + case sz_long: comprintf("\tshra_l_rr(data,cnt);\n" + "\thighmask=0x20;\n" + "\twidth=32;\n"); + break; + default: abort(); + } + comprintf("test_l_ri(cnt,highmask);\n" + "mov_l_ri(highshift,0);\n" + "mov_l_ri(scratchie,width/2);\n" + "cmov_l_rr(highshift,scratchie,%d);\n", NATIVE_CC_NE); + /* The x86 masks out bits, so we now make sure that things + really get shifted as much as planned */ + switch(curi->size) { + case sz_byte: comprintf("\tshra_b_rr(data,highshift);\n");break; + case sz_word: comprintf("\tshra_w_rr(data,highshift);\n");break; + case sz_long: comprintf("\tshra_l_rr(data,highshift);\n");break; + default: abort(); + } + /* And again */ + switch(curi->size) { + case sz_byte: comprintf("\tshra_b_rr(data,highshift);\n");break; + case sz_word: comprintf("\tshra_w_rr(data,highshift);\n");break; + case sz_long: comprintf("\tshra_l_rr(data,highshift);\n");break; + default: abort(); + } + + /* Result of shift is now in data. Now we need to determine + the carry by shifting cdata one less */ + comprintf("\tsub_l_ri(tmpcnt,1);\n"); + switch(curi->size) { + case sz_byte: comprintf("\tshra_b_rr(cdata,tmpcnt);\n");break; + case sz_word: comprintf("\tshra_w_rr(cdata,tmpcnt);\n");break; + case sz_long: comprintf("\tshra_l_rr(cdata,tmpcnt);\n");break; + default: abort(); + } + /* If the shift count was higher than the width, we need + to pick up the sign from data */ + comprintf("test_l_ri(tmpcnt,highmask);\n" + "cmov_l_rr(cdata,data,%d);\n", NATIVE_CC_NE); + /* And create the flags */ + comprintf("\tstart_needflags();\n"); + comprintf("\tif (needed_flags & FLAG_ZNV)\n"); + switch(curi->size) { + case sz_byte: comprintf("\t test_b_rr(data,data);\n"); break; + case sz_word: comprintf("\t test_w_rr(data,data);\n"); break; + case sz_long: comprintf("\t test_l_rr(data,data);\n"); break; + } + comprintf("\t bt_l_ri(cdata,0);\n"); /* Set C */ + comprintf("\t live_flags();\n"); + comprintf("\t end_needflags();\n"); + comprintf("\t duplicate_carry();\n"); + comprintf("if (!(needed_flags & FLAG_CZNV)) dont_care_flags();\n"); + genastore ("data", curi->dmode, "dstreg", curi->size, "data"); + } + else { + uses_cmov; + start_brace(); + comprintf("\tint highmask;\n" + "\tint width;\n" + "\tint highshift=scratchie++;\n"); + switch(curi->size) { + case sz_byte: comprintf("\tshra_b_rr(data,cnt);\n" + "\thighmask=0x38;\n" + "\twidth=8;\n"); + break; + case sz_word: comprintf("\tshra_w_rr(data,cnt);\n" + "\thighmask=0x30;\n" + "\twidth=16;\n"); + break; + case sz_long: comprintf("\tshra_l_rr(data,cnt);\n" + "\thighmask=0x20;\n" + "\twidth=32;\n"); + break; + default: abort(); + } + comprintf("test_l_ri(cnt,highmask);\n" + "mov_l_ri(highshift,0);\n" + "mov_l_ri(scratchie,width/2);\n" + "cmov_l_rr(highshift,scratchie,%d);\n",NATIVE_CC_NE); + /* The x86 masks out bits, so we now make sure that things + really get shifted as much as planned */ + switch(curi->size) { + case sz_byte: comprintf("\tshra_b_rr(data,highshift);\n");break; + case sz_word: comprintf("\tshra_w_rr(data,highshift);\n");break; + case sz_long: comprintf("\tshra_l_rr(data,highshift);\n");break; + default: abort(); + } + /* And again */ + switch(curi->size) { + case sz_byte: comprintf("\tshra_b_rr(data,highshift);\n");break; + case sz_word: comprintf("\tshra_w_rr(data,highshift);\n");break; + case sz_long: comprintf("\tshra_l_rr(data,highshift);\n");break; + default: abort(); + } + genastore ("data", curi->dmode, "dstreg", curi->size, "data"); + } + } + else { + start_brace(); + comprintf("\tint tmp=scratchie++;\n" + "\tint bp;\n" + "\tmov_l_rr(tmp,data);\n"); + switch(curi->size) { + case sz_byte: comprintf("\tshra_b_ri(data,srcreg);\n" + "\tbp=srcreg-1;\n"); break; + case sz_word: comprintf("\tshra_w_ri(data,srcreg);\n" + "\tbp=srcreg-1;\n"); break; + case sz_long: comprintf("\tshra_l_ri(data,srcreg);\n" + "\tbp=srcreg-1;\n"); break; + default: abort(); + } + + if (!noflags) { + comprintf("\tstart_needflags();\n"); + comprintf("\tif (needed_flags & FLAG_ZNV)\n"); + switch(curi->size) { + case sz_byte: comprintf("\t test_b_rr(data,data);\n"); break; + case sz_word: comprintf("\t test_w_rr(data,data);\n"); break; + case sz_long: comprintf("\t test_l_rr(data,data);\n"); break; + } + comprintf("\t bt_l_ri(tmp,bp);\n"); /* Set C */ + comprintf("\t live_flags();\n"); + comprintf("\t end_needflags();\n"); + comprintf("\t duplicate_carry();\n"); + comprintf("if (!(needed_flags & FLAG_CZNV)) dont_care_flags();\n"); + } + genastore ("data", curi->dmode, "dstreg", curi->size, "data"); + } + break; + + case i_ASL: + mayfail; + if (curi->smode==Dreg) { + comprintf("if ((uae_u32)srcreg==(uae_u32)dstreg) {\n" + " FAIL(1);\n" + " return 0;\n" + "} \n"); + start_brace(); + } + comprintf("\tdont_care_flags();\n"); + /* Except for the handling of the V flag, this is identical to + LSL. The handling of V is, uhm, unpleasant, so if it's needed, + let the normal emulation handle it. Shoulders of giants kinda + thing ;-) */ + comprintf("if (needed_flags & FLAG_V) {\n" + " FAIL(1);\n" + " return 0;\n" + "} \n"); + + genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0); + genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0); + if (curi->smode!=immi) { + if (!noflags) { + uses_cmov; + start_brace(); + comprintf("\tint highmask;\n" + "\tint cdata=scratchie++;\n" + "\tint tmpcnt=scratchie++;\n"); + comprintf("\tmov_l_rr(tmpcnt,cnt);\n" + "\tand_l_ri(tmpcnt,63);\n" + "\tmov_l_ri(cdata,0);\n" + "\tcmov_l_rr(cdata,data,%d);\n",NATIVE_CC_NE); + /* cdata is now either data (for shift count!=0) or + 0 (for shift count==0) */ + switch(curi->size) { + case sz_byte: comprintf("\tshll_b_rr(data,cnt);\n" + "\thighmask=0x38;\n"); + break; + case sz_word: comprintf("\tshll_w_rr(data,cnt);\n" + "\thighmask=0x30;\n"); + break; + case sz_long: comprintf("\tshll_l_rr(data,cnt);\n" + "\thighmask=0x20;\n"); + break; + default: abort(); + } + comprintf("test_l_ri(cnt,highmask);\n" + "mov_l_ri(scratchie,0);\n" + "cmov_l_rr(scratchie,data,%d);\n",NATIVE_CC_EQ); + switch(curi->size) { + case sz_byte: comprintf("\tmov_b_rr(data,scratchie);\n");break; + case sz_word: comprintf("\tmov_w_rr(data,scratchie);\n");break; + case sz_long: comprintf("\tmov_l_rr(data,scratchie);\n");break; + default: abort(); + } + /* Result of shift is now in data. Now we need to determine + the carry by shifting cdata one less */ + comprintf("\tsub_l_ri(tmpcnt,1);\n"); + switch(curi->size) { + case sz_byte: comprintf("\tshll_b_rr(cdata,tmpcnt);\n");break; + case sz_word: comprintf("\tshll_w_rr(cdata,tmpcnt);\n");break; + case sz_long: comprintf("\tshll_l_rr(cdata,tmpcnt);\n");break; + default: abort(); + } + comprintf("test_l_ri(tmpcnt,highmask);\n" + "mov_l_ri(scratchie,0);\n" + "cmov_l_rr(cdata,scratchie,%d);\n",NATIVE_CC_NE); + /* And create the flags */ + comprintf("\tstart_needflags();\n"); + + comprintf("\tif (needed_flags & FLAG_ZNV)\n"); + switch(curi->size) { + case sz_byte: comprintf("\t test_b_rr(data,data);\n"); + comprintf("\t bt_l_ri(cdata,7);\n"); break; + case sz_word: comprintf("\t test_w_rr(data,data);\n"); + comprintf("\t bt_l_ri(cdata,15);\n"); break; + case sz_long: comprintf("\t test_l_rr(data,data);\n"); + comprintf("\t bt_l_ri(cdata,31);\n"); break; + } + comprintf("\t live_flags();\n"); + comprintf("\t end_needflags();\n"); + comprintf("\t duplicate_carry();\n"); + comprintf("if (!(needed_flags & FLAG_CZNV)) dont_care_flags();\n"); + genastore ("data", curi->dmode, "dstreg", curi->size, "data"); + } + else { + uses_cmov; + start_brace(); + comprintf("\tint highmask;\n"); + switch(curi->size) { + case sz_byte: comprintf("\tshll_b_rr(data,cnt);\n" + "\thighmask=0x38;\n"); + break; + case sz_word: comprintf("\tshll_w_rr(data,cnt);\n" + "\thighmask=0x30;\n"); + break; + case sz_long: comprintf("\tshll_l_rr(data,cnt);\n" + "\thighmask=0x20;\n"); + break; + default: abort(); + } + comprintf("test_l_ri(cnt,highmask);\n" + "mov_l_ri(scratchie,0);\n" + "cmov_l_rr(scratchie,data,%d);\n",NATIVE_CC_EQ); + switch(curi->size) { + case sz_byte: comprintf("\tmov_b_rr(data,scratchie);\n");break; + case sz_word: comprintf("\tmov_w_rr(data,scratchie);\n");break; + case sz_long: comprintf("\tmov_l_rr(data,scratchie);\n");break; + default: abort(); + } + genastore ("data", curi->dmode, "dstreg", curi->size, "data"); + } + } + else { + start_brace(); + comprintf("\tint tmp=scratchie++;\n" + "\tint bp;\n" + "\tmov_l_rr(tmp,data);\n"); + switch(curi->size) { + case sz_byte: comprintf("\tshll_b_ri(data,srcreg);\n" + "\tbp=8-srcreg;\n"); break; + case sz_word: comprintf("\tshll_w_ri(data,srcreg);\n" + "\tbp=16-srcreg;\n"); break; + case sz_long: comprintf("\tshll_l_ri(data,srcreg);\n" + "\tbp=32-srcreg;\n"); break; + default: abort(); + } + + if (!noflags) { + comprintf("\tstart_needflags();\n"); + comprintf("\tif (needed_flags & FLAG_ZNV)\n"); + switch(curi->size) { + case sz_byte: comprintf("\t test_b_rr(data,data);\n"); break; + case sz_word: comprintf("\t test_w_rr(data,data);\n"); break; + case sz_long: comprintf("\t test_l_rr(data,data);\n"); break; + } + comprintf("\t bt_l_ri(tmp,bp);\n"); /* Set C */ + comprintf("\t live_flags();\n"); + comprintf("\t end_needflags();\n"); + comprintf("\t duplicate_carry();\n"); + comprintf("if (!(needed_flags & FLAG_CZNV)) dont_care_flags();\n"); + } + genastore ("data", curi->dmode, "dstreg", curi->size, "data"); + } + break; + + case i_LSR: + mayfail; + if (curi->smode==Dreg) { + comprintf("if ((uae_u32)srcreg==(uae_u32)dstreg) {\n" + " FAIL(1);\n" + " return 0;\n" + "} \n"); + start_brace(); + } + comprintf("\tdont_care_flags();\n"); + + genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0); + genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0); + if (curi->smode!=immi) { + if (!noflags) { + uses_cmov; + start_brace(); + comprintf("\tint highmask;\n" + "\tint cdata=scratchie++;\n" + "\tint tmpcnt=scratchie++;\n"); + comprintf("\tmov_l_rr(tmpcnt,cnt);\n" + "\tand_l_ri(tmpcnt,63);\n" + "\tmov_l_ri(cdata,0);\n" + "\tcmov_l_rr(cdata,data,%d);\n",NATIVE_CC_NE); + /* cdata is now either data (for shift count!=0) or + 0 (for shift count==0) */ + switch(curi->size) { + case sz_byte: comprintf("\tshrl_b_rr(data,cnt);\n" + "\thighmask=0x38;\n"); + break; + case sz_word: comprintf("\tshrl_w_rr(data,cnt);\n" + "\thighmask=0x30;\n"); + break; + case sz_long: comprintf("\tshrl_l_rr(data,cnt);\n" + "\thighmask=0x20;\n"); + break; + default: abort(); + } + comprintf("test_l_ri(cnt,highmask);\n" + "mov_l_ri(scratchie,0);\n" + "cmov_l_rr(scratchie,data,%d);\n",NATIVE_CC_EQ); + switch(curi->size) { + case sz_byte: comprintf("\tmov_b_rr(data,scratchie);\n");break; + case sz_word: comprintf("\tmov_w_rr(data,scratchie);\n");break; + case sz_long: comprintf("\tmov_l_rr(data,scratchie);\n");break; + default: abort(); + } + /* Result of shift is now in data. Now we need to determine + the carry by shifting cdata one less */ + comprintf("\tsub_l_ri(tmpcnt,1);\n"); + switch(curi->size) { + case sz_byte: comprintf("\tshrl_b_rr(cdata,tmpcnt);\n");break; + case sz_word: comprintf("\tshrl_w_rr(cdata,tmpcnt);\n");break; + case sz_long: comprintf("\tshrl_l_rr(cdata,tmpcnt);\n");break; + default: abort(); + } + comprintf("test_l_ri(tmpcnt,highmask);\n" + "mov_l_ri(scratchie,0);\n" + "cmov_l_rr(cdata,scratchie,%d);\n",NATIVE_CC_NE); + /* And create the flags */ + comprintf("\tstart_needflags();\n"); + comprintf("\tif (needed_flags & FLAG_ZNV)\n"); + switch(curi->size) { + case sz_byte: comprintf("\t test_b_rr(data,data);\n"); break; + case sz_word: comprintf("\t test_w_rr(data,data);\n"); break; + case sz_long: comprintf("\t test_l_rr(data,data);\n"); break; + } + comprintf("\t bt_l_ri(cdata,0);\n"); /* Set C */ + comprintf("\t live_flags();\n"); + comprintf("\t end_needflags();\n"); + comprintf("\t duplicate_carry();\n"); + comprintf("if (!(needed_flags & FLAG_CZNV)) dont_care_flags();\n"); + genastore ("data", curi->dmode, "dstreg", curi->size, "data"); + } + else { + uses_cmov; + start_brace(); + comprintf("\tint highmask;\n"); + switch(curi->size) { + case sz_byte: comprintf("\tshrl_b_rr(data,cnt);\n" + "\thighmask=0x38;\n"); + break; + case sz_word: comprintf("\tshrl_w_rr(data,cnt);\n" + "\thighmask=0x30;\n"); + break; + case sz_long: comprintf("\tshrl_l_rr(data,cnt);\n" + "\thighmask=0x20;\n"); + break; + default: abort(); + } + comprintf("test_l_ri(cnt,highmask);\n" + "mov_l_ri(scratchie,0);\n" + "cmov_l_rr(scratchie,data,%d);\n",NATIVE_CC_EQ); + switch(curi->size) { + case sz_byte: comprintf("\tmov_b_rr(data,scratchie);\n");break; + case sz_word: comprintf("\tmov_w_rr(data,scratchie);\n");break; + case sz_long: comprintf("\tmov_l_rr(data,scratchie);\n");break; + default: abort(); + } + genastore ("data", curi->dmode, "dstreg", curi->size, "data"); + } + } + else { + start_brace(); + comprintf("\tint tmp=scratchie++;\n" + "\tint bp;\n" + "\tmov_l_rr(tmp,data);\n"); + switch(curi->size) { + case sz_byte: comprintf("\tshrl_b_ri(data,srcreg);\n" + "\tbp=srcreg-1;\n"); break; + case sz_word: comprintf("\tshrl_w_ri(data,srcreg);\n" + "\tbp=srcreg-1;\n"); break; + case sz_long: comprintf("\tshrl_l_ri(data,srcreg);\n" + "\tbp=srcreg-1;\n"); break; + default: abort(); + } + + if (!noflags) { + comprintf("\tstart_needflags();\n"); + comprintf("\tif (needed_flags & FLAG_ZNV)\n"); + switch(curi->size) { + case sz_byte: comprintf("\t test_b_rr(data,data);\n"); break; + case sz_word: comprintf("\t test_w_rr(data,data);\n"); break; + case sz_long: comprintf("\t test_l_rr(data,data);\n"); break; + } + comprintf("\t bt_l_ri(tmp,bp);\n"); /* Set C */ + comprintf("\t live_flags();\n"); + comprintf("\t end_needflags();\n"); + comprintf("\t duplicate_carry();\n"); + comprintf("if (!(needed_flags & FLAG_CZNV)) dont_care_flags();\n"); + } + genastore ("data", curi->dmode, "dstreg", curi->size, "data"); + } + break; + + case i_LSL: + comprintf("\tdont_care_flags();\n"); + + genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0); + genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0); + if (curi->smode!=immi) { + if (!noflags) { + uses_cmov; + start_brace(); + comprintf("\tint highmask;\n" + "\tint cdata=scratchie++;\n" + "\tint tmpcnt=scratchie++;\n"); + comprintf("\tmov_l_rr(tmpcnt,cnt);\n" + "\tand_l_ri(tmpcnt,63);\n" + "\tmov_l_ri(cdata,0);\n" + "\tcmov_l_rr(cdata,data,%d);\n",NATIVE_CC_NE); + /* cdata is now either data (for shift count!=0) or + 0 (for shift count==0) */ + switch(curi->size) { + case sz_byte: comprintf("\tshll_b_rr(data,cnt);\n" + "\thighmask=0x38;\n"); + break; + case sz_word: comprintf("\tshll_w_rr(data,cnt);\n" + "\thighmask=0x30;\n"); + break; + case sz_long: comprintf("\tshll_l_rr(data,cnt);\n" + "\thighmask=0x20;\n"); + break; + default: abort(); + } + comprintf("test_l_ri(cnt,highmask);\n" + "mov_l_ri(scratchie,0);\n" + "cmov_l_rr(scratchie,data,%d);\n",NATIVE_CC_EQ); + switch(curi->size) { + case sz_byte: comprintf("\tmov_b_rr(data,scratchie);\n");break; + case sz_word: comprintf("\tmov_w_rr(data,scratchie);\n");break; + case sz_long: comprintf("\tmov_l_rr(data,scratchie);\n");break; + default: abort(); + } + /* Result of shift is now in data. Now we need to determine + the carry by shifting cdata one less */ + comprintf("\tsub_l_ri(tmpcnt,1);\n"); + switch(curi->size) { + case sz_byte: comprintf("\tshll_b_rr(cdata,tmpcnt);\n");break; + case sz_word: comprintf("\tshll_w_rr(cdata,tmpcnt);\n");break; + case sz_long: comprintf("\tshll_l_rr(cdata,tmpcnt);\n");break; + default: abort(); + } + comprintf("test_l_ri(tmpcnt,highmask);\n" + "mov_l_ri(scratchie,0);\n" + "cmov_l_rr(cdata,scratchie,%d);\n",NATIVE_CC_NE); + /* And create the flags */ + comprintf("\tstart_needflags();\n"); + comprintf("\tif (needed_flags & FLAG_ZNV)\n"); + switch(curi->size) { + case sz_byte: comprintf("\t test_b_rr(data,data);\n"); + comprintf("\t bt_l_ri(cdata,7);\n"); break; + case sz_word: comprintf("\t test_w_rr(data,data);\n"); + comprintf("\t bt_l_ri(cdata,15);\n"); break; + case sz_long: comprintf("\t test_l_rr(data,data);\n"); + comprintf("\t bt_l_ri(cdata,31);\n"); break; + } + comprintf("\t live_flags();\n"); + comprintf("\t end_needflags();\n"); + comprintf("\t duplicate_carry();\n"); + comprintf("if (!(needed_flags & FLAG_CZNV)) dont_care_flags();\n"); + genastore ("data", curi->dmode, "dstreg", curi->size, "data"); + } + else { + uses_cmov; + start_brace(); + comprintf("\tint highmask;\n"); + switch(curi->size) { + case sz_byte: comprintf("\tshll_b_rr(data,cnt);\n" + "\thighmask=0x38;\n"); + break; + case sz_word: comprintf("\tshll_w_rr(data,cnt);\n" + "\thighmask=0x30;\n"); + break; + case sz_long: comprintf("\tshll_l_rr(data,cnt);\n" + "\thighmask=0x20;\n"); + break; + default: abort(); + } + comprintf("test_l_ri(cnt,highmask);\n" + "mov_l_ri(scratchie,0);\n" + "cmov_l_rr(scratchie,data,%d);\n",NATIVE_CC_EQ); + switch(curi->size) { + case sz_byte: comprintf("\tmov_b_rr(data,scratchie);\n");break; + case sz_word: comprintf("\tmov_w_rr(data,scratchie);\n");break; + case sz_long: comprintf("\tmov_l_rr(data,scratchie);\n");break; + default: abort(); + } + genastore ("data", curi->dmode, "dstreg", curi->size, "data"); + } + } + else { + start_brace(); + comprintf("\tint tmp=scratchie++;\n" + "\tint bp;\n" + "\tmov_l_rr(tmp,data);\n"); + switch(curi->size) { + case sz_byte: comprintf("\tshll_b_ri(data,srcreg);\n" + "\tbp=8-srcreg;\n"); break; + case sz_word: comprintf("\tshll_w_ri(data,srcreg);\n" + "\tbp=16-srcreg;\n"); break; + case sz_long: comprintf("\tshll_l_ri(data,srcreg);\n" + "\tbp=32-srcreg;\n"); break; + default: abort(); + } + + if (!noflags) { + comprintf("\tstart_needflags();\n"); + comprintf("\tif (needed_flags & FLAG_ZNV)\n"); + switch(curi->size) { + case sz_byte: comprintf("\t test_b_rr(data,data);\n"); break; + case sz_word: comprintf("\t test_w_rr(data,data);\n"); break; + case sz_long: comprintf("\t test_l_rr(data,data);\n"); break; + } + comprintf("\t bt_l_ri(tmp,bp);\n"); /* Set C */ + comprintf("\t live_flags();\n"); + comprintf("\t end_needflags();\n"); + comprintf("\t duplicate_carry();\n"); + comprintf("if (!(needed_flags & FLAG_CZNV)) dont_care_flags();\n"); + } + genastore ("data", curi->dmode, "dstreg", curi->size, "data"); + } + break; + + case i_ROL: + mayfail; + if (curi->smode==Dreg) { + comprintf("if ((uae_u32)srcreg==(uae_u32)dstreg) {\n" + " FAIL(1);\n" + " return 0;\n" + "} \n"); + start_brace(); + } + comprintf("\tdont_care_flags();\n"); + genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0); + genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0); + start_brace (); + + switch(curi->size) { + case sz_long: comprintf("\t rol_l_rr(data,cnt);\n"); break; + case sz_word: comprintf("\t rol_w_rr(data,cnt);\n"); break; + case sz_byte: comprintf("\t rol_b_rr(data,cnt);\n"); break; + } + + if (!noflags) { + comprintf("\tstart_needflags();\n"); + comprintf("\tif (needed_flags & FLAG_ZNV)\n"); + switch(curi->size) { + case sz_byte: comprintf("\t test_b_rr(data,data);\n"); break; + case sz_word: comprintf("\t test_w_rr(data,data);\n"); break; + case sz_long: comprintf("\t test_l_rr(data,data);\n"); break; + } + comprintf("\t bt_l_ri(data,0x00);\n"); /* Set C */ + comprintf("\t live_flags();\n"); + comprintf("\t end_needflags();\n"); + } + genastore ("data", curi->dmode, "dstreg", curi->size, "data"); + break; + + case i_ROR: + mayfail; + if (curi->smode==Dreg) { + comprintf("if ((uae_u32)srcreg==(uae_u32)dstreg) {\n" + " FAIL(1);\n" + " return 0;\n" + "} \n"); + start_brace(); + } + comprintf("\tdont_care_flags();\n"); + genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0); + genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0); + start_brace (); + + switch(curi->size) { + case sz_long: comprintf("\t ror_l_rr(data,cnt);\n"); break; + case sz_word: comprintf("\t ror_w_rr(data,cnt);\n"); break; + case sz_byte: comprintf("\t ror_b_rr(data,cnt);\n"); break; + } + + if (!noflags) { + comprintf("\tstart_needflags();\n"); + comprintf("\tif (needed_flags & FLAG_ZNV)\n"); + switch(curi->size) { + case sz_byte: comprintf("\t test_b_rr(data,data);\n"); break; + case sz_word: comprintf("\t test_w_rr(data,data);\n"); break; + case sz_long: comprintf("\t test_l_rr(data,data);\n"); break; + } + switch(curi->size) { + case sz_byte: comprintf("\t bt_l_ri(data,0x07);\n"); break; + case sz_word: comprintf("\t bt_l_ri(data,0x0f);\n"); break; + case sz_long: comprintf("\t bt_l_ri(data,0x1f);\n"); break; + } + comprintf("\t live_flags();\n"); + comprintf("\t end_needflags();\n"); + } + genastore ("data", curi->dmode, "dstreg", curi->size, "data"); + break; + + case i_ROXL: + failure; + break; + case i_ROXR: + failure; + break; + case i_ASRW: + failure; + break; + case i_ASLW: + failure; + break; + case i_LSRW: + failure; + break; + case i_LSLW: + failure; + break; + case i_ROLW: + failure; + break; + case i_RORW: + failure; + break; + case i_ROXLW: + failure; + break; + case i_ROXRW: + failure; + break; + case i_MOVEC2: + isjump; + failure; + break; + case i_MOVE2C: + isjump; + failure; + break; + case i_CAS: + failure; + break; + case i_CAS2: + failure; + break; + case i_MOVES: /* ignore DFC and SFC because we have no MMU */ + isjump; + failure; + break; + case i_BKPT: /* only needed for hardware emulators */ + isjump; + failure; + break; + case i_CALLM: /* not present in 68030 */ + isjump; + failure; + break; + case i_RTM: /* not present in 68030 */ + isjump; + failure; + break; + case i_TRAPcc: + isjump; + failure; + break; + case i_DIVL: + isjump; + failure; + break; + case i_MULL: + if (!noflags) { + failure; + break; + } + comprintf("\tuae_u16 extra=%s;\n",gen_nextiword()); + comprintf("\tint r2=(extra>>12)&7;\n" + "\tint tmp=scratchie++;\n"); + + genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0); + /* The two operands are in dst and r2 */ + comprintf("\tif (extra&0x0400) {\n" /* Need full 64 bit result */ + "\tint r3=(extra&7);\n" + "\tmov_l_rr(r3,dst);\n"); /* operands now in r3 and r2 */ + comprintf("\tif (extra&0x0800) { \n" /* signed */ + "\t\timul_64_32(r2,r3);\n" + "\t} else { \n" + "\t\tmul_64_32(r2,r3);\n" + "\t} \n"); + /* The result is in r2/tmp, with r2 holding the lower 32 bits */ + comprintf("\t} else {\n"); /* Only want 32 bit result */ + /* operands in dst and r2, result foes into r2 */ + /* shouldn't matter whether it's signed or unsigned?!? */ + comprintf("\timul_32_32(r2,dst);\n" + "\t}\n"); + break; + + case i_BFTST: + case i_BFEXTU: + case i_BFCHG: + case i_BFEXTS: + case i_BFCLR: + case i_BFFFO: + case i_BFSET: + case i_BFINS: + failure; + break; + case i_PACK: + failure; + break; + case i_UNPK: + failure; + break; + case i_TAS: + failure; + break; + case i_FPP: + mayfail; + comprintf("\tuae_u16 extra=%s;\n",gen_nextiword()); + swap_opcode(); + comprintf("\tcomp_fpp_opp(opcode,extra);\n"); + break; + case i_FBcc: + isjump; + uses_cmov; + mayfail; + swap_opcode(); + comprintf("\tcomp_fbcc_opp(opcode);\n"); + break; + case i_FDBcc: + isjump; + failure; + break; + case i_FScc: + mayfail; + uses_cmov; + comprintf("\tuae_u16 extra=%s;\n",gen_nextiword()); + swap_opcode(); + comprintf("\tcomp_fscc_opp(opcode,extra);\n"); + break; + case i_FTRAPcc: + isjump; + failure; + break; + case i_FSAVE: + failure; + break; + case i_FRESTORE: + failure; + break; + + case i_CINVL: + case i_CINVP: + case i_CINVA: + isjump; /* Not really, but it's probably a good idea to stop + translating at this point */ + failure; + comprintf ("\tflush_icache();\n"); /* Differentiate a bit more? */ + break; + case i_CPUSHL: + case i_CPUSHP: + case i_CPUSHA: + isjump; /* Not really, but it's probably a good idea to stop + translating at this point */ + failure; + break; + case i_MOVE16: + genmov16(opcode,curi); + break; + + case i_MMUOP: + case i_MMUOP30A: + case i_MMUOP30B: + isjump; + failure; + break; + default: + abort (); + break; + } + comprintf("%s",endstr); + finish_braces (); + sync_m68k_pc (); + if (global_mayfail) + comprintf("\tif (failure) m68k_pc_offset=m68k_pc_offset_thisinst;\n"); + return global_failure; +} + +static void +generate_includes (FILE * f) +{ + fprintf (f, "#include \"sysconfig.h\"\n"); + fprintf (f, "#if defined(JIT)\n"); + fprintf (f, "#include \"sysdeps.h\"\n"); + fprintf (f, "#include \"options.h\"\n"); + fprintf (f, "#include \"memory.h\"\n"); + fprintf (f, "#include \"custom.h\"\n"); + fprintf (f, "#include \"events.h\"\n"); + fprintf (f, "#include \"newcpu.h\"\n"); + fprintf (f, "#include \"comptbl.h\"\n"); +} + +static int postfix; + +static void +generate_one_opcode (int rp, int noflags) +{ + int i; + uae_u16 smsk, dmsk; + long int opcode = opcode_map[rp]; + int aborted=0; + int have_srcreg=0; + int have_dstreg=0; + + if (table68k[opcode].mnemo == i_ILLG + || table68k[opcode].clev > cpu_level) + return; + + for (i = 0; lookuptab[i].name[0]; i++) + { + if (table68k[opcode].mnemo == lookuptab[i].mnemo) + break; + } + + if (table68k[opcode].handler != -1) + return; + + switch (table68k[opcode].stype) + { + case 0: smsk = 7; break; + case 1: smsk = 255; break; + case 2: smsk = 15; break; + case 3: smsk = 7; break; + case 4: smsk = 7; break; + case 5: smsk = 63; break; + case 6: smsk = 255; break; + case 7: smsk = 3; break; + default: abort (); + } + dmsk = 7; + + next_cpu_level = -1; + if (table68k[opcode].suse + && table68k[opcode].smode != imm && table68k[opcode].smode != imm0 + && table68k[opcode].smode != imm1 && table68k[opcode].smode != imm2 + && table68k[opcode].smode != absw && table68k[opcode].smode != absl + && table68k[opcode].smode != PC8r && table68k[opcode].smode != PC16) + { + have_srcreg=1; + if (table68k[opcode].spos == -1) + { + if (((int) table68k[opcode].sreg) >= 128) + comprintf ("\tuae_s32 srcreg = (uae_s32)(uae_s8)%d;\n", (int) table68k[opcode].sreg); + else + comprintf ("\tuae_s32 srcreg = %d;\n", (int) table68k[opcode].sreg); + } + else + { + char source[100]; + int pos = table68k[opcode].spos; + + comprintf ("#ifdef HAVE_GET_WORD_UNSWAPPED\n"); + + if (pos < 8 && (smsk >> (8 - pos)) != 0) + sprintf (source, "(((opcode >> %d) | (opcode << %d)) & %d)", + pos ^ 8, 8 - pos, dmsk); + else if (pos != 8) + sprintf (source, "((opcode >> %d) & %d)", pos ^ 8, smsk); + else + sprintf (source, "(opcode & %d)", smsk); + + if (table68k[opcode].stype == 3) + comprintf ("\tuae_u32 srcreg = imm8_table[%s];\n", source); + else if (table68k[opcode].stype == 1) + comprintf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%s;\n", source); + else + comprintf ("\tuae_u32 srcreg = %s;\n", source); + + comprintf ("#else\n"); + + if (pos) + sprintf (source, "((opcode >> %d) & %d)", pos, smsk); + else + sprintf (source, "(opcode & %d)", smsk); + + if (table68k[opcode].stype == 3) + comprintf ("\tuae_s32 srcreg = imm8_table[%s];\n", source); + else if (table68k[opcode].stype == 1) + comprintf ("\tuae_s32 srcreg = (uae_s32)(uae_s8)%s;\n", source); + else + comprintf ("\tuae_s32 srcreg = %s;\n", source); + + comprintf ("#endif\n"); + } + } + if (table68k[opcode].duse + /* Yes, the dmode can be imm, in case of LINK or DBcc */ + && table68k[opcode].dmode != imm && table68k[opcode].dmode != imm0 + && table68k[opcode].dmode != imm1 && table68k[opcode].dmode != imm2 + && table68k[opcode].dmode != absw && table68k[opcode].dmode != absl) + { + have_dstreg=1; + if (table68k[opcode].dpos == -1) + { + if (((int) table68k[opcode].dreg) >= 128) + comprintf ("\tuae_s32 dstreg = (uae_s32)(uae_s8)%d;\n", (int) table68k[opcode].dreg); + else + comprintf ("\tuae_s32 dstreg = %d;\n", (int) table68k[opcode].dreg); + } + else + { + int pos = table68k[opcode].dpos; + + comprintf ("#ifdef HAVE_GET_WORD_UNSWAPPED\n"); + + if (pos < 8 && (dmsk >> (8 - pos)) != 0) + comprintf ("\tuae_u32 dstreg = ((opcode >> %d) | (opcode << %d)) & %d;\n", + pos ^ 8, 8 - pos, dmsk); + else if (pos != 8) + comprintf ("\tuae_u32 dstreg = (opcode >> %d) & %d;\n", + pos ^ 8, dmsk); + else + comprintf ("\tuae_u32 dstreg = opcode & %d;\n", dmsk); + + comprintf ("#else\n"); + + if (pos) + comprintf ("\tuae_u32 dstreg = (opcode >> %d) & %d;\n", + pos, dmsk); + else + comprintf ("\tuae_u32 dstreg = opcode & %d;\n", dmsk); + + comprintf ("#endif\n"); + } + } + + if (have_srcreg && have_dstreg && + (table68k[opcode].dmode==Areg || + table68k[opcode].dmode==Aind || + table68k[opcode].dmode==Aipi || + table68k[opcode].dmode==Apdi || + table68k[opcode].dmode==Ad16 || + table68k[opcode].dmode==Ad8r) && + (table68k[opcode].smode==Areg || + table68k[opcode].smode==Aind || + table68k[opcode].smode==Aipi || + table68k[opcode].smode==Apdi || + table68k[opcode].smode==Ad16 || + table68k[opcode].smode==Ad8r) + ) { + comprintf("\tuae_u32 dodgy=(srcreg==(uae_s32)dstreg);\n"); + } + else { + comprintf("\tuae_u32 dodgy=0;\n"); + } + comprintf("\tuae_u32 m68k_pc_offset_thisinst=m68k_pc_offset;\n"); + comprintf("\tm68k_pc_offset+=2;\n"); + + aborted=gen_opcode (opcode); + { + int flags=0; + if (global_isjump) flags|=1; + if (long_opcode) flags|=2; + if (global_cmov) flags|=4; + if (global_isaddx) flags|=8; + if (global_iscjump) flags|=16; + comprintf ("return 0;\n"); + comprintf ("}\n"); + + if (aborted) { + fprintf (stblfile, "{ NULL, %ld, 0x%08x }, /* %s */\n", opcode, flags, lookuptab[i].name); + com_discard(); + } else { + if (noflags) { + fprintf (stblfile, "{ op_%lx_%d_comp_nf, %ld, 0x%08x }, /* %s */\n", opcode, postfix, opcode, flags, lookuptab[i].name); + fprintf (headerfile, "extern compop_func op_%lx_%d_comp_nf;\n", opcode, postfix); + printf ("unsigned long REGPARAM2 op_%lx_%d_comp_nf(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, lookuptab[i].name); + } else { + fprintf (stblfile, "{ op_%lx_%d_comp_ff, %ld, 0x%08x }, /* %s */\n", opcode, postfix, opcode, flags, lookuptab[i].name); + fprintf (headerfile, "extern compop_func op_%lx_%d_comp_ff;\n", opcode, postfix); + printf ("unsigned long REGPARAM2 op_%lx_%d_comp_ff(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, lookuptab[i].name); + } + com_flush(); + } + } + opcode_next_clev[rp] = next_cpu_level; + opcode_last_postfix[rp] = postfix; +} + +static void +generate_func (int noflags) +{ + int i, j, rp; + + using_prefetch = 0; + using_exception_3 = 0; + for (i = 0; i < 1; i++) /* We only do one level! */ + { + cpu_level = 5 - i; + postfix = i; + + if (noflags) + fprintf (stblfile, "const struct comptbl op_smalltbl_%d_comp_nf[] = {\n", postfix); + else + fprintf (stblfile, "const struct comptbl op_smalltbl_%d_comp_ff[] = {\n", postfix); + + + /* sam: this is for people with low memory (eg. me :)) */ + printf ("\n" + "#if !defined(PART_1) && !defined(PART_2) && " + "!defined(PART_3) && !defined(PART_4) && " + "!defined(PART_5) && !defined(PART_6) && " + "!defined(PART_7) && !defined(PART_8)" + "\n" + "#define PART_1 1\n" + "#define PART_2 1\n" + "#define PART_3 1\n" + "#define PART_4 1\n" + "#define PART_5 1\n" + "#define PART_6 1\n" + "#define PART_7 1\n" + "#define PART_8 1\n" + "#endif\n\n" + "extern void setzflg_l();\n" + "extern void comp_fpp_opp();\n" + "extern void comp_fscc_opp();\n" + "extern void comp_fbcc_opp();\n\n"); + + rp = 0; + for (j = 1; j <= 8; ++j) + { + int k = (j * nr_cpuop_funcs) / 8; + printf ("#ifdef PART_%d\n", j); + for (; rp < k; rp++) + generate_one_opcode (rp,noflags); + printf ("#endif\n\n"); + } + + fprintf (stblfile, "{ 0, 65536, 0 }};\n"); + } + +} + +int +main (int argc, char **argv) +{ + read_table68k (); + do_merges (); + + opcode_map = (int *) malloc (sizeof (int) * nr_cpuop_funcs); + opcode_last_postfix = (int *) malloc (sizeof (int) * nr_cpuop_funcs); + opcode_next_clev = (int *) malloc (sizeof (int) * nr_cpuop_funcs); + counts = (unsigned long *) malloc (65536 * sizeof (unsigned long)); + read_counts (); + + /* It would be a lot nicer to put all in one file (we'd also get rid of + * cputbl.h that way), but cpuopti can't cope. That could be fixed, but + * I don't dare to touch the 68k version. */ + + headerfile = fopen ("comptbl.h", "wb"); + stblfile = fopen ("compstbl.c", "wb"); + freopen ("compemu.c", "wb", stdout); + + generate_includes (stdout); + generate_includes (stblfile); + + printf("#include \"compemu.h\"\n"); + + noflags=0; + generate_func (noflags); + + free(opcode_map); + free(opcode_last_postfix); + free(opcode_next_clev); + free(counts); + + opcode_map = (int *) malloc (sizeof (int) * nr_cpuop_funcs); + opcode_last_postfix = (int *) malloc (sizeof (int) * nr_cpuop_funcs); + opcode_next_clev = (int *) malloc (sizeof (int) * nr_cpuop_funcs); + counts = (unsigned long *) malloc (65536 * sizeof (unsigned long)); + read_counts (); + noflags=1; + generate_func (noflags); + + free(opcode_map); + free(opcode_last_postfix); + free(opcode_next_clev); + free(counts); + + printf ("#endif\n"); + fprintf (stblfile, "#endif\n"); + + free (table68k); + fclose (stblfile); + fclose (headerfile); + return 0; +} diff --git a/src/gencomp_arm.c b/src/gencomp_arm.c index 69d1a797..1f8bd68a 100644 --- a/src/gencomp_arm.c +++ b/src/gencomp_arm.c @@ -135,7 +135,7 @@ read_counts (void) fscanf (file, "Total: %lu\n", &total); while (fscanf (file, "%lx: %lu %s\n", &opcode, &count, name) == 3) { - opcode_next_clev[nr] = 4; + opcode_next_clev[nr] = 5; opcode_last_postfix[nr] = -1; opcode_map[nr++] = opcode; counts[opcode] = count; @@ -149,7 +149,7 @@ read_counts (void) if (table68k[opcode].handler == -1 && table68k[opcode].mnemo != i_ILLG && counts[opcode] == 0) { - opcode_next_clev[nr] = 4; + opcode_next_clev[nr] = 5; opcode_last_postfix[nr] = -1; opcode_map[nr++] = opcode; counts[opcode] = count; @@ -2752,6 +2752,8 @@ gen_opcode (unsigned long int opcode) break; case i_MMUOP: + case i_MMUOP30A: + case i_MMUOP30B: isjump; failure; break; @@ -2979,7 +2981,7 @@ generate_func (int noflags) using_exception_3 = 0; for (i = 0; i < 1; i++) /* We only do one level! */ { - cpu_level = 4 - i; + cpu_level = 5 - i; postfix = i; if (noflags) diff --git a/src/gencpu.c b/src/gencpu.c index 7cd1e86f..6d28e20b 100644 --- a/src/gencpu.c +++ b/src/gencpu.c @@ -49,11 +49,13 @@ #include "readcpu.h" #define BOOL_TYPE "int" +/* Define the minimal 680x0 where NV flags are not affected by xBCD instructions. */ +#define xBCD_KEEPS_NV_FLAGS 4 static FILE *headerfile; static FILE *stblfile; -static int using_prefetch; +static int using_prefetch, using_indirect; static int using_exception_3; static int cpu_level; @@ -66,7 +68,6 @@ static int optimized_flags; #define GF_NOREFILL 8 #define GF_PREFETCH 16 - /* For the current opcode, the next lower level that will have different code. * Initialized to -1 for each opcode. If it remains unchanged, indicates we * are done with that opcode. */ @@ -76,6 +77,7 @@ static int *opcode_map; static int *opcode_next_clev; static int *opcode_last_postfix; static unsigned long *counts; +static int generate_stbl; #define GENA_GETV_NO_FETCH 0 #define GENA_GETV_FETCH 1 @@ -97,7 +99,7 @@ static void read_counts (void) if (file) { fscanf (file, "Total: %lu\n", &total); while (fscanf (file, "%lx: %lu %s\n", &opcode, &count, name) == 3) { - opcode_next_clev[nr] = 4; + opcode_next_clev[nr] = 5; opcode_last_postfix[nr] = -1; opcode_map[nr++] = opcode; counts[opcode] = count; @@ -110,7 +112,7 @@ static void read_counts (void) if (table68k[opcode].handler == -1 && table68k[opcode].mnemo != i_ILLG && counts[opcode] == 0) { - opcode_next_clev[nr] = 4; + opcode_next_clev[nr] = 5; opcode_last_postfix[nr] = -1; opcode_map[nr++] = opcode; counts[opcode] = count; @@ -143,7 +145,7 @@ static void cpulimit (void) static void returncycles (char *s, int cycles) { - printf ("%sreturn %d * %d;\n", s, cycles, CYCLE_UNIT / 2); + printf ("%sreturn %d * CYCLE_UNIT / 2;\n", s, cycles); } static int isreg(amodes mode) @@ -203,7 +205,6 @@ static const char *bit_mask (int size) static void gen_nextilong (char *type, char *name, int norefill) { int r = m68k_pc_offset; - m68k_pc_offset += 4; if (using_prefetch) { @@ -216,6 +217,9 @@ static void gen_nextilong (char *type, char *name, int norefill) printf ("\t%s %s = get_long_prefetch (regs, %d);\n", type, name, r + 2); insn_n_cycles += 8; } + } else if (using_indirect) { + insn_n_cycles += 8; + printf ("\t%s %s = get_ilongi (%d);\n", type, name, r); } else { insn_n_cycles += 8; printf ("\t%s %s = get_ilong (regs, %d);\n", type, name, r); @@ -226,7 +230,6 @@ static const char *gen_nextiword (int norefill) { static char buffer[80]; int r = m68k_pc_offset; - m68k_pc_offset += 2; if (using_prefetch) { @@ -236,6 +239,9 @@ static const char *gen_nextiword (int norefill) sprintf (buffer, "get_word_prefetch (regs, %d)", r + 2); insn_n_cycles += 4; } + } else if (using_indirect) { + sprintf (buffer, "get_iwordi(%d)", r); + insn_n_cycles += 4; } else { sprintf (buffer, "get_iword (regs, %d)", r); insn_n_cycles += 4; @@ -257,6 +263,9 @@ static const char *gen_nextibyte (int norefill) sprintf (buffer, "(uae_u8)get_word_prefetch (regs, %d)", r + 2); insn_n_cycles += 4; } + } else if (using_indirect) { + sprintf (buffer, "get_ibytei (%d)", r); + insn_n_cycles += 4; } else { sprintf (buffer, "get_ibyte (regs, %d)", r); insn_n_cycles += 4; @@ -435,8 +444,9 @@ static void genamode2 (amodes mode, char *reg, wordsizes size, char *name, int g /* This would ordinarily be done in gen_nextiword, which we bypass. */ insn_n_cycles += 4; printf ("\t%sa = get_disp_ea_020(regs, m68k_areg(regs, %s), next_iword(regs));\n", name, reg); - } else + } else { printf ("\t%sa = get_disp_ea_000(regs, m68k_areg(regs, %s), %s);\n", name, reg, gen_nextiword (flags & GF_NOREFILL)); + } if (!(flags & GF_AD8R)) { insn_n_cycles += 2; } @@ -564,7 +574,6 @@ static void genamode2 (amodes mode, char *reg, wordsizes size, char *name, int g default: break; } - } static void genamode (amodes mode, char *reg, wordsizes size, char *name, int getv, int movem, int flags) @@ -687,9 +696,9 @@ static void genmovemle (uae_u16 opcode) char putcode[100]; int size = table68k[opcode].size == sz_long ? 4 : 2; if (table68k[opcode].size == sz_long) { - strcpy (putcode, "put_long(srca,"); + strcpy (putcode, "put_long(srca"); } else { - strcpy (putcode, "put_word(srca,"); + strcpy (putcode, "put_word(srca"); } printf ("\tuae_u16 mask = %s;\n", gen_nextiword (0)); @@ -701,16 +710,21 @@ static void genmovemle (uae_u16 opcode) start_brace (); if (table68k[opcode].dmode == Apdi) { printf ("\tuae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;\n"); - printf ("\twhile (amask) { srca -= %d; %s m68k_areg(regs, movem_index2[amask])); amask = movem_next[amask]; }\n", - size, putcode); - printf ("\twhile (dmask) { srca -= %d; %s m68k_dreg(regs, movem_index2[dmask])); dmask = movem_next[dmask]; }\n", + printf ("\tint type = get_cpu_model() >= 68020;\n"); + printf ("\twhile (amask) {\n"); + printf ("\t\tsrca -= %d;\n", size); + printf ("\t\tif (type) m68k_areg(regs, dstreg) = srca;\n"); + printf ("\t\t%s, m68k_areg(regs, movem_index2[amask]));\n", putcode); + printf ("\t\tamask = movem_next[amask];\n"); + printf ("\t}\n"); + printf ("\twhile (dmask) { srca -= %d; %s, m68k_dreg(regs, movem_index2[dmask])); dmask = movem_next[dmask]; }\n", size, putcode); printf ("\tm68k_areg(regs, dstreg) = srca;\n"); } else { printf ("\tuae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n"); - printf ("\twhile (dmask) { %s m68k_dreg(regs, movem_index1[dmask])); srca += %d; dmask = movem_next[dmask]; }\n", + printf ("\twhile (dmask) { %s, m68k_dreg(regs, movem_index1[dmask])); srca += %d; dmask = movem_next[dmask]; }\n", putcode, size); - printf ("\twhile (amask) { %s m68k_areg(regs, movem_index1[amask])); srca += %d; amask = movem_next[amask]; }\n", + printf ("\twhile (amask) { %s, m68k_areg(regs, movem_index1[amask])); srca += %d; amask = movem_next[amask]; }\n", putcode, size); } } @@ -723,10 +737,12 @@ static void duplicate_carry (int n) printf ("COPY_CARRY (®s->ccrflags);\n"); } -typedef enum { - flag_logical_noclobber, flag_logical, flag_add, flag_sub, flag_cmp, flag_addx, flag_subx, flag_zn, +typedef enum +{ + flag_logical_noclobber, flag_logical, flag_add, flag_sub, flag_cmp, flag_addx, flag_subx, flag_z, flag_zn, flag_av, flag_sv -} flagtypes; +} +flagtypes; static void genflags_normal (flagtypes type, wordsizes size, char *value, char *src, char *dst) { @@ -778,6 +794,7 @@ static void genflags_normal (flagtypes type, wordsizes size, char *value, char * switch (type) { case flag_logical_noclobber: case flag_logical: + case flag_z: case flag_zn: case flag_av: case flag_sv: @@ -832,6 +849,9 @@ static void genflags_normal (flagtypes type, wordsizes size, char *value, char * case flag_sv: printf ("\tSET_VFLG (®s->ccrflags, (flgs ^ flgo) & (flgn ^ flgo));\n"); break; + case flag_z: + printf ("\tSET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (%s == 0));\n", vstr); + break; case flag_zn: printf ("\tSET_ZFLG (®s->ccrflags, GET_ZFLG (&(regs->ccrflags)) & (%s == 0));\n", vstr); printf ("\tSET_NFLG (®s->ccrflags, %s < 0);\n", vstr); @@ -881,6 +901,7 @@ static void genflags (flagtypes type, wordsizes size, char *value, char *src, ch start_brace (); printf ("\tuae_u32 %s;\n", value); break; + default: break; } @@ -941,6 +962,7 @@ static void genflags (flagtypes type, wordsizes size, char *value, char *src, ch break; } } + genflags_normal (type, size, value, src, dst); } @@ -969,7 +991,7 @@ static const char *cmask (wordsizes size) case sz_byte: return "0x80"; case sz_word: return "0x8000"; case sz_long: return "0x80000000"; - default: abort (); return NULL; + default: abort (); } } @@ -1080,8 +1102,15 @@ static void gen_opcode (unsigned long int opcode) printf ("\tif ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG (®s->ccrflags) ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; }\n"); printf ("\tSET_CFLG (®s->ccrflags, (((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG (®s->ccrflags) ? 1 : 0)) & 0x300) > 0xFF);\n"); duplicate_carry (0); - genflags (flag_zn, curi->size, "newv", "", ""); - printf ("\tSET_VFLG (®s->ccrflags, (tmp_newv & 0x80) != 0 && (newv & 0x80) == 0);\n"); + /* Manual says bits NV are undefined though a real 68040/060 don't change them */ + if (cpu_level >= xBCD_KEEPS_NV_FLAGS) { + if (next_cpu_level < xBCD_KEEPS_NV_FLAGS) + next_cpu_level = xBCD_KEEPS_NV_FLAGS - 1; + genflags (flag_z, curi->size, "newv", "", ""); + } else { + genflags (flag_zn, curi->size, "newv", "", ""); + printf ("\tSET_VFLG (®s->ccrflags, (tmp_newv & 0x80) != 0 && (newv & 0x80) == 0);\n"); + } genastore ("newv", curi->dmode, "dstreg", curi->size, "dst"); break; case i_ADD: @@ -1125,8 +1154,16 @@ static void gen_opcode (unsigned long int opcode) printf ("\tif (cflg) newv += 0x60;\n"); printf ("\tSET_CFLG (®s->ccrflags, cflg);\n"); duplicate_carry (0); - genflags (flag_zn, curi->size, "newv", "", ""); - printf ("\tSET_VFLG (®s->ccrflags, (tmp_newv & 0x80) == 0 && (newv & 0x80) != 0);\n"); + /* Manual says bits NV are undefined though a real 68040 don't change them */ + if (cpu_level >= xBCD_KEEPS_NV_FLAGS) { + if (next_cpu_level < xBCD_KEEPS_NV_FLAGS) + next_cpu_level = xBCD_KEEPS_NV_FLAGS - 1; + genflags (flag_z, curi->size, "newv", "", ""); + } + else { + genflags (flag_zn, curi->size, "newv", "", ""); + printf ("\tSET_VFLG (®s->ccrflags, (tmp_newv & 0x80) == 0 && (newv & 0x80) != 0);\n"); + } genastore ("newv", curi->dmode, "dstreg", curi->size, "dst"); break; case i_NEG: @@ -1159,7 +1196,15 @@ static void gen_opcode (unsigned long int opcode) printf ("\tif (cflg) newv -= 0x60;\n"); printf ("\tSET_CFLG (®s->ccrflags, cflg);\n"); duplicate_carry(0); - genflags (flag_zn, curi->size, "newv", "", ""); + /* Manual says bits NV are undefined though a real 68040 don't change them */ + if (cpu_level >= xBCD_KEEPS_NV_FLAGS) { + if (next_cpu_level < xBCD_KEEPS_NV_FLAGS) + next_cpu_level = xBCD_KEEPS_NV_FLAGS - 1; + genflags (flag_z, curi->size, "newv", "", ""); + } + else { + genflags (flag_zn, curi->size, "newv", "", ""); + } genastore ("newv", curi->smode, "srcreg", curi->size, "src"); break; case i_CLR: @@ -1464,7 +1509,10 @@ static void gen_opcode (unsigned long int opcode) genastore ("old", curi->smode, "srcreg", curi->size, "src"); break; case i_RTS: - printf ("\tm68k_do_rts(regs);\n"); + if (using_indirect) + printf ("\tm68k_do_rtsi(regs);\n"); + else + printf ("\tm68k_do_rts(regs);\n"); m68k_pc_offset = 0; fill_prefetch_full (); break; @@ -1529,7 +1577,10 @@ static void gen_opcode (unsigned long int opcode) printf ("\t}\n"); need_endlabel = 1; } - printf ("\tm68k_do_bsr (regs, m68k_getpc(regs) + %d, s);\n", m68k_pc_offset); + if (using_indirect) + printf ("\tm68k_do_bsri (regs, m68k_getpc(regs) + %d, s);\n", m68k_pc_offset); + else + printf ("\tm68k_do_bsr (regs, m68k_getpc(regs) + %d, s);\n", m68k_pc_offset); m68k_pc_offset = 0; fill_prefetch_full (); break; @@ -1566,7 +1617,7 @@ static void gen_opcode (unsigned long int opcode) printf ("\tm68k_incpc (regs, (uae_s32)src + 2);\n"); } fill_prefetch_full (); - printf ("\treturn 10 * %d;\n", CYCLE_UNIT / 2); + printf ("\treturn 10 * CYCLE_UNIT / 2;\n"); } else { printf ("\tm68k_incpc (regs, (uae_s32)src + 2);\n"); returncycles ("\t", 10); @@ -1751,7 +1802,6 @@ static void gen_opcode (unsigned long int opcode) printf ("\t}\n"); need_endlabel = 1; break; - case i_CHK2: printf ("\tuaecptr oldpc = m68k_getpc(regs);\n"); genamode (curi->smode, "srcreg", curi->size, "extra", GENA_GETV_FETCH, GENA_MOVEM_DO_INC, 0); @@ -2261,7 +2311,6 @@ static void gen_opcode (unsigned long int opcode) case i_MOVES: /* ignore DFC and SFC because we have no MMU */ { int old_brace_level; - genamode (curi->smode, "srcreg", curi->size, "extra", GENA_GETV_FETCH, GENA_MOVEM_DO_INC, 0); printf ("\tif (extra & 0x800)\n"); old_brace_level = n_braces; @@ -2444,21 +2493,21 @@ static void gen_opcode (unsigned long int opcode) genamode (curi->smode, "srcreg", curi->size, "extra", GENA_GETV_FETCH, GENA_MOVEM_DO_INC, 0); sync_m68k_pc (); swap_opcode (); - printf ("\tfpp_opp(opcode, regs, extra);\n"); + printf ("\tfpuop_arithmetic(opcode, regs, extra);\n"); break; case i_FDBcc: fpulimit(); genamode (curi->smode, "srcreg", curi->size, "extra", GENA_GETV_FETCH, GENA_MOVEM_DO_INC, 0); sync_m68k_pc (); swap_opcode (); - printf ("\tfdbcc_opp(opcode, regs, extra);\n"); + printf ("\tfpuop_dbcc(opcode, regs, extra);\n"); break; case i_FScc: fpulimit(); genamode (curi->smode, "srcreg", curi->size, "extra", GENA_GETV_FETCH, GENA_MOVEM_DO_INC, 0); sync_m68k_pc (); swap_opcode (); - printf ("\tfscc_opp(opcode, regs, extra);\n"); + printf ("\tfpuop_scc(opcode, regs, extra);\n"); break; case i_FTRAPcc: fpulimit(); @@ -2469,7 +2518,7 @@ static void gen_opcode (unsigned long int opcode) genamode (curi->smode, "srcreg", curi->size, "dummy", GENA_GETV_FETCH, GENA_MOVEM_DO_INC, 0); sync_m68k_pc (); swap_opcode (); - printf ("\tftrapcc_opp(opcode, regs, oldpc);\n"); + printf ("\tfpuop_trapcc(opcode, regs, oldpc);\n"); break; case i_FBcc: fpulimit(); @@ -2479,19 +2528,19 @@ static void gen_opcode (unsigned long int opcode) genamode (curi->dmode, "srcreg", curi->size, "extra", GENA_GETV_FETCH, GENA_MOVEM_DO_INC, 0); sync_m68k_pc (); swap_opcode (); - printf ("\tfbcc_opp(opcode,regs, pc,extra);\n"); + printf ("\tfpuop_bcc(opcode,regs, pc,extra);\n"); break; case i_FSAVE: fpulimit(); sync_m68k_pc (); swap_opcode (); - printf ("\tfsave_opp(opcode, regs);\n"); + printf ("\tfpuop_save(opcode, regs);\n"); break; case i_FRESTORE: fpulimit(); sync_m68k_pc (); swap_opcode (); - printf ("\tfrestore_opp(opcode, regs);\n"); + printf ("\tfpuop_restore(opcode, regs);\n"); break; case i_CINVL: @@ -2547,13 +2596,30 @@ static void gen_opcode (unsigned long int opcode) printf ("\tm68k_areg(regs, dstreg) += 16;\n"); } break; + case i_MMUOP: genamode (curi->smode, "srcreg", curi->size, "extra", GENA_GETV_FETCH, GENA_MOVEM_DO_INC, 0); sync_m68k_pc (); swap_opcode (); printf ("\tmmu_op(opcode, regs, extra);\n"); break; - + case i_MMUOP30A: + printf ("\tuaecptr pc = m68k_getpc (regs);\n"); + if (curi->smode == Areg || curi->smode == Dreg) + printf("\tuae_u16 extraa = 0;\n"); + else + genamode (curi->smode, "srcreg", curi->size, "extra", GENA_GETV_NO_FETCH, GENA_MOVEM_DO_INC, 0); + sync_m68k_pc (); + swap_opcode (); + printf ("\tmmu_op30(pc, opcode, regs, 1, extraa);\n"); + break; + case i_MMUOP30B: + printf ("\tuaecptr pc = m68k_getpc (regs);\n"); + genamode (curi->smode, "srcreg", curi->size, "extra", GENA_GETV_NO_FETCH, GENA_MOVEM_DO_INC, 0); + sync_m68k_pc (); + swap_opcode (); + printf ("\tmmu_op30(pc, opcode, regs, 0, 0);\n"); + break; default: abort (); break; @@ -2714,15 +2780,18 @@ static void generate_one_opcode (int rp) return; if (opcode_next_clev[rp] != cpu_level) { - fprintf (stblfile, "{ CPUFUNC(op_%04lx_%d), %ld }, /* %s */\n", opcode, opcode_last_postfix[rp], - opcode, lookuptab[i].name); + if (generate_stbl) + fprintf (stblfile, "{ CPUFUNC(op_%04lx_%d), %ld }, /* %s */\n", opcode, opcode_last_postfix[rp], + opcode, lookuptab[i].name); return; } + if (generate_stbl) { if (i68000) fprintf (stblfile, "#ifndef CPUEMU_68000_ONLY\n"); fprintf (stblfile, "{ CPUFUNC(op_%04lx_%d), %ld }, /* %s */\n", opcode, postfix, opcode, lookuptab[i].name); if (i68000) fprintf (stblfile, "#endif\n"); + } fprintf (headerfile, "extern cpuop_func op_%04lx_%d_nf;\n", opcode, postfix); fprintf (headerfile, "extern cpuop_func op_%04lx_%d_ff;\n", opcode, postfix); printf ("/* %s */\n", outopcode (opcode)); @@ -2868,6 +2937,7 @@ static void generate_func (void) "#define PART_7 1\n" "#define PART_8 1\n" "#endif\n\n"); + rp = 0; for(j = 1; j <= 8; ++j) { int k = (j * nr_cpuop_funcs) / 8; @@ -2877,7 +2947,8 @@ static void generate_func (void) printf ("#endif\n\n"); } - fprintf (stblfile, "{ 0, 0 }};\n"); + if (generate_stbl) + fprintf (stblfile, "{ 0, 0 }};\n"); } int main (int argc, char **argv) @@ -2904,34 +2975,43 @@ int main (int argc, char **argv) generate_includes (stblfile); using_prefetch = 0; + using_indirect = 0; using_exception_3 = 1; postfix2 = -1; - for (i = 0; i < 6; i++) { + for (i = 0; i < 12; i++) { postfix = i; - if (i == 0 || i == 5) { - fprintf (stblfile, "#ifdef CPUEMU_%d\n", postfix); + if (i >= 6 && i < 11) + continue; + generate_stbl = 1; + if (i == 0 || i == 11 || i == 12) { + if (generate_stbl) + fprintf (stblfile, "#ifdef CPUEMU_%d\n", postfix); postfix2 = postfix; sprintf (fname, "cpuemu_%d.c", postfix); freopen (fname, "wb", stdout); generate_includes (stdout); } - cpu_level = 4 - i; - if (i == 5) { + cpu_level = 5 - i; + if (i == 11 || i == 12) { cpu_level = 0; using_prefetch = 1; using_exception_3 = 1; for (rp = 0; rp < nr_cpuop_funcs; rp++) opcode_next_clev[rp] = 0; } - if (i > 0 && i < 4) - fprintf (stblfile, "#ifndef CPUEMU_68000_ONLY\n"); - fprintf (stblfile, "const struct cputbl CPUFUNC(op_smalltbl_%d)[] = {\n", postfix); + if (generate_stbl) { + if (i > 0 && i < 10) + fprintf (stblfile, "#ifndef CPUEMU_68000_ONLY\n"); + fprintf (stblfile, "const struct cputbl CPUFUNC(op_smalltbl_%d)[] = {\n", postfix); + } generate_func (); - if (i > 0 && i < 4) - fprintf (stblfile, "#endif /* CPUEMU_68000_ONLY */\n"); - if (postfix2 >= 0) - fprintf (stblfile, "#endif /* CPUEMU_%d */\n", postfix2); + if (generate_stbl) { + if (i > 0 && i < 10) + fprintf (stblfile, "#endif /* CPUEMU_68000_ONLY */\n"); + if (postfix2 >= 0) + fprintf (stblfile, "#endif /* CPUEMU_%d */\n", postfix2); + } postfix2 = -1; } diff --git a/src/hardfile.cpp b/src/hardfile.cpp index ecd1e169..ff49945f 100644 --- a/src/hardfile.cpp +++ b/src/hardfile.cpp @@ -76,7 +76,8 @@ struct hardfileprivdata { uae_thread_id tid; int thread_running; uae_sem_t sync_sem; - int opencount; + uaecptr base; + int changenum; }; static uae_sem_t change_sem; @@ -85,26 +86,65 @@ static struct hardfileprivdata hardfpd[MAX_FILESYSTEM_UNITS]; static uae_u32 nscmd_cmd; +static uae_u64 cmd_readx (struct hardfiledata *hfd, uae_u8 *dataptr, uae_u64 offset, uae_u64 len) +{ + gui_hd_led (1); + write_log ("cmd_read: %p %04.4x-%08.8x (%d) %08.8x (%d)\n", + dataptr, (uae_u32)(offset >> 32), (uae_u32)offset, (uae_u32)(offset / hfd->blocksize), (uae_u32)len, (uae_u32)(len / hfd->blocksize)); + fseek (hfd->fd, offset, SEEK_SET); + return fread (dataptr, 1, len, hfd->fd); +} static uae_u64 cmd_read (struct hardfiledata *hfd, uaecptr dataptr, uae_u64 offset, uae_u64 len) { addrbank *bank_data = &get_mem_bank (dataptr); - gui_hd_led (1); - write_log ("cmd_read: %p %04.4x-%08.8x %08.8x\n", dataptr, (uae_u32)(offset >> 32), (uae_u32)offset, (uae_u32)len); if (!bank_data || !bank_data->check (dataptr, len)) return 0; + return cmd_readx (hfd, bank_data->xlateaddr (dataptr), offset, len); +} +static uae_u64 cmd_writex (struct hardfiledata *hfd, uae_u8 *dataptr, uae_u64 offset, uae_u64 len) +{ + gui_hd_led (1); + write_log ("cmd_write: %p %04.4x-%08.8x %08.8x\n", dataptr, (uae_u32)(offset >> 32), (uae_u32)offset, (uae_u32)(offset / hfd->blocksize), (uae_u32)len, (uae_u32)(len / hfd->blocksize)); fseek (hfd->fd, offset, SEEK_SET); - return fread (bank_data->xlateaddr (dataptr), 1, len, hfd->fd); + return fwrite (dataptr, 1, len, hfd->fd); } static uae_u64 cmd_write (struct hardfiledata *hfd, uaecptr dataptr, uae_u64 offset, uae_u64 len) { addrbank *bank_data = &get_mem_bank (dataptr); - gui_hd_led (1); - write_log ("cmd_write: %p %04.4x-%08.8x %08.8x\n", dataptr, (uae_u32)(offset >> 32), (uae_u32)offset, (uae_u32)len); if (!bank_data || !bank_data->check (dataptr, len)) return 0; - fseek (hfd->fd, offset, SEEK_SET); - return fwrite (bank_data->xlateaddr (dataptr), 1, len, hfd->fd); + return cmd_writex (hfd, bank_data->xlateaddr (dataptr), offset, len); +} + +static int nodisk (struct hardfiledata *hfd) +{ + if (hfd->drive_empty) + return 1; + return 0; +} + +void hardfile_do_disk_change (int fsid, int insert) +{ + int j; + int newstate = insert ? 0 : 1; + struct hardfiledata *hfd; + + hfd = get_hardfile_data (fsid); + if (!hfd) + return; + uae_sem_wait (&change_sem); + hardfpd[fsid].changenum++; + write_log("uaehf.device:%d media status=%d\n", fsid, insert); + hfd->drive_empty = newstate; + j = 0; + while (j < MAX_ASYNC_REQUESTS) { + if (hardfpd[fsid].d_request_type[j] == ASYNC_REQUEST_CHANGEINT) { + uae_Cause (hardfpd[fsid].d_request_data[j]); + } + j++; + } + uae_sem_post (&change_sem); } static int add_async_request (struct hardfileprivdata *hfpd, uaecptr request, int type, uae_u32 data) @@ -175,16 +215,17 @@ static void abort_async (struct hardfileprivdata *hfpd, uaecptr request, int err } static void *hardfile_thread (void *devs); -static int start_thread (int unit) +static int start_thread (TrapContext *context, int unit) { struct hardfileprivdata *hfpd = &hardfpd[unit]; if (hfpd->thread_running) return 1; memset (hfpd, 0, sizeof (struct hardfileprivdata)); + hfpd->base = m68k_areg(&context->regs, 6); init_comm_pipe (&hfpd->requests, 100, 1); uae_sem_init (&hfpd->sync_sem, 0, 0); - uae_start_thread (hardfile_thread, hfpd, &hfpd->tid); + uae_start_thread ("hardfile", hardfile_thread, hfpd, &hfpd->tid); uae_sem_wait (&hfpd->sync_sem); return hfpd->thread_running; } @@ -208,17 +249,19 @@ static uae_u32 REGPARAM2 hardfile_open (TrapContext *context) int err = -1; /* Check unit number */ - if (unit >= 0 && get_hardfile_data (unit) && start_thread (unit)) { - hfpd->opencount++; - put_word (m68k_areg(&context->regs, 6)+32, get_word (m68k_areg(&context->regs, 6)+32) + 1); - put_long (tmp1 + 24, unit); /* io_Unit */ - put_byte (tmp1 + 31, 0); /* io_Error */ - put_byte (tmp1 + 8, 7); /* ln_type = NT_REPLYMSG */ - write_log ("hardfile_open, unit %d (%d), OK\n", unit, m68k_dreg (&context->regs, 0)); - return 0; + if (unit >= 0) { + struct hardfiledata *hfd = get_hardfile_data (unit); + if (hfd && hfd->fd != 0 && start_thread (context, unit)) { + put_word (hfpd->base + 32, get_word (hfpd->base + 32) + 1); + put_long (tmp1 + 24, unit); /* io_Unit */ + put_byte (tmp1 + 31, 0); /* io_Error */ + put_byte (tmp1 + 8, 7); /* ln_type = NT_REPLYMSG */ + write_log ("hardfile_open, unit %d (%d), OK\n", unit, m68k_dreg (&context->regs, 0)); + return 0; + } } - if (is_hardfile(NULL, unit) == FILESYS_VIRTUAL) - err = -6; + if (unit < 1000 || is_hardfile(unit) == FILESYS_VIRTUAL) + err = 50; /* HFERR_NoBoard */ write_log ("hardfile_open, unit %d (%d), ERR=%d\n", unit, m68k_dreg (&context->regs, 0), err); put_long (tmp1 + 20, (uae_u32)err); put_byte (tmp1 + 31, (uae_u8)err); @@ -231,13 +274,11 @@ static uae_u32 REGPARAM2 hardfile_close (TrapContext *context) int unit = mangleunit (get_long (request + 24)); struct hardfileprivdata *hfpd = &hardfpd[unit]; - if (!hfpd->opencount) + if (!hfpd) return 0; - hfpd->opencount--; - if (hfpd->opencount == 0) + put_word (hfpd->base + 32, get_word (hfpd->base + 32) - 1); + if (get_word(hfpd->base + 32) == 0) write_comm_pipe_u32 (&hfpd->requests, 0, 1); - put_word (m68k_areg(&context->regs, 6) + 32, get_word (m68k_areg(&context->regs, 6) + 32) - 1); - return 0; } @@ -273,6 +314,8 @@ static uae_u32 hardfile_do_io (struct hardfiledata *hfd, struct hardfileprivdata switch (cmd) { case CMD_READ: + if (nodisk (hfd)) + goto no_disk; offset = get_long (request + 44); len = get_long (request + 36); /* io_Length */ if ((offset & bmask) || (len & bmask)) { @@ -288,6 +331,8 @@ static uae_u32 hardfile_do_io (struct hardfiledata *hfd, struct hardfileprivdata case TD_READ64: case NSCMD_TD_READ64: + if (nodisk (hfd)) + goto no_disk; offset64 = get_long (request + 44) | ((uae_u64)get_long (request + 32) << 32); len = get_long (request + 36); /* io_Length */ if ((offset64 & bmask) || (len & bmask)) { @@ -303,6 +348,8 @@ static uae_u32 hardfile_do_io (struct hardfiledata *hfd, struct hardfileprivdata case CMD_WRITE: case CMD_FORMAT: /* Format */ + if (nodisk (hfd)) + goto no_disk; if (hfd->readonly) { error = 28; /* write protect */ } else { @@ -324,6 +371,8 @@ static uae_u32 hardfile_do_io (struct hardfiledata *hfd, struct hardfileprivdata case TD_FORMAT64: case NSCMD_TD_WRITE64: case NSCMD_TD_FORMAT64: + if (nodisk (hfd)) + goto no_disk; if (hfd->readonly) { error = 28; /* write protect */ } else { @@ -344,6 +393,9 @@ static uae_u32 hardfile_do_io (struct hardfiledata *hfd, struct hardfileprivdata bad_command: error = -5; /* IOERR_BADADDRESS */ break; + no_disk: + error = 29; /* no disk */ + break; case NSCMD_DEVICEQUERY: put_long (dataptr + 4, 16); /* size */ @@ -370,7 +422,7 @@ static uae_u32 hardfile_do_io (struct hardfiledata *hfd, struct hardfileprivdata break; case CMD_CHANGESTATE: - actual = 0; + actual = hfd->drive_empty ? 1 :0; break; /* Some commands that just do nothing and return zero */ @@ -378,7 +430,6 @@ static uae_u32 hardfile_do_io (struct hardfiledata *hfd, struct hardfileprivdata case CMD_CLEAR: case CMD_MOTOR: case CMD_SEEK: - case CMD_CHANGENUM: case TD_SEEK64: case NSCMD_TD_SEEK64: break; @@ -386,6 +437,10 @@ static uae_u32 hardfile_do_io (struct hardfiledata *hfd, struct hardfileprivdata case CMD_REMOVE: break; + case CMD_CHANGENUM: + actual = hfpd->changenum; + break; + case CMD_ADDCHANGEINT: error = add_async_request (hfpd, request, ASYNC_REQUEST_CHANGEINT, get_long (request + 40)); if (!error) @@ -426,7 +481,8 @@ static uae_u32 REGPARAM2 hardfile_abortio (TrapContext *context) struct hardfileprivdata *hfpd = &hardfpd[unit]; write_log ("uaehf.device abortio "); - if (!hfd) { + start_thread(context, unit); + if (!hfd || !hfpd || !hfpd->thread_running) { put_byte (request + 31, 32); write_log ("error\n"); return get_byte (request + 31); @@ -472,7 +528,8 @@ static uae_u32 REGPARAM2 hardfile_beginio (TrapContext *context) struct hardfileprivdata *hfpd = &hardfpd[unit]; put_byte (request + 8, NT_MESSAGE); - if (!hfd) { + start_thread(context, unit); + if (!hfd || !hfpd || !hfpd->thread_running) { put_byte (request + 31, 32); return get_byte (request + 31); } @@ -524,7 +581,7 @@ void hardfile_reset (void) for (i = 0; i < MAX_FILESYSTEM_UNITS; i++) { hfpd = &hardfpd[i]; - if (hfpd->opencount > 0) { + if (hfpd->base && valid_address(hfpd->base, 36) && get_word(hfpd->base + 32) > 0) { for (j = 0; j < MAX_ASYNC_REQUESTS; j++) { uaecptr request; if ((request = hfpd->d_request[i])) diff --git a/src/include/audio.h b/src/include/audio.h index aa107a65..a589a851 100644 --- a/src/include/audio.h +++ b/src/include/audio.h @@ -31,3 +31,17 @@ extern void update_sound (int freq); extern void led_filter_audio (void); extern void set_audio(void); extern int audio_activate(void); + +enum { + SND_MONO, SND_STEREO, SND_4CH_CLONEDSTEREO, SND_4CH, SND_6CH_CLONEDSTEREO, SND_6CH, SND_NONE }; +STATIC_INLINE int get_audio_ismono(void) +{ + if (currprefs.sound_stereo == 0) + return 1; + return 0; +} + + #define SOUND_MAX_DELAY_BUFFER 1024 + #define SOUND_MAX_LOG_DELAY 10 + #define MIXED_STEREO_MAX 16 + #define MIXED_STEREO_SCALE 32 diff --git a/src/include/autoconf.h b/src/include/autoconf.h index 07a8fcab..b9245c74 100644 --- a/src/include/autoconf.h +++ b/src/include/autoconf.h @@ -17,11 +17,7 @@ extern void org (uae_u32); extern uae_u32 here (void); #define deftrap(f) define_trap((f), 0, "") -#ifdef TRACE_TRAPS # define deftrap2(f, mode, str) define_trap((f), (mode), (str)) -#else -# define deftrap2(f, mode, str) define_trap((f), (mode), "") -#endif extern void align (int); @@ -41,33 +37,39 @@ extern uaecptr ROM_hardfile_resname, ROM_hardfile_resid; extern uaecptr ROM_hardfile_init; extern uaecptr filesys_initcode; -extern int nr_units (struct uaedev_mount_info *mountinfo); -extern int is_hardfile (struct uaedev_mount_info *mountinfo, int unit_no); -extern char *set_filesys_unit (struct uaedev_mount_info *mountinfo, int, - char *devname, char *volname, char *rootdir, int readonly, - int secs, int surfaces, int reserved, - int blocksize, int bootpri, char *filesysdir, int flags); -extern char *add_filesys_unit (struct uaedev_mount_info *mountinfo, - char *devname, char *volname, char *rootdir, int readonly, - int secs, int surfaces, int reserved, - int blocksize, int bootpri, char *filesysdir, int flags); -extern char *get_filesys_unit (struct uaedev_mount_info *mountinfo, int nr, - char **devname, char **volname, char **rootdir, int *readonly, - int *secspertrack, int *surfaces, int *reserved, - int *cylinders, uae_u64 *size, int *blocksize, int *bootpri, char **filesysdir, int *flags); -extern int kill_filesys_unit (struct uaedev_mount_info *mountinfo, int); -extern int move_filesys_unit (struct uaedev_mount_info *mountinfo, int nr, int to); -extern int sprintf_filesys_unit (struct uaedev_mount_info *mountinfo, char *buffer, int num); -extern void write_filesys_config (struct uae_prefs *p, struct uaedev_mount_info *mountinfo, const char *unexpanded, - const char *defaultpath, struct zfile *f); +extern int is_hardfile (int unit_no); +extern int nr_units (void); +extern uaecptr need_uae_boot_rom (void); -extern void free_mountinfo (struct uaedev_mount_info *); +struct mountedinfo +{ + uae_u64 size; + int ismounted; + int ismedia; + int nrcyls; +}; + +extern int get_filesys_unitconfig (struct uae_prefs *p, int index, struct mountedinfo*); +extern int kill_filesys_unitconfig (struct uae_prefs *p, int nr); +extern int move_filesys_unitconfig (struct uae_prefs *p, int nr, int to); + +int filesys_insert(int nr, char *volume, const char *rootdir, int readonly, int flags); +int filesys_eject(int nr); +int filesys_media_change (const char *rootdir, int inserted, struct uaedev_config_info *uci); + +extern char *filesys_createvolname (const char *volname, const char *rootdir, const char *def); +extern int target_get_volume_name(struct uaedev_mount_info *mtinf, const char *volumepath, char *volumename, int size, int inserted, int fullcheck); + +extern int sprintf_filesys_unit (char *buffer, int num); extern void filesys_reset (void); extern void filesys_cleanup (void); extern void filesys_prepare_reset (void); extern void filesys_start_threads (void); extern void filesys_flush_cache (void); +extern void filesys_free_handles (void); +extern void filesys_vsync (void); +extern void free_mountinfo (void); extern void filesys_install (void); extern void filesys_install_code (void); @@ -83,5 +85,3 @@ extern void expansion_clear (void); #define TRAPFLAG_NO_RETVAL 2 #define TRAPFLAG_EXTRA_STACK 4 #define TRAPFLAG_DORET 8 - -#define RTAREA_BASE 0xF00000 diff --git a/src/include/blitter.h b/src/include/blitter.h index f73958a9..a0d91ac8 100644 --- a/src/include/blitter.h +++ b/src/include/blitter.h @@ -28,7 +28,7 @@ extern uae_u32 preva, prevb; extern void maybe_blit (int); extern int blitnasty (void); -extern void blitter_handler (void); +extern void blitter_handler (uae_u32); extern void build_blitfilltable (void); extern void do_blitter (void); extern void blitter_done_notify (void); diff --git a/src/include/cia.h b/src/include/cia.h index 5f27ab4e..c6f77ec9 100644 --- a/src/include/cia.h +++ b/src/include/cia.h @@ -15,3 +15,5 @@ extern void diskindex_handler (void); extern void cia_diskindex (void); extern void rethink_cias (void); + +extern void rtc_hardreset(void); diff --git a/src/include/codegen_arm.h b/src/include/codegen_arm.h index b10f3a11..660f28f3 100644 --- a/src/include/codegen_arm.h +++ b/src/include/codegen_arm.h @@ -1249,4 +1249,7 @@ enum { #define CC_SADD16_rrr(cc,Rd,Rn,Rm) _W(((cc) << 28) | (0x61 << 20) | (Rn << 16) | (Rd << 12) | (0xf1 << 4) | (Rm)) #define SADD16_rrr(Rd,Rn,Rm) CC_SADD16_rrr(NATIVE_CC_AL,Rd,Rn,Rm) +#define CC_BFI_rrii(cc,Rd,Rn,lsb,msb) _W(((cc) << 28) | (0x3e << 21) | ((msb) << 16) | (Rd << 12) | ((lsb) << 7) | (0x1 << 4) | (Rn)) +#define BFI_rrii(Rd,Rn,lsb,msb) CC_BFI_rrii(NATIVE_CC_AL,Rd,Rn,lsb,msb) + #endif /* ARM_RTASM_H */ diff --git a/src/include/compemu.h b/src/include/compemu.h index 11d8af15..3f4fdd22 100644 --- a/src/include/compemu.h +++ b/src/include/compemu.h @@ -52,8 +52,8 @@ typedef uae_u32 uintptr; #define USE_ALIAS 1 #define USE_F_ALIAS 1 -#define USE_OFFSET 1 -#define COMP_DEBUG 1 +#define USE_OFFSET 0 +#define COMP_DEBUG 0 #if COMP_DEBUG #define Dif(x) if (x) @@ -329,7 +329,7 @@ extern void register_branch(uae_u32 not_taken, uae_u32 taken, uae_u8 cond); #define comp_get_ilong(o) do_get_mem_long((uae_u32 *)(comp_pc_p + (o))) /* Preferences handling */ -void check_prefs_changed_comp (void); +int check_prefs_changed_comp (void); struct blockinfo_t; diff --git a/src/include/cpu_prefetch.h b/src/include/cpu_prefetch.h index 056cfc2b..c5f2d9b4 100644 --- a/src/include/cpu_prefetch.h +++ b/src/include/cpu_prefetch.h @@ -2,7 +2,7 @@ STATIC_INLINE uae_u32 get_word_prefetch (struct regstruct *regs, int o) { uae_u32 v = regs->irc; - regs->irc = get_word (m68k_getpc(regs) + o); + regs->irc = get_wordi (m68k_getpc(regs) + o); return v; } STATIC_INLINE uae_u32 get_long_prefetch (struct regstruct *regs, int o) @@ -12,21 +12,7 @@ STATIC_INLINE uae_u32 get_long_prefetch (struct regstruct *regs, int o) return v; } -#ifdef CPUEMU_6 - -#if 0 -STATIC_INLINE uae_u32 mem_access_delay_word_read_cycles (uaecptr addr, int *cycles) -{ - if (addr < 0x200000 || (addr >= 0xc00000 && addr < 0xe00000)) { - return wait_cpu_cycle_read_cycles (addr, 1, cycles); - } else if (!(addr >= 0xa00000 && addr < 0xc00000)) { - do_cycles_ce (4 * CYCLE_UNIT / 2); - *cycles = 4; - } - return get_word (addr); -} -#endif - +#ifdef CPUEMU_12 STATIC_INLINE uae_u32 mem_access_delay_word_read (uaecptr addr) { if (addr < 0x200000 || (addr >= 0xc00000 && addr < 0xe00000)) { @@ -36,6 +22,15 @@ STATIC_INLINE uae_u32 mem_access_delay_word_read (uaecptr addr) } return get_word (addr); } +STATIC_INLINE uae_u32 mem_access_delay_wordi_read (uaecptr addr) +{ + if (addr < 0x200000 || (addr >= 0xc00000 && addr < 0xe00000)) { + return wait_cpu_cycle_read (addr, 1); + } else if (!(addr >= 0xa00000 && addr < 0xc00000)) { + do_cycles_ce (4 * CYCLE_UNIT / 2); + } + return get_wordi (addr); +} STATIC_INLINE uae_u32 mem_access_delay_byte_read (uaecptr addr) { if (addr < 0x200000 || (addr >= 0xc00000 && addr < 0xe00000)) { @@ -70,6 +65,10 @@ STATIC_INLINE uae_u32 get_word_ce (uaecptr addr) { return mem_access_delay_word_read (addr); } +STATIC_INLINE uae_u32 get_wordi_ce (uaecptr addr) +{ + return mem_access_delay_wordi_read (addr); +} STATIC_INLINE uae_u32 get_byte_ce (uaecptr addr) { @@ -79,19 +78,10 @@ STATIC_INLINE uae_u32 get_byte_ce (uaecptr addr) STATIC_INLINE uae_u32 get_word_ce_prefetch (struct regstruct *regs, int o) { uae_u32 v = regs->irc; - regs->irc = get_word_ce (m68k_getpc(regs) + o); + regs->irc = get_wordi_ce (m68k_getpc(regs) + o); return v; } -#if 0 -STATIC_INLINE int get_word_ce_prefetch_cycles (int o) -{ - int cycles = 0; - regs.irc = mem_access_delay_word_read_cycles (m68k_getpc() + o, &cycles); - return cycles; -} -#endif - STATIC_INLINE void put_word_ce (uaecptr addr, uae_u16 v) { mem_access_delay_word_write (addr, v); diff --git a/src/include/cputbl.h b/src/include/cputbl.h index 4392da27..bcfb9b71 100644 --- a/src/include/cputbl.h +++ b/src/include/cputbl.h @@ -3598,6 +3598,28 @@ extern cpuop_func op_eff8_0_nf; extern cpuop_func op_eff8_0_ff; extern cpuop_func op_eff9_0_nf; extern cpuop_func op_eff9_0_ff; +extern cpuop_func op_f000_0_nf; +extern cpuop_func op_f000_0_ff; +extern cpuop_func op_f008_0_nf; +extern cpuop_func op_f008_0_ff; +extern cpuop_func op_f010_0_nf; +extern cpuop_func op_f010_0_ff; +extern cpuop_func op_f018_0_nf; +extern cpuop_func op_f018_0_ff; +extern cpuop_func op_f020_0_nf; +extern cpuop_func op_f020_0_ff; +extern cpuop_func op_f028_0_nf; +extern cpuop_func op_f028_0_ff; +extern cpuop_func op_f030_0_nf; +extern cpuop_func op_f030_0_ff; +extern cpuop_func op_f038_0_nf; +extern cpuop_func op_f038_0_ff; +extern cpuop_func op_f039_0_nf; +extern cpuop_func op_f039_0_ff; +extern cpuop_func op_f03a_0_nf; +extern cpuop_func op_f03a_0_ff; +extern cpuop_func op_f03b_0_nf; +extern cpuop_func op_f03b_0_ff; extern cpuop_func op_f200_0_nf; extern cpuop_func op_f200_0_ff; extern cpuop_func op_f208_0_nf; @@ -3730,1684 +3752,584 @@ extern cpuop_func op_f618_0_nf; extern cpuop_func op_f618_0_ff; extern cpuop_func op_f620_0_nf; extern cpuop_func op_f620_0_ff; -extern cpuop_func op_0030_3_nf; -extern cpuop_func op_0030_3_ff; -extern cpuop_func op_0070_3_nf; -extern cpuop_func op_0070_3_ff; -extern cpuop_func op_00b0_3_nf; -extern cpuop_func op_00b0_3_ff; -extern cpuop_func op_0130_3_nf; -extern cpuop_func op_0130_3_ff; -extern cpuop_func op_013b_3_nf; -extern cpuop_func op_013b_3_ff; -extern cpuop_func op_0170_3_nf; -extern cpuop_func op_0170_3_ff; -extern cpuop_func op_017b_3_nf; -extern cpuop_func op_017b_3_ff; -extern cpuop_func op_01b0_3_nf; -extern cpuop_func op_01b0_3_ff; -extern cpuop_func op_01bb_3_nf; -extern cpuop_func op_01bb_3_ff; -extern cpuop_func op_01f0_3_nf; -extern cpuop_func op_01f0_3_ff; -extern cpuop_func op_01fb_3_nf; -extern cpuop_func op_01fb_3_ff; -extern cpuop_func op_0230_3_nf; -extern cpuop_func op_0230_3_ff; -extern cpuop_func op_0270_3_nf; -extern cpuop_func op_0270_3_ff; -extern cpuop_func op_02b0_3_nf; -extern cpuop_func op_02b0_3_ff; -extern cpuop_func op_0430_3_nf; -extern cpuop_func op_0430_3_ff; -extern cpuop_func op_0470_3_nf; -extern cpuop_func op_0470_3_ff; -extern cpuop_func op_04b0_3_nf; -extern cpuop_func op_04b0_3_ff; -extern cpuop_func op_0630_3_nf; -extern cpuop_func op_0630_3_ff; -extern cpuop_func op_0670_3_nf; -extern cpuop_func op_0670_3_ff; -extern cpuop_func op_06b0_3_nf; -extern cpuop_func op_06b0_3_ff; -extern cpuop_func op_0830_3_nf; -extern cpuop_func op_0830_3_ff; -extern cpuop_func op_083b_3_nf; -extern cpuop_func op_083b_3_ff; -extern cpuop_func op_0870_3_nf; -extern cpuop_func op_0870_3_ff; -extern cpuop_func op_087b_3_nf; -extern cpuop_func op_087b_3_ff; -extern cpuop_func op_08b0_3_nf; -extern cpuop_func op_08b0_3_ff; -extern cpuop_func op_08bb_3_nf; -extern cpuop_func op_08bb_3_ff; -extern cpuop_func op_08f0_3_nf; -extern cpuop_func op_08f0_3_ff; -extern cpuop_func op_08fb_3_nf; -extern cpuop_func op_08fb_3_ff; -extern cpuop_func op_0a30_3_nf; -extern cpuop_func op_0a30_3_ff; -extern cpuop_func op_0a70_3_nf; -extern cpuop_func op_0a70_3_ff; -extern cpuop_func op_0ab0_3_nf; -extern cpuop_func op_0ab0_3_ff; -extern cpuop_func op_0c30_3_nf; -extern cpuop_func op_0c30_3_ff; -extern cpuop_func op_0c70_3_nf; -extern cpuop_func op_0c70_3_ff; -extern cpuop_func op_0cb0_3_nf; -extern cpuop_func op_0cb0_3_ff; -extern cpuop_func op_1030_3_nf; -extern cpuop_func op_1030_3_ff; -extern cpuop_func op_103b_3_nf; -extern cpuop_func op_103b_3_ff; -extern cpuop_func op_10b0_3_nf; -extern cpuop_func op_10b0_3_ff; -extern cpuop_func op_10bb_3_nf; -extern cpuop_func op_10bb_3_ff; -extern cpuop_func op_10f0_3_nf; -extern cpuop_func op_10f0_3_ff; -extern cpuop_func op_10fb_3_nf; -extern cpuop_func op_10fb_3_ff; -extern cpuop_func op_1130_3_nf; -extern cpuop_func op_1130_3_ff; -extern cpuop_func op_113b_3_nf; -extern cpuop_func op_113b_3_ff; -extern cpuop_func op_1170_3_nf; -extern cpuop_func op_1170_3_ff; -extern cpuop_func op_117b_3_nf; -extern cpuop_func op_117b_3_ff; -extern cpuop_func op_1180_3_nf; -extern cpuop_func op_1180_3_ff; -extern cpuop_func op_1190_3_nf; -extern cpuop_func op_1190_3_ff; -extern cpuop_func op_1198_3_nf; -extern cpuop_func op_1198_3_ff; -extern cpuop_func op_11a0_3_nf; -extern cpuop_func op_11a0_3_ff; -extern cpuop_func op_11a8_3_nf; -extern cpuop_func op_11a8_3_ff; -extern cpuop_func op_11b0_3_nf; -extern cpuop_func op_11b0_3_ff; -extern cpuop_func op_11b8_3_nf; -extern cpuop_func op_11b8_3_ff; -extern cpuop_func op_11b9_3_nf; -extern cpuop_func op_11b9_3_ff; -extern cpuop_func op_11ba_3_nf; -extern cpuop_func op_11ba_3_ff; -extern cpuop_func op_11bb_3_nf; -extern cpuop_func op_11bb_3_ff; -extern cpuop_func op_11bc_3_nf; -extern cpuop_func op_11bc_3_ff; -extern cpuop_func op_11f0_3_nf; -extern cpuop_func op_11f0_3_ff; -extern cpuop_func op_11fb_3_nf; -extern cpuop_func op_11fb_3_ff; -extern cpuop_func op_13f0_3_nf; -extern cpuop_func op_13f0_3_ff; -extern cpuop_func op_13fb_3_nf; -extern cpuop_func op_13fb_3_ff; -extern cpuop_func op_2030_3_nf; -extern cpuop_func op_2030_3_ff; -extern cpuop_func op_203b_3_nf; -extern cpuop_func op_203b_3_ff; -extern cpuop_func op_2070_3_nf; -extern cpuop_func op_2070_3_ff; -extern cpuop_func op_207b_3_nf; -extern cpuop_func op_207b_3_ff; -extern cpuop_func op_20b0_3_nf; -extern cpuop_func op_20b0_3_ff; -extern cpuop_func op_20bb_3_nf; -extern cpuop_func op_20bb_3_ff; -extern cpuop_func op_20f0_3_nf; -extern cpuop_func op_20f0_3_ff; -extern cpuop_func op_20fb_3_nf; -extern cpuop_func op_20fb_3_ff; -extern cpuop_func op_2130_3_nf; -extern cpuop_func op_2130_3_ff; -extern cpuop_func op_213b_3_nf; -extern cpuop_func op_213b_3_ff; -extern cpuop_func op_2170_3_nf; -extern cpuop_func op_2170_3_ff; -extern cpuop_func op_217b_3_nf; -extern cpuop_func op_217b_3_ff; -extern cpuop_func op_2180_3_nf; -extern cpuop_func op_2180_3_ff; -extern cpuop_func op_2188_3_nf; -extern cpuop_func op_2188_3_ff; -extern cpuop_func op_2190_3_nf; -extern cpuop_func op_2190_3_ff; -extern cpuop_func op_2198_3_nf; -extern cpuop_func op_2198_3_ff; -extern cpuop_func op_21a0_3_nf; -extern cpuop_func op_21a0_3_ff; -extern cpuop_func op_21a8_3_nf; -extern cpuop_func op_21a8_3_ff; -extern cpuop_func op_21b0_3_nf; -extern cpuop_func op_21b0_3_ff; -extern cpuop_func op_21b8_3_nf; -extern cpuop_func op_21b8_3_ff; -extern cpuop_func op_21b9_3_nf; -extern cpuop_func op_21b9_3_ff; -extern cpuop_func op_21ba_3_nf; -extern cpuop_func op_21ba_3_ff; -extern cpuop_func op_21bb_3_nf; -extern cpuop_func op_21bb_3_ff; -extern cpuop_func op_21bc_3_nf; -extern cpuop_func op_21bc_3_ff; -extern cpuop_func op_21f0_3_nf; -extern cpuop_func op_21f0_3_ff; -extern cpuop_func op_21fb_3_nf; -extern cpuop_func op_21fb_3_ff; -extern cpuop_func op_23f0_3_nf; -extern cpuop_func op_23f0_3_ff; -extern cpuop_func op_23fb_3_nf; -extern cpuop_func op_23fb_3_ff; -extern cpuop_func op_3030_3_nf; -extern cpuop_func op_3030_3_ff; -extern cpuop_func op_303b_3_nf; -extern cpuop_func op_303b_3_ff; -extern cpuop_func op_3070_3_nf; -extern cpuop_func op_3070_3_ff; -extern cpuop_func op_307b_3_nf; -extern cpuop_func op_307b_3_ff; -extern cpuop_func op_30b0_3_nf; -extern cpuop_func op_30b0_3_ff; -extern cpuop_func op_30bb_3_nf; -extern cpuop_func op_30bb_3_ff; -extern cpuop_func op_30f0_3_nf; -extern cpuop_func op_30f0_3_ff; -extern cpuop_func op_30fb_3_nf; -extern cpuop_func op_30fb_3_ff; -extern cpuop_func op_3130_3_nf; -extern cpuop_func op_3130_3_ff; -extern cpuop_func op_313b_3_nf; -extern cpuop_func op_313b_3_ff; -extern cpuop_func op_3170_3_nf; -extern cpuop_func op_3170_3_ff; -extern cpuop_func op_317b_3_nf; -extern cpuop_func op_317b_3_ff; -extern cpuop_func op_3180_3_nf; -extern cpuop_func op_3180_3_ff; -extern cpuop_func op_3188_3_nf; -extern cpuop_func op_3188_3_ff; -extern cpuop_func op_3190_3_nf; -extern cpuop_func op_3190_3_ff; -extern cpuop_func op_3198_3_nf; -extern cpuop_func op_3198_3_ff; -extern cpuop_func op_31a0_3_nf; -extern cpuop_func op_31a0_3_ff; -extern cpuop_func op_31a8_3_nf; -extern cpuop_func op_31a8_3_ff; -extern cpuop_func op_31b0_3_nf; -extern cpuop_func op_31b0_3_ff; -extern cpuop_func op_31b8_3_nf; -extern cpuop_func op_31b8_3_ff; -extern cpuop_func op_31b9_3_nf; -extern cpuop_func op_31b9_3_ff; -extern cpuop_func op_31ba_3_nf; -extern cpuop_func op_31ba_3_ff; -extern cpuop_func op_31bb_3_nf; -extern cpuop_func op_31bb_3_ff; -extern cpuop_func op_31bc_3_nf; -extern cpuop_func op_31bc_3_ff; -extern cpuop_func op_31f0_3_nf; -extern cpuop_func op_31f0_3_ff; -extern cpuop_func op_31fb_3_nf; -extern cpuop_func op_31fb_3_ff; -extern cpuop_func op_33f0_3_nf; -extern cpuop_func op_33f0_3_ff; -extern cpuop_func op_33fb_3_nf; -extern cpuop_func op_33fb_3_ff; -extern cpuop_func op_4030_3_nf; -extern cpuop_func op_4030_3_ff; -extern cpuop_func op_4070_3_nf; -extern cpuop_func op_4070_3_ff; -extern cpuop_func op_40b0_3_nf; -extern cpuop_func op_40b0_3_ff; -extern cpuop_func op_40f0_3_nf; -extern cpuop_func op_40f0_3_ff; -extern cpuop_func op_4130_3_nf; -extern cpuop_func op_4130_3_ff; -extern cpuop_func op_413b_3_nf; -extern cpuop_func op_413b_3_ff; -extern cpuop_func op_41b0_3_nf; -extern cpuop_func op_41b0_3_ff; -extern cpuop_func op_41bb_3_nf; -extern cpuop_func op_41bb_3_ff; -extern cpuop_func op_41f0_3_nf; -extern cpuop_func op_41f0_3_ff; -extern cpuop_func op_41fb_3_nf; -extern cpuop_func op_41fb_3_ff; -extern cpuop_func op_4230_3_nf; -extern cpuop_func op_4230_3_ff; -extern cpuop_func op_4270_3_nf; -extern cpuop_func op_4270_3_ff; -extern cpuop_func op_42b0_3_nf; -extern cpuop_func op_42b0_3_ff; -extern cpuop_func op_42f0_3_nf; -extern cpuop_func op_42f0_3_ff; -extern cpuop_func op_4430_3_nf; -extern cpuop_func op_4430_3_ff; -extern cpuop_func op_4470_3_nf; -extern cpuop_func op_4470_3_ff; -extern cpuop_func op_44b0_3_nf; -extern cpuop_func op_44b0_3_ff; -extern cpuop_func op_44f0_3_nf; -extern cpuop_func op_44f0_3_ff; -extern cpuop_func op_44fb_3_nf; -extern cpuop_func op_44fb_3_ff; -extern cpuop_func op_4630_3_nf; -extern cpuop_func op_4630_3_ff; -extern cpuop_func op_4670_3_nf; -extern cpuop_func op_4670_3_ff; -extern cpuop_func op_46b0_3_nf; -extern cpuop_func op_46b0_3_ff; -extern cpuop_func op_46f0_3_nf; -extern cpuop_func op_46f0_3_ff; -extern cpuop_func op_46fb_3_nf; -extern cpuop_func op_46fb_3_ff; -extern cpuop_func op_4830_3_nf; -extern cpuop_func op_4830_3_ff; -extern cpuop_func op_4870_3_nf; -extern cpuop_func op_4870_3_ff; -extern cpuop_func op_487b_3_nf; -extern cpuop_func op_487b_3_ff; -extern cpuop_func op_48b0_3_nf; -extern cpuop_func op_48b0_3_ff; -extern cpuop_func op_48f0_3_nf; -extern cpuop_func op_48f0_3_ff; -extern cpuop_func op_4a30_3_nf; -extern cpuop_func op_4a30_3_ff; -extern cpuop_func op_4a70_3_nf; -extern cpuop_func op_4a70_3_ff; -extern cpuop_func op_4ab0_3_nf; -extern cpuop_func op_4ab0_3_ff; -extern cpuop_func op_4af0_3_nf; -extern cpuop_func op_4af0_3_ff; -extern cpuop_func op_4cb0_3_nf; -extern cpuop_func op_4cb0_3_ff; -extern cpuop_func op_4cbb_3_nf; -extern cpuop_func op_4cbb_3_ff; -extern cpuop_func op_4cf0_3_nf; -extern cpuop_func op_4cf0_3_ff; -extern cpuop_func op_4cfb_3_nf; -extern cpuop_func op_4cfb_3_ff; -extern cpuop_func op_4eb0_3_nf; -extern cpuop_func op_4eb0_3_ff; -extern cpuop_func op_4ebb_3_nf; -extern cpuop_func op_4ebb_3_ff; -extern cpuop_func op_4ef0_3_nf; -extern cpuop_func op_4ef0_3_ff; -extern cpuop_func op_4efb_3_nf; -extern cpuop_func op_4efb_3_ff; -extern cpuop_func op_5030_3_nf; -extern cpuop_func op_5030_3_ff; -extern cpuop_func op_5070_3_nf; -extern cpuop_func op_5070_3_ff; -extern cpuop_func op_50b0_3_nf; -extern cpuop_func op_50b0_3_ff; -extern cpuop_func op_50f0_3_nf; -extern cpuop_func op_50f0_3_ff; -extern cpuop_func op_5130_3_nf; -extern cpuop_func op_5130_3_ff; -extern cpuop_func op_5170_3_nf; -extern cpuop_func op_5170_3_ff; -extern cpuop_func op_51b0_3_nf; -extern cpuop_func op_51b0_3_ff; -extern cpuop_func op_51f0_3_nf; -extern cpuop_func op_51f0_3_ff; -extern cpuop_func op_52f0_3_nf; -extern cpuop_func op_52f0_3_ff; -extern cpuop_func op_53f0_3_nf; -extern cpuop_func op_53f0_3_ff; -extern cpuop_func op_54f0_3_nf; -extern cpuop_func op_54f0_3_ff; -extern cpuop_func op_55f0_3_nf; -extern cpuop_func op_55f0_3_ff; -extern cpuop_func op_56f0_3_nf; -extern cpuop_func op_56f0_3_ff; -extern cpuop_func op_57f0_3_nf; -extern cpuop_func op_57f0_3_ff; -extern cpuop_func op_58f0_3_nf; -extern cpuop_func op_58f0_3_ff; -extern cpuop_func op_59f0_3_nf; -extern cpuop_func op_59f0_3_ff; -extern cpuop_func op_5af0_3_nf; -extern cpuop_func op_5af0_3_ff; -extern cpuop_func op_5bf0_3_nf; -extern cpuop_func op_5bf0_3_ff; -extern cpuop_func op_5cf0_3_nf; -extern cpuop_func op_5cf0_3_ff; -extern cpuop_func op_5df0_3_nf; -extern cpuop_func op_5df0_3_ff; -extern cpuop_func op_5ef0_3_nf; -extern cpuop_func op_5ef0_3_ff; -extern cpuop_func op_5ff0_3_nf; -extern cpuop_func op_5ff0_3_ff; -extern cpuop_func op_60ff_3_nf; -extern cpuop_func op_60ff_3_ff; -extern cpuop_func op_62ff_3_nf; -extern cpuop_func op_62ff_3_ff; -extern cpuop_func op_63ff_3_nf; -extern cpuop_func op_63ff_3_ff; -extern cpuop_func op_64ff_3_nf; -extern cpuop_func op_64ff_3_ff; -extern cpuop_func op_65ff_3_nf; -extern cpuop_func op_65ff_3_ff; -extern cpuop_func op_66ff_3_nf; -extern cpuop_func op_66ff_3_ff; -extern cpuop_func op_67ff_3_nf; -extern cpuop_func op_67ff_3_ff; -extern cpuop_func op_68ff_3_nf; -extern cpuop_func op_68ff_3_ff; -extern cpuop_func op_69ff_3_nf; -extern cpuop_func op_69ff_3_ff; -extern cpuop_func op_6aff_3_nf; -extern cpuop_func op_6aff_3_ff; -extern cpuop_func op_6bff_3_nf; -extern cpuop_func op_6bff_3_ff; -extern cpuop_func op_6cff_3_nf; -extern cpuop_func op_6cff_3_ff; -extern cpuop_func op_6dff_3_nf; -extern cpuop_func op_6dff_3_ff; -extern cpuop_func op_6eff_3_nf; -extern cpuop_func op_6eff_3_ff; -extern cpuop_func op_6fff_3_nf; -extern cpuop_func op_6fff_3_ff; -extern cpuop_func op_8030_3_nf; -extern cpuop_func op_8030_3_ff; -extern cpuop_func op_803b_3_nf; -extern cpuop_func op_803b_3_ff; -extern cpuop_func op_8070_3_nf; -extern cpuop_func op_8070_3_ff; -extern cpuop_func op_807b_3_nf; -extern cpuop_func op_807b_3_ff; -extern cpuop_func op_80b0_3_nf; -extern cpuop_func op_80b0_3_ff; -extern cpuop_func op_80bb_3_nf; -extern cpuop_func op_80bb_3_ff; -extern cpuop_func op_80f0_3_nf; -extern cpuop_func op_80f0_3_ff; -extern cpuop_func op_80fb_3_nf; -extern cpuop_func op_80fb_3_ff; -extern cpuop_func op_8130_3_nf; -extern cpuop_func op_8130_3_ff; -extern cpuop_func op_8170_3_nf; -extern cpuop_func op_8170_3_ff; -extern cpuop_func op_81b0_3_nf; -extern cpuop_func op_81b0_3_ff; -extern cpuop_func op_81f0_3_nf; -extern cpuop_func op_81f0_3_ff; -extern cpuop_func op_81fb_3_nf; -extern cpuop_func op_81fb_3_ff; -extern cpuop_func op_9030_3_nf; -extern cpuop_func op_9030_3_ff; -extern cpuop_func op_903b_3_nf; -extern cpuop_func op_903b_3_ff; -extern cpuop_func op_9070_3_nf; -extern cpuop_func op_9070_3_ff; -extern cpuop_func op_907b_3_nf; -extern cpuop_func op_907b_3_ff; -extern cpuop_func op_90b0_3_nf; -extern cpuop_func op_90b0_3_ff; -extern cpuop_func op_90bb_3_nf; -extern cpuop_func op_90bb_3_ff; -extern cpuop_func op_90f0_3_nf; -extern cpuop_func op_90f0_3_ff; -extern cpuop_func op_90fb_3_nf; -extern cpuop_func op_90fb_3_ff; -extern cpuop_func op_9130_3_nf; -extern cpuop_func op_9130_3_ff; -extern cpuop_func op_9170_3_nf; -extern cpuop_func op_9170_3_ff; -extern cpuop_func op_91b0_3_nf; -extern cpuop_func op_91b0_3_ff; -extern cpuop_func op_91f0_3_nf; -extern cpuop_func op_91f0_3_ff; -extern cpuop_func op_91fb_3_nf; -extern cpuop_func op_91fb_3_ff; -extern cpuop_func op_b030_3_nf; -extern cpuop_func op_b030_3_ff; -extern cpuop_func op_b03b_3_nf; -extern cpuop_func op_b03b_3_ff; -extern cpuop_func op_b070_3_nf; -extern cpuop_func op_b070_3_ff; -extern cpuop_func op_b07b_3_nf; -extern cpuop_func op_b07b_3_ff; -extern cpuop_func op_b0b0_3_nf; -extern cpuop_func op_b0b0_3_ff; -extern cpuop_func op_b0bb_3_nf; -extern cpuop_func op_b0bb_3_ff; -extern cpuop_func op_b0f0_3_nf; -extern cpuop_func op_b0f0_3_ff; -extern cpuop_func op_b0fb_3_nf; -extern cpuop_func op_b0fb_3_ff; -extern cpuop_func op_b130_3_nf; -extern cpuop_func op_b130_3_ff; -extern cpuop_func op_b170_3_nf; -extern cpuop_func op_b170_3_ff; -extern cpuop_func op_b1b0_3_nf; -extern cpuop_func op_b1b0_3_ff; -extern cpuop_func op_b1f0_3_nf; -extern cpuop_func op_b1f0_3_ff; -extern cpuop_func op_b1fb_3_nf; -extern cpuop_func op_b1fb_3_ff; -extern cpuop_func op_c030_3_nf; -extern cpuop_func op_c030_3_ff; -extern cpuop_func op_c03b_3_nf; -extern cpuop_func op_c03b_3_ff; -extern cpuop_func op_c070_3_nf; -extern cpuop_func op_c070_3_ff; -extern cpuop_func op_c07b_3_nf; -extern cpuop_func op_c07b_3_ff; -extern cpuop_func op_c0b0_3_nf; -extern cpuop_func op_c0b0_3_ff; -extern cpuop_func op_c0bb_3_nf; -extern cpuop_func op_c0bb_3_ff; -extern cpuop_func op_c0f0_3_nf; -extern cpuop_func op_c0f0_3_ff; -extern cpuop_func op_c0fb_3_nf; -extern cpuop_func op_c0fb_3_ff; -extern cpuop_func op_c130_3_nf; -extern cpuop_func op_c130_3_ff; -extern cpuop_func op_c170_3_nf; -extern cpuop_func op_c170_3_ff; -extern cpuop_func op_c1b0_3_nf; -extern cpuop_func op_c1b0_3_ff; -extern cpuop_func op_c1f0_3_nf; -extern cpuop_func op_c1f0_3_ff; -extern cpuop_func op_c1fb_3_nf; -extern cpuop_func op_c1fb_3_ff; -extern cpuop_func op_d030_3_nf; -extern cpuop_func op_d030_3_ff; -extern cpuop_func op_d03b_3_nf; -extern cpuop_func op_d03b_3_ff; -extern cpuop_func op_d070_3_nf; -extern cpuop_func op_d070_3_ff; -extern cpuop_func op_d07b_3_nf; -extern cpuop_func op_d07b_3_ff; -extern cpuop_func op_d0b0_3_nf; -extern cpuop_func op_d0b0_3_ff; -extern cpuop_func op_d0bb_3_nf; -extern cpuop_func op_d0bb_3_ff; -extern cpuop_func op_d0f0_3_nf; -extern cpuop_func op_d0f0_3_ff; -extern cpuop_func op_d0fb_3_nf; -extern cpuop_func op_d0fb_3_ff; -extern cpuop_func op_d130_3_nf; -extern cpuop_func op_d130_3_ff; -extern cpuop_func op_d170_3_nf; -extern cpuop_func op_d170_3_ff; -extern cpuop_func op_d1b0_3_nf; -extern cpuop_func op_d1b0_3_ff; -extern cpuop_func op_d1f0_3_nf; -extern cpuop_func op_d1f0_3_ff; -extern cpuop_func op_d1fb_3_nf; -extern cpuop_func op_d1fb_3_ff; -extern cpuop_func op_e0f0_3_nf; -extern cpuop_func op_e0f0_3_ff; -extern cpuop_func op_e1f0_3_nf; -extern cpuop_func op_e1f0_3_ff; -extern cpuop_func op_e2f0_3_nf; -extern cpuop_func op_e2f0_3_ff; -extern cpuop_func op_e3f0_3_nf; -extern cpuop_func op_e3f0_3_ff; -extern cpuop_func op_e4f0_3_nf; -extern cpuop_func op_e4f0_3_ff; -extern cpuop_func op_e5f0_3_nf; -extern cpuop_func op_e5f0_3_ff; -extern cpuop_func op_e6f0_3_nf; -extern cpuop_func op_e6f0_3_ff; -extern cpuop_func op_e7f0_3_nf; -extern cpuop_func op_e7f0_3_ff; -extern cpuop_func op_40c0_4_nf; -extern cpuop_func op_40c0_4_ff; -extern cpuop_func op_40d0_4_nf; -extern cpuop_func op_40d0_4_ff; -extern cpuop_func op_40d8_4_nf; -extern cpuop_func op_40d8_4_ff; -extern cpuop_func op_40e0_4_nf; -extern cpuop_func op_40e0_4_ff; -extern cpuop_func op_40e8_4_nf; -extern cpuop_func op_40e8_4_ff; +extern cpuop_func op_f800_0_nf; +extern cpuop_func op_f800_0_ff; +extern cpuop_func op_f808_0_nf; +extern cpuop_func op_f808_0_ff; +extern cpuop_func op_f810_0_nf; +extern cpuop_func op_f810_0_ff; +extern cpuop_func op_f818_0_nf; +extern cpuop_func op_f818_0_ff; +extern cpuop_func op_f820_0_nf; +extern cpuop_func op_f820_0_ff; +extern cpuop_func op_f828_0_nf; +extern cpuop_func op_f828_0_ff; +extern cpuop_func op_f830_0_nf; +extern cpuop_func op_f830_0_ff; +extern cpuop_func op_f838_0_nf; +extern cpuop_func op_f838_0_ff; +extern cpuop_func op_f839_0_nf; +extern cpuop_func op_f839_0_ff; +extern cpuop_func op_f83a_0_nf; +extern cpuop_func op_f83a_0_ff; +extern cpuop_func op_f83b_0_nf; +extern cpuop_func op_f83b_0_ff; +extern cpuop_func op_4800_2_nf; +extern cpuop_func op_4800_2_ff; +extern cpuop_func op_4810_2_nf; +extern cpuop_func op_4810_2_ff; +extern cpuop_func op_4818_2_nf; +extern cpuop_func op_4818_2_ff; +extern cpuop_func op_4820_2_nf; +extern cpuop_func op_4820_2_ff; +extern cpuop_func op_4828_2_nf; +extern cpuop_func op_4828_2_ff; +extern cpuop_func op_4830_2_nf; +extern cpuop_func op_4830_2_ff; +extern cpuop_func op_4838_2_nf; +extern cpuop_func op_4838_2_ff; +extern cpuop_func op_4839_2_nf; +extern cpuop_func op_4839_2_ff; +extern cpuop_func op_8100_2_nf; +extern cpuop_func op_8100_2_ff; +extern cpuop_func op_8108_2_nf; +extern cpuop_func op_8108_2_ff; +extern cpuop_func op_c100_2_nf; +extern cpuop_func op_c100_2_ff; +extern cpuop_func op_c108_2_nf; +extern cpuop_func op_c108_2_ff; +extern cpuop_func op_0030_4_nf; +extern cpuop_func op_0030_4_ff; +extern cpuop_func op_0070_4_nf; +extern cpuop_func op_0070_4_ff; +extern cpuop_func op_00b0_4_nf; +extern cpuop_func op_00b0_4_ff; +extern cpuop_func op_0130_4_nf; +extern cpuop_func op_0130_4_ff; +extern cpuop_func op_013b_4_nf; +extern cpuop_func op_013b_4_ff; +extern cpuop_func op_0170_4_nf; +extern cpuop_func op_0170_4_ff; +extern cpuop_func op_017b_4_nf; +extern cpuop_func op_017b_4_ff; +extern cpuop_func op_01b0_4_nf; +extern cpuop_func op_01b0_4_ff; +extern cpuop_func op_01bb_4_nf; +extern cpuop_func op_01bb_4_ff; +extern cpuop_func op_01f0_4_nf; +extern cpuop_func op_01f0_4_ff; +extern cpuop_func op_01fb_4_nf; +extern cpuop_func op_01fb_4_ff; +extern cpuop_func op_0230_4_nf; +extern cpuop_func op_0230_4_ff; +extern cpuop_func op_0270_4_nf; +extern cpuop_func op_0270_4_ff; +extern cpuop_func op_02b0_4_nf; +extern cpuop_func op_02b0_4_ff; +extern cpuop_func op_0430_4_nf; +extern cpuop_func op_0430_4_ff; +extern cpuop_func op_0470_4_nf; +extern cpuop_func op_0470_4_ff; +extern cpuop_func op_04b0_4_nf; +extern cpuop_func op_04b0_4_ff; +extern cpuop_func op_0630_4_nf; +extern cpuop_func op_0630_4_ff; +extern cpuop_func op_0670_4_nf; +extern cpuop_func op_0670_4_ff; +extern cpuop_func op_06b0_4_nf; +extern cpuop_func op_06b0_4_ff; +extern cpuop_func op_0830_4_nf; +extern cpuop_func op_0830_4_ff; +extern cpuop_func op_083b_4_nf; +extern cpuop_func op_083b_4_ff; +extern cpuop_func op_0870_4_nf; +extern cpuop_func op_0870_4_ff; +extern cpuop_func op_087b_4_nf; +extern cpuop_func op_087b_4_ff; +extern cpuop_func op_08b0_4_nf; +extern cpuop_func op_08b0_4_ff; +extern cpuop_func op_08bb_4_nf; +extern cpuop_func op_08bb_4_ff; +extern cpuop_func op_08f0_4_nf; +extern cpuop_func op_08f0_4_ff; +extern cpuop_func op_08fb_4_nf; +extern cpuop_func op_08fb_4_ff; +extern cpuop_func op_0a30_4_nf; +extern cpuop_func op_0a30_4_ff; +extern cpuop_func op_0a70_4_nf; +extern cpuop_func op_0a70_4_ff; +extern cpuop_func op_0ab0_4_nf; +extern cpuop_func op_0ab0_4_ff; +extern cpuop_func op_0c30_4_nf; +extern cpuop_func op_0c30_4_ff; +extern cpuop_func op_0c70_4_nf; +extern cpuop_func op_0c70_4_ff; +extern cpuop_func op_0cb0_4_nf; +extern cpuop_func op_0cb0_4_ff; +extern cpuop_func op_1030_4_nf; +extern cpuop_func op_1030_4_ff; +extern cpuop_func op_103b_4_nf; +extern cpuop_func op_103b_4_ff; +extern cpuop_func op_10b0_4_nf; +extern cpuop_func op_10b0_4_ff; +extern cpuop_func op_10bb_4_nf; +extern cpuop_func op_10bb_4_ff; +extern cpuop_func op_10f0_4_nf; +extern cpuop_func op_10f0_4_ff; +extern cpuop_func op_10fb_4_nf; +extern cpuop_func op_10fb_4_ff; +extern cpuop_func op_1130_4_nf; +extern cpuop_func op_1130_4_ff; +extern cpuop_func op_113b_4_nf; +extern cpuop_func op_113b_4_ff; +extern cpuop_func op_1170_4_nf; +extern cpuop_func op_1170_4_ff; +extern cpuop_func op_117b_4_nf; +extern cpuop_func op_117b_4_ff; +extern cpuop_func op_1180_4_nf; +extern cpuop_func op_1180_4_ff; +extern cpuop_func op_1190_4_nf; +extern cpuop_func op_1190_4_ff; +extern cpuop_func op_1198_4_nf; +extern cpuop_func op_1198_4_ff; +extern cpuop_func op_11a0_4_nf; +extern cpuop_func op_11a0_4_ff; +extern cpuop_func op_11a8_4_nf; +extern cpuop_func op_11a8_4_ff; +extern cpuop_func op_11b0_4_nf; +extern cpuop_func op_11b0_4_ff; +extern cpuop_func op_11b8_4_nf; +extern cpuop_func op_11b8_4_ff; +extern cpuop_func op_11b9_4_nf; +extern cpuop_func op_11b9_4_ff; +extern cpuop_func op_11ba_4_nf; +extern cpuop_func op_11ba_4_ff; +extern cpuop_func op_11bb_4_nf; +extern cpuop_func op_11bb_4_ff; +extern cpuop_func op_11bc_4_nf; +extern cpuop_func op_11bc_4_ff; +extern cpuop_func op_11f0_4_nf; +extern cpuop_func op_11f0_4_ff; +extern cpuop_func op_11fb_4_nf; +extern cpuop_func op_11fb_4_ff; +extern cpuop_func op_13f0_4_nf; +extern cpuop_func op_13f0_4_ff; +extern cpuop_func op_13fb_4_nf; +extern cpuop_func op_13fb_4_ff; +extern cpuop_func op_2030_4_nf; +extern cpuop_func op_2030_4_ff; +extern cpuop_func op_203b_4_nf; +extern cpuop_func op_203b_4_ff; +extern cpuop_func op_2070_4_nf; +extern cpuop_func op_2070_4_ff; +extern cpuop_func op_207b_4_nf; +extern cpuop_func op_207b_4_ff; +extern cpuop_func op_20b0_4_nf; +extern cpuop_func op_20b0_4_ff; +extern cpuop_func op_20bb_4_nf; +extern cpuop_func op_20bb_4_ff; +extern cpuop_func op_20f0_4_nf; +extern cpuop_func op_20f0_4_ff; +extern cpuop_func op_20fb_4_nf; +extern cpuop_func op_20fb_4_ff; +extern cpuop_func op_2130_4_nf; +extern cpuop_func op_2130_4_ff; +extern cpuop_func op_213b_4_nf; +extern cpuop_func op_213b_4_ff; +extern cpuop_func op_2170_4_nf; +extern cpuop_func op_2170_4_ff; +extern cpuop_func op_217b_4_nf; +extern cpuop_func op_217b_4_ff; +extern cpuop_func op_2180_4_nf; +extern cpuop_func op_2180_4_ff; +extern cpuop_func op_2188_4_nf; +extern cpuop_func op_2188_4_ff; +extern cpuop_func op_2190_4_nf; +extern cpuop_func op_2190_4_ff; +extern cpuop_func op_2198_4_nf; +extern cpuop_func op_2198_4_ff; +extern cpuop_func op_21a0_4_nf; +extern cpuop_func op_21a0_4_ff; +extern cpuop_func op_21a8_4_nf; +extern cpuop_func op_21a8_4_ff; +extern cpuop_func op_21b0_4_nf; +extern cpuop_func op_21b0_4_ff; +extern cpuop_func op_21b8_4_nf; +extern cpuop_func op_21b8_4_ff; +extern cpuop_func op_21b9_4_nf; +extern cpuop_func op_21b9_4_ff; +extern cpuop_func op_21ba_4_nf; +extern cpuop_func op_21ba_4_ff; +extern cpuop_func op_21bb_4_nf; +extern cpuop_func op_21bb_4_ff; +extern cpuop_func op_21bc_4_nf; +extern cpuop_func op_21bc_4_ff; +extern cpuop_func op_21f0_4_nf; +extern cpuop_func op_21f0_4_ff; +extern cpuop_func op_21fb_4_nf; +extern cpuop_func op_21fb_4_ff; +extern cpuop_func op_23f0_4_nf; +extern cpuop_func op_23f0_4_ff; +extern cpuop_func op_23fb_4_nf; +extern cpuop_func op_23fb_4_ff; +extern cpuop_func op_3030_4_nf; +extern cpuop_func op_3030_4_ff; +extern cpuop_func op_303b_4_nf; +extern cpuop_func op_303b_4_ff; +extern cpuop_func op_3070_4_nf; +extern cpuop_func op_3070_4_ff; +extern cpuop_func op_307b_4_nf; +extern cpuop_func op_307b_4_ff; +extern cpuop_func op_30b0_4_nf; +extern cpuop_func op_30b0_4_ff; +extern cpuop_func op_30bb_4_nf; +extern cpuop_func op_30bb_4_ff; +extern cpuop_func op_30f0_4_nf; +extern cpuop_func op_30f0_4_ff; +extern cpuop_func op_30fb_4_nf; +extern cpuop_func op_30fb_4_ff; +extern cpuop_func op_3130_4_nf; +extern cpuop_func op_3130_4_ff; +extern cpuop_func op_313b_4_nf; +extern cpuop_func op_313b_4_ff; +extern cpuop_func op_3170_4_nf; +extern cpuop_func op_3170_4_ff; +extern cpuop_func op_317b_4_nf; +extern cpuop_func op_317b_4_ff; +extern cpuop_func op_3180_4_nf; +extern cpuop_func op_3180_4_ff; +extern cpuop_func op_3188_4_nf; +extern cpuop_func op_3188_4_ff; +extern cpuop_func op_3190_4_nf; +extern cpuop_func op_3190_4_ff; +extern cpuop_func op_3198_4_nf; +extern cpuop_func op_3198_4_ff; +extern cpuop_func op_31a0_4_nf; +extern cpuop_func op_31a0_4_ff; +extern cpuop_func op_31a8_4_nf; +extern cpuop_func op_31a8_4_ff; +extern cpuop_func op_31b0_4_nf; +extern cpuop_func op_31b0_4_ff; +extern cpuop_func op_31b8_4_nf; +extern cpuop_func op_31b8_4_ff; +extern cpuop_func op_31b9_4_nf; +extern cpuop_func op_31b9_4_ff; +extern cpuop_func op_31ba_4_nf; +extern cpuop_func op_31ba_4_ff; +extern cpuop_func op_31bb_4_nf; +extern cpuop_func op_31bb_4_ff; +extern cpuop_func op_31bc_4_nf; +extern cpuop_func op_31bc_4_ff; +extern cpuop_func op_31f0_4_nf; +extern cpuop_func op_31f0_4_ff; +extern cpuop_func op_31fb_4_nf; +extern cpuop_func op_31fb_4_ff; +extern cpuop_func op_33f0_4_nf; +extern cpuop_func op_33f0_4_ff; +extern cpuop_func op_33fb_4_nf; +extern cpuop_func op_33fb_4_ff; +extern cpuop_func op_4030_4_nf; +extern cpuop_func op_4030_4_ff; +extern cpuop_func op_4070_4_nf; +extern cpuop_func op_4070_4_ff; +extern cpuop_func op_40b0_4_nf; +extern cpuop_func op_40b0_4_ff; extern cpuop_func op_40f0_4_nf; extern cpuop_func op_40f0_4_ff; -extern cpuop_func op_40f8_4_nf; -extern cpuop_func op_40f8_4_ff; -extern cpuop_func op_40f9_4_nf; -extern cpuop_func op_40f9_4_ff; -extern cpuop_func op_4e73_4_nf; -extern cpuop_func op_4e73_4_ff; -extern cpuop_func op_0000_5_nf; -extern cpuop_func op_0000_5_ff; -extern cpuop_func op_0010_5_nf; -extern cpuop_func op_0010_5_ff; -extern cpuop_func op_0018_5_nf; -extern cpuop_func op_0018_5_ff; -extern cpuop_func op_0020_5_nf; -extern cpuop_func op_0020_5_ff; -extern cpuop_func op_0028_5_nf; -extern cpuop_func op_0028_5_ff; -extern cpuop_func op_0030_5_nf; -extern cpuop_func op_0030_5_ff; -extern cpuop_func op_0038_5_nf; -extern cpuop_func op_0038_5_ff; -extern cpuop_func op_0039_5_nf; -extern cpuop_func op_0039_5_ff; -extern cpuop_func op_003c_5_nf; -extern cpuop_func op_003c_5_ff; -extern cpuop_func op_0040_5_nf; -extern cpuop_func op_0040_5_ff; -extern cpuop_func op_0050_5_nf; -extern cpuop_func op_0050_5_ff; -extern cpuop_func op_0058_5_nf; -extern cpuop_func op_0058_5_ff; -extern cpuop_func op_0060_5_nf; -extern cpuop_func op_0060_5_ff; -extern cpuop_func op_0068_5_nf; -extern cpuop_func op_0068_5_ff; -extern cpuop_func op_0070_5_nf; -extern cpuop_func op_0070_5_ff; -extern cpuop_func op_0078_5_nf; -extern cpuop_func op_0078_5_ff; -extern cpuop_func op_0079_5_nf; -extern cpuop_func op_0079_5_ff; -extern cpuop_func op_007c_5_nf; -extern cpuop_func op_007c_5_ff; -extern cpuop_func op_0080_5_nf; -extern cpuop_func op_0080_5_ff; -extern cpuop_func op_0090_5_nf; -extern cpuop_func op_0090_5_ff; -extern cpuop_func op_0098_5_nf; -extern cpuop_func op_0098_5_ff; -extern cpuop_func op_00a0_5_nf; -extern cpuop_func op_00a0_5_ff; -extern cpuop_func op_00a8_5_nf; -extern cpuop_func op_00a8_5_ff; -extern cpuop_func op_00b0_5_nf; -extern cpuop_func op_00b0_5_ff; -extern cpuop_func op_00b8_5_nf; -extern cpuop_func op_00b8_5_ff; -extern cpuop_func op_00b9_5_nf; -extern cpuop_func op_00b9_5_ff; -extern cpuop_func op_0100_5_nf; -extern cpuop_func op_0100_5_ff; -extern cpuop_func op_0108_5_nf; -extern cpuop_func op_0108_5_ff; -extern cpuop_func op_0110_5_nf; -extern cpuop_func op_0110_5_ff; -extern cpuop_func op_0118_5_nf; -extern cpuop_func op_0118_5_ff; -extern cpuop_func op_0120_5_nf; -extern cpuop_func op_0120_5_ff; -extern cpuop_func op_0128_5_nf; -extern cpuop_func op_0128_5_ff; -extern cpuop_func op_0130_5_nf; -extern cpuop_func op_0130_5_ff; -extern cpuop_func op_0138_5_nf; -extern cpuop_func op_0138_5_ff; -extern cpuop_func op_0139_5_nf; -extern cpuop_func op_0139_5_ff; -extern cpuop_func op_013a_5_nf; -extern cpuop_func op_013a_5_ff; -extern cpuop_func op_013b_5_nf; -extern cpuop_func op_013b_5_ff; -extern cpuop_func op_013c_5_nf; -extern cpuop_func op_013c_5_ff; -extern cpuop_func op_0140_5_nf; -extern cpuop_func op_0140_5_ff; -extern cpuop_func op_0148_5_nf; -extern cpuop_func op_0148_5_ff; -extern cpuop_func op_0150_5_nf; -extern cpuop_func op_0150_5_ff; -extern cpuop_func op_0158_5_nf; -extern cpuop_func op_0158_5_ff; -extern cpuop_func op_0160_5_nf; -extern cpuop_func op_0160_5_ff; -extern cpuop_func op_0168_5_nf; -extern cpuop_func op_0168_5_ff; -extern cpuop_func op_0170_5_nf; -extern cpuop_func op_0170_5_ff; -extern cpuop_func op_0178_5_nf; -extern cpuop_func op_0178_5_ff; -extern cpuop_func op_0179_5_nf; -extern cpuop_func op_0179_5_ff; -extern cpuop_func op_017a_5_nf; -extern cpuop_func op_017a_5_ff; -extern cpuop_func op_017b_5_nf; -extern cpuop_func op_017b_5_ff; -extern cpuop_func op_0180_5_nf; -extern cpuop_func op_0180_5_ff; -extern cpuop_func op_0188_5_nf; -extern cpuop_func op_0188_5_ff; -extern cpuop_func op_0190_5_nf; -extern cpuop_func op_0190_5_ff; -extern cpuop_func op_0198_5_nf; -extern cpuop_func op_0198_5_ff; -extern cpuop_func op_01a0_5_nf; -extern cpuop_func op_01a0_5_ff; -extern cpuop_func op_01a8_5_nf; -extern cpuop_func op_01a8_5_ff; -extern cpuop_func op_01b0_5_nf; -extern cpuop_func op_01b0_5_ff; -extern cpuop_func op_01b8_5_nf; -extern cpuop_func op_01b8_5_ff; -extern cpuop_func op_01b9_5_nf; -extern cpuop_func op_01b9_5_ff; -extern cpuop_func op_01ba_5_nf; -extern cpuop_func op_01ba_5_ff; -extern cpuop_func op_01bb_5_nf; -extern cpuop_func op_01bb_5_ff; -extern cpuop_func op_01c0_5_nf; -extern cpuop_func op_01c0_5_ff; -extern cpuop_func op_01c8_5_nf; -extern cpuop_func op_01c8_5_ff; -extern cpuop_func op_01d0_5_nf; -extern cpuop_func op_01d0_5_ff; -extern cpuop_func op_01d8_5_nf; -extern cpuop_func op_01d8_5_ff; -extern cpuop_func op_01e0_5_nf; -extern cpuop_func op_01e0_5_ff; -extern cpuop_func op_01e8_5_nf; -extern cpuop_func op_01e8_5_ff; -extern cpuop_func op_01f0_5_nf; -extern cpuop_func op_01f0_5_ff; -extern cpuop_func op_01f8_5_nf; -extern cpuop_func op_01f8_5_ff; -extern cpuop_func op_01f9_5_nf; -extern cpuop_func op_01f9_5_ff; -extern cpuop_func op_01fa_5_nf; -extern cpuop_func op_01fa_5_ff; -extern cpuop_func op_01fb_5_nf; -extern cpuop_func op_01fb_5_ff; -extern cpuop_func op_0200_5_nf; -extern cpuop_func op_0200_5_ff; -extern cpuop_func op_0210_5_nf; -extern cpuop_func op_0210_5_ff; -extern cpuop_func op_0218_5_nf; -extern cpuop_func op_0218_5_ff; -extern cpuop_func op_0220_5_nf; -extern cpuop_func op_0220_5_ff; -extern cpuop_func op_0228_5_nf; -extern cpuop_func op_0228_5_ff; -extern cpuop_func op_0230_5_nf; -extern cpuop_func op_0230_5_ff; -extern cpuop_func op_0238_5_nf; -extern cpuop_func op_0238_5_ff; -extern cpuop_func op_0239_5_nf; -extern cpuop_func op_0239_5_ff; -extern cpuop_func op_023c_5_nf; -extern cpuop_func op_023c_5_ff; -extern cpuop_func op_0240_5_nf; -extern cpuop_func op_0240_5_ff; -extern cpuop_func op_0250_5_nf; -extern cpuop_func op_0250_5_ff; -extern cpuop_func op_0258_5_nf; -extern cpuop_func op_0258_5_ff; -extern cpuop_func op_0260_5_nf; -extern cpuop_func op_0260_5_ff; -extern cpuop_func op_0268_5_nf; -extern cpuop_func op_0268_5_ff; -extern cpuop_func op_0270_5_nf; -extern cpuop_func op_0270_5_ff; -extern cpuop_func op_0278_5_nf; -extern cpuop_func op_0278_5_ff; -extern cpuop_func op_0279_5_nf; -extern cpuop_func op_0279_5_ff; -extern cpuop_func op_027c_5_nf; -extern cpuop_func op_027c_5_ff; -extern cpuop_func op_0280_5_nf; -extern cpuop_func op_0280_5_ff; -extern cpuop_func op_0290_5_nf; -extern cpuop_func op_0290_5_ff; -extern cpuop_func op_0298_5_nf; -extern cpuop_func op_0298_5_ff; -extern cpuop_func op_02a0_5_nf; -extern cpuop_func op_02a0_5_ff; -extern cpuop_func op_02a8_5_nf; -extern cpuop_func op_02a8_5_ff; -extern cpuop_func op_02b0_5_nf; -extern cpuop_func op_02b0_5_ff; -extern cpuop_func op_02b8_5_nf; -extern cpuop_func op_02b8_5_ff; -extern cpuop_func op_02b9_5_nf; -extern cpuop_func op_02b9_5_ff; -extern cpuop_func op_0400_5_nf; -extern cpuop_func op_0400_5_ff; -extern cpuop_func op_0410_5_nf; -extern cpuop_func op_0410_5_ff; -extern cpuop_func op_0418_5_nf; -extern cpuop_func op_0418_5_ff; -extern cpuop_func op_0420_5_nf; -extern cpuop_func op_0420_5_ff; -extern cpuop_func op_0428_5_nf; -extern cpuop_func op_0428_5_ff; -extern cpuop_func op_0430_5_nf; -extern cpuop_func op_0430_5_ff; -extern cpuop_func op_0438_5_nf; -extern cpuop_func op_0438_5_ff; -extern cpuop_func op_0439_5_nf; -extern cpuop_func op_0439_5_ff; -extern cpuop_func op_0440_5_nf; -extern cpuop_func op_0440_5_ff; -extern cpuop_func op_0450_5_nf; -extern cpuop_func op_0450_5_ff; -extern cpuop_func op_0458_5_nf; -extern cpuop_func op_0458_5_ff; -extern cpuop_func op_0460_5_nf; -extern cpuop_func op_0460_5_ff; -extern cpuop_func op_0468_5_nf; -extern cpuop_func op_0468_5_ff; -extern cpuop_func op_0470_5_nf; -extern cpuop_func op_0470_5_ff; -extern cpuop_func op_0478_5_nf; -extern cpuop_func op_0478_5_ff; -extern cpuop_func op_0479_5_nf; -extern cpuop_func op_0479_5_ff; -extern cpuop_func op_0480_5_nf; -extern cpuop_func op_0480_5_ff; -extern cpuop_func op_0490_5_nf; -extern cpuop_func op_0490_5_ff; -extern cpuop_func op_0498_5_nf; -extern cpuop_func op_0498_5_ff; -extern cpuop_func op_04a0_5_nf; -extern cpuop_func op_04a0_5_ff; -extern cpuop_func op_04a8_5_nf; -extern cpuop_func op_04a8_5_ff; -extern cpuop_func op_04b0_5_nf; -extern cpuop_func op_04b0_5_ff; -extern cpuop_func op_04b8_5_nf; -extern cpuop_func op_04b8_5_ff; -extern cpuop_func op_04b9_5_nf; -extern cpuop_func op_04b9_5_ff; -extern cpuop_func op_0600_5_nf; -extern cpuop_func op_0600_5_ff; -extern cpuop_func op_0610_5_nf; -extern cpuop_func op_0610_5_ff; -extern cpuop_func op_0618_5_nf; -extern cpuop_func op_0618_5_ff; -extern cpuop_func op_0620_5_nf; -extern cpuop_func op_0620_5_ff; -extern cpuop_func op_0628_5_nf; -extern cpuop_func op_0628_5_ff; -extern cpuop_func op_0630_5_nf; -extern cpuop_func op_0630_5_ff; -extern cpuop_func op_0638_5_nf; -extern cpuop_func op_0638_5_ff; -extern cpuop_func op_0639_5_nf; -extern cpuop_func op_0639_5_ff; -extern cpuop_func op_0640_5_nf; -extern cpuop_func op_0640_5_ff; -extern cpuop_func op_0650_5_nf; -extern cpuop_func op_0650_5_ff; -extern cpuop_func op_0658_5_nf; -extern cpuop_func op_0658_5_ff; -extern cpuop_func op_0660_5_nf; -extern cpuop_func op_0660_5_ff; -extern cpuop_func op_0668_5_nf; -extern cpuop_func op_0668_5_ff; -extern cpuop_func op_0670_5_nf; -extern cpuop_func op_0670_5_ff; -extern cpuop_func op_0678_5_nf; -extern cpuop_func op_0678_5_ff; -extern cpuop_func op_0679_5_nf; -extern cpuop_func op_0679_5_ff; -extern cpuop_func op_0680_5_nf; -extern cpuop_func op_0680_5_ff; -extern cpuop_func op_0690_5_nf; -extern cpuop_func op_0690_5_ff; -extern cpuop_func op_0698_5_nf; -extern cpuop_func op_0698_5_ff; -extern cpuop_func op_06a0_5_nf; -extern cpuop_func op_06a0_5_ff; -extern cpuop_func op_06a8_5_nf; -extern cpuop_func op_06a8_5_ff; -extern cpuop_func op_06b0_5_nf; -extern cpuop_func op_06b0_5_ff; -extern cpuop_func op_06b8_5_nf; -extern cpuop_func op_06b8_5_ff; -extern cpuop_func op_06b9_5_nf; -extern cpuop_func op_06b9_5_ff; -extern cpuop_func op_0800_5_nf; -extern cpuop_func op_0800_5_ff; -extern cpuop_func op_0810_5_nf; -extern cpuop_func op_0810_5_ff; -extern cpuop_func op_0818_5_nf; -extern cpuop_func op_0818_5_ff; -extern cpuop_func op_0820_5_nf; -extern cpuop_func op_0820_5_ff; -extern cpuop_func op_0828_5_nf; -extern cpuop_func op_0828_5_ff; -extern cpuop_func op_0830_5_nf; -extern cpuop_func op_0830_5_ff; -extern cpuop_func op_0838_5_nf; -extern cpuop_func op_0838_5_ff; -extern cpuop_func op_0839_5_nf; -extern cpuop_func op_0839_5_ff; -extern cpuop_func op_083a_5_nf; -extern cpuop_func op_083a_5_ff; -extern cpuop_func op_083b_5_nf; -extern cpuop_func op_083b_5_ff; -extern cpuop_func op_083c_5_nf; -extern cpuop_func op_083c_5_ff; -extern cpuop_func op_0840_5_nf; -extern cpuop_func op_0840_5_ff; -extern cpuop_func op_0850_5_nf; -extern cpuop_func op_0850_5_ff; -extern cpuop_func op_0858_5_nf; -extern cpuop_func op_0858_5_ff; -extern cpuop_func op_0860_5_nf; -extern cpuop_func op_0860_5_ff; -extern cpuop_func op_0868_5_nf; -extern cpuop_func op_0868_5_ff; -extern cpuop_func op_0870_5_nf; -extern cpuop_func op_0870_5_ff; -extern cpuop_func op_0878_5_nf; -extern cpuop_func op_0878_5_ff; -extern cpuop_func op_0879_5_nf; -extern cpuop_func op_0879_5_ff; -extern cpuop_func op_087a_5_nf; -extern cpuop_func op_087a_5_ff; -extern cpuop_func op_087b_5_nf; -extern cpuop_func op_087b_5_ff; -extern cpuop_func op_0880_5_nf; -extern cpuop_func op_0880_5_ff; -extern cpuop_func op_0890_5_nf; -extern cpuop_func op_0890_5_ff; -extern cpuop_func op_0898_5_nf; -extern cpuop_func op_0898_5_ff; -extern cpuop_func op_08a0_5_nf; -extern cpuop_func op_08a0_5_ff; -extern cpuop_func op_08a8_5_nf; -extern cpuop_func op_08a8_5_ff; -extern cpuop_func op_08b0_5_nf; -extern cpuop_func op_08b0_5_ff; -extern cpuop_func op_08b8_5_nf; -extern cpuop_func op_08b8_5_ff; -extern cpuop_func op_08b9_5_nf; -extern cpuop_func op_08b9_5_ff; -extern cpuop_func op_08ba_5_nf; -extern cpuop_func op_08ba_5_ff; -extern cpuop_func op_08bb_5_nf; -extern cpuop_func op_08bb_5_ff; -extern cpuop_func op_08c0_5_nf; -extern cpuop_func op_08c0_5_ff; -extern cpuop_func op_08d0_5_nf; -extern cpuop_func op_08d0_5_ff; -extern cpuop_func op_08d8_5_nf; -extern cpuop_func op_08d8_5_ff; -extern cpuop_func op_08e0_5_nf; -extern cpuop_func op_08e0_5_ff; -extern cpuop_func op_08e8_5_nf; -extern cpuop_func op_08e8_5_ff; -extern cpuop_func op_08f0_5_nf; -extern cpuop_func op_08f0_5_ff; -extern cpuop_func op_08f8_5_nf; -extern cpuop_func op_08f8_5_ff; -extern cpuop_func op_08f9_5_nf; -extern cpuop_func op_08f9_5_ff; -extern cpuop_func op_08fa_5_nf; -extern cpuop_func op_08fa_5_ff; -extern cpuop_func op_08fb_5_nf; -extern cpuop_func op_08fb_5_ff; -extern cpuop_func op_0a00_5_nf; -extern cpuop_func op_0a00_5_ff; -extern cpuop_func op_0a10_5_nf; -extern cpuop_func op_0a10_5_ff; -extern cpuop_func op_0a18_5_nf; -extern cpuop_func op_0a18_5_ff; -extern cpuop_func op_0a20_5_nf; -extern cpuop_func op_0a20_5_ff; -extern cpuop_func op_0a28_5_nf; -extern cpuop_func op_0a28_5_ff; -extern cpuop_func op_0a30_5_nf; -extern cpuop_func op_0a30_5_ff; -extern cpuop_func op_0a38_5_nf; -extern cpuop_func op_0a38_5_ff; -extern cpuop_func op_0a39_5_nf; -extern cpuop_func op_0a39_5_ff; -extern cpuop_func op_0a3c_5_nf; -extern cpuop_func op_0a3c_5_ff; -extern cpuop_func op_0a40_5_nf; -extern cpuop_func op_0a40_5_ff; -extern cpuop_func op_0a50_5_nf; -extern cpuop_func op_0a50_5_ff; -extern cpuop_func op_0a58_5_nf; -extern cpuop_func op_0a58_5_ff; -extern cpuop_func op_0a60_5_nf; -extern cpuop_func op_0a60_5_ff; -extern cpuop_func op_0a68_5_nf; -extern cpuop_func op_0a68_5_ff; -extern cpuop_func op_0a70_5_nf; -extern cpuop_func op_0a70_5_ff; -extern cpuop_func op_0a78_5_nf; -extern cpuop_func op_0a78_5_ff; -extern cpuop_func op_0a79_5_nf; -extern cpuop_func op_0a79_5_ff; -extern cpuop_func op_0a7c_5_nf; -extern cpuop_func op_0a7c_5_ff; -extern cpuop_func op_0a80_5_nf; -extern cpuop_func op_0a80_5_ff; -extern cpuop_func op_0a90_5_nf; -extern cpuop_func op_0a90_5_ff; -extern cpuop_func op_0a98_5_nf; -extern cpuop_func op_0a98_5_ff; -extern cpuop_func op_0aa0_5_nf; -extern cpuop_func op_0aa0_5_ff; -extern cpuop_func op_0aa8_5_nf; -extern cpuop_func op_0aa8_5_ff; -extern cpuop_func op_0ab0_5_nf; -extern cpuop_func op_0ab0_5_ff; -extern cpuop_func op_0ab8_5_nf; -extern cpuop_func op_0ab8_5_ff; -extern cpuop_func op_0ab9_5_nf; -extern cpuop_func op_0ab9_5_ff; -extern cpuop_func op_0c00_5_nf; -extern cpuop_func op_0c00_5_ff; -extern cpuop_func op_0c10_5_nf; -extern cpuop_func op_0c10_5_ff; -extern cpuop_func op_0c18_5_nf; -extern cpuop_func op_0c18_5_ff; -extern cpuop_func op_0c20_5_nf; -extern cpuop_func op_0c20_5_ff; -extern cpuop_func op_0c28_5_nf; -extern cpuop_func op_0c28_5_ff; -extern cpuop_func op_0c30_5_nf; -extern cpuop_func op_0c30_5_ff; -extern cpuop_func op_0c38_5_nf; -extern cpuop_func op_0c38_5_ff; -extern cpuop_func op_0c39_5_nf; -extern cpuop_func op_0c39_5_ff; -extern cpuop_func op_0c40_5_nf; -extern cpuop_func op_0c40_5_ff; -extern cpuop_func op_0c50_5_nf; -extern cpuop_func op_0c50_5_ff; -extern cpuop_func op_0c58_5_nf; -extern cpuop_func op_0c58_5_ff; -extern cpuop_func op_0c60_5_nf; -extern cpuop_func op_0c60_5_ff; -extern cpuop_func op_0c68_5_nf; -extern cpuop_func op_0c68_5_ff; -extern cpuop_func op_0c70_5_nf; -extern cpuop_func op_0c70_5_ff; -extern cpuop_func op_0c78_5_nf; -extern cpuop_func op_0c78_5_ff; -extern cpuop_func op_0c79_5_nf; -extern cpuop_func op_0c79_5_ff; -extern cpuop_func op_0c80_5_nf; -extern cpuop_func op_0c80_5_ff; -extern cpuop_func op_0c90_5_nf; -extern cpuop_func op_0c90_5_ff; -extern cpuop_func op_0c98_5_nf; -extern cpuop_func op_0c98_5_ff; -extern cpuop_func op_0ca0_5_nf; -extern cpuop_func op_0ca0_5_ff; -extern cpuop_func op_0ca8_5_nf; -extern cpuop_func op_0ca8_5_ff; -extern cpuop_func op_0cb0_5_nf; -extern cpuop_func op_0cb0_5_ff; -extern cpuop_func op_0cb8_5_nf; -extern cpuop_func op_0cb8_5_ff; -extern cpuop_func op_0cb9_5_nf; -extern cpuop_func op_0cb9_5_ff; -extern cpuop_func op_1000_5_nf; -extern cpuop_func op_1000_5_ff; -extern cpuop_func op_1010_5_nf; -extern cpuop_func op_1010_5_ff; -extern cpuop_func op_1018_5_nf; -extern cpuop_func op_1018_5_ff; -extern cpuop_func op_1020_5_nf; -extern cpuop_func op_1020_5_ff; -extern cpuop_func op_1028_5_nf; -extern cpuop_func op_1028_5_ff; -extern cpuop_func op_1030_5_nf; -extern cpuop_func op_1030_5_ff; -extern cpuop_func op_1038_5_nf; -extern cpuop_func op_1038_5_ff; -extern cpuop_func op_1039_5_nf; -extern cpuop_func op_1039_5_ff; -extern cpuop_func op_103a_5_nf; -extern cpuop_func op_103a_5_ff; -extern cpuop_func op_103b_5_nf; -extern cpuop_func op_103b_5_ff; -extern cpuop_func op_103c_5_nf; -extern cpuop_func op_103c_5_ff; -extern cpuop_func op_1080_5_nf; -extern cpuop_func op_1080_5_ff; -extern cpuop_func op_1090_5_nf; -extern cpuop_func op_1090_5_ff; -extern cpuop_func op_1098_5_nf; -extern cpuop_func op_1098_5_ff; -extern cpuop_func op_10a0_5_nf; -extern cpuop_func op_10a0_5_ff; -extern cpuop_func op_10a8_5_nf; -extern cpuop_func op_10a8_5_ff; -extern cpuop_func op_10b0_5_nf; -extern cpuop_func op_10b0_5_ff; -extern cpuop_func op_10b8_5_nf; -extern cpuop_func op_10b8_5_ff; -extern cpuop_func op_10b9_5_nf; -extern cpuop_func op_10b9_5_ff; -extern cpuop_func op_10ba_5_nf; -extern cpuop_func op_10ba_5_ff; -extern cpuop_func op_10bb_5_nf; -extern cpuop_func op_10bb_5_ff; -extern cpuop_func op_10bc_5_nf; -extern cpuop_func op_10bc_5_ff; -extern cpuop_func op_10c0_5_nf; -extern cpuop_func op_10c0_5_ff; -extern cpuop_func op_10d0_5_nf; -extern cpuop_func op_10d0_5_ff; -extern cpuop_func op_10d8_5_nf; -extern cpuop_func op_10d8_5_ff; -extern cpuop_func op_10e0_5_nf; -extern cpuop_func op_10e0_5_ff; -extern cpuop_func op_10e8_5_nf; -extern cpuop_func op_10e8_5_ff; -extern cpuop_func op_10f0_5_nf; -extern cpuop_func op_10f0_5_ff; -extern cpuop_func op_10f8_5_nf; -extern cpuop_func op_10f8_5_ff; -extern cpuop_func op_10f9_5_nf; -extern cpuop_func op_10f9_5_ff; -extern cpuop_func op_10fa_5_nf; -extern cpuop_func op_10fa_5_ff; -extern cpuop_func op_10fb_5_nf; -extern cpuop_func op_10fb_5_ff; -extern cpuop_func op_10fc_5_nf; -extern cpuop_func op_10fc_5_ff; -extern cpuop_func op_1100_5_nf; -extern cpuop_func op_1100_5_ff; -extern cpuop_func op_1110_5_nf; -extern cpuop_func op_1110_5_ff; -extern cpuop_func op_1118_5_nf; -extern cpuop_func op_1118_5_ff; -extern cpuop_func op_1120_5_nf; -extern cpuop_func op_1120_5_ff; -extern cpuop_func op_1128_5_nf; -extern cpuop_func op_1128_5_ff; -extern cpuop_func op_1130_5_nf; -extern cpuop_func op_1130_5_ff; -extern cpuop_func op_1138_5_nf; -extern cpuop_func op_1138_5_ff; -extern cpuop_func op_1139_5_nf; -extern cpuop_func op_1139_5_ff; -extern cpuop_func op_113a_5_nf; -extern cpuop_func op_113a_5_ff; -extern cpuop_func op_113b_5_nf; -extern cpuop_func op_113b_5_ff; -extern cpuop_func op_113c_5_nf; -extern cpuop_func op_113c_5_ff; -extern cpuop_func op_1140_5_nf; -extern cpuop_func op_1140_5_ff; -extern cpuop_func op_1150_5_nf; -extern cpuop_func op_1150_5_ff; -extern cpuop_func op_1158_5_nf; -extern cpuop_func op_1158_5_ff; -extern cpuop_func op_1160_5_nf; -extern cpuop_func op_1160_5_ff; -extern cpuop_func op_1168_5_nf; -extern cpuop_func op_1168_5_ff; -extern cpuop_func op_1170_5_nf; -extern cpuop_func op_1170_5_ff; -extern cpuop_func op_1178_5_nf; -extern cpuop_func op_1178_5_ff; -extern cpuop_func op_1179_5_nf; -extern cpuop_func op_1179_5_ff; -extern cpuop_func op_117a_5_nf; -extern cpuop_func op_117a_5_ff; -extern cpuop_func op_117b_5_nf; -extern cpuop_func op_117b_5_ff; -extern cpuop_func op_117c_5_nf; -extern cpuop_func op_117c_5_ff; -extern cpuop_func op_1180_5_nf; -extern cpuop_func op_1180_5_ff; -extern cpuop_func op_1190_5_nf; -extern cpuop_func op_1190_5_ff; -extern cpuop_func op_1198_5_nf; -extern cpuop_func op_1198_5_ff; -extern cpuop_func op_11a0_5_nf; -extern cpuop_func op_11a0_5_ff; -extern cpuop_func op_11a8_5_nf; -extern cpuop_func op_11a8_5_ff; -extern cpuop_func op_11b0_5_nf; -extern cpuop_func op_11b0_5_ff; -extern cpuop_func op_11b8_5_nf; -extern cpuop_func op_11b8_5_ff; -extern cpuop_func op_11b9_5_nf; -extern cpuop_func op_11b9_5_ff; -extern cpuop_func op_11ba_5_nf; -extern cpuop_func op_11ba_5_ff; -extern cpuop_func op_11bb_5_nf; -extern cpuop_func op_11bb_5_ff; -extern cpuop_func op_11bc_5_nf; -extern cpuop_func op_11bc_5_ff; -extern cpuop_func op_11c0_5_nf; -extern cpuop_func op_11c0_5_ff; -extern cpuop_func op_11d0_5_nf; -extern cpuop_func op_11d0_5_ff; -extern cpuop_func op_11d8_5_nf; -extern cpuop_func op_11d8_5_ff; -extern cpuop_func op_11e0_5_nf; -extern cpuop_func op_11e0_5_ff; -extern cpuop_func op_11e8_5_nf; -extern cpuop_func op_11e8_5_ff; -extern cpuop_func op_11f0_5_nf; -extern cpuop_func op_11f0_5_ff; -extern cpuop_func op_11f8_5_nf; -extern cpuop_func op_11f8_5_ff; -extern cpuop_func op_11f9_5_nf; -extern cpuop_func op_11f9_5_ff; -extern cpuop_func op_11fa_5_nf; -extern cpuop_func op_11fa_5_ff; -extern cpuop_func op_11fb_5_nf; -extern cpuop_func op_11fb_5_ff; -extern cpuop_func op_11fc_5_nf; -extern cpuop_func op_11fc_5_ff; -extern cpuop_func op_13c0_5_nf; -extern cpuop_func op_13c0_5_ff; -extern cpuop_func op_13d0_5_nf; -extern cpuop_func op_13d0_5_ff; -extern cpuop_func op_13d8_5_nf; -extern cpuop_func op_13d8_5_ff; -extern cpuop_func op_13e0_5_nf; -extern cpuop_func op_13e0_5_ff; -extern cpuop_func op_13e8_5_nf; -extern cpuop_func op_13e8_5_ff; -extern cpuop_func op_13f0_5_nf; -extern cpuop_func op_13f0_5_ff; -extern cpuop_func op_13f8_5_nf; -extern cpuop_func op_13f8_5_ff; -extern cpuop_func op_13f9_5_nf; -extern cpuop_func op_13f9_5_ff; -extern cpuop_func op_13fa_5_nf; -extern cpuop_func op_13fa_5_ff; -extern cpuop_func op_13fb_5_nf; -extern cpuop_func op_13fb_5_ff; -extern cpuop_func op_13fc_5_nf; -extern cpuop_func op_13fc_5_ff; -extern cpuop_func op_2000_5_nf; -extern cpuop_func op_2000_5_ff; -extern cpuop_func op_2008_5_nf; -extern cpuop_func op_2008_5_ff; -extern cpuop_func op_2010_5_nf; -extern cpuop_func op_2010_5_ff; -extern cpuop_func op_2018_5_nf; -extern cpuop_func op_2018_5_ff; -extern cpuop_func op_2020_5_nf; -extern cpuop_func op_2020_5_ff; -extern cpuop_func op_2028_5_nf; -extern cpuop_func op_2028_5_ff; -extern cpuop_func op_2030_5_nf; -extern cpuop_func op_2030_5_ff; -extern cpuop_func op_2038_5_nf; -extern cpuop_func op_2038_5_ff; -extern cpuop_func op_2039_5_nf; -extern cpuop_func op_2039_5_ff; -extern cpuop_func op_203a_5_nf; -extern cpuop_func op_203a_5_ff; -extern cpuop_func op_203b_5_nf; -extern cpuop_func op_203b_5_ff; -extern cpuop_func op_203c_5_nf; -extern cpuop_func op_203c_5_ff; -extern cpuop_func op_2040_5_nf; -extern cpuop_func op_2040_5_ff; -extern cpuop_func op_2048_5_nf; -extern cpuop_func op_2048_5_ff; -extern cpuop_func op_2050_5_nf; -extern cpuop_func op_2050_5_ff; -extern cpuop_func op_2058_5_nf; -extern cpuop_func op_2058_5_ff; -extern cpuop_func op_2060_5_nf; -extern cpuop_func op_2060_5_ff; -extern cpuop_func op_2068_5_nf; -extern cpuop_func op_2068_5_ff; -extern cpuop_func op_2070_5_nf; -extern cpuop_func op_2070_5_ff; -extern cpuop_func op_2078_5_nf; -extern cpuop_func op_2078_5_ff; -extern cpuop_func op_2079_5_nf; -extern cpuop_func op_2079_5_ff; -extern cpuop_func op_207a_5_nf; -extern cpuop_func op_207a_5_ff; -extern cpuop_func op_207b_5_nf; -extern cpuop_func op_207b_5_ff; -extern cpuop_func op_207c_5_nf; -extern cpuop_func op_207c_5_ff; -extern cpuop_func op_2080_5_nf; -extern cpuop_func op_2080_5_ff; -extern cpuop_func op_2088_5_nf; -extern cpuop_func op_2088_5_ff; -extern cpuop_func op_2090_5_nf; -extern cpuop_func op_2090_5_ff; -extern cpuop_func op_2098_5_nf; -extern cpuop_func op_2098_5_ff; -extern cpuop_func op_20a0_5_nf; -extern cpuop_func op_20a0_5_ff; -extern cpuop_func op_20a8_5_nf; -extern cpuop_func op_20a8_5_ff; -extern cpuop_func op_20b0_5_nf; -extern cpuop_func op_20b0_5_ff; -extern cpuop_func op_20b8_5_nf; -extern cpuop_func op_20b8_5_ff; -extern cpuop_func op_20b9_5_nf; -extern cpuop_func op_20b9_5_ff; -extern cpuop_func op_20ba_5_nf; -extern cpuop_func op_20ba_5_ff; -extern cpuop_func op_20bb_5_nf; -extern cpuop_func op_20bb_5_ff; -extern cpuop_func op_20bc_5_nf; -extern cpuop_func op_20bc_5_ff; -extern cpuop_func op_20c0_5_nf; -extern cpuop_func op_20c0_5_ff; -extern cpuop_func op_20c8_5_nf; -extern cpuop_func op_20c8_5_ff; -extern cpuop_func op_20d0_5_nf; -extern cpuop_func op_20d0_5_ff; -extern cpuop_func op_20d8_5_nf; -extern cpuop_func op_20d8_5_ff; -extern cpuop_func op_20e0_5_nf; -extern cpuop_func op_20e0_5_ff; -extern cpuop_func op_20e8_5_nf; -extern cpuop_func op_20e8_5_ff; -extern cpuop_func op_20f0_5_nf; -extern cpuop_func op_20f0_5_ff; -extern cpuop_func op_20f8_5_nf; -extern cpuop_func op_20f8_5_ff; -extern cpuop_func op_20f9_5_nf; -extern cpuop_func op_20f9_5_ff; -extern cpuop_func op_20fa_5_nf; -extern cpuop_func op_20fa_5_ff; -extern cpuop_func op_20fb_5_nf; -extern cpuop_func op_20fb_5_ff; -extern cpuop_func op_20fc_5_nf; -extern cpuop_func op_20fc_5_ff; -extern cpuop_func op_2100_5_nf; -extern cpuop_func op_2100_5_ff; -extern cpuop_func op_2108_5_nf; -extern cpuop_func op_2108_5_ff; -extern cpuop_func op_2110_5_nf; -extern cpuop_func op_2110_5_ff; -extern cpuop_func op_2118_5_nf; -extern cpuop_func op_2118_5_ff; -extern cpuop_func op_2120_5_nf; -extern cpuop_func op_2120_5_ff; -extern cpuop_func op_2128_5_nf; -extern cpuop_func op_2128_5_ff; -extern cpuop_func op_2130_5_nf; -extern cpuop_func op_2130_5_ff; -extern cpuop_func op_2138_5_nf; -extern cpuop_func op_2138_5_ff; -extern cpuop_func op_2139_5_nf; -extern cpuop_func op_2139_5_ff; -extern cpuop_func op_213a_5_nf; -extern cpuop_func op_213a_5_ff; -extern cpuop_func op_213b_5_nf; -extern cpuop_func op_213b_5_ff; -extern cpuop_func op_213c_5_nf; -extern cpuop_func op_213c_5_ff; -extern cpuop_func op_2140_5_nf; -extern cpuop_func op_2140_5_ff; -extern cpuop_func op_2148_5_nf; -extern cpuop_func op_2148_5_ff; -extern cpuop_func op_2150_5_nf; -extern cpuop_func op_2150_5_ff; -extern cpuop_func op_2158_5_nf; -extern cpuop_func op_2158_5_ff; -extern cpuop_func op_2160_5_nf; -extern cpuop_func op_2160_5_ff; -extern cpuop_func op_2168_5_nf; -extern cpuop_func op_2168_5_ff; -extern cpuop_func op_2170_5_nf; -extern cpuop_func op_2170_5_ff; -extern cpuop_func op_2178_5_nf; -extern cpuop_func op_2178_5_ff; -extern cpuop_func op_2179_5_nf; -extern cpuop_func op_2179_5_ff; -extern cpuop_func op_217a_5_nf; -extern cpuop_func op_217a_5_ff; -extern cpuop_func op_217b_5_nf; -extern cpuop_func op_217b_5_ff; -extern cpuop_func op_217c_5_nf; -extern cpuop_func op_217c_5_ff; -extern cpuop_func op_2180_5_nf; -extern cpuop_func op_2180_5_ff; -extern cpuop_func op_2188_5_nf; -extern cpuop_func op_2188_5_ff; -extern cpuop_func op_2190_5_nf; -extern cpuop_func op_2190_5_ff; -extern cpuop_func op_2198_5_nf; -extern cpuop_func op_2198_5_ff; -extern cpuop_func op_21a0_5_nf; -extern cpuop_func op_21a0_5_ff; -extern cpuop_func op_21a8_5_nf; -extern cpuop_func op_21a8_5_ff; -extern cpuop_func op_21b0_5_nf; -extern cpuop_func op_21b0_5_ff; -extern cpuop_func op_21b8_5_nf; -extern cpuop_func op_21b8_5_ff; -extern cpuop_func op_21b9_5_nf; -extern cpuop_func op_21b9_5_ff; -extern cpuop_func op_21ba_5_nf; -extern cpuop_func op_21ba_5_ff; -extern cpuop_func op_21bb_5_nf; -extern cpuop_func op_21bb_5_ff; -extern cpuop_func op_21bc_5_nf; -extern cpuop_func op_21bc_5_ff; -extern cpuop_func op_21c0_5_nf; -extern cpuop_func op_21c0_5_ff; -extern cpuop_func op_21c8_5_nf; -extern cpuop_func op_21c8_5_ff; -extern cpuop_func op_21d0_5_nf; -extern cpuop_func op_21d0_5_ff; -extern cpuop_func op_21d8_5_nf; -extern cpuop_func op_21d8_5_ff; -extern cpuop_func op_21e0_5_nf; -extern cpuop_func op_21e0_5_ff; -extern cpuop_func op_21e8_5_nf; -extern cpuop_func op_21e8_5_ff; -extern cpuop_func op_21f0_5_nf; -extern cpuop_func op_21f0_5_ff; -extern cpuop_func op_21f8_5_nf; -extern cpuop_func op_21f8_5_ff; -extern cpuop_func op_21f9_5_nf; -extern cpuop_func op_21f9_5_ff; -extern cpuop_func op_21fa_5_nf; -extern cpuop_func op_21fa_5_ff; -extern cpuop_func op_21fb_5_nf; -extern cpuop_func op_21fb_5_ff; -extern cpuop_func op_21fc_5_nf; -extern cpuop_func op_21fc_5_ff; -extern cpuop_func op_23c0_5_nf; -extern cpuop_func op_23c0_5_ff; -extern cpuop_func op_23c8_5_nf; -extern cpuop_func op_23c8_5_ff; -extern cpuop_func op_23d0_5_nf; -extern cpuop_func op_23d0_5_ff; -extern cpuop_func op_23d8_5_nf; -extern cpuop_func op_23d8_5_ff; -extern cpuop_func op_23e0_5_nf; -extern cpuop_func op_23e0_5_ff; -extern cpuop_func op_23e8_5_nf; -extern cpuop_func op_23e8_5_ff; -extern cpuop_func op_23f0_5_nf; -extern cpuop_func op_23f0_5_ff; -extern cpuop_func op_23f8_5_nf; -extern cpuop_func op_23f8_5_ff; -extern cpuop_func op_23f9_5_nf; -extern cpuop_func op_23f9_5_ff; -extern cpuop_func op_23fa_5_nf; -extern cpuop_func op_23fa_5_ff; -extern cpuop_func op_23fb_5_nf; -extern cpuop_func op_23fb_5_ff; -extern cpuop_func op_23fc_5_nf; -extern cpuop_func op_23fc_5_ff; -extern cpuop_func op_3000_5_nf; -extern cpuop_func op_3000_5_ff; -extern cpuop_func op_3008_5_nf; -extern cpuop_func op_3008_5_ff; -extern cpuop_func op_3010_5_nf; -extern cpuop_func op_3010_5_ff; -extern cpuop_func op_3018_5_nf; -extern cpuop_func op_3018_5_ff; -extern cpuop_func op_3020_5_nf; -extern cpuop_func op_3020_5_ff; -extern cpuop_func op_3028_5_nf; -extern cpuop_func op_3028_5_ff; -extern cpuop_func op_3030_5_nf; -extern cpuop_func op_3030_5_ff; -extern cpuop_func op_3038_5_nf; -extern cpuop_func op_3038_5_ff; -extern cpuop_func op_3039_5_nf; -extern cpuop_func op_3039_5_ff; -extern cpuop_func op_303a_5_nf; -extern cpuop_func op_303a_5_ff; -extern cpuop_func op_303b_5_nf; -extern cpuop_func op_303b_5_ff; -extern cpuop_func op_303c_5_nf; -extern cpuop_func op_303c_5_ff; -extern cpuop_func op_3040_5_nf; -extern cpuop_func op_3040_5_ff; -extern cpuop_func op_3048_5_nf; -extern cpuop_func op_3048_5_ff; -extern cpuop_func op_3050_5_nf; -extern cpuop_func op_3050_5_ff; -extern cpuop_func op_3058_5_nf; -extern cpuop_func op_3058_5_ff; -extern cpuop_func op_3060_5_nf; -extern cpuop_func op_3060_5_ff; -extern cpuop_func op_3068_5_nf; -extern cpuop_func op_3068_5_ff; -extern cpuop_func op_3070_5_nf; -extern cpuop_func op_3070_5_ff; -extern cpuop_func op_3078_5_nf; -extern cpuop_func op_3078_5_ff; -extern cpuop_func op_3079_5_nf; -extern cpuop_func op_3079_5_ff; -extern cpuop_func op_307a_5_nf; -extern cpuop_func op_307a_5_ff; -extern cpuop_func op_307b_5_nf; -extern cpuop_func op_307b_5_ff; -extern cpuop_func op_307c_5_nf; -extern cpuop_func op_307c_5_ff; -extern cpuop_func op_3080_5_nf; -extern cpuop_func op_3080_5_ff; -extern cpuop_func op_3088_5_nf; -extern cpuop_func op_3088_5_ff; -extern cpuop_func op_3090_5_nf; -extern cpuop_func op_3090_5_ff; -extern cpuop_func op_3098_5_nf; -extern cpuop_func op_3098_5_ff; -extern cpuop_func op_30a0_5_nf; -extern cpuop_func op_30a0_5_ff; -extern cpuop_func op_30a8_5_nf; -extern cpuop_func op_30a8_5_ff; -extern cpuop_func op_30b0_5_nf; -extern cpuop_func op_30b0_5_ff; -extern cpuop_func op_30b8_5_nf; -extern cpuop_func op_30b8_5_ff; -extern cpuop_func op_30b9_5_nf; -extern cpuop_func op_30b9_5_ff; -extern cpuop_func op_30ba_5_nf; -extern cpuop_func op_30ba_5_ff; -extern cpuop_func op_30bb_5_nf; -extern cpuop_func op_30bb_5_ff; -extern cpuop_func op_30bc_5_nf; -extern cpuop_func op_30bc_5_ff; -extern cpuop_func op_30c0_5_nf; -extern cpuop_func op_30c0_5_ff; -extern cpuop_func op_30c8_5_nf; -extern cpuop_func op_30c8_5_ff; -extern cpuop_func op_30d0_5_nf; -extern cpuop_func op_30d0_5_ff; -extern cpuop_func op_30d8_5_nf; -extern cpuop_func op_30d8_5_ff; -extern cpuop_func op_30e0_5_nf; -extern cpuop_func op_30e0_5_ff; -extern cpuop_func op_30e8_5_nf; -extern cpuop_func op_30e8_5_ff; -extern cpuop_func op_30f0_5_nf; -extern cpuop_func op_30f0_5_ff; -extern cpuop_func op_30f8_5_nf; -extern cpuop_func op_30f8_5_ff; -extern cpuop_func op_30f9_5_nf; -extern cpuop_func op_30f9_5_ff; -extern cpuop_func op_30fa_5_nf; -extern cpuop_func op_30fa_5_ff; -extern cpuop_func op_30fb_5_nf; -extern cpuop_func op_30fb_5_ff; -extern cpuop_func op_30fc_5_nf; -extern cpuop_func op_30fc_5_ff; -extern cpuop_func op_3100_5_nf; -extern cpuop_func op_3100_5_ff; -extern cpuop_func op_3108_5_nf; -extern cpuop_func op_3108_5_ff; -extern cpuop_func op_3110_5_nf; -extern cpuop_func op_3110_5_ff; -extern cpuop_func op_3118_5_nf; -extern cpuop_func op_3118_5_ff; -extern cpuop_func op_3120_5_nf; -extern cpuop_func op_3120_5_ff; -extern cpuop_func op_3128_5_nf; -extern cpuop_func op_3128_5_ff; -extern cpuop_func op_3130_5_nf; -extern cpuop_func op_3130_5_ff; -extern cpuop_func op_3138_5_nf; -extern cpuop_func op_3138_5_ff; -extern cpuop_func op_3139_5_nf; -extern cpuop_func op_3139_5_ff; -extern cpuop_func op_313a_5_nf; -extern cpuop_func op_313a_5_ff; -extern cpuop_func op_313b_5_nf; -extern cpuop_func op_313b_5_ff; -extern cpuop_func op_313c_5_nf; -extern cpuop_func op_313c_5_ff; -extern cpuop_func op_3140_5_nf; -extern cpuop_func op_3140_5_ff; -extern cpuop_func op_3148_5_nf; -extern cpuop_func op_3148_5_ff; -extern cpuop_func op_3150_5_nf; -extern cpuop_func op_3150_5_ff; -extern cpuop_func op_3158_5_nf; -extern cpuop_func op_3158_5_ff; -extern cpuop_func op_3160_5_nf; -extern cpuop_func op_3160_5_ff; -extern cpuop_func op_3168_5_nf; -extern cpuop_func op_3168_5_ff; -extern cpuop_func op_3170_5_nf; -extern cpuop_func op_3170_5_ff; -extern cpuop_func op_3178_5_nf; -extern cpuop_func op_3178_5_ff; -extern cpuop_func op_3179_5_nf; -extern cpuop_func op_3179_5_ff; -extern cpuop_func op_317a_5_nf; -extern cpuop_func op_317a_5_ff; -extern cpuop_func op_317b_5_nf; -extern cpuop_func op_317b_5_ff; -extern cpuop_func op_317c_5_nf; -extern cpuop_func op_317c_5_ff; -extern cpuop_func op_3180_5_nf; -extern cpuop_func op_3180_5_ff; -extern cpuop_func op_3188_5_nf; -extern cpuop_func op_3188_5_ff; -extern cpuop_func op_3190_5_nf; -extern cpuop_func op_3190_5_ff; -extern cpuop_func op_3198_5_nf; -extern cpuop_func op_3198_5_ff; -extern cpuop_func op_31a0_5_nf; -extern cpuop_func op_31a0_5_ff; -extern cpuop_func op_31a8_5_nf; -extern cpuop_func op_31a8_5_ff; -extern cpuop_func op_31b0_5_nf; -extern cpuop_func op_31b0_5_ff; -extern cpuop_func op_31b8_5_nf; -extern cpuop_func op_31b8_5_ff; -extern cpuop_func op_31b9_5_nf; -extern cpuop_func op_31b9_5_ff; -extern cpuop_func op_31ba_5_nf; -extern cpuop_func op_31ba_5_ff; -extern cpuop_func op_31bb_5_nf; -extern cpuop_func op_31bb_5_ff; -extern cpuop_func op_31bc_5_nf; -extern cpuop_func op_31bc_5_ff; -extern cpuop_func op_31c0_5_nf; -extern cpuop_func op_31c0_5_ff; -extern cpuop_func op_31c8_5_nf; -extern cpuop_func op_31c8_5_ff; -extern cpuop_func op_31d0_5_nf; -extern cpuop_func op_31d0_5_ff; -extern cpuop_func op_31d8_5_nf; -extern cpuop_func op_31d8_5_ff; -extern cpuop_func op_31e0_5_nf; -extern cpuop_func op_31e0_5_ff; -extern cpuop_func op_31e8_5_nf; -extern cpuop_func op_31e8_5_ff; -extern cpuop_func op_31f0_5_nf; -extern cpuop_func op_31f0_5_ff; -extern cpuop_func op_31f8_5_nf; -extern cpuop_func op_31f8_5_ff; -extern cpuop_func op_31f9_5_nf; -extern cpuop_func op_31f9_5_ff; -extern cpuop_func op_31fa_5_nf; -extern cpuop_func op_31fa_5_ff; -extern cpuop_func op_31fb_5_nf; -extern cpuop_func op_31fb_5_ff; -extern cpuop_func op_31fc_5_nf; -extern cpuop_func op_31fc_5_ff; -extern cpuop_func op_33c0_5_nf; -extern cpuop_func op_33c0_5_ff; -extern cpuop_func op_33c8_5_nf; -extern cpuop_func op_33c8_5_ff; -extern cpuop_func op_33d0_5_nf; -extern cpuop_func op_33d0_5_ff; -extern cpuop_func op_33d8_5_nf; -extern cpuop_func op_33d8_5_ff; -extern cpuop_func op_33e0_5_nf; -extern cpuop_func op_33e0_5_ff; -extern cpuop_func op_33e8_5_nf; -extern cpuop_func op_33e8_5_ff; -extern cpuop_func op_33f0_5_nf; -extern cpuop_func op_33f0_5_ff; -extern cpuop_func op_33f8_5_nf; -extern cpuop_func op_33f8_5_ff; -extern cpuop_func op_33f9_5_nf; -extern cpuop_func op_33f9_5_ff; -extern cpuop_func op_33fa_5_nf; -extern cpuop_func op_33fa_5_ff; -extern cpuop_func op_33fb_5_nf; -extern cpuop_func op_33fb_5_ff; -extern cpuop_func op_33fc_5_nf; -extern cpuop_func op_33fc_5_ff; -extern cpuop_func op_4000_5_nf; -extern cpuop_func op_4000_5_ff; -extern cpuop_func op_4010_5_nf; -extern cpuop_func op_4010_5_ff; -extern cpuop_func op_4018_5_nf; -extern cpuop_func op_4018_5_ff; -extern cpuop_func op_4020_5_nf; -extern cpuop_func op_4020_5_ff; -extern cpuop_func op_4028_5_nf; -extern cpuop_func op_4028_5_ff; -extern cpuop_func op_4030_5_nf; -extern cpuop_func op_4030_5_ff; -extern cpuop_func op_4038_5_nf; -extern cpuop_func op_4038_5_ff; -extern cpuop_func op_4039_5_nf; -extern cpuop_func op_4039_5_ff; -extern cpuop_func op_4040_5_nf; -extern cpuop_func op_4040_5_ff; -extern cpuop_func op_4050_5_nf; -extern cpuop_func op_4050_5_ff; -extern cpuop_func op_4058_5_nf; -extern cpuop_func op_4058_5_ff; -extern cpuop_func op_4060_5_nf; -extern cpuop_func op_4060_5_ff; -extern cpuop_func op_4068_5_nf; -extern cpuop_func op_4068_5_ff; -extern cpuop_func op_4070_5_nf; -extern cpuop_func op_4070_5_ff; -extern cpuop_func op_4078_5_nf; -extern cpuop_func op_4078_5_ff; -extern cpuop_func op_4079_5_nf; -extern cpuop_func op_4079_5_ff; -extern cpuop_func op_4080_5_nf; -extern cpuop_func op_4080_5_ff; -extern cpuop_func op_4090_5_nf; -extern cpuop_func op_4090_5_ff; -extern cpuop_func op_4098_5_nf; -extern cpuop_func op_4098_5_ff; -extern cpuop_func op_40a0_5_nf; -extern cpuop_func op_40a0_5_ff; -extern cpuop_func op_40a8_5_nf; -extern cpuop_func op_40a8_5_ff; -extern cpuop_func op_40b0_5_nf; -extern cpuop_func op_40b0_5_ff; -extern cpuop_func op_40b8_5_nf; -extern cpuop_func op_40b8_5_ff; -extern cpuop_func op_40b9_5_nf; -extern cpuop_func op_40b9_5_ff; +extern cpuop_func op_4130_4_nf; +extern cpuop_func op_4130_4_ff; +extern cpuop_func op_413b_4_nf; +extern cpuop_func op_413b_4_ff; +extern cpuop_func op_41b0_4_nf; +extern cpuop_func op_41b0_4_ff; +extern cpuop_func op_41bb_4_nf; +extern cpuop_func op_41bb_4_ff; +extern cpuop_func op_41f0_4_nf; +extern cpuop_func op_41f0_4_ff; +extern cpuop_func op_41fb_4_nf; +extern cpuop_func op_41fb_4_ff; +extern cpuop_func op_4230_4_nf; +extern cpuop_func op_4230_4_ff; +extern cpuop_func op_4270_4_nf; +extern cpuop_func op_4270_4_ff; +extern cpuop_func op_42b0_4_nf; +extern cpuop_func op_42b0_4_ff; +extern cpuop_func op_42f0_4_nf; +extern cpuop_func op_42f0_4_ff; +extern cpuop_func op_4430_4_nf; +extern cpuop_func op_4430_4_ff; +extern cpuop_func op_4470_4_nf; +extern cpuop_func op_4470_4_ff; +extern cpuop_func op_44b0_4_nf; +extern cpuop_func op_44b0_4_ff; +extern cpuop_func op_44f0_4_nf; +extern cpuop_func op_44f0_4_ff; +extern cpuop_func op_44fb_4_nf; +extern cpuop_func op_44fb_4_ff; +extern cpuop_func op_4630_4_nf; +extern cpuop_func op_4630_4_ff; +extern cpuop_func op_4670_4_nf; +extern cpuop_func op_4670_4_ff; +extern cpuop_func op_46b0_4_nf; +extern cpuop_func op_46b0_4_ff; +extern cpuop_func op_46f0_4_nf; +extern cpuop_func op_46f0_4_ff; +extern cpuop_func op_46fb_4_nf; +extern cpuop_func op_46fb_4_ff; +extern cpuop_func op_4830_4_nf; +extern cpuop_func op_4830_4_ff; +extern cpuop_func op_4870_4_nf; +extern cpuop_func op_4870_4_ff; +extern cpuop_func op_487b_4_nf; +extern cpuop_func op_487b_4_ff; +extern cpuop_func op_48b0_4_nf; +extern cpuop_func op_48b0_4_ff; +extern cpuop_func op_48f0_4_nf; +extern cpuop_func op_48f0_4_ff; +extern cpuop_func op_4a30_4_nf; +extern cpuop_func op_4a30_4_ff; +extern cpuop_func op_4a70_4_nf; +extern cpuop_func op_4a70_4_ff; +extern cpuop_func op_4ab0_4_nf; +extern cpuop_func op_4ab0_4_ff; +extern cpuop_func op_4af0_4_nf; +extern cpuop_func op_4af0_4_ff; +extern cpuop_func op_4cb0_4_nf; +extern cpuop_func op_4cb0_4_ff; +extern cpuop_func op_4cbb_4_nf; +extern cpuop_func op_4cbb_4_ff; +extern cpuop_func op_4cf0_4_nf; +extern cpuop_func op_4cf0_4_ff; +extern cpuop_func op_4cfb_4_nf; +extern cpuop_func op_4cfb_4_ff; +extern cpuop_func op_4eb0_4_nf; +extern cpuop_func op_4eb0_4_ff; +extern cpuop_func op_4ebb_4_nf; +extern cpuop_func op_4ebb_4_ff; +extern cpuop_func op_4ef0_4_nf; +extern cpuop_func op_4ef0_4_ff; +extern cpuop_func op_4efb_4_nf; +extern cpuop_func op_4efb_4_ff; +extern cpuop_func op_5030_4_nf; +extern cpuop_func op_5030_4_ff; +extern cpuop_func op_5070_4_nf; +extern cpuop_func op_5070_4_ff; +extern cpuop_func op_50b0_4_nf; +extern cpuop_func op_50b0_4_ff; +extern cpuop_func op_50f0_4_nf; +extern cpuop_func op_50f0_4_ff; +extern cpuop_func op_5130_4_nf; +extern cpuop_func op_5130_4_ff; +extern cpuop_func op_5170_4_nf; +extern cpuop_func op_5170_4_ff; +extern cpuop_func op_51b0_4_nf; +extern cpuop_func op_51b0_4_ff; +extern cpuop_func op_51f0_4_nf; +extern cpuop_func op_51f0_4_ff; +extern cpuop_func op_52f0_4_nf; +extern cpuop_func op_52f0_4_ff; +extern cpuop_func op_53f0_4_nf; +extern cpuop_func op_53f0_4_ff; +extern cpuop_func op_54f0_4_nf; +extern cpuop_func op_54f0_4_ff; +extern cpuop_func op_55f0_4_nf; +extern cpuop_func op_55f0_4_ff; +extern cpuop_func op_56f0_4_nf; +extern cpuop_func op_56f0_4_ff; +extern cpuop_func op_57f0_4_nf; +extern cpuop_func op_57f0_4_ff; +extern cpuop_func op_58f0_4_nf; +extern cpuop_func op_58f0_4_ff; +extern cpuop_func op_59f0_4_nf; +extern cpuop_func op_59f0_4_ff; +extern cpuop_func op_5af0_4_nf; +extern cpuop_func op_5af0_4_ff; +extern cpuop_func op_5bf0_4_nf; +extern cpuop_func op_5bf0_4_ff; +extern cpuop_func op_5cf0_4_nf; +extern cpuop_func op_5cf0_4_ff; +extern cpuop_func op_5df0_4_nf; +extern cpuop_func op_5df0_4_ff; +extern cpuop_func op_5ef0_4_nf; +extern cpuop_func op_5ef0_4_ff; +extern cpuop_func op_5ff0_4_nf; +extern cpuop_func op_5ff0_4_ff; +extern cpuop_func op_60ff_4_nf; +extern cpuop_func op_60ff_4_ff; +extern cpuop_func op_62ff_4_nf; +extern cpuop_func op_62ff_4_ff; +extern cpuop_func op_63ff_4_nf; +extern cpuop_func op_63ff_4_ff; +extern cpuop_func op_64ff_4_nf; +extern cpuop_func op_64ff_4_ff; +extern cpuop_func op_65ff_4_nf; +extern cpuop_func op_65ff_4_ff; +extern cpuop_func op_66ff_4_nf; +extern cpuop_func op_66ff_4_ff; +extern cpuop_func op_67ff_4_nf; +extern cpuop_func op_67ff_4_ff; +extern cpuop_func op_68ff_4_nf; +extern cpuop_func op_68ff_4_ff; +extern cpuop_func op_69ff_4_nf; +extern cpuop_func op_69ff_4_ff; +extern cpuop_func op_6aff_4_nf; +extern cpuop_func op_6aff_4_ff; +extern cpuop_func op_6bff_4_nf; +extern cpuop_func op_6bff_4_ff; +extern cpuop_func op_6cff_4_nf; +extern cpuop_func op_6cff_4_ff; +extern cpuop_func op_6dff_4_nf; +extern cpuop_func op_6dff_4_ff; +extern cpuop_func op_6eff_4_nf; +extern cpuop_func op_6eff_4_ff; +extern cpuop_func op_6fff_4_nf; +extern cpuop_func op_6fff_4_ff; +extern cpuop_func op_8030_4_nf; +extern cpuop_func op_8030_4_ff; +extern cpuop_func op_803b_4_nf; +extern cpuop_func op_803b_4_ff; +extern cpuop_func op_8070_4_nf; +extern cpuop_func op_8070_4_ff; +extern cpuop_func op_807b_4_nf; +extern cpuop_func op_807b_4_ff; +extern cpuop_func op_80b0_4_nf; +extern cpuop_func op_80b0_4_ff; +extern cpuop_func op_80bb_4_nf; +extern cpuop_func op_80bb_4_ff; +extern cpuop_func op_80f0_4_nf; +extern cpuop_func op_80f0_4_ff; +extern cpuop_func op_80fb_4_nf; +extern cpuop_func op_80fb_4_ff; +extern cpuop_func op_8130_4_nf; +extern cpuop_func op_8130_4_ff; +extern cpuop_func op_8170_4_nf; +extern cpuop_func op_8170_4_ff; +extern cpuop_func op_81b0_4_nf; +extern cpuop_func op_81b0_4_ff; +extern cpuop_func op_81f0_4_nf; +extern cpuop_func op_81f0_4_ff; +extern cpuop_func op_81fb_4_nf; +extern cpuop_func op_81fb_4_ff; +extern cpuop_func op_9030_4_nf; +extern cpuop_func op_9030_4_ff; +extern cpuop_func op_903b_4_nf; +extern cpuop_func op_903b_4_ff; +extern cpuop_func op_9070_4_nf; +extern cpuop_func op_9070_4_ff; +extern cpuop_func op_907b_4_nf; +extern cpuop_func op_907b_4_ff; +extern cpuop_func op_90b0_4_nf; +extern cpuop_func op_90b0_4_ff; +extern cpuop_func op_90bb_4_nf; +extern cpuop_func op_90bb_4_ff; +extern cpuop_func op_90f0_4_nf; +extern cpuop_func op_90f0_4_ff; +extern cpuop_func op_90fb_4_nf; +extern cpuop_func op_90fb_4_ff; +extern cpuop_func op_9130_4_nf; +extern cpuop_func op_9130_4_ff; +extern cpuop_func op_9170_4_nf; +extern cpuop_func op_9170_4_ff; +extern cpuop_func op_91b0_4_nf; +extern cpuop_func op_91b0_4_ff; +extern cpuop_func op_91f0_4_nf; +extern cpuop_func op_91f0_4_ff; +extern cpuop_func op_91fb_4_nf; +extern cpuop_func op_91fb_4_ff; +extern cpuop_func op_b030_4_nf; +extern cpuop_func op_b030_4_ff; +extern cpuop_func op_b03b_4_nf; +extern cpuop_func op_b03b_4_ff; +extern cpuop_func op_b070_4_nf; +extern cpuop_func op_b070_4_ff; +extern cpuop_func op_b07b_4_nf; +extern cpuop_func op_b07b_4_ff; +extern cpuop_func op_b0b0_4_nf; +extern cpuop_func op_b0b0_4_ff; +extern cpuop_func op_b0bb_4_nf; +extern cpuop_func op_b0bb_4_ff; +extern cpuop_func op_b0f0_4_nf; +extern cpuop_func op_b0f0_4_ff; +extern cpuop_func op_b0fb_4_nf; +extern cpuop_func op_b0fb_4_ff; +extern cpuop_func op_b130_4_nf; +extern cpuop_func op_b130_4_ff; +extern cpuop_func op_b170_4_nf; +extern cpuop_func op_b170_4_ff; +extern cpuop_func op_b1b0_4_nf; +extern cpuop_func op_b1b0_4_ff; +extern cpuop_func op_b1f0_4_nf; +extern cpuop_func op_b1f0_4_ff; +extern cpuop_func op_b1fb_4_nf; +extern cpuop_func op_b1fb_4_ff; +extern cpuop_func op_c030_4_nf; +extern cpuop_func op_c030_4_ff; +extern cpuop_func op_c03b_4_nf; +extern cpuop_func op_c03b_4_ff; +extern cpuop_func op_c070_4_nf; +extern cpuop_func op_c070_4_ff; +extern cpuop_func op_c07b_4_nf; +extern cpuop_func op_c07b_4_ff; +extern cpuop_func op_c0b0_4_nf; +extern cpuop_func op_c0b0_4_ff; +extern cpuop_func op_c0bb_4_nf; +extern cpuop_func op_c0bb_4_ff; +extern cpuop_func op_c0f0_4_nf; +extern cpuop_func op_c0f0_4_ff; +extern cpuop_func op_c0fb_4_nf; +extern cpuop_func op_c0fb_4_ff; +extern cpuop_func op_c130_4_nf; +extern cpuop_func op_c130_4_ff; +extern cpuop_func op_c170_4_nf; +extern cpuop_func op_c170_4_ff; +extern cpuop_func op_c1b0_4_nf; +extern cpuop_func op_c1b0_4_ff; +extern cpuop_func op_c1f0_4_nf; +extern cpuop_func op_c1f0_4_ff; +extern cpuop_func op_c1fb_4_nf; +extern cpuop_func op_c1fb_4_ff; +extern cpuop_func op_d030_4_nf; +extern cpuop_func op_d030_4_ff; +extern cpuop_func op_d03b_4_nf; +extern cpuop_func op_d03b_4_ff; +extern cpuop_func op_d070_4_nf; +extern cpuop_func op_d070_4_ff; +extern cpuop_func op_d07b_4_nf; +extern cpuop_func op_d07b_4_ff; +extern cpuop_func op_d0b0_4_nf; +extern cpuop_func op_d0b0_4_ff; +extern cpuop_func op_d0bb_4_nf; +extern cpuop_func op_d0bb_4_ff; +extern cpuop_func op_d0f0_4_nf; +extern cpuop_func op_d0f0_4_ff; +extern cpuop_func op_d0fb_4_nf; +extern cpuop_func op_d0fb_4_ff; +extern cpuop_func op_d130_4_nf; +extern cpuop_func op_d130_4_ff; +extern cpuop_func op_d170_4_nf; +extern cpuop_func op_d170_4_ff; +extern cpuop_func op_d1b0_4_nf; +extern cpuop_func op_d1b0_4_ff; +extern cpuop_func op_d1f0_4_nf; +extern cpuop_func op_d1f0_4_ff; +extern cpuop_func op_d1fb_4_nf; +extern cpuop_func op_d1fb_4_ff; +extern cpuop_func op_e0f0_4_nf; +extern cpuop_func op_e0f0_4_ff; +extern cpuop_func op_e1f0_4_nf; +extern cpuop_func op_e1f0_4_ff; +extern cpuop_func op_e2f0_4_nf; +extern cpuop_func op_e2f0_4_ff; +extern cpuop_func op_e3f0_4_nf; +extern cpuop_func op_e3f0_4_ff; +extern cpuop_func op_e4f0_4_nf; +extern cpuop_func op_e4f0_4_ff; +extern cpuop_func op_e5f0_4_nf; +extern cpuop_func op_e5f0_4_ff; +extern cpuop_func op_e6f0_4_nf; +extern cpuop_func op_e6f0_4_ff; +extern cpuop_func op_e7f0_4_nf; +extern cpuop_func op_e7f0_4_ff; extern cpuop_func op_40c0_5_nf; extern cpuop_func op_40c0_5_ff; extern cpuop_func op_40d0_5_nf; @@ -5424,1993 +4346,3139 @@ extern cpuop_func op_40f8_5_nf; extern cpuop_func op_40f8_5_ff; extern cpuop_func op_40f9_5_nf; extern cpuop_func op_40f9_5_ff; -extern cpuop_func op_4100_5_nf; -extern cpuop_func op_4100_5_ff; -extern cpuop_func op_4110_5_nf; -extern cpuop_func op_4110_5_ff; -extern cpuop_func op_4118_5_nf; -extern cpuop_func op_4118_5_ff; -extern cpuop_func op_4120_5_nf; -extern cpuop_func op_4120_5_ff; -extern cpuop_func op_4128_5_nf; -extern cpuop_func op_4128_5_ff; -extern cpuop_func op_4130_5_nf; -extern cpuop_func op_4130_5_ff; -extern cpuop_func op_4138_5_nf; -extern cpuop_func op_4138_5_ff; -extern cpuop_func op_4139_5_nf; -extern cpuop_func op_4139_5_ff; -extern cpuop_func op_413a_5_nf; -extern cpuop_func op_413a_5_ff; -extern cpuop_func op_413b_5_nf; -extern cpuop_func op_413b_5_ff; -extern cpuop_func op_413c_5_nf; -extern cpuop_func op_413c_5_ff; -extern cpuop_func op_4180_5_nf; -extern cpuop_func op_4180_5_ff; -extern cpuop_func op_4190_5_nf; -extern cpuop_func op_4190_5_ff; -extern cpuop_func op_4198_5_nf; -extern cpuop_func op_4198_5_ff; -extern cpuop_func op_41a0_5_nf; -extern cpuop_func op_41a0_5_ff; -extern cpuop_func op_41a8_5_nf; -extern cpuop_func op_41a8_5_ff; -extern cpuop_func op_41b0_5_nf; -extern cpuop_func op_41b0_5_ff; -extern cpuop_func op_41b8_5_nf; -extern cpuop_func op_41b8_5_ff; -extern cpuop_func op_41b9_5_nf; -extern cpuop_func op_41b9_5_ff; -extern cpuop_func op_41ba_5_nf; -extern cpuop_func op_41ba_5_ff; -extern cpuop_func op_41bb_5_nf; -extern cpuop_func op_41bb_5_ff; -extern cpuop_func op_41bc_5_nf; -extern cpuop_func op_41bc_5_ff; -extern cpuop_func op_41d0_5_nf; -extern cpuop_func op_41d0_5_ff; -extern cpuop_func op_41e8_5_nf; -extern cpuop_func op_41e8_5_ff; -extern cpuop_func op_41f0_5_nf; -extern cpuop_func op_41f0_5_ff; -extern cpuop_func op_41f8_5_nf; -extern cpuop_func op_41f8_5_ff; -extern cpuop_func op_41f9_5_nf; -extern cpuop_func op_41f9_5_ff; -extern cpuop_func op_41fa_5_nf; -extern cpuop_func op_41fa_5_ff; -extern cpuop_func op_41fb_5_nf; -extern cpuop_func op_41fb_5_ff; -extern cpuop_func op_4200_5_nf; -extern cpuop_func op_4200_5_ff; -extern cpuop_func op_4210_5_nf; -extern cpuop_func op_4210_5_ff; -extern cpuop_func op_4218_5_nf; -extern cpuop_func op_4218_5_ff; -extern cpuop_func op_4220_5_nf; -extern cpuop_func op_4220_5_ff; -extern cpuop_func op_4228_5_nf; -extern cpuop_func op_4228_5_ff; -extern cpuop_func op_4230_5_nf; -extern cpuop_func op_4230_5_ff; -extern cpuop_func op_4238_5_nf; -extern cpuop_func op_4238_5_ff; -extern cpuop_func op_4239_5_nf; -extern cpuop_func op_4239_5_ff; -extern cpuop_func op_4240_5_nf; -extern cpuop_func op_4240_5_ff; -extern cpuop_func op_4250_5_nf; -extern cpuop_func op_4250_5_ff; -extern cpuop_func op_4258_5_nf; -extern cpuop_func op_4258_5_ff; -extern cpuop_func op_4260_5_nf; -extern cpuop_func op_4260_5_ff; -extern cpuop_func op_4268_5_nf; -extern cpuop_func op_4268_5_ff; -extern cpuop_func op_4270_5_nf; -extern cpuop_func op_4270_5_ff; -extern cpuop_func op_4278_5_nf; -extern cpuop_func op_4278_5_ff; -extern cpuop_func op_4279_5_nf; -extern cpuop_func op_4279_5_ff; -extern cpuop_func op_4280_5_nf; -extern cpuop_func op_4280_5_ff; -extern cpuop_func op_4290_5_nf; -extern cpuop_func op_4290_5_ff; -extern cpuop_func op_4298_5_nf; -extern cpuop_func op_4298_5_ff; -extern cpuop_func op_42a0_5_nf; -extern cpuop_func op_42a0_5_ff; -extern cpuop_func op_42a8_5_nf; -extern cpuop_func op_42a8_5_ff; -extern cpuop_func op_42b0_5_nf; -extern cpuop_func op_42b0_5_ff; -extern cpuop_func op_42b8_5_nf; -extern cpuop_func op_42b8_5_ff; -extern cpuop_func op_42b9_5_nf; -extern cpuop_func op_42b9_5_ff; -extern cpuop_func op_4400_5_nf; -extern cpuop_func op_4400_5_ff; -extern cpuop_func op_4410_5_nf; -extern cpuop_func op_4410_5_ff; -extern cpuop_func op_4418_5_nf; -extern cpuop_func op_4418_5_ff; -extern cpuop_func op_4420_5_nf; -extern cpuop_func op_4420_5_ff; -extern cpuop_func op_4428_5_nf; -extern cpuop_func op_4428_5_ff; -extern cpuop_func op_4430_5_nf; -extern cpuop_func op_4430_5_ff; -extern cpuop_func op_4438_5_nf; -extern cpuop_func op_4438_5_ff; -extern cpuop_func op_4439_5_nf; -extern cpuop_func op_4439_5_ff; -extern cpuop_func op_4440_5_nf; -extern cpuop_func op_4440_5_ff; -extern cpuop_func op_4450_5_nf; -extern cpuop_func op_4450_5_ff; -extern cpuop_func op_4458_5_nf; -extern cpuop_func op_4458_5_ff; -extern cpuop_func op_4460_5_nf; -extern cpuop_func op_4460_5_ff; -extern cpuop_func op_4468_5_nf; -extern cpuop_func op_4468_5_ff; -extern cpuop_func op_4470_5_nf; -extern cpuop_func op_4470_5_ff; -extern cpuop_func op_4478_5_nf; -extern cpuop_func op_4478_5_ff; -extern cpuop_func op_4479_5_nf; -extern cpuop_func op_4479_5_ff; -extern cpuop_func op_4480_5_nf; -extern cpuop_func op_4480_5_ff; -extern cpuop_func op_4490_5_nf; -extern cpuop_func op_4490_5_ff; -extern cpuop_func op_4498_5_nf; -extern cpuop_func op_4498_5_ff; -extern cpuop_func op_44a0_5_nf; -extern cpuop_func op_44a0_5_ff; -extern cpuop_func op_44a8_5_nf; -extern cpuop_func op_44a8_5_ff; -extern cpuop_func op_44b0_5_nf; -extern cpuop_func op_44b0_5_ff; -extern cpuop_func op_44b8_5_nf; -extern cpuop_func op_44b8_5_ff; -extern cpuop_func op_44b9_5_nf; -extern cpuop_func op_44b9_5_ff; -extern cpuop_func op_44c0_5_nf; -extern cpuop_func op_44c0_5_ff; -extern cpuop_func op_44d0_5_nf; -extern cpuop_func op_44d0_5_ff; -extern cpuop_func op_44d8_5_nf; -extern cpuop_func op_44d8_5_ff; -extern cpuop_func op_44e0_5_nf; -extern cpuop_func op_44e0_5_ff; -extern cpuop_func op_44e8_5_nf; -extern cpuop_func op_44e8_5_ff; -extern cpuop_func op_44f0_5_nf; -extern cpuop_func op_44f0_5_ff; -extern cpuop_func op_44f8_5_nf; -extern cpuop_func op_44f8_5_ff; -extern cpuop_func op_44f9_5_nf; -extern cpuop_func op_44f9_5_ff; -extern cpuop_func op_44fa_5_nf; -extern cpuop_func op_44fa_5_ff; -extern cpuop_func op_44fb_5_nf; -extern cpuop_func op_44fb_5_ff; -extern cpuop_func op_44fc_5_nf; -extern cpuop_func op_44fc_5_ff; -extern cpuop_func op_4600_5_nf; -extern cpuop_func op_4600_5_ff; -extern cpuop_func op_4610_5_nf; -extern cpuop_func op_4610_5_ff; -extern cpuop_func op_4618_5_nf; -extern cpuop_func op_4618_5_ff; -extern cpuop_func op_4620_5_nf; -extern cpuop_func op_4620_5_ff; -extern cpuop_func op_4628_5_nf; -extern cpuop_func op_4628_5_ff; -extern cpuop_func op_4630_5_nf; -extern cpuop_func op_4630_5_ff; -extern cpuop_func op_4638_5_nf; -extern cpuop_func op_4638_5_ff; -extern cpuop_func op_4639_5_nf; -extern cpuop_func op_4639_5_ff; -extern cpuop_func op_4640_5_nf; -extern cpuop_func op_4640_5_ff; -extern cpuop_func op_4650_5_nf; -extern cpuop_func op_4650_5_ff; -extern cpuop_func op_4658_5_nf; -extern cpuop_func op_4658_5_ff; -extern cpuop_func op_4660_5_nf; -extern cpuop_func op_4660_5_ff; -extern cpuop_func op_4668_5_nf; -extern cpuop_func op_4668_5_ff; -extern cpuop_func op_4670_5_nf; -extern cpuop_func op_4670_5_ff; -extern cpuop_func op_4678_5_nf; -extern cpuop_func op_4678_5_ff; -extern cpuop_func op_4679_5_nf; -extern cpuop_func op_4679_5_ff; -extern cpuop_func op_4680_5_nf; -extern cpuop_func op_4680_5_ff; -extern cpuop_func op_4690_5_nf; -extern cpuop_func op_4690_5_ff; -extern cpuop_func op_4698_5_nf; -extern cpuop_func op_4698_5_ff; -extern cpuop_func op_46a0_5_nf; -extern cpuop_func op_46a0_5_ff; -extern cpuop_func op_46a8_5_nf; -extern cpuop_func op_46a8_5_ff; -extern cpuop_func op_46b0_5_nf; -extern cpuop_func op_46b0_5_ff; -extern cpuop_func op_46b8_5_nf; -extern cpuop_func op_46b8_5_ff; -extern cpuop_func op_46b9_5_nf; -extern cpuop_func op_46b9_5_ff; -extern cpuop_func op_46c0_5_nf; -extern cpuop_func op_46c0_5_ff; -extern cpuop_func op_46d0_5_nf; -extern cpuop_func op_46d0_5_ff; -extern cpuop_func op_46d8_5_nf; -extern cpuop_func op_46d8_5_ff; -extern cpuop_func op_46e0_5_nf; -extern cpuop_func op_46e0_5_ff; -extern cpuop_func op_46e8_5_nf; -extern cpuop_func op_46e8_5_ff; -extern cpuop_func op_46f0_5_nf; -extern cpuop_func op_46f0_5_ff; -extern cpuop_func op_46f8_5_nf; -extern cpuop_func op_46f8_5_ff; -extern cpuop_func op_46f9_5_nf; -extern cpuop_func op_46f9_5_ff; -extern cpuop_func op_46fa_5_nf; -extern cpuop_func op_46fa_5_ff; -extern cpuop_func op_46fb_5_nf; -extern cpuop_func op_46fb_5_ff; -extern cpuop_func op_46fc_5_nf; -extern cpuop_func op_46fc_5_ff; -extern cpuop_func op_4800_5_nf; -extern cpuop_func op_4800_5_ff; -extern cpuop_func op_4810_5_nf; -extern cpuop_func op_4810_5_ff; -extern cpuop_func op_4818_5_nf; -extern cpuop_func op_4818_5_ff; -extern cpuop_func op_4820_5_nf; -extern cpuop_func op_4820_5_ff; -extern cpuop_func op_4828_5_nf; -extern cpuop_func op_4828_5_ff; -extern cpuop_func op_4830_5_nf; -extern cpuop_func op_4830_5_ff; -extern cpuop_func op_4838_5_nf; -extern cpuop_func op_4838_5_ff; -extern cpuop_func op_4839_5_nf; -extern cpuop_func op_4839_5_ff; -extern cpuop_func op_4840_5_nf; -extern cpuop_func op_4840_5_ff; -extern cpuop_func op_4850_5_nf; -extern cpuop_func op_4850_5_ff; -extern cpuop_func op_4868_5_nf; -extern cpuop_func op_4868_5_ff; -extern cpuop_func op_4870_5_nf; -extern cpuop_func op_4870_5_ff; -extern cpuop_func op_4878_5_nf; -extern cpuop_func op_4878_5_ff; -extern cpuop_func op_4879_5_nf; -extern cpuop_func op_4879_5_ff; -extern cpuop_func op_487a_5_nf; -extern cpuop_func op_487a_5_ff; -extern cpuop_func op_487b_5_nf; -extern cpuop_func op_487b_5_ff; -extern cpuop_func op_4880_5_nf; -extern cpuop_func op_4880_5_ff; -extern cpuop_func op_4890_5_nf; -extern cpuop_func op_4890_5_ff; -extern cpuop_func op_48a0_5_nf; -extern cpuop_func op_48a0_5_ff; -extern cpuop_func op_48a8_5_nf; -extern cpuop_func op_48a8_5_ff; -extern cpuop_func op_48b0_5_nf; -extern cpuop_func op_48b0_5_ff; -extern cpuop_func op_48b8_5_nf; -extern cpuop_func op_48b8_5_ff; -extern cpuop_func op_48b9_5_nf; -extern cpuop_func op_48b9_5_ff; -extern cpuop_func op_48c0_5_nf; -extern cpuop_func op_48c0_5_ff; -extern cpuop_func op_48d0_5_nf; -extern cpuop_func op_48d0_5_ff; -extern cpuop_func op_48e0_5_nf; -extern cpuop_func op_48e0_5_ff; -extern cpuop_func op_48e8_5_nf; -extern cpuop_func op_48e8_5_ff; -extern cpuop_func op_48f0_5_nf; -extern cpuop_func op_48f0_5_ff; -extern cpuop_func op_48f8_5_nf; -extern cpuop_func op_48f8_5_ff; -extern cpuop_func op_48f9_5_nf; -extern cpuop_func op_48f9_5_ff; -extern cpuop_func op_49c0_5_nf; -extern cpuop_func op_49c0_5_ff; -extern cpuop_func op_4a00_5_nf; -extern cpuop_func op_4a00_5_ff; -extern cpuop_func op_4a10_5_nf; -extern cpuop_func op_4a10_5_ff; -extern cpuop_func op_4a18_5_nf; -extern cpuop_func op_4a18_5_ff; -extern cpuop_func op_4a20_5_nf; -extern cpuop_func op_4a20_5_ff; -extern cpuop_func op_4a28_5_nf; -extern cpuop_func op_4a28_5_ff; -extern cpuop_func op_4a30_5_nf; -extern cpuop_func op_4a30_5_ff; -extern cpuop_func op_4a38_5_nf; -extern cpuop_func op_4a38_5_ff; -extern cpuop_func op_4a39_5_nf; -extern cpuop_func op_4a39_5_ff; -extern cpuop_func op_4a40_5_nf; -extern cpuop_func op_4a40_5_ff; -extern cpuop_func op_4a50_5_nf; -extern cpuop_func op_4a50_5_ff; -extern cpuop_func op_4a58_5_nf; -extern cpuop_func op_4a58_5_ff; -extern cpuop_func op_4a60_5_nf; -extern cpuop_func op_4a60_5_ff; -extern cpuop_func op_4a68_5_nf; -extern cpuop_func op_4a68_5_ff; -extern cpuop_func op_4a70_5_nf; -extern cpuop_func op_4a70_5_ff; -extern cpuop_func op_4a78_5_nf; -extern cpuop_func op_4a78_5_ff; -extern cpuop_func op_4a79_5_nf; -extern cpuop_func op_4a79_5_ff; -extern cpuop_func op_4a80_5_nf; -extern cpuop_func op_4a80_5_ff; -extern cpuop_func op_4a90_5_nf; -extern cpuop_func op_4a90_5_ff; -extern cpuop_func op_4a98_5_nf; -extern cpuop_func op_4a98_5_ff; -extern cpuop_func op_4aa0_5_nf; -extern cpuop_func op_4aa0_5_ff; -extern cpuop_func op_4aa8_5_nf; -extern cpuop_func op_4aa8_5_ff; -extern cpuop_func op_4ab0_5_nf; -extern cpuop_func op_4ab0_5_ff; -extern cpuop_func op_4ab8_5_nf; -extern cpuop_func op_4ab8_5_ff; -extern cpuop_func op_4ab9_5_nf; -extern cpuop_func op_4ab9_5_ff; -extern cpuop_func op_4ac0_5_nf; -extern cpuop_func op_4ac0_5_ff; -extern cpuop_func op_4ad0_5_nf; -extern cpuop_func op_4ad0_5_ff; -extern cpuop_func op_4ad8_5_nf; -extern cpuop_func op_4ad8_5_ff; -extern cpuop_func op_4ae0_5_nf; -extern cpuop_func op_4ae0_5_ff; -extern cpuop_func op_4ae8_5_nf; -extern cpuop_func op_4ae8_5_ff; -extern cpuop_func op_4af0_5_nf; -extern cpuop_func op_4af0_5_ff; -extern cpuop_func op_4af8_5_nf; -extern cpuop_func op_4af8_5_ff; -extern cpuop_func op_4af9_5_nf; -extern cpuop_func op_4af9_5_ff; -extern cpuop_func op_4c90_5_nf; -extern cpuop_func op_4c90_5_ff; -extern cpuop_func op_4c98_5_nf; -extern cpuop_func op_4c98_5_ff; -extern cpuop_func op_4ca8_5_nf; -extern cpuop_func op_4ca8_5_ff; -extern cpuop_func op_4cb0_5_nf; -extern cpuop_func op_4cb0_5_ff; -extern cpuop_func op_4cb8_5_nf; -extern cpuop_func op_4cb8_5_ff; -extern cpuop_func op_4cb9_5_nf; -extern cpuop_func op_4cb9_5_ff; -extern cpuop_func op_4cba_5_nf; -extern cpuop_func op_4cba_5_ff; -extern cpuop_func op_4cbb_5_nf; -extern cpuop_func op_4cbb_5_ff; -extern cpuop_func op_4cd0_5_nf; -extern cpuop_func op_4cd0_5_ff; -extern cpuop_func op_4cd8_5_nf; -extern cpuop_func op_4cd8_5_ff; -extern cpuop_func op_4ce8_5_nf; -extern cpuop_func op_4ce8_5_ff; -extern cpuop_func op_4cf0_5_nf; -extern cpuop_func op_4cf0_5_ff; -extern cpuop_func op_4cf8_5_nf; -extern cpuop_func op_4cf8_5_ff; -extern cpuop_func op_4cf9_5_nf; -extern cpuop_func op_4cf9_5_ff; -extern cpuop_func op_4cfa_5_nf; -extern cpuop_func op_4cfa_5_ff; -extern cpuop_func op_4cfb_5_nf; -extern cpuop_func op_4cfb_5_ff; -extern cpuop_func op_4e40_5_nf; -extern cpuop_func op_4e40_5_ff; -extern cpuop_func op_4e50_5_nf; -extern cpuop_func op_4e50_5_ff; -extern cpuop_func op_4e58_5_nf; -extern cpuop_func op_4e58_5_ff; -extern cpuop_func op_4e60_5_nf; -extern cpuop_func op_4e60_5_ff; -extern cpuop_func op_4e68_5_nf; -extern cpuop_func op_4e68_5_ff; -extern cpuop_func op_4e70_5_nf; -extern cpuop_func op_4e70_5_ff; -extern cpuop_func op_4e71_5_nf; -extern cpuop_func op_4e71_5_ff; -extern cpuop_func op_4e72_5_nf; -extern cpuop_func op_4e72_5_ff; extern cpuop_func op_4e73_5_nf; extern cpuop_func op_4e73_5_ff; -extern cpuop_func op_4e74_5_nf; -extern cpuop_func op_4e74_5_ff; -extern cpuop_func op_4e75_5_nf; -extern cpuop_func op_4e75_5_ff; -extern cpuop_func op_4e76_5_nf; -extern cpuop_func op_4e76_5_ff; -extern cpuop_func op_4e77_5_nf; -extern cpuop_func op_4e77_5_ff; -extern cpuop_func op_4e90_5_nf; -extern cpuop_func op_4e90_5_ff; -extern cpuop_func op_4ea8_5_nf; -extern cpuop_func op_4ea8_5_ff; -extern cpuop_func op_4eb0_5_nf; -extern cpuop_func op_4eb0_5_ff; -extern cpuop_func op_4eb8_5_nf; -extern cpuop_func op_4eb8_5_ff; -extern cpuop_func op_4eb9_5_nf; -extern cpuop_func op_4eb9_5_ff; -extern cpuop_func op_4eba_5_nf; -extern cpuop_func op_4eba_5_ff; -extern cpuop_func op_4ebb_5_nf; -extern cpuop_func op_4ebb_5_ff; -extern cpuop_func op_4ed0_5_nf; -extern cpuop_func op_4ed0_5_ff; -extern cpuop_func op_4ee8_5_nf; -extern cpuop_func op_4ee8_5_ff; -extern cpuop_func op_4ef0_5_nf; -extern cpuop_func op_4ef0_5_ff; -extern cpuop_func op_4ef8_5_nf; -extern cpuop_func op_4ef8_5_ff; -extern cpuop_func op_4ef9_5_nf; -extern cpuop_func op_4ef9_5_ff; -extern cpuop_func op_4efa_5_nf; -extern cpuop_func op_4efa_5_ff; -extern cpuop_func op_4efb_5_nf; -extern cpuop_func op_4efb_5_ff; -extern cpuop_func op_5000_5_nf; -extern cpuop_func op_5000_5_ff; -extern cpuop_func op_5010_5_nf; -extern cpuop_func op_5010_5_ff; -extern cpuop_func op_5018_5_nf; -extern cpuop_func op_5018_5_ff; -extern cpuop_func op_5020_5_nf; -extern cpuop_func op_5020_5_ff; -extern cpuop_func op_5028_5_nf; -extern cpuop_func op_5028_5_ff; -extern cpuop_func op_5030_5_nf; -extern cpuop_func op_5030_5_ff; -extern cpuop_func op_5038_5_nf; -extern cpuop_func op_5038_5_ff; -extern cpuop_func op_5039_5_nf; -extern cpuop_func op_5039_5_ff; -extern cpuop_func op_5040_5_nf; -extern cpuop_func op_5040_5_ff; -extern cpuop_func op_5048_5_nf; -extern cpuop_func op_5048_5_ff; -extern cpuop_func op_5050_5_nf; -extern cpuop_func op_5050_5_ff; -extern cpuop_func op_5058_5_nf; -extern cpuop_func op_5058_5_ff; -extern cpuop_func op_5060_5_nf; -extern cpuop_func op_5060_5_ff; -extern cpuop_func op_5068_5_nf; -extern cpuop_func op_5068_5_ff; -extern cpuop_func op_5070_5_nf; -extern cpuop_func op_5070_5_ff; -extern cpuop_func op_5078_5_nf; -extern cpuop_func op_5078_5_ff; -extern cpuop_func op_5079_5_nf; -extern cpuop_func op_5079_5_ff; -extern cpuop_func op_5080_5_nf; -extern cpuop_func op_5080_5_ff; -extern cpuop_func op_5088_5_nf; -extern cpuop_func op_5088_5_ff; -extern cpuop_func op_5090_5_nf; -extern cpuop_func op_5090_5_ff; -extern cpuop_func op_5098_5_nf; -extern cpuop_func op_5098_5_ff; -extern cpuop_func op_50a0_5_nf; -extern cpuop_func op_50a0_5_ff; -extern cpuop_func op_50a8_5_nf; -extern cpuop_func op_50a8_5_ff; -extern cpuop_func op_50b0_5_nf; -extern cpuop_func op_50b0_5_ff; -extern cpuop_func op_50b8_5_nf; -extern cpuop_func op_50b8_5_ff; -extern cpuop_func op_50b9_5_nf; -extern cpuop_func op_50b9_5_ff; -extern cpuop_func op_50c0_5_nf; -extern cpuop_func op_50c0_5_ff; -extern cpuop_func op_50c8_5_nf; -extern cpuop_func op_50c8_5_ff; -extern cpuop_func op_50d0_5_nf; -extern cpuop_func op_50d0_5_ff; -extern cpuop_func op_50d8_5_nf; -extern cpuop_func op_50d8_5_ff; -extern cpuop_func op_50e0_5_nf; -extern cpuop_func op_50e0_5_ff; -extern cpuop_func op_50e8_5_nf; -extern cpuop_func op_50e8_5_ff; -extern cpuop_func op_50f0_5_nf; -extern cpuop_func op_50f0_5_ff; -extern cpuop_func op_50f8_5_nf; -extern cpuop_func op_50f8_5_ff; -extern cpuop_func op_50f9_5_nf; -extern cpuop_func op_50f9_5_ff; -extern cpuop_func op_5100_5_nf; -extern cpuop_func op_5100_5_ff; -extern cpuop_func op_5110_5_nf; -extern cpuop_func op_5110_5_ff; -extern cpuop_func op_5118_5_nf; -extern cpuop_func op_5118_5_ff; -extern cpuop_func op_5120_5_nf; -extern cpuop_func op_5120_5_ff; -extern cpuop_func op_5128_5_nf; -extern cpuop_func op_5128_5_ff; -extern cpuop_func op_5130_5_nf; -extern cpuop_func op_5130_5_ff; -extern cpuop_func op_5138_5_nf; -extern cpuop_func op_5138_5_ff; -extern cpuop_func op_5139_5_nf; -extern cpuop_func op_5139_5_ff; -extern cpuop_func op_5140_5_nf; -extern cpuop_func op_5140_5_ff; -extern cpuop_func op_5148_5_nf; -extern cpuop_func op_5148_5_ff; -extern cpuop_func op_5150_5_nf; -extern cpuop_func op_5150_5_ff; -extern cpuop_func op_5158_5_nf; -extern cpuop_func op_5158_5_ff; -extern cpuop_func op_5160_5_nf; -extern cpuop_func op_5160_5_ff; -extern cpuop_func op_5168_5_nf; -extern cpuop_func op_5168_5_ff; -extern cpuop_func op_5170_5_nf; -extern cpuop_func op_5170_5_ff; -extern cpuop_func op_5178_5_nf; -extern cpuop_func op_5178_5_ff; -extern cpuop_func op_5179_5_nf; -extern cpuop_func op_5179_5_ff; -extern cpuop_func op_5180_5_nf; -extern cpuop_func op_5180_5_ff; -extern cpuop_func op_5188_5_nf; -extern cpuop_func op_5188_5_ff; -extern cpuop_func op_5190_5_nf; -extern cpuop_func op_5190_5_ff; -extern cpuop_func op_5198_5_nf; -extern cpuop_func op_5198_5_ff; -extern cpuop_func op_51a0_5_nf; -extern cpuop_func op_51a0_5_ff; -extern cpuop_func op_51a8_5_nf; -extern cpuop_func op_51a8_5_ff; -extern cpuop_func op_51b0_5_nf; -extern cpuop_func op_51b0_5_ff; -extern cpuop_func op_51b8_5_nf; -extern cpuop_func op_51b8_5_ff; -extern cpuop_func op_51b9_5_nf; -extern cpuop_func op_51b9_5_ff; -extern cpuop_func op_51c0_5_nf; -extern cpuop_func op_51c0_5_ff; -extern cpuop_func op_51c8_5_nf; -extern cpuop_func op_51c8_5_ff; -extern cpuop_func op_51d0_5_nf; -extern cpuop_func op_51d0_5_ff; -extern cpuop_func op_51d8_5_nf; -extern cpuop_func op_51d8_5_ff; -extern cpuop_func op_51e0_5_nf; -extern cpuop_func op_51e0_5_ff; -extern cpuop_func op_51e8_5_nf; -extern cpuop_func op_51e8_5_ff; -extern cpuop_func op_51f0_5_nf; -extern cpuop_func op_51f0_5_ff; -extern cpuop_func op_51f8_5_nf; -extern cpuop_func op_51f8_5_ff; -extern cpuop_func op_51f9_5_nf; -extern cpuop_func op_51f9_5_ff; -extern cpuop_func op_52c0_5_nf; -extern cpuop_func op_52c0_5_ff; -extern cpuop_func op_52c8_5_nf; -extern cpuop_func op_52c8_5_ff; -extern cpuop_func op_52d0_5_nf; -extern cpuop_func op_52d0_5_ff; -extern cpuop_func op_52d8_5_nf; -extern cpuop_func op_52d8_5_ff; -extern cpuop_func op_52e0_5_nf; -extern cpuop_func op_52e0_5_ff; -extern cpuop_func op_52e8_5_nf; -extern cpuop_func op_52e8_5_ff; -extern cpuop_func op_52f0_5_nf; -extern cpuop_func op_52f0_5_ff; -extern cpuop_func op_52f8_5_nf; -extern cpuop_func op_52f8_5_ff; -extern cpuop_func op_52f9_5_nf; -extern cpuop_func op_52f9_5_ff; -extern cpuop_func op_53c0_5_nf; -extern cpuop_func op_53c0_5_ff; -extern cpuop_func op_53c8_5_nf; -extern cpuop_func op_53c8_5_ff; -extern cpuop_func op_53d0_5_nf; -extern cpuop_func op_53d0_5_ff; -extern cpuop_func op_53d8_5_nf; -extern cpuop_func op_53d8_5_ff; -extern cpuop_func op_53e0_5_nf; -extern cpuop_func op_53e0_5_ff; -extern cpuop_func op_53e8_5_nf; -extern cpuop_func op_53e8_5_ff; -extern cpuop_func op_53f0_5_nf; -extern cpuop_func op_53f0_5_ff; -extern cpuop_func op_53f8_5_nf; -extern cpuop_func op_53f8_5_ff; -extern cpuop_func op_53f9_5_nf; -extern cpuop_func op_53f9_5_ff; -extern cpuop_func op_54c0_5_nf; -extern cpuop_func op_54c0_5_ff; -extern cpuop_func op_54c8_5_nf; -extern cpuop_func op_54c8_5_ff; -extern cpuop_func op_54d0_5_nf; -extern cpuop_func op_54d0_5_ff; -extern cpuop_func op_54d8_5_nf; -extern cpuop_func op_54d8_5_ff; -extern cpuop_func op_54e0_5_nf; -extern cpuop_func op_54e0_5_ff; -extern cpuop_func op_54e8_5_nf; -extern cpuop_func op_54e8_5_ff; -extern cpuop_func op_54f0_5_nf; -extern cpuop_func op_54f0_5_ff; -extern cpuop_func op_54f8_5_nf; -extern cpuop_func op_54f8_5_ff; -extern cpuop_func op_54f9_5_nf; -extern cpuop_func op_54f9_5_ff; -extern cpuop_func op_55c0_5_nf; -extern cpuop_func op_55c0_5_ff; -extern cpuop_func op_55c8_5_nf; -extern cpuop_func op_55c8_5_ff; -extern cpuop_func op_55d0_5_nf; -extern cpuop_func op_55d0_5_ff; -extern cpuop_func op_55d8_5_nf; -extern cpuop_func op_55d8_5_ff; -extern cpuop_func op_55e0_5_nf; -extern cpuop_func op_55e0_5_ff; -extern cpuop_func op_55e8_5_nf; -extern cpuop_func op_55e8_5_ff; -extern cpuop_func op_55f0_5_nf; -extern cpuop_func op_55f0_5_ff; -extern cpuop_func op_55f8_5_nf; -extern cpuop_func op_55f8_5_ff; -extern cpuop_func op_55f9_5_nf; -extern cpuop_func op_55f9_5_ff; -extern cpuop_func op_56c0_5_nf; -extern cpuop_func op_56c0_5_ff; -extern cpuop_func op_56c8_5_nf; -extern cpuop_func op_56c8_5_ff; -extern cpuop_func op_56d0_5_nf; -extern cpuop_func op_56d0_5_ff; -extern cpuop_func op_56d8_5_nf; -extern cpuop_func op_56d8_5_ff; -extern cpuop_func op_56e0_5_nf; -extern cpuop_func op_56e0_5_ff; -extern cpuop_func op_56e8_5_nf; -extern cpuop_func op_56e8_5_ff; -extern cpuop_func op_56f0_5_nf; -extern cpuop_func op_56f0_5_ff; -extern cpuop_func op_56f8_5_nf; -extern cpuop_func op_56f8_5_ff; -extern cpuop_func op_56f9_5_nf; -extern cpuop_func op_56f9_5_ff; -extern cpuop_func op_57c0_5_nf; -extern cpuop_func op_57c0_5_ff; -extern cpuop_func op_57c8_5_nf; -extern cpuop_func op_57c8_5_ff; -extern cpuop_func op_57d0_5_nf; -extern cpuop_func op_57d0_5_ff; -extern cpuop_func op_57d8_5_nf; -extern cpuop_func op_57d8_5_ff; -extern cpuop_func op_57e0_5_nf; -extern cpuop_func op_57e0_5_ff; -extern cpuop_func op_57e8_5_nf; -extern cpuop_func op_57e8_5_ff; -extern cpuop_func op_57f0_5_nf; -extern cpuop_func op_57f0_5_ff; -extern cpuop_func op_57f8_5_nf; -extern cpuop_func op_57f8_5_ff; -extern cpuop_func op_57f9_5_nf; -extern cpuop_func op_57f9_5_ff; -extern cpuop_func op_58c0_5_nf; -extern cpuop_func op_58c0_5_ff; -extern cpuop_func op_58c8_5_nf; -extern cpuop_func op_58c8_5_ff; -extern cpuop_func op_58d0_5_nf; -extern cpuop_func op_58d0_5_ff; -extern cpuop_func op_58d8_5_nf; -extern cpuop_func op_58d8_5_ff; -extern cpuop_func op_58e0_5_nf; -extern cpuop_func op_58e0_5_ff; -extern cpuop_func op_58e8_5_nf; -extern cpuop_func op_58e8_5_ff; -extern cpuop_func op_58f0_5_nf; -extern cpuop_func op_58f0_5_ff; -extern cpuop_func op_58f8_5_nf; -extern cpuop_func op_58f8_5_ff; -extern cpuop_func op_58f9_5_nf; -extern cpuop_func op_58f9_5_ff; -extern cpuop_func op_59c0_5_nf; -extern cpuop_func op_59c0_5_ff; -extern cpuop_func op_59c8_5_nf; -extern cpuop_func op_59c8_5_ff; -extern cpuop_func op_59d0_5_nf; -extern cpuop_func op_59d0_5_ff; -extern cpuop_func op_59d8_5_nf; -extern cpuop_func op_59d8_5_ff; -extern cpuop_func op_59e0_5_nf; -extern cpuop_func op_59e0_5_ff; -extern cpuop_func op_59e8_5_nf; -extern cpuop_func op_59e8_5_ff; -extern cpuop_func op_59f0_5_nf; -extern cpuop_func op_59f0_5_ff; -extern cpuop_func op_59f8_5_nf; -extern cpuop_func op_59f8_5_ff; -extern cpuop_func op_59f9_5_nf; -extern cpuop_func op_59f9_5_ff; -extern cpuop_func op_5ac0_5_nf; -extern cpuop_func op_5ac0_5_ff; -extern cpuop_func op_5ac8_5_nf; -extern cpuop_func op_5ac8_5_ff; -extern cpuop_func op_5ad0_5_nf; -extern cpuop_func op_5ad0_5_ff; -extern cpuop_func op_5ad8_5_nf; -extern cpuop_func op_5ad8_5_ff; -extern cpuop_func op_5ae0_5_nf; -extern cpuop_func op_5ae0_5_ff; -extern cpuop_func op_5ae8_5_nf; -extern cpuop_func op_5ae8_5_ff; -extern cpuop_func op_5af0_5_nf; -extern cpuop_func op_5af0_5_ff; -extern cpuop_func op_5af8_5_nf; -extern cpuop_func op_5af8_5_ff; -extern cpuop_func op_5af9_5_nf; -extern cpuop_func op_5af9_5_ff; -extern cpuop_func op_5bc0_5_nf; -extern cpuop_func op_5bc0_5_ff; -extern cpuop_func op_5bc8_5_nf; -extern cpuop_func op_5bc8_5_ff; -extern cpuop_func op_5bd0_5_nf; -extern cpuop_func op_5bd0_5_ff; -extern cpuop_func op_5bd8_5_nf; -extern cpuop_func op_5bd8_5_ff; -extern cpuop_func op_5be0_5_nf; -extern cpuop_func op_5be0_5_ff; -extern cpuop_func op_5be8_5_nf; -extern cpuop_func op_5be8_5_ff; -extern cpuop_func op_5bf0_5_nf; -extern cpuop_func op_5bf0_5_ff; -extern cpuop_func op_5bf8_5_nf; -extern cpuop_func op_5bf8_5_ff; -extern cpuop_func op_5bf9_5_nf; -extern cpuop_func op_5bf9_5_ff; -extern cpuop_func op_5cc0_5_nf; -extern cpuop_func op_5cc0_5_ff; -extern cpuop_func op_5cc8_5_nf; -extern cpuop_func op_5cc8_5_ff; -extern cpuop_func op_5cd0_5_nf; -extern cpuop_func op_5cd0_5_ff; -extern cpuop_func op_5cd8_5_nf; -extern cpuop_func op_5cd8_5_ff; -extern cpuop_func op_5ce0_5_nf; -extern cpuop_func op_5ce0_5_ff; -extern cpuop_func op_5ce8_5_nf; -extern cpuop_func op_5ce8_5_ff; -extern cpuop_func op_5cf0_5_nf; -extern cpuop_func op_5cf0_5_ff; -extern cpuop_func op_5cf8_5_nf; -extern cpuop_func op_5cf8_5_ff; -extern cpuop_func op_5cf9_5_nf; -extern cpuop_func op_5cf9_5_ff; -extern cpuop_func op_5dc0_5_nf; -extern cpuop_func op_5dc0_5_ff; -extern cpuop_func op_5dc8_5_nf; -extern cpuop_func op_5dc8_5_ff; -extern cpuop_func op_5dd0_5_nf; -extern cpuop_func op_5dd0_5_ff; -extern cpuop_func op_5dd8_5_nf; -extern cpuop_func op_5dd8_5_ff; -extern cpuop_func op_5de0_5_nf; -extern cpuop_func op_5de0_5_ff; -extern cpuop_func op_5de8_5_nf; -extern cpuop_func op_5de8_5_ff; -extern cpuop_func op_5df0_5_nf; -extern cpuop_func op_5df0_5_ff; -extern cpuop_func op_5df8_5_nf; -extern cpuop_func op_5df8_5_ff; -extern cpuop_func op_5df9_5_nf; -extern cpuop_func op_5df9_5_ff; -extern cpuop_func op_5ec0_5_nf; -extern cpuop_func op_5ec0_5_ff; -extern cpuop_func op_5ec8_5_nf; -extern cpuop_func op_5ec8_5_ff; -extern cpuop_func op_5ed0_5_nf; -extern cpuop_func op_5ed0_5_ff; -extern cpuop_func op_5ed8_5_nf; -extern cpuop_func op_5ed8_5_ff; -extern cpuop_func op_5ee0_5_nf; -extern cpuop_func op_5ee0_5_ff; -extern cpuop_func op_5ee8_5_nf; -extern cpuop_func op_5ee8_5_ff; -extern cpuop_func op_5ef0_5_nf; -extern cpuop_func op_5ef0_5_ff; -extern cpuop_func op_5ef8_5_nf; -extern cpuop_func op_5ef8_5_ff; -extern cpuop_func op_5ef9_5_nf; -extern cpuop_func op_5ef9_5_ff; -extern cpuop_func op_5fc0_5_nf; -extern cpuop_func op_5fc0_5_ff; -extern cpuop_func op_5fc8_5_nf; -extern cpuop_func op_5fc8_5_ff; -extern cpuop_func op_5fd0_5_nf; -extern cpuop_func op_5fd0_5_ff; -extern cpuop_func op_5fd8_5_nf; -extern cpuop_func op_5fd8_5_ff; -extern cpuop_func op_5fe0_5_nf; -extern cpuop_func op_5fe0_5_ff; -extern cpuop_func op_5fe8_5_nf; -extern cpuop_func op_5fe8_5_ff; -extern cpuop_func op_5ff0_5_nf; -extern cpuop_func op_5ff0_5_ff; -extern cpuop_func op_5ff8_5_nf; -extern cpuop_func op_5ff8_5_ff; -extern cpuop_func op_5ff9_5_nf; -extern cpuop_func op_5ff9_5_ff; -extern cpuop_func op_6000_5_nf; -extern cpuop_func op_6000_5_ff; -extern cpuop_func op_6001_5_nf; -extern cpuop_func op_6001_5_ff; -extern cpuop_func op_60ff_5_nf; -extern cpuop_func op_60ff_5_ff; -extern cpuop_func op_6100_5_nf; -extern cpuop_func op_6100_5_ff; -extern cpuop_func op_6101_5_nf; -extern cpuop_func op_6101_5_ff; -extern cpuop_func op_61ff_5_nf; -extern cpuop_func op_61ff_5_ff; -extern cpuop_func op_6200_5_nf; -extern cpuop_func op_6200_5_ff; -extern cpuop_func op_6201_5_nf; -extern cpuop_func op_6201_5_ff; -extern cpuop_func op_62ff_5_nf; -extern cpuop_func op_62ff_5_ff; -extern cpuop_func op_6300_5_nf; -extern cpuop_func op_6300_5_ff; -extern cpuop_func op_6301_5_nf; -extern cpuop_func op_6301_5_ff; -extern cpuop_func op_63ff_5_nf; -extern cpuop_func op_63ff_5_ff; -extern cpuop_func op_6400_5_nf; -extern cpuop_func op_6400_5_ff; -extern cpuop_func op_6401_5_nf; -extern cpuop_func op_6401_5_ff; -extern cpuop_func op_64ff_5_nf; -extern cpuop_func op_64ff_5_ff; -extern cpuop_func op_6500_5_nf; -extern cpuop_func op_6500_5_ff; -extern cpuop_func op_6501_5_nf; -extern cpuop_func op_6501_5_ff; -extern cpuop_func op_65ff_5_nf; -extern cpuop_func op_65ff_5_ff; -extern cpuop_func op_6600_5_nf; -extern cpuop_func op_6600_5_ff; -extern cpuop_func op_6601_5_nf; -extern cpuop_func op_6601_5_ff; -extern cpuop_func op_66ff_5_nf; -extern cpuop_func op_66ff_5_ff; -extern cpuop_func op_6700_5_nf; -extern cpuop_func op_6700_5_ff; -extern cpuop_func op_6701_5_nf; -extern cpuop_func op_6701_5_ff; -extern cpuop_func op_67ff_5_nf; -extern cpuop_func op_67ff_5_ff; -extern cpuop_func op_6800_5_nf; -extern cpuop_func op_6800_5_ff; -extern cpuop_func op_6801_5_nf; -extern cpuop_func op_6801_5_ff; -extern cpuop_func op_68ff_5_nf; -extern cpuop_func op_68ff_5_ff; -extern cpuop_func op_6900_5_nf; -extern cpuop_func op_6900_5_ff; -extern cpuop_func op_6901_5_nf; -extern cpuop_func op_6901_5_ff; -extern cpuop_func op_69ff_5_nf; -extern cpuop_func op_69ff_5_ff; -extern cpuop_func op_6a00_5_nf; -extern cpuop_func op_6a00_5_ff; -extern cpuop_func op_6a01_5_nf; -extern cpuop_func op_6a01_5_ff; -extern cpuop_func op_6aff_5_nf; -extern cpuop_func op_6aff_5_ff; -extern cpuop_func op_6b00_5_nf; -extern cpuop_func op_6b00_5_ff; -extern cpuop_func op_6b01_5_nf; -extern cpuop_func op_6b01_5_ff; -extern cpuop_func op_6bff_5_nf; -extern cpuop_func op_6bff_5_ff; -extern cpuop_func op_6c00_5_nf; -extern cpuop_func op_6c00_5_ff; -extern cpuop_func op_6c01_5_nf; -extern cpuop_func op_6c01_5_ff; -extern cpuop_func op_6cff_5_nf; -extern cpuop_func op_6cff_5_ff; -extern cpuop_func op_6d00_5_nf; -extern cpuop_func op_6d00_5_ff; -extern cpuop_func op_6d01_5_nf; -extern cpuop_func op_6d01_5_ff; -extern cpuop_func op_6dff_5_nf; -extern cpuop_func op_6dff_5_ff; -extern cpuop_func op_6e00_5_nf; -extern cpuop_func op_6e00_5_ff; -extern cpuop_func op_6e01_5_nf; -extern cpuop_func op_6e01_5_ff; -extern cpuop_func op_6eff_5_nf; -extern cpuop_func op_6eff_5_ff; -extern cpuop_func op_6f00_5_nf; -extern cpuop_func op_6f00_5_ff; -extern cpuop_func op_6f01_5_nf; -extern cpuop_func op_6f01_5_ff; -extern cpuop_func op_6fff_5_nf; -extern cpuop_func op_6fff_5_ff; -extern cpuop_func op_7000_5_nf; -extern cpuop_func op_7000_5_ff; -extern cpuop_func op_8000_5_nf; -extern cpuop_func op_8000_5_ff; -extern cpuop_func op_8010_5_nf; -extern cpuop_func op_8010_5_ff; -extern cpuop_func op_8018_5_nf; -extern cpuop_func op_8018_5_ff; -extern cpuop_func op_8020_5_nf; -extern cpuop_func op_8020_5_ff; -extern cpuop_func op_8028_5_nf; -extern cpuop_func op_8028_5_ff; -extern cpuop_func op_8030_5_nf; -extern cpuop_func op_8030_5_ff; -extern cpuop_func op_8038_5_nf; -extern cpuop_func op_8038_5_ff; -extern cpuop_func op_8039_5_nf; -extern cpuop_func op_8039_5_ff; -extern cpuop_func op_803a_5_nf; -extern cpuop_func op_803a_5_ff; -extern cpuop_func op_803b_5_nf; -extern cpuop_func op_803b_5_ff; -extern cpuop_func op_803c_5_nf; -extern cpuop_func op_803c_5_ff; -extern cpuop_func op_8040_5_nf; -extern cpuop_func op_8040_5_ff; -extern cpuop_func op_8050_5_nf; -extern cpuop_func op_8050_5_ff; -extern cpuop_func op_8058_5_nf; -extern cpuop_func op_8058_5_ff; -extern cpuop_func op_8060_5_nf; -extern cpuop_func op_8060_5_ff; -extern cpuop_func op_8068_5_nf; -extern cpuop_func op_8068_5_ff; -extern cpuop_func op_8070_5_nf; -extern cpuop_func op_8070_5_ff; -extern cpuop_func op_8078_5_nf; -extern cpuop_func op_8078_5_ff; -extern cpuop_func op_8079_5_nf; -extern cpuop_func op_8079_5_ff; -extern cpuop_func op_807a_5_nf; -extern cpuop_func op_807a_5_ff; -extern cpuop_func op_807b_5_nf; -extern cpuop_func op_807b_5_ff; -extern cpuop_func op_807c_5_nf; -extern cpuop_func op_807c_5_ff; -extern cpuop_func op_8080_5_nf; -extern cpuop_func op_8080_5_ff; -extern cpuop_func op_8090_5_nf; -extern cpuop_func op_8090_5_ff; -extern cpuop_func op_8098_5_nf; -extern cpuop_func op_8098_5_ff; -extern cpuop_func op_80a0_5_nf; -extern cpuop_func op_80a0_5_ff; -extern cpuop_func op_80a8_5_nf; -extern cpuop_func op_80a8_5_ff; -extern cpuop_func op_80b0_5_nf; -extern cpuop_func op_80b0_5_ff; -extern cpuop_func op_80b8_5_nf; -extern cpuop_func op_80b8_5_ff; -extern cpuop_func op_80b9_5_nf; -extern cpuop_func op_80b9_5_ff; -extern cpuop_func op_80ba_5_nf; -extern cpuop_func op_80ba_5_ff; -extern cpuop_func op_80bb_5_nf; -extern cpuop_func op_80bb_5_ff; -extern cpuop_func op_80bc_5_nf; -extern cpuop_func op_80bc_5_ff; -extern cpuop_func op_80c0_5_nf; -extern cpuop_func op_80c0_5_ff; -extern cpuop_func op_80d0_5_nf; -extern cpuop_func op_80d0_5_ff; -extern cpuop_func op_80d8_5_nf; -extern cpuop_func op_80d8_5_ff; -extern cpuop_func op_80e0_5_nf; -extern cpuop_func op_80e0_5_ff; -extern cpuop_func op_80e8_5_nf; -extern cpuop_func op_80e8_5_ff; -extern cpuop_func op_80f0_5_nf; -extern cpuop_func op_80f0_5_ff; -extern cpuop_func op_80f8_5_nf; -extern cpuop_func op_80f8_5_ff; -extern cpuop_func op_80f9_5_nf; -extern cpuop_func op_80f9_5_ff; -extern cpuop_func op_80fa_5_nf; -extern cpuop_func op_80fa_5_ff; -extern cpuop_func op_80fb_5_nf; -extern cpuop_func op_80fb_5_ff; -extern cpuop_func op_80fc_5_nf; -extern cpuop_func op_80fc_5_ff; -extern cpuop_func op_8100_5_nf; -extern cpuop_func op_8100_5_ff; -extern cpuop_func op_8108_5_nf; -extern cpuop_func op_8108_5_ff; -extern cpuop_func op_8110_5_nf; -extern cpuop_func op_8110_5_ff; -extern cpuop_func op_8118_5_nf; -extern cpuop_func op_8118_5_ff; -extern cpuop_func op_8120_5_nf; -extern cpuop_func op_8120_5_ff; -extern cpuop_func op_8128_5_nf; -extern cpuop_func op_8128_5_ff; -extern cpuop_func op_8130_5_nf; -extern cpuop_func op_8130_5_ff; -extern cpuop_func op_8138_5_nf; -extern cpuop_func op_8138_5_ff; -extern cpuop_func op_8139_5_nf; -extern cpuop_func op_8139_5_ff; -extern cpuop_func op_8150_5_nf; -extern cpuop_func op_8150_5_ff; -extern cpuop_func op_8158_5_nf; -extern cpuop_func op_8158_5_ff; -extern cpuop_func op_8160_5_nf; -extern cpuop_func op_8160_5_ff; -extern cpuop_func op_8168_5_nf; -extern cpuop_func op_8168_5_ff; -extern cpuop_func op_8170_5_nf; -extern cpuop_func op_8170_5_ff; -extern cpuop_func op_8178_5_nf; -extern cpuop_func op_8178_5_ff; -extern cpuop_func op_8179_5_nf; -extern cpuop_func op_8179_5_ff; -extern cpuop_func op_8190_5_nf; -extern cpuop_func op_8190_5_ff; -extern cpuop_func op_8198_5_nf; -extern cpuop_func op_8198_5_ff; -extern cpuop_func op_81a0_5_nf; -extern cpuop_func op_81a0_5_ff; -extern cpuop_func op_81a8_5_nf; -extern cpuop_func op_81a8_5_ff; -extern cpuop_func op_81b0_5_nf; -extern cpuop_func op_81b0_5_ff; -extern cpuop_func op_81b8_5_nf; -extern cpuop_func op_81b8_5_ff; -extern cpuop_func op_81b9_5_nf; -extern cpuop_func op_81b9_5_ff; -extern cpuop_func op_81c0_5_nf; -extern cpuop_func op_81c0_5_ff; -extern cpuop_func op_81d0_5_nf; -extern cpuop_func op_81d0_5_ff; -extern cpuop_func op_81d8_5_nf; -extern cpuop_func op_81d8_5_ff; -extern cpuop_func op_81e0_5_nf; -extern cpuop_func op_81e0_5_ff; -extern cpuop_func op_81e8_5_nf; -extern cpuop_func op_81e8_5_ff; -extern cpuop_func op_81f0_5_nf; -extern cpuop_func op_81f0_5_ff; -extern cpuop_func op_81f8_5_nf; -extern cpuop_func op_81f8_5_ff; -extern cpuop_func op_81f9_5_nf; -extern cpuop_func op_81f9_5_ff; -extern cpuop_func op_81fa_5_nf; -extern cpuop_func op_81fa_5_ff; -extern cpuop_func op_81fb_5_nf; -extern cpuop_func op_81fb_5_ff; -extern cpuop_func op_81fc_5_nf; -extern cpuop_func op_81fc_5_ff; -extern cpuop_func op_9000_5_nf; -extern cpuop_func op_9000_5_ff; -extern cpuop_func op_9010_5_nf; -extern cpuop_func op_9010_5_ff; -extern cpuop_func op_9018_5_nf; -extern cpuop_func op_9018_5_ff; -extern cpuop_func op_9020_5_nf; -extern cpuop_func op_9020_5_ff; -extern cpuop_func op_9028_5_nf; -extern cpuop_func op_9028_5_ff; -extern cpuop_func op_9030_5_nf; -extern cpuop_func op_9030_5_ff; -extern cpuop_func op_9038_5_nf; -extern cpuop_func op_9038_5_ff; -extern cpuop_func op_9039_5_nf; -extern cpuop_func op_9039_5_ff; -extern cpuop_func op_903a_5_nf; -extern cpuop_func op_903a_5_ff; -extern cpuop_func op_903b_5_nf; -extern cpuop_func op_903b_5_ff; -extern cpuop_func op_903c_5_nf; -extern cpuop_func op_903c_5_ff; -extern cpuop_func op_9040_5_nf; -extern cpuop_func op_9040_5_ff; -extern cpuop_func op_9048_5_nf; -extern cpuop_func op_9048_5_ff; -extern cpuop_func op_9050_5_nf; -extern cpuop_func op_9050_5_ff; -extern cpuop_func op_9058_5_nf; -extern cpuop_func op_9058_5_ff; -extern cpuop_func op_9060_5_nf; -extern cpuop_func op_9060_5_ff; -extern cpuop_func op_9068_5_nf; -extern cpuop_func op_9068_5_ff; -extern cpuop_func op_9070_5_nf; -extern cpuop_func op_9070_5_ff; -extern cpuop_func op_9078_5_nf; -extern cpuop_func op_9078_5_ff; -extern cpuop_func op_9079_5_nf; -extern cpuop_func op_9079_5_ff; -extern cpuop_func op_907a_5_nf; -extern cpuop_func op_907a_5_ff; -extern cpuop_func op_907b_5_nf; -extern cpuop_func op_907b_5_ff; -extern cpuop_func op_907c_5_nf; -extern cpuop_func op_907c_5_ff; -extern cpuop_func op_9080_5_nf; -extern cpuop_func op_9080_5_ff; -extern cpuop_func op_9088_5_nf; -extern cpuop_func op_9088_5_ff; -extern cpuop_func op_9090_5_nf; -extern cpuop_func op_9090_5_ff; -extern cpuop_func op_9098_5_nf; -extern cpuop_func op_9098_5_ff; -extern cpuop_func op_90a0_5_nf; -extern cpuop_func op_90a0_5_ff; -extern cpuop_func op_90a8_5_nf; -extern cpuop_func op_90a8_5_ff; -extern cpuop_func op_90b0_5_nf; -extern cpuop_func op_90b0_5_ff; -extern cpuop_func op_90b8_5_nf; -extern cpuop_func op_90b8_5_ff; -extern cpuop_func op_90b9_5_nf; -extern cpuop_func op_90b9_5_ff; -extern cpuop_func op_90ba_5_nf; -extern cpuop_func op_90ba_5_ff; -extern cpuop_func op_90bb_5_nf; -extern cpuop_func op_90bb_5_ff; -extern cpuop_func op_90bc_5_nf; -extern cpuop_func op_90bc_5_ff; -extern cpuop_func op_90c0_5_nf; -extern cpuop_func op_90c0_5_ff; -extern cpuop_func op_90c8_5_nf; -extern cpuop_func op_90c8_5_ff; -extern cpuop_func op_90d0_5_nf; -extern cpuop_func op_90d0_5_ff; -extern cpuop_func op_90d8_5_nf; -extern cpuop_func op_90d8_5_ff; -extern cpuop_func op_90e0_5_nf; -extern cpuop_func op_90e0_5_ff; -extern cpuop_func op_90e8_5_nf; -extern cpuop_func op_90e8_5_ff; -extern cpuop_func op_90f0_5_nf; -extern cpuop_func op_90f0_5_ff; -extern cpuop_func op_90f8_5_nf; -extern cpuop_func op_90f8_5_ff; -extern cpuop_func op_90f9_5_nf; -extern cpuop_func op_90f9_5_ff; -extern cpuop_func op_90fa_5_nf; -extern cpuop_func op_90fa_5_ff; -extern cpuop_func op_90fb_5_nf; -extern cpuop_func op_90fb_5_ff; -extern cpuop_func op_90fc_5_nf; -extern cpuop_func op_90fc_5_ff; -extern cpuop_func op_9100_5_nf; -extern cpuop_func op_9100_5_ff; -extern cpuop_func op_9108_5_nf; -extern cpuop_func op_9108_5_ff; -extern cpuop_func op_9110_5_nf; -extern cpuop_func op_9110_5_ff; -extern cpuop_func op_9118_5_nf; -extern cpuop_func op_9118_5_ff; -extern cpuop_func op_9120_5_nf; -extern cpuop_func op_9120_5_ff; -extern cpuop_func op_9128_5_nf; -extern cpuop_func op_9128_5_ff; -extern cpuop_func op_9130_5_nf; -extern cpuop_func op_9130_5_ff; -extern cpuop_func op_9138_5_nf; -extern cpuop_func op_9138_5_ff; -extern cpuop_func op_9139_5_nf; -extern cpuop_func op_9139_5_ff; -extern cpuop_func op_9140_5_nf; -extern cpuop_func op_9140_5_ff; -extern cpuop_func op_9148_5_nf; -extern cpuop_func op_9148_5_ff; -extern cpuop_func op_9150_5_nf; -extern cpuop_func op_9150_5_ff; -extern cpuop_func op_9158_5_nf; -extern cpuop_func op_9158_5_ff; -extern cpuop_func op_9160_5_nf; -extern cpuop_func op_9160_5_ff; -extern cpuop_func op_9168_5_nf; -extern cpuop_func op_9168_5_ff; -extern cpuop_func op_9170_5_nf; -extern cpuop_func op_9170_5_ff; -extern cpuop_func op_9178_5_nf; -extern cpuop_func op_9178_5_ff; -extern cpuop_func op_9179_5_nf; -extern cpuop_func op_9179_5_ff; -extern cpuop_func op_9180_5_nf; -extern cpuop_func op_9180_5_ff; -extern cpuop_func op_9188_5_nf; -extern cpuop_func op_9188_5_ff; -extern cpuop_func op_9190_5_nf; -extern cpuop_func op_9190_5_ff; -extern cpuop_func op_9198_5_nf; -extern cpuop_func op_9198_5_ff; -extern cpuop_func op_91a0_5_nf; -extern cpuop_func op_91a0_5_ff; -extern cpuop_func op_91a8_5_nf; -extern cpuop_func op_91a8_5_ff; -extern cpuop_func op_91b0_5_nf; -extern cpuop_func op_91b0_5_ff; -extern cpuop_func op_91b8_5_nf; -extern cpuop_func op_91b8_5_ff; -extern cpuop_func op_91b9_5_nf; -extern cpuop_func op_91b9_5_ff; -extern cpuop_func op_91c0_5_nf; -extern cpuop_func op_91c0_5_ff; -extern cpuop_func op_91c8_5_nf; -extern cpuop_func op_91c8_5_ff; -extern cpuop_func op_91d0_5_nf; -extern cpuop_func op_91d0_5_ff; -extern cpuop_func op_91d8_5_nf; -extern cpuop_func op_91d8_5_ff; -extern cpuop_func op_91e0_5_nf; -extern cpuop_func op_91e0_5_ff; -extern cpuop_func op_91e8_5_nf; -extern cpuop_func op_91e8_5_ff; -extern cpuop_func op_91f0_5_nf; -extern cpuop_func op_91f0_5_ff; -extern cpuop_func op_91f8_5_nf; -extern cpuop_func op_91f8_5_ff; -extern cpuop_func op_91f9_5_nf; -extern cpuop_func op_91f9_5_ff; -extern cpuop_func op_91fa_5_nf; -extern cpuop_func op_91fa_5_ff; -extern cpuop_func op_91fb_5_nf; -extern cpuop_func op_91fb_5_ff; -extern cpuop_func op_91fc_5_nf; -extern cpuop_func op_91fc_5_ff; -extern cpuop_func op_b000_5_nf; -extern cpuop_func op_b000_5_ff; -extern cpuop_func op_b010_5_nf; -extern cpuop_func op_b010_5_ff; -extern cpuop_func op_b018_5_nf; -extern cpuop_func op_b018_5_ff; -extern cpuop_func op_b020_5_nf; -extern cpuop_func op_b020_5_ff; -extern cpuop_func op_b028_5_nf; -extern cpuop_func op_b028_5_ff; -extern cpuop_func op_b030_5_nf; -extern cpuop_func op_b030_5_ff; -extern cpuop_func op_b038_5_nf; -extern cpuop_func op_b038_5_ff; -extern cpuop_func op_b039_5_nf; -extern cpuop_func op_b039_5_ff; -extern cpuop_func op_b03a_5_nf; -extern cpuop_func op_b03a_5_ff; -extern cpuop_func op_b03b_5_nf; -extern cpuop_func op_b03b_5_ff; -extern cpuop_func op_b03c_5_nf; -extern cpuop_func op_b03c_5_ff; -extern cpuop_func op_b040_5_nf; -extern cpuop_func op_b040_5_ff; -extern cpuop_func op_b048_5_nf; -extern cpuop_func op_b048_5_ff; -extern cpuop_func op_b050_5_nf; -extern cpuop_func op_b050_5_ff; -extern cpuop_func op_b058_5_nf; -extern cpuop_func op_b058_5_ff; -extern cpuop_func op_b060_5_nf; -extern cpuop_func op_b060_5_ff; -extern cpuop_func op_b068_5_nf; -extern cpuop_func op_b068_5_ff; -extern cpuop_func op_b070_5_nf; -extern cpuop_func op_b070_5_ff; -extern cpuop_func op_b078_5_nf; -extern cpuop_func op_b078_5_ff; -extern cpuop_func op_b079_5_nf; -extern cpuop_func op_b079_5_ff; -extern cpuop_func op_b07a_5_nf; -extern cpuop_func op_b07a_5_ff; -extern cpuop_func op_b07b_5_nf; -extern cpuop_func op_b07b_5_ff; -extern cpuop_func op_b07c_5_nf; -extern cpuop_func op_b07c_5_ff; -extern cpuop_func op_b080_5_nf; -extern cpuop_func op_b080_5_ff; -extern cpuop_func op_b088_5_nf; -extern cpuop_func op_b088_5_ff; -extern cpuop_func op_b090_5_nf; -extern cpuop_func op_b090_5_ff; -extern cpuop_func op_b098_5_nf; -extern cpuop_func op_b098_5_ff; -extern cpuop_func op_b0a0_5_nf; -extern cpuop_func op_b0a0_5_ff; -extern cpuop_func op_b0a8_5_nf; -extern cpuop_func op_b0a8_5_ff; -extern cpuop_func op_b0b0_5_nf; -extern cpuop_func op_b0b0_5_ff; -extern cpuop_func op_b0b8_5_nf; -extern cpuop_func op_b0b8_5_ff; -extern cpuop_func op_b0b9_5_nf; -extern cpuop_func op_b0b9_5_ff; -extern cpuop_func op_b0ba_5_nf; -extern cpuop_func op_b0ba_5_ff; -extern cpuop_func op_b0bb_5_nf; -extern cpuop_func op_b0bb_5_ff; -extern cpuop_func op_b0bc_5_nf; -extern cpuop_func op_b0bc_5_ff; -extern cpuop_func op_b0c0_5_nf; -extern cpuop_func op_b0c0_5_ff; -extern cpuop_func op_b0c8_5_nf; -extern cpuop_func op_b0c8_5_ff; -extern cpuop_func op_b0d0_5_nf; -extern cpuop_func op_b0d0_5_ff; -extern cpuop_func op_b0d8_5_nf; -extern cpuop_func op_b0d8_5_ff; -extern cpuop_func op_b0e0_5_nf; -extern cpuop_func op_b0e0_5_ff; -extern cpuop_func op_b0e8_5_nf; -extern cpuop_func op_b0e8_5_ff; -extern cpuop_func op_b0f0_5_nf; -extern cpuop_func op_b0f0_5_ff; -extern cpuop_func op_b0f8_5_nf; -extern cpuop_func op_b0f8_5_ff; -extern cpuop_func op_b0f9_5_nf; -extern cpuop_func op_b0f9_5_ff; -extern cpuop_func op_b0fa_5_nf; -extern cpuop_func op_b0fa_5_ff; -extern cpuop_func op_b0fb_5_nf; -extern cpuop_func op_b0fb_5_ff; -extern cpuop_func op_b0fc_5_nf; -extern cpuop_func op_b0fc_5_ff; -extern cpuop_func op_b100_5_nf; -extern cpuop_func op_b100_5_ff; -extern cpuop_func op_b108_5_nf; -extern cpuop_func op_b108_5_ff; -extern cpuop_func op_b110_5_nf; -extern cpuop_func op_b110_5_ff; -extern cpuop_func op_b118_5_nf; -extern cpuop_func op_b118_5_ff; -extern cpuop_func op_b120_5_nf; -extern cpuop_func op_b120_5_ff; -extern cpuop_func op_b128_5_nf; -extern cpuop_func op_b128_5_ff; -extern cpuop_func op_b130_5_nf; -extern cpuop_func op_b130_5_ff; -extern cpuop_func op_b138_5_nf; -extern cpuop_func op_b138_5_ff; -extern cpuop_func op_b139_5_nf; -extern cpuop_func op_b139_5_ff; -extern cpuop_func op_b140_5_nf; -extern cpuop_func op_b140_5_ff; -extern cpuop_func op_b148_5_nf; -extern cpuop_func op_b148_5_ff; -extern cpuop_func op_b150_5_nf; -extern cpuop_func op_b150_5_ff; -extern cpuop_func op_b158_5_nf; -extern cpuop_func op_b158_5_ff; -extern cpuop_func op_b160_5_nf; -extern cpuop_func op_b160_5_ff; -extern cpuop_func op_b168_5_nf; -extern cpuop_func op_b168_5_ff; -extern cpuop_func op_b170_5_nf; -extern cpuop_func op_b170_5_ff; -extern cpuop_func op_b178_5_nf; -extern cpuop_func op_b178_5_ff; -extern cpuop_func op_b179_5_nf; -extern cpuop_func op_b179_5_ff; -extern cpuop_func op_b180_5_nf; -extern cpuop_func op_b180_5_ff; -extern cpuop_func op_b188_5_nf; -extern cpuop_func op_b188_5_ff; -extern cpuop_func op_b190_5_nf; -extern cpuop_func op_b190_5_ff; -extern cpuop_func op_b198_5_nf; -extern cpuop_func op_b198_5_ff; -extern cpuop_func op_b1a0_5_nf; -extern cpuop_func op_b1a0_5_ff; -extern cpuop_func op_b1a8_5_nf; -extern cpuop_func op_b1a8_5_ff; -extern cpuop_func op_b1b0_5_nf; -extern cpuop_func op_b1b0_5_ff; -extern cpuop_func op_b1b8_5_nf; -extern cpuop_func op_b1b8_5_ff; -extern cpuop_func op_b1b9_5_nf; -extern cpuop_func op_b1b9_5_ff; -extern cpuop_func op_b1c0_5_nf; -extern cpuop_func op_b1c0_5_ff; -extern cpuop_func op_b1c8_5_nf; -extern cpuop_func op_b1c8_5_ff; -extern cpuop_func op_b1d0_5_nf; -extern cpuop_func op_b1d0_5_ff; -extern cpuop_func op_b1d8_5_nf; -extern cpuop_func op_b1d8_5_ff; -extern cpuop_func op_b1e0_5_nf; -extern cpuop_func op_b1e0_5_ff; -extern cpuop_func op_b1e8_5_nf; -extern cpuop_func op_b1e8_5_ff; -extern cpuop_func op_b1f0_5_nf; -extern cpuop_func op_b1f0_5_ff; -extern cpuop_func op_b1f8_5_nf; -extern cpuop_func op_b1f8_5_ff; -extern cpuop_func op_b1f9_5_nf; -extern cpuop_func op_b1f9_5_ff; -extern cpuop_func op_b1fa_5_nf; -extern cpuop_func op_b1fa_5_ff; -extern cpuop_func op_b1fb_5_nf; -extern cpuop_func op_b1fb_5_ff; -extern cpuop_func op_b1fc_5_nf; -extern cpuop_func op_b1fc_5_ff; -extern cpuop_func op_c000_5_nf; -extern cpuop_func op_c000_5_ff; -extern cpuop_func op_c010_5_nf; -extern cpuop_func op_c010_5_ff; -extern cpuop_func op_c018_5_nf; -extern cpuop_func op_c018_5_ff; -extern cpuop_func op_c020_5_nf; -extern cpuop_func op_c020_5_ff; -extern cpuop_func op_c028_5_nf; -extern cpuop_func op_c028_5_ff; -extern cpuop_func op_c030_5_nf; -extern cpuop_func op_c030_5_ff; -extern cpuop_func op_c038_5_nf; -extern cpuop_func op_c038_5_ff; -extern cpuop_func op_c039_5_nf; -extern cpuop_func op_c039_5_ff; -extern cpuop_func op_c03a_5_nf; -extern cpuop_func op_c03a_5_ff; -extern cpuop_func op_c03b_5_nf; -extern cpuop_func op_c03b_5_ff; -extern cpuop_func op_c03c_5_nf; -extern cpuop_func op_c03c_5_ff; -extern cpuop_func op_c040_5_nf; -extern cpuop_func op_c040_5_ff; -extern cpuop_func op_c050_5_nf; -extern cpuop_func op_c050_5_ff; -extern cpuop_func op_c058_5_nf; -extern cpuop_func op_c058_5_ff; -extern cpuop_func op_c060_5_nf; -extern cpuop_func op_c060_5_ff; -extern cpuop_func op_c068_5_nf; -extern cpuop_func op_c068_5_ff; -extern cpuop_func op_c070_5_nf; -extern cpuop_func op_c070_5_ff; -extern cpuop_func op_c078_5_nf; -extern cpuop_func op_c078_5_ff; -extern cpuop_func op_c079_5_nf; -extern cpuop_func op_c079_5_ff; -extern cpuop_func op_c07a_5_nf; -extern cpuop_func op_c07a_5_ff; -extern cpuop_func op_c07b_5_nf; -extern cpuop_func op_c07b_5_ff; -extern cpuop_func op_c07c_5_nf; -extern cpuop_func op_c07c_5_ff; -extern cpuop_func op_c080_5_nf; -extern cpuop_func op_c080_5_ff; -extern cpuop_func op_c090_5_nf; -extern cpuop_func op_c090_5_ff; -extern cpuop_func op_c098_5_nf; -extern cpuop_func op_c098_5_ff; -extern cpuop_func op_c0a0_5_nf; -extern cpuop_func op_c0a0_5_ff; -extern cpuop_func op_c0a8_5_nf; -extern cpuop_func op_c0a8_5_ff; -extern cpuop_func op_c0b0_5_nf; -extern cpuop_func op_c0b0_5_ff; -extern cpuop_func op_c0b8_5_nf; -extern cpuop_func op_c0b8_5_ff; -extern cpuop_func op_c0b9_5_nf; -extern cpuop_func op_c0b9_5_ff; -extern cpuop_func op_c0ba_5_nf; -extern cpuop_func op_c0ba_5_ff; -extern cpuop_func op_c0bb_5_nf; -extern cpuop_func op_c0bb_5_ff; -extern cpuop_func op_c0bc_5_nf; -extern cpuop_func op_c0bc_5_ff; -extern cpuop_func op_c0c0_5_nf; -extern cpuop_func op_c0c0_5_ff; -extern cpuop_func op_c0d0_5_nf; -extern cpuop_func op_c0d0_5_ff; -extern cpuop_func op_c0d8_5_nf; -extern cpuop_func op_c0d8_5_ff; -extern cpuop_func op_c0e0_5_nf; -extern cpuop_func op_c0e0_5_ff; -extern cpuop_func op_c0e8_5_nf; -extern cpuop_func op_c0e8_5_ff; -extern cpuop_func op_c0f0_5_nf; -extern cpuop_func op_c0f0_5_ff; -extern cpuop_func op_c0f8_5_nf; -extern cpuop_func op_c0f8_5_ff; -extern cpuop_func op_c0f9_5_nf; -extern cpuop_func op_c0f9_5_ff; -extern cpuop_func op_c0fa_5_nf; -extern cpuop_func op_c0fa_5_ff; -extern cpuop_func op_c0fb_5_nf; -extern cpuop_func op_c0fb_5_ff; -extern cpuop_func op_c0fc_5_nf; -extern cpuop_func op_c0fc_5_ff; -extern cpuop_func op_c100_5_nf; -extern cpuop_func op_c100_5_ff; -extern cpuop_func op_c108_5_nf; -extern cpuop_func op_c108_5_ff; -extern cpuop_func op_c110_5_nf; -extern cpuop_func op_c110_5_ff; -extern cpuop_func op_c118_5_nf; -extern cpuop_func op_c118_5_ff; -extern cpuop_func op_c120_5_nf; -extern cpuop_func op_c120_5_ff; -extern cpuop_func op_c128_5_nf; -extern cpuop_func op_c128_5_ff; -extern cpuop_func op_c130_5_nf; -extern cpuop_func op_c130_5_ff; -extern cpuop_func op_c138_5_nf; -extern cpuop_func op_c138_5_ff; -extern cpuop_func op_c139_5_nf; -extern cpuop_func op_c139_5_ff; -extern cpuop_func op_c140_5_nf; -extern cpuop_func op_c140_5_ff; -extern cpuop_func op_c148_5_nf; -extern cpuop_func op_c148_5_ff; -extern cpuop_func op_c150_5_nf; -extern cpuop_func op_c150_5_ff; -extern cpuop_func op_c158_5_nf; -extern cpuop_func op_c158_5_ff; -extern cpuop_func op_c160_5_nf; -extern cpuop_func op_c160_5_ff; -extern cpuop_func op_c168_5_nf; -extern cpuop_func op_c168_5_ff; -extern cpuop_func op_c170_5_nf; -extern cpuop_func op_c170_5_ff; -extern cpuop_func op_c178_5_nf; -extern cpuop_func op_c178_5_ff; -extern cpuop_func op_c179_5_nf; -extern cpuop_func op_c179_5_ff; -extern cpuop_func op_c188_5_nf; -extern cpuop_func op_c188_5_ff; -extern cpuop_func op_c190_5_nf; -extern cpuop_func op_c190_5_ff; -extern cpuop_func op_c198_5_nf; -extern cpuop_func op_c198_5_ff; -extern cpuop_func op_c1a0_5_nf; -extern cpuop_func op_c1a0_5_ff; -extern cpuop_func op_c1a8_5_nf; -extern cpuop_func op_c1a8_5_ff; -extern cpuop_func op_c1b0_5_nf; -extern cpuop_func op_c1b0_5_ff; -extern cpuop_func op_c1b8_5_nf; -extern cpuop_func op_c1b8_5_ff; -extern cpuop_func op_c1b9_5_nf; -extern cpuop_func op_c1b9_5_ff; -extern cpuop_func op_c1c0_5_nf; -extern cpuop_func op_c1c0_5_ff; -extern cpuop_func op_c1d0_5_nf; -extern cpuop_func op_c1d0_5_ff; -extern cpuop_func op_c1d8_5_nf; -extern cpuop_func op_c1d8_5_ff; -extern cpuop_func op_c1e0_5_nf; -extern cpuop_func op_c1e0_5_ff; -extern cpuop_func op_c1e8_5_nf; -extern cpuop_func op_c1e8_5_ff; -extern cpuop_func op_c1f0_5_nf; -extern cpuop_func op_c1f0_5_ff; -extern cpuop_func op_c1f8_5_nf; -extern cpuop_func op_c1f8_5_ff; -extern cpuop_func op_c1f9_5_nf; -extern cpuop_func op_c1f9_5_ff; -extern cpuop_func op_c1fa_5_nf; -extern cpuop_func op_c1fa_5_ff; -extern cpuop_func op_c1fb_5_nf; -extern cpuop_func op_c1fb_5_ff; -extern cpuop_func op_c1fc_5_nf; -extern cpuop_func op_c1fc_5_ff; -extern cpuop_func op_d000_5_nf; -extern cpuop_func op_d000_5_ff; -extern cpuop_func op_d010_5_nf; -extern cpuop_func op_d010_5_ff; -extern cpuop_func op_d018_5_nf; -extern cpuop_func op_d018_5_ff; -extern cpuop_func op_d020_5_nf; -extern cpuop_func op_d020_5_ff; -extern cpuop_func op_d028_5_nf; -extern cpuop_func op_d028_5_ff; -extern cpuop_func op_d030_5_nf; -extern cpuop_func op_d030_5_ff; -extern cpuop_func op_d038_5_nf; -extern cpuop_func op_d038_5_ff; -extern cpuop_func op_d039_5_nf; -extern cpuop_func op_d039_5_ff; -extern cpuop_func op_d03a_5_nf; -extern cpuop_func op_d03a_5_ff; -extern cpuop_func op_d03b_5_nf; -extern cpuop_func op_d03b_5_ff; -extern cpuop_func op_d03c_5_nf; -extern cpuop_func op_d03c_5_ff; -extern cpuop_func op_d040_5_nf; -extern cpuop_func op_d040_5_ff; -extern cpuop_func op_d048_5_nf; -extern cpuop_func op_d048_5_ff; -extern cpuop_func op_d050_5_nf; -extern cpuop_func op_d050_5_ff; -extern cpuop_func op_d058_5_nf; -extern cpuop_func op_d058_5_ff; -extern cpuop_func op_d060_5_nf; -extern cpuop_func op_d060_5_ff; -extern cpuop_func op_d068_5_nf; -extern cpuop_func op_d068_5_ff; -extern cpuop_func op_d070_5_nf; -extern cpuop_func op_d070_5_ff; -extern cpuop_func op_d078_5_nf; -extern cpuop_func op_d078_5_ff; -extern cpuop_func op_d079_5_nf; -extern cpuop_func op_d079_5_ff; -extern cpuop_func op_d07a_5_nf; -extern cpuop_func op_d07a_5_ff; -extern cpuop_func op_d07b_5_nf; -extern cpuop_func op_d07b_5_ff; -extern cpuop_func op_d07c_5_nf; -extern cpuop_func op_d07c_5_ff; -extern cpuop_func op_d080_5_nf; -extern cpuop_func op_d080_5_ff; -extern cpuop_func op_d088_5_nf; -extern cpuop_func op_d088_5_ff; -extern cpuop_func op_d090_5_nf; -extern cpuop_func op_d090_5_ff; -extern cpuop_func op_d098_5_nf; -extern cpuop_func op_d098_5_ff; -extern cpuop_func op_d0a0_5_nf; -extern cpuop_func op_d0a0_5_ff; -extern cpuop_func op_d0a8_5_nf; -extern cpuop_func op_d0a8_5_ff; -extern cpuop_func op_d0b0_5_nf; -extern cpuop_func op_d0b0_5_ff; -extern cpuop_func op_d0b8_5_nf; -extern cpuop_func op_d0b8_5_ff; -extern cpuop_func op_d0b9_5_nf; -extern cpuop_func op_d0b9_5_ff; -extern cpuop_func op_d0ba_5_nf; -extern cpuop_func op_d0ba_5_ff; -extern cpuop_func op_d0bb_5_nf; -extern cpuop_func op_d0bb_5_ff; -extern cpuop_func op_d0bc_5_nf; -extern cpuop_func op_d0bc_5_ff; -extern cpuop_func op_d0c0_5_nf; -extern cpuop_func op_d0c0_5_ff; -extern cpuop_func op_d0c8_5_nf; -extern cpuop_func op_d0c8_5_ff; -extern cpuop_func op_d0d0_5_nf; -extern cpuop_func op_d0d0_5_ff; -extern cpuop_func op_d0d8_5_nf; -extern cpuop_func op_d0d8_5_ff; -extern cpuop_func op_d0e0_5_nf; -extern cpuop_func op_d0e0_5_ff; -extern cpuop_func op_d0e8_5_nf; -extern cpuop_func op_d0e8_5_ff; -extern cpuop_func op_d0f0_5_nf; -extern cpuop_func op_d0f0_5_ff; -extern cpuop_func op_d0f8_5_nf; -extern cpuop_func op_d0f8_5_ff; -extern cpuop_func op_d0f9_5_nf; -extern cpuop_func op_d0f9_5_ff; -extern cpuop_func op_d0fa_5_nf; -extern cpuop_func op_d0fa_5_ff; -extern cpuop_func op_d0fb_5_nf; -extern cpuop_func op_d0fb_5_ff; -extern cpuop_func op_d0fc_5_nf; -extern cpuop_func op_d0fc_5_ff; -extern cpuop_func op_d100_5_nf; -extern cpuop_func op_d100_5_ff; -extern cpuop_func op_d108_5_nf; -extern cpuop_func op_d108_5_ff; -extern cpuop_func op_d110_5_nf; -extern cpuop_func op_d110_5_ff; -extern cpuop_func op_d118_5_nf; -extern cpuop_func op_d118_5_ff; -extern cpuop_func op_d120_5_nf; -extern cpuop_func op_d120_5_ff; -extern cpuop_func op_d128_5_nf; -extern cpuop_func op_d128_5_ff; -extern cpuop_func op_d130_5_nf; -extern cpuop_func op_d130_5_ff; -extern cpuop_func op_d138_5_nf; -extern cpuop_func op_d138_5_ff; -extern cpuop_func op_d139_5_nf; -extern cpuop_func op_d139_5_ff; -extern cpuop_func op_d140_5_nf; -extern cpuop_func op_d140_5_ff; -extern cpuop_func op_d148_5_nf; -extern cpuop_func op_d148_5_ff; -extern cpuop_func op_d150_5_nf; -extern cpuop_func op_d150_5_ff; -extern cpuop_func op_d158_5_nf; -extern cpuop_func op_d158_5_ff; -extern cpuop_func op_d160_5_nf; -extern cpuop_func op_d160_5_ff; -extern cpuop_func op_d168_5_nf; -extern cpuop_func op_d168_5_ff; -extern cpuop_func op_d170_5_nf; -extern cpuop_func op_d170_5_ff; -extern cpuop_func op_d178_5_nf; -extern cpuop_func op_d178_5_ff; -extern cpuop_func op_d179_5_nf; -extern cpuop_func op_d179_5_ff; -extern cpuop_func op_d180_5_nf; -extern cpuop_func op_d180_5_ff; -extern cpuop_func op_d188_5_nf; -extern cpuop_func op_d188_5_ff; -extern cpuop_func op_d190_5_nf; -extern cpuop_func op_d190_5_ff; -extern cpuop_func op_d198_5_nf; -extern cpuop_func op_d198_5_ff; -extern cpuop_func op_d1a0_5_nf; -extern cpuop_func op_d1a0_5_ff; -extern cpuop_func op_d1a8_5_nf; -extern cpuop_func op_d1a8_5_ff; -extern cpuop_func op_d1b0_5_nf; -extern cpuop_func op_d1b0_5_ff; -extern cpuop_func op_d1b8_5_nf; -extern cpuop_func op_d1b8_5_ff; -extern cpuop_func op_d1b9_5_nf; -extern cpuop_func op_d1b9_5_ff; -extern cpuop_func op_d1c0_5_nf; -extern cpuop_func op_d1c0_5_ff; -extern cpuop_func op_d1c8_5_nf; -extern cpuop_func op_d1c8_5_ff; -extern cpuop_func op_d1d0_5_nf; -extern cpuop_func op_d1d0_5_ff; -extern cpuop_func op_d1d8_5_nf; -extern cpuop_func op_d1d8_5_ff; -extern cpuop_func op_d1e0_5_nf; -extern cpuop_func op_d1e0_5_ff; -extern cpuop_func op_d1e8_5_nf; -extern cpuop_func op_d1e8_5_ff; -extern cpuop_func op_d1f0_5_nf; -extern cpuop_func op_d1f0_5_ff; -extern cpuop_func op_d1f8_5_nf; -extern cpuop_func op_d1f8_5_ff; -extern cpuop_func op_d1f9_5_nf; -extern cpuop_func op_d1f9_5_ff; -extern cpuop_func op_d1fa_5_nf; -extern cpuop_func op_d1fa_5_ff; -extern cpuop_func op_d1fb_5_nf; -extern cpuop_func op_d1fb_5_ff; -extern cpuop_func op_d1fc_5_nf; -extern cpuop_func op_d1fc_5_ff; -extern cpuop_func op_e000_5_nf; -extern cpuop_func op_e000_5_ff; -extern cpuop_func op_e008_5_nf; -extern cpuop_func op_e008_5_ff; -extern cpuop_func op_e010_5_nf; -extern cpuop_func op_e010_5_ff; -extern cpuop_func op_e018_5_nf; -extern cpuop_func op_e018_5_ff; -extern cpuop_func op_e020_5_nf; -extern cpuop_func op_e020_5_ff; -extern cpuop_func op_e028_5_nf; -extern cpuop_func op_e028_5_ff; -extern cpuop_func op_e030_5_nf; -extern cpuop_func op_e030_5_ff; -extern cpuop_func op_e038_5_nf; -extern cpuop_func op_e038_5_ff; -extern cpuop_func op_e040_5_nf; -extern cpuop_func op_e040_5_ff; -extern cpuop_func op_e048_5_nf; -extern cpuop_func op_e048_5_ff; -extern cpuop_func op_e050_5_nf; -extern cpuop_func op_e050_5_ff; -extern cpuop_func op_e058_5_nf; -extern cpuop_func op_e058_5_ff; -extern cpuop_func op_e060_5_nf; -extern cpuop_func op_e060_5_ff; -extern cpuop_func op_e068_5_nf; -extern cpuop_func op_e068_5_ff; -extern cpuop_func op_e070_5_nf; -extern cpuop_func op_e070_5_ff; -extern cpuop_func op_e078_5_nf; -extern cpuop_func op_e078_5_ff; -extern cpuop_func op_e080_5_nf; -extern cpuop_func op_e080_5_ff; -extern cpuop_func op_e088_5_nf; -extern cpuop_func op_e088_5_ff; -extern cpuop_func op_e090_5_nf; -extern cpuop_func op_e090_5_ff; -extern cpuop_func op_e098_5_nf; -extern cpuop_func op_e098_5_ff; -extern cpuop_func op_e0a0_5_nf; -extern cpuop_func op_e0a0_5_ff; -extern cpuop_func op_e0a8_5_nf; -extern cpuop_func op_e0a8_5_ff; -extern cpuop_func op_e0b0_5_nf; -extern cpuop_func op_e0b0_5_ff; -extern cpuop_func op_e0b8_5_nf; -extern cpuop_func op_e0b8_5_ff; -extern cpuop_func op_e0d0_5_nf; -extern cpuop_func op_e0d0_5_ff; -extern cpuop_func op_e0d8_5_nf; -extern cpuop_func op_e0d8_5_ff; -extern cpuop_func op_e0e0_5_nf; -extern cpuop_func op_e0e0_5_ff; -extern cpuop_func op_e0e8_5_nf; -extern cpuop_func op_e0e8_5_ff; -extern cpuop_func op_e0f0_5_nf; -extern cpuop_func op_e0f0_5_ff; -extern cpuop_func op_e0f8_5_nf; -extern cpuop_func op_e0f8_5_ff; -extern cpuop_func op_e0f9_5_nf; -extern cpuop_func op_e0f9_5_ff; -extern cpuop_func op_e100_5_nf; -extern cpuop_func op_e100_5_ff; -extern cpuop_func op_e108_5_nf; -extern cpuop_func op_e108_5_ff; -extern cpuop_func op_e110_5_nf; -extern cpuop_func op_e110_5_ff; -extern cpuop_func op_e118_5_nf; -extern cpuop_func op_e118_5_ff; -extern cpuop_func op_e120_5_nf; -extern cpuop_func op_e120_5_ff; -extern cpuop_func op_e128_5_nf; -extern cpuop_func op_e128_5_ff; -extern cpuop_func op_e130_5_nf; -extern cpuop_func op_e130_5_ff; -extern cpuop_func op_e138_5_nf; -extern cpuop_func op_e138_5_ff; -extern cpuop_func op_e140_5_nf; -extern cpuop_func op_e140_5_ff; -extern cpuop_func op_e148_5_nf; -extern cpuop_func op_e148_5_ff; -extern cpuop_func op_e150_5_nf; -extern cpuop_func op_e150_5_ff; -extern cpuop_func op_e158_5_nf; -extern cpuop_func op_e158_5_ff; -extern cpuop_func op_e160_5_nf; -extern cpuop_func op_e160_5_ff; -extern cpuop_func op_e168_5_nf; -extern cpuop_func op_e168_5_ff; -extern cpuop_func op_e170_5_nf; -extern cpuop_func op_e170_5_ff; -extern cpuop_func op_e178_5_nf; -extern cpuop_func op_e178_5_ff; -extern cpuop_func op_e180_5_nf; -extern cpuop_func op_e180_5_ff; -extern cpuop_func op_e188_5_nf; -extern cpuop_func op_e188_5_ff; -extern cpuop_func op_e190_5_nf; -extern cpuop_func op_e190_5_ff; -extern cpuop_func op_e198_5_nf; -extern cpuop_func op_e198_5_ff; -extern cpuop_func op_e1a0_5_nf; -extern cpuop_func op_e1a0_5_ff; -extern cpuop_func op_e1a8_5_nf; -extern cpuop_func op_e1a8_5_ff; -extern cpuop_func op_e1b0_5_nf; -extern cpuop_func op_e1b0_5_ff; -extern cpuop_func op_e1b8_5_nf; -extern cpuop_func op_e1b8_5_ff; -extern cpuop_func op_e1d0_5_nf; -extern cpuop_func op_e1d0_5_ff; -extern cpuop_func op_e1d8_5_nf; -extern cpuop_func op_e1d8_5_ff; -extern cpuop_func op_e1e0_5_nf; -extern cpuop_func op_e1e0_5_ff; -extern cpuop_func op_e1e8_5_nf; -extern cpuop_func op_e1e8_5_ff; -extern cpuop_func op_e1f0_5_nf; -extern cpuop_func op_e1f0_5_ff; -extern cpuop_func op_e1f8_5_nf; -extern cpuop_func op_e1f8_5_ff; -extern cpuop_func op_e1f9_5_nf; -extern cpuop_func op_e1f9_5_ff; -extern cpuop_func op_e2d0_5_nf; -extern cpuop_func op_e2d0_5_ff; -extern cpuop_func op_e2d8_5_nf; -extern cpuop_func op_e2d8_5_ff; -extern cpuop_func op_e2e0_5_nf; -extern cpuop_func op_e2e0_5_ff; -extern cpuop_func op_e2e8_5_nf; -extern cpuop_func op_e2e8_5_ff; -extern cpuop_func op_e2f0_5_nf; -extern cpuop_func op_e2f0_5_ff; -extern cpuop_func op_e2f8_5_nf; -extern cpuop_func op_e2f8_5_ff; -extern cpuop_func op_e2f9_5_nf; -extern cpuop_func op_e2f9_5_ff; -extern cpuop_func op_e3d0_5_nf; -extern cpuop_func op_e3d0_5_ff; -extern cpuop_func op_e3d8_5_nf; -extern cpuop_func op_e3d8_5_ff; -extern cpuop_func op_e3e0_5_nf; -extern cpuop_func op_e3e0_5_ff; -extern cpuop_func op_e3e8_5_nf; -extern cpuop_func op_e3e8_5_ff; -extern cpuop_func op_e3f0_5_nf; -extern cpuop_func op_e3f0_5_ff; -extern cpuop_func op_e3f8_5_nf; -extern cpuop_func op_e3f8_5_ff; -extern cpuop_func op_e3f9_5_nf; -extern cpuop_func op_e3f9_5_ff; -extern cpuop_func op_e4d0_5_nf; -extern cpuop_func op_e4d0_5_ff; -extern cpuop_func op_e4d8_5_nf; -extern cpuop_func op_e4d8_5_ff; -extern cpuop_func op_e4e0_5_nf; -extern cpuop_func op_e4e0_5_ff; -extern cpuop_func op_e4e8_5_nf; -extern cpuop_func op_e4e8_5_ff; -extern cpuop_func op_e4f0_5_nf; -extern cpuop_func op_e4f0_5_ff; -extern cpuop_func op_e4f8_5_nf; -extern cpuop_func op_e4f8_5_ff; -extern cpuop_func op_e4f9_5_nf; -extern cpuop_func op_e4f9_5_ff; -extern cpuop_func op_e5d0_5_nf; -extern cpuop_func op_e5d0_5_ff; -extern cpuop_func op_e5d8_5_nf; -extern cpuop_func op_e5d8_5_ff; -extern cpuop_func op_e5e0_5_nf; -extern cpuop_func op_e5e0_5_ff; -extern cpuop_func op_e5e8_5_nf; -extern cpuop_func op_e5e8_5_ff; -extern cpuop_func op_e5f0_5_nf; -extern cpuop_func op_e5f0_5_ff; -extern cpuop_func op_e5f8_5_nf; -extern cpuop_func op_e5f8_5_ff; -extern cpuop_func op_e5f9_5_nf; -extern cpuop_func op_e5f9_5_ff; -extern cpuop_func op_e6d0_5_nf; -extern cpuop_func op_e6d0_5_ff; -extern cpuop_func op_e6d8_5_nf; -extern cpuop_func op_e6d8_5_ff; -extern cpuop_func op_e6e0_5_nf; -extern cpuop_func op_e6e0_5_ff; -extern cpuop_func op_e6e8_5_nf; -extern cpuop_func op_e6e8_5_ff; -extern cpuop_func op_e6f0_5_nf; -extern cpuop_func op_e6f0_5_ff; -extern cpuop_func op_e6f8_5_nf; -extern cpuop_func op_e6f8_5_ff; -extern cpuop_func op_e6f9_5_nf; -extern cpuop_func op_e6f9_5_ff; -extern cpuop_func op_e7d0_5_nf; -extern cpuop_func op_e7d0_5_ff; -extern cpuop_func op_e7d8_5_nf; -extern cpuop_func op_e7d8_5_ff; -extern cpuop_func op_e7e0_5_nf; -extern cpuop_func op_e7e0_5_ff; -extern cpuop_func op_e7e8_5_nf; -extern cpuop_func op_e7e8_5_ff; -extern cpuop_func op_e7f0_5_nf; -extern cpuop_func op_e7f0_5_ff; -extern cpuop_func op_e7f8_5_nf; -extern cpuop_func op_e7f8_5_ff; -extern cpuop_func op_e7f9_5_nf; -extern cpuop_func op_e7f9_5_ff; +extern cpuop_func op_0000_11_nf; +extern cpuop_func op_0000_11_ff; +extern cpuop_func op_0010_11_nf; +extern cpuop_func op_0010_11_ff; +extern cpuop_func op_0018_11_nf; +extern cpuop_func op_0018_11_ff; +extern cpuop_func op_0020_11_nf; +extern cpuop_func op_0020_11_ff; +extern cpuop_func op_0028_11_nf; +extern cpuop_func op_0028_11_ff; +extern cpuop_func op_0030_11_nf; +extern cpuop_func op_0030_11_ff; +extern cpuop_func op_0038_11_nf; +extern cpuop_func op_0038_11_ff; +extern cpuop_func op_0039_11_nf; +extern cpuop_func op_0039_11_ff; +extern cpuop_func op_003c_11_nf; +extern cpuop_func op_003c_11_ff; +extern cpuop_func op_0040_11_nf; +extern cpuop_func op_0040_11_ff; +extern cpuop_func op_0050_11_nf; +extern cpuop_func op_0050_11_ff; +extern cpuop_func op_0058_11_nf; +extern cpuop_func op_0058_11_ff; +extern cpuop_func op_0060_11_nf; +extern cpuop_func op_0060_11_ff; +extern cpuop_func op_0068_11_nf; +extern cpuop_func op_0068_11_ff; +extern cpuop_func op_0070_11_nf; +extern cpuop_func op_0070_11_ff; +extern cpuop_func op_0078_11_nf; +extern cpuop_func op_0078_11_ff; +extern cpuop_func op_0079_11_nf; +extern cpuop_func op_0079_11_ff; +extern cpuop_func op_007c_11_nf; +extern cpuop_func op_007c_11_ff; +extern cpuop_func op_0080_11_nf; +extern cpuop_func op_0080_11_ff; +extern cpuop_func op_0090_11_nf; +extern cpuop_func op_0090_11_ff; +extern cpuop_func op_0098_11_nf; +extern cpuop_func op_0098_11_ff; +extern cpuop_func op_00a0_11_nf; +extern cpuop_func op_00a0_11_ff; +extern cpuop_func op_00a8_11_nf; +extern cpuop_func op_00a8_11_ff; +extern cpuop_func op_00b0_11_nf; +extern cpuop_func op_00b0_11_ff; +extern cpuop_func op_00b8_11_nf; +extern cpuop_func op_00b8_11_ff; +extern cpuop_func op_00b9_11_nf; +extern cpuop_func op_00b9_11_ff; +extern cpuop_func op_0100_11_nf; +extern cpuop_func op_0100_11_ff; +extern cpuop_func op_0108_11_nf; +extern cpuop_func op_0108_11_ff; +extern cpuop_func op_0110_11_nf; +extern cpuop_func op_0110_11_ff; +extern cpuop_func op_0118_11_nf; +extern cpuop_func op_0118_11_ff; +extern cpuop_func op_0120_11_nf; +extern cpuop_func op_0120_11_ff; +extern cpuop_func op_0128_11_nf; +extern cpuop_func op_0128_11_ff; +extern cpuop_func op_0130_11_nf; +extern cpuop_func op_0130_11_ff; +extern cpuop_func op_0138_11_nf; +extern cpuop_func op_0138_11_ff; +extern cpuop_func op_0139_11_nf; +extern cpuop_func op_0139_11_ff; +extern cpuop_func op_013a_11_nf; +extern cpuop_func op_013a_11_ff; +extern cpuop_func op_013b_11_nf; +extern cpuop_func op_013b_11_ff; +extern cpuop_func op_013c_11_nf; +extern cpuop_func op_013c_11_ff; +extern cpuop_func op_0140_11_nf; +extern cpuop_func op_0140_11_ff; +extern cpuop_func op_0148_11_nf; +extern cpuop_func op_0148_11_ff; +extern cpuop_func op_0150_11_nf; +extern cpuop_func op_0150_11_ff; +extern cpuop_func op_0158_11_nf; +extern cpuop_func op_0158_11_ff; +extern cpuop_func op_0160_11_nf; +extern cpuop_func op_0160_11_ff; +extern cpuop_func op_0168_11_nf; +extern cpuop_func op_0168_11_ff; +extern cpuop_func op_0170_11_nf; +extern cpuop_func op_0170_11_ff; +extern cpuop_func op_0178_11_nf; +extern cpuop_func op_0178_11_ff; +extern cpuop_func op_0179_11_nf; +extern cpuop_func op_0179_11_ff; +extern cpuop_func op_017a_11_nf; +extern cpuop_func op_017a_11_ff; +extern cpuop_func op_017b_11_nf; +extern cpuop_func op_017b_11_ff; +extern cpuop_func op_0180_11_nf; +extern cpuop_func op_0180_11_ff; +extern cpuop_func op_0188_11_nf; +extern cpuop_func op_0188_11_ff; +extern cpuop_func op_0190_11_nf; +extern cpuop_func op_0190_11_ff; +extern cpuop_func op_0198_11_nf; +extern cpuop_func op_0198_11_ff; +extern cpuop_func op_01a0_11_nf; +extern cpuop_func op_01a0_11_ff; +extern cpuop_func op_01a8_11_nf; +extern cpuop_func op_01a8_11_ff; +extern cpuop_func op_01b0_11_nf; +extern cpuop_func op_01b0_11_ff; +extern cpuop_func op_01b8_11_nf; +extern cpuop_func op_01b8_11_ff; +extern cpuop_func op_01b9_11_nf; +extern cpuop_func op_01b9_11_ff; +extern cpuop_func op_01ba_11_nf; +extern cpuop_func op_01ba_11_ff; +extern cpuop_func op_01bb_11_nf; +extern cpuop_func op_01bb_11_ff; +extern cpuop_func op_01c0_11_nf; +extern cpuop_func op_01c0_11_ff; +extern cpuop_func op_01c8_11_nf; +extern cpuop_func op_01c8_11_ff; +extern cpuop_func op_01d0_11_nf; +extern cpuop_func op_01d0_11_ff; +extern cpuop_func op_01d8_11_nf; +extern cpuop_func op_01d8_11_ff; +extern cpuop_func op_01e0_11_nf; +extern cpuop_func op_01e0_11_ff; +extern cpuop_func op_01e8_11_nf; +extern cpuop_func op_01e8_11_ff; +extern cpuop_func op_01f0_11_nf; +extern cpuop_func op_01f0_11_ff; +extern cpuop_func op_01f8_11_nf; +extern cpuop_func op_01f8_11_ff; +extern cpuop_func op_01f9_11_nf; +extern cpuop_func op_01f9_11_ff; +extern cpuop_func op_01fa_11_nf; +extern cpuop_func op_01fa_11_ff; +extern cpuop_func op_01fb_11_nf; +extern cpuop_func op_01fb_11_ff; +extern cpuop_func op_0200_11_nf; +extern cpuop_func op_0200_11_ff; +extern cpuop_func op_0210_11_nf; +extern cpuop_func op_0210_11_ff; +extern cpuop_func op_0218_11_nf; +extern cpuop_func op_0218_11_ff; +extern cpuop_func op_0220_11_nf; +extern cpuop_func op_0220_11_ff; +extern cpuop_func op_0228_11_nf; +extern cpuop_func op_0228_11_ff; +extern cpuop_func op_0230_11_nf; +extern cpuop_func op_0230_11_ff; +extern cpuop_func op_0238_11_nf; +extern cpuop_func op_0238_11_ff; +extern cpuop_func op_0239_11_nf; +extern cpuop_func op_0239_11_ff; +extern cpuop_func op_023c_11_nf; +extern cpuop_func op_023c_11_ff; +extern cpuop_func op_0240_11_nf; +extern cpuop_func op_0240_11_ff; +extern cpuop_func op_0250_11_nf; +extern cpuop_func op_0250_11_ff; +extern cpuop_func op_0258_11_nf; +extern cpuop_func op_0258_11_ff; +extern cpuop_func op_0260_11_nf; +extern cpuop_func op_0260_11_ff; +extern cpuop_func op_0268_11_nf; +extern cpuop_func op_0268_11_ff; +extern cpuop_func op_0270_11_nf; +extern cpuop_func op_0270_11_ff; +extern cpuop_func op_0278_11_nf; +extern cpuop_func op_0278_11_ff; +extern cpuop_func op_0279_11_nf; +extern cpuop_func op_0279_11_ff; +extern cpuop_func op_027c_11_nf; +extern cpuop_func op_027c_11_ff; +extern cpuop_func op_0280_11_nf; +extern cpuop_func op_0280_11_ff; +extern cpuop_func op_0290_11_nf; +extern cpuop_func op_0290_11_ff; +extern cpuop_func op_0298_11_nf; +extern cpuop_func op_0298_11_ff; +extern cpuop_func op_02a0_11_nf; +extern cpuop_func op_02a0_11_ff; +extern cpuop_func op_02a8_11_nf; +extern cpuop_func op_02a8_11_ff; +extern cpuop_func op_02b0_11_nf; +extern cpuop_func op_02b0_11_ff; +extern cpuop_func op_02b8_11_nf; +extern cpuop_func op_02b8_11_ff; +extern cpuop_func op_02b9_11_nf; +extern cpuop_func op_02b9_11_ff; +extern cpuop_func op_0400_11_nf; +extern cpuop_func op_0400_11_ff; +extern cpuop_func op_0410_11_nf; +extern cpuop_func op_0410_11_ff; +extern cpuop_func op_0418_11_nf; +extern cpuop_func op_0418_11_ff; +extern cpuop_func op_0420_11_nf; +extern cpuop_func op_0420_11_ff; +extern cpuop_func op_0428_11_nf; +extern cpuop_func op_0428_11_ff; +extern cpuop_func op_0430_11_nf; +extern cpuop_func op_0430_11_ff; +extern cpuop_func op_0438_11_nf; +extern cpuop_func op_0438_11_ff; +extern cpuop_func op_0439_11_nf; +extern cpuop_func op_0439_11_ff; +extern cpuop_func op_0440_11_nf; +extern cpuop_func op_0440_11_ff; +extern cpuop_func op_0450_11_nf; +extern cpuop_func op_0450_11_ff; +extern cpuop_func op_0458_11_nf; +extern cpuop_func op_0458_11_ff; +extern cpuop_func op_0460_11_nf; +extern cpuop_func op_0460_11_ff; +extern cpuop_func op_0468_11_nf; +extern cpuop_func op_0468_11_ff; +extern cpuop_func op_0470_11_nf; +extern cpuop_func op_0470_11_ff; +extern cpuop_func op_0478_11_nf; +extern cpuop_func op_0478_11_ff; +extern cpuop_func op_0479_11_nf; +extern cpuop_func op_0479_11_ff; +extern cpuop_func op_0480_11_nf; +extern cpuop_func op_0480_11_ff; +extern cpuop_func op_0490_11_nf; +extern cpuop_func op_0490_11_ff; +extern cpuop_func op_0498_11_nf; +extern cpuop_func op_0498_11_ff; +extern cpuop_func op_04a0_11_nf; +extern cpuop_func op_04a0_11_ff; +extern cpuop_func op_04a8_11_nf; +extern cpuop_func op_04a8_11_ff; +extern cpuop_func op_04b0_11_nf; +extern cpuop_func op_04b0_11_ff; +extern cpuop_func op_04b8_11_nf; +extern cpuop_func op_04b8_11_ff; +extern cpuop_func op_04b9_11_nf; +extern cpuop_func op_04b9_11_ff; +extern cpuop_func op_0600_11_nf; +extern cpuop_func op_0600_11_ff; +extern cpuop_func op_0610_11_nf; +extern cpuop_func op_0610_11_ff; +extern cpuop_func op_0618_11_nf; +extern cpuop_func op_0618_11_ff; +extern cpuop_func op_0620_11_nf; +extern cpuop_func op_0620_11_ff; +extern cpuop_func op_0628_11_nf; +extern cpuop_func op_0628_11_ff; +extern cpuop_func op_0630_11_nf; +extern cpuop_func op_0630_11_ff; +extern cpuop_func op_0638_11_nf; +extern cpuop_func op_0638_11_ff; +extern cpuop_func op_0639_11_nf; +extern cpuop_func op_0639_11_ff; +extern cpuop_func op_0640_11_nf; +extern cpuop_func op_0640_11_ff; +extern cpuop_func op_0650_11_nf; +extern cpuop_func op_0650_11_ff; +extern cpuop_func op_0658_11_nf; +extern cpuop_func op_0658_11_ff; +extern cpuop_func op_0660_11_nf; +extern cpuop_func op_0660_11_ff; +extern cpuop_func op_0668_11_nf; +extern cpuop_func op_0668_11_ff; +extern cpuop_func op_0670_11_nf; +extern cpuop_func op_0670_11_ff; +extern cpuop_func op_0678_11_nf; +extern cpuop_func op_0678_11_ff; +extern cpuop_func op_0679_11_nf; +extern cpuop_func op_0679_11_ff; +extern cpuop_func op_0680_11_nf; +extern cpuop_func op_0680_11_ff; +extern cpuop_func op_0690_11_nf; +extern cpuop_func op_0690_11_ff; +extern cpuop_func op_0698_11_nf; +extern cpuop_func op_0698_11_ff; +extern cpuop_func op_06a0_11_nf; +extern cpuop_func op_06a0_11_ff; +extern cpuop_func op_06a8_11_nf; +extern cpuop_func op_06a8_11_ff; +extern cpuop_func op_06b0_11_nf; +extern cpuop_func op_06b0_11_ff; +extern cpuop_func op_06b8_11_nf; +extern cpuop_func op_06b8_11_ff; +extern cpuop_func op_06b9_11_nf; +extern cpuop_func op_06b9_11_ff; +extern cpuop_func op_0800_11_nf; +extern cpuop_func op_0800_11_ff; +extern cpuop_func op_0810_11_nf; +extern cpuop_func op_0810_11_ff; +extern cpuop_func op_0818_11_nf; +extern cpuop_func op_0818_11_ff; +extern cpuop_func op_0820_11_nf; +extern cpuop_func op_0820_11_ff; +extern cpuop_func op_0828_11_nf; +extern cpuop_func op_0828_11_ff; +extern cpuop_func op_0830_11_nf; +extern cpuop_func op_0830_11_ff; +extern cpuop_func op_0838_11_nf; +extern cpuop_func op_0838_11_ff; +extern cpuop_func op_0839_11_nf; +extern cpuop_func op_0839_11_ff; +extern cpuop_func op_083a_11_nf; +extern cpuop_func op_083a_11_ff; +extern cpuop_func op_083b_11_nf; +extern cpuop_func op_083b_11_ff; +extern cpuop_func op_083c_11_nf; +extern cpuop_func op_083c_11_ff; +extern cpuop_func op_0840_11_nf; +extern cpuop_func op_0840_11_ff; +extern cpuop_func op_0850_11_nf; +extern cpuop_func op_0850_11_ff; +extern cpuop_func op_0858_11_nf; +extern cpuop_func op_0858_11_ff; +extern cpuop_func op_0860_11_nf; +extern cpuop_func op_0860_11_ff; +extern cpuop_func op_0868_11_nf; +extern cpuop_func op_0868_11_ff; +extern cpuop_func op_0870_11_nf; +extern cpuop_func op_0870_11_ff; +extern cpuop_func op_0878_11_nf; +extern cpuop_func op_0878_11_ff; +extern cpuop_func op_0879_11_nf; +extern cpuop_func op_0879_11_ff; +extern cpuop_func op_087a_11_nf; +extern cpuop_func op_087a_11_ff; +extern cpuop_func op_087b_11_nf; +extern cpuop_func op_087b_11_ff; +extern cpuop_func op_0880_11_nf; +extern cpuop_func op_0880_11_ff; +extern cpuop_func op_0890_11_nf; +extern cpuop_func op_0890_11_ff; +extern cpuop_func op_0898_11_nf; +extern cpuop_func op_0898_11_ff; +extern cpuop_func op_08a0_11_nf; +extern cpuop_func op_08a0_11_ff; +extern cpuop_func op_08a8_11_nf; +extern cpuop_func op_08a8_11_ff; +extern cpuop_func op_08b0_11_nf; +extern cpuop_func op_08b0_11_ff; +extern cpuop_func op_08b8_11_nf; +extern cpuop_func op_08b8_11_ff; +extern cpuop_func op_08b9_11_nf; +extern cpuop_func op_08b9_11_ff; +extern cpuop_func op_08ba_11_nf; +extern cpuop_func op_08ba_11_ff; +extern cpuop_func op_08bb_11_nf; +extern cpuop_func op_08bb_11_ff; +extern cpuop_func op_08c0_11_nf; +extern cpuop_func op_08c0_11_ff; +extern cpuop_func op_08d0_11_nf; +extern cpuop_func op_08d0_11_ff; +extern cpuop_func op_08d8_11_nf; +extern cpuop_func op_08d8_11_ff; +extern cpuop_func op_08e0_11_nf; +extern cpuop_func op_08e0_11_ff; +extern cpuop_func op_08e8_11_nf; +extern cpuop_func op_08e8_11_ff; +extern cpuop_func op_08f0_11_nf; +extern cpuop_func op_08f0_11_ff; +extern cpuop_func op_08f8_11_nf; +extern cpuop_func op_08f8_11_ff; +extern cpuop_func op_08f9_11_nf; +extern cpuop_func op_08f9_11_ff; +extern cpuop_func op_08fa_11_nf; +extern cpuop_func op_08fa_11_ff; +extern cpuop_func op_08fb_11_nf; +extern cpuop_func op_08fb_11_ff; +extern cpuop_func op_0a00_11_nf; +extern cpuop_func op_0a00_11_ff; +extern cpuop_func op_0a10_11_nf; +extern cpuop_func op_0a10_11_ff; +extern cpuop_func op_0a18_11_nf; +extern cpuop_func op_0a18_11_ff; +extern cpuop_func op_0a20_11_nf; +extern cpuop_func op_0a20_11_ff; +extern cpuop_func op_0a28_11_nf; +extern cpuop_func op_0a28_11_ff; +extern cpuop_func op_0a30_11_nf; +extern cpuop_func op_0a30_11_ff; +extern cpuop_func op_0a38_11_nf; +extern cpuop_func op_0a38_11_ff; +extern cpuop_func op_0a39_11_nf; +extern cpuop_func op_0a39_11_ff; +extern cpuop_func op_0a3c_11_nf; +extern cpuop_func op_0a3c_11_ff; +extern cpuop_func op_0a40_11_nf; +extern cpuop_func op_0a40_11_ff; +extern cpuop_func op_0a50_11_nf; +extern cpuop_func op_0a50_11_ff; +extern cpuop_func op_0a58_11_nf; +extern cpuop_func op_0a58_11_ff; +extern cpuop_func op_0a60_11_nf; +extern cpuop_func op_0a60_11_ff; +extern cpuop_func op_0a68_11_nf; +extern cpuop_func op_0a68_11_ff; +extern cpuop_func op_0a70_11_nf; +extern cpuop_func op_0a70_11_ff; +extern cpuop_func op_0a78_11_nf; +extern cpuop_func op_0a78_11_ff; +extern cpuop_func op_0a79_11_nf; +extern cpuop_func op_0a79_11_ff; +extern cpuop_func op_0a7c_11_nf; +extern cpuop_func op_0a7c_11_ff; +extern cpuop_func op_0a80_11_nf; +extern cpuop_func op_0a80_11_ff; +extern cpuop_func op_0a90_11_nf; +extern cpuop_func op_0a90_11_ff; +extern cpuop_func op_0a98_11_nf; +extern cpuop_func op_0a98_11_ff; +extern cpuop_func op_0aa0_11_nf; +extern cpuop_func op_0aa0_11_ff; +extern cpuop_func op_0aa8_11_nf; +extern cpuop_func op_0aa8_11_ff; +extern cpuop_func op_0ab0_11_nf; +extern cpuop_func op_0ab0_11_ff; +extern cpuop_func op_0ab8_11_nf; +extern cpuop_func op_0ab8_11_ff; +extern cpuop_func op_0ab9_11_nf; +extern cpuop_func op_0ab9_11_ff; +extern cpuop_func op_0c00_11_nf; +extern cpuop_func op_0c00_11_ff; +extern cpuop_func op_0c10_11_nf; +extern cpuop_func op_0c10_11_ff; +extern cpuop_func op_0c18_11_nf; +extern cpuop_func op_0c18_11_ff; +extern cpuop_func op_0c20_11_nf; +extern cpuop_func op_0c20_11_ff; +extern cpuop_func op_0c28_11_nf; +extern cpuop_func op_0c28_11_ff; +extern cpuop_func op_0c30_11_nf; +extern cpuop_func op_0c30_11_ff; +extern cpuop_func op_0c38_11_nf; +extern cpuop_func op_0c38_11_ff; +extern cpuop_func op_0c39_11_nf; +extern cpuop_func op_0c39_11_ff; +extern cpuop_func op_0c40_11_nf; +extern cpuop_func op_0c40_11_ff; +extern cpuop_func op_0c50_11_nf; +extern cpuop_func op_0c50_11_ff; +extern cpuop_func op_0c58_11_nf; +extern cpuop_func op_0c58_11_ff; +extern cpuop_func op_0c60_11_nf; +extern cpuop_func op_0c60_11_ff; +extern cpuop_func op_0c68_11_nf; +extern cpuop_func op_0c68_11_ff; +extern cpuop_func op_0c70_11_nf; +extern cpuop_func op_0c70_11_ff; +extern cpuop_func op_0c78_11_nf; +extern cpuop_func op_0c78_11_ff; +extern cpuop_func op_0c79_11_nf; +extern cpuop_func op_0c79_11_ff; +extern cpuop_func op_0c80_11_nf; +extern cpuop_func op_0c80_11_ff; +extern cpuop_func op_0c90_11_nf; +extern cpuop_func op_0c90_11_ff; +extern cpuop_func op_0c98_11_nf; +extern cpuop_func op_0c98_11_ff; +extern cpuop_func op_0ca0_11_nf; +extern cpuop_func op_0ca0_11_ff; +extern cpuop_func op_0ca8_11_nf; +extern cpuop_func op_0ca8_11_ff; +extern cpuop_func op_0cb0_11_nf; +extern cpuop_func op_0cb0_11_ff; +extern cpuop_func op_0cb8_11_nf; +extern cpuop_func op_0cb8_11_ff; +extern cpuop_func op_0cb9_11_nf; +extern cpuop_func op_0cb9_11_ff; +extern cpuop_func op_1000_11_nf; +extern cpuop_func op_1000_11_ff; +extern cpuop_func op_1010_11_nf; +extern cpuop_func op_1010_11_ff; +extern cpuop_func op_1018_11_nf; +extern cpuop_func op_1018_11_ff; +extern cpuop_func op_1020_11_nf; +extern cpuop_func op_1020_11_ff; +extern cpuop_func op_1028_11_nf; +extern cpuop_func op_1028_11_ff; +extern cpuop_func op_1030_11_nf; +extern cpuop_func op_1030_11_ff; +extern cpuop_func op_1038_11_nf; +extern cpuop_func op_1038_11_ff; +extern cpuop_func op_1039_11_nf; +extern cpuop_func op_1039_11_ff; +extern cpuop_func op_103a_11_nf; +extern cpuop_func op_103a_11_ff; +extern cpuop_func op_103b_11_nf; +extern cpuop_func op_103b_11_ff; +extern cpuop_func op_103c_11_nf; +extern cpuop_func op_103c_11_ff; +extern cpuop_func op_1080_11_nf; +extern cpuop_func op_1080_11_ff; +extern cpuop_func op_1090_11_nf; +extern cpuop_func op_1090_11_ff; +extern cpuop_func op_1098_11_nf; +extern cpuop_func op_1098_11_ff; +extern cpuop_func op_10a0_11_nf; +extern cpuop_func op_10a0_11_ff; +extern cpuop_func op_10a8_11_nf; +extern cpuop_func op_10a8_11_ff; +extern cpuop_func op_10b0_11_nf; +extern cpuop_func op_10b0_11_ff; +extern cpuop_func op_10b8_11_nf; +extern cpuop_func op_10b8_11_ff; +extern cpuop_func op_10b9_11_nf; +extern cpuop_func op_10b9_11_ff; +extern cpuop_func op_10ba_11_nf; +extern cpuop_func op_10ba_11_ff; +extern cpuop_func op_10bb_11_nf; +extern cpuop_func op_10bb_11_ff; +extern cpuop_func op_10bc_11_nf; +extern cpuop_func op_10bc_11_ff; +extern cpuop_func op_10c0_11_nf; +extern cpuop_func op_10c0_11_ff; +extern cpuop_func op_10d0_11_nf; +extern cpuop_func op_10d0_11_ff; +extern cpuop_func op_10d8_11_nf; +extern cpuop_func op_10d8_11_ff; +extern cpuop_func op_10e0_11_nf; +extern cpuop_func op_10e0_11_ff; +extern cpuop_func op_10e8_11_nf; +extern cpuop_func op_10e8_11_ff; +extern cpuop_func op_10f0_11_nf; +extern cpuop_func op_10f0_11_ff; +extern cpuop_func op_10f8_11_nf; +extern cpuop_func op_10f8_11_ff; +extern cpuop_func op_10f9_11_nf; +extern cpuop_func op_10f9_11_ff; +extern cpuop_func op_10fa_11_nf; +extern cpuop_func op_10fa_11_ff; +extern cpuop_func op_10fb_11_nf; +extern cpuop_func op_10fb_11_ff; +extern cpuop_func op_10fc_11_nf; +extern cpuop_func op_10fc_11_ff; +extern cpuop_func op_1100_11_nf; +extern cpuop_func op_1100_11_ff; +extern cpuop_func op_1110_11_nf; +extern cpuop_func op_1110_11_ff; +extern cpuop_func op_1118_11_nf; +extern cpuop_func op_1118_11_ff; +extern cpuop_func op_1120_11_nf; +extern cpuop_func op_1120_11_ff; +extern cpuop_func op_1128_11_nf; +extern cpuop_func op_1128_11_ff; +extern cpuop_func op_1130_11_nf; +extern cpuop_func op_1130_11_ff; +extern cpuop_func op_1138_11_nf; +extern cpuop_func op_1138_11_ff; +extern cpuop_func op_1139_11_nf; +extern cpuop_func op_1139_11_ff; +extern cpuop_func op_113a_11_nf; +extern cpuop_func op_113a_11_ff; +extern cpuop_func op_113b_11_nf; +extern cpuop_func op_113b_11_ff; +extern cpuop_func op_113c_11_nf; +extern cpuop_func op_113c_11_ff; +extern cpuop_func op_1140_11_nf; +extern cpuop_func op_1140_11_ff; +extern cpuop_func op_1150_11_nf; +extern cpuop_func op_1150_11_ff; +extern cpuop_func op_1158_11_nf; +extern cpuop_func op_1158_11_ff; +extern cpuop_func op_1160_11_nf; +extern cpuop_func op_1160_11_ff; +extern cpuop_func op_1168_11_nf; +extern cpuop_func op_1168_11_ff; +extern cpuop_func op_1170_11_nf; +extern cpuop_func op_1170_11_ff; +extern cpuop_func op_1178_11_nf; +extern cpuop_func op_1178_11_ff; +extern cpuop_func op_1179_11_nf; +extern cpuop_func op_1179_11_ff; +extern cpuop_func op_117a_11_nf; +extern cpuop_func op_117a_11_ff; +extern cpuop_func op_117b_11_nf; +extern cpuop_func op_117b_11_ff; +extern cpuop_func op_117c_11_nf; +extern cpuop_func op_117c_11_ff; +extern cpuop_func op_1180_11_nf; +extern cpuop_func op_1180_11_ff; +extern cpuop_func op_1190_11_nf; +extern cpuop_func op_1190_11_ff; +extern cpuop_func op_1198_11_nf; +extern cpuop_func op_1198_11_ff; +extern cpuop_func op_11a0_11_nf; +extern cpuop_func op_11a0_11_ff; +extern cpuop_func op_11a8_11_nf; +extern cpuop_func op_11a8_11_ff; +extern cpuop_func op_11b0_11_nf; +extern cpuop_func op_11b0_11_ff; +extern cpuop_func op_11b8_11_nf; +extern cpuop_func op_11b8_11_ff; +extern cpuop_func op_11b9_11_nf; +extern cpuop_func op_11b9_11_ff; +extern cpuop_func op_11ba_11_nf; +extern cpuop_func op_11ba_11_ff; +extern cpuop_func op_11bb_11_nf; +extern cpuop_func op_11bb_11_ff; +extern cpuop_func op_11bc_11_nf; +extern cpuop_func op_11bc_11_ff; +extern cpuop_func op_11c0_11_nf; +extern cpuop_func op_11c0_11_ff; +extern cpuop_func op_11d0_11_nf; +extern cpuop_func op_11d0_11_ff; +extern cpuop_func op_11d8_11_nf; +extern cpuop_func op_11d8_11_ff; +extern cpuop_func op_11e0_11_nf; +extern cpuop_func op_11e0_11_ff; +extern cpuop_func op_11e8_11_nf; +extern cpuop_func op_11e8_11_ff; +extern cpuop_func op_11f0_11_nf; +extern cpuop_func op_11f0_11_ff; +extern cpuop_func op_11f8_11_nf; +extern cpuop_func op_11f8_11_ff; +extern cpuop_func op_11f9_11_nf; +extern cpuop_func op_11f9_11_ff; +extern cpuop_func op_11fa_11_nf; +extern cpuop_func op_11fa_11_ff; +extern cpuop_func op_11fb_11_nf; +extern cpuop_func op_11fb_11_ff; +extern cpuop_func op_11fc_11_nf; +extern cpuop_func op_11fc_11_ff; +extern cpuop_func op_13c0_11_nf; +extern cpuop_func op_13c0_11_ff; +extern cpuop_func op_13d0_11_nf; +extern cpuop_func op_13d0_11_ff; +extern cpuop_func op_13d8_11_nf; +extern cpuop_func op_13d8_11_ff; +extern cpuop_func op_13e0_11_nf; +extern cpuop_func op_13e0_11_ff; +extern cpuop_func op_13e8_11_nf; +extern cpuop_func op_13e8_11_ff; +extern cpuop_func op_13f0_11_nf; +extern cpuop_func op_13f0_11_ff; +extern cpuop_func op_13f8_11_nf; +extern cpuop_func op_13f8_11_ff; +extern cpuop_func op_13f9_11_nf; +extern cpuop_func op_13f9_11_ff; +extern cpuop_func op_13fa_11_nf; +extern cpuop_func op_13fa_11_ff; +extern cpuop_func op_13fb_11_nf; +extern cpuop_func op_13fb_11_ff; +extern cpuop_func op_13fc_11_nf; +extern cpuop_func op_13fc_11_ff; +extern cpuop_func op_2000_11_nf; +extern cpuop_func op_2000_11_ff; +extern cpuop_func op_2008_11_nf; +extern cpuop_func op_2008_11_ff; +extern cpuop_func op_2010_11_nf; +extern cpuop_func op_2010_11_ff; +extern cpuop_func op_2018_11_nf; +extern cpuop_func op_2018_11_ff; +extern cpuop_func op_2020_11_nf; +extern cpuop_func op_2020_11_ff; +extern cpuop_func op_2028_11_nf; +extern cpuop_func op_2028_11_ff; +extern cpuop_func op_2030_11_nf; +extern cpuop_func op_2030_11_ff; +extern cpuop_func op_2038_11_nf; +extern cpuop_func op_2038_11_ff; +extern cpuop_func op_2039_11_nf; +extern cpuop_func op_2039_11_ff; +extern cpuop_func op_203a_11_nf; +extern cpuop_func op_203a_11_ff; +extern cpuop_func op_203b_11_nf; +extern cpuop_func op_203b_11_ff; +extern cpuop_func op_203c_11_nf; +extern cpuop_func op_203c_11_ff; +extern cpuop_func op_2040_11_nf; +extern cpuop_func op_2040_11_ff; +extern cpuop_func op_2048_11_nf; +extern cpuop_func op_2048_11_ff; +extern cpuop_func op_2050_11_nf; +extern cpuop_func op_2050_11_ff; +extern cpuop_func op_2058_11_nf; +extern cpuop_func op_2058_11_ff; +extern cpuop_func op_2060_11_nf; +extern cpuop_func op_2060_11_ff; +extern cpuop_func op_2068_11_nf; +extern cpuop_func op_2068_11_ff; +extern cpuop_func op_2070_11_nf; +extern cpuop_func op_2070_11_ff; +extern cpuop_func op_2078_11_nf; +extern cpuop_func op_2078_11_ff; +extern cpuop_func op_2079_11_nf; +extern cpuop_func op_2079_11_ff; +extern cpuop_func op_207a_11_nf; +extern cpuop_func op_207a_11_ff; +extern cpuop_func op_207b_11_nf; +extern cpuop_func op_207b_11_ff; +extern cpuop_func op_207c_11_nf; +extern cpuop_func op_207c_11_ff; +extern cpuop_func op_2080_11_nf; +extern cpuop_func op_2080_11_ff; +extern cpuop_func op_2088_11_nf; +extern cpuop_func op_2088_11_ff; +extern cpuop_func op_2090_11_nf; +extern cpuop_func op_2090_11_ff; +extern cpuop_func op_2098_11_nf; +extern cpuop_func op_2098_11_ff; +extern cpuop_func op_20a0_11_nf; +extern cpuop_func op_20a0_11_ff; +extern cpuop_func op_20a8_11_nf; +extern cpuop_func op_20a8_11_ff; +extern cpuop_func op_20b0_11_nf; +extern cpuop_func op_20b0_11_ff; +extern cpuop_func op_20b8_11_nf; +extern cpuop_func op_20b8_11_ff; +extern cpuop_func op_20b9_11_nf; +extern cpuop_func op_20b9_11_ff; +extern cpuop_func op_20ba_11_nf; +extern cpuop_func op_20ba_11_ff; +extern cpuop_func op_20bb_11_nf; +extern cpuop_func op_20bb_11_ff; +extern cpuop_func op_20bc_11_nf; +extern cpuop_func op_20bc_11_ff; +extern cpuop_func op_20c0_11_nf; +extern cpuop_func op_20c0_11_ff; +extern cpuop_func op_20c8_11_nf; +extern cpuop_func op_20c8_11_ff; +extern cpuop_func op_20d0_11_nf; +extern cpuop_func op_20d0_11_ff; +extern cpuop_func op_20d8_11_nf; +extern cpuop_func op_20d8_11_ff; +extern cpuop_func op_20e0_11_nf; +extern cpuop_func op_20e0_11_ff; +extern cpuop_func op_20e8_11_nf; +extern cpuop_func op_20e8_11_ff; +extern cpuop_func op_20f0_11_nf; +extern cpuop_func op_20f0_11_ff; +extern cpuop_func op_20f8_11_nf; +extern cpuop_func op_20f8_11_ff; +extern cpuop_func op_20f9_11_nf; +extern cpuop_func op_20f9_11_ff; +extern cpuop_func op_20fa_11_nf; +extern cpuop_func op_20fa_11_ff; +extern cpuop_func op_20fb_11_nf; +extern cpuop_func op_20fb_11_ff; +extern cpuop_func op_20fc_11_nf; +extern cpuop_func op_20fc_11_ff; +extern cpuop_func op_2100_11_nf; +extern cpuop_func op_2100_11_ff; +extern cpuop_func op_2108_11_nf; +extern cpuop_func op_2108_11_ff; +extern cpuop_func op_2110_11_nf; +extern cpuop_func op_2110_11_ff; +extern cpuop_func op_2118_11_nf; +extern cpuop_func op_2118_11_ff; +extern cpuop_func op_2120_11_nf; +extern cpuop_func op_2120_11_ff; +extern cpuop_func op_2128_11_nf; +extern cpuop_func op_2128_11_ff; +extern cpuop_func op_2130_11_nf; +extern cpuop_func op_2130_11_ff; +extern cpuop_func op_2138_11_nf; +extern cpuop_func op_2138_11_ff; +extern cpuop_func op_2139_11_nf; +extern cpuop_func op_2139_11_ff; +extern cpuop_func op_213a_11_nf; +extern cpuop_func op_213a_11_ff; +extern cpuop_func op_213b_11_nf; +extern cpuop_func op_213b_11_ff; +extern cpuop_func op_213c_11_nf; +extern cpuop_func op_213c_11_ff; +extern cpuop_func op_2140_11_nf; +extern cpuop_func op_2140_11_ff; +extern cpuop_func op_2148_11_nf; +extern cpuop_func op_2148_11_ff; +extern cpuop_func op_2150_11_nf; +extern cpuop_func op_2150_11_ff; +extern cpuop_func op_2158_11_nf; +extern cpuop_func op_2158_11_ff; +extern cpuop_func op_2160_11_nf; +extern cpuop_func op_2160_11_ff; +extern cpuop_func op_2168_11_nf; +extern cpuop_func op_2168_11_ff; +extern cpuop_func op_2170_11_nf; +extern cpuop_func op_2170_11_ff; +extern cpuop_func op_2178_11_nf; +extern cpuop_func op_2178_11_ff; +extern cpuop_func op_2179_11_nf; +extern cpuop_func op_2179_11_ff; +extern cpuop_func op_217a_11_nf; +extern cpuop_func op_217a_11_ff; +extern cpuop_func op_217b_11_nf; +extern cpuop_func op_217b_11_ff; +extern cpuop_func op_217c_11_nf; +extern cpuop_func op_217c_11_ff; +extern cpuop_func op_2180_11_nf; +extern cpuop_func op_2180_11_ff; +extern cpuop_func op_2188_11_nf; +extern cpuop_func op_2188_11_ff; +extern cpuop_func op_2190_11_nf; +extern cpuop_func op_2190_11_ff; +extern cpuop_func op_2198_11_nf; +extern cpuop_func op_2198_11_ff; +extern cpuop_func op_21a0_11_nf; +extern cpuop_func op_21a0_11_ff; +extern cpuop_func op_21a8_11_nf; +extern cpuop_func op_21a8_11_ff; +extern cpuop_func op_21b0_11_nf; +extern cpuop_func op_21b0_11_ff; +extern cpuop_func op_21b8_11_nf; +extern cpuop_func op_21b8_11_ff; +extern cpuop_func op_21b9_11_nf; +extern cpuop_func op_21b9_11_ff; +extern cpuop_func op_21ba_11_nf; +extern cpuop_func op_21ba_11_ff; +extern cpuop_func op_21bb_11_nf; +extern cpuop_func op_21bb_11_ff; +extern cpuop_func op_21bc_11_nf; +extern cpuop_func op_21bc_11_ff; +extern cpuop_func op_21c0_11_nf; +extern cpuop_func op_21c0_11_ff; +extern cpuop_func op_21c8_11_nf; +extern cpuop_func op_21c8_11_ff; +extern cpuop_func op_21d0_11_nf; +extern cpuop_func op_21d0_11_ff; +extern cpuop_func op_21d8_11_nf; +extern cpuop_func op_21d8_11_ff; +extern cpuop_func op_21e0_11_nf; +extern cpuop_func op_21e0_11_ff; +extern cpuop_func op_21e8_11_nf; +extern cpuop_func op_21e8_11_ff; +extern cpuop_func op_21f0_11_nf; +extern cpuop_func op_21f0_11_ff; +extern cpuop_func op_21f8_11_nf; +extern cpuop_func op_21f8_11_ff; +extern cpuop_func op_21f9_11_nf; +extern cpuop_func op_21f9_11_ff; +extern cpuop_func op_21fa_11_nf; +extern cpuop_func op_21fa_11_ff; +extern cpuop_func op_21fb_11_nf; +extern cpuop_func op_21fb_11_ff; +extern cpuop_func op_21fc_11_nf; +extern cpuop_func op_21fc_11_ff; +extern cpuop_func op_23c0_11_nf; +extern cpuop_func op_23c0_11_ff; +extern cpuop_func op_23c8_11_nf; +extern cpuop_func op_23c8_11_ff; +extern cpuop_func op_23d0_11_nf; +extern cpuop_func op_23d0_11_ff; +extern cpuop_func op_23d8_11_nf; +extern cpuop_func op_23d8_11_ff; +extern cpuop_func op_23e0_11_nf; +extern cpuop_func op_23e0_11_ff; +extern cpuop_func op_23e8_11_nf; +extern cpuop_func op_23e8_11_ff; +extern cpuop_func op_23f0_11_nf; +extern cpuop_func op_23f0_11_ff; +extern cpuop_func op_23f8_11_nf; +extern cpuop_func op_23f8_11_ff; +extern cpuop_func op_23f9_11_nf; +extern cpuop_func op_23f9_11_ff; +extern cpuop_func op_23fa_11_nf; +extern cpuop_func op_23fa_11_ff; +extern cpuop_func op_23fb_11_nf; +extern cpuop_func op_23fb_11_ff; +extern cpuop_func op_23fc_11_nf; +extern cpuop_func op_23fc_11_ff; +extern cpuop_func op_3000_11_nf; +extern cpuop_func op_3000_11_ff; +extern cpuop_func op_3008_11_nf; +extern cpuop_func op_3008_11_ff; +extern cpuop_func op_3010_11_nf; +extern cpuop_func op_3010_11_ff; +extern cpuop_func op_3018_11_nf; +extern cpuop_func op_3018_11_ff; +extern cpuop_func op_3020_11_nf; +extern cpuop_func op_3020_11_ff; +extern cpuop_func op_3028_11_nf; +extern cpuop_func op_3028_11_ff; +extern cpuop_func op_3030_11_nf; +extern cpuop_func op_3030_11_ff; +extern cpuop_func op_3038_11_nf; +extern cpuop_func op_3038_11_ff; +extern cpuop_func op_3039_11_nf; +extern cpuop_func op_3039_11_ff; +extern cpuop_func op_303a_11_nf; +extern cpuop_func op_303a_11_ff; +extern cpuop_func op_303b_11_nf; +extern cpuop_func op_303b_11_ff; +extern cpuop_func op_303c_11_nf; +extern cpuop_func op_303c_11_ff; +extern cpuop_func op_3040_11_nf; +extern cpuop_func op_3040_11_ff; +extern cpuop_func op_3048_11_nf; +extern cpuop_func op_3048_11_ff; +extern cpuop_func op_3050_11_nf; +extern cpuop_func op_3050_11_ff; +extern cpuop_func op_3058_11_nf; +extern cpuop_func op_3058_11_ff; +extern cpuop_func op_3060_11_nf; +extern cpuop_func op_3060_11_ff; +extern cpuop_func op_3068_11_nf; +extern cpuop_func op_3068_11_ff; +extern cpuop_func op_3070_11_nf; +extern cpuop_func op_3070_11_ff; +extern cpuop_func op_3078_11_nf; +extern cpuop_func op_3078_11_ff; +extern cpuop_func op_3079_11_nf; +extern cpuop_func op_3079_11_ff; +extern cpuop_func op_307a_11_nf; +extern cpuop_func op_307a_11_ff; +extern cpuop_func op_307b_11_nf; +extern cpuop_func op_307b_11_ff; +extern cpuop_func op_307c_11_nf; +extern cpuop_func op_307c_11_ff; +extern cpuop_func op_3080_11_nf; +extern cpuop_func op_3080_11_ff; +extern cpuop_func op_3088_11_nf; +extern cpuop_func op_3088_11_ff; +extern cpuop_func op_3090_11_nf; +extern cpuop_func op_3090_11_ff; +extern cpuop_func op_3098_11_nf; +extern cpuop_func op_3098_11_ff; +extern cpuop_func op_30a0_11_nf; +extern cpuop_func op_30a0_11_ff; +extern cpuop_func op_30a8_11_nf; +extern cpuop_func op_30a8_11_ff; +extern cpuop_func op_30b0_11_nf; +extern cpuop_func op_30b0_11_ff; +extern cpuop_func op_30b8_11_nf; +extern cpuop_func op_30b8_11_ff; +extern cpuop_func op_30b9_11_nf; +extern cpuop_func op_30b9_11_ff; +extern cpuop_func op_30ba_11_nf; +extern cpuop_func op_30ba_11_ff; +extern cpuop_func op_30bb_11_nf; +extern cpuop_func op_30bb_11_ff; +extern cpuop_func op_30bc_11_nf; +extern cpuop_func op_30bc_11_ff; +extern cpuop_func op_30c0_11_nf; +extern cpuop_func op_30c0_11_ff; +extern cpuop_func op_30c8_11_nf; +extern cpuop_func op_30c8_11_ff; +extern cpuop_func op_30d0_11_nf; +extern cpuop_func op_30d0_11_ff; +extern cpuop_func op_30d8_11_nf; +extern cpuop_func op_30d8_11_ff; +extern cpuop_func op_30e0_11_nf; +extern cpuop_func op_30e0_11_ff; +extern cpuop_func op_30e8_11_nf; +extern cpuop_func op_30e8_11_ff; +extern cpuop_func op_30f0_11_nf; +extern cpuop_func op_30f0_11_ff; +extern cpuop_func op_30f8_11_nf; +extern cpuop_func op_30f8_11_ff; +extern cpuop_func op_30f9_11_nf; +extern cpuop_func op_30f9_11_ff; +extern cpuop_func op_30fa_11_nf; +extern cpuop_func op_30fa_11_ff; +extern cpuop_func op_30fb_11_nf; +extern cpuop_func op_30fb_11_ff; +extern cpuop_func op_30fc_11_nf; +extern cpuop_func op_30fc_11_ff; +extern cpuop_func op_3100_11_nf; +extern cpuop_func op_3100_11_ff; +extern cpuop_func op_3108_11_nf; +extern cpuop_func op_3108_11_ff; +extern cpuop_func op_3110_11_nf; +extern cpuop_func op_3110_11_ff; +extern cpuop_func op_3118_11_nf; +extern cpuop_func op_3118_11_ff; +extern cpuop_func op_3120_11_nf; +extern cpuop_func op_3120_11_ff; +extern cpuop_func op_3128_11_nf; +extern cpuop_func op_3128_11_ff; +extern cpuop_func op_3130_11_nf; +extern cpuop_func op_3130_11_ff; +extern cpuop_func op_3138_11_nf; +extern cpuop_func op_3138_11_ff; +extern cpuop_func op_3139_11_nf; +extern cpuop_func op_3139_11_ff; +extern cpuop_func op_313a_11_nf; +extern cpuop_func op_313a_11_ff; +extern cpuop_func op_313b_11_nf; +extern cpuop_func op_313b_11_ff; +extern cpuop_func op_313c_11_nf; +extern cpuop_func op_313c_11_ff; +extern cpuop_func op_3140_11_nf; +extern cpuop_func op_3140_11_ff; +extern cpuop_func op_3148_11_nf; +extern cpuop_func op_3148_11_ff; +extern cpuop_func op_3150_11_nf; +extern cpuop_func op_3150_11_ff; +extern cpuop_func op_3158_11_nf; +extern cpuop_func op_3158_11_ff; +extern cpuop_func op_3160_11_nf; +extern cpuop_func op_3160_11_ff; +extern cpuop_func op_3168_11_nf; +extern cpuop_func op_3168_11_ff; +extern cpuop_func op_3170_11_nf; +extern cpuop_func op_3170_11_ff; +extern cpuop_func op_3178_11_nf; +extern cpuop_func op_3178_11_ff; +extern cpuop_func op_3179_11_nf; +extern cpuop_func op_3179_11_ff; +extern cpuop_func op_317a_11_nf; +extern cpuop_func op_317a_11_ff; +extern cpuop_func op_317b_11_nf; +extern cpuop_func op_317b_11_ff; +extern cpuop_func op_317c_11_nf; +extern cpuop_func op_317c_11_ff; +extern cpuop_func op_3180_11_nf; +extern cpuop_func op_3180_11_ff; +extern cpuop_func op_3188_11_nf; +extern cpuop_func op_3188_11_ff; +extern cpuop_func op_3190_11_nf; +extern cpuop_func op_3190_11_ff; +extern cpuop_func op_3198_11_nf; +extern cpuop_func op_3198_11_ff; +extern cpuop_func op_31a0_11_nf; +extern cpuop_func op_31a0_11_ff; +extern cpuop_func op_31a8_11_nf; +extern cpuop_func op_31a8_11_ff; +extern cpuop_func op_31b0_11_nf; +extern cpuop_func op_31b0_11_ff; +extern cpuop_func op_31b8_11_nf; +extern cpuop_func op_31b8_11_ff; +extern cpuop_func op_31b9_11_nf; +extern cpuop_func op_31b9_11_ff; +extern cpuop_func op_31ba_11_nf; +extern cpuop_func op_31ba_11_ff; +extern cpuop_func op_31bb_11_nf; +extern cpuop_func op_31bb_11_ff; +extern cpuop_func op_31bc_11_nf; +extern cpuop_func op_31bc_11_ff; +extern cpuop_func op_31c0_11_nf; +extern cpuop_func op_31c0_11_ff; +extern cpuop_func op_31c8_11_nf; +extern cpuop_func op_31c8_11_ff; +extern cpuop_func op_31d0_11_nf; +extern cpuop_func op_31d0_11_ff; +extern cpuop_func op_31d8_11_nf; +extern cpuop_func op_31d8_11_ff; +extern cpuop_func op_31e0_11_nf; +extern cpuop_func op_31e0_11_ff; +extern cpuop_func op_31e8_11_nf; +extern cpuop_func op_31e8_11_ff; +extern cpuop_func op_31f0_11_nf; +extern cpuop_func op_31f0_11_ff; +extern cpuop_func op_31f8_11_nf; +extern cpuop_func op_31f8_11_ff; +extern cpuop_func op_31f9_11_nf; +extern cpuop_func op_31f9_11_ff; +extern cpuop_func op_31fa_11_nf; +extern cpuop_func op_31fa_11_ff; +extern cpuop_func op_31fb_11_nf; +extern cpuop_func op_31fb_11_ff; +extern cpuop_func op_31fc_11_nf; +extern cpuop_func op_31fc_11_ff; +extern cpuop_func op_33c0_11_nf; +extern cpuop_func op_33c0_11_ff; +extern cpuop_func op_33c8_11_nf; +extern cpuop_func op_33c8_11_ff; +extern cpuop_func op_33d0_11_nf; +extern cpuop_func op_33d0_11_ff; +extern cpuop_func op_33d8_11_nf; +extern cpuop_func op_33d8_11_ff; +extern cpuop_func op_33e0_11_nf; +extern cpuop_func op_33e0_11_ff; +extern cpuop_func op_33e8_11_nf; +extern cpuop_func op_33e8_11_ff; +extern cpuop_func op_33f0_11_nf; +extern cpuop_func op_33f0_11_ff; +extern cpuop_func op_33f8_11_nf; +extern cpuop_func op_33f8_11_ff; +extern cpuop_func op_33f9_11_nf; +extern cpuop_func op_33f9_11_ff; +extern cpuop_func op_33fa_11_nf; +extern cpuop_func op_33fa_11_ff; +extern cpuop_func op_33fb_11_nf; +extern cpuop_func op_33fb_11_ff; +extern cpuop_func op_33fc_11_nf; +extern cpuop_func op_33fc_11_ff; +extern cpuop_func op_4000_11_nf; +extern cpuop_func op_4000_11_ff; +extern cpuop_func op_4010_11_nf; +extern cpuop_func op_4010_11_ff; +extern cpuop_func op_4018_11_nf; +extern cpuop_func op_4018_11_ff; +extern cpuop_func op_4020_11_nf; +extern cpuop_func op_4020_11_ff; +extern cpuop_func op_4028_11_nf; +extern cpuop_func op_4028_11_ff; +extern cpuop_func op_4030_11_nf; +extern cpuop_func op_4030_11_ff; +extern cpuop_func op_4038_11_nf; +extern cpuop_func op_4038_11_ff; +extern cpuop_func op_4039_11_nf; +extern cpuop_func op_4039_11_ff; +extern cpuop_func op_4040_11_nf; +extern cpuop_func op_4040_11_ff; +extern cpuop_func op_4050_11_nf; +extern cpuop_func op_4050_11_ff; +extern cpuop_func op_4058_11_nf; +extern cpuop_func op_4058_11_ff; +extern cpuop_func op_4060_11_nf; +extern cpuop_func op_4060_11_ff; +extern cpuop_func op_4068_11_nf; +extern cpuop_func op_4068_11_ff; +extern cpuop_func op_4070_11_nf; +extern cpuop_func op_4070_11_ff; +extern cpuop_func op_4078_11_nf; +extern cpuop_func op_4078_11_ff; +extern cpuop_func op_4079_11_nf; +extern cpuop_func op_4079_11_ff; +extern cpuop_func op_4080_11_nf; +extern cpuop_func op_4080_11_ff; +extern cpuop_func op_4090_11_nf; +extern cpuop_func op_4090_11_ff; +extern cpuop_func op_4098_11_nf; +extern cpuop_func op_4098_11_ff; +extern cpuop_func op_40a0_11_nf; +extern cpuop_func op_40a0_11_ff; +extern cpuop_func op_40a8_11_nf; +extern cpuop_func op_40a8_11_ff; +extern cpuop_func op_40b0_11_nf; +extern cpuop_func op_40b0_11_ff; +extern cpuop_func op_40b8_11_nf; +extern cpuop_func op_40b8_11_ff; +extern cpuop_func op_40b9_11_nf; +extern cpuop_func op_40b9_11_ff; +extern cpuop_func op_40c0_11_nf; +extern cpuop_func op_40c0_11_ff; +extern cpuop_func op_40d0_11_nf; +extern cpuop_func op_40d0_11_ff; +extern cpuop_func op_40d8_11_nf; +extern cpuop_func op_40d8_11_ff; +extern cpuop_func op_40e0_11_nf; +extern cpuop_func op_40e0_11_ff; +extern cpuop_func op_40e8_11_nf; +extern cpuop_func op_40e8_11_ff; +extern cpuop_func op_40f0_11_nf; +extern cpuop_func op_40f0_11_ff; +extern cpuop_func op_40f8_11_nf; +extern cpuop_func op_40f8_11_ff; +extern cpuop_func op_40f9_11_nf; +extern cpuop_func op_40f9_11_ff; +extern cpuop_func op_4100_11_nf; +extern cpuop_func op_4100_11_ff; +extern cpuop_func op_4110_11_nf; +extern cpuop_func op_4110_11_ff; +extern cpuop_func op_4118_11_nf; +extern cpuop_func op_4118_11_ff; +extern cpuop_func op_4120_11_nf; +extern cpuop_func op_4120_11_ff; +extern cpuop_func op_4128_11_nf; +extern cpuop_func op_4128_11_ff; +extern cpuop_func op_4130_11_nf; +extern cpuop_func op_4130_11_ff; +extern cpuop_func op_4138_11_nf; +extern cpuop_func op_4138_11_ff; +extern cpuop_func op_4139_11_nf; +extern cpuop_func op_4139_11_ff; +extern cpuop_func op_413a_11_nf; +extern cpuop_func op_413a_11_ff; +extern cpuop_func op_413b_11_nf; +extern cpuop_func op_413b_11_ff; +extern cpuop_func op_413c_11_nf; +extern cpuop_func op_413c_11_ff; +extern cpuop_func op_4180_11_nf; +extern cpuop_func op_4180_11_ff; +extern cpuop_func op_4190_11_nf; +extern cpuop_func op_4190_11_ff; +extern cpuop_func op_4198_11_nf; +extern cpuop_func op_4198_11_ff; +extern cpuop_func op_41a0_11_nf; +extern cpuop_func op_41a0_11_ff; +extern cpuop_func op_41a8_11_nf; +extern cpuop_func op_41a8_11_ff; +extern cpuop_func op_41b0_11_nf; +extern cpuop_func op_41b0_11_ff; +extern cpuop_func op_41b8_11_nf; +extern cpuop_func op_41b8_11_ff; +extern cpuop_func op_41b9_11_nf; +extern cpuop_func op_41b9_11_ff; +extern cpuop_func op_41ba_11_nf; +extern cpuop_func op_41ba_11_ff; +extern cpuop_func op_41bb_11_nf; +extern cpuop_func op_41bb_11_ff; +extern cpuop_func op_41bc_11_nf; +extern cpuop_func op_41bc_11_ff; +extern cpuop_func op_41d0_11_nf; +extern cpuop_func op_41d0_11_ff; +extern cpuop_func op_41e8_11_nf; +extern cpuop_func op_41e8_11_ff; +extern cpuop_func op_41f0_11_nf; +extern cpuop_func op_41f0_11_ff; +extern cpuop_func op_41f8_11_nf; +extern cpuop_func op_41f8_11_ff; +extern cpuop_func op_41f9_11_nf; +extern cpuop_func op_41f9_11_ff; +extern cpuop_func op_41fa_11_nf; +extern cpuop_func op_41fa_11_ff; +extern cpuop_func op_41fb_11_nf; +extern cpuop_func op_41fb_11_ff; +extern cpuop_func op_4200_11_nf; +extern cpuop_func op_4200_11_ff; +extern cpuop_func op_4210_11_nf; +extern cpuop_func op_4210_11_ff; +extern cpuop_func op_4218_11_nf; +extern cpuop_func op_4218_11_ff; +extern cpuop_func op_4220_11_nf; +extern cpuop_func op_4220_11_ff; +extern cpuop_func op_4228_11_nf; +extern cpuop_func op_4228_11_ff; +extern cpuop_func op_4230_11_nf; +extern cpuop_func op_4230_11_ff; +extern cpuop_func op_4238_11_nf; +extern cpuop_func op_4238_11_ff; +extern cpuop_func op_4239_11_nf; +extern cpuop_func op_4239_11_ff; +extern cpuop_func op_4240_11_nf; +extern cpuop_func op_4240_11_ff; +extern cpuop_func op_4250_11_nf; +extern cpuop_func op_4250_11_ff; +extern cpuop_func op_4258_11_nf; +extern cpuop_func op_4258_11_ff; +extern cpuop_func op_4260_11_nf; +extern cpuop_func op_4260_11_ff; +extern cpuop_func op_4268_11_nf; +extern cpuop_func op_4268_11_ff; +extern cpuop_func op_4270_11_nf; +extern cpuop_func op_4270_11_ff; +extern cpuop_func op_4278_11_nf; +extern cpuop_func op_4278_11_ff; +extern cpuop_func op_4279_11_nf; +extern cpuop_func op_4279_11_ff; +extern cpuop_func op_4280_11_nf; +extern cpuop_func op_4280_11_ff; +extern cpuop_func op_4290_11_nf; +extern cpuop_func op_4290_11_ff; +extern cpuop_func op_4298_11_nf; +extern cpuop_func op_4298_11_ff; +extern cpuop_func op_42a0_11_nf; +extern cpuop_func op_42a0_11_ff; +extern cpuop_func op_42a8_11_nf; +extern cpuop_func op_42a8_11_ff; +extern cpuop_func op_42b0_11_nf; +extern cpuop_func op_42b0_11_ff; +extern cpuop_func op_42b8_11_nf; +extern cpuop_func op_42b8_11_ff; +extern cpuop_func op_42b9_11_nf; +extern cpuop_func op_42b9_11_ff; +extern cpuop_func op_4400_11_nf; +extern cpuop_func op_4400_11_ff; +extern cpuop_func op_4410_11_nf; +extern cpuop_func op_4410_11_ff; +extern cpuop_func op_4418_11_nf; +extern cpuop_func op_4418_11_ff; +extern cpuop_func op_4420_11_nf; +extern cpuop_func op_4420_11_ff; +extern cpuop_func op_4428_11_nf; +extern cpuop_func op_4428_11_ff; +extern cpuop_func op_4430_11_nf; +extern cpuop_func op_4430_11_ff; +extern cpuop_func op_4438_11_nf; +extern cpuop_func op_4438_11_ff; +extern cpuop_func op_4439_11_nf; +extern cpuop_func op_4439_11_ff; +extern cpuop_func op_4440_11_nf; +extern cpuop_func op_4440_11_ff; +extern cpuop_func op_4450_11_nf; +extern cpuop_func op_4450_11_ff; +extern cpuop_func op_4458_11_nf; +extern cpuop_func op_4458_11_ff; +extern cpuop_func op_4460_11_nf; +extern cpuop_func op_4460_11_ff; +extern cpuop_func op_4468_11_nf; +extern cpuop_func op_4468_11_ff; +extern cpuop_func op_4470_11_nf; +extern cpuop_func op_4470_11_ff; +extern cpuop_func op_4478_11_nf; +extern cpuop_func op_4478_11_ff; +extern cpuop_func op_4479_11_nf; +extern cpuop_func op_4479_11_ff; +extern cpuop_func op_4480_11_nf; +extern cpuop_func op_4480_11_ff; +extern cpuop_func op_4490_11_nf; +extern cpuop_func op_4490_11_ff; +extern cpuop_func op_4498_11_nf; +extern cpuop_func op_4498_11_ff; +extern cpuop_func op_44a0_11_nf; +extern cpuop_func op_44a0_11_ff; +extern cpuop_func op_44a8_11_nf; +extern cpuop_func op_44a8_11_ff; +extern cpuop_func op_44b0_11_nf; +extern cpuop_func op_44b0_11_ff; +extern cpuop_func op_44b8_11_nf; +extern cpuop_func op_44b8_11_ff; +extern cpuop_func op_44b9_11_nf; +extern cpuop_func op_44b9_11_ff; +extern cpuop_func op_44c0_11_nf; +extern cpuop_func op_44c0_11_ff; +extern cpuop_func op_44d0_11_nf; +extern cpuop_func op_44d0_11_ff; +extern cpuop_func op_44d8_11_nf; +extern cpuop_func op_44d8_11_ff; +extern cpuop_func op_44e0_11_nf; +extern cpuop_func op_44e0_11_ff; +extern cpuop_func op_44e8_11_nf; +extern cpuop_func op_44e8_11_ff; +extern cpuop_func op_44f0_11_nf; +extern cpuop_func op_44f0_11_ff; +extern cpuop_func op_44f8_11_nf; +extern cpuop_func op_44f8_11_ff; +extern cpuop_func op_44f9_11_nf; +extern cpuop_func op_44f9_11_ff; +extern cpuop_func op_44fa_11_nf; +extern cpuop_func op_44fa_11_ff; +extern cpuop_func op_44fb_11_nf; +extern cpuop_func op_44fb_11_ff; +extern cpuop_func op_44fc_11_nf; +extern cpuop_func op_44fc_11_ff; +extern cpuop_func op_4600_11_nf; +extern cpuop_func op_4600_11_ff; +extern cpuop_func op_4610_11_nf; +extern cpuop_func op_4610_11_ff; +extern cpuop_func op_4618_11_nf; +extern cpuop_func op_4618_11_ff; +extern cpuop_func op_4620_11_nf; +extern cpuop_func op_4620_11_ff; +extern cpuop_func op_4628_11_nf; +extern cpuop_func op_4628_11_ff; +extern cpuop_func op_4630_11_nf; +extern cpuop_func op_4630_11_ff; +extern cpuop_func op_4638_11_nf; +extern cpuop_func op_4638_11_ff; +extern cpuop_func op_4639_11_nf; +extern cpuop_func op_4639_11_ff; +extern cpuop_func op_4640_11_nf; +extern cpuop_func op_4640_11_ff; +extern cpuop_func op_4650_11_nf; +extern cpuop_func op_4650_11_ff; +extern cpuop_func op_4658_11_nf; +extern cpuop_func op_4658_11_ff; +extern cpuop_func op_4660_11_nf; +extern cpuop_func op_4660_11_ff; +extern cpuop_func op_4668_11_nf; +extern cpuop_func op_4668_11_ff; +extern cpuop_func op_4670_11_nf; +extern cpuop_func op_4670_11_ff; +extern cpuop_func op_4678_11_nf; +extern cpuop_func op_4678_11_ff; +extern cpuop_func op_4679_11_nf; +extern cpuop_func op_4679_11_ff; +extern cpuop_func op_4680_11_nf; +extern cpuop_func op_4680_11_ff; +extern cpuop_func op_4690_11_nf; +extern cpuop_func op_4690_11_ff; +extern cpuop_func op_4698_11_nf; +extern cpuop_func op_4698_11_ff; +extern cpuop_func op_46a0_11_nf; +extern cpuop_func op_46a0_11_ff; +extern cpuop_func op_46a8_11_nf; +extern cpuop_func op_46a8_11_ff; +extern cpuop_func op_46b0_11_nf; +extern cpuop_func op_46b0_11_ff; +extern cpuop_func op_46b8_11_nf; +extern cpuop_func op_46b8_11_ff; +extern cpuop_func op_46b9_11_nf; +extern cpuop_func op_46b9_11_ff; +extern cpuop_func op_46c0_11_nf; +extern cpuop_func op_46c0_11_ff; +extern cpuop_func op_46d0_11_nf; +extern cpuop_func op_46d0_11_ff; +extern cpuop_func op_46d8_11_nf; +extern cpuop_func op_46d8_11_ff; +extern cpuop_func op_46e0_11_nf; +extern cpuop_func op_46e0_11_ff; +extern cpuop_func op_46e8_11_nf; +extern cpuop_func op_46e8_11_ff; +extern cpuop_func op_46f0_11_nf; +extern cpuop_func op_46f0_11_ff; +extern cpuop_func op_46f8_11_nf; +extern cpuop_func op_46f8_11_ff; +extern cpuop_func op_46f9_11_nf; +extern cpuop_func op_46f9_11_ff; +extern cpuop_func op_46fa_11_nf; +extern cpuop_func op_46fa_11_ff; +extern cpuop_func op_46fb_11_nf; +extern cpuop_func op_46fb_11_ff; +extern cpuop_func op_46fc_11_nf; +extern cpuop_func op_46fc_11_ff; +extern cpuop_func op_4800_11_nf; +extern cpuop_func op_4800_11_ff; +extern cpuop_func op_4810_11_nf; +extern cpuop_func op_4810_11_ff; +extern cpuop_func op_4818_11_nf; +extern cpuop_func op_4818_11_ff; +extern cpuop_func op_4820_11_nf; +extern cpuop_func op_4820_11_ff; +extern cpuop_func op_4828_11_nf; +extern cpuop_func op_4828_11_ff; +extern cpuop_func op_4830_11_nf; +extern cpuop_func op_4830_11_ff; +extern cpuop_func op_4838_11_nf; +extern cpuop_func op_4838_11_ff; +extern cpuop_func op_4839_11_nf; +extern cpuop_func op_4839_11_ff; +extern cpuop_func op_4840_11_nf; +extern cpuop_func op_4840_11_ff; +extern cpuop_func op_4850_11_nf; +extern cpuop_func op_4850_11_ff; +extern cpuop_func op_4868_11_nf; +extern cpuop_func op_4868_11_ff; +extern cpuop_func op_4870_11_nf; +extern cpuop_func op_4870_11_ff; +extern cpuop_func op_4878_11_nf; +extern cpuop_func op_4878_11_ff; +extern cpuop_func op_4879_11_nf; +extern cpuop_func op_4879_11_ff; +extern cpuop_func op_487a_11_nf; +extern cpuop_func op_487a_11_ff; +extern cpuop_func op_487b_11_nf; +extern cpuop_func op_487b_11_ff; +extern cpuop_func op_4880_11_nf; +extern cpuop_func op_4880_11_ff; +extern cpuop_func op_4890_11_nf; +extern cpuop_func op_4890_11_ff; +extern cpuop_func op_48a0_11_nf; +extern cpuop_func op_48a0_11_ff; +extern cpuop_func op_48a8_11_nf; +extern cpuop_func op_48a8_11_ff; +extern cpuop_func op_48b0_11_nf; +extern cpuop_func op_48b0_11_ff; +extern cpuop_func op_48b8_11_nf; +extern cpuop_func op_48b8_11_ff; +extern cpuop_func op_48b9_11_nf; +extern cpuop_func op_48b9_11_ff; +extern cpuop_func op_48c0_11_nf; +extern cpuop_func op_48c0_11_ff; +extern cpuop_func op_48d0_11_nf; +extern cpuop_func op_48d0_11_ff; +extern cpuop_func op_48e0_11_nf; +extern cpuop_func op_48e0_11_ff; +extern cpuop_func op_48e8_11_nf; +extern cpuop_func op_48e8_11_ff; +extern cpuop_func op_48f0_11_nf; +extern cpuop_func op_48f0_11_ff; +extern cpuop_func op_48f8_11_nf; +extern cpuop_func op_48f8_11_ff; +extern cpuop_func op_48f9_11_nf; +extern cpuop_func op_48f9_11_ff; +extern cpuop_func op_49c0_11_nf; +extern cpuop_func op_49c0_11_ff; +extern cpuop_func op_4a00_11_nf; +extern cpuop_func op_4a00_11_ff; +extern cpuop_func op_4a10_11_nf; +extern cpuop_func op_4a10_11_ff; +extern cpuop_func op_4a18_11_nf; +extern cpuop_func op_4a18_11_ff; +extern cpuop_func op_4a20_11_nf; +extern cpuop_func op_4a20_11_ff; +extern cpuop_func op_4a28_11_nf; +extern cpuop_func op_4a28_11_ff; +extern cpuop_func op_4a30_11_nf; +extern cpuop_func op_4a30_11_ff; +extern cpuop_func op_4a38_11_nf; +extern cpuop_func op_4a38_11_ff; +extern cpuop_func op_4a39_11_nf; +extern cpuop_func op_4a39_11_ff; +extern cpuop_func op_4a40_11_nf; +extern cpuop_func op_4a40_11_ff; +extern cpuop_func op_4a50_11_nf; +extern cpuop_func op_4a50_11_ff; +extern cpuop_func op_4a58_11_nf; +extern cpuop_func op_4a58_11_ff; +extern cpuop_func op_4a60_11_nf; +extern cpuop_func op_4a60_11_ff; +extern cpuop_func op_4a68_11_nf; +extern cpuop_func op_4a68_11_ff; +extern cpuop_func op_4a70_11_nf; +extern cpuop_func op_4a70_11_ff; +extern cpuop_func op_4a78_11_nf; +extern cpuop_func op_4a78_11_ff; +extern cpuop_func op_4a79_11_nf; +extern cpuop_func op_4a79_11_ff; +extern cpuop_func op_4a80_11_nf; +extern cpuop_func op_4a80_11_ff; +extern cpuop_func op_4a90_11_nf; +extern cpuop_func op_4a90_11_ff; +extern cpuop_func op_4a98_11_nf; +extern cpuop_func op_4a98_11_ff; +extern cpuop_func op_4aa0_11_nf; +extern cpuop_func op_4aa0_11_ff; +extern cpuop_func op_4aa8_11_nf; +extern cpuop_func op_4aa8_11_ff; +extern cpuop_func op_4ab0_11_nf; +extern cpuop_func op_4ab0_11_ff; +extern cpuop_func op_4ab8_11_nf; +extern cpuop_func op_4ab8_11_ff; +extern cpuop_func op_4ab9_11_nf; +extern cpuop_func op_4ab9_11_ff; +extern cpuop_func op_4ac0_11_nf; +extern cpuop_func op_4ac0_11_ff; +extern cpuop_func op_4ad0_11_nf; +extern cpuop_func op_4ad0_11_ff; +extern cpuop_func op_4ad8_11_nf; +extern cpuop_func op_4ad8_11_ff; +extern cpuop_func op_4ae0_11_nf; +extern cpuop_func op_4ae0_11_ff; +extern cpuop_func op_4ae8_11_nf; +extern cpuop_func op_4ae8_11_ff; +extern cpuop_func op_4af0_11_nf; +extern cpuop_func op_4af0_11_ff; +extern cpuop_func op_4af8_11_nf; +extern cpuop_func op_4af8_11_ff; +extern cpuop_func op_4af9_11_nf; +extern cpuop_func op_4af9_11_ff; +extern cpuop_func op_4c90_11_nf; +extern cpuop_func op_4c90_11_ff; +extern cpuop_func op_4c98_11_nf; +extern cpuop_func op_4c98_11_ff; +extern cpuop_func op_4ca8_11_nf; +extern cpuop_func op_4ca8_11_ff; +extern cpuop_func op_4cb0_11_nf; +extern cpuop_func op_4cb0_11_ff; +extern cpuop_func op_4cb8_11_nf; +extern cpuop_func op_4cb8_11_ff; +extern cpuop_func op_4cb9_11_nf; +extern cpuop_func op_4cb9_11_ff; +extern cpuop_func op_4cba_11_nf; +extern cpuop_func op_4cba_11_ff; +extern cpuop_func op_4cbb_11_nf; +extern cpuop_func op_4cbb_11_ff; +extern cpuop_func op_4cd0_11_nf; +extern cpuop_func op_4cd0_11_ff; +extern cpuop_func op_4cd8_11_nf; +extern cpuop_func op_4cd8_11_ff; +extern cpuop_func op_4ce8_11_nf; +extern cpuop_func op_4ce8_11_ff; +extern cpuop_func op_4cf0_11_nf; +extern cpuop_func op_4cf0_11_ff; +extern cpuop_func op_4cf8_11_nf; +extern cpuop_func op_4cf8_11_ff; +extern cpuop_func op_4cf9_11_nf; +extern cpuop_func op_4cf9_11_ff; +extern cpuop_func op_4cfa_11_nf; +extern cpuop_func op_4cfa_11_ff; +extern cpuop_func op_4cfb_11_nf; +extern cpuop_func op_4cfb_11_ff; +extern cpuop_func op_4e40_11_nf; +extern cpuop_func op_4e40_11_ff; +extern cpuop_func op_4e50_11_nf; +extern cpuop_func op_4e50_11_ff; +extern cpuop_func op_4e58_11_nf; +extern cpuop_func op_4e58_11_ff; +extern cpuop_func op_4e60_11_nf; +extern cpuop_func op_4e60_11_ff; +extern cpuop_func op_4e68_11_nf; +extern cpuop_func op_4e68_11_ff; +extern cpuop_func op_4e70_11_nf; +extern cpuop_func op_4e70_11_ff; +extern cpuop_func op_4e71_11_nf; +extern cpuop_func op_4e71_11_ff; +extern cpuop_func op_4e72_11_nf; +extern cpuop_func op_4e72_11_ff; +extern cpuop_func op_4e73_11_nf; +extern cpuop_func op_4e73_11_ff; +extern cpuop_func op_4e74_11_nf; +extern cpuop_func op_4e74_11_ff; +extern cpuop_func op_4e75_11_nf; +extern cpuop_func op_4e75_11_ff; +extern cpuop_func op_4e76_11_nf; +extern cpuop_func op_4e76_11_ff; +extern cpuop_func op_4e77_11_nf; +extern cpuop_func op_4e77_11_ff; +extern cpuop_func op_4e90_11_nf; +extern cpuop_func op_4e90_11_ff; +extern cpuop_func op_4ea8_11_nf; +extern cpuop_func op_4ea8_11_ff; +extern cpuop_func op_4eb0_11_nf; +extern cpuop_func op_4eb0_11_ff; +extern cpuop_func op_4eb8_11_nf; +extern cpuop_func op_4eb8_11_ff; +extern cpuop_func op_4eb9_11_nf; +extern cpuop_func op_4eb9_11_ff; +extern cpuop_func op_4eba_11_nf; +extern cpuop_func op_4eba_11_ff; +extern cpuop_func op_4ebb_11_nf; +extern cpuop_func op_4ebb_11_ff; +extern cpuop_func op_4ed0_11_nf; +extern cpuop_func op_4ed0_11_ff; +extern cpuop_func op_4ee8_11_nf; +extern cpuop_func op_4ee8_11_ff; +extern cpuop_func op_4ef0_11_nf; +extern cpuop_func op_4ef0_11_ff; +extern cpuop_func op_4ef8_11_nf; +extern cpuop_func op_4ef8_11_ff; +extern cpuop_func op_4ef9_11_nf; +extern cpuop_func op_4ef9_11_ff; +extern cpuop_func op_4efa_11_nf; +extern cpuop_func op_4efa_11_ff; +extern cpuop_func op_4efb_11_nf; +extern cpuop_func op_4efb_11_ff; +extern cpuop_func op_5000_11_nf; +extern cpuop_func op_5000_11_ff; +extern cpuop_func op_5010_11_nf; +extern cpuop_func op_5010_11_ff; +extern cpuop_func op_5018_11_nf; +extern cpuop_func op_5018_11_ff; +extern cpuop_func op_5020_11_nf; +extern cpuop_func op_5020_11_ff; +extern cpuop_func op_5028_11_nf; +extern cpuop_func op_5028_11_ff; +extern cpuop_func op_5030_11_nf; +extern cpuop_func op_5030_11_ff; +extern cpuop_func op_5038_11_nf; +extern cpuop_func op_5038_11_ff; +extern cpuop_func op_5039_11_nf; +extern cpuop_func op_5039_11_ff; +extern cpuop_func op_5040_11_nf; +extern cpuop_func op_5040_11_ff; +extern cpuop_func op_5048_11_nf; +extern cpuop_func op_5048_11_ff; +extern cpuop_func op_5050_11_nf; +extern cpuop_func op_5050_11_ff; +extern cpuop_func op_5058_11_nf; +extern cpuop_func op_5058_11_ff; +extern cpuop_func op_5060_11_nf; +extern cpuop_func op_5060_11_ff; +extern cpuop_func op_5068_11_nf; +extern cpuop_func op_5068_11_ff; +extern cpuop_func op_5070_11_nf; +extern cpuop_func op_5070_11_ff; +extern cpuop_func op_5078_11_nf; +extern cpuop_func op_5078_11_ff; +extern cpuop_func op_5079_11_nf; +extern cpuop_func op_5079_11_ff; +extern cpuop_func op_5080_11_nf; +extern cpuop_func op_5080_11_ff; +extern cpuop_func op_5088_11_nf; +extern cpuop_func op_5088_11_ff; +extern cpuop_func op_5090_11_nf; +extern cpuop_func op_5090_11_ff; +extern cpuop_func op_5098_11_nf; +extern cpuop_func op_5098_11_ff; +extern cpuop_func op_50a0_11_nf; +extern cpuop_func op_50a0_11_ff; +extern cpuop_func op_50a8_11_nf; +extern cpuop_func op_50a8_11_ff; +extern cpuop_func op_50b0_11_nf; +extern cpuop_func op_50b0_11_ff; +extern cpuop_func op_50b8_11_nf; +extern cpuop_func op_50b8_11_ff; +extern cpuop_func op_50b9_11_nf; +extern cpuop_func op_50b9_11_ff; +extern cpuop_func op_50c0_11_nf; +extern cpuop_func op_50c0_11_ff; +extern cpuop_func op_50c8_11_nf; +extern cpuop_func op_50c8_11_ff; +extern cpuop_func op_50d0_11_nf; +extern cpuop_func op_50d0_11_ff; +extern cpuop_func op_50d8_11_nf; +extern cpuop_func op_50d8_11_ff; +extern cpuop_func op_50e0_11_nf; +extern cpuop_func op_50e0_11_ff; +extern cpuop_func op_50e8_11_nf; +extern cpuop_func op_50e8_11_ff; +extern cpuop_func op_50f0_11_nf; +extern cpuop_func op_50f0_11_ff; +extern cpuop_func op_50f8_11_nf; +extern cpuop_func op_50f8_11_ff; +extern cpuop_func op_50f9_11_nf; +extern cpuop_func op_50f9_11_ff; +extern cpuop_func op_5100_11_nf; +extern cpuop_func op_5100_11_ff; +extern cpuop_func op_5110_11_nf; +extern cpuop_func op_5110_11_ff; +extern cpuop_func op_5118_11_nf; +extern cpuop_func op_5118_11_ff; +extern cpuop_func op_5120_11_nf; +extern cpuop_func op_5120_11_ff; +extern cpuop_func op_5128_11_nf; +extern cpuop_func op_5128_11_ff; +extern cpuop_func op_5130_11_nf; +extern cpuop_func op_5130_11_ff; +extern cpuop_func op_5138_11_nf; +extern cpuop_func op_5138_11_ff; +extern cpuop_func op_5139_11_nf; +extern cpuop_func op_5139_11_ff; +extern cpuop_func op_5140_11_nf; +extern cpuop_func op_5140_11_ff; +extern cpuop_func op_5148_11_nf; +extern cpuop_func op_5148_11_ff; +extern cpuop_func op_5150_11_nf; +extern cpuop_func op_5150_11_ff; +extern cpuop_func op_5158_11_nf; +extern cpuop_func op_5158_11_ff; +extern cpuop_func op_5160_11_nf; +extern cpuop_func op_5160_11_ff; +extern cpuop_func op_5168_11_nf; +extern cpuop_func op_5168_11_ff; +extern cpuop_func op_5170_11_nf; +extern cpuop_func op_5170_11_ff; +extern cpuop_func op_5178_11_nf; +extern cpuop_func op_5178_11_ff; +extern cpuop_func op_5179_11_nf; +extern cpuop_func op_5179_11_ff; +extern cpuop_func op_5180_11_nf; +extern cpuop_func op_5180_11_ff; +extern cpuop_func op_5188_11_nf; +extern cpuop_func op_5188_11_ff; +extern cpuop_func op_5190_11_nf; +extern cpuop_func op_5190_11_ff; +extern cpuop_func op_5198_11_nf; +extern cpuop_func op_5198_11_ff; +extern cpuop_func op_51a0_11_nf; +extern cpuop_func op_51a0_11_ff; +extern cpuop_func op_51a8_11_nf; +extern cpuop_func op_51a8_11_ff; +extern cpuop_func op_51b0_11_nf; +extern cpuop_func op_51b0_11_ff; +extern cpuop_func op_51b8_11_nf; +extern cpuop_func op_51b8_11_ff; +extern cpuop_func op_51b9_11_nf; +extern cpuop_func op_51b9_11_ff; +extern cpuop_func op_51c0_11_nf; +extern cpuop_func op_51c0_11_ff; +extern cpuop_func op_51c8_11_nf; +extern cpuop_func op_51c8_11_ff; +extern cpuop_func op_51d0_11_nf; +extern cpuop_func op_51d0_11_ff; +extern cpuop_func op_51d8_11_nf; +extern cpuop_func op_51d8_11_ff; +extern cpuop_func op_51e0_11_nf; +extern cpuop_func op_51e0_11_ff; +extern cpuop_func op_51e8_11_nf; +extern cpuop_func op_51e8_11_ff; +extern cpuop_func op_51f0_11_nf; +extern cpuop_func op_51f0_11_ff; +extern cpuop_func op_51f8_11_nf; +extern cpuop_func op_51f8_11_ff; +extern cpuop_func op_51f9_11_nf; +extern cpuop_func op_51f9_11_ff; +extern cpuop_func op_52c0_11_nf; +extern cpuop_func op_52c0_11_ff; +extern cpuop_func op_52c8_11_nf; +extern cpuop_func op_52c8_11_ff; +extern cpuop_func op_52d0_11_nf; +extern cpuop_func op_52d0_11_ff; +extern cpuop_func op_52d8_11_nf; +extern cpuop_func op_52d8_11_ff; +extern cpuop_func op_52e0_11_nf; +extern cpuop_func op_52e0_11_ff; +extern cpuop_func op_52e8_11_nf; +extern cpuop_func op_52e8_11_ff; +extern cpuop_func op_52f0_11_nf; +extern cpuop_func op_52f0_11_ff; +extern cpuop_func op_52f8_11_nf; +extern cpuop_func op_52f8_11_ff; +extern cpuop_func op_52f9_11_nf; +extern cpuop_func op_52f9_11_ff; +extern cpuop_func op_53c0_11_nf; +extern cpuop_func op_53c0_11_ff; +extern cpuop_func op_53c8_11_nf; +extern cpuop_func op_53c8_11_ff; +extern cpuop_func op_53d0_11_nf; +extern cpuop_func op_53d0_11_ff; +extern cpuop_func op_53d8_11_nf; +extern cpuop_func op_53d8_11_ff; +extern cpuop_func op_53e0_11_nf; +extern cpuop_func op_53e0_11_ff; +extern cpuop_func op_53e8_11_nf; +extern cpuop_func op_53e8_11_ff; +extern cpuop_func op_53f0_11_nf; +extern cpuop_func op_53f0_11_ff; +extern cpuop_func op_53f8_11_nf; +extern cpuop_func op_53f8_11_ff; +extern cpuop_func op_53f9_11_nf; +extern cpuop_func op_53f9_11_ff; +extern cpuop_func op_54c0_11_nf; +extern cpuop_func op_54c0_11_ff; +extern cpuop_func op_54c8_11_nf; +extern cpuop_func op_54c8_11_ff; +extern cpuop_func op_54d0_11_nf; +extern cpuop_func op_54d0_11_ff; +extern cpuop_func op_54d8_11_nf; +extern cpuop_func op_54d8_11_ff; +extern cpuop_func op_54e0_11_nf; +extern cpuop_func op_54e0_11_ff; +extern cpuop_func op_54e8_11_nf; +extern cpuop_func op_54e8_11_ff; +extern cpuop_func op_54f0_11_nf; +extern cpuop_func op_54f0_11_ff; +extern cpuop_func op_54f8_11_nf; +extern cpuop_func op_54f8_11_ff; +extern cpuop_func op_54f9_11_nf; +extern cpuop_func op_54f9_11_ff; +extern cpuop_func op_55c0_11_nf; +extern cpuop_func op_55c0_11_ff; +extern cpuop_func op_55c8_11_nf; +extern cpuop_func op_55c8_11_ff; +extern cpuop_func op_55d0_11_nf; +extern cpuop_func op_55d0_11_ff; +extern cpuop_func op_55d8_11_nf; +extern cpuop_func op_55d8_11_ff; +extern cpuop_func op_55e0_11_nf; +extern cpuop_func op_55e0_11_ff; +extern cpuop_func op_55e8_11_nf; +extern cpuop_func op_55e8_11_ff; +extern cpuop_func op_55f0_11_nf; +extern cpuop_func op_55f0_11_ff; +extern cpuop_func op_55f8_11_nf; +extern cpuop_func op_55f8_11_ff; +extern cpuop_func op_55f9_11_nf; +extern cpuop_func op_55f9_11_ff; +extern cpuop_func op_56c0_11_nf; +extern cpuop_func op_56c0_11_ff; +extern cpuop_func op_56c8_11_nf; +extern cpuop_func op_56c8_11_ff; +extern cpuop_func op_56d0_11_nf; +extern cpuop_func op_56d0_11_ff; +extern cpuop_func op_56d8_11_nf; +extern cpuop_func op_56d8_11_ff; +extern cpuop_func op_56e0_11_nf; +extern cpuop_func op_56e0_11_ff; +extern cpuop_func op_56e8_11_nf; +extern cpuop_func op_56e8_11_ff; +extern cpuop_func op_56f0_11_nf; +extern cpuop_func op_56f0_11_ff; +extern cpuop_func op_56f8_11_nf; +extern cpuop_func op_56f8_11_ff; +extern cpuop_func op_56f9_11_nf; +extern cpuop_func op_56f9_11_ff; +extern cpuop_func op_57c0_11_nf; +extern cpuop_func op_57c0_11_ff; +extern cpuop_func op_57c8_11_nf; +extern cpuop_func op_57c8_11_ff; +extern cpuop_func op_57d0_11_nf; +extern cpuop_func op_57d0_11_ff; +extern cpuop_func op_57d8_11_nf; +extern cpuop_func op_57d8_11_ff; +extern cpuop_func op_57e0_11_nf; +extern cpuop_func op_57e0_11_ff; +extern cpuop_func op_57e8_11_nf; +extern cpuop_func op_57e8_11_ff; +extern cpuop_func op_57f0_11_nf; +extern cpuop_func op_57f0_11_ff; +extern cpuop_func op_57f8_11_nf; +extern cpuop_func op_57f8_11_ff; +extern cpuop_func op_57f9_11_nf; +extern cpuop_func op_57f9_11_ff; +extern cpuop_func op_58c0_11_nf; +extern cpuop_func op_58c0_11_ff; +extern cpuop_func op_58c8_11_nf; +extern cpuop_func op_58c8_11_ff; +extern cpuop_func op_58d0_11_nf; +extern cpuop_func op_58d0_11_ff; +extern cpuop_func op_58d8_11_nf; +extern cpuop_func op_58d8_11_ff; +extern cpuop_func op_58e0_11_nf; +extern cpuop_func op_58e0_11_ff; +extern cpuop_func op_58e8_11_nf; +extern cpuop_func op_58e8_11_ff; +extern cpuop_func op_58f0_11_nf; +extern cpuop_func op_58f0_11_ff; +extern cpuop_func op_58f8_11_nf; +extern cpuop_func op_58f8_11_ff; +extern cpuop_func op_58f9_11_nf; +extern cpuop_func op_58f9_11_ff; +extern cpuop_func op_59c0_11_nf; +extern cpuop_func op_59c0_11_ff; +extern cpuop_func op_59c8_11_nf; +extern cpuop_func op_59c8_11_ff; +extern cpuop_func op_59d0_11_nf; +extern cpuop_func op_59d0_11_ff; +extern cpuop_func op_59d8_11_nf; +extern cpuop_func op_59d8_11_ff; +extern cpuop_func op_59e0_11_nf; +extern cpuop_func op_59e0_11_ff; +extern cpuop_func op_59e8_11_nf; +extern cpuop_func op_59e8_11_ff; +extern cpuop_func op_59f0_11_nf; +extern cpuop_func op_59f0_11_ff; +extern cpuop_func op_59f8_11_nf; +extern cpuop_func op_59f8_11_ff; +extern cpuop_func op_59f9_11_nf; +extern cpuop_func op_59f9_11_ff; +extern cpuop_func op_5ac0_11_nf; +extern cpuop_func op_5ac0_11_ff; +extern cpuop_func op_5ac8_11_nf; +extern cpuop_func op_5ac8_11_ff; +extern cpuop_func op_5ad0_11_nf; +extern cpuop_func op_5ad0_11_ff; +extern cpuop_func op_5ad8_11_nf; +extern cpuop_func op_5ad8_11_ff; +extern cpuop_func op_5ae0_11_nf; +extern cpuop_func op_5ae0_11_ff; +extern cpuop_func op_5ae8_11_nf; +extern cpuop_func op_5ae8_11_ff; +extern cpuop_func op_5af0_11_nf; +extern cpuop_func op_5af0_11_ff; +extern cpuop_func op_5af8_11_nf; +extern cpuop_func op_5af8_11_ff; +extern cpuop_func op_5af9_11_nf; +extern cpuop_func op_5af9_11_ff; +extern cpuop_func op_5bc0_11_nf; +extern cpuop_func op_5bc0_11_ff; +extern cpuop_func op_5bc8_11_nf; +extern cpuop_func op_5bc8_11_ff; +extern cpuop_func op_5bd0_11_nf; +extern cpuop_func op_5bd0_11_ff; +extern cpuop_func op_5bd8_11_nf; +extern cpuop_func op_5bd8_11_ff; +extern cpuop_func op_5be0_11_nf; +extern cpuop_func op_5be0_11_ff; +extern cpuop_func op_5be8_11_nf; +extern cpuop_func op_5be8_11_ff; +extern cpuop_func op_5bf0_11_nf; +extern cpuop_func op_5bf0_11_ff; +extern cpuop_func op_5bf8_11_nf; +extern cpuop_func op_5bf8_11_ff; +extern cpuop_func op_5bf9_11_nf; +extern cpuop_func op_5bf9_11_ff; +extern cpuop_func op_5cc0_11_nf; +extern cpuop_func op_5cc0_11_ff; +extern cpuop_func op_5cc8_11_nf; +extern cpuop_func op_5cc8_11_ff; +extern cpuop_func op_5cd0_11_nf; +extern cpuop_func op_5cd0_11_ff; +extern cpuop_func op_5cd8_11_nf; +extern cpuop_func op_5cd8_11_ff; +extern cpuop_func op_5ce0_11_nf; +extern cpuop_func op_5ce0_11_ff; +extern cpuop_func op_5ce8_11_nf; +extern cpuop_func op_5ce8_11_ff; +extern cpuop_func op_5cf0_11_nf; +extern cpuop_func op_5cf0_11_ff; +extern cpuop_func op_5cf8_11_nf; +extern cpuop_func op_5cf8_11_ff; +extern cpuop_func op_5cf9_11_nf; +extern cpuop_func op_5cf9_11_ff; +extern cpuop_func op_5dc0_11_nf; +extern cpuop_func op_5dc0_11_ff; +extern cpuop_func op_5dc8_11_nf; +extern cpuop_func op_5dc8_11_ff; +extern cpuop_func op_5dd0_11_nf; +extern cpuop_func op_5dd0_11_ff; +extern cpuop_func op_5dd8_11_nf; +extern cpuop_func op_5dd8_11_ff; +extern cpuop_func op_5de0_11_nf; +extern cpuop_func op_5de0_11_ff; +extern cpuop_func op_5de8_11_nf; +extern cpuop_func op_5de8_11_ff; +extern cpuop_func op_5df0_11_nf; +extern cpuop_func op_5df0_11_ff; +extern cpuop_func op_5df8_11_nf; +extern cpuop_func op_5df8_11_ff; +extern cpuop_func op_5df9_11_nf; +extern cpuop_func op_5df9_11_ff; +extern cpuop_func op_5ec0_11_nf; +extern cpuop_func op_5ec0_11_ff; +extern cpuop_func op_5ec8_11_nf; +extern cpuop_func op_5ec8_11_ff; +extern cpuop_func op_5ed0_11_nf; +extern cpuop_func op_5ed0_11_ff; +extern cpuop_func op_5ed8_11_nf; +extern cpuop_func op_5ed8_11_ff; +extern cpuop_func op_5ee0_11_nf; +extern cpuop_func op_5ee0_11_ff; +extern cpuop_func op_5ee8_11_nf; +extern cpuop_func op_5ee8_11_ff; +extern cpuop_func op_5ef0_11_nf; +extern cpuop_func op_5ef0_11_ff; +extern cpuop_func op_5ef8_11_nf; +extern cpuop_func op_5ef8_11_ff; +extern cpuop_func op_5ef9_11_nf; +extern cpuop_func op_5ef9_11_ff; +extern cpuop_func op_5fc0_11_nf; +extern cpuop_func op_5fc0_11_ff; +extern cpuop_func op_5fc8_11_nf; +extern cpuop_func op_5fc8_11_ff; +extern cpuop_func op_5fd0_11_nf; +extern cpuop_func op_5fd0_11_ff; +extern cpuop_func op_5fd8_11_nf; +extern cpuop_func op_5fd8_11_ff; +extern cpuop_func op_5fe0_11_nf; +extern cpuop_func op_5fe0_11_ff; +extern cpuop_func op_5fe8_11_nf; +extern cpuop_func op_5fe8_11_ff; +extern cpuop_func op_5ff0_11_nf; +extern cpuop_func op_5ff0_11_ff; +extern cpuop_func op_5ff8_11_nf; +extern cpuop_func op_5ff8_11_ff; +extern cpuop_func op_5ff9_11_nf; +extern cpuop_func op_5ff9_11_ff; +extern cpuop_func op_6000_11_nf; +extern cpuop_func op_6000_11_ff; +extern cpuop_func op_6001_11_nf; +extern cpuop_func op_6001_11_ff; +extern cpuop_func op_60ff_11_nf; +extern cpuop_func op_60ff_11_ff; +extern cpuop_func op_6100_11_nf; +extern cpuop_func op_6100_11_ff; +extern cpuop_func op_6101_11_nf; +extern cpuop_func op_6101_11_ff; +extern cpuop_func op_61ff_11_nf; +extern cpuop_func op_61ff_11_ff; +extern cpuop_func op_6200_11_nf; +extern cpuop_func op_6200_11_ff; +extern cpuop_func op_6201_11_nf; +extern cpuop_func op_6201_11_ff; +extern cpuop_func op_62ff_11_nf; +extern cpuop_func op_62ff_11_ff; +extern cpuop_func op_6300_11_nf; +extern cpuop_func op_6300_11_ff; +extern cpuop_func op_6301_11_nf; +extern cpuop_func op_6301_11_ff; +extern cpuop_func op_63ff_11_nf; +extern cpuop_func op_63ff_11_ff; +extern cpuop_func op_6400_11_nf; +extern cpuop_func op_6400_11_ff; +extern cpuop_func op_6401_11_nf; +extern cpuop_func op_6401_11_ff; +extern cpuop_func op_64ff_11_nf; +extern cpuop_func op_64ff_11_ff; +extern cpuop_func op_6500_11_nf; +extern cpuop_func op_6500_11_ff; +extern cpuop_func op_6501_11_nf; +extern cpuop_func op_6501_11_ff; +extern cpuop_func op_65ff_11_nf; +extern cpuop_func op_65ff_11_ff; +extern cpuop_func op_6600_11_nf; +extern cpuop_func op_6600_11_ff; +extern cpuop_func op_6601_11_nf; +extern cpuop_func op_6601_11_ff; +extern cpuop_func op_66ff_11_nf; +extern cpuop_func op_66ff_11_ff; +extern cpuop_func op_6700_11_nf; +extern cpuop_func op_6700_11_ff; +extern cpuop_func op_6701_11_nf; +extern cpuop_func op_6701_11_ff; +extern cpuop_func op_67ff_11_nf; +extern cpuop_func op_67ff_11_ff; +extern cpuop_func op_6800_11_nf; +extern cpuop_func op_6800_11_ff; +extern cpuop_func op_6801_11_nf; +extern cpuop_func op_6801_11_ff; +extern cpuop_func op_68ff_11_nf; +extern cpuop_func op_68ff_11_ff; +extern cpuop_func op_6900_11_nf; +extern cpuop_func op_6900_11_ff; +extern cpuop_func op_6901_11_nf; +extern cpuop_func op_6901_11_ff; +extern cpuop_func op_69ff_11_nf; +extern cpuop_func op_69ff_11_ff; +extern cpuop_func op_6a00_11_nf; +extern cpuop_func op_6a00_11_ff; +extern cpuop_func op_6a01_11_nf; +extern cpuop_func op_6a01_11_ff; +extern cpuop_func op_6aff_11_nf; +extern cpuop_func op_6aff_11_ff; +extern cpuop_func op_6b00_11_nf; +extern cpuop_func op_6b00_11_ff; +extern cpuop_func op_6b01_11_nf; +extern cpuop_func op_6b01_11_ff; +extern cpuop_func op_6bff_11_nf; +extern cpuop_func op_6bff_11_ff; +extern cpuop_func op_6c00_11_nf; +extern cpuop_func op_6c00_11_ff; +extern cpuop_func op_6c01_11_nf; +extern cpuop_func op_6c01_11_ff; +extern cpuop_func op_6cff_11_nf; +extern cpuop_func op_6cff_11_ff; +extern cpuop_func op_6d00_11_nf; +extern cpuop_func op_6d00_11_ff; +extern cpuop_func op_6d01_11_nf; +extern cpuop_func op_6d01_11_ff; +extern cpuop_func op_6dff_11_nf; +extern cpuop_func op_6dff_11_ff; +extern cpuop_func op_6e00_11_nf; +extern cpuop_func op_6e00_11_ff; +extern cpuop_func op_6e01_11_nf; +extern cpuop_func op_6e01_11_ff; +extern cpuop_func op_6eff_11_nf; +extern cpuop_func op_6eff_11_ff; +extern cpuop_func op_6f00_11_nf; +extern cpuop_func op_6f00_11_ff; +extern cpuop_func op_6f01_11_nf; +extern cpuop_func op_6f01_11_ff; +extern cpuop_func op_6fff_11_nf; +extern cpuop_func op_6fff_11_ff; +extern cpuop_func op_7000_11_nf; +extern cpuop_func op_7000_11_ff; +extern cpuop_func op_8000_11_nf; +extern cpuop_func op_8000_11_ff; +extern cpuop_func op_8010_11_nf; +extern cpuop_func op_8010_11_ff; +extern cpuop_func op_8018_11_nf; +extern cpuop_func op_8018_11_ff; +extern cpuop_func op_8020_11_nf; +extern cpuop_func op_8020_11_ff; +extern cpuop_func op_8028_11_nf; +extern cpuop_func op_8028_11_ff; +extern cpuop_func op_8030_11_nf; +extern cpuop_func op_8030_11_ff; +extern cpuop_func op_8038_11_nf; +extern cpuop_func op_8038_11_ff; +extern cpuop_func op_8039_11_nf; +extern cpuop_func op_8039_11_ff; +extern cpuop_func op_803a_11_nf; +extern cpuop_func op_803a_11_ff; +extern cpuop_func op_803b_11_nf; +extern cpuop_func op_803b_11_ff; +extern cpuop_func op_803c_11_nf; +extern cpuop_func op_803c_11_ff; +extern cpuop_func op_8040_11_nf; +extern cpuop_func op_8040_11_ff; +extern cpuop_func op_8050_11_nf; +extern cpuop_func op_8050_11_ff; +extern cpuop_func op_8058_11_nf; +extern cpuop_func op_8058_11_ff; +extern cpuop_func op_8060_11_nf; +extern cpuop_func op_8060_11_ff; +extern cpuop_func op_8068_11_nf; +extern cpuop_func op_8068_11_ff; +extern cpuop_func op_8070_11_nf; +extern cpuop_func op_8070_11_ff; +extern cpuop_func op_8078_11_nf; +extern cpuop_func op_8078_11_ff; +extern cpuop_func op_8079_11_nf; +extern cpuop_func op_8079_11_ff; +extern cpuop_func op_807a_11_nf; +extern cpuop_func op_807a_11_ff; +extern cpuop_func op_807b_11_nf; +extern cpuop_func op_807b_11_ff; +extern cpuop_func op_807c_11_nf; +extern cpuop_func op_807c_11_ff; +extern cpuop_func op_8080_11_nf; +extern cpuop_func op_8080_11_ff; +extern cpuop_func op_8090_11_nf; +extern cpuop_func op_8090_11_ff; +extern cpuop_func op_8098_11_nf; +extern cpuop_func op_8098_11_ff; +extern cpuop_func op_80a0_11_nf; +extern cpuop_func op_80a0_11_ff; +extern cpuop_func op_80a8_11_nf; +extern cpuop_func op_80a8_11_ff; +extern cpuop_func op_80b0_11_nf; +extern cpuop_func op_80b0_11_ff; +extern cpuop_func op_80b8_11_nf; +extern cpuop_func op_80b8_11_ff; +extern cpuop_func op_80b9_11_nf; +extern cpuop_func op_80b9_11_ff; +extern cpuop_func op_80ba_11_nf; +extern cpuop_func op_80ba_11_ff; +extern cpuop_func op_80bb_11_nf; +extern cpuop_func op_80bb_11_ff; +extern cpuop_func op_80bc_11_nf; +extern cpuop_func op_80bc_11_ff; +extern cpuop_func op_80c0_11_nf; +extern cpuop_func op_80c0_11_ff; +extern cpuop_func op_80d0_11_nf; +extern cpuop_func op_80d0_11_ff; +extern cpuop_func op_80d8_11_nf; +extern cpuop_func op_80d8_11_ff; +extern cpuop_func op_80e0_11_nf; +extern cpuop_func op_80e0_11_ff; +extern cpuop_func op_80e8_11_nf; +extern cpuop_func op_80e8_11_ff; +extern cpuop_func op_80f0_11_nf; +extern cpuop_func op_80f0_11_ff; +extern cpuop_func op_80f8_11_nf; +extern cpuop_func op_80f8_11_ff; +extern cpuop_func op_80f9_11_nf; +extern cpuop_func op_80f9_11_ff; +extern cpuop_func op_80fa_11_nf; +extern cpuop_func op_80fa_11_ff; +extern cpuop_func op_80fb_11_nf; +extern cpuop_func op_80fb_11_ff; +extern cpuop_func op_80fc_11_nf; +extern cpuop_func op_80fc_11_ff; +extern cpuop_func op_8100_11_nf; +extern cpuop_func op_8100_11_ff; +extern cpuop_func op_8108_11_nf; +extern cpuop_func op_8108_11_ff; +extern cpuop_func op_8110_11_nf; +extern cpuop_func op_8110_11_ff; +extern cpuop_func op_8118_11_nf; +extern cpuop_func op_8118_11_ff; +extern cpuop_func op_8120_11_nf; +extern cpuop_func op_8120_11_ff; +extern cpuop_func op_8128_11_nf; +extern cpuop_func op_8128_11_ff; +extern cpuop_func op_8130_11_nf; +extern cpuop_func op_8130_11_ff; +extern cpuop_func op_8138_11_nf; +extern cpuop_func op_8138_11_ff; +extern cpuop_func op_8139_11_nf; +extern cpuop_func op_8139_11_ff; +extern cpuop_func op_8150_11_nf; +extern cpuop_func op_8150_11_ff; +extern cpuop_func op_8158_11_nf; +extern cpuop_func op_8158_11_ff; +extern cpuop_func op_8160_11_nf; +extern cpuop_func op_8160_11_ff; +extern cpuop_func op_8168_11_nf; +extern cpuop_func op_8168_11_ff; +extern cpuop_func op_8170_11_nf; +extern cpuop_func op_8170_11_ff; +extern cpuop_func op_8178_11_nf; +extern cpuop_func op_8178_11_ff; +extern cpuop_func op_8179_11_nf; +extern cpuop_func op_8179_11_ff; +extern cpuop_func op_8190_11_nf; +extern cpuop_func op_8190_11_ff; +extern cpuop_func op_8198_11_nf; +extern cpuop_func op_8198_11_ff; +extern cpuop_func op_81a0_11_nf; +extern cpuop_func op_81a0_11_ff; +extern cpuop_func op_81a8_11_nf; +extern cpuop_func op_81a8_11_ff; +extern cpuop_func op_81b0_11_nf; +extern cpuop_func op_81b0_11_ff; +extern cpuop_func op_81b8_11_nf; +extern cpuop_func op_81b8_11_ff; +extern cpuop_func op_81b9_11_nf; +extern cpuop_func op_81b9_11_ff; +extern cpuop_func op_81c0_11_nf; +extern cpuop_func op_81c0_11_ff; +extern cpuop_func op_81d0_11_nf; +extern cpuop_func op_81d0_11_ff; +extern cpuop_func op_81d8_11_nf; +extern cpuop_func op_81d8_11_ff; +extern cpuop_func op_81e0_11_nf; +extern cpuop_func op_81e0_11_ff; +extern cpuop_func op_81e8_11_nf; +extern cpuop_func op_81e8_11_ff; +extern cpuop_func op_81f0_11_nf; +extern cpuop_func op_81f0_11_ff; +extern cpuop_func op_81f8_11_nf; +extern cpuop_func op_81f8_11_ff; +extern cpuop_func op_81f9_11_nf; +extern cpuop_func op_81f9_11_ff; +extern cpuop_func op_81fa_11_nf; +extern cpuop_func op_81fa_11_ff; +extern cpuop_func op_81fb_11_nf; +extern cpuop_func op_81fb_11_ff; +extern cpuop_func op_81fc_11_nf; +extern cpuop_func op_81fc_11_ff; +extern cpuop_func op_9000_11_nf; +extern cpuop_func op_9000_11_ff; +extern cpuop_func op_9010_11_nf; +extern cpuop_func op_9010_11_ff; +extern cpuop_func op_9018_11_nf; +extern cpuop_func op_9018_11_ff; +extern cpuop_func op_9020_11_nf; +extern cpuop_func op_9020_11_ff; +extern cpuop_func op_9028_11_nf; +extern cpuop_func op_9028_11_ff; +extern cpuop_func op_9030_11_nf; +extern cpuop_func op_9030_11_ff; +extern cpuop_func op_9038_11_nf; +extern cpuop_func op_9038_11_ff; +extern cpuop_func op_9039_11_nf; +extern cpuop_func op_9039_11_ff; +extern cpuop_func op_903a_11_nf; +extern cpuop_func op_903a_11_ff; +extern cpuop_func op_903b_11_nf; +extern cpuop_func op_903b_11_ff; +extern cpuop_func op_903c_11_nf; +extern cpuop_func op_903c_11_ff; +extern cpuop_func op_9040_11_nf; +extern cpuop_func op_9040_11_ff; +extern cpuop_func op_9048_11_nf; +extern cpuop_func op_9048_11_ff; +extern cpuop_func op_9050_11_nf; +extern cpuop_func op_9050_11_ff; +extern cpuop_func op_9058_11_nf; +extern cpuop_func op_9058_11_ff; +extern cpuop_func op_9060_11_nf; +extern cpuop_func op_9060_11_ff; +extern cpuop_func op_9068_11_nf; +extern cpuop_func op_9068_11_ff; +extern cpuop_func op_9070_11_nf; +extern cpuop_func op_9070_11_ff; +extern cpuop_func op_9078_11_nf; +extern cpuop_func op_9078_11_ff; +extern cpuop_func op_9079_11_nf; +extern cpuop_func op_9079_11_ff; +extern cpuop_func op_907a_11_nf; +extern cpuop_func op_907a_11_ff; +extern cpuop_func op_907b_11_nf; +extern cpuop_func op_907b_11_ff; +extern cpuop_func op_907c_11_nf; +extern cpuop_func op_907c_11_ff; +extern cpuop_func op_9080_11_nf; +extern cpuop_func op_9080_11_ff; +extern cpuop_func op_9088_11_nf; +extern cpuop_func op_9088_11_ff; +extern cpuop_func op_9090_11_nf; +extern cpuop_func op_9090_11_ff; +extern cpuop_func op_9098_11_nf; +extern cpuop_func op_9098_11_ff; +extern cpuop_func op_90a0_11_nf; +extern cpuop_func op_90a0_11_ff; +extern cpuop_func op_90a8_11_nf; +extern cpuop_func op_90a8_11_ff; +extern cpuop_func op_90b0_11_nf; +extern cpuop_func op_90b0_11_ff; +extern cpuop_func op_90b8_11_nf; +extern cpuop_func op_90b8_11_ff; +extern cpuop_func op_90b9_11_nf; +extern cpuop_func op_90b9_11_ff; +extern cpuop_func op_90ba_11_nf; +extern cpuop_func op_90ba_11_ff; +extern cpuop_func op_90bb_11_nf; +extern cpuop_func op_90bb_11_ff; +extern cpuop_func op_90bc_11_nf; +extern cpuop_func op_90bc_11_ff; +extern cpuop_func op_90c0_11_nf; +extern cpuop_func op_90c0_11_ff; +extern cpuop_func op_90c8_11_nf; +extern cpuop_func op_90c8_11_ff; +extern cpuop_func op_90d0_11_nf; +extern cpuop_func op_90d0_11_ff; +extern cpuop_func op_90d8_11_nf; +extern cpuop_func op_90d8_11_ff; +extern cpuop_func op_90e0_11_nf; +extern cpuop_func op_90e0_11_ff; +extern cpuop_func op_90e8_11_nf; +extern cpuop_func op_90e8_11_ff; +extern cpuop_func op_90f0_11_nf; +extern cpuop_func op_90f0_11_ff; +extern cpuop_func op_90f8_11_nf; +extern cpuop_func op_90f8_11_ff; +extern cpuop_func op_90f9_11_nf; +extern cpuop_func op_90f9_11_ff; +extern cpuop_func op_90fa_11_nf; +extern cpuop_func op_90fa_11_ff; +extern cpuop_func op_90fb_11_nf; +extern cpuop_func op_90fb_11_ff; +extern cpuop_func op_90fc_11_nf; +extern cpuop_func op_90fc_11_ff; +extern cpuop_func op_9100_11_nf; +extern cpuop_func op_9100_11_ff; +extern cpuop_func op_9108_11_nf; +extern cpuop_func op_9108_11_ff; +extern cpuop_func op_9110_11_nf; +extern cpuop_func op_9110_11_ff; +extern cpuop_func op_9118_11_nf; +extern cpuop_func op_9118_11_ff; +extern cpuop_func op_9120_11_nf; +extern cpuop_func op_9120_11_ff; +extern cpuop_func op_9128_11_nf; +extern cpuop_func op_9128_11_ff; +extern cpuop_func op_9130_11_nf; +extern cpuop_func op_9130_11_ff; +extern cpuop_func op_9138_11_nf; +extern cpuop_func op_9138_11_ff; +extern cpuop_func op_9139_11_nf; +extern cpuop_func op_9139_11_ff; +extern cpuop_func op_9140_11_nf; +extern cpuop_func op_9140_11_ff; +extern cpuop_func op_9148_11_nf; +extern cpuop_func op_9148_11_ff; +extern cpuop_func op_9150_11_nf; +extern cpuop_func op_9150_11_ff; +extern cpuop_func op_9158_11_nf; +extern cpuop_func op_9158_11_ff; +extern cpuop_func op_9160_11_nf; +extern cpuop_func op_9160_11_ff; +extern cpuop_func op_9168_11_nf; +extern cpuop_func op_9168_11_ff; +extern cpuop_func op_9170_11_nf; +extern cpuop_func op_9170_11_ff; +extern cpuop_func op_9178_11_nf; +extern cpuop_func op_9178_11_ff; +extern cpuop_func op_9179_11_nf; +extern cpuop_func op_9179_11_ff; +extern cpuop_func op_9180_11_nf; +extern cpuop_func op_9180_11_ff; +extern cpuop_func op_9188_11_nf; +extern cpuop_func op_9188_11_ff; +extern cpuop_func op_9190_11_nf; +extern cpuop_func op_9190_11_ff; +extern cpuop_func op_9198_11_nf; +extern cpuop_func op_9198_11_ff; +extern cpuop_func op_91a0_11_nf; +extern cpuop_func op_91a0_11_ff; +extern cpuop_func op_91a8_11_nf; +extern cpuop_func op_91a8_11_ff; +extern cpuop_func op_91b0_11_nf; +extern cpuop_func op_91b0_11_ff; +extern cpuop_func op_91b8_11_nf; +extern cpuop_func op_91b8_11_ff; +extern cpuop_func op_91b9_11_nf; +extern cpuop_func op_91b9_11_ff; +extern cpuop_func op_91c0_11_nf; +extern cpuop_func op_91c0_11_ff; +extern cpuop_func op_91c8_11_nf; +extern cpuop_func op_91c8_11_ff; +extern cpuop_func op_91d0_11_nf; +extern cpuop_func op_91d0_11_ff; +extern cpuop_func op_91d8_11_nf; +extern cpuop_func op_91d8_11_ff; +extern cpuop_func op_91e0_11_nf; +extern cpuop_func op_91e0_11_ff; +extern cpuop_func op_91e8_11_nf; +extern cpuop_func op_91e8_11_ff; +extern cpuop_func op_91f0_11_nf; +extern cpuop_func op_91f0_11_ff; +extern cpuop_func op_91f8_11_nf; +extern cpuop_func op_91f8_11_ff; +extern cpuop_func op_91f9_11_nf; +extern cpuop_func op_91f9_11_ff; +extern cpuop_func op_91fa_11_nf; +extern cpuop_func op_91fa_11_ff; +extern cpuop_func op_91fb_11_nf; +extern cpuop_func op_91fb_11_ff; +extern cpuop_func op_91fc_11_nf; +extern cpuop_func op_91fc_11_ff; +extern cpuop_func op_b000_11_nf; +extern cpuop_func op_b000_11_ff; +extern cpuop_func op_b010_11_nf; +extern cpuop_func op_b010_11_ff; +extern cpuop_func op_b018_11_nf; +extern cpuop_func op_b018_11_ff; +extern cpuop_func op_b020_11_nf; +extern cpuop_func op_b020_11_ff; +extern cpuop_func op_b028_11_nf; +extern cpuop_func op_b028_11_ff; +extern cpuop_func op_b030_11_nf; +extern cpuop_func op_b030_11_ff; +extern cpuop_func op_b038_11_nf; +extern cpuop_func op_b038_11_ff; +extern cpuop_func op_b039_11_nf; +extern cpuop_func op_b039_11_ff; +extern cpuop_func op_b03a_11_nf; +extern cpuop_func op_b03a_11_ff; +extern cpuop_func op_b03b_11_nf; +extern cpuop_func op_b03b_11_ff; +extern cpuop_func op_b03c_11_nf; +extern cpuop_func op_b03c_11_ff; +extern cpuop_func op_b040_11_nf; +extern cpuop_func op_b040_11_ff; +extern cpuop_func op_b048_11_nf; +extern cpuop_func op_b048_11_ff; +extern cpuop_func op_b050_11_nf; +extern cpuop_func op_b050_11_ff; +extern cpuop_func op_b058_11_nf; +extern cpuop_func op_b058_11_ff; +extern cpuop_func op_b060_11_nf; +extern cpuop_func op_b060_11_ff; +extern cpuop_func op_b068_11_nf; +extern cpuop_func op_b068_11_ff; +extern cpuop_func op_b070_11_nf; +extern cpuop_func op_b070_11_ff; +extern cpuop_func op_b078_11_nf; +extern cpuop_func op_b078_11_ff; +extern cpuop_func op_b079_11_nf; +extern cpuop_func op_b079_11_ff; +extern cpuop_func op_b07a_11_nf; +extern cpuop_func op_b07a_11_ff; +extern cpuop_func op_b07b_11_nf; +extern cpuop_func op_b07b_11_ff; +extern cpuop_func op_b07c_11_nf; +extern cpuop_func op_b07c_11_ff; +extern cpuop_func op_b080_11_nf; +extern cpuop_func op_b080_11_ff; +extern cpuop_func op_b088_11_nf; +extern cpuop_func op_b088_11_ff; +extern cpuop_func op_b090_11_nf; +extern cpuop_func op_b090_11_ff; +extern cpuop_func op_b098_11_nf; +extern cpuop_func op_b098_11_ff; +extern cpuop_func op_b0a0_11_nf; +extern cpuop_func op_b0a0_11_ff; +extern cpuop_func op_b0a8_11_nf; +extern cpuop_func op_b0a8_11_ff; +extern cpuop_func op_b0b0_11_nf; +extern cpuop_func op_b0b0_11_ff; +extern cpuop_func op_b0b8_11_nf; +extern cpuop_func op_b0b8_11_ff; +extern cpuop_func op_b0b9_11_nf; +extern cpuop_func op_b0b9_11_ff; +extern cpuop_func op_b0ba_11_nf; +extern cpuop_func op_b0ba_11_ff; +extern cpuop_func op_b0bb_11_nf; +extern cpuop_func op_b0bb_11_ff; +extern cpuop_func op_b0bc_11_nf; +extern cpuop_func op_b0bc_11_ff; +extern cpuop_func op_b0c0_11_nf; +extern cpuop_func op_b0c0_11_ff; +extern cpuop_func op_b0c8_11_nf; +extern cpuop_func op_b0c8_11_ff; +extern cpuop_func op_b0d0_11_nf; +extern cpuop_func op_b0d0_11_ff; +extern cpuop_func op_b0d8_11_nf; +extern cpuop_func op_b0d8_11_ff; +extern cpuop_func op_b0e0_11_nf; +extern cpuop_func op_b0e0_11_ff; +extern cpuop_func op_b0e8_11_nf; +extern cpuop_func op_b0e8_11_ff; +extern cpuop_func op_b0f0_11_nf; +extern cpuop_func op_b0f0_11_ff; +extern cpuop_func op_b0f8_11_nf; +extern cpuop_func op_b0f8_11_ff; +extern cpuop_func op_b0f9_11_nf; +extern cpuop_func op_b0f9_11_ff; +extern cpuop_func op_b0fa_11_nf; +extern cpuop_func op_b0fa_11_ff; +extern cpuop_func op_b0fb_11_nf; +extern cpuop_func op_b0fb_11_ff; +extern cpuop_func op_b0fc_11_nf; +extern cpuop_func op_b0fc_11_ff; +extern cpuop_func op_b100_11_nf; +extern cpuop_func op_b100_11_ff; +extern cpuop_func op_b108_11_nf; +extern cpuop_func op_b108_11_ff; +extern cpuop_func op_b110_11_nf; +extern cpuop_func op_b110_11_ff; +extern cpuop_func op_b118_11_nf; +extern cpuop_func op_b118_11_ff; +extern cpuop_func op_b120_11_nf; +extern cpuop_func op_b120_11_ff; +extern cpuop_func op_b128_11_nf; +extern cpuop_func op_b128_11_ff; +extern cpuop_func op_b130_11_nf; +extern cpuop_func op_b130_11_ff; +extern cpuop_func op_b138_11_nf; +extern cpuop_func op_b138_11_ff; +extern cpuop_func op_b139_11_nf; +extern cpuop_func op_b139_11_ff; +extern cpuop_func op_b140_11_nf; +extern cpuop_func op_b140_11_ff; +extern cpuop_func op_b148_11_nf; +extern cpuop_func op_b148_11_ff; +extern cpuop_func op_b150_11_nf; +extern cpuop_func op_b150_11_ff; +extern cpuop_func op_b158_11_nf; +extern cpuop_func op_b158_11_ff; +extern cpuop_func op_b160_11_nf; +extern cpuop_func op_b160_11_ff; +extern cpuop_func op_b168_11_nf; +extern cpuop_func op_b168_11_ff; +extern cpuop_func op_b170_11_nf; +extern cpuop_func op_b170_11_ff; +extern cpuop_func op_b178_11_nf; +extern cpuop_func op_b178_11_ff; +extern cpuop_func op_b179_11_nf; +extern cpuop_func op_b179_11_ff; +extern cpuop_func op_b180_11_nf; +extern cpuop_func op_b180_11_ff; +extern cpuop_func op_b188_11_nf; +extern cpuop_func op_b188_11_ff; +extern cpuop_func op_b190_11_nf; +extern cpuop_func op_b190_11_ff; +extern cpuop_func op_b198_11_nf; +extern cpuop_func op_b198_11_ff; +extern cpuop_func op_b1a0_11_nf; +extern cpuop_func op_b1a0_11_ff; +extern cpuop_func op_b1a8_11_nf; +extern cpuop_func op_b1a8_11_ff; +extern cpuop_func op_b1b0_11_nf; +extern cpuop_func op_b1b0_11_ff; +extern cpuop_func op_b1b8_11_nf; +extern cpuop_func op_b1b8_11_ff; +extern cpuop_func op_b1b9_11_nf; +extern cpuop_func op_b1b9_11_ff; +extern cpuop_func op_b1c0_11_nf; +extern cpuop_func op_b1c0_11_ff; +extern cpuop_func op_b1c8_11_nf; +extern cpuop_func op_b1c8_11_ff; +extern cpuop_func op_b1d0_11_nf; +extern cpuop_func op_b1d0_11_ff; +extern cpuop_func op_b1d8_11_nf; +extern cpuop_func op_b1d8_11_ff; +extern cpuop_func op_b1e0_11_nf; +extern cpuop_func op_b1e0_11_ff; +extern cpuop_func op_b1e8_11_nf; +extern cpuop_func op_b1e8_11_ff; +extern cpuop_func op_b1f0_11_nf; +extern cpuop_func op_b1f0_11_ff; +extern cpuop_func op_b1f8_11_nf; +extern cpuop_func op_b1f8_11_ff; +extern cpuop_func op_b1f9_11_nf; +extern cpuop_func op_b1f9_11_ff; +extern cpuop_func op_b1fa_11_nf; +extern cpuop_func op_b1fa_11_ff; +extern cpuop_func op_b1fb_11_nf; +extern cpuop_func op_b1fb_11_ff; +extern cpuop_func op_b1fc_11_nf; +extern cpuop_func op_b1fc_11_ff; +extern cpuop_func op_c000_11_nf; +extern cpuop_func op_c000_11_ff; +extern cpuop_func op_c010_11_nf; +extern cpuop_func op_c010_11_ff; +extern cpuop_func op_c018_11_nf; +extern cpuop_func op_c018_11_ff; +extern cpuop_func op_c020_11_nf; +extern cpuop_func op_c020_11_ff; +extern cpuop_func op_c028_11_nf; +extern cpuop_func op_c028_11_ff; +extern cpuop_func op_c030_11_nf; +extern cpuop_func op_c030_11_ff; +extern cpuop_func op_c038_11_nf; +extern cpuop_func op_c038_11_ff; +extern cpuop_func op_c039_11_nf; +extern cpuop_func op_c039_11_ff; +extern cpuop_func op_c03a_11_nf; +extern cpuop_func op_c03a_11_ff; +extern cpuop_func op_c03b_11_nf; +extern cpuop_func op_c03b_11_ff; +extern cpuop_func op_c03c_11_nf; +extern cpuop_func op_c03c_11_ff; +extern cpuop_func op_c040_11_nf; +extern cpuop_func op_c040_11_ff; +extern cpuop_func op_c050_11_nf; +extern cpuop_func op_c050_11_ff; +extern cpuop_func op_c058_11_nf; +extern cpuop_func op_c058_11_ff; +extern cpuop_func op_c060_11_nf; +extern cpuop_func op_c060_11_ff; +extern cpuop_func op_c068_11_nf; +extern cpuop_func op_c068_11_ff; +extern cpuop_func op_c070_11_nf; +extern cpuop_func op_c070_11_ff; +extern cpuop_func op_c078_11_nf; +extern cpuop_func op_c078_11_ff; +extern cpuop_func op_c079_11_nf; +extern cpuop_func op_c079_11_ff; +extern cpuop_func op_c07a_11_nf; +extern cpuop_func op_c07a_11_ff; +extern cpuop_func op_c07b_11_nf; +extern cpuop_func op_c07b_11_ff; +extern cpuop_func op_c07c_11_nf; +extern cpuop_func op_c07c_11_ff; +extern cpuop_func op_c080_11_nf; +extern cpuop_func op_c080_11_ff; +extern cpuop_func op_c090_11_nf; +extern cpuop_func op_c090_11_ff; +extern cpuop_func op_c098_11_nf; +extern cpuop_func op_c098_11_ff; +extern cpuop_func op_c0a0_11_nf; +extern cpuop_func op_c0a0_11_ff; +extern cpuop_func op_c0a8_11_nf; +extern cpuop_func op_c0a8_11_ff; +extern cpuop_func op_c0b0_11_nf; +extern cpuop_func op_c0b0_11_ff; +extern cpuop_func op_c0b8_11_nf; +extern cpuop_func op_c0b8_11_ff; +extern cpuop_func op_c0b9_11_nf; +extern cpuop_func op_c0b9_11_ff; +extern cpuop_func op_c0ba_11_nf; +extern cpuop_func op_c0ba_11_ff; +extern cpuop_func op_c0bb_11_nf; +extern cpuop_func op_c0bb_11_ff; +extern cpuop_func op_c0bc_11_nf; +extern cpuop_func op_c0bc_11_ff; +extern cpuop_func op_c0c0_11_nf; +extern cpuop_func op_c0c0_11_ff; +extern cpuop_func op_c0d0_11_nf; +extern cpuop_func op_c0d0_11_ff; +extern cpuop_func op_c0d8_11_nf; +extern cpuop_func op_c0d8_11_ff; +extern cpuop_func op_c0e0_11_nf; +extern cpuop_func op_c0e0_11_ff; +extern cpuop_func op_c0e8_11_nf; +extern cpuop_func op_c0e8_11_ff; +extern cpuop_func op_c0f0_11_nf; +extern cpuop_func op_c0f0_11_ff; +extern cpuop_func op_c0f8_11_nf; +extern cpuop_func op_c0f8_11_ff; +extern cpuop_func op_c0f9_11_nf; +extern cpuop_func op_c0f9_11_ff; +extern cpuop_func op_c0fa_11_nf; +extern cpuop_func op_c0fa_11_ff; +extern cpuop_func op_c0fb_11_nf; +extern cpuop_func op_c0fb_11_ff; +extern cpuop_func op_c0fc_11_nf; +extern cpuop_func op_c0fc_11_ff; +extern cpuop_func op_c100_11_nf; +extern cpuop_func op_c100_11_ff; +extern cpuop_func op_c108_11_nf; +extern cpuop_func op_c108_11_ff; +extern cpuop_func op_c110_11_nf; +extern cpuop_func op_c110_11_ff; +extern cpuop_func op_c118_11_nf; +extern cpuop_func op_c118_11_ff; +extern cpuop_func op_c120_11_nf; +extern cpuop_func op_c120_11_ff; +extern cpuop_func op_c128_11_nf; +extern cpuop_func op_c128_11_ff; +extern cpuop_func op_c130_11_nf; +extern cpuop_func op_c130_11_ff; +extern cpuop_func op_c138_11_nf; +extern cpuop_func op_c138_11_ff; +extern cpuop_func op_c139_11_nf; +extern cpuop_func op_c139_11_ff; +extern cpuop_func op_c140_11_nf; +extern cpuop_func op_c140_11_ff; +extern cpuop_func op_c148_11_nf; +extern cpuop_func op_c148_11_ff; +extern cpuop_func op_c150_11_nf; +extern cpuop_func op_c150_11_ff; +extern cpuop_func op_c158_11_nf; +extern cpuop_func op_c158_11_ff; +extern cpuop_func op_c160_11_nf; +extern cpuop_func op_c160_11_ff; +extern cpuop_func op_c168_11_nf; +extern cpuop_func op_c168_11_ff; +extern cpuop_func op_c170_11_nf; +extern cpuop_func op_c170_11_ff; +extern cpuop_func op_c178_11_nf; +extern cpuop_func op_c178_11_ff; +extern cpuop_func op_c179_11_nf; +extern cpuop_func op_c179_11_ff; +extern cpuop_func op_c188_11_nf; +extern cpuop_func op_c188_11_ff; +extern cpuop_func op_c190_11_nf; +extern cpuop_func op_c190_11_ff; +extern cpuop_func op_c198_11_nf; +extern cpuop_func op_c198_11_ff; +extern cpuop_func op_c1a0_11_nf; +extern cpuop_func op_c1a0_11_ff; +extern cpuop_func op_c1a8_11_nf; +extern cpuop_func op_c1a8_11_ff; +extern cpuop_func op_c1b0_11_nf; +extern cpuop_func op_c1b0_11_ff; +extern cpuop_func op_c1b8_11_nf; +extern cpuop_func op_c1b8_11_ff; +extern cpuop_func op_c1b9_11_nf; +extern cpuop_func op_c1b9_11_ff; +extern cpuop_func op_c1c0_11_nf; +extern cpuop_func op_c1c0_11_ff; +extern cpuop_func op_c1d0_11_nf; +extern cpuop_func op_c1d0_11_ff; +extern cpuop_func op_c1d8_11_nf; +extern cpuop_func op_c1d8_11_ff; +extern cpuop_func op_c1e0_11_nf; +extern cpuop_func op_c1e0_11_ff; +extern cpuop_func op_c1e8_11_nf; +extern cpuop_func op_c1e8_11_ff; +extern cpuop_func op_c1f0_11_nf; +extern cpuop_func op_c1f0_11_ff; +extern cpuop_func op_c1f8_11_nf; +extern cpuop_func op_c1f8_11_ff; +extern cpuop_func op_c1f9_11_nf; +extern cpuop_func op_c1f9_11_ff; +extern cpuop_func op_c1fa_11_nf; +extern cpuop_func op_c1fa_11_ff; +extern cpuop_func op_c1fb_11_nf; +extern cpuop_func op_c1fb_11_ff; +extern cpuop_func op_c1fc_11_nf; +extern cpuop_func op_c1fc_11_ff; +extern cpuop_func op_d000_11_nf; +extern cpuop_func op_d000_11_ff; +extern cpuop_func op_d010_11_nf; +extern cpuop_func op_d010_11_ff; +extern cpuop_func op_d018_11_nf; +extern cpuop_func op_d018_11_ff; +extern cpuop_func op_d020_11_nf; +extern cpuop_func op_d020_11_ff; +extern cpuop_func op_d028_11_nf; +extern cpuop_func op_d028_11_ff; +extern cpuop_func op_d030_11_nf; +extern cpuop_func op_d030_11_ff; +extern cpuop_func op_d038_11_nf; +extern cpuop_func op_d038_11_ff; +extern cpuop_func op_d039_11_nf; +extern cpuop_func op_d039_11_ff; +extern cpuop_func op_d03a_11_nf; +extern cpuop_func op_d03a_11_ff; +extern cpuop_func op_d03b_11_nf; +extern cpuop_func op_d03b_11_ff; +extern cpuop_func op_d03c_11_nf; +extern cpuop_func op_d03c_11_ff; +extern cpuop_func op_d040_11_nf; +extern cpuop_func op_d040_11_ff; +extern cpuop_func op_d048_11_nf; +extern cpuop_func op_d048_11_ff; +extern cpuop_func op_d050_11_nf; +extern cpuop_func op_d050_11_ff; +extern cpuop_func op_d058_11_nf; +extern cpuop_func op_d058_11_ff; +extern cpuop_func op_d060_11_nf; +extern cpuop_func op_d060_11_ff; +extern cpuop_func op_d068_11_nf; +extern cpuop_func op_d068_11_ff; +extern cpuop_func op_d070_11_nf; +extern cpuop_func op_d070_11_ff; +extern cpuop_func op_d078_11_nf; +extern cpuop_func op_d078_11_ff; +extern cpuop_func op_d079_11_nf; +extern cpuop_func op_d079_11_ff; +extern cpuop_func op_d07a_11_nf; +extern cpuop_func op_d07a_11_ff; +extern cpuop_func op_d07b_11_nf; +extern cpuop_func op_d07b_11_ff; +extern cpuop_func op_d07c_11_nf; +extern cpuop_func op_d07c_11_ff; +extern cpuop_func op_d080_11_nf; +extern cpuop_func op_d080_11_ff; +extern cpuop_func op_d088_11_nf; +extern cpuop_func op_d088_11_ff; +extern cpuop_func op_d090_11_nf; +extern cpuop_func op_d090_11_ff; +extern cpuop_func op_d098_11_nf; +extern cpuop_func op_d098_11_ff; +extern cpuop_func op_d0a0_11_nf; +extern cpuop_func op_d0a0_11_ff; +extern cpuop_func op_d0a8_11_nf; +extern cpuop_func op_d0a8_11_ff; +extern cpuop_func op_d0b0_11_nf; +extern cpuop_func op_d0b0_11_ff; +extern cpuop_func op_d0b8_11_nf; +extern cpuop_func op_d0b8_11_ff; +extern cpuop_func op_d0b9_11_nf; +extern cpuop_func op_d0b9_11_ff; +extern cpuop_func op_d0ba_11_nf; +extern cpuop_func op_d0ba_11_ff; +extern cpuop_func op_d0bb_11_nf; +extern cpuop_func op_d0bb_11_ff; +extern cpuop_func op_d0bc_11_nf; +extern cpuop_func op_d0bc_11_ff; +extern cpuop_func op_d0c0_11_nf; +extern cpuop_func op_d0c0_11_ff; +extern cpuop_func op_d0c8_11_nf; +extern cpuop_func op_d0c8_11_ff; +extern cpuop_func op_d0d0_11_nf; +extern cpuop_func op_d0d0_11_ff; +extern cpuop_func op_d0d8_11_nf; +extern cpuop_func op_d0d8_11_ff; +extern cpuop_func op_d0e0_11_nf; +extern cpuop_func op_d0e0_11_ff; +extern cpuop_func op_d0e8_11_nf; +extern cpuop_func op_d0e8_11_ff; +extern cpuop_func op_d0f0_11_nf; +extern cpuop_func op_d0f0_11_ff; +extern cpuop_func op_d0f8_11_nf; +extern cpuop_func op_d0f8_11_ff; +extern cpuop_func op_d0f9_11_nf; +extern cpuop_func op_d0f9_11_ff; +extern cpuop_func op_d0fa_11_nf; +extern cpuop_func op_d0fa_11_ff; +extern cpuop_func op_d0fb_11_nf; +extern cpuop_func op_d0fb_11_ff; +extern cpuop_func op_d0fc_11_nf; +extern cpuop_func op_d0fc_11_ff; +extern cpuop_func op_d100_11_nf; +extern cpuop_func op_d100_11_ff; +extern cpuop_func op_d108_11_nf; +extern cpuop_func op_d108_11_ff; +extern cpuop_func op_d110_11_nf; +extern cpuop_func op_d110_11_ff; +extern cpuop_func op_d118_11_nf; +extern cpuop_func op_d118_11_ff; +extern cpuop_func op_d120_11_nf; +extern cpuop_func op_d120_11_ff; +extern cpuop_func op_d128_11_nf; +extern cpuop_func op_d128_11_ff; +extern cpuop_func op_d130_11_nf; +extern cpuop_func op_d130_11_ff; +extern cpuop_func op_d138_11_nf; +extern cpuop_func op_d138_11_ff; +extern cpuop_func op_d139_11_nf; +extern cpuop_func op_d139_11_ff; +extern cpuop_func op_d140_11_nf; +extern cpuop_func op_d140_11_ff; +extern cpuop_func op_d148_11_nf; +extern cpuop_func op_d148_11_ff; +extern cpuop_func op_d150_11_nf; +extern cpuop_func op_d150_11_ff; +extern cpuop_func op_d158_11_nf; +extern cpuop_func op_d158_11_ff; +extern cpuop_func op_d160_11_nf; +extern cpuop_func op_d160_11_ff; +extern cpuop_func op_d168_11_nf; +extern cpuop_func op_d168_11_ff; +extern cpuop_func op_d170_11_nf; +extern cpuop_func op_d170_11_ff; +extern cpuop_func op_d178_11_nf; +extern cpuop_func op_d178_11_ff; +extern cpuop_func op_d179_11_nf; +extern cpuop_func op_d179_11_ff; +extern cpuop_func op_d180_11_nf; +extern cpuop_func op_d180_11_ff; +extern cpuop_func op_d188_11_nf; +extern cpuop_func op_d188_11_ff; +extern cpuop_func op_d190_11_nf; +extern cpuop_func op_d190_11_ff; +extern cpuop_func op_d198_11_nf; +extern cpuop_func op_d198_11_ff; +extern cpuop_func op_d1a0_11_nf; +extern cpuop_func op_d1a0_11_ff; +extern cpuop_func op_d1a8_11_nf; +extern cpuop_func op_d1a8_11_ff; +extern cpuop_func op_d1b0_11_nf; +extern cpuop_func op_d1b0_11_ff; +extern cpuop_func op_d1b8_11_nf; +extern cpuop_func op_d1b8_11_ff; +extern cpuop_func op_d1b9_11_nf; +extern cpuop_func op_d1b9_11_ff; +extern cpuop_func op_d1c0_11_nf; +extern cpuop_func op_d1c0_11_ff; +extern cpuop_func op_d1c8_11_nf; +extern cpuop_func op_d1c8_11_ff; +extern cpuop_func op_d1d0_11_nf; +extern cpuop_func op_d1d0_11_ff; +extern cpuop_func op_d1d8_11_nf; +extern cpuop_func op_d1d8_11_ff; +extern cpuop_func op_d1e0_11_nf; +extern cpuop_func op_d1e0_11_ff; +extern cpuop_func op_d1e8_11_nf; +extern cpuop_func op_d1e8_11_ff; +extern cpuop_func op_d1f0_11_nf; +extern cpuop_func op_d1f0_11_ff; +extern cpuop_func op_d1f8_11_nf; +extern cpuop_func op_d1f8_11_ff; +extern cpuop_func op_d1f9_11_nf; +extern cpuop_func op_d1f9_11_ff; +extern cpuop_func op_d1fa_11_nf; +extern cpuop_func op_d1fa_11_ff; +extern cpuop_func op_d1fb_11_nf; +extern cpuop_func op_d1fb_11_ff; +extern cpuop_func op_d1fc_11_nf; +extern cpuop_func op_d1fc_11_ff; +extern cpuop_func op_e000_11_nf; +extern cpuop_func op_e000_11_ff; +extern cpuop_func op_e008_11_nf; +extern cpuop_func op_e008_11_ff; +extern cpuop_func op_e010_11_nf; +extern cpuop_func op_e010_11_ff; +extern cpuop_func op_e018_11_nf; +extern cpuop_func op_e018_11_ff; +extern cpuop_func op_e020_11_nf; +extern cpuop_func op_e020_11_ff; +extern cpuop_func op_e028_11_nf; +extern cpuop_func op_e028_11_ff; +extern cpuop_func op_e030_11_nf; +extern cpuop_func op_e030_11_ff; +extern cpuop_func op_e038_11_nf; +extern cpuop_func op_e038_11_ff; +extern cpuop_func op_e040_11_nf; +extern cpuop_func op_e040_11_ff; +extern cpuop_func op_e048_11_nf; +extern cpuop_func op_e048_11_ff; +extern cpuop_func op_e050_11_nf; +extern cpuop_func op_e050_11_ff; +extern cpuop_func op_e058_11_nf; +extern cpuop_func op_e058_11_ff; +extern cpuop_func op_e060_11_nf; +extern cpuop_func op_e060_11_ff; +extern cpuop_func op_e068_11_nf; +extern cpuop_func op_e068_11_ff; +extern cpuop_func op_e070_11_nf; +extern cpuop_func op_e070_11_ff; +extern cpuop_func op_e078_11_nf; +extern cpuop_func op_e078_11_ff; +extern cpuop_func op_e080_11_nf; +extern cpuop_func op_e080_11_ff; +extern cpuop_func op_e088_11_nf; +extern cpuop_func op_e088_11_ff; +extern cpuop_func op_e090_11_nf; +extern cpuop_func op_e090_11_ff; +extern cpuop_func op_e098_11_nf; +extern cpuop_func op_e098_11_ff; +extern cpuop_func op_e0a0_11_nf; +extern cpuop_func op_e0a0_11_ff; +extern cpuop_func op_e0a8_11_nf; +extern cpuop_func op_e0a8_11_ff; +extern cpuop_func op_e0b0_11_nf; +extern cpuop_func op_e0b0_11_ff; +extern cpuop_func op_e0b8_11_nf; +extern cpuop_func op_e0b8_11_ff; +extern cpuop_func op_e0d0_11_nf; +extern cpuop_func op_e0d0_11_ff; +extern cpuop_func op_e0d8_11_nf; +extern cpuop_func op_e0d8_11_ff; +extern cpuop_func op_e0e0_11_nf; +extern cpuop_func op_e0e0_11_ff; +extern cpuop_func op_e0e8_11_nf; +extern cpuop_func op_e0e8_11_ff; +extern cpuop_func op_e0f0_11_nf; +extern cpuop_func op_e0f0_11_ff; +extern cpuop_func op_e0f8_11_nf; +extern cpuop_func op_e0f8_11_ff; +extern cpuop_func op_e0f9_11_nf; +extern cpuop_func op_e0f9_11_ff; +extern cpuop_func op_e100_11_nf; +extern cpuop_func op_e100_11_ff; +extern cpuop_func op_e108_11_nf; +extern cpuop_func op_e108_11_ff; +extern cpuop_func op_e110_11_nf; +extern cpuop_func op_e110_11_ff; +extern cpuop_func op_e118_11_nf; +extern cpuop_func op_e118_11_ff; +extern cpuop_func op_e120_11_nf; +extern cpuop_func op_e120_11_ff; +extern cpuop_func op_e128_11_nf; +extern cpuop_func op_e128_11_ff; +extern cpuop_func op_e130_11_nf; +extern cpuop_func op_e130_11_ff; +extern cpuop_func op_e138_11_nf; +extern cpuop_func op_e138_11_ff; +extern cpuop_func op_e140_11_nf; +extern cpuop_func op_e140_11_ff; +extern cpuop_func op_e148_11_nf; +extern cpuop_func op_e148_11_ff; +extern cpuop_func op_e150_11_nf; +extern cpuop_func op_e150_11_ff; +extern cpuop_func op_e158_11_nf; +extern cpuop_func op_e158_11_ff; +extern cpuop_func op_e160_11_nf; +extern cpuop_func op_e160_11_ff; +extern cpuop_func op_e168_11_nf; +extern cpuop_func op_e168_11_ff; +extern cpuop_func op_e170_11_nf; +extern cpuop_func op_e170_11_ff; +extern cpuop_func op_e178_11_nf; +extern cpuop_func op_e178_11_ff; +extern cpuop_func op_e180_11_nf; +extern cpuop_func op_e180_11_ff; +extern cpuop_func op_e188_11_nf; +extern cpuop_func op_e188_11_ff; +extern cpuop_func op_e190_11_nf; +extern cpuop_func op_e190_11_ff; +extern cpuop_func op_e198_11_nf; +extern cpuop_func op_e198_11_ff; +extern cpuop_func op_e1a0_11_nf; +extern cpuop_func op_e1a0_11_ff; +extern cpuop_func op_e1a8_11_nf; +extern cpuop_func op_e1a8_11_ff; +extern cpuop_func op_e1b0_11_nf; +extern cpuop_func op_e1b0_11_ff; +extern cpuop_func op_e1b8_11_nf; +extern cpuop_func op_e1b8_11_ff; +extern cpuop_func op_e1d0_11_nf; +extern cpuop_func op_e1d0_11_ff; +extern cpuop_func op_e1d8_11_nf; +extern cpuop_func op_e1d8_11_ff; +extern cpuop_func op_e1e0_11_nf; +extern cpuop_func op_e1e0_11_ff; +extern cpuop_func op_e1e8_11_nf; +extern cpuop_func op_e1e8_11_ff; +extern cpuop_func op_e1f0_11_nf; +extern cpuop_func op_e1f0_11_ff; +extern cpuop_func op_e1f8_11_nf; +extern cpuop_func op_e1f8_11_ff; +extern cpuop_func op_e1f9_11_nf; +extern cpuop_func op_e1f9_11_ff; +extern cpuop_func op_e2d0_11_nf; +extern cpuop_func op_e2d0_11_ff; +extern cpuop_func op_e2d8_11_nf; +extern cpuop_func op_e2d8_11_ff; +extern cpuop_func op_e2e0_11_nf; +extern cpuop_func op_e2e0_11_ff; +extern cpuop_func op_e2e8_11_nf; +extern cpuop_func op_e2e8_11_ff; +extern cpuop_func op_e2f0_11_nf; +extern cpuop_func op_e2f0_11_ff; +extern cpuop_func op_e2f8_11_nf; +extern cpuop_func op_e2f8_11_ff; +extern cpuop_func op_e2f9_11_nf; +extern cpuop_func op_e2f9_11_ff; +extern cpuop_func op_e3d0_11_nf; +extern cpuop_func op_e3d0_11_ff; +extern cpuop_func op_e3d8_11_nf; +extern cpuop_func op_e3d8_11_ff; +extern cpuop_func op_e3e0_11_nf; +extern cpuop_func op_e3e0_11_ff; +extern cpuop_func op_e3e8_11_nf; +extern cpuop_func op_e3e8_11_ff; +extern cpuop_func op_e3f0_11_nf; +extern cpuop_func op_e3f0_11_ff; +extern cpuop_func op_e3f8_11_nf; +extern cpuop_func op_e3f8_11_ff; +extern cpuop_func op_e3f9_11_nf; +extern cpuop_func op_e3f9_11_ff; +extern cpuop_func op_e4d0_11_nf; +extern cpuop_func op_e4d0_11_ff; +extern cpuop_func op_e4d8_11_nf; +extern cpuop_func op_e4d8_11_ff; +extern cpuop_func op_e4e0_11_nf; +extern cpuop_func op_e4e0_11_ff; +extern cpuop_func op_e4e8_11_nf; +extern cpuop_func op_e4e8_11_ff; +extern cpuop_func op_e4f0_11_nf; +extern cpuop_func op_e4f0_11_ff; +extern cpuop_func op_e4f8_11_nf; +extern cpuop_func op_e4f8_11_ff; +extern cpuop_func op_e4f9_11_nf; +extern cpuop_func op_e4f9_11_ff; +extern cpuop_func op_e5d0_11_nf; +extern cpuop_func op_e5d0_11_ff; +extern cpuop_func op_e5d8_11_nf; +extern cpuop_func op_e5d8_11_ff; +extern cpuop_func op_e5e0_11_nf; +extern cpuop_func op_e5e0_11_ff; +extern cpuop_func op_e5e8_11_nf; +extern cpuop_func op_e5e8_11_ff; +extern cpuop_func op_e5f0_11_nf; +extern cpuop_func op_e5f0_11_ff; +extern cpuop_func op_e5f8_11_nf; +extern cpuop_func op_e5f8_11_ff; +extern cpuop_func op_e5f9_11_nf; +extern cpuop_func op_e5f9_11_ff; +extern cpuop_func op_e6d0_11_nf; +extern cpuop_func op_e6d0_11_ff; +extern cpuop_func op_e6d8_11_nf; +extern cpuop_func op_e6d8_11_ff; +extern cpuop_func op_e6e0_11_nf; +extern cpuop_func op_e6e0_11_ff; +extern cpuop_func op_e6e8_11_nf; +extern cpuop_func op_e6e8_11_ff; +extern cpuop_func op_e6f0_11_nf; +extern cpuop_func op_e6f0_11_ff; +extern cpuop_func op_e6f8_11_nf; +extern cpuop_func op_e6f8_11_ff; +extern cpuop_func op_e6f9_11_nf; +extern cpuop_func op_e6f9_11_ff; +extern cpuop_func op_e7d0_11_nf; +extern cpuop_func op_e7d0_11_ff; +extern cpuop_func op_e7d8_11_nf; +extern cpuop_func op_e7d8_11_ff; +extern cpuop_func op_e7e0_11_nf; +extern cpuop_func op_e7e0_11_ff; +extern cpuop_func op_e7e8_11_nf; +extern cpuop_func op_e7e8_11_ff; +extern cpuop_func op_e7f0_11_nf; +extern cpuop_func op_e7f0_11_ff; +extern cpuop_func op_e7f8_11_nf; +extern cpuop_func op_e7f8_11_ff; +extern cpuop_func op_e7f9_11_nf; +extern cpuop_func op_e7f9_11_ff; diff --git a/src/include/crc32.h b/src/include/crc32.h index 287c38a8..0cc269c7 100644 --- a/src/include/crc32.h +++ b/src/include/crc32.h @@ -1,2 +1,5 @@ extern uae_u32 get_crc32 (uae_u8 *p, int size); extern uae_u16 get_crc16 (uae_u8 *p, int size); +extern void get_sha1 (uae_u8 *p, int size, uae_u8 *out); +extern char *get_sha1_txt (uae_u8 *p, int size); +#define SHA1_SIZE 20 diff --git a/src/include/custom.h b/src/include/custom.h index 75646b0b..a2388af4 100644 --- a/src/include/custom.h +++ b/src/include/custom.h @@ -19,7 +19,7 @@ uae_u32 get_copper_address(int copno); extern int custom_init (void); -extern void customreset (void); +extern void customreset (int hardreset); extern int intlev (void); extern void dumpcustom (void); @@ -42,7 +42,7 @@ extern int bogusframe; extern unsigned long int hsync_counter; extern uae_u16 dmacon; -extern uae_u16 intena,intreq; +extern uae_u16 intena, intreq, intreqr; // extern int current_hpos (void); extern int vpos; @@ -76,6 +76,7 @@ extern int joy0button, joy1button; extern void INTREQ (uae_u16); extern void INTREQ_0 (uae_u16); +extern void INTREQ_f (uae_u32); extern uae_u16 INTREQR (void); /* maximums for statically allocated tables */ @@ -143,6 +144,8 @@ extern unsigned int xredcolors[256], xgreencolors[256], xbluecolors[256]; /* Compute the number of bitplanes from a value written to BPLCON0 */ #define GET_PLANES(x) ((((x) >> 12) & 7) | (((x) & 0x10) >> 1)) +extern void alloc_cycle_ext(int, int); + extern void fpscounter_reset (void); extern unsigned int beamcon0, new_beamcon0; diff --git a/src/include/disk.h b/src/include/disk.h index 4c3726aa..a0b32bb0 100644 --- a/src/include/disk.h +++ b/src/include/disk.h @@ -18,7 +18,7 @@ extern void disk_insert (int num, const char *name); extern void disk_insert_force (int num, const char *name); extern void DISK_check_change (void); extern struct zfile *DISK_validate_filename (const char *, int, int *, uae_u32 *); -extern void DISK_handler (void); +extern void DISK_handler (uae_u32); extern void DISK_update (int hpos); extern void DISK_hsync (int hpos); extern void DISK_reset (void); diff --git a/src/include/drawing.h b/src/include/drawing.h index ba412047..0c5e1b0a 100644 --- a/src/include/drawing.h +++ b/src/include/drawing.h @@ -24,6 +24,8 @@ #define min_diwlastword (0) #define max_diwlastword (PIXEL_XPOS(0x1d4>> 1)) +extern int aga_mode, direct_rgb; + // extern int sprite_width; STATIC_INLINE int coord_hw_to_window_x (int x) @@ -68,7 +70,7 @@ struct color_entry { STATIC_INLINE xcolnr getxcolor (int c) { - if (currprefs.chipset_mask & CSMASK_AGA) + if (direct_rgb) return CONVERT_RGB(c); else return xcolors[c]; @@ -77,7 +79,7 @@ STATIC_INLINE xcolnr getxcolor (int c) /* functions for reading, writing, copying and comparing struct color_entry */ STATIC_INLINE int color_reg_get (struct color_entry *_GCCRES_ ce, int c) { - if (currprefs.chipset_mask & CSMASK_AGA) + if (aga_mode) return ce->color_regs_aga[c]; else return ce->color_regs_ecs[c]; @@ -85,7 +87,7 @@ STATIC_INLINE int color_reg_get (struct color_entry *_GCCRES_ ce, int c) STATIC_INLINE void color_reg_set (struct color_entry *_GCCRES_ ce, int c, int v) { - if (currprefs.chipset_mask & CSMASK_AGA) + if (aga_mode) ce->color_regs_aga[c] = v; else ce->color_regs_ecs[c] = v; @@ -94,7 +96,7 @@ STATIC_INLINE void color_reg_set (struct color_entry *_GCCRES_ ce, int c, int v) /* ugly copy hack, is there better solution? */ STATIC_INLINE void color_reg_cpy (struct color_entry *_GCCRES_ dst, struct color_entry *_GCCRES_ src) { - if (currprefs.chipset_mask & CSMASK_AGA) + if (aga_mode) /* copy acolors and color_regs_aga */ memcpy (dst->acolors, src->acolors, sizeof(struct color_entry) - sizeof(uae_u16) * 32); else @@ -163,7 +165,6 @@ struct decision { uae_u16 bplcon3, bplcon4; uae_u8 nr_planes; uae_u8 bplres; -// unsigned int any_hires_sprites; unsigned int ham_seen; unsigned int ham_at_start; }; diff --git a/src/include/events.h b/src/include/events.h index ab5a3b76..936cc517 100644 --- a/src/include/events.h +++ b/src/include/events.h @@ -14,6 +14,8 @@ #include "md-pandora/rpt.h" +#define FAST_COPPER + extern volatile frame_time_t vsynctime, vsyncmintime; extern void reset_frame_rate_hack (void); extern int rpt_available; @@ -28,21 +30,45 @@ extern unsigned long currcycle, nextevent, is_lastline; extern unsigned long last_synctime; extern unsigned long sample_evtime; typedef void (*evfunc)(void); +typedef void (*evfunc2)(uae_u32); + +typedef unsigned long int evt; struct ev { int active; - unsigned long int evtime, oldcycles; + evt evtime, oldcycles; evfunc handler; }; +struct ev2 +{ + int active; + evt evtime; + uae_u32 data; + evfunc2 handler; +}; + enum { - ev_hsync, ev_copper, ev_audio, ev_cia, ev_blitter, ev_disk, + ev_hsync, +#ifdef FAST_COPPER + ev_copper, +#endif + ev_audio, ev_cia, ev_misc, ev_max }; -extern struct ev eventtab[ev_max]; +enum { + ev2_blitter, ev2_disk, ev2_misc, + ev2_max = 8 +}; +extern struct ev eventtab[ev_max]; +extern struct ev2 eventtab2[ev2_max]; + +extern void event2_newevent(int, evt); +extern void event2_newevent2(evt, uae_u32, evfunc2); +extern void event2_remevent(int); #ifdef JIT #include "events_jit.h" diff --git a/src/include/filesys.h b/src/include/filesys.h index 70adc3e2..897751a1 100644 --- a/src/include/filesys.h +++ b/src/include/filesys.h @@ -8,6 +8,7 @@ struct hardfiledata { uae_u64 size; + uae_u64 offset; int nrcyls; int secspertrack; int surfaces; @@ -15,23 +16,47 @@ struct hardfiledata { int blocksize; FILE *fd; int readonly; + int flags; + char vendor_id[8 + 1]; + char product_id[16 + 1]; + char product_rev[4 + 1]; + char device_name[256]; + /* geometry from possible RDSK block */ + unsigned int cylinders; + unsigned int sectors; + unsigned int heads; + + int drive_empty; }; #ifdef WIN32 int truncate (const char *name, long int len); #endif +#define HD_CONTROLLER_UAE 0 +#define HD_CONTROLLER_IDE0 1 +#define HD_CONTROLLER_IDE1 2 +#define HD_CONTROLLER_IDE2 3 +#define HD_CONTROLLER_IDE3 4 +#define HD_CONTROLLER_SCSI0 5 +#define HD_CONTROLLER_SCSI1 6 +#define HD_CONTROLLER_SCSI2 7 +#define HD_CONTROLLER_SCSI3 8 +#define HD_CONTROLLER_SCSI4 9 +#define HD_CONTROLLER_SCSI5 10 +#define HD_CONTROLLER_SCSI6 11 +#define HD_CONTROLLER_PCMCIA_SRAM 12 +#define HD_CONTROLLER_PCMCIA_IDE 13 + #define FILESYS_VIRTUAL 0 #define FILESYS_HARDFILE 1 #define FILESYS_HARDFILE_RDB 2 #define FILESYS_HARDDRIVE 3 -#define FILESYS_FLAG_DONOTSAVE 1 - #define MAX_FILESYSTEM_UNITS 30 struct uaedev_mount_info; extern struct uaedev_mount_info options_mountinfo; -extern void filesys_init(void); extern struct hardfiledata *get_hardfile_data (int nr); - +extern int get_native_path(uae_u32 lock, char *out); +extern void hardfile_do_disk_change (int fsid, int insert); diff --git a/src/include/fsdb.h b/src/include/fsdb.h index f00e84ae..d8fd824c 100644 --- a/src/include/fsdb.h +++ b/src/include/fsdb.h @@ -33,6 +33,8 @@ #define ERROR_DELETE_PROTECTED 222 #define ERROR_WRITE_PROTECTED 223 #define ERROR_READ_PROTECTED 224 +#define ERROR_NOT_A_DOS_DISK 225 +#define ERROR_NO_DISK 226 #define ERROR_NO_MORE_ENTRIES 232 #define ERROR_NOT_IMPLEMENTED 236 @@ -83,6 +85,8 @@ typedef struct a_inode_struct { unsigned int deleted:1; /* target volume flag */ unsigned int volflags; + /* not equaling unit.mountcount -> not in this volume */ + unsigned int mountcount; } a_inode; extern char *nname_begin (char *); @@ -130,3 +134,10 @@ extern int my_truncate (const char *name, long int len); extern int dos_errno (void); extern int my_existsfile (const char *name); extern int my_existsdir (const char *name); + +#define MYVOLUMEINFO_READONLY 1 +#define MYVOLUMEINFO_STREAMS 2 +#define MYVOLUMEINFO_ARCHIVE 4 +#define MYVOLUMEINFO_REUSABLE 8 + +extern int my_getvolumeinfo (const char *root); diff --git a/src/include/gui.h b/src/include/gui.h index e12fd873..13f51745 100644 --- a/src/include/gui.h +++ b/src/include/gui.h @@ -87,6 +87,7 @@ typedef enum { NUMSG_NEEDEXT2, NUMSG_NOROM, NUMSG_NOROMKEY, NUMSG_KSROMCRCERROR, NUMSG_KSROMREADERROR, NUMSG_NOEXTROM, NUMSG_MODRIP_NOTFOUND, NUMSG_MODRIP_FINISHED, NUMSG_MODRIP_SAVE, - NUMSG_KS68EC020, NUMSG_KS68020, NUMSG_ROMNEED, NUMSG_NOZLIB, NUMSG_STATEHD, + NUMSG_KS68EC020, NUMSG_KS68020, NUMSG_KS68030, + NUMSG_ROMNEED, NUMSG_EXPROMNEED, NUMSG_NOZLIB, NUMSG_STATEHD, NUMSG_NOCAPS, NUMSG_OLDCAPS, NUMSG_KICKREP, NUMSG_KICKREPNO } notify_user_msg; diff --git a/src/include/memory.h b/src/include/memory.h index 01a250b2..542fb94c 100644 --- a/src/include/memory.h +++ b/src/include/memory.h @@ -48,6 +48,7 @@ extern uae_u32 allocated_gfxmem; extern uae_u32 allocated_z3fastmem, max_z3fastmem; #if !( defined(PANDORA) || defined(ANDROIDSDL) ) extern uae_u32 allocated_a3000mem; +extern uae_u32 allocated_cardmem; #endif extern void wait_cpu_cycle (void); @@ -58,16 +59,23 @@ extern void wait_cpu_cycle (void); #define chipmem_start 0x00000000 #define bogomem_start 0x00C00000 #if !( defined(PANDORA) || defined(ANDROIDSDL) ) -#define a3000mem_start 0x07000000 +#define cardmem_start 0x00E00000 #endif #define kickmem_start 0x00F80000 extern uaecptr z3fastmem_start; +extern uaecptr p96ram_start; extern uaecptr fastmem_start; +#if !( defined(PANDORA) || defined(ANDROIDSDL) ) +extern uaecptr a3000lmem_start, a3000hmem_start; +#endif extern int ersatzkickfile; extern int cloanto_rom; extern uae_u16 kickstart_version; +extern int uae_boot_rom, uae_boot_rom_size; +extern uaecptr rtarea_base; +enum { ABFLAG_UNK = 0, ABFLAG_RAM = 1, ABFLAG_ROM = 2, ABFLAG_ROMIN = 4, ABFLAG_IO = 8, ABFLAG_NONE = 16, ABFLAG_SAFE = 32 }; typedef struct { /* These ones should be self-explanatory... */ mem_get_func lget, wget, bget; @@ -88,6 +96,9 @@ typedef struct { for this particular bank. */ uae_u8 *baseaddr; const char *name; + /* for instruction opcode/operand fetches */ + mem_get_func lgeti, wgeti; + int flags; } addrbank; extern uae_u8 *filesysory; @@ -103,12 +114,22 @@ extern addrbank cia_bank; extern addrbank rtarea_bank; extern addrbank expamem_bank; extern addrbank fastmem_bank; -extern addrbank gfxmem_bank; +extern addrbank gfxmem_bank, gfxmem_bankx; +#if !( defined(PANDORA) || defined(ANDROIDSDL) ) +extern addrbank gayle_bank; +extern addrbank gayle2_bank; +extern addrbank gayle_attr_bank; +extern addrbank gayle_common_bank; +extern addrbank mbres_bank; +extern addrbank akiko_bank; +extern addrbank cardmem_bank; +#endif extern void rtarea_init (void); extern void rtarea_setup (void); extern void expamem_init (void); extern void expamem_reset (void); +extern void expamem_next (void); extern uae_u32 gfxmem_start; extern uae_u8 *gfxmemory; @@ -118,6 +139,9 @@ extern uae_u32 gfxmem_mask; extern int REGPARAM3 default_check(uaecptr addr, uae_u32 size) REGPARAM; extern uae_u8 *REGPARAM3 default_xlate(uaecptr addr) REGPARAM; +/* 680x0 opcode fetches */ +extern uae_u32 REGPARAM3 dummy_lgeti (uaecptr addr) REGPARAM; +extern uae_u32 REGPARAM3 dummy_wgeti (uaecptr addr) REGPARAM; #define bankindex(addr) (((uaecptr)(addr)) >> 16) @@ -145,12 +169,15 @@ extern void memory_cleanup (void); extern void map_banks (addrbank *bank, int first, int count, int realsize); extern void map_overlay (int chip); extern void memory_hardreset (void); +extern void free_fastmemory (void); #define NONEXISTINGDATA 0 #define longget(addr) (call_mem_get_func(get_mem_bank(addr).lget, addr)) #define wordget(addr) (call_mem_get_func(get_mem_bank(addr).wget, addr)) #define byteget(addr) (call_mem_get_func(get_mem_bank(addr).bget, addr)) +#define longgeti(addr) (call_mem_get_func(get_mem_bank(addr).lgeti, addr)) +#define wordgeti(addr) (call_mem_get_func(get_mem_bank(addr).wgeti, addr)) #define longput(addr,l) (call_mem_put_func(get_mem_bank(addr).lput, addr, l)) #define wordput(addr,w) (call_mem_put_func(get_mem_bank(addr).wput, addr, w)) #define byteput(addr,b) (call_mem_put_func(get_mem_bank(addr).bput, addr, b)) @@ -167,6 +194,14 @@ STATIC_INLINE uae_u32 get_byte(uaecptr addr) { return byteget(addr); } +STATIC_INLINE uae_u32 get_longi(uaecptr addr) +{ + return longgeti(addr); +} +STATIC_INLINE uae_u32 get_wordi(uaecptr addr) +{ + return wordgeti(addr); +} /* * Read a host pointer from addr @@ -250,34 +285,16 @@ STATIC_INLINE int valid_address(uaecptr addr, uae_u32 size) return get_mem_bank(addr).check(addr, size); } -/* For faster access in custom chip emulation. */ -extern uae_u32 REGPARAM3 chipmem_lget (uaecptr) REGPARAM; -extern uae_u32 REGPARAM3 chipmem_wget (uaecptr) REGPARAM; -extern uae_u32 REGPARAM3 chipmem_bget (uaecptr) REGPARAM; -extern void REGPARAM3 chipmem_lput (uaecptr, uae_u32) REGPARAM; -extern void REGPARAM3 chipmem_wput (uaecptr, uae_u32) REGPARAM; -extern void REGPARAM3 chipmem_bput (uaecptr, uae_u32) REGPARAM; +extern int addr_valid(char*,uaecptr,uae_u32); -extern uae_u32 REGPARAM3 chipmem_agnus_lget (uaecptr) REGPARAM; +/* For faster access in custom chip emulation. */ +extern void REGPARAM3 chipmem_wput (uaecptr, uae_u32) REGPARAM; extern uae_u32 REGPARAM3 chipmem_agnus_wget (uaecptr) REGPARAM; -extern uae_u32 REGPARAM3 chipmem_agnus_bget (uaecptr) REGPARAM; -extern void REGPARAM3 chipmem_agnus_lput (uaecptr, uae_u32) REGPARAM; -extern void REGPARAM3 chipmem_agnus_wput (uaecptr, uae_u32) REGPARAM; -extern void REGPARAM3 chipmem_agnus_bput (uaecptr, uae_u32) REGPARAM; extern uae_u32 chipmem_mask, chipmem_full_mask, kickmem_mask; extern uae_u8 *kickmemory; -extern int kickmem_size; extern addrbank dummy_bank; -/* 68020+ Chip RAM DMA contention emulation */ -extern uae_u32 REGPARAM3 chipmem_lget_ce2 (uaecptr) REGPARAM; -extern uae_u32 REGPARAM3 chipmem_wget_ce2 (uaecptr) REGPARAM; -extern uae_u32 REGPARAM3 chipmem_bget_ce2 (uaecptr) REGPARAM; -extern void REGPARAM3 chipmem_lput_ce2 (uaecptr, uae_u32) REGPARAM; -extern void REGPARAM3 chipmem_wput_ce2 (uaecptr, uae_u32) REGPARAM; -extern void REGPARAM3 chipmem_bput_c2 (uaecptr, uae_u32) REGPARAM; - static __inline__ uae_u16 CHIPMEM_WGET (uae_u32 PT) { return do_get_mem_word((uae_u16 *)&chipmemory[PT & chipmem_mask]); @@ -315,28 +332,48 @@ extern uae_u8 *mapped_malloc (size_t, const char *); extern void mapped_free (uae_u8 *); extern void clearexec (void); -extern int read_kickstart (struct zfile *f, uae_u8 *mem, int size, int dochecksum, int *cloanto_rom); extern void decode_cloanto_rom_do (uae_u8 *mem, int size, int real_size, uae_u8 *key, int keysize); #define ROMTYPE_KICK 1 #define ROMTYPE_KICKCD32 2 #define ROMTYPE_EXTCD32 4 #define ROMTYPE_EXTCDTV 8 -#define ROMTYPE_AR 16 -#define ROMTYPE_KEY 32 -#define ROMTYPE_ARCADIA 64 +#define ROMTYPE_A2091BOOT 16 +#define ROMTYPE_A4091BOOT 32 +#define ROMTYPE_AR 64 +#define ROMTYPE_SUPERIV 128 +#define ROMTYPE_KEY 256 +#define ROMTYPE_ARCADIABIOS 512 +#define ROMTYPE_ARCADIAGAME 1024 +#define ROMTYPE_HRTMON 2048 +#define ROMTYPE_NORDIC 4096 +#define ROMTYPE_XPOWER 8192 +#define ROMTYPE_CD32CART 16384 +#define ROMTYPE_EVEN 131072 +#define ROMTYPE_ODD 262144 +#define ROMTYPE_BYTESWAP 524288 +#define ROMTYPE_SCRAMBLED 1048576 + +struct romheader { + char *name; + int id; +}; struct romdata { const char *name; int ver, rev; int subver, subrev; const char *model; - uae_u32 crc32; uae_u32 size; int id; int cpu; int cloanto; int type; + int group; + int title; + uae_u32 crc32; + uae_u32 sha1[5]; + char *configname; }; struct romlist { @@ -344,13 +381,19 @@ struct romlist { struct romdata *rd; }; +extern struct romdata *getromdatabypath(char *path); extern struct romdata *getromdatabycrc (uae_u32 crc32); extern struct romdata *getromdatabydata (uae_u8 *rom, int size); extern struct romdata *getromdatabyid (int id); extern struct romdata *getromdatabyzfile (struct zfile *f); +extern struct romlist **getarcadiaroms (void); extern struct romdata *getarcadiarombyname (char *name); +extern struct romlist **getromlistbyident(int ver, int rev, int subver, int subrev, char *model, int all); extern void getromname (struct romdata*, char*); extern struct romdata *getromdatabyname (char*); +extern struct romlist *getromlistbyids(int *ids); +extern void romwarning(int *ids); +extern struct romlist *getromlistbyromdata(struct romdata *rd); extern void romlist_add (char *path, struct romdata *rd); extern char *romlist_get (struct romdata *rd); extern void romlist_clear (void); @@ -358,6 +401,13 @@ extern void romlist_clear (void); extern uae_u8 *load_keyfile (struct uae_prefs *p, char *path, int *size); extern void free_keyfile (uae_u8 *key); +uaecptr strcpyha_safe (uaecptr dst, const char *src); +extern char *strcpyah_safe (char *dst, uaecptr src); +void memcpyha_safe (uaecptr dst, const uae_u8 *src, int size); +void memcpyha (uaecptr dst, const uae_u8 *src, int size); +void memcpyah_safe (uae_u8 *dst, uaecptr src, int size); +void memcpyah (uae_u8 *dst, uaecptr src, int size); + #if defined(ARMV6_ASSEMBLY) extern "C" { diff --git a/src/include/native2amiga.h b/src/include/native2amiga.h index 16584de1..37100079 100644 --- a/src/include/native2amiga.h +++ b/src/include/native2amiga.h @@ -57,7 +57,6 @@ extern smp_comm_pipe native2amiga_pending; STATIC_INLINE void do_uae_int_requested(void) { - uae_int_requested = 1; + uae_int_requested |= 1; set_uae_int_flag (); - INTREQ (0x8000 | 0x0008); } diff --git a/src/include/newcpu.h b/src/include/newcpu.h index cb3c668d..901cf941 100644 --- a/src/include/newcpu.h +++ b/src/include/newcpu.h @@ -120,6 +120,9 @@ extern struct regstruct uae_u8 *pc_p; uae_u8 *pc_oldp; + uae_u16 irc, ir; + uae_u32 spcflags; + uaecptr usp, isp, msp; uae_u16 sr; flagtype t1; @@ -139,13 +142,22 @@ extern struct regstruct uae_u32 fpcr,fpsr, fpiar; uae_u32 fpsr_highbyte; #endif +#ifndef CPUEMU_68000_ONLY + uae_u32 cacr, caar; + uae_u32 itt0, itt1, dtt0, dtt1; + uae_u32 tcr, mmusr, urp, srp, buscr; - uae_u32 spcflags; - uae_u32 kick_mask; + uae_u32 mmu_fslw, mmu_fault_addr; + uae_u16 mmu_ssw; + uae_u32 wb3_data; + uae_u16 wb3_status; + int mmu_enabled; + int mmu_pagesize_8k; +#endif + + uae_u32 pcr; uae_u32 address_space_mask; - uae_u16 irc, ir; - uae_u8 panic; uae_u32 panic_pc, panic_addr; @@ -176,6 +188,7 @@ STATIC_INLINE uae_u32 munge24(uae_u32 x) extern unsigned long irqcycles[15]; extern int irqdelay[15]; extern int mmu_enabled, mmu_triggered; +extern int cpu_cycles; STATIC_INLINE void set_special (struct regstruct *regs, uae_u32 x) { @@ -199,20 +212,67 @@ STATIC_INLINE void m68k_setpc (struct regstruct *regs, uaecptr newpc) STATIC_INLINE uaecptr m68k_getpc (struct regstruct *regs) { - return regs->pc + ((char *)regs->pc_p - (char *)regs->pc_oldp); + return (uaecptr)(regs->pc + ((char *)regs->pc_p - (char *)regs->pc_oldp)); } #define M68K_GETPC m68k_getpc(®s) STATIC_INLINE uaecptr m68k_getpc_p (struct regstruct *regs, uae_u8 *p) { - return regs->pc + ((char *)p - (char *)regs->pc_oldp); + return (uaecptr)(regs->pc + ((char *)p - (char *)regs->pc_oldp)); +} + +#define m68k_incpc(regs, o) ((regs)->pc_p += (o)) + +STATIC_INLINE void m68k_setpci(struct regstruct *regs, uaecptr newpc) +{ + regs->pc = newpc; +} +STATIC_INLINE uaecptr m68k_getpci(struct regstruct *regs) +{ + return regs->pc; +} +STATIC_INLINE void m68k_incpci(struct regstruct *regs, int o) +{ + regs->pc += o; +} + +STATIC_INLINE void m68k_do_rts(struct regstruct *regs) +{ + m68k_setpc(regs, get_long(m68k_areg(regs, 7))); + m68k_areg(regs, 7) += 4; +} +STATIC_INLINE void m68k_do_rtsi(struct regstruct *regs) +{ + m68k_setpci(regs, get_long(m68k_areg(regs, 7))); + m68k_areg(regs, 7) += 4; +} + +STATIC_INLINE void m68k_do_bsr(struct regstruct *regs, uaecptr oldpc, uae_s32 offset) +{ + m68k_areg(regs, 7) -= 4; + put_long(m68k_areg(regs, 7), oldpc); + m68k_incpc(regs, offset); +} +STATIC_INLINE void m68k_do_bsri(struct regstruct *regs, uaecptr oldpc, uae_s32 offset) +{ + m68k_areg(regs, 7) -= 4; + put_long(m68k_areg(regs, 7), oldpc); + m68k_incpci(regs, offset); +} + +STATIC_INLINE void m68k_do_jsr(struct regstruct *regs, uaecptr oldpc, uaecptr dest) +{ + m68k_areg(regs, 7) -= 4; + put_long(m68k_areg(regs, 7), oldpc); + m68k_setpc(regs, dest); } #define get_ibyte(regs, o) do_get_mem_byte((uae_u8 *)((regs)->pc_p + (o) + 1)) #define get_iword(regs, o) do_get_mem_word((uae_u16 *)((regs)->pc_p + (o))) #define get_ilong(regs, o) do_get_mem_long((uae_u32 *)((regs)->pc_p + (o))) -#define m68k_incpc(regs, o) ((regs)->pc_p += (o)) +#define get_iwordi(o) get_wordi(o) +#define get_ilongi(o) get_longi(o) /* These are only used by the 68020/68881 code, and therefore don't * need to handle prefetch. */ @@ -229,6 +289,12 @@ STATIC_INLINE uae_u32 next_iword (struct regstruct *regs) m68k_incpc (regs, 2); return r; } +STATIC_INLINE uae_u32 next_iwordi (struct regstruct *regs) +{ + uae_u32 r = get_iwordi (m68k_getpci(regs)); + m68k_incpc (regs, 2); + return r; +} STATIC_INLINE uae_u32 next_ilong (struct regstruct *regs) { @@ -236,25 +302,11 @@ STATIC_INLINE uae_u32 next_ilong (struct regstruct *regs) m68k_incpc (regs, 4); return r; } - -STATIC_INLINE void m68k_do_rts(struct regstruct *regs) +STATIC_INLINE uae_u32 next_ilongi (struct regstruct *regs) { - m68k_setpc(regs, get_long(m68k_areg(regs, 7))); - m68k_areg(regs, 7) += 4; -} - -STATIC_INLINE void m68k_do_bsr(struct regstruct *regs, uaecptr oldpc, uae_s32 offset) -{ - m68k_areg(regs, 7) -= 4; - put_long(m68k_areg(regs, 7), oldpc); - m68k_incpc(regs, offset); -} - -STATIC_INLINE void m68k_do_jsr(struct regstruct *regs, uaecptr oldpc, uaecptr dest) -{ - m68k_areg(regs, 7) -= 4; - put_long(m68k_areg(regs, 7), oldpc); - m68k_setpc(regs, dest); + uae_u32 r = get_ilongi (m68k_getpci(regs)); + m68k_incpc (regs, 4); + return r; } STATIC_INLINE void m68k_setstopped (struct regstruct *regs, int stop) @@ -267,12 +319,15 @@ STATIC_INLINE void m68k_setstopped (struct regstruct *regs, int stop) } extern uae_u32 REGPARAM3 get_disp_ea_020 (struct regstruct *regs, uae_u32 base, uae_u32 dp) REGPARAM; +extern uae_u32 REGPARAM3 get_disp_ea_020i (struct regstruct *regs, uae_u32 base, uae_u32 dp) REGPARAM; extern uae_u32 REGPARAM3 get_disp_ea_000 (struct regstruct *regs, uae_u32 base, uae_u32 dp) REGPARAM; +extern int get_cpu_model(void); extern void REGPARAM3 MakeSR (struct regstruct *regs) REGPARAM; extern void REGPARAM3 MakeFromSR (struct regstruct *regs) REGPARAM; extern void REGPARAM3 Exception (int, struct regstruct *regs, uaecptr) REGPARAM; -extern void Interrupt (int nr); +extern void NMI (void); +extern void doint (void); extern int m68k_move2c (int, uae_u32 *); extern int m68k_movec2 (int, uae_u32 *); extern void m68k_divl (uae_u32, uae_u32, uae_u16, uaecptr); @@ -280,19 +335,20 @@ extern void m68k_mull (uae_u32, uae_u32, uae_u16); extern void init_m68k (void); extern void init_m68k_full (void); extern void m68k_go (int); -extern void m68k_reset (void); +extern void m68k_reset (int); extern int getDivu68kCycles(uae_u32 dividend, uae_u16 divisor); extern int getDivs68kCycles(uae_s32 dividend, uae_s16 divisor); -extern void mmu_op (uae_u32, struct regstruct *regs, uae_u16); +extern void mmu_op (uae_u32, struct regstruct *regs, uae_u32); +extern void mmu_op30 (uaecptr, uae_u32, struct regstruct *regs, int, uaecptr); -extern void fpp_opp (uae_u32, struct regstruct *regs, uae_u16); -extern void fdbcc_opp (uae_u32, struct regstruct *regs, uae_u16); -extern void fscc_opp (uae_u32, struct regstruct *regs, uae_u16); -extern void ftrapcc_opp (uae_u32, struct regstruct *regs, uaecptr); -extern void fbcc_opp (uae_u32, struct regstruct *regs, uaecptr, uae_u32); -extern void fsave_opp (uae_u32, struct regstruct *regs); -extern void frestore_opp (uae_u32, struct regstruct *regs); +extern void fpuop_arithmetic(uae_u32, struct regstruct *regs, uae_u16); +extern void fpuop_dbcc(uae_u32, struct regstruct *regs, uae_u16); +extern void fpuop_scc(uae_u32, struct regstruct *regs, uae_u16); +extern void fpuop_trapcc(uae_u32, struct regstruct *regs, uaecptr); +extern void fpuop_bcc(uae_u32, struct regstruct *regs, uaecptr, uae_u32); +extern void fpuop_save(uae_u32, struct regstruct *regs); +extern void fpuop_restore(uae_u32, struct regstruct *regs); extern uae_u32 fpp_get_fpsr (const struct regstruct *regs); extern void exception3 (uae_u32 opcode, uaecptr addr, uaecptr fault); @@ -304,20 +360,22 @@ extern void fill_prefetch_slow (struct regstruct *regs); #define CPU_OP_NAME(a) op ## a -/* 68040 */ +/* 68060 */ extern const struct cputbl op_smalltbl_0_ff[]; -/* 68020 + 68881 */ +/* 68040 */ extern const struct cputbl op_smalltbl_1_ff[]; -/* 68020 */ +/* 68030 */ extern const struct cputbl op_smalltbl_2_ff[]; -/* 68010 */ +/* 68020 */ extern const struct cputbl op_smalltbl_3_ff[]; -/* 68000 */ +/* 68010 */ extern const struct cputbl op_smalltbl_4_ff[]; -/* 68000 slow but compatible. */ +/* 68000 */ extern const struct cputbl op_smalltbl_5_ff[]; +/* 68000 slow but compatible. */ +extern const struct cputbl op_smalltbl_11_ff[]; /* 68000 slow but compatible and cycle-exact. */ -extern const struct cputbl op_smalltbl_6_ff[]; +extern const struct cputbl op_smalltbl_12_ff[]; extern cpuop_func *cpufunctbl[65536] ASM_SYM_FOR_FUNC ("cpufunctbl"); @@ -338,7 +396,15 @@ void newcpu_showstate(void); #ifdef JIT extern void (*flush_icache)(int n); extern void compemu_reset(void); -extern void check_prefs_changed_comp (void); +extern int check_prefs_changed_comp (void); #else #define flush_icache(X) do {} while (0) #endif + +extern int movec_illg (int regno); +extern uae_u32 val_move2c (int regno); +struct cpum2c { + int regno; + char *regname; +}; +extern struct cpum2c m2cregs[]; diff --git a/src/include/options.h b/src/include/options.h index aaeeef8f..30319dbf 100644 --- a/src/include/options.h +++ b/src/include/options.h @@ -8,13 +8,11 @@ */ #define UAEMAJOR 1 -#define UAEMINOR 3 -#define UAESUBREV 3 +#define UAEMINOR 4 +#define UAESUBREV 6 extern long int version; -struct uaedev_mount_info; - struct strlist { struct strlist *next; char *option, *value; @@ -38,26 +36,45 @@ struct wh { int width, height; }; +#define MOUNT_CONFIG_SIZE 30 +struct uaedev_config_info { + char devname[MAX_DPATH]; + char volname[MAX_DPATH]; + char rootdir[MAX_DPATH]; + int ishdf; + int readonly; + int bootpri; + int autoboot; + int donotmount; + char filesys[MAX_DPATH]; + int surfaces; + int sectors; + int reserved; + int blocksize; + int configoffset; + int controller; +}; + struct uae_prefs { struct strlist *all_lines; char description[256]; - char info[256]; // Not used in UAE4ALL - int config_version; // Not used in UAE4ALL + char info[256]; // Not used in UAE4ARM + int config_version; // Not used in UAE4ARM - int start_debugger; // Not used in UAE4ALL + int start_debugger; // Not used in UAE4ARM int start_gui; int produce_sound; int sound_stereo; int sound_stereo_separation; - int sound_mixed_stereo; - int sound_bits; // Not used in UAE4ALL + int sound_mixed_stereo_delay; + int sound_bits; // Not used in UAE4ARM int sound_freq; int sound_interpol; int sound_filter; int sound_filter_type; - int sound_volume; // Not used in UAE4ALL + int sound_volume; // Not used in UAE4ARM int sound_auto; int cachesize; @@ -67,12 +84,12 @@ struct uae_prefs { struct wh gfx_size_win; struct wh gfx_size_fs; struct wh gfx_size; - int gfx_refreshrate; // Not used in UAE4ALL - int gfx_vsync; // Not used in UAE4ALL - int gfx_lores; // Not used in UAE4ALL - int gfx_correct_aspect; // Not used in UAE4ALL - int gfx_xcenter; // Not used in UAE4ALL - int gfx_ycenter; // Not used in UAE4ALL + int gfx_refreshrate; // Not used in UAE4ARM + int gfx_avsync; // Not used in UAE4ARM + int gfx_resolution; // Not used in UAE4ARM + int gfx_correct_aspect; // Not used in UAE4ARM + int gfx_xcenter; // Not used in UAE4ARM + int gfx_ycenter; // Not used in UAE4ARM int immediate_blits; unsigned int chipset_mask; @@ -81,21 +98,24 @@ struct uae_prefs { int collision_level; int leds_on_screen; int fast_copper; - int scsi; // Not used in UAE4ALL + int scsi; // Not used in UAE4ARM int cpu_idle; int floppy_speed; int tod_hack; + int cs_a1000ram; // Always 0 in UAE4ARM + char df[4][MAX_DPATH]; char romfile[MAX_DPATH]; char romextfile[MAX_DPATH]; - char path_floppy[256]; // Not used in UAE4ALL - char path_hardfile[256]; // Not used in UAE4ALL - char path_rom[256]; // Not used in UAE4ALL + char path_floppy[256]; // Not used in UAE4ARM + char path_hardfile[256]; // Not used in UAE4ARM + char path_rom[256]; // Not used in UAE4ARM int m68k_speed; - int cpu_level; + int cpu_model; + int fpu_model; int cpu_compatible; int address_space_24; int picasso96_nocustom; @@ -105,16 +125,16 @@ struct uae_prefs { uae_u32 fastmem_size; uae_u32 chipmem_size; uae_u32 bogomem_size; - uae_u32 a3000mem_size; uae_u32 gfxmem_size; - struct uaedev_mount_info *mountinfo; + int mountitems; + struct uaedev_config_info mountconfig[MOUNT_CONFIG_SIZE]; int nr_floppies; int dfxtype[4]; - int dfxclick[4]; // Not used in UAE4ALL - char dfxclickexternal[4][256]; // Not used in UAE4ALL - int dfxclickvolume; // Not used in UAE4ALL + int dfxclick[4]; // Not used in UAE4ARM + char dfxclickexternal[4][256]; // Not used in UAE4ARM + int dfxclickvolume; // Not used in UAE4ARM /* Target specific options */ int pandora_partial_blits; @@ -153,27 +173,34 @@ struct uae_prefs { /* Contains the filename of .uaerc */ extern void cfgfile_write (struct zfile *, const char *format,...); +extern void cfgfile_dwrite (struct zfile *, const char *format,...); extern void cfgfile_backup (const char *path); +extern struct uaedev_config_info *add_filesys_config (struct uae_prefs *p, int index, + char *devname, char *volname, char *rootdir, int readonly, + int secspertrack, int surfaces, int reserved, + int blocksize, int bootpri, char *filesysdir, int hdc, int flags); extern void default_prefs (struct uae_prefs *, int); extern void discard_prefs (struct uae_prefs *, int); int parse_cmdline_option (struct uae_prefs *, char, char *); -extern int cfgfile_yesno (char *option, char *value, const char *name, int *location); +extern int cfgfile_yesno (const char *option, const char *value, const char *name, int *location); extern int cfgfile_intval (char *option, char *value, const char *name, int *location, int scale); -extern int cfgfile_strval (char *option, char *value, const char *name, int *location, const char *table[], int more); -extern int cfgfile_string (char *option, char *value, const char *name, char *location, int maxsz); +extern int cfgfile_strval (const char *option, const char *value, const char *name, int *location, const char *table[], int more); +extern int cfgfile_string (const char *option, const char *value, const char *name, char *location, int maxsz); extern char *cfgfile_subst_path (const char *path, const char *subst, const char *file); extern int target_parse_option (struct uae_prefs *, char *option, char *value); extern void target_save_options (struct zfile*, struct uae_prefs *); extern void target_default_options (struct uae_prefs *, int type); +extern void target_fixup_options (struct uae_prefs *); extern int target_cfgfile_load (struct uae_prefs *, char *filename, int type, int isdefault); +extern void target_quit (void); extern void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type); extern int cfgfile_load (struct uae_prefs *p, const char *filename, int *type, int ignorelink); -extern int cfgfile_save (struct uae_prefs *, const char *filename, int); +extern int cfgfile_save (struct uae_prefs *p, const char *filename, int); extern void cfgfile_parse_line (struct uae_prefs *p, char *, int); extern int cfgfile_parse_option (struct uae_prefs *p, char *option, char *value, int); extern int cfgfile_get_description (const char *filename, char *description); @@ -183,6 +210,7 @@ extern void cfgfile_addcfgparam (char *); extern int cfgfile_configuration_change(int); extern void fixup_prefs_dimensions (struct uae_prefs *prefs); extern void fixup_prefs (struct uae_prefs *prefs); +extern void fixup_cpu (struct uae_prefs *prefs); extern void check_prefs_changed_custom (void); extern void check_prefs_changed_cpu (void); @@ -191,7 +219,7 @@ extern int check_prefs_changed_gfx (void); extern struct uae_prefs currprefs, changed_prefs; -extern void machdep_init (void); +extern int machdep_init (void); extern void machdep_free (void); #define MAX_COLOR_MODES 5 diff --git a/src/include/picasso96.h b/src/include/picasso96.h index 8c3bf6bb..1044b071 100644 --- a/src/include/picasso96.h +++ b/src/include/picasso96.h @@ -540,6 +540,7 @@ struct picasso96_state_struct // support NO direct access all the time to gfx Card // everytime windows can remove your surface from card so the mainrender place // must be in memory + long XYOffset; }; extern void InitPicasso96 (void); @@ -569,7 +570,7 @@ extern uae_u16 picasso96_pixel_format; extern void DX_SetPalette (int start, int count); extern int DX_FillResolutions (uae_u16 *); extern int DX_BitsPerCannon (void); -extern void DX_Invalidate (int first, int last); +extern void DX_Invalidate (int x, int y, int width, int height); extern int DX_Blit (int srcx, int srcy, int dstx, int dsty, int w, int h, BLIT_OPCODE opcode); extern int DX_Fill (int dstx, int dsty, int width, int height, uae_u32 color, RGBFTYPE rgbtype); extern void picasso_enablescreen (int on); diff --git a/src/include/readcpu.h b/src/include/readcpu.h index 51c3e79e..c62d05f1 100644 --- a/src/include/readcpu.h +++ b/src/include/readcpu.h @@ -28,7 +28,7 @@ ENUMDECL { i_PACK, i_UNPK, i_TAS, i_BKPT, i_CALLM, i_RTM, i_TRAPcc, i_MOVES, i_FPP, i_FDBcc, i_FScc, i_FTRAPcc, i_FBcc, i_FSAVE, i_FRESTORE, i_CINVL, i_CINVP, i_CINVA, i_CPUSHL, i_CPUSHP, i_CPUSHA, i_MOVE16, - i_MMUOP, i_EMULOP_RETURN, i_EMULOP, i_NATFEAT_ID, i_NATFEAT_CALL + i_MMUOP30A, i_MMUOP30B, i_MMUOP, i_EMULOP_RETURN, i_EMULOP, i_NATFEAT_ID, i_NATFEAT_CALL } ENUMNAME (instrmnem); extern struct mnemolookup { diff --git a/src/include/savestate.h b/src/include/savestate.h index 228bb425..7f5e3117 100644 --- a/src/include/savestate.h +++ b/src/include/savestate.h @@ -52,6 +52,7 @@ extern uae_u8 *restore_floppy (uae_u8 *src); extern uae_u8 *save_floppy (int *len, uae_u8 *); extern void DISK_save_custom (uae_u32 *pdskpt, uae_u16 *pdsklen, uae_u16 *pdsksync, uae_u16 *pdskbytr); extern void DISK_restore_custom (uae_u32 pdskpt, uae_u16 pdsklength, uae_u16 pdskbytr); +extern void restore_disk_finish (void); extern uae_u8 *restore_custom (uae_u8 *); extern uae_u8 *save_custom (int *, uae_u8 *, int); @@ -83,11 +84,15 @@ extern uae_u8 *save_keyboard (int *); extern uae_u8 *restore_filesys (uae_u8 *src); extern uae_u8 *save_filesys (int num, int *len); +extern uae_u8 *restore_filesys_common (uae_u8 *src); +extern uae_u8 *save_filesys_common (int *len); +extern int save_filesys_cando(void); extern void restore_cram (int, size_t); extern void restore_bram (int, size_t); extern void restore_fram (uae_u32, size_t); extern void restore_zram (uae_u32, size_t); +extern void restore_bootrom (int, size_t); extern void restore_pram (int, size_t); extern void restore_ram (size_t, uae_u8*); @@ -95,13 +100,14 @@ extern uae_u8 *save_cram (int *); extern uae_u8 *save_bram (int *); extern uae_u8 *save_fram (int *); extern uae_u8 *save_zram (int *); +extern uae_u8 *save_bootrom (int *); extern uae_u8 *save_pram (int *); extern uae_u8 *restore_rom (uae_u8 *); extern uae_u8 *save_rom (int, int *, uae_u8 *); extern void savestate_initsave (char *filename, int docompress); -extern void save_state (char *filename, const char *description); +extern int save_state (char *filename, const char *description); extern void restore_state (char *filename); extern void savestate_restore_finish (void); diff --git a/src/include/sysdeps.h b/src/include/sysdeps.h index d9382dde..6823b84f 100644 --- a/src/include/sysdeps.h +++ b/src/include/sysdeps.h @@ -1,4 +1,7 @@ - /* +#ifndef UAE_SYSDEPS_H +#define UAE_SYSDEPS_H + +/* * UAE - The Un*x Amiga Emulator * * Try to include the right system headers and get other system-specific @@ -395,3 +398,5 @@ static inline uae_u32 do_byteswap_16(uae_u32 v) {__asm__ ( #define FILEFLAG_EXECUTE 0x10 #define FILEFLAG_SCRIPT 0x20 #define FILEFLAG_PURE 0x40 + +#endif diff --git a/src/include/traps.h b/src/include/traps.h index f7038033..05262653 100644 --- a/src/include/traps.h +++ b/src/include/traps.h @@ -44,6 +44,7 @@ unsigned int define_trap (TrapHandler handler_func, int flags, const char *name) * Call a 68k Library function from an extended trap */ extern uae_u32 CallLib (TrapContext *context, uaecptr library_base, uae_s16 func_offset); +extern uae_u32 CallFunc (TrapContext *context, uaecptr func); /* * Initialization diff --git a/src/include/uae.h b/src/include/uae.h index 5dbded9a..d6f154e3 100644 --- a/src/include/uae.h +++ b/src/include/uae.h @@ -44,4 +44,5 @@ struct bstring { int val; }; +#define uaerand() rand() #endif //UAE_UAE_H diff --git a/src/include/xwin.h b/src/include/xwin.h index 8018f756..ae83554c 100644 --- a/src/include/xwin.h +++ b/src/include/xwin.h @@ -71,7 +71,7 @@ struct vidbuf_description * - set linemem to point at your buffer * - implement flush_line to copy a single line to the screen */ - uae_u8 *bufmem; + uae_u8 *bufmem, *bufmemend; uae_u8 *realbufmem; uae_u8 *linemem; uae_u8 *emergmem; diff --git a/src/include/zarchive.h b/src/include/zarchive.h new file mode 100644 index 00000000..1d88da78 --- /dev/null +++ b/src/include/zarchive.h @@ -0,0 +1,102 @@ + +struct zfile { + char *name; + char *zipname; + FILE *f; + uae_u8 *data; + int size; + int seek; + int deleteafterclose; + struct zfile *next; +}; + +struct znode { + int isfile; + struct znode *sibling; + struct znode *child; + struct zvolume *vchild; + struct znode *parent; + struct zvolume *volume; + struct znode *next; + struct znode *prev; + struct znode *vfile; // points to real file when this node is virtual directory + char *name; + char *fullname; + unsigned int size; + struct zfile *f; + char *comment; + int flags; + time_t mtime; + /* decompressor specific */ + unsigned int offset; + unsigned int offset2; + unsigned int method; + unsigned int packedsize; +}; + +struct zvolume +{ + struct zfile *archive; + void *handle; + struct znode root; + struct zvolume *next; + struct znode *last; + struct zvolume *parent; + unsigned int size; + unsigned int blocks; + unsigned int id; + unsigned int archivesize; + unsigned int method; +}; + +struct zarchive_info +{ + const char *name; + unsigned int size; + int flags; + char *comment; + time_t t; +}; + +#define ArchiveFormat7Zip '7z ' +#define ArchiveFormatRAR 'rar ' +#define ArchiveFormatZIP 'zip ' +#define ArchiveFormatLHA 'lha ' +#define ArchiveFormatLZX 'lzx ' +#define ArchiveFormatPLAIN '----' +#define ArchiveFormatAA 'aa ' // method only + +extern int zfile_is_ignore_ext(const char *name); + +extern struct zvolume *zvolume_alloc(struct zfile *z, unsigned int id, void *handle); +extern struct zvolume *zvolume_alloc_empty(const char *name); + +extern struct znode *zvolume_addfile_abs(struct zvolume *zv, struct zarchive_info*); +extern struct znode *zvolume_adddir_abs(struct zvolume *zv, struct zarchive_info *zai); +extern struct znode *znode_adddir(struct znode *parent, const char *name, struct zarchive_info*); + +extern struct zvolume *archive_directory_plain(struct zfile *zf); +extern struct zfile *archive_access_plain (struct znode *zn); +extern struct zvolume *archive_directory_lha(struct zfile *zf); +extern struct zfile *archive_access_lha (struct znode *zn); +extern struct zvolume *archive_directory_zip(struct zfile *zf); +extern struct zfile *archive_access_zip (struct znode *zn); +extern struct zvolume *archive_directory_7z (struct zfile *z); +extern struct zfile *archive_access_7z (struct znode *zn); +extern struct zvolume *archive_directory_rar (struct zfile *z); +extern struct zfile *archive_access_rar (struct znode *zn); +extern struct zvolume *archive_directory_lzx (struct zfile *in_file); +extern struct zfile *archive_access_lzx (struct znode *zn); +extern struct zvolume *archive_directory_arcacc (struct zfile *z, unsigned int id); +extern struct zfile *archive_access_arcacc (struct znode *zn); + +extern struct zfile *archive_access_select (struct zfile *zf, unsigned int id, int doselect); +extern struct zfile *archive_access_arcacc_select (struct zfile *zf, unsigned int id); + + + +extern void archive_access_scan (struct zfile *zf, zfile_callback zc, void *user, unsigned int id); + +extern void archive_access_close (void *handle, unsigned int id); + +extern struct zfile *archive_getzfile(struct znode *zn, unsigned int id); diff --git a/src/include/zfile.h b/src/include/zfile.h index c586ed6b..8a05c3b2 100644 --- a/src/include/zfile.h +++ b/src/include/zfile.h @@ -6,6 +6,7 @@ * (c) 1996 Samuel Devulder */ struct zfile; +struct zvolume; typedef int (*zfile_callback)(struct zfile*, void*); @@ -18,7 +19,12 @@ extern int zfile_fseek (struct zfile *z, long offset, int mode); extern long zfile_ftell (struct zfile *z); extern size_t zfile_fread (void *b, size_t l1, size_t l2, struct zfile *z); extern size_t zfile_fwrite (void *b, size_t l1, size_t l2, struct zfile *z); +extern char *zfile_fgets(char *s, int size, struct zfile *z); extern size_t zfile_fputs (struct zfile *z, char *s); +extern int zfile_getc (struct zfile *z); +extern int zfile_putc (int c, struct zfile *z); +extern int zfile_ferror (struct zfile *z); +extern char *zfile_getdata (struct zfile *z, int offset, int len); extern void zfile_exit (void); //extern int execute_command (char *); @@ -33,6 +39,7 @@ extern uae_u32 zfile_crc32 (struct zfile *f); extern struct zfile *zfile_dup (struct zfile *f); extern struct zfile *zfile_gunzip (struct zfile *z); extern int zfile_isdiskimage (const char *name); +extern int iszip (struct zfile *z); #define ZFILE_UNKNOWN 0 #define ZFILE_CONFIGURATION 1 @@ -46,3 +53,17 @@ extern int zfile_isdiskimage (const char *name); extern const char *uae_archive_extensions[]; extern const char *uae_ignoreextensions[]; extern const char *uae_diskimageextensions[]; + +extern struct zvolume *zfile_fopen_archive(const char *filename); +extern void zfile_fclose_archive(struct zvolume *zv); +extern int zfile_fs_usage_archive(const char *path, const char *disk, struct fs_usage *fsp); +extern int zfile_stat_archive(const char *path, struct stat *statbuf); +extern void *zfile_opendir_archive(const char *path); +extern void zfile_closedir_archive(struct zdirectory*); +extern int zfile_readdir_archive(struct zdirectory *, char*); +extern int zfile_fill_file_attrs_archive(const char *path, int *isdir, int *flags, char **comment); +extern unsigned int zfile_lseek_archive (void *d, unsigned int offset, int whence); +extern unsigned int zfile_read_archive (void *d, void *b, unsigned int size); +extern void zfile_close_archive (void *d); +extern void *zfile_open_archive (const char *path, int flags); +extern int zfile_exists_archive(const char *path, const char *rel); diff --git a/src/inputdevice.cpp b/src/inputdevice.cpp index d3784ba1..0218c972 100644 --- a/src/inputdevice.cpp +++ b/src/inputdevice.cpp @@ -259,7 +259,7 @@ uae_u16 JOY0DAT (void) if (currprefs.pandora_custom_dpad == 1) return ((uae_u8)mouse_x) | ((uae_u16)mouse_y << 8); #else - return ((uae_u8)mouse_x) | ((uae_u16)mouse_y << 8) | joy0dir; + return ((uae_u8)mouse_x) + ((uae_u16)mouse_y << 8) + joy0dir; #endif } @@ -362,6 +362,7 @@ void inputdevice_updateconfig (struct uae_prefs *prefs) void inputdevice_default_prefs (struct uae_prefs *p) { + inputdevice_init (); p->input_joymouse_multiplier = 2; p->input_autofire_framecnt = 8; } @@ -369,7 +370,7 @@ void inputdevice_default_prefs (struct uae_prefs *p) void inputdevice_init (void) { init_joystick (); - inputmode_init(); + inputmode_init(); } void inputdevice_close (void) diff --git a/src/linetoscr.h b/src/linetoscr.h index 6fec27e6..3848a8ac 100644 --- a/src/linetoscr.h +++ b/src/linetoscr.h @@ -31,9 +31,9 @@ static __inline__ int LNAME (int spix, int dpix, int stoppos) while (dpix < stoppos) { int pixcol = pixdata.apixels[spix]; TYPE d; - if (spriteagadpfpixels[spix]) { - d = colors_for_drawing.acolors[spriteagadpfpixels[spix]]; - spriteagadpfpixels[spix]=0; + if (spritepixels[spix]) { + d = colors_for_drawing.acolors[spritepixels[spix]]; + spritepixels[spix]=0; } else { int val = lookup[pixcol]; if (lookup_no[pixcol] == 2) val += dblpfofs[bpldualpf2of]; diff --git a/src/main.cpp b/src/main.cpp index df71fb9d..05b1a554 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -78,7 +78,6 @@ void discard_prefs (struct uae_prefs *p, int type) } #ifdef FILESYS filesys_cleanup (); - free_mountinfo (p->mountinfo); #endif } @@ -96,12 +95,45 @@ void fixup_prefs_dimensions (struct uae_prefs *prefs) fixup_prefs_dim2(&prefs->gfx_size_win); } +void fixup_cpu(struct uae_prefs *p) +{ + switch(p->cpu_model) + { + case 68000: + p->address_space_24 = 1; + p->fpu_model = 0; + break; + case 68010: + p->address_space_24 = 1; + p->fpu_model = 0; + break; + case 68020: + break; + case 68030: + p->address_space_24 = 0; + break; + case 68040: + p->address_space_24 = 0; + if (p->fpu_model) + p->fpu_model = 68040; + break; + case 68060: + p->address_space_24 = 0; + if (p->fpu_model) + p->fpu_model = 68060; + break; + } +} + + void fixup_prefs (struct uae_prefs *p) { int err = 0; + fixup_cpu(p); + if ((p->chipmem_size & (p->chipmem_size - 1)) != 0 - || p->chipmem_size < 0x40000 + || p->chipmem_size < 0x20000 || p->chipmem_size > 0x800000) { write_log ("Unsupported chipmem size %x!\n", p->chipmem_size); @@ -127,11 +159,11 @@ void fixup_prefs (struct uae_prefs *p) if ((p->z3fastmem_size & (p->z3fastmem_size - 1)) != 0 || (p->z3fastmem_size != 0 && (p->z3fastmem_size < 0x100000 || p->z3fastmem_size > max_z3fastmem))) { + write_log ("Unsupported Zorro III fastmem size %x (%x)!\n", p->z3fastmem_size, max_z3fastmem); if (p->z3fastmem_size > max_z3fastmem) p->z3fastmem_size = max_z3fastmem; else p->z3fastmem_size = 0; - write_log ("Unsupported Zorro III fastmem size!\n"); err = 1; } p->z3fastmem_start &= ~0xffff; @@ -148,7 +180,7 @@ void fixup_prefs (struct uae_prefs *p) write_log ("Unsupported bogomem size!\n"); err = 1; } - if (p->bogomem_size > 0x100000 && ((p->chipset_mask & CSMASK_AGA) || p->cpu_level >= 2)) { + if (p->bogomem_size > 0x100000 && ((p->chipset_mask & CSMASK_AGA) || p->cpu_model >= 68020)) { p->bogomem_size = 0x100000; write_log ("Possible Gayle bogomem conflict fixed\n"); } @@ -169,13 +201,13 @@ void fixup_prefs (struct uae_prefs *p) p->cachesize = 0; err = 1; } - if (p->cpu_level < 2 && p->z3fastmem_size > 0) { + if (p->z3fastmem_size > 0 && (p->address_space_24 || p->cpu_model < 68020)) { write_log ("Z3 fast memory can't be used with a 68000/68010 emulation. It\n" "requires a 68020 emulation. Turning off Z3 fast memory.\n"); p->z3fastmem_size = 0; err = 1; } - if (p->gfxmem_size > 0 && (p->cpu_level < 2 || p->address_space_24)) { + if (p->gfxmem_size > 0 && (p->cpu_model < 68020 || p->address_space_24)) { write_log ("Picasso96 can't be used with a 68000/68010 or 68EC020 emulation. It\n" "requires a 68020 emulation. Turning off Picasso96.\n"); p->gfxmem_size = 0; @@ -201,11 +233,9 @@ void fixup_prefs (struct uae_prefs *p) p->collision_level = 1; err = 1; } - fixup_prefs_dimensions (p); - if (err) - write_log ("Please use \"uae -h\" to get usage information.\n"); + target_fixup_options (p); } int quit_program = 0; @@ -225,6 +255,7 @@ void uae_quit (void) { if (quit_program != -1) quit_program = -1; + target_quit (); } /* 0 = normal, 1 = nogui, -1 = disable nogui */ @@ -258,13 +289,29 @@ static void parse_cmdline (int argc, char **argv) int i; for (i = 1; i < argc; i++) { +#ifdef DEBUG_M68K +extern int debug_frame_start; +extern int debug_frame_end; + if (strcmp (argv[i], "-debug_start") == 0) { + if(i < argc) { + ++i; + debug_frame_start = atoi(argv[i]); + continue; + } + } + if (strcmp (argv[i], "-debug_end") == 0) { + if(i < argc) { + ++i; + debug_frame_end = atoi(argv[i]); + continue; + } + } +#endif if (strcmp (argv[i], "-cfgparam") == 0) { if (i + 1 < argc) i++; } else if (strncmp (argv[i], "-config=", 8) == 0) { -#ifdef FILESYS - free_mountinfo (currprefs.mountinfo); -#endif + currprefs.mountitems = 0; target_cfgfile_load (&currprefs, argv[i] + 8, -1, 1); } /* Check for new-style "-f xxx" argument, where xxx is config-file */ @@ -272,9 +319,7 @@ static void parse_cmdline (int argc, char **argv) if (i + 1 == argc) { write_log ("Missing argument for '-f' option.\n"); } else { -#ifdef FILESYS - free_mountinfo (currprefs.mountinfo); -#endif + currprefs.mountitems = 0; target_cfgfile_load (&currprefs, argv[++i], -1, 1); } } else if (strcmp (argv[i], "-s") == 0) { @@ -310,9 +355,12 @@ static void parse_cmdline_and_init_file (int argc, char **argv) void reset_all_systems (void) { init_eventtab (); +#ifdef FILESYS + filesys_prepare_reset (); + filesys_reset (); +#endif memory_reset (); #ifdef FILESYS - filesys_reset (); filesys_start_threads (); hardfile_reset (); #endif @@ -357,6 +405,9 @@ void do_leave_program (void) #endif #ifdef FILESYS filesys_cleanup (); +#endif +#ifdef BSDSOCKET + bsdlib_reset (); #endif memory_cleanup (); cfgfile_addcfgparam (0); @@ -387,28 +438,23 @@ static void real_main2 (int argc, char **argv) #endif if (restart_config[0]) { -#ifdef FILESYS - free_mountinfo (currprefs.mountinfo); -#endif default_prefs (&currprefs, 0); fixup_prefs (&currprefs); } if (! graphics_setup ()) { - exit (1); + abort(); } -#ifdef FILESYS - rtarea_init (); - hardfile_install(); -#endif - if (restart_config[0]) parse_cmdline_and_init_file (argc, argv); else currprefs = changed_prefs; - machdep_init (); + if (!machdep_init ()) { + restart_program = 0; + return; + } if (! setup_sound ()) { write_log ("Sound driver unavailable: Sound output disabled\n"); @@ -441,23 +487,27 @@ static void real_main2 (int argc, char **argv) fixup_prefs (&currprefs); changed_prefs = currprefs; + /* force sound settings change */ + currprefs.produce_sound = 0; #ifdef AUTOCONFIG - /* Install resident module to get 8MB chipmem, if requested */ rtarea_setup (); #endif - +#ifdef FILESYS + rtarea_init (); + hardfile_install(); +#endif keybuf_init (); /* Must come after init_joystick */ #ifdef AUTOCONFIG expansion_init (); #endif - memory_init (); - memory_reset (); - #ifdef FILESYS filesys_install (); #endif + memory_init (); + memory_reset (); + #ifdef AUTOCONFIG emulib_install (); native2amiga_install (); @@ -472,11 +522,11 @@ static void real_main2 (int argc, char **argv) gui_update (); if (graphics_init ()) { -#ifdef FILESYS - filesys_init (); /* New function, to do 'add_filesys_unit()' calls at start-up */ -#endif - if (sound_available && currprefs.produce_sound > 1 && ! init_audio ()) { - write_log ("Sound driver unavailable: Sound output disabled\n"); + + if(!init_audio ()) { + if (sound_available && currprefs.produce_sound > 1) { + write_log ("Sound driver unavailable: Sound output disabled\n"); + } currprefs.produce_sound = 0; } @@ -486,8 +536,6 @@ static void real_main2 (int argc, char **argv) void real_main (int argc, char **argv) { - free_mountinfo (&options_mountinfo); - currprefs.mountinfo = changed_prefs.mountinfo = &options_mountinfo; restart_program = 1; fetch_configurationpath (restart_config, sizeof (restart_config)); strcat (restart_config, OPTIONSFILENAME); diff --git a/src/md-pandora/m68k.h b/src/md-pandora/m68k.h index d36f12c2..8e434102 100644 --- a/src/md-pandora/m68k.h +++ b/src/md-pandora/m68k.h @@ -68,11 +68,11 @@ struct flag_struct { #define FLAGVAL_V (1 << FLAGBIT_V) #define FLAGVAL_X (1 << FLAGBIT_X) -#define SET_ZFLG(flags, y) ((flags)->cznv = ((flags)->cznv & ~FLAGVAL_Z) | (((y) & 1) << FLAGBIT_Z)) -#define SET_CFLG(flags, y) ((flags)->cznv = ((flags)->cznv & ~FLAGVAL_C) | (((y) & 1) << FLAGBIT_C)) -#define SET_VFLG(flags, y) ((flags)->cznv = ((flags)->cznv & ~FLAGVAL_V) | (((y) & 1) << FLAGBIT_V)) -#define SET_NFLG(flags, y) ((flags)->cznv = ((flags)->cznv & ~FLAGVAL_N) | (((y) & 1) << FLAGBIT_N)) -#define SET_XFLG(flags, y) ((flags)->x = (y) << FLAGBIT_X) +#define SET_ZFLG(flags, y) ((flags)->cznv = ((flags)->cznv & ~FLAGVAL_Z) | (((y) ? 1 : 0) << FLAGBIT_Z)) +#define SET_CFLG(flags, y) ((flags)->cznv = ((flags)->cznv & ~FLAGVAL_C) | (((y) ? 1 : 0) << FLAGBIT_C)) +#define SET_VFLG(flags, y) ((flags)->cznv = ((flags)->cznv & ~FLAGVAL_V) | (((y) ? 1 : 0) << FLAGBIT_V)) +#define SET_NFLG(flags, y) ((flags)->cznv = ((flags)->cznv & ~FLAGVAL_N) | (((y) ? 1 : 0) << FLAGBIT_N)) +#define SET_XFLG(flags, y) ((flags)->x = ((y) ? 1 : 0) << FLAGBIT_X) #define GET_ZFLG(flags) (((flags)->cznv >> FLAGBIT_Z) & 1) #define GET_CFLG(flags) (((flags)->cznv >> FLAGBIT_C) & 1) @@ -132,12 +132,12 @@ struct flag_struct { #define FLAGVAL_Z 0x40000000 #define FLAGVAL_N 0x80000000 -#define SET_NFLG(flags, y) ((flags)->nzcv = ((flags)->nzcv & ~0x80000000) | ((y) << 31)) -#define SET_ZFLG(flags, y) ((flags)->nzcv = ((flags)->nzcv & ~0x40000000) | (((y) & 1) << 30)) -#define SET_CFLG(flags, y) ((flags)->nzcv = ((flags)->nzcv & ~0x20000000) | (((y) & 1) << 29)) -#define SET_VFLG(flags, y) ((flags)->nzcv = ((flags)->nzcv & ~0x10000000) | (((y) & 1) << 28)) +#define SET_NFLG(flags, y) ((flags)->nzcv = ((flags)->nzcv & ~0x80000000) | (((y) ? 1 : 0) << 31)) +#define SET_ZFLG(flags, y) ((flags)->nzcv = ((flags)->nzcv & ~0x40000000) | (((y) ? 1 : 0) << 30)) +#define SET_CFLG(flags, y) ((flags)->nzcv = ((flags)->nzcv & ~0x20000000) | (((y) ? 1 : 0) << 29)) +#define SET_VFLG(flags, y) ((flags)->nzcv = ((flags)->nzcv & ~0x10000000) | (((y) ? 1 : 0) << 28)) -#define SET_XFLG(flags, y) ((flags)->x = (y)) +#define SET_XFLG(flags, y) ((flags)->x = ((y) ? 1 : 0)) #define GET_NFLG(flags) (((flags)->nzcv >> 31) & 1) #define GET_ZFLG(flags) (((flags)->nzcv >> 30) & 1) diff --git a/src/md-pandora/maccess.h b/src/md-pandora/maccess.h index 6611e348..77d0339b 100644 --- a/src/md-pandora/maccess.h +++ b/src/md-pandora/maccess.h @@ -14,7 +14,7 @@ #ifdef ARMV6_ASSEMBLY -static __inline__ uae_u16 do_get_mem_word(uae_u16 *_GCCRES_ a) +STATIC_INLINE uae_u16 do_get_mem_word(uae_u16 *_GCCRES_ a) { uae_u16 v; __asm__ __volatile__ ( @@ -24,7 +24,7 @@ static __inline__ uae_u16 do_get_mem_word(uae_u16 *_GCCRES_ a) return v; } #else -static __inline__ uae_u16 do_get_mem_word(uae_u16 *_GCCRES_ a) +STATIC_INLINE uae_u16 do_get_mem_word(uae_u16 *_GCCRES_ a) { uae_u8 *b = (uae_u8 *)a; @@ -34,7 +34,7 @@ static __inline__ uae_u16 do_get_mem_word(uae_u16 *_GCCRES_ a) #ifdef ARMV6_ASSEMBLY -static inline uae_u32 do_get_mem_long(uae_u32 *a) +STATIC_INLINE uae_u32 do_get_mem_long(uae_u32 *a) { uae_u32 v; __asm__ __volatile__ ( @@ -44,7 +44,7 @@ static inline uae_u32 do_get_mem_long(uae_u32 *a) return v; } #else -static __inline__ uae_u32 do_get_mem_long(uae_u32 *_GCCRES_ a) +STATIC_INLINE uae_u32 do_get_mem_long(uae_u32 *_GCCRES_ a) { uae_u8 *b = (uae_u8 *)a; @@ -53,13 +53,13 @@ static __inline__ uae_u32 do_get_mem_long(uae_u32 *_GCCRES_ a) #endif -static __inline__ uae_u8 do_get_mem_byte(uae_u8 *_GCCRES_ a) +STATIC_INLINE uae_u8 do_get_mem_byte(uae_u8 *_GCCRES_ a) { return *a; } #ifdef ARMV6_ASSEMBLY -static __inline__ void do_put_mem_word(uae_u16 *_GCCRES_ a, uae_u16 v) +STATIC_INLINE void do_put_mem_word(uae_u16 *_GCCRES_ a, uae_u16 v) { __asm__ __volatile__ ( "rev16 r2, %[v] \n\t" @@ -67,7 +67,7 @@ static __inline__ void do_put_mem_word(uae_u16 *_GCCRES_ a, uae_u16 v) : : [v] "r" (v), [a] "r" (a) : "r2", "memory" ); } #else -static __inline__ void do_put_mem_word(uae_u16 *_GCCRES_ a, uae_u16 v) +STATIC_INLINE void do_put_mem_word(uae_u16 *_GCCRES_ a, uae_u16 v) { uae_u8 *b = (uae_u8 *)a; @@ -77,7 +77,7 @@ static __inline__ void do_put_mem_word(uae_u16 *_GCCRES_ a, uae_u16 v) #endif #ifdef ARMV6_ASSEMBLY -static __inline__ void do_put_mem_long(uae_u32 *_GCCRES_ a, uae_u32 v) +STATIC_INLINE void do_put_mem_long(uae_u32 *_GCCRES_ a, uae_u32 v) { __asm__ __volatile__ ( "rev r2, %[v] \n\t" @@ -85,7 +85,7 @@ static __inline__ void do_put_mem_long(uae_u32 *_GCCRES_ a, uae_u32 v) : : [v] "r" (v), [a] "r" (a) : "r2", "memory" ); } #else -static __inline__ void do_put_mem_long(uae_u32 *_GCCRES_ a, uae_u32 v) +STATIC_INLINE void do_put_mem_long(uae_u32 *_GCCRES_ a, uae_u32 v) { uae_u8 *b = (uae_u8 *)a; @@ -96,7 +96,7 @@ static __inline__ void do_put_mem_long(uae_u32 *_GCCRES_ a, uae_u32 v) } #endif -static __inline__ void do_put_mem_byte(uae_u8 *_GCCRES_ a, uae_u8 v) +STATIC_INLINE void do_put_mem_byte(uae_u8 *_GCCRES_ a, uae_u8 v) { *a = v; } diff --git a/src/md-pandora/md-fpp.h b/src/md-pandora/md-fpp.h index aebb1903..6d016e1c 100644 --- a/src/md-pandora/md-fpp.h +++ b/src/md-pandora/md-fpp.h @@ -39,13 +39,8 @@ STATIC_INLINE double to_double (uae_u32 wrd1, uae_u32 wrd2) uae_u32 u[2]; } val; -#ifdef WORDS_BIGENDIAN - val.u[0] = wrd1; - val.u[1] = wrd2; -#else val.u[1] = wrd1; val.u[0] = wrd2; -#endif return val.d; } @@ -57,13 +52,8 @@ STATIC_INLINE void from_double (double src, uae_u32 * wrd1, uae_u32 * wrd2) } val; val.d = src; -#ifdef WORDS_BIGENDIAN - *wrd1 = val.u[0]; - *wrd2 = val.u[1]; -#else *wrd1 = val.u[1]; *wrd2 = val.u[0]; -#endif } #define HAVE_from_double diff --git a/src/md-pandora/support.cpp b/src/md-pandora/support.cpp index 962947e4..1bbd2e09 100644 --- a/src/md-pandora/support.cpp +++ b/src/md-pandora/support.cpp @@ -14,7 +14,7 @@ int64_t g_uae_epoch = 0; -void machdep_init (void) +int machdep_init (void) { picasso_requested_on = 0; picasso_on = 0; @@ -23,6 +23,8 @@ void machdep_init (void) // Initialize timebase g_uae_epoch = read_processor_time(); syncbase = 1000000; // Microseconds + + return 1; } diff --git a/src/memory.cpp b/src/memory.cpp index eb3a4090..1fe47cb1 100644 --- a/src/memory.cpp +++ b/src/memory.cpp @@ -39,14 +39,22 @@ uae_u32 allocated_bogomem; uae_u32 allocated_gfxmem; uae_u32 allocated_z3fastmem; #if !( defined(PANDORA) || defined(ANDROIDSDL) ) -uae_u32 allocated_a3000mem; +uae_u32 allocated_a3000lmem; +uae_u32 allocated_a3000hmem; +uae_u32 allocated_cardmem; #endif uae_u32 max_z3fastmem = 64 * 1024 * 1024; -static size_t chip_filepos; -static size_t bogo_filepos; -static size_t rom_filepos; +static size_t bootrom_filepos, chip_filepos, bogo_filepos, rom_filepos, a3000lmem_filepos, a3000hmem_filepos; + +/* Set if we notice during initialization that settings changed, + and we must clear all memory to prevent bogus contents from confusing + the Kickstart. */ +static int need_hardreset; + +/* The address space setting used during the last reset. */ +static int last_address_space_24; static struct romlist *rl; static int romlist_cnt; @@ -82,69 +90,194 @@ void romlist_clear (void) romlist_cnt = 0; } -static struct romdata roms[] = { - { "Cloanto Amiga Forever ROM key", 0, 0, 0, 0, 0, 0x869ae1b1, 2069, 0, 0, 1, ROMTYPE_KEY }, - { "Cloanto Amiga Forever 2006 ROM key", 0, 0, 0, 0, 0, 0xb01c4b56, 750, 48, 0, 1, ROMTYPE_KEY }, +struct romdata *getromdatabypath(char *path) +{ + int i; + for (i = 0; i < romlist_cnt; i++) { + struct romdata *rd = rl[i].rd; + if (rd->configname && path[0] == ':') { + if (!strcmp(path + 1, rd->configname)) + return rd; + } + if (!strcmp(rl[i].path, path)) + return rl[i].rd; + } + return NULL; +} - { "KS ROM v1.0 (A1000)(NTSC)", 1, 0, 1, 0, "A1000\0", 0x299790ff, 262144, 1, 0, 0, ROMTYPE_KICK }, - { "KS ROM v1.1 (A1000)(NTSC)", 1, 1, 31, 34, "A1000\0", 0xd060572a, 262144, 2, 0, 0, ROMTYPE_KICK }, - { "KS ROM v1.1 (A1000)(PAL)", 1, 1, 31, 34, "A1000\0", 0xec86dae2, 262144, 3, 0, 0, ROMTYPE_KICK }, - { "KS ROM v1.2 (A1000)", 1, 2, 33, 166, "A1000\0", 0x9ed783d0, 262144, 4, 0, 0, ROMTYPE_KICK }, - { "KS ROM v1.2 (A500,A1000,A2000)", 1, 2, 33, 180, "A500\0A1000\0A2000\0", 0xa6ce1636, 262144, 5, 0, 0, ROMTYPE_KICK }, - { "KS ROM v1.3 (A500,A1000,A2000)", 1, 3, 34, 5, "A500\0A1000\0A2000\0", 0xc4f0f55f, 262144, 6, 60, 0, ROMTYPE_KICK }, - { "KS ROM v1.3 (A3000)", 1, 3, 34, 5, "A3000\0", 0xe0f37258, 262144, 32, 0, 0, ROMTYPE_KICK }, +#define NEXT_ROM_ID 73 - { "KS ROM v2.04 (A500+)", 2, 4, 37, 175, "A500+\0", 0xc3bdb240, 524288, 7, 0, 0, ROMTYPE_KICK }, - { "KS ROM v2.05 (A600)", 2, 5, 37, 299, "A600\0", 0x83028fb5, 524288, 8, 0, 0, ROMTYPE_KICK }, - { "KS ROM v2.05 (A600HD)", 2, 5, 37, 300, "A600HD\0A600\0", 0x64466c2a, 524288, 9, 0, 0, ROMTYPE_KICK }, - { "KS ROM v2.05 (A600HD)", 2, 5, 37, 350, "A600HD\0A600\0", 0x43b0df7b, 524288, 10, 0, 0, ROMTYPE_KICK }, - - { "KS ROM v3.0 (A1200)", 3, 0, 39, 106, "A1200\0", 0x6c9b07d2, 524288, 11, 0, 0, ROMTYPE_KICK }, - { "KS ROM v3.0 (A4000)", 3, 0, 39, 106, "A4000\0", 0x9e6ac152, 524288, 12, 2, 0, ROMTYPE_KICK }, - { "KS ROM v3.1 (A4000)", 3, 1, 40, 70, "A4000\0", 0x2b4566f1, 524288, 13, 2, 0, ROMTYPE_KICK }, - { "KS ROM v3.1 (A500,A600,A2000)", 3, 1, 40, 63, "A500\0A600\0A2000\0", 0xfc24ae0d, 524288, 14, 0, 0, ROMTYPE_KICK }, - { "KS ROM v3.1 (A1200)", 3, 1, 40, 68, "A1200\0", 0x1483a091, 524288, 15, 1, 0, ROMTYPE_KICK }, - { "KS ROM v3.1 (A4000)(Cloanto)", 3, 1, 40, 68, "A4000\0", 0x43b6dd22, 524288, 31, 2, 1, ROMTYPE_KICK }, - { "KS ROM v3.1 (A4000)", 3, 1, 40, 68, "A4000\0", 0xd6bae334, 524288, 16, 2, 0, ROMTYPE_KICK }, - { "KS ROM v3.1 (A4000T)", 3, 1, 40, 70, "A4000T\0", 0x75932c3a, 524288, 17, 2, 0, ROMTYPE_KICK }, - { "KS ROM v3.X (A4000)(Cloanto)", 3, 10, 45, 57, "A4000\0", 0x08b69382, 524288, 46, 2, 0, ROMTYPE_KICK }, - - { "CD32 KS ROM v3.1", 3, 1, 40, 60, "CD32\0", 0x1e62d4a5, 524288, 18, 1, 0, ROMTYPE_KICKCD32 }, - { "CD32 extended ROM", 3, 1, 40, 60, "CD32\0", 0x87746be2, 524288, 19, 1, 0, ROMTYPE_EXTCD32 }, - - { "CDTV extended ROM v1.00", 1, 0, 1, 0, "CDTV\0", 0x42baa124, 262144, 20, 0, 0, ROMTYPE_EXTCDTV }, - { "CDTV extended ROM v2.30", 2, 30, 2, 30, "CDTV\0", 0x30b54232, 262144, 21, 0, 0, ROMTYPE_EXTCDTV }, - { "CDTV extended ROM v2.07", 2, 7, 2, 7, "CDTV\0", 0xceae68d2, 262144, 22, 0, 0, ROMTYPE_EXTCDTV }, - - { "A1000 bootstrap ROM", 0, 0, 0, 0, "A1000\0", 0x62f11c04, 8192, 23, 0, 0, ROMTYPE_KICK }, - { "A1000 bootstrap ROM", 0, 0, 0, 0, "A1000\0", 0x0b1ad2d0, 65536, 24, 0, 0, ROMTYPE_KICK }, - - { "Action Replay Mk I v1.50", 1, 50, 1, 50, "AR\0", 0xd4ce0675, 65536, 25, 0, 0, ROMTYPE_AR }, - { "Action Replay Mk II v2.05", 2, 5, 2, 5, "AR\0", 0x1287301f , 131072, 26, 0, 0, ROMTYPE_AR }, - { "Action Replay Mk II v2.12", 2, 12, 2, 12, "AR\0", 0x804d0361 , 131072, 27, 0, 0, ROMTYPE_AR }, - { "Action Replay Mk II v2.14", 2, 14, 2, 14, "AR\0", 0x49650e4f, 131072, 28, 0, 0, ROMTYPE_AR }, - { "Action Replay Mk III v3.09", 3, 9, 3, 9, "AR\0", 0x0ed9b5aa, 262144, 29, 0, 0, ROMTYPE_AR }, - { "Action Replay Mk III v3.17", 3, 17, 3, 17, "AR\0", 0xc8a16406, 262144, 30, 0, 0, ROMTYPE_AR }, - { "Action Replay 1200", 0, 0, 0, 0, "AR\0", 0x8d760101, 262144, 47, 0, 0, ROMTYPE_AR }, - - { "Arcadia SportTime Table Hockey\0ar_airh", 0, 0, 0, 0, "ARCADIA\0", 0, 0, 33, 0, 0, ROMTYPE_ARCADIA }, - { "Arcadia SportTime Bowling\0ar_bowl", 0, 0, 0, 0, "ARCADIA\0", 0, 0, 34, 0, 0, ROMTYPE_ARCADIA }, - { "Arcadia World Darts\0ar_dart", 0, 0, 0, 0, "ARCADIA\0", 0, 0, 35, 0, 0, ROMTYPE_ARCADIA }, - { "Arcadia Magic Johnson's Fast Break\0ar_fast", 0, 0, 0, 0, "ARCADIA\0", 0, 0, 36, 0, 0, ROMTYPE_ARCADIA }, - { "Arcadia Leader Board Golf\0ar_ldrb", 0, 0, 0, 0, "ARCADIA\0", 0, 0, 37, 0, 0, ROMTYPE_ARCADIA }, - { "Arcadia Leader Board Golf (alt)\0ar_ldrba", 0, 0, 0, 0, "ARCADIA\0", 0, 0, 38, 0, 0, ROMTYPE_ARCADIA }, - { "Arcadia Ninja Mission\0ar_ninj", 0, 0, 0, 0, "ARCADIA\0", 0, 0, 39, 0, 0, ROMTYPE_ARCADIA }, - { "Arcadia Road Wars\0ar_rdwr", 0, 0, 0, 0, "ARCADIA\0", 0, 0, 40, 0, 0, ROMTYPE_ARCADIA }, - { "Arcadia Sidewinder\0ar_sdwr", 0, 0, 0, 0, "ARCADIA\0", 0, 0, 41, 0, 0, ROMTYPE_ARCADIA }, - { "Arcadia Cool Spot\0ar_spot", 0, 0, 0, 0, "ARCADIA\0", 0, 0, 42, 0, 0, ROMTYPE_ARCADIA }, - { "Arcadia Space Ranger\0ar_sprg", 0, 0, 0, 0, "ARCADIA\0", 0, 0, 43, 0, 0, ROMTYPE_ARCADIA }, - { "Arcadia Xenon\0ar_xeon", 0, 0, 0, 0, "ARCADIA\0", 0, 0, 44, 0, 0, ROMTYPE_ARCADIA }, - { "Arcadia World Trophy Soccer\0ar_socc", 0, 0, 0, 0, "ARCADIA\0", 0, 0, 45, 0, 0, ROMTYPE_ARCADIA }, - - { NULL, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } +static struct romheader romheaders[] = { + { "Freezer Cartridges", 1 }, + { "Arcadia Games", 2 }, + { NULL, 0 } }; -struct romlist **getrombyident(int ver, int rev, int subver, int subrev, char *model, int all) +#define ALTROM(id,grp,num,size,flags,crc32,a,b,c,d,e) \ + { "X", 0, 0, 0, 0, 0, size, id, 0, 0, flags, (grp << 16) | num, 0, crc32, a, b, c, d, e }, + +static struct romdata roms[] = { + { "Cloanto Amiga Forever ROM key", 0, 0, 0, 0, 0, 2069, 0, 0, 1, ROMTYPE_KEY, 0, 0, + 0x869ae1b1, 0x801bbab3,0x2e3d3738,0x6dd1636d,0x4f1d6fa7,0xe21d5874 }, + { "Cloanto Amiga Forever 2006 ROM key", 0, 0, 0, 0, 0, 750, 48, 0, 1, ROMTYPE_KEY, 0, 0, + 0xb01c4b56, 0xbba8e5cd,0x118b8d92,0xafed5693,0x5eeb9770,0x2a662d8f }, + + { "KS ROM v1.0 (A1000)(NTSC)", 1, 0, 1, 0, "A1000\0", 262144, 1, 0, 0, ROMTYPE_KICK, 0, 0, + 0x299790ff, 0x00C15406,0xBEB4B8AB,0x1A16AA66,0xC05860E1,0xA7C1AD79 }, + { "KS ROM v1.1 (A1000)(NTSC)", 1, 1, 31, 34, "A1000\0", 262144, 2, 0, 0, ROMTYPE_KICK, 0, 0, + 0xd060572a, 0x4192C505,0xD130F446,0xB2ADA6BD,0xC91DAE73,0x0ACAFB4C}, + { "KS ROM v1.1 (A1000)(PAL)", 1, 1, 31, 34, "A1000\0", 262144, 3, 0, 0, ROMTYPE_KICK, 0, 0, + 0xec86dae2, 0x16DF8B5F,0xD524C5A1,0xC7584B24,0x57AC15AF,0xF9E3AD6D }, + { "KS ROM v1.2 (A1000)", 1, 2, 33, 166, "A1000\0", 262144, 4, 0, 0, ROMTYPE_KICK, 0, 0, + 0x9ed783d0, 0x6A7BFB5D,0xBD6B8F17,0x9F03DA84,0xD8D95282,0x67B6273B }, + { "KS ROM v1.2 (A500,A1000,A2000)", 1, 2, 33, 180, "A500\0A1000\0A2000\0", 262144, 5, 0, 0, ROMTYPE_KICK, 0, 0, + 0xa6ce1636, 0x11F9E62C,0xF299F721,0x84835B7B,0x2A70A163,0x33FC0D88 }, + { "KS ROM v1.3 (A500,A1000,A2000)", 1, 3, 34, 5, "A500\0A1000\0A2000\0", 262144, 6, 0, 0, ROMTYPE_KICK, 0, 0, + 0xc4f0f55f, 0x891E9A54,0x7772FE0C,0x6C19B610,0xBAF8BC4E,0xA7FCB785 }, + { "KS ROM v1.3 (A3000)(SK)", 1, 3, 34, 5, "A3000\0", 262144, 32, 0, 0, ROMTYPE_KICK, 0, 0, + 0xe0f37258, 0xC39BD909,0x4D4E5F4E,0x28C1411F,0x30869504,0x06062E87 }, + { "KS ROM v1.4 (A3000)", 1, 4, 36, 16, "A3000\0", 524288, 59, 3, 0, ROMTYPE_KICK, 0, 0, + 0xbc0ec13f, 0xF76316BF,0x36DFF14B,0x20FA349E,0xD02E4B11,0xDD932B07 }, + + { "KS ROM v2.04 (A500+)", 2, 4, 37, 175, "A500+\0", 524288, 7, 0, 0, ROMTYPE_KICK, 0, 0, + 0xc3bdb240, 0xC5839F5C,0xB98A7A89,0x47065C3E,0xD2F14F5F,0x42E334A1 }, + { "KS ROM v2.05 (A600)", 2, 5, 37, 299, "A600\0", 524288, 8, 0, 0, ROMTYPE_KICK, 0, 0, + 0x83028fb5, 0x87508DE8,0x34DC7EB4,0x7359CEDE,0x72D2E3C8,0xA2E5D8DB }, + { "KS ROM v2.05 (A600HD)", 2, 5, 37, 300, "A600HD\0A600\0", 524288, 9, 0, 0, ROMTYPE_KICK, 0, 0, + 0x64466c2a, 0xF72D8914,0x8DAC39C6,0x96E30B10,0x859EBC85,0x9226637B }, + { "KS ROM v2.05 (A600HD)", 2, 5, 37, 350, "A600HD\0A600\0", 524288, 10, 0, 0, ROMTYPE_KICK, 0, 0, + 0x43b0df7b, 0x02843C42,0x53BBD29A,0xBA535B0A,0xA3BD9A85,0x034ECDE4 }, + { "KS ROM v2.04 (A3000)", 2, 4, 37, 132, "A3000\0", 524288, 71, 3, 0, ROMTYPE_KICK, 0, 0, + 0x234a7233, 0xd82ebb59,0xafc53540,0xddf2d718,0x7ecf239b,0x7ea91590 }, + ALTROM(71, 1, 1, 262144, ROMTYPE_EVEN, 0x7db1332b,0x48f14b31,0x279da675,0x7848df6f,0xeb531881,0x8f8f576c) + ALTROM(71, 1, 2, 262144, ROMTYPE_ODD , 0xa245dbdf,0x83bab8e9,0x5d378b55,0xb0c6ae65,0x61385a96,0xf638598f) + + { "KS ROM v3.0 (A1200)", 3, 0, 39, 106, "A1200\0", 524288, 11, 0, 0, ROMTYPE_KICK, 0, 0, + 0x6c9b07d2, 0x70033828,0x182FFFC7,0xED106E53,0x73A8B89D,0xDA76FAA5 }, + { "KS ROM v3.0 (A4000)", 3, 0, 39, 106, "A4000\0", 524288, 12, 2 | 4, 0, ROMTYPE_KICK, 0, 0, + 0x9e6ac152, 0xF0B4E9E2,0x9E12218C,0x2D5BD702,0x0E4E7852,0x97D91FD7 }, + { "KS ROM v3.1 (A4000)", 3, 1, 40, 70, "A4000\0", 524288, 13, 2 | 4, 0, ROMTYPE_KICK, 0, 0, + 0x2b4566f1, 0x81c631dd,0x096bbb31,0xd2af9029,0x9c76b774,0xdb74076c }, + { "KS ROM v3.1 (A500,A600,A2000)", 3, 1, 40, 63, "A500\0A600\0A2000\0", 524288, 14, 0, 0, ROMTYPE_KICK, 0, 0, + 0xfc24ae0d, 0x3B7F1493,0xB27E2128,0x30F989F2,0x6CA76C02,0x049F09CA }, + { "KS ROM v3.1 (A1200)", 3, 1, 40, 68, "A1200\0", 524288, 15, 1, 0, ROMTYPE_KICK, 0, 0, + 0x1483a091, 0xE2154572,0x3FE8374E,0x91342617,0x604F1B3D,0x703094F1 }, + { "KS ROM v3.1 (A3000)", 3, 1, 40, 68, "A3000\0", 524288, 61, 2, 0, ROMTYPE_KICK, 0, 0, + 0xefb239cc, 0xF8E210D7,0x2B4C4853,0xE0C9B85D,0x223BA20E,0x3D1B36EE }, + { "KS ROM v3.1 (A4000)(Cloanto)", 3, 1, 40, 68, "A4000\0", 524288, 31, 2 | 4, 1, ROMTYPE_KICK, 0, 0, + 0x43b6dd22, 0xC3C48116,0x0866E60D,0x085E436A,0x24DB3617,0xFF60B5F9 }, + { "KS ROM v3.1 (A4000)", 3, 1, 40, 68, "A4000\0", 524288, 16, 2 | 4, 0, ROMTYPE_KICK, 0, 0, + 0xd6bae334, 0x5FE04842,0xD04A4897,0x20F0F4BB,0x0E469481,0x99406F49 }, + { "KS ROM v3.1 (A4000T)", 3, 1, 40, 70, "A4000T\0", 524288, 17, 2 | 4, 0, ROMTYPE_KICK, 0, 0, + 0x75932c3a, 0xB0EC8B84,0xD6768321,0xE01209F1,0x1E6248F2,0xF5281A21 }, + { "KS ROM v3.X (A4000)(Cloanto)", 3, 10, 45, 57, "A4000\0", 524288, 46, 2 | 4, 0, ROMTYPE_KICK, 0, 0, + 0x08b69382, 0x81D3AEA3,0x0DB7FBBB,0x4AFEE41C,0x21C5ED66,0x2B70CA53 }, + + { "CD32 KS ROM v3.1", 3, 1, 40, 60, "CD32\0", 524288, 18, 1, 0, ROMTYPE_KICKCD32, 0, 0, + 0x1e62d4a5, 0x3525BE88,0x87F79B59,0x29E017B4,0x2380A79E,0xDFEE542D }, + { "CD32 extended ROM", 3, 1, 40, 60, "CD32\0", 524288, 19, 1, 0, ROMTYPE_EXTCD32, 0, 0, + 0x87746be2, 0x5BEF3D62,0x8CE59CC0,0x2A66E6E4,0xAE0DA48F,0x60E78F7F }, + { "CD32 ROM (KS + extended)", 3, 1, 40, 60, "CD32\0", 2 * 524288, 64, 1, 0, ROMTYPE_KICKCD32 | ROMTYPE_EXTCD32, 0, 0, + 0xd3837ae4, 0x06807db3,0x18163745,0x5f4d4658,0x2d9972af,0xec8956d9 }, + { "CD32 MPEG Cartridge ROM", 3, 1, 40, 30, "CD32\0", 262144, 72, 1, 0, ROMTYPE_CD32CART, 0, 0, + 0xc35c37bf, 0x03ca81c7,0xa7b259cf,0x64bc9582,0x863eca0f,0x6529f435 }, + + { "CDTV extended ROM v1.00", 1, 0, 1, 0, "CDTV\0", 262144, 20, 0, 0, ROMTYPE_EXTCDTV, 0, 0, + 0x42baa124, 0x7BA40FFA,0x17E500ED,0x9FED041F,0x3424BD81,0xD9C907BE }, + ALTROM(20, 1, 1, 131072, ROMTYPE_EVEN, 0x791cb14b,0x277a1778,0x92449635,0x3ffe56be,0x68063d2a,0x334360e4) + ALTROM(20, 1, 2, 131072, ROMTYPE_ODD, 0xaccbbc2e,0x41b06d16,0x79c6e693,0x3c3378b7,0x626025f7,0x641ebc5c) + { "CDTV extended ROM v2.07", 2, 7, 2, 7, "CDTV\0", 262144, 22, 0, 0, ROMTYPE_EXTCDTV, 0, 0, + 0xceae68d2, 0x5BC114BB,0xA29F60A6,0x14A31174,0x5B3E2464,0xBFA06846 }, + { "CDTV extended ROM v2.30", 2, 30, 2, 30, "CDTV\0", 262144, 21, 0, 0, ROMTYPE_EXTCDTV, 0, 0, + 0x30b54232, 0xED7E461D,0x1FFF3CDA,0x321631AE,0x42B80E3C,0xD4FA5EBB }, + + { "A1000 bootstrap ROM", 0, 0, 0, 0, "A1000\0", 8192, 23, 0, 0, ROMTYPE_KICK, 0, 0, + 0x62f11c04, 0xC87F9FAD,0xA4EE4E69,0xF3CCA0C3,0x6193BE82,0x2B9F5FE6 }, + { "A1000 bootstrap ROM", 0, 0, 0, 0, "A1000\0", 65536, 24, 0, 0, ROMTYPE_KICK, 0, 0, + 0x0b1ad2d0, 0xBA93B8B8,0x5CA0D83A,0x68225CC3,0x3B95050D,0x72D2FDD7 }, + ALTROM(23, 1, 1, 65536, 0, 0x0b1ad2d0,0xBA93B8B8,0x5CA0D83A,0x68225CC3,0x3B95050D,0x72D2FDD7) + ALTROM(23, 2, 1, 4096, ROMTYPE_EVEN, 0x42553bc4,0x8855a97f,0x7a44e3f6,0x2d1c88d9,0x38fee1f4,0xc606af5b) + ALTROM(23, 2, 2, 4096, ROMTYPE_ODD , 0x8e5b9a37,0xd10f1564,0xb99f5ffe,0x108fa042,0x362e877f,0x569de2c3) + + { "Freezer: Action Replay Mk I v1.00", 1, 0, 1, 0, "AR\0", 65536, 52, 0, 0, ROMTYPE_AR, 0, 1, + 0x2d921771, 0x1EAD9DDA,0x2DAD2914,0x6441F5EF,0x72183750,0x22E01248 }, + { "Freezer: Action Replay Mk I v1.50", 1, 50, 1, 50, "AR\0", 65536, 25, 0, 0, ROMTYPE_AR, 0, 1, + 0xd4ce0675, 0x843B433B,0x2C56640E,0x045D5FDC,0x854DC6B1,0xA4964E7C }, + { "Freezer: Action Replay Mk II v2.05", 2, 5, 2, 5, "AR\0", 131072, 26, 0, 0, ROMTYPE_AR, 0, 1, + 0x1287301f, 0xF6601DE8,0x888F0050,0x72BF562B,0x9F533BBC,0xAF1B0074 }, + { "Freezer: Action Replay Mk II v2.12", 2, 12, 2, 12, "AR\0", 131072, 27, 0, 0, ROMTYPE_AR, 0, 1, + 0x804d0361, 0x3194A07A,0x0A82D8B5,0xF2B6AEFA,0x3CA581D6,0x8BA8762B }, + { "Freezer: Action Replay Mk II v2.14", 2, 14, 2, 14, "AR\0", 131072, 28, 0, 0, ROMTYPE_AR, 0, 1, + 0x49650e4f, 0x255D6DF6,0x3A4EAB0A,0x838EB1A1,0x6A267B09,0x59DFF634 }, + { "Freezer: Action Replay Mk III v3.09", 3, 9, 3, 9, "AR\0", 262144, 29, 0, 0, ROMTYPE_AR, 0, 1, + 0x0ed9b5aa, 0x0FF3170A,0xBBF0CA64,0xC9DD93D6,0xEC0C7A01,0xB5436824 }, + { "Freezer: Action Replay Mk III v3.17", 3, 17, 3, 17, "AR\0", 262144, 30, 0, 0, ROMTYPE_AR, 0, 1, + 0xc8a16406, 0x5D4987C2,0xE3FFEA8B,0x1B02E314,0x30EF190F,0x2DB76542 }, + { "Freezer: Action Replay 1200", 0, 0, 0, 0, "AR\0", 262144, 47, 0, 0, ROMTYPE_AR, 0, 1, + 0x8d760101, 0x0F6AB834,0x2810094A,0xC0642F62,0xBA42F78B,0xC0B07E6A }, + + { "Freezer: Action Cartridge Super IV Professional", 0, 0, 0, 0, "SUPERIV\0", 0, 62, 0, 0, ROMTYPE_SUPERIV, 0, 1, + 0xffffffff, 0, 0, 0, 0, 0, "SuperIV" }, + { "Freezer: Action Cart. Super IV Pro (+ROM v4.3)", 4, 3, 4, 3, "SUPERIV\0", 170368, 60, 0, 0, ROMTYPE_SUPERIV, 0, 1, + 0xe668a0be, 0x633A6E65,0xA93580B8,0xDDB0BE9C,0x9A64D4A1,0x7D4B4801 }, + { "Freezer: X-Power Professional 500 v1.2", 1, 2, 1, 2, "XPOWER\0", 131072, 65, 0, 0, ROMTYPE_XPOWER, 0, 1, + 0x9e70c231, 0xa2977a1c,0x41a8ca7d,0x4af4a168,0x726da542,0x179d5963 }, + ALTROM(65, 1, 1, 65536, ROMTYPE_EVEN|ROMTYPE_SCRAMBLED, 0xf98742e4,0xe8e683ba,0xd8b38d1f,0x79f3ad83,0xa9e67c6f,0xa91dc96c) + ALTROM(65, 1, 2, 65536, ROMTYPE_ODD |ROMTYPE_SCRAMBLED, 0xdfb9984b,0x8d6bdd49,0x469ec8e2,0x0143fbb3,0x72e92500,0x99f07910) + { "Freezer: X-Power Professional 500 v1.3", 1, 2, 1, 2, "XPOWER\0", 131072, 68, 0, 0, ROMTYPE_XPOWER, 0, 1, + 0x31e057f0, 0x84650266,0x465d1859,0x7fd71dee,0x00775930,0xb7e450ee }, + ALTROM(68, 1, 1, 65536, ROMTYPE_EVEN|ROMTYPE_SCRAMBLED, 0x0b2ce0c7,0x45ad5456,0x89192404,0x956f47ce,0xf66a5274,0x57ace33b) + ALTROM(68, 1, 2, 65536, ROMTYPE_ODD |ROMTYPE_SCRAMBLED, 0x34580c35,0x8ad42566,0x7364f238,0x978f4381,0x08f8d5ec,0x470e72ea) + { "Freezer: Nordic Power v1.5", 1, 5, 1, 5, "NPOWER\0", 65536, 69, 0, 0, ROMTYPE_NORDIC, 0, 1, + 0x83b4b21c, 0xc56ced25,0x506a5aab,0x3fa13813,0x4fc9e5ae,0x0f9d3709 }, + ALTROM(69, 1, 1, 32768, ROMTYPE_EVEN|ROMTYPE_SCRAMBLED, 0xdd207174,0xae67652d,0x64f5db20,0x0f4b2110,0xee59567f,0xfbd90a1b) + ALTROM(69, 1, 2, 32768, ROMTYPE_ODD |ROMTYPE_SCRAMBLED, 0x8f93d85d,0x73c62d21,0x40c0c092,0x6315b702,0xdd5d0f05,0x3dad7fab) + { "Freezer: Nordic Power v2.0", 2, 0, 2, 0, "NPOWER\0", 65536, 67, 0, 0, ROMTYPE_NORDIC, 0, 1, + 0xa4db2906, 0x0aec68f7,0x25470c89,0x6b699ff4,0x6623dec5,0xc777466e }, + ALTROM(67, 1, 1, 32768, ROMTYPE_EVEN|ROMTYPE_SCRAMBLED, 0xb21be46c,0x50dc607c,0xce976bbd,0x3841eaf0,0x591ddc7e,0xa1939ad2) + ALTROM(67, 1, 2, 32768, ROMTYPE_ODD |ROMTYPE_SCRAMBLED, 0x96057aed,0xdd9209e2,0x1d5edfc1,0xcdb52abe,0x93de0f35,0xc43da696) + { "Freezer: Nordic Power v3.0", 3, 0, 3, 0, "NPOWER\0", 65536, 70, 0, 0, ROMTYPE_NORDIC, 0, 1, + 0x72850aef, 0x59c91d1f,0xa8f118f9,0x0bdba05a,0x9ae788d7,0x7a6cc7c9 }, + ALTROM(70, 1, 1, 32768, ROMTYPE_EVEN|ROMTYPE_SCRAMBLED, 0xf3330e1f,0x3a597db2,0xb7d11b6c,0xb8e13496,0xc215f223,0x88c4ca3c) + ALTROM(70, 1, 2, 32768, ROMTYPE_EVEN|ROMTYPE_SCRAMBLED, 0xee58e0f9,0x4148f4cb,0xb42cec33,0x8ca144de,0xd4f54118,0xe0f185dd) + { "Freezer: HRTMon v2.30 (built-in)", 0, 0, 0, 0, "HRTMON\0", 0, 63, 0, 0, ROMTYPE_HRTMON, 0, 1, + 0xffffffff, 0, 0, 0, 0, 0, "HRTMon" }, + + { "A590/A2091 SCSI boot ROM", 0, 0, 6, 0, "A590\0A2091\0", 16384, 53, 0, 0, ROMTYPE_A2091BOOT, 0, 0, + 0x8396cf4e, 0x5E03BC61,0x8C862ABE,0x7BF79723,0xB4EEF4D2,0x1859A0F2 }, + { "A590/A2091 SCSI boot ROM", 0, 0, 6, 6, "A590\0A2091\0", 16384, 54, 0, 0, ROMTYPE_A2091BOOT, 0, 0, + 0x33e00a7a, 0x739BB828,0xE874F064,0x9360F59D,0x26B5ED3F,0xBC99BB66 }, + { "A590/A2091 SCSI boot ROM", 0, 0, 7, 0, "A590\0A2091\0", 16384, 55, 0, 0, ROMTYPE_A2091BOOT, 0, 0, + 0x714a97a2, 0xE50F01BA,0xF2899892,0x85547863,0x72A82C33,0x3C91276E }, + { "A590/A2091 SCSI Guru boot ROM", 0, 0, 6, 14, "A590\0A2091\0", 32768, 56, 0, 0, ROMTYPE_A2091BOOT, 0, 0, + 0x04e52f93, 0x6DA21B6F,0x5E8F8837,0xD64507CD,0x8A4D5CDC,0xAC4F426B }, + { "A4091 SCSI boot ROM", 0, 0, 40, 9, "A4091\0", 32768, 57, 0, 0, ROMTYPE_A4091BOOT, 0, 0, + 0x00000000, 0, 0, 0, 0, 0 }, + { "A4091 SCSI boot ROM", 0, 0, 40, 13, "A4091\0", 32768, 58, 0, 0, ROMTYPE_A4091BOOT, 0, 0, + 0x54cb9e85, 0x3CE66919,0xF6FD6797,0x4923A12D,0x91B730F1,0xFFB4A7BA }, + + { "Arcadia OnePlay 2.11", 0, 0, 0, 0, "ARCADIA\0", 0, 49, 0, 0, ROMTYPE_ARCADIABIOS, 0, 0 }, + { "Arcadia TenPlay 2.11", 0, 0, 0, 0, "ARCADIA\0", 0, 50, 0, 0, ROMTYPE_ARCADIABIOS, 0, 0 }, + { "Arcadia OnePlay 3.00", 0, 0, 0, 0, "ARCADIA\0", 0, 51, 0, 0, ROMTYPE_ARCADIABIOS, 0, 0 }, + + { "Arcadia SportTime Table Hockey", 0, 0, 0, 0, "ARCADIA\0", 0, 33, 0, 0, ROMTYPE_ARCADIAGAME, 0, 2 }, + { "Arcadia SportTime Bowling", 0, 0, 0, 0, "ARCADIA\0", 0, 34, 0, 0, ROMTYPE_ARCADIAGAME, 0, 2 }, + { "Arcadia World Darts", 0, 0, 0, 0, "ARCADIA\0", 0, 35, 0, 0, ROMTYPE_ARCADIAGAME, 0, 2 }, + { "Arcadia Magic Johnson's Fast Break", 0, 0, 0, 0, "ARCADIA\0", 0, 36, 0, 0, ROMTYPE_ARCADIAGAME, 0, 2 }, + { "Arcadia Leader Board Golf", 0, 0, 0, 0, "ARCADIA\0", 0, 37, 0, 0, ROMTYPE_ARCADIAGAME, 0, 2 }, + { "Arcadia Leader Board Golf (alt)", 0, 0, 0, 0, "ARCADIA\0", 0, 38, 0, 0, ROMTYPE_ARCADIAGAME, 0, 2 }, + { "Arcadia Ninja Mission", 0, 0, 0, 0, "ARCADIA\0", 0, 39, 0, 0, ROMTYPE_ARCADIAGAME, 0, 2 }, + { "Arcadia Road Wars", 0, 0, 0, 0, "ARCADIA\0", 0, 40, 0, 0, ROMTYPE_ARCADIAGAME, 0, 2 }, + { "Arcadia Sidewinder", 0, 0, 0, 0, "ARCADIA\0", 0, 41, 0, 0, ROMTYPE_ARCADIAGAME, 0, 2 }, + { "Arcadia Spot", 0, 0, 0, 0, "ARCADIA\0", 0, 42, 0, 0, ROMTYPE_ARCADIAGAME, 0, 2 }, + { "Arcadia Space Ranger", 0, 0, 0, 0, "ARCADIA\0", 0, 43, 0, 0, ROMTYPE_ARCADIAGAME, 0, 2 }, + { "Arcadia Xenon", 0, 0, 0, 0, "ARCADIA\0", 0, 44, 0, 0, ROMTYPE_ARCADIAGAME, 0, 2 }, + { "Arcadia World Trophy Soccer", 0, 0, 0, 0, "ARCADIA\0", 0, 45, 0, 0, ROMTYPE_ARCADIAGAME, 0, 2 }, + + { NULL } +}; + +struct romlist **getromlistbyident(int ver, int rev, int subver, int subrev, char *model, int all) { int i, j, ok, out, max; struct romdata *rd; @@ -167,6 +300,8 @@ struct romlist **getrombyident(int ver, int rev, int subver, int subrev, char *m rd = rl[i].rd; else rd = &roms[i]; + if (rd->group) + continue; if (model && !strcmpi(model, rd->name)) ok = 2; if (rd->ver == ver && (rev < 0 || rd->rev == rev)) { @@ -226,7 +361,7 @@ struct romdata *getarcadiarombyname (char *name) { int i; for (i = 0; roms[i].name; i++) { - if (roms[i].type == ROMTYPE_ARCADIA) { + if (roms[i].group == 0 && (roms[i].type == ROMTYPE_ARCADIAGAME || roms[i].type == ROMTYPE_ARCADIAGAME)) { const char *p = roms[i].name; p = p + strlen (p) + 1; if (strlen (name) >= strlen (p) + 4) { @@ -239,6 +374,33 @@ struct romdata *getarcadiarombyname (char *name) return NULL; } +struct romlist **getarcadiaroms(void) +{ + int i, out, max; + void *buf; + struct romlist **rdout, *rltmp; + + max = 0; + for (i = 0; roms[i].name; i++) { + if (roms[i].group == 0 && (roms[i].type == ROMTYPE_ARCADIABIOS || roms[i].type == ROMTYPE_ARCADIAGAME)) + max++; + } + buf = xmalloc((sizeof (struct romlist*) + sizeof (struct romlist)) * (max + 1)); + rdout = (struct romlist **)buf; + rltmp = (struct romlist*)((uae_u8*)buf + (max + 1) * sizeof (struct romlist*)); + out = 0; + for (i = 0; roms[i].name; i++) { + if (roms[i].group == 0 && (roms[i].type == ROMTYPE_ARCADIABIOS || roms[i].type == ROMTYPE_ARCADIAGAME)) { + rdout[out++] = rltmp; + rltmp->path = NULL; + rltmp->rd = &roms[i]; + rltmp++; + } + } + rdout[out] = NULL; + return rdout; +} + static int kickstart_checksum_do (uae_u8 *mem, int size) { uae_u32 cksum = 0, prevck = 0; @@ -263,6 +425,28 @@ void decode_cloanto_rom_do (uae_u8 *mem, int size, int real_size, uae_u8 *key, i } } +static int decode_rekick_rom_do (uae_u8 *mem, int size, int real_size) +{ + uae_u32 d1 = 0xdeadfeed, d0; + int i; + + for (i = 0; i < size / 8; i++) { + d0 = ((mem[i * 8 + 0] << 24) | (mem[i * 8 + 1] << 16) | (mem[i * 8 + 2] << 8) | mem[i * 8 + 3]); + d1 = d1 ^ d0; + mem[i * 8 + 0] = d1 >> 24; + mem[i * 8 + 1] = d1 >> 16; + mem[i * 8 + 2] = d1 >> 8; + mem[i * 8 + 3] = d1; + d1 = ((mem[i * 8 + 4] << 24) | (mem[i * 8 + 5] << 16) | (mem[i * 8 + 6] << 8) | mem[i * 8 + 7]); + d0 = d0 ^ d1; + mem[i * 8 + 4] = d0 >> 24; + mem[i * 8 + 5] = d0 >> 16; + mem[i * 8 + 6] = d0 >> 8; + mem[i * 8 + 7] = d0; + } + return 1; +} + uae_u8 *load_keyfile (struct uae_prefs *p, char *path, int *size) { struct zfile *f; @@ -328,21 +512,27 @@ void free_keyfile (uae_u8 *key) xfree (key); } -static int decode_cloanto_rom (uae_u8 *mem, int size, int real_size) +static int decode_rom (uae_u8 *mem, int size, int mode, int real_size) { - uae_u8 *p; - int keysize; + uae_u8 *p; + int keysize; + if (mode == 1) { p = load_keyfile (&currprefs, NULL, &keysize); if (!p) { #ifndef SINGLEFILE - //notify_user (NUMSG_NOROMKEY); + notify_user (NUMSG_NOROMKEY); #endif - return 0; + return 0; } decode_cloanto_rom_do (mem, size, real_size, p, keysize); free_keyfile (p); return 1; + } else if (mode == 2) { + decode_rekick_rom_do (mem, size, real_size); + return 1; + } + return 0; } struct romdata *getromdatabyname (char *name) @@ -350,10 +540,12 @@ struct romdata *getromdatabyname (char *name) char tmp[MAX_PATH]; int i = 0; while (roms[i].name) { - getromname (&roms[i], tmp); - if (!strcmp (tmp, name) || !strcmp (roms[i].name, name)) - return &roms[i]; - i++; + if (!roms[i].group) { + getromname (&roms[i], tmp); + if (!strcmp (tmp, name) || !strcmp (roms[i].name, name)) + return &roms[i]; + } + i++; } return 0; } @@ -362,58 +554,91 @@ struct romdata *getromdatabyid (int id) { int i = 0; while (roms[i].name) { - if (id == roms[i].id) + if (id == roms[i].id && roms[i].group == 0) return &roms[i]; i++; } return 0; } +STATIC_INLINE int notcrc32(uae_u32 crc32) +{ + if (crc32 == 0xffffffff || crc32 == 0x00000000) + return 1; + return 0; +} + struct romdata *getromdatabycrc (uae_u32 crc32) { int i = 0; while (roms[i].name) { - if (crc32 == roms[i].crc32) + if (roms[i].group == 0 && crc32 == roms[i].crc32 && !notcrc32(crc32)) return &roms[i]; i++; } return 0; } -struct romdata *getromdatabydata (uae_u8 *rom, int size) +static int cmpsha1(uae_u8 *s1, struct romdata *rd) { int i; - uae_u32 crc32a, crc32b, crc32c; - uae_u8 tmp[4]; - uae_u8 *tmpbuf = NULL; - if (size > 11 && !memcmp (rom, "AMIROMTYPE1", 11)) { - uae_u8 *tmpbuf = (uae_u8 *) xmalloc (size); - int tmpsize = size - 11; - memcpy (tmpbuf, rom + 11, tmpsize); - decode_cloanto_rom (tmpbuf, tmpsize, tmpsize); - rom = tmpbuf; - size = tmpsize; + for (i = 0; i < SHA1_SIZE / 4; i++) { + uae_u32 v1 = (s1[0] << 24) | (s1[1] << 16) | (s1[2] << 8) | (s1[3] << 0); + uae_u32 v2 = rd->sha1[i]; + if (v1 != v2) + return -1; + s1 += 4; } - crc32a = get_crc32 (rom, size); - crc32b = get_crc32 (rom, size / 2); - /* ignore AR IO-port range until we have full dump */ - memcpy (tmp, rom, 4); - memset (rom, 0, 4); - crc32c = get_crc32 (rom, size); - memcpy (rom, tmp, 4); - i = 0; + return 0; +} + +static struct romdata *checkromdata(uae_u8 *sha1, int size, uae_u32 mask) +{ + int i = 0; while (roms[i].name) { - if (roms[i].crc32) { - if (crc32a == roms[i].crc32 || crc32b == roms[i].crc32) - return &roms[i]; - if (crc32c == roms[i].crc32 && roms[i].type == ROMTYPE_AR) - return &roms[i]; + if (!notcrc32(roms[i].crc32) && roms[i].size >= size) { + if (roms[i].type & mask) { + if (!cmpsha1(sha1, &roms[i])) + return &roms[i]; + } } i++; } + return NULL; +} + +struct romdata *getromdatabydata (uae_u8 *rom, int size) +{ + uae_u8 sha1[SHA1_SIZE]; + uae_u8 tmp[4]; + uae_u8 *tmpbuf = NULL; + struct romdata *ret = NULL; + + if (size > 11 && !memcmp (rom, "AMIROMTYPE1", 11)) { + uae_u8 *tmpbuf = (uae_u8*)xmalloc (size); + int tmpsize = size - 11; + memcpy (tmpbuf, rom + 11, tmpsize); + decode_rom (tmpbuf, tmpsize, 1, tmpsize); + rom = tmpbuf; + size = tmpsize; + } + get_sha1 (rom, size, sha1); + ret = checkromdata(sha1, size, -1); + if (!ret) { + get_sha1 (rom, size / 2, sha1); + ret = checkromdata (sha1, size / 2, -1); + if (!ret) { + /* ignore AR IO-port range until we have full dump */ + memcpy (tmp, rom, 4); + memset (rom, 0, 4); + get_sha1 (rom, size, sha1); + ret = checkromdata (sha1, size, ROMTYPE_AR); + memcpy (rom, tmp, 4); + } + } xfree (tmpbuf); - return 0; + return ret; } struct romdata *getromdatabyzfile (struct zfile *f) @@ -440,13 +665,47 @@ struct romdata *getromdatabyzfile (struct zfile *f) void getromname (struct romdata *rd, char *name) { name[0] = 0; + if (!rd) + return; strcat (name, rd->name); - if (rd->subrev && rd->subrev != rd->rev) + if ((rd->subrev || rd->subver) && rd->subver != rd->ver) sprintf (name + strlen (name), " rev %d.%d", rd->subver, rd->subrev); if (rd->size > 0) sprintf (name + strlen (name), " (%dk)", (rd->size + 1023) / 1024); } +struct romlist *getromlistbyromdata(struct romdata *rd) +{ + int ids[2]; + + ids[0] = rd->id; + ids[1] = 0; + return getromlistbyids(ids); +} + +struct romlist *getromlistbyids(int *ids) +{ + struct romdata *rd; + int i, j; + + i = 0; + while (ids[i] >= 0) { + rd = getromdatabyid (ids[i]); + if (rd) { + for (j = 0; j < romlist_cnt; j++) { + if (rl[j].rd == rd) + return &rl[j]; + } + } + i++; + } + return NULL; +} + +void romwarning(int *ids) +{ +} + addrbank *mem_banks[MEMORY_BANKS]; /* This has two functions. It either holds a host address that, when added @@ -457,8 +716,19 @@ addrbank *mem_banks[MEMORY_BANKS]; uae_u8 *baseaddr[MEMORY_BANKS]; +int addr_valid(char *txt, uaecptr addr, uae_u32 len) +{ + addrbank *ab = &get_mem_bank(addr); + if (ab == 0 || !(ab->flags & ABFLAG_RAM) || addr < 0x100 || len < 0 || len > 16777215 || !valid_address(addr, len)) { + write_log("corrupt %s pointer %x (%d) detected!\n", txt, addr, len); + return 0; + } + return 1; +} + uae_u32 chipmem_mask, chipmem_full_mask; -uae_u32 kickmem_mask, extendedkickmem_mask, bogomem_mask, a3000mem_mask; +uae_u32 kickmem_mask, extendedkickmem_mask, extendedkickmem2_mask, bogomem_mask; +uae_u32 a3000lmem_mask, a3000hmem_mask, cardmem_mask; /* A dummy bank that only contains zeros */ @@ -473,58 +743,76 @@ static int REGPARAM3 dummy_check (uaecptr addr, uae_u32 size) REGPARAM; #define NONEXISTINGDATA 0 //#define NONEXISTINGDATA 0xffffffff -uae_u32 REGPARAM2 dummy_lget (uaecptr addr) +static uae_u32 REGPARAM2 dummy_lget (uaecptr addr) { #ifdef JIT special_mem |= S_READ; #endif - if (currprefs.cpu_level >= 2) + if (currprefs.cpu_model >= 68020) return NONEXISTINGDATA; return (regs.irc << 16) | regs.irc; } +uae_u32 REGPARAM2 dummy_lgeti (uaecptr addr) +{ +#ifdef JIT + special_mem |= S_READ; +#endif + if (currprefs.cpu_model >= 68020) + return NONEXISTINGDATA; + return (regs.irc << 16) | regs.irc; +} -uae_u32 REGPARAM2 dummy_wget (uaecptr addr) +static uae_u32 REGPARAM2 dummy_wget (uaecptr addr) { #ifdef JIT special_mem |= S_READ; #endif - if (currprefs.cpu_level >= 2) + if (currprefs.cpu_model >= 68020) return NONEXISTINGDATA; return regs.irc; } +uae_u32 REGPARAM2 dummy_wgeti (uaecptr addr) +{ +#ifdef JIT + special_mem |= S_READ; +#endif + if (currprefs.cpu_model >= 68020) + return NONEXISTINGDATA; + return regs.irc; +} -uae_u32 REGPARAM2 dummy_bget (uaecptr addr) +static uae_u32 REGPARAM2 dummy_bget (uaecptr addr) { #ifdef JIT special_mem |= S_READ; #endif - if (currprefs.cpu_level >= 2) + if (currprefs.cpu_model >= 68020) return NONEXISTINGDATA; return (addr & 1) ? regs.irc : regs.irc >> 8; } -void REGPARAM2 dummy_lput (uaecptr addr, uae_u32 l) +static void REGPARAM2 dummy_lput (uaecptr addr, uae_u32 l) { #ifdef JIT special_mem |= S_WRITE; #endif } -void REGPARAM2 dummy_wput (uaecptr addr, uae_u32 w) +static void REGPARAM2 dummy_wput (uaecptr addr, uae_u32 w) { #ifdef JIT special_mem |= S_WRITE; #endif } -void REGPARAM2 dummy_bput (uaecptr addr, uae_u32 b) +static void REGPARAM2 dummy_bput (uaecptr addr, uae_u32 b) { #ifdef JIT special_mem |= S_WRITE; #endif } -int REGPARAM2 dummy_check (uaecptr addr, uae_u32 size) +static int REGPARAM2 dummy_check (uaecptr addr, uae_u32 size) { #ifdef JIT special_mem |= S_READ; @@ -532,69 +820,6 @@ int REGPARAM2 dummy_check (uaecptr addr, uae_u32 size) return 0; } -#if !( defined(PANDORA) || defined(ANDROIDSDL) ) -/* A3000 "motherboard resources" bank. */ -static uae_u32 REGPARAM3 mbres_lget (uaecptr) REGPARAM; -static uae_u32 REGPARAM3 mbres_wget (uaecptr) REGPARAM; -static uae_u32 REGPARAM3 mbres_bget (uaecptr) REGPARAM; -static void REGPARAM3 mbres_lput (uaecptr, uae_u32) REGPARAM; -static void REGPARAM3 mbres_wput (uaecptr, uae_u32) REGPARAM; -static void REGPARAM3 mbres_bput (uaecptr, uae_u32) REGPARAM; -static int REGPARAM3 mbres_check (uaecptr addr, uae_u32 size) REGPARAM; - -static int mbres_val = 0; - -uae_u32 REGPARAM2 mbres_lget (uaecptr addr) -{ -#ifdef JIT - special_mem |= S_READ; -#endif - return 0; -} - -uae_u32 REGPARAM2 mbres_wget (uaecptr addr) -{ -#ifdef JIT - special_mem |= S_READ; -#endif - return 0; -} - -uae_u32 REGPARAM2 mbres_bget (uaecptr addr) -{ -#ifdef JIT - special_mem |= S_READ; -#endif - return (addr & 0xFFFF) == 3 ? mbres_val : 0; -} - -void REGPARAM2 mbres_lput (uaecptr addr, uae_u32 l) -{ -#ifdef JIT - special_mem |= S_WRITE; -#endif -} -void REGPARAM2 mbres_wput (uaecptr addr, uae_u32 w) -{ -#ifdef JIT - special_mem |= S_WRITE; -#endif -} -void REGPARAM2 mbres_bput (uaecptr addr, uae_u32 b) -{ -#ifdef JIT - special_mem |= S_WRITE; -#endif - if ((addr & 0xFFFF) == 3) - mbres_val = b; -} - -int REGPARAM2 mbres_check (uaecptr addr, uae_u32 size) -{ - return 0; -} -#endif - /* Chip memory */ uae_u8 *chipmemory; @@ -603,6 +828,7 @@ static int REGPARAM3 chipmem_check (uaecptr addr, uae_u32 size) REGPARAM; static uae_u8 *REGPARAM3 chipmem_xlate (uaecptr addr) REGPARAM; #if !( defined(PANDORA) || defined(ANDROIDSDL) ) + /* AGA ce-chipram access */ static void ce2_timeout (void) @@ -610,79 +836,73 @@ static void ce2_timeout (void) wait_cpu_cycle_read (0, -1); } -uae_u32 REGPARAM2 chipmem_lget_ce2 (uaecptr addr) +static uae_u32 REGPARAM2 chipmem_lget_ce2 (uaecptr addr) { uae_u32 *m; #ifdef JIT special_mem |= S_READ; #endif - addr -= chipmem_start & chipmem_mask; addr &= chipmem_mask; m = (uae_u32 *)(chipmemory + addr); ce2_timeout (); return do_get_mem_long (m); } -uae_u32 REGPARAM2 chipmem_wget_ce2 (uaecptr addr) +static uae_u32 REGPARAM2 chipmem_wget_ce2 (uaecptr addr) { uae_u16 *m; #ifdef JIT special_mem |= S_READ; #endif - addr -= chipmem_start & chipmem_mask; addr &= chipmem_mask; m = (uae_u16 *)(chipmemory + addr); ce2_timeout (); return do_get_mem_word (m); } -uae_u32 REGPARAM2 chipmem_bget_ce2 (uaecptr addr) +static uae_u32 REGPARAM2 chipmem_bget_ce2 (uaecptr addr) { #ifdef JIT special_mem |= S_READ; #endif - addr -= chipmem_start & chipmem_mask; addr &= chipmem_mask; ce2_timeout (); return chipmemory[addr]; } -void REGPARAM2 chipmem_lput_ce2 (uaecptr addr, uae_u32 l) +static void REGPARAM2 chipmem_lput_ce2 (uaecptr addr, uae_u32 l) { uae_u32 *m; #ifdef JIT special_mem |= S_WRITE; #endif - addr -= chipmem_start & chipmem_mask; addr &= chipmem_mask; m = (uae_u32 *)(chipmemory + addr); ce2_timeout (); do_put_mem_long (m, l); } -void REGPARAM2 chipmem_wput_ce2 (uaecptr addr, uae_u32 w) +static void REGPARAM2 chipmem_wput_ce2 (uaecptr addr, uae_u32 w) { uae_u16 *m; #ifdef JIT special_mem |= S_WRITE; #endif - addr -= chipmem_start & chipmem_mask; addr &= chipmem_mask; m = (uae_u16 *)(chipmemory + addr); ce2_timeout (); do_put_mem_word (m, w); } -void REGPARAM2 chipmem_bput_ce2 (uaecptr addr, uae_u32 b) +static void REGPARAM2 chipmem_bput_ce2 (uaecptr addr, uae_u32 b) { #ifdef JIT special_mem |= S_WRITE; #endif - addr -= chipmem_start & chipmem_mask; addr &= chipmem_mask; ce2_timeout (); chipmemory[addr] = b; @@ -692,27 +912,24 @@ void REGPARAM2 chipmem_bput_ce2 (uaecptr addr, uae_u32 b) uae_u32 REGPARAM2 chipmem_lget (uaecptr addr) { uae_u32 *m; -// addr -= chipmem_start & chipmem_mask; addr &= chipmem_mask; m = (uae_u32 *)(chipmemory + addr); return do_get_mem_long(m); } -uae_u32 REGPARAM2 chipmem_wget (uaecptr addr) +static uae_u32 REGPARAM2 chipmem_wget (uaecptr addr) { uae_u16 *m; - // addr -= chipmem_start & chipmem_mask; addr &= chipmem_mask; m = (uae_u16 *)(chipmemory + addr); return do_get_mem_word (m); } -uae_u32 REGPARAM2 chipmem_bget (uaecptr addr) +static uae_u32 REGPARAM2 chipmem_bget (uaecptr addr) { uae_u8 *m; -// addr -= chipmem_start & chipmem_mask; addr &= chipmem_mask; m = (uae_u8 *)(chipmemory + addr); return do_get_mem_byte(m); @@ -721,7 +938,6 @@ uae_u32 REGPARAM2 chipmem_bget (uaecptr addr) void REGPARAM2 chipmem_lput (uaecptr addr, uae_u32 l) { uae_u32 *m; -// addr -= chipmem_start & chipmem_mask; addr &= chipmem_mask; m = (uae_u32 *)(chipmemory + addr); do_put_mem_long(m, l); @@ -730,7 +946,6 @@ void REGPARAM2 chipmem_lput (uaecptr addr, uae_u32 l) void REGPARAM2 chipmem_wput (uaecptr addr, uae_u32 w) { uae_u16 *m; - // addr -= chipmem_start & chipmem_mask; addr &= chipmem_mask; m = (uae_u16 *)(chipmemory + addr); do_put_mem_word (m, w); @@ -739,17 +954,15 @@ void REGPARAM2 chipmem_wput (uaecptr addr, uae_u32 w) void REGPARAM2 chipmem_bput (uaecptr addr, uae_u32 b) { uae_u8 *m; -// addr -= chipmem_start & chipmem_mask; addr &= chipmem_mask; m = (uae_u8 *)(chipmemory + addr); do_put_mem_byte(m, b); } -uae_u32 REGPARAM2 chipmem_agnus_lget (uaecptr addr) +static uae_u32 REGPARAM2 chipmem_agnus_lget (uaecptr addr) { uae_u32 *m; -// addr -= chipmem_start & chipmem_full_mask; addr &= chipmem_full_mask; m = (uae_u32 *)(chipmemory + addr); return do_get_mem_long (m); @@ -759,26 +972,23 @@ uae_u32 REGPARAM2 chipmem_agnus_wget (uaecptr addr) { uae_u16 *m; - // addr -= chipmem_start & chipmem_full_mask; addr &= chipmem_full_mask; m = (uae_u16 *)(chipmemory + addr); return do_get_mem_word (m); } -uae_u32 REGPARAM2 chipmem_agnus_bget (uaecptr addr) +static uae_u32 REGPARAM2 chipmem_agnus_bget (uaecptr addr) { uae_u8 *m; -// addr -= chipmem_start & chipmem_full_mask; addr &= chipmem_full_mask; m = (uae_u8 *)(chipmemory + addr); return do_get_mem_byte(m); } -void REGPARAM2 chipmem_agnus_lput (uaecptr addr, uae_u32 l) +static void REGPARAM2 chipmem_agnus_lput (uaecptr addr, uae_u32 l) { uae_u32 *m; -// addr -= chipmem_start & chipmem_full_mask; addr &= chipmem_full_mask; if (addr >= allocated_chipmem) return; @@ -790,7 +1000,6 @@ void REGPARAM2 chipmem_agnus_wput (uaecptr addr, uae_u32 w) { uae_u16 *m; - // addr -= chipmem_start & chipmem_full_mask; addr &= chipmem_full_mask; if (addr >= allocated_chipmem) return; @@ -798,10 +1007,9 @@ void REGPARAM2 chipmem_agnus_wput (uaecptr addr, uae_u32 w) do_put_mem_word (m, w); } -void REGPARAM2 chipmem_agnus_bput (uaecptr addr, uae_u32 b) +static void REGPARAM2 chipmem_agnus_bput (uaecptr addr, uae_u32 b) { uae_u8 *m; -// addr -= chipmem_start & chipmem_full_mask; addr &= chipmem_full_mask; if (addr >= allocated_chipmem) return; @@ -809,18 +1017,16 @@ void REGPARAM2 chipmem_agnus_bput (uaecptr addr, uae_u32 b) do_put_mem_byte(m, b); } -int REGPARAM2 chipmem_check (uaecptr addr, uae_u32 size) +static int REGPARAM2 chipmem_check (uaecptr addr, uae_u32 size) { -// addr -= chipmem_start & chipmem_mask; addr &= chipmem_mask; return (addr + size) <= allocated_chipmem; } -uae_u8 *REGPARAM2 chipmem_xlate (uaecptr addr) +static uae_u8 *REGPARAM2 chipmem_xlate (uaecptr addr) { -// addr -= chipmem_start & chipmem_mask; addr &= chipmem_mask; - return chipmemory + addr; + return chipmemory + addr; } /* Slow memory */ @@ -835,176 +1041,282 @@ static void REGPARAM3 bogomem_wput (uaecptr, uae_u32) REGPARAM; static void REGPARAM3 bogomem_bput (uaecptr, uae_u32) REGPARAM; static int REGPARAM3 bogomem_check (uaecptr addr, uae_u32 size) REGPARAM; static uae_u8 *REGPARAM3 bogomem_xlate (uaecptr addr) REGPARAM; -uae_u32 REGPARAM2 bogomem_lget (uaecptr addr) + +static uae_u32 REGPARAM2 bogomem_lget (uaecptr addr) { uae_u32 *m; - addr -= bogomem_start /*& bogomem_mask*/; addr &= bogomem_mask; m = (uae_u32 *)(bogomemory + addr); return do_get_mem_long (m); } -uae_u32 REGPARAM2 bogomem_wget (uaecptr addr) +static uae_u32 REGPARAM2 bogomem_wget (uaecptr addr) { uae_u16 *m; - addr -= bogomem_start /*& bogomem_mask*/; addr &= bogomem_mask; m = (uae_u16 *)(bogomemory + addr); return do_get_mem_word (m); } -uae_u32 REGPARAM2 bogomem_bget (uaecptr addr) +static uae_u32 REGPARAM2 bogomem_bget (uaecptr addr) { uae_u8 *m; - addr -= bogomem_start /*& bogomem_mask*/; addr &= bogomem_mask; m = (uae_u8 *)(bogomemory + addr); return do_get_mem_byte(m); } -void REGPARAM2 bogomem_lput (uaecptr addr, uae_u32 l) +static void REGPARAM2 bogomem_lput (uaecptr addr, uae_u32 l) { uae_u32 *m; - addr -= bogomem_start /*& bogomem_mask*/; addr &= bogomem_mask; m = (uae_u32 *)(bogomemory + addr); do_put_mem_long (m, l); } -void REGPARAM2 bogomem_wput (uaecptr addr, uae_u32 w) +static void REGPARAM2 bogomem_wput (uaecptr addr, uae_u32 w) { uae_u16 *m; - addr -= bogomem_start /*& bogomem_mask*/; addr &= bogomem_mask; m = (uae_u16 *)(bogomemory + addr); do_put_mem_word (m, w); } -void REGPARAM2 bogomem_bput (uaecptr addr, uae_u32 b) +static void REGPARAM2 bogomem_bput (uaecptr addr, uae_u32 b) { uae_u8 *m; - addr -= bogomem_start /*& bogomem_mask*/; addr &= bogomem_mask; m = (uae_u8 *)(bogomemory + addr); do_put_mem_byte(m, b); } -int REGPARAM2 bogomem_check (uaecptr addr, uae_u32 size) +static int REGPARAM2 bogomem_check (uaecptr addr, uae_u32 size) { - addr -= bogomem_start /*& bogomem_mask*/; addr &= bogomem_mask; return (addr + size) <= allocated_bogomem; } -uae_u8 *REGPARAM2 bogomem_xlate (uaecptr addr) +static uae_u8 *REGPARAM2 bogomem_xlate (uaecptr addr) { - addr -= bogomem_start /*& bogomem_mask*/; addr &= bogomem_mask; return bogomemory + addr; } #if !( defined(PANDORA) || defined(ANDROIDSDL) ) -/* A3000 motherboard fast memory */ -static uae_u8 *a3000memory; +/* CDTV expension memory card memory */ -static uae_u32 REGPARAM3 a3000mem_lget (uaecptr) REGPARAM; -static uae_u32 REGPARAM3 a3000mem_wget (uaecptr) REGPARAM; -static uae_u32 REGPARAM3 a3000mem_bget (uaecptr) REGPARAM; -static void REGPARAM3 a3000mem_lput (uaecptr, uae_u32) REGPARAM; -static void REGPARAM3 a3000mem_wput (uaecptr, uae_u32) REGPARAM; -static void REGPARAM3 a3000mem_bput (uaecptr, uae_u32) REGPARAM; -static int REGPARAM3 a3000mem_check (uaecptr addr, uae_u32 size) REGPARAM; -static uae_u8 *REGPARAM3 a3000mem_xlate (uaecptr addr) REGPARAM; +uae_u8 *cardmemory; -uae_u32 REGPARAM2 a3000mem_lget (uaecptr addr) +static uae_u32 REGPARAM3 cardmem_lget (uaecptr) REGPARAM; +static uae_u32 REGPARAM3 cardmem_wget (uaecptr) REGPARAM; +static uae_u32 REGPARAM3 cardmem_bget (uaecptr) REGPARAM; +static void REGPARAM3 cardmem_lput (uaecptr, uae_u32) REGPARAM; +static void REGPARAM3 cardmem_wput (uaecptr, uae_u32) REGPARAM; +static void REGPARAM3 cardmem_bput (uaecptr, uae_u32) REGPARAM; +static int REGPARAM3 cardmem_check (uaecptr addr, uae_u32 size) REGPARAM; +static uae_u8 *REGPARAM3 cardmem_xlate (uaecptr addr) REGPARAM; + +static uae_u32 REGPARAM2 cardmem_lget (uaecptr addr) { uae_u32 *m; - addr -= a3000mem_start & a3000mem_mask; - addr &= a3000mem_mask; - m = (uae_u32 *)(a3000memory + addr); + addr &= cardmem_mask; + m = (uae_u32 *)(cardmemory + addr); return do_get_mem_long (m); } -uae_u32 REGPARAM2 a3000mem_wget (uaecptr addr) +static uae_u32 REGPARAM2 cardmem_wget (uaecptr addr) { uae_u16 *m; - addr -= a3000mem_start & a3000mem_mask; - addr &= a3000mem_mask; - m = (uae_u16 *)(a3000memory + addr); + addr &= cardmem_mask; + m = (uae_u16 *)(cardmemory + addr); return do_get_mem_word (m); } -uae_u32 REGPARAM2 a3000mem_bget (uaecptr addr) +static uae_u32 REGPARAM2 cardmem_bget (uaecptr addr) { - addr -= a3000mem_start & a3000mem_mask; - addr &= a3000mem_mask; - return a3000memory[addr]; + addr &= cardmem_mask; + return cardmemory[addr]; } -void REGPARAM2 a3000mem_lput (uaecptr addr, uae_u32 l) +static void REGPARAM2 cardmem_lput (uaecptr addr, uae_u32 l) { uae_u32 *m; - addr -= a3000mem_start & a3000mem_mask; - addr &= a3000mem_mask; - m = (uae_u32 *)(a3000memory + addr); + addr &= cardmem_mask; + m = (uae_u32 *)(cardmemory + addr); do_put_mem_long (m, l); } -void REGPARAM2 a3000mem_wput (uaecptr addr, uae_u32 w) +static void REGPARAM2 cardmem_wput (uaecptr addr, uae_u32 w) { uae_u16 *m; - addr -= a3000mem_start & a3000mem_mask; - addr &= a3000mem_mask; - m = (uae_u16 *)(a3000memory + addr); + addr &= cardmem_mask; + m = (uae_u16 *)(cardmemory + addr); do_put_mem_word (m, w); } -void REGPARAM2 a3000mem_bput (uaecptr addr, uae_u32 b) +static void REGPARAM2 cardmem_bput (uaecptr addr, uae_u32 b) { - addr -= a3000mem_start & a3000mem_mask; - addr &= a3000mem_mask; - a3000memory[addr] = b; + addr &= cardmem_mask; + cardmemory[addr] = b; } -int REGPARAM2 a3000mem_check (uaecptr addr, uae_u32 size) +static int REGPARAM2 cardmem_check (uaecptr addr, uae_u32 size) { - addr -= a3000mem_start & a3000mem_mask; - addr &= a3000mem_mask; - return (addr + size) <= allocated_a3000mem; + addr &= cardmem_mask; + return (addr + size) <= allocated_cardmem; } -uae_u8 *REGPARAM2 a3000mem_xlate (uaecptr addr) +static uae_u8 *REGPARAM2 cardmem_xlate (uaecptr addr) { - addr -= a3000mem_start & a3000mem_mask; - addr &= a3000mem_mask; - return a3000memory + addr; + addr &= cardmem_mask; + return cardmemory + addr; } + +/* A3000 motherboard fast memory */ +static uae_u8 *a3000lmemory, *a3000hmemory; +uae_u32 a3000lmem_start, a3000hmem_start; + +static uae_u32 REGPARAM3 a3000lmem_lget (uaecptr) REGPARAM; +static uae_u32 REGPARAM3 a3000lmem_wget (uaecptr) REGPARAM; +static uae_u32 REGPARAM3 a3000lmem_bget (uaecptr) REGPARAM; +static void REGPARAM3 a3000lmem_lput (uaecptr, uae_u32) REGPARAM; +static void REGPARAM3 a3000lmem_wput (uaecptr, uae_u32) REGPARAM; +static void REGPARAM3 a3000lmem_bput (uaecptr, uae_u32) REGPARAM; +static int REGPARAM3 a3000lmem_check (uaecptr addr, uae_u32 size) REGPARAM; +static uae_u8 *REGPARAM3 a3000lmem_xlate (uaecptr addr) REGPARAM; + +static uae_u32 REGPARAM2 a3000lmem_lget (uaecptr addr) +{ + uae_u32 *m; + addr &= a3000lmem_mask; + m = (uae_u32 *)(a3000lmemory + addr); + return do_get_mem_long (m); +} + +static uae_u32 REGPARAM2 a3000lmem_wget (uaecptr addr) +{ + uae_u16 *m; + addr &= a3000lmem_mask; + m = (uae_u16 *)(a3000lmemory + addr); + return do_get_mem_word (m); +} + +static uae_u32 REGPARAM2 a3000lmem_bget (uaecptr addr) +{ + addr &= a3000lmem_mask; + return a3000lmemory[addr]; +} + +static void REGPARAM2 a3000lmem_lput (uaecptr addr, uae_u32 l) +{ + uae_u32 *m; + addr &= a3000lmem_mask; + m = (uae_u32 *)(a3000lmemory + addr); + do_put_mem_long (m, l); +} + +static void REGPARAM2 a3000lmem_wput (uaecptr addr, uae_u32 w) +{ + uae_u16 *m; + addr &= a3000lmem_mask; + m = (uae_u16 *)(a3000lmemory + addr); + do_put_mem_word (m, w); +} + +static void REGPARAM2 a3000lmem_bput (uaecptr addr, uae_u32 b) +{ + addr &= a3000lmem_mask; + a3000lmemory[addr] = b; +} + +static int REGPARAM2 a3000lmem_check (uaecptr addr, uae_u32 size) +{ + addr &= a3000lmem_mask; + return (addr + size) <= allocated_a3000lmem; +} + +static uae_u8 *REGPARAM2 a3000lmem_xlate (uaecptr addr) +{ + addr &= a3000lmem_mask; + return a3000lmemory + addr; +} + +static uae_u32 REGPARAM3 a3000hmem_lget (uaecptr) REGPARAM; +static uae_u32 REGPARAM3 a3000hmem_wget (uaecptr) REGPARAM; +static uae_u32 REGPARAM3 a3000hmem_bget (uaecptr) REGPARAM; +static void REGPARAM3 a3000hmem_lput (uaecptr, uae_u32) REGPARAM; +static void REGPARAM3 a3000hmem_wput (uaecptr, uae_u32) REGPARAM; +static void REGPARAM3 a3000hmem_bput (uaecptr, uae_u32) REGPARAM; +static int REGPARAM3 a3000hmem_check (uaecptr addr, uae_u32 size) REGPARAM; +static uae_u8 *REGPARAM3 a3000hmem_xlate (uaecptr addr) REGPARAM; + +static uae_u32 REGPARAM2 a3000hmem_lget (uaecptr addr) +{ + uae_u32 *m; + addr &= a3000hmem_mask; + m = (uae_u32 *)(a3000hmemory + addr); + return do_get_mem_long (m); +} + +static uae_u32 REGPARAM2 a3000hmem_wget (uaecptr addr) +{ + uae_u16 *m; + addr &= a3000hmem_mask; + m = (uae_u16 *)(a3000hmemory + addr); + return do_get_mem_word (m); +} + +static uae_u32 REGPARAM2 a3000hmem_bget (uaecptr addr) +{ + addr &= a3000hmem_mask; + return a3000hmemory[addr]; +} + +static void REGPARAM2 a3000hmem_lput (uaecptr addr, uae_u32 l) +{ + uae_u32 *m; + addr &= a3000hmem_mask; + m = (uae_u32 *)(a3000hmemory + addr); + do_put_mem_long (m, l); +} + +static void REGPARAM2 a3000hmem_wput (uaecptr addr, uae_u32 w) +{ + uae_u16 *m; + addr &= a3000hmem_mask; + m = (uae_u16 *)(a3000hmemory + addr); + do_put_mem_word (m, w); +} + +static void REGPARAM2 a3000hmem_bput (uaecptr addr, uae_u32 b) +{ + addr &= a3000hmem_mask; + a3000hmemory[addr] = b; +} + +static int REGPARAM2 a3000hmem_check (uaecptr addr, uae_u32 size) +{ + addr &= a3000hmem_mask; + return (addr + size) <= allocated_a3000hmem; +} + +static uae_u8 *REGPARAM2 a3000hmem_xlate (uaecptr addr) +{ + addr &= a3000hmem_mask; + return a3000hmemory + addr; +} + #endif /* Kick memory */ uae_u8 *kickmemory; uae_u16 kickstart_version; -int kickmem_size = 0x80000; - -static unsigned kickmem_checksum=0; -static unsigned get_kickmem_checksum(void) -{ - unsigned *p=(unsigned *)kickmemory; - unsigned ret=0; - if (p) - { - unsigned max=kickmem_size/4; - unsigned i; - for(i=0;i= 0xfc0000) { - addr -= kickmem_start /*& kickmem_mask*/; addr &= kickmem_mask; - m = (uae_u16 *)(kickmemory + addr); - do_put_mem_word(m, l >> 16); - do_put_mem_word(m + 1, l); + m = (uae_u32 *)(kickmemory + addr); + do_put_mem_long(m, l); return; } else a1000_handle_kickstart (0); } } -void REGPARAM2 kickmem_wput (uaecptr addr, uae_u32 w) +static void REGPARAM2 kickmem_wput (uaecptr addr, uae_u32 w) { uae_u16 *m; #ifdef JIT @@ -1104,7 +1407,6 @@ void REGPARAM2 kickmem_wput (uaecptr addr, uae_u32 w) #endif if (a1000_kickstart_mode) { if (addr >= 0xfc0000) { - addr -= kickmem_start /*& kickmem_mask*/; addr &= kickmem_mask; m = (uae_u16 *)(kickmemory + addr); do_put_mem_word (m, w); @@ -1114,7 +1416,7 @@ void REGPARAM2 kickmem_wput (uaecptr addr, uae_u32 w) } } -void REGPARAM2 kickmem_bput (uaecptr addr, uae_u32 b) +static void REGPARAM2 kickmem_bput (uaecptr addr, uae_u32 b) { uae_u8 *m; #ifdef JIT @@ -1122,7 +1424,6 @@ void REGPARAM2 kickmem_bput (uaecptr addr, uae_u32 b) #endif if (a1000_kickstart_mode) { if (addr >= 0xfc0000) { - addr -= kickmem_start /*& kickmem_mask*/; addr &= kickmem_mask; m = (uae_u8 *)(kickmemory + addr); do_put_mem_byte (m, b); @@ -1132,75 +1433,62 @@ void REGPARAM2 kickmem_bput (uaecptr addr, uae_u32 b) } } -void REGPARAM2 kickmem2_lput (uaecptr addr, uae_u32 l) +static void REGPARAM2 kickmem2_lput (uaecptr addr, uae_u32 l) { - uae_u16 *m; + uae_u32 *m; #ifdef JIT special_mem |= S_WRITE; #endif - addr -= kickmem_start /*& kickmem_mask*/; addr &= kickmem_mask; - do_put_mem_word(m, l >> 16); - do_put_mem_word(m + 1, l); + m = (uae_u32 *)(kickmemory + addr); + do_put_mem_long (m, l); } -void REGPARAM2 kickmem2_wput (uaecptr addr, uae_u32 w) +static void REGPARAM2 kickmem2_wput (uaecptr addr, uae_u32 w) { uae_u16 *m; #ifdef JIT special_mem |= S_WRITE; #endif - addr -= kickmem_start /*& kickmem_mask*/; addr &= kickmem_mask; m = (uae_u16 *)(kickmemory + addr); do_put_mem_word (m, w); } -void REGPARAM2 kickmem2_bput (uaecptr addr, uae_u32 b) +static void REGPARAM2 kickmem2_bput (uaecptr addr, uae_u32 b) { uae_u8 *m; #ifdef JIT special_mem |= S_WRITE; #endif - addr -= kickmem_start /*& kickmem_mask*/; addr &= kickmem_mask; m = (uae_u8 *)(kickmemory + addr); do_put_mem_byte (m, b); } -int REGPARAM2 kickmem_check (uaecptr addr, uae_u32 size) +static int REGPARAM2 kickmem_check (uaecptr addr, uae_u32 size) { - addr -= kickmem_start /*& kickmem_mask*/; addr &= kickmem_mask; return (addr + size) <= kickmem_size; } -uae_u8 *REGPARAM2 kickmem_xlate (uaecptr addr) +static uae_u8 *REGPARAM2 kickmem_xlate (uaecptr addr) { - addr -= kickmem_start /*& kickmem_mask*/; addr &= kickmem_mask; return kickmemory + addr; } /* CD32/CDTV extended kick memory */ -uae_u8 *extendedkickmemory; -static int extendedkickmem_size; -static uae_u32 extendedkickmem_start; +uae_u8 *extendedkickmemory, *extendedkickmemory2; +static int extendedkickmem_size, extendedkickmem2_size; +static uae_u32 extendedkickmem_start, extendedkickmem2_start; +static int extendedkickmem_type; #define EXTENDED_ROM_CD32 1 #define EXTENDED_ROM_CDTV 2 - -static int extromtype (void) -{ - switch (extendedkickmem_size) { - case 524288: - return EXTENDED_ROM_CD32; - case 262144: - return EXTENDED_ROM_CDTV; - } - return 0; -} +#define EXTENDED_ROM_KS 3 +#define EXTENDED_ROM_ARCADIA 4 static uae_u32 REGPARAM3 extendedkickmem_lget (uaecptr) REGPARAM; static uae_u32 REGPARAM3 extendedkickmem_wget (uaecptr) REGPARAM; @@ -1211,7 +1499,7 @@ static void REGPARAM3 extendedkickmem_bput (uaecptr, uae_u32) REGPARAM; static int REGPARAM3 extendedkickmem_check (uaecptr addr, uae_u32 size) REGPARAM; static uae_u8 *REGPARAM3 extendedkickmem_xlate (uaecptr addr) REGPARAM; -uae_u32 REGPARAM2 extendedkickmem_lget (uaecptr addr) +static uae_u32 REGPARAM2 extendedkickmem_lget (uaecptr addr) { uae_u32 *m; addr -= extendedkickmem_start /*& extendedkickmem_mask*/; @@ -1220,7 +1508,7 @@ uae_u32 REGPARAM2 extendedkickmem_lget (uaecptr addr) return do_get_mem_long (m); } -uae_u32 REGPARAM2 extendedkickmem_wget (uaecptr addr) +static uae_u32 REGPARAM2 extendedkickmem_wget (uaecptr addr) { uae_u16 *m; addr -= extendedkickmem_start /*& extendedkickmem_mask*/; @@ -1229,48 +1517,110 @@ uae_u32 REGPARAM2 extendedkickmem_wget (uaecptr addr) return do_get_mem_word (m); } -uae_u32 REGPARAM2 extendedkickmem_bget (uaecptr addr) +static uae_u32 REGPARAM2 extendedkickmem_bget (uaecptr addr) { addr -= extendedkickmem_start /*& extendedkickmem_mask*/; addr &= extendedkickmem_mask; return extendedkickmemory[addr]; } -void REGPARAM2 extendedkickmem_lput (uaecptr addr, uae_u32 b) +static void REGPARAM2 extendedkickmem_lput (uaecptr addr, uae_u32 b) { #ifdef JIT special_mem |= S_WRITE; #endif } -void REGPARAM2 extendedkickmem_wput (uaecptr addr, uae_u32 b) +static void REGPARAM2 extendedkickmem_wput (uaecptr addr, uae_u32 b) { #ifdef JIT special_mem |= S_WRITE; #endif } -void REGPARAM2 extendedkickmem_bput (uaecptr addr, uae_u32 b) +static void REGPARAM2 extendedkickmem_bput (uaecptr addr, uae_u32 b) { #ifdef JIT special_mem |= S_WRITE; #endif } -int REGPARAM2 extendedkickmem_check (uaecptr addr, uae_u32 size) +static int REGPARAM2 extendedkickmem_check (uaecptr addr, uae_u32 size) { addr -= extendedkickmem_start /*& extendedkickmem_mask*/; addr &= extendedkickmem_mask; return (addr + size) <= extendedkickmem_size; } -uae_u8 *REGPARAM2 extendedkickmem_xlate (uaecptr addr) +static uae_u8 *REGPARAM2 extendedkickmem_xlate (uaecptr addr) { addr -= extendedkickmem_start /*& extendedkickmem_mask*/; addr &= extendedkickmem_mask; return extendedkickmemory + addr; } +static uae_u32 REGPARAM3 extendedkickmem2_lget (uaecptr) REGPARAM; +static uae_u32 REGPARAM3 extendedkickmem2_wget (uaecptr) REGPARAM; +static uae_u32 REGPARAM3 extendedkickmem2_bget (uaecptr) REGPARAM; +static void REGPARAM3 extendedkickmem2_lput (uaecptr, uae_u32) REGPARAM; +static void REGPARAM3 extendedkickmem2_wput (uaecptr, uae_u32) REGPARAM; +static void REGPARAM3 extendedkickmem2_bput (uaecptr, uae_u32) REGPARAM; +static int REGPARAM3 extendedkickmem2_check (uaecptr addr, uae_u32 size) REGPARAM; +static uae_u8 *REGPARAM3 extendedkickmem2_xlate (uaecptr addr) REGPARAM; +static uae_u32 REGPARAM2 extendedkickmem2_lget (uaecptr addr) +{ + uae_u32 *m; + addr -= extendedkickmem2_start /*& extendedkickmem2_mask*/; + addr &= extendedkickmem2_mask; + m = (uae_u32 *)(extendedkickmemory2 + addr); + return do_get_mem_long (m); +} +static uae_u32 REGPARAM2 extendedkickmem2_wget (uaecptr addr) +{ + uae_u16 *m; + addr -= extendedkickmem2_start /*& extendedkickmem2_mask*/; + addr &= extendedkickmem2_mask; + m = (uae_u16 *)(extendedkickmemory2 + addr); + return do_get_mem_word (m); +} +static uae_u32 REGPARAM2 extendedkickmem2_bget (uaecptr addr) +{ + addr -= extendedkickmem2_start /*& extendedkickmem2_mask*/; + addr &= extendedkickmem2_mask; + return extendedkickmemory2[addr]; +} +static void REGPARAM2 extendedkickmem2_lput (uaecptr addr, uae_u32 b) +{ +#ifdef JIT + special_mem |= S_WRITE; +#endif +} +static void REGPARAM2 extendedkickmem2_wput (uaecptr addr, uae_u32 b) +{ +#ifdef JIT + special_mem |= S_WRITE; +#endif +} +static void REGPARAM2 extendedkickmem2_bput (uaecptr addr, uae_u32 b) +{ +#ifdef JIT + special_mem |= S_WRITE; +#endif +} +static int REGPARAM2 extendedkickmem2_check (uaecptr addr, uae_u32 size) +{ + addr -= extendedkickmem2_start /*& extendedkickmem2_mask*/; + addr &= extendedkickmem2_mask; + return (addr + size) <= extendedkickmem2_size; +} +static uae_u8 *REGPARAM2 extendedkickmem2_xlate (uaecptr addr) +{ + addr -= extendedkickmem2_start /*& extendedkickmem2_mask*/; + addr &= extendedkickmem2_mask; + return extendedkickmemory2 + addr; +} + + /* Default memory access functions */ int REGPARAM2 default_check (uaecptr a, uae_u32 b) @@ -1281,12 +1631,13 @@ int REGPARAM2 default_check (uaecptr a, uae_u32 b) uae_u8 *REGPARAM2 default_xlate (uaecptr a) { if (quit_program == 0) { - if(currprefs.cpu_level > 0 || !currprefs.cpu_compatible) { + /* do this only in 68010+ mode, there are some tricky A500 programs.. */ + if(currprefs.cpu_model > 68000 || !currprefs.cpu_compatible) { write_log ("Your Amiga program just did something terribly stupid\n"); uae_reset (0); } } - return kickmem_xlate (0); /* So we don't crash. */ + return kickmem_xlate (2); /* So we don't crash. */ } /* Address banks */ @@ -1294,79 +1645,288 @@ uae_u8 *REGPARAM2 default_xlate (uaecptr a) addrbank dummy_bank = { dummy_lget, dummy_wget, dummy_bget, dummy_lput, dummy_wput, dummy_bput, - default_xlate, dummy_check, NULL, NULL + default_xlate, dummy_check, NULL, NULL, + dummy_lgeti, dummy_wgeti, ABFLAG_NONE }; -#if !( defined(PANDORA) || defined(ANDROIDSDL) ) -addrbank mbres_bank = { - mbres_lget, mbres_wget, mbres_bget, - mbres_lput, mbres_wput, mbres_bput, - default_xlate, mbres_check, NULL, "MBRES" - -}; -#endif - addrbank chipmem_bank = { chipmem_lget, chipmem_wget, chipmem_bget, chipmem_lput, chipmem_wput, chipmem_bput, - chipmem_xlate, chipmem_check, NULL, "Chip memory" -}; - -addrbank chipmem_agnus_bank = { - chipmem_agnus_lget, chipmem_agnus_wget, chipmem_agnus_bget, - chipmem_agnus_lput, chipmem_agnus_wput, chipmem_agnus_bput, - chipmem_xlate, chipmem_check, NULL, "Chip memory" + chipmem_xlate, chipmem_check, NULL, "Chip memory", + chipmem_lget, chipmem_wget, ABFLAG_RAM }; #if !( defined(PANDORA) || defined(ANDROIDSDL) ) addrbank chipmem_bank_ce2 = { chipmem_lget_ce2, chipmem_wget_ce2, chipmem_bget_ce2, chipmem_lput_ce2, chipmem_wput_ce2, chipmem_bput_ce2, - chipmem_xlate, chipmem_check, NULL, "Chip memory" + chipmem_xlate, chipmem_check, NULL, "Chip memory (68020 'ce')", + chipmem_lget_ce2, chipmem_wget_ce2, ABFLAG_RAM }; #endif addrbank bogomem_bank = { bogomem_lget, bogomem_wget, bogomem_bget, bogomem_lput, bogomem_wput, bogomem_bput, - bogomem_xlate, bogomem_check, NULL, "Slow memory" + bogomem_xlate, bogomem_check, NULL, "Slow memory", + bogomem_lget, bogomem_wget, ABFLAG_RAM }; #if !( defined(PANDORA) || defined(ANDROIDSDL) ) -addrbank a3000mem_bank = { - a3000mem_lget, a3000mem_wget, a3000mem_bget, - a3000mem_lput, a3000mem_wput, a3000mem_bput, - a3000mem_xlate, a3000mem_check, NULL, "A3000 memory" +addrbank cardmem_bank = { + cardmem_lget, cardmem_wget, cardmem_bget, + cardmem_lput, cardmem_wput, cardmem_bput, + cardmem_xlate, cardmem_check, NULL, "CDTV memory card", + cardmem_lget, cardmem_wget, ABFLAG_RAM +}; +addrbank a3000lmem_bank = { + a3000lmem_lget, a3000lmem_wget, a3000lmem_bget, + a3000lmem_lput, a3000lmem_wput, a3000lmem_bput, + a3000lmem_xlate, a3000lmem_check, NULL, "RAMSEY memory (low)", + a3000lmem_lget, a3000lmem_wget, ABFLAG_RAM +}; + +addrbank a3000hmem_bank = { + a3000hmem_lget, a3000hmem_wget, a3000hmem_bget, + a3000hmem_lput, a3000hmem_wput, a3000hmem_bput, + a3000hmem_xlate, a3000hmem_check, NULL, "RAMSEY memory (high)", + a3000hmem_lget, a3000hmem_wget, ABFLAG_RAM }; #endif addrbank kickmem_bank = { kickmem_lget, kickmem_wget, kickmem_bget, kickmem_lput, kickmem_wput, kickmem_bput, - kickmem_xlate, kickmem_check, NULL, "Kickstart ROM" + kickmem_xlate, kickmem_check, NULL, "Kickstart ROM", + kickmem_lget, kickmem_wget, ABFLAG_ROM }; addrbank kickram_bank = { kickmem_lget, kickmem_wget, kickmem_bget, kickmem2_lput, kickmem2_wput, kickmem2_bput, - kickmem_xlate, kickmem_check, NULL, "Kickstart Shadow RAM" + kickmem_xlate, kickmem_check, NULL, "Kickstart Shadow RAM", + kickmem_lget, kickmem_wget, ABFLAG_UNK | ABFLAG_SAFE }; addrbank extendedkickmem_bank = { extendedkickmem_lget, extendedkickmem_wget, extendedkickmem_bget, extendedkickmem_lput, extendedkickmem_wput, extendedkickmem_bput, - extendedkickmem_xlate, extendedkickmem_check, NULL, "Extended Kickstart ROM" - + extendedkickmem_xlate, extendedkickmem_check, NULL, "Extended Kickstart ROM", + extendedkickmem_lget, extendedkickmem_wget, ABFLAG_ROM }; +addrbank extendedkickmem2_bank = { + extendedkickmem2_lget, extendedkickmem2_wget, extendedkickmem2_bget, + extendedkickmem2_lput, extendedkickmem2_wput, extendedkickmem2_bput, + extendedkickmem2_xlate, extendedkickmem2_check, NULL, "Extended 2nd Kickstart ROM", + extendedkickmem2_lget, extendedkickmem2_wget, ABFLAG_ROM +}; + + +#if !( defined(PANDORA) || defined(ANDROIDSDL) ) +static uae_u32 allocated_custmem1, allocated_custmem2; +static uae_u32 custmem1_mask, custmem2_mask; +static uae_u8 *custmem1, *custmem2; + +static uae_u32 REGPARAM3 custmem1_lget (uaecptr) REGPARAM; +static uae_u32 REGPARAM3 custmem1_wget (uaecptr) REGPARAM; +static uae_u32 REGPARAM3 custmem1_bget (uaecptr) REGPARAM; +static void REGPARAM3 custmem1_lput (uaecptr, uae_u32) REGPARAM; +static void REGPARAM3 custmem1_wput (uaecptr, uae_u32) REGPARAM; +static void REGPARAM3 custmem1_bput (uaecptr, uae_u32) REGPARAM; +static int REGPARAM3 custmem1_check (uaecptr addr, uae_u32 size) REGPARAM; +static uae_u8 *REGPARAM3 custmem1_xlate (uaecptr addr) REGPARAM; + +static uae_u32 REGPARAM2 custmem1_lget (uaecptr addr) +{ + uae_u8 *m; + addr -= currprefs.custom_memory_addrs[0] & custmem1_mask; + addr &= custmem1_mask; + m = custmem1 + addr; + return do_get_mem_long ((uae_u32 *)m); +} +static uae_u32 REGPARAM2 custmem1_wget (uaecptr addr) +{ + uae_u8 *m; + addr -= currprefs.custom_memory_addrs[0] & custmem1_mask; + addr &= custmem1_mask; + m = custmem1 + addr; + return do_get_mem_word ((uae_u16 *)m); +} +static uae_u32 REGPARAM2 custmem1_bget (uaecptr addr) +{ + addr -= currprefs.custom_memory_addrs[0] & custmem1_mask; + addr &= custmem1_mask; + return custmem1[addr]; +} +static void REGPARAM2 custmem1_lput (uaecptr addr, uae_u32 l) +{ + uae_u8 *m; + addr -= currprefs.custom_memory_addrs[0] & custmem1_mask; + addr &= custmem1_mask; + m = custmem1 + addr; + do_put_mem_long ((uae_u32 *)m, l); +} +static void REGPARAM2 custmem1_wput (uaecptr addr, uae_u32 w) +{ + uae_u8 *m; + addr -= currprefs.custom_memory_addrs[0] & custmem1_mask; + addr &= custmem1_mask; + m = custmem1 + addr; + do_put_mem_word ((uae_u16 *)m, w); +} +static void REGPARAM2 custmem1_bput (uaecptr addr, uae_u32 b) +{ + addr -= currprefs.custom_memory_addrs[0] & custmem1_mask; + addr &= custmem1_mask; + custmem1[addr] = b; +} +static int REGPARAM2 custmem1_check (uaecptr addr, uae_u32 size) +{ + addr -= currprefs.custom_memory_addrs[0] & custmem1_mask; + addr &= custmem1_mask; + return (addr + size) <= currprefs.custom_memory_sizes[0]; +} +static uae_u8 *REGPARAM2 custmem1_xlate (uaecptr addr) +{ + addr -= currprefs.custom_memory_addrs[0] & custmem1_mask; + addr &= custmem1_mask; + return custmem1 + addr; +} + +static uae_u32 REGPARAM3 custmem2_lget (uaecptr) REGPARAM; +static uae_u32 REGPARAM3 custmem2_wget (uaecptr) REGPARAM; +static uae_u32 REGPARAM3 custmem2_bget (uaecptr) REGPARAM; +static void REGPARAM3 custmem2_lput (uaecptr, uae_u32) REGPARAM; +static void REGPARAM3 custmem2_wput (uaecptr, uae_u32) REGPARAM; +static void REGPARAM3 custmem2_bput (uaecptr, uae_u32) REGPARAM; +static int REGPARAM3 custmem2_check (uaecptr addr, uae_u32 size) REGPARAM; +static uae_u8 *REGPARAM3 custmem2_xlate (uaecptr addr) REGPARAM; + +static uae_u32 REGPARAM2 custmem2_lget (uaecptr addr) +{ + uae_u8 *m; + addr -= currprefs.custom_memory_addrs[1] & custmem2_mask; + addr &= custmem2_mask; + m = custmem2 + addr; + return do_get_mem_long ((uae_u32 *)m); +} +static uae_u32 REGPARAM2 custmem2_wget (uaecptr addr) +{ + uae_u8 *m; + addr -= currprefs.custom_memory_addrs[1] & custmem2_mask; + addr &= custmem2_mask; + m = custmem2 + addr; + return do_get_mem_word ((uae_u16 *)m); +} +static uae_u32 REGPARAM2 custmem2_bget (uaecptr addr) +{ + addr -= currprefs.custom_memory_addrs[1] & custmem2_mask; + addr &= custmem2_mask; + return custmem2[addr]; +} +static void REGPARAM2 custmem2_lput (uaecptr addr, uae_u32 l) +{ + uae_u8 *m; + addr -= currprefs.custom_memory_addrs[1] & custmem2_mask; + addr &= custmem2_mask; + m = custmem2 + addr; + do_put_mem_long ((uae_u32 *)m, l); +} +static void REGPARAM2 custmem2_wput (uaecptr addr, uae_u32 w) +{ + uae_u8 *m; + addr -= currprefs.custom_memory_addrs[1] & custmem2_mask; + addr &= custmem2_mask; + m = custmem2 + addr; + do_put_mem_word ((uae_u16 *)m, w); +} +static void REGPARAM2 custmem2_bput (uaecptr addr, uae_u32 b) +{ + addr -= currprefs.custom_memory_addrs[1] & custmem2_mask; + addr &= custmem2_mask; + custmem2[addr] = b; +} +static int REGPARAM2 custmem2_check (uaecptr addr, uae_u32 size) +{ + addr -= currprefs.custom_memory_addrs[1] & custmem2_mask; + addr &= custmem2_mask; + return (addr + size) <= currprefs.custom_memory_sizes[1]; +} +static uae_u8 *REGPARAM2 custmem2_xlate (uaecptr addr) +{ + addr -= currprefs.custom_memory_addrs[1] & custmem2_mask; + addr &= custmem2_mask; + return custmem2 + addr; +} + +addrbank custmem1_bank = { + custmem1_lget, custmem1_wget, custmem1_bget, + custmem1_lput, custmem1_wput, custmem1_bput, + custmem1_xlate, custmem1_check, NULL, "Non-autoconfig RAM #1", + custmem1_lget, custmem1_wget, ABFLAG_RAM +}; +addrbank custmem2_bank = { + custmem1_lget, custmem1_wget, custmem1_bget, + custmem1_lput, custmem1_wput, custmem1_bput, + custmem1_xlate, custmem1_check, NULL, "Non-autoconfig RAM #2", + custmem1_lget, custmem1_wget, ABFLAG_RAM +}; + +#define fkickmem_size 524288 +void a3000_fakekick(int map) +{ + static uae_u8 *blop; + static int f0; + + if (map) { + uae_u8 *fkickmemory = a3000lmemory + allocated_a3000lmem - fkickmem_size; + if (fkickmemory[2] == 0x4e && fkickmemory[3] == 0xf9 && fkickmemory[4] == 0x00) { + if (!blop) + blop = xmalloc (fkickmem_size); + memcpy (blop, kickmemory, fkickmem_size); + if (fkickmemory[5] == 0xfc) { + memcpy (kickmemory, fkickmemory, fkickmem_size / 2); + memcpy (kickmemory + fkickmem_size / 2, fkickmemory, fkickmem_size / 2); + if (!extendedkickmemory) { + if (need_uae_boot_rom() != 0xf00000) { + extendedkickmem_size = 65536; + extendedkickmem_mask = extendedkickmem_size - 1; + extendedkickmemory = (uae_u8 *) mapped_malloc (extendedkickmem_size, "rom_f0"); + extendedkickmem_bank.baseaddr = (uae_u8 *) extendedkickmemory; + memcpy(extendedkickmemory, fkickmemory + fkickmem_size / 2, 65536); + map_banks(&extendedkickmem_bank, 0xf0, 1, 1); + f0 = 1; + } else { + write_log("A3000 Bonus hack: can't map bonus when uae boot rom is enabled\n"); + } + } + } else { + memcpy (kickmemory, fkickmemory, fkickmem_size); + } + } + } else { + if (f0) { + map_banks(&dummy_bank, 0xf0, 1, 1); + mapped_free(extendedkickmemory); + extendedkickmemory = NULL; + f0 = 0; + } + if (blop) + memcpy (kickmemory, blop, fkickmem_size); + xfree(blop); + blop = NULL; + } +} +#endif static int kickstart_checksum (uae_u8 *mem, int size) { if (!kickstart_checksum_do (mem, size)) { #ifndef SINGLEFILE - gui_message("Kickstart checksum incorrect. You probably have a corrupted ROM image.\n"); + notify_user (NUMSG_KSROMCRCERROR); #endif return 0; } @@ -1374,10 +1934,10 @@ static int kickstart_checksum (uae_u8 *mem, int size) } static char *kickstring = "exec.library"; -int read_kickstart (struct zfile *f, uae_u8 *mem, int size, int dochecksum, int *cloanto_rom) +static int read_kickstart (struct zfile *f, uae_u8 *mem, int size, int dochecksum, int *cloanto_rom, int noalias) { unsigned char buffer[20]; - int i, j; + int i, j, oldpos; int cr = 0, kickdisk = 0; if (cloanto_rom) @@ -1387,12 +1947,13 @@ int read_kickstart (struct zfile *f, uae_u8 *mem, int size, int dochecksum, int size = zfile_ftell (f) & ~0x3ff; zfile_fseek (f, 0, SEEK_SET); } + oldpos = zfile_ftell (f); i = zfile_fread (buffer, 1, 11, f); if (!memcmp(buffer, "KICK", 4)) { zfile_fseek (f, 512, SEEK_SET); kickdisk = 1; } else if (strncmp ((char *) buffer, "AMIROMTYPE1", 11) != 0) { - zfile_fseek (f, 0, SEEK_SET); + zfile_fseek (f, oldpos, SEEK_SET); } else { cr = 1; } @@ -1403,28 +1964,31 @@ int read_kickstart (struct zfile *f, uae_u8 *mem, int size, int dochecksum, int i = zfile_fread (mem, 1, size, f); if (kickdisk && i > 262144) i = 262144; - zfile_fclose (f); - if ((i != 8192 && i != 65536) && i != 131072 && i != 262144 && i != 524288) { - gui_message ("Error while reading Kickstart.\n"); + if (i != 8192 && i != 65536 && i != 131072 && i != 262144 && i != 524288 && i != 524288 * 2 && i != 524288 * 4) { + notify_user (NUMSG_KSROMREADERROR); return 0; } - if (i == size / 2) + if (!noalias && i == size / 2) memcpy (mem + size / 2, mem, size / 2); if (cr) { - if(!decode_cloanto_rom (mem, size, i)) + if(!decode_rom (mem, size, cr, i)) return 0; } - if (i == 8192 || i == 65536) { - a1000_bootrom = (uae_u8*)xmalloc (65536); - memcpy (a1000_bootrom, kickmemory, 65536); + if (currprefs.cs_a1000ram) { + int off = 0; + a1000_bootrom = (uae_u8*)xcalloc (262144, 1); + while (off + i < 262144) { + memcpy (a1000_bootrom + off, kickmemory, i); + off += i; + } memset (kickmemory, 0, kickmem_size); a1000_handle_kickstart (1); - i = 524288; dochecksum = 0; + i = 524288; } for (j = 0; j < 256 && i >= 262144; j++) { - if (!memcmp (kickmemory + j, kickstring, strlen (kickstring) + 1)) + if (!memcmp (mem + j, kickstring, strlen (kickstring) + 1)) break; } if (j == 256 || i < 262144) @@ -1438,25 +2002,30 @@ int read_kickstart (struct zfile *f, uae_u8 *mem, int size, int dochecksum, int static int load_extendedkickstart (void) { struct zfile *f; - int size; + int size, off; if (strlen (currprefs.romextfile) == 0) return 0; f = zfile_fopen (currprefs.romextfile, "rb"); if (!f) { - gui_message("No extended Kickstart ROM found"); + notify_user (NUMSG_NOEXTROM); return 0; } zfile_fseek (f, 0, SEEK_END); size = zfile_ftell (f); - if (size > 300000) - extendedkickmem_size = 524288; - else - extendedkickmem_size = 262144; - zfile_fseek (f, 0, SEEK_SET); + extendedkickmem_size = 524288; + off = 0; + if (size > 300000) { + extendedkickmem_type = EXTENDED_ROM_CD32; + if (size >= 524288 * 2) + off = 524288; + } else { + extendedkickmem_type = EXTENDED_ROM_CDTV; + } + zfile_fseek (f, off, SEEK_SET); + switch (extendedkickmem_type) { - switch (extromtype ()) { case EXTENDED_ROM_CDTV: extendedkickmem_start = 0xf00000; extendedkickmemory = (uae_u8 *) mapped_malloc (extendedkickmem_size, "rom_f0"); @@ -1469,9 +2038,9 @@ static int load_extendedkickstart (void) break; } - read_kickstart (f, extendedkickmemory, extendedkickmem_size, 0, 0); - extendedkickmem_mask = extendedkickmem_size - 1; - + read_kickstart (f, extendedkickmemory, extendedkickmem_size, 0, 0, 1); + extendedkickmem_mask = extendedkickmem_size - 1; + zfile_fclose (f); return 1; } @@ -1499,21 +2068,21 @@ static void kickstart_fix_checksum (uae_u8 *mem, int size) } /* disable incompatible drivers */ -static int patch_residents (uae_u8 *kickmemory) +static int patch_residents (uae_u8 *kickmemory, int size) { int i, j, patched = 0; const char *residents[] = { "NCR scsi.device", "scsi.device", "carddisk.device", "card.resource", 0 }; // "scsi.device", "carddisk.device", "card.resource" }; - uaecptr base = 0xf80000; + uaecptr base = size == 524288 ? 0xf80000 : 0xfc0000; - for (i = 0; i < kickmem_size - 100; i++) { + for (i = 0; i < size - 100; i++) { if (kickmemory[i] == 0x4a && kickmemory[i + 1] == 0xfc) { uaecptr addr; addr = (kickmemory[i + 2] << 24) | (kickmemory[i + 3] << 16) | (kickmemory[i + 4] << 8) | (kickmemory[i + 5] << 0); if (addr != i + base) continue; addr = (kickmemory[i + 14] << 24) | (kickmemory[i + 15] << 16) | (kickmemory[i + 16] << 8) | (kickmemory[i + 17] << 0); - if (addr >= base && addr < base + 524288) { + if (addr >= base && addr < base + size) { j = 0; while (residents[j]) { if (!memcmp (residents[j], kickmemory + addr - base, strlen (residents[j]) + 1)) { @@ -1530,6 +2099,21 @@ static int patch_residents (uae_u8 *kickmemory) return patched; } +static void patch_kick(void) +{ + int patched = 0; +// if (kickmem_size >= 524288 && currprefs.kickshifter) +// patched += patch_shapeshifter (kickmemory); + patched += patch_residents (kickmemory, kickmem_size); + if (extendedkickmemory) { + patched += patch_residents (extendedkickmemory, extendedkickmem_size); + if (patched) + kickstart_fix_checksum (extendedkickmemory, extendedkickmem_size); + } + if (patched) + kickstart_fix_checksum (kickmemory, kickmem_size); +} + static int load_kickstart (void) { struct zfile *f = zfile_fopen(currprefs.romfile, "rb"); @@ -1571,19 +2155,69 @@ static int load_kickstart (void) #endif } - if (f != NULL) { - int size = read_kickstart (f, kickmemory, 0x80000, 1, &cloanto_rom); + if (f != NULL) { + int filesize, size, maxsize; + int kspos = 524288; + int extpos = 0; + + maxsize = 524288; + zfile_fseek (f, 0, SEEK_END); + filesize = zfile_ftell (f); + zfile_fseek (f, 0, SEEK_SET); + if (filesize == 1760 * 512) { + filesize = 262144; + maxsize = 262144; + } + if (filesize == 524288 + 8) { + /* GVP 0xf0 kickstart */ + zfile_fseek (f, 8, SEEK_SET); + } + if (filesize >= 524288 * 2) { + struct romdata *rd = getromdatabyzfile(f); + if (rd && rd->id == 64) { + kspos = 0; + extpos = 524288; + } + zfile_fseek (f, kspos, SEEK_SET); + } + if (filesize >= 524288 * 4) { + kspos = 524288 * 3; + extpos = 0; + zfile_fseek (f, kspos, SEEK_SET); + } + size = read_kickstart (f, kickmemory, maxsize, 1, &cloanto_rom, 0); if (size == 0) goto err; kickmem_mask = size - 1; + kickmem_size = size; + if (filesize >= 524288 * 2 && !extendedkickmem_type) { + extendedkickmem_size = 0x80000; + extendedkickmem_type = EXTENDED_ROM_KS; + extendedkickmemory = (uae_u8 *) mapped_malloc (extendedkickmem_size, "rom_e0"); + extendedkickmem_bank.baseaddr = (uae_u8 *) extendedkickmemory; + zfile_fseek (f, extpos, SEEK_SET); + read_kickstart (f, extendedkickmemory, extendedkickmem_size, 0, 0, 1); + extendedkickmem_mask = extendedkickmem_size - 1; + } + if (filesize > 524288 * 2) { + extendedkickmem2_size = 524288 * 2; + extendedkickmemory2 = mapped_malloc (extendedkickmem2_size, "rom_a8"); + extendedkickmem2_bank.baseaddr = extendedkickmemory2; + zfile_fseek (f, extpos + 524288, SEEK_SET); + read_kickstart (f, extendedkickmemory2, 524288, 0, 0, 1); + zfile_fseek (f, extpos + 524288 * 2, SEEK_SET); + read_kickstart (f, extendedkickmemory2 + 524288, 524288, 0, 0, 1); + extendedkickmem2_mask = extendedkickmem2_size - 1; + } } kickstart_version = (kickmemory[12] << 8) | kickmemory[13]; - kickmem_checksum = get_kickmem_checksum(); + zfile_fclose (f); return 1; err: strcpy (currprefs.romfile, tmprom); + zfile_fclose (f); return 0; } @@ -1603,6 +2237,8 @@ static void allocate_memory (void) if (chipmemory) mapped_free (chipmemory); chipmemory = 0; + if (currprefs.chipmem_size > 2 * 1024 * 1024) + free_fastmemory (); memsize = allocated_chipmem = currprefs.chipmem_size; chipmem_full_mask = chipmem_mask = allocated_chipmem - 1; @@ -1614,7 +2250,7 @@ static void allocate_memory (void) write_log ("Fatal error: out of memory for chipmem.\n"); allocated_chipmem = 0; } else { - memory_hardreset(); + need_hardreset = 1; if (memsize != allocated_chipmem) memset (chipmemory + allocated_chipmem, 0xff, memsize - allocated_chipmem); } @@ -1632,7 +2268,7 @@ static void allocate_memory (void) if(currprefs.bogomem_size > 0x1c0000) currprefs.bogomem_size = 0x1c0000; - if (currprefs.bogomem_size > 0x180000 && ((changed_prefs.chipset_mask & CSMASK_AGA) || (currprefs.cpu_level >= M68020))) + if (currprefs.bogomem_size > 0x180000 && ((changed_prefs.chipset_mask & CSMASK_AGA) || (currprefs.cpu_model >= 68020))) currprefs.bogomem_size = 0x180000; allocated_bogomem = currprefs.bogomem_size; @@ -1645,40 +2281,108 @@ static void allocate_memory (void) allocated_bogomem = 0; } } - memory_hardreset(); + need_hardreset = 1; } #if !( defined(PANDORA) || defined(ANDROIDSDL) ) -#ifdef AUTOCONFIG - if (allocated_a3000mem != currprefs.a3000mem_size) { - if (a3000memory) - mapped_free (a3000memory); - a3000memory = 0; - allocated_a3000mem = currprefs.a3000mem_size; - a3000mem_mask = allocated_a3000mem - 1; + if (allocated_a3000lmem != currprefs.mbresmem_low_size) { + if (a3000lmemory) + mapped_free (a3000lmemory); + a3000lmemory = 0; - if (allocated_a3000mem) { - a3000memory = mapped_malloc (allocated_a3000mem, "a3000"); - if (a3000memory == 0) { - write_log ("Out of memory for a3000mem.\n"); - allocated_a3000mem = 0; + allocated_a3000lmem = currprefs.mbresmem_low_size; + a3000lmem_mask = allocated_a3000lmem - 1; + a3000lmem_start = 0x08000000 - allocated_a3000lmem; + if (allocated_a3000lmem) { + a3000lmemory = mapped_malloc (allocated_a3000lmem, "ramsey_low"); + if (a3000lmemory == 0) { + write_log ("Out of memory for a3000lowmem.\n"); + allocated_a3000lmem = 0; } } - memory_hardreset(); - } -#endif + need_hardreset = 1; + } + if (allocated_a3000hmem != currprefs.mbresmem_high_size) { + if (a3000hmemory) + mapped_free (a3000hmemory); + a3000hmemory = 0; + + allocated_a3000hmem = currprefs.mbresmem_high_size; + a3000hmem_mask = allocated_a3000hmem - 1; + a3000hmem_start = 0x08000000; + if (allocated_a3000hmem) { + a3000hmemory = mapped_malloc (allocated_a3000hmem, "ramsey_high"); + if (a3000hmemory == 0) { + write_log ("Out of memory for a3000highmem.\n"); + allocated_a3000hmem = 0; + } + } + need_hardreset = 1; + } + if (allocated_cardmem != currprefs.cs_cdtvcard * 1024) { + if (cardmemory) + mapped_free (cardmemory); + cardmemory = 0; + + allocated_cardmem = currprefs.cs_cdtvcard * 1024; + cardmem_mask = allocated_cardmem - 1; + if (allocated_cardmem) { + cardmemory = mapped_malloc (allocated_cardmem, "rom_e0"); + if (cardmemory == 0) { + write_log ("Out of memory for cardmem.\n"); + allocated_cardmem = 0; + } + } + cdtv_loadcardmem(cardmemory, allocated_cardmem); + } + if (allocated_custmem1 != currprefs.custom_memory_sizes[0]) { + if (custmem1) + mapped_free (custmem1); + custmem1 = 0; + allocated_custmem1 = currprefs.custom_memory_sizes[0]; + custmem1_mask = allocated_custmem1 - 1; + if (allocated_custmem1) { + custmem1 = mapped_malloc (allocated_custmem1, "custmem1"); + if (!custmem1) + allocated_custmem1 = 0; + } + } + if (allocated_custmem2 != currprefs.custom_memory_sizes[1]) { + if (custmem2) + mapped_free (custmem2); + custmem2 = 0; + allocated_custmem2 = currprefs.custom_memory_sizes[1]; + custmem2_mask = allocated_custmem2 - 1; + if (allocated_custmem2) { + custmem2 = mapped_malloc (allocated_custmem2, "custmem2"); + if (!custmem2) + allocated_custmem2 = 0; + } + } #endif if (savestate_state == STATE_RESTORE) { + restore_ram (bootrom_filepos, rtarea); restore_ram (chip_filepos, chipmemory); if (allocated_bogomem > 0) restore_ram (bogo_filepos, bogomemory); +#if !( defined(PANDORA) || defined(ANDROIDSDL) ) + if (allocated_a3000lmem > 0) + restore_ram (a3000lmem_filepos, a3000lmemory); + if (allocated_a3000hmem > 0) + restore_ram (a3000hmem_filepos, a3000hmemory); +#endif } chipmem_bank.baseaddr = chipmemory; #if !( defined(PANDORA) || defined(ANDROIDSDL) ) chipmem_bank_ce2.baseaddr = chipmemory; #endif bogomem_bank.baseaddr = bogomemory; +#if !( defined(PANDORA) || defined(ANDROIDSDL) ) + a3000lmem_bank.baseaddr = a3000lmemory; + a3000hmem_bank.baseaddr = a3000hmemory; + cardmem_bank.baseaddr = cardmemory; +#endif } void map_overlay (int chip) @@ -1689,26 +2393,51 @@ void map_overlay (int chip) cb = &chipmem_bank; #if !( defined(PANDORA) || defined(ANDROIDSDL) ) - if (currprefs.cpu_cycle_exact && currprefs.cpu_level >= 2) + if (currprefs.cpu_cycle_exact && currprefs.cpu_model >= 68020) cb = &chipmem_bank_ce2; #endif - if (chip) + if (chip) { map_banks (cb, 0, i, allocated_chipmem); - else - map_banks (&kickmem_bank, 0, i, 0x80000); - if (savestate_state != STATE_RESTORE) + } else { + addrbank *rb = NULL; + cb = &get_mem_bank (0xf00000); + if (!rb && cb && (cb->flags & ABFLAG_ROM) && get_word (0xf00000) == 0x1114) + rb = cb; + cb = &get_mem_bank (0xe00000); + if (!rb && cb && (cb->flags & ABFLAG_ROM) && get_word (0xe00000) == 0x1114) + rb = cb; + if (!rb) + rb = &kickmem_bank; + map_banks (rb, 0, i, 0x80000); + } + if (savestate_state != STATE_RESTORE && valid_address (regs.pc, 4)) m68k_setpc(®s, currPC); } void memory_reset (void) { - int bnk, bnk_end, custom_start; + int bnk, bnk_end; currprefs.chipmem_size = changed_prefs.chipmem_size; currprefs.bogomem_size = changed_prefs.bogomem_size; #if !( defined(PANDORA) || defined(ANDROIDSDL) ) - currprefs.a3000mem_size = changed_prefs.a3000mem_size; + currprefs.mbresmem_low_size = changed_prefs.mbresmem_low_size; + currprefs.mbresmem_high_size = changed_prefs.mbresmem_high_size; + currprefs.cs_ksmirror = changed_prefs.cs_ksmirror; + currprefs.cs_cdtvram = changed_prefs.cs_cdtvram; + currprefs.cs_cdtvcard = changed_prefs.cs_cdtvcard; + currprefs.cs_ide = changed_prefs.cs_ide; + currprefs.cs_fatgaryrev = changed_prefs.cs_fatgaryrev; + currprefs.cs_ramseyrev = changed_prefs.cs_ramseyrev; #endif + currprefs.cs_a1000ram = changed_prefs.cs_a1000ram; + + need_hardreset = 0; + /* Use changed_prefs, as m68k_reset is called later. */ + if (last_address_space_24 != changed_prefs.address_space_24) + need_hardreset = 1; + + last_address_space_24 = changed_prefs.address_space_24; init_mem_banks (); allocate_memory (); @@ -1723,17 +2452,19 @@ void memory_reset (void) a1000_kickstart_mode = 0; memcpy (currprefs.romfile, changed_prefs.romfile, sizeof currprefs.romfile); memcpy (currprefs.romextfile, changed_prefs.romextfile, sizeof currprefs.romextfile); - if (savestate_state != STATE_RESTORE) - memory_hardreset(); + need_hardreset = 1; mapped_free (extendedkickmemory); extendedkickmemory = 0; extendedkickmem_size = 0; + extendedkickmemory2 = 0; + extendedkickmem2_size = 0; + extendedkickmem_type = 0; load_extendedkickstart (); kickmem_mask = 524288 - 1; if (!load_kickstart ()) { if (strlen (currprefs.romfile) > 0) { write_log ("%s\n", currprefs.romfile); -// notify_user (NUMSG_NOROM); + notify_user (NUMSG_NOROM); } #ifdef AUTOCONFIG init_ersatz_rom (kickmemory); @@ -1744,71 +2475,105 @@ void memory_reset (void) } else { struct romdata *rd = getromdatabydata (kickmemory, kickmem_size); if (rd) { - if (rd->cpu == 1 && changed_prefs.cpu_level < 2) { + if ((rd->cpu & 3) == 3 && changed_prefs.cpu_model != 68030) { + notify_user (NUMSG_KS68030); + uae_restart (-1, NULL); + } else if ((rd->cpu & 3) == 1 && changed_prefs.cpu_model < 68020) { notify_user (NUMSG_KS68EC020); uae_restart (-1, NULL); - } else if (rd->cpu == 2 && (changed_prefs.cpu_level < 2 || changed_prefs.address_space_24)) { + } else if ((rd->cpu & 3) == 2 && (changed_prefs.cpu_model < 68020 || changed_prefs.address_space_24)) { notify_user (NUMSG_KS68020); uae_restart (-1, NULL); } if (rd->cloanto) cloanto_rom = 1; +#if !( defined(PANDORA) || defined(ANDROIDSDL) ) + if ((rd->cpu & 4) && currprefs.cs_compatible) { + /* A4000 ROM = need ramsey, gary and ide */ + if (currprefs.cs_ramseyrev < 0) + changed_prefs.cs_ramseyrev = currprefs.cs_ramseyrev = 0x0f; + changed_prefs.cs_fatgaryrev = currprefs.cs_fatgaryrev = 0; + if (currprefs.cs_ide != 2) + changed_prefs.cs_ide = currprefs.cs_ide = -1; + } +#endif } } - if (kickmem_size >= 524288) { - int patched = 0; -// if (currprefs.kickshifter) -// patched += patch_shapeshifter (kickmemory); - patched += patch_residents (kickmemory); - if (patched) - kickstart_fix_checksum (kickmemory, kickmem_size); + patch_kick (); } - } // if (cloanto_rom) // currprefs.maprom = changed_prefs.maprom = 0; - custom_start = 0xC0; - - map_banks (&custom_bank, custom_start, 0xE0 - custom_start, 0); + map_banks (&custom_bank, 0xC0, 0xE0 - 0xC0, 0); map_banks (&cia_bank, 0xA0, 32, 0); + if (!currprefs.cs_a1000ram) + /* D80000 - DDFFFF not mapped (A1000 = custom chips) */ + map_banks (&dummy_bank, 0xD8, 6, 0); - /* map "nothing" to 0x200000 - 0xa00000 (0xBEFFFF if PCMCIA or AGA) */ + /* map "nothing" to 0x200000 - 0x9FFFFF (0xBEFFFF if PCMCIA or AGA) */ bnk = allocated_chipmem >> 16; if (bnk < 0x20 + (currprefs.fastmem_size >> 16)) bnk = 0x20 + (currprefs.fastmem_size >> 16); - bnk_end = (((changed_prefs.chipset_mask & CSMASK_AGA) /*|| currprefs.cs_pcmcia*/) ? 0xBF : 0xA0); + bnk_end = (((currprefs.chipset_mask & CSMASK_AGA) /*|| currprefs.cs_pcmcia*/) ? 0xBF : 0xA0); map_banks (&dummy_bank, bnk, bnk_end - bnk, 0); - if (changed_prefs.chipset_mask & CSMASK_AGA) + if (currprefs.chipset_mask & CSMASK_AGA) map_banks (&dummy_bank, 0xc0, 0xd8 - 0xc0, 0); if (bogomemory != 0) { int t = allocated_bogomem >> 16; - map_banks (&bogomem_bank, 0xC0, t, 0); } - map_banks (&clock_bank, 0xDC, 1, 0); - -#ifdef AUTOCONFIG #if !( defined(PANDORA) || defined(ANDROIDSDL) ) - if (a3000memory != 0) - map_banks (&a3000mem_bank, a3000mem_start >> 16, allocated_a3000mem >> 16, - allocated_a3000mem); + if (currprefs.cs_ide || currprefs.cs_pcmcia) { + if (currprefs.cs_ide == 1 || currprefs.cs_pcmcia) { + map_banks (&gayle_bank, 0xD8, 6, 0); + map_banks (&gayle2_bank, 0xDD, 2, 0); + } + if (currprefs.cs_pcmcia) { + map_banks (&gayle_attr_bank, 0xA0, 8, 0); + if (currprefs.chipmem_size <= 4 * 1024 * 1024 && currprefs.fastmem_size <= 4 * 1024 * 1024) + map_banks (&gayle_common_bank, PCMCIA_COMMON_START >> 16, PCMCIA_COMMON_SIZE >> 16, 0); + } + if (currprefs.cs_ide == 2 || currprefs.cs_mbdmac == 2) + map_banks (&gayle_bank, 0xDD, 1, 0); + if (currprefs.cs_ide < 0 && !currprefs.cs_pcmcia) + map_banks (&gayle_bank, 0xD8, 6, 0); + if (currprefs.cs_ide < 0) + map_banks (&gayle_bank, 0xDD, 1, 0); + } + if (currprefs.cs_rtc || currprefs.cs_cdtvram) +#endif + map_banks (&clock_bank, 0xDC, 1, 0); +#if !( defined(PANDORA) || defined(ANDROIDSDL) ) + else if (currprefs.cs_ksmirror_a8 || currprefs.cs_ide > 0 || currprefs.cs_pcmcia) + map_banks (&clock_bank, 0xDC, 1, 0); /* none clock */ + if (currprefs.cs_fatgaryrev >= 0|| currprefs.cs_ramseyrev >= 0) + map_banks (&mbres_bank, 0xDE, 1, 0); + if (currprefs.cs_cd32c2p || currprefs.cs_cd32cd || currprefs.cs_cd32nvram) + map_banks (&akiko_bank, AKIKO_BASE >> 16, 1, 0); + if (currprefs.cs_mbdmac == 1) + a3000scsi_reset(); + if (a3000lmemory != 0) + map_banks (&a3000lmem_bank, a3000lmem_start >> 16, allocated_a3000lmem >> 16, 0); + if (a3000hmemory != 0) + map_banks (&a3000hmem_bank, a3000hmem_start >> 16, allocated_a3000hmem >> 16, 0); + if (cardmemory != 0) + map_banks (&cardmem_bank, cardmem_start >> 16, allocated_cardmem >> 16, 0); #endif - if (nr_units (currprefs.mountinfo) > 0) - map_banks (&rtarea_bank, RTAREA_BASE >> 16, 1, 0); -#endif - map_banks (&kickmem_bank, 0xF8, 8, 0); // if (currprefs.maprom) // map_banks (&kickram_bank, currprefs.maprom >> 16, 8, 0); - - /* map beta Kickstarts to 0x200000 */ - if (kickmemory[2] == 0x4e && kickmemory[3] == 0xf9 && kickmemory[4] == 0x00) { + /* map beta Kickstarts at 0x200000/0xC00000/0xF00000 */ + if (kickmemory[0] == 0x11 && kickmemory[2] == 0x4e && kickmemory[3] == 0xf9 && kickmemory[4] == 0x00) { uae_u32 addr = kickmemory[5]; - if (addr == 0x20 && allocated_chipmem <= 0x200000 && allocated_fastmem == 0) - map_banks (&kickmem_bank, addr, 8, 0); + if (addr == 0x20 && allocated_chipmem <= 0x200000 && allocated_fastmem == 0) + map_banks (&kickmem_bank, addr, 8, 0); + if (addr == 0xC0 && allocated_bogomem == 0) + map_banks (&kickmem_bank, addr, 8, 0); + if (addr == 0xF0) + map_banks (&kickmem_bank, addr, 8, 0); } if (a1000_bootrom) @@ -1821,23 +2586,46 @@ void memory_reset (void) /* Map the chipmem into all of the lower 8MB */ map_overlay (1); - switch (extromtype ()) { -#ifdef CDTV - case EXTENDED_ROM_CDTV: - map_banks (&extendedkickmem_bank, 0xF0, 4, 0); - cdtv_enabled = 1; - break; -#endif -#ifdef CD32 - case EXTENDED_ROM_CD32: - map_banks (&extendedkickmem_bank, 0xE0, 8, 0); - cd32_enabled = 1; - break; -#endif - default: - if (cloanto_rom /*&& !currprefs.maprom*/) - map_banks (&kickmem_bank, 0xE0, 8, 0); + switch (extendedkickmem_type) { + case EXTENDED_ROM_KS: + map_banks (&extendedkickmem_bank, 0xE0, 8, 0); + break; } +#ifdef AUTOCONFIG + if (need_uae_boot_rom ()) + map_banks (&rtarea_bank, rtarea_base >> 16, 1, 0); +#endif + + if ((cloanto_rom /*|| currprefs.cs_ksmirror_e0*/) /*&& !currprefs.maprom*/ && !extendedkickmem_type) + map_banks (&kickmem_bank, 0xE0, 8, 0); + +#if !( defined(PANDORA) || defined(ANDROIDSDL) ) + if (currprefs.cs_ksmirror_a8) { + if (extendedkickmem2_size) { + map_banks (&extendedkickmem2_bank, 0xa8, 16, 0); + } else { + struct romdata *rd = getromdatabypath(currprefs.cartfile); + if (!rd || rd->id != 63) { + if (extendedkickmem_type == EXTENDED_ROM_CD32 || extendedkickmem_type == EXTENDED_ROM_KS) + map_banks (&extendedkickmem_bank, 0xb0, 8, 0); + else + map_banks (&kickmem_bank, 0xb0, 8, 0); + map_banks (&kickmem_bank, 0xa8, 8, 0); + } + } + } + + if (currprefs.custom_memory_sizes[0]) { + map_banks (&custmem1_bank, + currprefs.custom_memory_addrs[0] >> 16, + currprefs.custom_memory_sizes[0] >> 16, 0); + } + if (currprefs.custom_memory_sizes[1]) { + map_banks (&custmem2_bank, + currprefs.custom_memory_addrs[1] >> 16, + currprefs.custom_memory_sizes[1] >> 16, 0); + } +#endif } @@ -1848,17 +2636,23 @@ void memory_init (void) kickmemory = 0; extendedkickmemory = 0; extendedkickmem_size = 0; + extendedkickmemory2 = 0; + extendedkickmem2_size = 0; + extendedkickmem_type = 0; chipmemory = 0; #if !( defined(PANDORA) || defined(ANDROIDSDL) ) -#ifdef AUTOCONFIG - allocated_a3000mem = 0; - a3000memory = 0; -#endif + allocated_a3000lmem = allocated_a3000hmem = 0; + a3000lmemory = a3000hmemory = 0; #endif bogomemory = 0; +#if !( defined(PANDORA) || defined(ANDROIDSDL) ) + cardmemory = 0; + custmem1 = 0; + custmem2 = 0; +#endif - kickmemory = mapped_malloc (kickmem_size, "kick"); - memset (kickmemory, 0, kickmem_size); + kickmemory = mapped_malloc (0x80000, "kick"); + memset (kickmemory, 0, 0x80000); kickmem_bank.baseaddr = kickmemory; strcpy (currprefs.romfile, ""); currprefs.romextfile[0] = 0; @@ -1873,11 +2667,10 @@ void memory_init (void) void memory_cleanup (void) { #if !( defined(PANDORA) || defined(ANDROIDSDL) ) -#ifdef AUTOCONFIG - if (a3000memory) - mapped_free (a3000memory); - a3000memory = 0; -#endif + if (a3000lmemory) + mapped_free (a3000lmemory); + if (a3000hmemory) + mapped_free (a3000hmemory); #endif if (bogomemory) mapped_free (bogomemory); @@ -1887,20 +2680,46 @@ void memory_cleanup (void) xfree (a1000_bootrom); if (chipmemory) mapped_free (chipmemory); +#if !( defined(PANDORA) || defined(ANDROIDSDL) ) + if (cardmemory) { + cdtv_savecardmem (cardmemory, allocated_cardmem); + mapped_free (cardmemory); + } + if (custmem1) + mapped_free (custmem1); + if (custmem2) + mapped_free (custmem2); +#endif bogomemory = 0; kickmemory = 0; +#if !( defined(PANDORA) || defined(ANDROIDSDL) ) + a3000lmemory = a3000hmemory = 0; +#endif a1000_bootrom = 0; a1000_kickstart_mode = 0; chipmemory = 0; +#if !( defined(PANDORA) || defined(ANDROIDSDL) ) + cardmemory = 0; + custmem1 = 0; + custmem2 = 0; +#endif } void memory_hardreset(void) { + if (savestate_state == STATE_RESTORE) + return; if (chipmemory) memset (chipmemory, 0, allocated_chipmem); if (bogomemory) memset (bogomemory, 0, allocated_bogomem); +#if !( defined(PANDORA) || defined(ANDROIDSDL) ) + if (a3000lmemory) + memset (a3000lmemory, 0, allocated_a3000lmem); + if (a3000hmemory) + memset (a3000hmemory, 0, allocated_a3000hmem); +#endif expansion_clear(); } @@ -1911,9 +2730,7 @@ void map_banks (addrbank *bank, int start, int size, int realsize) addrbank *orgbank = bank; uae_u32 realstart = start; -#ifdef JIT flush_icache (1); /* Sure don't want to keep any old mappings around! */ -#endif if (!realsize) realsize = size << 16; @@ -1937,7 +2754,7 @@ void map_banks (addrbank *bank, int start, int size, int realsize) return; } #endif - if (currprefs.address_space_24) + if (last_address_space_24) endhioffs = 0x10000; #ifdef ADDRESS_SPACE_24BIT endhioffs = 0x100; @@ -1959,6 +2776,14 @@ void map_banks (addrbank *bank, int start, int size, int realsize) /* memory save/restore code */ +uae_u8 *save_bootrom(int *len) +{ + if (!uae_boot_rom) + return 0; + *len = uae_boot_rom_size; + return rtarea; +} + uae_u8 *save_cram (int *len) { *len = allocated_chipmem; @@ -1971,6 +2796,25 @@ uae_u8 *save_bram (int *len) return bogomemory; } +#if !( defined(PANDORA) || defined(ANDROIDSDL) ) +uae_u8 *save_a3000lram (int *len) +{ + *len = allocated_a3000lmem; + return a3000lmemory; +} + +uae_u8 *save_a3000hram (int *len) +{ + *len = allocated_a3000hmem; + return a3000hmemory; +} +#endif + +void restore_bootrom (int len, size_t filepos) +{ + bootrom_filepos = filepos; +} + void restore_cram (int len, size_t filepos) { chip_filepos = filepos; @@ -1983,6 +2827,20 @@ void restore_bram (int len, size_t filepos) changed_prefs.bogomem_size = len; } +#if !( defined(PANDORA) || defined(ANDROIDSDL) ) +void restore_a3000lram (int len, size_t filepos) +{ + a3000lmem_filepos = filepos; + changed_prefs.mbresmem_low_size = len; +} + +void restore_a3000hram (int len, size_t filepos) +{ + a3000hmem_filepos = filepos; + changed_prefs.mbresmem_high_size = len; +} +#endif + uae_u8 *restore_rom (uae_u8 *src) { uae_u32 crc32, mem_start, mem_size, mem_type, version; @@ -2060,7 +2918,7 @@ uae_u8 *save_rom (int first, int *len, uae_u8 *dstptr) sprintf (tmpname, "Kickstart %d.%d", wordget (mem_start + 12), wordget (mem_start + 14)); break; case 1: /* Extended ROM */ - if (!extendedkickmem_size) + if (!extendedkickmem_type) break; mem_start = extendedkickmem_start; mem_real_start = extendedkickmemory; @@ -2097,3 +2955,54 @@ uae_u8 *save_rom (int first, int *len, uae_u8 *dstptr) } #endif /* SAVESTATE */ + +/* memory helpers */ + +void memcpyha_safe (uaecptr dst, const uae_u8 *src, int size) +{ + if (!addr_valid("memcpyha", dst, size)) + return; + while (size--) + put_byte (dst++, *src++); +} +void memcpyha (uaecptr dst, const uae_u8 *src, int size) +{ + while (size--) + put_byte (dst++, *src++); +} +void memcpyah_safe (uae_u8 *dst, uaecptr src, int size) +{ + if (!addr_valid("memcpyah", src, size)) + return; + while (size--) + *dst++ = get_byte(src++); +} +void memcpyah (uae_u8 *dst, uaecptr src, int size) +{ + while (size--) + *dst++ = get_byte(src++); +} +char *strcpyah_safe (char *dst, uaecptr src) +{ + char *res = dst; + uae_u8 b; + do { + if (!addr_valid("strcpyah", src, 1)) + return res; + b = get_byte(src++); + *dst++ = b; + } while (b); + return res; +} +uaecptr strcpyha_safe (uaecptr dst, const char *src) +{ + uaecptr res = dst; + uae_u8 b; + do { + if (!addr_valid("strcpyha", dst, 1)) + return res; + b = *src++; + put_byte (dst++, b); + } while (b); + return res; +} diff --git a/src/missing.cpp b/src/missing.cpp index 7a2f8abc..dfef1ba0 100644 --- a/src/missing.cpp +++ b/src/missing.cpp @@ -28,18 +28,12 @@ char *my_strdup (const char *s) void *xmalloc (size_t n) { void *a = malloc (n); - if (a == NULL) { - return NULL; - } return a; } void *xcalloc (size_t n, size_t size) { void *a = calloc (n, size); - if (a == NULL) { - return NULL; - } return a; } diff --git a/src/native2amiga.cpp b/src/native2amiga.cpp index 9c0e494a..964ecbb4 100644 --- a/src/native2amiga.cpp +++ b/src/native2amiga.cpp @@ -30,7 +30,7 @@ static uae_sem_t n2asem; void native2amiga_install (void) { - init_comm_pipe (&native2amiga_pending, 10, 2); + init_comm_pipe (&native2amiga_pending, 100, 2); uae_sem_init (&n2asem, 0, 1); } diff --git a/src/newcpu.cpp b/src/newcpu.cpp index 305d30a7..32b96094 100644 --- a/src/newcpu.cpp +++ b/src/newcpu.cpp @@ -49,13 +49,13 @@ #include "savestate.h" #include "blitter.h" #include "ar.h" +#include "cia.h" #include #ifdef JIT extern uae_u8* compiled_code; #include "compemu.h" #include -int oink=0; /* For faster cycles handling */ signed long pissoff=0; /* Counter for missed vsyncmintime deadlines */ @@ -79,6 +79,7 @@ static int last_instructionaccess_for_exception_3; unsigned long irqcycles[15]; int irqdelay[15]; int mmu_enabled, mmu_triggered; +int cpu_cycles; const int areg_byteinc[] = { 1,1,1,1,1,1,1,2 }; const int imm8_table[] = { 8,1,2,3,4,5,6,7 }; @@ -87,16 +88,17 @@ int movem_index1[256]; int movem_index2[256]; int movem_next[256]; -#ifdef FPUEMU -int fpp_movem_index1[256]; -int fpp_movem_index2[256]; -int fpp_movem_next[256]; -#endif - cpuop_func *cpufunctbl[65536]; extern uae_u32 get_fpsr(void); +#define MC68060_PCR 0x04300000 +#define MC68EC060_PCR 0x04310000 + +static uae_u64 srp_030, crp_030; +static uae_u32 tt0_030, tt1_030, tc_030; +static uae_u16 mmusr_030; + static __inline__ unsigned int cft_map (unsigned int f) { //#if ((!defined(HAVE_GET_WORD_UNSWAPPED)) || (defined(FULLMMU))) @@ -105,7 +107,59 @@ static __inline__ unsigned int cft_map (unsigned int f) // return do_byteswap_16(f); //#endif } - + +#ifdef DEBUG_M68K + +int debug_frame_counter = 0; +int debug_frame_start = -1; +int debug_frame_end = -1; + +void m68k_dumpstate() +{ + int i; + static uae_u32 prev_pc = 0xffffffff; + + if(debug_frame_counter < debug_frame_start || debug_frame_counter >= debug_frame_end) + return; + uae_u32 curr_pc = m68k_getpc (®s); + if(prev_pc == curr_pc) + return; + prev_pc = curr_pc; + write_log("0x%08lX: D0-D7 ", curr_pc); + for (i = 0; i < 8; i++) + write_log(" 0x%08lX", m68k_dreg (®s, i)); + write_log("\n"); + write_log("0x%08lX: A0-A7 ", curr_pc); + for (i = 0; i < 8; i++) + write_log(" 0x%08lX", m68k_areg (®s, i)); + write_log("\n"); + + write_log("0x%08lX: T=%d%d S=%d M=%d X=%d N=%d Z=%d V=%d C=%d IMASK=%d STP=%d\n", + curr_pc, regs.t1, regs.t0, regs.s, regs.m, + GET_XFLG (®s.ccrflags), GET_NFLG (®s.ccrflags), GET_ZFLG (®s.ccrflags), + GET_VFLG (®s.ccrflags), GET_CFLG (®s.ccrflags), + regs.intmask, regs.stopped); +// write_log("0x%08lX: next instr=0x%04X, cycles=%d\n", curr_pc, get_iword (®s, 0), currcycle/CYCLE_UNIT); + write_log("0x%08lX: next instr=0x%04X\n", curr_pc, get_iword (®s, 0)); +} + +#endif + +static void set_cpu_caches(void) +{ +#ifdef JIT + if (currprefs.cpu_model < 68040) { + set_cache_state(regs.cacr & 1); + if (regs.cacr & 0x08) { + regs.cacr &= ~0x08; + flush_icache(1); + } + } else { + set_cache_state((regs.cacr & 0x8000) ? 1 : 0); + } +#endif +} + unsigned long REGPARAM3 op_illg_1 (uae_u32 opcode, struct regstruct *regs) REGPARAM; unsigned long REGPARAM2 op_illg_1 (uae_u32 opcode, struct regstruct *regs) @@ -119,31 +173,40 @@ static void build_cpufunctbl (void) int i; unsigned long opcode; const struct cputbl *tbl = 0; + int lvl; - switch (currprefs.cpu_level) + switch (currprefs.cpu_model) { #ifdef CPUEMU_0 #ifndef CPUEMU_68000_ONLY - case 4: - case 6: + case 68060: + lvl = 5; tbl = op_smalltbl_0_ff; break; - case 3: + case 68040: + lvl = 4; tbl = op_smalltbl_1_ff; break; - case 2: + case 68030: + lvl = 3; tbl = op_smalltbl_2_ff; break; - case 1: + case 68020: + lvl = 2; tbl = op_smalltbl_3_ff; break; + case 68010: + lvl = 1; + tbl = op_smalltbl_4_ff; + break; #endif #endif - case 0: - tbl = op_smalltbl_4_ff; -#ifdef CPUEMU_5 + case 68000: + lvl = 0; + tbl = op_smalltbl_5_ff; +#ifdef CPUEMU_11 if (currprefs.cpu_compatible) - tbl = op_smalltbl_5_ff; /* prefetch */ + tbl = op_smalltbl_11_ff; /* prefetch */ #endif break; } @@ -161,7 +224,7 @@ static void build_cpufunctbl (void) for (opcode = 0; opcode < 65536; opcode++) { cpuop_func *f; - if (table68k[opcode].mnemo == i_ILLG || table68k[opcode].clev > currprefs.cpu_level) + if (table68k[opcode].mnemo == i_ILLG || table68k[opcode].clev > lvl) continue; if (table68k[opcode].handler != -1) { @@ -175,6 +238,7 @@ static void build_cpufunctbl (void) compiler_init (); build_comp (); #endif + set_cpu_caches (); } void fill_prefetch_slow (struct regstruct *regs) @@ -208,19 +272,35 @@ void check_prefs_changed_adr24 (void) } } +static void prefs_changed_cpu (void) +{ + fixup_cpu (&changed_prefs); + currprefs.cpu_model = changed_prefs.cpu_model; + currprefs.fpu_model = changed_prefs.fpu_model; + currprefs.cpu_compatible = changed_prefs.cpu_compatible; +// currprefs.cpu_cycle_exact = changed_prefs.cpu_cycle_exact; +// currprefs.blitter_cycle_exact = changed_prefs.cpu_cycle_exact; +} + void check_prefs_changed_cpu (void) { - if (currprefs.cpu_level != changed_prefs.cpu_level + int changed = 0; + +#ifdef JIT + changed = check_prefs_changed_comp (); +#endif + if (changed + || currprefs.cpu_model != changed_prefs.cpu_model + || currprefs.fpu_model != changed_prefs.fpu_model || currprefs.cpu_compatible != changed_prefs.cpu_compatible) { + prefs_changed_cpu (); if (!currprefs.cpu_compatible && changed_prefs.cpu_compatible) fill_prefetch_slow (®s); - - currprefs.cpu_level = changed_prefs.cpu_level; - currprefs.cpu_compatible = changed_prefs.cpu_compatible; build_cpufunctbl (); + changed = 1; } - if (currprefs.m68k_speed != changed_prefs.m68k_speed) { + if (changed || currprefs.m68k_speed != changed_prefs.m68k_speed) { currprefs.m68k_speed = changed_prefs.m68k_speed; reset_frame_rate_hack (); update_68k_cycles (); @@ -228,12 +308,15 @@ void check_prefs_changed_cpu (void) if (currprefs.cpu_idle != changed_prefs.cpu_idle) { currprefs.cpu_idle = changed_prefs.cpu_idle; } + if (changed) + set_special (®s, SPCFLAG_BRK); } void init_m68k (void) { int i; + prefs_changed_cpu (); update_68k_cycles (); for (i = 0 ; i < 256 ; i++) { @@ -245,20 +328,10 @@ void init_m68k (void) movem_index2[i] = 7-j; movem_next[i] = i & (~(1 << j)); } -#ifdef FPUEMU - for (i = 0 ; i < 256 ; i++) { - int j; - for (j = 7 ; j >= 0 ; j--) { - if (i & (1 << j)) break; - } - fpp_movem_index1[i] = 7-j; - fpp_movem_index2[i] = j; - fpp_movem_next[i] = i & (~(1 << j)); - } -#endif + regs.address_space_mask = 0xffffffff; if (currprefs.cpu_compatible > 0) { - if (currprefs.address_space_24 && currprefs.cpu_level > 3) + if (currprefs.address_space_24 && currprefs.cpu_model >= 68030) currprefs.address_space_24 = 0; } if (currprefs.address_space_24) { @@ -280,6 +353,11 @@ void init_m68k (void) struct regstruct regs; static long int m68kpc_offset; +int get_cpu_model(void) +{ + return currprefs.cpu_model; +} + uae_u32 REGPARAM2 get_disp_ea_020 (struct regstruct *regs, uae_u32 base, uae_u32 dp) { int reg = (dp >> 12) & 15; @@ -373,7 +451,10 @@ void REGPARAM2 MakeFromSR (struct regstruct *regs) regs->s = (regs->sr >> 13) & 1; regs->m = (regs->sr >> 12) & 1; regs->intmask = (regs->sr >> 8) & 7; - if (currprefs.cpu_level >= 2) { + if (currprefs.cpu_model >= 68020) { + /* 68060 does not have MSP but does have M-bit.. */ + if (currprefs.cpu_model >= 68060) + regs->msp = regs->isp; if (olds != regs->s) { if (olds) { if (oldm) @@ -394,6 +475,8 @@ void REGPARAM2 MakeFromSR (struct regstruct *regs) m68k_areg (regs, 7) = regs->msp; } } + if (currprefs.cpu_model >= 68060) + regs->t0 = 0; } else { regs->t0 = regs->m = 0; if (olds != regs->s) { @@ -407,7 +490,7 @@ void REGPARAM2 MakeFromSR (struct regstruct *regs) } } - set_special (regs, SPCFLAG_INT); + doint(); if (regs->t1 || regs->t0) set_special (regs, SPCFLAG_TRACE); else @@ -450,16 +533,16 @@ void REGPARAM2 Exception (int nr, struct regstruct *regs, uaecptr oldpc) if (!regs->s) { regs->usp = m68k_areg(regs, 7); - if (currprefs.cpu_level >= 2) + if (currprefs.cpu_model >= 68020) m68k_areg(regs, 7) = regs->m ? regs->msp : regs->isp; else m68k_areg(regs, 7) = regs->isp; regs->s = 1; } - if (currprefs.cpu_level > 0) { + if (currprefs.cpu_model > 68000) { if (nr == 2 || nr == 3) { int i; - if (currprefs.cpu_level >= 4) { /* 68040 */ + if (currprefs.cpu_model >= 68040) { if (nr == 2) { for (i = 0 ; i < 18 ; i++) { m68k_areg(regs, 7) -= 2; @@ -568,36 +651,43 @@ STATIC_INLINE void do_interrupt(int nr, struct regstruct *regs) Exception (nr + 24, regs, 0); regs->intmask = nr; - set_special (regs, SPCFLAG_INT); + doint(); } -void Interrupt (int nr) +void NMI(void) { - do_interrupt (nr, ®s); + do_interrupt (7, ®s); } -static uae_u32 caar, cacr, itt0, itt1, dtt0, dtt1, tc, mmusr, urp, srp, buscr, pcr; - -static int movec_illg (int regno) +int movec_illg (int regno) { int regno2 = regno & 0x7ff; - if (currprefs.cpu_level == 1) { /* 68010 */ + + if (currprefs.cpu_model == 68060) { + if (regno <= 8) + return 0; + if (regno == 0x800 || regno == 0x801 || + regno == 0x806 || regno == 0x807 || regno == 0x808) + return 0; + return 1; + } else if (currprefs.cpu_model == 68010) { if (regno2 < 2) return 0; return 1; - } - if (currprefs.cpu_level == 2 || currprefs.cpu_level == 3) { /* 68020 */ - if (regno == 3) return 1; /* 68040 only */ + } else if (currprefs.cpu_model == 68020) { + if (regno == 3) return 1; /* 68040/060 only */ /* 4 is >=68040, but 0x804 is in 68020 */ if (regno2 < 4 || regno == 0x804) return 0; return 1; - } - if (currprefs.cpu_level >= 4) { /* 68040 */ + } else if (currprefs.cpu_model == 68030) { + if (regno2 <= 2) return 0; + if (regno == 0x803 || regno == 0x804) + return 0; + return 1; + } else if (currprefs.cpu_model == 68040) { if (regno == 0x802) return 1; /* 68020 only */ if (regno2 < 8) return 0; - if (currprefs.cpu_level == 6 && regno2 == 8) /* 68060 only */ - return 0; return 1; } return 1; @@ -612,38 +702,55 @@ int m68k_move2c (int regno, uae_u32 *regp) switch (regno) { case 0: regs.sfc = *regp & 7; break; case 1: regs.dfc = *regp & 7; break; - case 2: - cacr = *regp & (currprefs.cpu_level < 4 ? 0x3 : (currprefs.cpu_level == 4 ? 0x80008000 : 0xf8800e00)); -#ifdef JIT - if (currprefs.cpu_level < 4) { - set_cache_state(cacr & 1); - if (*regp & 0x08) { - flush_icache(1); - } - } else { - set_cache_state((cacr & 0x8000) || 0); - if (*regp & 0x08) { /* Just to be on the safe side */ - flush_icache(2); - } - } -#endif + case 2: + { + uae_u32 cacr_mask = 0; + if (currprefs.cpu_model == 68020) + cacr_mask = 0x0000000f; + else if (currprefs.cpu_model == 68030) + cacr_mask = 0x00003f1f; + else if (currprefs.cpu_model == 68040) + cacr_mask = 0x80008000; + else if (currprefs.cpu_model == 68060) + cacr_mask = 0xf8e0e000; + regs.cacr = *regp & cacr_mask; + set_cpu_caches(); + } break; - case 3: tc = *regp & 0xc000; break; - /* Mask out fields that should be zero. */ - case 4: itt0 = *regp & 0xffffe364; break; - case 5: itt1 = *regp & 0xffffe364; break; - case 6: dtt0 = *regp & 0xffffe364; break; - case 7: dtt1 = *regp & 0xffffe364; break; - case 8: buscr = *regp & 0xf0000000; break; + /* 68040/060 only */ + case 3: regs.tcr = *regp & (currprefs.cpu_model == 68060 ? 0xfffe : 0xc000); + break; + + /* no differences between 68040 and 68060 */ + case 4: regs.itt0 = *regp & 0xffffe364; break; + case 5: regs.itt1 = *regp & 0xffffe364; break; + case 6: regs.dtt0 = *regp & 0xffffe364; break; + case 7: regs.dtt1 = *regp & 0xffffe364; break; + /* 68060 only */ + case 8: regs.buscr = *regp & 0xf0000000; break; case 0x800: regs.usp = *regp; break; case 0x801: regs.vbr = *regp; break; - case 0x802: caar = *regp & 0xfc; break; + case 0x802: regs.caar = *regp & 0xfc; break; case 0x803: regs.msp = *regp; if (regs.m == 1) m68k_areg(®s, 7) = regs.msp; break; case 0x804: regs.isp = *regp; if (regs.m == 0) m68k_areg(®s, 7) = regs.isp; break; - case 0x805: mmusr = *regp; break; - case 0x806: urp = *regp; break; - case 0x807: srp = *regp; break; - case 0x808: pcr = *regp & (0x40 | 2 | 1); break; + /* 68040 only */ + case 0x805: regs.mmusr = *regp; break; + /* 68040/060 */ + case 0x806: regs.urp = *regp; break; + case 0x807: regs.srp = *regp; break; + /* 68060 only */ + case 0x808: + { + uae_u32 opcr = regs.pcr; + regs.pcr &= ~(0x40 | 2 | 1); + regs.pcr |= (*regp) & (0x40 | 2 | 1); + if (((opcr ^ regs.pcr) & 2) == 2) { + write_log("68060 FPU state: %s\n", regs.pcr & 2 ? "disabled" : "enabled"); + /* flush possible already translated FPU instructions */ + flush_icache(2); + } + } + break; default: op_illg (0x4E7B, ®s); return 0; @@ -661,23 +768,37 @@ int m68k_movec2 (int regno, uae_u32 *regp) switch (regno) { case 0: *regp = regs.sfc; break; case 1: *regp = regs.dfc; break; - case 2: *regp = cacr; break; - case 3: *regp = tc; break; - case 4: *regp = itt0; break; - case 5: *regp = itt1; break; - case 6: *regp = dtt0; break; - case 7: *regp = dtt1; break; - case 8: *regp = buscr; break; + case 2: + { + uae_u32 v = regs.cacr; + uae_u32 cacr_mask = 0; + if (currprefs.cpu_model == 68020) + cacr_mask = 0x00000003; + else if (currprefs.cpu_model == 68030) + cacr_mask = 0x00003313; + else if (currprefs.cpu_model == 68040) + cacr_mask = 0x80008000; + else if (currprefs.cpu_model == 68060) + cacr_mask = 0xf880e000; + *regp = v & cacr_mask; + } + break; + case 3: *regp = regs.tcr; break; + case 4: *regp = regs.itt0; break; + case 5: *regp = regs.itt1; break; + case 6: *regp = regs.dtt0; break; + case 7: *regp = regs.dtt1; break; + case 8: *regp = regs.buscr; break; case 0x800: *regp = regs.usp; break; case 0x801: *regp = regs.vbr; break; - case 0x802: *regp = caar; break; + case 0x802: *regp = regs.caar; break; case 0x803: *regp = regs.m == 1 ? m68k_areg(®s, 7) : regs.msp; break; case 0x804: *regp = regs.m == 0 ? m68k_areg(®s, 7) : regs.isp; break; - case 0x805: *regp = mmusr; break; - case 0x806: *regp = urp; break; - case 0x807: *regp = srp; break; - case 0x808: *regp = 0x04300100 | pcr; break; + case 0x805: *regp = regs.mmusr; break; + case 0x806: *regp = regs.urp; break; + case 0x807: *regp = regs.srp; break; + case 0x808: *regp = regs.pcr; break; default: op_illg (0x4E7A, ®s); @@ -939,9 +1060,8 @@ void m68k_mull (uae_u32 opcode, uae_u32 src, uae_u16 extra) #endif } -void m68k_reset (void) +void m68k_reset (int hardreset) { - regs.kick_mask = 0x00F80000; regs.spcflags = 0; #ifdef SAVESTATE if (savestate_state == STATE_RESTORE /* || savestate_state == STATE_REWIND */) { @@ -957,8 +1077,8 @@ void m68k_reset (void) return; } #endif - m68k_areg (®s, 7) = get_long (0x00f80000); - m68k_setpc (®s, get_long (0x00f80004)); + m68k_areg (®s, 7) = get_long (0); + m68k_setpc (®s, get_long (4)); regs.s = 1; regs.m = 0; regs.stopped = 0; @@ -976,11 +1096,31 @@ void m68k_reset (void) regs.fp_result=1; regs.irc = 0xffff; #endif - fill_prefetch_slow (®s); + regs.caar = regs.cacr = 0; + regs.itt0 = regs.itt1 = regs.dtt0 = regs.dtt1 = 0; + regs.tcr = regs.mmusr = regs.urp = regs.srp = regs.buscr = 0; - // Cache - cacr = 0; - caar = 0; +// a3000_fakekick(0); + /* only (E)nable bit is zeroed when CPU is reset, A3000 SuperKickstart expects this */ + tc_030 &= ~0x80000000; + tt0_030 &= ~0x80000000; + tt1_030 &= ~0x80000000; + if (hardreset) { + srp_030 = crp_030 = 0; + tt0_030 = tt1_030 = tc_030 = 0; + } + mmusr_030 = 0; + + /* 68060 FPU is not compatible with 68040, + * 68060 accelerators' boot ROM disables the FPU + */ + regs.pcr = 0; + if (currprefs.cpu_model == 68060) { + regs.pcr = currprefs.fpu_model ? MC68060_PCR : MC68EC060_PCR; + //regs.pcr |= (currprefs.cpu060_revision & 0xff) << 8; + regs.pcr |= 2; + } + fill_prefetch_slow (®s); } STATIC_INLINE int in_rom (uaecptr pc) @@ -990,7 +1130,7 @@ STATIC_INLINE int in_rom (uaecptr pc) STATIC_INLINE int in_rtarea (uaecptr pc) { - return (munge24 (pc) & 0xFFFF0000) == RTAREA_BASE; + return (munge24 (pc) & 0xFFFF0000) == rtarea_base && uae_boot_rom; } unsigned long REGPARAM2 op_illg (uae_u32 opcode, struct regstruct *regs) @@ -1041,12 +1181,6 @@ unsigned long REGPARAM2 op_illg (uae_u32 opcode, struct regstruct *regs) return 4; } if ((opcode & 0xF000) == 0xA000) { -#ifdef AUTOCONFIG - if (inrt) { - /* Calltrap. */ - m68k_handle_trap (opcode & 0xFFF, regs); - } -#endif Exception(0xA, regs, 0); return 4; } @@ -1056,14 +1190,139 @@ unsigned long REGPARAM2 op_illg (uae_u32 opcode, struct regstruct *regs) #ifdef CPUEMU_0 -void mmu_op(uae_u32 opcode, struct regstruct *regs, uae_u16 extra) +static char *mmu30regs[] = { "TCR", "", "SRP", "CRP", "", "", "", "" }; + +static void mmu_op30_pmove(uaecptr pc, uae_u32 opcode, uae_u16 next, uaecptr extra) +{ + int preg = (next >> 10) & 31; + int rw = (next >> 9) & 1; + int fd = (next >> 8) & 1; + char *reg = NULL; + uae_u32 otc = tc_030; + int siz; + + switch (preg) + { + case 0x10: // TC + reg = "TC"; + siz = 4; + if (rw) + put_long(extra, tc_030); + else + tc_030 = get_long(extra); + break; + case 0x12: // SRP + reg = "SRP"; + siz = 8; + if (rw) { + put_long(extra, srp_030 >> 32); + put_long(extra + 4, srp_030); + } else { + srp_030 = (uae_u64)get_long(extra) << 32; + srp_030 |= get_long(extra + 4); + } + break; + case 0x13: // CRP + reg = "CRP"; + siz = 8; + if (rw) { + put_long(extra, crp_030 >> 32); + put_long(extra + 4, crp_030); + } else { + crp_030 = (uae_u64)get_long(extra) << 32; + crp_030 |= get_long(extra + 4); + } + break; + case 0x18: // MMUSR + reg = "MMUSR"; + siz = 2; + if (rw) + put_word(extra, mmusr_030); + else + mmusr_030 = get_word(extra); + break; + case 0x02: // TT0 + reg = "TT0"; + siz = 4; + if (rw) + put_long(extra, tt0_030); + else + tt0_030 = get_long(extra); + break; + case 0x03: // TT1 + reg = "TT1"; + siz = 4; + if (rw) + put_long(extra, tt1_030); + else + tt1_030 = get_long(extra); + break; + } + + if (!reg) { + op_illg(opcode, ®s); + return; + } +// if (currprefs.cs_mbdmac == 1 && currprefs.mbresmem_low_size > 0) { +// if (otc != tc_030) { +// a3000_fakekick(tc_030 & 0x80000000); +// } +// } +} + +static void mmu_op30_ptest(uaecptr pc, uae_u32 opcode, uae_u16 next, uaecptr extra) +{ + mmusr_030 = 0; +} + +static void mmu_op30_pflush(uaecptr pc, uae_u32 opcode, uae_u16 next, uaecptr extra) +{ +} + +void mmu_op30(uaecptr pc, uae_u32 opcode, struct regstruct *regs, int isnext, uaecptr extra) +{ + if (currprefs.cpu_model != 68030) { + m68k_setpc (regs, pc); + op_illg (opcode, regs); + return; + } + if (isnext) { + uae_u16 next = get_word(pc + 2); + if (next & 0x8000) + mmu_op30_ptest(pc, opcode, next, extra); + else if (next & 0x2000) + mmu_op30_pflush (pc, opcode, next, extra); + else + mmu_op30_pmove(pc, opcode, next, extra); + m68k_setpc (regs, m68k_getpc (regs) + 2); + } else { + } + return; +} + +void mmu_op(uae_u32 opcode, struct regstruct *regs, uae_u32 extra) { if ((opcode & 0xFE0) == 0x0500) { /* PFLUSH */ - mmusr = 0; + regs->mmusr = 0; + return; } else if ((opcode & 0x0FD8) == 0x548) { + if (currprefs.cpu_model < 68060) { /* PTEST not in 68060 */ /* PTEST */ - } else + return; + } + } else if ((opcode & 0x0FB8) == 0x588) { + /* PLPA */ + if (currprefs.cpu_model == 68060) { + return; + } + } else if (opcode == 0xff00 && extra == 0x01c0) { + /* LPSTOP */ + if (currprefs.cpu_model == 68060) { + return; + } + } + m68k_setpc (regs, m68k_getpc (regs) - 2); op_illg (opcode, regs); } @@ -1073,7 +1332,7 @@ static uaecptr last_trace_ad = 0; static void do_trace (void) { - if (regs.t0 && currprefs.cpu_level >= 2) { + if (regs.t0 && currprefs.cpu_model >= 68020) { uae_u16 opcode; /* should also include TRAP, CHK, SR modification FPcc */ /* probably never used so why bother */ @@ -1106,7 +1365,7 @@ static void do_trace (void) } } -#define IDLETIME (currprefs.cpu_idle * sleep_resolution / 1000) +#define IDLETIME (currprefs.cpu_idle * sleep_resolution / 700) STATIC_INLINE int do_specialties (int cycles, struct regstruct *regs) { @@ -1144,12 +1403,9 @@ STATIC_INLINE int do_specialties (int cycles, struct regstruct *regs) do_copper (); if (regs->spcflags & (SPCFLAG_INT | SPCFLAG_DOINT)) { int intr = intlev (); -#ifdef JIT - if (currprefs.cachesize) - unset_special (regs, SPCFLAG_INT | SPCFLAG_DOINT); -#endif + unset_special (regs, SPCFLAG_INT | SPCFLAG_DOINT); if (intr != -1 && intr > regs->intmask) - Interrupt (intr); + do_interrupt (intr, regs); } if ((regs->spcflags & (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE))) { unset_special (regs, SPCFLAG_BRK | SPCFLAG_MODE_CHANGE); @@ -1181,30 +1437,16 @@ STATIC_INLINE int do_specialties (int cycles, struct regstruct *regs) if (regs->spcflags & SPCFLAG_TRACE) do_trace (); - /* interrupt takes at least 2 cycles (maybe 4) to reach the CPU and - * there are programs that require this delay (which is not too surprising..) - */ -#ifdef JIT - if ((regs->spcflags & SPCFLAG_DOINT) - || (!currprefs.cachesize && (regs->spcflags & SPCFLAG_INT))) { -#else if (regs->spcflags & SPCFLAG_INT) { -#endif int intr = intlev (); -#ifdef JIT - if (currprefs.cachesize) - unset_special (regs, SPCFLAG_DOINT); -#endif - if (intr != -1 && intr > regs->intmask) + unset_special (regs, SPCFLAG_INT | SPCFLAG_DOINT); + if (intr != -1 && (intr > regs->intmask || intr == 7)) do_interrupt (intr, regs); } - -#ifdef JIT - if ((regs->spcflags & SPCFLAG_INT) && currprefs.cachesize) { - unset_special (regs, SPCFLAG_INT); - set_special (regs, SPCFLAG_DOINT); + if (regs->spcflags & SPCFLAG_DOINT) { + unset_special (regs, SPCFLAG_DOINT); + set_special (regs, SPCFLAG_INT); } -#endif if ((regs->spcflags & (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE))) { unset_special (regs, SPCFLAG_BRK | SPCFLAG_MODE_CHANGE); @@ -1213,7 +1455,15 @@ STATIC_INLINE int do_specialties (int cycles, struct regstruct *regs) return 0; } -static uae_u32 pcs[1000]; +void doint (void) +{ + if (currprefs.cpu_compatible) + set_special (®s, SPCFLAG_INT); + else + set_special (®s, SPCFLAG_DOINT); +} +//static uae_u32 pcs[1000]; + /* It's really sad to have two almost identical functions for this, but we do it all for performance... :( @@ -1223,19 +1473,17 @@ static void m68k_run_1 (void) struct regstruct *r = ®s; for (;;) { - int cycles; uae_u32 opcode = r->ir; - cycles = (*cpufunctbl[opcode])(opcode, r); - - cycles &= cycles_mask; - cycles |= cycles_val; - do_cycles (cycles); + do_cycles (cpu_cycles); + cpu_cycles = (*cpufunctbl[opcode])(opcode, r); + cpu_cycles &= cycles_mask; + cpu_cycles |= cycles_val; if (r->spcflags) { - if (do_specialties (cycles, r)) + if (do_specialties (cpu_cycles, r)) return; } - if (!currprefs.cpu_compatible || (currprefs.cpu_level == 0)) + if (!currprefs.cpu_compatible || (currprefs.cpu_model == 68000)) return; } } @@ -1252,19 +1500,21 @@ void do_nothing(void) void exec_nostats(void) { struct regstruct *r = ®s; - int new_cycles; for (;;) { +#ifdef DEBUG_M68K + m68k_dumpstate(); +#endif uae_u16 opcode = get_iword(r, 0); - new_cycles = (*cpufunctbl[opcode])(opcode, r); + cpu_cycles = (*cpufunctbl[opcode])(opcode, r); + cpu_cycles &= cycles_mask; + cpu_cycles |= cycles_val; - new_cycles &= cycles_mask; - new_cycles |= cycles_val; - do_cycles (new_cycles); + do_cycles (cpu_cycles); - if (end_block(opcode) || r->spcflags) + if (end_block(opcode) || r->spcflags || uae_int_requested) return; /* We will deal with the spcflags in the caller */ } } @@ -1276,7 +1526,6 @@ void execute_normal(void) struct regstruct *r = ®s; int blocklen; cpu_history pc_hist[MAXRUN]; - int new_cycles; int total_cycles; if (check_for_cache_miss()) @@ -1287,21 +1536,28 @@ void execute_normal(void) start_pc_p = r->pc_oldp; start_pc = r->pc; for (;;) { +#ifdef DEBUG_M68K + m68k_dumpstate(); +#endif /* Take note: This is the do-it-normal loop */ uae_u16 opcode = get_iword (r, 0); special_mem = DISTRUST_CONSISTENT_MEM; pc_hist[blocklen].location = (uae_u16*)r->pc_p; - new_cycles = (*cpufunctbl[opcode])(opcode, r); + cpu_cycles = (*cpufunctbl[opcode])(opcode, r); - new_cycles &= cycles_mask; - new_cycles |= cycles_val; - do_cycles (new_cycles); - total_cycles += new_cycles; + cpu_cycles &= cycles_mask; + cpu_cycles |= cycles_val; + do_cycles (cpu_cycles); + total_cycles += cpu_cycles; pc_hist[blocklen].specmem = special_mem; blocklen++; - if (end_block(opcode) || blocklen >= MAXRUN || r->spcflags) { +#ifdef DEBUG_M68K + if (end_block(opcode) || blocklen >= 1 || r->spcflags || uae_int_requested) { +#else + if (end_block(opcode) || blocklen >= MAXRUN || r->spcflags || uae_int_requested) { +#endif compile_block(pc_hist,blocklen,total_cycles); return; /* We will deal with the spcflags in the caller */ } @@ -1315,8 +1571,16 @@ typedef void compiled_handler(void); static void m68k_run_2a (void) { for (;;) { +#ifdef DEBUG_M68K + m68k_dumpstate(); +#endif ((compiled_handler*)(pushall_call_handler))(); /* Whenever we return from that, we should check spcflags */ + if (uae_int_requested) { + intreq |= 0x0008; + intreqr = intreq; + set_special (®s, SPCFLAG_INT); + } if (regs.spcflags) { if (do_specialties (0, ®s)) { return; @@ -1333,26 +1597,27 @@ static void m68k_run_2p (void) struct regstruct *r = ®s; prefetch_pc = m68k_getpc (r); - prefetch = get_long (prefetch_pc); + prefetch = get_longi (prefetch_pc); for (;;) { - int cycles; uae_u32 opcode; uae_u32 pc = m68k_getpc (r); + + do_cycles (cpu_cycles); + if (pc == prefetch_pc) opcode = prefetch >> 16; else if (pc == prefetch_pc + 2) opcode = prefetch & 0xffff; else - opcode = get_word (pc); + opcode = get_wordi (pc); prefetch_pc = m68k_getpc (r) + 2; - prefetch = get_long (prefetch_pc); - cycles = (*cpufunctbl[opcode])(opcode, r); - cycles &= cycles_mask; - cycles |= cycles_val; - do_cycles (cycles); + prefetch = get_longi (prefetch_pc); + cpu_cycles = (*cpufunctbl[opcode])(opcode, r); + cpu_cycles &= cycles_mask; + cpu_cycles |= cycles_val; if (r->spcflags) { - if (do_specialties (cycles, r)) + if (do_specialties (cpu_cycles, r)) return; } } @@ -1364,16 +1629,17 @@ static void m68k_run_2 (void) struct regstruct *r = ®s; for (;;) { - int cycles; uae_u32 opcode = get_iword (r, 0); - cycles = (*cpufunctbl[opcode])(opcode, r); - - cycles &= cycles_mask; - cycles |= cycles_val; - do_cycles (cycles); + do_cycles (cpu_cycles); +#ifdef DEBUG_M68K + m68k_dumpstate(); +#endif + cpu_cycles = (*cpufunctbl[opcode])(opcode, r); + cpu_cycles &= cycles_mask; + cpu_cycles |= cycles_val; if (r->spcflags) { - if (do_specialties (cycles, r)) + if (do_specialties (cpu_cycles, r)) return; } } @@ -1383,14 +1649,13 @@ static void m68k_run_2 (void) static void m68k_run_mmu (void) { for (;;) { - int cycles; uae_u32 opcode = get_iword (®s, 0); - cycles = (*cpufunctbl[opcode])(opcode, ®s); - cycles &= cycles_mask; - cycles |= cycles_val; - do_cycles (cycles); + do_cycles (cpu_cycles); + cpu_cycles = (*cpufunctbl[opcode])(opcode, ®s); + cpu_cycles &= cycles_mask; + cpu_cycles |= cycles_val; if (regs.spcflags) { - if (do_specialties (cycles, ®s)) + if (do_specialties (cpu_cycles, ®s)) return; } } @@ -1409,6 +1674,8 @@ static void exception2_handle (uaecptr addr, uaecptr fault) void m68k_go (int may_quit) { + int hardboot = 1; + if (in_m68k_go || !may_quit) { write_log ("Bug! m68k_go is not reentrant.\n"); abort (); @@ -1421,10 +1688,11 @@ void m68k_go (int may_quit) for (;;) { void (*run_func)(void); if (quit_program > 0) { - int hardreset = quit_program == 3 ? 1 : 0; + int hardreset = (quit_program == 3 ? 1 : 0) | hardboot; if (quit_program == 1) break; quit_program = 0; + hardboot = 0; #ifdef SAVESTATE if (savestate_state == STATE_RESTORE) restore_state (savestate_fname); @@ -1432,12 +1700,8 @@ void m68k_go (int may_quit) // savestate_rewind (); #endif check_prefs_changed_adr24(); - /* following three lines must not be reordered or - * fastram state restore breaks - */ - reset_all_systems (); - customreset (); - m68k_reset (); + customreset (hardreset); + m68k_reset (hardreset); if (hardreset) { memory_hardreset(); write_log ("hardreset, memory cleared\n"); @@ -1475,17 +1739,19 @@ void m68k_go (int may_quit) } } +#if 0 /* what was the meaning of this? this breaks trace emulation if debugger is used */ if (regs.spcflags) { uae_u32 of = regs.spcflags; regs.spcflags &= ~(SPCFLAG_BRK | SPCFLAG_MODE_CHANGE); do_specialties (0, ®s); regs.spcflags |= of & (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE); } +#endif if (mmu_enabled && !currprefs.cachesize) { run_func = m68k_run_mmu; } else { - run_func = currprefs.cpu_compatible > 0 && currprefs.cpu_level == 0 ? m68k_run_1 : - currprefs.cpu_level >= 2 && currprefs.cachesize ? m68k_run_2a : + run_func = currprefs.cpu_compatible > 0 && currprefs.cpu_model == 68000 ? m68k_run_1 : + currprefs.cpu_model >= 68020 && currprefs.cachesize ? m68k_run_2a : currprefs.cpu_compatible ? m68k_run_2p : m68k_run_2; } run_func (); @@ -1502,38 +1768,16 @@ void m68k_go (int may_quit) uae_u8 *restore_cpu (uae_u8 *src) { - int i,model,flags; + int i, flags, model; uae_u32 l; - model = restore_u32(); - switch (model) { - case 68000: - changed_prefs.cpu_level = 0; - break; - case 68010: - changed_prefs.cpu_level = 1; - break; - case 68020: - changed_prefs.cpu_level = 2; - break; - case 68040: - changed_prefs.cpu_level = 4; - break; - case 68060: - changed_prefs.cpu_level = 6; - break; - default: - write_log ("Unknown cpu type %d\n", model); - break; - } - + changed_prefs.cpu_model = model = restore_u32(); flags = restore_u32(); changed_prefs.address_space_24 = 0; if (flags & CPUTYPE_EC) changed_prefs.address_space_24 = 1; if (model > 68000) changed_prefs.cpu_compatible = 0; - currprefs.cpu_level = changed_prefs.cpu_level; currprefs.address_space_24 = changed_prefs.address_space_24; currprefs.cpu_compatible = changed_prefs.cpu_compatible; for (i = 0; i < 15; i++) @@ -1556,13 +1800,40 @@ uae_u8 *restore_cpu (uae_u8 *src) regs.vbr = restore_u32 (); } if (model >= 68020) { - caar = restore_u32 (); - cacr = restore_u32 (); + regs.caar = restore_u32 (); + regs.cacr = restore_u32 (); regs.msp = restore_u32 (); /* A500 speed in 68020 mode isn't too logical.. */ if (changed_prefs.m68k_speed == 0) currprefs.m68k_speed = changed_prefs.m68k_speed = -1; } + if (model >= 68030) { + crp_030 = restore_u64(); + srp_030 = restore_u64(); + tt0_030 =restore_u32(); + tt1_030 = restore_u32(); + tc_030 = restore_u32(); + mmusr_030 = restore_u16(); + } + if (model >= 68040) { + regs.itt0 = restore_u32(); + regs.itt1 = restore_u32(); + regs.dtt0 = restore_u32(); + regs.dtt1 = restore_u32(); + regs.tcr = restore_u32(); + regs.urp = restore_u32(); + regs.srp = restore_u32(); + } + if (model >= 68060) { + regs.buscr = restore_u32(); + regs.pcr = restore_u32(); + } + if (flags & 0x80000000) { + int khz = restore_u32(); + restore_u32(); + if (khz > 0 && khz < 800000) + currprefs.m68k_speed = changed_prefs.m68k_speed = 0; + } write_log ("CPU %d%s%03d, PC=%08.8X\n", model / 1000, flags & 1 ? "EC" : "", model % 1000, regs.pc); @@ -1573,23 +1844,23 @@ void restore_cpu_finish(void) { init_m68k (); m68k_setpc (®s, regs.pc); + set_cpu_caches(); } -static int cpumodel[] = { 68000, 68010, 68020, 68020, 68040, 68060 }; - uae_u8 *save_cpu (int *len, uae_u8 *dstptr) { uae_u8 *dstbak,*dst; - int model,i; + int model, i, khz; if (dstptr) dstbak = dst = dstptr; else - dstbak = dst = (uae_u8*)malloc(4+4+15*4+4+4+4+4+2+4+4+4+4+4+4+4); - model = cpumodel[currprefs.cpu_level]; + dstbak = dst = (uae_u8*)malloc(1000); + model = currprefs.cpu_model; save_u32 (model); /* MODEL */ - save_u32 (currprefs.address_space_24 ? 1 : 0); /* FLAGS */ - for(i = 0;i < 15; i++) save_u32 (regs.regs[i]); /* D0-D7 A0-A6 */ + save_u32 (0x80000000 | (currprefs.address_space_24 ? 1 : 0)); /* FLAGS */ + for(i = 0;i < 15; i++) + save_u32 (regs.regs[i]); /* D0-D7 A0-A6 */ save_u32 (m68k_getpc (®s)); /* PC */ save_u16 (regs.irc); /* prefetch */ save_u16 (regs.ir); /* instruction prefetch */ @@ -1604,10 +1875,39 @@ uae_u8 *save_cpu (int *len, uae_u8 *dstptr) save_u32 (regs.vbr); /* VBR */ } if(model >= 68020) { - save_u32 (caar); /* CAAR */ - save_u32 (cacr); /* CACR */ + save_u32 (regs.caar); /* CAAR */ + save_u32 (regs.cacr); /* CACR */ save_u32 (regs.msp); /* MSP */ } + if(model >= 68030) { + save_u64 (crp_030); /* CRP */ + save_u64 (srp_030); /* SRP */ + save_u32 (tt0_030); /* TT0/AC0 */ + save_u32 (tt1_030); /* TT1/AC1 */ + save_u32 (tc_030); /* TCR */ + save_u16 (mmusr_030); /* MMUSR/ACUSR */ + } + if(model >= 68040) { + save_u32 (regs.itt0); /* ITT0 */ + save_u32 (regs.itt1); /* ITT1 */ + save_u32 (regs.dtt0); /* DTT0 */ + save_u32 (regs.dtt1); /* DTT1 */ + save_u32 (regs.tcr); /* TCR */ + save_u32 (regs.urp); /* URP */ + save_u32 (regs.srp); /* SRP */ + } + if(model >= 68060) { + save_u32 (regs.buscr); /* BUSCR */ + save_u32 (regs.pcr); /* PCR */ + } + khz = -1; + if (currprefs.m68k_speed == 0) { + khz = currprefs.ntscmode ? 715909 : 709379; + if (currprefs.cpu_model >= 68020) + khz *= 2; + } + save_u32 (khz); // clock rate in KHz: -1 = fastest possible + save_u32 (0); // spare *len = dst - dstbak; return dstbak; } @@ -1650,24 +1950,42 @@ void exception2 (uaecptr addr, uaecptr fault) void cpureset (void) { - customreset (); -#if 0 + uaecptr pc; + uaecptr ksboot = 0xf80002 - 2; /* -2 = RESET hasn't increased PC yet */ uae_u16 ins; - if (currprefs.cpu_level == 0 && (currprefs.cpu_compatible || currprefs.cpu_cycle_exact)) { - customreset (); + + if (currprefs.cpu_compatible /*|| currprefs.cpu_cycle_exact*/) { + customreset (0); return; } - ins = get_word (m68k_getpc(®s) + 2); + pc = m68k_getpc(®s); + if (pc >= currprefs.chipmem_size) { + addrbank *b = &get_mem_bank(pc); + if (b->check(pc, 2 + 2)) { + /* We have memory, hope for the best.. */ + customreset (0); + return; + } + write_log("M68K RESET PC=%x, rebooting..\n", pc); + customreset (0); + m68k_setpc (®s, ksboot); + return; + } + /* panic, RAM is going to disappear under PC */ + ins = get_word (pc + 2); if ((ins & ~7) == 0x4ed0) { int reg = ins & 7; uae_u32 addr = m68k_areg (®s, reg); - write_log ("reset/jmp (ax) combination emulated\n"); - customreset (); + write_log ("reset/jmp (ax) combination emulated -> %x\n", addr); + customreset (0); if (addr < 0x80000) addr += 0xf80000; - m68k_setpc (®s, addr); + m68k_setpc (®s, addr - 2); + return; } -#endif + write_log("M68K RESET PC=%x, rebooting..\n", pc); + customreset (0); + m68k_setpc (®s, ksboot); } @@ -1728,8 +2046,7 @@ STATIC_INLINE int getDivu68kCycles_2(uae_u32 dividend, uae_u16 divisor) mcycles = 38; hdivisor = divisor << 16; - for( i = 0; i < 15; i++) - { + for( i = 0; i < 15; i++) { uae_u32 temp; temp = dividend; @@ -1737,14 +2054,10 @@ STATIC_INLINE int getDivu68kCycles_2(uae_u32 dividend, uae_u16 divisor) // If carry from shift if((uae_s32)temp < 0) - { dividend -= hdivisor; - } - else - { + else { mcycles += 2; - if(dividend >= hdivisor) - { + if(dividend >= hdivisor) { dividend -= hdivisor; mcycles--; } @@ -1780,17 +2093,14 @@ STATIC_INLINE int getDivs68kCycles_2(uae_s32 dividend, uae_s16 divisor) // Check for absolute overflow if(((uae_u32)abs(dividend) >> 16) >= (uae_u16)abs(divisor)) - { return (mcycles + 2) * 2; - } // Absolute quotient aquot = (uae_u32) abs(dividend) / (uae_u16)abs(divisor); mcycles += 55; - if(divisor >= 0) - { + if(divisor >= 0) { if(dividend >= 0) mcycles--; else @@ -1799,8 +2109,7 @@ STATIC_INLINE int getDivs68kCycles_2(uae_s32 dividend, uae_s16 divisor) // Count 15 msbits in absolute of quotient - for( i = 0; i < 15; i++) - { + for( i = 0; i < 15; i++) { if((uae_s16)aquot >= 0) mcycles++; aquot <<= 1; diff --git a/src/od-pandora/gui/EditFilesysHardfile.cpp b/src/od-pandora/gui/EditFilesysHardfile.cpp index 8f51fafc..e9959c36 100644 --- a/src/od-pandora/gui/EditFilesysHardfile.cpp +++ b/src/od-pandora/gui/EditFilesysHardfile.cpp @@ -20,13 +20,14 @@ #include "gui_handling.h" -#define DIALOG_WIDTH 520 +#define DIALOG_WIDTH 620 #define DIALOG_HEIGHT 242 static const char *harddisk_filter[] = { ".hdf", "\0" }; static bool dialogResult = false; static bool dialogFinished = false; +static bool fileSelected = false; static gcn::Window *wndEditFilesysHardfile; static gcn::Button* cmdOK; @@ -60,7 +61,10 @@ class FilesysHardfileActionListener : public gcn::ActionListener strncpy(tmp, txtPath->getText().c_str(), MAX_PATH); wndEditFilesysHardfile->releaseModalFocus(); if(SelectFile("Select harddisk file", tmp, harddisk_filter)) + { txtPath->setText(tmp); + fileSelected = true; + } wndEditFilesysHardfile->requestModalFocus(); cmdPath->requestFocus(); } @@ -68,7 +72,7 @@ class FilesysHardfileActionListener : public gcn::ActionListener { if (actionEvent.getSource() == cmdOK) { - if(txtDevice->getText().length() <= 0) + if(txtDevice->getText().length() <= 0 || !fileSelected) { // ToDo: Message to user return; @@ -118,35 +122,35 @@ static void InitEditFilesysHardfile(void) chkReadWrite->setId("hdfRW"); lblBootPri = new gcn::Label("Boot priority:"); - lblBootPri->setSize(84, LABEL_HEIGHT); + lblBootPri->setSize(100, LABEL_HEIGHT); lblBootPri->setAlignment(gcn::Graphics::RIGHT); txtBootPri = new gcn::TextField(); txtBootPri->setSize(40, TEXTFIELD_HEIGHT); txtBootPri->setId("hdfBootPri"); lblSurfaces = new gcn::Label("Surfaces:"); - lblSurfaces->setSize(84, LABEL_HEIGHT); + lblSurfaces->setSize(100, LABEL_HEIGHT); lblSurfaces->setAlignment(gcn::Graphics::RIGHT); txtSurfaces = new gcn::TextField(); txtSurfaces->setSize(40, TEXTFIELD_HEIGHT); txtSurfaces->setId("hdfSurface"); lblReserved = new gcn::Label("Reserved:"); - lblReserved->setSize(84, LABEL_HEIGHT); + lblReserved->setSize(100, LABEL_HEIGHT); lblReserved->setAlignment(gcn::Graphics::RIGHT); txtReserved = new gcn::TextField(); txtReserved->setSize(40, TEXTFIELD_HEIGHT); txtReserved->setId("hdfReserved"); lblSectors = new gcn::Label("Sectors:"); - lblSectors->setSize(84, LABEL_HEIGHT); + lblSectors->setSize(100, LABEL_HEIGHT); lblSectors->setAlignment(gcn::Graphics::RIGHT); txtSectors = new gcn::TextField(); txtSectors->setSize(40, TEXTFIELD_HEIGHT); txtSectors->setId("hdfSectors"); lblBlocksize = new gcn::Label("Blocksize:"); - lblBlocksize->setSize(84, LABEL_HEIGHT); + lblBlocksize->setSize(100, LABEL_HEIGHT); lblBlocksize->setAlignment(gcn::Graphics::RIGHT); txtBlocksize = new gcn::TextField(); txtBlocksize->setSize(40, TEXTFIELD_HEIGHT); @@ -156,7 +160,7 @@ static void InitEditFilesysHardfile(void) lblPath->setSize(100, LABEL_HEIGHT); lblPath->setAlignment(gcn::Graphics::RIGHT); txtPath = new gcn::TextField(); - txtPath->setSize(338, TEXTFIELD_HEIGHT); + txtPath->setSize(438, TEXTFIELD_HEIGHT); txtPath->setEnabled(false); cmdPath = new gcn::Button("..."); cmdPath->setSize(SMALL_BUTTON_WIDTH, SMALL_BUTTON_HEIGHT); @@ -288,11 +292,10 @@ static void EditFilesysHardfileLoop(void) bool EditFilesysHardfile(int unit_no) { - char *volname, *devname, *rootdir, *filesys; - int secspertrack, surfaces, cylinders, reserved, blocksize, readonly, bootpri; - uae_u64 size; - const char *failure; - + struct mountedinfo mi; + struct uaedev_config_info *uci = &changed_prefs.mountconfig[unit_no]; + std::string strdevname, strroot; + dialogResult = false; dialogFinished = false; @@ -302,28 +305,32 @@ bool EditFilesysHardfile(int unit_no) { char tmp[32]; - failure = get_filesys_unit(currprefs.mountinfo, unit_no, - &devname, &volname, &rootdir, &readonly, &secspertrack, &surfaces, &reserved, - &cylinders, &size, &blocksize, &bootpri, &filesys, 0); + get_filesys_unitconfig(&changed_prefs, unit_no, &mi); + strdevname.assign(uci->devname); + txtDevice->setText(strdevname); + strroot.assign(uci->rootdir); + txtPath->setText(strroot); + fileSelected = true; - txtDevice->setText(devname); - txtPath->setText(rootdir); - chkReadWrite->setSelected(!readonly); - snprintf(tmp, 32, "%d", bootpri); + chkReadWrite->setSelected(!uci->readonly); + snprintf(tmp, 32, "%d", uci->bootpri >= -127 ? uci->bootpri : -127); txtBootPri->setText(tmp); - snprintf(tmp, 32, "%d", surfaces); + snprintf(tmp, 32, "%d", uci->surfaces); txtSurfaces->setText(tmp); - snprintf(tmp, 32, "%d", reserved); + snprintf(tmp, 32, "%d", uci->reserved); txtReserved->setText(tmp); - snprintf(tmp, 32, "%d", secspertrack); + snprintf(tmp, 32, "%d", uci->sectors); txtSectors->setText(tmp); - snprintf(tmp, 32, "%d", blocksize); + snprintf(tmp, 32, "%d", uci->blocksize); txtBlocksize->setText(tmp); } else { txtDevice->setText(""); - txtPath->setText(currentDir); + strroot.assign(currentDir); + txtPath->setText(strroot); + fileSelected = false; + chkReadWrite->setSelected(true); txtBootPri->setText("0"); txtSurfaces->setText("1"); @@ -336,14 +343,17 @@ bool EditFilesysHardfile(int unit_no) if(dialogResult) { if(unit_no >= 0) - kill_filesys_unit(currprefs.mountinfo, unit_no); + kill_filesys_unitconfig(&changed_prefs, unit_no); else extractPath((char *) txtPath->getText().c_str(), currentDir); - failure = add_filesys_unit(currprefs.mountinfo, (char *) txtDevice->getText().c_str(), + + uci = add_filesys_config(&changed_prefs, -1, (char *) txtDevice->getText().c_str(), 0, (char *) txtPath->getText().c_str(), !chkReadWrite->isSelected(), atoi(txtSectors->getText().c_str()), atoi(txtSurfaces->getText().c_str()), atoi(txtReserved->getText().c_str()), atoi(txtBlocksize->getText().c_str()), - atoi(txtBootPri->getText().c_str()), 0, 0); + atoi(txtBootPri->getText().c_str()), 0, 0, 0); + if (uci) + hardfile_do_disk_change (uci->configoffset, 1); } return dialogResult; } diff --git a/src/od-pandora/gui/EditFilesysVirtual.cpp b/src/od-pandora/gui/EditFilesysVirtual.cpp index 3fb5225c..cabf4382 100644 --- a/src/od-pandora/gui/EditFilesysVirtual.cpp +++ b/src/od-pandora/gui/EditFilesysVirtual.cpp @@ -251,10 +251,9 @@ static void EditFilesysVirtualLoop(void) bool EditFilesysVirtual(int unit_no) { - char *volname, *devname, *rootdir, *filesys; - int secspertrack, surfaces, cylinders, reserved, blocksize, readonly, bootpri; - uae_u64 size; - const char *failure; + struct mountedinfo mi; + struct uaedev_config_info *uci = &changed_prefs.mountconfig[unit_no]; + std::string strdevname, strvolname, strroot; dialogResult = false; dialogFinished = false; @@ -265,22 +264,24 @@ bool EditFilesysVirtual(int unit_no) { char tmp[32]; - failure = get_filesys_unit(currprefs.mountinfo, unit_no, - &devname, &volname, &rootdir, &readonly, &secspertrack, &surfaces, &reserved, - &cylinders, &size, &blocksize, &bootpri, &filesys, 0); + get_filesys_unitconfig(&changed_prefs, unit_no, &mi); - txtDevice->setText(devname); - txtVolume->setText(volname); - txtPath->setText(rootdir); - chkReadWrite->setSelected(!readonly); - snprintf(tmp, 32, "%d", bootpri); + strdevname.assign(uci->devname); + txtDevice->setText(strdevname); + strvolname.assign(uci->volname); + txtVolume->setText(strvolname); + strroot.assign(uci->rootdir); + txtPath->setText(strroot); + chkReadWrite->setSelected(!uci->readonly); + snprintf(tmp, 32, "%d", uci->bootpri >= -127 ? uci->bootpri : -127); txtBootPri->setText(tmp); } else { txtDevice->setText(""); txtVolume->setText(""); - txtPath->setText(currentDir); + strroot.assign(currentDir); + txtPath->setText(strroot); chkReadWrite->setSelected(true); txtBootPri->setText("0"); } @@ -291,12 +292,15 @@ bool EditFilesysVirtual(int unit_no) if(dialogResult) { if(unit_no >= 0) - kill_filesys_unit(currprefs.mountinfo, unit_no); + kill_filesys_unitconfig(&changed_prefs, unit_no); else extractPath((char *) txtPath->getText().c_str(), currentDir); - failure = add_filesys_unit(currprefs.mountinfo, (char *) txtDevice->getText().c_str(), + + uci = add_filesys_config(&changed_prefs, -1, (char *) txtDevice->getText().c_str(), (char *) txtVolume->getText().c_str(), (char *) txtPath->getText().c_str(), - !chkReadWrite->isSelected(), 0, 0, 0, 0, atoi(txtBootPri->getText().c_str()), 0, 0); + !chkReadWrite->isSelected(), 0, 0, 0, 0, atoi(txtBootPri->getText().c_str()), 0, 0, 0); + if (uci) + filesys_media_change (uci->rootdir, 1, uci); } return dialogResult; diff --git a/src/od-pandora/gui/Navigation.cpp b/src/od-pandora/gui/Navigation.cpp index c1af2aec..f6bd0d10 100644 --- a/src/od-pandora/gui/Navigation.cpp +++ b/src/od-pandora/gui/Navigation.cpp @@ -59,17 +59,21 @@ static NavigationMap navMap[] = // active move left move right move up move down // PanelCPU - { "68000", "CPU", "7 Mhz", "JIT", "68010" }, - { "68010", "CPU", "14 Mhz", "68000", "68EC020" }, - { "68EC020", "CPU", "28 Mhz", "68010", "68020" }, - { "68020", "CPU", "Fastest", "68EC020", "68040" }, - { "68040", "CPU", "Fastest", "68020", "CPUComp" }, - { "CPUComp", "CPU", "Fastest", "68040", "JIT" }, - { "JIT", "CPU", "Fastest", "CPUComp", "68000" }, - { "7 Mhz", "68000", "CPU", "Fastest", "14 Mhz" }, - { "14 Mhz", "68010", "CPU", "7 Mhz", "28 Mhz" }, - { "28 Mhz", "68EC020", "CPU", "14 Mhz", "Fastest" }, - { "Fastest", "68020", "CPU", "28 Mhz", "7 Mhz" }, + { "68000", "CPU", "FPUnone", "JIT", "68010" }, + { "68010", "CPU", "68881", "68000", "68EC020" }, + { "68EC020", "CPU", "68882", "68010", "68020" }, + { "68020", "CPU", "CPU internal", "68EC020", "68040" }, + { "68040", "CPU", "CPU internal", "68020", "CPUComp" }, + { "CPUComp", "CPU", "CPU internal", "68040", "JIT" }, + { "JIT", "CPU", "CPU internal", "CPUComp", "68000" }, + { "FPUnone", "68000", "7 Mhz", "CPU internal", "68881" }, + { "68881", "68010", "14 Mhz", "FPUnone", "68882" }, + { "68882", "68EC020", "28 Mhz", "68881", "CPU internal" }, + { "CPU internal", "68020", "Fastest", "68882", "FPUnone" }, + { "7 Mhz", "FPUnone", "CPU", "Fastest", "14 Mhz" }, + { "14 Mhz", "68881", "CPU", "7 Mhz", "28 Mhz" }, + { "28 Mhz", "68882", "CPU", "14 Mhz", "Fastest" }, + { "Fastest", "CPU internal", "CPU", "28 Mhz", "7 Mhz" }, // PanelChipset { "OCS", "Chipset", "BlitNormal", "CollFull", "ECS" }, diff --git a/src/od-pandora/gui/PanelCPU.cpp b/src/od-pandora/gui/PanelCPU.cpp index a0b0958b..df3e5aac 100644 --- a/src/od-pandora/gui/PanelCPU.cpp +++ b/src/od-pandora/gui/PanelCPU.cpp @@ -28,6 +28,7 @@ static gcn::Window *grpFPU; static gcn::UaeRadioButton* optFPUnone; static gcn::UaeRadioButton* optFPU68881; static gcn::UaeRadioButton* optFPU68882; +static gcn::UaeRadioButton* optFPUinternal; static gcn::Window *grpCPUSpeed; static gcn::UaeRadioButton* opt7Mhz; static gcn::UaeRadioButton* opt14Mhz; @@ -42,14 +43,16 @@ class CPUButtonActionListener : public gcn::ActionListener { if (actionEvent.getSource() == optCPU68000) { - changed_prefs.cpu_level = 0; + changed_prefs.cpu_model = 68000; + changed_prefs.fpu_model = 0; changed_prefs.address_space_24 = true; changed_prefs.z3fastmem_size = 0; changed_prefs.gfxmem_size = 0; } else if (actionEvent.getSource() == optCPU68010) { - changed_prefs.cpu_level = 1; + changed_prefs.cpu_model = 68010; + changed_prefs.fpu_model = 0; changed_prefs.address_space_24 = true; changed_prefs.z3fastmem_size = 0; changed_prefs.gfxmem_size = 0; @@ -57,7 +60,9 @@ class CPUButtonActionListener : public gcn::ActionListener } else if (actionEvent.getSource() == optCPU68EC020) { - changed_prefs.cpu_level = 2; + changed_prefs.cpu_model = 68020; + if(changed_prefs.fpu_model == 68040) + changed_prefs.fpu_model = 68881; changed_prefs.address_space_24 = true; changed_prefs.z3fastmem_size = 0; changed_prefs.gfxmem_size = 0; @@ -65,16 +70,16 @@ class CPUButtonActionListener : public gcn::ActionListener } else if (actionEvent.getSource() == optCPU68020) { - if(optFPU68881->isSelected()) - changed_prefs.cpu_level = 3; // with 68881 - else - changed_prefs.cpu_level = 2; // no fpu + changed_prefs.cpu_model = 68020; + if(changed_prefs.fpu_model == 68040) + changed_prefs.fpu_model = 68881; changed_prefs.address_space_24 = false; changed_prefs.cpu_compatible = 0; } else if (actionEvent.getSource() == optCPU68040) { - changed_prefs.cpu_level = 4; + changed_prefs.cpu_model = 68040; + changed_prefs.fpu_model = 68040; changed_prefs.address_space_24 = false; changed_prefs.cpu_compatible = 0; } @@ -92,16 +97,22 @@ class FPUButtonActionListener : public gcn::ActionListener { if (actionEvent.getSource() == optFPUnone) { - if(changed_prefs.cpu_level == 3) - changed_prefs.cpu_level = 2; + changed_prefs.fpu_model = 0; } else if(actionEvent.getSource() == optFPU68881) { - if(changed_prefs.cpu_level == 2) - changed_prefs.cpu_level = 3; + changed_prefs.fpu_model = 68881; } - else - ; + else if(actionEvent.getSource() == optFPU68882) + { + changed_prefs.fpu_model = 68882; + } + else if(actionEvent.getSource() == optFPUinternal) + { + changed_prefs.fpu_model = 68040; + } + RefreshPanelCPU(); + RefreshPanelRAM(); } }; static FPUButtonActionListener* fpuButtonActionListener; @@ -217,13 +228,17 @@ void InitPanelCPU(const struct _ConfigCategory& category) optFPU68882 = new gcn::UaeRadioButton("68882", "radiofpugroup"); optFPU68882->addActionListener(fpuButtonActionListener); + optFPUinternal = new gcn::UaeRadioButton("CPU internal", "radiofpugroup"); + optFPUinternal->addActionListener(fpuButtonActionListener); + grpFPU = new gcn::Window("FPU"); - grpFPU->setPosition(DISTANCE_BORDER, DISTANCE_BORDER + grpCPU->getHeight() + DISTANCE_NEXT_Y); + grpFPU->setPosition(DISTANCE_BORDER + grpCPU->getWidth() + DISTANCE_NEXT_X, DISTANCE_BORDER); grpFPU->add(optFPUnone, 5, 10); grpFPU->add(optFPU68881, 5, 40); -// grpFPU->add(optFPU68882, 5, 70); + grpFPU->add(optFPU68882, 5, 70); + grpFPU->add(optFPUinternal, 5, 100); grpFPU->setMovable(false); - grpFPU->setSize(grpCPU->getWidth(), 115); + grpFPU->setSize(140, 145); grpFPU->setBaseColor(gui_baseCol); category.panel->add(grpFPU); @@ -243,7 +258,7 @@ void InitPanelCPU(const struct _ConfigCategory& category) optFastest->addActionListener(cpuSpeedButtonActionListener); grpCPUSpeed = new gcn::Window("CPU Speed"); - grpCPUSpeed->setPosition(DISTANCE_BORDER + grpCPU->getWidth() + DISTANCE_NEXT_X, DISTANCE_BORDER); + grpCPUSpeed->setPosition(grpFPU->getX() + grpFPU->getWidth() + DISTANCE_NEXT_X, DISTANCE_BORDER); grpCPUSpeed->add(opt7Mhz, 5, 10); grpCPUSpeed->add(opt14Mhz, 5, 40); grpCPUSpeed->add(opt28Mhz, 5, 70); @@ -275,6 +290,7 @@ void ExitPanelCPU(void) delete optFPUnone; delete optFPU68881; delete optFPU68882; + delete optFPUinternal; delete grpFPU; delete fpuButtonActionListener; @@ -291,29 +307,43 @@ void RefreshPanelCPU(void) { if(changed_prefs.address_space_24) { - if(changed_prefs.cpu_level == 0) + if(changed_prefs.cpu_model == 68000) optCPU68000->setSelected(true); - else if(changed_prefs.cpu_level == 1) + else if(changed_prefs.cpu_model == 68010) optCPU68010->setSelected(true); - else if(changed_prefs.cpu_level == 2) + else if(changed_prefs.cpu_model == 68020) optCPU68EC020->setSelected(true); } else { - if(changed_prefs.cpu_level == 2 || changed_prefs.cpu_level == 3) + if(changed_prefs.cpu_model == 68020 || changed_prefs.cpu_model == 68030) optCPU68020->setSelected(true); - else if(changed_prefs.cpu_level == 4) + else if(changed_prefs.cpu_model == 68040) optCPU68040->setSelected(true); } chkCPUCompatible->setSelected(changed_prefs.cpu_compatible > 0); - chkCPUCompatible->setEnabled(changed_prefs.cpu_level == 0); + chkCPUCompatible->setEnabled(changed_prefs.cpu_model == 68000); chkJIT->setSelected(changed_prefs.cachesize > 0); - if(changed_prefs.cpu_level <= 2) - optFPUnone->setSelected(true); - else - optFPU68881->setSelected(true); + switch(changed_prefs.fpu_model) + { + case 68881: + optFPU68881->setSelected(true); + break; + case 68882: + optFPU68882->setSelected(true); + break; + case 68040: + optFPUinternal->setSelected(true); + break; + default: + optFPUnone->setSelected(true); + break; + } + optFPU68881->setEnabled(changed_prefs.cpu_model >= 68020 && changed_prefs.cpu_model < 68040); + optFPU68882->setEnabled(changed_prefs.cpu_model >= 68020 && changed_prefs.cpu_model < 68040); + optFPUinternal->setEnabled(changed_prefs.cpu_model == 68040); if (changed_prefs.m68k_speed == M68K_SPEED_7MHZ_CYCLES) opt7Mhz->setSelected(true); diff --git a/src/od-pandora/gui/PanelFloppy.cpp b/src/od-pandora/gui/PanelFloppy.cpp index a732b9c7..09a4aced 100644 --- a/src/od-pandora/gui/PanelFloppy.cpp +++ b/src/od-pandora/gui/PanelFloppy.cpp @@ -32,7 +32,7 @@ static gcn::Slider* sldDriveSpeed; static gcn::UaeCheckBox* chkLoadConfig; static gcn::Button *cmdSaveForDisk; -static const char *diskfile_filter[] = { ".adf", ".adz", ".zip", ".gz", "\0" }; +static const char *diskfile_filter[] = { ".adf", ".adz", ".zip", ".gz", ".dms", "\0" }; static const char *drivespeedlist[] = { "100% (compatible)", "200%", "400%", "800%" }; static const int drivespeedvalues[] = { 100, 200, 400, 800 }; diff --git a/src/od-pandora/gui/PanelHD.cpp b/src/od-pandora/gui/PanelHD.cpp index 24e7714d..4fe844af 100644 --- a/src/od-pandora/gui/PanelHD.cpp +++ b/src/od-pandora/gui/PanelHD.cpp @@ -52,7 +52,7 @@ class HDRemoveActionListener : public gcn::ActionListener { if (actionEvent.getSource() == listCmdDelete[i]) { - kill_filesys_unit(currprefs.mountinfo, i); + kill_filesys_unitconfig(&changed_prefs, i); break; } } @@ -72,7 +72,7 @@ class HDEditActionListener : public gcn::ActionListener { if (actionEvent.getSource() == listCmdProps[i]) { - int type = is_hardfile (currprefs.mountinfo, i); + int type = is_hardfile (i); if(type == FILESYS_VIRTUAL) EditFilesysVirtual(i); else @@ -232,49 +232,50 @@ void RefreshPanelHD(void) { int row, col; char tmp[32]; - char *volname, *devname, *rootdir, *filesys; - int secspertrack, surfaces, cylinders, reserved, blocksize, readonly, type, bootpri; - uae_u64 size; - const char *failure; - int units = nr_units(currprefs.mountinfo); + struct mountedinfo mi; + struct uaedev_config_info *uci; + int nosize = 0, type; + int units = nr_units(); for(row=0; rowdevname && uci->devname[0]) { - failure = get_filesys_unit(currprefs.mountinfo, row, - &devname, &volname, &rootdir, &readonly, &secspertrack, &surfaces, &reserved, - &cylinders, &size, &blocksize, &bootpri, &filesys, 0); - type = is_hardfile (currprefs.mountinfo, row); + type = get_filesys_unitconfig(&changed_prefs, row, &mi); + if (type < 0) { + type = uci->ishdf ? FILESYS_HARDFILE : FILESYS_VIRTUAL; + nosize = 1; + } if(type == FILESYS_VIRTUAL) { - listCells[row][COL_DEVICE]->setText(devname); - listCells[row][COL_VOLUME]->setText(volname); - listCells[row][COL_PATH]->setText(rootdir); - if(readonly) + listCells[row][COL_DEVICE]->setText(uci->devname); + listCells[row][COL_VOLUME]->setText(uci->volname); + listCells[row][COL_PATH]->setText(uci->rootdir); + if(uci->readonly) listCells[row][COL_READWRITE]->setText("no"); else listCells[row][COL_READWRITE]->setText("yes"); listCells[row][COL_SIZE]->setText("n/a"); - snprintf(tmp, 32, "%d", bootpri); + snprintf(tmp, 32, "%d", uci->bootpri); listCells[row][COL_BOOTPRI]->setText(tmp); } else { - listCells[row][COL_DEVICE]->setText(devname); + listCells[row][COL_DEVICE]->setText(uci->devname); listCells[row][COL_VOLUME]->setText("n/a"); - listCells[row][COL_PATH]->setText(rootdir); - if(readonly) + listCells[row][COL_PATH]->setText(uci->rootdir); + if(uci->readonly) listCells[row][COL_READWRITE]->setText("no"); else listCells[row][COL_READWRITE]->setText("yes"); - if (size >= 1024 * 1024 * 1024) - snprintf (tmp, 32, "%.1fG", ((double)(uae_u32)(size / (1024 * 1024))) / 1024.0); + if (mi.size >= 1024 * 1024 * 1024) + snprintf (tmp, 32, "%.1fG", ((double)(uae_u32)(mi.size / (1024 * 1024))) / 1024.0); else - snprintf (tmp, 32, "%.1fM", ((double)(uae_u32)(size / (1024))) / 1024.0); + snprintf (tmp, 32, "%.1fM", ((double)(uae_u32)(mi.size / (1024))) / 1024.0); listCells[row][COL_SIZE]->setText(tmp); - snprintf(tmp, 32, "%d", bootpri); + snprintf(tmp, 32, "%d", uci->bootpri); listCells[row][COL_BOOTPRI]->setText(tmp); } listCmdProps[row]->setEnabled(true); diff --git a/src/od-pandora/gui/PanelSavestate.cpp b/src/od-pandora/gui/PanelSavestate.cpp index 2dd3357b..4af17c92 100644 --- a/src/od-pandora/gui/PanelSavestate.cpp +++ b/src/od-pandora/gui/PanelSavestate.cpp @@ -238,7 +238,7 @@ void RefreshPanelSavestate(void) } } - bool enabled = nr_units (currprefs.mountinfo) == 0; + bool enabled = nr_units () == 0; optState0->setEnabled(enabled); optState1->setEnabled(enabled); optState2->setEnabled(enabled); diff --git a/src/od-pandora/gui/PanelSound.cpp b/src/od-pandora/gui/PanelSound.cpp index fa388778..c4204a00 100644 --- a/src/od-pandora/gui/PanelSound.cpp +++ b/src/od-pandora/gui/PanelSound.cpp @@ -217,9 +217,9 @@ class SoundActionListener : public gcn::ActionListener { curr_stereodelay_idx = (int)(sldStereoDelay->getValue()); if(curr_stereodelay_idx > 0) - changed_prefs.sound_mixed_stereo = curr_stereodelay_idx; + changed_prefs.sound_mixed_stereo_delay = curr_stereodelay_idx; else - changed_prefs.sound_mixed_stereo = -1; + changed_prefs.sound_mixed_stereo_delay = -1; } } @@ -441,7 +441,7 @@ void RefreshPanelSound(void) else { curr_separation_idx = 10 - changed_prefs.sound_stereo_separation; - curr_stereodelay_idx = changed_prefs.sound_mixed_stereo > 0 ? changed_prefs.sound_mixed_stereo : 0; + curr_stereodelay_idx = changed_prefs.sound_mixed_stereo_delay > 0 ? changed_prefs.sound_mixed_stereo_delay : 0; } sldSeparation->setValue(curr_separation_idx); diff --git a/src/od-pandora/menu/menu_config.cpp b/src/od-pandora/menu/menu_config.cpp index 1d2df226..ef764998 100644 --- a/src/od-pandora/menu/menu_config.cpp +++ b/src/od-pandora/menu/menu_config.cpp @@ -305,8 +305,12 @@ static void SetPresetMode(int mode, struct uae_prefs *p) static void SetDefaultMenuSettings(struct uae_prefs *p) { - while(nr_units(p->mountinfo) > 0) - kill_filesys_unit(p->mountinfo, 0); + int i; + + free_mountinfo(); + for(i=0; imountitems = 0; kickstart = 1; @@ -403,7 +407,8 @@ static bool CheckKickstart(struct uae_prefs *p) int loadconfig_old(struct uae_prefs *p, const char *orgpath) { char path[MAX_PATH]; - + int cpu_level; + strcpy(path, orgpath); char *ptr = strstr(path, ".uae"); if(ptr > 0) @@ -498,10 +503,10 @@ int loadconfig_old(struct uae_prefs *p, const char *orgpath) fscanf(f,"custom_Y=%d\n",&p->pandora_custom_Y); fscanf(f,"custom_L=%d\n",&p->pandora_custom_L); fscanf(f,"custom_R=%d\n",&p->pandora_custom_R); - fscanf(f,"cpu=%d\n", &p->cpu_level); - if(p->cpu_level > M68000) + fscanf(f,"cpu=%d\n", &cpu_level); + if(cpu_level > M68000) // Was old format - p->cpu_level = M68020; + cpu_level = M68020; fscanf(f,"chipset=%d\n", &p->chipset_mask); p->immediate_blits = (p->chipset_mask & 0x100) == 0x100; p->pandora_partial_blits = (p->chipset_mask & 0x200) == 0x200; @@ -523,7 +528,7 @@ int loadconfig_old(struct uae_prefs *p, const char *orgpath) if(p->m68k_speed >= 2) { // 1200: set to 68020 with 14 MHz - p->cpu_level = M68020; + cpu_level = M68020; p->m68k_speed--; if(p->m68k_speed > 2) p->m68k_speed = 2; @@ -535,7 +540,30 @@ int loadconfig_old(struct uae_prefs *p, const char *orgpath) p->m68k_speed = M68K_SPEED_25MHZ_CYCLES; p->cachesize = 0; p->cpu_compatible = 0; - + switch(cpu_level) + { + case 0: + p->cpu_model = 68000; + p->fpu_model = 0; + break; + case 1: + p->cpu_model = 68010; + p->fpu_model = 0; + break; + case 2: + p->cpu_model = 68020; + p->fpu_model = 0; + break; + case 3: + p->cpu_model = 68020; + p->fpu_model = 68881; + break; + case 4: + p->cpu_model = 68040; + p->fpu_model = 68881; + break; + } + disk_eject(0); disk_eject(1); disk_eject(2); diff --git a/src/od-pandora/neon_helper.s b/src/od-pandora/neon_helper.s index cee63f0d..c87f2958 100644 --- a/src/od-pandora/neon_helper.s +++ b/src/od-pandora/neon_helper.s @@ -13,7 +13,6 @@ .global NEON_doline_n6 .global NEON_doline_n8 - .text .align 8 diff --git a/src/od-pandora/pandora.cpp b/src/od-pandora/pandora.cpp index 27610462..24ced3e8 100644 --- a/src/od-pandora/pandora.cpp +++ b/src/od-pandora/pandora.cpp @@ -119,6 +119,16 @@ void logging_cleanup( void ) } +void target_quit (void) +{ +} + + +void target_fixup_options (struct uae_prefs *p) +{ +} + + void target_default_options (struct uae_prefs *p, int type) { p->pandora_horizontal_offset = 0; @@ -254,10 +264,13 @@ void fetch_screenshotpath(char *out, int size) int target_cfgfile_load (struct uae_prefs *p, char *filename, int type, int isdefault) { + int i; int result = 0; - while(nr_units(p->mountinfo) > 0) - kill_filesys_unit(p->mountinfo, 0); + free_mountinfo(); + for(i=0; imountitems = 0; char *ptr = strstr(filename, ".uae"); if(ptr > 0) diff --git a/src/od-pandora/pandora_filesys.cpp b/src/od-pandora/pandora_filesys.cpp index bcea631d..eaae7276 100644 --- a/src/od-pandora/pandora_filesys.cpp +++ b/src/od-pandora/pandora_filesys.cpp @@ -7,11 +7,6 @@ #include "zfile.h" -void filesys_init( void ) -{ -} - - int my_existsfile (const char *name) { struct stat st; @@ -39,6 +34,19 @@ int my_existsdir(const char *name) } +int my_getvolumeinfo (const char *root) +{ + struct stat st; + int ret = 0; + + if (lstat (root, &st) == -1) + return -1; + if (!S_ISDIR(st.st_mode)) + return -1; + return ret; +} + + void *my_opendir (const char* name) { return opendir(name); @@ -124,3 +132,11 @@ int my_truncate (const char *name, long int len) { return truncate(name, len); } + + +/* Returns 1 if an actual volume-name was found, 2 if no volume-name (so uses some defaults) */ +int target_get_volume_name(struct uaedev_mount_info *mtinf, const char *volumepath, char *volumename, int size, int inserted, int fullcheck) +{ + sprintf(volumename, "DH_%c", volumepath[0]); + return 2; +} diff --git a/src/od-pandora/pandora_gfx.cpp b/src/od-pandora/pandora_gfx.cpp index e240ec68..ddd22249 100644 --- a/src/od-pandora/pandora_gfx.cpp +++ b/src/od-pandora/pandora_gfx.cpp @@ -10,11 +10,17 @@ #include "events.h" #include "osdep/inputmode.h" #include "savestate.h" +#include "picasso96.h" #include #include #include #include + +#include +#include +#include + #ifdef ANDROIDSDL #include #endif @@ -22,12 +28,26 @@ extern int stylusClickOverride; -/* SDL variable for output of emulation and menu */ +/* SDL variable for output of emulation */ SDL_Surface *prSDLScreen = NULL; -uae_u16 *prSDLScreenPixels; -static SDL_Surface *current_screenshot = NULL; + +/* Possible screen modes (x and y resolutions) */ +#define MAX_SCREEN_MODES 6 +static int x_size_table[MAX_SCREEN_MODES] = { 640, 640, 800, 1024, 1152, 1280 }; +static int y_size_table[MAX_SCREEN_MODES] = { 400, 480, 480, 768, 864, 960 }; + +static int red_bits, green_bits, blue_bits; +static int red_shift, green_shift, blue_shift; + +int screen_is_picasso; +static int picasso_maxw = 0, picasso_maxh = 0; + +static int bitdepth, bit_unit; + + static int curr_layer_width = 0; +static SDL_Surface *current_screenshot = NULL; static char screenshot_filename_default[255]={ '/', 't', 'm', 'p', '/', 'n', 'u', 'l', 'l', '.', 'p', 'n', 'g', '\0' }; @@ -44,6 +64,7 @@ int delay_savestate_frame = 0; #define VIDEO_FLAGS VIDEO_FLAGS_INIT | SDL_DOUBLEBUF #endif + int justClicked = 0; int mouseMoving = 0; int fcounter = 0; @@ -53,8 +74,20 @@ static unsigned long previous_synctime = 0; static unsigned long next_synctime = 0; +static int fbdevice = -1; +static inline void WaitForVSync(void) +{ + int arg = 0; + if(fbdevice != -1) + ioctl(fbdevice, FBIO_WAITFORVSYNC, &arg); +} + + int graphics_setup (void) { +#ifdef PICASSO96 + InitPicasso96(); +#endif return 1; } @@ -77,6 +110,11 @@ void graphics_subshutdown (void) { SDL_FreeSurface(prSDLScreen); prSDLScreen = NULL; + if(fbdevice != -1) + { + close(fbdevice); + fbdevice = -1; + } } @@ -98,17 +136,27 @@ static void CalcPandoraWidth(struct uae_prefs *p) } -void update_display(struct uae_prefs *p) +static void open_screen(struct uae_prefs *p) { + char layersize[20]; + if(prSDLScreen != NULL) graphics_subshutdown(); - CalcPandoraWidth(p); - if(curr_layer_width != p->gfx_size_fs.width) - { - char layersize[20]; - snprintf(layersize, 20, "%dx480", p->gfx_size_fs.width); - + if(!screen_is_picasso) + { + CalcPandoraWidth(p); + if(curr_layer_width != p->gfx_size_fs.width) + { + snprintf(layersize, 20, "%dx480", p->gfx_size_fs.width); +#ifndef WIN32 + setenv("SDL_OMAP_LAYER_SIZE", layersize, 1); +#endif + } + } + else + { + snprintf(layersize, 20, "%dx%d", picasso_vidinfo.width, picasso_vidinfo.height); #ifndef WIN32 setenv("SDL_OMAP_LAYER_SIZE", layersize, 1); #endif @@ -118,20 +166,39 @@ void update_display(struct uae_prefs *p) update_onscreen(); #endif - if(prSDLScreen == NULL || prSDLScreen->w != p->gfx_size.width || prSDLScreen->h != p->gfx_size.height) + if(!screen_is_picasso) { + if(prSDLScreen == NULL || prSDLScreen->w != p->gfx_size.width || prSDLScreen->h != p->gfx_size.height) + { #if defined(PANDORA) && !defined(WIN32) - prSDLScreen = SDL_SetVideoMode(p->gfx_size.width, p->gfx_size.height, 16, SDL_SWSURFACE|SDL_FULLSCREEN|SDL_DOUBLEBUF); + prSDLScreen = SDL_SetVideoMode(p->gfx_size.width, p->gfx_size.height, 16, SDL_HWSURFACE|SDL_FULLSCREEN|SDL_DOUBLEBUF); #elif defined(PANDORA) && defined(WIN32) - prSDLScreen = SDL_SetVideoMode(p->gfx_size.width, p->gfx_size.height, 16, SDL_SWSURFACE|SDL_DOUBLEBUF); + prSDLScreen = SDL_SetVideoMode(p->gfx_size.width, p->gfx_size.height, 16, SDL_SWSURFACE|SDL_DOUBLEBUF); #else - prSDLScreen = SDL_SetVideoMode(p->gfx_size.width, p->gfx_size.height, 16, SDL_SWSURFACE|SDL_FULLSCREEN); + prSDLScreen = SDL_SetVideoMode(p->gfx_size.width, p->gfx_size.height, 16, SDL_HWSURFACE|SDL_FULLSCREEN); #endif + } } + else + { + prSDLScreen = SDL_SetVideoMode(picasso_vidinfo.width, picasso_vidinfo.height, 16, SDL_SWSURFACE|SDL_FULLSCREEN); + if(fbdevice == -1) + fbdevice = open("/dev/fb0", O_RDWR); // We have to wait for vsync by hand when no SDL_DOUBLEBUF... + } + if(prSDLScreen != NULL) + { + init_row_map(); + } +} + + +void update_display(struct uae_prefs *p) +{ + open_screen(p); + SDL_ShowCursor(SDL_DISABLE); InitAmigaVidMode(p); - init_row_map(); framecnt = 1; // Don't draw frame before reset done } @@ -171,21 +238,18 @@ int check_prefs_changed_gfx (void) int lockscr (void) { - SDL_LockSurface(prSDLScreen); - return 1; + SDL_LockSurface(prSDLScreen); + return 1; } void unlockscr (void) { - SDL_UnlockSurface(prSDLScreen); + SDL_UnlockSurface(prSDLScreen); } - void flush_block () { - SDL_UnlockSurface (prSDLScreen); - if (show_inputmode) inputmode_redraw(); @@ -203,9 +267,18 @@ void flush_block () unsigned long start = read_processor_time(); if(start < next_synctime && next_synctime - start > time_per_frame - 1000) - usleep((next_synctime - start) - 1000); - SDL_Flip(prSDLScreen); - last_synctime = read_processor_time(); + usleep((next_synctime - start) - 750); + if(screen_is_picasso) + { + WaitForVSync(); + last_synctime = read_processor_time(); + SDL_Flip(prSDLScreen); + } + else + { + SDL_Flip(prSDLScreen); + last_synctime = read_processor_time(); + } if(last_synctime - next_synctime > time_per_frame - 1000) adjust_idletime(0); @@ -217,7 +290,7 @@ void flush_block () else next_synctime = next_synctime + time_per_frame * (1 + currprefs.gfx_framerate); - SDL_LockSurface (prSDLScreen); + init_row_map(); if(stylusClickOverride) { @@ -252,7 +325,6 @@ void flush_block () fcounter++; } } - init_row_map(); } @@ -272,9 +344,6 @@ static void graphics_subinit (void) } else { - prSDLScreenPixels=(uae_u16 *)prSDLScreen->pixels; - SDL_LockSurface(prSDLScreen); - SDL_UnlockSurface(prSDLScreen); SDL_Flip(prSDLScreen); SDL_ShowCursor(SDL_DISABLE); @@ -324,6 +393,7 @@ static int init_colors (void) green_shift = maskShift(prSDLScreen->format->Gmask); blue_shift = maskShift(prSDLScreen->format->Bmask); alloc_colors64k (red_bits, green_bits, blue_bits, red_shift, green_shift, blue_shift, 0); + notice_new_xcolors(); for (i = 0; i < 4096; i++) xcolors[i] = xcolors[i] * 0x00010001; @@ -331,20 +401,39 @@ static int init_colors (void) } +/* + * Find the colour depth of the display + */ +static int get_display_depth (void) +{ + const SDL_VideoInfo *vid_info; + int depth = 0; + + if ((vid_info = SDL_GetVideoInfo())) { + depth = vid_info->vfmt->BitsPerPixel; + + /* Don't trust the answer if it's 16 bits; the display + * could actually be 15 bits deep. We'll count the bits + * ourselves */ + if (depth == 16) + depth = bitsInMask (vid_info->vfmt->Rmask) + bitsInMask (vid_info->vfmt->Gmask) + bitsInMask (vid_info->vfmt->Bmask); + } + return depth; +} + + int graphics_init (void) { int i,j; graphics_subinit (); - init_row_map (); - if (!init_colors ()) return 0; buttonstate[0] = buttonstate[1] = buttonstate[2] = 0; keyboard_init(); - + return 1; } @@ -352,7 +441,6 @@ void graphics_leave (void) { graphics_subshutdown (); SDL_VideoQuit(); - //dumpcustom (); } @@ -446,9 +534,8 @@ static void CreateScreenshot(void) w=prSDLScreen->w; h=prSDLScreen->h; - - current_screenshot = SDL_CreateRGBSurface(prSDLScreen->flags,w,h,prSDLScreen->format->BitsPerPixel,prSDLScreen->format->Rmask,prSDLScreen->format->Gmask,prSDLScreen->format->Bmask,prSDLScreen->format->Amask); - SDL_BlitSurface(prSDLScreen, NULL, current_screenshot, NULL); + current_screenshot = SDL_CreateRGBSurfaceFrom(prSDLScreen->pixels, w, h, prSDLScreen->format->BitsPerPixel, prSDLScreen->pitch, + prSDLScreen->format->Rmask, prSDLScreen->format->Gmask, prSDLScreen->format->Bmask, prSDLScreen->format->Amask); } @@ -463,3 +550,153 @@ static int save_thumb(char *path) } return ret; } + + +#ifdef PICASSO96 + +uae_u16 picasso96_pixel_format = RGBFF_CHUNKY; + + +void DX_Invalidate (int x, int y, int width, int height) +{ + // We draw everything direct to the frame buffer +} + +int DX_BitsPerCannon (void) +{ + return 8; +} + +static int palette_update_start = 256; +static int palette_update_end = 0; + +void DX_SetPalette (int start, int count) +{ + if (! screen_is_picasso || picasso96_state.RGBFormat != RGBFB_CHUNKY) + return; + + if (picasso_vidinfo.pixbytes != 1) { + /* This is the case when we're emulating a 256 color display. */ + while (count-- > 0) { + int r = picasso96_state.CLUT[start].Red; + int g = picasso96_state.CLUT[start].Green; + int b = picasso96_state.CLUT[start].Blue; + picasso_vidinfo.clut[start++] = + (doMask256 (r, red_bits, red_shift) + | doMask256 (g, green_bits, green_shift) + | doMask256 (b, blue_bits, blue_shift)); + } + notice_screen_contents_lost(); + } +} + +int DX_Fill (int dstx, int dsty, int width, int height, uae_u32 color, RGBFTYPE rgbtype) +{ + int result = 0; + + SDL_Rect rect = {dstx, dsty, width, height}; + + if (SDL_FillRect (prSDLScreen, &rect, color) == 0) { + DX_Invalidate (dstx, dsty, width, height); + result = 1; + } + + return result; +} + +int DX_FillResolutions (uae_u16 *ppixel_format) +{ + int i, count = 0; + int w = 0; + int h = 0; + int emulate_chunky = 0; + + /* In the new scheme of things, this function is called *before* graphics_init. + * Hence, we need to find the display depth ourselves - Rich */ + bitdepth = get_display_depth (); + bit_unit = (bitdepth + 1) & 0xF8; + + picasso_vidinfo.rgbformat = (bit_unit == 8 ? RGBFB_CHUNKY + : bitdepth == 15 && bit_unit == 16 ? RGBFB_R5G5B5 + : bitdepth == 16 && bit_unit == 16 ? RGBFB_R5G6B5 + : bit_unit == 24 ? RGBFB_B8G8R8 + : bit_unit == 32 ? RGBFB_A8R8G8B8 + : RGBFB_NONE); + + *ppixel_format = 1 << picasso_vidinfo.rgbformat; + if (bit_unit == 16 || bit_unit == 32) { + *ppixel_format |= RGBFF_CHUNKY; +// emulate_chunky = 1; + } + + for (i = 0; i < MAX_SCREEN_MODES && count < MAX_PICASSO_MODES; i++) { + int j; + if (SDL_VideoModeOK (x_size_table[i], y_size_table[i], bitdepth, SDL_SWSURFACE)) + { + for (j = 0; j <= emulate_chunky && count < MAX_PICASSO_MODES; j++) { + if (x_size_table[i] > picasso_maxw) + picasso_maxw = x_size_table[i]; + if (y_size_table[i] > picasso_maxh) + picasso_maxh = y_size_table[i]; + DisplayModes[count].res.width = x_size_table[i]; + DisplayModes[count].res.height = y_size_table[i]; + DisplayModes[count].depth = j == 1 ? 1 : bit_unit >> 3; + DisplayModes[count].refresh = 50; + + count++; + } + } + } + DisplayModes[count].depth = -1; + + return count; +} + +void gfx_set_picasso_modeinfo (uae_u32 w, uae_u32 h, uae_u32 depth, RGBFTYPE rgbfmt) +{ + depth >>= 3; + if( ((unsigned)picasso_vidinfo.width == w ) && + ( (unsigned)picasso_vidinfo.height == h ) && + ( (unsigned)picasso_vidinfo.depth == depth ) && + ( picasso_vidinfo.selected_rgbformat == rgbfmt) ) + return; + + picasso_vidinfo.selected_rgbformat = rgbfmt; + picasso_vidinfo.width = w; + picasso_vidinfo.height = h; + picasso_vidinfo.depth = depth; + picasso_vidinfo.extra_mem = 1; + + picasso_vidinfo.pixbytes = depth; + if (screen_is_picasso) + { + open_screen(&currprefs); + picasso_vidinfo.rowbytes = prSDLScreen->pitch; + } +} + +void gfx_set_picasso_state (int on) +{ + if (on == screen_is_picasso) + return; + + screen_is_picasso = on; + open_screen(&currprefs); + picasso_vidinfo.rowbytes = prSDLScreen->pitch; + if (on) + DX_SetPalette (0, 256); +} + +uae_u8 *gfx_lock_picasso (void) +{ + SDL_LockSurface(prSDLScreen); + picasso_vidinfo.rowbytes = prSDLScreen->pitch; + return (uae_u8 *)prSDLScreen->pixels; +} + +void gfx_unlock_picasso (void) +{ + SDL_UnlockSurface(prSDLScreen); +} + +#endif // PICASSO96 diff --git a/src/od-pandora/pandora_gui.cpp b/src/od-pandora/pandora_gui.cpp index 4a33768d..2e16471b 100644 --- a/src/od-pandora/pandora_gui.cpp +++ b/src/od-pandora/pandora_gui.cpp @@ -56,8 +56,17 @@ struct gui_msg { const char *msg; }; struct gui_msg gui_msglist[] = { - { NUMSG_KS68EC020, "Your Kickstart requires a 68EC020 or later CPU." }, - { NUMSG_KS68020, "Your Kickstart requires a 68020 CPU or later CPU." }, + { NUMSG_NOROM, "Could not load system ROM, trying system ROM replacement." }, + { NUMSG_NOROMKEY, "Could not find system ROM key file." }, + { NUMSG_KSROMCRCERROR, "System ROM checksum incorrect. The system ROM image file may be corrupt." }, + { NUMSG_KSROMREADERROR, "Error while reading system ROM." }, + { NUMSG_NOEXTROM, "No extended ROM found." }, + { NUMSG_KS68EC020, "The selected system ROM requires a 68EC020 or later CPU." }, + { NUMSG_KS68020, "The selected system ROM requires a 68020 or later CPU." }, + { NUMSG_KS68030, "The selected system ROM requires a 68030 CPU." }, + { NUMSG_STATEHD, "WARNING: Current configuration is not fully compatible with state saves." }, + { NUMSG_KICKREP, "You need to have a floppy disk (image file) in DF0: to use the system ROM replacement." }, + { NUMSG_KICKREPNO, "The floppy disk (image file) in DF0: is not compatible with the system ROM replacement functionality." }, { -1, "" } }; @@ -125,7 +134,7 @@ static struct romdata *scan_single_rom_2 (struct zfile *f, uae_u8 *keybuf, int k zfile_fseek (f, 0, SEEK_END); size = zfile_ftell (f); zfile_fseek (f, 0, SEEK_SET); - if (size > 1760 * 512) /* don't skip KICK disks */ + if (size > 524288 * 2) /* don't skip KICK disks or 1M ROMs */ return 0; zfile_fread (buffer, 1, 11, f); if (!memcmp (buffer, "KICK", 4)) { @@ -154,12 +163,36 @@ static struct romdata *scan_single_rom_2 (struct zfile *f, uae_u8 *keybuf, int k return rd; } +static int isromext(char *path) +{ + char *ext = strrchr (path, '.'); + int i; + + if (!ext) + return 0; + ext++; + + if (!stricmp (ext, "rom") || !stricmp (ext, "adf") || !stricmp (ext, "key") + || !stricmp (ext, "a500") || !stricmp (ext, "a1200") || !stricmp (ext, "a4000")) + return 1; + for (i = 0; uae_archive_extensions[i]; i++) { + if (!stricmp (ext, uae_archive_extensions[i])) + return 1; + } + return 0; +} + static int scan_rom_2 (struct zfile *f, void *rsd) { - struct romdata *rd = scan_single_rom_2(f, ((struct romscandata *)rsd)->keybuf, ((struct romscandata *)rsd)->keysize); + char *path = zfile_getname(f); + struct romdata *rd; + + if (!isromext(path)) + return 0; + rd = scan_single_rom_2(f, ((struct romscandata *)rsd)->keybuf, ((struct romscandata *)rsd)->keysize); if (rd) - addrom (rd, zfile_getname(f)); - return 1; + addrom (rd, path); + return 0; } static void scan_rom(char *path, uae_u8 *keybuf, int keysize) @@ -167,6 +200,10 @@ static void scan_rom(char *path, uae_u8 *keybuf, int keysize) struct romdata *rd; struct romscandata rsd = { keybuf, keysize }; + if (!isromext(path)) { + //write_log("ROMSCAN: skipping file '%s', unknown extension\n", path); + return; + } rd = getarcadiarombyname(path); if (rd) addrom(rd, path); @@ -271,6 +308,22 @@ ConfigFileInfo* SearchConfigInList(const char *name) } +static void prefs_to_gui() +{ + /* filesys hack */ + changed_prefs.mountitems = currprefs.mountitems; + memcpy(&changed_prefs.mountconfig, &currprefs.mountconfig, MOUNT_CONFIG_SIZE * sizeof (struct uaedev_config_info)); +} + + +static void gui_to_prefs (void) +{ + /* filesys hack */ + currprefs.mountitems = changed_prefs.mountitems; + memcpy(&currprefs.mountconfig, &changed_prefs.mountconfig, MOUNT_CONFIG_SIZE * sizeof (struct uaedev_config_info)); +} + + int gui_init (void) { int ret = 0; @@ -286,7 +339,9 @@ int gui_init (void) RescanROMs(); graphics_subshutdown(); + prefs_to_gui(); run_gui(); + gui_to_prefs(); if(quit_program < 0) quit_program = -quit_program; if(quit_program == 1) @@ -378,7 +433,9 @@ static void goMenu(void) if(lstAvailableROMs.size() == 0) RescanROMs(); graphics_subshutdown(); + prefs_to_gui(); run_gui(); + gui_to_prefs(); setCpuSpeed(); update_display(&changed_prefs); diff --git a/src/od-pandora/pandora_mem.cpp b/src/od-pandora/pandora_mem.cpp index fb6454a3..008d79ab 100644 --- a/src/od-pandora/pandora_mem.cpp +++ b/src/od-pandora/pandora_mem.cpp @@ -61,7 +61,7 @@ void alloc_AmigaMem(void) { int i; uae_u64 total; - uae_u32 max_allowed_mman; + int max_allowed_mman; free_AmigaMem(); @@ -117,6 +117,9 @@ uae_u8 *mapped_malloc (size_t s, const char *file) if(!strcmp(file, "rom_e0")) return natmem_offset + 0xe00000; + if(!strcmp(file, "rom_a8")) + return natmem_offset + 0xa80000; + if(!strcmp(file, "kick")) return natmem_offset + kickmem_start; @@ -124,10 +127,13 @@ uae_u8 *mapped_malloc (size_t s, const char *file) return natmem_offset + 0x1000000; //z3fastmem_start; if(!strcmp(file, "gfx")) - return natmem_offset + 0x3000000; //gfxmem_start; + { + p96ram_start = 0x3000000; + return natmem_offset + p96ram_start; + } if(!strcmp(file, "rtarea")) - return natmem_offset + RTAREA_BASE; + return natmem_offset + rtarea_base; return NULL; } diff --git a/src/od-pandora/picasso96.cpp b/src/od-pandora/picasso96.cpp index 2ce0fd63..462e4710 100644 --- a/src/od-pandora/picasso96.cpp +++ b/src/od-pandora/picasso96.cpp @@ -34,7 +34,6 @@ #include "sysconfig.h" #include "sysdeps.h" - #include "config.h" #include "options.h" #include "uae.h" @@ -65,26 +64,23 @@ static void REGPARAM2 gfxmem_bput (uaecptr, uae_u32) REGPARAM; static int REGPARAM2 gfxmem_check (uaecptr addr, uae_u32 size) REGPARAM; static uae_u8 *REGPARAM2 gfxmem_xlate (uaecptr addr) REGPARAM; -static void write_gfx_long (uaecptr addr, uae_u32 value); -static void write_gfx_word (uaecptr addr, uae_u16 value); -static void write_gfx_byte (uaecptr addr, uae_u8 value); - -static uae_u8 all_ones_bitmap, all_zeros_bitmap; +static uae_u8 all_ones_bitmap, all_zeros_bitmap; /* yuk */ struct picasso96_state_struct picasso96_state; struct picasso_vidbuf_description picasso_vidinfo; +static struct PicassoResolution *newmodes = NULL; /* These are the maximum resolutions... They are filled in by GetSupportedResolutions() */ /* have to fill this in, otherwise problems occur on the Amiga side P96 s/w which expects /* data here. */ -struct ScreenResolution planar = { 320, 240 }; -struct ScreenResolution chunky = { 640, 480 }; -struct ScreenResolution hicolour = { 640, 480 }; -struct ScreenResolution truecolour = { 640, 480 }; -struct ScreenResolution alphacolour = { 640, 480 }; +static struct ScreenResolution planar = { 320, 240 }; +static struct ScreenResolution chunky = { 640, 480 }; +static struct ScreenResolution hicolour = { 640, 480 }; +static struct ScreenResolution truecolour = { 640, 480 }; +static struct ScreenResolution alphacolour = { 640, 480 }; #define UAE_RTG_LIBRARY_VERSION 40 -#define UAE_RTG_LIBRARY_REVISION 3993 +#define UAE_RTG_LIBRARY_REVISION 3994 static void checkrtglibrary(void) { uae_u32 v; @@ -120,7 +116,7 @@ struct PicassoResolution DisplayModes[MAX_PICASSO_MODES]; static int mode_count = 0; static uae_u32 p2ctab[256][2]; -static int set_gc_called = 0; +static int set_gc_called = 0, init_picasso_screen_called = 0; static uae_u8 GetBytesPerPixel (uae_u32 RGBfmt) @@ -256,25 +252,6 @@ static int CopyTemplateStructureA2U (uaecptr amigamemptr, struct Template *tmpl) return 0; } -static void CopyLibResolutionStructureU2A (struct LibResolution *libres, uaecptr amigamemptr) -{ - char *uaememptr = 0; - int i; - - uaememptr = (char *)gfxmem_xlate (amigamemptr); /* I know that amigamemptr is inside my gfxmem chunk, so I can just do the xlate() */ - memset (uaememptr, 0, PSSO_LibResolution_sizeof); /* zero out our LibResolution structure */ - memcpy (uaememptr + PSSO_LibResolution_P96ID, libres->P96ID, 6); - strncpy(uaememptr + PSSO_LibResolution_Name, libres->Name, MAXRESOLUTIONNAMELENGTH); - put_long (amigamemptr + PSSO_LibResolution_DisplayID, libres->DisplayID); - put_word (amigamemptr + PSSO_LibResolution_Width, libres->Width); - put_word (amigamemptr + PSSO_LibResolution_Height, libres->Height); - put_word (amigamemptr + PSSO_LibResolution_Flags, libres->Flags); - for (i = 0; i < MAXMODES; i++) - put_long (amigamemptr + PSSO_LibResolution_Modes + i * 4, libres->Modes[i]); - put_long (amigamemptr + 10, amigamemptr + PSSO_LibResolution_P96ID); - put_long (amigamemptr + PSSO_LibResolution_BoardInfo, libres->BoardInfo); -} - /* list is Amiga address of list, in correct endian format for UAE * node is Amiga address of node, in correct endian format for UAE */ static void AmigaListAddTail (uaecptr l, uaecptr n) @@ -295,8 +272,9 @@ static void AmigaListAddTail (uaecptr l, uaecptr n) * there is no OS specific function to fill the rectangle. */ -static void do_fillrect (uae_u8 *src, unsigned int x, unsigned int y, unsigned int width, unsigned int height, - uae_u32 pen, int Bpp, RGBFTYPE rgbtype) +static void do_fillrect (uae_u8 *src, unsigned int x, unsigned int y, + unsigned int width, unsigned int height, + uae_u32 pen, int Bpp, RGBFTYPE rgbtype) { uae_u8 *dst; @@ -309,7 +287,7 @@ static void do_fillrect (uae_u8 *src, unsigned int x, unsigned int y, unsigned i } else { - if( DX_Fill( x, y, width, height, picasso_vidinfo.clut[pen], rgbtype ) ) + if(DX_Fill(x, y, width, height, picasso_vidinfo.clut[pen], rgbtype)) return; } @@ -318,44 +296,53 @@ static void do_fillrect (uae_u8 *src, unsigned int x, unsigned int y, unsigned i if (x + width > picasso_vidinfo.width) width = picasso_vidinfo.width - x; - DX_Invalidate (y, y + height - 1); + DX_Invalidate (x, y, width, height); if (!picasso_vidinfo.extra_mem) return; - width *= Bpp; dst = gfx_lock_picasso (); if (!dst) goto out; + width *= Bpp; dst += y * picasso_vidinfo.rowbytes + x * picasso_vidinfo.pixbytes; - if (picasso_vidinfo.rgbformat == picasso96_state.RGBFormat) { - if (Bpp == 1) { - while (height-- > 0) { + if (picasso_vidinfo.rgbformat == picasso96_state.RGBFormat) + { + if (Bpp == 1) + { + while (height-- > 0) + { memset (dst, pen, width); dst += picasso_vidinfo.rowbytes; } - } else { + } + else + { // Set first line if (Bpp == 2) { for(int i=0; i 0) { + while (height-- > 0) + { memcpy (dst, src, width); dst += picasso_vidinfo.rowbytes; } } - } else { + } + else + { int psiz = GetBytesPerPixel (picasso_vidinfo.rgbformat); if (picasso96_state.RGBFormat != RGBFB_CHUNKY) { + write_log ("ERROR - do_fillrect() failure1 (%d)\n", picasso96_state.RGBFormat); abort (); } @@ -373,6 +360,7 @@ static void do_fillrect (uae_u8 *src, unsigned int x, unsigned int y, unsigned i *((uae_u32 *) dst + i) = picasso_vidinfo.clut[src[i]]; break; default: + write_log ("ERROR - do_fillrect() failure2 (%d), psize\n"); abort (); break; } @@ -422,7 +410,7 @@ static void do_blit (struct RenderInfo *ri, int Bpp, srcp = ri->Memory + srcx*Bpp + srcy*ri->BytesPerRow; - DX_Invalidate (dsty, dsty + height - 1); + DX_Invalidate (dstx, dsty, width, height); if (!picasso_vidinfo.extra_mem) { return; @@ -438,8 +426,10 @@ static void do_blit (struct RenderInfo *ri, int Bpp, * and the destination is a different buffer owned by the graphics code. */ dstp += dsty * picasso_vidinfo.rowbytes + dstx * picasso_vidinfo.pixbytes; - if (picasso_vidinfo.rgbformat == picasso96_state.RGBFormat) { - while (height-- > 0) { + if (picasso_vidinfo.rgbformat == picasso96_state.RGBFormat) + { + while (height-- > 0) + { switch (Bpp) { case 2: @@ -454,15 +444,20 @@ static void do_blit (struct RenderInfo *ri, int Bpp, srcp += ri->BytesPerRow; dstp += picasso_vidinfo.rowbytes; } - } else { + } + else + { int psiz = GetBytesPerPixel (picasso_vidinfo.rgbformat); if (picasso96_state.RGBFormat != RGBFB_CHUNKY) { + write_log ("ERROR: do_blit() failure, %d!\n", picasso96_state.RGBFormat); abort (); } - while (height-- > 0) { + while (height-- > 0) + { unsigned int i; - switch (psiz) { + switch (psiz) + { case 2: for (i = 0; i < width; i++) *((uae_u16 *) dstp + i) = picasso_vidinfo.clut[srcp[i]]; @@ -472,6 +467,7 @@ static void do_blit (struct RenderInfo *ri, int Bpp, *((uae_u32 *) dstp + i) = picasso_vidinfo.clut[srcp[i]]; break; default: + write_log ("ERROR - do_blit() failure2, %d!\n", psiz); abort (); break; } @@ -504,7 +500,7 @@ static void wgfx_do_flushline (void) uae_u8 *src, *dstp; /* Mark these lines as "dirty" */ - DX_Invalidate (wgfx_y, wgfx_y); + DX_Invalidate (0, wgfx_y, picasso_vidinfo.width, 1); if (!picasso_vidinfo.extra_mem) /* The "out" will flush the dirty lines directly */ goto out; @@ -515,7 +511,8 @@ static void wgfx_do_flushline (void) src = gfxmemory + wgfx_min; - if (picasso_vidinfo.rgbformat == picasso96_state.RGBFormat) { + if (picasso_vidinfo.rgbformat == picasso96_state.RGBFormat) + { dstp += wgfx_y * picasso_vidinfo.rowbytes + wgfx_min - wgfx_linestart; // memcpy (dstp, src, wgfx_max - wgfx_min); switch (GetBytesPerPixel(picasso_vidinfo.rgbformat)) @@ -529,13 +526,16 @@ static void wgfx_do_flushline (void) default: memcpy (dstp, src, wgfx_max - wgfx_min); } - } else { + } + else + { int width = wgfx_max - wgfx_min; int i; int psiz = GetBytesPerPixel (picasso_vidinfo.rgbformat); if (picasso96_state.RGBFormat != RGBFB_CHUNKY) { + write_log ("ERROR - wgfx_do_flushline() failure, %d!\n", picasso96_state.RGBFormat); abort (); } @@ -550,6 +550,7 @@ static void wgfx_do_flushline (void) *((uae_u32 *) dstp + i) = picasso_vidinfo.clut[src[i]]; break; default: + write_log ("ERROR - wgfx_do_flushline() failure2, %d!\n", psiz); abort (); break; } @@ -580,7 +581,9 @@ static int renderinfo_is_current_screen (struct RenderInfo *ri) /* * Fill a rectangle in the screen. */ -STATIC_INLINE void do_fillrect_frame_buffer (struct RenderInfo *ri, int X, int Y, int Width, int Height, uae_u32 Pen, int Bpp, RGBFTYPE RGBFormat) +STATIC_INLINE void do_fillrect_frame_buffer (struct RenderInfo *ri, int X, int Y, + int Width, int Height, uae_u32 Pen, int Bpp, + RGBFTYPE RGBFormat) { int cols; uae_u8 *start, *oldstart; @@ -590,18 +593,21 @@ STATIC_INLINE void do_fillrect_frame_buffer (struct RenderInfo *ri, int X, int Y /* Do our virtual frame-buffer memory. First, we do a single line fill by hand */ oldstart = start = src = ri->Memory + X * Bpp + Y * ri->BytesPerRow; - switch (Bpp) { + switch (Bpp) + { case 1: memset (start, Pen, Width); break; case 2: - for (cols = 0; cols < Width; cols++) { + for (cols = 0; cols < Width; cols++) + { do_put_mem_word ((uae_u16 *)start, (uae_u16)Pen); start += 2; } break; case 3: - for (cols = 0; cols < Width; cols++) { + for (cols = 0; cols < Width; cols++) + { do_put_mem_byte (start, (uae_u8)Pen); start++; *(uae_u16 *)(start) = (Pen & 0x00FFFF00) >> 8; @@ -609,29 +615,37 @@ STATIC_INLINE void do_fillrect_frame_buffer (struct RenderInfo *ri, int X, int Y } break; case 4: - for (cols = 0; cols < Width; cols++) { + for (cols = 0; cols < Width; cols++) + { + /**start = Pen; */ do_put_mem_long ((uae_u32 *)start, Pen); start += 4; } break; - } /* switch (Bpp) */ + } src = oldstart; dst = src + ri->BytesPerRow; /* next, we do the remaining line fills via memcpy() for > 1 BPP, otherwise some more memset() calls */ - if (Bpp > 1) { - for (lines = 0; lines < (Height - 1); lines++, dst += ri->BytesPerRow) + if (Bpp > 1) + { + for (lines = 0; lines < Height - 1; lines++, dst += ri->BytesPerRow) memcpy (dst, src, Width * Bpp); - } else { - for (lines = 0; lines < (Height - 1); lines++, dst += ri->BytesPerRow) + } + else + { + for (lines = 0; lines < Height - 1; lines++, dst += ri->BytesPerRow) memset( dst, Pen, Width ); } } void picasso_handle_vsync (void) { - rtarea[get_long (RTAREA_BASE + 36) + 12 - 1]++; + DX_Invalidate(-1, -1, -1, -1); //so a flushpixel is done every vsync if pixel are in buffer + + if (uae_boot_rom) + rtarea[get_long (rtarea_base + 36) + 12 - 1]++; if (palette_changed) { DX_SetPalette (0, 256); @@ -670,30 +684,34 @@ void picasso_refresh ( int call_setpalette ) ri.BytesPerRow = picasso96_state.BytesPerRow; ri.RGBFormat = (RGBFTYPE)picasso96_state.RGBFormat; - if (set_panning_called) { + if (set_panning_called) + { width = ( picasso96_state.VirtualWidth < picasso96_state.Width ) ? picasso96_state.VirtualWidth : picasso96_state.Width; height = ( picasso96_state.VirtualHeight < picasso96_state.Height ) ? picasso96_state.VirtualHeight : picasso96_state.Height; - } else { + } + else + { width = picasso96_state.Width; height = picasso96_state.Height; } do_blit (&ri, picasso96_state.BytesPerPixel, 0, 0, 0, 0, width, height, BLIT_SRC, 0); - } else + } + else + { write_log ("ERROR - picasso_refresh() can't refresh!\n"); + } } /* * Functions to perform an action on the frame-buffer */ -STATIC_INLINE void do_blitrect_frame_buffer (struct RenderInfo *ri, - struct RenderInfo *dstri, - unsigned long srcx, unsigned long srcy, - unsigned long dstx, unsigned long dsty, - unsigned long width, unsigned long height, - uae_u8 mask, BLIT_OPCODE opcode) +STATIC_INLINE void do_blitrect_frame_buffer (struct RenderInfo *ri, struct + RenderInfo *dstri, unsigned long srcx, unsigned long srcy, + unsigned long dstx, unsigned long dsty, unsigned long width, unsigned + long height, uae_u8 mask, BLIT_OPCODE opcode) { uae_u8 *src, *dst, *tmp, *tmp2, *tmp3; uae_u8 Bpp = GetBytesPerPixel (ri->RGBFormat); @@ -705,22 +723,30 @@ STATIC_INLINE void do_blitrect_frame_buffer (struct RenderInfo *ri, src = ri->Memory + srcx*Bpp + srcy*ri->BytesPerRow; dst = dstri->Memory + dstx*Bpp + dsty*dstri->BytesPerRow; - if (mask != 0xFF && Bpp > 1) { + if (mask != 0xFF && Bpp > 1) + { write_log ("WARNING - BlitRect() has mask 0x%x with Bpp %d.\n", mask, Bpp); } - if (mask == 0xFF || Bpp > 1) { - if( opcode == BLIT_SRC ) { + if (mask == 0xFF || Bpp > 1) + { + if( opcode == BLIT_SRC ) + { /* handle normal case efficiently */ - if (ri->Memory == dstri->Memory && dsty == srcy) { + if (ri->Memory == dstri->Memory && dsty == srcy) + { unsigned long i; for (i = 0; i < height; i++, src += ri->BytesPerRow, dst += dstri->BytesPerRow) memmove (dst, src, total_width); - } else if (dsty < srcy) { + } + else if (dsty < srcy) + { unsigned long i; for (i = 0; i < height; i++, src += ri->BytesPerRow, dst += dstri->BytesPerRow) memcpy (dst, src, total_width); - } else { + } + else + { unsigned long i; src += (height-1) * ri->BytesPerRow; dst += (height-1) * dstri->BytesPerRow; @@ -728,7 +754,9 @@ STATIC_INLINE void do_blitrect_frame_buffer (struct RenderInfo *ri, memcpy (dst, src, total_width); } return; - } else { + } + else + { uae_u8 *src2 = src; uae_u8 *dst2 = dst; uae_u32 *src2_32 = (uae_u32*)src; @@ -741,7 +769,8 @@ STATIC_INLINE void do_blitrect_frame_buffer (struct RenderInfo *ri, //copy now the longs for( src2_32 = (uae_u32 *)src, dst2_32 = (uae_u32 *)dst; src2_32 < (uae_u32 *)bound; src2_32++, dst2_32++ ) /* Horizontal bytes */ { - switch( opcode ) { + switch( opcode ) + { case BLIT_FALSE: *dst2_32 = 0; break; @@ -806,7 +835,8 @@ STATIC_INLINE void do_blitrect_frame_buffer (struct RenderInfo *ri, //now copy the rest few bytes for (src2 = (uae_u8 *)src2_32, dst2 = (uae_u8 *)dst2_32; src2 < src + total_width; src2++, dst2++ ) /* Horizontal bytes */ { - switch( opcode ) { + switch( opcode ) + { case BLIT_FALSE: *dst2 = 0; break; @@ -881,12 +911,16 @@ STATIC_INLINE void do_blitrect_frame_buffer (struct RenderInfo *ri, /* copy the src-rect into our temporary buffer space */ for (lines = 0; lines < height; lines++, src += ri->BytesPerRow, tmp2 += linewidth) + { memcpy (tmp2, src, total_width); + } /* copy the temporary buffer to the destination */ - for (lines = 0; lines < height; lines++, dst += dstri->BytesPerRow, tmp += linewidth) { + for (lines = 0; lines < height; lines++, dst += dstri->BytesPerRow, tmp += linewidth) + { unsigned long cols; - for (cols = 0; cols < width; cols++) { + for (cols = 0; cols < width; cols++) + { dst[cols] &= ~mask; dst[cols] |= tmp[cols] & mask; } @@ -935,8 +969,7 @@ uae_u32 REGPARAM2 picasso_FindCard (struct regstruct *regs) if (allocated_gfxmem && !picasso96_state.CardFound) { /* Fill in MemoryBase, MemorySize */ put_long (AmigaBoardInfo + PSSO_BoardInfo_MemoryBase, gfxmem_start); - /* size of memory, minus a 32K chunk: 16K for pattern bitmaps, 16K for resolution list */ - put_long (AmigaBoardInfo + PSSO_BoardInfo_MemorySize, allocated_gfxmem - 32768); + put_long (AmigaBoardInfo + PSSO_BoardInfo_MemorySize, allocated_gfxmem); picasso96_state.CardFound = 1; /* mark our "card" as being found */ @@ -947,7 +980,8 @@ uae_u32 REGPARAM2 picasso_FindCard (struct regstruct *regs) static void FillBoardInfo (uaecptr amigamemptr, struct LibResolution *res, struct PicassoResolution *dm) { - char *uaememptr; + int i; + switch (dm->depth) { case 1: res->Modes[CHUNKY] = amigamemptr; @@ -962,8 +996,8 @@ static void FillBoardInfo (uaecptr amigamemptr, struct LibResolution *res, struc res->Modes[TRUEALPHA] = amigamemptr; break; } - uaememptr = (char *)gfxmem_xlate (amigamemptr); /* I know that amigamemptr is inside my gfxmem chunk, so I can just do the xlate() */ - memset (uaememptr, 0, PSSO_ModeInfo_sizeof); /* zero out our ModeInfo struct */ + for (i = 0; i < PSSO_ModeInfo_sizeof; i++) + put_byte (amigamemptr + i, 0); put_word (amigamemptr + PSSO_ModeInfo_Width, dm->res.width); put_word (amigamemptr + PSSO_ModeInfo_Height, dm->res.height); @@ -984,35 +1018,218 @@ static void FillBoardInfo (uaecptr amigamemptr, struct LibResolution *res, struc put_byte (amigamemptr + PSSO_ModeInfo_first_union, 98); put_byte (amigamemptr + PSSO_ModeInfo_second_union, 14); - put_long (amigamemptr + PSSO_ModeInfo_PixelClock, dm->res.width * dm->res.height * (currprefs.gfx_refreshrate ? abs (currprefs.gfx_refreshrate) : 60)); + put_long (amigamemptr + PSSO_ModeInfo_PixelClock, + dm->res.width * dm->res.height * (currprefs.gfx_refreshrate ? abs (currprefs.gfx_refreshrate) : 50)); } -static int AssignModeID(int i, int count) +struct modeids { + int width, height; + int id; +}; +static struct modeids mi[] = { - int result; - if (DisplayModes[i].res.width == 320 && DisplayModes[i].res.height == 200) - result = 0x50001000; - else if (DisplayModes[i].res.width == 320 && DisplayModes[i].res.height == 240) - result = 0x50011000; - else if (DisplayModes[i].res.width == 640 && DisplayModes[i].res.height == 400) - result = 0x50021000; - else if (DisplayModes[i].res.width == 640 && DisplayModes[i].res.height == 480) - result = 0x50031000; - else if (DisplayModes[i].res.width == 800 && DisplayModes[i].res.height == 600) - result = 0x50041000; - else if (DisplayModes[i].res.width == 1024 && DisplayModes[i].res.height == 768) - result = 0x50051000; - else if (DisplayModes[i].res.width == 1152 && DisplayModes[i].res.height == 864) - result = 0x50061000; - else if (DisplayModes[i].res.width == 1280 && DisplayModes[i].res.height == 1024) - result = 0x50071000; - else if (DisplayModes[i].res.width == 1600 && DisplayModes[i].res.height == 1280) - result = 0x50081000; - else - result = 0x50091000 + count * 0x10000; - return result; +/* "original" modes */ + + 320, 200, 0, + 320, 240, 1, + 640, 400, 2, + 640, 480, 3, + 800, 600, 4, + 1024, 768, 5, + 1152, 864, 6, + 1280,1024, 7, + 1600,1280, 8, + +/* new modes */ + + 704, 480, 129, + 704, 576, 130, + 720, 480, 131, + 720, 576, 132, + 768, 483, 133, + 768, 576, 134, + 800, 480, 135, + 848, 480, 136, + 854, 480, 137, + 948, 576, 138, + 1024, 576, 139, + 1152, 768, 140, + 1152, 864, 141, + 1280, 720, 142, + 1280, 768, 143, + 1280, 800, 144, + 1280, 854, 145, + 1280, 960, 146, + 1366, 768, 147, + 1440, 900, 148, + 1440, 960, 149, + 1600,1200, 150, + 1680,1050, 151, + 1920,1080, 152, + 1920,1200, 153, + 2048,1152, 154, + 2048,1536, 155, + 2560,1600, 156, + 2560,2048, 157, + 400, 300, 158, + 512, 384, 159, + 640, 432, 160, + 1360, 768, 161, + 1360,1024, 162, + 1400,1050, 163, + 1792,1344, 164, + 1800,1440, 165, + 1856,1392, 166, + 1920,1440, 167, + 480, 360, 168, + 640, 350, 169, + 1600, 900, 170, + 960, 600, 171, + 1088, 612, 172, + -1,-1,0 +}; + +static int AssignModeID(int dm, int count, int *unkcnt) +{ + int i, w, h; + + w = newmodes[dm].res.width; + h = newmodes[dm].res.height; + for (i = 0; mi[i].width > 0; i++) { + if (w == mi[i].width && h == mi[i].height) + return 0x50001000 | (mi[i].id * 0x10000); + } + (*unkcnt)++; + write_log("P96: Non-unique mode %dx%d\n", w, h); + return 0x51000000 - (*unkcnt) * 0x10000; } +static uaecptr picasso96_amem, picasso96_amemend; + +static void CopyLibResolutionStructureU2A (struct LibResolution *libres, uaecptr amigamemptr) +{ + int i; + + for (i = 0; i < PSSO_LibResolution_sizeof; i++) + put_byte (amigamemptr + i, 0); + for (i = 0; i < strlen (libres->P96ID); i++) + put_byte (amigamemptr + PSSO_LibResolution_P96ID + i, libres->P96ID[i]); + put_long (amigamemptr + PSSO_LibResolution_DisplayID, libres->DisplayID); + put_word (amigamemptr + PSSO_LibResolution_Width, libres->Width); + put_word (amigamemptr + PSSO_LibResolution_Height, libres->Height); + put_word (amigamemptr + PSSO_LibResolution_Flags, libres->Flags); + for (i = 0; i < MAXMODES; i++) + put_long (amigamemptr + PSSO_LibResolution_Modes + i * 4, libres->Modes[i]); + put_long (amigamemptr + 10, amigamemptr + PSSO_LibResolution_P96ID); + put_long (amigamemptr + PSSO_LibResolution_BoardInfo, libres->BoardInfo); +} + +static int missmodes[] = { 640, 400, 640, 480, 800, 480, -1 }; + +void picasso96_alloc (TrapContext *ctx) +{ + int i, j, size, cnt; + int misscnt; + + if(newmodes != 0) + xfree (newmodes); + newmodes = NULL; + picasso96_amem = picasso96_amemend = 0; + if (currprefs.gfxmem_size == 0) + return; + misscnt = 0; + cnt = 0; + newmodes = (struct PicassoResolution*) xmalloc (sizeof (struct PicassoResolution) * MAX_PICASSO_MODES); + size = 0; + i = 0; + while (DisplayModes[i].depth >= 0) { + for (j = 0; missmodes[j * 2] >= 0; j++) { + if (DisplayModes[i].res.width == missmodes[j * 2 + 0] && DisplayModes[i].res.height == missmodes[j * 2 + 1]) { + missmodes[j * 2 + 0] = 0; + missmodes[j * 2 + 1] = 0; + } + } + i++; + } + + i = 0; + while (DisplayModes[i].depth >= 0) { + j = i; + size += PSSO_LibResolution_sizeof; + while (missmodes[misscnt * 2] == 0) + misscnt++; + if (missmodes[misscnt * 2] >= 0) { + int oldi = i; + if (DisplayModes[i].res.width > missmodes[misscnt * 2 + 0] || DisplayModes[i].res.height > missmodes[misscnt * 2 + 1]) { + int w = DisplayModes[i].res.width; + int h = DisplayModes[i].res.height; + do { + struct PicassoResolution *pr = &newmodes[cnt]; + memcpy (pr, &DisplayModes[i], sizeof (struct PicassoResolution)); + pr->res.width = missmodes[misscnt * 2 + 0]; + pr->res.height = missmodes[misscnt * 2 + 1]; + sprintf (pr->name, "%dx%dx%d FAKE", pr->res.width, pr->res.height, pr->depth * 8); + size += PSSO_ModeInfo_sizeof; + i++; + cnt++; + } while (DisplayModes[i].depth >= 0 + && w == DisplayModes[i].res.width + && h == DisplayModes[i].res.height); + + i = oldi; + misscnt++; + continue; + } + } + do { + memcpy (&newmodes[cnt], &DisplayModes[i], sizeof (struct PicassoResolution)); + size += PSSO_ModeInfo_sizeof; + i++; + cnt++; + } while (DisplayModes[i].depth >= 0 + && DisplayModes[i].res.width == DisplayModes[j].res.width + && DisplayModes[i].res.height == DisplayModes[j].res.height); + } + newmodes[cnt].depth = -1; + + for (i = 0; i < cnt; i++) { +// sprintf (DisplayModes[i].name, "%dx%d, %d-bit, %d Hz", +// DisplayModes[i].res.width, DisplayModes[i].res.height, DisplayModes[i].depth * 8, DisplayModes[i].refresh); + switch (newmodes[i].depth) { + case 1: + if (newmodes[i].res.width > chunky.width) + chunky.width = newmodes[i].res.width; + if (newmodes[i].res.height > chunky.height) + chunky.height = newmodes[i].res.height; + break; + case 2: + if (newmodes[i].res.width > hicolour.width) + hicolour.width = newmodes[i].res.width; + if (newmodes[i].res.height > hicolour.height) + hicolour.height = newmodes[i].res.height; + break; + case 3: + if (newmodes[i].res.width > truecolour.width) + truecolour.width = newmodes[i].res.width; + if (newmodes[i].res.height > truecolour.height) + truecolour.height = newmodes[i].res.height; + break; + case 4: + if (newmodes[i].res.width > alphacolour.width) + alphacolour.width = newmodes[i].res.width; + if (newmodes[i].res.height > alphacolour.height) + alphacolour.height = newmodes[i].res.height; + break; + } + } + + m68k_dreg (&ctx->regs, 0) = size; + m68k_dreg (&ctx->regs, 1) = 65536 + 1; + picasso96_amem = CallLib (ctx, get_long (4), -0xC6); /* AllocMem */ + picasso96_amemend = picasso96_amem + size; +} + + /**************************************** * InitCard() * @@ -1032,10 +1249,17 @@ static int AssignModeID(int i, int count) uae_u32 REGPARAM2 picasso_InitCard (struct regstruct *regs) { struct LibResolution res; - int i; int ModeInfoStructureCount = 1, LibResolutionStructureCount = 0; - uaecptr amigamemptr = 0; + int i, j, unkcnt; + + uaecptr amem; uaecptr AmigaBoardInfo = m68k_areg (regs, 2); + if (!picasso96_amem) { + write_log ("P96: InitCard() but no resolution memory!\n"); + return 0; + } + amem = picasso96_amem; + put_word (AmigaBoardInfo + PSSO_BoardInfo_BitsPerCannon, DX_BitsPerCannon ()); put_word (AmigaBoardInfo + PSSO_BoardInfo_RGBFormats, picasso96_pixel_format); put_long (AmigaBoardInfo + PSSO_BoardInfo_BoardType, BT_uaegfx); @@ -1051,17 +1275,18 @@ uae_u32 REGPARAM2 picasso_InitCard (struct regstruct *regs) put_word (AmigaBoardInfo + PSSO_BoardInfo_MaxVerResolution + 6, truecolour.height); put_word (AmigaBoardInfo + PSSO_BoardInfo_MaxVerResolution + 8, alphacolour.height); - for (i = 0; i < mode_count;) { - int j = i; + i = 0; + unkcnt = 0; + while (newmodes[i].depth >= 0) { + j = i; /* Add a LibResolution structure to the ResolutionsList MinList in our BoardInfo */ - res.DisplayID = AssignModeID (i, LibResolutionStructureCount); + res.DisplayID = AssignModeID (i, LibResolutionStructureCount, &unkcnt); res.BoardInfo = AmigaBoardInfo; - res.Width = DisplayModes[i].res.width; - res.Height = DisplayModes[i].res.height; + res.Width = newmodes[i].res.width; + res.Height = newmodes[i].res.height; res.Flags = P96F_PUBLIC; memcpy (res.P96ID, "P96-0:", 6); - strcpy (res.Name, "uaegfx:"); - strncat (res.Name, DisplayModes[i].name, strchr (DisplayModes[i].name, ',') - DisplayModes[i].name); + sprintf (res.Name, "uaegfx:%dx%d", res.Width, res.Height); res.Modes[PLANAR] = 0; res.Modes[CHUNKY] = 0; res.Modes[HICOLOR] = 0; @@ -1071,27 +1296,27 @@ uae_u32 REGPARAM2 picasso_InitCard (struct regstruct *regs) do { /* Handle this display mode's depth */ /* New: Only add the modes when there is enough P96 RTG memory to hold the bitmap */ - if ((allocated_gfxmem - 32768) > - (DisplayModes[i].res.width * DisplayModes[i].res.height * DisplayModes[i].depth)) - { - amigamemptr = gfxmem_start + allocated_gfxmem - (PSSO_ModeInfo_sizeof * ModeInfoStructureCount++); - FillBoardInfo (amigamemptr, &res, &DisplayModes[i]); + if (allocated_gfxmem >= newmodes[i].res.width * newmodes[i].res.height * newmodes[i].depth) { + ModeInfoStructureCount++; + FillBoardInfo (amem, &res, &newmodes[i]); + amem += PSSO_ModeInfo_sizeof; } i++; - } while (i < mode_count - && DisplayModes[i].res.width == DisplayModes[j].res.width - && DisplayModes[i].res.height == DisplayModes[j].res.height); + } while (newmodes[i].depth >= 0 + && newmodes[i].res.width == newmodes[j].res.width + && newmodes[i].res.height == newmodes[j].res.height); - amigamemptr = gfxmem_start + allocated_gfxmem - 16384 + (PSSO_LibResolution_sizeof * LibResolutionStructureCount++); - CopyLibResolutionStructureU2A (&res, amigamemptr); - AmigaListAddTail (AmigaBoardInfo + PSSO_BoardInfo_ResolutionsList, amigamemptr); + LibResolutionStructureCount++; + CopyLibResolutionStructureU2A (&res, amem); + AmigaListAddTail (AmigaBoardInfo + PSSO_BoardInfo_ResolutionsList, amem); + amem += PSSO_LibResolution_sizeof; } + if (amem > picasso96_amemend) + write_log ("P96: display resolution list corruption %08x<>%08x (%d)\n", amem, picasso96_amemend, i); return -1; } -extern int x_size, y_size; - /* * SetSwitch: * a0: struct BoardInfo @@ -1118,8 +1343,11 @@ uae_u32 REGPARAM2 picasso_SetSwitch (struct regstruct *regs) return !flag; } +static void init_picasso_screen(void); void picasso_enablescreen (int on) { + if (!init_picasso_screen_called) + init_picasso_screen(); wgfx_linestart = 0xFFFFFFFF; picasso_refresh (1); write_log ("picasso_enablescreen() showing %s screen\n", on ? "picasso96": "amiga"); @@ -1185,7 +1413,7 @@ uae_u32 REGPARAM2 picasso_SetDAC (struct regstruct *regs) static void init_picasso_screen (void) { if (set_panning_called) { - picasso96_state.Extent = picasso96_state.Address + (picasso96_state.BytesPerRow * picasso96_state.VirtualHeight); + picasso96_state.Extent = picasso96_state.Address + picasso96_state.BytesPerRow * picasso96_state.VirtualHeight; } if (set_gc_called) { @@ -1200,6 +1428,7 @@ static void init_picasso_screen (void) DX_SetPalette (0, 256); picasso_refresh (1); } + init_picasso_screen_called = 1; } /* @@ -1258,6 +1487,14 @@ uae_u32 REGPARAM2 picasso_SetGC (struct regstruct *regs) * background here than in SetSwitch() derived functions, * because SetSwitch() is not called for subsequent Picasso screens. */ + +static void picasso_SetPanningInit(void) +{ + picasso96_state.XYOffset = picasso96_state.Address + (picasso96_state.XOffset * picasso96_state.BytesPerPixel) + + (picasso96_state.YOffset * picasso96_state.BytesPerRow); + picasso96_state.BytesPerRow = picasso96_state.VirtualWidth * picasso96_state.BytesPerPixel; +} + uae_u32 REGPARAM2 picasso_SetPanning (struct regstruct *regs) { uae_u16 Width = m68k_dreg (regs, 0); @@ -1276,8 +1513,7 @@ uae_u32 REGPARAM2 picasso_SetPanning (struct regstruct *regs) picasso96_state.VirtualHeight = bme_height; picasso96_state.RGBFormat = m68k_dreg (regs, 7); picasso96_state.BytesPerPixel = GetBytesPerPixel (picasso96_state.RGBFormat); - picasso96_state.BytesPerRow = bme_width * picasso96_state.BytesPerPixel; - + picasso_SetPanningInit(); set_panning_called = 1; init_picasso_screen (); set_panning_called = 0; @@ -1327,9 +1563,12 @@ uae_u32 REGPARAM2 picasso_InvertRect (struct regstruct *regs) wgfx_flushline (); - if (CopyRenderInfoStructureA2U (renderinfo, &ri)) { + if (CopyRenderInfoStructureA2U (renderinfo, &ri)) + { if (mask != 0xFF && Bpp > 1) + { mask = 0xFF; + } xorval = 0x01010101 * (mask & 0xFF); width_in_bytes = Bpp * Width; @@ -1388,7 +1627,8 @@ uae_u32 REGPARAM2 picasso_FillRect (struct regstruct *regs) wgfx_flushline (); - if (CopyRenderInfoStructureA2U (renderinfo, &ri) && Y != 0xFFFF) { + if (CopyRenderInfoStructureA2U (renderinfo, &ri) && Y != 0xFFFF) + { if (ri.RGBFormat != RGBFormat) write_log ("Weird Stuff!\n"); @@ -1397,56 +1637,26 @@ uae_u32 REGPARAM2 picasso_FillRect (struct regstruct *regs) if (Bpp > 1) Mask = 0xFF; - if (Mask == 0xFF) { - if ((Width == 1) || (Height == 1)) { - int i; - uaecptr addr; - if (renderinfo_is_current_screen (&ri)) { - uae_u32 diff = gfxmem_start - (uae_u32)gfxmemory; - addr = (uaecptr)ri.Memory + X * Bpp + Y * ri.BytesPerRow + diff; - - if (Width == 1) { - for (i = 0; i < Height; i++) { - if( Bpp == 4 ) - gfxmem_lput (addr + (i * picasso96_state.BytesPerRow), Pen); - else if (Bpp == 2) - gfxmem_wput (addr + (i * picasso96_state.BytesPerRow), Pen); - else - gfxmem_bput (addr + (i * picasso96_state.BytesPerRow), Pen); - } - } else if (Height == 1) { - for (i = 0; i < Width; i++) { - if (Bpp == 4) - gfxmem_lput (addr + (i*Bpp), Pen); - else if (Bpp == 2) - gfxmem_wput (addr + (i*Bpp), Pen); - else - gfxmem_bput( addr + (i*Bpp), Pen ); - } - } - return 1; - } - } - + if (Mask == 0xFF) + { /* Do the fill-rect in the frame-buffer */ do_fillrect_frame_buffer (&ri, X, Y, Width, Height, Pen, Bpp, RGBFormat); /* Now we do the on-screen display, if renderinfo points to it */ - if (renderinfo_is_current_screen (&ri)) { + if (renderinfo_is_current_screen (&ri)) + { src = ri.Memory + X * Bpp + Y * ri.BytesPerRow; X = X - picasso96_state.XOffset; Y = Y - picasso96_state.YOffset; - if ((int)X < 0) - {Width = Width + X; X=0;} - if ((int)Width < 1) - return 1; - if ((int)Y < 0) - {Height = Height + Y; Y=0;} - if ((int)Height < 1) - return 1; + if ((int)X < 0) { Width = Width + X; X = 0; } + if ((int)Width < 1) return 1; + if ((int)Y < 0) { Height = Height + Y; Y = 0; } + if ((int)Height < 1) return 1; /* Argh - why does P96Speed do this to me, with FillRect only?! */ - if ((X < picasso96_state.Width) && (Y < picasso96_state.Height)) { + if ((X < picasso96_state.Width) && + (Y < picasso96_state.Height)) + { if (X + Width > picasso96_state.Width) Width = picasso96_state.Width - X; if (Y+Height > picasso96_state.Height) @@ -1456,21 +1666,28 @@ uae_u32 REGPARAM2 picasso_FillRect (struct regstruct *regs) } } result = 1; - } else { + } + else + { /* We get here only if Mask != 0xFF */ - if (Bpp != 1) { + if (Bpp != 1) + { write_log( "WARNING - FillRect() has unhandled mask 0x%x with Bpp %d. Using fall-back routine.\n", Mask, Bpp); - } else { + } + else + { Pen &= Mask; Mask = ~Mask; oldstart = ri.Memory + Y * ri.BytesPerRow + X * Bpp; { uae_u8 *start = oldstart; uae_u8 *end = start + Height * ri.BytesPerRow; - for (; start != end; start += ri.BytesPerRow) { + for (; start != end; start += ri.BytesPerRow) + { uae_u8 *p = start; unsigned long cols; - for (cols = 0; cols < Width; cols++) { + for (cols = 0; cols < Width; cols++) + { uae_u32 tmpval = do_get_mem_byte (p + cols) & Mask; do_put_mem_byte (p + cols, (uae_u8)(Pen | tmpval)); } @@ -1542,7 +1759,8 @@ STATIC_INLINE int BlitRectHelper( void ) unsigned long linewidth = (total_width + 15) & ~15; int can_do_visible_blit = 0; - if (opcode == BLIT_DST) { + if (opcode == BLIT_DST) + { write_log( "WARNING: BlitRect() being called with opcode of BLIT_DST\n" ); return 1; } @@ -1555,8 +1773,10 @@ STATIC_INLINE int BlitRectHelper( void ) * If we have a destination RenderInfo, then we've been called from picasso_BlitRectNoMaskComplete() * and we need to put the results on the screen from the frame-buffer. */ - if (dstri == NULL || dstri->Memory == ri->Memory) { - if (mask != 0xFF && Bpp > 1) { + if (dstri == NULL || dstri->Memory == ri->Memory) + { + if (mask != 0xFF && Bpp > 1) + { mask = 0xFF; } dstri = ri; @@ -1567,7 +1787,8 @@ STATIC_INLINE int BlitRectHelper( void ) do_blitrect_frame_buffer (ri, dstri, srcx, srcy, dstx, dsty, width, height, mask, opcode); /* Now we do the on-screen display, if renderinfo points to it */ - if (renderinfo_is_current_screen (dstri)) { + if (renderinfo_is_current_screen (dstri)) + { if (mask == 0xFF || Bpp > 1) { if (can_do_visible_blit) do_blit (dstri, Bpp, srcx, srcy, dstx, dsty, width, height, opcode, 1); @@ -1589,10 +1810,12 @@ STATIC_INLINE int BlitRect (uaecptr ri, uaecptr dstri, CopyRenderInfoStructureA2U( ri, &blitrectdata.ri_struct ); blitrectdata.ri = &blitrectdata.ri_struct; - if (dstri) { + if (dstri) + { CopyRenderInfoStructureA2U( dstri, &blitrectdata.dstri_struct ); blitrectdata.dstri = &blitrectdata.dstri_struct; - } else + } + else { blitrectdata.dstri = NULL; } @@ -1782,7 +2005,8 @@ uae_u32 REGPARAM2 picasso_BlitPattern (struct regstruct *regs) wgfx_flushline (); - if (CopyRenderInfoStructureA2U (rinf, &ri) && CopyPatternStructureA2U (pinf, &pattern)) { + if (CopyRenderInfoStructureA2U (rinf, &ri) && CopyPatternStructureA2U (pinf, &pattern)) + { Bpp = GetBytesPerPixel (ri.RGBFormat); uae_mem = ri.Memory + Y*ri.BytesPerRow + X*Bpp; /* offset with address */ @@ -1791,7 +2015,8 @@ uae_u32 REGPARAM2 picasso_BlitPattern (struct regstruct *regs) pattern.DrawMode &= 0x03; - if (Mask != 0xFF) { + if (Mask != 0xFF) + { if( Bpp > 1 ) Mask = 0xFF; @@ -1803,12 +2028,14 @@ uae_u32 REGPARAM2 picasso_BlitPattern (struct regstruct *regs) { result = 1; } - } else + } + else { result = 1; } - if (result) { + if (result) + { ysize_mask = (1 << pattern.Size) - 1; xshift = pattern.XOffset & 15; @@ -1821,7 +2048,8 @@ uae_u32 REGPARAM2 picasso_BlitPattern (struct regstruct *regs) if (xshift != 0) d = (d << xshift) | (d >> (16 - xshift)); - for (cols = 0; cols < W; cols += 16, uae_mem2 += Bpp << 4) { + for (cols = 0; cols < W; cols += 16, uae_mem2 += Bpp << 4) + { long bits; long max = W - cols; unsigned int data = d; @@ -1829,7 +2057,8 @@ uae_u32 REGPARAM2 picasso_BlitPattern (struct regstruct *regs) if (max > 16) max = 16; - for (bits = 0; bits < max; bits++) { + for (bits = 0; bits < max; bits++) + { int bit_set = data & 0x8000; data <<= 1; switch (pattern.DrawMode) { @@ -1855,7 +2084,7 @@ uae_u32 REGPARAM2 picasso_BlitPattern (struct regstruct *regs) case 1: { uae_u8 *addr = uae_mem2 + bits; - do_put_mem_byte (addr, (uae_u8)(do_get_mem_byte (addr) ^ fgpen)); + do_put_mem_byte (addr, (uae_u8)(do_get_mem_byte (addr) ^ 0xff)); } break; case 2: @@ -1876,17 +2105,18 @@ uae_u32 REGPARAM2 picasso_BlitPattern (struct regstruct *regs) do_put_mem_long (addr, do_get_mem_long (addr) ^ fgpen); } break; - } /* switch (Bpp) */ + } } break; - } /* switch (pattern.DrawMode) */ - } /* for (bits) */ - } /* for (cols) */ - } /* for (rows) */ + } + } + } + } /* If we need to update a second-buffer (extra_mem is set), then do it only if visible! */ - if (picasso_vidinfo.extra_mem && renderinfo_is_current_screen (&ri)) - do_blit( &ri, Bpp, X, Y, X, Y, W, H, BLIT_SRC, 0); + if (picasso_vidinfo.extra_mem && renderinfo_is_current_screen (&ri)) { + do_blit( &ri, Bpp, X, Y, X, Y, W, H, BLIT_SRC, 0); + } result = 1; } @@ -1938,7 +2168,8 @@ uae_u32 REGPARAM2 picasso_BlitTemplate (struct regstruct *regs) wgfx_flushline (); - if (CopyRenderInfoStructureA2U (rinf, &ri) && CopyTemplateStructureA2U (tmpl, &tmp)) { + if (CopyRenderInfoStructureA2U (rinf, &ri) && CopyTemplateStructureA2U (tmpl, &tmp)) + { Bpp = GetBytesPerPixel (ri.RGBFormat); uae_mem = ri.Memory + Y*ri.BytesPerRow + X*Bpp; /* offset into address */ @@ -1947,18 +2178,26 @@ uae_u32 REGPARAM2 picasso_BlitTemplate (struct regstruct *regs) tmp.DrawMode &= 0x03; - if (Mask != 0xFF) { + if (Mask != 0xFF) + { if (Bpp > 1) Mask = 0xFF; - if (tmp.DrawMode == COMP) { + if (tmp.DrawMode == COMP) + { write_log ("WARNING - BlitTemplate() has unhandled mask 0x%x with COMP DrawMode. Using fall-back routine.\n", Mask); return 0; - } else + } + else + { result = 1; - } else + } + } + else + { result = 1; + } #if 1 if (tmp.DrawMode == COMP) { /* workaround, let native blitter handle COMP mode */ @@ -1966,7 +2205,8 @@ uae_u32 REGPARAM2 picasso_BlitTemplate (struct regstruct *regs) } #endif - if (result) { + if (result) + { bitoffset = tmp.XOffset % 8; tmpl_base = (uae_u8 *)tmp.Memory + tmp.XOffset / 8; @@ -2018,7 +2258,7 @@ uae_u32 REGPARAM2 picasso_BlitTemplate (struct regstruct *regs) case 1: { uae_u8 *addr = uae_mem2 + bits; - do_put_mem_byte (addr, (uae_u8) (do_get_mem_byte (addr) ^ fgpen)); + do_put_mem_byte (addr, (uae_u8) (do_get_mem_byte (addr) ^ 0xff)); } break; case 2: @@ -2039,17 +2279,18 @@ uae_u32 REGPARAM2 picasso_BlitTemplate (struct regstruct *regs) do_put_mem_long (addr, do_get_mem_long (addr) ^ fgpen); } break; - } /* switch (Bpp) */ - } /* if (bit_set) */ + } + } break; - } /* switch (tmp.DrawMode) */ - } /* for (bits) */ - } /* for (cols) */ - } /* for (rows) */ + } + } + } + } /* If we need to update a second-buffer (extra_mem is set), then do it only if visible! */ - if (picasso_vidinfo.extra_mem && renderinfo_is_current_screen (&ri)) + if (picasso_vidinfo.extra_mem && renderinfo_is_current_screen (&ri)) { do_blit (&ri, Bpp, X, Y, X, Y, W, H, BLIT_SRC, 0); + } result = 1; } @@ -2204,9 +2445,11 @@ uae_u32 REGPARAM2 picasso_BlitPlanar2Chunky (struct regstruct *regs) wgfx_flushline (); if (minterm != 0x0C) { - write_log ("ERROR - BlitPlanar2Chunky() has minterm 0x%x, which I don't handle. Using fall-back routine.\n", minterm); + write_log ("ERROR - BlitPlanar2Chunky() has minterm 0x%x, which I don't handle. Using fall-back routine.\n", + minterm); } - else if (CopyRenderInfoStructureA2U (ri, &local_ri) && CopyBitMapStructureA2U (bm, &local_bm)) + else if (CopyRenderInfoStructureA2U (ri, &local_ri) && + CopyBitMapStructureA2U (bm, &local_bm)) { PlanarToChunky (&local_ri, &local_bm, srcx, srcy, dstx, dsty, width, height, mask); if (renderinfo_is_current_screen (&local_ri)) @@ -2352,8 +2595,12 @@ uae_u32 REGPARAM2 picasso_BlitPlanar2Direct (struct regstruct *regs) wgfx_flushline (); if (minterm != 0x0C) { - write_log ("WARNING - BlitPlanar2Direct() has unhandled op-code 0x%x. Using fall-back routine.\n", minterm); - } else if (CopyRenderInfoStructureA2U (ri, &local_ri) && CopyBitMapStructureA2U (bm, &local_bm)) { + write_log ("WARNING - BlitPlanar2Direct() has unhandled op-code 0x%x. Using fall-back routine.\n", + minterm); + } + else if (CopyRenderInfoStructureA2U (ri, &local_ri) && + CopyBitMapStructureA2U (bm, &local_bm)) + { Mask = 0xFF; CopyColorIndexMappingA2U (cim, &local_cim); @@ -2366,34 +2613,35 @@ uae_u32 REGPARAM2 picasso_BlitPlanar2Direct (struct regstruct *regs) return result; } -static void write_gfx_long (uaecptr addr, uae_u32 value) +STATIC_INLINE void write_gfx_x (uaecptr addr, uae_u32 value, int size) { - uaecptr oldaddr = addr; int y; + uaecptr oldaddr = addr; if (!picasso_on) return; - + /* * Several writes to successive memory locations are a common access pattern. * Try to optimize it. */ - if (addr >= wgfx_linestart && addr + 4 <= wgfx_lineend) { + if (addr >= wgfx_linestart && addr + size <= wgfx_lineend) { if (addr < wgfx_min) wgfx_min = addr; - if (addr + 4 > wgfx_max) - wgfx_max = addr + 4; + if (addr + size > wgfx_max) + wgfx_max = addr + size; return; } else wgfx_flushline (); addr += gfxmem_start; /* Check to see if this needs to be written through to the display, or was it an "offscreen" area? */ - if (addr < picasso96_state.Address || addr + 4 > picasso96_state.Extent) + if (addr < picasso96_state.Address || addr + size >= picasso96_state.Extent) return; addr -= picasso96_state.Address+(picasso96_state.XOffset*picasso96_state.BytesPerPixel) +(picasso96_state.YOffset*picasso96_state.BytesPerRow); + y = addr / picasso96_state.BytesPerRow; if (y >= picasso96_state.Height) @@ -2402,86 +2650,7 @@ static void write_gfx_long (uaecptr addr, uae_u32 value) wgfx_lineend = wgfx_linestart + picasso96_state.BytesPerRow; wgfx_y = y; wgfx_min = oldaddr; - wgfx_max = oldaddr + 4; -} - -static void write_gfx_word (uaecptr addr, uae_u16 value) -{ - uaecptr oldaddr = addr; - int y; - - if (!picasso_on) - return; - - /* - * Several writes to successive memory locations are a common access pattern. - * Try to optimize it. - */ - if (addr >= wgfx_linestart && addr + 2 <= wgfx_lineend) { - if (addr < wgfx_min) - wgfx_min = addr; - if (addr + 2 > wgfx_max) - wgfx_max = addr + 2; - return; - } else - wgfx_flushline (); - - addr += gfxmem_start; - /* Check to see if this needs to be written through to the display, or was it an "offscreen" area? */ - if (addr < picasso96_state.Address || addr + 2 > picasso96_state.Extent) - return; - - addr -= picasso96_state.Address+(picasso96_state.XOffset*picasso96_state.BytesPerPixel) - +(picasso96_state.YOffset*picasso96_state.BytesPerRow); - - y = addr / picasso96_state.BytesPerRow; - - if (y >= picasso96_state.Height) - return; - wgfx_linestart = picasso96_state.Address - gfxmem_start + y * picasso96_state.BytesPerRow; - wgfx_lineend = wgfx_linestart + picasso96_state.BytesPerRow; - wgfx_y = y; - wgfx_min = oldaddr; - wgfx_max = oldaddr + 2; -} - -static void write_gfx_byte (uaecptr addr, uae_u8 value) -{ - uaecptr oldaddr = addr; - int y; - - if (!picasso_on) - return; - - /* - * Several writes to successive memory locations are a common access pattern. - * Try to optimize it. - */ - if (addr >= wgfx_linestart && addr + 4 <= wgfx_lineend) { - if (addr < wgfx_min) - wgfx_min = addr; - if (addr + 1 > wgfx_max) - wgfx_max = addr + 1; - return; - } else - wgfx_flushline (); - - addr += gfxmem_start; - /* Check to see if this needs to be written through to the display, or was it an "offscreen" area? */ - if (addr < picasso96_state.Address || addr + 1 > picasso96_state.Extent) - return; - addr -= picasso96_state.Address+(picasso96_state.XOffset*picasso96_state.BytesPerPixel) - +(picasso96_state.YOffset*picasso96_state.BytesPerRow); - - y = addr / picasso96_state.BytesPerRow; - - if (y >= picasso96_state.Height) - return; - wgfx_linestart = picasso96_state.Address - gfxmem_start + y * picasso96_state.BytesPerRow; - wgfx_lineend = wgfx_linestart + picasso96_state.BytesPerRow; - wgfx_y = y; - wgfx_min = oldaddr; - wgfx_max = oldaddr + 1; + wgfx_max = oldaddr + size; } static uae_u32 REGPARAM2 gfxmem_lget (uaecptr addr) @@ -2491,7 +2660,7 @@ static uae_u32 REGPARAM2 gfxmem_lget (uaecptr addr) #ifdef JIT special_mem |= S_READ; #endif - addr -= gfxmem_start /*& gfxmem_mask*/; + addr -= gfxmem_start; addr &= gfxmem_mask; m = (uae_u32 *)(gfxmemory + addr); return do_get_mem_long(m); @@ -2503,7 +2672,7 @@ static uae_u32 REGPARAM2 gfxmem_wget (uaecptr addr) #ifdef JIT special_mem |= S_READ; #endif - addr -= gfxmem_start /*& gfxmem_mask*/; + addr -= gfxmem_start; addr &= gfxmem_mask; m = (uae_u16 *)(gfxmemory + addr); return do_get_mem_word(m); @@ -2515,7 +2684,7 @@ static uae_u32 REGPARAM2 gfxmem_bget (uaecptr addr) #ifdef JIT special_mem |= S_READ; #endif - addr -= gfxmem_start /*& gfxmem_mask*/; + addr -= gfxmem_start; addr &= gfxmem_mask; m = (uae_u8 *)(gfxmemory + addr); return do_get_mem_byte(m); @@ -2527,13 +2696,13 @@ static void REGPARAM2 gfxmem_lput (uaecptr addr, uae_u32 l) #ifdef JIT special_mem |= S_WRITE; #endif - addr -= gfxmem_start /*& gfxmem_mask*/; + addr -= gfxmem_start; addr &= gfxmem_mask; m = (uae_u32 *)(gfxmemory + addr); do_put_mem_long(m, l); /* write the long-word to our displayable memory */ - write_gfx_long (addr, l); + write_gfx_x (addr, l, 4); } static void REGPARAM2 gfxmem_wput (uaecptr addr, uae_u32 w) @@ -2542,13 +2711,13 @@ static void REGPARAM2 gfxmem_wput (uaecptr addr, uae_u32 w) #ifdef JIT special_mem |= S_WRITE; #endif - addr -= gfxmem_start /*& gfxmem_mask*/; + addr -= gfxmem_start; addr &= gfxmem_mask; m = (uae_u16 *)(gfxmemory + addr); do_put_mem_word(m, (uae_u16)w); /* write the word to our displayable memory */ - write_gfx_word (addr, (uae_u16) w); + write_gfx_x (addr, (uae_u16) w, 2); } static void REGPARAM2 gfxmem_bput (uaecptr addr, uae_u32 b) @@ -2557,13 +2726,64 @@ static void REGPARAM2 gfxmem_bput (uaecptr addr, uae_u32 b) #ifdef JIT special_mem |= S_WRITE; #endif - addr -= gfxmem_start /*& gfxmem_mask*/; + addr -= gfxmem_start; addr &= gfxmem_mask; m = (uae_u8 *)(gfxmemory + addr); do_put_mem_byte(m, b); /* write the byte to our displayable memory */ - write_gfx_byte (addr, (uae_u8) b); + write_gfx_x (addr, (uae_u8) b, 1); +} + +static uae_u32 REGPARAM2 gfxmem_lgetx (uaecptr addr) +{ + uae_u32 *m; + + addr -= gfxmem_start & gfxmem_mask; + addr &= gfxmem_mask; + m = (uae_u32 *)(gfxmemory + addr); + return do_get_mem_long(m); +} + +static uae_u32 REGPARAM2 gfxmem_wgetx (uaecptr addr) +{ + uae_u16 *m; + addr -= gfxmem_start & gfxmem_mask; + addr &= gfxmem_mask; + m = (uae_u16 *)(gfxmemory + addr); + return do_get_mem_word(m); +} + +static uae_u32 REGPARAM2 gfxmem_bgetx (uaecptr addr) +{ + addr -= gfxmem_start & gfxmem_mask; + addr &= gfxmem_mask; + return gfxmemory[addr]; +} + +static void REGPARAM2 gfxmem_lputx (uaecptr addr, uae_u32 l) +{ + uae_u32 *m; + addr -= gfxmem_start & gfxmem_mask; + addr &= gfxmem_mask; + m = (uae_u32 *)(gfxmemory + addr); + do_put_mem_long(m, l); +} + +static void REGPARAM2 gfxmem_wputx (uaecptr addr, uae_u32 w) +{ + uae_u16 *m; + addr -= gfxmem_start & gfxmem_mask; + addr &= gfxmem_mask; + m = (uae_u16 *)(gfxmemory + addr); + do_put_mem_word(m, (uae_u16)w); +} + +static void REGPARAM2 gfxmem_bputx (uaecptr addr, uae_u32 b) +{ + addr -= gfxmem_start & gfxmem_mask; + addr &= gfxmem_mask; + gfxmemory[addr] = b; } static int REGPARAM2 gfxmem_check (uaecptr addr, uae_u32 size) @@ -2583,7 +2803,15 @@ static uae_u8 *REGPARAM2 gfxmem_xlate (uaecptr addr) addrbank gfxmem_bank = { gfxmem_lget, gfxmem_wget, gfxmem_bget, gfxmem_lput, gfxmem_wput, gfxmem_bput, - gfxmem_xlate, gfxmem_check, NULL, "RTG RAM" + gfxmem_xlate, gfxmem_check, NULL, "RTG RAM", + dummy_lgeti, dummy_wgeti, ABFLAG_RAM +}; + +addrbank gfxmem_bankx = { + gfxmem_lgetx, gfxmem_wgetx, gfxmem_bgetx, + gfxmem_lputx, gfxmem_wputx, gfxmem_bputx, + gfxmem_xlate, gfxmem_check, NULL, "RTG RAM", + dummy_lgeti, dummy_wgeti, ABFLAG_RAM }; static int resolution_compare (const void *a, const void *b) @@ -2606,66 +2834,60 @@ static int resolution_compare (const void *a, const void *b) * Also put it in reset_drawing() for safe-keeping. */ void InitPicasso96 (void) { - static int first_time = 1; + int i; have_done_picasso = 0; palette_changed = 0; memset (&picasso96_state, 0, sizeof (struct picasso96_state_struct)); - if (first_time) { - int i; - - for (i = 0; i < 256; i++) { - p2ctab[i][0] = (((i & 128) ? 0x01000000 : 0) - | ((i & 64) ? 0x010000 : 0) - | ((i & 32) ? 0x0100 : 0) - | ((i & 16) ? 0x01 : 0)); - p2ctab[i][1] = (((i & 8) ? 0x01000000 : 0) - | ((i & 4) ? 0x010000 : 0) - | ((i & 2) ? 0x0100 : 0) - | ((i & 1) ? 0x01 : 0)); - } - mode_count = DX_FillResolutions (&picasso96_pixel_format); - qsort (DisplayModes, mode_count, sizeof (struct PicassoResolution), resolution_compare); - - for (i = 0; i < mode_count; i++) { - sprintf (DisplayModes[i].name, "%dx%d, %d-bit, %d Hz", - DisplayModes[i].res.width, DisplayModes[i].res.height, DisplayModes[i].depth * 8, DisplayModes[i].refresh); - switch (DisplayModes[i].depth) { - case 1: - if (DisplayModes[i].res.width > chunky.width) - chunky.width = DisplayModes[i].res.width; - if (DisplayModes[i].res.height > chunky.height) - chunky.height = DisplayModes[i].res.height; - break; - case 2: - if (DisplayModes[i].res.width > hicolour.width) - hicolour.width = DisplayModes[i].res.width; - if (DisplayModes[i].res.height > hicolour.height) - hicolour.height = DisplayModes[i].res.height; - break; - case 3: - if (DisplayModes[i].res.width > truecolour.width) - truecolour.width = DisplayModes[i].res.width; - if (DisplayModes[i].res.height > truecolour.height) - truecolour.height = DisplayModes[i].res.height; - break; - case 4: - if (DisplayModes[i].res.width > alphacolour.width) - alphacolour.width = DisplayModes[i].res.width; - if (DisplayModes[i].res.height > alphacolour.height) - alphacolour.height = DisplayModes[i].res.height; - break; - } - } - - first_time = 0; + for (i = 0; i < 256; i++) { + p2ctab[i][0] = (((i & 128) ? 0x01000000 : 0) + | ((i & 64) ? 0x010000 : 0) + | ((i & 32) ? 0x0100 : 0) + | ((i & 16) ? 0x01 : 0)); + p2ctab[i][1] = (((i & 8) ? 0x01000000 : 0) + | ((i & 4) ? 0x010000 : 0) + | ((i & 2) ? 0x0100 : 0) + | ((i & 1) ? 0x01 : 0)); } + mode_count = DX_FillResolutions (&picasso96_pixel_format); + qsort (DisplayModes, mode_count, sizeof (struct PicassoResolution), resolution_compare); } uae_u8 *restore_p96 (uae_u8 *src) { + uae_u32 flags; + if (restore_u32 () != 1) + return src; + InitPicasso96(); + flags = restore_u32(); + picasso_requested_on = !!(flags & 1); + picasso96_state.SwitchState = picasso_requested_on; + picasso_on = 0; + init_picasso_screen_called = 0; + set_gc_called = !!(flags & 2); + set_panning_called = !!(flags & 4); + changed_prefs.gfxmem_size = restore_u32(); + picasso96_state.Address = restore_u32(); + picasso96_state.RGBFormat = restore_u32(); + picasso96_state.Width = restore_u16(); + picasso96_state.Height = restore_u16(); + picasso96_state.VirtualWidth = restore_u16(); + picasso96_state.VirtualHeight = restore_u16(); + picasso96_state.XOffset = restore_u16(); + picasso96_state.YOffset = restore_u16(); + picasso96_state.GC_Depth = restore_u8(); + picasso96_state.GC_Flags = restore_u8(); + picasso96_state.BytesPerRow = restore_u16(); + picasso96_state.BytesPerPixel = restore_u8(); + picasso96_state.HostAddress = NULL; + picasso_SetPanningInit(); + picasso96_state.Extent = picasso96_state.Address + picasso96_state.BytesPerRow * picasso96_state.VirtualHeight; + if (set_gc_called) { + init_picasso_screen (); + init_hz_p96 (); + } return src; } @@ -2673,8 +2895,29 @@ uae_u8 *save_p96 (int *len, uae_u8 *dstptr) { uae_u8 *dstbak,*dst; - //dstbak = dst = malloc (16 + 12 + 1 + 1); - return 0; + if (currprefs.gfxmem_size == 0) + return NULL; + if (dstptr) + dstbak = dst = dstptr; + else + dstbak = dst = (uae_u8 *)malloc (1000); + save_u32 (1); + save_u32 ((picasso_on ? 1 : 0) | (set_gc_called ? 2 : 0) | (set_panning_called ? 4 : 0)); + save_u32 (currprefs.gfxmem_size); + save_u32 (picasso96_state.Address); + save_u32 (picasso96_state.RGBFormat); + save_u16 (picasso96_state.Width); + save_u16 (picasso96_state.Height); + save_u16 (picasso96_state.VirtualWidth); + save_u16 (picasso96_state.VirtualHeight); + save_u16 (picasso96_state.XOffset); + save_u16 (picasso96_state.YOffset); + save_u8 (picasso96_state.GC_Depth); + save_u8 (picasso96_state.GC_Flags); + save_u16 (picasso96_state.BytesPerRow); + save_u8 (picasso96_state.BytesPerPixel); + *len = dst - dstbak; + return dstbak; } #endif //picasso96 diff --git a/src/od-pandora/sysconfig.h b/src/od-pandora/sysconfig.h index 2875fd17..5072fdc2 100644 --- a/src/od-pandora/sysconfig.h +++ b/src/od-pandora/sysconfig.h @@ -395,3 +395,7 @@ #define M68K_SPEED_7MHZ_CYCLES 0 #define M68K_SPEED_14MHZ_CYCLES 1024 #define M68K_SPEED_25MHZ_CYCLES 128 + +typedef unsigned char boolean; +#define FALSE 0 +#define TRUE 1 diff --git a/src/od-rasp/rasp_gfx.cpp b/src/od-rasp/rasp_gfx.cpp index 888801ea..df617a66 100644 --- a/src/od-rasp/rasp_gfx.cpp +++ b/src/od-rasp/rasp_gfx.cpp @@ -261,14 +261,6 @@ static void open_screen(struct uae_prefs *p) (dispmanxdinfo.height * 2)/100 , dispmanxdinfo.width - (dispmanxdinfo.width * 4)/100 , dispmanxdinfo.height - (dispmanxdinfo.height * 7)/100 ); - - // For debug, in order to avoid full screen. - //vc_dispmanx_rect_set( &dst_rect, (dispmanxdinfo.width /2), - // (dispmanxdinfo.height /2) , - // (dispmanxdinfo.width - (dispmanxdinfo.width * 6)/100 )/2, - // (dispmanxdinfo.height - (dispmanxdinfo.height * 7)/100 )/2); - - } else { @@ -279,6 +271,12 @@ static void open_screen(struct uae_prefs *p) dispmanxdinfo.height - (dispmanxdinfo.height * 7)/100 ); } + // For debug, in order to avoid full screen. + //vc_dispmanx_rect_set( &dst_rect, (dispmanxdinfo.width /2), + // (dispmanxdinfo.height /2) , + // (dispmanxdinfo.width - (dispmanxdinfo.width * 6)/100 )/2, + // (dispmanxdinfo.height - (dispmanxdinfo.height * 7)/100 )/2); + if (DispManXElementpresent == 0) { @@ -705,6 +703,11 @@ static int save_thumb(char *path) uae_u16 picasso96_pixel_format = RGBFF_CHUNKY; +void DX_Invalidate (int x, int y, int width, int height) +{ + // We draw everything direct to the frame buffer +} +#if 0 void DX_Invalidate (int first, int last) { if (first > last) @@ -721,7 +724,7 @@ void DX_Invalidate (int first, int last) first++; } } - +#endif int DX_BitsPerCannon (void) { return 8; @@ -757,7 +760,7 @@ int DX_Fill (int dstx, int dsty, int width, int height, uae_u32 color, RGBFTYPE SDL_Rect rect = {dstx, dsty, width, height}; if (SDL_FillRect (prSDLScreen, &rect, color) == 0) { - DX_Invalidate (dsty, dsty + height); + DX_Invalidate (dstx, dsty, width, height); result = 1; } diff --git a/src/readcpu.cpp b/src/readcpu.cpp index fefc8c1d..4d24895c 100644 --- a/src/readcpu.cpp +++ b/src/readcpu.cpp @@ -9,13 +9,15 @@ #include "sysconfig.h" #include "sysdeps.h" #include +#include -#undef abort +#ifndef abort #define abort() \ do { \ printf ("Internal error; file %s, line %d\n", __FILE__, __LINE__); \ (abort) (); \ } while (0) +#endif #include "readcpu.h" @@ -147,6 +149,8 @@ struct mnemolookup lookuptab[] = { { i_EMULOP_RETURN, "EMULOP_RETURN" }, { i_EMULOP, "EMULOP" }, + { i_MMUOP30A, "MMUOP30A" }, + { i_MMUOP30B, "MMUOP30B" }, { i_MMUOP, "MMUOP" }, {i_NATFEAT_ID, "NATFEAT_ID" }, @@ -401,7 +405,7 @@ static void build_insn (int insn) case 'A': srcmode = Areg; switch (opcstr[pos++]) { - case 'l': srcmode = absl; break; + case 'l': srcmode = absl; break; case 'r': srcreg = bitval[bitr]; srcgather = 1; srcpos = bitpos[bitr]; break; case 'R': srcreg = bitval[bitR]; srcgather = 1; srcpos = bitpos[bitR]; break; default: abort(); diff --git a/src/savestate.cpp b/src/savestate.cpp index d6f522e5..0435d841 100644 --- a/src/savestate.cpp +++ b/src/savestate.cpp @@ -10,8 +10,8 @@ /* Features: * - * - full CPU state (68000/68010/68020) - * - FPU + * - full CPU state (68000/68010/68020/68030/68040/68060) + * - FPU (68881/68882/68040/68060) * - full CIA-A and CIA-B state (with all internal registers) * - saves all custom registers and audio internal state. * - Chip, Bogo, Fast, Z3 and Picasso96 RAM supported @@ -55,7 +55,9 @@ #include "sd-pandora/sound.h" #include "newcpu.h" #include "savestate.h" +#include "gui.h" #include "audio.h" +#include "filesys.h" int savestate_state = 0; @@ -66,6 +68,42 @@ char savestate_fname[MAX_DPATH]={ '/', 't', 'm', 'p', '/', 'n', 'u', 'l', 'l', '.', 'a', 's', 'f', '\0' }; +static void state_incompatible_warn(void) +{ + static int warned; + int dowarn = 0; + int i; + +#ifdef BSDSOCKET + if (currprefs.socket_emu) + dowarn = 1; +#endif +#ifdef UAESERIAL + if (currprefs.uaeserial) + dowarn = 1; +#endif +#ifdef SCSIEMU + if (currprefs.scsi) + dowarn = 1; +#endif +#ifdef CATWEASEL + if (currprefs.catweasel) + dowarn = 1; +#endif +#ifdef FILESYS + for(i = 0; i < currprefs.mountitems; i++) { + struct mountedinfo mi; + int type = get_filesys_unitconfig (&currprefs, i, &mi); + if (mi.ismounted && type != FILESYS_VIRTUAL && type != FILESYS_HARDFILE && type != FILESYS_HARDFILE_RDB) + dowarn = 1; + } +#endif + if (!warned && dowarn) { + warned = 1; + notify_user (NUMSG_STATEHD); + } +} + /* functions for reading/writing bytes, shorts and longs in big-endian * format independent of host machine's endianess */ @@ -233,8 +271,10 @@ static uae_u8 *restore_chunk (struct zfile *f, char *name, size_t *len, size_t * if (len2 < 0) len2 = 0; *len = len2; - if (len2 == 0) + if (len2 == 0) { + *filepos = zfile_ftell (f); return 0; + } /* chunk flags */ zfile_fread (tmp, 1, 4, f); @@ -257,11 +297,17 @@ static uae_u8 *restore_chunk (struct zfile *f, char *name, size_t *len, size_t * && strcmp (name, "BRAM") != 0 && strcmp (name, "FRAM") != 0 && strcmp (name, "ZRAM") != 0 - && strcmp (name, "PRAM") != 0) + && strcmp (name, "PRAM") != 0 + && strcmp (name, "A3K1") != 0 + && strcmp (name, "A3K2") != 0) { /* without zeros at the end old state files may not work */ - mem = (uae_u8 *)calloc (1, len2 + 32); - zfile_fread (mem, 1, len2, f); + mem = (uae_u8 *)calloc (1, *totallen + 32); + if (flags & 1) { + zfile_zuncompress (mem, *totallen, f, len2); + } else { + zfile_fread (mem, 1, len2, f); + } } else { mem = 0; zfile_fseek (f, len2, SEEK_CUR); @@ -297,6 +343,13 @@ void restore_ram (size_t filepos, uae_u8 *memory) } } +static uae_u8 *restore_log (uae_u8 *src) +{ + write_log ((char *)src); + src += strlen((char *)src) + 1; + return src; +} + static void restore_header (uae_u8 *src) { char *emuname, *emuversion, *description; @@ -320,12 +373,15 @@ void restore_state (char *filename) uae_u8 *chunk,*end; char name[5]; size_t len, totallen; - size_t filepos; + size_t filepos, filesize; chunk = 0; f = zfile_fopen (filename, "rb"); if (!f) goto error; + zfile_fseek (f, 0, SEEK_END); + filesize = zfile_ftell (f); + zfile_fseek (f, 0, SEEK_SET); chunk = restore_chunk (f, name, &len, &totallen, &filepos); if (!chunk || memcmp (name, "ASF ", 4)) { @@ -338,13 +394,15 @@ void restore_state (char *filename) changed_prefs.bogomem_size = 0; changed_prefs.chipmem_size = 0; changed_prefs.fastmem_size = 0; + changed_prefs.z3fastmem_size = 0; savestate_state = STATE_RESTORE; for (;;) { name[0] = 0; chunk = end = restore_chunk (f, name, &len, &totallen, &filepos); write_log ("Chunk '%s' size %d (%d)\n", name, len, totallen); - if (!strcmp (name, "END ")) + if (!strcmp (name, "END ")) { break; + } if (!strcmp (name, "CRAM")) { restore_cram (totallen, filepos); continue; @@ -358,6 +416,9 @@ void restore_state (char *filename) } else if (!strcmp (name, "ZRAM")) { restore_zram (totallen, filepos); continue; + } else if (!strcmp (name, "BORO")) { + restore_bootrom (totallen, filepos); + continue; #endif #ifdef PICASSO96 } else if (!strcmp (name, "PRAM")) { @@ -429,14 +490,33 @@ void restore_state (char *filename) #ifdef FILESYS else if (!strcmp (name, "FSYS")) end = restore_filesys (chunk); + else if (!strcmp (name, "FSYC")) + end = restore_filesys_common (chunk); #endif - else +#ifdef CD32 + else if (!strcmp (name, "CD32")) + end = restore_akiko (chunk); +#endif +#ifndef PANDORA + else if (!strcmp (name, "GAYL")) + end = restore_gayle (chunk); + else if (!strcmp (name, "IDE ")) + end = restore_ide (chunk); + else if (!strcmp (name, "CONF")) + end = restore_configuration (chunk); + else if (!strcmp (name, "LOG ")) + end = restore_log (chunk); +#endif + else { + end = chunk + len; write_log ("unknown chunk '%s' size %d bytes\n", name, len); + } if (len != end - chunk) write_log ("Chunk '%s' total size %d bytes but read %d bytes!\n", name, len, end - chunk); xfree (chunk); } + restore_disk_finish(); restore_blitter_finish(); return; @@ -480,20 +560,23 @@ static void save_rams (struct zfile *f, int comp) dst = save_fram (&len); save_chunk (f, dst, len, (char *)"FRAM", comp); dst = save_zram (&len); - save_chunk (f, dst, len, "ZRAM", comp); + save_chunk (f, dst, len, (char *)"ZRAM", comp); + dst = save_bootrom (&len); + save_chunk (f, dst, len, (char *)"BORO", comp); #endif #ifdef PICASSO96 - dst = save_pram (&len); - save_chunk (f, dst, len, "PRAM", comp); dst = save_p96 (&len, 0); - save_chunk (f, dst, len, "P96 ", comp); + save_chunk (f, dst, len, (char *)"P96 ", 0); + dst = save_pram (&len); + save_chunk (f, dst, len, (char *)"PRAM", comp); #endif } /* Save all subsystems */ -void save_state (char *filename, const char *description) +int save_state (char *filename, const char *description) { + uae_u8 endhunk[] = { 'E', 'N', 'D', ' ', 0, 0, 0, 8 }; uae_u8 header[1000]; char tmp[100]; uae_u8 *dst; @@ -501,19 +584,18 @@ void save_state (char *filename, const char *description) int len,i; char name[5]; int comp = savestate_docompress; - static int warned; -#ifdef FILESYS -// if (nr_units (currprefs.mountinfo) && !warned) { -// warned = 1; -// gui_message("WARNING: State saves do not support harddrive emulation"); -// } -#endif + if (!savestate_specialdump) { + state_incompatible_warn(); + if (!save_filesys_cando()) { + gui_message("Filesystem active. Try again later"); + return -1; + } + } custom_prepare_savestate (); - f = zfile_fopen (filename, "w+b"); if (!f) - return; + return 0; if (savestate_specialdump) { size_t pos; // if (savestate_specialdump == 2) @@ -524,17 +606,17 @@ void save_state (char *filename, const char *description) // int len, len2, i; // uae_u8 *tmp; // len = zfile_ftell(f) - pos; -// tmp = xmalloc(len); +// tmp = (uae_u8*)xmalloc(len); // zfile_fseek(f, pos, SEEK_SET); // len2 = zfile_fread(tmp, 1, len, f); // for (i = 0; i < len2; i++) // tmp[i] += 0x80; // write_wavheader(f, len, 22050); -// zfile_fwrite(tmp, len2, 1, f); +// zfile_fwrite(tmp, len2, 1, f); // xfree(tmp); // } zfile_fclose (f); - return; + return 1; } dst = header; @@ -550,7 +632,7 @@ void save_state (char *filename, const char *description) xfree (dst); #ifdef FPUEMU dst = save_fpu (&len, 0); - save_chunk (f, dst, len, "FPU ", 0); + save_chunk (f, dst, len, (char *)"FPU ", 0); xfree (dst); #endif @@ -623,21 +705,62 @@ void save_state (char *filename, const char *description) xfree (dst); } while ((dst = save_rom (0, &len, 0))); +#ifdef CD32 + dst = save_akiko (&len); + save_chunk (f, dst, len, (char *)"CD32", 0); + xfree (dst); +#endif #ifdef FILESYS - for (i = 0; i < nr_units (currprefs.mountinfo); i++) { + dst = save_filesys_common (&len); + if (dst) { + save_chunk (f, dst, len, (char *)"FSYC", 0); + for (i = 0; i < nr_units (); i++) { dst = save_filesys (i, &len); if (dst) { save_chunk (f, dst, len, (char *)"FSYS", 0); xfree (dst); } } + } +#endif +#ifndef PANDORA + dst = save_gayle(&len); + if (dst) { + save_chunk (f, dst, len, "GAYL", 0); + xfree(dst); + } + for (i = 0; i < 4; i++) { + dst = save_ide (i, &len); + if (dst) { + save_chunk (f, dst, len, "IDE ", 0); + xfree(dst); + } + } +#endif + + /* add fake END tag, makes it easy to strip CONF and LOG hunks */ + /* move this if you want to use CONF or LOG hunks when restoring state */ + zfile_fwrite (endhunk, 1, 8, f); + +#ifndef PANDORA + dst = save_configuration (&len); + if (dst) { + save_chunk (f, dst, len, "CONF", 1); + xfree(dst); + } + dst = save_log (&len); + if (dst) { + save_chunk (f, dst, len, "LOG ", 1); + xfree(dst); + } + + zfile_fwrite (endhunk, 1, 8, f); #endif - zfile_fwrite ((void *)"END ", 1, 4, f); - zfile_fwrite ((void *)"\0\0\0\08", 1, 4, f); write_log ("Save of '%s' complete\n", filename); zfile_fclose (f); savestate_state = 0; + return 1; } void savestate_quick (int slot, int save) @@ -704,215 +827,240 @@ HEADER CPU - "CPU " + "CPU " - CPU model 4 (68000,68010 etc..) - CPU typeflags bit 0=EC-model or not - D0-D7 8*4=32 - A0-A6 7*4=32 - PC 4 + CPU model 4 (68000,68010,68020,68030,68040,68060) + CPU typeflags bit 0=EC-model or not, bit 31 = clock rate included + D0-D7 8*4=32 + A0-A6 7*4=32 + PC 4 unused 4 68000 prefetch (IRC) 2 68000 prefetch (IR) 2 - USP 4 - ISP 4 - SR/CCR 2 - flags 4 (bit 0=CPU was HALTed) + USP 4 + ISP 4 + SR/CCR 2 + flags 4 (bit 0=CPU was HALTed) - CPU specific registers + CPU specific registers - 68000: SR/CCR is last saved register - 68010: save also DFC,SFC and VBR - 68020: all 68010 registers and CAAR,CACR and MSP - etc.. + 68000: SR/CCR is last saved register + 68010: save also DFC,SFC and VBR + 68020: all 68010 registers and CAAR,CACR and MSP + etc.. - DFC 4 (010+) - SFC 4 (010+) - VBR 4 (010+) + 68010+: + + DFC 4 + SFC 4 + VBR 4 + + 68020+: + + CAAR 4 + CACR 4 + MSP 4 + + 68030+: + + AC0 4 + AC1 4 + ACUSR 2 + TT0 4 + TT1 4 + + 68040+: + + ITT0 4 + ITT1 4 + DTT0 4 + DTT1 4 + TCR 4 + URP 4 + SRP 4 + + 68060: + + BUSCR 4 + PCR 4 + + All: + + Clock in KHz 4 (only if bit 31 in flags) + 4 (spare, only if bit 31 in flags) - CAAR 4 (020-030) - CACR 4 (020+) - MSP 4 (020+) FPU (only if used) "FPU " - FPU model 4 (68881/68882/68040) - FPU typeflags 4 (keep zero) + FPU model 4 (68881/68882/68040/68060) + FPU typeflags 4 (bit 31 = clock rate included) + FP0-FP7 4+4+2 (80 bits) + FPCR 4 + FPSR 4 + FPIAR 4 + + Clock in KHz 4 (only if bit 31 in flags) + 4 (spare, only if bit 31 in flags) - FP0-FP7 4+4+2 (80 bits) - FPCR 4 - FPSR 4 - FPIAR 4 MMU (when and if MMU is supported in future..) - MMU model 4 (68851,68030,68040) + MMU model 4 (68851,68030,68040,68060) - // 68040 fields - ITT0 4 - ITT1 4 - DTT0 4 - DTT1 4 - URP 4 - SRP 4 - MMUSR 4 - TC 2 - - CUSTOM CHIPS - "CHIP" + "CHIP" - chipset flags 4 OCS=0,ECSAGNUS=1,ECSDENISE=2,AGA=4 - ECSAGNUS and ECSDENISE can be combined + chipset flags 4 OCS=0,ECSAGNUS=1,ECSDENISE=2,AGA=4 + ECSAGNUS and ECSDENISE can be combined - DFF000-DFF1FF 352 (0x120 - 0x17f and 0x0a0 - 0xdf excluded) + DFF000-DFF1FF 352 (0x120 - 0x17f and 0x0a0 - 0xdf excluded) - sprite registers (0x120 - 0x17f) saved with SPRx chunks - audio registers (0x0a0 - 0xdf) saved with AUDx chunks + sprite registers (0x120 - 0x17f) saved with SPRx chunks + audio registers (0x0a0 - 0xdf) saved with AUDx chunks AGA COLORS - "AGAC" + "AGAC" - AGA color 8 banks * 32 registers * - registers LONG (XRGB) = 1024 + AGA color 8 banks * 32 registers * + registers LONG (XRGB) = 1024 SPRITE - "SPR0" - "SPR7" + "SPR0" - "SPR7" - SPRxPT 4 - SPRxPOS 2 - SPRxCTL 2 - SPRxDATA 2 - SPRxDATB 2 - AGA sprite DATA/DATB 3 * 2 * 2 - sprite "armed" status 1 + SPRxPT 4 + SPRxPOS 2 + SPRxCTL 2 + SPRxDATA 2 + SPRxDATB 2 + AGA sprite DATA/DATB 3 * 2 * 2 + sprite "armed" status 1 - sprites maybe armed in non-DMA mode - use bit 0 only, other bits are reserved + sprites maybe armed in non-DMA mode + use bit 0 only, other bits are reserved AUDIO - "AUD0" "AUD1" "AUD2" "AUD3" + "AUD0" "AUD1" "AUD2" "AUD3" - audio state 1 - machine mode - AUDxVOL 1 + audio state 1 + machine mode + AUDxVOL 1 irq? 1 data_written? 1 - internal AUDxLEN 2 - AUDxLEN 2 + internal AUDxLEN 2 + AUDxLEN 2 internal AUDxPER 2 AUDxPER 2 - internal AUDxLC 4 + internal AUDxLC 4 AUDxLC 4 evtime? 4 BLITTER - "BLIT" + "BLIT" - internal blitter state + internal blitter state - flags 4 - bit 0=blitter active - bit 1=fill carry bit - internal ahold 4 - internal bhold 4 - internal hsize 2 - internal vsize 2 + flags 4 + bit 0=blitter active + bit 1=fill carry bit + internal ahold 4 + internal bhold 4 + internal hsize 2 + internal vsize 2 CIA - "CIAA" and "CIAB" + "CIAA" and "CIAB" - BFE001-BFEF01 16*1 (CIAA) - BFD000-BFDF00 16*1 (CIAB) + BFE001-BFEF01 16*1 (CIAA) + BFD000-BFDF00 16*1 (CIAB) - internal registers + internal registers - IRQ mask (ICR) 1 BYTE - timer latches 2 timers * 2 BYTES (LO/HI) - latched tod 3 BYTES (LO/MED/HI) - alarm 3 BYTES (LO/MED/HI) - flags 1 BYTE - bit 0=tod latched (read) - bit 1=tod stopped (write) + IRQ mask (ICR) 1 BYTE + timer latches 2 timers * 2 BYTES (LO/HI) + latched tod 3 BYTES (LO/MED/HI) + alarm 3 BYTES (LO/MED/HI) + flags 1 BYTE + bit 0=tod latched (read) + bit 1=tod stopped (write) div10 counter 1 BYTE FLOPPY DRIVES - "DSK0" "DSK1" "DSK2" "DSK3" + "DSK0" "DSK1" "DSK2" "DSK3" - drive state + drive state - drive ID-word 4 - state 1 (bit 0: motor on, bit 1: drive disabled, bit 2: current id bit) - rw-head track 1 - dskready 1 - id-mode 1 (ID mode bit number 0-31) - floppy information + drive ID-word 4 + state 1 (bit 0: motor on, bit 1: drive disabled, bit 2: current id bit) + rw-head track 1 + dskready 1 + id-mode 1 (ID mode bit number 0-31) + floppy information - bits from 4 - beginning of track - CRC of disk-image 4 (used during restore to check if image - is correct) - disk-image null-terminated - file name + bits from 4 + beginning of track + CRC of disk-image 4 (used during restore to check if image + is correct) + disk-image null-terminated + file name -INTERNAL FLOPPY CONTROLLER STATUS +INTERNAL FLOPPY CONTROLLER STATUS - "DISK" + "DISK" - current DMA word 2 - DMA word bit offset 1 - WORDSYNC found 1 (no=0,yes=1) - hpos of next bit 1 - DSKLENGTH status 0=off,1=written once,2=written twice - unused 2 + current DMA word 2 + DMA word bit offset 1 + WORDSYNC found 1 (no=0,yes=1) + hpos of next bit 1 + DSKLENGTH status 0=off,1=written once,2=written twice + unused 2 -RAM SPACE +RAM SPACE - "xRAM" (CRAM = chip, BRAM = bogo, FRAM = fast, ZFRAM = Z3) + "xRAM" (CRAM = chip, BRAM = bogo, FRAM = fast, ZRAM = Z3, P96 = RTG RAM, A3K1/A3K2 = MB RAM) - start address 4 ("bank"=chip/slow/fast etc..) - of RAM "bank" - RAM "bank" size 4 - RAM flags 4 (bit 0 = zlib compressed) - RAM "bank" contents + start address 4 ("bank"=chip/slow/fast etc..) + of RAM "bank" + RAM "bank" size 4 + RAM flags 4 (bit 0 = zlib compressed) + RAM "bank" contents ROM SPACE - "ROM " + "ROM " - ROM start 4 - address - size of ROM 4 - ROM type 4 KICK=0 - ROM flags 4 - ROM version 2 - ROM revision 2 - ROM CRC 4 see below - ROM-image ID-string null terminated, see below - path to rom image - ROM contents (Not mandatory, use hunk size to check if - this hunk contains ROM data or not) + ROM start 4 + address + size of ROM 4 + ROM type 4 KICK=0 + ROM flags 4 + ROM version 2 + ROM revision 2 + ROM CRC 4 see below + ROM-image ID-string null terminated, see below + path to rom image + ROM contents (Not mandatory, use hunk size to check if + this hunk contains ROM data or not) - Kickstart ROM: - ID-string is "Kickstart x.x" - ROM version: version in high word and revision in low word - Kickstart ROM version and revision can be found from ROM start - + 12 (version) and +14 (revision) + Kickstart ROM: + ID-string is "Kickstart x.x" + ROM version: version in high word and revision in low word + Kickstart ROM version and revision can be found from ROM start + + 12 (version) and +14 (revision) - ROM version and CRC is only meant for emulator to automatically - find correct image from its ROM-directory during state restore. + ROM version and CRC is only meant for emulator to automatically + find correct image from its ROM-directory during state restore. - Usually saving ROM contents is not good idea. + Usually saving ROM contents is not good idea. ACTION REPLAY @@ -924,7 +1072,7 @@ ACTION REPLAY ROM CRC 4 END - hunk "END " ends, remember hunk size 8! + hunk "END " ends, remember hunk size 8! EMULATOR SPECIFIC HUNKS diff --git a/src/sd-sdl/sound_sdl_new.cpp b/src/sd-sdl/sound_sdl_new.cpp index 8889cddf..e4671d92 100644 --- a/src/sd-sdl/sound_sdl_new.cpp +++ b/src/sd-sdl/sound_sdl_new.cpp @@ -329,7 +329,7 @@ void close_sound (void) // testing shows that reopenning sound device is not a good idea on gp2x (causes random sound driver crashes) // we will close it on real exit instead #ifdef RASPBERRY - pandora_stop_sound(); + //pandora_stop_sound(); #endif have_sound = 0; diff --git a/src/sinctable.c b/src/sinctable.c index 1a6291ef..44afceae 100644 --- a/src/sinctable.c +++ b/src/sinctable.c @@ -1,647 +1,626 @@ /* tables are: a500 off, a500 on, a1200 off, a1200 on, vanilla. */ static const int winsinc_integral[5][2048] = { { -131072,131070,131069,131067,131065,131064,131062,131060,131058,131056,131054, -131052,131050,131048,131046,131043,131041,131038,131035,131033,131029,131026,131023, -131019,131015,131011,131007,131002,130997,130992,130986,130980,130974,130967,130960, -130953,130944,130936,130927,130917,130907,130896,130884,130872,130859,130845,130830, -130815,130799,130781,130763,130744,130724,130702,130680,130656,130631,130605,130578, -130549,130518,130486,130453,130418,130381,130343,130303,130260,130217,130171,130123, -130073,130020,129966,129909,129850,129788,129724,129657,129588,129516,129441,129363, -129282,129199,129112,129022,128928,128832,128731,128628,128520,128409,128295,128176, -128054,127927,127796,127662,127523,127379,127232,127079,126922,126761,126594,126423, -126247,126066,125880,125689,125492,125290,125083,124870,124652,124428,124198,123963, -123722,123475,123222,122962,122697,122426,122148,121864,121574,121277,120974,120664, -120347,120024,119695,119358,119015,118665,118308,117945,117574,117196,116812,116420, -116022,115616,115204,114784,114357,113923,113482,113034,112579,112117,111648,111171, -110688,110198,109700,109196,108684,108166,107641,107109,106570,106025,105473,104914, -104348,103776,103198,102613,102022,101424,100821,100211,99596,98974,98347,97714,97075, -96431,95782,95127,94467,93802,93132,92457,91778,91094,90406,89713,89016,88316,87611, -86903,86191,85476,84758,84036,83312,82585,81856,81124,80389,79653,78915,78175,77434, -76691,75948,75203,74457,73711,72965,72218,71471,70724,69978,69232,68487,67743,67000, -66258,65518,64779,64043,63308,62576,61846,61118,60394,59672,58954,58239,57527,56819, -56116,55416,54720,54029,53342,52661,51984,51312,50645,49984,49329,48679,48035,47397, -46765,46139,45520,44907,44301,43701,43109,42523,41945,41374,40810,40254,39705,39164, -38630,38105,37587,37077,36575,36081,35595,35117,34648,34186,33733,33289,32852,32424, -32005,31593,31191,30796,30410,30032,29663,29302,28949,28605,28268,27940,27621,27309, -27005,26710,26422,26143,25871,25607,25350,25101,24860,24626,24399,24180,23968,23762, -23564,23372,23187,23009,22837,22671,22512,22358,22211,22069,21932,21802,21676,21556, -21441,21330,21224,21123,21027,20934,20846,20761,20681,20604,20530,20460,20393,20329, -20267,20209,20152,20098,20047,19997,19949,19903,19858,19814,19772,19731,19691,19651, -19613,19574,19536,19498,19460,19422,19384,19345,19306,19266,19226,19184,19142,19098, -19054,19008,18960,18911,18860,18808,18754,18698,18639,18579,18517,18453,18386,18317, -18245,18171,18095,18016,17935,17851,17764,17674,17582,17487,17390,17290,17187,17081, -16972,16861,16747,16630,16511,16389,16264,16136,16006,15874,15739,15601,15461,15319, -15174,15027,14878,14726,14573,14418,14260,14101,13940,13777,13613,13447,13280,13111, -12941,12770,12598,12424,12250,12075,11899,11723,11546,11369,11192,11014,10836,10658, -10481,10303,10126,9950,9774,9598,9423,9249,9076,8905,8734,8564,8396,8229,8064,7901, -7739,7579,7420,7264,7110,6958,6809,6661,6516,6373,6233,6096,5961,5829,5700,5573, -5450,5329,5211,5097,4985,4877,4771,4669,4570,4475,4382,4293,4207,4125,4045,3969, -3897,3827,3761,3699,3639,3583,3530,3481,3434,3391,3351,3314,3281,3250,3222,3197, -3176,3157,3141,3127,3117,3109,3103,3100,3100,3102,3106,3113,3122,3132,3145,3160, -3177,3195,3215,3237,3261,3285,3311,3339,3367,3397,3428,3459,3491,3525,3558,3593, -3627,3663,3698,3734,3769,3805,3841,3876,3912,3947,3981,4015,4049,4082,4114,4145, -4176,4205,4234,4261,4287,4312,4336,4359,4380,4400,4418,4434,4449,4463,4475,4485, -4493,4499,4504,4507,4507,4506,4503,4498,4492,4483,4472,4459,4444,4427,4408,4387, -4364,4339,4312,4284,4253,4220,4185,4149,4110,4070,4028,3984,3939,3891,3842,3792, -3740,3686,3631,3574,3517,3457,3397,3335,3272,3208,3143,3077,3010,2942,2874,2805, -2735,2664,2593,2522,2450,2378,2305,2233,2160,2087,2014,1942,1869,1797,1725,1654, -1582,1512,1442,1372,1304,1236,1169,1103,1037,973,910,848,787,727,669,612,556,501, -448,397,347,299,252,207,164,122,82,44,8,-27,-60,-91,-120,-147,-172,-196,-217,-237, --255,-271,-285,-297,-307,-316,-322,-327,-330,-331,-331,-328,-324,-319,-311,-302, --291,-279,-265,-250,-233,-215,-195,-175,-152,-129,-104,-79,-52,-24,5,35,65,97,129, -162,196,230,265,300,336,372,408,445,482,519,556,593,630,667,704,740,777,813,848, -884,918,953,986,1019,1052,1083,1114,1144,1173,1202,1229,1255,1281,1305,1328,1350, -1371,1391,1409,1427,1443,1458,1471,1483,1494,1503,1511,1518,1523,1527,1530,1531, -1531,1529,1526,1521,1516,1508,1500,1490,1478,1465,1451,1436,1419,1401,1382,1362, -1340,1318,1294,1269,1243,1216,1187,1158,1128,1097,1066,1033,1000,966,931,895,859, -823,785,748,710,671,632,593,554,515,475,435,395,355,316,276,236,197,158,119,80,42, -4,-33,-70,-106,-142,-177,-212,-246,-279,-311,-343,-374,-403,-432,-461,-488,-514, --539,-563,-586,-608,-629,-649,-668,-686,-702,-717,-731,-744,-756,-767,-776,-784, --791,-797,-801,-805,-807,-808,-807,-806,-803,-800,-795,-789,-782,-773,-764,-754, --742,-730,-717,-703,-687,-671,-654,-636,-618,-598,-578,-557,-536,-514,-491,-467, --443,-419,-394,-369,-343,-317,-290,-264,-237,-209,-182,-155,-127,-100,-72,-45,-17, -10,37,64,91,118,144,170,195,220,245,269,293,316,339,361,382,403,423,443,462,480, -497,513,529,544,558,571,583,594,605,614,623,631,637,643,648,652,655,657,658,658, -658,656,653,649,645,639,633,626,618,609,599,588,577,564,551,538,523,508,492,475, -458,440,421,402,383,362,342,321,299,277,255,232,209,186,163,139,115,91,67,42,18,-6, --31,-55,-79,-103,-127,-151,-175,-198,-221,-244,-267,-289,-311,-333,-354,-375,-395, --415,-434,-453,-471,-488,-505,-522,-538,-553,-567,-581,-594,-607,-618,-629,-639, --649,-658,-666,-673,-679,-685,-690,-694,-697,-700,-702,-703,-703,-702,-701,-699, --696,-693,-689,-684,-678,-672,-665,-657,-648,-639,-630,-619,-609,-597,-585,-573, --560,-546,-532,-518,-503,-488,-472,-456,-440,-423,-406,-389,-372,-354,-336,-319, --300,-282,-264,-246,-227,-209,-191,-172,-154,-136,-118,-100,-83,-65,-48,-31,-14,3, -19,35,50,65,80,95,109,122,135,148,160,172,183,193,204,213,222,231,239,246,253,259, -264,269,274,277,280,283,285,286,287,287,286,285,283,281,278,275,271,266,261,255, -249,242,235,227,219,210,201,192,182,171,160,149,138,126,114,101,88,75,62,49,35,21, -7,-7,-22,-36,-51,-65,-80,-95,-109,-124,-139,-153,-168,-182,-196,-210,-224,-238, --252,-265,-279,-292,-304,-317,-329,-341,-352,-363,-374,-385,-395,-405,-414,-423, --431,-439,-447,-454,-461,-467,-473,-479,-483,-488,-492,-495,-498,-501,-503,-504, --505,-505,-505,-505,-504,-502,-501,-498,-495,-492,-488,-484,-479,-474,-468,-462, --456,-449,-442,-435,-427,-418,-410,-401,-392,-382,-372,-362,-352,-341,-330,-319, --308,-297,-285,-273,-262,-250,-238,-225,-213,-201,-188,-176,-164,-151,-139,-127, --114,-102,-90,-78,-66,-54,-43,-31,-20,-9,2,13,23,34,44,53,63,72,81,90,98,106,114, -121,129,135,142,148,154,159,164,169,173,177,180,183,186,189,191,192,194,195,195, -196,195,195,194,193,191,190,187,185,182,179,175,172,168,163,159,154,149,144,138, -132,126,120,114,107,100,94,87,79,72,65,57,50,42,35,27,19,11,3,-4,-12,-20,-28,-35, --43,-51,-58,-66,-73,-80,-87,-94,-101,-108,-115,-121,-127,-133,-139,-145,-150,-156, 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-249,16 +250,22 @@ 1110 1111 11ss sSSS:20:-NZ00:-----:--:13: BFINS #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16] % floating point co processor -1111 0010 00ss sSSS:30:-----:-----:--:11: FPP #1,s -1111 0010 01ss sSSS:30:-----:-----:-B:11: FDBcc #1,s[Areg-Dreg] -1111 0010 01ss sSSS:30:-----:-----:--:11: FScc #1,s[!Areg,Immd,PC8r,PC16] -1111 0010 0111 1010:30:-----:-----:T-:10: FTRAPcc #1 -1111 0010 0111 1011:30:-----:-----:T-:10: FTRAPcc #2 -1111 0010 0111 1100:30:-----:-----:T-:00: FTRAPcc -1111 0010 10KK KKKK:30:-----:-----:-B:11: FBcc #K,#1 -1111 0010 11KK KKKK:30:-----:-----:-B:11: FBcc #K,#2 -1111 0011 00ss sSSS:32:-----:-----:--:20: FSAVE s[!Dreg,Areg,Aipi,Immd,PC8r,PC16] -1111 0011 01ss sSSS:32:-----:-----:--:10: FRESTORE s[!Dreg,Areg,Apdi,Immd] +1111 0010 00ss sSSS:20:-----:-----:--:11: FPP #1,s +1111 0010 01ss sSSS:20:-----:-----:-B:11: FDBcc #1,s[Areg-Dreg] +1111 0010 01ss sSSS:20:-----:-----:--:11: FScc #1,s[!Areg,Immd,PC8r,PC16] +1111 0010 0111 1010:20:-----:-----:T-:10: FTRAPcc #1 +1111 0010 0111 1011:20:-----:-----:T-:10: FTRAPcc #2 +1111 0010 0111 1100:20:-----:-----:T-:00: FTRAPcc +1111 0010 10KK KKKK:20:-----:-----:-B:11: FBcc #K,#1 +1111 0010 11KK KKKK:20:-----:-----:-B:11: FBcc #K,#2 +1111 0011 00ss sSSS:22:-----:-----:--:20: FSAVE s[!Dreg,Areg,Aipi,Immd,PC8r,PC16] +1111 0011 01ss sSSS:22:-----:-----:--:10: FRESTORE s[!Dreg,Areg,Apdi,Immd] + +% 68030 MMU (allowed addressing modes not checked!) +1111 0000 00ss sSSS:30:?????:?????:T-:11: MMUOP30A s[!Immd],#1 +1111 1000 00ss sSSS:30:?????:?????:T-:11: MMUOP30B s[!Immd] +% Misc MMU +1111 0101 iiii iSSS:40:?????:?????:T-:11: MMUOP #i,s % 68040 instructions 1111 0100 pp00 1rrr:42:-----:-----:T-:02: CINVL #p,Ar @@ -273,13 +280,3 @@ 1111 0110 00dd dDDD:40:-----:-----:--:12: MOVE16 Al,d[Areg-Aipi] 1111 0110 00ss sSSS:40:-----:-----:--:12: MOVE16 s[Aind],Al 1111 0110 00dd dDDD:40:-----:-----:--:12: MOVE16 Al,d[Aipi-Aind] - -1111 0101 iiii iSSS:42:?????:?????:T-:11: MMUOP #i,s - -% EmulOp instructions (deprecated, to be removed) -%0111 0001 0000 0000:02:-----:-----:-R:00: EMULOP_RETURN -%0111 0001 EEEE EEEE:02:-----:-----:-J:10: EMULOP #E - -% NatFea instructions (do I have the srcaddr correct?) -%0111 0011 0000 0000:00:-----:-----:-J:00: NATFEAT_ID -%0111 0011 0000 0001:00:-----:-----:-J:00: NATFEAT_CALL diff --git a/src/target.h b/src/target.h deleted file mode 120000 index 6e3ec1e5..00000000 --- a/src/target.h +++ /dev/null @@ -1 +0,0 @@ -od-pandora/target.h \ No newline at end of file diff --git a/src/td-sdl/thread.h b/src/td-sdl/thread.h index fa5fc749..c10cd631 100644 --- a/src/td-sdl/thread.h +++ b/src/td-sdl/thread.h @@ -28,16 +28,21 @@ extern void uae_set_thread_priority (int); typedef SDL_Thread *uae_thread_id; #define BAD_THREAD NULL -STATIC_INLINE int uae_start_thread (void *(*f) (void *), void *arg, uae_thread_id *foo) +STATIC_INLINE int uae_start_thread (const char *name, void *(*f) (void *), void *arg, uae_thread_id *foo) { *foo = SDL_CreateThread ((int (*)(void *))f, arg); return *foo == 0; } -STATIC_INLINE int uae_wait_thread (uae_thread_id thread) +STATIC_INLINE int uae_start_thread_fast (void *(*f) (void *), void *arg, uae_thread_id *foo) +{ + *foo = SDL_CreateThread ((int (*)(void *))f, arg); + return *foo == 0; +} + +STATIC_INLINE void uae_wait_thread (uae_thread_id thread) { SDL_WaitThread (thread, (int*)0); - return 0; } /* Do nothing; thread exits if thread function returns. */ diff --git a/src/traps.cpp b/src/traps.cpp index 13fd54ff..8e931c6b 100644 --- a/src/traps.cpp +++ b/src/traps.cpp @@ -75,7 +75,7 @@ static struct Trap traps[MAX_TRAPS]; static unsigned int trap_count; -static const int trace_traps = 1; +static const int trace_traps = 0; static void trap_HandleExtendedTrap (TrapHandler, int has_retval); @@ -94,7 +94,7 @@ unsigned int define_trap (TrapHandler handler_func, int flags, const char *name) if (trap_count == MAX_TRAPS) { write_log ("Ran out of emulator traps\n"); abort (); - return 0; + return -1; } else { unsigned int trap_num = trap_count++; struct Trap *trap = &traps[trap_num]; @@ -262,7 +262,7 @@ static void trap_HandleExtendedTrap (TrapHandler handler_func, int has_retval) context->saved_regs = regs; /* Copy of regs to be restored when trap is done */ /* Start thread to handle new trap context. */ - uae_start_thread (trap_thread, (void *)context, &context->thread); + uae_start_thread_fast (trap_thread, (void *)context, &context->thread); /* Switch to trap context to begin execution of * trap handler function. @@ -368,7 +368,7 @@ static uae_u32 REGPARAM2 m68k_return_handler (struct regstruct *regs) /* Get trap context from 68k stack. */ sp = m68k_areg (regs, 7); - context = (ExtendedTrapContext *) get_pointer(sp); + context = (struct ExtendedTrapContext *) get_pointer(sp); sp += sizeof (void *); m68k_areg (regs, 7) = sp; @@ -444,6 +444,13 @@ uae_u32 CallLib (TrapContext *context, uaecptr base, uae_s16 offset) return retval; } +/* + * Call 68k function from extended trap. + */ +uae_u32 CallFunc (TrapContext *context, uaecptr func) +{ + return trap_Call68k ((ExtendedTrapContext *)context, func); +} /* * Initialize trap mechanism. diff --git a/src/uaelib.cpp b/src/uaelib.cpp index eeba4e1e..3f2d68f2 100755 --- a/src/uaelib.cpp +++ b/src/uaelib.cpp @@ -26,6 +26,7 @@ #include "debug.h" #include "gensound.h" #include "picasso96.h" +#include "filesys.h" /* * Returns UAE Version @@ -313,8 +314,7 @@ static uae_u32 REGPARAM2 emulib_ExecuteNativeCode (struct regstruct *regs) if( get_mem_bank( object_AAM ).check( object_AAM, 1 ) ) object_UAM = get_mem_bank( object_AAM).xlateaddr( object_AAM ); - if( object_UAM ) - { + if(object_UAM) { SET_NATIVE_FUNC( FindFunctionInObject( object_UAM ) ); CALL_NATIVE_FUNC( d1, d2, d3, d4, d5, d6, d7, a1, a2, a3, a4, a5, a6); } @@ -328,6 +328,26 @@ static uae_u32 emulib_Minimize (void) return 0; // OSDEP_minimize_uae(); } +static int native_dos_op (uae_u32 mode, uae_u32 p1, uae_u32 p2, uae_u32 p3) +{ + char tmp[MAX_DPATH]; + int v, i; + + if (mode) + return -1; + /* receive native path from lock + * p1 = dos.library:Lock, p2 = buffer, p3 = max buffer size + */ + v = get_native_path (p1, tmp); + if (v) + return v; + for (i = 0; i <= strlen(tmp) && i < p3 - 1; i++) { + put_byte (p2 + i, tmp[i]); + put_byte (p2 + i + 1, 0); + } + return 0; +} + static uae_u32 REGPARAM2 uaelib_demux (TrapContext *context) { #define ARG0 (get_long (m68k_areg (&context->regs, 7) + 4)) @@ -387,6 +407,8 @@ static uae_u32 REGPARAM2 uaelib_demux (TrapContext *context) case 68: return emulib_Minimize (); case 69: return emulib_ExecuteNativeCode (&context->regs); + case 70: return 0; /* RESERVED. Something uses this.. */ + case 80: return /*currprefs.maprom ? currprefs.maprom :*/ 0xffffffff; case 81: return 0; //cfgfile_uaelib (ARG1, ARG2, ARG3, ARG4); case 82: return 0; //cfgfile_uaelib_modify (ARG1, ARG2, ARG3, ARG4, ARG5); @@ -394,6 +416,11 @@ static uae_u32 REGPARAM2 uaelib_demux (TrapContext *context) #ifdef DEBUGGER case 84: return mmu_init (ARG1, ARG2, ARG3); #endif + case 85: return native_dos_op (ARG1, ARG2, ARG3, ARG4); + case 86: + if (valid_address(ARG1, 1)) + write_log("DBG: %s\n", get_real_address(ARG1)); + return 1; } return 0; } @@ -403,13 +430,16 @@ static uae_u32 REGPARAM2 uaelib_demux (TrapContext *context) */ void emulib_install (void) { - uaecptr a = here (); + uaecptr a; + if (!uae_boot_rom) + return; + a = here (); //currprefs.mmkeyboard = 0; - org (RTAREA_BASE + 0xFF60); + org (rtarea_base + 0xFF60); #if 0 dw (0x4eb9); - dw ((RTAREA_BASE >> 16) | get_word(RTAREA_BASE + 36)); - dw (get_word(RTAREA_BASE + 38) + 12); + dw ((rtarea_base >> 16) | get_word(rtarea_base + 36)); + dw (get_word(rtarea_base + 38) + 12); #endif calltrap (define_trap (uaelib_demux, 0, "")); dw (RTS); diff --git a/src/zfile.cpp b/src/zfile.cpp index 18e757ce..b2a9eff8 100644 --- a/src/zfile.cpp +++ b/src/zfile.cpp @@ -4,22 +4,27 @@ * routines to handle compressed file automatically * * (c) 1996 Samuel Devulder, Tim Gunn - * 2002-2004 Toni Wilen + * 2002-2007 Toni Wilen */ +#define RECURSIVE_ARCHIVES 1 + #include "sysconfig.h" #include "sysdeps.h" #include "uae.h" #include "options.h" #include "zfile.h" -#include "unzip.h" #include "disk.h" #include "gui.h" #include "crc32.h" #include "fsdb.h" +#include "fsusage.h" +#include "zarchive.h" -#include +#include "archivers/zip/unzip.h" +#include "archivers/dms/pfile.h" +#include "archivers/wrp/warp.h" #ifdef ANDROIDSDL #include @@ -49,28 +54,15 @@ int mkstemp(char *templ) #define MAX_PATH 256 #endif - -struct zfile { - char *name; - char *zipname; - FILE *f; - uae_u8 *data; - int size; - int seek; - int deleteafterclose; - struct zfile *next; - int writeskipbytes; -}; - static struct zfile *zlist = 0; -const char *uae_archive_extensions[] = { "zip", /*"rar", "7z",*/ NULL }; +const char *uae_archive_extensions[] = { "zip", /*"rar",*/ "7z", NULL }; static struct zfile *zfile_create (void) { struct zfile *z; - z = (zfile *)malloc (sizeof *z); + z = (struct zfile *)malloc (sizeof *z); if (!z) return 0; memset (z, 0, sizeof *z); @@ -130,6 +122,7 @@ void zfile_fclose (struct zfile *f) } static uae_u8 exeheader[]={0x00,0x00,0x03,0xf3,0x00,0x00,0x00,0x00}; +static char *diskimages[] = { "adf", "adz", /*"ipf", "fdi", "dms",*/ "wrp", /*"dsq",*/ 0 }; int zfile_gettype (struct zfile *z) { uae_u8 buf[8]; @@ -139,21 +132,16 @@ int zfile_gettype (struct zfile *z) return ZFILE_UNKNOWN; ext = strrchr (z->name, '.'); if (ext != NULL) { + int i; ext++; - if (strcasecmp (ext, (char *)"adf") == 0) - return ZFILE_DISKIMAGE; - if (strcasecmp (ext, (char *)"adz") == 0) - return ZFILE_DISKIMAGE; + for (i = 0; diskimages[i]; i++) { + if (strcasecmp (ext, diskimages[i]) == 0) + return ZFILE_DISKIMAGE; + } if (strcasecmp (ext, (char *)"roz") == 0) return ZFILE_ROM; - if (strcasecmp (ext, (char *)"ipf") == 0) - return ZFILE_DISKIMAGE; - if (strcasecmp (ext, (char *)"fdi") == 0) - return ZFILE_DISKIMAGE; if (strcasecmp (ext, (char *)"uss") == 0) return ZFILE_STATEFILE; - if (strcasecmp (ext, (char *)"dms") == 0) - return ZFILE_DISKIMAGE; if (strcasecmp (ext, (char *)"rom") == 0) return ZFILE_ROM; if (strcasecmp (ext, (char *)"key") == 0) @@ -175,73 +163,7 @@ int zfile_gettype (struct zfile *z) return ZFILE_UNKNOWN; } -#define TMP_PREFIX "uae_" - -static struct zfile *createinputfile (struct zfile *z) -{ - FILE *f; - struct zfile *z2; - char *name; - - z2 = zfile_create (); - if (!z->data) { - z2->name = strdup (z->name); - return z2; - } - name = tempnam (0, TMP_PREFIX); - f = fopen (name, "wb"); - if (!f) return 0; - write_log ("created temporary file '%s'\n", name); - fwrite (z->data, z->size, 1, f); - fclose (f); - z2->name = name; - z2->deleteafterclose = 1; - return z2; -} - -static struct zfile *createoutputfile (struct zfile *z) -{ - struct zfile *z2; - char *name; - - name = tempnam (0, TMP_PREFIX); - z2 = zfile_create (); - z2->name = name; - z2->deleteafterclose = 1; - write_log ("allocated temporary file name '%s'\n", name); - return z2; -} - -/* we want to delete temporary files as early as possible */ -static struct zfile *updateoutputfile (struct zfile *z) -{ - struct zfile *z2 = 0; - int size; - FILE *f = fopen (z->name, "rb"); - for (;;) { - if (!f) - break; - fseek (f, 0, SEEK_END); - size = ftell (f); - fseek (f, 0, SEEK_SET); - if (!size) - break; - z2 = zfile_fopen_empty (z->name, size); - if (!z2) - break; - fread (z2->data, size, 1, f); - fclose (f); - zfile_fclose (z); - return z2; - } - if (f) - fclose (f); - zfile_fclose (z); - zfile_fclose (z2); - return 0; -} - -static struct zfile *zuncompress (struct zfile *z); +static struct zfile *zuncompress (struct zfile *z, int); struct zfile *zfile_gunzip (struct zfile *z) { @@ -278,11 +200,13 @@ struct zfile *zfile_gunzip (struct zfile *z) i = 0; do { zfile_fread (name + i, 1, 1, z); - } while (name[i++]); + } while (i < MAX_DPATH - 1 && name[i++]); + name[i] = 0; } if (flags & 16) { /* skip comment */ i = 0; do { + b = 0; zfile_fread (&b, 1, 1, z); } while (b); } @@ -307,8 +231,7 @@ struct zfile *zfile_gunzip (struct zfile *z) first = 1; do { zs.next_in = buffer; - zs.avail_in = sizeof (buffer); - zfile_fread (buffer, sizeof (buffer), 1, z); + zs.avail_in = zfile_fread (buffer, 1, sizeof (buffer), z); if (first) { if (inflateInit2_ (&zs, -MAX_WBITS, ZLIB_VERSION, sizeof(z_stream)) != Z_OK) break; @@ -325,35 +248,31 @@ struct zfile *zfile_gunzip (struct zfile *z) return z2; } - -static struct zfile *bunzip (const char *decompress, struct zfile *z) +static struct zfile *wrp (struct zfile *z) { - return z; -} - -static struct zfile *lha (struct zfile *z) -{ - return z; + return unwarp (z); } static struct zfile *dms (struct zfile *z) { - char cmd[2048]; - struct zfile *zi = createinputfile (z); - struct zfile *zo = createoutputfile (z); - if (zi && zo) { - sprintf(cmd, "xdms -q u \"%s\" +\"%s\"", zi->name, zo->name); - execute_command (cmd); + int ret; + struct zfile *zo; + + zo = zfile_fopen_empty ("undms.adf", 1760 * 512); + if (!zo) + return z; + ret = DMS_Process_File (z, zo, CMD_UNPACK, OPT_VERBOSE, 0, 0); + if (ret == NO_PROBLEM || ret == DMS_FILE_END) { + zfile_fclose (z); + return zo; } - zfile_fclose (zi); - zfile_fclose (z); - return updateoutputfile (zo); + return z; } const char *uae_ignoreextensions[] = { ".gif", ".jpg", ".png", ".xml", ".pdf", ".txt", 0 }; const char *uae_diskimageextensions[] = - { ".adf", ".adz", ".ipf", ".fdi", ".exe", 0 }; + { ".adf", ".adz", ".ipf", ".fdi", ".exe", ".dms", ".wrp", 0 }; int zfile_is_ignore_ext(const char *name) { @@ -380,94 +299,16 @@ int zfile_isdiskimage (const char *name) return 0; } -#define ArchiveFormat7Zip 1 -#define ArchiveFormatRAR 2 -#define ArchiveFormatZIP 3 +static const char *plugins_7z[] = { "7z", "rar", "zip", "lha", "lzh", "lzx", NULL }; +static const char *plugins_7z_x[] = { "7z", "Rar!", "MK", NULL, NULL, NULL, NULL }; +static const int plugins_7z_t[] = { ArchiveFormat7Zip, ArchiveFormatRAR, ArchiveFormatZIP, ArchiveFormatLHA, ArchiveFormatLHA, ArchiveFormatLZX }; -static struct zfile *unzip (struct zfile *z) -{ - unzFile uz; - unz_file_info file_info; - char filename_inzip[2048]; - struct zfile *zf; - int err, zipcnt, select, i, we_have_file = 0; - char tmphist[MAX_DPATH]; - int first = 1; - - zf = 0; - uz = unzOpen (z); - if (!uz) - return z; - if (unzGoToFirstFile (uz) != UNZ_OK) - return z; - zipcnt = 1; - tmphist[0] = 0; - for (;;) { - err = unzGetCurrentFileInfo(uz,&file_info,filename_inzip,sizeof(filename_inzip),NULL,0,NULL,0); - if (err != UNZ_OK) - return z; - if (file_info.uncompressed_size > 0) { - i = 0; - if (!zfile_is_ignore_ext(filename_inzip)) { - if (tmphist[0]) { - DISK_history_add (tmphist, -1); - tmphist[0] = 0; - first = 0; - } - if (first) { - if (zfile_isdiskimage (filename_inzip)) - sprintf (tmphist,"%s/%s", z->name, filename_inzip); - } else { - sprintf (tmphist,"%s/%s", z->name, filename_inzip); - DISK_history_add (tmphist, -1); - tmphist[0] = 0; - } - select = 0; - if (!z->zipname) - select = 1; - if (z->zipname && !strcasecmp (z->zipname, filename_inzip)) - select = -1; - if (z->zipname && z->zipname[0] == '#' && atol (z->zipname + 1) == zipcnt) - select = -1; - if (select && !we_have_file) { - int err = unzOpenCurrentFile (uz); - if (err == UNZ_OK) { - zf = zfile_fopen_empty (filename_inzip, file_info.uncompressed_size); - if (zf) { - err = unzReadCurrentFile (uz, zf->data, file_info.uncompressed_size); - unzCloseCurrentFile (uz); - if (err == 0 || err == file_info.uncompressed_size) { - zf = zuncompress (zf); - if (select < 0 || zfile_gettype (zf)) { - we_have_file = 1; - } - } - } - if (!we_have_file) { - zfile_fclose (zf); - zf = 0; - } - } - } - } - } - zipcnt++; - err = unzGoToNextFile (uz); - if (err != UNZ_OK) - break; - } - if (zf) { - zfile_fclose (z); - z = zf; - } - return z; -} - -static int iszip (struct zfile *z) +int iszip (struct zfile *z) { char *name = z->name; char *ext = strrchr (name, '.'); - uae_u8 header[4]; + uae_u8 header[7]; + int i; if (!ext) return 0; @@ -481,19 +322,39 @@ static int iszip (struct zfile *z) return ArchiveFormat7Zip; if (!strcasecmp (ext, ".rar") && header[0] == 'R' && header[1] == 'a' && header[2] == 'r' && header[3] == '!') return ArchiveFormatRAR; + if ((!strcasecmp (ext, ".lha") || !strcasecmp (ext, ".lzh")) && header[2] == '-' && header[3] == 'l' && header[4] == 'h' && header[6] == '-') + return ArchiveFormatLHA; + if (!strcasecmp (ext, ".lzx") && header[0] == 'L' && header[1] == 'Z' && header[2] == 'X') + return ArchiveFormatLZX; +#if defined(ARCHIVEACCESS) + for (i = 0; plugins_7z_x[i]; i++) { + if (plugins_7z_x[i] && !strcasecmp (ext + 1, plugins_7z[i]) && + !memcmp (header, plugins_7z_x[i], strlen (plugins_7z_x[i]))) + return plugins_7z_t[i]; + } +#endif return 0; } -static struct zfile *zuncompress (struct zfile *z) +static struct zfile *zuncompress (struct zfile *z, int dodefault) { char *name = z->name; char *ext = strrchr (name, '.'); - uae_u8 header[4]; + uae_u8 header[7]; + int i; if (ext != NULL) { ext++; + if (strcasecmp (ext, "7z") == 0) + return archive_access_select (z, ArchiveFormat7Zip, dodefault); if (strcasecmp (ext, "zip") == 0) - return unzip (z); + return archive_access_select (z, ArchiveFormatZIP, dodefault); +// if (strcasecmp (ext, "lha") == 0 || strcasecmp (ext, "lzh") == 0) +// return archive_access_select (z, ArchiveFormatLHA, dodefault); +// if (strcasecmp (ext, "lzx") == 0) +// return archive_access_select (z, ArchiveFormatLZX, dodefault); +// if (strcasecmp (ext, "rar") == 0) +// return archive_access_select (z, ArchiveFormatRAR, dodefault); if (strcasecmp (ext, "gz") == 0) return zfile_gunzip (z); if (strcasecmp (ext, "adz") == 0) @@ -504,9 +365,14 @@ static struct zfile *zuncompress (struct zfile *z) return zfile_gunzip (z); if (strcasecmp (ext, "dms") == 0) return dms (z); - if (strcasecmp (ext, "lha") == 0 - || strcasecmp (ext, "lzh") == 0) - return lha (z); + if (strcasecmp (ext, "wrp") == 0) + return wrp (z); +#if defined(ARCHIVEACCESS) + for (i = 0; plugins_7z_x[i]; i++) { + if (strcasecmp (ext, plugins_7z[i]) == 0) + return archive_access_arcacc_select (z, plugins_7z_t[i]); + } +#endif memset (header, 0, sizeof (header)); zfile_fseek (z, 0, SEEK_SET); zfile_fread (header, sizeof (header), 1, z); @@ -514,120 +380,137 @@ static struct zfile *zuncompress (struct zfile *z) if (header[0] == 0x1f && header[1] == 0x8b) return zfile_gunzip (z); if (header[0] == 'P' && header[1] == 'K') - return unzip (z); + return archive_access_select (z, ArchiveFormatZIP, dodefault); +// if (header[0] == 'R' && header[1] == 'a' && header[2] == 'r' && header[3] == '!') +// return archive_access_select (z, ArchiveFormatRAR, dodefault); if (header[0] == 'D' && header[1] == 'M' && header[2] == 'S' && header[3] == '!') return dms (z); +// if (header[0] == 'L' && header[1] == 'Z' && header[2] == 'X') +// return archive_access_select (z, ArchiveFormatLZX, dodefault); +// if (header[2] == '-' && header[3] == 'l' && header[4] == 'h' && header[6] == '-') +// return archive_access_select (z, ArchiveFormatLHA, dodefault); } return z; } -static FILE *openzip (char *name, char *zippath) +#ifdef SINGLEFILE +extern uae_u8 singlefile_data[]; + +static struct zfile *zfile_opensinglefile(struct zfile *l) { - int i; + uae_u8 *p = singlefile_data; + int size, offset; + char tmp[256], *s; + + strcpy (tmp, l->name); + s = tmp + strlen (tmp) - 1; + while (*s != 0 && *s != '/' && *s != '\\') s--; + if (s > tmp) + s++; + write_log("loading from singlefile: '%s'\n", tmp); + while (*p++); + offset = (p[0] << 24)|(p[1] << 16)|(p[2] << 8)|(p[3] << 0); + p += 4; + for (;;) { + size = (p[0] << 24)|(p[1] << 16)|(p[2] << 8)|(p[3] << 0); + if (!size) + break; + if (!strcmpi (tmp, p + 4)) { + l->data = singlefile_data + offset; + l->size = size; + write_log ("found, size %d\n", size); + return l; + } + offset += size; + p += 4; + p += strlen (p) + 1; + } + write_log ("not found\n"); + return 0; +} +#endif + +static struct zfile *zfile_fopen_nozip (const char *name, const char *mode) +{ + struct zfile *l; + FILE *f; + + if(*name == '\0') + return NULL; + l = zfile_create (); + l->name = strdup (name); + f = fopen (name, mode); + if (!f) { + zfile_fclose (l); + return 0; + } + l->f = f; + return l; +} + + +static struct zfile *openzip (const char *pname) +{ + int i, j; char v; - + char name[MAX_DPATH]; + char zippath[MAX_DPATH]; + + zippath[0] = 0; + strcpy (name, pname); i = strlen (name) - 2; - if (zippath) - zippath[0] = 0; while (i > 0) { if (name[i] == '/' || name[i] == '\\' && i > 4) { v = name[i]; name[i] = 0; - if (!strcasecmp (name + i - 4, ".zip")) { - FILE *f = fopen (name, "rb"); - if (f) { - if (zippath) - strcpy (zippath, name + i + 1); - return f; + for (j = 0; plugins_7z[j]; j++) { + int len = strlen (plugins_7z[j]); + if (name[i - len - 1] == '.' && !strcasecmp (name + i - len, plugins_7z[j])) { + struct zfile *f = zfile_fopen_nozip (name, "rb"); + if (f) { + f->zipname = my_strdup(name + i + 1); + return f; + } + break; } } name[i] = v; } i--; } - return 0; + return 0; } static struct zfile *zfile_fopen_2 (const char *name, const char *mode) { struct zfile *l; FILE *f; - char zipname[1000]; if( *name == '\0' ) return NULL; - l = zfile_create (); - l->name = strdup (name); - f = openzip (l->name, zipname); - if (f) { - if (strcmpi (mode, "rb")) { +#ifdef SINGLEFILE + if (zfile_opensinglefile (l)) + return l; +#endif + l = openzip (name); + if (l) { + if (strcmpi (mode, "rb") && strcmpi (mode, "r")) { zfile_fclose (l); - fclose (f); return 0; } - l->zipname = strdup (zipname); - } - if (!f) { - f = fopen (name, mode); + } else { + l = zfile_create (); + l->name = strdup (name); + f = fopen (l->name, mode); if (!f) { zfile_fclose (l); return 0; } + l->f = f; } - l->f = f; return l; } -/* zip (zlib) scanning */ -static int scan_zunzip (struct zfile *z, zfile_callback zc, void *user) -{ - unzFile uz; - unz_file_info file_info; - char filename_inzip[MAX_DPATH]; - char tmp[MAX_DPATH], tmp2[2]; - struct zfile *zf; - int err; - - zf = 0; - uz = unzOpen (z); - if (!uz) - return 0; - if (unzGoToFirstFile (uz) != UNZ_OK) - return 0; - for (;;) { - err = unzGetCurrentFileInfo(uz, &file_info, filename_inzip, sizeof(filename_inzip), NULL, 0, NULL, 0); - if (err != UNZ_OK) - return 0; - if (file_info.uncompressed_size > 0) { - int err = unzOpenCurrentFile (uz); - if (err == UNZ_OK) { - tmp2[0] = FSDB_DIR_SEPARATOR; - tmp2[1] = 0; - strcpy (tmp, z->name); - strcat (tmp, tmp2); - strcat (tmp, filename_inzip); - zf = zfile_fopen_empty (tmp, file_info.uncompressed_size); - if (zf) { - err = unzReadCurrentFile (uz, zf->data, file_info.uncompressed_size); - unzCloseCurrentFile (uz); - if (err == 0 || err == file_info.uncompressed_size) { - zf = zuncompress (zf); - if (!zc (zf, user)) { - zfile_fclose (zf); - return 0; - } - } - zfile_fclose (zf); - } - } - } - err = unzGoToNextFile (uz); - if (err != UNZ_OK) - break; - } - return 1; -} - #define AF "%AMIGAFOREVERDATA%" static void manglefilename(char *out, const char *in) @@ -653,8 +536,8 @@ int zfile_zopen (const char *name, zfile_callback zc, void *user) ztype = iszip (l); if (ztype == 0) zc (l, user); - else if (ztype == ArchiveFormatZIP) - scan_zunzip (l, zc, user); + else + archive_access_scan (l, zc, user, ztype); zfile_fclose (l); return 1; } @@ -664,21 +547,31 @@ int zfile_zopen (const char *name, zfile_callback zc, void *user) */ struct zfile *zfile_fopen (const char *name, const char *mode) { - struct zfile *l; + int cnt = 10; + struct zfile *l, *l2; char path[MAX_DPATH]; manglefilename(path, name); l = zfile_fopen_2 (path, mode); if (!l) return 0; - l = zuncompress (l); + l2 = NULL; + while (cnt-- > 0) { + l = zuncompress (l, 0); + if (!l) + break; + zfile_fseek (l, 0, SEEK_SET); + if (l == l2) + break; + l2 = l; + } return l; } struct zfile *zfile_dup (struct zfile *zf) { struct zfile *nzf; - if (!zf->data) + if (!zf || !zf->data) return NULL; nzf = zfile_create(); nzf->data = (uae_u8 *)malloc (zf->size); @@ -690,21 +583,23 @@ struct zfile *zfile_dup (struct zfile *zf) int zfile_exists (const char *name) { char fname[2000]; - FILE *f; + struct zfile *f; if (strlen (name) == 0) return 0; manglefilename(fname, name); - f = openzip (fname, 0); + f = openzip (fname); if (!f) { + FILE *f2; manglefilename(fname, name); if (!my_existsfile(fname)) return 0; - f = fopen(fname,"rb"); + f2 = fopen(fname, "rb"); + if (!f2) + return 0; + fclose(f2); } - if (!f) - return 0; - fclose (f); + zfile_fclose (f); return 1; } @@ -718,9 +613,14 @@ struct zfile *zfile_fopen_empty (const char *name, int size) struct zfile *l; l = zfile_create (); l->name = name ? strdup (name) : (char *)""; - l->data = (uae_u8 *)malloc (size); - l->size = size; - memset (l->data, 0, size); + if (size) { + l->data = (uae_u8 *)malloc (size); + l->size = size; + memset (l->data, 0, size); + } else { + l->data = (uae_u8*)calloc (1, 1); + l->size = 0; + } return l; } @@ -745,7 +645,7 @@ long zfile_ftell (struct zfile *z) int zfile_fseek (struct zfile *z, long offset, int mode) { if (z->data) { - int old = z->seek; + int ret = 0; switch (mode) { case SEEK_SET: @@ -758,55 +658,124 @@ int zfile_fseek (struct zfile *z, long offset, int mode) z->seek = z->size + offset; break; } - if (z->seek < 0) z->seek = 0; - if (z->seek > z->size) z->seek = z->size; - return old; + if (z->seek < 0) { + z->seek = 0; + ret = 1; + } + if (z->seek > z->size) { + z->seek = z->size; + ret = 1; + } + return ret; } return fseek (z->f, offset, mode); } + size_t zfile_fread (void *b, size_t l1, size_t l2, struct zfile *z) { - long len = l1 * l2; if (z->data) { - if (z->seek + len > z->size) { - len = z->size - z->seek; - if (len < 0) - len = 0; + if (z->seek + l1 * l2 > z->size) { + if (l1) + l2 = (z->size - z->seek) / l1; + else + l2 = 0; + if (l2 < 0) + l2 = 0; } - memcpy (b, z->data + z->seek, len); - z->seek += len; - return len; + memcpy (b, z->data + z->seek, l1 * l2); + z->seek += l1 * l2; + return l2; } return fread (b, l1, l2, z->f); } +size_t zfile_fwrite (void *b, size_t l1, size_t l2, struct zfile *z) +{ + if (z->data) { + if (z->seek + l1 * l2 > z->size) { + if (l1) + l2 = (z->size - z->seek) / l1; + else + l2 = 0; + if (l2 < 0) + l2 = 0; + } + memcpy (z->data + z->seek, b, l1 * l2); + z->seek += l1 * l2; + return l2; + } + return fwrite (b, l1, l2, z->f); +} + size_t zfile_fputs (struct zfile *z, char *s) { return zfile_fwrite (s, strlen (s), 1, z); } -size_t zfile_fwrite (void *b, size_t l1, size_t l2, struct zfile *z) +char *zfile_fgets(char *s, int size, struct zfile *z) { - long len = l1 * l2; - - if (z->writeskipbytes) { - z->writeskipbytes -= len; - if (z->writeskipbytes >= 0) - return len; - len = -z->writeskipbytes; - z->writeskipbytes = 0; - } if (z->data) { - if (z->seek + len > z->size) { - len = z->size - z->seek; - if (len < 0) - len = 0; + char *os = s; + int i; + for (i = 0; i < size - 1; i++) { + if (z->seek == z->size) { + if (i == 0) + return NULL; + break; + } + *s = z->data[z->seek++]; + if (*s == '\n') { + s++; + break; + } + s++; } - memcpy (z->data + z->seek, b, len); - z->seek += len; - return len; + *s = 0; + return os; + } else { + return fgets(s, size, z->f); } - return fwrite (b, l1, l2, z->f); +} + +int zfile_putc (int c, struct zfile *z) +{ + uae_u8 b = (uae_u8)c; + return zfile_fwrite (&b, 1, 1, z) ? 1 : -1; +} + +int zfile_getc (struct zfile *z) +{ + int out = -1; + if (z->data) { + if (z->seek < z->size) + out = z->data[z->seek++]; + } else { + out = fgetc (z->f); + } + return out; +} + +int zfile_ferror (struct zfile *z) +{ + return 0; +} + +char *zfile_getdata (struct zfile *z, int offset, int len) +{ + size_t pos; + uae_u8 *b; + if (len < 0) + len = z->size; + b = (uae_u8 *)xmalloc (len); + if (z->data) { + memcpy (b, z->data + offset, len); + } else { + pos = zfile_ftell (z); + zfile_fseek (z, offset, SEEK_SET); + zfile_fread (b, len, 1, z); + zfile_fseek (z, pos, SEEK_SET); + } + return (char *) b; } int zfile_zuncompress (void *dst, int dstsize, struct zfile *src, int srcsize) @@ -891,3 +860,543 @@ uae_u32 zfile_crc32 (struct zfile *f) xfree (p); return crc; } + +static struct zvolume *zvolume_list; + +static struct znode *znode_alloc(struct znode *parent, const char *name) +{ + char fullpath[MAX_DPATH]; + struct znode *zn = (struct znode *) xcalloc(sizeof(struct znode), 1); + + sprintf(fullpath,"%s%c%s", parent->fullname, FSDB_DIR_SEPARATOR, name); + zn->fullname = my_strdup(fullpath); + zn->name = my_strdup(name); + zn->volume = parent->volume; + zn->volume->last->next = zn; + zn->prev = zn->volume->last; + zn->volume->last = zn; + return zn; +} + +static struct znode *znode_alloc_child(struct znode *parent, const char *name) +{ + struct znode *zn = znode_alloc(parent, name); + + if (!parent->child) { + parent->child = zn; + } else { + struct znode *pn = parent->child; + while (pn->sibling) + pn = pn->sibling; + pn->sibling = zn; + } + zn->parent = parent; + return zn; +} +static struct znode *znode_alloc_sibling(struct znode *sibling, const char *name) +{ + struct znode *zn = znode_alloc(sibling->parent, name); + + if (!sibling->sibling) { + sibling->sibling = zn; + } else { + struct znode *pn = sibling->sibling; + while (pn->sibling) + pn = pn->sibling; + pn->sibling = zn; + } + zn->parent = sibling->parent; + return zn; +} + +static void zvolume_addtolist(struct zvolume *zv) +{ + if (!zv) + return; + if (!zvolume_list) { + zvolume_list = zv; + } else { + struct zvolume *v = zvolume_list; + while (v->next) + v = v->next; + v->next = zv; + } +} + +static struct zvolume *zvolume_alloc_2(const char *name, struct zfile *z, unsigned int id, void *handle) +{ + struct zvolume *zv = (struct zvolume *) xcalloc(sizeof (struct zvolume), 1); + struct znode *root; + size_t pos; + + root = &zv->root; + zv->last = root; + zv->archive = z; + zv->handle = handle; + zv->id = id; + zv->blocks = 4; + root->volume = zv; + root->name = my_strdup(name); + root->fullname = my_strdup(name); + if (z) { + pos = zfile_ftell(z); + zfile_fseek(z, 0, SEEK_END); + zv->archivesize = zfile_ftell(z); + zfile_fseek(z, pos, SEEK_SET); + } + return zv; +} +struct zvolume *zvolume_alloc(struct zfile *z, unsigned int id, void *handle) +{ + return zvolume_alloc_2(zfile_getname(z), z, id, handle); +} +struct zvolume *zvolume_alloc_empty(const char *name) +{ + return zvolume_alloc_2(name, 0, 0, 0); +} + +static struct zvolume *get_zvolume(const char *path) +{ + struct zvolume *zv = zvolume_list; + while (zv) { + char *s = zfile_getname(zv->archive); + if (strlen(path) >= strlen(s) && !memcmp (path, s, strlen(s))) + return zv; + zv = zv->next; + } + return NULL; +} + +static struct zvolume *zfile_fopen_archive_ext(struct zfile *zf) +{ + struct zvolume *zv = NULL; + char *ext = strrchr (zfile_getname(zf), '.'); + + if (ext != NULL) { + ext++; +// if (strcasecmp (ext, "lha") == 0 || strcasecmp (ext, "lzh") == 0) +// zv = archive_directory_lha (zf); + if (strcasecmp (ext, "zip") == 0) + zv = archive_directory_zip (zf); + if (strcasecmp (ext, "7z") == 0) + zv = archive_directory_7z (zf); +// if (strcasecmp (ext, "lzx") == 0) +// zv = archive_directory_lzx (zf); +// if (strcasecmp (ext, "rar") == 0) +// zv = archive_directory_rar (zf); + } + return zv; +} + + +struct zvolume *zfile_fopen_archive_data(struct zfile *zf) +{ + struct zvolume *zv = NULL; + uae_u8 header[7]; + + memset (header, 0, sizeof (header)); + zfile_fread (header, sizeof (header), 1, zf); + zfile_fseek (zf, 0, SEEK_SET); + if (header[0] == 'P' && header[1] == 'K') + zv = archive_directory_zip (zf); +// if (header[0] == 'R' && header[1] == 'a' && header[2] == 'r' && header[3] == '!') +// zv = archive_directory_rar (zf); +// if (header[0] == 'L' && header[1] == 'Z' && header[2] == 'X') +// zv = archive_directory_lzx (zf); +// if (header[2] == '-' && header[3] == 'l' && header[4] == 'h' && header[6] == '-') +// zv = archive_directory_lha (zf); + return zv; +} + +static struct znode *get_znode(struct zvolume *zv, const char *ppath); + +static int zfile_fopen_archive_recurse(struct zvolume *zv) +{ + struct znode *zn; + int i, added; + + added = 0; + zn = zv->root.child; + while (zn) { + char *ext = strrchr (zn->name, '.'); + if (ext && !zn->vchild && zn->isfile) { + for (i = 0; plugins_7z[i]; i++) { + if (!strcasecmp(ext + 1, plugins_7z[i])) { + struct zvolume *zvnew; + struct znode *zndir; + char tmp[MAX_DPATH]; + + sprintf(tmp, "%s.DIR", zn->fullname + strlen(zv->root.name) + 1); + zndir = get_znode(zv, tmp); + if (!zndir) { + struct zarchive_info zai = { 0 }; + zvnew = zvolume_alloc_empty (tmp); + zai.name = tmp; + zai.t = zn->mtime; + zndir = zvolume_adddir_abs(zv, &zai); + zndir->vfile = zn; + zndir->vchild = zvnew; + zvnew->parent = zv; + } + } + } + } + zn = zn->next; + } + return 0; +} + +static void recursivepath(char *path, struct zvolume *zv) +{ + char tmp[2] = { FSDB_DIR_SEPARATOR, 0 }; + if (!zv) + return; + recursivepath(path, zv->parent); + strcat(path, zv->root.fullname); + strcat(path, tmp); +} + +static struct zvolume *prepare_recursive_volume(struct zvolume *zv, const char *path) +{ + struct zfile *zf = NULL; + struct zvolume *zvnew = NULL; + + write_log("unpacking '%s'\n", path); + zf = (struct zfile *) zfile_open_archive(path, 0); + if (!zf) + goto end; + zvnew = zfile_fopen_archive_ext(zf); + if (!zvnew) + goto end; + zvnew->parent = zv->parent; + zfile_fopen_archive_recurse(zvnew); + zfile_fclose_archive(zv); + return zvnew; +end: + write_log("unpack failed\n"); + zfile_fclose_archive (zvnew); + zfile_fclose(zf); + return NULL; +} + +static struct znode *get_znode(struct zvolume *zv, const char *ppath) +{ + struct znode *zn; + int prevlen = 0; + char path[MAX_DPATH]; + + if (!zv) + return NULL; + strcpy (path, ppath); + zn = &zv->root; + while (zn) { + if (zn->isfile) { + if (!stricmp(zn->fullname, path)) + return zn; + } else { + int len = strlen(zn->fullname); + if (strlen(path) >= len && (path[len] == 0 || path[len] == FSDB_DIR_SEPARATOR) && !strncasecmp(zn->fullname, path, len)) { + if (path[len] == 0) + return zn; + if (zn->vchild) { + /* jump to separate tree, recursive archives */ + struct zvolume *zvdeep = zn->vchild; + char *p = path + prevlen + 1; + if (zvdeep->archive == NULL) { + zvdeep = prepare_recursive_volume(zvdeep, zn->fullname); + if (!zvdeep) { + write_log("failed to unpack '%s'\n", zn->fullname); + return NULL; + } + /* replace dummy empty volume with real volume */ + zn->vchild = zvdeep; + } + zn = zvdeep->root.child; + while (*p && *p != FSDB_DIR_SEPARATOR) + p++; + if (*p == 0) + return NULL; + p++; + strcpy (path, zn->volume->root.name); + memmove(path + strlen(path) + 1, p, strlen (p) + 1); + path[strlen(path)] = FSDB_DIR_SEPARATOR; + } else { + zn = zn->child; + } + prevlen = len; + continue; + } + } + zn = zn->sibling; + } + return NULL; +} + + +static void addvolumesize(struct zvolume *zv, int size) +{ + int blocks = (size + 511) / 512; + + if (blocks == 0) + blocks++; + while (zv) { + zv->blocks += blocks; + zv->size += size; + zv = zv->parent; + } +} + +struct znode *znode_adddir(struct znode *parent, const char *name, struct zarchive_info *zai) +{ + struct znode *zn; + char path[MAX_DPATH]; + + sprintf(path, "%s%c%s", parent->fullname, FSDB_DIR_SEPARATOR, name); + zn = get_znode(parent->volume, path); + if (zn) + return zn; + zn = znode_alloc_child(parent, name); + zn->mtime = zai->t; + addvolumesize(parent->volume, 0); + return zn; +} + +struct znode *zvolume_adddir_abs(struct zvolume *zv, struct zarchive_info *zai) +{ + struct znode *zn2; + char *path = my_strdup(zai->name); + char *p, *p2; + int i; + + zn2 = &zv->root; + p = p2 = path; + for (i = 0; path[i]; i++) { + if (path[i] == '/' || path[i] == '\\') { + path[i] = 0; + zn2 = znode_adddir(zn2, p, zai); + path[i] = FSDB_DIR_SEPARATOR; + p = p2 = &path[i + 1]; + } + } + return znode_adddir(zn2, p, zai); +} + +struct znode *zvolume_addfile_abs(struct zvolume *zv, struct zarchive_info *zai) +{ + struct znode *zn, *zn2; + int i; + char *path = my_strdup(zai->name); + char *p, *p2; + + zn2 = &zv->root; + p = p2 = path; + for (i = 0; path[i]; i++) { + if (path[i] == '/' || path[i] == '\\') { + path[i] = 0; + zn2 = znode_adddir(zn2, p, zai); + path[i] = FSDB_DIR_SEPARATOR; + p = p2 = &path[i + 1]; + } + } + if (p2) { + zn = znode_alloc_child(zn2, p2); + zn->size = zai->size; + zn->isfile = 1; + zn->mtime = zai->t; + if (zai->comment) + zn->comment = my_strdup(zai->comment); + zn->flags = zai->flags; + addvolumesize(zn->volume, zai->size); + } + xfree(path); + return zn; +} + +struct zvolume *zfile_fopen_archive(const char *filename) +{ + struct zvolume *zv = NULL; + struct zfile *zf = zfile_fopen_nozip (filename, "rb"); + + if (!zf) + return NULL; + zv = zfile_fopen_archive_ext(zf); + if (!zv) + zv = zfile_fopen_archive_data(zf); +#if RECURSIVE_ARCHIVES + if (zv) + zfile_fopen_archive_recurse (zv); +#endif + /* pointless but who cares? */ + if (!zv) + zv = archive_directory_plain (zf); + if (zv) + zvolume_addtolist (zv); + else + zfile_fclose(zf); + return zv; +} + +void zfile_fclose_archive(struct zvolume *zv) +{ + struct znode *zn; + struct zvolume *v; + + if (!zv) + return; + zn = &zv->root; + while (zn) { + struct znode *zn2 = zn->next; + if (zn->vchild) + zfile_fclose_archive(zn->vchild); + xfree(zn->comment); + xfree(zn->fullname); + xfree(zn->name); + zfile_fclose(zn->f); + if (zn != &zv->root) + xfree(zn); + zn = zn2; + } + archive_access_close (zv->handle, zv->id); + if (zvolume_list == zv) { + zvolume_list = zvolume_list->next; + } else { + v = zvolume_list; + while (v) { + if (v->next == zv) { + v->next = zv->next; + break; + } + v = v->next; + } + } + xfree(zv); +} + +struct zdirectory { + struct znode *n; +}; + +void *zfile_opendir_archive(const char *path) +{ + struct zvolume *zv = get_zvolume(path); + struct znode *zn = get_znode(zv, path); + struct zdirectory *zd = (struct zdirectory *) xmalloc(sizeof (struct zdirectory)); + + if (!zn || (!zn->child && !zn->vchild)) + return NULL; + if (zn->child) { + zd->n = zn->child; + } else { + if (zn->vchild->archive == NULL) { + struct zvolume *zvnew = prepare_recursive_volume (zn->vchild, path); + if (zvnew) + zn->vchild = zvnew; + } + zd->n = zn->vchild->root.next; + } + return zd; +} +void zfile_closedir_archive(struct zdirectory *zd) +{ + xfree(zd); +} +int zfile_readdir_archive(struct zdirectory *zd, char *out) +{ + if (!zd->n) + return 0; + strcpy (out, zd->n->name); + zd->n = zd->n->sibling; + return 1; +} + +int zfile_fill_file_attrs_archive(const char *path, int *isdir, int *flags, char **comment) +{ + struct zvolume *zv = get_zvolume(path); + struct znode *zn = get_znode(zv, path); + + *isdir = 0; + *flags = 0; + *comment = 0; + if (!zn) + return 0; + *isdir = zn->isfile ? 0 : 1; + *flags = zn->flags; + if (zn->comment) + *comment = my_strdup(zn->comment); + return 1; +} + +int zfile_fs_usage_archive(const char *path, const char *disk, struct fs_usage *fsp) +{ + struct zvolume *zv = get_zvolume(path); + + if (!zv) + return -1; + fsp->fsu_blocks = zv->blocks; + fsp->fsu_bavail = 0; + return 0; +} + +int zfile_stat_archive (const char *path, struct stat *s) +{ + struct zvolume *zv = get_zvolume(path); + struct znode *zn = get_znode(zv, path); + + if (!zn) + return 0; + s->st_mode = zn->isfile ? 0 : FILEFLAG_DIR; + s->st_size = zn->size; + s->st_mtime = zn->mtime; + return 1; +} + +unsigned int zfile_lseek_archive (void *d, unsigned int offset, int whence) +{ + if (zfile_fseek ((zfile *)d, offset, whence)) + return -1; + return zfile_ftell ((zfile *)d); +} + +unsigned int zfile_read_archive (void *d, void *b, unsigned int size) +{ + return zfile_fread (b, 1, size, (zfile *)d); +} + +void zfile_close_archive (void *d) +{ + /* do nothing, keep file cached */ +} + +void *zfile_open_archive (const char *path, int flags) +{ + struct zvolume *zv = get_zvolume(path); + struct znode *zn = get_znode(zv, path); + struct zfile *z; + + if (!zn) + return 0; + if (zn->f) { + zfile_fseek(zn->f, 0, SEEK_SET); + return zn->f; + } + if (zn->vfile) + zn = zn->vfile; + z = archive_getzfile (zn, zn->volume->id); + if (z) + zfile_fseek(z, 0, SEEK_SET); + zn->f = z; + return zn->f; +} + +int zfile_exists_archive (const char *path, const char *rel) +{ + char tmp[MAX_DPATH]; + struct zvolume *zv; + struct znode *zn; + + sprintf(tmp, "%s%c%s", path, FSDB_DIR_SEPARATOR, rel); + zv = get_zvolume(tmp); + zn = get_znode(zv, tmp); + return zn ? 1 : 0; +} + diff --git a/src/zfile_archive.cpp b/src/zfile_archive.cpp new file mode 100644 index 00000000..0d7a1552 --- /dev/null +++ b/src/zfile_archive.cpp @@ -0,0 +1,873 @@ + /* + * UAE - The Un*x Amiga Emulator + * + * transparent archive handling + * + * 2007 Toni Wilen + */ + +#include "sysconfig.h" +#include "sysdeps.h" + +#include "options.h" +#include "zfile.h" +#include "archivers/zip/unzip.h" +#include "archivers/dms/pfile.h" +#include "crc32.h" +#include "zarchive.h" +#include "disk.h" + +#include + +#ifdef _WIN32 +#include +#include "win32.h" +#endif + +static time_t fromdostime(uae_u32 dd) +{ + struct tm tm; + time_t t; + memset(&tm, 0, sizeof tm); + tm.tm_hour = (dd >> 11) & 0x1f; + tm.tm_min = (dd >> 5) & 0x3f; + tm.tm_sec = ((dd >> 0) & 0x1f) * 2; + tm.tm_year = ((dd >> 25) & 0x7f) + 80; + tm.tm_mon = ((dd >> 21) & 0x0f) - 1; + tm.tm_mday = (dd >> 16) & 0x1f; + t = mktime(&tm); + tzset(); + t -= timezone; + return t; +} + +static struct zvolume *getzvolume(struct zfile *zf, unsigned int id) +{ + struct zvolume *zv; + + switch (id) + { + case ArchiveFormatZIP: + zv = archive_directory_zip (zf); + break; + case ArchiveFormat7Zip: + zv = archive_directory_7z (zf); + break; +// case ArchiveFormatRAR: +// zv = archive_directory_rar (zf); +// break; +// case ArchiveFormatLHA: +// zv = archive_directory_lha (zf); +// break; +// case ArchiveFormatLZX: +// zv = archive_directory_lzx (zf); +// break; + case ArchiveFormatPLAIN: + zv = archive_directory_plain (zf); + break; + } +#ifdef ARCHIVEACCESS + if (!zv) + zv = archive_directory_arcacc (zf, id); +#endif + return zv; +} + +struct zfile *archive_getzfile(struct znode *zn, unsigned int id) +{ + struct zfile *zf = NULL; + switch (id) + { + case ArchiveFormatZIP: + zf = archive_access_zip (zn); + break; + case ArchiveFormat7Zip: + zf = archive_access_7z (zn); + break; +// case ArchiveFormatRAR: +// zf = archive_access_rar (zn); +// break; +// case ArchiveFormatLHA: +// zf = archive_access_lha (zn); +// break; +// case ArchiveFormatLZX: +// zf = archive_access_lzx (zn); +// break; + case ArchiveFormatPLAIN: + zf = archive_access_plain (zn); + break; + } + return zf; +} + +struct zfile *archive_access_select (struct zfile *zf, unsigned int id, int dodefault) +{ + struct zvolume *zv; + struct znode *zn; + int zipcnt, first, select; + char tmphist[MAX_DPATH]; + struct zfile *z = NULL; + int we_have_file; + + zv = getzvolume(zf, id); + if (!zv) + return zf; + we_have_file = 0; + tmphist[0] = 0; + zipcnt = 1; + first = 1; + zn = &zv->root; + while (zn) { + int isok = 1; + + if (!zn->isfile) + isok = 0; + if (zfile_is_ignore_ext(zn->fullname)) + isok = 0; + if (isok) { + if (tmphist[0]) { + DISK_history_add (tmphist, -1); + tmphist[0] = 0; + first = 0; + } + if (first) { + if (zfile_isdiskimage (zn->fullname)) + strcpy (tmphist, zn->fullname); + } else { + strcpy (tmphist, zn->fullname); + DISK_history_add (tmphist, -1); + tmphist[0] = 0; + } + select = 0; + if (!zf->zipname) + select = 1; + if (zf->zipname && strlen (zn->fullname) >= strlen (zf->zipname) && !strcasecmp (zf->zipname, zn->fullname + strlen (zn->fullname) - strlen (zf->zipname))) + select = -1; + if (zf->zipname && zf->zipname[0] == '#' && atol (zf->zipname + 1) == zipcnt) + select = -1; + if (select && !we_have_file) { + z = archive_getzfile(zn, id); + if (z) { + if (select < 0 || zfile_gettype (z)) + we_have_file = 1; + if (!we_have_file) { + zfile_fclose(z); + z = NULL; + } + } + } + } + zipcnt++; + zn = zn->next; + } + if (first && tmphist[0]) + DISK_history_add (zfile_getname(zf), -1); + zfile_fclose_archive (zv); + if (z) { + zfile_fclose(zf); + zf = z; + } else if (!dodefault && zf->zipname && zf->zipname[0]) { + zfile_fclose(zf); + zf = NULL; + } + return zf; +} + +struct zfile *archive_access_arcacc_select (struct zfile *zf, unsigned int id) +{ + return zf; +} + +void archive_access_scan (struct zfile *zf, zfile_callback zc, void *user, unsigned int id) +{ + struct zvolume *zv; + struct znode *zn; + + zv = getzvolume(zf, id); + if (!zv) + return; + zn = &zv->root; + while (zn) { + if (zn->isfile) { + struct zfile *zf2 = archive_getzfile (zn, id); + if (zf2) { + int ztype = iszip (zf2); + if (ztype) { + zfile_fclose (zf2); + } else { + int ret = zc (zf2, user); + zfile_fclose(zf2); + if (ret) + break; + } + } + } + zn = zn->next; + } + zfile_fclose_archive (zv); +} + +/* ZIP */ + +static void archive_close_zip (void *handle) +{ + unzClose(handle); +} + +struct zvolume *archive_directory_zip (struct zfile *z) +{ + unzFile uz; + unz_file_info file_info; + char filename_inzip[MAX_DPATH]; + struct zvolume *zv; + int err; + + uz = unzOpen (z); + if (!uz) + return 0; + if (unzGoToFirstFile (uz) != UNZ_OK) + return 0; + zv = zvolume_alloc(z, ArchiveFormatZIP, uz); + for (;;) { + char c; + struct zarchive_info zai; + time_t t; + unsigned int dd; + err = unzGetCurrentFileInfo(uz, &file_info, filename_inzip, sizeof(filename_inzip), NULL, 0, NULL, 0); + if (err != UNZ_OK) + return 0; + dd = file_info.dosDate; + t = fromdostime(dd); + memset(&zai, 0, sizeof zai); + zai.name = filename_inzip; + zai.t = t; + c = filename_inzip[strlen(filename_inzip) - 1]; + if (c != '/' && c != '\\') { + int err = unzOpenCurrentFile (uz); + if (err == UNZ_OK) { + struct znode *zn; + zai.size = file_info.uncompressed_size; + zn = zvolume_addfile_abs(zv, &zai); + } + } else { + filename_inzip[strlen(filename_inzip) - 1] = 0; + zvolume_adddir_abs(zv, &zai); + } + err = unzGoToNextFile (uz); + if (err != UNZ_OK) + break; + } + zv->method = ArchiveFormatZIP; + return zv; +} + + +struct zfile *archive_access_zip (struct znode *zn) +{ + struct zfile *z = NULL; + unzFile uz = zn->volume->handle; + int i, err; + char tmp[MAX_DPATH]; + + strcpy (tmp, zn->fullname + strlen(zn->volume->root.fullname) + 1); + if (unzGoToFirstFile (uz) != UNZ_OK) + return 0; + for (i = 0; tmp[i]; i++) { + if (tmp[i] == '\\') + tmp[i] = '/'; + } + if (unzLocateFile (uz, tmp, 1) != UNZ_OK) { + for (i = 0; tmp[i]; i++) { + if (tmp[i] == '/') + tmp[i] = '\\'; + } + if (unzLocateFile (uz, tmp, 1) != UNZ_OK) + return 0; + } + if (unzOpenCurrentFile (uz) != UNZ_OK) + return 0; + z = zfile_fopen_empty (zn->fullname, zn->size); + if (z) { + err = unzReadCurrentFile (uz, z->data, zn->size); + } + unzCloseCurrentFile (uz); + return z; +} + +/* 7Z */ + +#include "archivers/7z/7zCrc.h" +#include "archivers/7z/7zIn.h" +#include "archivers/7z/7zExtract.h" + +typedef struct _CFileInStream +{ + ISzInStream InStream; + struct zfile *zf; +} CFileInStream; + +static ISzAlloc allocImp; +static ISzAlloc allocTempImp; + +static SZ_RESULT SzFileReadImp(void *object, void *buffer, size_t size, size_t *processedSize) +{ + CFileInStream *s = (CFileInStream *)object; + size_t processedSizeLoc = zfile_fread(buffer, 1, size, s->zf); + if (processedSize != 0) + *processedSize = processedSizeLoc; + return SZ_OK; +} + +static SZ_RESULT SzFileSeekImp(void *object, CFileSize pos) +{ + CFileInStream *s = (CFileInStream *)object; + int res = zfile_fseek(s->zf, pos, SEEK_SET); + if (res == 0) + return SZ_OK; + return SZE_FAIL; +} + +static void init_7z(void) +{ + static int initialized; + + if (initialized) + return; + initialized = 1; + allocImp.Alloc = SzAlloc; + allocImp.Free = SzFree; + allocTempImp.Alloc = SzAllocTemp; + allocTempImp.Free = SzFreeTemp; + InitCrcTable(); +} + +struct SevenZContext +{ + CArchiveDatabaseEx db; + CFileInStream archiveStream; + Byte *outBuffer; + size_t outBufferSize; + UInt32 blockIndex; +}; + +static void archive_close_7z (struct SevenZContext *ctx) +{ + SzArDbExFree(&ctx->db, allocImp.Free); + allocImp.Free(ctx->outBuffer); + xfree(ctx); +} + +struct zvolume *archive_directory_7z (struct zfile *z) +{ + SZ_RESULT res; + struct zvolume *zv; + int i; + struct SevenZContext *ctx; + + init_7z(); + ctx = (struct SevenZContext *) xcalloc (sizeof (struct SevenZContext), 1); + ctx->blockIndex = 0xffffffff; + ctx->archiveStream.InStream.Read = SzFileReadImp; + ctx->archiveStream.InStream.Seek = SzFileSeekImp; + SzArDbExInit(&ctx->db); + ctx->archiveStream.zf = z; + res = SzArchiveOpen(&ctx->archiveStream.InStream, &ctx->db, &allocImp, &allocTempImp); + if (res != SZ_OK) { + write_log("7Z: SzArchiveOpen %s returned %d\n", zfile_getname(z), res); + return NULL; + } + zv = zvolume_alloc(z, ArchiveFormat7Zip, ctx); + for (i = 0; i < ctx->db.Database.NumFiles; i++) { + CFileItem *f = ctx->db.Database.Files + i; + char *name = f->Name; + struct zarchive_info zai; + + memset(&zai, 0, sizeof zai); + zai.name = name; + zai.size = f->Size; + if (!f->IsDirectory) { + struct znode *zn = zvolume_addfile_abs(zv, &zai); + zn->offset = i; + } + } + zv->method = ArchiveFormat7Zip; + return zv; +} + +struct zfile *archive_access_7z (struct znode *zn) +{ + SZ_RESULT res; + struct zvolume *zv = zn->volume; + struct zfile *z = NULL; + size_t offset; + size_t outSizeProcessed; + struct SevenZContext *ctx; + + ctx = (struct SevenZContext *) zv->handle; + res = SzExtract(&ctx->archiveStream.InStream, &ctx->db, zn->offset, + &ctx->blockIndex, &ctx->outBuffer, &ctx->outBufferSize, + &offset, &outSizeProcessed, + &allocImp, &allocTempImp); + if (res == SZ_OK) { + z = zfile_fopen_empty (zn->fullname, zn->size); + zfile_fwrite (ctx->outBuffer + offset, zn->size, 1, z); + } else { + write_log("7Z: SzExtract %s returned %d\n", zn->fullname, res); + } + return z; +} + +/* RAR */ + + +#ifdef _WIN32 + +/* copy and paste job? you are only imagining it! */ +static struct zfile *rarunpackzf; /* stupid unrar.dll */ +#include +typedef HANDLE (_stdcall* RAROPENARCHIVE)(struct RAROpenArchiveData*); +static RAROPENARCHIVE pRAROpenArchive; +typedef int (_stdcall* RARREADHEADEREX)(HANDLE,struct RARHeaderDataEx*); +static RARREADHEADEREX pRARReadHeaderEx; +typedef int (_stdcall* RARPROCESSFILE)(HANDLE,int,char*,char *); +static RARPROCESSFILE pRARProcessFile; +typedef int (_stdcall* RARCLOSEARCHIVE)(HANDLE); +static RARCLOSEARCHIVE pRARCloseArchive; +typedef void (_stdcall* RARSETCALLBACK)(HANDLE,UNRARCALLBACK,LONG); +static RARSETCALLBACK pRARSetCallback; +typedef int (_stdcall* RARGETDLLVERSION)(void); +static RARGETDLLVERSION pRARGetDllVersion; + +#endif + +static int rar_resetf(struct zfile *z) +{ + z->f = fopen (z->name, "rb"); + if (!z->f) { + zfile_fclose (z); + return 0; + } + return 1; +} + +static int canrar(void) +{ + static int israr; + + if (israr == 0) { + israr = -1; +#ifdef _WIN32 + { + HMODULE rarlib; + + rarlib = WIN32_LoadLibrary("unrar.dll"); + if (rarlib) { + pRAROpenArchive = (RAROPENARCHIVE)GetProcAddress (rarlib, "RAROpenArchive"); + pRARReadHeaderEx = (RARREADHEADEREX)GetProcAddress (rarlib, "RARReadHeaderEx"); + pRARProcessFile = (RARPROCESSFILE)GetProcAddress (rarlib, "RARProcessFile"); + pRARCloseArchive = (RARCLOSEARCHIVE)GetProcAddress (rarlib, "RARCloseArchive"); + pRARSetCallback = (RARSETCALLBACK)GetProcAddress (rarlib, "RARSetCallback"); + pRARGetDllVersion = (RARGETDLLVERSION)GetProcAddress (rarlib, "RARGetDllVersion"); + if (pRAROpenArchive && pRARReadHeaderEx && pRARProcessFile && pRARCloseArchive && pRARSetCallback) { + israr = 1; + write_log ("unrar.dll version %08.8X detected and used\n", pRARGetDllVersion ? pRARGetDllVersion() : -1); + + } + } + } +#endif + } + return israr < 0 ? 0 : 1; +} + +#ifdef _WIN32 +static int CALLBACK RARCallbackProc(UINT msg,LONG UserData,LONG P1,LONG P2) +{ + if (msg == UCM_PROCESSDATA) { + zfile_fwrite((uae_u8*)P1, 1, P2, rarunpackzf); + return 0; + } + return -1; +} +#endif + +#ifdef _WIN32 +struct RARContext +{ + struct RAROpenArchiveData OpenArchiveData; + struct RARHeaderDataEx HeaderData; + HANDLE hArcData; +}; +#endif + + +static void archive_close_rar(struct RARContext *rc) +{ +#ifdef _WIN32 + xfree(rc); +#endif +} + +struct zvolume *archive_directory_rar (struct zfile *z) +{ +#ifdef _WIN32 + struct zvolume *zv; + struct RARContext *rc; + struct zfile *zftmp; + int cnt; + + if (!canrar()) + return archive_directory_arcacc (z, ArchiveFormatRAR); + if (z->data) + /* wtf? stupid unrar.dll only accept filename as an input.. */ + return archive_directory_arcacc (z, ArchiveFormatRAR); + rc = xcalloc (sizeof (struct RARContext), 1); + zv = zvolume_alloc(z, ArchiveFormatRAR, rc); + fclose (z->f); /* bleh, unrar.dll fails to open the archive if it is already open.. */ + z->f = NULL; + rc->OpenArchiveData.ArcName = z->name; + rc->OpenArchiveData.OpenMode = RAR_OM_LIST; + rc->hArcData = pRAROpenArchive(&rc->OpenArchiveData); + if (rc->OpenArchiveData.OpenResult != 0) { + xfree(rc); + if (!rar_resetf(z)) { + zfile_fclose_archive(zv); + return NULL; + } + zfile_fclose_archive(zv); + return archive_directory_arcacc (z, ArchiveFormatRAR); + } + pRARSetCallback(rc->hArcData, RARCallbackProc, 0); + cnt = 0; + while (pRARReadHeaderEx(rc->hArcData, &rc->HeaderData) == 0) { + char *name = rc->HeaderData.FileName; + struct zarchive_info zai; + struct znode *zn; + memset(&zai, 0, sizeof zai); + zai.name = name; + zai.size = rc->HeaderData.UnpSize; + zai.t = fromdostime(rc->HeaderData.FileTime); + zn = zvolume_addfile_abs(zv, &zai); + zn->offset = cnt++; + pRARProcessFile(rc->hArcData, RAR_SKIP, NULL, NULL); + } + pRARCloseArchive(rc->hArcData); + zftmp = zfile_fopen_empty (z->name, 0); + zv->archive = zftmp; + zv->method = ArchiveFormatRAR; + return zv; +#else + return NULL; +#endif +} + +struct zfile *archive_access_rar (struct znode *zn) +{ +#ifdef _WIN32 + struct RARContext *rc = zn->volume->handle; + int i; + struct zfile *zf = NULL; + + if (zn->volume->method != ArchiveFormatRAR) + return archive_access_arcacc (zn); + rc->OpenArchiveData.OpenMode = RAR_OM_EXTRACT; + rc->hArcData = pRAROpenArchive(&rc->OpenArchiveData); + if (rc->OpenArchiveData.OpenResult != 0) + return NULL; + pRARSetCallback(rc->hArcData, RARCallbackProc, 0); + for (i = 0; i <= zn->offset; i++) { + if (pRARReadHeaderEx(rc->hArcData, &rc->HeaderData)) + return NULL; + if (i < zn->offset) { + if (pRARProcessFile(rc->hArcData, RAR_SKIP, NULL, NULL)) + goto end; + } + } + zf = zfile_fopen_empty (zn->fullname, zn->size); + rarunpackzf = zf; + if (pRARProcessFile(rc->hArcData, RAR_TEST, NULL, NULL)) { + zfile_fclose(zf); + zf = NULL; + } +end: + pRARCloseArchive(rc->hArcData); + return zf; +#else + return NULL; +#endif +} + +/* ArchiveAccess */ + + +#if defined(ARCHIVEACCESS) + +struct aaFILETIME +{ + uae_u32 dwLowDateTime; + uae_u32 dwHighDateTime; +}; +typedef void* aaHandle; +// This struct contains file information from an archive. The caller may store +// this information for accessing this file after calls to findFirst, findNext +#define FileInArchiveInfoStringSize 1024 +struct aaFileInArchiveInfo { + int ArchiveHandle; // handle for Archive/class pointer + uae_u64 CompressedFileSize; + uae_u64 UncompressedFileSize; + uae_u32 attributes; + int IsDir, IsEncrypted; + struct aaFILETIME LastWriteTime; + char path[FileInArchiveInfoStringSize]; +}; + +typedef HRESULT (__stdcall *aaReadCallback)(int StreamID, uae_u64 offset, uae_u32 count, void* buf, uae_u32 *processedSize); +typedef HRESULT (__stdcall *aaWriteCallback)(int StreamID, uae_u64 offset, uae_u32 count, const void *buf, uae_u32 *processedSize); +typedef aaHandle (__stdcall *aapOpenArchive)(aaReadCallback function, int StreamID, uae_u64 FileSize, int ArchiveType, int *result, char *password); +typedef int (__stdcall *aapGetFileCount)(aaHandle ArchiveHandle); +typedef int (__stdcall *aapGetFileInfo)(aaHandle ArchiveHandle, int FileNum, struct aaFileInArchiveInfo *FileInfo); +typedef int (__stdcall *aapExtract)(aaHandle ArchiveHandle, int FileNum, int StreamID, aaWriteCallback WriteFunc, uae_u64 *written); +typedef int (__stdcall *aapCloseArchive)(aaHandle ArchiveHandle); + +static aapOpenArchive aaOpenArchive; +static aapGetFileCount aaGetFileCount; +static aapGetFileInfo aaGetFileInfo; +static aapExtract aaExtract; +static aapCloseArchive aaCloseArchive; + +#ifdef _WIN32 +static HMODULE arcacc_mod; + +static void arcacc_free (void) +{ + if (arcacc_mod) + FreeLibrary (arcacc_mod); + arcacc_mod = NULL; +} + +static int arcacc_init (struct zfile *zf) +{ + if (arcacc_mod) + return 1; + arcacc_mod = WIN32_LoadLibrary ("archiveaccess.dll"); + if (!arcacc_mod) { + write_log ("failed to open archiveaccess.dll ('%s')\n", zfile_getname (zf)); + return 0; + } + aaOpenArchive = (aapOpenArchive) GetProcAddress (arcacc_mod, "aaOpenArchive"); + aaGetFileCount = (aapGetFileCount) GetProcAddress (arcacc_mod, "aaGetFileCount"); + aaGetFileInfo = (aapGetFileInfo) GetProcAddress (arcacc_mod, "aaGetFileInfo"); + aaExtract = (aapExtract) GetProcAddress (arcacc_mod, "aaExtract"); + aaCloseArchive = (aapCloseArchive) GetProcAddress (arcacc_mod, "aaCloseArchive"); + if (!aaOpenArchive || !aaGetFileCount || !aaGetFileInfo || !aaExtract || !aaCloseArchive) { + write_log ("Missing functions in archiveaccess.dll. Old version?\n"); + arcacc_free (); + return 0; + } + return 1; +} +#endif + +#define ARCACC_STACKSIZE 10 +static struct zfile *arcacc_stack[ARCACC_STACKSIZE]; +static int arcacc_stackptr = -1; + +static int arcacc_push (struct zfile *f) +{ + if (arcacc_stackptr == ARCACC_STACKSIZE - 1) + return -1; + arcacc_stackptr++; + arcacc_stack[arcacc_stackptr] = f; + return arcacc_stackptr; +} +static void arcacc_pop (void) +{ + arcacc_stackptr--; +} + +static HRESULT __stdcall readCallback (int StreamID, uae_u64 offset, uae_u32 count, void *buf, uae_u32 *processedSize) +{ + struct zfile *f = arcacc_stack[StreamID]; + int ret; + + zfile_fseek (f, (long)offset, SEEK_SET); + ret = zfile_fread (buf, 1, count, f); + if (processedSize) + *processedSize = ret; + return 0; +} +static HRESULT __stdcall writeCallback (int StreamID, uae_u64 offset, uae_u32 count, const void *buf, uae_u32 *processedSize) +{ + struct zfile *f = arcacc_stack[StreamID]; + int ret; + + ret = zfile_fwrite ((void*)buf, 1, count, f); + if (processedSize) + *processedSize = ret; + if (ret != count) + return -1; + return 0; +} + +struct zvolume *archive_directory_arcacc (struct zfile *z, unsigned int id) +{ + aaHandle ah; + int id_r, status; + int fc, f; + struct zvolume *zv; + int skipsize = 0; + + if (!arcacc_init (z)) + return NULL; + zv = zvolume_alloc(z, id, NULL); + id_r = arcacc_push (z); + ah = aaOpenArchive (readCallback, id_r, zv->archivesize, id, &status, NULL); + if (!status) { + zv->handle = ah; + fc = aaGetFileCount (ah); + for (f = 0; f < fc; f++) { + struct aaFileInArchiveInfo fi; + char *name; + struct znode *zn; + struct zarchive_info zai; + + memset (&fi, 0, sizeof (fi)); + aaGetFileInfo (ah, f, &fi); + if (fi.IsDir) + continue; + + name = fi.path; + memset(&zai, 0, sizeof zai); + zai.name = name; + zai.size = (unsigned int)fi.UncompressedFileSize; + zn = zvolume_addfile_abs(zv, &zai); + zn->offset = f; + zn->method = id; + + if (id == ArchiveFormat7Zip) { + if (fi.CompressedFileSize) + skipsize = 0; + skipsize += (int)fi.UncompressedFileSize; + } + } + aaCloseArchive (ah); + } + arcacc_pop (); + zv->method = ArchiveFormatAA; + return zv; +} + + +struct zfile *archive_access_arcacc (struct znode *zn) +{ + struct zfile *zf; + struct zfile *z = zn->volume->archive; + int status, id_r, id_w; + aaHandle ah; + int ok = 0; + + id_r = arcacc_push (z); + ah = aaOpenArchive (readCallback, id_r, zn->volume->archivesize, zn->method, &status, NULL); + if (!status) { + int err; + uae_u64 written = 0; + struct aaFileInArchiveInfo fi; + memset (&fi, 0, sizeof (fi)); + aaGetFileInfo (ah, zn->offset, &fi); + zf = zfile_fopen_empty (zn->fullname, zn->size); + id_w = arcacc_push (zf); + err = aaExtract(ah, zn->offset, id_w, writeCallback, &written); + if (zf->seek == fi.UncompressedFileSize) + ok = 1; + arcacc_pop(); + } + aaCloseArchive(ah); + arcacc_pop(); + if (ok) + return zf; + zfile_fclose(zf); + return NULL; +} +#endif + +void archive_access_close (void *handle, unsigned int id) +{ + switch (id) + { + case ArchiveFormatZIP: + archive_close_zip(handle); + break; + case ArchiveFormat7Zip: + archive_close_7z((struct SevenZContext *)handle); + break; + case ArchiveFormatRAR: + archive_close_rar((struct RARContext *)handle); + break; + case ArchiveFormatLHA: + break; + } +} + +/* plain single file */ + +static void addfile(struct zvolume *zv, const char *path, uae_u8 *data, int size) +{ + struct zarchive_info zai; + struct znode *zn; + struct zfile *z = zfile_fopen_empty (path, size); + + zfile_fwrite(data, size, 1, z); + memset(&zai, 0, sizeof zai); + zai.name = path; + zai.size = size; + zn = zvolume_addfile_abs(zv, &zai); + if (zn) + zn->f = z; + else + zfile_fclose(z); +} + +static uae_u8 exeheader[]={0x00,0x00,0x03,0xf3,0x00,0x00,0x00,0x00}; +struct zvolume *archive_directory_plain (struct zfile *z) +{ + struct zvolume *zv; + struct znode *zn; + struct zarchive_info zai; + int i; + char *filename; + uae_u8 id[8]; + + memset(&zai, 0, sizeof zai); + zv = zvolume_alloc(z, ArchiveFormatPLAIN, NULL); + for (i = strlen(z->name) - 1; i >= 0; i--) { + if (z->name[i] == '\\' || z->name[i] == '/' || z->name[i] == ':') { + i++; + break; + } + } + filename = &z->name[i]; + memset(id, 0, sizeof id); + zai.name = filename; + zfile_fseek(z, 0, SEEK_END); + zai.size = zfile_ftell(z); + zfile_fseek(z, 0, SEEK_SET); + zfile_fread(id, sizeof id, 1, z); + zfile_fseek(z, 0, SEEK_SET); + zn = zvolume_addfile_abs(zv, &zai); + if (!memcmp (id, exeheader, sizeof id)) { + char *data = (char *)xmalloc(1 + strlen(filename) + 1 + 2); + sprintf(data,"\"%s\"\n", filename); + addfile(zv, "s/startup-sequence", (uae_u8 *)data, strlen(data)); + xfree(data); + } + return zv; +} + +struct zfile *archive_access_plain (struct znode *zn) +{ + struct zfile *z; + + z = zfile_fopen_empty (zn->fullname, zn->size); + zfile_fread(z->data, zn->size, 1, zn->volume->archive); + return z; +}