From 975a634a38ab1ae6b265b0872f9068733c0d4884 Mon Sep 17 00:00:00 2001 From: Chips Date: Sat, 27 Aug 2016 20:39:53 +0200 Subject: [PATCH] Merge latest TomB version as of 22 August 2016 --- Makefile | 30 +- src/akiko.cpp | 299 +- src/archivers/dms/pfile.cpp | 5 +- src/archivers/dms/pfile.h | 9 +- src/archivers/lha/dhuf.cpp | 2 +- src/archivers/lha/lha.h | 2 +- src/archivers/lha/slide.cpp | 12 +- src/archivers/lha/uae_lha.cpp | 21 +- src/archivers/lzx/unlzx.cpp | 111 +- src/audio.cpp | 293 +- src/autoconf.cpp | 52 +- src/blitfunc.cpp | 260 +- src/blitter.cpp | 147 +- src/blkdev.cpp | 341 +- src/blkdev_cdimage.cpp | 103 +- src/bsdsocket.cpp | 225 +- src/build68k.cpp | 19 +- src/calc.cpp | 453 ++ src/cfgfile.cpp | 912 ++- src/cia.cpp | 120 +- src/cpudefs.cpp | 382 +- src/cpuemu_0.cpp | 1858 ++--- src/cpuemu_11.cpp | 716 +- src/cpuemu_4.cpp | 746 +- src/cpustbl.cpp | 21 + src/custom.cpp | 1522 +++-- src/disk.cpp | 176 +- src/diskutil.cpp | 521 +- src/drawing.cpp | 383 +- src/events.cpp | 5 +- src/expansion.cpp | 126 +- src/filesys.asm | 339 +- src/filesys.cpp | 808 ++- src/filesys_bootrom.cpp | 1094 ++- src/fpp.cpp | 323 +- src/fsdb.cpp | 60 +- src/fsdb_unix.cpp | 46 +- src/fsusage.cpp | 16 +- src/genblitter.cpp | 20 +- src/gencpu.cpp | 48 +- src/gfxutil.cpp | 2 +- src/hardfile.cpp | 413 +- src/include/audio.h | 6 + src/include/autoconf.h | 7 +- src/include/blitter.h | 11 +- src/include/blkdev.h | 16 +- src/include/bsdsocket.h | 411 +- src/include/calc.h | 3 + src/include/cia.h | 1 + src/include/clipboard.h | 2 +- src/include/cpu_prefetch.h | 2 +- src/include/cputbl.h | 20 + src/include/custom.h | 27 +- src/include/disk.h | 2 +- src/include/drawing.h | 24 +- src/include/events.h | 4 +- src/include/filesys.h | 23 + src/include/fsdb.h | 7 +- src/include/gui.h | 8 +- src/include/inputdevice.h | 108 +- src/include/joystick.h | 13 - src/include/keyboard.h | 4 +- src/include/memory.h | 65 +- src/include/native2amiga.h | 4 +- src/include/newcpu.h | 73 +- src/include/options.h | 20 +- src/include/picasso96.h | 6 +- src/include/readcpu.h | 6 +- src/include/savestate.h | 1 + src/include/scsidev.h | 5 +- src/include/statusline.h | 2 + src/include/sysdeps.h | 42 +- src/include/uae.h | 11 +- src/include/xwin.h | 6 +- src/include/zarchive.h | 54 +- src/include/zfile.h | 27 +- src/inputdevice.cpp | 900 ++- src/inputevents.def | 17 +- src/jit/codegen_arm.cpp | 72 +- src/jit/compemu.cpp | 6384 +++++++++--------- src/jit/compemu_midfunc_arm.cpp | 6 +- src/jit/compemu_support.cpp | 20 +- src/jit/compstbl.cpp | 8 + src/jit/gencomp_arm.cpp | 6 +- src/keybuf.cpp | 2 +- src/linetoscr.c | 4 +- src/main.cpp | 97 +- src/md-pandora/m68k.h | 4 +- src/md-pandora/maccess.h | 12 +- src/memory.cpp | 203 +- src/native2amiga.cpp | 16 +- src/newcpu.cpp | 589 +- src/od-gles/gles_gfx.cpp | 71 +- src/od-pandora/bsdsocket_host.cpp | 10 +- src/od-pandora/charset.cpp | 84 + src/od-pandora/fsdb_host.cpp | 69 + src/od-pandora/gui/CreateFilesysHardfile.cpp | 6 +- src/od-pandora/gui/EditFilesysHardfile.cpp | 6 +- src/od-pandora/gui/EditFilesysVirtual.cpp | 4 +- src/od-pandora/gui/InGameMessage.cpp | 2 +- src/od-pandora/gui/Navigation.cpp | 6 +- src/od-pandora/gui/PanelCPU.cpp | 1 - src/od-pandora/gui/PanelChipset.cpp | 13 +- src/od-pandora/gui/PanelConfig.cpp | 5 +- src/od-pandora/gui/PanelDisplay.cpp | 1 - src/od-pandora/gui/PanelFloppy.cpp | 5 +- src/od-pandora/gui/PanelHD.cpp | 1 - src/od-pandora/gui/PanelInput.cpp | 5 +- src/od-pandora/gui/PanelMisc.cpp | 1 - src/od-pandora/gui/PanelPaths.cpp | 1 - src/od-pandora/gui/PanelRAM.cpp | 1 - src/od-pandora/gui/PanelROM.cpp | 1 - src/od-pandora/gui/PanelSavestate.cpp | 3 +- src/od-pandora/gui/PanelSound.cpp | 1 - src/od-pandora/gui/SelectFile.cpp | 1 + src/od-pandora/gui/SelectFolder.cpp | 1 + src/od-pandora/gui/ShowMessage.cpp | 1 + src/od-pandora/gui/main_window.cpp | 14 +- src/od-pandora/mp3decoder.cpp | 1 - src/od-pandora/neon_helper.s | 2 - src/od-pandora/pandora.cpp | 32 +- src/od-pandora/pandora_gfx.cpp | 151 +- src/od-pandora/pandora_gui.cpp | 6 +- src/od-pandora/pandora_input.cpp | 50 +- src/od-pandora/pandora_mem.cpp | 32 +- src/od-pandora/pandora_rp9.cpp | 8 +- src/od-pandora/picasso96.cpp | 179 +- src/od-pandora/sigsegv_handler.cpp | 129 +- src/od-pandora/sysconfig.h | 20 +- src/od-pandora/target.h | 51 + src/od-pandora/writelog.cpp | 2 +- src/od-rasp/rasp_gfx.cpp | 71 +- src/readcpu.cpp | 25 +- src/rommgr.cpp | 14 +- src/savestate.cpp | 48 +- src/sd-pandora/sound.cpp | 16 +- src/sd-pandora/sound.h | 8 + src/sd-sdl/sound_sdl_new.cpp | 4 + src/sinctable.cpp | 1256 ++-- src/statusline.cpp | 148 + src/table68k | 390 +- src/trace.c | 81 + src/traps.cpp | 60 +- src/uaelib.cpp | 53 +- src/uaeresource.cpp | 5 +- src/zfile.cpp | 1029 ++- src/zfile_archive.cpp | 1019 ++- 147 files changed, 16789 insertions(+), 10817 deletions(-) create mode 100644 src/calc.cpp create mode 100644 src/include/calc.h delete mode 100644 src/include/joystick.h create mode 100644 src/od-pandora/charset.cpp create mode 100644 src/statusline.cpp create mode 100644 src/trace.c diff --git a/Makefile b/Makefile index 49a5d277..52279e9a 100644 --- a/Makefile +++ b/Makefile @@ -39,7 +39,12 @@ PROG = $(NAME) all: $(PROG) +#DEBUG=1 +#TRACER=1 + PANDORA=1 +#GEN_PROFILE=1 +#USE_PROFILE=1 SDL_CFLAGS = `sdl-config --cflags` @@ -62,14 +67,19 @@ MORE_CFLAGS += -I/opt/vc/include -I/opt/vc/include/interface/vmcs_host/linux -I/ MORE_CFLAGS += -Isrc -Isrc/od-pandora -Isrc/gp2x -Isrc/threaddep -Isrc/menu -Isrc/include -Isrc/gp2x/menu -Wno-unused -Wno-format -DGCCCONSTFUNC="__attribute__((const))" MORE_CFLAGS += -fexceptions -fpermissive -LDFLAGS += -lSDL -lpthread -lm -lz -lSDL_image -lpng -lrt -lxml2 -lFLAC -lmpg123 +LDFLAGS += -lSDL -lpthread -lm -lz -lSDL_image -lpng -lrt -lxml2 -lFLAC -lmpg123 -ldl LDFLAGS += -lSDL_ttf -lguichan_sdl -lguichan -L/opt/vc/lib ifndef DEBUG -MORE_CFLAGS += -O3 -fomit-frame-pointer +MORE_CFLAGS += -Ofast -fomit-frame-pointer MORE_CFLAGS += -finline -fno-builtin else -MORE_CFLAGS += -ggdb +MORE_CFLAGS += -g -DDEBUG -Wl,--export-dynamic + +ifdef TRACER +TRACE_CFLAGS = -DTRACER -finstrument-functions -Wall -rdynamic +endif + endif ASFLAGS += $(CPU_FLAGS) @@ -77,7 +87,13 @@ ASFLAGS += $(CPU_FLAGS) CXXFLAGS += $(SDL_CFLAGS) $(CPU_FLAGS) $(DEFS) $(MORE_CFLAGS) -# src/kb-sdl/keyboard.o \ +ifdef GEN_PROFILE +MORE_CFLAGS += -fprofile-generate=/media/MAINSD/pandora/test -fprofile-arcs +endif +ifdef USE_PROFILE +MORE_CFLAGS += -fprofile-use -fbranch-probabilities -fvpt -funroll-loops -fpeel-loops -ftracer -ftree-loop-distribute-patterns +endif + OBJS = \ src/akiko.o \ @@ -90,6 +106,7 @@ OBJS = \ src/blkdev.o \ src/blkdev_cdimage.o \ src/bsdsocket.o \ + src/calc.o \ src/cdrom.o \ src/cfgfile.o \ src/cia.o \ @@ -114,6 +131,7 @@ OBJS = \ src/native2amiga.o \ src/rommgr.o \ src/savestate.o \ + src/statusline.o \ src/traps.o \ src/uaelib.o \ src/uaeresource.o \ @@ -160,6 +178,7 @@ OBJS = \ src/md-pandora/support.o \ src/od-pandora/bsdsocket_host.o \ src/od-pandora/cda_play.o \ + src/od-pandora/charset.o \ src/od-pandora/fsdb_host.o \ src/od-pandora/hardfile_pandora.o \ src/od-pandora/keyboard.o \ @@ -247,6 +266,9 @@ OBJS += src/jit/compemu_support.o src/osdep/neon_helper.o: src/osdep/neon_helper.s $(CXX) $(CPU_FLAGS) -Wall -o src/osdep/neon_helper.o -c src/osdep/neon_helper.s +src/trace.o: src/trace.c + $(CC) $(MORE_CFLAGS) -c src/trace.c -o src/trace.o + $(PROG): $(OBJS) $(CXX) -o $(PROG) $(OBJS) $(LDFLAGS) ifndef DEBUG diff --git a/src/akiko.cpp b/src/akiko.cpp index 9806270e..2bb65d3b 100644 --- a/src/akiko.cpp +++ b/src/akiko.cpp @@ -27,7 +27,6 @@ #include "crc32.h" #include "uae.h" #include "custom.h" -#include "uae.h" #define AKIKO_DEBUG_NVRAM 0 #define AKIKO_DEBUG_IO 0 @@ -445,6 +444,7 @@ static uae_u32 cdrom_pbx; static uae_u8 cdcomtxinx; /* 0x19 */ static uae_u8 cdcomrxinx; /* 0x1a */ static uae_u8 cdcomtxcmp; /* 0x1d */ +static uae_u8 cdcomrxcmp; /* 0x1f */ static uae_u8 cdrom_result_buffer[32]; static uae_u8 cdrom_command_buffer[32]; static uae_u8 cdrom_command; @@ -457,7 +457,7 @@ static uae_u8 qcode_buf[SUBQ_SIZE]; static int qcode_valid; static int cdrom_disk, cdrom_paused, cdrom_playing, cdrom_audiostatus; -static int cdrom_command_active, cdrom_command_startdelay, cdrom_command_idle; +static int cdrom_command_active; static int cdrom_command_length; static int cdrom_checksum_error, cdrom_unknown_command; static int cdrom_data_offset, cdrom_speed, cdrom_sector_counter; @@ -465,10 +465,10 @@ static int cdrom_current_sector, cdrom_seek_delay; static int cdrom_data_end; static int cdrom_audiotimeout; static int cdrom_led; -static int cdrom_dosomething; -static int cdrom_receive_started; +static int cdrom_receive_length, cdrom_receive_offset; static int cdrom_muted; static int cd_initialized; +static int cdrom_tx_dma_delay; static uae_u8 *sector_buffer_1, *sector_buffer_2; static int sector_buffer_sector_1, sector_buffer_sector_2; @@ -541,7 +541,7 @@ static void subfunc (uae_u8 *data, int cnt) memset (subcodebufferinuse, 0,sizeof (subcodebufferinuse)); subcodebufferoffsetw = subcodebufferoffset = 0; uae_sem_post (&sub_sem); - write_log (_T("CD32: subcode buffer overflow 1\n")); + //write_log (_T("CD32: subcode buffer overflow 1\n")); return; } int offset = subcodebufferoffsetw; @@ -567,17 +567,19 @@ static int statusfunc (int status) if (status == -1) return 0; if (status == -2) - return 150; + return 10; +#if 1 if (cdrom_audiostatus != status) { if (status == AUDIO_STATUS_IN_PROGRESS) { cdrom_playing = 1; cdrom_audiotimeout = 1; } - if (cdrom_playing && status != AUDIO_STATUS_IN_PROGRESS && status != AUDIO_STATUS_PAUSED) { + if (cdrom_playing && status != AUDIO_STATUS_IN_PROGRESS && status != AUDIO_STATUS_PAUSED && status != AUDIO_STATUS_NOT_SUPPORTED) { cdrom_audiotimeout = -1; } } cdrom_audiostatus = status; +#endif return 0; } @@ -771,48 +773,76 @@ static void sys_cddev_close (void) } -static int command_lengths[] = { 1,2,1,1,12,2,1,1,4,1,-1,-1,-1,-1,-1,-1 }; +static int command_lengths[] = { 1,2,1,1,12,2,1,1,4,1,2,-1,-1,-1,-1,-1 }; static int cdrom_start_return_data (int len) { - if (cdrom_receive_started > 0) + if (cdrom_receive_length > 0) return 0; if (len <= 0) return -1; - cdrom_receive_started = len; + cdrom_receive_length = len; + cdrom_receive_offset = -1; return 1; } +/* + RX DMA channel writes bytes to memory if DMA enabled, cdcomrxinx != cdcomrxcmp + and there is data available from CDROM firmware code. + + Triggers CDINTERRUPT_RXDMADONE and stops transfer (even if there is + more data available) when cdcomrxinx matches cdcomrxcmp +*/ + static void cdrom_return_data (void) { uae_u32 cmd_buf = cdrx_address; int i; uae_u8 checksum; - int len = cdrom_receive_started; - if (!len) + if (!cdrom_receive_length) return; if (!(cdrom_flags & CDFLAG_RXD)) return; + if (cdcomrxinx == cdcomrxcmp) + return; + #if AKIKO_DEBUG_IO_CMD - write_log (_T("OUT:")); + write_log (_T("OUT IDX=0x%02X-0x%02X LEN=%d,%08x:"), cdcomrxinx, cdcomrxcmp, cdrom_receive_length, cmd_buf); #endif - checksum = 0xff; - for (i = 0; i < len; i++) { - checksum -= cdrom_result_buffer[i]; - put_byte (cmd_buf + ((cdcomrxinx + i) & 0xff), cdrom_result_buffer[i]); + + if (cdrom_receive_offset < 0) { + checksum = 0xff; + for (i = 0; i < cdrom_receive_length; i++) { + checksum -= cdrom_result_buffer[i]; #if AKIKO_DEBUG_IO_CMD - write_log (_T("%02X "), cdrom_result_buffer[i]); + write_log (_T("%02X "), cdrom_result_buffer[i]); +#endif + } +#if AKIKO_DEBUG_IO_CMD + write_log (_T("(%02X)\n"), checksum); +#endif + cdrom_result_buffer[cdrom_receive_length++] = checksum; + cdrom_receive_offset = 0; + } else { +#if AKIKO_DEBUG_IO_CMD + write_log (_T("\n")); #endif } - put_byte (cmd_buf + ((cdcomrxinx + len) & 0xff), checksum); + while (cdrom_receive_offset < cdrom_receive_length && cdcomrxinx != cdcomrxcmp) { + put_byte (cmd_buf + cdcomrxinx, cdrom_result_buffer[cdrom_receive_offset]); + cdcomrxinx++; + cdrom_receive_offset++; + } + if (cdcomrxinx == cdcomrxcmp) { + set_status (CDINTERRUPT_RXDMADONE); #if AKIKO_DEBUG_IO_CMD - write_log (_T("(%02X)\n"), checksum); + write_log (_T("RXDMADONE %d/%d\n"), cdrom_receive_offset, cdrom_receive_length); #endif - cdcomrxinx += len + 1; - cdcomrxinx &= 0xff; - set_status (CDINTERRUPT_RXDMADONE); - cdrom_receive_started = 0; + } + + if (cdrom_receive_offset == cdrom_receive_length) + cdrom_receive_length = 0; } static int cdrom_command_led (void) @@ -859,18 +889,22 @@ static int cdrom_command_status (void) return 20; } -/* return one TOC entry */ +/* return one TOC entry, each TOC entry repeats 3 times */ +#define TOC_REPEAT 3 static int cdrom_return_toc_entry (void) { cdrom_result_buffer[0] = 6; +#if AKIKO_DEBUG_IO_CMD + write_log (_T("CD32: TOC entry %d/%d\n"), cdrom_toc_counter / TOC_REPEAT, cdrom_toc_cd_buffer.points); +#endif if (cdrom_toc_cd_buffer.points == 0) { cdrom_result_buffer[1] = CDS_ERROR; return 15; } cdrom_result_buffer[1] = 0; - memcpy (cdrom_result_buffer + 2, cdrom_toc_buffer + cdrom_toc_counter * 13, 13); + memcpy (cdrom_result_buffer + 2, cdrom_toc_buffer + (cdrom_toc_counter / TOC_REPEAT) * 13, 13); cdrom_toc_counter++; - if (cdrom_toc_counter >= cdrom_toc_cd_buffer.points) + if (cdrom_toc_counter / TOC_REPEAT >= cdrom_toc_cd_buffer.points) cdrom_toc_counter = -1; return 15; } @@ -952,7 +986,9 @@ static int cdrom_command_multi (void) } if (cdrom_command_buffer[7] == 0x80) { /* data read */ +#if AKIKO_DEBUG_IO_CMD int cdrom_data_offset_end = endpos; +#endif cdrom_data_offset = seekpos; cdrom_seek_delay = abs (cdrom_current_sector - cdrom_data_offset); if (cdrom_seek_delay < 100) { @@ -969,21 +1005,21 @@ static int cdrom_command_multi (void) #endif cdrom_result_buffer[1] |= 0x02; } else if (cdrom_command_buffer[10] & 4) { /* play audio */ +#if AKIKO_DEBUG_IO_CMD int scan = 0; if (cdrom_command_buffer[7] & 0x04) scan = 1; else if (cdrom_command_buffer[7] & 0x08) scan = -1; -#if AKIKO_DEBUG_IO_CMD write_log (_T("PLAY FROM %06X (%d) to %06X (%d) SCAN=%d\n"), seekpos, msf2lsn (seekpos), endpos, msf2lsn (endpos), scan); #endif + //cdrom_result_buffer[1] |= CDS_PLAYING; cdrom_playing = 1; if (!cd_play_audio (seekpos, endpos, 0)) { // play didn't start, report it in next status packet cdrom_audiotimeout = -3; } - cdrom_result_buffer[1] |= CDS_PLAYING; } else { #if AKIKO_DEBUG_IO_CMD write_log (_T("SEEKTO %06X\n"),seekpos); @@ -1017,81 +1053,110 @@ static int cdrom_command_subq (void) return 15; } +/* + TX DMA reads bytes from memory and sends them to + CDROM hardware if TX DMA enabled, CDROM data transfer + DMA not enabled and cdcomtxinx != cdcomtx. + + CDINTERRUPT_TXDMADONE triggered when cdromtxinx matches cdcomtx. +*/ + static void cdrom_run_command (void) { int i, cmd_len; uae_u8 checksum; +#if 0 uae_u8 *pp = get_real_address (cdtx_address); +#endif if (!(cdrom_flags & CDFLAG_TXD)) return; - if (cdrom_command_startdelay) + if ((cdrom_flags & CDFLAG_ENABLE)) return; - for (;;) { - if (cdrom_command_active) + if (cdrom_command_active) + return; + if (cdrom_receive_length) return; - if (cdcomtxinx == cdcomtxcmp) - return; - cdrom_command = get_byte (cdtx_address + cdcomtxinx); -#if 1 - if ((cdrom_command & 0xf0) == 0) { - cdcomtxinx = (cdcomtxinx + 1) & 0xff; - return; - } -#endif - cdrom_checksum_error = 0; - cdrom_unknown_command = 0; + if (cdcomtxinx == cdcomtxcmp) + return; + if (cdrom_tx_dma_delay > 0) + return; - cmd_len = command_lengths[cdrom_command & 0x0f]; - if (cmd_len < 0) { -#if AKIKO_DEBUG_IO_CMD - write_log (_T("unknown command %x\n"), cdrom_command & 0x0f); -#endif - cdrom_unknown_command = 1; - cdrom_command_active = 1; - cdrom_command_length = 1; - set_status (CDINTERRUPT_TXDMADONE); - return; - } + cdrom_command = get_byte (cdtx_address + cdcomtxinx); + if (cdrom_command == 0) { + cdcomtxinx++; + return; + } + + cdrom_checksum_error = 0; + cdrom_unknown_command = 0; + + cmd_len = command_lengths[cdrom_command & 0x0f]; + if (cmd_len < 0) { #if AKIKO_DEBUG_IO_CMD - write_log (_T("IN:")); -#endif - checksum = 0; - for (i = 0; i < cmd_len + 1; i++) { - cdrom_command_buffer[i] = get_byte (cdtx_address + ((cdcomtxinx + i) & 0xff)); - checksum += cdrom_command_buffer[i]; -#if AKIKO_DEBUG_IO_CMD - if (i == cmd_len) - write_log (_T("(%02X) "), cdrom_command_buffer[i]); // checksum - else - write_log (_T("%02X "), cdrom_command_buffer[i]); -#endif - } - if (checksum != 0xff) { -#if AKIKO_DEBUG_IO_CMD - write_log (_T(" checksum error")); -#endif - cdrom_checksum_error = 1; - } -#if AKIKO_DEBUG_IO_CMD - write_log (_T("\n")); + write_log (_T("unknown command %x\n"), cdrom_command & 0x0f); #endif + cdrom_unknown_command = 1; cdrom_command_active = 1; - cdrom_command_length = cmd_len; + cdrom_command_length = 1; set_status (CDINTERRUPT_TXDMADONE); return; } + +#if AKIKO_DEBUG_IO_CMD + write_log (_T("IN CMD=%02X IDX=0x%02X-0x%02X LEN=%d:"), cdrom_command & 0x0f, cdcomtxinx, cdcomtxcmp, cmd_len); +#endif + checksum = 0; + for (i = 0; i < cmd_len + 1; i++) { + cdrom_command_buffer[i] = get_byte (cdtx_address + ((cdcomtxinx + i) & 0xff)); + checksum += cdrom_command_buffer[i]; +#if AKIKO_DEBUG_IO_CMD + if (i == cmd_len) + write_log (_T("(%02X) "), cdrom_command_buffer[i]); // checksum + else + write_log (_T("%02X "), cdrom_command_buffer[i]); +#endif + } + if (checksum != 0xff) { +#if AKIKO_DEBUG_IO_CMD + write_log (_T(" checksum error")); +#endif + cdrom_checksum_error = 1; + //activate_debugger (); + } +#if AKIKO_DEBUG_IO_CMD + write_log (_T("\n")); +#endif + cdrom_command_active = 1; + cdrom_command_length = cmd_len; + set_status (CDINTERRUPT_TXDMADONE); } static void cdrom_run_command_run (void) { int len; - cdcomtxinx = (cdcomtxinx + cdrom_command_length + 1) & 0xff; + cdcomtxinx = cdcomtxinx + cdrom_command_length + 1; memset (cdrom_result_buffer, 0, sizeof (cdrom_result_buffer)); + + if (cdrom_checksum_error || cdrom_unknown_command) { + cdrom_result_buffer[0] = (cdrom_command & 0xf0) | 5; + if (cdrom_checksum_error) + cdrom_result_buffer[1] |= CH_ERR_CHECKSUM; + else if (cdrom_unknown_command) + cdrom_result_buffer[1] |= CH_ERR_BADCOMMAND; + len = 2; + cdrom_start_return_data (len); + return; + } + switch (cdrom_command & 0x0f) { + case 0: + len = 1; + cdrom_result_buffer[0] = cdrom_command; + break; case 1: len = cdrom_command_stop (); break; @@ -1105,7 +1170,6 @@ static void cdrom_run_command_run (void) len = cdrom_command_multi (); break; case 5: - cdrom_dosomething = 1; // this is a hack len = cdrom_command_led (); break; case 6: @@ -1120,8 +1184,6 @@ static void cdrom_run_command_run (void) } if (len == 0) return; - if (cdrom_checksum_error || cdrom_unknown_command) - cdrom_result_buffer[1] |= 0x80; cdrom_start_return_data (len); } @@ -1129,7 +1191,6 @@ static void cdrom_run_command_run (void) static void cdrom_run_read (void) { int i, sector, inc; - int read = 0; int sec; int seccnt; @@ -1175,8 +1236,8 @@ static void cdrom_run_read (void) if (sector_buffer_info_1[sec] != 0xff) sector_buffer_info_1[sec]--; #if AKIKO_DEBUG_IO_CMD - write_log (_T("read sector=%d, scnt=%d -> %d. %d %08X\n"), - cdrom_data_offset, cdrom_sector_counter, sector, seccnt, cdrom_addressdata + seccnt * 4096); + write_log (_T("pbx=%04x sec=%d, scnt=%d -> %d. %d (%04x) %08X\n"), + cdrom_pbx, cdrom_data_offset, cdrom_sector_counter, sector, seccnt, 1 << seccnt, cdrom_addressdata + seccnt * 4096); #endif } else { inc = 0; @@ -1187,11 +1248,11 @@ static void cdrom_run_read (void) static int lastmediastate = 0; -static void akiko_handler (void) +static void akiko_handler (bool framesync) { if (unitnum < 0) return; - if (!cd_initialized || cdrom_receive_started) + if (!cd_initialized || cdrom_receive_length) return; if (mediachanged) { @@ -1208,7 +1269,7 @@ static void akiko_handler (void) cdrom_audiotimeout--; if (cdrom_audiotimeout == 1) { // play start cdrom_playing = 1; - cdrom_start_return_data (cdrom_playend_notify (0)); + //cdrom_start_return_data (cdrom_playend_notify (0)); cdrom_audiotimeout = 0; } if (cdrom_audiotimeout == -1) { // play finished (or disk end) @@ -1229,10 +1290,11 @@ static void akiko_handler (void) cdrom_audiotimeout = 0; } - if (cdrom_toc_counter >= 0 && !cdrom_command_active && cdrom_dosomething) { - cdrom_start_return_data (cdrom_return_toc_entry ()); - cdrom_dosomething--; - return; + /* one toc entry / frame */ + if (cdrom_toc_counter >= 0 && !cdrom_command_active) { + if (cdrom_start_return_data (-1)) { + cdrom_start_return_data (cdrom_return_toc_entry ()); + } } } @@ -1247,26 +1309,14 @@ static void akiko_internal (void) if (!cdrom_command_active) cdrom_run_command_run (); } -#if 0 - if (!cdrom_playing && !cdrom_command_active) { - cdrom_command_idle++; - if (cdrom_command_idle > 1000) { - cdrom_command_idle = 0; - cdrom_start_return_data (cdrom_command_idle_status ()); - } - } -#endif } void AKIKO_hsync_handler (void) { + bool framesync = false; if (!currprefs.cs_cd32cd || !akiko_inited) return; - if (cdrom_command_startdelay > 0) { - cdrom_command_startdelay--; - } - static float framecounter; framecounter--; if (framecounter <= 0) { @@ -1276,8 +1326,12 @@ void AKIKO_hsync_handler (void) cdrom_seek_delay--; } framecounter += (float)maxvpos * vblank_hz / (75.0 * cdrom_speed); + framesync = true; } + if (cdrom_tx_dma_delay > 0) + cdrom_tx_dma_delay--; + subcodecounter--; if (subcodecounter <= 0) { if ((cdrom_flags & CDFLAG_SUBCODE) && cdrom_playing && subcodebufferoffset != subcodebufferoffsetw) { @@ -1297,7 +1351,7 @@ void AKIKO_hsync_handler (void) if (subcodebufferoffset >= MAX_SUBCODEBUFFER) subcodebufferoffset -= MAX_SUBCODEBUFFER; set_status (CDINTERRUPT_SUBCODE); - write_log (_T("*")); + //write_log (_T("*")); } uae_sem_post (&sub_sem); } @@ -1310,7 +1364,7 @@ void AKIKO_hsync_handler (void) mediacheckcounter--; akiko_internal (); - akiko_handler (); + akiko_handler (framesync); } /* cdrom data buffering thread */ @@ -1351,7 +1405,6 @@ static void *akiko_thread (void *null) if (frame2counter <= 0) { frame2counter = 312 * 50 / 2; if (unitnum >= 0 && sys_command_cd_qcode (unitnum, qcode_buf)) { - uae_u8 as = qcode_buf[1]; qcode_valid = 1; } } @@ -1365,11 +1418,18 @@ static void *akiko_thread (void *null) mediachanged = 1; cdaudiostop_do (); } else if (media != lastmediastate) { - write_log (_T("CD32: media changed = %d\n"), media); - lastmediastate = cdrom_disk = media; - mediachanged = 1; - cdaudiostop_do (); - } + if (!media && lastmediastate > 1) { + // ignore missing media if statefile restored with cd present + if (lastmediastate == 2) + write_log (_T("CD32: CD missing but statefile was stored with CD inserted: faking media present\n")); + lastmediastate = 3; + } else { + write_log (_T("CD32: media changed = %d\n"), media); + lastmediastate = cdrom_disk = media; + mediachanged = 1; + cdaudiostop_do (); + } + } } uae_sem_wait (&akiko_sem); @@ -1503,6 +1563,9 @@ static uae_u32 akiko_bget2 (uaecptr addr, int msg) case 0x1a: v = cdcomrxinx; break; + case 0x1f: + v = cdcomrxcmp; + break; case 0x20: case 0x21: v = akiko_get_long (cdrom_pbx, addr - 0x20 + 2); @@ -1638,11 +1701,11 @@ static void akiko_bput2 (uaecptr addr, uae_u32 v, int msg) case 0x1d: cdrom_intreq &= ~CDINTERRUPT_TXDMADONE; cdcomtxcmp = v; - if (cdrom_command_active == 0) - cdrom_command_startdelay = 2; + cdrom_tx_dma_delay = 5; break; case 0x1f: cdrom_intreq &= ~CDINTERRUPT_RXDMADONE; + cdcomrxcmp = v; break; case 0x20: case 0x21: @@ -1752,7 +1815,8 @@ void akiko_reset (void) lastmediastate = -1; } cdrom_led = 0; - cdrom_receive_started = 0; + cdrom_receive_length = 0; + cdrom_receive_offset = 0; cd_initialized = 0; if (akiko_thread_running > 0) { @@ -1799,6 +1863,7 @@ int akiko_init (void) init_comm_pipe (&requests, 100, 1); uae_start_thread (_T("akiko"), akiko_thread, 0, NULL); } + gui_flicker_led (LED_HD, 0, -1); akiko_inited = true; return 1; } @@ -1831,7 +1896,7 @@ uae_u8 *save_akiko (int *len, uae_u8 *dstptr) save_u8 (0); save_u8 (cdcomtxcmp); save_u8 (0); - save_u8 (0); + save_u8 (cdcomrxcmp); save_u16 ((uae_u16)cdrom_pbx); save_u16 (0); save_u32 (cdrom_flags); @@ -1893,7 +1958,7 @@ uae_u8 *restore_akiko (uae_u8 *src) restore_u8 (); cdcomtxcmp = restore_u8 (); restore_u8 (); - restore_u8 (); + cdcomrxcmp = restore_u8 (); cdrom_pbx = restore_u16 (); restore_u16 (); cdrom_flags = restore_u32 (); @@ -1918,7 +1983,7 @@ uae_u8 *restore_akiko (uae_u8 *src) cdrom_paused = 1; if (v & 4) cdrom_disk = 1; - lastmediastate = cdrom_disk; + lastmediastate = cdrom_disk ? 2 : 0; last_play_pos = msf2lsn (restore_u32 ()); last_play_end = msf2lsn (restore_u32 ()); diff --git a/src/archivers/dms/pfile.cpp b/src/archivers/dms/pfile.cpp index 640eec12..115a52ee 100644 --- a/src/archivers/dms/pfile.cpp +++ b/src/archivers/dms/pfile.cpp @@ -547,8 +547,11 @@ static void printbandiz(UCHAR *m, USHORT len){ i=j=m; while (i nextcount) { + while (lhcount > nextcount) { make_new_node(nextcount / 64); if ((nextcount += 64) >= nn) nextcount = 0xffffffff; diff --git a/src/archivers/lha/lha.h b/src/archivers/lha/lha.h index 6e41db14..c16b1a5b 100644 --- a/src/archivers/lha/lha.h +++ b/src/archivers/lha/lha.h @@ -166,7 +166,7 @@ EXTERN int unpackable; EXTERN unsigned long origsize, compsize; EXTERN unsigned short dicbit; EXTERN unsigned short maxmatch; -EXTERN unsigned long count; +EXTERN unsigned long lhcount; EXTERN unsigned long loc; /* short -> long .. Changed N.Watazaki */ EXTERN unsigned char *text; EXTERN int prev_char; diff --git a/src/archivers/lha/slide.cpp b/src/archivers/lha/slide.cpp index 71af62be..df0855ec 100644 --- a/src/archivers/lha/slide.cpp +++ b/src/archivers/lha/slide.cpp @@ -407,28 +407,28 @@ int decode(struct interfacing *lhinterface) decode_set.decode_start(); dicsiz1 = dicsiz - 1; offset = (lhinterface->method == LARC_METHOD_NUM) ? 0x100 - 2 : 0x100 - 3; - count = 0; + lhcount = 0; loc = 0; - while (count < origsize) { + while (lhcount < origsize) { c = decode_set.decode_c(); if (c <= UCHAR_MAX) { #ifdef DEBUG - fprintf(fout, "%u C %02X\n", count, c); + fprintf(fout, "%u C %02X\n", lhcount, c); #endif dtext[loc++] = c; if (loc == dicsiz) { fwrite_crc(dtext, dicsiz, outfile); loc = 0; } - count++; + lhcount++; } else { j = c - offset; i = (loc - decode_set.decode_p() - 1) & dicsiz1; #ifdef DEBUG - fprintf(fout, "%u M %u %u ", count, (loc-1-i) & dicsiz1, j); + fprintf(fout, "%u M %u %u ", lhcount, (loc-1-i) & dicsiz1, j); #endif - count += j; + lhcount += j; for (k = 0; k < j; k++) { c = dtext[(i + k) & dicsiz1]; diff --git a/src/archivers/lha/uae_lha.cpp b/src/archivers/lha/uae_lha.cpp index e15ed0df..828676b5 100644 --- a/src/archivers/lha/uae_lha.cpp +++ b/src/archivers/lha/uae_lha.cpp @@ -36,12 +36,25 @@ struct zvolume *archive_directory_lha(struct zfile *zf) method = i; } memset(&zai, 0, sizeof zai); - zai.name = hdr.name; + zai.name = au (hdr.name); zai.size = hdr.original_size; zai.flags = hdr.attribute; - zai.t = hdr.unix_last_modified_stamp -= _timezone; + if (hdr.extend_type != 0) { + zai.tv.tv_sec = hdr.unix_last_modified_stamp -= _timezone; + } else { + struct tm t; + uae_u32 v = hdr.last_modified_stamp; + + t.tm_sec = (v & 0x1f) * 2; + t.tm_min = (v >> 5) & 0x3f; + t.tm_hour = (v >> 11) & 0x1f; + t.tm_mday = (v >> 16) & 0x1f; + t.tm_mon = ((v >> 21) & 0xf) - 1; + t.tm_year = ((v >> 25) & 0x7f) + 80; + zai.tv.tv_sec = mktime (&t) - _timezone; + } if (hdr.name[strlen(hdr.name) + 1] != 0) - zai.comment = &hdr.name[strlen(hdr.name) + 1]; + zai.comment = au (&hdr.name[strlen(hdr.name) + 1]); if (method == LZHDIRS_METHOD_NUM) { zvolume_adddir_abs(zv, &zai); } else { @@ -50,6 +63,8 @@ struct zvolume *archive_directory_lha(struct zfile *zf) zn->packedsize = hdr.packed_size; zn->method = method; } + xfree (zai.name); + xfree (zai.comment); zfile_fseek(zf, hdr.packed_size, SEEK_CUR); } diff --git a/src/archivers/lzx/unlzx.cpp b/src/archivers/lzx/unlzx.cpp index 5ee5fb6f..373a6ce2 100644 --- a/src/archivers/lzx/unlzx.cpp +++ b/src/archivers/lzx/unlzx.cpp @@ -162,7 +162,7 @@ static void crc_calc(unsigned char *memory, unsigned int length) /* There is an alternate algorithm which is faster but also more complex. */ static int make_decode_table(int number_symbols, int table_size, - unsigned char *length, unsigned short *table) + unsigned char *length, unsigned short *table) { register unsigned char bit_num = 0; register int symbol; @@ -446,14 +446,14 @@ static int read_literal_table() { do /* symbol is longer than 6 bits */ { - symbol = huffman20_table[((control >> 6) & 1) + (symbol << 1)]; - if(!shift--) - { - shift += 16; - control += *source++ << 24; - control += *source++ << 16; - } - control >>= 1; + symbol = huffman20_table[((control >> 6) & 1) + (symbol << 1)]; + if(!shift--) + { + shift += 16; + control += *source++ << 24; + control += *source++ << 16; + } + control >>= 1; } while(symbol >= 20); temp = 6; } @@ -642,7 +642,7 @@ struct zfile *archive_access_lzx (struct znode *zn) startpos = znlast->offset; compsize = znlast->packedsize; zfile_fseek (zf, startpos, SEEK_SET); - buf = xmalloc(uae_u8, compsize); + buf = xmalloc (uae_u8, compsize); zfile_fread (buf, compsize, 1, zf); dbuf = xcalloc (uae_u8, unpsize); @@ -659,22 +659,22 @@ struct zfile *archive_access_lzx (struct znode *zn) if (compsize == unpsize) { memcpy (dbuf, buf, unpsize); } else { - while (unpsize > 0) { - uae_u8 *pdest = destination; - if (!read_literal_table()) { - destination_end = destination + decrunch_length; - decrunch(); + while (unpsize > 0) { + uae_u8 *pdest = destination; + if (!read_literal_table()) { + destination_end = destination + decrunch_length; + decrunch(); unpsize -= decrunch_length; crc_calc (pdest, decrunch_length); - } else { + } else { write_log (_T("LZX corrupt compressed data %s\n"), zn->name); - goto end; + goto end; } } } /* pre-cache all files we just decompressed */ for (;;) { - if (znfirst->size && !znfirst->f) { + if (znfirst->size && !znfirst->f) { dstf = zfile_fopen_empty (zf, znfirst->name, znfirst->size); zfile_fwrite(dbuf + znfirst->offset2, znfirst->size, 1, dstf); znfirst->f = dstf; @@ -716,7 +716,7 @@ struct zvolume *archive_directory_lzx (struct zfile *in_file) return 0; if (memcmp(archive_header, "LZX", 3)) return 0; - zv = zvolume_alloc(in_file, ArchiveFormatLZX, NULL, NULL); + zv = zvolume_alloc (in_file, ArchiveFormatLZX, NULL, NULL); do { @@ -747,30 +747,30 @@ struct zvolume *archive_directory_lzx (struct zfile *in_file) actual = zfile_fread(header_comment, 1, temp, in_file); if(!zfile_ferror(in_file)) { - if(actual == temp) - { - header_comment[temp] = 0; - crc_calc((unsigned char*)header_comment, temp); - if(sum == crc) - { + if(actual == temp) + { + header_comment[temp] = 0; + crc_calc((unsigned char*)header_comment, temp); + if(sum == crc) + { unsigned int year, month, day; unsigned int hour, minute, second; unsigned char attributes; - attributes = archive_header[0]; /* file protection modes */ - unpack_size = (archive_header[5] << 24) + (archive_header[4] << 16) + (archive_header[3] << 8) + archive_header[2]; /* unpack size */ - pack_size = (archive_header[9] << 24) + (archive_header[8] << 16) + (archive_header[7] << 8) + archive_header[6]; /* packed size */ - temp = (archive_header[18] << 24) + (archive_header[19] << 16) + (archive_header[20] << 8) + archive_header[21]; /* date */ - year = ((temp >> 17) & 63) + 1970; - month = (temp >> 23) & 15; - day = (temp >> 27) & 31; - hour = (temp >> 12) & 31; - minute = (temp >> 6) & 63; - second = temp & 63; + attributes = archive_header[0]; /* file protection modes */ + unpack_size = (archive_header[5] << 24) + (archive_header[4] << 16) + (archive_header[3] << 8) + archive_header[2]; /* unpack size */ + pack_size = (archive_header[9] << 24) + (archive_header[8] << 16) + (archive_header[7] << 8) + archive_header[6]; /* packed size */ + temp = (archive_header[18] << 24) + (archive_header[19] << 16) + (archive_header[20] << 8) + archive_header[21]; /* date */ + year = ((temp >> 17) & 63) + 1970; + month = (temp >> 23) & 15; + day = (temp >> 27) & 31; + hour = (temp >> 12) & 31; + minute = (temp >> 6) & 63; + second = temp & 63; memset(&zai, 0, sizeof zai); - zai.name = (char *)header_filename; + zai.name = au (header_filename); if (header_comment[0]) - zai.comment = (char *)header_comment; + zai.comment = au (header_comment); zai.flags |= (attributes & 32) ? 0x80 : 0; zai.flags |= (attributes & 64) ? 0x40 : 0; zai.flags |= (attributes & 128) ? 0x20 : 0; @@ -787,31 +787,36 @@ struct zvolume *archive_directory_lzx (struct zfile *in_file) tm.tm_year = year - 1900; tm.tm_mon = month; tm.tm_mday = day; - zai.t = mktime(&tm); + zai.tv.tv_sec = mktime(&tm); zai.size = unpack_size; zn = zvolume_addfile_abs(zv, &zai); zn->offset2 = merge_size; + xfree (zai.name); + xfree (zai.comment); - total_pack += pack_size; - total_unpack += unpack_size; - total_files++; - merge_size += unpack_size; + total_pack += pack_size; + total_unpack += unpack_size; + total_files++; + merge_size += unpack_size; if(pack_size) /* seek past the packed data */ - { - merge_size = 0; + { + merge_size = 0; zn->offset = zfile_ftell(in_file); zn->packedsize = pack_size; - if(!zfile_fseek(in_file, pack_size, SEEK_CUR)) - { - abort = 0; /* continue */ - } - } - else - abort = 0; /* continue */ + if(!zfile_fseek(in_file, pack_size, SEEK_CUR)) + { + abort = 0; /* continue */ + } + } + else + abort = 0; /* continue */ + //write_log (_T("unp=%6d mrg=%6d pack=%6d off=%6d %s\n"), unpack_size, merge_size, pack_size, zn->offset, zai.name); - } - } + + + } + } } } } diff --git a/src/audio.cpp b/src/audio.cpp index 80bfbaba..4f090e3b 100644 --- a/src/audio.cpp +++ b/src/audio.cpp @@ -17,8 +17,8 @@ #include "options.h" #include "memory.h" -#include "newcpu.h" #include "custom.h" +#include "newcpu.h" #include "autoconf.h" #include "gensound.h" #include "audio.h" @@ -29,7 +29,7 @@ #include -#define MAX_EV ~0ul +#define MAX_EV ~0u #define PERIOD_MIN 4 #define PERIOD_MIN_NONCE 60 @@ -45,14 +45,14 @@ STATIC_INLINE bool usehacks1 (void) } #define SINC_QUEUE_MAX_AGE 2048 -/* Queue length 128 implies minimum emulated period of 16. I add a few extra - * entries so that CPU updates during minimum period can be played back. */ -#define SINC_QUEUE_LENGTH (SINC_QUEUE_MAX_AGE / 16 + 2) +/* Queue length 256 implies minimum emulated period of 8. This should be + * sufficient for all imaginable purposes. This must be power of two. */ +#define SINC_QUEUE_LENGTH 256 #include "sinctable.cpp" typedef struct { - int age, output; + int time, output; } sinc_queue_t; struct audio_channel_data{ @@ -74,7 +74,8 @@ struct audio_channel_data{ int sample_accum, sample_accum_time; int sinc_output_state; sinc_queue_t sinc_queue[SINC_QUEUE_LENGTH]; - int sinc_queue_length; + int sinc_queue_time; + int sinc_queue_head; /* too fast cpu fixes */ uaecptr ptx; bool ptx_written; @@ -94,7 +95,18 @@ static unsigned long next_sample_evtime; typedef uae_s8 sample8_t; #define DO_CHANNEL_1(v, c) do { (v) *= audio_channel[c].vol; } while (0) -#define FINISH_DATA(data) ((data << 1) | (data & 1)) +STATIC_INLINE int FINISH_DATA (int data, int bits) +{ + if (bits == 16) { + return data; + } else if (bits - 16 > 0) { + data >>= bits - 16; + } else { + int shift = 16 - bits; + data <<= shift; + } + return data; +} static uae_u32 right_word_saved[SOUND_MAX_DELAY_BUFFER]; static uae_u32 left_word_saved[SOUND_MAX_DELAY_BUFFER]; @@ -280,37 +292,24 @@ STATIC_INLINE void samplexx_anti_handler (int *datasp) static void sinc_prehandler(unsigned long best_evtime) { - int i, j, output; + int i, output; struct audio_channel_data *acd; for (i = 0; i < 4; i++) { acd = &audio_channel[i]; - output = (acd->current_sample * acd->vol) & acd->adk_mask; - - /* age the sinc queue and truncate it when necessary */ - for (j = 0; j < acd->sinc_queue_length; j += 1) { - acd->sinc_queue[j].age += best_evtime; - if (acd->sinc_queue[j].age >= SINC_QUEUE_MAX_AGE) { - acd->sinc_queue_length = j; - break; - } - } + int vol = acd->vol; + output = (acd->current_sample * vol) & acd->adk_mask; /* if output state changes, record the state change and also * write data into sinc queue for mixing in the BLEP */ if (acd->sinc_output_state != output) { - if (acd->sinc_queue_length > SINC_QUEUE_LENGTH - 1) { - //write_log (_T("warning: sinc queue truncated. Last age: %d.\n"), acd->sinc_queue[SINC_QUEUE_LENGTH-1].age); - acd->sinc_queue_length = SINC_QUEUE_LENGTH - 1; - } - /* make room for new and add the new value */ - memmove(&acd->sinc_queue[1], &acd->sinc_queue[0], - sizeof(acd->sinc_queue[0]) * acd->sinc_queue_length); - acd->sinc_queue_length += 1; - acd->sinc_queue[0].age = best_evtime; - acd->sinc_queue[0].output = output - acd->sinc_output_state; + acd->sinc_queue_head = (acd->sinc_queue_head - 1) & (SINC_QUEUE_LENGTH - 1); + acd->sinc_queue[acd->sinc_queue_head].time = acd->sinc_queue_time; + acd->sinc_queue[acd->sinc_queue_head].output = output - acd->sinc_output_state; acd->sinc_output_state = output; } + + acd->sinc_queue_time += best_evtime; } } @@ -337,9 +336,15 @@ STATIC_INLINE void samplexx_sinc_handler (int *datasp) /* The sum rings with harmonic components up to infinity... */ int sum = acd->sinc_output_state << 17; /* ...but we cancel them through mixing in BLEPs instead */ - for (j = 0; j < acd->sinc_queue_length; j += 1) - sum -= winsinc[acd->sinc_queue[j].age] * acd->sinc_queue[j].output; - v = sum >> 17; + int offsetpos = acd->sinc_queue_head & (SINC_QUEUE_LENGTH - 1); + for (j = 0; j < SINC_QUEUE_LENGTH; j += 1) { + int age = acd->sinc_queue_time - acd->sinc_queue[offsetpos].time; + if (age >= SINC_QUEUE_MAX_AGE || age < 0) + break; + sum -= winsinc[age] * acd->sinc_queue[offsetpos].output; + offsetpos = (offsetpos + 1) & (SINC_QUEUE_LENGTH - 1); + } + v = sum >> 15; if (v > 32767) v = 32767; else if (v < -32768) @@ -354,7 +359,9 @@ static void sample16i_sinc_handler (void) samplexx_sinc_handler (datas); data1 = datas[0] + datas[3] + datas[1] + datas[2]; - put_sound_word_mono_func (data1); + data1 = FINISH_DATA (data1, 18); + set_sound_buffers (); + PUT_SOUND_WORD_MONO (data1); check_sound_buffers (); } @@ -372,7 +379,9 @@ void sample16_handler (void) if(audio_channel[3].adk_mask) data += audio_channel[3].current_sample * audio_channel[3].vol; - put_sound_word_mono_func (data); + data = FINISH_DATA (data, 16); + set_sound_buffers (); + PUT_SOUND_WORD_MONO (data); check_sound_buffers (); } @@ -384,7 +393,9 @@ static void sample16i_anti_handler (void) samplexx_anti_handler (datas); data1 = datas[0] + datas[3] + datas[1] + datas[2]; - put_sound_word_mono_func (data1); + data1 = FINISH_DATA (data1, 16); + set_sound_buffers (); + PUT_SOUND_WORD_MONO (data1); check_sound_buffers (); } @@ -400,6 +411,7 @@ static void sample16i_rh_handler (void) uae_u32 data1p = audio_channel[1].last_sample; uae_u32 data2p = audio_channel[2].last_sample; uae_u32 data3p = audio_channel[3].last_sample; + uae_u32 data; DO_CHANNEL_1 (data0, 0); DO_CHANNEL_1 (data1, 1); @@ -432,8 +444,10 @@ static void sample16i_rh_handler (void) delta = audio_channel[3].per; ratio = ((audio_channel[3].evtime % delta) << 8) / delta; data0 += (data3 * (256 - ratio) + data3p * ratio) >> 8; - - put_sound_word_mono_func (data0); + data = data0; + data = FINISH_DATA (data, 16); + set_sound_buffers (); + PUT_SOUND_WORD_MONO (data); check_sound_buffers(); } @@ -447,6 +461,7 @@ static void sample16i_crux_handler (void) uae_u32 data1p = audio_channel[1].last_sample; uae_u32 data2p = audio_channel[2].last_sample; uae_u32 data3p = audio_channel[3].last_sample; + uae_u32 data; DO_CHANNEL_1 (data0, 0); DO_CHANNEL_1 (data1, 1); @@ -501,11 +516,15 @@ static void sample16i_crux_handler (void) data1 += data2; data0 += data3; data0 += data1; - - put_sound_word_mono_func (data0); + data = data0; + data = FINISH_DATA (data, 16); + set_sound_buffers (); + PUT_SOUND_WORD_MONO (data); check_sound_buffers (); } +#ifdef HAVE_STEREO_SUPPORT + /* This interpolator examines sample points when Paula switches the output * voltage and computes the average of Paula's output */ @@ -516,8 +535,9 @@ static void sample16si_anti_handler (void) samplexx_anti_handler (datas); data1 = datas[0] + datas[3]; data2 = datas[1] + datas[2]; - data1 = FINISH_DATA (data1); - data2 = FINISH_DATA (data2); + data1 = FINISH_DATA (data1, 15); + data2 = FINISH_DATA (data2, 15); + set_sound_buffers (); put_sound_word_stereo_func(data1, data2); check_sound_buffers (); } @@ -529,8 +549,9 @@ static void sample16si_sinc_handler (void) samplexx_sinc_handler (datas); data1 = datas[0] + datas[3]; data2 = datas[1] + datas[2]; - data1 = FINISH_DATA (data1); - data2 = FINISH_DATA (data2); + data1 = FINISH_DATA (data1, 17); + data2 = FINISH_DATA (data2, 17); + set_sound_buffers (); put_sound_word_stereo_func(data1, data2); check_sound_buffers (); } @@ -543,9 +564,10 @@ void sample16s_handler (void) data_r += audio_channel[2].current_sample * audio_channel[2].vol; if(audio_channel[3].adk_mask) data_l += audio_channel[3].current_sample * audio_channel[3].vol; - data_l = FINISH_DATA(data_l); - data_r = FINISH_DATA(data_r); + data_l = FINISH_DATA(data_l, 15); + data_r = FINISH_DATA(data_r, 15); + set_sound_buffers (); put_sound_word_stereo_func(data_l, data_r); check_sound_buffers(); } @@ -613,8 +635,9 @@ static void sample16si_crux_handler (void) } data1 += data2; data0 += data3; - data0 = FINISH_DATA (data0); - data1 = FINISH_DATA (data1); + data0 = FINISH_DATA (data0, 15); + data1 = FINISH_DATA (data1, 15); + set_sound_buffers (); put_sound_word_stereo_func(data0, data1); check_sound_buffers (); } @@ -663,23 +686,40 @@ static void sample16si_rh_handler (void) delta = audio_channel[3].per; ratio = ((audio_channel[3].evtime % delta) << 8) / delta; data0 += (data3 * (256 - ratio) + data3p * ratio) >> 8; - data0 = FINISH_DATA (data0); - data1 = FINISH_DATA (data1); + data0 = FINISH_DATA (data0, 15); + data1 = FINISH_DATA (data1, 15); + set_sound_buffers (); put_sound_word_stereo_func(data0, data1); check_sound_buffers (); } +#else +void sample16s_handler (void) +{ + sample16_handler (); +} +static void sample16si_crux_handler (void) +{ + sample16i_crux_handler (); +} +static void sample16si_rh_handler (void) +{ + sample16i_rh_handler (); +} +#endif + static int audio_work_to_do; -STATIC_INLINE void zerostate (struct audio_channel_data *cdp) +static void zerostate (int nr) { + struct audio_channel_data *cdp = audio_channel + nr; cdp->state = 0; cdp->evtime = MAX_EV; cdp->intreq2 = 0; cdp->dmaenstore = false; } -STATIC_INLINE void schedule_audio (void) +static void schedule_audio (void) { unsigned long best = MAX_EV; int i; @@ -706,7 +746,7 @@ static void audio_event_reset (void) next_sample_evtime = scaled_sample_evtime; if (!isrestore ()) { for (i = 0; i < 4; i++) - zerostate (audio_channel + i); + zerostate (i); } schedule_audio (); events_schedule (); @@ -716,7 +756,7 @@ static void audio_deactivate(void) { gui_data.sndbuf_status = 3; gui_data.sndbuf = 0; - reset_sound (); + pause_sound_buffer (); clear_sound_buffers(); audio_event_reset(); } @@ -740,44 +780,37 @@ STATIC_INLINE int is_audio_active(void) uae_u16 audio_dmal (void) { uae_u16 dmal = 0; - - if(audio_channel[0].dr) dmal |= 1 << (0 * 2); - if(audio_channel[0].dsr) dmal |= 1 << (0 * 2 + 1); - audio_channel[0].dr = audio_channel[0].dsr = false; - - if(audio_channel[1].dr) dmal |= 1 << (1 * 2); - if(audio_channel[1].dsr) dmal |= 1 << (1 * 2 + 1); - audio_channel[1].dr = audio_channel[1].dsr = false; - - if(audio_channel[2].dr) dmal |= 1 << (2 * 2); - if(audio_channel[2].dsr) dmal |= 1 << (2 * 2 + 1); - audio_channel[2].dr = audio_channel[2].dsr = false; - - if(audio_channel[3].dr) dmal |= 1 << (3 * 2); - if(audio_channel[3].dsr) dmal |= 1 << (3 * 2 + 1); - audio_channel[3].dr = audio_channel[3].dsr = false; - + for (int nr = 0; nr < 4; nr++) { + struct audio_channel_data *cdp = audio_channel + nr; + if (cdp->dr) + dmal |= 1 << (nr * 2); + if (cdp->dsr) + dmal |= 1 << (nr * 2 + 1); + cdp->dr = cdp->dsr = false; + } return dmal; } -STATIC_INLINE int isirq (int nr) +static int isirq (int nr) { return INTREQR() & (0x80 << nr); } -STATIC_INLINE void setirq (int nr) +static void setirq (int nr, int which) { INTREQ_0 (0x8000 | (0x80 << nr)); } -STATIC_INLINE void newsample (struct audio_channel_data *cdp, sample8_t sample) +static void newsample (int nr, sample8_t sample) { + struct audio_channel_data *cdp = audio_channel + nr; cdp->last_sample = cdp->current_sample; cdp->current_sample = sample; } -STATIC_INLINE void setdr (struct audio_channel_data *cdp) +STATIC_INLINE void setdr (int nr) { + struct audio_channel_data *cdp = audio_channel + nr; cdp->dr = true; if (cdp->wlen == 1) { cdp->dsr = true; @@ -801,21 +834,29 @@ static void loaddat (int nr, bool modper) cdp[1].per = PERIOD_MIN * CYCLE_UNIT; } else if (audav) { cdp[1].vol = cdp->dat; + cdp[1].vol &= 127; + if (cdp[1].vol > 64) + cdp[1].vol = 64; } } else { cdp->dat2 = cdp->dat; } } -STATIC_INLINE void loaddat (int nr) +static void loaddat (int nr) { loaddat (nr, false); } -STATIC_INLINE void loadper (struct audio_channel_data *cdp) +STATIC_INLINE void loadper (int nr) { + struct audio_channel_data *cdp = audio_channel + nr; + cdp->evtime = cdp->per; + if (cdp->evtime < CYCLE_UNIT) + write_log (_T("LOADPER%d bug %d\n"), nr, cdp->evtime); } + static void audio_state_channel2 (int nr, bool perfin) { struct audio_channel_data *cdp = audio_channel + nr; @@ -829,7 +870,7 @@ static void audio_state_channel2 (int nr, bool perfin) cdp->dmaenstore = chan_ena; if (currprefs.produce_sound == 0) { - zerostate (cdp); + zerostate (nr); return; } audio_activate (); @@ -837,10 +878,10 @@ static void audio_state_channel2 (int nr, bool perfin) if ((cdp->state == 2 || cdp->state == 3) && usehacks1 () && !chan_ena && old_dma) { // DMA switched off, state=2/3 and "too fast CPU": kill DMA instantly // or CPU timed DMA wait routines in common tracker players will lose notes - newsample (cdp, (cdp->dat2 >> 0) & 0xff); + newsample (nr, (cdp->dat2 >> 0) & 0xff); if (napnav) - setirq (nr); - zerostate (cdp); + setirq (nr, 91); + zerostate (nr); return; } @@ -861,31 +902,30 @@ static void audio_state_channel2 (int nr, bool perfin) cdp->dsr = true; } else if (cdp->dat_written && !isirq (nr)) { cdp->state = 2; - setirq (nr); + setirq (nr, 0); loaddat (nr); if (usehacks1 () && cdp->per < 10 * CYCLE_UNIT) { // make sure audio.device AUDxDAT startup returns to idle state before DMA is enabled - newsample (cdp, (cdp->dat2 >> 0) & 0xff); - zerostate (cdp); + newsample (nr, (cdp->dat2 >> 0) & 0xff); + zerostate (nr); } else { - loadper (cdp); cdp->pbufldl = true; audio_state_channel2 (nr, false); } } else { - zerostate (cdp); + zerostate (nr); } break; case 1: cdp->evtime = MAX_EV; if (!chan_ena) { - zerostate (cdp); + zerostate (nr); return; } if (!cdp->dat_written) return; - setirq (nr); - setdr (cdp); + setirq (nr, 10); + setdr (nr); if (cdp->wlen != 1) cdp->wlen = (cdp->wlen - 1) & 0xffff; cdp->state = 5; @@ -893,7 +933,7 @@ static void audio_state_channel2 (int nr, bool perfin) case 5: cdp->evtime = MAX_EV; if (!chan_ena) { - zerostate (cdp); + zerostate (nr); return; } if (!cdp->dat_written) @@ -904,16 +944,17 @@ static void audio_state_channel2 (int nr, bool perfin) } loaddat (nr); if (napnav) - setdr (cdp); + setdr (nr); cdp->state = 2; - loadper (cdp); + loadper (nr); cdp->pbufldl = true; cdp->intreq2 = 0; audio_state_channel2 (nr, false); break; case 2: if (cdp->pbufldl) { - newsample (cdp, (cdp->dat2 >> 8) & 0xff); + newsample (nr, (cdp->dat2 >> 8) & 0xff); + loadper (nr); cdp->pbufldl = false; } if (!perfin) @@ -922,21 +963,21 @@ static void audio_state_channel2 (int nr, bool perfin) loaddat (nr, true); if (chan_ena) { if (audap) - setdr (cdp); + setdr (nr); if (cdp->intreq2 && audap) - setirq (nr); + setirq (nr, 21); } else { if (audap) - setirq (nr); + setirq (nr, 22); } - loadper (cdp); cdp->pbufldl = true; cdp->state = 3; audio_state_channel2 (nr, false); break; case 3: if (cdp->pbufldl) { - newsample (cdp, (cdp->dat2 >> 0) & 0xff); + newsample (nr, (cdp->dat2 >> 0) & 0xff); + loadper (nr); cdp->pbufldl = false; } if (!perfin) @@ -944,20 +985,19 @@ static void audio_state_channel2 (int nr, bool perfin) if (chan_ena) { loaddat (nr); if (cdp->intreq2 && napnav) - setirq (nr); + setirq (nr, 31); if (napnav) - setdr (cdp); + setdr (nr); } else { if (isirq (nr)) { - zerostate (cdp); + zerostate (nr); return; } loaddat (nr); if (napnav) - setirq (nr); + setirq (nr, 32); } cdp->intreq2 = 0; - loadper (cdp); cdp->pbufldl = true; cdp->state = 2; audio_state_channel2 (nr, false); @@ -965,11 +1005,11 @@ static void audio_state_channel2 (int nr, bool perfin) } } -STATIC_INLINE void audio_state_channel (int nr, bool perfin) +static void audio_state_channel (int nr, bool perfin) { struct audio_channel_data *cdp = audio_channel + nr; audio_state_channel2 (nr, perfin); - cdp->dat_written = 0; + cdp->dat_written = false; } void audio_state_machine (void) @@ -978,7 +1018,7 @@ void audio_state_machine (void) for (int nr = 0; nr < 4; nr++) { struct audio_channel_data *cdp = audio_channel + nr; audio_state_channel2 (nr, false); - cdp->dat_written = 0; + cdp->dat_written = false; } schedule_audio (); events_schedule (); @@ -1047,16 +1087,17 @@ static float rc_calculate_a0(int sample_rate, int cutoff_freq) void check_prefs_changed_audio (void) { int ch; - if (!sound_available) - return; - ch = sound_prefs_changed (); - if (!ch) - return; - if (ch > 0) { - clear_sound_buffers(); - } - set_audio(); - audio_activate(); + + if (sound_available) { + ch = sound_prefs_changed (); + if (ch > 0) { + clear_sound_buffers (); + } + if (ch) { + set_audio (); + audio_activate (); + } + } } void set_audio(void) @@ -1246,6 +1287,7 @@ void update_audio (void) if (audio_channel[i].evtime == 0) { audio_state_channel (i, true); if (audio_channel[i].evtime == 0) { + write_log (_T("evtime==0 sound bug channel %d\n"), i); audio_channel[i].evtime = MAX_EV; } } @@ -1303,11 +1345,10 @@ void AUDxDAT (int nr, uae_u16 v) void audio_dmal_do (int nr, bool reset) { struct audio_channel_data *cdp = audio_channel + nr; - uae_u16 dat = CHIPMEM_AGNUS_WGET_CUSTOM (cdp->pt); + uae_u16 dat = chipmem_wget_indirect (cdp->pt); + cdp->pt += 2; if (reset) cdp->pt = cdp->lc; - else - cdp->pt += 2; cdp->ptx_tofetch = false; AUDxDAT (nr, dat); } @@ -1356,8 +1397,10 @@ void AUDxPER (int nr, uae_u16 v) /* smaller values would cause extremely high cpu usage */ per = PERIOD_MIN * CYCLE_UNIT; } - if (per < PERIOD_MIN_NONCE * CYCLE_UNIT && (cdp->dmaenstore || cdp->state == 0)) { - /* DMAL emulation and low period can cause very very high cpu usage on slow performance PCs */ + if (per < PERIOD_MIN_NONCE * CYCLE_UNIT && cdp->dmaenstore) { + /* DMAL emulation and low period can cause very very high cpu usage on slow performance PCs + * Only do this hack if audio DMA is active. + */ per = PERIOD_MIN_NONCE * CYCLE_UNIT; } @@ -1368,7 +1411,6 @@ void AUDxPER (int nr, uae_u16 v) events_schedule (); } } - cdp->per = per; } @@ -1383,10 +1425,13 @@ void AUDxLEN (int nr, uae_u16 v) void AUDxVOL (int nr, uae_u16 v) { struct audio_channel_data *cdp = audio_channel + nr; - int v2 = v & 64 ? 63 : v & 63; + // 7 bit register in Paula. + v &= 127; + if (v > 64) + v = 64; audio_activate(); update_audio (); - cdp->vol = v2; + cdp->vol = v; } void audio_update_adkmasks (void) @@ -1427,7 +1472,7 @@ uae_u8 *restore_audio (int nr, uae_u8 *src) { struct audio_channel_data *acd = audio_channel + nr; - zerostate (acd); + zerostate (nr); acd->state = restore_u8 (); acd->vol = restore_u8 (); acd->intreq2 = restore_u8 () ? true : false; diff --git a/src/autoconf.cpp b/src/autoconf.cpp index c284b48c..a8de7bd7 100644 --- a/src/autoconf.cpp +++ b/src/autoconf.cpp @@ -85,11 +85,17 @@ static uae_u32 REGPARAM2 rtarea_bget (uaecptr addr) return rtarea[addr]; } -static void REGPARAM2 rtarea_lput (uaecptr addr, uae_u32 value) +#define RTAREA_WRITEOFFSET 0xfff0 + +static void REGPARAM2 rtarea_bput (uaecptr addr, uae_u32 value) { #ifdef JIT special_mem |= S_WRITE; #endif + addr &= 0xffff; + if (addr < RTAREA_WRITEOFFSET) + return; + rtarea[addr] = value; } static void REGPARAM2 rtarea_wput (uaecptr addr, uae_u32 value) @@ -97,13 +103,23 @@ static void REGPARAM2 rtarea_wput (uaecptr addr, uae_u32 value) #ifdef JIT special_mem |= S_WRITE; #endif + addr &= 0xffff; + if (addr < RTAREA_WRITEOFFSET) + return; + rtarea_bput (addr, value >> 8); + rtarea_bput (addr + 1, value & 0xff); } -static void REGPARAM2 rtarea_bput (uaecptr addr, uae_u32 value) +static void REGPARAM2 rtarea_lput (uaecptr addr, uae_u32 value) { #ifdef JIT special_mem |= S_WRITE; #endif + addr &= 0xffff; + if (addr < RTAREA_WRITEOFFSET) + return; + rtarea_wput (addr, value >> 16); + rtarea_wput (addr + 2, value & 0xffff); } /* some quick & dirty code to fill in the rt area and save me a lot of @@ -161,7 +177,10 @@ uae_u32 ds_ansi (const uae_char *str) uae_u32 ds (const TCHAR *str) { - return ds_ansi(str); + char *s = ua (str); + uae_u32 v = ds_ansi (s); + xfree (s); + return v; } uae_u32 ds_bstr_ansi (const uae_char *str) @@ -184,6 +203,8 @@ void calltrap (uae_u32 n) void org (uae_u32 a) { + if ( ((a & 0xffff0000) != 0x00f00000) && ((a & 0xffff0000) != rtarea_base) ) + write_log (_T("ORG: corrupt address! %08X"), a); rt_addr = a & 0xffff; } @@ -212,7 +233,7 @@ static uae_u32 REGPARAM2 getchipmemsize (TrapContext *context) static uae_u32 REGPARAM2 uae_puts (TrapContext *context) { - puts ((const char *)get_real_address (m68k_areg (regs, 0))); + puts ((char *)get_real_address (m68k_areg (regs, 0))); return 0; } @@ -221,19 +242,19 @@ void rtarea_init_mem (void) if(rtarea != 0) mapped_free(rtarea); - rtarea = mapped_malloc (0x10000, _T("rtarea")); + rtarea = mapped_malloc (RTAREA_SIZE, _T("rtarea")); if (!rtarea) { write_log (_T("virtual memory exhausted (rtarea)!\n")); - return; + abort (); } - memset(rtarea, 0, 0x10000); + memset(rtarea, 0, RTAREA_SIZE); rtarea_bank.baseaddr = rtarea; } void rtarea_init (void) { uae_u32 a; - TCHAR uaever[32]; + TCHAR uaever[100]; rt_straddr = 0xFF00 - 2; rt_addr = 0; @@ -241,7 +262,7 @@ void rtarea_init (void) init_traps (); rtarea_init_mem (); - memset (rtarea, 0, 0x10000); + memset (rtarea, 0, RTAREA_SIZE); _stprintf (uaever, _T("uae-%d.%d.%d"), UAEMAJOR, UAEMINOR, UAESUBREV); @@ -272,11 +293,18 @@ void rtarea_init (void) #ifdef FILESYS filesys_install_code (); #endif + + uae_boot_rom_size = here () - rtarea_base; + if (uae_boot_rom_size >= RTAREA_TRAPS) { + write_log (_T("RTAREA_TRAPS needs to be increased!")); + abort (); + } + #ifdef PICASSO96 - uaegfx_install_code (); + uaegfx_install_code (rtarea_base + RTAREA_RTG); #endif - uae_boot_rom_size = here() - rtarea_base; + org (RTAREA_TRAPS | rtarea_base); init_extended_traps(); } @@ -284,7 +312,7 @@ volatile int uae_int_requested = 0; void set_uae_int_flag (void) { - rtarea[0xFFFB] = uae_int_requested & 1; + rtarea[RTAREA_INT] = uae_int_requested & 1; } void rtarea_setup(void) diff --git a/src/blitfunc.cpp b/src/blitfunc.cpp index 232aa002..f42385a6 100644 --- a/src/blitfunc.cpp +++ b/src/blitfunc.cpp @@ -15,7 +15,7 @@ notaz: too :) */ -void blitdofast_0 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_0 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { unsigned int i,j,hblitsize,bltdmod; if (!ptd || !b->hblitsize) return; @@ -25,13 +25,13 @@ j = b->vblitsize; do { i = hblitsize; do { - do_put_mem_word ((uae_u16 *)ptd, 0); + chipmem_agnus_wput (ptd, 0); ptd += 2; } while (--i); ptd += bltdmod; } while (--j); } -void blitdofast_desc_0 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_desc_0 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { unsigned int i,j,hblitsize,bltdmod; if (!ptd || !b->hblitsize) return; @@ -41,13 +41,13 @@ j = b->vblitsize; do { i = hblitsize; do { - do_put_mem_word ((uae_u16 *)ptd, 0); + chipmem_agnus_wput (ptd, 0); ptd -= 2; } while (--i); ptd -= bltdmod; } while (--j); } -void blitdofast_a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { unsigned int i,j; uae_u32 totald = 0; @@ -68,7 +68,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((~srca & srcc)); totald |= dstd; if (ptd) { dstp = ptd; ptd += 2; } @@ -79,10 +79,10 @@ for (j = b->vblitsize; j--;) { } b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_desc_a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_desc_a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { uae_u32 totald = 0; int i,j; @@ -101,7 +101,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((~srca & srcc)); totald |= dstd; if (ptd) { dstp = ptd; ptd -= 2; } @@ -112,10 +112,10 @@ for (j = b->vblitsize; j--;) { } b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_2a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_2a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { int i,j; uae_u32 preva = 0, prevb = 0; @@ -140,7 +140,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srcc & ~(srca & srcb))); totald |= dstd; if (ptd) { dstp = ptd; ptd += 2; } @@ -153,10 +153,10 @@ for (j = b->vblitsize; j--;) { b->bltbhold = srcb; b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_desc_2a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_desc_2a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { uae_u32 totald = 0; int i,j; @@ -180,7 +180,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srcc & ~(srca & srcb))); totald |= dstd; if (ptd) { dstp = ptd; ptd -= 2; } @@ -193,10 +193,10 @@ for (j = b->vblitsize; j--;) { b->bltbhold = srcb; b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_30 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_30 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { int i,j; uae_u32 preva = 0, prevb = 0; @@ -219,7 +219,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srca & ~srcb)); totald |= dstd; if (ptd) { dstp = ptd; ptd += 2; } @@ -230,10 +230,10 @@ for (j = b->vblitsize; j--;) { } b->bltbhold = srcb; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_desc_30 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_desc_30 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { uae_u32 totald = 0; int i,j; @@ -255,7 +255,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srca & ~srcb)); totald |= dstd; if (ptd) { dstp = ptd; ptd -= 2; } @@ -266,10 +266,10 @@ for (j = b->vblitsize; j--;) { } b->bltbhold = srcb; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_3a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_3a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { int i,j; uae_u32 preva = 0, prevb = 0; @@ -294,7 +294,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srcb ^ (srca | (srcb ^ srcc)))); totald |= dstd; if (ptd) { dstp = ptd; ptd += 2; } @@ -307,10 +307,10 @@ for (j = b->vblitsize; j--;) { b->bltbhold = srcb; b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_desc_3a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_desc_3a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { uae_u32 totald = 0; int i,j; @@ -334,7 +334,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srcb ^ (srca | (srcb ^ srcc)))); totald |= dstd; if (ptd) { dstp = ptd; ptd -= 2; } @@ -347,10 +347,10 @@ for (j = b->vblitsize; j--;) { b->bltbhold = srcb; b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_3c (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_3c (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { int i,j; uae_u32 preva = 0, prevb = 0; @@ -373,7 +373,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srca ^ srcb)); totald |= dstd; if (ptd) { dstp = ptd; ptd += 2; } @@ -384,10 +384,10 @@ for (j = b->vblitsize; j--;) { } b->bltbhold = srcb; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_desc_3c (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_desc_3c (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { uae_u32 totald = 0; int i,j; @@ -409,7 +409,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srca ^ srcb)); totald |= dstd; if (ptd) { dstp = ptd; ptd -= 2; } @@ -420,10 +420,10 @@ for (j = b->vblitsize; j--;) { } b->bltbhold = srcb; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_4a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_4a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { int i,j; uae_u32 preva = 0, prevb = 0; @@ -448,7 +448,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srcc ^ (srca & (srcb | srcc)))); totald |= dstd; if (ptd) { dstp = ptd; ptd += 2; } @@ -461,10 +461,10 @@ for (j = b->vblitsize; j--;) { b->bltbhold = srcb; b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_desc_4a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_desc_4a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { uae_u32 totald = 0; int i,j; @@ -488,7 +488,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srcc ^ (srca & (srcb | srcc)))); totald |= dstd; if (ptd) { dstp = ptd; ptd -= 2; } @@ -501,10 +501,10 @@ for (j = b->vblitsize; j--;) { b->bltbhold = srcb; b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_6a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_6a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { int i,j; uae_u32 preva = 0, prevb = 0; @@ -529,7 +529,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srcc ^ (srca & srcb))); totald |= dstd; if (ptd) { dstp = ptd; ptd += 2; } @@ -542,10 +542,10 @@ for (j = b->vblitsize; j--;) { b->bltbhold = srcb; b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_desc_6a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_desc_6a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { uae_u32 totald = 0; int i,j; @@ -569,7 +569,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srcc ^ (srca & srcb))); totald |= dstd; if (ptd) { dstp = ptd; ptd -= 2; } @@ -582,10 +582,10 @@ for (j = b->vblitsize; j--;) { b->bltbhold = srcb; b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_8a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_8a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { int i,j; uae_u32 preva = 0, prevb = 0; @@ -610,7 +610,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srcc & (~srca | srcb))); totald |= dstd; if (ptd) { dstp = ptd; ptd += 2; } @@ -623,10 +623,10 @@ for (j = b->vblitsize; j--;) { b->bltbhold = srcb; b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_desc_8a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_desc_8a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { uae_u32 totald = 0; int i,j; @@ -650,7 +650,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srcc & (~srca | srcb))); totald |= dstd; if (ptd) { dstp = ptd; ptd -= 2; } @@ -663,10 +663,10 @@ for (j = b->vblitsize; j--;) { b->bltbhold = srcb; b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_8c (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_8c (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { int i,j; uae_u32 preva = 0, prevb = 0; @@ -691,7 +691,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srcb & (~srca | srcc))); totald |= dstd; if (ptd) { dstp = ptd; ptd += 2; } @@ -704,10 +704,10 @@ for (j = b->vblitsize; j--;) { b->bltbhold = srcb; b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_desc_8c (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_desc_8c (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { uae_u32 totald = 0; int i,j; @@ -731,7 +731,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srcb & (~srca | srcc))); totald |= dstd; if (ptd) { dstp = ptd; ptd -= 2; } @@ -744,10 +744,10 @@ for (j = b->vblitsize; j--;) { b->bltbhold = srcb; b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_9a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_9a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { int i,j; uae_u32 preva = 0, prevb = 0; @@ -772,7 +772,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srcc ^ (srca & ~srcb))); totald |= dstd; if (ptd) { dstp = ptd; ptd += 2; } @@ -785,10 +785,10 @@ for (j = b->vblitsize; j--;) { b->bltbhold = srcb; b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_desc_9a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_desc_9a (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { uae_u32 totald = 0; int i,j; @@ -812,7 +812,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srcc ^ (srca & ~srcb))); totald |= dstd; if (ptd) { dstp = ptd; ptd -= 2; } @@ -825,10 +825,10 @@ for (j = b->vblitsize; j--;) { b->bltbhold = srcb; b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_a8 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_a8 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { int i,j; uae_u32 preva = 0, prevb = 0; @@ -853,7 +853,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srcc & (srca | srcb))); totald |= dstd; if (ptd) { dstp = ptd; ptd += 2; } @@ -866,10 +866,10 @@ for (j = b->vblitsize; j--;) { b->bltbhold = srcb; b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_desc_a8 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_desc_a8 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { uae_u32 totald = 0; int i,j; @@ -893,7 +893,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srcc & (srca | srcb))); totald |= dstd; if (ptd) { dstp = ptd; ptd -= 2; } @@ -906,10 +906,10 @@ for (j = b->vblitsize; j--;) { b->bltbhold = srcb; b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_aa (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_aa (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { int i,j; uae_u32 totald = 0; @@ -922,7 +922,7 @@ for (j = b->vblitsize; j--;) { if (ptc) { srcc = do_get_mem_word ((uae_u16 *)ptc); ptc += 2; } if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = (srcc); totald |= dstd; if (ptd) { dstp = ptd; ptd += 2; } @@ -932,10 +932,10 @@ for (j = b->vblitsize; j--;) { } b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_desc_aa (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_desc_aa (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { uae_u32 totald = 0; int i,j; @@ -947,7 +947,7 @@ for (j = b->vblitsize; j--;) { uae_u32 bltadat, srca; if (ptc) { srcc = do_get_mem_word ((uae_u16 *)ptc); ptc -= 2; } if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = (srcc); totald |= dstd; if (ptd) { dstp = ptd; ptd -= 2; } @@ -957,10 +957,10 @@ for (j = b->vblitsize; j--;) { } b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_b1 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_b1 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { int i,j; uae_u32 preva = 0, prevb = 0; @@ -985,7 +985,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = (~(srca ^ (srcc | (srca ^ srcb)))); totald |= dstd; if (ptd) { dstp = ptd; ptd += 2; } @@ -998,10 +998,10 @@ for (j = b->vblitsize; j--;) { b->bltbhold = srcb; b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_desc_b1 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_desc_b1 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { uae_u32 totald = 0; int i,j; @@ -1025,7 +1025,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = (~(srca ^ (srcc | (srca ^ srcb)))); totald |= dstd; if (ptd) { dstp = ptd; ptd -= 2; } @@ -1038,10 +1038,10 @@ for (j = b->vblitsize; j--;) { b->bltbhold = srcb; b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_ca (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_ca (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { int i,j; uae_u32 preva = 0, prevb = 0; @@ -1066,7 +1066,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srcc ^ (srca & (srcb ^ srcc)))); totald |= dstd; if (ptd) { dstp = ptd; ptd += 2; } @@ -1079,10 +1079,10 @@ for (j = b->vblitsize; j--;) { b->bltbhold = srcb; b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_desc_ca (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_desc_ca (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { uae_u32 totald = 0; int i,j; @@ -1106,7 +1106,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srcc ^ (srca & (srcb ^ srcc)))); totald |= dstd; if (ptd) { dstp = ptd; ptd -= 2; } @@ -1119,10 +1119,10 @@ for (j = b->vblitsize; j--;) { b->bltbhold = srcb; b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_cc (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_cc (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { int i,j; uae_u32 prevb = 0; @@ -1140,7 +1140,7 @@ for (j = b->vblitsize; j--;) { prevb = bltbdat; } if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = (srcb); totald |= dstd; if (ptd) { dstp = ptd; ptd += 2; } @@ -1150,10 +1150,10 @@ for (j = b->vblitsize; j--;) { } b->bltbhold = srcb; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_desc_cc (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_desc_cc (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { uae_u32 totald = 0; int i,j; @@ -1170,7 +1170,7 @@ for (j = b->vblitsize; j--;) { prevb = bltbdat; } if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = (srcb); totald |= dstd; if (ptd) { dstp = ptd; ptd -= 2; } @@ -1180,10 +1180,10 @@ for (j = b->vblitsize; j--;) { } b->bltbhold = srcb; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_d8 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_d8 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { int i,j; uae_u32 preva = 0, prevb = 0; @@ -1208,7 +1208,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srca ^ (srcc & (srca ^ srcb)))); totald |= dstd; if (ptd) { dstp = ptd; ptd += 2; } @@ -1221,10 +1221,10 @@ for (j = b->vblitsize; j--;) { b->bltbhold = srcb; b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_desc_d8 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_desc_d8 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { uae_u32 totald = 0; int i,j; @@ -1248,7 +1248,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srca ^ (srcc & (srca ^ srcb)))); totald |= dstd; if (ptd) { dstp = ptd; ptd -= 2; } @@ -1261,10 +1261,10 @@ for (j = b->vblitsize; j--;) { b->bltbhold = srcb; b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_e2 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_e2 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { int i,j; uae_u32 preva = 0, prevb = 0; @@ -1289,7 +1289,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srcc ^ (srcb & (srca ^ srcc)))); totald |= dstd; if (ptd) { dstp = ptd; ptd += 2; } @@ -1302,10 +1302,10 @@ for (j = b->vblitsize; j--;) { b->bltbhold = srcb; b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_desc_e2 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_desc_e2 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { uae_u32 totald = 0; int i,j; @@ -1329,7 +1329,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srcc ^ (srcb & (srca ^ srcc)))); totald |= dstd; if (ptd) { dstp = ptd; ptd -= 2; } @@ -1342,10 +1342,10 @@ for (j = b->vblitsize; j--;) { b->bltbhold = srcb; b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_ea (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_ea (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { int i,j; uae_u32 preva = 0, prevb = 0; @@ -1370,7 +1370,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srcc | (srca & srcb))); totald |= dstd; if (ptd) { dstp = ptd; ptd += 2; } @@ -1383,10 +1383,10 @@ for (j = b->vblitsize; j--;) { b->bltbhold = srcb; b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_desc_ea (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_desc_ea (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { uae_u32 totald = 0; int i,j; @@ -1410,7 +1410,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srcc | (srca & srcb))); totald |= dstd; if (ptd) { dstp = ptd; ptd -= 2; } @@ -1423,10 +1423,10 @@ for (j = b->vblitsize; j--;) { b->bltbhold = srcb; b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_f0 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_f0 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { int i,j; uae_u32 preva = 0; @@ -1443,7 +1443,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = (srca); totald |= dstd; if (ptd) { dstp = ptd; ptd += 2; } @@ -1452,10 +1452,10 @@ for (j = b->vblitsize; j--;) { if (ptd) ptd += b->bltdmod; } if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_desc_f0 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_desc_f0 (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { uae_u32 totald = 0; int i,j; @@ -1471,7 +1471,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = (srca); totald |= dstd; if (ptd) { dstp = ptd; ptd -= 2; } @@ -1480,10 +1480,10 @@ for (j = b->vblitsize; j--;) { if (ptd) ptd -= b->bltdmod; } if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_fa (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_fa (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { int i,j; uae_u32 preva = 0; @@ -1502,7 +1502,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srca | srcc)); totald |= dstd; if (ptd) { dstp = ptd; ptd += 2; } @@ -1513,10 +1513,10 @@ for (j = b->vblitsize; j--;) { } b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_desc_fa (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_desc_fa (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { uae_u32 totald = 0; int i,j; @@ -1534,7 +1534,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srca | srcc)); totald |= dstd; if (ptd) { dstp = ptd; ptd -= 2; } @@ -1545,10 +1545,10 @@ for (j = b->vblitsize; j--;) { } b->bltcdat = srcc; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_fc (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_fc (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { int i,j; uae_u32 preva = 0, prevb = 0; @@ -1571,7 +1571,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srca | srcb)); totald |= dstd; if (ptd) { dstp = ptd; ptd += 2; } @@ -1582,10 +1582,10 @@ for (j = b->vblitsize; j--;) { } b->bltbhold = srcb; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } -void blitdofast_desc_fc (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *_GCCRES_ b) +void blitdofast_desc_fc (uaecptr pta, uaecptr ptb, uaecptr ptc, uaecptr ptd, struct bltinfo *b) { uae_u32 totald = 0; int i,j; @@ -1607,7 +1607,7 @@ for (j = b->vblitsize; j--;) { srca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift; preva = bltadat; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); dstd = ((srca | srcb)); totald |= dstd; if (ptd) { dstp = ptd; ptd -= 2; } @@ -1618,7 +1618,7 @@ for (j = b->vblitsize; j--;) { } b->bltbhold = srcb; if (dstp) - do_put_mem_word ((uae_u16 *)dstp, dstd); + chipmem_agnus_wput (dstp, dstd); if ((totald<<16) != 0) b->blitzero = 0; } diff --git a/src/blitter.cpp b/src/blitter.cpp index 56480004..f603f74c 100644 --- a/src/blitter.cpp +++ b/src/blitter.cpp @@ -7,6 +7,7 @@ * (c) 2002 - 2005 Toni Wilen */ +#define SPEEDUP #include "sysconfig.h" #include "sysdeps.h" @@ -26,6 +27,8 @@ static int blt_statefile_type; uae_u16 bltcon0, bltcon1; uae_u32 bltapt, bltbpt, bltcpt, bltdpt; +static int original_ch; + static int blinea_shift; static uae_u16 blinea, blineb; static int blitline, blitfc, blitfill, blitife, blitsing, blitdesc; @@ -41,12 +44,13 @@ enum blitter_states bltstate; static int blit_cyclecounter; static int blit_slowdown; -long blit_firstline_cycles; +static long blit_firstline_cycles; static long blit_first_cycle; static int blit_last_cycle, blit_dmacount, blit_dmacount2; static int blit_nod; static const int *blit_diag; +static int blit_faulty; static int ddat1use; /* @@ -213,6 +217,25 @@ void build_blitfilltable (void) } } +static void blitter_dump (void) +{ + write_log (_T("PT A=%08X B=%08X C=%08X D=%08X\n"), bltapt, bltbpt, bltcpt, bltdpt); + write_log (_T("CON0=%04X CON1=%04X DAT A=%04X B=%04X C=%04X\n"), + bltcon0, bltcon1, blt_info.bltadat, blt_info.bltbdat, blt_info.bltcdat); + write_log (_T("AFWM=%04X ALWM=%04X MOD A=%04X B=%04X C=%04X D=%04X\n"), + blt_info.bltafwm, blt_info.bltalwm, + blt_info.bltamod & 0xffff, blt_info.bltbmod & 0xffff, blt_info.bltcmod & 0xffff, blt_info.bltdmod & 0xffff); +} + +STATIC_INLINE int channel_state (int cycles) +{ + if (cycles < blit_diag[0]) + return blit_diag[1 + cycles]; + cycles -= blit_diag[0]; + cycles %= blit_diag[0]; + return blit_diag[1 + blit_diag[0] + cycles]; +} + STATIC_INLINE void blitter_done (void) { ddat1use = 0; @@ -220,7 +243,7 @@ STATIC_INLINE void blitter_done (void) send_interrupt (6); blitter_done_notify (); event_remevent(ev_blitter); - unset_special (regs, SPCFLAG_BLTNASTY); + unset_special (SPCFLAG_BLTNASTY); } static void blitter_dofast(void) @@ -245,13 +268,15 @@ static void blitter_dofast(void) bltcpt += (blt_info.hblitsize * 2 + blt_info.bltcmod) * blt_info.vblitsize; } if (bltcon0 & 0x100) { - bltddatptr = (uaecptr)get_real_address(bltdpt); + bltddatptr = bltdpt; bltdpt += (blt_info.hblitsize * 2 + blt_info.bltdmod) * blt_info.vblitsize; } +#ifdef SPEEDUP if (blitfunc_dofast[mt] && !blitfill) { (*blitfunc_dofast[mt])(bltadatptr, bltbdatptr, bltcdatptr, bltddatptr, &blt_info); } else +#endif { uae_u32 blitbhold = blt_info.bltbhold; uae_u32 preva = 0, prevb = 0; @@ -283,7 +308,7 @@ static void blitter_dofast(void) bltcdatptr += 2; } if (dstp) - do_put_mem_word ((uae_u16 *)dstp, blt_info.bltddat); + chipmem_agnus_wput (dstp, blt_info.bltddat); blt_info.bltddat = blit_func (blitahold, blitbhold, blt_info.bltcdat, mt); if (blitfill) { uae_u16 d = blt_info.bltddat; @@ -310,7 +335,7 @@ static void blitter_dofast(void) bltddatptr += blt_info.bltdmod; } if (dstp) - do_put_mem_word ((uae_u16 *)dstp, blt_info.bltddat); + chipmem_agnus_wput (dstp, blt_info.bltddat); blt_info.bltbhold = blitbhold; } blit_masktable[BLITTER_MAX_WORDS - 1] = 0xFFFF; @@ -341,12 +366,14 @@ static void blitter_dofast_desc(void) bltcpt -= (blt_info.hblitsize * 2 + blt_info.bltcmod) * blt_info.vblitsize; } if (bltcon0 & 0x100) { - bltddatptr = (uaecptr)get_real_address(bltdpt); + bltddatptr = bltdpt; bltdpt -= (blt_info.hblitsize * 2 + blt_info.bltdmod) * blt_info.vblitsize; } +#ifdef SPEEDUP if (blitfunc_dofast_desc[mt] && !blitfill) { (*blitfunc_dofast_desc[mt])(bltadatptr, bltbdatptr, bltcdatptr, bltddatptr, &blt_info); } else +#endif { uae_u32 blitbhold = blt_info.bltbhold; uae_u32 preva = 0, prevb = 0; @@ -379,7 +406,7 @@ static void blitter_dofast_desc(void) bltcdatptr -= 2; } if (dstp) - do_put_mem_word ((uae_u16 *)dstp, blt_info.bltddat); + chipmem_agnus_wput (dstp, blt_info.bltddat); blt_info.bltddat = blit_func (blitahold, blitbhold, blt_info.bltcdat, mt); if (blitfill) { uae_u16 d = blt_info.bltddat; @@ -406,7 +433,7 @@ static void blitter_dofast_desc(void) bltddatptr -= blt_info.bltdmod; } if (dstp) - do_put_mem_word ((uae_u16 *)dstp, blt_info.bltddat); + chipmem_agnus_wput (dstp, blt_info.bltddat); blt_info.bltbhold = blitbhold; } blit_masktable[BLITTER_MAX_WORDS - 1] = 0xFFFF; @@ -418,7 +445,7 @@ static void blitter_dofast_desc(void) STATIC_INLINE void blitter_read(void) { if (bltcon0 & 0x200) { - blt_info.bltcdat = CHIPMEM_AGNUS_WGET_CUSTOM(bltcpt); + blt_info.bltcdat = chipmem_wget_indirect(bltcpt); } } @@ -428,7 +455,7 @@ STATIC_INLINE void blitter_write(void) blt_info.blitzero = 0; /* D-channel state has no effect on linedraw, but C must be enabled or nothing is drawn! */ if (bltcon0 & 0x200) { - CHIPMEM_AGNUS_WPUT_CUSTOM(bltdpt, blt_info.bltddat); + chipmem_wput_indirect (bltdpt, blt_info.bltddat); } } @@ -584,7 +611,7 @@ static void blitter_force_finish (void) } } -static __inline__ void blit_bltset (int con) +STATIC_INLINE void blit_bltset (int con) { int i; @@ -611,6 +638,7 @@ static __inline__ void blit_bltset (int con) if (!savestate_state && bltstate != BLT_done && blitline) { blitline = 0; bltstate = BLT_done; + write_log (_T("BLITTER: register modification during linedraw!\n")); } if (blitline) { @@ -626,6 +654,19 @@ static __inline__ void blit_bltset (int con) blit_diag = blitfill && blit_cycle_diagram_fill[blit_ch][0] ? blit_cycle_diagram_fill[blit_ch] : blit_cycle_diagram[blit_ch]; } + // on the fly switching from CH=1 to CH=D -> blitter stops writing (Rampage/TEK) + // currently just switch to no-channels mode, better than crashing the demo.. + if (!savestate_state && bltstate != BLT_done) { + if (blit_ch == 13 && original_ch == 1) { + blit_faulty = 1; + } + } + + if (blit_faulty) { + blit_ch = 0; + blit_diag = blit_cycle_diagram[blit_ch]; + } + blit_dmacount = blit_dmacount2 = 0; blit_nod = 1; for (i = 0; i < blit_diag[0]; i++) { @@ -644,13 +685,23 @@ static __inline__ void blit_bltset (int con) void reset_blit (int bltcon) { - if (bltcon & 1) - blinea_shift = bltcon0 >> 12; if (bltstate == BLT_done) return; blit_bltset (bltcon); } +static bool waitingblits (void) +{ + bool waited = false; + while (bltstate != BLT_done && dmaen (DMA_BLITTER)) { + waited = true; + do_cycles (8 * CYCLE_UNIT); + } + if (bltstate == BLT_done) + return true; + return false; +} + STATIC_INLINE void blitter_start_init (void) { blt_info.blitzero = 1; @@ -659,6 +710,7 @@ STATIC_INLINE void blitter_start_init (void) ddat1use = 0; if (blitline) { + blinea_shift = bltcon0 >> 12; blinea = blt_info.bltadat; blineb = (blt_info.bltbdat >> blt_info.blitbshift) | (blt_info.bltbdat << (16 - blt_info.blitbshift)); blitonedot = 0; @@ -670,6 +722,13 @@ STATIC_INLINE void blitter_start_init (void) void do_blitter () { int cycles; + int cleanstart; + + cleanstart = 0; + if (bltstate == BLT_done) { + blit_faulty = 0; + cleanstart = 1; + } bltstate = BLT_done; @@ -686,13 +745,17 @@ void do_blitter () blit_firstline_cycles = blit_first_cycle + (blit_diag[0] * blt_info.hblitsize) * CYCLE_UNIT + cpu_cycles; } + if (cleanstart) { + original_ch = blit_ch; + } + bltstate = BLT_init; blit_slowdown = 0; if (dmaen(DMA_BLITPRI)) - set_special (regs, SPCFLAG_BLTNASTY); + set_special (SPCFLAG_BLTNASTY); else - unset_special (regs, SPCFLAG_BLTNASTY); + unset_special (SPCFLAG_BLTNASTY); if (blt_info.vblitsize == 0 || (blitline && blt_info.hblitsize != 2)) { if (dmaen (DMA_BLITTER)) @@ -708,9 +771,41 @@ void do_blitter () if (currprefs.immediate_blits) { blitter_doit (); - } else { - event_newevent(ev_blitter, blit_cyclecounter); - } + return; + } + + event_newevent(ev_blitter, blit_cyclecounter); + + if (dmaen (DMA_BLITTER)) { + if (currprefs.waiting_blits) { + // wait immediately if all cycles in use and blitter nastry + if (blit_dmacount == blit_diag[0] && (regs.spcflags & SPCFLAG_BLTNASTY)) { + waitingblits (); + } + } + } +} + +void maybe_blit2 (int hack) +{ + if (dmaen (DMA_BLITTER)) { + bool doit = false; + if (currprefs.waiting_blits) { + if (blit_dmacount == blit_diag[0] && (regs.spcflags & SPCFLAG_BLTNASTY)) + doit = true; + else if (currprefs.m68k_speed < 0) + doit = true; + } + if (doit) { + if (waitingblits ()) + return; + } + } + + if (hack == 1 && get_cycles() < blit_firstline_cycles) + return; + + blitter_handler (); } // Called only from custom.cpp if blitter DMA is now enabled and bltstate is BLT_init @@ -739,12 +834,7 @@ int blitnasty (void) cycles = (get_cycles () - blit_first_cycle) / CYCLE_UNIT; ccnt = 0; while (blit_last_cycle < cycles) { - int c; - if (blit_last_cycle < blit_diag[0]) - c = blit_diag[1 + blit_last_cycle]; - else - c = blit_diag[1 + blit_diag[0] + ((blit_last_cycle - blit_diag[0]) % blit_diag[0])]; - blit_last_cycle++; + int c = channel_state (blit_last_cycle++); if (!c) ccnt++; } @@ -848,8 +938,8 @@ uae_u8 *restore_blitter_new (uae_u8 *src) blitsing = restore_u8 (); blt_info.blitzero = restore_u8 (); - /*blit_faulty =*/ restore_u8 (); - /*original_ch =*/ restore_u8 (); + blit_faulty = restore_u8 (); + original_ch = restore_u8 (); blit_diag = set_cycle_diagram_type (restore_u8 ()); @@ -881,6 +971,7 @@ uae_u8 *save_blitter_new (int *len, uae_u8 *dstptr) if (bltstate != BLT_done) { write_log (_T("BLITTER active while saving state\n")); + blitter_dump (); } save_u32 (blit_first_cycle); @@ -912,8 +1003,8 @@ uae_u8 *save_blitter_new (int *len, uae_u8 *dstptr) save_u8 (blitsing); save_u8 (blt_info.blitzero); - save_u8 (0 /*blit_faulty*/); - save_u8 (0 /*original_ch*/); + save_u8 (blit_faulty); + save_u8 (original_ch); save_u8 (get_cycle_diagram_type (blit_diag)); save_u16 (0x1234); diff --git a/src/blkdev.cpp b/src/blkdev.cpp index 74d6ff81..cc522bde 100644 --- a/src/blkdev.cpp +++ b/src/blkdev.cpp @@ -18,6 +18,10 @@ #include "crc32.h" #include "td-sdl/thread.h" #include "execio.h" +#include "zfile.h" +#ifdef RETROPLATFORM +#include "rp.h" +#endif int log_scsiemu = 0; @@ -38,7 +42,7 @@ static uae_u8 play_qcode[MAX_TOTAL_SCSI_DEVICES][SUBQ_SIZE]; static TCHAR newimagefiles[MAX_TOTAL_SCSI_DEVICES][256]; static int imagechangetime[MAX_TOTAL_SCSI_DEVICES]; static bool cdimagefileinuse[MAX_TOTAL_SCSI_DEVICES]; -static bool wasopen[MAX_TOTAL_SCSI_DEVICES]; +static int wasopen[MAX_TOTAL_SCSI_DEVICES]; /* convert minutes, seconds and frames -> logical sector number */ int msf2lsn (int msf) @@ -80,14 +84,10 @@ void tolongbcd (uae_u8 *p, int v) static struct cd_toc *gettoc (struct cd_toc_head *th, int block) { - for (int i = th->first_track_offset; i < th->last_track_offset; i++) { + for (int i = th->first_track_offset + 1; i <= th->last_track_offset; i++) { struct cd_toc *t = &th->toc[i]; - if (block < t->paddress) { - if (i == th->first_track_offset) - return t; - else + if (block < t->paddress) return t - 1; - } } return &th->toc[th->last_track_offset]; } @@ -106,11 +106,24 @@ int isdatatrack (struct cd_toc_head *th, int block) static int cdscsidevicetype[MAX_TOTAL_SCSI_DEVICES]; +#ifdef _WIN32 + +#include "od-win32/win32.h" + +extern struct device_functions devicefunc_win32_spti; +extern struct device_functions devicefunc_win32_ioctl; + +#endif + extern struct device_functions devicefunc_cdimage; static struct device_functions *devicetable[] = { NULL, &devicefunc_cdimage, +#ifdef _WIN32 + &devicefunc_win32_ioctl, + &devicefunc_win32_spti, +#endif NULL }; static int driver_installed[6]; @@ -313,6 +326,9 @@ int get_standard_cd_unit (cd_standard_unit csu) int unitnum = get_standard_cd_unit2 (csu); if (unitnum < 0) return -1; +#ifdef RETROPLATFORM + rp_cd_device_enable (unitnum, true); +#endif delayed[unitnum] = 0; if (currprefs.cdslots[unitnum].delayed) { delayed[unitnum] = PRE_INSERT_DELAY; @@ -340,6 +356,9 @@ int sys_command_open (int unitnum) int v = sys_command_open_internal (unitnum, currprefs.cdslots[unitnum].name[0] ? currprefs.cdslots[unitnum].name : NULL, CD_STANDARD_UNIT_DEFAULT); if (!v) return 0; +#ifdef RETROPLATFORM + rp_cd_device_enable (unitnum, true); +#endif return v; } @@ -349,6 +368,9 @@ void sys_command_close (int unitnum) openlist[unitnum]--; return; } +#ifdef RETROPLATFORM + rp_cd_device_enable (unitnum, false); +#endif sys_command_close_internal (unitnum); } @@ -356,12 +378,15 @@ void blkdev_cd_change (int unitnum, const TCHAR *name) { struct device_info di; sys_command_info (unitnum, &di, 1); +#ifdef RETROPLATFORM + rp_cd_image_change (unitnum, name); +#endif } void device_func_reset (void) { for (int i = 0; i < MAX_TOTAL_SCSI_DEVICES; i++) { - wasopen[i] = false; + wasopen[i] = 0; waspaused[i] = false; imagechangetime[i] = 0; cdimagefileinuse[i] = false; @@ -400,6 +425,13 @@ void blkdev_exitgui (void) } } +void check_prefs_changed_cd (void) +{ + if(currprefs.sound_volume_cd == changed_prefs.sound_volume_cd) + return; + currprefs.sound_volume_cd = changed_prefs.sound_volume_cd; +} + static void check_changes (int unitnum) { bool changed = false; @@ -415,14 +447,13 @@ static void check_changes (int unitnum) return; } - if(currprefs.sound_volume_cd != changed_prefs.sound_volume_cd) - currprefs.sound_volume_cd = changed_prefs.sound_volume_cd; if (_tcscmp (changed_prefs.cdslots[unitnum].name, currprefs.cdslots[unitnum].name) != 0) changed = true; if (!changed && changed_prefs.cdslots[unitnum].name[0] == 0 && changed_prefs.cdslots[unitnum].inuse != currprefs.cdslots[unitnum].inuse) changed = true; if (changed) { + bool wasimage = currprefs.cdslots[unitnum].name[0] != 0; if (unitsem[unitnum]) gotsem = getsem (unitnum, true); cdimagefileinuse[unitnum] = changed_prefs.cdslots[unitnum].inuse; @@ -432,12 +463,17 @@ static void check_changes (int unitnum) int pollmode = 0; imagechangetime[unitnum] = 3 * 50; struct device_info di; - device_func[unitnum]->info (unitnum, &di, 0); - wasopen[unitnum] = di.open; + device_func[unitnum]->info (unitnum, &di, 0, -1); + if (wasopen[unitnum] >= 0) + wasopen[unitnum] = di.open ? 1 : 0; if (wasopen[unitnum]) { device_func[unitnum]->closedev (unitnum); + wasopen[unitnum] = -1; } write_log (_T("CD: eject (%s) open=%d\n"), pollmode ? _T("slow") : _T("fast"), wasopen[unitnum] ? 1 : 0); +#ifdef RETROPLATFORM + rp_cd_image_change (unitnum, NULL); +#endif if (gotsem) { freesem (unitnum); gotsem = false; @@ -461,9 +497,13 @@ static void check_changes (int unitnum) write_log (_T("-> device open failed\n")); wasopen[unitnum] = 0; } else { + wasopen[unitnum] = 1; write_log (_T("-> device reopened\n")); } } +#ifdef RETROPLATFORM + rp_cd_image_change (unitnum, currprefs.cdslots[unitnum].name); +#endif if (gotsem) { freesem (unitnum); gotsem = false; @@ -658,8 +698,14 @@ int sys_command_cd_read (int unitnum, uae_u8 *data, int block, int size) if (!getsem (unitnum)) return 0; if (device_func[unitnum]->read == NULL) { - uae_u8 cmd[12] = { 0xbe, 0, block >> 24, block >> 16, block >> 8, block >> 0, size >> 16, size >> 8, size >> 0, 0x10, 0, 0 }; - v = do_scsi (unitnum, cmd, sizeof cmd, data, size * 2048); + uae_u8 cmd1[12] = { 0x28, 0, block >> 24, block >> 16, block >> 8, block >> 0, 0, size >> 8, size >> 0, 0, 0, 0 }; + v = do_scsi (unitnum, cmd1, sizeof cmd1, data, size * 2048); +#if 0 + if (!v) { + uae_u8 cmd2[12] = { 0xbe, 0, block >> 24, block >> 16, block >> 8, block >> 0, size >> 16, size >> 8, size >> 0, 0x10, 0, 0 }; + v = do_scsi (unitnum, cmd2, sizeof cmd2, data, size * 2048); + } +#endif } else { v = device_func[unitnum]->read (unitnum, data, block, size); } @@ -747,7 +793,7 @@ int sys_command_ismedia (int unitnum, int quick) return 0; if (!getsem (unitnum)) return 0; - if (device_func[unitnum] == NULL) { + if (device_func[unitnum]->ismedia == NULL) { uae_u8 cmd[6] = { 0, 0, 0, 0, 0, 0 }; v = do_scsi (unitnum, cmd, sizeof cmd); } else { @@ -757,24 +803,92 @@ int sys_command_ismedia (int unitnum, int quick) return v; } -struct device_info *sys_command_info (int unitnum, struct device_info *di, int quick) +struct device_info *sys_command_info_session (int unitnum, struct device_info *di, int quick, int session) { if (failunit (unitnum)) return NULL; if (!getsem (unitnum)) return 0; - struct device_info *di2 = device_func[unitnum]->info (unitnum, di, quick); + if (device_func[unitnum]->info == NULL) + return 0; + struct device_info *di2 = device_func[unitnum]->info (unitnum, di, quick, -1); if (di2 && delayed[unitnum]) di2->media_inserted = 0; freesem (unitnum); return di2; } +struct device_info *sys_command_info (int unitnum, struct device_info *di, int quick) +{ + return sys_command_info_session (unitnum, di, quick, -1); +} #define MODE_SELECT_6 0x15 #define MODE_SENSE_6 0x1a #define MODE_SELECT_10 0x55 #define MODE_SENSE_10 0x5a +void scsi_atapi_fixup_pre (uae_u8 *scsi_cmd, int *len, uae_u8 **datap, int *datalenp, int *parm) +{ + uae_u8 cmd, *p, *data = *datap; + int l, datalen = *datalenp; + + *parm = 0; + cmd = scsi_cmd[0]; + if (cmd != MODE_SELECT_6 && cmd != MODE_SENSE_6) + return; + l = scsi_cmd[4]; + if (l > 4) + l += 4; + scsi_cmd[7] = l >> 8; + scsi_cmd[8] = l; + if (cmd == MODE_SELECT_6) { + scsi_cmd[0] = MODE_SELECT_10; + scsi_cmd[9] = scsi_cmd[5]; + scsi_cmd[2] = scsi_cmd[3] = scsi_cmd[4] = scsi_cmd[5] = scsi_cmd[6] = 0; + *len = 10; + p = xmalloc (uae_u8, 8 + datalen + 4); + if (datalen > 4) + memcpy (p + 8, data + 4, datalen - 4); + p[0] = 0; + p[1] = data[0]; + p[2] = data[1]; + p[3] = data[2]; + p[4] = p[5] = p[6] = 0; + p[7] = data[3]; + if (l > 8) + datalen += 4; + *parm = MODE_SELECT_10; + *datap = p; + } else { + scsi_cmd[0] = MODE_SENSE_10; + scsi_cmd[9] = scsi_cmd[5]; + scsi_cmd[3] = scsi_cmd[4] = scsi_cmd[5] = scsi_cmd[6] = 0; + if (l > 8) + datalen += 4; + *datap = xmalloc (uae_u8, datalen); + *len = 10; + *parm = MODE_SENSE_10; + } + *datalenp = datalen; +} + +void scsi_atapi_fixup_post (uae_u8 *scsi_cmd, int len, uae_u8 *olddata, uae_u8 *data, int *datalenp, int parm) +{ + int datalen = *datalenp; + if (!data || !datalen) + return; + if (parm == MODE_SENSE_10) { + olddata[0] = data[1]; + olddata[1] = data[2]; + olddata[2] = data[3]; + olddata[3] = data[7]; + datalen -= 4; + if (datalen > 4) + memcpy (olddata + 4, data + 8, datalen - 4); + *datalenp = datalen; + } +} + static void scsi_atapi_fixup_inquiry (struct amigascsi *as) { uae_u8 *scsi_data = as->data; @@ -981,9 +1095,15 @@ static int scsi_emulate (int unitnum, uae_u8 *cmdbuf, int scsi_cmd_len, scsi_len = lr = len < 36 ? (uae_u32)len : 36; r[2] = 2; r[3] = 2; - memcpy (r + 8, di.vendorid, strlen (di.vendorid)); - memcpy (r + 16, di.productid, strlen (di.productid)); - memcpy (r + 32, di.revision, strlen (di.revision)); + char *s = ua (di.vendorid); + memcpy (r + 8, s, strlen (s)); + xfree (s); + s = ua (di.productid); + memcpy (r + 16, s, strlen (s)); + xfree (s); + s = ua (di.revision); + memcpy (r + 32, s, strlen (s)); + xfree (s); for (int i = 8; i < 36; i++) { if (r[i] == 0) r[i] = 32; @@ -1004,8 +1124,9 @@ static int scsi_emulate (int unitnum, uae_u8 *cmdbuf, int scsi_cmd_len, case 0x15: // MODE SELECT(6) { uae_u8 *p; + bool mode10 = cmdbuf[0] == 0x55; p = scsi_data + 4; - if (cmdbuf[0] == 0x55) + if (mode10) p += 4; int pcode = p[0] & 0x3f; if (pcode == 14) { // CD audio control @@ -1014,6 +1135,8 @@ static int scsi_emulate (int unitnum, uae_u8 *cmdbuf, int scsi_cmd_len, sys_command_cd_volume (unitnum, vol_left, vol_right); scsi_len = 0; } else { + if (log_scsiemu) + write_log (_T("MODE SELECT PC=%d not supported\n"), pcode); goto errreq; } } @@ -1022,6 +1145,9 @@ static int scsi_emulate (int unitnum, uae_u8 *cmdbuf, int scsi_cmd_len, case 0x1a: /* MODE SENSE(6) */ { uae_u8 *p; + bool pcodeloop = false; + bool sense10 = cmdbuf[0] == 0x5a; + int psize, totalsize, bdsize; int pc = cmdbuf[2] >> 6; int pcode = cmdbuf[2] & 0x3f; int dbd = cmdbuf[1] & 8; @@ -1030,9 +1156,8 @@ static int scsi_emulate (int unitnum, uae_u8 *cmdbuf, int scsi_cmd_len, if (log_scsiemu) write_log (_T("MODE SENSE PC=%d CODE=%d DBD=%d\n"), pc, pcode, dbd); p = r; - if (cmdbuf[0] == 0x5a) { - p[0] = 8 - 1; - p[1] = 0; + if (sense10) { + totalsize = 8 - 2; p[2] = 0; p[3] = 0; p[4] = 0; @@ -1041,70 +1166,101 @@ static int scsi_emulate (int unitnum, uae_u8 *cmdbuf, int scsi_cmd_len, p[7] = 0; p += 8; } else { - p[0] = 4 - 1; + totalsize = 4 - 1; p[1] = 0; p[2] = 0; p[3] = 0; p += 4; } + bdsize = 0; if (!dbd) { if (nodisk (&di)) goto nodisk; uae_u32 blocks = di.sectorspertrack * di.cylinders * di.trackspercylinder; - p[-1] = 8; + bdsize = 8; wl(p + 0, blocks); wl(p + 4, di.bytespersector); p += 8; } - if (pcode == 0) { - p[0] = 0; - p[1] = 0; - p[2] = 0x20; - p[3] = 0; - r[0] += 4; - } else if (pcode == 3) { - if (nodisk (&di)) - goto nodisk; - p[0] = 3; - p[1] = 24; - p[3] = 1; - p[10] = di.trackspercylinder >> 8; - p[11] = di.trackspercylinder; - p[12] = di.bytespersector >> 8; - p[13] = di.bytespersector; - p[15] = 1; // interleave - p[20] = 0x80; - r[0] += p[1]; - } else if (pcode == 4) { - if (nodisk (&di)) - goto nodisk; - p[0] = 4; - wl(p + 1, di.cylinders); - p[1] = 24; - p[5] = 1; - wl(p + 13, di.cylinders); - ww(p + 20, 0); - r[0] += p[1]; - } else if (pcode == 14) { // CD audio control - uae_u32 vol = sys_command_cd_volume (unitnum, 0xffff, 0xffff); - p[0] = 0x0e; - p[1] = 0x0e; - p[2] = 1; - p[3] = 4; - p[6] = 0; - p[7] = 75; - p[8] = 1; - p[9] = pc == 0 ? (vol >> 7) & 0xff : 0xff; - p[10] = 2; - p[11] = pc == 0 ? (vol >> (16 + 7)) & 0xff : 0xff; - r[0] += p[1]; - } else { - goto err; + if (pcode == 0x3f) { + pcode = 1; // page = 0 must be last + pcodeloop = true; } - r[0] += r[3]; - scsi_len = lr = r[0] + 1; + for (;;) { + psize = 0; + if (pcode == 0) { + p[0] = 0; + p[1] = 0; + p[2] = 0x20; + p[3] = 0; + psize = 4; + } else if (pcode == 3) { + if (nodisk (&di)) + goto nodisk; + p[0] = 3; + p[1] = 24; + p[3] = 1; + p[10] = di.trackspercylinder >> 8; + p[11] = di.trackspercylinder; + p[12] = di.bytespersector >> 8; + p[13] = di.bytespersector; + p[15] = 1; // interleave + p[20] = 0x80; + psize = p[1]; + } else if (pcode == 4) { + if (nodisk (&di)) + goto nodisk; + p[0] = 4; + wl(p + 1, di.cylinders); + p[1] = 24; + p[5] = 1; + wl(p + 13, di.cylinders); + ww(p + 20, 0); + psize = p[1]; + } else if (pcode == 14) { // CD audio control + uae_u32 vol = sys_command_cd_volume (unitnum, 0xffff, 0xffff); + p[0] = 0x0e; + p[1] = 0x0e; + p[2] = 1; + p[3] = 4; + p[6] = 0; + p[7] = 75; + p[8] = 1; + p[9] = pc == 0 ? (vol >> 7) & 0xff : 0xff; + p[10] = 2; + p[11] = pc == 0 ? (vol >> (16 + 7)) & 0xff : 0xff; + psize = p[1]; + } else { + if (!pcodeloop) + goto err; + } + totalsize += psize; + p += psize; + if (!pcodeloop) + break; + if (pcode == 0) + break; + pcode++; + if (pcode == 0x3f) + pcode = 0; + } + if (sense10) { + totalsize += bdsize; + r[6] = bdsize >> 8; + r[7] = bdsize & 0xff; + r[0] = totalsize >> 8; + r[1] = totalsize & 0xff; + } else { + totalsize += bdsize; + r[3] = bdsize & 0xff; + r[0] = totalsize & 0xff; + } + scsi_len = lr = totalsize + 1; } break; + case 0x01: /* REZERO UNIT */ + scsi_len = 0; + break; case 0x1d: /* SEND DIAGNOSTICS */ scsi_len = 0; break; @@ -1206,7 +1362,7 @@ static int scsi_emulate (int unitnum, uae_u8 *cmdbuf, int scsi_cmd_len, goto errreq; if (format == 1) { p[0] = 0; - p[1] = 8; + p[1] = 2 + 8; p[2] = 1; p[3] = 1; p[4] = 0; @@ -1244,10 +1400,10 @@ static int scsi_emulate (int unitnum, uae_u8 *cmdbuf, int scsi_cmd_len, } if (!addtocentry (&p2, &maxlen, 0xa2, 0xaa, msf, p, toc)) goto errreq; - int tlen = p2 - (p + 4); + int tlen = p2 - (p + 2); p[0] = tlen >> 8; p[1] = tlen >> 0; - scsi_len = tlen + 4; + scsi_len = tlen + 2 + 4; } } break; @@ -1470,28 +1626,28 @@ readprot: s[0] = 0x70; s[2] = 7; /* DATA PROTECT */ s[12] = 0x27; /* WRITE PROTECTED */ - ls = 12; + ls = 0x12; break; nodisk: status = 2; /* CHECK CONDITION */ s[0] = 0x70; s[2] = 2; /* NOT READY */ s[12] = 0x3A; /* MEDIUM NOT PRESENT */ - ls = 12; + ls = 0x12; break; readerr: status = 2; /* CHECK CONDITION */ s[0] = 0x70; s[2] = 2; /* NOT READY */ s[12] = 0x11; /* UNRECOVERED READ ERROR */ - ls = 12; + ls = 0x12; break; notdatatrack: status = 2; s[0] = 0x70; s[2] = 5; s[12] = 0x64; /* ILLEGAL MODE FOR THIS TRACK */ - ls = 12; + ls = 0x12; break; default: @@ -1503,13 +1659,17 @@ errreq: s[0] = 0x70; s[2] = 5; /* ILLEGAL REQUEST */ s[12] = 0x24; /* ILLEGAL FIELD IN CDB */ - ls = 12; + ls = 0x12; break; } end: *data_len = scsi_len; *reply_len = lr; *sense_len = ls; + if (ls) { + //s[0] |= 0x80; + s[7] = ls - 7; // additional sense length + } if (cmdbuf[0] && log_scsiemu) write_log (_T("-> DATAOUT=%d ST=%d SENSELEN=%d\n"), scsi_len, status, ls); return status; @@ -1517,7 +1677,6 @@ end: static int execscsicmd_direct (int unitnum, struct amigascsi *as) { - int sactual = 0; int io_error = 0; uae_u8 *scsi_datap, *scsi_datap_org; uae_u32 scsi_cmd_len_orig = as->cmd_len; @@ -1537,7 +1696,7 @@ static int execscsicmd_direct (int unitnum, struct amigascsi *as) as->cmdactual = as->status != 0 ? 0 : as->cmd_len; /* fake scsi_CmdActual */ if (as->status) { io_error = IOERR_BadStatus; - as->sense_len = senselen; + as->sactual = senselen; as->actual = 0; /* scsi_Actual */ } else { int i; @@ -1548,7 +1707,6 @@ static int execscsicmd_direct (int unitnum, struct amigascsi *as) } for (i = 0; i < as->sense_len; i++) as->sensedata[i] = 0; - sactual = 0; if (datalen < 0) { io_error = IOERR_NotSpecified; as->actual = 0; /* scsi_Actual */ @@ -1558,7 +1716,6 @@ static int execscsicmd_direct (int unitnum, struct amigascsi *as) as->actual = as->len; /* scsi_Actual */ } } - as->sactual = sactual; return io_error; } @@ -1580,7 +1737,7 @@ int sys_command_scsi_direct_native (int unitnum, struct amigascsi *as) int sys_command_scsi_direct (int unitnum, uaecptr acmd) { int ret, i; - struct amigascsi as; + struct amigascsi as = { 0 }; uaecptr ap; addrbank *bank; @@ -1610,9 +1767,11 @@ int sys_command_scsi_direct (int unitnum, uaecptr acmd) put_byte (acmd + 21, as.status); put_word (acmd + 28, as.sactual); - ap = get_long (acmd + 22); - for (i = 0; i < as.sactual; i++) - put_byte (ap, as.sensedata[i]); + if (as.flags & (2 | 4)) { // autosense + ap = get_long (acmd + 22); + for (i = 0; i < as.sactual && i < as.sense_len; i++) + put_byte (ap + i, as.sensedata[i]); + } return ret; } @@ -1654,8 +1813,10 @@ uae_u8 *restore_cd (int num, uae_u8 *src) int type = restore_u32 (); restore_u32 (); if (flags & 4) { - _tcscpy (changed_prefs.cdslots[num].name, s); - _tcscpy (currprefs.cdslots[num].name, s); + if (currprefs.cdslots[num].name[0] == 0 || zfile_exists (s)) { + _tcscpy (changed_prefs.cdslots[num].name, s); + _tcscpy (currprefs.cdslots[num].name, s); + } changed_prefs.cdslots[num].type = currprefs.cdslots[num].type = type; } if (flags & 8) { diff --git a/src/blkdev_cdimage.cpp b/src/blkdev_cdimage.cpp index 8cdd8016..f729e47a 100644 --- a/src/blkdev_cdimage.cpp +++ b/src/blkdev_cdimage.cpp @@ -23,12 +23,14 @@ #include "td-sdl/thread.h" #include "scsidev.h" #include "mp3decoder.h" -#include "od-pandora/cda_play.h" +#include "cda_play.h" #include "memory.h" -#include "uae.h" +#ifdef RETROPLATFORM +#include "rp.h" +#endif #define FLAC__NO_DLL -#include +#include "FLAC/stream_decoder.h" #define scsi_log write_log @@ -39,13 +41,13 @@ enum audenc { AUDENC_NONE, AUDENC_PCM, AUDENC_MP3, AUDENC_FLAC }; struct cdtoc { struct zfile *handle; - int offset; + uae_s64 offset; uae_u8 *data; struct zfile *subhandle; int suboffset; uae_u8 *subdata; - int filesize; + uae_s64 filesize; TCHAR *fname; int address; uae_u8 adr, ctrl; @@ -248,7 +250,7 @@ static int getsub_deinterleaved (uae_u8 *dst, struct cdunit *cdu, struct cdtoc * totalsize += t->size; offset = t->size; } - zfile_fseek (t->subhandle, sector * totalsize + t->suboffset + offset, SEEK_SET); + zfile_fseek (t->subhandle, (uae_u64)sector * totalsize + t->suboffset + offset, SEEK_SET); if (zfile_fread (dst, SUB_CHANNEL_SIZE, 1, t->subhandle) > 0) ret = t->subcode; } else { @@ -330,7 +332,7 @@ static void *cdda_unpack_func (void *v) if (!mp3dec) { try { mp3dec = new mp3decoder(); - } catch (std::exception) { }; + } catch (exception) { }; } if (mp3dec) t->data = mp3dec->get (t->handle, t->data, t->filesize); @@ -377,7 +379,7 @@ static void *cdda_play_func (void *v) idleframes = 0; foundsub = false; - ftime (&tb1); + _ftime (&tb1); cdda_pos = cdu->cdda_start; oldplay = cdu->cdda_play; sector = cdu->cd_last_pos = cdda_pos; @@ -386,7 +388,7 @@ static void *cdda_play_func (void *v) write_log (_T("IMAGE CDDA: illegal sector number %d\n"), cdu->cdda_start); setstate (cdu, AUDIO_STATUS_PLAY_ERROR); } else { - write_log (_T("IMAGE CDDA: playing from %d to %d, track %d ('%s', offset %d, secoffset %d)\n"), + write_log (_T("IMAGE CDDA: playing from %d to %d, track %d ('%s', offset %lld, secoffset %d)\n"), cdu->cdda_start, cdu->cdda_end, t->track, t->fname, t->offset, sector); // do this even if audio is not compressed, t->handle also could be // compressed and we want to unpack it in background too @@ -432,7 +434,7 @@ static void *cdda_play_func (void *v) } cdda_pos -= idleframes; - ftime (&tb2); + _ftime (&tb2); diff = (tb2.time * (uae_s64)1000 + tb2.millitm) - (tb1.time * (uae_s64)1000 + tb1.millitm); diff -= cdu->cdda_delay; if (idleframes >= 0 && diff < 0 && cdu->cdda_play > 0) @@ -476,7 +478,7 @@ static void *cdda_play_func (void *v) memcpy (dst, t->data + sector * totalsize + t->offset, t->size); } else if (t->enctype == AUDENC_PCM) { if (sector * totalsize + t->offset + totalsize < t->filesize) { - zfile_fseek (t->handle, sector * totalsize + t->offset, SEEK_SET); + zfile_fseek (t->handle, (uae_u64)sector * totalsize + t->offset, SEEK_SET); zfile_fread (dst, t->size, 1, t->handle); } } @@ -673,7 +675,9 @@ static int command_rawread (int unitnum, uae_u8 *data, int sector, int size, int struct cdunit *cdu = unitisopen (unitnum); if (!cdu) return 0; + int asector = sector; struct cdtoc *t = findtoc (cdu, §or); + int ssize = t->size + t->skipsize; if (!t || t->handle == NULL) goto end; @@ -684,44 +688,51 @@ static int command_rawread (int unitnum, uae_u8 *data, int sector, int size, int // 2048 -> 2352 while (size-- > 0) { memset (data, 0, 16); - zfile_fseek (t->handle, t->offset + sector * t->size, SEEK_SET); + zfile_fseek (t->handle, t->offset + (uae_u64)sector * ssize, SEEK_SET); zfile_fread (data + 16, t->size, 1, t->handle); encode_l2 (data, sector + 150); sector++; + asector++; data += sectorsize; + ret += sectorsize; } } else if (sectorsize == 2048 && t->size == 2352) { // 2352 -> 2048 while (size-- > 0) { uae_u8 b = 0; - zfile_fseek (t->handle, t->offset + sector * t->size + 15, SEEK_SET); + zfile_fseek (t->handle, t->offset + (uae_u64)sector * ssize + 15, SEEK_SET); zfile_fread (&b, 1, 1, t->handle); if (b == 2) // MODE2? - zfile_fseek (t->handle, t->offset + sector * t->size + 24, SEEK_SET); + zfile_fseek (t->handle, t->offset + (uae_u64)sector * ssize + 24, SEEK_SET); zfile_fread (data, sectorsize, 1, t->handle); sector++; + asector++; data += sectorsize; + ret += sectorsize; } } else if (sectorsize == 2336 && t->size == 2352) { // 2352 -> 2336 while (size-- > 0) { uae_u8 b = 0; - zfile_fseek (t->handle, t->offset + sector * t->size + 15, SEEK_SET); + zfile_fseek (t->handle, t->offset + (uae_u64)sector * ssize + 15, SEEK_SET); zfile_fread (&b, 1, 1, t->handle); if (b != 2 && b != 0) // MODE0 or MODE2 only allowed return 0; zfile_fread (data, sectorsize, 1, t->handle); sector++; + asector++; data += sectorsize; + ret += sectorsize; } } else if (sectorsize == t->size) { // no change - zfile_fseek (t->handle, t->offset + sector * t->size, SEEK_SET); + zfile_fseek (t->handle, t->offset + (uae_u64)sector * ssize, SEEK_SET); zfile_fread (data, sectorsize, size, t->handle); sector += size; + asector += size; + ret = size; } - cdu->cd_last_pos = sector; - ret = sectorsize * size; + cdu->cd_last_pos = asector; } else { @@ -748,7 +759,7 @@ static int command_rawread (int unitnum, uae_u8 *data, int sector, int size, int goto end; } for (int i = 0; i < size; i++) { - zfile_fseek (t->handle, t->offset + sector * t->size, SEEK_SET); + zfile_fseek (t->handle, t->offset + (uae_u64)sector * ssize, SEEK_SET); zfile_fread (data, t->size, 1, t->handle); uae_u8 *p = data + t->size; if (subs) { @@ -783,24 +794,25 @@ static int command_read (int unitnum, uae_u8 *data, int sector, int size) return 0; struct cdtoc *t = findtoc (cdu, §or); + int ssize = t->size + t->skipsize; if (!t || t->handle == NULL) return 0; cdda_stop (cdu); if (t->size == 2048) { - zfile_fseek (t->handle, t->offset + sector * t->size, SEEK_SET); + zfile_fseek (t->handle, t->offset + (uae_u64)sector * ssize, SEEK_SET); zfile_fread (data, size, 2048, t->handle); sector += size; } else { while (size-- > 0) { if (t->size == 2352) { uae_u8 b = 0; - zfile_fseek (t->handle, t->offset + sector * t->size + 15, SEEK_SET); + zfile_fseek (t->handle, t->offset + (uae_u64)sector * ssize + 15, SEEK_SET); zfile_fread (&b, 1, 1, t->handle); if (b == 2) // MODE2? - zfile_fseek (t->handle, t->offset + sector * t->size + 24, SEEK_SET); + zfile_fseek (t->handle, t->offset + (uae_u64)sector * ssize + 24, SEEK_SET); } else { - zfile_fseek (t->handle, t->offset + sector * t->size + 16, SEEK_SET); + zfile_fseek (t->handle, t->offset + (uae_u64)sector * ssize + 16, SEEK_SET); } zfile_fread (data, 1, 2048, t->handle); data += 2048; @@ -829,6 +841,7 @@ static int command_toc (int unitnum, struct cd_toc_head *th) th->last_track = cdu->tracks; th->points = cdu->tracks + 3; th->tracks = cdu->tracks; + th->firstaddress = 0; th->lastaddress = cdu->toc[cdu->tracks].address; toc->adr = 1; @@ -999,11 +1012,11 @@ static int parsemds (struct cdunit *cdu, struct zfile *zmds, const TCHAR *img) MDS_Header *head; struct cdtoc *t; uae_u8 *mds = NULL; - MDS_TrackBlock *tb = NULL; - MDS_SessionBlock *sb = NULL; + uae_u64 size; + MDS_SessionBlock *sb; write_log (_T("MDS TOC: '%s'\n"), img); - int size = zfile_size (zmds); + size = zfile_size (zmds); mds = xmalloc (uae_u8, size); if (!mds) goto end; @@ -1021,7 +1034,7 @@ static int parsemds (struct cdunit *cdu, struct zfile *zmds, const TCHAR *img) sb = (MDS_SessionBlock*)(mds + head->sessions_blocks_offset); cdu->tracks = sb->last_track - sb->first_track + 1; for (int i = 0; i < sb->num_all_blocks; i++) { - tb = (MDS_TrackBlock*)(mds + sb->tracks_blocks_offset + i * sizeof (MDS_TrackBlock)); + MDS_TrackBlock *tb = (MDS_TrackBlock*)(mds + sb->tracks_blocks_offset + i * sizeof (MDS_TrackBlock)); int point = tb->point; int tracknum = -1; if (point == 0xa2) @@ -1042,9 +1055,15 @@ static int parsemds (struct cdunit *cdu, struct zfile *zmds, const TCHAR *img) t->offset = tb->start_offset; t->size = tb->sector_size; + if (point >= 100) + continue; + if (footer) { TCHAR *fname = NULL; - fname = my_strdup ((char *)(mds + footer->filename_offset)); + if (footer->widechar_filename == 0) + fname = au ((char*)(mds + footer->filename_offset)); + else + fname = my_strdup ((TCHAR*)(mds + footer->filename_offset)); if (fname[0] == '*' && fname[1] == '.') { TCHAR newname[MAX_DPATH]; _tcscpy (newname, img); @@ -1067,10 +1086,9 @@ static int parsemds (struct cdunit *cdu, struct zfile *zmds, const TCHAR *img) t->subhandle = zfile_dup (t->handle); t->skipsize = SUB_CHANNEL_SIZE; t->size -= SUB_CHANNEL_SIZE; - if ((t->ctrl & 0x0c) != 4) - t->enctype = AUDENC_PCM; } - + if ((t->ctrl & 0x0c) != 4) + t->enctype = AUDENC_PCM; } } @@ -1214,8 +1232,9 @@ static int parseccd (struct cdunit *cdu, struct zfile *zcue, const TCHAR *img) static int parsecue (struct cdunit *cdu, struct zfile *zcue, const TCHAR *img) { - int tracknum, index0, pregap; - int offset, secoffset, newfile; + int tracknum, pregap; + int newfile, secoffset; + uae_s64 offset, index0; TCHAR *fname, *fnametype; audenc fnametypeid; int ctrl; @@ -1307,7 +1326,7 @@ static int parsecue (struct cdunit *cdu, struct zfile *zcue, const TCHAR *img) if (tracknum > 1 && newfile) { t--; - secoffset += t->filesize / t->size; + secoffset += (int)(t->filesize / t->size); t++; } @@ -1338,7 +1357,7 @@ static int parsecue (struct cdunit *cdu, struct zfile *zcue, const TCHAR *img) s2 = _tcsrchr (tmp, '/'); if (s2) { s2[0] = 0; - _tcscat (tmp, _T("\\")); + _tcscat (tmp, FSDB_DIR_SEPARATOR_S); _tcscat (tmp, fname); ztrack = zfile_fopen (tmp, _T("rb"), ZFD_ARCHIVE | ZFD_DELAYEDOPEN); } @@ -1412,7 +1431,7 @@ static int parsecue (struct cdunit *cdu, struct zfile *zcue, const TCHAR *img) if (!mp3dec) { try { mp3dec = new mp3decoder(); - } catch (std::exception) { } + } catch (exception) { } } if (mp3dec) { t->offset = 0; @@ -1431,12 +1450,12 @@ static int parsecue (struct cdunit *cdu, struct zfile *zcue, const TCHAR *img) } struct cdtoc *t = &cdu->toc[cdu->tracks - 1]; - int size = t->filesize; + uae_s64 size = t->filesize; if (!secoffset) size -= offset * t->size; if (size < 0) size = 0; - cdu->toc[cdu->tracks].address = t->address + size / t->size; + cdu->toc[cdu->tracks].address = t->address + (int)(size / t->size); xfree (fname); @@ -1500,7 +1519,7 @@ static int parse_image (struct cdunit *cdu, const TCHAR *img) t->size = (siz % 2048) == 0 ? 2048 : 2352; t->filesize = siz; write_log (_T("CD: plain CD image mounted!\n")); - cdu->toc[1].address = t->address + t->filesize / t->size; + cdu->toc[1].address = t->address + (int)(t->filesize / t->size); zcue = NULL; } } @@ -1518,7 +1537,7 @@ static int parse_image (struct cdunit *cdu, const TCHAR *img) write_log (_T("%7d %02d:%02d:%02d"), t->address, (msf >> 16) & 0xff, (msf >> 8) & 0xff, (msf >> 0) & 0xff); if (i < cdu->tracks) - write_log (_T(" %s %x %10d %10d %s"), (t->ctrl & 4) ? _T("DATA ") : (t->subcode ? _T("CDA+SUB") : _T("CDA ")), + write_log (_T(" %s %x %10lld %10lld %s"), (t->ctrl & 4) ? _T("DATA ") : (t->subcode ? _T("CDA+SUB") : _T("CDA ")), t->ctrl, t->offset, t->filesize, t->handle == NULL ? _T("[FILE ERROR]") : _T("")); write_log (_T("\n")); if (i < cdu->tracks) @@ -1543,7 +1562,7 @@ static int ismedia (int unitnum, int quick) return cdu->tracks > 0 ? 1 : 0; } -static struct device_info *info_device (int unitnum, struct device_info *di, int quick) +static struct device_info *info_device (int unitnum, struct device_info *di, int quick, int session) { struct cdunit *cdu = &cdunits[unitnum]; memset (di, 0, sizeof (struct device_info)); @@ -1559,7 +1578,7 @@ static struct device_info *info_device (int unitnum, struct device_info *di, int di->mediapath[0] = 0; di->cylinders = 1; di->trackspercylinder = 1; - di->sectorspertrack = cdu->cdsize / di->bytespersector; + di->sectorspertrack = (int)(cdu->cdsize / di->bytespersector); if (ismedia (unitnum, 1)) { di->media_inserted = 1; _tcscpy (di->mediapath, currprefs.cdslots[unitnum].name); diff --git a/src/bsdsocket.cpp b/src/bsdsocket.cpp index 6445ce5d..b9d68552 100644 --- a/src/bsdsocket.cpp +++ b/src/bsdsocket.cpp @@ -16,8 +16,8 @@ #include "options.h" #include "memory.h" -#include "newcpu.h" #include "custom.h" +#include "newcpu.h" #include "autoconf.h" #include "traps.h" #include "td-sdl/thread.h" @@ -26,6 +26,7 @@ #ifdef BSDSOCKET +int log_bsd; struct socketbase *socketbases; static uae_u32 SockLibBase; @@ -45,14 +46,12 @@ static struct sockd *sockdata; uae_u32 strncpyha (uae_u32 dst, const uae_char *src, int size) { uae_u32 res = dst; - if (!addr_valid (_T("strncpyha"), dst, size)) { + if (!addr_valid (_T("strncpyha"), dst, size)) return res; - } while (size--) { put_byte (dst++, *src); - if (!*src++) { + if (!*src++) return res; - } } return res; } @@ -61,9 +60,11 @@ uae_u32 addstr (uae_u32 * dst, const TCHAR *src) { uae_u32 res = *dst; int len; - len = strlen (src) + 1; - strcpyha_safe (*dst, src); + char *s = ua (src); + len = strlen (s) + 1; + strcpyha_safe (*dst, s); (*dst) += len; + xfree (s); return res; } uae_u32 addstr_ansi (uae_u32 * dst, const uae_char *src) @@ -80,9 +81,8 @@ uae_u32 addmem (uae_u32 * dst, const uae_char *src, int len) { uae_u32 res = *dst; - if (!src) { + if (!src) return 0; - } memcpyha_safe (*dst, (uae_u8*)src, len); (*dst) += len; @@ -100,8 +100,9 @@ static uae_u32 gettask (TrapContext *context) m68k_areg (regs, 1) = a1; - tskname = (char*)get_real_address (get_long (currtask + 10)); - BSDTRACE ((_T("[%s] \n"), tskname)); + tskname = au((char*)get_real_address (get_long (currtask + 10))); + BSDTRACE ((_T("[%s] "), tskname)); + xfree (tskname); return currtask; } @@ -146,10 +147,9 @@ void bsdsocklib_setherrno (SB, int sb_herrno) uae_u32 callfdcallback (TrapContext *context, SB, uae_u32 fd, uae_u32 action) { uae_u32 v; - if (!sb->fdcallback){ + if (!sb->fdcallback) return 0; - } - BSDTRACE((_T("FD_CALLBACK(%d,%d) ->\n"), fd, action)); + BSDTRACE((_T("FD_CALLBACK(%d,%d) "), fd, action)); m68k_dreg (regs, 0) = fd; m68k_dreg (regs, 1) = action; v = CallFunc (context, sb->fdcallback); @@ -173,9 +173,8 @@ BOOL checksd(TrapContext *context, SB, int sd) } } for (iCounter = 0; iCounter < SOCKPOOLSIZE; iCounter++) { - if (s == sockdata->sockpoolsocks[iCounter]) { + if (s == sockdata->sockpoolsocks[iCounter]) return TRUE; - } } } BSDTRACE((_T("checksd FALSE s 0x%x sd %d\n"),s,sd)); @@ -196,9 +195,8 @@ int getsd (TrapContext *context, SB, SOCKET_TYPE s) /* return socket descriptor if already exists */ for (i = sb->dtablesize; i--;) { - if (dt[i] == s) { + if (dt[i] == s) return i + 1; - } } /* create new table entry */ @@ -246,13 +244,11 @@ SOCKET_TYPE getsock (SB, int sd) if (sb->dtable[sd - 1] == INVALID_SOCKET) { struct socketbase *sb1, *nsb; uaecptr ot; - if (!addr_valid (_T("getsock1"), sb->ownertask + 10, 4)) { + if (!addr_valid (_T("getsock1"), sb->ownertask + 10, 4)) return -1; - } ot = get_long (sb->ownertask + 10); - if (!addr_valid (_T("getsock2"), ot, 1)) { + if (!addr_valid (_T("getsock2"), ot, 1)) return -1; - } // Fix for Newsrog (All Tasks of Newsrog using the same dtable) for (sb1 = socketbases; sb1; sb1 = nsb) { uaecptr ot1; @@ -263,9 +259,8 @@ SOCKET_TYPE getsock (SB, int sd) break; if (strcmp((char*)get_real_address (ot1), (char*)get_real_address (ot)) == 0) { // Task with same name already exists -> use same dtable - if (sb1->dtable[sd - 1] != INVALID_SOCKET) { + if (sb1->dtable[sd - 1] != INVALID_SOCKET) return sb1->dtable[sd - 1]; - } } nsb = sb1->next; } @@ -416,8 +411,7 @@ static struct socketbase *alloc_socketbase (TrapContext *context) STATIC_INLINE struct socketbase *get_socketbase (TrapContext *context) { - struct socketbase *s = (struct socketbase*)get_pointer (m68k_areg (regs, 6) + offsetof (struct UAEBSDBase, sb)); - return s; + return (struct socketbase*)get_pointer (m68k_areg (regs, 6) + offsetof (struct UAEBSDBase, sb)); } static void free_socketbase (TrapContext *context) @@ -497,7 +491,7 @@ static uae_u32 REGPARAM2 bsdsocklib_Open (TrapContext *context) int opencount; SB; - BSDTRACE ((_T("OpenLibrary() -> \n"))); + BSDTRACE ((_T("OpenLibrary() -> "))); if ((sb = alloc_socketbase (context)) != NULL) { put_word (SockLibBase + 32, opencount = get_word (SockLibBase + 32) + 1); @@ -511,9 +505,9 @@ static uae_u32 REGPARAM2 bsdsocklib_Open (TrapContext *context) put_pointer (result + offsetof (struct UAEBSDBase, sb), sb); - BSDTRACE ((_T(" -> %0x [%d]\n"), result, opencount)); + BSDTRACE ((_T("%0x [%d]\n"), result, opencount)); } else - BSDTRACE ((_T(" -> failed (out of memory)\n"))); + BSDTRACE ((_T("failed (out of memory)\n"))); return result; } @@ -542,26 +536,23 @@ static uae_u32 REGPARAM2 bsdsocklib_Close (TrapContext *context) static uae_u32 REGPARAM2 bsdsocklib_socket (TrapContext *context) { struct socketbase *sb = get_socketbase (context); - uae_u32 r = host_socket (context, sb, m68k_dreg (regs, 0), m68k_dreg (regs, 1), + return host_socket (context, sb, m68k_dreg (regs, 0), m68k_dreg (regs, 1), m68k_dreg (regs, 2)); - return r; } /* bind(s, name, namelen)(d0/a0/d1) */ static uae_u32 REGPARAM2 bsdsocklib_bind (TrapContext *context) { struct socketbase *sb = get_socketbase (context); - uae_u32 r = host_bind (context, sb, m68k_dreg (regs, 0), m68k_areg (regs, 0), + return host_bind (context, sb, m68k_dreg (regs, 0), m68k_areg (regs, 0), m68k_dreg (regs, 1)); - return r; } /* listen(s, backlog)(d0/d1) */ static uae_u32 REGPARAM2 bsdsocklib_listen (TrapContext *context) { struct socketbase *sb = get_socketbase (context); - uae_u32 r = host_listen (context, sb, m68k_dreg (regs, 0), m68k_dreg (regs, 1)); - return r; + return host_listen (context, sb, m68k_dreg (regs, 0), m68k_dreg (regs, 1)); } /* accept(s, addr, addrlen)(d0/a0/a1) */ @@ -620,8 +611,7 @@ static uae_u32 REGPARAM2 bsdsocklib_recv (TrapContext *context) static uae_u32 REGPARAM2 bsdsocklib_shutdown (TrapContext *context) { struct socketbase *sb = get_socketbase (context); - uae_u32 r = host_shutdown (sb, m68k_dreg (regs, 0), m68k_dreg (regs, 1)); - return r; + return host_shutdown (sb, m68k_dreg (regs, 0), m68k_dreg (regs, 1)); } /* setsockopt(s, level, optname, optval, optlen)(d0/d1/d2/a0/d3) */ @@ -637,25 +627,22 @@ static uae_u32 REGPARAM2 bsdsocklib_setsockopt (TrapContext *context) static uae_u32 REGPARAM2 bsdsocklib_getsockopt (TrapContext *context) { struct socketbase *sb = get_socketbase (context); - uae_u32 r = host_getsockopt (sb, m68k_dreg (regs, 0), m68k_dreg (regs, 1), m68k_dreg (regs, 2), + return host_getsockopt (sb, m68k_dreg (regs, 0), m68k_dreg (regs, 1), m68k_dreg (regs, 2), m68k_areg (regs, 0), m68k_areg (regs, 1)); - return r; } /* getsockname(s, hostname, namelen)(d0/a0/a1) */ static uae_u32 REGPARAM2 bsdsocklib_getsockname (TrapContext *context) { struct socketbase *sb = get_socketbase (context); - uae_u32 r = host_getsockname (sb, m68k_dreg (regs, 0), m68k_areg (regs, 0), m68k_areg (regs, 1)); - return r; + return host_getsockname (sb, m68k_dreg (regs, 0), m68k_areg (regs, 0), m68k_areg (regs, 1)); } /* getpeername(s, hostname, namelen)(d0/a0/a1) */ static uae_u32 REGPARAM2 bsdsocklib_getpeername (TrapContext *context) { struct socketbase *sb = get_socketbase (context); - uae_u32 r = host_getpeername (sb, m68k_dreg (regs, 0), m68k_areg (regs, 0), m68k_areg (regs, 1)); - return r; + return host_getpeername (sb, m68k_dreg (regs, 0), m68k_areg (regs, 0), m68k_areg (regs, 1)); } /* *------ generic system calls related to sockets */ @@ -663,8 +650,7 @@ static uae_u32 REGPARAM2 bsdsocklib_getpeername (TrapContext *context) static uae_u32 REGPARAM2 bsdsocklib_IoctlSocket (TrapContext *context) { struct socketbase *sb = get_socketbase (context); - uae_u32 r = host_IoctlSocket (context, sb, m68k_dreg (regs, 0), m68k_dreg (regs, 1), m68k_areg (regs, 0)); - return r; + return host_IoctlSocket (context, sb, m68k_dreg (regs, 0), m68k_dreg (regs, 1), m68k_areg (regs, 0)); } /* *------ AmiTCP/IP specific stuff */ @@ -672,8 +658,7 @@ static uae_u32 REGPARAM2 bsdsocklib_IoctlSocket (TrapContext *context) static uae_u32 REGPARAM2 bsdsocklib_CloseSocket (TrapContext *context) { struct socketbase *sb = get_socketbase (context); - uae_u32 r = host_CloseSocket (context, sb, m68k_dreg (regs, 0)); - return r; + return host_CloseSocket (context, sb, m68k_dreg (regs, 0)); } /* WaitSelect(nfds, readfds, writefds, execptfds, timeout, maskp)(d0/a0/a1/a2/a3/d1) */ @@ -690,7 +675,7 @@ static uae_u32 REGPARAM2 bsdsocklib_SetSocketSignals (TrapContext *context) { struct socketbase *sb = get_socketbase (context); - BSDTRACE ((_T("SetSocketSignals(0x%08lx,0x%08lx,0x%08lx) -> \n"), m68k_dreg (regs, 0), m68k_dreg (regs, 1), m68k_dreg (regs, 2))); + BSDTRACE ((_T("SetSocketSignals(0x%08lx,0x%08lx,0x%08lx) -> "), m68k_dreg (regs, 0), m68k_dreg (regs, 1), m68k_dreg (regs, 2))); sb->eintrsigs = m68k_dreg (regs, 0); sb->eventsigs = m68k_dreg (regs, 1); @@ -745,9 +730,8 @@ static int sockpoolindex (long id) int i; for (i = 0; i < SOCKPOOLSIZE; i++) - if (sockdata->sockpoolids[i] == id) { + if (sockdata->sockpoolids[i] == id) return i; - } return -1; } @@ -762,12 +746,12 @@ static uae_u32 REGPARAM2 bsdsocklib_ObtainSocket (TrapContext *context) id = m68k_dreg (regs, 0); - BSDTRACE ((_T("ObtainSocket(%d,%d,%d,%d) -> \n"), id, m68k_dreg (regs, 1), m68k_dreg (regs, 2), m68k_dreg (regs, 3))); + BSDTRACE ((_T("ObtainSocket(%d,%d,%d,%d) -> "), id, m68k_dreg (regs, 1), m68k_dreg (regs, 2), m68k_dreg (regs, 3))); i = sockpoolindex (id); if (i == -1) { - BSDTRACE ((_T(" -> [invalid key]\n"))); + BSDTRACE ((_T("[invalid key]\n"))); return -1; } s = sockdata->sockpoolsocks[i]; @@ -800,7 +784,7 @@ static uae_u32 REGPARAM2 bsdsocklib_ReleaseSocket (TrapContext *context) id = m68k_dreg (regs, 1); sd++; - BSDTRACE ((_T("ReleaseSocket(%d,%d) -> \n"), sd, id)); + BSDTRACE ((_T("ReleaseSocket(%d,%d) -> "), sd, id)); s = getsock (sb, sd); @@ -825,14 +809,14 @@ static uae_u32 REGPARAM2 bsdsocklib_ReleaseSocket (TrapContext *context) id = curruniqid; } else if (id < 0 && id > 65535) { if (sockpoolindex (id) != -1) { - BSDTRACE ((_T(" -> [unique ID already exists]\n"))); + BSDTRACE ((_T("[unique ID already exists]\n"))); return -1; } } i = sockpoolindex (-1); if (i == -1) { - BSDTRACE ((_T(" -> -1\n"))); + BSDTRACE ((_T("-1\n"))); write_log (_T("bsdsocket: ERROR: Global socket pool overflow\n")); return -1; } @@ -840,9 +824,9 @@ static uae_u32 REGPARAM2 bsdsocklib_ReleaseSocket (TrapContext *context) sockdata->sockpoolsocks[i] = s; sockdata->sockpoolflags[i] = flags; - BSDTRACE ((_T(" -> id %d s 0x%x\n"), id,s)); + BSDTRACE ((_T("id %d s 0x%x\n"), id,s)); } else { - BSDTRACE ((_T(" -> [invalid socket descriptor]\n"))); + BSDTRACE ((_T("[invalid socket descriptor]\n"))); return -1; } @@ -863,7 +847,7 @@ static uae_u32 REGPARAM2 bsdsocklib_ReleaseCopyOfSocket (TrapContext *context) id = m68k_dreg (regs, 1); sd++; - BSDTRACE ((_T("ReleaseSocket(%d,%d) -> \n"), sd, id)); + BSDTRACE ((_T("ReleaseSocket(%d,%d) -> "), sd, id)); s = getsock (sb, sd); @@ -885,14 +869,14 @@ static uae_u32 REGPARAM2 bsdsocklib_ReleaseCopyOfSocket (TrapContext *context) id = curruniqid; } else if (id < 0 && id > 65535) { if (sockpoolindex (id) != -1) { - BSDTRACE ((_T(" -> [unique ID already exists]\n"))); + BSDTRACE ((_T("[unique ID already exists]\n"))); return -1; } } i = sockpoolindex (-1); if (i == -1) { - BSDTRACE ((_T(" -> -1\n"))); + BSDTRACE ((_T("-1\n"))); write_log (_T("bsdsocket: ERROR: Global socket pool overflow\n")); return -1; } @@ -900,12 +884,11 @@ static uae_u32 REGPARAM2 bsdsocklib_ReleaseCopyOfSocket (TrapContext *context) sockdata->sockpoolsocks[i] = s; sockdata->sockpoolflags[i] = flags; - BSDTRACE ((_T(" -> id %d s 0x%x\n"), id,s)); + BSDTRACE ((_T("id %d s 0x%x\n"), id,s)); } else { - BSDTRACE ((_T(" -> [invalid socket descriptor]\n"))); - write_log("BSD: bsdsocklib_ReleaseCopyOfSocket() invalid descriptor (-1)\n"); + BSDTRACE ((_T("[invalid socket descriptor]\n"))); return -1; } @@ -926,12 +909,12 @@ static uae_u32 REGPARAM2 bsdsocklib_SetErrnoPtr (TrapContext *context) struct socketbase *sb = get_socketbase (context); uae_u32 errnoptr = m68k_areg (regs, 0), size = m68k_dreg (regs, 0); - BSDTRACE ((_T("SetErrnoPtr(0x%lx,%d) -> \n"), errnoptr, size)); + BSDTRACE ((_T("SetErrnoPtr(0x%lx,%d) -> "), errnoptr, size)); if (size == 1 || size == 2 || size == 4) { sb->errnoptr = errnoptr; sb->errnosize = size; - BSDTRACE ((_T(" -> OK\n"))); + BSDTRACE ((_T("OK\n"))); return 0; } bsdsocklib_seterrno (sb, 22); /* EINVAL */ @@ -944,15 +927,13 @@ static uae_u32 REGPARAM2 bsdsocklib_SetErrnoPtr (TrapContext *context) static uae_u32 REGPARAM2 bsdsocklib_Inet_NtoA (TrapContext *context) { struct socketbase *sb = get_socketbase (context); - uae_u32 r = host_Inet_NtoA (context, sb, m68k_dreg (regs, 0)); - return r; + return host_Inet_NtoA (context, sb, m68k_dreg (regs, 0)); } /* inet_addr(cp)(a0) */ static uae_u32 REGPARAM2 bsdsocklib_inet_addr (TrapContext *context) { - uae_u32 r = host_inet_addr (m68k_areg (regs, 0)); - return r; + return host_inet_addr (m68k_areg (regs, 0)); } /* Inet_LnaOf(in)(d0) */ @@ -979,8 +960,7 @@ static uae_u32 REGPARAM2 bsdsocklib_Inet_MakeAddr (TrapContext *context) /* inet_network(cp)(a0) */ static uae_u32 REGPARAM2 bsdsocklib_inet_network (TrapContext *context) { - uae_u32 r = host_inet_addr (m68k_areg (regs, 0)); - return r; + return host_inet_addr (m68k_areg (regs, 0)); } /* *------ gethostbyname etc */ @@ -1046,21 +1026,12 @@ static uae_u32 REGPARAM2 bsdsocklib_getprotobynumber (TrapContext *context) return sb->sb_errno ? 0 : sb->protoent; } -/* *------ syslog functions */ -/* Syslog(level, format, ap)(d0/a0/a1) */ -static uae_u32 REGPARAM2 bsdsocklib_vsyslog (TrapContext *context) -{ - write_log (_T("bsdsocket: UNSUPPORTED: vsyslog()\n")); - return 0; -} - /* *------ AmiTCP/IP 1.1 extensions */ /* Dup2Socket(fd1, fd2)(d0/d1) */ static uae_u32 REGPARAM2 bsdsocklib_Dup2Socket (TrapContext *context) { struct socketbase *sb = get_socketbase (context); - uae_u32 r = host_dup2socket (context, sb, m68k_dreg (regs, 0), m68k_dreg (regs, 1)); - return r; + return host_dup2socket (context, sb, m68k_dreg (regs, 0), m68k_dreg (regs, 1)); } static uae_u32 REGPARAM2 bsdsocklib_sendmsg (TrapContext *context) @@ -1077,8 +1048,7 @@ static uae_u32 REGPARAM2 bsdsocklib_recvmsg (TrapContext *context) static uae_u32 REGPARAM2 bsdsocklib_gethostname (TrapContext *context) { - uae_u32 r = host_gethostname (m68k_areg (regs, 0), m68k_dreg (regs, 0)); - return r; + return host_gethostname (m68k_areg (regs, 0), m68k_dreg (regs, 0)); } static uae_u32 REGPARAM2 bsdsocklib_gethostid (TrapContext *context) @@ -1118,6 +1088,86 @@ static uae_u32 errnotextptrs[sizeof (errortexts) / sizeof (*errortexts)]; static const uae_u32 number_sys_error = sizeof (errortexts) / sizeof (*errortexts); +/* *------ syslog functions */ +/* Syslog(level, format, ap)(d0/a0/a1) */ +static uae_u32 REGPARAM2 bsdsocklib_vsyslog (TrapContext *context) +{ +#if 0 + struct socketbase *sb = get_socketbase (context); + uae_char format_dst[512]; + char out[256]; + TCHAR *s; + uae_u8 paramtable[32 * 4]; + int paramcnt, len; + uae_char *found = NULL; + + uae_u32 level = m68k_dreg (regs, 0); + uaecptr format = m68k_areg (regs, 0); + uaecptr params = m68k_areg (regs, 1); + + strcpyah_safe (format_dst, format, sizeof format_dst); + + ((uae_u8**)paramtable)[0] = (uae_u8*)format_dst; + paramcnt = 4; + for (int i = 0; format_dst[i]; i++) { + if (format_dst[i] == '%') { + if (found) + found = NULL; + else + found = &format_dst[i]; + len = 4; + } else if (found) { + char c = toupper (format_dst[i]); + if (c < 'A' || c > 'Z') + continue; + if (c == 'H') { + len = 2; + continue; + } + if (c == 'M') { + int err = sb->sb_errno; + if (sb->sb_errno < 0 || sb->sb_errno >= sizeof (errortexts) / sizeof (*errortexts)) + err = sizeof (errortexts) / sizeof (*errortexts) - 1; + int errlen = _tcslen (errortexts[err]) - (&format_dst[i] - found); + memmove (&format_dst[i] + errlen, &format_dst[i] + 1, strlen (&format_dst[i] + 1) + 1); + ua_copy (found, sizeof format_dst, errortexts[err]); + i += errlen - 1; + continue; + } + + if (c == 'P' || c == 'S' || c == 'N') { + uaecptr pt = get_long (params); + if (!valid_address (pt, 2)) + goto end; + ((uae_u8**)(paramtable + paramcnt))[0] = get_real_address (pt); + params += 4; + paramcnt += sizeof (uae_u8*); + } else { + if (len == 2) + ((uae_u16*)(paramtable + paramcnt))[0] = get_word (params); + else + ((uae_u32*)(paramtable + paramcnt))[0] = get_long (params); + params += len; + paramcnt += len; + } + found = NULL; + } + } + + va_list parms; + va_start (parms, paramtable); + _vsnprintf (out, sizeof out, format_dst, parms); + va_end (parms); + + s = au (out); + write_log (_T("SYSLOG: %s\n"), s); + xfree (s); + +end: +#endif + return 0; +} + static const TCHAR *herrortexts[] = {_T("No error"), _T("Unknown host"), _T("Host name lookup failure"), _T("Unknown server error"), _T("No address associated with name")}; @@ -1528,8 +1578,7 @@ static uae_u32 REGPARAM2 bsdsocklib_GetSocketEvents (TrapContext *context) static uae_u32 REGPARAM2 bsdsocklib_getdtablesize (TrapContext *context) { - uae_u32 r = get_socketbase (context)->dtablesize; - return r; + return get_socketbase (context)->dtablesize; } static uae_u32 REGPARAM2 bsdsocklib_null (TrapContext *context) @@ -1610,9 +1659,8 @@ void bsdlib_reset (void) SB, *nsb; int i; - if (!SockLibBase) { + if (!SockLibBase) return; - } SockLibBase = 0; @@ -1685,9 +1733,8 @@ static uae_u32 res_name, res_id, res_init; uaecptr bsdlib_startup (uaecptr resaddr) { - if (res_name == 0 || !currprefs.socket_emu) { + if (res_name == 0 || !currprefs.socket_emu) return resaddr; - } put_word (resaddr + 0x0, 0x4AFC); put_long (resaddr + 0x2, resaddr); put_long (resaddr + 0x6, resaddr + 0x1A); /* Continue scan here */ diff --git a/src/build68k.cpp b/src/build68k.cpp index 16354a72..cb3db939 100644 --- a/src/build68k.cpp +++ b/src/build68k.cpp @@ -97,7 +97,7 @@ int main(int argc, char **argv) #endif getnextch(); while (nextch != EOF) { - int cpulevel, plevel, sduse; + int cpulevel, uncpulevel, plevel, sduse; int i; char patbits[16]; @@ -154,7 +154,7 @@ int main(int argc, char **argv) } (void) patbits; - while (isspace(nextch) || nextch == ':') /* Get CPU and privilege level */ + while (isspace(nextch) || nextch == ':') /* Get CPU level, unimplemented level, and privilege level */ getnextch(); switch (nextch) { @@ -170,6 +170,19 @@ int main(int argc, char **argv) } getnextch(); + switch (nextch) { + case '0': uncpulevel = 0; break; + case '1': uncpulevel = 1; break; + case '2': uncpulevel = 2; break; + case '3': uncpulevel = 3; break; + case '4': uncpulevel = 4; break; + case '5': uncpulevel = 5; break; + case '6': uncpulevel = 6; break; + case '7': uncpulevel = 7; break; + default: abort(); + } + getnextch(); + switch (nextch) { case '0': plevel = 0; break; case '1': plevel = 1; break; @@ -291,7 +304,7 @@ int main(int argc, char **argv) if (j < 15) printf(","); } - printf ("},0x%04X,%d,%d,{", bitmask, cpulevel, plevel); + printf ("},0x%04X,%d,%d,%d,{", bitmask, cpulevel, uncpulevel, plevel); for(i = 0; i < 5; i++) { printf("{%d,%d}%s", flaguse[i], flagset[i], i == 4 ? "" : ","); } diff --git a/src/calc.cpp b/src/calc.cpp new file mode 100644 index 00000000..258fc177 --- /dev/null +++ b/src/calc.cpp @@ -0,0 +1,453 @@ +/* +* UAE - The Un*x Amiga Emulator +* +* Infix->RPN conversion and calculation +* +*/ + + +/* + + Original code from http://en.wikipedia.org/wiki/Shunting_yard_algorithm + +*/ + +#define CALC_DEBUG 0 + +#if CALC_DEBUG +#define calc_log(x) do { write_log x; } while(0) +#else +#define calc_log(x) +#endif + +#include "sysconfig.h" +#include "sysdeps.h" + +#include "calc.h" + +#include +#include + +#define STACK_SIZE 32 +#define MAX_VALUES 32 +#define IOBUFFERS 256 + +static double parsedvalues[MAX_VALUES]; + +// operators +// precedence operators associativity +// 1 ! right to left +// 2 * / % left to right +// 3 + - left to right +// 4 = right to left +static int op_preced(const TCHAR c) +{ + switch(c) { + case '!': + return 4; + case '*': case '/': case '\\': case '%': + return 3; + case '+': case '-': + return 2; + case '=': + return 1; + } + return 0; +} + +static bool op_left_assoc(const TCHAR c) +{ + switch(c) { + // left to right + case '*': case '/': case '%': case '+': case '-': + return true; + // right to left + case '=': case '!': + return false; + } + return false; +} + +static unsigned int op_arg_count(const TCHAR c) +{ + switch(c) { + case '*': case '/': case '%': case '+': case '-': case '=': + return 2; + case '!': + return 1; + default: + return c - 'A'; + } + return 0; +} + +#define is_operator(c) (c == '+' || c == '-' || c == '/' || c == '*' || c == '!' || c == '%' || c == '=') +#define is_function(c) (c >= 'A' && c <= 'Z') +#define is_ident(c) ((c >= '0' && c <= '9') || (c >= 'a' && c <= 'z')) + +static bool shunting_yard(const TCHAR *input, TCHAR *output) +{ + const TCHAR *strpos = input, *strend = input + _tcslen(input); + TCHAR c, *outpos = output; + + TCHAR stack[STACK_SIZE]; // operator stack + unsigned int sl = 0; // stack length + TCHAR sc; // used for record stack element + + while(strpos < strend) { + if (sl >= STACK_SIZE) + return false; + + // read one token from the input stream + c = *strpos; + if(c != ' ') { + // If the token is a number (identifier), then add it to the output queue. + if(is_ident(c)) { + *outpos = c; ++outpos; + } + // If the token is a function token, then push it onto the stack. + else if(is_function(c)) { + stack[sl] = c; + ++sl; + } + // If the token is a function argument separator (e.g., a comma): + else if(c == ',') { + bool pe = false; + while(sl > 0) { + sc = stack[sl - 1]; + if(sc == '(') { + pe = true; + break; + } + else { + // Until the token at the top of the stack is a left parenthesis, + // pop operators off the stack onto the output queue. + *outpos = sc; + ++outpos; + sl--; + } + } + // If no left parentheses are encountered, either the separator was misplaced + // or parentheses were mismatched. + if(!pe) { + calc_log ((_T("Error: separator or parentheses mismatched\n"))); + return false; + } + } + // If the token is an operator, op1, then: + else if(is_operator(c)) { + while(sl > 0) { + sc = stack[sl - 1]; + // While there is an operator token, o2, at the top of the stack + // op1 is left-associative and its precedence is less than or equal to that of op2, + // or op1 is right-associative and its precedence is less than that of op2, + if(is_operator(sc) && + ((op_left_assoc(c) && (op_preced(c) <= op_preced(sc))) || + (!op_left_assoc(c) && (op_preced(c) < op_preced(sc))))) { + // Pop o2 off the stack, onto the output queue; + *outpos = sc; + ++outpos; + sl--; + } + else { + break; + } + } + // push op1 onto the stack. + stack[sl] = c; + ++sl; + } + // If the token is a left parenthesis, then push it onto the stack. + else if(c == '(') { + stack[sl] = c; + ++sl; + } + // If the token is a right parenthesis: + else if(c == ')') { + bool pe = false; + // Until the token at the top of the stack is a left parenthesis, + // pop operators off the stack onto the output queue + while(sl > 0) { + sc = stack[sl - 1]; + if(sc == '(') { + pe = true; + break; + } + else { + *outpos = sc; + ++outpos; + sl--; + } + } + // If the stack runs out without finding a left parenthesis, then there are mismatched parentheses. + if(!pe) { + calc_log ((_T("Error: parentheses mismatched\n"))); + return false; + } + // Pop the left parenthesis from the stack, but not onto the output queue. + sl--; + // If the token at the top of the stack is a function token, pop it onto the output queue. + if(sl > 0) { + sc = stack[sl - 1]; + if(is_function(sc)) { + *outpos = sc; + ++outpos; + sl--; + } + } + } + else { + calc_log ((_T("Unknown token %c\n"), c)); + return false; // Unknown token + } + } + ++strpos; + } + // When there are no more tokens to read: + // While there are still operator tokens in the stack: + while(sl > 0) { + sc = stack[sl - 1]; + if(sc == '(' || sc == ')') { + printf("Error: parentheses mismatched\n"); + return false; + } + *outpos = sc; + ++outpos; + --sl; + } + *outpos = 0; // Null terminator + return true; +} + + +struct calcstack +{ + TCHAR *s; + double val; +}; + +static double docalcx(TCHAR op, double v1, double v2) +{ + switch (op) + { + case '-': + return v1 - v2; + case '+': + return v1 + v2; + case '*': + return v1 * v2; + case '/': + return v1 / v2; + case '\\': + return (int)v1 % (int)v2; + + } + return 0; +} + +static double stacktoval(struct calcstack *st) +{ + if (st->s) { + if (_tcslen(st->s) == 1 && st->s[0] >= 'a' && st->s[0] <= 'z') + return parsedvalues[st->s[0] - 'a']; + return _tstof (st->s); + } else { + return st->val; + } +} + +static double docalc2(TCHAR op, struct calcstack *sv1, struct calcstack *sv2) +{ + double v1, v2; + + v1 = stacktoval(sv1); + v2 = stacktoval(sv2); + return docalcx (op, v1, v2); +} +static double docalc1(TCHAR op, struct calcstack *sv1, double v2) +{ + double v1; + + v1 = stacktoval(sv1); + return docalcx (op, v1, v2); +} + +static TCHAR *stacktostr(struct calcstack *st) +{ + static TCHAR out[256]; + if (st->s) + return st->s; + _stprintf(out, _T("%f"), st->val); + return out; +} + +static TCHAR *chartostack(TCHAR c) +{ + TCHAR *s = xmalloc (TCHAR, 2); + s[0] = c; + s[1] = 0; + return s; +} + +static bool execution_order(const TCHAR *input, double *outval) +{ + const TCHAR *strpos = input, *strend = input + _tcslen(input); + TCHAR c, res[4]; + unsigned int sl = 0, rn = 0; + struct calcstack stack[STACK_SIZE] = { 0 }, *sc, *sc2; + double val = 0; + int i; + bool ok = false; + + // While there are input tokens left + while(strpos < strend) { + + if (sl >= STACK_SIZE) + return false; + + // Read the next token from input. + c = *strpos; + // If the token is a value or identifier + if(is_ident(c)) { + // Push it onto the stack. + stack[sl].s = chartostack (c); + ++sl; + } + // Otherwise, the token is an operator (operator here includes both operators, and functions). + else if(is_operator(c) || is_function(c)) { + _stprintf(res, _T("_%02d"), rn); + calc_log ((_T("%s = "), res)); + ++rn; + // It is known a priori that the operator takes n arguments. + unsigned int nargs = op_arg_count(c); + // If there are fewer than n values on the stack + if(sl < nargs) { + // (Error) The user has not input sufficient values in the expression. + return false; + } + // Else, Pop the top n values from the stack. + // Evaluate the operator, with the values as arguments. + if(is_function(c)) { + calc_log ((_T("%c("), c)); + while(nargs > 0){ + sc = &stack[sl - nargs]; // to remove reverse order of arguments + if(nargs > 1) { + calc_log ((_T("%s, "), sc)); + } + else { + calc_log ((_T("%s)\n"), sc)); + } + --nargs; + } + sl-=op_arg_count(c); + } + else { + if(nargs == 1) { + sc = &stack[sl - 1]; + sl--; + val = docalc1 (c, sc, val); + calc_log ((_T("%c %s = %f;\n"), c, stacktostr(sc), val)); + } + else { + sc = &stack[sl - 2]; + calc_log ((_T("%s %c "), stacktostr(sc), c)); + sc2 = &stack[sl - 1]; + val = docalc2 (c, sc, sc2); + sl--;sl--; + calc_log ((_T("%s = %f;\n"), stacktostr(sc2), val)); + } + } + // Push the returned results, if any, back onto the stack. + stack[sl].val = val; + stack[sl].s = NULL; + ++sl; + } + ++strpos; + } + // If there is only one value in the stack + // That value is the result of the calculation. + if(sl == 1) { + sc = &stack[sl - 1]; + sl--; + calc_log ((_T("result = %f\n"), val)); + if (outval) + *outval = val; + ok = true; + } + for (i = 0; i < STACK_SIZE; i++) + xfree (stack[i].s); + + // If there are more values in the stack + // (Error) The user input has too many values. + + return ok; +} + +static bool parse_values(const TCHAR *ins, TCHAR *out) +{ + int ident = 0; + TCHAR tmp; + TCHAR inbuf[IOBUFFERS]; + int op; + + _tcscpy (inbuf, ins); + TCHAR *in = inbuf; + TCHAR *p = out; + op = 0; + if (in[0] == '-' || in[0] == '+') { + *p++ = '0'; + } + while (*in) { + TCHAR *instart = in; + if (_istdigit (*in)) { + if (ident >= MAX_VALUES) + return false; + if (op > 1 && (in[-1] == '-' || in[-1] == '+')) { + instart--; + p--; + } + *p++ = ident + 'a'; + while (_istdigit (*in) || *in == '.') + in++; + tmp = *in; + *in = 0; + parsedvalues[ident++] = _tstof (instart); + *in = tmp; + op = 0; + } else { + if (is_operator(*in)) + op++; + *p++ = *in++; + } + } + *p = 0; + return true; +} + +bool calc(const TCHAR *input, double *outval) +{ + TCHAR output[IOBUFFERS], output2[IOBUFFERS]; + calc_log ((_T("IN: '%s'\n"), input)); + if (parse_values(input, output2)) { + if(shunting_yard(output2, output)) { + calc_log ((_T("RPN OUT: %s\n"), output)); + if(!execution_order(output, outval)) { + calc_log ((_T("PARSE ERROR!\n"))); + } else { + return true; + } + } + } + return false; +} + +bool iscalcformula (const TCHAR *formula) +{ + for (int i = 0; i < _tcslen (formula); i++) { + TCHAR c = formula[i]; + if (is_operator (c)) + return true; + } + return false; +} + diff --git a/src/cfgfile.cpp b/src/cfgfile.cpp index e6193448..6105ca6e 100644 --- a/src/cfgfile.cpp +++ b/src/cfgfile.cpp @@ -16,11 +16,12 @@ #include "uae.h" #include "audio.h" #include "autoconf.h" +#include "custom.h" #include "inputdevice.h" #include "savestate.h" -#include "gui.h" #include "memory.h" #include "rommgr.h" +#include "gui.h" #include "newcpu.h" #include "custom.h" #include "zfile.h" @@ -28,13 +29,13 @@ #include "fsdb.h" #include "disk.h" #include "blkdev.h" -#include "sd-pandora/sound.h" +#include "calc.h" #include "SDL_keysym.h" static int config_newfilesystem; static struct strlist *temp_lines; -static struct zfile *default_file; +static struct zfile *default_file, *configstore; static int uaeconfig; /* @@@ need to get rid of this... just cut part of the manual and print that @@ -64,6 +65,7 @@ static const TCHAR *joyaf[] = { _T("none"), _T("normal"), _T("toggle"), 0 }; static const TCHAR *cdmodes[] = { _T("disabled"), _T(""), _T("image"), _T("ioctl"), _T("spti"), _T("aspi"), 0 }; static const TCHAR *cdconmodes[] = { _T(""), _T("uae"), _T("ide"), _T("scsi"), _T("cdtv"), _T("cd32"), 0 }; static const TCHAR *rtgtype[] = { _T("ZorroII"), _T("ZorroIII"), 0 }; +static const TCHAR *waitblits[] = { _T("disabled"), _T("automatic"), _T("noidleonly"), _T("always"), 0 }; static const TCHAR *obsolete[] = { _T("accuracy"), _T("gfx_opengl"), _T("gfx_32bit_blits"), _T("32bit_blits"), @@ -151,6 +153,8 @@ static size_t cfg_write (const void *b, struct zfile *z) return v; } +#define UTF8NAME _T(".utf8") + static void cfg_dowrite (struct zfile *f, const TCHAR *option, const TCHAR *value, int d, int target) { TCHAR tmp[CONFIG_BLEN]; @@ -297,6 +301,10 @@ static void write_filesys_config (struct uae_prefs *p, const TCHAR *unexpanded, uci->devname ? uci->devname : _T(""), str, uci->sectors, uci->surfaces, uci->reserved, uci->blocksize, bp, uci->filesys ? uci->filesys : _T(""), hdcontrollers[uci->controller]); + if (uci->cyls || (uci->pcyls && uci->pheads && uci->psecs)) { + TCHAR *s = tmp + _tcslen (tmp); + _stprintf (s, _T(",%d,%d/%d/%d"), uci->cyls, uci->pcyls, uci->pheads, uci->psecs); + } cfgfile_write_str (f, _T("hardfile2"), tmp); } _stprintf (tmp2, _T("uaehf%d"), i); @@ -473,19 +481,23 @@ void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type) #endif cfgfile_write_bool (f, _T("immediate_blits"), p->immediate_blits); + cfgfile_dwrite_str (f, _T("waiting_blits"), waitblits[p->waiting_blits]); cfgfile_write_bool (f, _T("fast_copper"), p->fast_copper); cfgfile_write_bool (f, _T("ntsc"), p->ntscmode); cfgfile_dwrite_bool (f, _T("show_leds"), p->leds_on_screen); if (p->chipset_mask & CSMASK_AGA) - cfgfile_dwrite (f, _T("chipset"), _T("aga")); + cfgfile_write (f, _T("chipset"), _T("aga")); else if ((p->chipset_mask & CSMASK_ECS_AGNUS) && (p->chipset_mask & CSMASK_ECS_DENISE)) - cfgfile_dwrite (f, _T("chipset"), _T("ecs")); + cfgfile_write (f, _T("chipset"), _T("ecs")); else if (p->chipset_mask & CSMASK_ECS_AGNUS) - cfgfile_dwrite (f, _T("chipset"), _T("ecs_agnus")); + cfgfile_write (f, _T("chipset"), _T("ecs_agnus")); else if (p->chipset_mask & CSMASK_ECS_DENISE) - cfgfile_dwrite (f, _T("chipset"), _T("ecs_denise")); + cfgfile_write (f, _T("chipset"), _T("ecs_denise")); else - cfgfile_dwrite (f, _T("chipset"), _T("ocs")); + cfgfile_write (f, _T("chipset"), _T("ocs")); + if (p->chipset_refreshrate > 0) + cfgfile_write (f, _T("chipset_refreshrate"), _T("%f"), p->chipset_refreshrate); + cfgfile_write_str (f, _T("collision_level"), collmode[p->collision_level]); cfgfile_dwrite_bool (f, _T("cd32cd"), p->cs_cd32cd); @@ -518,6 +530,7 @@ void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type) #ifdef FILESYS write_filesys_config (p, UNEXPANDED, p->path_hardfile, f); + cfgfile_dwrite (f, _T("filesys_max_size"), _T("%d"), p->filesys_limit); #endif write_inputdevice_config (p, f); } @@ -607,9 +620,14 @@ int cfgfile_strval (const TCHAR *option, const TCHAR *value, const TCHAR *name, if (val == -1) { if (more) return 0; - - write_log (_T("Unknown value ('%s') for option '%s'.\n"), value, option); - return -1; + if (!strcasecmp (value, _T("yes")) || !strcasecmp (value, _T("true"))) { + val = 1; + } else if (!strcasecmp (value, _T("no")) || !strcasecmp (value, _T("false"))) { + val = 0; + } else { + write_log (_T("Unknown value ('%s') for option '%s'.\n"), value, option); + return -1; + } } *location = val; return 1; @@ -848,7 +866,9 @@ static int cfgfile_parse_host (struct uae_prefs *p, TCHAR *option, TCHAR *value) || cfgfile_intval (option, value, _T("gfx_width_windowed"), &p->gfx_size_win.width, 1) || cfgfile_intval (option, value, _T("gfx_height_windowed"), &p->gfx_size_win.height, 1) || cfgfile_intval (option, value, _T("gfx_width_fullscreen"), &p->gfx_size_fs.width, 1) - || cfgfile_intval (option, value, _T("gfx_height_fullscreen"), &p->gfx_size_fs.height, 1)) + || cfgfile_intval (option, value, _T("gfx_height_fullscreen"), &p->gfx_size_fs.height, 1) + || cfgfile_intval (option, value, _T("filesys_max_size"), &p->filesys_limit, 1) + ) return 1; @@ -864,8 +884,7 @@ static int cfgfile_parse_host (struct uae_prefs *p, TCHAR *option, TCHAR *value) || cfgfile_string (option, value, _T("config_description"), p->description, sizeof p->description / sizeof (TCHAR))) return 1; - if (cfgfile_yesno (option, value, _T("synchronize_clock"), &p->tod_hack) - || cfgfile_yesno (option, value, _T("bsdsocket_emu"), &p->socket_emu)) + if (cfgfile_yesno (option, value, _T("bsdsocket_emu"), &p->socket_emu)) return 1; if (cfgfile_strval (option, value, _T("sound_output"), &p->produce_sound, soundmode1, 1) @@ -889,7 +908,7 @@ static int cfgfile_parse_host (struct uae_prefs *p, TCHAR *option, TCHAR *value) if(cfgfile_yesno (option, value, _T("show_leds"), &vb)) { p->leds_on_screen = vb; - return 1; + return 1; } if (_tcscmp (option, _T("gfx_width")) == 0 || _tcscmp (option, _T("gfx_height")) == 0) { @@ -1003,10 +1022,11 @@ static struct uaedev_config_info *getuci(struct uae_prefs *p) } struct uaedev_config_info *add_filesys_config (struct uae_prefs *p, int index, - TCHAR *devname, TCHAR *volname, TCHAR *rootdir, bool readonly, - int secspertrack, int surfaces, int reserved, + const TCHAR *devname, const TCHAR *volname, const TCHAR *rootdir, bool readonly, + int cyls, int secspertrack, int surfaces, int reserved, int blocksize, int bootpri, - TCHAR *filesysdir, int hdc, int flags) + const TCHAR *filesysdir, int hdc, int flag, + int pcyls, int pheads, int psecs) { struct uaedev_config_info *uci; int i; @@ -1034,6 +1054,7 @@ struct uaedev_config_info *add_filesys_config (struct uae_prefs *p, int index, validatedevicename (uci->devname); validatevolumename (uci->volname); uci->readonly = readonly; + uci->cyls = cyls; uci->sectors = secspertrack; uci->surfaces = surfaces; uci->reserved = reserved; @@ -1041,6 +1062,11 @@ struct uaedev_config_info *add_filesys_config (struct uae_prefs *p, int index, uci->bootpri = bootpri; uci->donotmount = 0; uci->autoboot = 0; + if (!pcyls || !pheads || !psecs) + pcyls = pheads = psecs = 0; + uci->pcyls = pcyls; + uci->pheads = pheads; + uci->psecs = psecs; if (bootpri < -128) uci->donotmount = 1; else if (bootpri >= -127) @@ -1073,9 +1099,30 @@ struct uaedev_config_info *add_filesys_config (struct uae_prefs *p, int index, return uci; } +static int get_filesys_controller (const TCHAR *hdc) +{ + int hdcv = HD_CONTROLLER_UAE; + if(_tcslen(hdc) >= 4 && !_tcsncmp(hdc, _T("ide"), 3)) { + hdcv = hdc[3] - '0' + HD_CONTROLLER_IDE0; + if (hdcv < HD_CONTROLLER_IDE0 || hdcv > HD_CONTROLLER_IDE3) + hdcv = 0; + } + if(_tcslen(hdc) >= 5 && !_tcsncmp(hdc, _T("scsi"), 4)) { + hdcv = hdc[4] - '0' + HD_CONTROLLER_SCSI0; + if (hdcv < HD_CONTROLLER_SCSI0 || hdcv > HD_CONTROLLER_SCSI6) + hdcv = 0; + } + if (_tcslen (hdc) >= 6 && !_tcsncmp (hdc, _T("scsram"), 6)) + hdcv = HD_CONTROLLER_PCMCIA_SRAM; + if (_tcslen (hdc) >= 5 && !_tcsncmp (hdc, _T("scide"), 6)) + hdcv = HD_CONTROLLER_PCMCIA_IDE; + return hdcv; +} + static int cfgfile_parse_newfilesys (struct uae_prefs *p, int nr, bool hdf, TCHAR *value) { - int secs, heads, reserved, bs, bp, hdcv; + int cyls, secs, heads, reserved, bs, bp, hdcv; + int pcyls, pheads, psecs; bool ro; TCHAR *dname = NULL, *aname = _T(""), *root = NULL, *fs = NULL, *hdc; TCHAR *tmpp = _tcschr (value, ','); @@ -1092,8 +1139,9 @@ static int cfgfile_parse_newfilesys (struct uae_prefs *p, int nr, bool hdf, TCHA ro = false; else goto invalid_fs; - secs = 0; heads = 0; reserved = 0; bs = 0; bp = 0; + cyls = 0,secs = 0; heads = 0; reserved = 0; bs = 0; bp = 0; fs = 0; hdc = 0; hdcv = 0; + pcyls = pheads = psecs = 0; value = tmpp; if (!hdf) { @@ -1136,21 +1184,17 @@ static int cfgfile_parse_newfilesys (struct uae_prefs *p, int nr, bool hdf, TCHA tmpp = _tcschr (tmpp, ','); if (tmpp != 0) { *tmpp++ = 0; - hdc = tmpp; - if(_tcslen(hdc) >= 4 && !_tcsncmp(hdc, _T("ide"), 3)) { - hdcv = hdc[3] - '0' + HD_CONTROLLER_IDE0; - if (hdcv < HD_CONTROLLER_IDE0 || hdcv > HD_CONTROLLER_IDE3) - hdcv = 0; - } - if(_tcslen(hdc) >= 5 && !_tcsncmp(hdc, _T("scsi"), 4)) { - hdcv = hdc[4] - '0' + HD_CONTROLLER_SCSI0; - if (hdcv < HD_CONTROLLER_SCSI0 || hdcv > HD_CONTROLLER_SCSI6) - hdcv = 0; - } - if (_tcslen (hdc) >= 6 && !_tcsncmp (hdc, _T("scsram"), 6)) - hdcv = HD_CONTROLLER_PCMCIA_SRAM; - if (_tcslen (hdc) >= 5 && !_tcsncmp (hdc, _T("scide"), 6)) - hdcv = HD_CONTROLLER_PCMCIA_IDE; + TCHAR *tmpp2 = _tcschr (tmpp, ','); + if (tmpp2) + *tmpp2++ = 0; + hdcv = get_filesys_controller (tmpp); + if (tmpp2) { + if (getintval2 (&tmpp2, &cyls, ',')) { + getintval (&tmpp2, &pcyls, '/'); + getintval (&tmpp2, &pheads, '/'); + getintval2 (&tmpp2, &psecs, '/'); + } + } } } } @@ -1163,7 +1207,7 @@ empty_fs: str = cfgfile_subst_path (UNEXPANDED, p->path_hardfile, root); } #ifdef FILESYS - add_filesys_config (p, nr, dname, aname, str, ro, secs, heads, reserved, bs, bp, fs, hdcv, 0); + add_filesys_config (p, nr, dname, aname, str, ro, cyls, secs, heads, reserved, bs, bp, fs, hdcv, 0, pcyls, pheads, psecs); #endif xfree (str); return 1; @@ -1199,6 +1243,26 @@ static int cfgfile_parse_filesys (struct uae_prefs *p, const TCHAR *option, TCHA #endif } return 1; + } else if (!_tcsncmp (option, tmp, _tcslen (tmp)) && option[_tcslen (tmp)] == '_') { + struct uaedev_config_info *uci = &currprefs.mountconfig[i]; + if (uci->devname) { + const TCHAR *s = &option[_tcslen (tmp) + 1]; + if (!_tcscmp (s, _T("bootpri"))) { + getintval (&value, &uci->bootpri, 0); + } else if (!_tcscmp (s, _T("read-only"))) { + cfgfile_yesno (NULL, value, NULL, &uci->readonly); + } else if (!_tcscmp (s, _T("volumename"))) { + _tcscpy (uci->volname, value); + } else if (!_tcscmp (s, _T("devicename"))) { + _tcscpy (uci->devname, value); + } else if (!_tcscmp (s, _T("root"))) { + _tcscpy (uci->rootdir, value); + } else if (!_tcscmp (s, _T("filesys"))) { + _tcscpy (uci->filesys, value); + } else if (!_tcscmp (s, _T("controller"))) { + uci->controller = get_filesys_controller (value); + } + } } } @@ -1249,9 +1313,9 @@ static int cfgfile_parse_filesys (struct uae_prefs *p, const TCHAR *option, TCHA } str = cfgfile_subst_path (UNEXPANDED, p->path_hardfile, root); #ifdef FILESYS - add_filesys_config (p, -1, NULL, aname, str, ro, secs, heads, reserved, bs, 0, NULL, 0, 0); + add_filesys_config (p, -1, NULL, aname, str, ro, 0, secs, heads, reserved, bs, 0, NULL, 0, 0, 0, 0, 0); #endif - free (str); + xfree (str); return 1; invalid_fs: write_log (_T("Invalid filesystem/hardfile specification.\n")); @@ -1278,6 +1342,8 @@ static int cfgfile_parse_hardware (struct uae_prefs *p, const TCHAR *option, TCH || cfgfile_yesno (option, value, _T("cd32cd"), &p->cs_cd32cd) || cfgfile_yesno (option, value, _T("cd32c2p"), &p->cs_cd32c2p) || cfgfile_yesno (option, value, _T("cd32nvram"), &p->cs_cd32nvram) + || cfgfile_yesno (option, value, _T("synchronize_clock"), &p->tod_hack) + || cfgfile_yesno (option, value, _T("ntsc"), &p->ntscmode) || cfgfile_yesno (option, value, _T("cpu_compatible"), &p->cpu_compatible) || cfgfile_yesno (option, value, _T("cpu_24bit_addressing"), &p->address_space_24)) @@ -1300,7 +1366,9 @@ static int cfgfile_parse_hardware (struct uae_prefs *p, const TCHAR *option, TCH || cfgfile_intval (option, value, _T("floppy3type"), &p->floppyslots[3].dfxtype, 1)) return 1; - if (cfgfile_strval (option, value, _T("collision_level"), &p->collision_level, collmode, 0)) + if (cfgfile_strval (option, value, _T("collision_level"), &p->collision_level, collmode, 0) + || cfgfile_strval (option, value, _T("waiting_blits"), &p->waiting_blits, waitblits, 0) + ) return 1; if (cfgfile_string (option, value, _T("kickstart_rom_file"), p->romfile, sizeof p->romfile) || cfgfile_string (option, value, _T("kickstart_ext_rom_file"), p->romextfile, sizeof p->romextfile) @@ -1370,16 +1438,16 @@ static int cfgfile_parse_hardware (struct uae_prefs *p, const TCHAR *option, TCH return 1; } - if (p->config_version < (21 << 16)) { - if (cfgfile_strval (option, value, _T("cpu_speed"), &p->m68k_speed, speedmode, 1) /* Broken earlier versions used to write this out as a string. */ - || cfgfile_strval (option, value, _T("finegraincpu_speed"), &p->m68k_speed, speedmode, 1)) - { - p->m68k_speed--; - return 1; - } + if (cfgfile_strval (option, value, _T("finegraincpu_speed"), &p->m68k_speed, speedmode, 1)) { + p->m68k_speed--; + return 1; } + if (cfgfile_strval (option, value, _T("cpu_speed"), &p->m68k_speed, speedmode, 1)) { + p->m68k_speed--; + return 1; + } if (cfgfile_intval (option, value, _T("cpu_speed"), &p->m68k_speed, 1)) { p->m68k_speed *= CYCLE_UNIT; return 1; @@ -1401,8 +1469,68 @@ static int cfgfile_parse_hardware (struct uae_prefs *p, const TCHAR *option, TCH return 0; } +static bool createconfigstore (struct uae_prefs*); +static int getconfigstoreline (const TCHAR *option, TCHAR *value); + +static void calcformula (struct uae_prefs *prefs, TCHAR *in) +{ + TCHAR out[MAX_DPATH], configvalue[CONFIG_BLEN]; + TCHAR *p = out; + double val; + int cnt1, cnt2; + static bool updatestore; + + if (_tcslen (in) < 2 || in[0] != '[' || in[_tcslen (in) - 1] != ']') + return; + if (!configstore || updatestore) + createconfigstore (prefs); + updatestore = false; + if (!configstore) + return; + cnt1 = cnt2 = 0; + for (int i = 1; i < _tcslen (in) - 1; i++) { + TCHAR c = _totupper (in[i]); + if (c >= 'A' && c <='Z') { + TCHAR *start = &in[i]; + while (_istalnum (c) || c == '_' || c == '.') { + i++; + c = in[i]; + } + TCHAR store = in[i]; + in[i] = 0; + //write_log (_T("'%s'\n"), start); + if (!getconfigstoreline (start, configvalue)) + return; + _tcscpy (p, configvalue); + p += _tcslen (p); + in[i] = store; + i--; + cnt1++; + } else { + cnt2++; + *p ++= c; + } + } + *p = 0; + if (cnt1 == 0 && cnt2 == 0) + return; + /* single config entry only? */ + if (cnt1 == 1 && cnt2 == 0) { + _tcscpy (in, out); + updatestore = true; + return; + } + if (calc (out, &val)) { + _stprintf (in, _T("%d"), (int)val); + updatestore = true; + return; + } +} + int cfgfile_parse_option (struct uae_prefs *p, TCHAR *option, TCHAR *value, int type) { + calcformula (p, value); + if (!_tcscmp (option, _T("config_hardware"))) return 1; if (!_tcscmp (option, _T("config_host"))) @@ -1420,6 +1548,15 @@ int cfgfile_parse_option (struct uae_prefs *p, TCHAR *option, TCHAR *value, int return 0; } +static int isutf8ext (TCHAR *s) +{ + if (_tcslen (s) > _tcslen (UTF8NAME) && !_tcscmp (s + _tcslen (s) - _tcslen (UTF8NAME), UTF8NAME)) { + s[_tcslen (s) - _tcslen (UTF8NAME)] = 0; + return 1; + } + return 0; +} + static int cfgfile_separate_linea (char *line, TCHAR *line1b, TCHAR *line2b) { char *line1, *line2; @@ -1457,7 +1594,46 @@ static int cfgfile_separate_linea (char *line, TCHAR *line1b, TCHAR *line2b) static int cfgfile_separate_line (TCHAR *line, TCHAR *line1b, TCHAR *line2b) { - return cfgfile_separate_linea(line, line1b, line2b); + TCHAR *line1, *line2; + int i; + + line1 = line; + line1 += _tcsspn (line1, _T("\t \r\n")); + if (*line1 == ';') + return 0; + line2 = _tcschr (line, '='); + if (! line2) { + write_log (_T("CFGFILE: line was incomplete with only %s\n"), line1); + return 0; + } + *line2++ = '\0'; + + /* Get rid of whitespace. */ + i = _tcslen (line2); + while (i > 0 && (line2[i - 1] == '\t' || line2[i - 1] == ' ' + || line2[i - 1] == '\r' || line2[i - 1] == '\n')) + line2[--i] = '\0'; + line2 += _tcsspn (line2, _T("\t \r\n")); + _tcscpy (line2b, line2); + i = _tcslen (line); + while (i > 0 && (line[i - 1] == '\t' || line[i - 1] == ' ' + || line[i - 1] == '\r' || line[i - 1] == '\n')) + line[--i] = '\0'; + line += _tcsspn (line, _T("\t \r\n")); + _tcscpy (line1b, line); + + if (line2b[0] == '"' || line2b[0] == '\"') { + TCHAR c = line2b[0]; + int i = 0; + memmove (line2b, line2b + 1, (_tcslen (line2b) + 1) * sizeof (TCHAR)); + while (line2b[i] != 0 && line2b[i] != c) + i++; + line2b[i] = 0; + } + + if (isutf8ext (line1b)) + return 0; + return 1; } static int isobsolete (TCHAR *s) @@ -1510,6 +1686,24 @@ static void cfgfile_parse_separated_line (struct uae_prefs *p, TCHAR *line1b, TC } } +void cfgfile_parse_lines (struct uae_prefs *p, const TCHAR *lines, int type) +{ + TCHAR *buf = my_strdup (lines); + TCHAR *t = buf; + for (;;) { + if (_tcslen (t) == 0) + break; + TCHAR *t2 = _tcschr (t, '\n'); + if (t2) + *t2 = 0; + cfgfile_parse_line (p, t, type); + if (!t2) + break; + t = t2 + 1; + } + xfree (buf); +} + void cfgfile_parse_line (struct uae_prefs *p, TCHAR *line, int type) { TCHAR line1b[CONFIG_BLEN], line2b[CONFIG_BLEN]; @@ -1527,10 +1721,73 @@ static void subst (TCHAR *p, TCHAR *f, int n) free (str); } +static int getconfigstoreline (const TCHAR *option, TCHAR *value) +{ + TCHAR tmp[CONFIG_BLEN * 2], tmp2[CONFIG_BLEN * 2]; + int idx = 0; + + if (!configstore) + return 0; + zfile_fseek (configstore, 0, SEEK_SET); + for (;;) { + if (!zfile_fgets (tmp, sizeof tmp / sizeof (TCHAR), configstore)) + return 0; + if (!cfgfile_separate_line (tmp, tmp2, value)) + continue; + if (!_tcsicmp (option, tmp2)) + return 1; + } +} + +static bool createconfigstore (struct uae_prefs *p) +{ + uae_u8 zeros[4] = { 0 }; + zfile_fclose (configstore); + configstore = zfile_fopen_empty (NULL, _T("configstore"), 50000); + if (!configstore) + return false; + zfile_fseek (configstore, 0, SEEK_SET); + uaeconfig++; + cfgfile_save_options (configstore, p, 0); + uaeconfig--; + zfile_fwrite (zeros, 1, sizeof zeros, configstore); + zfile_fseek (configstore, 0, SEEK_SET); + return true; +} + static char *cfg_fgets (char *line, int max, struct zfile *fh) { +#ifdef SINGLEFILE + extern TCHAR singlefile_config[]; + static TCHAR *sfile_ptr; + TCHAR *p; +#endif + if (fh) return zfile_fgetsa (line, max, fh); +#ifdef SINGLEFILE + if (sfile_ptr == 0) { + sfile_ptr = singlefile_config; + if (*sfile_ptr) { + write_log (_T("singlefile config found\n")); + while (*sfile_ptr++); + } + } + if (*sfile_ptr == 0) { + sfile_ptr = singlefile_config; + return 0; + } + p = sfile_ptr; + while (*p != 13 && *p != 10 && *p != 0) p++; + memset (line, 0, max); + memcpy (line, sfile_ptr, (p - sfile_ptr) * sizeof (TCHAR)); + sfile_ptr = p + 1; + if (*sfile_ptr == 13) + sfile_ptr++; + if (*sfile_ptr == 10) + sfile_ptr++; + return line; +#endif return 0; } @@ -1555,8 +1812,10 @@ static int cfgfile_load_2 (struct uae_prefs *p, const TCHAR *filename, bool real } fh = zfile_fopen (filename, _T("r"), ZFD_NORMAL); +#ifndef SINGLEFILE if (! fh) return 0; +#endif while (cfg_fgets (linea, sizeof (linea), fh) != 0) { trimwsa (linea); @@ -1564,7 +1823,9 @@ static int cfgfile_load_2 (struct uae_prefs *p, const TCHAR *filename, bool real if (linea[0] == '#' || linea[0] == ';') { struct strlist *u = xcalloc (struct strlist, 1); u->option = NULL; - u->value = my_strdup (linea); + TCHAR *com = au (linea); + u->value = my_strdup (com); + xfree (com); u->unknown = 1; u->next = p->all_lines; p->all_lines = u; @@ -1768,7 +2029,7 @@ static void parse_filesys_spec (struct uae_prefs *p, bool readonly, const TCHAR } #endif #ifdef FILESYS - add_filesys_config (p, -1, NULL, buf, s2, readonly, 0, 0, 0, 0, 0, 0, 0, 0); + add_filesys_config (p, -1, NULL, buf, s2, readonly, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); #endif } else { write_log (_T("Usage: [-m | -M] VOLNAME:mount_point\n")); @@ -1797,7 +2058,7 @@ static void parse_hardfile_spec (struct uae_prefs *p, const TCHAR *spec) goto argh; *x4++ = '\0'; #ifdef FILESYS - add_filesys_config (p, -1, NULL, NULL, x4, 0, _tstoi (x0), _tstoi (x1), _tstoi (x2), _tstoi (x3), 0, 0, 0, 0); + add_filesys_config (p, -1, NULL, NULL, x4, 0, 0, _tstoi (x0), _tstoi (x1), _tstoi (x2), _tstoi (x3), 0, 0, 0, 0, 0, 0, 0); #endif free (x0); @@ -1955,9 +2216,301 @@ void cfgfile_addcfgparam (TCHAR *line) temp_lines = u; } +int cmdlineparser (const TCHAR *s, TCHAR *outp[], int max) +{ + int j, cnt = 0; + int slash = 0; + int quote = 0; + TCHAR tmp1[MAX_DPATH]; + const TCHAR *prev; + int doout; + + doout = 0; + prev = s; + j = 0; + outp[0] = 0; + while (cnt < max) { + TCHAR c = *s++; + if (!c) + break; + if (c < 32) + continue; + if (c == '\\') + slash = 1; + if (!slash && c == '"') { + if (quote) { + quote = 0; + doout = 1; + } else { + quote = 1; + j = -1; + } + } + if (!quote && c == ' ') + doout = 1; + if (!doout) { + if (j >= 0) { + tmp1[j] = c; + tmp1[j + 1] = 0; + } + j++; + } + if (doout) { + if (_tcslen (tmp1) > 0) { + outp[cnt++] = my_strdup (tmp1); + outp[cnt] = 0; + } + tmp1[0] = 0; + doout = 0; + j = 0; + } + slash = 0; + } + if (j > 0 && cnt < max) { + outp[cnt++] = my_strdup (tmp1); + outp[cnt] = 0; + } + return cnt; +} + +#define UAELIB_MAX_PARSE 100 + +static bool cfgfile_parse_uaelib_option (struct uae_prefs *p, TCHAR *option, TCHAR *value, int type) +{ + return false; +} + +uae_u32 cfgfile_modify (uae_u32 index, TCHAR *parms, uae_u32 size, TCHAR *out, uae_u32 outsize) +{ + TCHAR *p; + TCHAR *argc[UAELIB_MAX_PARSE]; + int argv, i; + uae_u32 err; + TCHAR zero = 0; + static TCHAR *configsearch; + static int configsearchfound; + + err = 0; + argv = 0; + p = 0; + if (index != 0xffffffff) { + if (!configstore) { + err = 20; + goto end; + } + if (configsearch) { + TCHAR tmp[CONFIG_BLEN]; + int j = 0; + TCHAR *in = configsearch; + int inlen = _tcslen (configsearch); + int joker = 0; + + if (in[inlen - 1] == '*') { + joker = 1; + inlen--; + } + + for (;;) { + uae_u8 b = 0; + + if (zfile_fread (&b, 1, 1, configstore) != 1) { + err = 10; + if (configsearch) + err = 5; + if (configsearchfound) + err = 0; + goto end; + } + if (j >= sizeof (tmp) / sizeof (TCHAR) - 1) + j = sizeof (tmp) / sizeof (TCHAR) - 1; + if (b == 0) { + err = 10; + if (configsearch) + err = 5; + if (configsearchfound) + err = 0; + goto end; + } + if (b == '\n') { + if (configsearch && !_tcsncmp (tmp, in, inlen) && + ((inlen > 0 && _tcslen (tmp) > inlen && tmp[inlen] == '=') || (joker))) { + TCHAR *p; + if (joker) + p = tmp - 1; + else + p = _tcschr (tmp, '='); + if (p) { + for (i = 0; out && i < outsize - 1; i++) { + TCHAR b = *++p; + out[i] = b; + out[i + 1] = 0; + if (!b) + break; + } + } + err = 0xffffffff; + configsearchfound++; + goto end; + } + index--; + j = 0; + } else { + tmp[j++] = b; + tmp[j] = 0; + } + } + } + err = 0xffffffff; + for (i = 0; out && i < outsize - 1; i++) { + uae_u8 b = 0; + if (zfile_fread (&b, 1, 1, configstore) != 1) + err = 0; + if (b == 0) + err = 0; + if (b == '\n') + b = 0; + out[i] = b; + out[i + 1] = 0; + if (!b) + break; + } + goto end; + } + + if (size > 10000) + return 10; + argv = cmdlineparser (parms, argc, UAELIB_MAX_PARSE); + + if (argv <= 1 && index == 0xffffffff) { + createconfigstore (&currprefs); + xfree (configsearch); + configsearch = NULL; + if (!configstore) { + err = 20; + goto end; + } + if (argv > 0 && _tcslen (argc[0]) > 0) + configsearch = my_strdup (argc[0]); + err = 0xffffffff; + configsearchfound = 0; + goto end; + } + + for (i = 0; i < argv; i++) { + if (i + 2 <= argv) { + if (!inputdevice_uaelib (argc[i], argc[i + 1])) { + if (!cfgfile_parse_uaelib_option (&changed_prefs, argc[i], argc[i + 1], 0)) { + if (!cfgfile_parse_option (&changed_prefs, argc[i], argc[i + 1], 0)) { + err = 5; + break; + } + } + } + set_special (SPCFLAG_BRK); + i++; + } + } +end: + for (i = 0; i < argv; i++) + xfree (argc[i]); + xfree (p); + return err; +} + +uae_u32 cfgfile_uaelib_modify (uae_u32 index, uae_u32 parms, uae_u32 size, uae_u32 out, uae_u32 outsize) +{ + uae_char *p, *parms_p = NULL, *parms_out = NULL; + int i, ret; + TCHAR *out_p = NULL, *parms_in = NULL; + + if (out) + put_byte (out, 0); + if (size == 0) { + while (get_byte (parms + size) != 0) + size++; + } + parms_p = xmalloc (uae_char, size + 1); + if (!parms_p) { + ret = 10; + goto end; + } + if (out) { + out_p = xmalloc (TCHAR, outsize + 1); + if (!out_p) { + ret = 10; + goto end; + } + out_p[0] = 0; + } + p = parms_p; + for (i = 0; i < size; i++) { + p[i] = get_byte (parms + i); + if (p[i] == 10 || p[i] == 13 || p[i] == 0) + break; + } + p[i] = 0; + parms_in = au (parms_p); + ret = cfgfile_modify (index, parms_in, size, out_p, outsize); + xfree (parms_in); + if (out) { + parms_out = ua (out_p); + p = parms_out; + for (i = 0; i < outsize - 1; i++) { + uae_u8 b = *p++; + put_byte (out + i, b); + put_byte (out + i + 1, 0); + if (!b) + break; + } + } + xfree (parms_out); +end: + xfree (out_p); + xfree (parms_p); + return ret; +} + +uae_u32 cfgfile_uaelib (int mode, uae_u32 name, uae_u32 dst, uae_u32 maxlen) +{ + TCHAR tmp[CONFIG_BLEN]; + int i; + struct strlist *sl; + + if (mode) + return 0; + + for (i = 0; i < sizeof (tmp) / sizeof (TCHAR); i++) { + tmp[i] = get_byte (name + i); + if (tmp[i] == 0) + break; + } + tmp[sizeof(tmp) / sizeof (TCHAR) - 1] = 0; + if (tmp[0] == 0) + return 0; + for (sl = currprefs.all_lines; sl; sl = sl->next) { + if (!strcasecmp (sl->option, tmp)) + break; + } + + if (sl) { + char *s = ua (sl->value); + for (i = 0; i < maxlen; i++) { + put_byte (dst + i, s[i]); + if (s[i] == 0) + break; + } + xfree (s); + return dst; + } + return 0; +} + +#include "sd-pandora/sound.h" + void default_prefs (struct uae_prefs *p, int type) { int i; + int roms[] = { 6, 7, 8, 9, 10, 14, 5, 4, 3, 2, 1, -1 }; TCHAR zero = 0; struct zfile *f; @@ -1969,6 +2522,11 @@ void default_prefs (struct uae_prefs *p, int type) p->all_lines = 0; + p->mountitems = 0; + for (i = 0; i < MOUNT_CONFIG_SIZE; i++) { + p->mountconfig[i].configoffset = -1; + } + memset (&p->jports[0], 0, sizeof (struct jport)); memset (&p->jports[1], 0, sizeof (struct jport)); memset (&p->jports[2], 0, sizeof (struct jport)); @@ -2017,6 +2575,7 @@ void default_prefs (struct uae_prefs *p, int type) p->gfx_fullscreen_ratio = 100; #endif p->immediate_blits = 0; + p->waiting_blits = 0; p->chipset_refreshrate = 50; p->collision_level = 2; p->leds_on_screen = 0; @@ -2030,6 +2589,7 @@ void default_prefs (struct uae_prefs *p, int type) _tcscpy (p->floppyslots[2].df, _T("")); _tcscpy (p->floppyslots[3].df, _T("")); + #if 0 // Choose automatically first rom. if (lstAvailableROMs.size() >= 1) { @@ -2038,6 +2598,9 @@ void default_prefs (struct uae_prefs *p, int type) } else _tcscpy (p->romfile, _T("kick.rom")); + #endif + configure_rom (p, roms, 0); + _tcscpy (p->romextfile, _T("")); _tcscpy (p->flashfile, _T("")); @@ -2054,6 +2617,7 @@ void default_prefs (struct uae_prefs *p, int type) p->address_space_24 = 1; p->chipset_mask = CSMASK_ECS_AGNUS; p->ntscmode = 0; + p->filesys_limit = 0; p->fastmem_size = 0x00000000; p->z3fastmem_size = 0x00000000; @@ -2082,64 +2646,90 @@ void default_prefs (struct uae_prefs *p, int type) blkdev_default_prefs (p); target_default_options (p, type); + + zfile_fclose (default_file); + default_file = NULL; + f = zfile_fopen_empty (NULL, _T("configstore")); + if (f) { + uaeconfig++; + cfgfile_save_options (f, p, 0); + uaeconfig--; + cfg_write (&zero, f); + default_file = f; + } } -int bip_a500 (struct uae_prefs *p, int rom) +int bip_a4000 (struct uae_prefs *p, int rom) { - int roms[4]; + int roms[4]; - if(rom == 130) - { - roms[0] = 6; - roms[1] = 5; - roms[2] = 4; - roms[3] = -1; - } - else - { - roms[0] = 5; - roms[1] = 4; - roms[2] = 3; - roms[3] = -1; - } - p->chipmem_size = 0x00080000; - p->chipset_mask = 0; - p->cpu_compatible = 0; - p->fast_copper = 0; - p->nr_floppies = 1; - p->floppyslots[1].dfxtype = DRV_NONE; - return configure_rom (p, roms, 0); + roms[0] = 15; + roms[1] = 14; + roms[2] = 11; + roms[3] = -1; + + p->bogomem_size = 0; + p->chipmem_size = 0x200000; + p->cpu_model = 68030; + p->fpu_model = 68882; + p->chipset_mask = CSMASK_AGA | CSMASK_ECS_AGNUS | CSMASK_ECS_DENISE; + p->cpu_compatible = p->address_space_24 = 0; + p->m68k_speed = -1; + p->immediate_blits = 0; + p->cachesize = 8192; + + p->nr_floppies = 2; + p->floppyslots[0].dfxtype = DRV_35_HD; + p->floppyslots[1].dfxtype = DRV_35_HD; + p->floppy_speed = 0; + + return configure_rom (p, roms, 0); } - -int bip_a500plus (struct uae_prefs *p, int rom) +int bip_cd32 (struct uae_prefs *p, int rom) { - int roms[4]; + int roms[2]; - if(rom == 130) - { - roms[0] = 6; - roms[1] = 5; - roms[2] = 4; - roms[3] = -1; - } - else - { - roms[0] = 7; - roms[1] = 6; - roms[2] = 5; - roms[3] = -1; - } - p->chipmem_size = 0x00100000; - p->chipset_mask = CSMASK_ECS_AGNUS | CSMASK_ECS_DENISE; - p->cpu_compatible = 0; - p->fast_copper = 0; - p->nr_floppies = 1; + p->cpu_model = 68020; + p->address_space_24 = 1; + p->chipset_mask = CSMASK_ECS_AGNUS | CSMASK_ECS_DENISE | CSMASK_AGA; + p->chipmem_size = 0x200000; + p->bogomem_size = 0; + p->m68k_speed = M68K_SPEED_14MHZ_CYCLES; + + p->cs_cd32c2p = p->cs_cd32cd = p->cs_cd32nvram = 1; + p->nr_floppies = 0; + p->floppyslots[0].dfxtype = DRV_NONE; p->floppyslots[1].dfxtype = DRV_NONE; - return configure_rom (p, roms, 0); -} + fetch_datapath (p->flashfile, sizeof (p->flashfile) / sizeof (TCHAR)); + _tcscat (p->flashfile, _T("cd32.nvr")); + p->cdslots[0].inuse = true; + p->cdslots[0].type = SCSI_UNIT_IMAGE; + + p->gfx_size.width = 384; + p->gfx_size.height = 256; + + roms[0] = 64; + roms[1] = -1; + if (!configure_rom (p, roms, 0)) { + roms[0] = 18; + roms[1] = -1; + if (!configure_rom (p, roms, 0)) + return 0; + roms[0] = 19; + if (!configure_rom (p, roms, 0)) + return 0; + } +// if (config > 0) { +// roms[0] = 23; +// if (!configure_rom (p, roms, 0)) +// return 0; +// } + + return 1; +} int bip_a1200 (struct uae_prefs *p, int rom) { @@ -2172,6 +2762,60 @@ int bip_a1200 (struct uae_prefs *p, int rom) return configure_rom (p, roms, 0); } +int bip_a500plus (struct uae_prefs *p, int rom) +{ + int roms[4]; + + if(rom == 130) + { + roms[0] = 6; + roms[1] = 5; + roms[2] = 4; + roms[3] = -1; + } + else + { + roms[0] = 7; + roms[1] = 6; + roms[2] = 5; + roms[3] = -1; + } + p->bogomem_size = 0; + p->chipmem_size = 0x00100000; + p->chipset_mask = CSMASK_ECS_AGNUS | CSMASK_ECS_DENISE; + p->cpu_compatible = 0; + p->fast_copper = 0; + p->nr_floppies = 1; + p->floppyslots[1].dfxtype = DRV_NONE; + return configure_rom (p, roms, 0); +} + +int bip_a500 (struct uae_prefs *p, int rom) +{ + int roms[4]; + + if(rom == 130) + { + roms[0] = 6; + roms[1] = 5; + roms[2] = 4; + roms[3] = -1; + } + else + { + roms[0] = 5; + roms[1] = 4; + roms[2] = 3; + roms[3] = -1; + } + p->chipmem_size = 0x00080000; + p->chipset_mask = 0; + p->cpu_compatible = 0; + p->fast_copper = 0; + p->nr_floppies = 1; + p->floppyslots[1].dfxtype = DRV_NONE; + return configure_rom (p, roms, 0); +} int bip_a2000 (struct uae_prefs *p, int rom) { @@ -2200,77 +2844,3 @@ int bip_a2000 (struct uae_prefs *p, int rom) p->floppyslots[1].dfxtype = DRV_NONE; return configure_rom (p, roms, 0); } - - -int bip_a4000 (struct uae_prefs *p, int rom) -{ - int roms[4]; - - roms[0] = 15; - roms[1] = 14; - roms[2] = 11; - roms[3] = -1; - - p->bogomem_size = 0; - p->chipmem_size = 0x200000; - p->cpu_model = 68030; - p->fpu_model = 68882; - p->address_space_24 = 0; - p->cpu_compatible = 0; - p->chipset_mask = CSMASK_ECS_AGNUS | CSMASK_ECS_DENISE | CSMASK_AGA; - p->m68k_speed = -1; - p->cachesize = 8192; - - p->nr_floppies = 2; - p->floppyslots[0].dfxtype = DRV_35_HD; - p->floppyslots[1].dfxtype = DRV_35_HD; - - return configure_rom (p, roms, 0); -} - - -int bip_cd32 (struct uae_prefs *p, int rom) -{ - int roms[2]; - - roms[0] = 64; - roms[1] = -1; - if (!configure_rom (p, roms, 0)) { - roms[0] = 18; - roms[1] = -1; - if (!configure_rom (p, roms, 0)) - return 0; - roms[0] = 19; - if (!configure_rom (p, roms, 0)) - return 0; - } -// if (config > 0) { -// roms[0] = 23; -// if (!configure_rom (p, roms, 0)) -// return 0; -// } - - p->cpu_model = 68020; - p->address_space_24 = 1; - p->chipset_mask = CSMASK_ECS_AGNUS | CSMASK_ECS_DENISE | CSMASK_AGA; - p->chipmem_size = 0x200000; - p->bogomem_size = 0; - p->m68k_speed = M68K_SPEED_14MHZ_CYCLES; - - p->cs_cd32c2p = 1; - p->cs_cd32cd = 1; - p->cs_cd32nvram = 1; - p->nr_floppies = 0; - p->floppyslots[0].dfxtype = DRV_NONE; - p->floppyslots[1].dfxtype = DRV_NONE; - fetch_datapath (p->flashfile, sizeof (p->flashfile) / sizeof (TCHAR)); - _tcscat (p->flashfile, _T("cd32.nvr")); - - p->cdslots[0].inuse = true; - p->cdslots[0].type = SCSI_UNIT_IMAGE; - - p->gfx_size.width = 384; - p->gfx_size.height = 256; - - return 1; -} diff --git a/src/cia.cpp b/src/cia.cpp index 1c3181d2..efe02135 100644 --- a/src/cia.cpp +++ b/src/cia.cpp @@ -22,9 +22,12 @@ #include "gui.h" #include "savestate.h" #include "inputdevice.h" +#include "zfile.h" #include "akiko.h" #include "audio.h" #include "keyboard.h" +#include "uae.h" +#include "autoconf.h" #define TOD_HACK @@ -51,7 +54,8 @@ static unsigned long ciaata_passed, ciaatb_passed, ciabta_passed, ciabtb_passed; static unsigned long ciaatod, ciabtod, ciaatol, ciabtol, ciaaalarm, ciabalarm; static int ciaatlatch, ciabtlatch; -static bool oldled, oldovl, oldcd32mute; +static bool oldovl, oldcd32mute; +static bool led; static unsigned int ciabpra; @@ -63,7 +67,7 @@ static int div10; static int kbstate, kblostsynccnt; static uae_u8 kbcode; -static __inline__ void setclr (unsigned int *_GCCRES_ p, unsigned int val) +static void setclr (unsigned int *p, unsigned int val) { if (val & 0x80) { *p |= val & 0x7F; @@ -72,7 +76,7 @@ static __inline__ void setclr (unsigned int *_GCCRES_ p, unsigned int val) } } -static void ICRA(uae_u32 data) +STATIC_INLINE void ICRA(uae_u32 data) { if (ciaaimask & ciaaicr) { ciaaicr |= 0x80; @@ -80,7 +84,7 @@ static void ICRA(uae_u32 data) } ciaaicr_reg |= ciaaicr; } -static void ICRB(uae_u32 data) +STATIC_INLINE void ICRB(uae_u32 data) { if (ciabimask & ciabicr) { ciabicr |= 0x80; @@ -89,14 +93,14 @@ static void ICRB(uae_u32 data) ciabicr_reg |= ciabicr; } -static void RethinkICRA (void) +STATIC_INLINE void RethinkICRA (void) { if (ciaaicr) { ICRA (0x0008); } } -static void RethinkICRB (void) +STATIC_INLINE void RethinkICRB (void) { if (ciabicr) { ICRB (0x2000); @@ -401,7 +405,7 @@ static void tod_hack_reset (void) } #endif -STATIC_INLINE void setcode (uae_u8 keycode) +static void setcode (uae_u8 keycode) { kbcode = ~((keycode << 1) | (keycode >> 7)); } @@ -500,8 +504,8 @@ static void bfe001_change (void) v |= ~ciaadra; /* output is high when pin's direction is input */ led2 = (v & 2) ? 0 : 1; - if (led2 != oldled) { - oldled = led2; + if (led2 != led) { + led = led2; gui_data.powerled = led2; led_filter_audio(); } @@ -609,10 +613,10 @@ static uae_u8 ReadCIAB (unsigned int addr) switch (reg) { case 0: + tmp = 0; #ifdef INPUTDEVICE_SIMPLE tmp = ((ciabpra & ciabdra) | (ciabdra ^ 0xff)) & 0x7; #else - tmp = 0; tmp |= handle_parport_joystick (1, ciabpra, ciabdra); #endif return tmp; @@ -920,6 +924,11 @@ static void WriteCIAB (uae_u16 addr,uae_u8 val) } } +void cia_set_overlay (bool overlay) +{ + oldovl = overlay; +} + void CIA_reset (void) { #ifdef TOD_HACK @@ -928,11 +937,10 @@ void CIA_reset (void) tod_hack_reset (); #endif kblostsynccnt = 0; - oldovl = 1; oldcd32mute = 1; - oldled = true; if (!savestate_state) { + oldovl = true; kbstate = 0; ciaatlatch = ciabtlatch = 0; ciaapra = 0; ciaadra = 0; @@ -952,10 +960,12 @@ void CIA_reset (void) } map_overlay (0); if (savestate_state) { + if (!(currprefs.chipset_mask & CSMASK_AGA)) { + oldovl = true; + } bfe001_change (); if (currprefs.chipset_mask & CSMASK_AGA) { - map_overlay (1); - oldovl = false; + map_overlay (oldovl ? 0 : 1); } } #ifdef CD32 @@ -990,7 +1000,6 @@ static void cia_wait_pre (void) if (currprefs.cachesize) return; -#ifndef CUSTOM_SIMPLE int div = (get_cycles () - eventtab[ev_cia].oldcycles) % DIV10; int cycles; @@ -1005,7 +1014,6 @@ static void cia_wait_pre (void) if (cycles) { do_cycles (cycles); } -#endif } static void cia_wait_post (uae_u32 value) @@ -1013,20 +1021,21 @@ static void cia_wait_post (uae_u32 value) if (currprefs.cachesize) { do_cycles (8 * CYCLE_UNIT / 2); } else { - do_cycles (6 * CYCLE_UNIT / 2); + int c = 6 * CYCLE_UNIT / 2; + do_cycles (c); } } static uae_u32 REGPARAM2 cia_bget (uaecptr addr) { int r = (addr & 0xf00) >> 8; - uae_u8 v; + uae_u8 v = 0xff; #ifdef JIT special_mem |= S_READ; #endif + cia_wait_pre (); - v = 0xff; switch ((addr >> 12) & 3) { case 0: v = (addr & 1) ? ReadCIAA (r) : ReadCIAB (r); @@ -1050,13 +1059,13 @@ static uae_u32 REGPARAM2 cia_bget (uaecptr addr) static uae_u32 REGPARAM2 cia_wget (uaecptr addr) { int r = (addr & 0xf00) >> 8; - uae_u16 v; + uae_u16 v = 0xffff; #ifdef JIT special_mem |= S_READ; #endif + cia_wait_pre (); - v = 0xffff; switch ((addr >> 12) & 3) { case 0: @@ -1106,6 +1115,7 @@ static void REGPARAM2 cia_bput (uaecptr addr, uae_u32 value) #ifdef JIT special_mem |= S_WRITE; #endif + cia_wait_pre (); if ((addr & 0x2000) == 0) WriteCIAB (r, value); @@ -1122,6 +1132,7 @@ static void REGPARAM2 cia_wput (uaecptr addr, uae_u32 value) #ifdef JIT special_mem |= S_WRITE; #endif + cia_wait_pre (); if ((addr & 0x2000) == 0) WriteCIAB (r, value >> 8); @@ -1156,6 +1167,38 @@ static unsigned int clock_control_d; static unsigned int clock_control_e; static unsigned int clock_control_f; +static uae_u8 getclockreg (int addr, struct tm *ct) +{ + uae_u8 v = 0; + + switch (addr) { + case 0x0: v = ct->tm_sec % 10; break; + case 0x1: v = ct->tm_sec / 10; break; + case 0x2: v = ct->tm_min % 10; break; + case 0x3: v = ct->tm_min / 10; break; + case 0x4: v = ct->tm_hour % 10; break; + case 0x5: + if (clock_control_f & 4) { + v = ct->tm_hour / 10; // 24h + } else { + v = (ct->tm_hour % 12) / 10; // 12h + v |= ct->tm_hour >= 12 ? 4 : 0; // AM/PM bit + } + break; + case 0x6: v = ct->tm_mday % 10; break; + case 0x7: v = ct->tm_mday / 10; break; + case 0x8: v = (ct->tm_mon + 1) % 10; break; + case 0x9: v = (ct->tm_mon + 1) / 10; break; + case 0xA: v = ct->tm_year % 10; break; + case 0xB: v = (ct->tm_year / 10) & 0x0f; break; + case 0xC: v = ct->tm_wday; break; + case 0xD: v = clock_control_d; break; + case 0xE: v = clock_control_e; break; + case 0xF: v = clock_control_f; break; + } + return v; +} + void rtc_hardreset(void) { clock_bank.name = _T("Battery backed up clock (MSM6242B)"); @@ -1178,13 +1221,13 @@ static uae_u32 REGPARAM2 clock_bget (uaecptr addr) { time_t t; struct tm *ct; + uae_u8 v = 0; #ifdef JIT special_mem |= S_READ; #endif addr &= 0x3f; if ((addr & 3) == 2 || (addr & 3) == 0) { - int v = 0; if (currprefs.cpu_model == 68000 && currprefs.cpu_compatible) v = regs.irc >> 8; return v; @@ -1192,25 +1235,7 @@ static uae_u32 REGPARAM2 clock_bget (uaecptr addr) t = time(0); ct = localtime (&t); addr >>= 2; - switch (addr) { - case 0x0: return ct->tm_sec % 10; - case 0x1: return ct->tm_sec / 10; - case 0x2: return ct->tm_min % 10; - case 0x3: return ct->tm_min / 10; - case 0x4: return ct->tm_hour % 10; - case 0x5: return ct->tm_hour / 10; - case 0x6: return ct->tm_mday % 10; - case 0x7: return ct->tm_mday / 10; - case 0x8: return (ct->tm_mon + 1) % 10; - case 0x9: return (ct->tm_mon + 1) / 10; - case 0xA: return ct->tm_year % 10; - case 0xB: return ct->tm_year / 10; - case 0xC: return ct->tm_wday; - case 0xD: return clock_control_d; - case 0xE: return clock_control_e; - case 0xF: return clock_control_f; - } - return 0; + return getclockreg (addr, ct); } static void REGPARAM2 clock_lput (uaecptr addr, uae_u32 value) @@ -1254,6 +1279,13 @@ static void save_cia_prepare (void) compute_passed_time (); } +void restore_cia_start (void) +{ + /* Fixes very old statefiles without keyboard state */ + kbstate = 3; + kblostsynccnt = 0; +} + void restore_cia_finish (void) { eventtab[ev_cia].oldcycles = get_cycles (); @@ -1432,10 +1464,12 @@ uae_u8 *restore_keyboard (uae_u8 *src) restore_u8 (); restore_u8 (); restore_u8 (); - if (!(v & 1)) - kbstate = 3; kbcode = restore_u8 (); kblostsynccnt = restore_u16 (); + if (!(v & 1)) { + kbstate = 3; + kblostsynccnt = 0; + } return src; } diff --git a/src/cpudefs.cpp b/src/cpudefs.cpp index bbdef56c..57012d85 100644 --- a/src/cpudefs.cpp +++ b/src/cpudefs.cpp @@ -3,379 +3,383 @@ #include "readcpu.h" struct instr_def defs68k[] = { /* ORSR.B */ -{0x003C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,{{0,0},{0,0},{0,0},{0,0},{0,0}}, 0, 16,_T("ORSR.B #1")}, +{0x003C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{0,0},{0,0},{0,0},{0,0},{0,0}}, 0, 16,_T("ORSR.B #1")}, /* ORSR.W */ -{0x007C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,2,{{0,0},{0,0},{0,0},{0,0},{0,0}}, 4, 16,_T("ORSR.W #1")}, +{0x007C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,2,{{0,0},{0,0},{0,0},{0,0},{0,0}}, 4, 16,_T("ORSR.W #1")}, /* CHK2.z */ -{0x00C0, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xF9C0,2,0,{{1,1},{1,5},{1,0},{1,5},{1,0}}, 4, 17,_T("CHK2.z #1,s[!Dreg,Areg,Aipi,Apdi,Immd]")}, +{0x00C0, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xF9C0,2,5,0,{{1,1},{1,5},{1,0},{1,5},{1,0}}, 4, 17,_T("CHK2.z #1,s[!Dreg,Areg,Aipi,Apdi,Immd]")}, /* OR.z */ -{0x0000, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("OR.z #z,d[!Areg]")}, +{0x0000, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("OR.z #z,d[!Areg]")}, /* ANDSR.B */ -{0x023C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,{{0,0},{0,0},{0,0},{0,0},{0,0}}, 0, 16,_T("ANDSR.B #1")}, +{0x023C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{0,0},{0,0},{0,0},{0,0},{0,0}}, 0, 16,_T("ANDSR.B #1")}, /* ANDSR.W */ -{0x027C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,2,{{0,0},{0,0},{0,0},{0,0},{0,0}}, 4, 16,_T("ANDSR.W #1")}, +{0x027C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,2,{{0,0},{0,0},{0,0},{0,0},{0,0}}, 4, 16,_T("ANDSR.W #1")}, /* AND.z */ -{0x0200, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("AND.z #z,d[!Areg]")}, +{0x0200, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("AND.z #z,d[!Areg]")}, /* SUB.z */ -{0x0400, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("SUB.z #z,d[!Areg]")}, +{0x0400, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("SUB.z #z,d[!Areg]")}, /* ADD.z */ -{0x0600, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("ADD.z #z,d[!Areg]")}, +{0x0600, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("ADD.z #z,d[!Areg]")}, /* CALLM */ -{0x06C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,{{0,1},{0,1},{0,1},{0,1},{0,1}}, 0, 16,_T("CALLM s[!Dreg,Areg,Aipi,Apdi,Immd]")}, +{0x06C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,3,0,{{0,1},{0,1},{0,1},{0,1},{0,1}}, 0, 16,_T("CALLM s[!Dreg,Areg,Aipi,Apdi,Immd]")}, /* RTM */ -{0x06C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 3, 16,_T("RTM s[Dreg,Areg]")}, +{0x06C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,3,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 3, 16,_T("RTM s[Dreg,Areg]")}, /* BTST */ -{0x0800, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 17,_T("BTST #1,s[!Areg]")}, +{0x0800, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 17,_T("BTST #1,s[!Areg]")}, /* BCHG */ -{0x0840, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 19,_T("BCHG #1,s[!Areg,Immd,PC8r,PC16]")}, +{0x0840, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 19,_T("BCHG #1,s[!Areg,Immd,PC8r,PC16]")}, /* BCLR */ -{0x0880, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 19,_T("BCLR #1,s[!Areg,Immd,PC8r,PC16]")}, +{0x0880, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 19,_T("BCLR #1,s[!Areg,Immd,PC8r,PC16]")}, /* BSET */ -{0x08C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 19,_T("BSET #1,s[!Areg,Immd,PC8r,PC16]")}, +{0x08C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 19,_T("BSET #1,s[!Areg,Immd,PC8r,PC16]")}, /* EORSR.B */ -{0x0A3C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,{{0,0},{0,0},{0,0},{0,0},{0,0}}, 0, 16,_T("EORSR.B #1")}, +{0x0A3C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{0,0},{0,0},{0,0},{0,0},{0,0}}, 0, 16,_T("EORSR.B #1")}, /* EORSR.W */ -{0x0A7C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,2,{{0,0},{0,0},{0,0},{0,0},{0,0}}, 4, 16,_T("EORSR.W #1")}, +{0x0A7C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,2,{{0,0},{0,0},{0,0},{0,0},{0,0}}, 4, 16,_T("EORSR.W #1")}, /* EOR.z */ -{0x0A00, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("EOR.z #z,d[!Areg]")}, +{0x0A00, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("EOR.z #z,d[!Areg]")}, /* CMP.z */ -{0x0C00, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 17,_T("CMP.z #z,s[!Areg,Immd]")}, +{0x0C00, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 17,_T("CMP.z #z,s[!Areg,Immd,PC8r,PC16]")}, +/* CMP.z */ +{0x0C00, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,2,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 17,_T("CMP.z #z,s[PC8r,PC16]")}, /* CAS.B */ -{0x0AC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("CAS.B #1,s[!Dreg,Areg,Immd,PC8r,PC16]")}, +{0x0AC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("CAS.B #1,s[!Dreg,Areg,Immd,PC8r,PC16]")}, /* CAS.W */ -{0x0CC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("CAS.W #1,s[!Dreg,Areg,Immd,PC8r,PC16]")}, +{0x0CC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("CAS.W #1,s[!Dreg,Areg,Immd,PC8r,PC16]")}, /* CAS2.W */ -{0x0CFC, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,2,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 16,_T("CAS2.W #2")}, +{0x0CFC, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,2,5,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 16,_T("CAS2.W #2")}, /* MOVES.z */ -{0x0E00, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,2,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 19,_T("MOVES.z #1,s[!Dreg,Areg,Immd,PC8r,PC16]")}, +{0x0E00, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,2,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 19,_T("MOVES.z #1,s[!Dreg,Areg,Immd,PC8r,PC16]")}, /* CAS.L */ -{0x0EC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("CAS.L #1,s[!Dreg,Areg,Immd,PC8r,PC16]")}, +{0x0EC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("CAS.L #1,s[!Dreg,Areg,Immd,PC8r,PC16]")}, /* CAS2.L */ -{0x0EFC, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,2,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 16,_T("CAS2.L #2")}, +{0x0EFC, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,2,5,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 16,_T("CAS2.L #2")}, /* MVPMR.W */ -{0x0100, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MVPMR.W d[Areg-Ad16],Dr")}, +{0x0100, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MVPMR.W d[Areg-Ad16],Dr")}, /* MVPMR.L */ -{0x0140, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MVPMR.L d[Areg-Ad16],Dr")}, +{0x0140, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MVPMR.L d[Areg-Ad16],Dr")}, /* MVPRM.W */ -{0x0180, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MVPRM.W Dr,d[Areg-Ad16]")}, +{0x0180, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MVPRM.W Dr,d[Areg-Ad16]")}, /* MVPRM.L */ -{0x01C0, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MVPRM.L Dr,d[Areg-Ad16]")}, +{0x01C0, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MVPRM.L Dr,d[Areg-Ad16]")}, /* BTST */ -{0x0100, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 17,_T("BTST Dr,s[!Areg]")}, +{0x0100, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 17,_T("BTST Dr,s[!Areg]")}, /* BCHG */ -{0x0140, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 19,_T("BCHG Dr,s[!Areg,Immd,PC8r,PC16]")}, +{0x0140, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 19,_T("BCHG Dr,s[!Areg,Immd,PC8r,PC16]")}, /* BCLR */ -{0x0180, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 19,_T("BCLR Dr,s[!Areg,Immd,PC8r,PC16]")}, +{0x0180, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 19,_T("BCLR Dr,s[!Areg,Immd,PC8r,PC16]")}, /* BSET */ -{0x01C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 19,_T("BSET Dr,s[!Areg,Immd,PC8r,PC16]")}, +{0x01C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 19,_T("BSET Dr,s[!Areg,Immd,PC8r,PC16]")}, /* MOVE.B */ -{0x1000,12,{14,14,14,13,13,13,11,11,11,12,12,12, 0, 0, 0, 0},0xF000,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 18,_T("MOVE.B s,d[!Areg]")}, +{0x1000,12,{14,14,14,13,13,13,11,11,11,12,12,12, 0, 0, 0, 0},0xF000,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 18,_T("MOVE.B s,d[!Areg]")}, /* MOVEA.L */ -{0x2000,12,{14,14,14,13,13,13,11,11,11,12,12,12, 0, 0, 0, 0},0xF000,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MOVEA.L s,d[Areg]")}, +{0x2000,12,{14,14,14,13,13,13,11,11,11,12,12,12, 0, 0, 0, 0},0xF000,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MOVEA.L s,d[Areg]")}, /* MOVE.L */ -{0x2000,12,{14,14,14,13,13,13,11,11,11,12,12,12, 0, 0, 0, 0},0xF000,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 18,_T("MOVE.L s,d[!Areg]")}, +{0x2000,12,{14,14,14,13,13,13,11,11,11,12,12,12, 0, 0, 0, 0},0xF000,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 18,_T("MOVE.L s,d[!Areg]")}, /* MOVEA.W */ -{0x3000,12,{14,14,14,13,13,13,11,11,11,12,12,12, 0, 0, 0, 0},0xF000,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MOVEA.W s,d[Areg]")}, +{0x3000,12,{14,14,14,13,13,13,11,11,11,12,12,12, 0, 0, 0, 0},0xF000,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MOVEA.W s,d[Areg]")}, /* MOVE.W */ -{0x3000,12,{14,14,14,13,13,13,11,11,11,12,12,12, 0, 0, 0, 0},0xF000,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 18,_T("MOVE.W s,d[!Areg]")}, +{0x3000,12,{14,14,14,13,13,13,11,11,11,12,12,12, 0, 0, 0, 0},0xF000,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 18,_T("MOVE.W s,d[!Areg]")}, /* NEGX.z */ -{0x4000, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,{{0,0},{1,0},{0,0},{1,0},{1,0}}, 0, 48,_T("NEGX.z d[!Areg]")}, +{0x4000, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{0,0},{1,0},{0,0},{1,0},{1,0}}, 0, 48,_T("NEGX.z d[!Areg]")}, /* MVSR2.W */ -{0x40C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,1,{{0,1},{0,1},{0,1},{0,1},{0,1}}, 4, 16,_T("MVSR2.W d[!Areg]")}, +{0x40C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,1,{{0,1},{0,1},{0,1},{0,1},{0,1}}, 4, 16,_T("MVSR2.W d[!Areg]")}, /* CLR.z */ -{0x4200, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,{{1,1},{1,2},{1,3},{1,2},{1,2}}, 0, 32,_T("CLR.z d[!Areg]")}, +{0x4200, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,2},{1,3},{1,2},{1,2}}, 0, 32,_T("CLR.z d[!Areg]")}, /* MVSR2.B */ -{0x42C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,1,0,{{0,1},{0,1},{0,1},{0,1},{0,1}}, 0, 16,_T("MVSR2.B d[!Areg]")}, +{0x42C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,1,0,0,{{0,1},{0,1},{0,1},{0,1},{0,1}}, 0, 16,_T("MVSR2.B d[!Areg]")}, /* NEG.z */ -{0x4400, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 48,_T("NEG.z d[!Areg]")}, +{0x4400, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 48,_T("NEG.z d[!Areg]")}, /* MV2SR.B */ -{0x44C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 16,_T("MV2SR.B s[!Areg]")}, +{0x44C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 16,_T("MV2SR.B s[!Areg]")}, /* NOT.z */ -{0x4600, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 48,_T("NOT.z d[!Areg]")}, +{0x4600, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 48,_T("NOT.z d[!Areg]")}, /* MV2SR.W */ -{0x46C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,2,{{0,0},{0,0},{0,0},{0,0},{0,0}}, 4, 16,_T("MV2SR.W s[!Areg]")}, +{0x46C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,2,{{0,0},{0,0},{0,0},{0,0},{0,0}}, 4, 16,_T("MV2SR.W s[!Areg]")}, /* LINK.L */ -{0x4808, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,2,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 49,_T("LINK.L Ar,#2")}, +{0x4808, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 49,_T("LINK.L Ar,#2")}, /* NBCD.B */ -{0x4800, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,{{0,0},{1,5},{0,0},{1,5},{1,0}}, 0, 48,_T("NBCD.B d[!Areg]")}, +{0x4800, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{0,0},{1,5},{0,0},{1,5},{1,0}}, 0, 48,_T("NBCD.B d[!Areg]")}, /* BKPT */ -{0x4848, 3,{ 9, 9, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,2,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 16,_T("BKPT #k")}, +{0x4848, 3,{ 9, 9, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 16,_T("BKPT #k")}, /* SWAP.W */ -{0x4840, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 48,_T("SWAP.W s[Dreg]")}, +{0x4840, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 48,_T("SWAP.W s[Dreg]")}, /* PEA.L */ -{0x4840, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 0,_T("PEA.L s[!Dreg,Areg,Aipi,Apdi,Immd]")}, +{0x4840, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 0,_T("PEA.L s[!Dreg,Areg,Aipi,Apdi,Immd]")}, /* EXT.W */ -{0x4880, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 48,_T("EXT.W d[Dreg]")}, +{0x4880, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 48,_T("EXT.W d[Dreg]")}, /* MVMLE.W */ -{0x4880, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 2,_T("MVMLE.W #1,d[!Dreg,Areg,Aipi]")}, +{0x4880, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 2,_T("MVMLE.W #1,d[!Dreg,Areg,Aipi]")}, /* EXT.L */ -{0x48C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 48,_T("EXT.L d[Dreg]")}, +{0x48C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 48,_T("EXT.L d[Dreg]")}, /* MVMLE.L */ -{0x48C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 2,_T("MVMLE.L #1,d[!Dreg,Areg,Aipi]")}, +{0x48C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 2,_T("MVMLE.L #1,d[!Dreg,Areg,Aipi]")}, /* EXT.B */ -{0x49C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 48,_T("EXT.B d[Dreg]")}, +{0x49C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 48,_T("EXT.B d[Dreg]")}, /* TST.z */ -{0x4A00, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 16,_T("TST.z s")}, +{0x4A00, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 16,_T("TST.z s[!Areg,PC16,PC8r]")}, +/* TST.z */ +{0x4A00, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 16,_T("TST.z s[Areg,PC16,PC8r]")}, /* TAS.B */ -{0x4AC0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 48,_T("TAS.B d[!Areg]")}, +{0x4AC0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 48,_T("TAS.B d[!Areg]")}, /* ILLEGAL */ -{0x4AFC, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("ILLEGAL")}, +{0x4AFC, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("ILLEGAL")}, /* MULL.L */ -{0x4C00, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("MULL.L #1,s[!Areg]")}, +{0x4C00, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("MULL.L #1,s[!Areg]")}, /* DIVL.L */ -{0x4C40, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,{{1,1},{1,0},{1,0},{1,0},{1,2}}, 4, 19,_T("DIVL.L #1,s[!Areg]")}, +{0x4C40, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,0},{1,2}}, 4, 19,_T("DIVL.L #1,s[!Areg]")}, /* MVMEL.W */ -{0x4C80, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 1,_T("MVMEL.W #1,s[!Dreg,Areg,Apdi,Immd]")}, +{0x4C80, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 1,_T("MVMEL.W #1,s[!Dreg,Areg,Apdi,Immd]")}, /* MVMEL.L */ -{0x4CC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 1,_T("MVMEL.L #1,s[!Dreg,Areg,Apdi,Immd]")}, +{0x4CC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 1,_T("MVMEL.L #1,s[!Dreg,Areg,Apdi,Immd]")}, /* TRAP */ -{0x4E40, 4,{ 8, 8, 8, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF0,0,0,{{0,1},{0,1},{0,1},{0,1},{0,1}}, 0, 16,_T("TRAP #J")}, +{0x4E40, 4,{ 8, 8, 8, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF0,0,0,0,{{0,1},{0,1},{0,1},{0,1},{0,1}}, 0, 16,_T("TRAP #J")}, /* LINK.W */ -{0x4E50, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 49,_T("LINK.W Ar,#1")}, +{0x4E50, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 49,_T("LINK.W Ar,#1")}, /* UNLK.L */ -{0x4E58, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 48,_T("UNLK.L Ar")}, +{0x4E58, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 48,_T("UNLK.L Ar")}, /* MVR2USP.L */ -{0x4E60, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 16,_T("MVR2USP.L Ar")}, +{0x4E60, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,0,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 16,_T("MVR2USP.L Ar")}, /* MVUSP2R.L */ -{0x4E68, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 32,_T("MVUSP2R.L Ar")}, +{0x4E68, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,0,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 32,_T("MVUSP2R.L Ar")}, /* RESET */ -{0x4E70, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("RESET")}, +{0x4E70, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("RESET")}, /* NOP */ -{0x4E71, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 0,_T("NOP")}, +{0x4E71, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 0,_T("NOP")}, /* STOP */ -{0x4E72, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,2,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 4, 16,_T("STOP #1")}, +{0x4E72, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,2,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 4, 16,_T("STOP #1")}, /* RTE */ -{0x4E73, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,2,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 7, 0,_T("RTE")}, +{0x4E73, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,2,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 7, 0,_T("RTE")}, /* RTD */ -{0x4E74, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 3, 16,_T("RTD #1")}, +{0x4E74, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 3, 16,_T("RTD #1")}, /* RTS */ -{0x4E75, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 3, 0,_T("RTS")}, +{0x4E75, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 3, 0,_T("RTS")}, /* TRAPV */ -{0x4E76, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,{{0,1},{0,1},{0,1},{0,1},{0,1}}, 4, 0,_T("TRAPV")}, +{0x4E76, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{0,1},{0,1},{0,1},{0,1},{0,1}}, 4, 0,_T("TRAPV")}, /* RTR */ -{0x4E77, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 3, 0,_T("RTR")}, +{0x4E77, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 3, 0,_T("RTR")}, /* MOVEC2 */ -{0x4E7A, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,1,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 16,_T("MOVEC2 #1")}, +{0x4E7A, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,1,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 16,_T("MOVEC2 #1")}, /* MOVE2C */ -{0x4E7B, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,1,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 16,_T("MOVE2C #1")}, +{0x4E7B, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,1,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 16,_T("MOVE2C #1")}, /* JSR.L */ -{0x4E80, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,{{4,6},{4,6},{4,6},{4,6},{4,6}}, 2, 128,_T("JSR.L s[!Dreg,Areg,Aipi,Apdi,Immd]")}, +{0x4E80, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{4,6},{4,6},{4,6},{4,6},{4,6}}, 2, 128,_T("JSR.L s[!Dreg,Areg,Aipi,Apdi,Immd]")}, /* CHK.L */ -{0x4100, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,2,0,{{1,1},{1,0},{1,5},{1,5},{1,5}}, 4, 17,_T("CHK.L s[!Areg],Dr")}, +{0x4100, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,2,0,0,{{1,1},{1,0},{1,5},{1,5},{1,5}}, 4, 17,_T("CHK.L s[!Areg],Dr")}, /* CHK.W */ -{0x4180, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{1,1},{1,0},{1,5},{1,5},{1,5}}, 4, 17,_T("CHK.W s[!Areg],Dr")}, +{0x4180, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,5},{1,5},{1,5}}, 4, 17,_T("CHK.W s[!Areg],Dr")}, /* JMP.L */ -{0x4EC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,{{4,6},{4,6},{4,6},{4,6},{4,6}}, 2, 128,_T("JMP.L s[!Dreg,Areg,Aipi,Apdi,Immd]")}, +{0x4EC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{4,6},{4,6},{4,6},{4,6},{4,6}}, 2, 128,_T("JMP.L s[!Dreg,Areg,Aipi,Apdi,Immd]")}, /* LEA.L */ -{0x41C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 2,_T("LEA.L s[!Dreg,Areg,Aipi,Apdi,Immd],Ar")}, +{0x41C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 2,_T("LEA.L s[!Dreg,Areg,Aipi,Apdi,Immd],Ar")}, /* ADDA.W */ -{0x5040, 9,{ 7, 7, 7,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 19,_T("ADDA.W #j,d[Areg]")}, +{0x5040, 9,{ 7, 7, 7,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 19,_T("ADDA.W #j,d[Areg]")}, /* ADDA.L */ -{0x5080, 9,{ 7, 7, 7,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 19,_T("ADDA.L #j,d[Areg]")}, +{0x5080, 9,{ 7, 7, 7,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 19,_T("ADDA.L #j,d[Areg]")}, /* ADD.z */ -{0x5000,11,{ 7, 7, 7,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("ADD.z #j,d[!Areg]")}, +{0x5000,11,{ 7, 7, 7,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("ADD.z #j,d[!Areg]")}, /* SUBA.W */ -{0x5140, 9,{ 7, 7, 7,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 19,_T("SUBA.W #j,d[Areg]")}, +{0x5140, 9,{ 7, 7, 7,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 19,_T("SUBA.W #j,d[Areg]")}, /* SUBA.L */ -{0x5180, 9,{ 7, 7, 7,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 19,_T("SUBA.L #j,d[Areg]")}, +{0x5180, 9,{ 7, 7, 7,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 19,_T("SUBA.L #j,d[Areg]")}, /* SUB.z */ -{0x5100,11,{ 7, 7, 7,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("SUB.z #j,d[!Areg]")}, +{0x5100,11,{ 7, 7, 7,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("SUB.z #j,d[!Areg]")}, /* DBcc.W */ -{0x50C8, 7,{ 2, 2, 2, 2,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xF0F8,0,0,{{1,1},{2,1},{2,1},{2,1},{2,1}}, 1, 49,_T("DBcc.W Dr,#1")}, +{0x50C8, 7,{ 2, 2, 2, 2,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xF0F8,0,0,0,{{1,1},{2,1},{2,1},{2,1},{2,1}}, 1, 49,_T("DBcc.W Dr,#1")}, /* Scc.B */ -{0x50C0,10,{ 2, 2, 2, 2,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0},0xF0C0,0,0,{{1,1},{2,1},{2,1},{2,1},{2,1}}, 0, 32,_T("Scc.B d[!Areg]")}, +{0x50C0,10,{ 2, 2, 2, 2,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0},0xF0C0,0,0,0,{{1,1},{2,1},{2,1},{2,1},{2,1}}, 0, 32,_T("Scc.B d[!Areg]")}, /* TRAPcc */ -{0x50FA, 4,{ 2, 2, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xF0FF,2,0,{{1,1},{3,1},{3,1},{3,1},{3,1}}, 4, 16,_T("TRAPcc #1")}, +{0x50FA, 4,{ 2, 2, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xF0FF,2,0,0,{{1,1},{3,1},{3,1},{3,1},{3,1}}, 4, 16,_T("TRAPcc #1")}, /* TRAPcc */ -{0x50FB, 4,{ 2, 2, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xF0FF,2,0,{{1,1},{3,1},{3,1},{3,1},{3,1}}, 4, 16,_T("TRAPcc #2")}, +{0x50FB, 4,{ 2, 2, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xF0FF,2,0,0,{{1,1},{3,1},{3,1},{3,1},{3,1}}, 4, 16,_T("TRAPcc #2")}, /* TRAPcc */ -{0x50FC, 4,{ 2, 2, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xF0FF,2,0,{{1,1},{3,1},{3,1},{3,1},{3,1}}, 4, 0,_T("TRAPcc")}, +{0x50FC, 4,{ 2, 2, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xF0FF,2,0,0,{{1,1},{3,1},{3,1},{3,1},{3,1}}, 4, 0,_T("TRAPcc")}, /* BSR.W */ -{0x6100, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,{{4,6},{4,6},{4,6},{4,6},{4,6}}, 1, 64,_T("BSR.W #1")}, +{0x6100, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{4,6},{4,6},{4,6},{4,6},{4,6}}, 1, 64,_T("BSR.W #1")}, /* BSR.B */ -{0x6100, 8,{ 6, 6, 6, 6, 6, 6, 6, 6, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,{{4,6},{4,6},{4,6},{4,6},{4,6}}, 1, 64,_T("BSR.B #i")}, +{0x6100, 8,{ 6, 6, 6, 6, 6, 6, 6, 6, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{4,6},{4,6},{4,6},{4,6},{4,6}}, 1, 64,_T("BSR.B #i")}, /* BSR.L */ -{0x61FF, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,{{4,6},{4,6},{4,6},{4,6},{4,6}}, 1, 64,_T("BSR.L #2")}, +{0x61FF, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{4,6},{4,6},{4,6},{4,6},{4,6}}, 1, 64,_T("BSR.L #2")}, /* Bcc.W */ -{0x6000, 4,{ 3, 3, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xF0FF,0,0,{{1,1},{2,1},{2,1},{2,1},{2,1}}, 1, 64,_T("Bcc.W #1")}, +{0x6000, 4,{ 3, 3, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xF0FF,0,0,0,{{1,1},{2,1},{2,1},{2,1},{2,1}}, 1, 64,_T("Bcc.W #1")}, /* Bcc.B */ -{0x6000,12,{ 3, 3, 3, 3, 6, 6, 6, 6, 6, 6, 6, 6, 0, 0, 0, 0},0xF000,0,0,{{1,1},{2,1},{2,1},{2,1},{2,1}}, 1, 64,_T("Bcc.B #i")}, +{0x6000,12,{ 3, 3, 3, 3, 6, 6, 6, 6, 6, 6, 6, 6, 0, 0, 0, 0},0xF000,0,0,0,{{1,1},{2,1},{2,1},{2,1},{2,1}}, 1, 64,_T("Bcc.B #i")}, /* Bcc.L */ -{0x60FF, 4,{ 3, 3, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xF0FF,0,0,{{1,1},{2,1},{2,1},{2,1},{2,1}}, 1, 64,_T("Bcc.L #2")}, +{0x60FF, 4,{ 3, 3, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xF0FF,0,0,0,{{1,1},{2,1},{2,1},{2,1},{2,1}}, 1, 64,_T("Bcc.L #2")}, /* MOVE.L */ -{0x7000,11,{15,15,15, 5, 5, 5, 5, 5, 5, 5, 5, 0, 0, 0, 0, 0},0xF100,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 18,_T("MOVE.L #i,Dr")}, +{0x7000,11,{15,15,15, 5, 5, 5, 5, 5, 5, 5, 5, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 18,_T("MOVE.L #i,Dr")}, /* OR.z */ -{0x8000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("OR.z s[!Areg],Dr")}, +{0x8000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("OR.z s[!Areg],Dr")}, /* DIVU.W */ -{0x80C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,2}}, 4, 19,_T("DIVU.W s[!Areg],Dr")}, +{0x80C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,2}}, 4, 19,_T("DIVU.W s[!Areg],Dr")}, /* SBCD.B */ -{0x8100, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{0,0},{1,5},{0,0},{1,5},{1,0}}, 0, 19,_T("SBCD.B d[Dreg],Dr")}, +{0x8100, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{0,0},{1,5},{0,0},{1,5},{1,0}}, 0, 19,_T("SBCD.B d[Dreg],Dr")}, /* SBCD.B */ -{0x8100, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{0,0},{1,5},{0,0},{1,5},{1,0}}, 0, 19,_T("SBCD.B d[Areg-Apdi],Arp")}, +{0x8100, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{0,0},{1,5},{0,0},{1,5},{1,0}}, 0, 19,_T("SBCD.B d[Areg-Apdi],Arp")}, /* OR.z */ -{0x8100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("OR.z Dr,d[!Areg,Dreg]")}, +{0x8100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("OR.z Dr,d[!Areg,Dreg]")}, /* PACK */ -{0x8140, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,2,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("PACK d[Dreg],Dr")}, +{0x8140, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("PACK d[Dreg],Dr")}, /* PACK */ -{0x8140, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,2,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("PACK d[Areg-Apdi],Arp")}, +{0x8140, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("PACK d[Areg-Apdi],Arp")}, /* UNPK */ -{0x8180, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,2,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("UNPK d[Dreg],Dr")}, +{0x8180, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("UNPK d[Dreg],Dr")}, /* UNPK */ -{0x8180, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,2,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("UNPK d[Areg-Apdi],Arp")}, +{0x8180, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("UNPK d[Areg-Apdi],Arp")}, /* DIVS.W */ -{0x81C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,2}}, 4, 19,_T("DIVS.W s[!Areg],Dr")}, +{0x81C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,2}}, 4, 19,_T("DIVS.W s[!Areg],Dr")}, /* SUB.z */ -{0x9000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("SUB.z s,Dr")}, +{0x9000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("SUB.z s,Dr")}, /* SUBA.W */ -{0x90C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 19,_T("SUBA.W s,Ar")}, +{0x90C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 19,_T("SUBA.W s,Ar")}, /* SUBX.z */ -{0x9100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,{{0,0},{1,0},{0,0},{1,0},{1,0}}, 0, 19,_T("SUBX.z d[Dreg],Dr")}, +{0x9100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{0,0},{1,0},{0,0},{1,0},{1,0}}, 0, 19,_T("SUBX.z d[Dreg],Dr")}, /* SUBX.z */ -{0x9100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,{{0,0},{1,0},{0,0},{1,0},{1,0}}, 0, 19,_T("SUBX.z d[Areg-Apdi],Arp")}, +{0x9100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{0,0},{1,0},{0,0},{1,0},{1,0}}, 0, 19,_T("SUBX.z d[Areg-Apdi],Arp")}, /* SUB.z */ -{0x9100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("SUB.z Dr,d[!Areg,Dreg]")}, +{0x9100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("SUB.z Dr,d[!Areg,Dreg]")}, /* SUBA.L */ -{0x91C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 19,_T("SUBA.L s,Ar")}, +{0x91C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 19,_T("SUBA.L s,Ar")}, /* CMP.z */ -{0xB000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 17,_T("CMP.z s,Dr")}, +{0xB000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 17,_T("CMP.z s,Dr")}, /* CMPA.W */ -{0xB0C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 17,_T("CMPA.W s,Ar")}, +{0xB0C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 17,_T("CMPA.W s,Ar")}, /* CMPA.L */ -{0xB1C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 17,_T("CMPA.L s,Ar")}, +{0xB1C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 17,_T("CMPA.L s,Ar")}, /* CMPM.z */ -{0xB100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 17,_T("CMPM.z d[Areg-Aipi],ArP")}, +{0xB100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 17,_T("CMPM.z d[Areg-Aipi],ArP")}, /* EOR.z */ -{0xB100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("EOR.z Dr,d[!Areg]")}, +{0xB100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("EOR.z Dr,d[!Areg]")}, /* AND.z */ -{0xC000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("AND.z s[!Areg],Dr")}, +{0xC000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("AND.z s[!Areg],Dr")}, /* MULU.W */ -{0xC0C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("MULU.W s[!Areg],Dr")}, +{0xC0C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("MULU.W s[!Areg],Dr")}, /* ABCD.B */ -{0xC100, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{0,0},{1,5},{0,0},{1,5},{1,0}}, 0, 19,_T("ABCD.B d[Dreg],Dr")}, +{0xC100, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{0,0},{1,5},{0,0},{1,5},{1,0}}, 0, 19,_T("ABCD.B d[Dreg],Dr")}, /* ABCD.B */ -{0xC100, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{0,0},{1,5},{0,0},{1,5},{1,0}}, 0, 19,_T("ABCD.B d[Areg-Apdi],Arp")}, +{0xC100, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{0,0},{1,5},{0,0},{1,5},{1,0}}, 0, 19,_T("ABCD.B d[Areg-Apdi],Arp")}, /* AND.z */ -{0xC100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("AND.z Dr,d[!Areg,Dreg]")}, +{0xC100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("AND.z Dr,d[!Areg,Dreg]")}, /* EXG.L */ -{0xC140, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 51,_T("EXG.L Dr,d[Dreg]")}, +{0xC140, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 51,_T("EXG.L Dr,d[Dreg]")}, /* EXG.L */ -{0xC140, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 51,_T("EXG.L Ar,d[Areg]")}, +{0xC140, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 51,_T("EXG.L Ar,d[Areg]")}, /* EXG.L */ -{0xC180, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 51,_T("EXG.L Dr,d[Areg]")}, +{0xC180, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 51,_T("EXG.L Dr,d[Areg]")}, /* MULS.W */ -{0xC1C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("MULS.W s[!Areg],Dr")}, +{0xC1C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("MULS.W s[!Areg],Dr")}, /* ADD.z */ -{0xD000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("ADD.z s,Dr")}, +{0xD000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("ADD.z s,Dr")}, /* ADDA.W */ -{0xD0C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 19,_T("ADDA.W s,Ar")}, +{0xD0C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 19,_T("ADDA.W s,Ar")}, /* ADDX.z */ -{0xD100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,{{0,0},{1,0},{0,0},{1,0},{1,0}}, 0, 19,_T("ADDX.z d[Dreg],Dr")}, +{0xD100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{0,0},{1,0},{0,0},{1,0},{1,0}}, 0, 19,_T("ADDX.z d[Dreg],Dr")}, /* ADDX.z */ -{0xD100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,{{0,0},{1,0},{0,0},{1,0},{1,0}}, 0, 19,_T("ADDX.z d[Areg-Apdi],Arp")}, +{0xD100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{0,0},{1,0},{0,0},{1,0},{1,0}}, 0, 19,_T("ADDX.z d[Areg-Apdi],Arp")}, /* ADD.z */ -{0xD100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("ADD.z Dr,d[!Areg,Dreg]")}, +{0xD100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("ADD.z Dr,d[!Areg,Dreg]")}, /* ADDA.L */ -{0xD1C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 19,_T("ADDA.L s,Ar")}, +{0xD1C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 19,_T("ADDA.L s,Ar")}, /* ASf.z */ -{0xE000, 9,{ 7, 7, 7, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("ASf.z #j,DR")}, +{0xE000, 9,{ 7, 7, 7, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("ASf.z #j,DR")}, /* LSf.z */ -{0xE008, 9,{ 7, 7, 7, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,{{1,0},{1,0},{1,0},{1,2},{1,0}}, 0, 19,_T("LSf.z #j,DR")}, +{0xE008, 9,{ 7, 7, 7, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{1,0},{1,0},{1,0},{1,2},{1,0}}, 0, 19,_T("LSf.z #j,DR")}, /* ROXf.z */ -{0xE010, 9,{ 7, 7, 7, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,{{0,0},{1,0},{1,0},{1,2},{1,0}}, 0, 19,_T("ROXf.z #j,DR")}, +{0xE010, 9,{ 7, 7, 7, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{0,0},{1,0},{1,0},{1,2},{1,0}}, 0, 19,_T("ROXf.z #j,DR")}, /* ROf.z */ -{0xE018, 9,{ 7, 7, 7, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,{{1,1},{1,0},{1,0},{1,2},{1,0}}, 0, 19,_T("ROf.z #j,DR")}, +{0xE018, 9,{ 7, 7, 7, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,0}}, 0, 19,_T("ROf.z #j,DR")}, /* ASf.z */ -{0xE020, 9,{15,15,15, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,{{0,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("ASf.z Dr,DR")}, +{0xE020, 9,{15,15,15, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{0,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("ASf.z Dr,DR")}, /* LSf.z */ -{0xE028, 9,{15,15,15, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,{{0,0},{1,0},{1,0},{1,2},{1,0}}, 0, 19,_T("LSf.z Dr,DR")}, +{0xE028, 9,{15,15,15, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{0,0},{1,0},{1,0},{1,2},{1,0}}, 0, 19,_T("LSf.z Dr,DR")}, /* ROXf.z */ -{0xE030, 9,{15,15,15, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,{{0,0},{1,0},{1,0},{1,2},{1,0}}, 0, 19,_T("ROXf.z Dr,DR")}, +{0xE030, 9,{15,15,15, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{0,0},{1,0},{1,0},{1,2},{1,0}}, 0, 19,_T("ROXf.z Dr,DR")}, /* ROf.z */ -{0xE038, 9,{15,15,15, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,{{1,1},{1,0},{1,0},{1,2},{1,0}}, 0, 19,_T("ROf.z Dr,DR")}, +{0xE038, 9,{15,15,15, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,0}}, 0, 19,_T("ROf.z Dr,DR")}, /* ASfW.W */ -{0xE0C0, 7,{ 4,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFEC0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("ASfW.W d[!Dreg,Areg]")}, +{0xE0C0, 7,{ 4,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFEC0,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("ASfW.W d[!Dreg,Areg]")}, /* LSfW.W */ -{0xE2C0, 7,{ 4,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFEC0,0,0,{{1,0},{1,0},{1,0},{1,2},{1,0}}, 0, 19,_T("LSfW.W d[!Dreg,Areg]")}, +{0xE2C0, 7,{ 4,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFEC0,0,0,0,{{1,0},{1,0},{1,0},{1,2},{1,0}}, 0, 19,_T("LSfW.W d[!Dreg,Areg]")}, /* ROXfW.W */ -{0xE4C0, 7,{ 4,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFEC0,0,0,{{0,0},{1,0},{1,0},{1,2},{1,0}}, 0, 19,_T("ROXfW.W d[!Dreg,Areg]")}, +{0xE4C0, 7,{ 4,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFEC0,0,0,0,{{0,0},{1,0},{1,0},{1,2},{1,0}}, 0, 19,_T("ROXfW.W d[!Dreg,Areg]")}, /* ROfW.W */ -{0xE6C0, 7,{ 4,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFEC0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,0}}, 0, 19,_T("ROfW.W d[!Dreg,Areg]")}, +{0xE6C0, 7,{ 4,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFEC0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,0}}, 0, 19,_T("ROfW.W d[!Dreg,Areg]")}, /* BFTST */ -{0xE8C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 17,_T("BFTST #1,s[!Areg,Apdi,Aipi,Immd]")}, +{0xE8C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 17,_T("BFTST #1,s[!Areg,Apdi,Aipi,Immd]")}, /* BFEXTU */ -{0xE9C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 17,_T("BFEXTU #1,s[!Areg,Apdi,Aipi,Immd]")}, +{0xE9C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 17,_T("BFEXTU #1,s[!Areg,Apdi,Aipi,Immd]")}, /* BFCHG */ -{0xEAC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("BFCHG #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16]")}, +{0xEAC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("BFCHG #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16]")}, /* BFEXTS */ -{0xEBC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 17,_T("BFEXTS #1,s[!Areg,Apdi,Aipi,Immd]")}, +{0xEBC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 17,_T("BFEXTS #1,s[!Areg,Apdi,Aipi,Immd]")}, /* BFCLR */ -{0xECC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("BFCLR #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16]")}, +{0xECC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("BFCLR #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16]")}, /* BFFFO */ -{0xEDC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 17,_T("BFFFO #1,s[!Areg,Apdi,Aipi,Immd]")}, +{0xEDC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 17,_T("BFFFO #1,s[!Areg,Apdi,Aipi,Immd]")}, /* BFSET */ -{0xEEC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("BFSET #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16]")}, +{0xEEC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("BFSET #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16]")}, /* BFINS */ -{0xEFC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("BFINS #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16]")}, +{0xEFC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("BFINS #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16]")}, /* FPP */ -{0xF200, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 17,_T("FPP #1,s")}, +{0xF200, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 17,_T("FPP #1,s")}, /* FDBcc */ -{0xF240, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 1, 17,_T("FDBcc #1,s[Areg-Dreg]")}, +{0xF240, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 1, 17,_T("FDBcc #1,s[Areg-Dreg]")}, /* FScc */ -{0xF240, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 17,_T("FScc #1,s[!Areg,Immd,PC8r,PC16]")}, +{0xF240, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 17,_T("FScc #1,s[!Areg,Immd,PC8r,PC16]")}, /* FTRAPcc */ -{0xF27A, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,2,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 16,_T("FTRAPcc #1")}, +{0xF27A, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 16,_T("FTRAPcc #1")}, /* FTRAPcc */ -{0xF27B, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,2,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 16,_T("FTRAPcc #2")}, +{0xF27B, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 16,_T("FTRAPcc #2")}, /* FTRAPcc */ -{0xF27C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,2,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("FTRAPcc")}, +{0xF27C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("FTRAPcc")}, /* FBcc */ -{0xF280, 6,{10,10,10,10,10,10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 1, 17,_T("FBcc #K,#1")}, +{0xF280, 6,{10,10,10,10,10,10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 1, 17,_T("FBcc #K,#1")}, /* FBcc */ -{0xF2C0, 6,{10,10,10,10,10,10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 1, 17,_T("FBcc #K,#2")}, +{0xF2C0, 6,{10,10,10,10,10,10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 1, 17,_T("FBcc #K,#2")}, /* FSAVE */ -{0xF300, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 32,_T("FSAVE s[!Dreg,Areg,Aipi,Immd,PC8r,PC16]")}, +{0xF300, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 32,_T("FSAVE s[!Dreg,Areg,Aipi,Immd,PC8r,PC16]")}, /* FRESTORE */ -{0xF340, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 16,_T("FRESTORE s[!Dreg,Areg,Apdi,Immd]")}, +{0xF340, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 16,_T("FRESTORE s[!Dreg,Areg,Apdi,Immd]")}, /* MMUOP030 */ -{0xF000, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,3,2,{{3,5},{3,5},{3,5},{3,5},{3,5}}, 4, 17,_T("MMUOP030 s[Aind,Ad16,Ad8r,absl,absw],#1")}, +{0xF000, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,3,4,2,{{3,5},{3,5},{3,5},{3,5},{3,5}}, 4, 17,_T("MMUOP030 s[Dreg,Areg,Apdi,Aipi,Aind,Ad16,Ad8r,absl,absw],#1")}, /* CINVL */ -{0xF408, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 2,_T("CINVL #p,Ar")}, +{0xF408, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 2,_T("CINVL #p,Ar")}, /* CINVP */ -{0xF410, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 2,_T("CINVP #p,Ar")}, +{0xF410, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 2,_T("CINVP #p,Ar")}, /* CINVA */ -{0xF418, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("CINVA #p")}, +{0xF418, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("CINVA #p")}, /* CPUSHL */ -{0xF428, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 2,_T("CPUSHL #p,Ar")}, +{0xF428, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 2,_T("CPUSHL #p,Ar")}, /* CPUSHP */ -{0xF430, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 2,_T("CPUSHP #p,Ar")}, +{0xF430, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 2,_T("CPUSHP #p,Ar")}, /* CPUSHA */ -{0xF438, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("CPUSHA #p")}, +{0xF438, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("CPUSHA #p")}, /* PFLUSHN */ -{0xF500, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("PFLUSHN Ara")}, +{0xF500, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("PFLUSHN Ara")}, /* PFLUSH */ -{0xF508, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("PFLUSH Ara")}, +{0xF508, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("PFLUSH Ara")}, /* PFLUSHAN */ -{0xF510, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("PFLUSHAN Ara")}, +{0xF510, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("PFLUSHAN Ara")}, /* PFLUSHA */ -{0xF518, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("PFLUSHA Ara")}, +{0xF518, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("PFLUSHA Ara")}, /* PTESTR */ -{0xF548, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("PTESTR Ara")}, +{0xF548, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,5,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("PTESTR Ara")}, /* PTESTW */ -{0xF568, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("PTESTW Ara")}, +{0xF568, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,5,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("PTESTW Ara")}, /* MOVE16 */ -{0xF620, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MOVE16 ArP,AxP")}, +{0xF620, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MOVE16 ArP,AxP")}, /* MOVE16 */ -{0xF600, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,4,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MOVE16 s[Dreg-Aipi],Al")}, +{0xF600, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,4,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MOVE16 s[Dreg-Aipi],Al")}, /* MOVE16 */ -{0xF600, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,4,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MOVE16 Al,d[Areg-Aipi]")}, +{0xF600, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,4,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MOVE16 Al,d[Areg-Aipi]")}, /* MOVE16 */ -{0xF600, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,4,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MOVE16 s[Aind],Al")}, +{0xF600, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,4,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MOVE16 s[Aind],Al")}, /* MOVE16 */ -{0xF600, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,4,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MOVE16 Al,d[Aipi-Aind]")}, +{0xF600, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,4,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MOVE16 Al,d[Aipi-Aind]")}, /* LPSTOP */ -{0xF800, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,5,2,{{3,5},{3,5},{3,5},{3,5},{3,5}}, 4, 16,_T("LPSTOP #1")}, +{0xF800, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,5,0,2,{{3,5},{3,5},{3,5},{3,5},{3,5}}, 4, 16,_T("LPSTOP #1")}, /* PLPAR */ -{0xF588, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,5,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("PLPAR Ara")}, +{0xF588, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,5,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("PLPAR Ara")}, /* PLPAW */ -{0xF5C8, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,5,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("PLPAW Ara")}}; -int n_defs68k = 188; +{0xF5C8, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,5,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("PLPAW Ara")}}; +int n_defs68k = 190; diff --git a/src/cpuemu_0.cpp b/src/cpuemu_0.cpp index bc9e8cbc..12e93490 100644 --- a/src/cpuemu_0.cpp +++ b/src/cpuemu_0.cpp @@ -117,7 +117,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_0030_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s8 src = get_ibyte (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s8 dst = get_byte (dsta); src |= dst; CLEAR_CZNV (); @@ -263,7 +263,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_0070_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s16 dst = get_word (dsta); src |= dst; CLEAR_CZNV (); @@ -308,7 +308,7 @@ return 16 * CYCLE_UNIT / 2; /* ORSR.W #.W */ uae_u32 REGPARAM2 CPUFUNC(op_007c_0)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { MakeSR (regs); { uae_s16 src = get_iword (2); regs.sr |= src; @@ -415,7 +415,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_00b0_0)(uae_u32 opcode, struct regstruct ®s) src = get_ilong (2); { uaecptr dsta; m68k_incpc (6); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s32 dst = get_long (dsta); src |= dst; CLEAR_CZNV (); @@ -471,7 +471,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_00d0_0)(uae_u32 opcode, struct regstruct ®s) if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; SET_ZFLG (upper == reg || lower == reg); SET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); - if ((extra & 0x800) && GET_CFLG ()) { Exception (6, regs); + if ((extra & 0x800) && GET_CFLG ()) { Exception (6); return 8 * CYCLE_UNIT / 2; } } @@ -491,7 +491,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_00e8_0)(uae_u32 opcode, struct regstruct ®s) if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; SET_ZFLG (upper == reg || lower == reg); SET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); - if ((extra & 0x800) && GET_CFLG ()) { Exception (6, regs); + if ((extra & 0x800) && GET_CFLG ()) { Exception (6); return 12 * CYCLE_UNIT / 2; } } @@ -506,13 +506,13 @@ uae_u32 REGPARAM2 CPUFUNC(op_00f0_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 extra = get_iword (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); {uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; lower = (uae_s32)(uae_s8)get_byte (dsta); upper = (uae_s32)(uae_s8)get_byte (dsta + 1); if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; SET_ZFLG (upper == reg || lower == reg); SET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); - if ((extra & 0x800) && GET_CFLG ()) { Exception (6, regs); + if ((extra & 0x800) && GET_CFLG ()) { Exception (6); return 8 * CYCLE_UNIT / 2; } } @@ -530,7 +530,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_00f8_0)(uae_u32 opcode, struct regstruct ®s) if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; SET_ZFLG (upper == reg || lower == reg); SET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); - if ((extra & 0x800) && GET_CFLG ()) { Exception (6, regs); + if ((extra & 0x800) && GET_CFLG ()) { Exception (6); return 12 * CYCLE_UNIT / 2; } } @@ -549,7 +549,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_00f9_0)(uae_u32 opcode, struct regstruct ®s) if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; SET_ZFLG (upper == reg || lower == reg); SET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); - if ((extra & 0x800) && GET_CFLG ()) { Exception (6, regs); + if ((extra & 0x800) && GET_CFLG ()) { Exception (6); return 16 * CYCLE_UNIT / 2; } } @@ -563,14 +563,14 @@ uae_u32 REGPARAM2 CPUFUNC(op_00fa_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = 2; {{ uae_s16 extra = get_iword (2); { uaecptr dsta; - dsta = m68k_getpc (regs) + 4; + dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword (4); {uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; lower = (uae_s32)(uae_s8)get_byte (dsta); upper = (uae_s32)(uae_s8)get_byte (dsta + 1); if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; SET_ZFLG (upper == reg || lower == reg); SET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); - if ((extra & 0x800) && GET_CFLG ()) { Exception (6, regs); + if ((extra & 0x800) && GET_CFLG ()) { Exception (6); return 12 * CYCLE_UNIT / 2; } } @@ -586,14 +586,14 @@ uae_u32 REGPARAM2 CPUFUNC(op_00fb_0)(uae_u32 opcode, struct regstruct ®s) { uaecptr tmppc; uaecptr dsta; m68k_incpc (4); -{ tmppc = m68k_getpc (regs); - dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + dsta = get_disp_ea_020 (tmppc, next_iword (regs)); {uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; lower = (uae_s32)(uae_s8)get_byte (dsta); upper = (uae_s32)(uae_s8)get_byte (dsta + 1); if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; SET_ZFLG (upper == reg || lower == reg); SET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); - if ((extra & 0x800) && GET_CFLG ()) { Exception (6, regs); + if ((extra & 0x800) && GET_CFLG ()) { Exception (6); return 8 * CYCLE_UNIT / 2; } } @@ -695,7 +695,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_0130_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s8 src = m68k_dreg (regs, srcreg); { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s8 dst = get_byte (dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); @@ -737,7 +737,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_013a_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = 2; {{ uae_s8 src = m68k_dreg (regs, srcreg); { uaecptr dsta; - dsta = m68k_getpc (regs) + 2; + dsta = m68k_getpc () + 2; dsta += (uae_s32)(uae_s16)get_iword (2); { uae_s8 dst = get_byte (dsta); src &= 7; @@ -755,8 +755,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_013b_0)(uae_u32 opcode, struct regstruct ®s) { uaecptr tmppc; uaecptr dsta; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + dsta = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s8 dst = get_byte (dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); @@ -881,7 +881,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_0170_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s8 src = m68k_dreg (regs, srcreg); { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s8 dst = get_byte (dsta); src &= 7; dst ^= (1 << src); @@ -1028,7 +1028,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_01b0_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s8 src = m68k_dreg (regs, srcreg); { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s8 dst = get_byte (dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); @@ -1177,7 +1177,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_01f0_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s8 src = m68k_dreg (regs, srcreg); { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s8 dst = get_byte (dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); @@ -1310,7 +1310,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_0230_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s8 src = get_ibyte (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s8 dst = get_byte (dsta); src &= dst; CLEAR_CZNV (); @@ -1456,7 +1456,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_0270_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s16 dst = get_word (dsta); src &= dst; CLEAR_CZNV (); @@ -1501,7 +1501,7 @@ return 16 * CYCLE_UNIT / 2; /* ANDSR.W #.W */ uae_u32 REGPARAM2 CPUFUNC(op_027c_0)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { MakeSR (regs); { uae_s16 src = get_iword (2); regs.sr &= src; @@ -1608,7 +1608,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_02b0_0)(uae_u32 opcode, struct regstruct ®s) src = get_ilong (2); { uaecptr dsta; m68k_incpc (6); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s32 dst = get_long (dsta); src &= dst; CLEAR_CZNV (); @@ -1664,7 +1664,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_02d0_0)(uae_u32 opcode, struct regstruct ®s) if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; SET_ZFLG (upper == reg || lower == reg); SET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); - if ((extra & 0x800) && GET_CFLG ()) { Exception (6, regs); + if ((extra & 0x800) && GET_CFLG ()) { Exception (6); return 8 * CYCLE_UNIT / 2; } } @@ -1684,7 +1684,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_02e8_0)(uae_u32 opcode, struct regstruct ®s) if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; SET_ZFLG (upper == reg || lower == reg); SET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); - if ((extra & 0x800) && GET_CFLG ()) { Exception (6, regs); + if ((extra & 0x800) && GET_CFLG ()) { Exception (6); return 12 * CYCLE_UNIT / 2; } } @@ -1699,13 +1699,13 @@ uae_u32 REGPARAM2 CPUFUNC(op_02f0_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 extra = get_iword (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); {uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; lower = (uae_s32)(uae_s16)get_word (dsta); upper = (uae_s32)(uae_s16)get_word (dsta + 2); if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; SET_ZFLG (upper == reg || lower == reg); SET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); - if ((extra & 0x800) && GET_CFLG ()) { Exception (6, regs); + if ((extra & 0x800) && GET_CFLG ()) { Exception (6); return 8 * CYCLE_UNIT / 2; } } @@ -1723,7 +1723,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_02f8_0)(uae_u32 opcode, struct regstruct ®s) if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; SET_ZFLG (upper == reg || lower == reg); SET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); - if ((extra & 0x800) && GET_CFLG ()) { Exception (6, regs); + if ((extra & 0x800) && GET_CFLG ()) { Exception (6); return 12 * CYCLE_UNIT / 2; } } @@ -1742,7 +1742,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_02f9_0)(uae_u32 opcode, struct regstruct ®s) if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; SET_ZFLG (upper == reg || lower == reg); SET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); - if ((extra & 0x800) && GET_CFLG ()) { Exception (6, regs); + if ((extra & 0x800) && GET_CFLG ()) { Exception (6); return 16 * CYCLE_UNIT / 2; } } @@ -1756,14 +1756,14 @@ uae_u32 REGPARAM2 CPUFUNC(op_02fa_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = 2; {{ uae_s16 extra = get_iword (2); { uaecptr dsta; - dsta = m68k_getpc (regs) + 4; + dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword (4); {uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; lower = (uae_s32)(uae_s16)get_word (dsta); upper = (uae_s32)(uae_s16)get_word (dsta + 2); if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; SET_ZFLG (upper == reg || lower == reg); SET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); - if ((extra & 0x800) && GET_CFLG ()) { Exception (6, regs); + if ((extra & 0x800) && GET_CFLG ()) { Exception (6); return 12 * CYCLE_UNIT / 2; } } @@ -1779,14 +1779,14 @@ uae_u32 REGPARAM2 CPUFUNC(op_02fb_0)(uae_u32 opcode, struct regstruct ®s) { uaecptr tmppc; uaecptr dsta; m68k_incpc (4); -{ tmppc = m68k_getpc (regs); - dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + dsta = get_disp_ea_020 (tmppc, next_iword (regs)); {uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; lower = (uae_s32)(uae_s16)get_word (dsta); upper = (uae_s32)(uae_s16)get_word (dsta + 2); if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; SET_ZFLG (upper == reg || lower == reg); SET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); - if ((extra & 0x800) && GET_CFLG ()) { Exception (6, regs); + if ((extra & 0x800) && GET_CFLG ()) { Exception (6); return 8 * CYCLE_UNIT / 2; } } @@ -1910,7 +1910,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_0430_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s8 src = get_ibyte (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s8 dst = get_byte (dsta); {{uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); { int flgs = ((uae_s8)(src)) < 0; @@ -2084,7 +2084,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_0470_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s16 dst = get_word (dsta); {{uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); { int flgs = ((uae_s16)(src)) < 0; @@ -2264,7 +2264,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_04b0_0)(uae_u32 opcode, struct regstruct ®s) src = get_ilong (2); { uaecptr dsta; m68k_incpc (6); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s32 dst = get_long (dsta); {{uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); { int flgs = ((uae_s32)(src)) < 0; @@ -2334,7 +2334,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_04d0_0)(uae_u32 opcode, struct regstruct ®s) lower = get_long (dsta); upper = get_long (dsta + 4); SET_ZFLG (upper == reg || lower == reg); SET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); - if ((extra & 0x800) && GET_CFLG ()) { Exception (6, regs); + if ((extra & 0x800) && GET_CFLG ()) { Exception (6); return 8 * CYCLE_UNIT / 2; } } @@ -2353,7 +2353,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_04e8_0)(uae_u32 opcode, struct regstruct ®s) lower = get_long (dsta); upper = get_long (dsta + 4); SET_ZFLG (upper == reg || lower == reg); SET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); - if ((extra & 0x800) && GET_CFLG ()) { Exception (6, regs); + if ((extra & 0x800) && GET_CFLG ()) { Exception (6); return 12 * CYCLE_UNIT / 2; } } @@ -2368,12 +2368,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_04f0_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 extra = get_iword (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); {uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; lower = get_long (dsta); upper = get_long (dsta + 4); SET_ZFLG (upper == reg || lower == reg); SET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); - if ((extra & 0x800) && GET_CFLG ()) { Exception (6, regs); + if ((extra & 0x800) && GET_CFLG ()) { Exception (6); return 8 * CYCLE_UNIT / 2; } } @@ -2390,7 +2390,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_04f8_0)(uae_u32 opcode, struct regstruct ®s) lower = get_long (dsta); upper = get_long (dsta + 4); SET_ZFLG (upper == reg || lower == reg); SET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); - if ((extra & 0x800) && GET_CFLG ()) { Exception (6, regs); + if ((extra & 0x800) && GET_CFLG ()) { Exception (6); return 12 * CYCLE_UNIT / 2; } } @@ -2408,7 +2408,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_04f9_0)(uae_u32 opcode, struct regstruct ®s) lower = get_long (dsta); upper = get_long (dsta + 4); SET_ZFLG (upper == reg || lower == reg); SET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); - if ((extra & 0x800) && GET_CFLG ()) { Exception (6, regs); + if ((extra & 0x800) && GET_CFLG ()) { Exception (6); return 16 * CYCLE_UNIT / 2; } } @@ -2422,13 +2422,13 @@ uae_u32 REGPARAM2 CPUFUNC(op_04fa_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = 2; {{ uae_s16 extra = get_iword (2); { uaecptr dsta; - dsta = m68k_getpc (regs) + 4; + dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword (4); {uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; lower = get_long (dsta); upper = get_long (dsta + 4); SET_ZFLG (upper == reg || lower == reg); SET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); - if ((extra & 0x800) && GET_CFLG ()) { Exception (6, regs); + if ((extra & 0x800) && GET_CFLG ()) { Exception (6); return 12 * CYCLE_UNIT / 2; } } @@ -2444,13 +2444,13 @@ uae_u32 REGPARAM2 CPUFUNC(op_04fb_0)(uae_u32 opcode, struct regstruct ®s) { uaecptr tmppc; uaecptr dsta; m68k_incpc (4); -{ tmppc = m68k_getpc (regs); - dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + dsta = get_disp_ea_020 (tmppc, next_iword (regs)); {uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; lower = get_long (dsta); upper = get_long (dsta + 4); SET_ZFLG (upper == reg || lower == reg); SET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); - if ((extra & 0x800) && GET_CFLG ()) { Exception (6, regs); + if ((extra & 0x800) && GET_CFLG ()) { Exception (6); return 8 * CYCLE_UNIT / 2; } } @@ -2574,7 +2574,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_0630_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s8 src = get_ibyte (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s8 dst = get_byte (dsta); {{uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); { int flgs = ((uae_s8)(src)) < 0; @@ -2748,7 +2748,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_0670_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s16 dst = get_word (dsta); {{uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); { int flgs = ((uae_s16)(src)) < 0; @@ -2928,7 +2928,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_06b0_0)(uae_u32 opcode, struct regstruct ®s) src = get_ilong (2); { uaecptr dsta; m68k_incpc (6); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s32 dst = get_long (dsta); {{uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); { int flgs = ((uae_s32)(src)) < 0; @@ -2992,7 +2992,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_06c0_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); { m68k_incpc (2); - op_illg (opcode, regs); + op_illg (opcode); }return 4 * CYCLE_UNIT / 2; } @@ -3001,7 +3001,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_06c8_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); { m68k_incpc (2); - op_illg (opcode, regs); + op_illg (opcode); }return 4 * CYCLE_UNIT / 2; } @@ -3010,7 +3010,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_06d0_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); { m68k_incpc (2); - op_illg (opcode, regs); + op_illg (opcode); }return 4 * CYCLE_UNIT / 2; } @@ -3019,7 +3019,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_06e8_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); { m68k_incpc (2); - op_illg (opcode, regs); + op_illg (opcode); }return 4 * CYCLE_UNIT / 2; } @@ -3028,7 +3028,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_06f0_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); { m68k_incpc (2); - op_illg (opcode, regs); + op_illg (opcode); }return 4 * CYCLE_UNIT / 2; } @@ -3036,7 +3036,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_06f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_06f8_0)(uae_u32 opcode, struct regstruct ®s) { { m68k_incpc (2); - op_illg (opcode, regs); + op_illg (opcode); }return 4 * CYCLE_UNIT / 2; } @@ -3044,7 +3044,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_06f8_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_06f9_0)(uae_u32 opcode, struct regstruct ®s) { { m68k_incpc (2); - op_illg (opcode, regs); + op_illg (opcode); }return 4 * CYCLE_UNIT / 2; } @@ -3052,7 +3052,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_06f9_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_06fa_0)(uae_u32 opcode, struct regstruct ®s) { { m68k_incpc (2); - op_illg (opcode, regs); + op_illg (opcode); }return 4 * CYCLE_UNIT / 2; } @@ -3060,7 +3060,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_06fa_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_06fb_0)(uae_u32 opcode, struct regstruct ®s) { { m68k_incpc (2); - op_illg (opcode, regs); + op_illg (opcode); }return 4 * CYCLE_UNIT / 2; } @@ -3141,7 +3141,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_0830_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s8 dst = get_byte (dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); @@ -3180,7 +3180,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_083a_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = 2; {{ uae_s16 src = get_iword (2); { uaecptr dsta; - dsta = m68k_getpc (regs) + 4; + dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword (4); { uae_s8 dst = get_byte (dsta); src &= 7; @@ -3197,8 +3197,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_083b_0)(uae_u32 opcode, struct regstruct ®s) { uaecptr tmppc; uaecptr dsta; m68k_incpc (4); -{ tmppc = m68k_getpc (regs); - dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + dsta = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s8 dst = get_byte (dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); @@ -3303,7 +3303,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_0870_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s8 dst = get_byte (dsta); src &= 7; dst ^= (1 << src); @@ -3429,7 +3429,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_08b0_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s8 dst = get_byte (dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); @@ -3555,7 +3555,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_08f0_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s8 dst = get_byte (dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); @@ -3686,7 +3686,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_0a30_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s8 src = get_ibyte (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s8 dst = get_byte (dsta); src ^= dst; CLEAR_CZNV (); @@ -3832,7 +3832,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_0a70_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s16 dst = get_word (dsta); src ^= dst; CLEAR_CZNV (); @@ -3877,7 +3877,7 @@ return 16 * CYCLE_UNIT / 2; /* EORSR.W #.W */ uae_u32 REGPARAM2 CPUFUNC(op_0a7c_0)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { MakeSR (regs); { uae_s16 src = get_iword (2); regs.sr ^= src; @@ -3984,7 +3984,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_0ab0_0)(uae_u32 opcode, struct regstruct ®s) src = get_ilong (2); { uaecptr dsta; m68k_incpc (6); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s32 dst = get_long (dsta); src ^= dst; CLEAR_CZNV (); @@ -4046,13 +4046,13 @@ uae_u32 REGPARAM2 CPUFUNC(op_0ad0_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(m68k_dreg (regs, rc))) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); + m68k_incpc (4); if (GET_ZFLG ()){ put_byte (dsta, (m68k_dreg (regs, ru))); }else{ put_byte (dsta, dst); m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); -}}}}}}}} m68k_incpc (4); -return 16 * CYCLE_UNIT / 2; +}}}}}}}}return 16 * CYCLE_UNIT / 2; } /* CAS.B #.W,(An)+ */ @@ -4074,13 +4074,13 @@ uae_u32 REGPARAM2 CPUFUNC(op_0ad8_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(m68k_dreg (regs, rc))) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); + m68k_incpc (4); if (GET_ZFLG ()){ put_byte (dsta, (m68k_dreg (regs, ru))); }else{ put_byte (dsta, dst); m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); -}}}}}}}} m68k_incpc (4); -return 18 * CYCLE_UNIT / 2; +}}}}}}}}return 18 * CYCLE_UNIT / 2; } /* CAS.B #.W,-(An) */ @@ -4102,13 +4102,13 @@ uae_u32 REGPARAM2 CPUFUNC(op_0ae0_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(m68k_dreg (regs, rc))) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); + m68k_incpc (4); if (GET_ZFLG ()){ put_byte (dsta, (m68k_dreg (regs, ru))); }else{ put_byte (dsta, dst); m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); -}}}}}}}} m68k_incpc (4); -return 19 * CYCLE_UNIT / 2; +}}}}}}}}return 19 * CYCLE_UNIT / 2; } #endif @@ -4132,13 +4132,13 @@ uae_u32 REGPARAM2 CPUFUNC(op_0ae8_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(m68k_dreg (regs, rc))) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); + m68k_incpc (6); if (GET_ZFLG ()){ put_byte (dsta, (m68k_dreg (regs, ru))); }else{ put_byte (dsta, dst); m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); -}}}}}}}} m68k_incpc (6); -return 26 * CYCLE_UNIT / 2; +}}}}}}}}return 26 * CYCLE_UNIT / 2; } /* CAS.B #.W,(d8,An,Xn) */ @@ -4148,7 +4148,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_0af0_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s8 dst = get_byte (dsta); { int ru = (src >> 6) & 7; int rc = src & 7; @@ -4185,13 +4185,13 @@ uae_u32 REGPARAM2 CPUFUNC(op_0af8_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(m68k_dreg (regs, rc))) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); + m68k_incpc (6); if (GET_ZFLG ()){ put_byte (dsta, (m68k_dreg (regs, ru))); }else{ put_byte (dsta, dst); m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); -}}}}}}}} m68k_incpc (6); -return 18 * CYCLE_UNIT / 2; +}}}}}}}}return 18 * CYCLE_UNIT / 2; } /* CAS.B #.W,(xxx).L */ @@ -4211,13 +4211,13 @@ uae_u32 REGPARAM2 CPUFUNC(op_0af9_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(m68k_dreg (regs, rc))) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); + m68k_incpc (8); if (GET_ZFLG ()){ put_byte (dsta, (m68k_dreg (regs, ru))); }else{ put_byte (dsta, dst); m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff); -}}}}}}}} m68k_incpc (8); -return 19 * CYCLE_UNIT / 2; +}}}}}}}}return 19 * CYCLE_UNIT / 2; } /* CMP.B #.B,Dn */ @@ -4327,7 +4327,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_0c30_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s8 src = get_ibyte (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s8 dst = get_byte (dsta); {{uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); { int flgs = ((uae_s8)(src)) < 0; @@ -4384,7 +4384,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_0c3a_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = 2; {{ uae_s8 src = get_ibyte (2); { uaecptr dsta; - dsta = m68k_getpc (regs) + 4; + dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword (4); { uae_s8 dst = get_byte (dsta); {{uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); @@ -4407,8 +4407,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_0c3b_0)(uae_u32 opcode, struct regstruct ®s) { uaecptr tmppc; uaecptr dsta; m68k_incpc (4); -{ tmppc = m68k_getpc (regs); - dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + dsta = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s8 dst = get_byte (dsta); {{uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); { int flgs = ((uae_s8)(src)) < 0; @@ -4528,7 +4528,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_0c70_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s16 dst = get_word (dsta); {{uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); { int flgs = ((uae_s16)(src)) < 0; @@ -4585,7 +4585,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_0c7a_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = 2; {{ uae_s16 src = get_iword (2); { uaecptr dsta; - dsta = m68k_getpc (regs) + 4; + dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword (4); { uae_s16 dst = get_word (dsta); {{uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); @@ -4608,8 +4608,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_0c7b_0)(uae_u32 opcode, struct regstruct ®s) { uaecptr tmppc; uaecptr dsta; m68k_incpc (4); -{ tmppc = m68k_getpc (regs); - dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + dsta = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s16 dst = get_word (dsta); {{uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); { int flgs = ((uae_s16)(src)) < 0; @@ -4735,7 +4735,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_0cb0_0)(uae_u32 opcode, struct regstruct ®s) src = get_ilong (2); { uaecptr dsta; m68k_incpc (6); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s32 dst = get_long (dsta); {{uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); { int flgs = ((uae_s32)(src)) < 0; @@ -4795,7 +4795,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_0cba_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s32 src; src = get_ilong (2); { uaecptr dsta; - dsta = m68k_getpc (regs) + 6; + dsta = m68k_getpc () + 6; dsta += (uae_s32)(uae_s16)get_iword (6); { uae_s32 dst = get_long (dsta); {{uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); @@ -4819,8 +4819,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_0cbb_0)(uae_u32 opcode, struct regstruct ®s) { uaecptr tmppc; uaecptr dsta; m68k_incpc (6); -{ tmppc = m68k_getpc (regs); - dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + dsta = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s32 dst = get_long (dsta); {{uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); { int flgs = ((uae_s32)(src)) < 0; @@ -4851,13 +4851,13 @@ uae_u32 REGPARAM2 CPUFUNC(op_0cd0_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(m68k_dreg (regs, rc))) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); + m68k_incpc (4); if (GET_ZFLG ()){ put_word (dsta, (m68k_dreg (regs, ru))); }else{ put_word (dsta, dst); m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); -}}}}}}}} m68k_incpc (4); -return 16 * CYCLE_UNIT / 2; +}}}}}}}}return 16 * CYCLE_UNIT / 2; } /* CAS.W #.W,(An)+ */ @@ -4879,13 +4879,13 @@ uae_u32 REGPARAM2 CPUFUNC(op_0cd8_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(m68k_dreg (regs, rc))) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); + m68k_incpc (4); if (GET_ZFLG ()){ put_word (dsta, (m68k_dreg (regs, ru))); }else{ put_word (dsta, dst); m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); -}}}}}}}} m68k_incpc (4); -return 18 * CYCLE_UNIT / 2; +}}}}}}}}return 18 * CYCLE_UNIT / 2; } /* CAS.W #.W,-(An) */ @@ -4907,13 +4907,13 @@ uae_u32 REGPARAM2 CPUFUNC(op_0ce0_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(m68k_dreg (regs, rc))) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); + m68k_incpc (4); if (GET_ZFLG ()){ put_word (dsta, (m68k_dreg (regs, ru))); }else{ put_word (dsta, dst); m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); -}}}}}}}} m68k_incpc (4); -return 19 * CYCLE_UNIT / 2; +}}}}}}}}return 19 * CYCLE_UNIT / 2; } /* CAS.W #.W,(d16,An) */ @@ -4934,13 +4934,13 @@ uae_u32 REGPARAM2 CPUFUNC(op_0ce8_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(m68k_dreg (regs, rc))) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); + m68k_incpc (6); if (GET_ZFLG ()){ put_word (dsta, (m68k_dreg (regs, ru))); }else{ put_word (dsta, dst); m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); -}}}}}}}} m68k_incpc (6); -return 26 * CYCLE_UNIT / 2; +}}}}}}}}return 26 * CYCLE_UNIT / 2; } /* CAS.W #.W,(d8,An,Xn) */ @@ -4950,7 +4950,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_0cf0_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s16 dst = get_word (dsta); { int ru = (src >> 6) & 7; int rc = src & 7; @@ -4987,13 +4987,13 @@ uae_u32 REGPARAM2 CPUFUNC(op_0cf8_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(m68k_dreg (regs, rc))) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); + m68k_incpc (6); if (GET_ZFLG ()){ put_word (dsta, (m68k_dreg (regs, ru))); }else{ put_word (dsta, dst); m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); -}}}}}}}} m68k_incpc (6); -return 18 * CYCLE_UNIT / 2; +}}}}}}}}return 18 * CYCLE_UNIT / 2; } /* CAS.W #.W,(xxx).L */ @@ -5013,13 +5013,13 @@ uae_u32 REGPARAM2 CPUFUNC(op_0cf9_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(m68k_dreg (regs, rc))) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); + m68k_incpc (8); if (GET_ZFLG ()){ put_word (dsta, (m68k_dreg (regs, ru))); }else{ put_word (dsta, dst); m68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff); -}}}}}}}} m68k_incpc (8); -return 19 * CYCLE_UNIT / 2; +}}}}}}}}return 19 * CYCLE_UNIT / 2; } /* CAS2.W #.L */ @@ -5063,7 +5063,7 @@ return 25 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_0e10_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = opcode & 7; -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 extra = get_iword (2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; @@ -5086,7 +5086,7 @@ return 10 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_0e18_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = opcode & 7; -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 extra = get_iword (2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; @@ -5111,7 +5111,7 @@ return 12 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_0e20_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = opcode & 7; -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 extra = get_iword (2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; @@ -5136,7 +5136,7 @@ return 12 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_0e28_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = opcode & 7; -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 extra = get_iword (2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; @@ -5159,17 +5159,17 @@ return 20 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_0e30_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = opcode & 7; -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 extra = get_iword (2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); put_byte (dsta,src); }}}else{{ uaecptr srca; m68k_incpc (4); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s8 src = get_byte (srca); if (extra & 0x8000) { m68k_areg (regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; @@ -5182,7 +5182,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_0e30_0)(uae_u32 opcode, struct regstruct ®s) /* MOVES.B #.W,(xxx).W */ uae_u32 REGPARAM2 CPUFUNC(op_0e38_0)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 extra = get_iword (2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; @@ -5204,7 +5204,7 @@ return 12 * CYCLE_UNIT / 2; /* MOVES.B #.W,(xxx).L */ uae_u32 REGPARAM2 CPUFUNC(op_0e39_0)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 extra = get_iword (2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; @@ -5227,7 +5227,7 @@ return 13 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_0e50_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = opcode & 7; -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 extra = get_iword (2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; @@ -5250,7 +5250,7 @@ return 10 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_0e58_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = opcode & 7; -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 extra = get_iword (2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; @@ -5275,7 +5275,7 @@ return 12 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_0e60_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = opcode & 7; -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 extra = get_iword (2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; @@ -5300,7 +5300,7 @@ return 12 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_0e68_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = opcode & 7; -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 extra = get_iword (2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; @@ -5323,17 +5323,17 @@ return 20 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_0e70_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = opcode & 7; -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 extra = get_iword (2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); put_word (dsta,src); }}}else{{ uaecptr srca; m68k_incpc (4); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s16 src = get_word (srca); if (extra & 0x8000) { m68k_areg (regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; @@ -5346,7 +5346,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_0e70_0)(uae_u32 opcode, struct regstruct ®s) /* MOVES.W #.W,(xxx).W */ uae_u32 REGPARAM2 CPUFUNC(op_0e78_0)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 extra = get_iword (2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; @@ -5368,7 +5368,7 @@ return 12 * CYCLE_UNIT / 2; /* MOVES.W #.W,(xxx).L */ uae_u32 REGPARAM2 CPUFUNC(op_0e79_0)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 extra = get_iword (2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; @@ -5391,7 +5391,7 @@ return 13 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_0e90_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = opcode & 7; -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 extra = get_iword (2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; @@ -5414,7 +5414,7 @@ return 10 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_0e98_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = opcode & 7; -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 extra = get_iword (2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; @@ -5439,7 +5439,7 @@ return 12 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_0ea0_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = opcode & 7; -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 extra = get_iword (2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; @@ -5464,7 +5464,7 @@ return 12 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_0ea8_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = opcode & 7; -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 extra = get_iword (2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; @@ -5487,17 +5487,17 @@ return 20 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_0eb0_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = opcode & 7; -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 extra = get_iword (2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); put_long (dsta,src); }}}else{{ uaecptr srca; m68k_incpc (4); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s32 src = get_long (srca); if (extra & 0x8000) { m68k_areg (regs, (extra >> 12) & 7) = src; @@ -5510,7 +5510,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_0eb0_0)(uae_u32 opcode, struct regstruct ®s) /* MOVES.L #.W,(xxx).W */ uae_u32 REGPARAM2 CPUFUNC(op_0eb8_0)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 extra = get_iword (2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; @@ -5532,7 +5532,7 @@ return 12 * CYCLE_UNIT / 2; /* MOVES.L #.W,(xxx).L */ uae_u32 REGPARAM2 CPUFUNC(op_0eb9_0)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 extra = get_iword (2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; @@ -5569,13 +5569,13 @@ uae_u32 REGPARAM2 CPUFUNC(op_0ed0_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(m68k_dreg (regs, rc))) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); + m68k_incpc (4); if (GET_ZFLG ()){ put_long (dsta, (m68k_dreg (regs, ru))); }else{ put_long (dsta, dst); m68k_dreg(regs, rc) = dst; -}}}}}}}} m68k_incpc (4); -return 16 * CYCLE_UNIT / 2; +}}}}}}}}return 16 * CYCLE_UNIT / 2; } /* CAS.L #.W,(An)+ */ @@ -5597,13 +5597,13 @@ uae_u32 REGPARAM2 CPUFUNC(op_0ed8_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(m68k_dreg (regs, rc))) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); + m68k_incpc (4); if (GET_ZFLG ()){ put_long (dsta, (m68k_dreg (regs, ru))); }else{ put_long (dsta, dst); m68k_dreg(regs, rc) = dst; -}}}}}}}} m68k_incpc (4); -return 18 * CYCLE_UNIT / 2; +}}}}}}}}return 18 * CYCLE_UNIT / 2; } /* CAS.L #.W,-(An) */ @@ -5625,13 +5625,13 @@ uae_u32 REGPARAM2 CPUFUNC(op_0ee0_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(m68k_dreg (regs, rc))) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); + m68k_incpc (4); if (GET_ZFLG ()){ put_long (dsta, (m68k_dreg (regs, ru))); }else{ put_long (dsta, dst); m68k_dreg(regs, rc) = dst; -}}}}}}}} m68k_incpc (4); -return 19 * CYCLE_UNIT / 2; +}}}}}}}}return 19 * CYCLE_UNIT / 2; } /* CAS.L #.W,(d16,An) */ @@ -5652,13 +5652,13 @@ uae_u32 REGPARAM2 CPUFUNC(op_0ee8_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(m68k_dreg (regs, rc))) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); + m68k_incpc (6); if (GET_ZFLG ()){ put_long (dsta, (m68k_dreg (regs, ru))); }else{ put_long (dsta, dst); m68k_dreg(regs, rc) = dst; -}}}}}}}} m68k_incpc (6); -return 26 * CYCLE_UNIT / 2; +}}}}}}}}return 26 * CYCLE_UNIT / 2; } /* CAS.L #.W,(d8,An,Xn) */ @@ -5668,7 +5668,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_0ef0_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s32 dst = get_long (dsta); { int ru = (src >> 6) & 7; int rc = src & 7; @@ -5705,13 +5705,13 @@ uae_u32 REGPARAM2 CPUFUNC(op_0ef8_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(m68k_dreg (regs, rc))) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); + m68k_incpc (6); if (GET_ZFLG ()){ put_long (dsta, (m68k_dreg (regs, ru))); }else{ put_long (dsta, dst); m68k_dreg(regs, rc) = dst; -}}}}}}}} m68k_incpc (6); -return 18 * CYCLE_UNIT / 2; +}}}}}}}}return 18 * CYCLE_UNIT / 2; } /* CAS.L #.W,(xxx).L */ @@ -5731,13 +5731,13 @@ uae_u32 REGPARAM2 CPUFUNC(op_0ef9_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(m68k_dreg (regs, rc))) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); + m68k_incpc (8); if (GET_ZFLG ()){ put_long (dsta, (m68k_dreg (regs, ru))); }else{ put_long (dsta, dst); m68k_dreg(regs, rc) = dst; -}}}}}}}} m68k_incpc (8); -return 19 * CYCLE_UNIT / 2; +}}}}}}}}return 19 * CYCLE_UNIT / 2; } /* CAS2.L #.L */ @@ -5864,7 +5864,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_1030_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s8 src = get_byte (srca); { CLEAR_CZNV (); SET_ZFLG (((uae_s8)(src)) == 0); @@ -5908,7 +5908,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_103a_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s8 src = get_byte (srca); { CLEAR_CZNV (); @@ -5926,8 +5926,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_103b_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s8 src = get_byte (srca); { CLEAR_CZNV (); SET_ZFLG (((uae_s8)(src)) == 0); @@ -6046,7 +6046,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_10b0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s8 src = get_byte (srca); { uaecptr dsta; dsta = m68k_areg (regs, dstreg); @@ -6096,7 +6096,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_10ba_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -6116,8 +6116,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_10bb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s8 src = get_byte (srca); { uaecptr dsta; dsta = m68k_areg (regs, dstreg); @@ -6245,7 +6245,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_10f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s8 src = get_byte (srca); { uaecptr dsta; dsta = m68k_areg (regs, dstreg); @@ -6298,7 +6298,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_10fa_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -6319,8 +6319,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_10fb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s8 src = get_byte (srca); { uaecptr dsta; dsta = m68k_areg (regs, dstreg); @@ -6450,7 +6450,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_1130_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s8 src = get_byte (srca); { uaecptr dsta; dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; @@ -6503,7 +6503,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_113a_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -6524,8 +6524,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_113b_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s8 src = get_byte (srca); { uaecptr dsta; dsta = m68k_areg (regs, dstreg) - areg_byteinc[dstreg]; @@ -6650,7 +6650,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_1170_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s8 src = get_byte (srca); { uaecptr dsta; dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (0); @@ -6701,7 +6701,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_117a_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -6721,8 +6721,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_117b_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s8 src = get_byte (srca); { uaecptr dsta; dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (0); @@ -6757,7 +6757,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_1180_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s8 src = m68k_dreg (regs, srcreg); { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); @@ -6775,7 +6775,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_1190_0)(uae_u32 opcode, struct regstruct ®s) { uae_s8 src = get_byte (srca); { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); @@ -6794,7 +6794,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_1198_0)(uae_u32 opcode, struct regstruct ®s) m68k_areg (regs, srcreg) += areg_byteinc[srcreg]; { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); @@ -6813,7 +6813,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_11a0_0)(uae_u32 opcode, struct regstruct ®s) m68k_areg (regs, srcreg) = srca; { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); @@ -6831,7 +6831,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_11a8_0)(uae_u32 opcode, struct regstruct ®s) { uae_s8 src = get_byte (srca); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); @@ -6846,10 +6846,10 @@ uae_u32 REGPARAM2 CPUFUNC(op_11b0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s8 src = get_byte (srca); { uaecptr dsta; -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); @@ -6866,7 +6866,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_11b8_0)(uae_u32 opcode, struct regstruct ®s) { uae_s8 src = get_byte (srca); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); @@ -6883,7 +6883,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_11b9_0)(uae_u32 opcode, struct regstruct ®s) { uae_s8 src = get_byte (srca); { uaecptr dsta; m68k_incpc (6); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); @@ -6896,12 +6896,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_11ba_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s8 src = get_byte (srca); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); @@ -6916,11 +6916,11 @@ uae_u32 REGPARAM2 CPUFUNC(op_11bb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s8 src = get_byte (srca); { uaecptr dsta; -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); @@ -6935,7 +6935,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_11bc_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s8 src = get_ibyte (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); @@ -7034,7 +7034,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_11f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s8 src = get_byte (srca); { uaecptr dsta; dsta = (uae_s32)(uae_s16)get_iword (0); @@ -7082,7 +7082,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_11f9_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_11fa_0)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -7101,8 +7101,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_11fb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s8 src = get_byte (srca); { uaecptr dsta; dsta = (uae_s32)(uae_s16)get_iword (0); @@ -7219,7 +7219,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_13f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s8 src = get_byte (srca); { uaecptr dsta; dsta = get_ilong (0); @@ -7267,7 +7267,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_13f9_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_13fa_0)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -7286,8 +7286,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_13fb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s8 src = get_byte (srca); { uaecptr dsta; dsta = get_ilong (0); @@ -7414,7 +7414,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_2030_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s32 src = get_long (srca); { CLEAR_CZNV (); SET_ZFLG (((uae_s32)(src)) == 0); @@ -7458,7 +7458,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_203a_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { CLEAR_CZNV (); @@ -7476,8 +7476,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_203b_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s32 src = get_long (srca); { CLEAR_CZNV (); SET_ZFLG (((uae_s32)(src)) == 0); @@ -7583,7 +7583,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_2070_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s32 src = get_long (srca); { m68k_areg (regs, dstreg) = (src); }}}}}return 11 * CYCLE_UNIT / 2; @@ -7618,7 +7618,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_207a_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { m68k_areg (regs, dstreg) = (src); @@ -7633,8 +7633,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_207b_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s32 src = get_long (srca); { m68k_areg (regs, dstreg) = (src); }}}}}return 11 * CYCLE_UNIT / 2; @@ -7764,7 +7764,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_20b0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s32 src = get_long (srca); { uaecptr dsta; dsta = m68k_areg (regs, dstreg); @@ -7814,7 +7814,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_20ba_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uaecptr dsta; @@ -7834,8 +7834,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_20bb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s32 src = get_long (srca); { uaecptr dsta; dsta = m68k_areg (regs, dstreg); @@ -7981,7 +7981,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_20f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s32 src = get_long (srca); { uaecptr dsta; dsta = m68k_areg (regs, dstreg); @@ -8034,7 +8034,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_20fa_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uaecptr dsta; @@ -8055,8 +8055,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_20fb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s32 src = get_long (srca); { uaecptr dsta; dsta = m68k_areg (regs, dstreg); @@ -8204,7 +8204,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_2130_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s32 src = get_long (srca); { uaecptr dsta; dsta = m68k_areg (regs, dstreg) - 4; @@ -8257,7 +8257,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_213a_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uaecptr dsta; @@ -8278,8 +8278,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_213b_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s32 src = get_long (srca); { uaecptr dsta; dsta = m68k_areg (regs, dstreg) - 4; @@ -8421,7 +8421,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_2170_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s32 src = get_long (srca); { uaecptr dsta; dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (0); @@ -8472,7 +8472,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_217a_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uaecptr dsta; @@ -8492,8 +8492,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_217b_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s32 src = get_long (srca); { uaecptr dsta; dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (0); @@ -8529,7 +8529,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_2180_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s32 src = m68k_dreg (regs, srcreg); { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); @@ -8545,7 +8545,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_2188_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s32 src = m68k_areg (regs, srcreg); { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); @@ -8553,9 +8553,6 @@ uae_u32 REGPARAM2 CPUFUNC(op_2188_0)(uae_u32 opcode, struct regstruct ®s) }}}}return 9 * CYCLE_UNIT / 2; } -#endif - -#ifdef PART_3 /* MOVE.L (An),(d8,An,Xn) */ uae_u32 REGPARAM2 CPUFUNC(op_2190_0)(uae_u32 opcode, struct regstruct ®s) { @@ -8566,7 +8563,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_2190_0)(uae_u32 opcode, struct regstruct ®s) { uae_s32 src = get_long (srca); { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); @@ -8574,6 +8571,9 @@ uae_u32 REGPARAM2 CPUFUNC(op_2190_0)(uae_u32 opcode, struct regstruct ®s) }}}}}return 11 * CYCLE_UNIT / 2; } +#endif + +#ifdef PART_3 /* MOVE.L (An)+,(d8,An,Xn) */ uae_u32 REGPARAM2 CPUFUNC(op_2198_0)(uae_u32 opcode, struct regstruct ®s) { @@ -8585,7 +8585,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_2198_0)(uae_u32 opcode, struct regstruct ®s) m68k_areg (regs, srcreg) += 4; { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); @@ -8604,7 +8604,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_21a0_0)(uae_u32 opcode, struct regstruct ®s) m68k_areg (regs, srcreg) = srca; { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); @@ -8622,7 +8622,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_21a8_0)(uae_u32 opcode, struct regstruct ®s) { uae_s32 src = get_long (srca); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); @@ -8637,10 +8637,10 @@ uae_u32 REGPARAM2 CPUFUNC(op_21b0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s32 src = get_long (srca); { uaecptr dsta; -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); @@ -8657,7 +8657,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_21b8_0)(uae_u32 opcode, struct regstruct ®s) { uae_s32 src = get_long (srca); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); @@ -8674,7 +8674,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_21b9_0)(uae_u32 opcode, struct regstruct ®s) { uae_s32 src = get_long (srca); { uaecptr dsta; m68k_incpc (6); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); @@ -8687,12 +8687,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_21ba_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); @@ -8707,11 +8707,11 @@ uae_u32 REGPARAM2 CPUFUNC(op_21bb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s32 src = get_long (srca); { uaecptr dsta; -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); @@ -8727,7 +8727,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_21bc_0)(uae_u32 opcode, struct regstruct ®s) src = get_ilong (2); { uaecptr dsta; m68k_incpc (6); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); @@ -8841,7 +8841,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_21f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s32 src = get_long (srca); { uaecptr dsta; dsta = (uae_s32)(uae_s16)get_iword (0); @@ -8889,7 +8889,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_21f9_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_21fa_0)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uaecptr dsta; @@ -8908,8 +8908,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_21fb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s32 src = get_long (srca); { uaecptr dsta; dsta = (uae_s32)(uae_s16)get_iword (0); @@ -9042,7 +9042,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_23f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s32 src = get_long (srca); { uaecptr dsta; dsta = get_ilong (0); @@ -9090,7 +9090,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_23f9_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_23fa_0)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uaecptr dsta; @@ -9109,8 +9109,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_23fb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s32 src = get_long (srca); { uaecptr dsta; dsta = get_ilong (0); @@ -9238,7 +9238,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_3030_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 src = get_word (srca); { CLEAR_CZNV (); SET_ZFLG (((uae_s16)(src)) == 0); @@ -9282,7 +9282,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_303a_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { CLEAR_CZNV (); @@ -9300,8 +9300,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_303b_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s16 src = get_word (srca); { CLEAR_CZNV (); SET_ZFLG (((uae_s16)(src)) == 0); @@ -9412,7 +9412,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_3070_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 src = get_word (srca); { src = (uae_s32)(uae_s16)src; m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); @@ -9450,7 +9450,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_307a_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { src = (uae_s32)(uae_s16)src; @@ -9466,8 +9466,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_307b_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s16 src = get_word (srca); { src = (uae_s32)(uae_s16)src; m68k_areg (regs, dstreg) = (uae_s32)(uae_s16)(src); @@ -9598,7 +9598,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_30b0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 src = get_word (srca); { uaecptr dsta; dsta = m68k_areg (regs, dstreg); @@ -9648,7 +9648,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_30ba_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uaecptr dsta; @@ -9668,8 +9668,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_30bb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s16 src = get_word (srca); { uaecptr dsta; dsta = m68k_areg (regs, dstreg); @@ -9814,7 +9814,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_30f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 src = get_word (srca); { uaecptr dsta; dsta = m68k_areg (regs, dstreg); @@ -9867,7 +9867,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_30fa_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uaecptr dsta; @@ -9888,8 +9888,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_30fb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s16 src = get_word (srca); { uaecptr dsta; dsta = m68k_areg (regs, dstreg); @@ -10036,7 +10036,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_3130_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 src = get_word (srca); { uaecptr dsta; dsta = m68k_areg (regs, dstreg) - 2; @@ -10089,7 +10089,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_313a_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uaecptr dsta; @@ -10110,8 +10110,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_313b_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s16 src = get_word (srca); { uaecptr dsta; dsta = m68k_areg (regs, dstreg) - 2; @@ -10252,7 +10252,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_3170_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 src = get_word (srca); { uaecptr dsta; dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (0); @@ -10303,7 +10303,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_317a_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uaecptr dsta; @@ -10323,8 +10323,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_317b_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s16 src = get_word (srca); { uaecptr dsta; dsta = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)get_iword (0); @@ -10359,7 +10359,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_3180_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = m68k_dreg (regs, srcreg); { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); @@ -10375,7 +10375,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_3188_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = m68k_areg (regs, srcreg); { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); @@ -10393,7 +10393,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_3190_0)(uae_u32 opcode, struct regstruct ®s) { uae_s16 src = get_word (srca); { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); @@ -10412,7 +10412,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_3198_0)(uae_u32 opcode, struct regstruct ®s) m68k_areg (regs, srcreg) += 2; { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); @@ -10431,7 +10431,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_31a0_0)(uae_u32 opcode, struct regstruct ®s) m68k_areg (regs, srcreg) = srca; { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); @@ -10449,7 +10449,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_31a8_0)(uae_u32 opcode, struct regstruct ®s) { uae_s16 src = get_word (srca); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); @@ -10464,10 +10464,10 @@ uae_u32 REGPARAM2 CPUFUNC(op_31b0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 src = get_word (srca); { uaecptr dsta; -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); @@ -10484,7 +10484,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_31b8_0)(uae_u32 opcode, struct regstruct ®s) { uae_s16 src = get_word (srca); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); @@ -10501,7 +10501,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_31b9_0)(uae_u32 opcode, struct regstruct ®s) { uae_s16 src = get_word (srca); { uaecptr dsta; m68k_incpc (6); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); @@ -10514,12 +10514,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_31ba_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); @@ -10534,11 +10534,11 @@ uae_u32 REGPARAM2 CPUFUNC(op_31bb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s16 src = get_word (srca); { uaecptr dsta; -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); @@ -10553,7 +10553,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_31bc_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); @@ -10667,7 +10667,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_31f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 src = get_word (srca); { uaecptr dsta; dsta = (uae_s32)(uae_s16)get_iword (0); @@ -10715,7 +10715,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_31f9_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_31fa_0)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uaecptr dsta; @@ -10734,8 +10734,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_31fb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s16 src = get_word (srca); { uaecptr dsta; dsta = (uae_s32)(uae_s16)get_iword (0); @@ -10867,7 +10867,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_33f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 src = get_word (srca); { uaecptr dsta; dsta = get_ilong (0); @@ -10915,7 +10915,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_33f9_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_33fa_0)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uaecptr dsta; @@ -10934,8 +10934,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_33fb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s16 src = get_word (srca); { uaecptr dsta; dsta = get_ilong (0); @@ -11072,7 +11072,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4030_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s8 src = get_byte (srca); { uae_u32 newv = 0 - src - (GET_XFLG () ? 1 : 0); { int flgs = ((uae_s8)(src)) < 0; @@ -11238,7 +11238,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4070_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 src = get_word (srca); { uae_u32 newv = 0 - src - (GET_XFLG () ? 1 : 0); { int flgs = ((uae_s16)(src)) < 0; @@ -11404,7 +11404,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_40b0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s32 src = get_long (srca); { uae_u32 newv = 0 - src - (GET_XFLG () ? 1 : 0); { int flgs = ((uae_s32)(src)) < 0; @@ -11463,7 +11463,7 @@ return 15 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_40c0_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ MakeSR (regs); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); }}} m68k_incpc (2); @@ -11474,7 +11474,7 @@ return 5 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_40d0_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = m68k_areg (regs, srcreg); MakeSR (regs); @@ -11487,7 +11487,7 @@ return 9 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_40d8_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = m68k_areg (regs, srcreg); m68k_areg (regs, srcreg) += 2; @@ -11501,7 +11501,7 @@ return 9 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_40e0_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = m68k_areg (regs, srcreg) - 2; m68k_areg (regs, srcreg) = srca; @@ -11515,7 +11515,7 @@ return 9 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_40e8_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (2); MakeSR (regs); @@ -11528,10 +11528,10 @@ return 10 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_40f0_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); MakeSR (regs); put_word (srca,regs.sr); }}}}return 12 * CYCLE_UNIT / 2; @@ -11540,7 +11540,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_40f0_0)(uae_u32 opcode, struct regstruct ®s) /* MVSR2.W (xxx).W */ uae_u32 REGPARAM2 CPUFUNC(op_40f8_0)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = (uae_s32)(uae_s16)get_iword (2); MakeSR (regs); @@ -11552,7 +11552,7 @@ return 10 * CYCLE_UNIT / 2; /* MVSR2.W (xxx).L */ uae_u32 REGPARAM2 CPUFUNC(op_40f9_0)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = get_ilong (2); MakeSR (regs); @@ -11571,12 +11571,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4100_0)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (2); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 6 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 8 * CYCLE_UNIT / 2; } }}}return 8 * CYCLE_UNIT / 2; @@ -11594,12 +11594,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4110_0)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (2); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 10 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 12 * CYCLE_UNIT / 2; } }}}}return 12 * CYCLE_UNIT / 2; @@ -11618,12 +11618,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4118_0)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (2); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 10 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 12 * CYCLE_UNIT / 2; } }}}}return 12 * CYCLE_UNIT / 2; @@ -11642,12 +11642,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4120_0)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (2); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 11 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 13 * CYCLE_UNIT / 2; } }}}}return 13 * CYCLE_UNIT / 2; @@ -11665,12 +11665,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4128_0)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (4); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 12 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 14 * CYCLE_UNIT / 2; } }}}}return 14 * CYCLE_UNIT / 2; @@ -11683,17 +11683,17 @@ uae_u32 REGPARAM2 CPUFUNC(op_4130_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 14 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 16 * CYCLE_UNIT / 2; } }}}}}return 16 * CYCLE_UNIT / 2; @@ -11710,12 +11710,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4138_0)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (4); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 12 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 14 * CYCLE_UNIT / 2; } }}}}return 14 * CYCLE_UNIT / 2; @@ -11732,12 +11732,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4139_0)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (6); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 13 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 15 * CYCLE_UNIT / 2; } }}}}return 15 * CYCLE_UNIT / 2; @@ -11748,19 +11748,19 @@ uae_u32 REGPARAM2 CPUFUNC(op_413a_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); m68k_incpc (4); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 12 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 14 * CYCLE_UNIT / 2; } }}}}return 14 * CYCLE_UNIT / 2; @@ -11773,18 +11773,18 @@ uae_u32 REGPARAM2 CPUFUNC(op_413b_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 14 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 16 * CYCLE_UNIT / 2; } }}}}}return 16 * CYCLE_UNIT / 2; @@ -11800,12 +11800,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_413c_0)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (6); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 11 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 13 * CYCLE_UNIT / 2; } }}}return 13 * CYCLE_UNIT / 2; @@ -11821,12 +11821,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4180_0)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (2); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 6 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 8 * CYCLE_UNIT / 2; } }}}return 8 * CYCLE_UNIT / 2; @@ -11844,12 +11844,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4190_0)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (2); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 10 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 12 * CYCLE_UNIT / 2; } }}}}return 12 * CYCLE_UNIT / 2; @@ -11868,12 +11868,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4198_0)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (2); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 10 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 12 * CYCLE_UNIT / 2; } }}}}return 12 * CYCLE_UNIT / 2; @@ -11892,12 +11892,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_41a0_0)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (2); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 11 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 13 * CYCLE_UNIT / 2; } }}}}return 13 * CYCLE_UNIT / 2; @@ -11915,12 +11915,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_41a8_0)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (4); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 12 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 14 * CYCLE_UNIT / 2; } }}}}return 14 * CYCLE_UNIT / 2; @@ -11933,17 +11933,17 @@ uae_u32 REGPARAM2 CPUFUNC(op_41b0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 14 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 16 * CYCLE_UNIT / 2; } }}}}}return 16 * CYCLE_UNIT / 2; @@ -11960,12 +11960,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_41b8_0)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (4); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 12 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 14 * CYCLE_UNIT / 2; } }}}}return 14 * CYCLE_UNIT / 2; @@ -11982,12 +11982,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_41b9_0)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (6); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 13 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 15 * CYCLE_UNIT / 2; } }}}}return 15 * CYCLE_UNIT / 2; @@ -11998,19 +11998,19 @@ uae_u32 REGPARAM2 CPUFUNC(op_41ba_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); m68k_incpc (4); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 12 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 14 * CYCLE_UNIT / 2; } }}}}return 14 * CYCLE_UNIT / 2; @@ -12023,18 +12023,18 @@ uae_u32 REGPARAM2 CPUFUNC(op_41bb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 14 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 16 * CYCLE_UNIT / 2; } }}}}}return 16 * CYCLE_UNIT / 2; @@ -12049,12 +12049,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_41bc_0)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (4); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 9 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 11 * CYCLE_UNIT / 2; } }}}return 11 * CYCLE_UNIT / 2; @@ -12091,7 +12091,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_41f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { m68k_areg (regs, dstreg) = (srca); }}}}return 8 * CYCLE_UNIT / 2; } @@ -12123,7 +12123,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_41fa_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { m68k_areg (regs, dstreg) = (srca); }}} m68k_incpc (4); @@ -12137,8 +12137,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_41fb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { m68k_areg (regs, dstreg) = (srca); }}}}return 8 * CYCLE_UNIT / 2; } @@ -12219,7 +12219,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4230_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s8)(0)) == 0); SET_NFLG (((uae_s8)(0)) < 0); @@ -12329,7 +12329,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4270_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s16)(0)) == 0); SET_NFLG (((uae_s16)(0)) < 0); @@ -12439,7 +12439,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_42b0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); CLEAR_CZNV (); SET_ZFLG (((uae_s32)(0)) == 0); SET_NFLG (((uae_s32)(0)) < 0); @@ -12539,7 +12539,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_42f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); MakeSR (regs); put_word (srca,regs.sr & 0xff); }}}return 12 * CYCLE_UNIT / 2; @@ -12556,9 +12556,6 @@ uae_u32 REGPARAM2 CPUFUNC(op_42f8_0)(uae_u32 opcode, struct regstruct ®s) return 10 * CYCLE_UNIT / 2; } -#endif - -#ifdef PART_4 /* MVSR2.B (xxx).L */ uae_u32 REGPARAM2 CPUFUNC(op_42f9_0)(uae_u32 opcode, struct regstruct ®s) { @@ -12570,6 +12567,9 @@ uae_u32 REGPARAM2 CPUFUNC(op_42f9_0)(uae_u32 opcode, struct regstruct ®s) return 12 * CYCLE_UNIT / 2; } +#endif + +#ifdef PART_4 /* NEG.B Dn */ uae_u32 REGPARAM2 CPUFUNC(op_4400_0)(uae_u32 opcode, struct regstruct ®s) { @@ -12681,7 +12681,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4430_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s8 src = get_byte (srca); {{uae_u32 dst = ((uae_u8)(0)) - ((uae_u8)(src)); { int flgs = ((uae_s8)(src)) < 0; @@ -12847,7 +12847,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4470_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 src = get_word (srca); {{uae_u32 dst = ((uae_u16)(0)) - ((uae_u16)(src)); { int flgs = ((uae_s16)(src)) < 0; @@ -13013,7 +13013,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_44b0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s32 src = get_long (srca); {{uae_u32 dst = ((uae_u32)(0)) - ((uae_u32)(src)); { int flgs = ((uae_s32)(src)) < 0; @@ -13149,7 +13149,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_44f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 src = get_word (srca); MakeSR (regs); regs.sr &= 0xFF00; @@ -13190,7 +13190,7 @@ return 12 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_44fa_0)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); MakeSR (regs); @@ -13207,8 +13207,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_44fb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s16 src = get_word (srca); MakeSR (regs); regs.sr &= 0xFF00; @@ -13315,7 +13315,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4630_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s8 src = get_byte (srca); { uae_u32 dst = ~src; CLEAR_CZNV (); @@ -13441,7 +13441,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4670_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 src = get_word (srca); { uae_u32 dst = ~src; CLEAR_CZNV (); @@ -13567,7 +13567,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_46b0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s32 src = get_long (srca); { uae_u32 dst = ~src; CLEAR_CZNV (); @@ -13611,7 +13611,7 @@ return 13 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_46c0_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 src = m68k_dreg (regs, srcreg); regs.sr = src; MakeFromSR (regs); @@ -13623,7 +13623,7 @@ return 11 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_46d0_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = m68k_areg (regs, srcreg); { uae_s16 src = get_word (srca); @@ -13637,7 +13637,7 @@ return 15 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_46d8_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = m68k_areg (regs, srcreg); { uae_s16 src = get_word (srca); @@ -13652,7 +13652,7 @@ return 15 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_46e0_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = m68k_areg (regs, srcreg) - 2; { uae_s16 src = get_word (srca); @@ -13667,7 +13667,7 @@ return 16 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_46e8_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); @@ -13681,10 +13681,10 @@ return 17 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_46f0_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 src = get_word (srca); regs.sr = src; MakeFromSR (regs); @@ -13694,7 +13694,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_46f0_0)(uae_u32 opcode, struct regstruct ®s) /* MV2SR.W (xxx).W */ uae_u32 REGPARAM2 CPUFUNC(op_46f8_0)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); @@ -13707,7 +13707,7 @@ return 17 * CYCLE_UNIT / 2; /* MV2SR.W (xxx).L */ uae_u32 REGPARAM2 CPUFUNC(op_46f9_0)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = get_ilong (2); { uae_s16 src = get_word (srca); @@ -13720,9 +13720,9 @@ return 18 * CYCLE_UNIT / 2; /* MV2SR.W (d16,PC) */ uae_u32 REGPARAM2 CPUFUNC(op_46fa_0)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); regs.sr = src; @@ -13734,12 +13734,12 @@ return 17 * CYCLE_UNIT / 2; /* MV2SR.W (d8,PC,Xn) */ uae_u32 REGPARAM2 CPUFUNC(op_46fb_0)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s16 src = get_word (srca); regs.sr = src; MakeFromSR (regs); @@ -13749,7 +13749,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_46fb_0)(uae_u32 opcode, struct regstruct ®s) /* MV2SR.W #.W */ uae_u32 REGPARAM2 CPUFUNC(op_46fc_0)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 src = get_iword (2); regs.sr = src; MakeFromSR (regs); @@ -13895,7 +13895,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4830_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s8 src = get_byte (srca); { uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG () ? 1 : 0); uae_u16 newv_hi = - (src & 0xF0); @@ -13975,7 +13975,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4848_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); { m68k_incpc (2); - op_illg (opcode, regs); + op_illg (opcode); }return 4 * CYCLE_UNIT / 2; } @@ -14013,7 +14013,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4870_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uaecptr dsta; dsta = m68k_areg (regs, 7) - 4; m68k_areg (regs, 7) = dsta; @@ -14051,7 +14051,7 @@ return 11 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_487a_0)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uaecptr dsta; dsta = m68k_areg (regs, 7) - 4; @@ -14067,8 +14067,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_487b_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uaecptr dsta; dsta = m68k_areg (regs, 7) - 4; m68k_areg (regs, 7) = dsta; @@ -14176,7 +14176,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_48b0_0)(uae_u32 opcode, struct regstruct ®s) { uae_u16 mask = get_iword (2); { uaecptr srca; m68k_incpc (4); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; while (dmask) { put_word (srca, m68k_dreg (regs, movem_index1[dmask])); @@ -14341,7 +14341,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_48f0_0)(uae_u32 opcode, struct regstruct ®s) { uae_u16 mask = get_iword (2); { uaecptr srca; m68k_incpc (4); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; while (dmask) { put_long (srca, m68k_dreg (regs, movem_index1[dmask])); @@ -14496,7 +14496,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4a30_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s8 src = get_byte (srca); CLEAR_CZNV (); SET_ZFLG (((uae_s8)(src)) == 0); @@ -14534,7 +14534,7 @@ return 10 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_4a3a_0)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s8 src = get_byte (srca); CLEAR_CZNV (); @@ -14550,8 +14550,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_4a3b_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s8 src = get_byte (srca); CLEAR_CZNV (); SET_ZFLG (((uae_s8)(src)) == 0); @@ -14658,7 +14658,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4a70_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 src = get_word (srca); CLEAR_CZNV (); SET_ZFLG (((uae_s16)(src)) == 0); @@ -14696,7 +14696,7 @@ return 10 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_4a7a_0)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); CLEAR_CZNV (); @@ -14712,8 +14712,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_4a7b_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s16 src = get_word (srca); CLEAR_CZNV (); SET_ZFLG (((uae_s16)(src)) == 0); @@ -14820,7 +14820,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4ab0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s32 src = get_long (srca); CLEAR_CZNV (); SET_ZFLG (((uae_s32)(src)) == 0); @@ -14858,7 +14858,7 @@ return 10 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_4aba_0)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); CLEAR_CZNV (); @@ -14874,8 +14874,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_4abb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s32 src = get_long (srca); CLEAR_CZNV (); SET_ZFLG (((uae_s32)(src)) == 0); @@ -14981,7 +14981,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4af0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s8 src = get_byte (srca); CLEAR_CZNV (); SET_ZFLG (((uae_s8)(src)) == 0); @@ -15093,7 +15093,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4c30_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 extra = get_iword (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s32 dst = get_long (dsta); m68k_mull(opcode, dst, extra); }}}}}return 55 * CYCLE_UNIT / 2; @@ -15129,7 +15129,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4c3a_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = 2; {{ uae_s16 extra = get_iword (2); { uaecptr dsta; - dsta = m68k_getpc (regs) + 4; + dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword (4); { uae_s32 dst = get_long (dsta); m68k_incpc (6); @@ -15145,8 +15145,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_4c3b_0)(uae_u32 opcode, struct regstruct ®s) { uaecptr tmppc; uaecptr dsta; m68k_incpc (4); -{ tmppc = m68k_getpc (regs); - dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + dsta = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s32 dst = get_long (dsta); m68k_mull(opcode, dst, extra); }}}}}return 55 * CYCLE_UNIT / 2; @@ -15173,7 +15173,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4c40_0)(uae_u32 opcode, struct regstruct ®s) { uae_s32 dst = m68k_dreg (regs, dstreg); m68k_incpc (4); if (dst == 0) { - Exception (5, regs); + Exception (5); return 4 * CYCLE_UNIT / 2; } m68k_divl(opcode, dst, extra); @@ -15192,7 +15192,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4c50_0)(uae_u32 opcode, struct regstruct ®s) { uae_s32 dst = get_long (dsta); m68k_incpc (4); if (dst == 0) { - Exception (5, regs); + Exception (5); return 4 * CYCLE_UNIT / 2; } m68k_divl(opcode, dst, extra); @@ -15212,7 +15212,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4c58_0)(uae_u32 opcode, struct regstruct ®s) m68k_areg (regs, dstreg) += 4; m68k_incpc (4); if (dst == 0) { - Exception (5, regs); + Exception (5); return 4 * CYCLE_UNIT / 2; } m68k_divl(opcode, dst, extra); @@ -15232,7 +15232,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4c60_0)(uae_u32 opcode, struct regstruct ®s) m68k_areg (regs, dstreg) = dsta; m68k_incpc (4); if (dst == 0) { - Exception (5, regs); + Exception (5); return 4 * CYCLE_UNIT / 2; } m68k_divl(opcode, dst, extra); @@ -15251,7 +15251,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4c68_0)(uae_u32 opcode, struct regstruct ®s) { uae_s32 dst = get_long (dsta); m68k_incpc (6); if (dst == 0) { - Exception (5, regs); + Exception (5); return 4 * CYCLE_UNIT / 2; } m68k_divl(opcode, dst, extra); @@ -15267,10 +15267,10 @@ uae_u32 REGPARAM2 CPUFUNC(op_4c70_0)(uae_u32 opcode, struct regstruct ®s) if (extra & 0x800) cyc = 12 * CYCLE_UNIT / 2; { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s32 dst = get_long (dsta); if (dst == 0) { - Exception (5, regs); + Exception (5); return 4 * CYCLE_UNIT / 2; } m68k_divl(opcode, dst, extra); @@ -15288,7 +15288,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4c78_0)(uae_u32 opcode, struct regstruct ®s) { uae_s32 dst = get_long (dsta); m68k_incpc (6); if (dst == 0) { - Exception (5, regs); + Exception (5); return 4 * CYCLE_UNIT / 2; } m68k_divl(opcode, dst, extra); @@ -15306,7 +15306,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4c79_0)(uae_u32 opcode, struct regstruct ®s) { uae_s32 dst = get_long (dsta); m68k_incpc (8); if (dst == 0) { - Exception (5, regs); + Exception (5); return 4 * CYCLE_UNIT / 2; } m68k_divl(opcode, dst, extra); @@ -15321,12 +15321,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4c7a_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 extra = get_iword (2); if (extra & 0x800) cyc = 12 * CYCLE_UNIT / 2; { uaecptr dsta; - dsta = m68k_getpc (regs) + 4; + dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword (4); { uae_s32 dst = get_long (dsta); m68k_incpc (6); if (dst == 0) { - Exception (5, regs); + Exception (5); return 4 * CYCLE_UNIT / 2; } m68k_divl(opcode, dst, extra); @@ -15343,11 +15343,11 @@ uae_u32 REGPARAM2 CPUFUNC(op_4c7b_0)(uae_u32 opcode, struct regstruct ®s) { uaecptr tmppc; uaecptr dsta; m68k_incpc (4); -{ tmppc = m68k_getpc (regs); - dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + dsta = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s32 dst = get_long (dsta); if (dst == 0) { - Exception (5, regs); + Exception (5); return 4 * CYCLE_UNIT / 2; } m68k_divl(opcode, dst, extra); @@ -15364,7 +15364,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4c7c_0)(uae_u32 opcode, struct regstruct ®s) dst = get_ilong (4); m68k_incpc (8); if (dst == 0) { - Exception (5, regs); + Exception (5); return 4 * CYCLE_UNIT / 2; } m68k_divl(opcode, dst, extra); @@ -15456,7 +15456,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4cb0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; { uaecptr srca; m68k_incpc (4); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word (srca); srca += 2; @@ -15528,7 +15528,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4cba_0)(uae_u32 opcode, struct regstruct ®s) { uae_u16 mask = get_iword (2); uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; { uaecptr srca; - srca = m68k_getpc (regs) + 4; + srca = m68k_getpc () + 4; srca += (uae_s32)(uae_s16)get_iword (4); { while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word (srca); @@ -15556,8 +15556,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_4cbb_0)(uae_u32 opcode, struct regstruct ®s) { uaecptr tmppc; uaecptr srca; m68k_incpc (4); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word (srca); srca += 2; @@ -15658,7 +15658,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4cf0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; { uaecptr srca; m68k_incpc (4); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = get_long (srca); srca += 4; @@ -15730,7 +15730,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4cfa_0)(uae_u32 opcode, struct regstruct ®s) { uae_u16 mask = get_iword (2); uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; { uaecptr srca; - srca = m68k_getpc (regs) + 4; + srca = m68k_getpc () + 4; srca += (uae_s32)(uae_s16)get_iword (4); { while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = get_long (srca); @@ -15758,8 +15758,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_4cfb_0)(uae_u32 opcode, struct regstruct ®s) { uaecptr tmppc; uaecptr srca; m68k_incpc (4); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = get_long (srca); srca += 4; @@ -15781,7 +15781,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e40_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 15); {{ uae_u32 src = srcreg; m68k_incpc (2); - Exception (src + 32, regs); + Exception (src + 32); }}return 27 * CYCLE_UNIT / 2; } @@ -15820,7 +15820,7 @@ return 7 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_4e60_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s32 src = m68k_areg (regs, srcreg); regs.usp = src; }}} m68k_incpc (2); @@ -15831,7 +15831,7 @@ return 3 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_4e68_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ m68k_areg (regs, srcreg) = (regs.usp); }}} m68k_incpc (2); return 3 * CYCLE_UNIT / 2; @@ -15840,7 +15840,7 @@ return 3 * CYCLE_UNIT / 2; /* RESET.L */ uae_u32 REGPARAM2 CPUFUNC(op_4e70_0)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { cpureset (); m68k_incpc (2); }}return 519 * CYCLE_UNIT / 2; @@ -15856,7 +15856,7 @@ return 3 * CYCLE_UNIT / 2; /* STOP.L #.W */ uae_u32 REGPARAM2 CPUFUNC(op_4e72_0)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 src = get_iword (2); regs.sr = src; MakeFromSR (regs); @@ -15868,7 +15868,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e72_0)(uae_u32 opcode, struct regstruct ®s) /* RTE.L */ uae_u32 REGPARAM2 CPUFUNC(op_4e73_0)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { uae_u16 newsr; uae_u32 newpc; for (;;) { uaecptr a = m68k_areg (regs, 7); @@ -15886,7 +15886,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e73_0)(uae_u32 opcode, struct regstruct ®s) else if (frame == 0x9) { m68k_areg (regs, 7) += offset + 12; break; } else if (frame == 0xa) { m68k_areg (regs, 7) += offset + 24; break; } else if (frame == 0xb) { m68k_areg (regs, 7) += offset + 84; break; } - else { m68k_areg (regs, 7) += offset; Exception (14, regs); return 4 * CYCLE_UNIT / 2; } + else { m68k_areg (regs, 7) += offset; Exception (14); return 4 * CYCLE_UNIT / 2; } regs.sr = newsr; MakeFromSR(regs); } @@ -15896,7 +15896,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e73_0)(uae_u32 opcode, struct regstruct ®s) exception3i (0x4E73, newpc); return 4 * CYCLE_UNIT / 2; } - m68k_setpc (regs, newpc); + m68k_setpc (newpc); }}return 24 * CYCLE_UNIT / 2; } @@ -15913,18 +15913,18 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e74_0)(uae_u32 opcode, struct regstruct ®s) exception3i (0x4E74, pc); return 4 * CYCLE_UNIT / 2; } - m68k_setpc (regs, pc); + m68k_setpc (pc); }}}}return 12 * CYCLE_UNIT / 2; } /* RTS.L */ uae_u32 REGPARAM2 CPUFUNC(op_4e75_0)(uae_u32 opcode, struct regstruct ®s) { -{ uaecptr pc = m68k_getpc (regs); - m68k_do_rts (regs); - if (m68k_getpc (regs) & 1) { - uaecptr faultpc = m68k_getpc (regs); - m68k_setpc (regs, pc); +{ uaecptr pc = m68k_getpc (); + m68k_do_rts (); + if (m68k_getpc () & 1) { + uaecptr faultpc = m68k_getpc (); + m68k_setpc (pc); exception3i (0x4E75, faultpc); return 8 * CYCLE_UNIT / 2; } @@ -15936,7 +15936,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e76_0)(uae_u32 opcode, struct regstruct ®s) { { m68k_incpc (2); if (GET_VFLG ()) { - Exception (7, regs); + Exception (7); return 4 * CYCLE_UNIT / 2; } }return 5 * CYCLE_UNIT / 2; @@ -15945,7 +15945,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e76_0)(uae_u32 opcode, struct regstruct ®s) /* RTR.L */ uae_u32 REGPARAM2 CPUFUNC(op_4e77_0)(uae_u32 opcode, struct regstruct ®s) { -{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr oldpc = m68k_getpc (); MakeSR (regs); { uaecptr sra; sra = m68k_areg (regs, 7); @@ -15957,11 +15957,11 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e77_0)(uae_u32 opcode, struct regstruct ®s) m68k_areg (regs, 7) += 4; regs.sr &= 0xFF00; sr &= 0xFF; regs.sr |= sr; - m68k_setpc (regs, pc); + m68k_setpc (pc); MakeFromSR (regs); - if (m68k_getpc (regs) & 1) { - uaecptr faultpc = m68k_getpc (regs); - m68k_setpc (regs, oldpc); + if (m68k_getpc () & 1) { + uaecptr faultpc = m68k_getpc (); + m68k_setpc (oldpc); exception3i (0x4E77, faultpc); return 8 * CYCLE_UNIT / 2; } @@ -15971,7 +15971,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e77_0)(uae_u32 opcode, struct regstruct ®s) /* MOVEC2.L #.W */ uae_u32 REGPARAM2 CPUFUNC(op_4e7a_0)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 src = get_iword (2); { int regno = (src >> 12) & 15; uae_u32 *regp = regs.regs + regno; @@ -15984,7 +15984,7 @@ return 7 * CYCLE_UNIT / 2; /* MOVE2C.L #.W */ uae_u32 REGPARAM2 CPUFUNC(op_4e7b_0)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 src = get_iword (2); { int regno = (src >> 12) & 15; uae_u32 *regp = regs.regs + regno; @@ -16000,12 +16000,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e90_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = m68k_areg (regs, srcreg); -{ uaecptr oldpc = m68k_getpc (regs) + 2; +{ uaecptr oldpc = m68k_getpc () + 2; if (srca & 1) { exception3i (opcode, srca); return 4 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); m68k_areg (regs, 7) -= 4; put_long (m68k_areg (regs, 7), oldpc); }}}return 13 * CYCLE_UNIT / 2; @@ -16017,12 +16017,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4ea8_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (2); -{ uaecptr oldpc = m68k_getpc (regs) + 4; +{ uaecptr oldpc = m68k_getpc () + 4; if (srca & 1) { exception3i (opcode, srca); return 8 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); m68k_areg (regs, 7) -= 4; put_long (m68k_areg (regs, 7), oldpc); }}}return 15 * CYCLE_UNIT / 2; @@ -16034,13 +16034,13 @@ uae_u32 REGPARAM2 CPUFUNC(op_4eb0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); -{ uaecptr oldpc = m68k_getpc (regs) + 0; +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); +{ uaecptr oldpc = m68k_getpc () + 0; if (srca & 1) { exception3i (opcode, srca); return 4 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); m68k_areg (regs, 7) -= 4; put_long (m68k_areg (regs, 7), oldpc); }}}}return 17 * CYCLE_UNIT / 2; @@ -16051,12 +16051,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4eb8_0)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr srca; srca = (uae_s32)(uae_s16)get_iword (2); -{ uaecptr oldpc = m68k_getpc (regs) + 4; +{ uaecptr oldpc = m68k_getpc () + 4; if (srca & 1) { exception3i (opcode, srca); return 8 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); m68k_areg (regs, 7) -= 4; put_long (m68k_areg (regs, 7), oldpc); }}}return 13 * CYCLE_UNIT / 2; @@ -16067,12 +16067,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4eb9_0)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr srca; srca = get_ilong (2); -{ uaecptr oldpc = m68k_getpc (regs) + 6; +{ uaecptr oldpc = m68k_getpc () + 6; if (srca & 1) { exception3i (opcode, srca); return 12 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); m68k_areg (regs, 7) -= 4; put_long (m68k_areg (regs, 7), oldpc); }}}return 13 * CYCLE_UNIT / 2; @@ -16082,14 +16082,14 @@ uae_u32 REGPARAM2 CPUFUNC(op_4eb9_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_4eba_0)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); -{ uaecptr oldpc = m68k_getpc (regs) + 4; +{ uaecptr oldpc = m68k_getpc () + 4; if (srca & 1) { exception3i (opcode, srca); return 8 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); m68k_areg (regs, 7) -= 4; put_long (m68k_areg (regs, 7), oldpc); }}}return 15 * CYCLE_UNIT / 2; @@ -16101,14 +16101,14 @@ uae_u32 REGPARAM2 CPUFUNC(op_4ebb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); -{ uaecptr oldpc = m68k_getpc (regs) + 0; +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); +{ uaecptr oldpc = m68k_getpc () + 0; if (srca & 1) { exception3i (opcode, srca); return 4 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); m68k_areg (regs, 7) -= 4; put_long (m68k_areg (regs, 7), oldpc); }}}}return 17 * CYCLE_UNIT / 2; @@ -16124,7 +16124,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4ed0_0)(uae_u32 opcode, struct regstruct ®s) exception3i (opcode, srca); return 4 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); }}return 9 * CYCLE_UNIT / 2; } @@ -16138,7 +16138,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4ee8_0)(uae_u32 opcode, struct regstruct ®s) exception3i (opcode, srca); return 8 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); }}return 11 * CYCLE_UNIT / 2; } @@ -16148,12 +16148,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4ef0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); if (srca & 1) { exception3i (opcode, srca); return 4 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); }}}return 13 * CYCLE_UNIT / 2; } @@ -16166,7 +16166,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4ef8_0)(uae_u32 opcode, struct regstruct ®s) exception3i (opcode, srca); return 8 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); }}return 9 * CYCLE_UNIT / 2; } @@ -16179,7 +16179,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4ef9_0)(uae_u32 opcode, struct regstruct ®s) exception3i (opcode, srca); return 12 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); }}return 9 * CYCLE_UNIT / 2; } @@ -16187,13 +16187,13 @@ uae_u32 REGPARAM2 CPUFUNC(op_4ef9_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_4efa_0)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); if (srca & 1) { exception3i (opcode, srca); return 8 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); }}return 11 * CYCLE_UNIT / 2; } @@ -16203,13 +16203,13 @@ uae_u32 REGPARAM2 CPUFUNC(op_4efb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); if (srca & 1) { exception3i (opcode, srca); return 4 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); }}}return 13 * CYCLE_UNIT / 2; } @@ -16336,7 +16336,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5030_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s8 dst = get_byte (dsta); {{uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); { int flgs = ((uae_s8)(src)) < 0; @@ -16531,7 +16531,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5070_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s16 dst = get_word (dsta); {{uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); { int flgs = ((uae_s16)(src)) < 0; @@ -16624,9 +16624,6 @@ uae_u32 REGPARAM2 CPUFUNC(op_5088_0)(uae_u32 opcode, struct regstruct ®s) return 3 * CYCLE_UNIT / 2; } -#endif - -#ifdef PART_5 /* ADDQ.L #,(An) */ uae_u32 REGPARAM2 CPUFUNC(op_5090_0)(uae_u32 opcode, struct regstruct ®s) { @@ -16674,6 +16671,9 @@ uae_u32 REGPARAM2 CPUFUNC(op_5098_0)(uae_u32 opcode, struct regstruct ®s) return 10 * CYCLE_UNIT / 2; } +#endif + +#ifdef PART_5 /* ADDQ.L #,-(An) */ uae_u32 REGPARAM2 CPUFUNC(op_50a0_0)(uae_u32 opcode, struct regstruct ®s) { @@ -16729,7 +16729,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_50b0_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s32 dst = get_long (dsta); {{uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); { int flgs = ((uae_s32)(src)) < 0; @@ -16804,20 +16804,20 @@ uae_u32 REGPARAM2 CPUFUNC(op_50c8_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); if (!cctrue (regs.ccrflags, 0)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 7 * CYCLE_UNIT / 2; } } else { } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2; } @@ -16877,7 +16877,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_50f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); {{ int val = cctrue (regs.ccrflags, 0) ? 0xff : 0; put_byte (srca,val); }}}}}return 11 * CYCLE_UNIT / 2; @@ -16909,7 +16909,7 @@ return 11 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_50fa_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s16 dummy = get_iword (2); - if (cctrue (regs.ccrflags, 0)) { Exception (7, regs); goto l_950; } + if (cctrue (regs.ccrflags, 0)) { Exception (7); goto l_950; } }} m68k_incpc (4); l_950: ; return 10 * CYCLE_UNIT / 2; @@ -16920,7 +16920,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_50fb_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s32 dummy; dummy = get_ilong (2); - if (cctrue (regs.ccrflags, 0)) { Exception (7, regs); goto l_951; } + if (cctrue (regs.ccrflags, 0)) { Exception (7); goto l_951; } }} m68k_incpc (6); l_951: ; return 10 * CYCLE_UNIT / 2; @@ -16929,7 +16929,7 @@ return 10 * CYCLE_UNIT / 2; /* TRAPcc.L (T) */ uae_u32 REGPARAM2 CPUFUNC(op_50fc_0)(uae_u32 opcode, struct regstruct ®s) { -{ if (cctrue (regs.ccrflags, 0)) { Exception (7, regs); goto l_952; } +{ if (cctrue (regs.ccrflags, 0)) { Exception (7); goto l_952; } } m68k_incpc (2); l_952: ; return 10 * CYCLE_UNIT / 2; @@ -17058,7 +17058,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5130_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s8 dst = get_byte (dsta); {{uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); { int flgs = ((uae_s8)(src)) < 0; @@ -17253,7 +17253,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5170_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s16 dst = get_word (dsta); {{uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); { int flgs = ((uae_s16)(src)) < 0; @@ -17448,7 +17448,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_51b0_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s32 dst = get_long (dsta); {{uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); { int flgs = ((uae_s32)(src)) < 0; @@ -17523,20 +17523,20 @@ uae_u32 REGPARAM2 CPUFUNC(op_51c8_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); if (!cctrue (regs.ccrflags, 1)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 7 * CYCLE_UNIT / 2; } } else { } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2; } @@ -17596,7 +17596,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_51f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); {{ int val = cctrue (regs.ccrflags, 1) ? 0xff : 0; put_byte (srca,val); }}}}}return 11 * CYCLE_UNIT / 2; @@ -17628,7 +17628,7 @@ return 11 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_51fa_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s16 dummy = get_iword (2); - if (cctrue (regs.ccrflags, 1)) { Exception (7, regs); goto l_988; } + if (cctrue (regs.ccrflags, 1)) { Exception (7); goto l_988; } }} m68k_incpc (4); l_988: ; return 10 * CYCLE_UNIT / 2; @@ -17639,7 +17639,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_51fb_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s32 dummy; dummy = get_ilong (2); - if (cctrue (regs.ccrflags, 1)) { Exception (7, regs); goto l_989; } + if (cctrue (regs.ccrflags, 1)) { Exception (7); goto l_989; } }} m68k_incpc (6); l_989: ; return 10 * CYCLE_UNIT / 2; @@ -17648,7 +17648,7 @@ return 10 * CYCLE_UNIT / 2; /* TRAPcc.L (F) */ uae_u32 REGPARAM2 CPUFUNC(op_51fc_0)(uae_u32 opcode, struct regstruct ®s) { -{ if (cctrue (regs.ccrflags, 1)) { Exception (7, regs); goto l_990; } +{ if (cctrue (regs.ccrflags, 1)) { Exception (7); goto l_990; } } m68k_incpc (2); l_990: ; return 10 * CYCLE_UNIT / 2; @@ -17670,20 +17670,20 @@ uae_u32 REGPARAM2 CPUFUNC(op_52c8_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); if (!cctrue (regs.ccrflags, 2)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 7 * CYCLE_UNIT / 2; } } else { } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2; } @@ -17743,7 +17743,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_52f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); {{ int val = cctrue (regs.ccrflags, 2) ? 0xff : 0; put_byte (srca,val); }}}}}return 11 * CYCLE_UNIT / 2; @@ -17775,7 +17775,7 @@ return 11 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_52fa_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s16 dummy = get_iword (2); - if (cctrue (regs.ccrflags, 2)) { Exception (7, regs); goto l_1000; } + if (cctrue (regs.ccrflags, 2)) { Exception (7); goto l_1000; } }} m68k_incpc (4); l_1000: ; return 10 * CYCLE_UNIT / 2; @@ -17786,7 +17786,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_52fb_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s32 dummy; dummy = get_ilong (2); - if (cctrue (regs.ccrflags, 2)) { Exception (7, regs); goto l_1001; } + if (cctrue (regs.ccrflags, 2)) { Exception (7); goto l_1001; } }} m68k_incpc (6); l_1001: ; return 10 * CYCLE_UNIT / 2; @@ -17795,7 +17795,7 @@ return 10 * CYCLE_UNIT / 2; /* TRAPcc.L (HI) */ uae_u32 REGPARAM2 CPUFUNC(op_52fc_0)(uae_u32 opcode, struct regstruct ®s) { -{ if (cctrue (regs.ccrflags, 2)) { Exception (7, regs); goto l_1002; } +{ if (cctrue (regs.ccrflags, 2)) { Exception (7); goto l_1002; } } m68k_incpc (2); l_1002: ; return 10 * CYCLE_UNIT / 2; @@ -17817,20 +17817,20 @@ uae_u32 REGPARAM2 CPUFUNC(op_53c8_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); if (!cctrue (regs.ccrflags, 3)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 7 * CYCLE_UNIT / 2; } } else { } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2; } @@ -17890,7 +17890,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_53f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); {{ int val = cctrue (regs.ccrflags, 3) ? 0xff : 0; put_byte (srca,val); }}}}}return 11 * CYCLE_UNIT / 2; @@ -17922,7 +17922,7 @@ return 11 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_53fa_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s16 dummy = get_iword (2); - if (cctrue (regs.ccrflags, 3)) { Exception (7, regs); goto l_1012; } + if (cctrue (regs.ccrflags, 3)) { Exception (7); goto l_1012; } }} m68k_incpc (4); l_1012: ; return 10 * CYCLE_UNIT / 2; @@ -17933,7 +17933,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_53fb_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s32 dummy; dummy = get_ilong (2); - if (cctrue (regs.ccrflags, 3)) { Exception (7, regs); goto l_1013; } + if (cctrue (regs.ccrflags, 3)) { Exception (7); goto l_1013; } }} m68k_incpc (6); l_1013: ; return 10 * CYCLE_UNIT / 2; @@ -17942,7 +17942,7 @@ return 10 * CYCLE_UNIT / 2; /* TRAPcc.L (LS) */ uae_u32 REGPARAM2 CPUFUNC(op_53fc_0)(uae_u32 opcode, struct regstruct ®s) { -{ if (cctrue (regs.ccrflags, 3)) { Exception (7, regs); goto l_1014; } +{ if (cctrue (regs.ccrflags, 3)) { Exception (7); goto l_1014; } } m68k_incpc (2); l_1014: ; return 10 * CYCLE_UNIT / 2; @@ -17964,20 +17964,20 @@ uae_u32 REGPARAM2 CPUFUNC(op_54c8_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); if (!cctrue (regs.ccrflags, 4)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 7 * CYCLE_UNIT / 2; } } else { } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2; } @@ -18037,7 +18037,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_54f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); {{ int val = cctrue (regs.ccrflags, 4) ? 0xff : 0; put_byte (srca,val); }}}}}return 11 * CYCLE_UNIT / 2; @@ -18069,7 +18069,7 @@ return 11 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_54fa_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s16 dummy = get_iword (2); - if (cctrue (regs.ccrflags, 4)) { Exception (7, regs); goto l_1024; } + if (cctrue (regs.ccrflags, 4)) { Exception (7); goto l_1024; } }} m68k_incpc (4); l_1024: ; return 10 * CYCLE_UNIT / 2; @@ -18080,7 +18080,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_54fb_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s32 dummy; dummy = get_ilong (2); - if (cctrue (regs.ccrflags, 4)) { Exception (7, regs); goto l_1025; } + if (cctrue (regs.ccrflags, 4)) { Exception (7); goto l_1025; } }} m68k_incpc (6); l_1025: ; return 10 * CYCLE_UNIT / 2; @@ -18089,7 +18089,7 @@ return 10 * CYCLE_UNIT / 2; /* TRAPcc.L (CC) */ uae_u32 REGPARAM2 CPUFUNC(op_54fc_0)(uae_u32 opcode, struct regstruct ®s) { -{ if (cctrue (regs.ccrflags, 4)) { Exception (7, regs); goto l_1026; } +{ if (cctrue (regs.ccrflags, 4)) { Exception (7); goto l_1026; } } m68k_incpc (2); l_1026: ; return 10 * CYCLE_UNIT / 2; @@ -18111,20 +18111,20 @@ uae_u32 REGPARAM2 CPUFUNC(op_55c8_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); if (!cctrue (regs.ccrflags, 5)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 7 * CYCLE_UNIT / 2; } } else { } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2; } @@ -18184,7 +18184,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_55f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); {{ int val = cctrue (regs.ccrflags, 5) ? 0xff : 0; put_byte (srca,val); }}}}}return 11 * CYCLE_UNIT / 2; @@ -18216,7 +18216,7 @@ return 11 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_55fa_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s16 dummy = get_iword (2); - if (cctrue (regs.ccrflags, 5)) { Exception (7, regs); goto l_1036; } + if (cctrue (regs.ccrflags, 5)) { Exception (7); goto l_1036; } }} m68k_incpc (4); l_1036: ; return 10 * CYCLE_UNIT / 2; @@ -18227,7 +18227,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_55fb_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s32 dummy; dummy = get_ilong (2); - if (cctrue (regs.ccrflags, 5)) { Exception (7, regs); goto l_1037; } + if (cctrue (regs.ccrflags, 5)) { Exception (7); goto l_1037; } }} m68k_incpc (6); l_1037: ; return 10 * CYCLE_UNIT / 2; @@ -18236,7 +18236,7 @@ return 10 * CYCLE_UNIT / 2; /* TRAPcc.L (CS) */ uae_u32 REGPARAM2 CPUFUNC(op_55fc_0)(uae_u32 opcode, struct regstruct ®s) { -{ if (cctrue (regs.ccrflags, 5)) { Exception (7, regs); goto l_1038; } +{ if (cctrue (regs.ccrflags, 5)) { Exception (7); goto l_1038; } } m68k_incpc (2); l_1038: ; return 10 * CYCLE_UNIT / 2; @@ -18258,20 +18258,20 @@ uae_u32 REGPARAM2 CPUFUNC(op_56c8_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); if (!cctrue (regs.ccrflags, 6)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 7 * CYCLE_UNIT / 2; } } else { } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2; } @@ -18331,7 +18331,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_56f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); {{ int val = cctrue (regs.ccrflags, 6) ? 0xff : 0; put_byte (srca,val); }}}}}return 11 * CYCLE_UNIT / 2; @@ -18363,7 +18363,7 @@ return 11 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_56fa_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s16 dummy = get_iword (2); - if (cctrue (regs.ccrflags, 6)) { Exception (7, regs); goto l_1048; } + if (cctrue (regs.ccrflags, 6)) { Exception (7); goto l_1048; } }} m68k_incpc (4); l_1048: ; return 10 * CYCLE_UNIT / 2; @@ -18374,7 +18374,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_56fb_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s32 dummy; dummy = get_ilong (2); - if (cctrue (regs.ccrflags, 6)) { Exception (7, regs); goto l_1049; } + if (cctrue (regs.ccrflags, 6)) { Exception (7); goto l_1049; } }} m68k_incpc (6); l_1049: ; return 10 * CYCLE_UNIT / 2; @@ -18383,7 +18383,7 @@ return 10 * CYCLE_UNIT / 2; /* TRAPcc.L (NE) */ uae_u32 REGPARAM2 CPUFUNC(op_56fc_0)(uae_u32 opcode, struct regstruct ®s) { -{ if (cctrue (regs.ccrflags, 6)) { Exception (7, regs); goto l_1050; } +{ if (cctrue (regs.ccrflags, 6)) { Exception (7); goto l_1050; } } m68k_incpc (2); l_1050: ; return 10 * CYCLE_UNIT / 2; @@ -18405,20 +18405,20 @@ uae_u32 REGPARAM2 CPUFUNC(op_57c8_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); if (!cctrue (regs.ccrflags, 7)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 7 * CYCLE_UNIT / 2; } } else { } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2; } @@ -18478,7 +18478,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_57f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); {{ int val = cctrue (regs.ccrflags, 7) ? 0xff : 0; put_byte (srca,val); }}}}}return 11 * CYCLE_UNIT / 2; @@ -18510,7 +18510,7 @@ return 11 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_57fa_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s16 dummy = get_iword (2); - if (cctrue (regs.ccrflags, 7)) { Exception (7, regs); goto l_1060; } + if (cctrue (regs.ccrflags, 7)) { Exception (7); goto l_1060; } }} m68k_incpc (4); l_1060: ; return 10 * CYCLE_UNIT / 2; @@ -18521,7 +18521,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_57fb_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s32 dummy; dummy = get_ilong (2); - if (cctrue (regs.ccrflags, 7)) { Exception (7, regs); goto l_1061; } + if (cctrue (regs.ccrflags, 7)) { Exception (7); goto l_1061; } }} m68k_incpc (6); l_1061: ; return 10 * CYCLE_UNIT / 2; @@ -18530,7 +18530,7 @@ return 10 * CYCLE_UNIT / 2; /* TRAPcc.L (EQ) */ uae_u32 REGPARAM2 CPUFUNC(op_57fc_0)(uae_u32 opcode, struct regstruct ®s) { -{ if (cctrue (regs.ccrflags, 7)) { Exception (7, regs); goto l_1062; } +{ if (cctrue (regs.ccrflags, 7)) { Exception (7); goto l_1062; } } m68k_incpc (2); l_1062: ; return 10 * CYCLE_UNIT / 2; @@ -18552,20 +18552,20 @@ uae_u32 REGPARAM2 CPUFUNC(op_58c8_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); if (!cctrue (regs.ccrflags, 8)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 7 * CYCLE_UNIT / 2; } } else { } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2; } @@ -18625,7 +18625,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_58f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); {{ int val = cctrue (regs.ccrflags, 8) ? 0xff : 0; put_byte (srca,val); }}}}}return 11 * CYCLE_UNIT / 2; @@ -18657,7 +18657,7 @@ return 11 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_58fa_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s16 dummy = get_iword (2); - if (cctrue (regs.ccrflags, 8)) { Exception (7, regs); goto l_1072; } + if (cctrue (regs.ccrflags, 8)) { Exception (7); goto l_1072; } }} m68k_incpc (4); l_1072: ; return 10 * CYCLE_UNIT / 2; @@ -18668,7 +18668,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_58fb_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s32 dummy; dummy = get_ilong (2); - if (cctrue (regs.ccrflags, 8)) { Exception (7, regs); goto l_1073; } + if (cctrue (regs.ccrflags, 8)) { Exception (7); goto l_1073; } }} m68k_incpc (6); l_1073: ; return 10 * CYCLE_UNIT / 2; @@ -18677,7 +18677,7 @@ return 10 * CYCLE_UNIT / 2; /* TRAPcc.L (VC) */ uae_u32 REGPARAM2 CPUFUNC(op_58fc_0)(uae_u32 opcode, struct regstruct ®s) { -{ if (cctrue (regs.ccrflags, 8)) { Exception (7, regs); goto l_1074; } +{ if (cctrue (regs.ccrflags, 8)) { Exception (7); goto l_1074; } } m68k_incpc (2); l_1074: ; return 10 * CYCLE_UNIT / 2; @@ -18699,20 +18699,20 @@ uae_u32 REGPARAM2 CPUFUNC(op_59c8_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); if (!cctrue (regs.ccrflags, 9)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 7 * CYCLE_UNIT / 2; } } else { } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2; } @@ -18772,7 +18772,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_59f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); {{ int val = cctrue (regs.ccrflags, 9) ? 0xff : 0; put_byte (srca,val); }}}}}return 11 * CYCLE_UNIT / 2; @@ -18804,7 +18804,7 @@ return 11 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_59fa_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s16 dummy = get_iword (2); - if (cctrue (regs.ccrflags, 9)) { Exception (7, regs); goto l_1084; } + if (cctrue (regs.ccrflags, 9)) { Exception (7); goto l_1084; } }} m68k_incpc (4); l_1084: ; return 10 * CYCLE_UNIT / 2; @@ -18815,7 +18815,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_59fb_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s32 dummy; dummy = get_ilong (2); - if (cctrue (regs.ccrflags, 9)) { Exception (7, regs); goto l_1085; } + if (cctrue (regs.ccrflags, 9)) { Exception (7); goto l_1085; } }} m68k_incpc (6); l_1085: ; return 10 * CYCLE_UNIT / 2; @@ -18824,7 +18824,7 @@ return 10 * CYCLE_UNIT / 2; /* TRAPcc.L (VS) */ uae_u32 REGPARAM2 CPUFUNC(op_59fc_0)(uae_u32 opcode, struct regstruct ®s) { -{ if (cctrue (regs.ccrflags, 9)) { Exception (7, regs); goto l_1086; } +{ if (cctrue (regs.ccrflags, 9)) { Exception (7); goto l_1086; } } m68k_incpc (2); l_1086: ; return 10 * CYCLE_UNIT / 2; @@ -18846,20 +18846,20 @@ uae_u32 REGPARAM2 CPUFUNC(op_5ac8_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); if (!cctrue (regs.ccrflags, 10)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 7 * CYCLE_UNIT / 2; } } else { } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2; } @@ -18919,7 +18919,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5af0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); {{ int val = cctrue (regs.ccrflags, 10) ? 0xff : 0; put_byte (srca,val); }}}}}return 11 * CYCLE_UNIT / 2; @@ -18951,7 +18951,7 @@ return 11 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_5afa_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s16 dummy = get_iword (2); - if (cctrue (regs.ccrflags, 10)) { Exception (7, regs); goto l_1096; } + if (cctrue (regs.ccrflags, 10)) { Exception (7); goto l_1096; } }} m68k_incpc (4); l_1096: ; return 10 * CYCLE_UNIT / 2; @@ -18962,7 +18962,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5afb_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s32 dummy; dummy = get_ilong (2); - if (cctrue (regs.ccrflags, 10)) { Exception (7, regs); goto l_1097; } + if (cctrue (regs.ccrflags, 10)) { Exception (7); goto l_1097; } }} m68k_incpc (6); l_1097: ; return 10 * CYCLE_UNIT / 2; @@ -18971,7 +18971,7 @@ return 10 * CYCLE_UNIT / 2; /* TRAPcc.L (PL) */ uae_u32 REGPARAM2 CPUFUNC(op_5afc_0)(uae_u32 opcode, struct regstruct ®s) { -{ if (cctrue (regs.ccrflags, 10)) { Exception (7, regs); goto l_1098; } +{ if (cctrue (regs.ccrflags, 10)) { Exception (7); goto l_1098; } } m68k_incpc (2); l_1098: ; return 10 * CYCLE_UNIT / 2; @@ -18993,20 +18993,20 @@ uae_u32 REGPARAM2 CPUFUNC(op_5bc8_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); if (!cctrue (regs.ccrflags, 11)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 7 * CYCLE_UNIT / 2; } } else { } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2; } @@ -19066,7 +19066,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5bf0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); {{ int val = cctrue (regs.ccrflags, 11) ? 0xff : 0; put_byte (srca,val); }}}}}return 11 * CYCLE_UNIT / 2; @@ -19098,7 +19098,7 @@ return 11 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_5bfa_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s16 dummy = get_iword (2); - if (cctrue (regs.ccrflags, 11)) { Exception (7, regs); goto l_1108; } + if (cctrue (regs.ccrflags, 11)) { Exception (7); goto l_1108; } }} m68k_incpc (4); l_1108: ; return 10 * CYCLE_UNIT / 2; @@ -19109,7 +19109,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5bfb_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s32 dummy; dummy = get_ilong (2); - if (cctrue (regs.ccrflags, 11)) { Exception (7, regs); goto l_1109; } + if (cctrue (regs.ccrflags, 11)) { Exception (7); goto l_1109; } }} m68k_incpc (6); l_1109: ; return 10 * CYCLE_UNIT / 2; @@ -19118,7 +19118,7 @@ return 10 * CYCLE_UNIT / 2; /* TRAPcc.L (MI) */ uae_u32 REGPARAM2 CPUFUNC(op_5bfc_0)(uae_u32 opcode, struct regstruct ®s) { -{ if (cctrue (regs.ccrflags, 11)) { Exception (7, regs); goto l_1110; } +{ if (cctrue (regs.ccrflags, 11)) { Exception (7); goto l_1110; } } m68k_incpc (2); l_1110: ; return 10 * CYCLE_UNIT / 2; @@ -19140,20 +19140,20 @@ uae_u32 REGPARAM2 CPUFUNC(op_5cc8_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); if (!cctrue (regs.ccrflags, 12)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 7 * CYCLE_UNIT / 2; } } else { } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2; } @@ -19213,7 +19213,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5cf0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); {{ int val = cctrue (regs.ccrflags, 12) ? 0xff : 0; put_byte (srca,val); }}}}}return 11 * CYCLE_UNIT / 2; @@ -19245,7 +19245,7 @@ return 11 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_5cfa_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s16 dummy = get_iword (2); - if (cctrue (regs.ccrflags, 12)) { Exception (7, regs); goto l_1120; } + if (cctrue (regs.ccrflags, 12)) { Exception (7); goto l_1120; } }} m68k_incpc (4); l_1120: ; return 10 * CYCLE_UNIT / 2; @@ -19256,7 +19256,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5cfb_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s32 dummy; dummy = get_ilong (2); - if (cctrue (regs.ccrflags, 12)) { Exception (7, regs); goto l_1121; } + if (cctrue (regs.ccrflags, 12)) { Exception (7); goto l_1121; } }} m68k_incpc (6); l_1121: ; return 10 * CYCLE_UNIT / 2; @@ -19265,7 +19265,7 @@ return 10 * CYCLE_UNIT / 2; /* TRAPcc.L (GE) */ uae_u32 REGPARAM2 CPUFUNC(op_5cfc_0)(uae_u32 opcode, struct regstruct ®s) { -{ if (cctrue (regs.ccrflags, 12)) { Exception (7, regs); goto l_1122; } +{ if (cctrue (regs.ccrflags, 12)) { Exception (7); goto l_1122; } } m68k_incpc (2); l_1122: ; return 10 * CYCLE_UNIT / 2; @@ -19287,20 +19287,20 @@ uae_u32 REGPARAM2 CPUFUNC(op_5dc8_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); if (!cctrue (regs.ccrflags, 13)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 7 * CYCLE_UNIT / 2; } } else { } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2; } @@ -19360,7 +19360,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5df0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); {{ int val = cctrue (regs.ccrflags, 13) ? 0xff : 0; put_byte (srca,val); }}}}}return 11 * CYCLE_UNIT / 2; @@ -19392,7 +19392,7 @@ return 11 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_5dfa_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s16 dummy = get_iword (2); - if (cctrue (regs.ccrflags, 13)) { Exception (7, regs); goto l_1132; } + if (cctrue (regs.ccrflags, 13)) { Exception (7); goto l_1132; } }} m68k_incpc (4); l_1132: ; return 10 * CYCLE_UNIT / 2; @@ -19403,7 +19403,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5dfb_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s32 dummy; dummy = get_ilong (2); - if (cctrue (regs.ccrflags, 13)) { Exception (7, regs); goto l_1133; } + if (cctrue (regs.ccrflags, 13)) { Exception (7); goto l_1133; } }} m68k_incpc (6); l_1133: ; return 10 * CYCLE_UNIT / 2; @@ -19412,7 +19412,7 @@ return 10 * CYCLE_UNIT / 2; /* TRAPcc.L (LT) */ uae_u32 REGPARAM2 CPUFUNC(op_5dfc_0)(uae_u32 opcode, struct regstruct ®s) { -{ if (cctrue (regs.ccrflags, 13)) { Exception (7, regs); goto l_1134; } +{ if (cctrue (regs.ccrflags, 13)) { Exception (7); goto l_1134; } } m68k_incpc (2); l_1134: ; return 10 * CYCLE_UNIT / 2; @@ -19434,20 +19434,20 @@ uae_u32 REGPARAM2 CPUFUNC(op_5ec8_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); if (!cctrue (regs.ccrflags, 14)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 7 * CYCLE_UNIT / 2; } } else { } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2; } @@ -19507,7 +19507,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5ef0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); {{ int val = cctrue (regs.ccrflags, 14) ? 0xff : 0; put_byte (srca,val); }}}}}return 11 * CYCLE_UNIT / 2; @@ -19539,7 +19539,7 @@ return 11 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_5efa_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s16 dummy = get_iword (2); - if (cctrue (regs.ccrflags, 14)) { Exception (7, regs); goto l_1144; } + if (cctrue (regs.ccrflags, 14)) { Exception (7); goto l_1144; } }} m68k_incpc (4); l_1144: ; return 10 * CYCLE_UNIT / 2; @@ -19550,7 +19550,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5efb_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s32 dummy; dummy = get_ilong (2); - if (cctrue (regs.ccrflags, 14)) { Exception (7, regs); goto l_1145; } + if (cctrue (regs.ccrflags, 14)) { Exception (7); goto l_1145; } }} m68k_incpc (6); l_1145: ; return 10 * CYCLE_UNIT / 2; @@ -19559,7 +19559,7 @@ return 10 * CYCLE_UNIT / 2; /* TRAPcc.L (GT) */ uae_u32 REGPARAM2 CPUFUNC(op_5efc_0)(uae_u32 opcode, struct regstruct ®s) { -{ if (cctrue (regs.ccrflags, 14)) { Exception (7, regs); goto l_1146; } +{ if (cctrue (regs.ccrflags, 14)) { Exception (7); goto l_1146; } } m68k_incpc (2); l_1146: ; return 10 * CYCLE_UNIT / 2; @@ -19581,20 +19581,20 @@ uae_u32 REGPARAM2 CPUFUNC(op_5fc8_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); if (!cctrue (regs.ccrflags, 15)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 7 * CYCLE_UNIT / 2; } } else { } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2; } @@ -19654,7 +19654,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5ff0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); {{ int val = cctrue (regs.ccrflags, 15) ? 0xff : 0; put_byte (srca,val); }}}}}return 11 * CYCLE_UNIT / 2; @@ -19686,7 +19686,7 @@ return 11 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_5ffa_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s16 dummy = get_iword (2); - if (cctrue (regs.ccrflags, 15)) { Exception (7, regs); goto l_1156; } + if (cctrue (regs.ccrflags, 15)) { Exception (7); goto l_1156; } }} m68k_incpc (4); l_1156: ; return 10 * CYCLE_UNIT / 2; @@ -19697,7 +19697,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5ffb_0)(uae_u32 opcode, struct regstruct ®s) { {{ uae_s32 dummy; dummy = get_ilong (2); - if (cctrue (regs.ccrflags, 15)) { Exception (7, regs); goto l_1157; } + if (cctrue (regs.ccrflags, 15)) { Exception (7); goto l_1157; } }} m68k_incpc (6); l_1157: ; return 10 * CYCLE_UNIT / 2; @@ -19706,7 +19706,7 @@ return 10 * CYCLE_UNIT / 2; /* TRAPcc.L (LE) */ uae_u32 REGPARAM2 CPUFUNC(op_5ffc_0)(uae_u32 opcode, struct regstruct ®s) { -{ if (cctrue (regs.ccrflags, 15)) { Exception (7, regs); goto l_1158; } +{ if (cctrue (regs.ccrflags, 15)) { Exception (7); goto l_1158; } } m68k_incpc (2); l_1158: ; return 10 * CYCLE_UNIT / 2; @@ -19718,7 +19718,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6000_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); if (!cctrue (regs.ccrflags, 0)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 10 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -19735,7 +19735,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6001_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 0)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -19752,7 +19752,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_60ff_0)(uae_u32 opcode, struct regstruct ®s) src = get_ilong (2); if (!cctrue (regs.ccrflags, 0)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 14 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -19769,10 +19769,10 @@ uae_u32 REGPARAM2 CPUFUNC(op_6100_0)(uae_u32 opcode, struct regstruct ®s) { uae_s16 src = get_iword (2); s = (uae_s32)src + 2; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + s); + exception3 (opcode, m68k_getpc () + s, 0, 1, m68k_getpc () + s); return 8 * CYCLE_UNIT / 2; } - m68k_do_bsr (regs, m68k_getpc (regs) + 4, s); + m68k_do_bsr (regs, m68k_getpc () + 4, s); }}return 13 * CYCLE_UNIT / 2; } @@ -19784,10 +19784,10 @@ uae_u32 REGPARAM2 CPUFUNC(op_6101_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 src = srcreg; s = (uae_s32)src + 2; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + s); + exception3 (opcode, m68k_getpc () + s, 0, 1, m68k_getpc () + s); return 4 * CYCLE_UNIT / 2; } - m68k_do_bsr (regs, m68k_getpc (regs) + 2, s); + m68k_do_bsr (regs, m68k_getpc () + 2, s); }}return 13 * CYCLE_UNIT / 2; } @@ -19799,10 +19799,10 @@ uae_u32 REGPARAM2 CPUFUNC(op_61ff_0)(uae_u32 opcode, struct regstruct ®s) src = get_ilong (2); s = (uae_s32)src + 2; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + s); + exception3 (opcode, m68k_getpc () + s, 0, 1, m68k_getpc () + s); return 12 * CYCLE_UNIT / 2; } - m68k_do_bsr (regs, m68k_getpc (regs) + 6, s); + m68k_do_bsr (regs, m68k_getpc () + 6, s); }}return 13 * CYCLE_UNIT / 2; } @@ -19812,7 +19812,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6200_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); if (!cctrue (regs.ccrflags, 2)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -19829,7 +19829,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6201_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 2)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -19839,9 +19839,6 @@ didnt_jump:; }}return 5 * CYCLE_UNIT / 2; } -#endif - -#ifdef PART_6 /* Bcc.L #.L (HI) */ uae_u32 REGPARAM2 CPUFUNC(op_62ff_0)(uae_u32 opcode, struct regstruct ®s) { @@ -19849,7 +19846,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_62ff_0)(uae_u32 opcode, struct regstruct ®s) src = get_ilong (2); if (!cctrue (regs.ccrflags, 2)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -19865,7 +19862,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6300_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); if (!cctrue (regs.ccrflags, 3)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -19882,7 +19879,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6301_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 3)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -19892,6 +19889,9 @@ didnt_jump:; }}return 5 * CYCLE_UNIT / 2; } +#endif + +#ifdef PART_6 /* Bcc.L #.L (LS) */ uae_u32 REGPARAM2 CPUFUNC(op_63ff_0)(uae_u32 opcode, struct regstruct ®s) { @@ -19899,7 +19899,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_63ff_0)(uae_u32 opcode, struct regstruct ®s) src = get_ilong (2); if (!cctrue (regs.ccrflags, 3)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -19915,7 +19915,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6400_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); if (!cctrue (regs.ccrflags, 4)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -19932,7 +19932,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6401_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 4)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -19949,7 +19949,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_64ff_0)(uae_u32 opcode, struct regstruct ®s) src = get_ilong (2); if (!cctrue (regs.ccrflags, 4)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -19965,7 +19965,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6500_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); if (!cctrue (regs.ccrflags, 5)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -19982,7 +19982,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6501_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 5)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -19999,7 +19999,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_65ff_0)(uae_u32 opcode, struct regstruct ®s) src = get_ilong (2); if (!cctrue (regs.ccrflags, 5)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20015,7 +20015,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6600_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); if (!cctrue (regs.ccrflags, 6)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20032,7 +20032,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6601_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 6)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20049,7 +20049,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_66ff_0)(uae_u32 opcode, struct regstruct ®s) src = get_ilong (2); if (!cctrue (regs.ccrflags, 6)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20065,7 +20065,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6700_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); if (!cctrue (regs.ccrflags, 7)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20082,7 +20082,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6701_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 7)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20099,7 +20099,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_67ff_0)(uae_u32 opcode, struct regstruct ®s) src = get_ilong (2); if (!cctrue (regs.ccrflags, 7)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20115,7 +20115,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6800_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); if (!cctrue (regs.ccrflags, 8)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20132,7 +20132,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6801_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 8)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20149,7 +20149,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_68ff_0)(uae_u32 opcode, struct regstruct ®s) src = get_ilong (2); if (!cctrue (regs.ccrflags, 8)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20165,7 +20165,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6900_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); if (!cctrue (regs.ccrflags, 9)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20182,7 +20182,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6901_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 9)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20199,7 +20199,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_69ff_0)(uae_u32 opcode, struct regstruct ®s) src = get_ilong (2); if (!cctrue (regs.ccrflags, 9)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20215,7 +20215,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6a00_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); if (!cctrue (regs.ccrflags, 10)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20232,7 +20232,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6a01_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 10)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20249,7 +20249,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6aff_0)(uae_u32 opcode, struct regstruct ®s) src = get_ilong (2); if (!cctrue (regs.ccrflags, 10)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20265,7 +20265,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6b00_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); if (!cctrue (regs.ccrflags, 11)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20282,7 +20282,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6b01_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 11)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20299,7 +20299,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6bff_0)(uae_u32 opcode, struct regstruct ®s) src = get_ilong (2); if (!cctrue (regs.ccrflags, 11)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20315,7 +20315,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6c00_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); if (!cctrue (regs.ccrflags, 12)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20332,7 +20332,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6c01_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 12)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20349,7 +20349,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6cff_0)(uae_u32 opcode, struct regstruct ®s) src = get_ilong (2); if (!cctrue (regs.ccrflags, 12)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20365,7 +20365,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6d00_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); if (!cctrue (regs.ccrflags, 13)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20382,7 +20382,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6d01_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 13)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20399,7 +20399,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6dff_0)(uae_u32 opcode, struct regstruct ®s) src = get_ilong (2); if (!cctrue (regs.ccrflags, 13)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20415,7 +20415,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6e00_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); if (!cctrue (regs.ccrflags, 14)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20432,7 +20432,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6e01_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 14)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20449,7 +20449,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6eff_0)(uae_u32 opcode, struct regstruct ®s) src = get_ilong (2); if (!cctrue (regs.ccrflags, 14)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20465,7 +20465,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6f00_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); if (!cctrue (regs.ccrflags, 15)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20482,7 +20482,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6f01_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 15)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20499,7 +20499,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6fff_0)(uae_u32 opcode, struct regstruct ®s) src = get_ilong (2); if (!cctrue (regs.ccrflags, 15)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 7 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -20620,7 +20620,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_8030_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); src |= dst; @@ -20670,7 +20670,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_803a_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); @@ -20690,8 +20690,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_803b_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); src |= dst; @@ -20814,7 +20814,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_8070_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); src |= dst; @@ -20864,7 +20864,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_807a_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); @@ -20884,8 +20884,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_807b_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); src |= dst; @@ -21008,7 +21008,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80b0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); src |= dst; @@ -21058,7 +21058,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80ba_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); @@ -21078,8 +21078,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_80bb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); src |= dst; @@ -21118,7 +21118,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80c0_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); if (dst < 0) SET_NFLG (1); m68k_incpc (2); - Exception (5, regs); + Exception (5); return 4 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -21152,7 +21152,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80d0_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); if (dst < 0) SET_NFLG (1); m68k_incpc (2); - Exception (5, regs); + Exception (5); return 8 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -21187,7 +21187,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80d8_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); if (dst < 0) SET_NFLG (1); m68k_incpc (2); - Exception (5, regs); + Exception (5); return 8 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -21222,7 +21222,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80e0_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); if (dst < 0) SET_NFLG (1); m68k_incpc (2); - Exception (5, regs); + Exception (5); return 10 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -21256,7 +21256,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80e8_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); if (dst < 0) SET_NFLG (1); m68k_incpc (4); - Exception (5, regs); + Exception (5); return 12 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -21283,7 +21283,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 src = get_word (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); CLEAR_CZNV (); @@ -21291,7 +21291,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80f0_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); if (dst < 0) SET_NFLG (1); m68k_incpc (0); - Exception (5, regs); + Exception (5); return 8 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -21323,7 +21323,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80f8_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); if (dst < 0) SET_NFLG (1); m68k_incpc (4); - Exception (5, regs); + Exception (5); return 12 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -21356,7 +21356,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80f9_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); if (dst < 0) SET_NFLG (1); m68k_incpc (6); - Exception (5, regs); + Exception (5); return 16 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -21381,7 +21381,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80fa_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); @@ -21390,7 +21390,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80fa_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); if (dst < 0) SET_NFLG (1); m68k_incpc (4); - Exception (5, regs); + Exception (5); return 12 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -21417,8 +21417,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_80fb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s16 src = get_word (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); CLEAR_CZNV (); @@ -21426,7 +21426,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80fb_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); if (dst < 0) SET_NFLG (1); m68k_incpc (0); - Exception (5, regs); + Exception (5); return 8 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -21456,7 +21456,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80fc_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); if (dst < 0) SET_NFLG (1); m68k_incpc (4); - Exception (5, regs); + Exception (5); return 8 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -21608,7 +21608,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_8130_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s8 src = m68k_dreg (regs, srcreg); { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s8 dst = get_byte (dsta); src |= dst; CLEAR_CZNV (); @@ -21761,7 +21761,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_8170_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = m68k_dreg (regs, srcreg); { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s16 dst = get_word (dsta); src |= dst; CLEAR_CZNV (); @@ -21915,7 +21915,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81b0_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s32 src = m68k_dreg (regs, srcreg); { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s32 dst = get_long (dsta); src |= dst; CLEAR_CZNV (); @@ -21970,7 +21970,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81c0_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); SET_ZFLG (1); m68k_incpc (2); - Exception (5, regs); + Exception (5); return 4 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -22009,7 +22009,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81d0_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); SET_ZFLG (1); m68k_incpc (2); - Exception (5, regs); + Exception (5); return 8 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -22049,7 +22049,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81d8_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); SET_ZFLG (1); m68k_incpc (2); - Exception (5, regs); + Exception (5); return 8 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -22089,7 +22089,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81e0_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); SET_ZFLG (1); m68k_incpc (2); - Exception (5, regs); + Exception (5); return 10 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -22128,7 +22128,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81e8_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); SET_ZFLG (1); m68k_incpc (4); - Exception (5, regs); + Exception (5); return 12 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -22161,14 +22161,14 @@ uae_u32 REGPARAM2 CPUFUNC(op_81f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 src = get_word (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); if (src == 0) { SET_VFLG (1); SET_ZFLG (1); m68k_incpc (0); - Exception (5, regs); + Exception (5); return 8 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -22205,7 +22205,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81f8_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); SET_ZFLG (1); m68k_incpc (4); - Exception (5, regs); + Exception (5); return 12 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -22243,7 +22243,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81f9_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); SET_ZFLG (1); m68k_incpc (6); - Exception (5, regs); + Exception (5); return 16 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -22274,7 +22274,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81fa_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); @@ -22282,7 +22282,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81fa_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); SET_ZFLG (1); m68k_incpc (4); - Exception (5, regs); + Exception (5); return 12 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -22315,15 +22315,15 @@ uae_u32 REGPARAM2 CPUFUNC(op_81fb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s16 src = get_word (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); if (src == 0) { SET_VFLG (1); SET_ZFLG (1); m68k_incpc (0); - Exception (5, regs); + Exception (5); return 8 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -22358,7 +22358,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81fc_0)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); SET_ZFLG (1); m68k_incpc (4); - Exception (5, regs); + Exception (5); return 8 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -22506,7 +22506,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_9030_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); {{uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); @@ -22571,7 +22571,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_903a_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); @@ -22596,8 +22596,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_903b_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); {{uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); @@ -22776,7 +22776,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_9070_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); {{uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); @@ -22841,7 +22841,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_907a_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); @@ -22866,8 +22866,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_907b_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); {{uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); @@ -23046,7 +23046,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_90b0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); {{uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); @@ -23111,7 +23111,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_90ba_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); @@ -23136,8 +23136,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_90bb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); {{uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); @@ -23269,7 +23269,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_90f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg (regs, dstreg); { uae_u32 newv = dst - src; @@ -23310,7 +23310,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_90fa_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg (regs, dstreg); @@ -23327,8 +23327,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_90fb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg (regs, dstreg); { uae_u32 newv = dst - src; @@ -23498,7 +23498,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_9130_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s8 src = m68k_dreg (regs, srcreg); { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s8 dst = get_byte (dsta); {{uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); { int flgs = ((uae_s8)(src)) < 0; @@ -23707,7 +23707,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_9170_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = m68k_dreg (regs, srcreg); { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s16 dst = get_word (dsta); {{uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); { int flgs = ((uae_s16)(src)) < 0; @@ -23916,7 +23916,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_91b0_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s32 src = m68k_dreg (regs, srcreg); { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s32 dst = get_long (dsta); {{uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); { int flgs = ((uae_s32)(src)) < 0; @@ -24070,7 +24070,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_91f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_areg (regs, dstreg); { uae_u32 newv = dst - src; @@ -24111,7 +24111,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_91fa_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_areg (regs, dstreg); @@ -24128,8 +24128,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_91fb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_areg (regs, dstreg); { uae_u32 newv = dst - src; @@ -24262,7 +24262,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b030_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); {{uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); @@ -24321,7 +24321,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b03a_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); @@ -24344,8 +24344,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_b03b_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); {{uae_u32 newv = ((uae_u8)(dst)) - ((uae_u8)(src)); @@ -24508,7 +24508,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b070_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); {{uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); @@ -24567,7 +24567,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b07a_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); @@ -24590,8 +24590,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_b07b_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); {{uae_u32 newv = ((uae_u16)(dst)) - ((uae_u16)(src)); @@ -24661,9 +24661,6 @@ uae_u32 REGPARAM2 CPUFUNC(op_b088_0)(uae_u32 opcode, struct regstruct ®s) return 3 * CYCLE_UNIT / 2; } -#endif - -#ifdef PART_7 /* CMP.L (An),Dn */ uae_u32 REGPARAM2 CPUFUNC(op_b090_0)(uae_u32 opcode, struct regstruct ®s) { @@ -24729,6 +24726,9 @@ uae_u32 REGPARAM2 CPUFUNC(op_b0a0_0)(uae_u32 opcode, struct regstruct ®s) return 8 * CYCLE_UNIT / 2; } +#endif + +#ifdef PART_7 /* CMP.L (d16,An),Dn */ uae_u32 REGPARAM2 CPUFUNC(op_b0a8_0)(uae_u32 opcode, struct regstruct ®s) { @@ -24757,7 +24757,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b0b0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); {{uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); @@ -24816,7 +24816,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b0ba_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); @@ -24839,8 +24839,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_b0bb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); {{uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); @@ -25004,7 +25004,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b0f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg (regs, dstreg); {{uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); @@ -25063,7 +25063,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b0fa_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg (regs, dstreg); @@ -25086,8 +25086,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_b0fb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg (regs, dstreg); {{uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); @@ -25242,7 +25242,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b130_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s8 src = m68k_dreg (regs, srcreg); { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s8 dst = get_byte (dsta); src ^= dst; CLEAR_CZNV (); @@ -25409,7 +25409,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b170_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = m68k_dreg (regs, srcreg); { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s16 dst = get_word (dsta); src ^= dst; CLEAR_CZNV (); @@ -25576,7 +25576,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b1b0_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s32 src = m68k_dreg (regs, srcreg); { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s32 dst = get_long (dsta); src ^= dst; CLEAR_CZNV (); @@ -25751,7 +25751,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b1f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_areg (regs, dstreg); {{uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); @@ -25810,7 +25810,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b1fa_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_areg (regs, dstreg); @@ -25833,8 +25833,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_b1fb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_areg (regs, dstreg); {{uae_u32 newv = ((uae_u32)(dst)) - ((uae_u32)(src)); @@ -25964,7 +25964,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c030_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); src &= dst; @@ -26014,7 +26014,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c03a_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); @@ -26034,8 +26034,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_c03b_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); src &= dst; @@ -26158,7 +26158,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c070_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); src &= dst; @@ -26208,7 +26208,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c07a_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); @@ -26228,8 +26228,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_c07b_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); src &= dst; @@ -26352,7 +26352,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c0b0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); src &= dst; @@ -26402,7 +26402,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c0ba_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); @@ -26422,8 +26422,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_c0bb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); src &= dst; @@ -26547,7 +26547,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c0f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); { uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; @@ -26597,7 +26597,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c0fa_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); @@ -26617,8 +26617,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_c0fb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); { uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; @@ -26778,7 +26778,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c130_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s8 src = m68k_dreg (regs, srcreg); { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s8 dst = get_byte (dsta); src &= dst; CLEAR_CZNV (); @@ -26930,7 +26930,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c170_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = m68k_dreg (regs, srcreg); { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s16 dst = get_word (dsta); src &= dst; CLEAR_CZNV (); @@ -27069,7 +27069,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c1b0_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s32 src = m68k_dreg (regs, srcreg); { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s32 dst = get_long (dsta); src &= dst; CLEAR_CZNV (); @@ -27210,7 +27210,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c1f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); { uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; @@ -27260,7 +27260,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c1fa_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); @@ -27280,8 +27280,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_c1fb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); { uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; @@ -27429,7 +27429,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d030_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); {{uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); @@ -27494,7 +27494,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d03a_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); @@ -27519,8 +27519,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_d03b_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); {{uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); @@ -27699,7 +27699,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d070_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); {{uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); @@ -27764,7 +27764,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d07a_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); @@ -27789,8 +27789,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_d07b_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); {{uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); @@ -27969,7 +27969,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d0b0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); {{uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); @@ -28034,7 +28034,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d0ba_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); @@ -28059,8 +28059,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_d0bb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); {{uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); @@ -28192,7 +28192,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d0f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg (regs, dstreg); { uae_u32 newv = dst + src; @@ -28233,7 +28233,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d0fa_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg (regs, dstreg); @@ -28250,8 +28250,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_d0fb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg (regs, dstreg); { uae_u32 newv = dst + src; @@ -28421,7 +28421,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d130_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s8 src = m68k_dreg (regs, srcreg); { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s8 dst = get_byte (dsta); {{uae_u32 newv = ((uae_u8)(dst)) + ((uae_u8)(src)); { int flgs = ((uae_s8)(src)) < 0; @@ -28630,7 +28630,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d170_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = m68k_dreg (regs, srcreg); { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s16 dst = get_word (dsta); {{uae_u32 newv = ((uae_u16)(dst)) + ((uae_u16)(src)); { int flgs = ((uae_s16)(src)) < 0; @@ -28839,7 +28839,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d1b0_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s32 src = m68k_dreg (regs, srcreg); { uaecptr dsta; m68k_incpc (2); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_s32 dst = get_long (dsta); {{uae_u32 newv = ((uae_u32)(dst)) + ((uae_u32)(src)); { int flgs = ((uae_s32)(src)) < 0; @@ -28993,7 +28993,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d1f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_areg (regs, dstreg); { uae_u32 newv = dst + src; @@ -29034,7 +29034,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d1fa_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_areg (regs, dstreg); @@ -29051,8 +29051,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_d1fb_0)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr tmppc; uaecptr srca; m68k_incpc (2); -{ tmppc = m68k_getpc (regs); - srca = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + srca = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_areg (regs, dstreg); { uae_u32 newv = dst + src; @@ -29215,9 +29215,6 @@ uae_u32 REGPARAM2 CPUFUNC(op_e020_0)(uae_u32 opcode, struct regstruct ®s) return 6 * CYCLE_UNIT / 2; } -#endif - -#ifdef PART_8 /* LSR.B Dn,Dn */ uae_u32 REGPARAM2 CPUFUNC(op_e028_0)(uae_u32 opcode, struct regstruct ®s) { @@ -29334,6 +29331,9 @@ uae_u32 REGPARAM2 CPUFUNC(op_e040_0)(uae_u32 opcode, struct regstruct ®s) return 6 * CYCLE_UNIT / 2; } +#endif + +#ifdef PART_8 /* LSRQ.W #,Dn */ uae_u32 REGPARAM2 CPUFUNC(op_e048_0)(uae_u32 opcode, struct regstruct ®s) { @@ -29849,7 +29849,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_e0f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr dataa; m68k_incpc (2); -{ dataa = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ dataa = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 data = get_word (dataa); { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; @@ -30682,7 +30682,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_e1f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr dataa; m68k_incpc (2); -{ dataa = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ dataa = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 data = get_word (dataa); { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; @@ -30831,7 +30831,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_e2f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr dataa; m68k_incpc (2); -{ dataa = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ dataa = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 data = get_word (dataa); { uae_u32 val = (uae_u16)data; uae_u32 carry = val & 1; @@ -30971,7 +30971,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_e3f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr dataa; m68k_incpc (2); -{ dataa = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ dataa = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 data = get_word (dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; @@ -31115,7 +31115,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_e4f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr dataa; m68k_incpc (2); -{ dataa = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ dataa = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 data = get_word (dataa); { uae_u16 val = data; uae_u32 carry = val & 1; @@ -31262,7 +31262,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_e5f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr dataa; m68k_incpc (2); -{ dataa = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ dataa = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 data = get_word (dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; @@ -31405,7 +31405,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_e6f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr dataa; m68k_incpc (2); -{ dataa = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ dataa = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 data = get_word (dataa); { uae_u16 val = data; uae_u32 carry = val & 1; @@ -31545,7 +31545,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_e7f0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr dataa; m68k_incpc (2); -{ dataa = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ dataa = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s16 data = get_word (dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; @@ -31663,7 +31663,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_e8f0_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 extra = get_iword (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_u32 bdata[2]; uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; @@ -31720,7 +31720,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_e8fa_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = 2; {{ uae_s16 extra = get_iword (2); { uaecptr dsta; - dsta = m68k_getpc (regs) + 4; + dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword (4); { uae_u32 bdata[2]; uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; @@ -31743,8 +31743,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_e8fb_0)(uae_u32 opcode, struct regstruct ®s) { uaecptr tmppc; uaecptr dsta; m68k_incpc (4); -{ tmppc = m68k_getpc (regs); - dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + dsta = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_u32 bdata[2]; uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; @@ -31826,7 +31826,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_e9f0_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 extra = get_iword (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_u32 bdata[2]; uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; @@ -31886,7 +31886,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_e9fa_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = 2; {{ uae_s16 extra = get_iword (2); { uaecptr dsta; - dsta = m68k_getpc (regs) + 4; + dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword (4); { uae_u32 bdata[2]; uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; @@ -31910,8 +31910,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_e9fb_0)(uae_u32 opcode, struct regstruct ®s) { uaecptr tmppc; uaecptr dsta; m68k_incpc (4); -{ tmppc = m68k_getpc (regs); - dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + dsta = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_u32 bdata[2]; uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; @@ -31998,7 +31998,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_eaf0_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 extra = get_iword (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_u32 bdata[2]; uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; @@ -32124,7 +32124,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_ebf0_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 extra = get_iword (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_u32 bdata[2]; uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; @@ -32184,7 +32184,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_ebfa_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = 2; {{ uae_s16 extra = get_iword (2); { uaecptr dsta; - dsta = m68k_getpc (regs) + 4; + dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword (4); { uae_u32 bdata[2]; uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; @@ -32208,8 +32208,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_ebfb_0)(uae_u32 opcode, struct regstruct ®s) { uaecptr tmppc; uaecptr dsta; m68k_incpc (4); -{ tmppc = m68k_getpc (regs); - dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + dsta = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_u32 bdata[2]; uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; @@ -32296,7 +32296,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_ecf0_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 extra = get_iword (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_u32 bdata[2]; uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; @@ -32431,7 +32431,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_edf0_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 extra = get_iword (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_u32 bdata[2]; uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; @@ -32500,7 +32500,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_edfa_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = 2; {{ uae_s16 extra = get_iword (2); { uaecptr dsta; - dsta = m68k_getpc (regs) + 4; + dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword (4); { uae_u32 bdata[2]; uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; @@ -32527,8 +32527,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_edfb_0)(uae_u32 opcode, struct regstruct ®s) { uaecptr tmppc; uaecptr dsta; m68k_incpc (4); -{ tmppc = m68k_getpc (regs); - dsta = get_disp_ea_020 (regs, tmppc, next_iword (regs)); +{ tmppc = m68k_getpc (); + dsta = get_disp_ea_020 (tmppc, next_iword (regs)); { uae_u32 bdata[2]; uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; @@ -32618,7 +32618,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_eef0_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 extra = get_iword (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_u32 bdata[2]; uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; @@ -32757,7 +32757,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_eff0_0)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 extra = get_iword (2); { uaecptr dsta; m68k_incpc (4); -{ dsta = get_disp_ea_020 (regs, m68k_areg (regs, dstreg), next_iword (regs)); +{ dsta = get_disp_ea_020 (m68k_areg (regs, dstreg), next_iword (regs)); { uae_u32 bdata[2]; uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; @@ -32823,12 +32823,38 @@ uae_u32 REGPARAM2 CPUFUNC(op_eff9_0)(uae_u32 opcode, struct regstruct ®s) return 21 * CYCLE_UNIT / 2; } +/* MMUOP030.L Dn,#.W */ +uae_u32 REGPARAM2 CPUFUNC(op_f000_0)(uae_u32 opcode, struct regstruct ®s) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } +{ uaecptr pc = m68k_getpc (); + uae_u16 extra = get_iword (2); + m68k_incpc (4); + uae_u16 extraa = 0; + mmu_op30 (pc, opcode, regs, extra, extraa); +}}return 4 * CYCLE_UNIT / 2; +} + +/* MMUOP030.L An,#.W */ +uae_u32 REGPARAM2 CPUFUNC(op_f008_0)(uae_u32 opcode, struct regstruct ®s) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } +{ uaecptr pc = m68k_getpc (); + uae_u16 extra = get_iword (2); + m68k_incpc (4); + uae_u16 extraa = 0; + mmu_op30 (pc, opcode, regs, extra, extraa); +}}return 4 * CYCLE_UNIT / 2; +} + /* MMUOP030.L (An),#.W */ uae_u32 REGPARAM2 CPUFUNC(op_f010_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } -{ uaecptr pc = m68k_getpc (regs); +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } +{ uaecptr pc = m68k_getpc (); uae_u16 extra = get_iword (2); m68k_incpc (4); { uaecptr extraa; @@ -32837,12 +32863,42 @@ uae_u32 REGPARAM2 CPUFUNC(op_f010_0)(uae_u32 opcode, struct regstruct ®s) }}}return 4 * CYCLE_UNIT / 2; } +/* MMUOP030.L (An)+,#.W */ +uae_u32 REGPARAM2 CPUFUNC(op_f018_0)(uae_u32 opcode, struct regstruct ®s) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } +{ uaecptr pc = m68k_getpc (); + uae_u16 extra = get_iword (2); + m68k_incpc (4); +{ uaecptr extraa; + extraa = m68k_areg (regs, srcreg); + m68k_areg (regs, srcreg) += 4; + mmu_op30 (pc, opcode, regs, extra, extraa); +}}}return 4 * CYCLE_UNIT / 2; +} + +/* MMUOP030.L -(An),#.W */ +uae_u32 REGPARAM2 CPUFUNC(op_f020_0)(uae_u32 opcode, struct regstruct ®s) +{ + uae_u32 srcreg = (opcode & 7); +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } +{ uaecptr pc = m68k_getpc (); + uae_u16 extra = get_iword (2); + m68k_incpc (4); +{ uaecptr extraa; + extraa = m68k_areg (regs, srcreg) - 4; + m68k_areg (regs, srcreg) = extraa; + mmu_op30 (pc, opcode, regs, extra, extraa); +}}}return 6 * CYCLE_UNIT / 2; +} + /* MMUOP030.L (d16,An),#.W */ uae_u32 REGPARAM2 CPUFUNC(op_f028_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } -{ uaecptr pc = m68k_getpc (regs); +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } +{ uaecptr pc = m68k_getpc (); uae_u16 extra = get_iword (2); m68k_incpc (4); { uaecptr extraa; @@ -32856,12 +32912,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_f028_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_f030_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } -{ uaecptr pc = m68k_getpc (regs); +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } +{ uaecptr pc = m68k_getpc (); uae_u16 extra = get_iword (2); m68k_incpc (4); { uaecptr extraa; -{ extraa = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ extraa = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); mmu_op30 (pc, opcode, regs, extra, extraa); }}}}return 8 * CYCLE_UNIT / 2; } @@ -32869,8 +32925,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_f030_0)(uae_u32 opcode, struct regstruct ®s) /* MMUOP030.L (xxx).W,#.W */ uae_u32 REGPARAM2 CPUFUNC(op_f038_0)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } -{ uaecptr pc = m68k_getpc (regs); +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } +{ uaecptr pc = m68k_getpc (); uae_u16 extra = get_iword (2); m68k_incpc (4); { uaecptr extraa; @@ -32883,8 +32939,8 @@ uae_u32 REGPARAM2 CPUFUNC(op_f038_0)(uae_u32 opcode, struct regstruct ®s) /* MMUOP030.L (xxx).L,#.W */ uae_u32 REGPARAM2 CPUFUNC(op_f039_0)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } -{ uaecptr pc = m68k_getpc (regs); +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } +{ uaecptr pc = m68k_getpc (); uae_u16 extra = get_iword (2); m68k_incpc (4); { uaecptr extraa; @@ -33188,7 +33244,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_f27a_0)(uae_u32 opcode, struct regstruct ®s) { { #ifdef FPUEMU - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); uae_u16 extra = get_iword (2); { uae_s16 dummy = get_iword (4); m68k_incpc (6); @@ -33203,7 +33259,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_f27b_0)(uae_u32 opcode, struct regstruct ®s) { { #ifdef FPUEMU - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); uae_u16 extra = get_iword (2); { uae_s32 dummy; dummy = get_ilong (4); @@ -33219,7 +33275,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_f27c_0)(uae_u32 opcode, struct regstruct ®s) { { #ifdef FPUEMU - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); uae_u16 extra = get_iword (2); m68k_incpc (4); fpuop_trapcc (opcode, regs, oldpc, extra); @@ -33235,7 +33291,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_f280_0)(uae_u32 opcode, struct regstruct ®s) { #ifdef FPUEMU m68k_incpc (2); -{ uaecptr pc = m68k_getpc (regs); +{ uaecptr pc = m68k_getpc (); { uae_s16 extra = get_iword (0); m68k_incpc (2); fpuop_bcc (opcode, regs, pc,extra); @@ -33251,7 +33307,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_f2c0_0)(uae_u32 opcode, struct regstruct ®s) { #ifdef FPUEMU m68k_incpc (2); -{ uaecptr pc = m68k_getpc (regs); +{ uaecptr pc = m68k_getpc (); { uae_s32 extra; extra = get_ilong (0); m68k_incpc (4); @@ -33265,7 +33321,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_f2c0_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_f310_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { #ifdef FPUEMU m68k_incpc (2); @@ -33279,7 +33335,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_f310_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_f320_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { #ifdef FPUEMU m68k_incpc (2); @@ -33293,7 +33349,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_f320_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_f328_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { #ifdef FPUEMU m68k_incpc (2); @@ -33307,7 +33363,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_f328_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_f330_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { #ifdef FPUEMU m68k_incpc (2); @@ -33320,7 +33376,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_f330_0)(uae_u32 opcode, struct regstruct ®s) /* FSAVE.L (xxx).W */ uae_u32 REGPARAM2 CPUFUNC(op_f338_0)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { #ifdef FPUEMU m68k_incpc (2); @@ -33333,7 +33389,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_f338_0)(uae_u32 opcode, struct regstruct ®s) /* FSAVE.L (xxx).L */ uae_u32 REGPARAM2 CPUFUNC(op_f339_0)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { #ifdef FPUEMU m68k_incpc (2); @@ -33347,7 +33403,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_f339_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_f350_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { #ifdef FPUEMU m68k_incpc (2); @@ -33361,7 +33417,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_f350_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_f358_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { #ifdef FPUEMU m68k_incpc (2); @@ -33375,7 +33431,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_f358_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_f368_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { #ifdef FPUEMU m68k_incpc (2); @@ -33389,7 +33445,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_f368_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_f370_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { #ifdef FPUEMU m68k_incpc (2); @@ -33402,7 +33458,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_f370_0)(uae_u32 opcode, struct regstruct ®s) /* FRESTORE.L (xxx).W */ uae_u32 REGPARAM2 CPUFUNC(op_f378_0)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { #ifdef FPUEMU m68k_incpc (2); @@ -33415,7 +33471,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_f378_0)(uae_u32 opcode, struct regstruct ®s) /* FRESTORE.L (xxx).L */ uae_u32 REGPARAM2 CPUFUNC(op_f379_0)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { #ifdef FPUEMU m68k_incpc (2); @@ -33428,7 +33484,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_f379_0)(uae_u32 opcode, struct regstruct ®s) /* FRESTORE.L (d16,PC) */ uae_u32 REGPARAM2 CPUFUNC(op_f37a_0)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { #ifdef FPUEMU m68k_incpc (2); @@ -33441,7 +33497,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_f37a_0)(uae_u32 opcode, struct regstruct ®s) /* FRESTORE.L (d8,PC,Xn) */ uae_u32 REGPARAM2 CPUFUNC(op_f37b_0)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { #ifdef FPUEMU m68k_incpc (2); @@ -33456,7 +33512,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_f408_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = ((opcode >> 6) & 3); uae_u32 dstreg = opcode & 7; -{if (!regs.s) { Exception(8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { if (opcode & 0x80) flush_icache(m68k_areg (regs, opcode & 3), (opcode >> 6) & 3); }} m68k_incpc (2); @@ -33468,7 +33524,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_f410_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = ((opcode >> 6) & 3); uae_u32 dstreg = opcode & 7; -{if (!regs.s) { Exception(8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { if (opcode & 0x80) flush_icache(m68k_areg (regs, opcode & 3), (opcode >> 6) & 3); }} m68k_incpc (2); @@ -33479,7 +33535,7 @@ return 4 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_f418_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs.s) { Exception(8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { if (opcode & 0x80) flush_icache(m68k_areg (regs, opcode & 3), (opcode >> 6) & 3); }} m68k_incpc (2); @@ -33490,7 +33546,7 @@ return 4 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_f419_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs.s) { Exception(8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { if (opcode & 0x80) flush_icache(m68k_areg (regs, opcode & 3), (opcode >> 6) & 3); }} m68k_incpc (2); @@ -33501,7 +33557,7 @@ return 4 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_f41a_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs.s) { Exception(8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { if (opcode & 0x80) flush_icache(m68k_areg (regs, opcode & 3), (opcode >> 6) & 3); }} m68k_incpc (2); @@ -33512,7 +33568,7 @@ return 4 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_f41b_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs.s) { Exception(8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { if (opcode & 0x80) flush_icache(m68k_areg (regs, opcode & 3), (opcode >> 6) & 3); }} m68k_incpc (2); @@ -33523,7 +33579,7 @@ return 4 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_f41c_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs.s) { Exception(8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { if (opcode & 0x80) flush_icache(m68k_areg (regs, opcode & 3), (opcode >> 6) & 3); }} m68k_incpc (2); @@ -33534,7 +33590,7 @@ return 4 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_f41d_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs.s) { Exception(8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { if (opcode & 0x80) flush_icache(m68k_areg (regs, opcode & 3), (opcode >> 6) & 3); }} m68k_incpc (2); @@ -33545,7 +33601,7 @@ return 4 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_f41e_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs.s) { Exception(8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { if (opcode & 0x80) flush_icache(m68k_areg (regs, opcode & 3), (opcode >> 6) & 3); }} m68k_incpc (2); @@ -33556,7 +33612,7 @@ return 4 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_f41f_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs.s) { Exception(8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { if (opcode & 0x80) flush_icache(m68k_areg (regs, opcode & 3), (opcode >> 6) & 3); }} m68k_incpc (2); @@ -33568,7 +33624,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_f428_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = ((opcode >> 6) & 3); uae_u32 dstreg = opcode & 7; -{if (!regs.s) { Exception(8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { if (opcode & 0x80) flush_icache(m68k_areg (regs, opcode & 3), (opcode >> 6) & 3); }} m68k_incpc (2); @@ -33580,7 +33636,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_f430_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = ((opcode >> 6) & 3); uae_u32 dstreg = opcode & 7; -{if (!regs.s) { Exception(8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { if (opcode & 0x80) flush_icache(m68k_areg (regs, opcode & 3), (opcode >> 6) & 3); }} m68k_incpc (2); @@ -33591,7 +33647,7 @@ return 4 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_f438_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs.s) { Exception(8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { if (opcode & 0x80) flush_icache(m68k_areg (regs, opcode & 3), (opcode >> 6) & 3); }} m68k_incpc (2); @@ -33602,7 +33658,7 @@ return 4 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_f439_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs.s) { Exception(8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { if (opcode & 0x80) flush_icache(m68k_areg (regs, opcode & 3), (opcode >> 6) & 3); }} m68k_incpc (2); @@ -33613,7 +33669,7 @@ return 4 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_f43a_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs.s) { Exception(8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { if (opcode & 0x80) flush_icache(m68k_areg (regs, opcode & 3), (opcode >> 6) & 3); }} m68k_incpc (2); @@ -33624,7 +33680,7 @@ return 4 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_f43b_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs.s) { Exception(8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { if (opcode & 0x80) flush_icache(m68k_areg (regs, opcode & 3), (opcode >> 6) & 3); }} m68k_incpc (2); @@ -33635,7 +33691,7 @@ return 4 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_f43c_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs.s) { Exception(8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { if (opcode & 0x80) flush_icache(m68k_areg (regs, opcode & 3), (opcode >> 6) & 3); }} m68k_incpc (2); @@ -33646,7 +33702,7 @@ return 4 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_f43d_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs.s) { Exception(8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { if (opcode & 0x80) flush_icache(m68k_areg (regs, opcode & 3), (opcode >> 6) & 3); }} m68k_incpc (2); @@ -33657,7 +33713,7 @@ return 4 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_f43e_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs.s) { Exception(8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { if (opcode & 0x80) flush_icache(m68k_areg (regs, opcode & 3), (opcode >> 6) & 3); }} m68k_incpc (2); @@ -33668,7 +33724,7 @@ return 4 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_f43f_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = ((opcode >> 6) & 3); -{if (!regs.s) { Exception(8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { if (opcode & 0x80) flush_icache(m68k_areg (regs, opcode & 3), (opcode >> 6) & 3); }} m68k_incpc (2); @@ -33679,7 +33735,7 @@ return 4 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_f500_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { m68k_incpc (2); mmu_op (opcode, regs, 0); }}return 12 * CYCLE_UNIT / 2; @@ -33689,7 +33745,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_f500_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_f508_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { m68k_incpc (2); mmu_op (opcode, regs, 0); }}return 12 * CYCLE_UNIT / 2; @@ -33699,7 +33755,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_f508_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_f510_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { m68k_incpc (2); mmu_op (opcode, regs, 0); }}return 12 * CYCLE_UNIT / 2; @@ -33709,7 +33765,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_f510_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_f518_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { m68k_incpc (2); mmu_op (opcode, regs, 0); }}return 12 * CYCLE_UNIT / 2; @@ -33719,7 +33775,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_f518_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_f548_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { m68k_incpc (2); mmu_op (opcode, regs, 0); }}return 12 * CYCLE_UNIT / 2; @@ -33729,7 +33785,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_f548_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_f568_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { m68k_incpc (2); mmu_op (opcode, regs, 0); }}return 12 * CYCLE_UNIT / 2; @@ -33739,7 +33795,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_f568_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_f588_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { m68k_incpc (2); mmu_op (opcode, regs, 0); }}return 12 * CYCLE_UNIT / 2; @@ -33749,7 +33805,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_f588_0)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_f5c8_0)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { m68k_incpc (2); mmu_op (opcode, regs, 0); }}return 12 * CYCLE_UNIT / 2; @@ -33876,12 +33932,12 @@ return 8 * CYCLE_UNIT / 2; /* LPSTOP.L #.W */ uae_u32 REGPARAM2 CPUFUNC(op_f800_0)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { uae_u16 sw = get_iword (2); uae_u16 sr; - if (sw != (0x100|0x80|0x40)) { Exception (4, regs); return 4 * CYCLE_UNIT / 2; } + if (sw != (0x100|0x80|0x40)) { Exception (4); return 4 * CYCLE_UNIT / 2; } sr = get_iword (4); - if (!(sr & 0x8000)) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } + if (!(sr & 0x8000)) { Exception (8); return 4 * CYCLE_UNIT / 2; } regs.sr = sr; MakeFromSR (regs); m68k_setstopped(); @@ -34080,7 +34136,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4830_2)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; m68k_incpc (2); -{ srca = get_disp_ea_020 (regs, m68k_areg (regs, srcreg), next_iword (regs)); +{ srca = get_disp_ea_020 (m68k_areg (regs, srcreg), next_iword (regs)); { uae_s8 src = get_byte (srca); { uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG () ? 1 : 0); uae_u16 newv_hi = - (src & 0xF0); diff --git a/src/cpuemu_11.cpp b/src/cpuemu_11.cpp index 9fede147..c8d3364b 100644 --- a/src/cpuemu_11.cpp +++ b/src/cpuemu_11.cpp @@ -398,7 +398,7 @@ return 24 * CYCLE_UNIT / 2 + count_cycles; uae_u32 REGPARAM2 CPUFUNC(op_007c_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { MakeSR (regs); { uae_s16 src = get_word_prefetch (regs, 4); m68k_incpc (4); @@ -786,7 +786,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_013a_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = 2; {{ uae_s8 src = m68k_dreg (regs, srcreg); { uaecptr dsta; - dsta = m68k_getpc (regs) + 2; + dsta = m68k_getpc () + 2; dsta += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 dst = get_byte (dsta); regs.ir = regs.irc; @@ -806,7 +806,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_013b_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_s8 src = m68k_dreg (regs, srcreg); { uaecptr tmppc; uaecptr dsta; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; dsta = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); { uae_s8 dst = get_byte (dsta); regs.ir = regs.irc; @@ -1735,7 +1735,7 @@ return 24 * CYCLE_UNIT / 2 + count_cycles; uae_u32 REGPARAM2 CPUFUNC(op_027c_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { MakeSR (regs); { uae_s16 src = get_word_prefetch (regs, 4); m68k_incpc (4); @@ -3465,7 +3465,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_083a_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = 2; {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr dsta; - dsta = m68k_getpc (regs) + 4; + dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_word_prefetch (regs, 6); { uae_s8 dst = get_byte (dsta); regs.ir = regs.irc; @@ -3484,7 +3484,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_083b_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_word_prefetch (regs, 4); { uaecptr tmppc; uaecptr dsta; - tmppc = m68k_getpc (regs) + 4; + tmppc = m68k_getpc () + 4; dsta = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 6)); { uae_s8 dst = get_byte (dsta); regs.ir = regs.irc; @@ -4338,7 +4338,7 @@ return 24 * CYCLE_UNIT / 2 + count_cycles; uae_u32 REGPARAM2 CPUFUNC(op_0a7c_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { MakeSR (regs); { uae_s16 src = get_word_prefetch (regs, 4); m68k_incpc (4); @@ -5355,7 +5355,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_103a_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); { CLEAR_CZNV (); @@ -5375,7 +5375,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_103b_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); { uae_s8 src = get_byte (srca); { CLEAR_CZNV (); @@ -5577,7 +5577,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_10ba_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -5599,7 +5599,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_10bb_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -5813,7 +5813,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_10fa_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -5836,7 +5836,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_10fb_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -6052,7 +6052,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_113a_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -6075,7 +6075,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_113b_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -6283,7 +6283,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_117a_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -6305,7 +6305,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_117b_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -6511,7 +6511,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_11ba_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -6533,7 +6533,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_11bb_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -6730,7 +6730,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_11fa_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -6751,7 +6751,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_11fb_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -6962,7 +6962,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_13fa_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -6985,7 +6985,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_13fb_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -7229,7 +7229,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_203a_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -7254,7 +7254,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_203b_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -7472,7 +7472,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_207a_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -7494,7 +7494,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_207b_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -7796,7 +7796,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_20ba_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -7828,7 +7828,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_20bb_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -8159,7 +8159,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_20fa_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -8192,7 +8192,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_20fb_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -8525,7 +8525,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_213a_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -8558,7 +8558,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_213b_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -8882,7 +8882,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_217a_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -8914,7 +8914,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_217b_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -9012,9 +9012,6 @@ uae_u32 REGPARAM2 CPUFUNC(op_2188_11)(uae_u32 opcode, struct regstruct ®s) }}}}return 18 * CYCLE_UNIT / 2 + count_cycles; } /* 18 (2/2) */ -#endif - -#ifdef PART_3 /* MOVE.L (An),(d8,An,Xn) */ uae_u32 REGPARAM2 CPUFUNC(op_2190_11)(uae_u32 opcode, struct regstruct ®s) { @@ -9046,6 +9043,9 @@ uae_u32 REGPARAM2 CPUFUNC(op_2190_11)(uae_u32 opcode, struct regstruct ®s) }}}}}}return 26 * CYCLE_UNIT / 2 + count_cycles; } /* 26 (4/2) */ +#endif + +#ifdef PART_3 /* MOVE.L (An)+,(d8,An,Xn) */ uae_u32 REGPARAM2 CPUFUNC(op_2198_11)(uae_u32 opcode, struct regstruct ®s) { @@ -9239,7 +9239,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_21ba_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -9271,7 +9271,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_21bb_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -9583,7 +9583,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_21fa_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -9614,7 +9614,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_21fb_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -9941,7 +9941,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_23fa_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -9974,7 +9974,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_23fb_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -10235,7 +10235,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_303a_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -10260,7 +10260,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_303b_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -10485,7 +10485,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_307a_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -10508,7 +10508,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_307b_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -10810,7 +10810,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_30ba_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -10842,7 +10842,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_30bb_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -11171,7 +11171,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_30fa_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -11204,7 +11204,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_30fb_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -11535,7 +11535,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_313a_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -11568,7 +11568,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_313b_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -11890,7 +11890,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_317a_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -11922,7 +11922,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_317b_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -12242,7 +12242,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_31ba_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -12274,7 +12274,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_31bb_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -12584,7 +12584,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_31fa_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -12615,7 +12615,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_31fb_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -12940,7 +12940,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_33fa_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -12973,7 +12973,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_33fb_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -13838,12 +13838,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4180_11)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (2); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 8 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 10 * CYCLE_UNIT / 2; } regs.ir = regs.irc; @@ -13869,12 +13869,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4190_11)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (2); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 12 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 14 * CYCLE_UNIT / 2; } regs.ir = regs.irc; @@ -13901,12 +13901,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4198_11)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (2); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 12 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 14 * CYCLE_UNIT / 2; } regs.ir = regs.irc; @@ -13933,12 +13933,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_41a0_11)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (2); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 14 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 16 * CYCLE_UNIT / 2; } regs.ir = regs.irc; @@ -13964,12 +13964,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_41a8_11)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (4); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 16 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 18 * CYCLE_UNIT / 2; } regs.ir = regs.irc; @@ -13995,12 +13995,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_41b0_11)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (4); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 18 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 20 * CYCLE_UNIT / 2; } regs.ir = regs.irc; @@ -14025,12 +14025,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_41b8_11)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (4); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 16 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 18 * CYCLE_UNIT / 2; } regs.ir = regs.irc; @@ -14056,12 +14056,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_41b9_11)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (6); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 20 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 22 * CYCLE_UNIT / 2; } regs.ir = regs.irc; @@ -14075,7 +14075,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_41ba_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -14087,12 +14087,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_41ba_11)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (4); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 16 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 18 * CYCLE_UNIT / 2; } regs.ir = regs.irc; @@ -14107,7 +14107,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_41bb_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -14119,12 +14119,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_41bb_11)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (4); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 18 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 20 * CYCLE_UNIT / 2; } regs.ir = regs.irc; @@ -14142,12 +14142,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_41bc_11)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (4); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 12 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 14 * CYCLE_UNIT / 2; } regs.ir = regs.irc; @@ -14235,7 +14235,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_41fa_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { regs.ir = regs.irc; get_word_prefetch (regs, 6); @@ -14251,7 +14251,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_41fb_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); { regs.ir = regs.irc; get_word_prefetch (regs, 6); @@ -15596,7 +15596,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_44fa_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -15621,7 +15621,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_44fb_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -16184,7 +16184,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_46c0_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 src = m68k_dreg (regs, srcreg); regs.sr = src; MakeFromSR(regs); @@ -16200,7 +16200,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_46d0_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = m68k_areg (regs, srcreg); if (srca & 1) { @@ -16223,7 +16223,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_46d8_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = m68k_areg (regs, srcreg); if (srca & 1) { @@ -16247,7 +16247,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_46e0_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = m68k_areg (regs, srcreg) - 2; if (srca & 1) { @@ -16271,7 +16271,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_46e8_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { @@ -16294,7 +16294,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_46f0_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_word_prefetch (regs, 4)); if (srca & 1) { @@ -16316,7 +16316,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_46f0_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_46f8_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { @@ -16338,7 +16338,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_46f8_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_46f9_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = get_word_prefetch (regs, 4) << 16; srca |= get_word_prefetch (regs, 6); @@ -16361,9 +16361,9 @@ uae_u32 REGPARAM2 CPUFUNC(op_46f9_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_46fa_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -16384,10 +16384,10 @@ uae_u32 REGPARAM2 CPUFUNC(op_46fa_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_46fb_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -16408,7 +16408,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_46fb_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_46fc_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 src = get_word_prefetch (regs, 4); regs.sr = src; MakeFromSR(regs); @@ -16773,7 +16773,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_487a_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uaecptr dsta; dsta = m68k_areg (regs, 7) - 4; @@ -16796,7 +16796,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_487b_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); { uaecptr dsta; dsta = m68k_areg (regs, 7) - 4; @@ -17366,6 +17366,20 @@ uae_u32 REGPARAM2 CPUFUNC(op_4a39_11)(uae_u32 opcode, struct regstruct ®s) return 16 * CYCLE_UNIT / 2 + count_cycles; } /* 16 (4/0) */ +/* TST.B #.B */ +uae_u32 REGPARAM2 CPUFUNC(op_4a3c_11)(uae_u32 opcode, struct regstruct ®s) +{ + int count_cycles = 0; +{{ uae_s8 src = (uae_u8)get_word_prefetch (regs, 4); + regs.ir = regs.irc; + get_word_prefetch (regs, 6); + CLEAR_CZNV (); + SET_ZFLG (((uae_s8)(src)) == 0); + SET_NFLG (((uae_s8)(src)) < 0); +}} m68k_incpc (4); +return 8 * CYCLE_UNIT / 2 + count_cycles; +} /* 8 (2/0) */ + /* TST.W Dn */ uae_u32 REGPARAM2 CPUFUNC(op_4a40_11)(uae_u32 opcode, struct regstruct ®s) { @@ -17536,6 +17550,20 @@ uae_u32 REGPARAM2 CPUFUNC(op_4a79_11)(uae_u32 opcode, struct regstruct ®s) return 16 * CYCLE_UNIT / 2 + count_cycles; } /* 16 (4/0) */ +/* TST.W #.W */ +uae_u32 REGPARAM2 CPUFUNC(op_4a7c_11)(uae_u32 opcode, struct regstruct ®s) +{ + int count_cycles = 0; +{{ uae_s16 src = get_word_prefetch (regs, 4); + regs.ir = regs.irc; + get_word_prefetch (regs, 6); + CLEAR_CZNV (); + SET_ZFLG (((uae_s16)(src)) == 0); + SET_NFLG (((uae_s16)(src)) < 0); +}} m68k_incpc (4); +return 8 * CYCLE_UNIT / 2 + count_cycles; +} /* 8 (2/0) */ + /* TST.L Dn */ uae_u32 REGPARAM2 CPUFUNC(op_4a80_11)(uae_u32 opcode, struct regstruct ®s) { @@ -17706,6 +17734,22 @@ uae_u32 REGPARAM2 CPUFUNC(op_4ab9_11)(uae_u32 opcode, struct regstruct ®s) return 20 * CYCLE_UNIT / 2 + count_cycles; } /* 20 (5/0) */ +/* TST.L #.L */ +uae_u32 REGPARAM2 CPUFUNC(op_4abc_11)(uae_u32 opcode, struct regstruct ®s) +{ + int count_cycles = 0; +{{ uae_s32 src; + src = get_word_prefetch (regs, 4) << 16; + src |= get_word_prefetch (regs, 6); + regs.ir = regs.irc; + get_word_prefetch (regs, 8); + CLEAR_CZNV (); + SET_ZFLG (((uae_s32)(src)) == 0); + SET_NFLG (((uae_s32)(src)) < 0); +}} m68k_incpc (6); +return 12 * CYCLE_UNIT / 2 + count_cycles; +} /* 12 (3/0) */ + /* TAS.B Dn */ uae_u32 REGPARAM2 CPUFUNC(op_4ac0_11)(uae_u32 opcode, struct regstruct ®s) { @@ -18057,7 +18101,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4cba_11)(uae_u32 opcode, struct regstruct ®s) { uae_u16 mask = get_word_prefetch (regs, 4); uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; { uaecptr srca; - srca = m68k_getpc (regs) + 4; + srca = m68k_getpc () + 4; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 6); if (srca & 1) { m68k_incpc (6); @@ -18091,7 +18135,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4cbb_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; { uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 4; + tmppc = m68k_getpc () + 4; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 6)); if (srca & 1) { m68k_incpc (6); @@ -18316,7 +18360,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4cfa_11)(uae_u32 opcode, struct regstruct ®s) { uae_u16 mask = get_word_prefetch (regs, 4); uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; { uaecptr srca; - srca = m68k_getpc (regs) + 4; + srca = m68k_getpc () + 4; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 6); if (srca & 1) { m68k_incpc (6); @@ -18350,7 +18394,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4cfb_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; { uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 4; + tmppc = m68k_getpc () + 4; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 6)); if (srca & 1) { m68k_incpc (6); @@ -18382,7 +18426,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e40_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 15); {{ uae_u32 src = srcreg; m68k_incpc (2); - Exception (src + 32, regs); + Exception (src + 32); }}return 34 * CYCLE_UNIT / 2 + count_cycles; } /* 34 (0/0) */ @@ -18438,7 +18482,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e60_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s32 src = m68k_areg (regs, srcreg); regs.ir = regs.irc; get_word_prefetch (regs, 4); @@ -18452,7 +18496,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e68_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ regs.ir = regs.irc; get_word_prefetch (regs, 4); m68k_areg (regs, srcreg) = (regs.usp); @@ -18464,7 +18508,7 @@ return 4 * CYCLE_UNIT / 2 + count_cycles; uae_u32 REGPARAM2 CPUFUNC(op_4e70_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { regs.ir = regs.irc; get_word_prefetch (regs, 4); cpureset (); @@ -18487,7 +18531,7 @@ return 4 * CYCLE_UNIT / 2 + count_cycles; uae_u32 REGPARAM2 CPUFUNC(op_4e72_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { regs.sr = regs.irc; MakeFromSR(regs); m68k_setstopped (); @@ -18499,7 +18543,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e72_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_4e73_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr sra; sra = m68k_areg (regs, 7); if (sra & 1) { @@ -18523,7 +18567,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e73_11)(uae_u32 opcode, struct regstruct ®s) exception3i (0x4E73, pc); return 16 * CYCLE_UNIT / 2; } - m68k_setpc (regs, pc); + m68k_setpc (pc); MakeFromSR(regs); get_word_prefetch (regs, 0); regs.ir = regs.irc; @@ -18550,7 +18594,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e74_11)(uae_u32 opcode, struct regstruct ®s) exception3i (0x4E74, pc); return 4 * CYCLE_UNIT / 2; } - m68k_setpc (regs, pc); + m68k_setpc (pc); get_word_prefetch (regs, 0); regs.ir = regs.irc; get_word_prefetch (regs, 2); @@ -18561,11 +18605,11 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e74_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_4e75_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; -{ uaecptr pc = m68k_getpc (regs); - m68k_do_rts (regs); - if (m68k_getpc (regs) & 1) { - uaecptr faultpc = m68k_getpc (regs); - m68k_setpc (regs, pc); +{ uaecptr pc = m68k_getpc (); + m68k_do_rts (); + if (m68k_getpc () & 1) { + uaecptr faultpc = m68k_getpc (); + m68k_setpc (pc); exception3i (0x4E75, faultpc); return 8 * CYCLE_UNIT / 2; } @@ -18583,7 +18627,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e76_11)(uae_u32 opcode, struct regstruct ®s) regs.ir = regs.irc; get_word_prefetch (regs, 2); if (GET_VFLG ()) { - Exception (7, regs); + Exception (7); return 4 * CYCLE_UNIT / 2; } }return 4 * CYCLE_UNIT / 2 + count_cycles; @@ -18593,7 +18637,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e76_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_4e77_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; -{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr oldpc = m68k_getpc (); MakeSR (regs); { uaecptr sra; sra = m68k_areg (regs, 7); @@ -18615,11 +18659,11 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e77_11)(uae_u32 opcode, struct regstruct ®s) m68k_areg (regs, 7) += 4; regs.sr &= 0xFF00; sr &= 0xFF; regs.sr |= sr; - m68k_setpc (regs, pc); + m68k_setpc (pc); MakeFromSR(regs); - if (m68k_getpc (regs) & 1) { - uaecptr faultpc = m68k_getpc (regs); - m68k_setpc (regs, oldpc); + if (m68k_getpc () & 1) { + uaecptr faultpc = m68k_getpc (); + m68k_setpc (oldpc); exception3i (0x4E77, faultpc); return 8 * CYCLE_UNIT / 2; } @@ -18636,12 +18680,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e90_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = m68k_areg (regs, srcreg); -{ uaecptr oldpc = m68k_getpc (regs) + 2; +{ uaecptr oldpc = m68k_getpc () + 2; if (srca & 1) { exception3i (opcode, srca); return 4 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); get_word_prefetch (regs, 0); m68k_areg (regs, 7) -= 4; put_long (m68k_areg (regs, 7), oldpc); @@ -18657,12 +18701,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4ea8_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)regs.irc; -{ uaecptr oldpc = m68k_getpc (regs) + 4; +{ uaecptr oldpc = m68k_getpc () + 4; if (srca & 1) { exception3i (opcode, srca); return 4 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); get_word_prefetch (regs, 0); m68k_areg (regs, 7) -= 4; put_long (m68k_areg (regs, 7), oldpc); @@ -18678,13 +18722,13 @@ uae_u32 REGPARAM2 CPUFUNC(op_4eb0_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), regs.irc); -{ uaecptr oldpc = m68k_getpc (regs) + 2; +{ uaecptr oldpc = m68k_getpc () + 2; if (srca & 1) { exception3i (opcode, srca); return 4 * CYCLE_UNIT / 2; } oldpc += 2; - m68k_setpc (regs, srca); + m68k_setpc (srca); get_word_prefetch (regs, 0); m68k_areg (regs, 7) -= 4; put_long (m68k_areg (regs, 7), oldpc); @@ -18699,12 +18743,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4eb8_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; {{ uaecptr srca; srca = (uae_s32)(uae_s16)regs.irc; -{ uaecptr oldpc = m68k_getpc (regs) + 4; +{ uaecptr oldpc = m68k_getpc () + 4; if (srca & 1) { exception3i (opcode, srca); return 4 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); get_word_prefetch (regs, 0); m68k_areg (regs, 7) -= 4; put_long (m68k_areg (regs, 7), oldpc); @@ -18720,12 +18764,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4eb9_11)(uae_u32 opcode, struct regstruct ®s) {{ uaecptr srca; srca = get_word_prefetch (regs, 4) << 16; srca |= regs.irc; -{ uaecptr oldpc = m68k_getpc (regs) + 6; +{ uaecptr oldpc = m68k_getpc () + 6; if (srca & 1) { exception3i (opcode, srca); return 8 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); get_word_prefetch (regs, 0); m68k_areg (regs, 7) -= 4; put_long (m68k_areg (regs, 7), oldpc); @@ -18739,14 +18783,14 @@ uae_u32 REGPARAM2 CPUFUNC(op_4eba_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)regs.irc; -{ uaecptr oldpc = m68k_getpc (regs) + 4; +{ uaecptr oldpc = m68k_getpc () + 4; if (srca & 1) { exception3i (opcode, srca); return 4 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); get_word_prefetch (regs, 0); m68k_areg (regs, 7) -= 4; put_long (m68k_areg (regs, 7), oldpc); @@ -18761,15 +18805,15 @@ uae_u32 REGPARAM2 CPUFUNC(op_4ebb_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, regs.irc); -{ uaecptr oldpc = m68k_getpc (regs) + 2; +{ uaecptr oldpc = m68k_getpc () + 2; if (srca & 1) { exception3i (opcode, srca); return 4 * CYCLE_UNIT / 2; } oldpc += 2; - m68k_setpc (regs, srca); + m68k_setpc (srca); get_word_prefetch (regs, 0); m68k_areg (regs, 7) -= 4; put_long (m68k_areg (regs, 7), oldpc); @@ -18789,7 +18833,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4ed0_11)(uae_u32 opcode, struct regstruct ®s) exception3i (opcode, srca); return 4 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); get_word_prefetch (regs, 0); regs.ir = regs.irc; get_word_prefetch (regs, 2); @@ -18807,7 +18851,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4ee8_11)(uae_u32 opcode, struct regstruct ®s) exception3i (opcode, srca); return 4 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); get_word_prefetch (regs, 0); regs.ir = regs.irc; get_word_prefetch (regs, 2); @@ -18825,7 +18869,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4ef0_11)(uae_u32 opcode, struct regstruct ®s) exception3i (opcode, srca); return 4 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); get_word_prefetch (regs, 0); regs.ir = regs.irc; get_word_prefetch (regs, 2); @@ -18842,7 +18886,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4ef8_11)(uae_u32 opcode, struct regstruct ®s) exception3i (opcode, srca); return 4 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); get_word_prefetch (regs, 0); regs.ir = regs.irc; get_word_prefetch (regs, 2); @@ -18860,7 +18904,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4ef9_11)(uae_u32 opcode, struct regstruct ®s) exception3i (opcode, srca); return 8 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); get_word_prefetch (regs, 0); regs.ir = regs.irc; get_word_prefetch (regs, 2); @@ -18872,13 +18916,13 @@ uae_u32 REGPARAM2 CPUFUNC(op_4efa_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)regs.irc; if (srca & 1) { exception3i (opcode, srca); return 4 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); get_word_prefetch (regs, 0); regs.ir = regs.irc; get_word_prefetch (regs, 2); @@ -18891,13 +18935,13 @@ uae_u32 REGPARAM2 CPUFUNC(op_4efb_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, regs.irc); if (srca & 1) { exception3i (opcode, srca); return 4 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); get_word_prefetch (regs, 0); regs.ir = regs.irc; get_word_prefetch (regs, 2); @@ -19409,9 +19453,6 @@ uae_u32 REGPARAM2 CPUFUNC(op_5088_11)(uae_u32 opcode, struct regstruct ®s) return 8 * CYCLE_UNIT / 2 + count_cycles; } /* 8 (1/0) */ -#endif - -#ifdef PART_5 /* ADDQ.L #,(An) */ uae_u32 REGPARAM2 CPUFUNC(op_5090_11)(uae_u32 opcode, struct regstruct ®s) { @@ -19475,6 +19516,9 @@ uae_u32 REGPARAM2 CPUFUNC(op_5098_11)(uae_u32 opcode, struct regstruct ®s) return 20 * CYCLE_UNIT / 2 + count_cycles; } /* 20 (3/2) */ +#endif + +#ifdef PART_5 /* ADDQ.L #,-(An) */ uae_u32 REGPARAM2 CPUFUNC(op_50a0_11)(uae_u32 opcode, struct regstruct ®s) { @@ -19652,7 +19696,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_50c8_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = regs.irc; - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 0)) { m68k_incpc ((uae_s32)offs + 2); @@ -19660,7 +19704,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_50c8_11)(uae_u32 opcode, struct regstruct ®s) m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } regs.ir = regs.irc; @@ -19671,7 +19715,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_50c8_11)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); get_word_prefetch (regs, 0); regs.ir = regs.irc; get_word_prefetch (regs, 2); @@ -20536,7 +20580,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_51c8_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = regs.irc; - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 1)) { m68k_incpc ((uae_s32)offs + 2); @@ -20544,7 +20588,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_51c8_11)(uae_u32 opcode, struct regstruct ®s) m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } regs.ir = regs.irc; @@ -20555,7 +20599,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_51c8_11)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); get_word_prefetch (regs, 0); regs.ir = regs.irc; get_word_prefetch (regs, 2); @@ -20697,7 +20741,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_52c8_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = regs.irc; - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 2)) { m68k_incpc ((uae_s32)offs + 2); @@ -20705,7 +20749,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_52c8_11)(uae_u32 opcode, struct regstruct ®s) m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } regs.ir = regs.irc; @@ -20716,7 +20760,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_52c8_11)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); get_word_prefetch (regs, 0); regs.ir = regs.irc; get_word_prefetch (regs, 2); @@ -20858,7 +20902,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_53c8_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = regs.irc; - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 3)) { m68k_incpc ((uae_s32)offs + 2); @@ -20866,7 +20910,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_53c8_11)(uae_u32 opcode, struct regstruct ®s) m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } regs.ir = regs.irc; @@ -20877,7 +20921,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_53c8_11)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); get_word_prefetch (regs, 0); regs.ir = regs.irc; get_word_prefetch (regs, 2); @@ -21019,7 +21063,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_54c8_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = regs.irc; - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 4)) { m68k_incpc ((uae_s32)offs + 2); @@ -21027,7 +21071,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_54c8_11)(uae_u32 opcode, struct regstruct ®s) m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } regs.ir = regs.irc; @@ -21038,7 +21082,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_54c8_11)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); get_word_prefetch (regs, 0); regs.ir = regs.irc; get_word_prefetch (regs, 2); @@ -21180,7 +21224,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_55c8_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = regs.irc; - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 5)) { m68k_incpc ((uae_s32)offs + 2); @@ -21188,7 +21232,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_55c8_11)(uae_u32 opcode, struct regstruct ®s) m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } regs.ir = regs.irc; @@ -21199,7 +21243,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_55c8_11)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); get_word_prefetch (regs, 0); regs.ir = regs.irc; get_word_prefetch (regs, 2); @@ -21341,7 +21385,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_56c8_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = regs.irc; - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 6)) { m68k_incpc ((uae_s32)offs + 2); @@ -21349,7 +21393,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_56c8_11)(uae_u32 opcode, struct regstruct ®s) m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } regs.ir = regs.irc; @@ -21360,7 +21404,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_56c8_11)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); get_word_prefetch (regs, 0); regs.ir = regs.irc; get_word_prefetch (regs, 2); @@ -21502,7 +21546,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_57c8_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = regs.irc; - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 7)) { m68k_incpc ((uae_s32)offs + 2); @@ -21510,7 +21554,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_57c8_11)(uae_u32 opcode, struct regstruct ®s) m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } regs.ir = regs.irc; @@ -21521,7 +21565,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_57c8_11)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); get_word_prefetch (regs, 0); regs.ir = regs.irc; get_word_prefetch (regs, 2); @@ -21663,7 +21707,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_58c8_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = regs.irc; - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 8)) { m68k_incpc ((uae_s32)offs + 2); @@ -21671,7 +21715,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_58c8_11)(uae_u32 opcode, struct regstruct ®s) m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } regs.ir = regs.irc; @@ -21682,7 +21726,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_58c8_11)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); get_word_prefetch (regs, 0); regs.ir = regs.irc; get_word_prefetch (regs, 2); @@ -21824,7 +21868,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_59c8_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = regs.irc; - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 9)) { m68k_incpc ((uae_s32)offs + 2); @@ -21832,7 +21876,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_59c8_11)(uae_u32 opcode, struct regstruct ®s) m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } regs.ir = regs.irc; @@ -21843,7 +21887,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_59c8_11)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); get_word_prefetch (regs, 0); regs.ir = regs.irc; get_word_prefetch (regs, 2); @@ -21985,7 +22029,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5ac8_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = regs.irc; - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 10)) { m68k_incpc ((uae_s32)offs + 2); @@ -21993,7 +22037,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5ac8_11)(uae_u32 opcode, struct regstruct ®s) m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } regs.ir = regs.irc; @@ -22004,7 +22048,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5ac8_11)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); get_word_prefetch (regs, 0); regs.ir = regs.irc; get_word_prefetch (regs, 2); @@ -22146,7 +22190,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5bc8_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = regs.irc; - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 11)) { m68k_incpc ((uae_s32)offs + 2); @@ -22154,7 +22198,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5bc8_11)(uae_u32 opcode, struct regstruct ®s) m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } regs.ir = regs.irc; @@ -22165,7 +22209,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5bc8_11)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); get_word_prefetch (regs, 0); regs.ir = regs.irc; get_word_prefetch (regs, 2); @@ -22307,7 +22351,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5cc8_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = regs.irc; - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 12)) { m68k_incpc ((uae_s32)offs + 2); @@ -22315,7 +22359,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5cc8_11)(uae_u32 opcode, struct regstruct ®s) m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } regs.ir = regs.irc; @@ -22326,7 +22370,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5cc8_11)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); get_word_prefetch (regs, 0); regs.ir = regs.irc; get_word_prefetch (regs, 2); @@ -22468,7 +22512,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5dc8_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = regs.irc; - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 13)) { m68k_incpc ((uae_s32)offs + 2); @@ -22476,7 +22520,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5dc8_11)(uae_u32 opcode, struct regstruct ®s) m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } regs.ir = regs.irc; @@ -22487,7 +22531,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5dc8_11)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); get_word_prefetch (regs, 0); regs.ir = regs.irc; get_word_prefetch (regs, 2); @@ -22629,7 +22673,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5ec8_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = regs.irc; - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 14)) { m68k_incpc ((uae_s32)offs + 2); @@ -22637,7 +22681,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5ec8_11)(uae_u32 opcode, struct regstruct ®s) m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } regs.ir = regs.irc; @@ -22648,7 +22692,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5ec8_11)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); get_word_prefetch (regs, 0); regs.ir = regs.irc; get_word_prefetch (regs, 2); @@ -22790,7 +22834,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5fc8_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = regs.irc; - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 15)) { m68k_incpc ((uae_s32)offs + 2); @@ -22798,7 +22842,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5fc8_11)(uae_u32 opcode, struct regstruct ®s) m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } regs.ir = regs.irc; @@ -22809,7 +22853,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5fc8_11)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); get_word_prefetch (regs, 0); regs.ir = regs.irc; get_word_prefetch (regs, 2); @@ -22936,7 +22980,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6000_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = regs.irc; if (!cctrue (regs.ccrflags, 0)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -22960,7 +23004,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6001_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 0)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -22980,7 +23024,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_60ff_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; { if (cctrue (regs.ccrflags, 0)) { - exception3i (opcode, m68k_getpc (regs) + 1); + exception3i (opcode, m68k_getpc () + 1); return 6 * CYCLE_UNIT / 2; } m68k_incpc (2); @@ -22997,10 +23041,10 @@ uae_u32 REGPARAM2 CPUFUNC(op_6100_11)(uae_u32 opcode, struct regstruct ®s) { uae_s16 src = regs.irc; s = (uae_s32)src + 2; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + s); + exception3 (opcode, m68k_getpc () + s, 0, 1, m68k_getpc () + s); return 4 * CYCLE_UNIT / 2; } - m68k_do_bsr (regs, m68k_getpc (regs) + 4, s); + m68k_do_bsr (regs, m68k_getpc () + 4, s); get_word_prefetch (regs, 0); regs.ir = regs.irc; get_word_prefetch (regs, 2); @@ -23016,10 +23060,10 @@ uae_u32 REGPARAM2 CPUFUNC(op_6101_11)(uae_u32 opcode, struct regstruct ®s) { uae_u32 src = srcreg; s = (uae_s32)src + 2; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + s); + exception3 (opcode, m68k_getpc () + s, 0, 1, m68k_getpc () + s); return 4 * CYCLE_UNIT / 2; } - m68k_do_bsr (regs, m68k_getpc (regs) + 2, s); + m68k_do_bsr (regs, m68k_getpc () + 2, s); get_word_prefetch (regs, 0); regs.ir = regs.irc; get_word_prefetch (regs, 2); @@ -23034,10 +23078,10 @@ uae_u32 REGPARAM2 CPUFUNC(op_61ff_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 src = 0xffffffff; s = (uae_s32)src + 2; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + s); + exception3 (opcode, m68k_getpc () + s, 0, 1, m68k_getpc () + s); return 4 * CYCLE_UNIT / 2; } - m68k_do_bsr (regs, m68k_getpc (regs) + 2, s); + m68k_do_bsr (regs, m68k_getpc () + 2, s); get_word_prefetch (regs, 0); regs.ir = regs.irc; get_word_prefetch (regs, 2); @@ -23051,7 +23095,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6200_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = regs.irc; if (!cctrue (regs.ccrflags, 2)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -23075,7 +23119,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6201_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 2)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -23090,15 +23134,12 @@ didnt_jump:; }}return 8 * CYCLE_UNIT / 2 + count_cycles; } /* 8 (1/0) */ -#endif - -#ifdef PART_6 /* Bcc.L #.L (HI) */ uae_u32 REGPARAM2 CPUFUNC(op_62ff_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; { if (cctrue (regs.ccrflags, 2)) { - exception3i (opcode, m68k_getpc (regs) + 1); + exception3i (opcode, m68k_getpc () + 1); return 6 * CYCLE_UNIT / 2; } m68k_incpc (2); @@ -23114,7 +23155,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6300_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = regs.irc; if (!cctrue (regs.ccrflags, 3)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -23138,7 +23179,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6301_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 3)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -23153,12 +23194,15 @@ didnt_jump:; }}return 8 * CYCLE_UNIT / 2 + count_cycles; } /* 8 (1/0) */ +#endif + +#ifdef PART_6 /* Bcc.L #.L (LS) */ uae_u32 REGPARAM2 CPUFUNC(op_63ff_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; { if (cctrue (regs.ccrflags, 3)) { - exception3i (opcode, m68k_getpc (regs) + 1); + exception3i (opcode, m68k_getpc () + 1); return 6 * CYCLE_UNIT / 2; } m68k_incpc (2); @@ -23174,7 +23218,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6400_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = regs.irc; if (!cctrue (regs.ccrflags, 4)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -23198,7 +23242,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6401_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 4)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -23218,7 +23262,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_64ff_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; { if (cctrue (regs.ccrflags, 4)) { - exception3i (opcode, m68k_getpc (regs) + 1); + exception3i (opcode, m68k_getpc () + 1); return 6 * CYCLE_UNIT / 2; } m68k_incpc (2); @@ -23234,7 +23278,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6500_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = regs.irc; if (!cctrue (regs.ccrflags, 5)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -23258,7 +23302,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6501_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 5)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -23278,7 +23322,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_65ff_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; { if (cctrue (regs.ccrflags, 5)) { - exception3i (opcode, m68k_getpc (regs) + 1); + exception3i (opcode, m68k_getpc () + 1); return 6 * CYCLE_UNIT / 2; } m68k_incpc (2); @@ -23294,7 +23338,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6600_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = regs.irc; if (!cctrue (regs.ccrflags, 6)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -23318,7 +23362,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6601_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 6)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -23338,7 +23382,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_66ff_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; { if (cctrue (regs.ccrflags, 6)) { - exception3i (opcode, m68k_getpc (regs) + 1); + exception3i (opcode, m68k_getpc () + 1); return 6 * CYCLE_UNIT / 2; } m68k_incpc (2); @@ -23354,7 +23398,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6700_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = regs.irc; if (!cctrue (regs.ccrflags, 7)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -23378,7 +23422,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6701_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 7)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -23398,7 +23442,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_67ff_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; { if (cctrue (regs.ccrflags, 7)) { - exception3i (opcode, m68k_getpc (regs) + 1); + exception3i (opcode, m68k_getpc () + 1); return 6 * CYCLE_UNIT / 2; } m68k_incpc (2); @@ -23414,7 +23458,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6800_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = regs.irc; if (!cctrue (regs.ccrflags, 8)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -23438,7 +23482,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6801_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 8)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -23458,7 +23502,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_68ff_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; { if (cctrue (regs.ccrflags, 8)) { - exception3i (opcode, m68k_getpc (regs) + 1); + exception3i (opcode, m68k_getpc () + 1); return 6 * CYCLE_UNIT / 2; } m68k_incpc (2); @@ -23474,7 +23518,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6900_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = regs.irc; if (!cctrue (regs.ccrflags, 9)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -23498,7 +23542,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6901_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 9)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -23518,7 +23562,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_69ff_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; { if (cctrue (regs.ccrflags, 9)) { - exception3i (opcode, m68k_getpc (regs) + 1); + exception3i (opcode, m68k_getpc () + 1); return 6 * CYCLE_UNIT / 2; } m68k_incpc (2); @@ -23534,7 +23578,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6a00_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = regs.irc; if (!cctrue (regs.ccrflags, 10)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -23558,7 +23602,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6a01_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 10)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -23578,7 +23622,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6aff_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; { if (cctrue (regs.ccrflags, 10)) { - exception3i (opcode, m68k_getpc (regs) + 1); + exception3i (opcode, m68k_getpc () + 1); return 6 * CYCLE_UNIT / 2; } m68k_incpc (2); @@ -23594,7 +23638,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6b00_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = regs.irc; if (!cctrue (regs.ccrflags, 11)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -23618,7 +23662,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6b01_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 11)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -23638,7 +23682,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6bff_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; { if (cctrue (regs.ccrflags, 11)) { - exception3i (opcode, m68k_getpc (regs) + 1); + exception3i (opcode, m68k_getpc () + 1); return 6 * CYCLE_UNIT / 2; } m68k_incpc (2); @@ -23654,7 +23698,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6c00_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = regs.irc; if (!cctrue (regs.ccrflags, 12)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -23678,7 +23722,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6c01_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 12)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -23698,7 +23742,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6cff_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; { if (cctrue (regs.ccrflags, 12)) { - exception3i (opcode, m68k_getpc (regs) + 1); + exception3i (opcode, m68k_getpc () + 1); return 6 * CYCLE_UNIT / 2; } m68k_incpc (2); @@ -23714,7 +23758,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6d00_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = regs.irc; if (!cctrue (regs.ccrflags, 13)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -23738,7 +23782,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6d01_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 13)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -23758,7 +23802,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6dff_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; { if (cctrue (regs.ccrflags, 13)) { - exception3i (opcode, m68k_getpc (regs) + 1); + exception3i (opcode, m68k_getpc () + 1); return 6 * CYCLE_UNIT / 2; } m68k_incpc (2); @@ -23774,7 +23818,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6e00_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = regs.irc; if (!cctrue (regs.ccrflags, 14)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -23798,7 +23842,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6e01_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 14)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -23818,7 +23862,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6eff_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; { if (cctrue (regs.ccrflags, 14)) { - exception3i (opcode, m68k_getpc (regs) + 1); + exception3i (opcode, m68k_getpc () + 1); return 6 * CYCLE_UNIT / 2; } m68k_incpc (2); @@ -23834,7 +23878,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6f00_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = regs.irc; if (!cctrue (regs.ccrflags, 15)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -23858,7 +23902,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6f01_11)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 15)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -23878,7 +23922,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6fff_11)(uae_u32 opcode, struct regstruct ®s) { int count_cycles = 0; { if (cctrue (regs.ccrflags, 15)) { - exception3i (opcode, m68k_getpc (regs) + 1); + exception3i (opcode, m68k_getpc () + 1); return 6 * CYCLE_UNIT / 2; } m68k_incpc (2); @@ -24077,7 +24121,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_803a_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); @@ -24099,7 +24143,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_803b_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); @@ -24340,7 +24384,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_807a_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -24367,7 +24411,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_807b_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -24613,7 +24657,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80ba_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -24640,7 +24684,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80bb_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -24691,7 +24735,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80c0_11)(uae_u32 opcode, struct regstruct ®s) CLEAR_CZNV (); if (src == 0) { m68k_incpc (2); - Exception (5, regs); + Exception (5); return 4 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -24732,7 +24776,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80d0_11)(uae_u32 opcode, struct regstruct ®s) CLEAR_CZNV (); if (src == 0) { m68k_incpc (2); - Exception (5, regs); + Exception (5); return 8 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -24774,7 +24818,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80d8_11)(uae_u32 opcode, struct regstruct ®s) CLEAR_CZNV (); if (src == 0) { m68k_incpc (2); - Exception (5, regs); + Exception (5); return 8 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -24816,7 +24860,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80e0_11)(uae_u32 opcode, struct regstruct ®s) CLEAR_CZNV (); if (src == 0) { m68k_incpc (2); - Exception (5, regs); + Exception (5); return 10 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -24857,7 +24901,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80e8_11)(uae_u32 opcode, struct regstruct ®s) CLEAR_CZNV (); if (src == 0) { m68k_incpc (4); - Exception (5, regs); + Exception (5); return 12 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -24898,7 +24942,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80f0_11)(uae_u32 opcode, struct regstruct ®s) CLEAR_CZNV (); if (src == 0) { m68k_incpc (4); - Exception (5, regs); + Exception (5); return 14 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -24938,7 +24982,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80f8_11)(uae_u32 opcode, struct regstruct ®s) CLEAR_CZNV (); if (src == 0) { m68k_incpc (4); - Exception (5, regs); + Exception (5); return 12 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -24979,7 +25023,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80f9_11)(uae_u32 opcode, struct regstruct ®s) CLEAR_CZNV (); if (src == 0) { m68k_incpc (6); - Exception (5, regs); + Exception (5); return 16 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -25008,7 +25052,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80fa_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -25020,7 +25064,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80fa_11)(uae_u32 opcode, struct regstruct ®s) CLEAR_CZNV (); if (src == 0) { m68k_incpc (4); - Exception (5, regs); + Exception (5); return 12 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -25050,7 +25094,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80fb_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -25062,7 +25106,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80fb_11)(uae_u32 opcode, struct regstruct ®s) CLEAR_CZNV (); if (src == 0) { m68k_incpc (4); - Exception (5, regs); + Exception (5); return 14 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -25095,7 +25139,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80fc_11)(uae_u32 opcode, struct regstruct ®s) CLEAR_CZNV (); if (src == 0) { m68k_incpc (4); - Exception (5, regs); + Exception (5); return 8 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -25702,7 +25746,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81c0_11)(uae_u32 opcode, struct regstruct ®s) { uae_s32 dst = m68k_dreg (regs, dstreg); if (src == 0) { m68k_incpc (2); - Exception (5, regs); + Exception (5); return 4 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -25748,7 +25792,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81d0_11)(uae_u32 opcode, struct regstruct ®s) { uae_s32 dst = m68k_dreg (regs, dstreg); if (src == 0) { m68k_incpc (2); - Exception (5, regs); + Exception (5); return 8 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -25795,7 +25839,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81d8_11)(uae_u32 opcode, struct regstruct ®s) { uae_s32 dst = m68k_dreg (regs, dstreg); if (src == 0) { m68k_incpc (2); - Exception (5, regs); + Exception (5); return 8 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -25842,7 +25886,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81e0_11)(uae_u32 opcode, struct regstruct ®s) { uae_s32 dst = m68k_dreg (regs, dstreg); if (src == 0) { m68k_incpc (2); - Exception (5, regs); + Exception (5); return 10 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -25888,7 +25932,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81e8_11)(uae_u32 opcode, struct regstruct ®s) { uae_s32 dst = m68k_dreg (regs, dstreg); if (src == 0) { m68k_incpc (4); - Exception (5, regs); + Exception (5); return 12 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -25934,7 +25978,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81f0_11)(uae_u32 opcode, struct regstruct ®s) { uae_s32 dst = m68k_dreg (regs, dstreg); if (src == 0) { m68k_incpc (4); - Exception (5, regs); + Exception (5); return 14 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -25979,7 +26023,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81f8_11)(uae_u32 opcode, struct regstruct ®s) { uae_s32 dst = m68k_dreg (regs, dstreg); if (src == 0) { m68k_incpc (4); - Exception (5, regs); + Exception (5); return 12 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -26025,7 +26069,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81f9_11)(uae_u32 opcode, struct regstruct ®s) { uae_s32 dst = m68k_dreg (regs, dstreg); if (src == 0) { m68k_incpc (6); - Exception (5, regs); + Exception (5); return 16 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -26060,7 +26104,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81fa_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -26071,7 +26115,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81fa_11)(uae_u32 opcode, struct regstruct ®s) { uae_s32 dst = m68k_dreg (regs, dstreg); if (src == 0) { m68k_incpc (4); - Exception (5, regs); + Exception (5); return 12 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -26107,7 +26151,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81fb_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -26118,7 +26162,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81fb_11)(uae_u32 opcode, struct regstruct ®s) { uae_s32 dst = m68k_dreg (regs, dstreg); if (src == 0) { m68k_incpc (4); - Exception (5, regs); + Exception (5); return 14 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -26156,7 +26200,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81fc_11)(uae_u32 opcode, struct regstruct ®s) { uae_s32 dst = m68k_dreg (regs, dstreg); if (src == 0) { m68k_incpc (4); - Exception (5, regs); + Exception (5); return 8 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -26398,7 +26442,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_903a_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); @@ -26425,7 +26469,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_903b_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); @@ -26740,7 +26784,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_907a_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -26772,7 +26816,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_907b_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -27092,7 +27136,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_90ba_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -27124,7 +27168,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_90bb_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -27374,7 +27418,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_90fa_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -27398,7 +27442,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_90fb_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -28431,7 +28475,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_91fa_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -28455,7 +28499,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_91fb_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -28686,7 +28730,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b03a_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); @@ -28711,7 +28755,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b03b_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); @@ -29004,7 +29048,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b07a_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -29034,7 +29078,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b07b_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -29122,9 +29166,6 @@ uae_u32 REGPARAM2 CPUFUNC(op_b088_11)(uae_u32 opcode, struct regstruct ®s) return 6 * CYCLE_UNIT / 2 + count_cycles; } /* 6 (1/0) */ -#endif - -#ifdef PART_7 /* CMP.L (An),Dn */ uae_u32 REGPARAM2 CPUFUNC(op_b090_11)(uae_u32 opcode, struct regstruct ®s) { @@ -29214,6 +29255,9 @@ uae_u32 REGPARAM2 CPUFUNC(op_b0a0_11)(uae_u32 opcode, struct regstruct ®s) return 16 * CYCLE_UNIT / 2 + count_cycles; } /* 16 (3/0) */ +#endif + +#ifdef PART_7 /* CMP.L (d16,An),Dn */ uae_u32 REGPARAM2 CPUFUNC(op_b0a8_11)(uae_u32 opcode, struct regstruct ®s) { @@ -29335,7 +29379,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b0ba_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -29365,7 +29409,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b0bb_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -29665,7 +29709,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b0fa_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -29695,7 +29739,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b0fb_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -30668,7 +30712,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b1fa_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -30698,7 +30742,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b1fb_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -30917,7 +30961,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c03a_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); @@ -30939,7 +30983,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c03b_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); @@ -31180,7 +31224,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c07a_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -31207,7 +31251,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c07b_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -31453,7 +31497,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c0ba_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -31480,7 +31524,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c0bb_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -31736,7 +31780,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c0fa_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -31764,7 +31808,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c0fb_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -32644,7 +32688,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c1fa_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -32672,7 +32716,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c1fb_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -32925,7 +32969,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d03a_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); @@ -32952,7 +32996,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d03b_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); @@ -33267,7 +33311,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d07a_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -33299,7 +33343,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d07b_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -33619,7 +33663,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d0ba_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -33651,7 +33695,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d0bb_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -33901,7 +33945,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d0fa_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -33925,7 +33969,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d0fb_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -34958,7 +35002,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d1fa_11)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_word_prefetch (regs, 4); if (srca & 1) { m68k_incpc (2); @@ -34982,7 +35026,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d1fb_11)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_word_prefetch (regs, 4)); if (srca & 1) { m68k_incpc (2); @@ -35178,9 +35222,6 @@ uae_u32 REGPARAM2 CPUFUNC(op_e020_11)(uae_u32 opcode, struct regstruct ®s) return 6 * CYCLE_UNIT / 2 + count_cycles; } /* 6+ (1/0) */ -#endif - -#ifdef PART_8 /* LSR.B Dn,Dn */ uae_u32 REGPARAM2 CPUFUNC(op_e028_11)(uae_u32 opcode, struct regstruct ®s) { @@ -35313,6 +35354,9 @@ uae_u32 REGPARAM2 CPUFUNC(op_e040_11)(uae_u32 opcode, struct regstruct ®s) return 6 * CYCLE_UNIT / 2 + count_cycles; } /* 6+ (1/0) */ +#endif + +#ifdef PART_8 /* LSRQ.W #,Dn */ uae_u32 REGPARAM2 CPUFUNC(op_e048_11)(uae_u32 opcode, struct regstruct ®s) { diff --git a/src/cpuemu_4.cpp b/src/cpuemu_4.cpp index ea6fcd55..1b2479dc 100644 --- a/src/cpuemu_4.cpp +++ b/src/cpuemu_4.cpp @@ -308,7 +308,7 @@ return 24 * CYCLE_UNIT / 2; /* ORSR.W #.W */ uae_u32 REGPARAM2 CPUFUNC(op_007c_4)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { MakeSR (regs); { uae_s16 src = get_iword (2); m68k_incpc (4); @@ -596,7 +596,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_013a_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = 2; {{ uae_s8 src = m68k_dreg (regs, srcreg); { uaecptr dsta; - dsta = m68k_getpc (regs) + 2; + dsta = m68k_getpc () + 2; dsta += (uae_s32)(uae_s16)get_iword (2); { uae_s8 dst = get_byte (dsta); src &= 7; @@ -613,7 +613,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_013b_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_s8 src = m68k_dreg (regs, srcreg); { uaecptr tmppc; uaecptr dsta; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; dsta = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s8 dst = get_byte (dsta); src &= 7; @@ -1360,7 +1360,7 @@ return 24 * CYCLE_UNIT / 2; /* ANDSR.W #.W */ uae_u32 REGPARAM2 CPUFUNC(op_027c_4)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { MakeSR (regs); { uae_s16 src = get_iword (2); m68k_incpc (4); @@ -2687,7 +2687,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_083a_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = 2; {{ uae_s16 src = get_iword (2); { uaecptr dsta; - dsta = m68k_getpc (regs) + 4; + dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword (4); { uae_s8 dst = get_byte (dsta); src &= 7; @@ -2703,7 +2703,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_083b_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); { uaecptr tmppc; uaecptr dsta; - tmppc = m68k_getpc (regs) + 4; + tmppc = m68k_getpc () + 4; dsta = get_disp_ea_000 (regs, tmppc, get_iword (4)); { uae_s8 dst = get_byte (dsta); src &= 7; @@ -3384,7 +3384,7 @@ return 24 * CYCLE_UNIT / 2; /* EORSR.W #.W */ uae_u32 REGPARAM2 CPUFUNC(op_0a7c_4)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { MakeSR (regs); { uae_s16 src = get_iword (2); m68k_incpc (4); @@ -4151,7 +4151,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_103a_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s8 src = get_byte (srca); { CLEAR_CZNV (); @@ -4168,7 +4168,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_103b_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s8 src = get_byte (srca); { CLEAR_CZNV (); @@ -4339,7 +4339,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_10ba_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -4358,7 +4358,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_10bb_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -4541,7 +4541,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_10fa_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -4561,7 +4561,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_10fb_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -4746,7 +4746,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_113a_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -4766,7 +4766,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_113b_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -4943,7 +4943,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_117a_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -4962,7 +4962,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_117b_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -5137,7 +5137,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_11ba_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -5156,7 +5156,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_11bb_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -5322,7 +5322,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_11f9_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_11fa_4)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -5340,7 +5340,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_11fb_4)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -5505,7 +5505,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_13f9_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_13fa_4)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -5523,7 +5523,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_13fb_4)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s8 src = get_byte (srca); { uaecptr dsta; @@ -5695,7 +5695,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_203a_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { CLEAR_CZNV (); @@ -5712,7 +5712,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_203b_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s32 src = get_long (srca); { CLEAR_CZNV (); @@ -5855,7 +5855,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_207a_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { m68k_areg (regs, dstreg) = (src); @@ -5869,7 +5869,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_207b_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s32 src = get_long (srca); { m68k_areg (regs, dstreg) = (src); @@ -6051,7 +6051,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_20ba_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uaecptr dsta; @@ -6070,7 +6070,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_20bb_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s32 src = get_long (srca); { uaecptr dsta; @@ -6271,7 +6271,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_20fa_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uaecptr dsta; @@ -6291,7 +6291,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_20fb_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s32 src = get_long (srca); { uaecptr dsta; @@ -6494,7 +6494,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_213a_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uaecptr dsta; @@ -6514,7 +6514,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_213b_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s32 src = get_long (srca); { uaecptr dsta; @@ -6708,7 +6708,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_217a_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uaecptr dsta; @@ -6727,7 +6727,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_217b_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s32 src = get_long (srca); { uaecptr dsta; @@ -6788,9 +6788,6 @@ uae_u32 REGPARAM2 CPUFUNC(op_2188_4)(uae_u32 opcode, struct regstruct ®s) }}}return 18 * CYCLE_UNIT / 2; } -#endif - -#ifdef PART_3 /* MOVE.L (An),(d8,An,Xn) */ uae_u32 REGPARAM2 CPUFUNC(op_2190_4)(uae_u32 opcode, struct regstruct ®s) { @@ -6809,6 +6806,9 @@ uae_u32 REGPARAM2 CPUFUNC(op_2190_4)(uae_u32 opcode, struct regstruct ®s) }}}}return 26 * CYCLE_UNIT / 2; } +#endif + +#ifdef PART_3 /* MOVE.L (An)+,(d8,An,Xn) */ uae_u32 REGPARAM2 CPUFUNC(op_2198_4)(uae_u32 opcode, struct regstruct ®s) { @@ -6922,7 +6922,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_21ba_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uaecptr dsta; @@ -6941,7 +6941,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_21bb_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s32 src = get_long (srca); { uaecptr dsta; @@ -7123,7 +7123,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_21f9_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_21fa_4)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uaecptr dsta; @@ -7141,7 +7141,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_21fb_4)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s32 src = get_long (srca); { uaecptr dsta; @@ -7322,7 +7322,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_23f9_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_23fa_4)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uaecptr dsta; @@ -7340,7 +7340,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_23fb_4)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s32 src = get_long (srca); { uaecptr dsta; @@ -7513,7 +7513,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_303a_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { CLEAR_CZNV (); @@ -7530,7 +7530,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_303b_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s16 src = get_word (srca); { CLEAR_CZNV (); @@ -7681,7 +7681,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_307a_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { src = (uae_s32)(uae_s16)src; @@ -7696,7 +7696,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_307b_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s16 src = get_word (srca); { src = (uae_s32)(uae_s16)src; @@ -7879,7 +7879,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_30ba_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uaecptr dsta; @@ -7898,7 +7898,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_30bb_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s16 src = get_word (srca); { uaecptr dsta; @@ -8098,7 +8098,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_30fa_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uaecptr dsta; @@ -8118,7 +8118,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_30fb_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s16 src = get_word (srca); { uaecptr dsta; @@ -8320,7 +8320,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_313a_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uaecptr dsta; @@ -8340,7 +8340,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_313b_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s16 src = get_word (srca); { uaecptr dsta; @@ -8533,7 +8533,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_317a_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uaecptr dsta; @@ -8552,7 +8552,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_317b_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s16 src = get_word (srca); { uaecptr dsta; @@ -8743,7 +8743,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_31ba_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uaecptr dsta; @@ -8762,7 +8762,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_31bb_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s16 src = get_word (srca); { uaecptr dsta; @@ -8943,7 +8943,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_31f9_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_31fa_4)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uaecptr dsta; @@ -8961,7 +8961,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_31fb_4)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s16 src = get_word (srca); { uaecptr dsta; @@ -9141,7 +9141,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_33f9_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_33fa_4)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uaecptr dsta; @@ -9159,7 +9159,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_33fb_4)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s16 src = get_word (srca); { uaecptr dsta; @@ -9688,7 +9688,7 @@ return 28 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_40c0_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ MakeSR (regs); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); }}} m68k_incpc (2); @@ -9699,7 +9699,7 @@ return 6 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_40d0_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = m68k_areg (regs, srcreg); put_word (srca, regs.sr | 0x0010); @@ -9713,7 +9713,7 @@ return 12 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_40d8_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = m68k_areg (regs, srcreg); m68k_areg (regs, srcreg) += 2; @@ -9728,7 +9728,7 @@ return 12 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_40e0_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = m68k_areg (regs, srcreg) - 2; m68k_areg (regs, srcreg) = srca; @@ -9743,7 +9743,7 @@ return 14 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_40e8_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (2); put_word (srca, regs.sr | 0x0010); @@ -9757,7 +9757,7 @@ return 16 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_40f0_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (2)); put_word (srca, regs.sr | 0x0010); @@ -9770,7 +9770,7 @@ return 18 * CYCLE_UNIT / 2; /* MVSR2.W (xxx).W */ uae_u32 REGPARAM2 CPUFUNC(op_40f8_4)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = (uae_s32)(uae_s16)get_iword (2); put_word (srca, regs.sr | 0x0010); @@ -9783,7 +9783,7 @@ return 16 * CYCLE_UNIT / 2; /* MVSR2.W (xxx).L */ uae_u32 REGPARAM2 CPUFUNC(op_40f9_4)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = get_ilong (2); put_word (srca, regs.sr | 0x0010); @@ -9803,12 +9803,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4180_4)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (2); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 8 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 10 * CYCLE_UNIT / 2; } }}}return 10 * CYCLE_UNIT / 2; @@ -9826,12 +9826,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4190_4)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (2); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 12 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 14 * CYCLE_UNIT / 2; } }}}}return 14 * CYCLE_UNIT / 2; @@ -9850,12 +9850,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4198_4)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (2); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 12 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 14 * CYCLE_UNIT / 2; } }}}}return 14 * CYCLE_UNIT / 2; @@ -9874,12 +9874,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_41a0_4)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (2); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 14 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 16 * CYCLE_UNIT / 2; } }}}}return 16 * CYCLE_UNIT / 2; @@ -9897,12 +9897,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_41a8_4)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (4); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 16 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 18 * CYCLE_UNIT / 2; } }}}}return 18 * CYCLE_UNIT / 2; @@ -9920,12 +9920,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_41b0_4)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (4); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 18 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 20 * CYCLE_UNIT / 2; } }}}}return 20 * CYCLE_UNIT / 2; @@ -9942,12 +9942,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_41b8_4)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (4); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 16 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 18 * CYCLE_UNIT / 2; } }}}}return 18 * CYCLE_UNIT / 2; @@ -9964,12 +9964,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_41b9_4)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (6); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 20 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 22 * CYCLE_UNIT / 2; } }}}}return 22 * CYCLE_UNIT / 2; @@ -9980,19 +9980,19 @@ uae_u32 REGPARAM2 CPUFUNC(op_41ba_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); m68k_incpc (4); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 16 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 18 * CYCLE_UNIT / 2; } }}}}return 18 * CYCLE_UNIT / 2; @@ -10004,19 +10004,19 @@ uae_u32 REGPARAM2 CPUFUNC(op_41bb_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); m68k_incpc (4); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 18 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 20 * CYCLE_UNIT / 2; } }}}}return 20 * CYCLE_UNIT / 2; @@ -10031,12 +10031,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_41bc_4)(uae_u32 opcode, struct regstruct ®s) m68k_incpc (4); if (dst > src) { SET_NFLG (0); - Exception (6, regs); + Exception (6); return 12 * CYCLE_UNIT / 2; } if ((uae_s32)dst < 0) { SET_NFLG (1); - Exception (6, regs); + Exception (6); return 14 * CYCLE_UNIT / 2; } }}}return 14 * CYCLE_UNIT / 2; @@ -10105,7 +10105,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_41fa_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { m68k_areg (regs, dstreg) = (srca); }}} m68k_incpc (4); @@ -10118,7 +10118,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_41fb_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { m68k_areg (regs, dstreg) = (srca); }}} m68k_incpc (4); @@ -10538,9 +10538,6 @@ uae_u32 REGPARAM2 CPUFUNC(op_42f8_4)(uae_u32 opcode, struct regstruct ®s) return 12 * CYCLE_UNIT / 2; } -#endif - -#ifdef PART_4 /* MVSR2.B (xxx).L */ uae_u32 REGPARAM2 CPUFUNC(op_42f9_4)(uae_u32 opcode, struct regstruct ®s) { @@ -10552,6 +10549,9 @@ uae_u32 REGPARAM2 CPUFUNC(op_42f9_4)(uae_u32 opcode, struct regstruct ®s) return 16 * CYCLE_UNIT / 2; } +#endif + +#ifdef PART_4 /* NEG.B Dn */ uae_u32 REGPARAM2 CPUFUNC(op_4400_4)(uae_u32 opcode, struct regstruct ®s) { @@ -11172,7 +11172,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_44f9_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_44fa_4)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); MakeSR (regs); @@ -11188,7 +11188,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_44fb_4)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s16 src = get_word (srca); MakeSR (regs); @@ -11593,7 +11593,7 @@ return 28 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_46c0_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 src = m68k_dreg (regs, srcreg); regs.sr = src; MakeFromSR(regs); @@ -11605,7 +11605,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_46c0_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_46d0_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = m68k_areg (regs, srcreg); { uae_s16 src = get_word (srca); @@ -11619,7 +11619,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_46d0_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_46d8_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = m68k_areg (regs, srcreg); { uae_s16 src = get_word (srca); @@ -11634,7 +11634,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_46d8_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_46e0_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = m68k_areg (regs, srcreg) - 2; { uae_s16 src = get_word (srca); @@ -11649,7 +11649,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_46e0_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_46e8_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); @@ -11663,7 +11663,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_46e8_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_46f0_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (2)); { uae_s16 src = get_word (srca); @@ -11676,7 +11676,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_46f0_4)(uae_u32 opcode, struct regstruct ®s) /* MV2SR.W (xxx).W */ uae_u32 REGPARAM2 CPUFUNC(op_46f8_4)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); @@ -11689,7 +11689,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_46f8_4)(uae_u32 opcode, struct regstruct ®s) /* MV2SR.W (xxx).L */ uae_u32 REGPARAM2 CPUFUNC(op_46f9_4)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; srca = get_ilong (2); { uae_s16 src = get_word (srca); @@ -11702,9 +11702,9 @@ uae_u32 REGPARAM2 CPUFUNC(op_46f9_4)(uae_u32 opcode, struct regstruct ®s) /* MV2SR.W (d16,PC) */ uae_u32 REGPARAM2 CPUFUNC(op_46fa_4)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); regs.sr = src; @@ -11716,10 +11716,10 @@ uae_u32 REGPARAM2 CPUFUNC(op_46fa_4)(uae_u32 opcode, struct regstruct ®s) /* MV2SR.W (d8,PC,Xn) */ uae_u32 REGPARAM2 CPUFUNC(op_46fb_4)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s16 src = get_word (srca); regs.sr = src; @@ -11731,7 +11731,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_46fb_4)(uae_u32 opcode, struct regstruct ®s) /* MV2SR.W #.W */ uae_u32 REGPARAM2 CPUFUNC(op_46fc_4)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 src = get_iword (2); regs.sr = src; MakeFromSR(regs); @@ -12023,7 +12023,7 @@ return 20 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_487a_4)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uaecptr dsta; dsta = m68k_areg (regs, 7) - 4; @@ -12038,7 +12038,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_487b_4)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uaecptr dsta; dsta = m68k_areg (regs, 7) - 4; @@ -12484,6 +12484,17 @@ uae_u32 REGPARAM2 CPUFUNC(op_4a39_4)(uae_u32 opcode, struct regstruct ®s) return 16 * CYCLE_UNIT / 2; } +/* TST.B #.B */ +uae_u32 REGPARAM2 CPUFUNC(op_4a3c_4)(uae_u32 opcode, struct regstruct ®s) +{ +{{ uae_s8 src = get_ibyte (2); + CLEAR_CZNV (); + SET_ZFLG (((uae_s8)(src)) == 0); + SET_NFLG (((uae_s8)(src)) < 0); +}} m68k_incpc (4); +return 8 * CYCLE_UNIT / 2; +} + /* TST.W Dn */ uae_u32 REGPARAM2 CPUFUNC(op_4a40_4)(uae_u32 opcode, struct regstruct ®s) { @@ -12594,6 +12605,17 @@ uae_u32 REGPARAM2 CPUFUNC(op_4a79_4)(uae_u32 opcode, struct regstruct ®s) return 16 * CYCLE_UNIT / 2; } +/* TST.W #.W */ +uae_u32 REGPARAM2 CPUFUNC(op_4a7c_4)(uae_u32 opcode, struct regstruct ®s) +{ +{{ uae_s16 src = get_iword (2); + CLEAR_CZNV (); + SET_ZFLG (((uae_s16)(src)) == 0); + SET_NFLG (((uae_s16)(src)) < 0); +}} m68k_incpc (4); +return 8 * CYCLE_UNIT / 2; +} + /* TST.L Dn */ uae_u32 REGPARAM2 CPUFUNC(op_4a80_4)(uae_u32 opcode, struct regstruct ®s) { @@ -12704,6 +12726,18 @@ uae_u32 REGPARAM2 CPUFUNC(op_4ab9_4)(uae_u32 opcode, struct regstruct ®s) return 20 * CYCLE_UNIT / 2; } +/* TST.L #.L */ +uae_u32 REGPARAM2 CPUFUNC(op_4abc_4)(uae_u32 opcode, struct regstruct ®s) +{ +{{ uae_s32 src; + src = get_ilong (2); + CLEAR_CZNV (); + SET_ZFLG (((uae_s32)(src)) == 0); + SET_NFLG (((uae_s32)(src)) < 0); +}} m68k_incpc (6); +return 12 * CYCLE_UNIT / 2; +} + /* TAS.B Dn */ uae_u32 REGPARAM2 CPUFUNC(op_4ac0_4)(uae_u32 opcode, struct regstruct ®s) { @@ -12987,7 +13021,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4cba_4)(uae_u32 opcode, struct regstruct ®s) { uae_u16 mask = get_iword (2); uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; { uaecptr srca; - srca = m68k_getpc (regs) + 4; + srca = m68k_getpc () + 4; srca += (uae_s32)(uae_s16)get_iword (4); { while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word (srca); @@ -13014,7 +13048,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4cbb_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; { uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 4; + tmppc = m68k_getpc () + 4; srca = get_disp_ea_000 (regs, tmppc, get_iword (4)); { while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word (srca); @@ -13189,7 +13223,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4cfa_4)(uae_u32 opcode, struct regstruct ®s) { uae_u16 mask = get_iword (2); uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; { uaecptr srca; - srca = m68k_getpc (regs) + 4; + srca = m68k_getpc () + 4; srca += (uae_s32)(uae_s16)get_iword (4); { while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = get_long (srca); @@ -13216,7 +13250,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4cfb_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; { uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 4; + tmppc = m68k_getpc () + 4; srca = get_disp_ea_000 (regs, tmppc, get_iword (4)); { while (dmask) { m68k_dreg (regs, movem_index1[dmask]) = get_long (srca); @@ -13240,7 +13274,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e40_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 15); {{ uae_u32 src = srcreg; m68k_incpc (2); - Exception (src + 32, regs); + Exception (src + 32); }}return 34 * CYCLE_UNIT / 2; } @@ -13279,7 +13313,7 @@ return 12 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_4e60_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s32 src = m68k_areg (regs, srcreg); regs.usp = src; }}} m68k_incpc (2); @@ -13290,7 +13324,7 @@ return 4 * CYCLE_UNIT / 2; uae_u32 REGPARAM2 CPUFUNC(op_4e68_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 srcreg = (opcode & 7); -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ m68k_areg (regs, srcreg) = (regs.usp); }}} m68k_incpc (2); return 4 * CYCLE_UNIT / 2; @@ -13299,7 +13333,7 @@ return 4 * CYCLE_UNIT / 2; /* RESET.L */ uae_u32 REGPARAM2 CPUFUNC(op_4e70_4)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { cpureset (); m68k_incpc (2); }}return 132 * CYCLE_UNIT / 2; @@ -13315,7 +13349,7 @@ return 4 * CYCLE_UNIT / 2; /* STOP.L #.W */ uae_u32 REGPARAM2 CPUFUNC(op_4e72_4)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 src = get_iword (2); regs.sr = src; MakeFromSR(regs); @@ -13327,7 +13361,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e72_4)(uae_u32 opcode, struct regstruct ®s) /* RTE.L */ uae_u32 REGPARAM2 CPUFUNC(op_4e73_4)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } { uae_u16 newsr; uae_u32 newpc; for (;;) { uaecptr a = m68k_areg (regs, 7); @@ -13344,7 +13378,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e73_4)(uae_u32 opcode, struct regstruct ®s) else if (frame == 0x9) { m68k_areg (regs, 7) += offset + 12; break; } else if (frame == 0xa) { m68k_areg (regs, 7) += offset + 24; break; } else if (frame == 0xb) { m68k_areg (regs, 7) += offset + 84; break; } - else { m68k_areg (regs, 7) += offset; Exception (14, regs); return 4 * CYCLE_UNIT / 2; } + else { m68k_areg (regs, 7) += offset; Exception (14); return 4 * CYCLE_UNIT / 2; } regs.sr = newsr; MakeFromSR(regs); } @@ -13354,7 +13388,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e73_4)(uae_u32 opcode, struct regstruct ®s) exception3i (0x4E73, newpc); return 4 * CYCLE_UNIT / 2; } - m68k_setpc (regs, newpc); + m68k_setpc (newpc); }}return 24 * CYCLE_UNIT / 2; } @@ -13371,18 +13405,18 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e74_4)(uae_u32 opcode, struct regstruct ®s) exception3i (0x4E74, pc); return 4 * CYCLE_UNIT / 2; } - m68k_setpc (regs, pc); + m68k_setpc (pc); }}}}return 20 * CYCLE_UNIT / 2; } /* RTS.L */ uae_u32 REGPARAM2 CPUFUNC(op_4e75_4)(uae_u32 opcode, struct regstruct ®s) { -{ uaecptr pc = m68k_getpc (regs); - m68k_do_rts (regs); - if (m68k_getpc (regs) & 1) { - uaecptr faultpc = m68k_getpc (regs); - m68k_setpc (regs, pc); +{ uaecptr pc = m68k_getpc (); + m68k_do_rts (); + if (m68k_getpc () & 1) { + uaecptr faultpc = m68k_getpc (); + m68k_setpc (pc); exception3i (0x4E75, faultpc); return 8 * CYCLE_UNIT / 2; } @@ -13394,7 +13428,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e76_4)(uae_u32 opcode, struct regstruct ®s) { { m68k_incpc (2); if (GET_VFLG ()) { - Exception (7, regs); + Exception (7); return 4 * CYCLE_UNIT / 2; } }return 4 * CYCLE_UNIT / 2; @@ -13403,7 +13437,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e76_4)(uae_u32 opcode, struct regstruct ®s) /* RTR.L */ uae_u32 REGPARAM2 CPUFUNC(op_4e77_4)(uae_u32 opcode, struct regstruct ®s) { -{ uaecptr oldpc = m68k_getpc (regs); +{ uaecptr oldpc = m68k_getpc (); MakeSR (regs); { uaecptr sra; sra = m68k_areg (regs, 7); @@ -13415,11 +13449,11 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e77_4)(uae_u32 opcode, struct regstruct ®s) m68k_areg (regs, 7) += 4; regs.sr &= 0xFF00; sr &= 0xFF; regs.sr |= sr; - m68k_setpc (regs, pc); + m68k_setpc (pc); MakeFromSR(regs); - if (m68k_getpc (regs) & 1) { - uaecptr faultpc = m68k_getpc (regs); - m68k_setpc (regs, oldpc); + if (m68k_getpc () & 1) { + uaecptr faultpc = m68k_getpc (); + m68k_setpc (oldpc); exception3i (0x4E77, faultpc); return 8 * CYCLE_UNIT / 2; } @@ -13429,26 +13463,26 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e77_4)(uae_u32 opcode, struct regstruct ®s) /* MOVEC2.L #.W */ uae_u32 REGPARAM2 CPUFUNC(op_4e7a_4)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 src = get_iword (2); { int regno = (src >> 12) & 15; uae_u32 *regp = regs.regs + regno; - if (! m68k_movec2(src & 0xFFF, regp)) goto l_40772; + if (! m68k_movec2(src & 0xFFF, regp)) goto l_40775; }}}} m68k_incpc (4); -l_40772: ; +l_40775: ; return 8 * CYCLE_UNIT / 2; } /* MOVE2C.L #.W */ uae_u32 REGPARAM2 CPUFUNC(op_4e7b_4)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uae_s16 src = get_iword (2); { int regno = (src >> 12) & 15; uae_u32 *regp = regs.regs + regno; - if (! m68k_move2c(src & 0xFFF, regp)) goto l_40773; + if (! m68k_move2c(src & 0xFFF, regp)) goto l_40776; }}}} m68k_incpc (4); -l_40773: ; +l_40776: ; return 8 * CYCLE_UNIT / 2; } @@ -13458,12 +13492,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e90_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = m68k_areg (regs, srcreg); -{ uaecptr oldpc = m68k_getpc (regs) + 2; +{ uaecptr oldpc = m68k_getpc () + 2; if (srca & 1) { exception3i (opcode, srca); return 4 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); m68k_areg (regs, 7) -= 4; put_long (m68k_areg (regs, 7), oldpc); }}}return 16 * CYCLE_UNIT / 2; @@ -13475,12 +13509,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4ea8_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)get_iword (2); -{ uaecptr oldpc = m68k_getpc (regs) + 4; +{ uaecptr oldpc = m68k_getpc () + 4; if (srca & 1) { exception3i (opcode, srca); return 8 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); m68k_areg (regs, 7) -= 4; put_long (m68k_areg (regs, 7), oldpc); }}}return 18 * CYCLE_UNIT / 2; @@ -13492,12 +13526,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4eb0_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uaecptr srca; srca = get_disp_ea_000 (regs, m68k_areg (regs, srcreg), get_iword (2)); -{ uaecptr oldpc = m68k_getpc (regs) + 4; +{ uaecptr oldpc = m68k_getpc () + 4; if (srca & 1) { exception3i (opcode, srca); return 8 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); m68k_areg (regs, 7) -= 4; put_long (m68k_areg (regs, 7), oldpc); }}}return 22 * CYCLE_UNIT / 2; @@ -13508,12 +13542,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4eb8_4)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr srca; srca = (uae_s32)(uae_s16)get_iword (2); -{ uaecptr oldpc = m68k_getpc (regs) + 4; +{ uaecptr oldpc = m68k_getpc () + 4; if (srca & 1) { exception3i (opcode, srca); return 8 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); m68k_areg (regs, 7) -= 4; put_long (m68k_areg (regs, 7), oldpc); }}}return 18 * CYCLE_UNIT / 2; @@ -13524,12 +13558,12 @@ uae_u32 REGPARAM2 CPUFUNC(op_4eb9_4)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr srca; srca = get_ilong (2); -{ uaecptr oldpc = m68k_getpc (regs) + 6; +{ uaecptr oldpc = m68k_getpc () + 6; if (srca & 1) { exception3i (opcode, srca); return 12 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); m68k_areg (regs, 7) -= 4; put_long (m68k_areg (regs, 7), oldpc); }}}return 20 * CYCLE_UNIT / 2; @@ -13539,14 +13573,14 @@ uae_u32 REGPARAM2 CPUFUNC(op_4eb9_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_4eba_4)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); -{ uaecptr oldpc = m68k_getpc (regs) + 4; +{ uaecptr oldpc = m68k_getpc () + 4; if (srca & 1) { exception3i (opcode, srca); return 8 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); m68k_areg (regs, 7) -= 4; put_long (m68k_areg (regs, 7), oldpc); }}}return 18 * CYCLE_UNIT / 2; @@ -13557,14 +13591,14 @@ uae_u32 REGPARAM2 CPUFUNC(op_4ebb_4)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); -{ uaecptr oldpc = m68k_getpc (regs) + 4; +{ uaecptr oldpc = m68k_getpc () + 4; if (srca & 1) { exception3i (opcode, srca); return 8 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); m68k_areg (regs, 7) -= 4; put_long (m68k_areg (regs, 7), oldpc); }}}return 22 * CYCLE_UNIT / 2; @@ -13580,7 +13614,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4ed0_4)(uae_u32 opcode, struct regstruct ®s) exception3i (opcode, srca); return 4 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); }}return 8 * CYCLE_UNIT / 2; } @@ -13594,7 +13628,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4ee8_4)(uae_u32 opcode, struct regstruct ®s) exception3i (opcode, srca); return 8 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); }}return 10 * CYCLE_UNIT / 2; } @@ -13608,7 +13642,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4ef0_4)(uae_u32 opcode, struct regstruct ®s) exception3i (opcode, srca); return 8 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); }}return 14 * CYCLE_UNIT / 2; } @@ -13621,7 +13655,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4ef8_4)(uae_u32 opcode, struct regstruct ®s) exception3i (opcode, srca); return 8 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); }}return 10 * CYCLE_UNIT / 2; } @@ -13634,7 +13668,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4ef9_4)(uae_u32 opcode, struct regstruct ®s) exception3i (opcode, srca); return 12 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); }}return 12 * CYCLE_UNIT / 2; } @@ -13642,13 +13676,13 @@ uae_u32 REGPARAM2 CPUFUNC(op_4ef9_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 REGPARAM2 CPUFUNC(op_4efa_4)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); if (srca & 1) { exception3i (opcode, srca); return 8 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); }}return 10 * CYCLE_UNIT / 2; } @@ -13657,13 +13691,13 @@ uae_u32 REGPARAM2 CPUFUNC(op_4efb_4)(uae_u32 opcode, struct regstruct ®s) { {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); if (srca & 1) { exception3i (opcode, srca); return 8 * CYCLE_UNIT / 2; } - m68k_setpc (regs, srca); + m68k_setpc (srca); }}return 14 * CYCLE_UNIT / 2; } @@ -14078,9 +14112,6 @@ uae_u32 REGPARAM2 CPUFUNC(op_5088_4)(uae_u32 opcode, struct regstruct ®s) return 8 * CYCLE_UNIT / 2; } -#endif - -#ifdef PART_5 /* ADDQ.L #,(An) */ uae_u32 REGPARAM2 CPUFUNC(op_5090_4)(uae_u32 opcode, struct regstruct ®s) { @@ -14128,6 +14159,9 @@ uae_u32 REGPARAM2 CPUFUNC(op_5098_4)(uae_u32 opcode, struct regstruct ®s) return 20 * CYCLE_UNIT / 2; } +#endif + +#ifdef PART_5 /* ADDQ.L #,-(An) */ uae_u32 REGPARAM2 CPUFUNC(op_50a0_4)(uae_u32 opcode, struct regstruct ®s) { @@ -14261,14 +14295,14 @@ uae_u32 REGPARAM2 CPUFUNC(op_50c8_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 0)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 10 * CYCLE_UNIT / 2 + count_cycles; @@ -14277,7 +14311,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_50c8_4)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2 + count_cycles; } @@ -14956,14 +14990,14 @@ uae_u32 REGPARAM2 CPUFUNC(op_51c8_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 1)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 10 * CYCLE_UNIT / 2 + count_cycles; @@ -14972,7 +15006,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_51c8_4)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2 + count_cycles; } @@ -15079,14 +15113,14 @@ uae_u32 REGPARAM2 CPUFUNC(op_52c8_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 2)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 10 * CYCLE_UNIT / 2 + count_cycles; @@ -15095,7 +15129,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_52c8_4)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2 + count_cycles; } @@ -15202,14 +15236,14 @@ uae_u32 REGPARAM2 CPUFUNC(op_53c8_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 3)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 10 * CYCLE_UNIT / 2 + count_cycles; @@ -15218,7 +15252,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_53c8_4)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2 + count_cycles; } @@ -15325,14 +15359,14 @@ uae_u32 REGPARAM2 CPUFUNC(op_54c8_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 4)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 10 * CYCLE_UNIT / 2 + count_cycles; @@ -15341,7 +15375,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_54c8_4)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2 + count_cycles; } @@ -15448,14 +15482,14 @@ uae_u32 REGPARAM2 CPUFUNC(op_55c8_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 5)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 10 * CYCLE_UNIT / 2 + count_cycles; @@ -15464,7 +15498,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_55c8_4)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2 + count_cycles; } @@ -15571,14 +15605,14 @@ uae_u32 REGPARAM2 CPUFUNC(op_56c8_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 6)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 10 * CYCLE_UNIT / 2 + count_cycles; @@ -15587,7 +15621,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_56c8_4)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2 + count_cycles; } @@ -15694,14 +15728,14 @@ uae_u32 REGPARAM2 CPUFUNC(op_57c8_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 7)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 10 * CYCLE_UNIT / 2 + count_cycles; @@ -15710,7 +15744,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_57c8_4)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2 + count_cycles; } @@ -15817,14 +15851,14 @@ uae_u32 REGPARAM2 CPUFUNC(op_58c8_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 8)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 10 * CYCLE_UNIT / 2 + count_cycles; @@ -15833,7 +15867,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_58c8_4)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2 + count_cycles; } @@ -15940,14 +15974,14 @@ uae_u32 REGPARAM2 CPUFUNC(op_59c8_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 9)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 10 * CYCLE_UNIT / 2 + count_cycles; @@ -15956,7 +15990,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_59c8_4)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2 + count_cycles; } @@ -16063,14 +16097,14 @@ uae_u32 REGPARAM2 CPUFUNC(op_5ac8_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 10)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 10 * CYCLE_UNIT / 2 + count_cycles; @@ -16079,7 +16113,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5ac8_4)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2 + count_cycles; } @@ -16186,14 +16220,14 @@ uae_u32 REGPARAM2 CPUFUNC(op_5bc8_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 11)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 10 * CYCLE_UNIT / 2 + count_cycles; @@ -16202,7 +16236,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5bc8_4)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2 + count_cycles; } @@ -16309,14 +16343,14 @@ uae_u32 REGPARAM2 CPUFUNC(op_5cc8_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 12)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 10 * CYCLE_UNIT / 2 + count_cycles; @@ -16325,7 +16359,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5cc8_4)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2 + count_cycles; } @@ -16432,14 +16466,14 @@ uae_u32 REGPARAM2 CPUFUNC(op_5dc8_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 13)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 10 * CYCLE_UNIT / 2 + count_cycles; @@ -16448,7 +16482,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5dc8_4)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2 + count_cycles; } @@ -16555,14 +16589,14 @@ uae_u32 REGPARAM2 CPUFUNC(op_5ec8_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 14)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 10 * CYCLE_UNIT / 2 + count_cycles; @@ -16571,7 +16605,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5ec8_4)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2 + count_cycles; } @@ -16678,14 +16712,14 @@ uae_u32 REGPARAM2 CPUFUNC(op_5fc8_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 srcreg = (opcode & 7); {{ uae_s16 src = m68k_dreg (regs, srcreg); { uae_s16 offs = get_iword (2); - uaecptr oldpc = m68k_getpc (regs); + uaecptr oldpc = m68k_getpc (); count_cycles += 2 * CYCLE_UNIT / 2; if (!cctrue (regs.ccrflags, 15)) { m68k_incpc ((uae_s32)offs + 2); m68k_dreg (regs, srcreg) = (m68k_dreg (regs, srcreg) & ~0xffff) | (((src - 1)) & 0xffff); if (src) { if (offs & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)offs + 2); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)offs + 2); return 10 * CYCLE_UNIT / 2; } return 10 * CYCLE_UNIT / 2 + count_cycles; @@ -16694,7 +16728,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_5fc8_4)(uae_u32 opcode, struct regstruct ®s) } else { count_cycles += 2 * CYCLE_UNIT / 2; } - m68k_setpc (regs, oldpc + 4); + m68k_setpc (oldpc + 4); }}}return 10 * CYCLE_UNIT / 2 + count_cycles; } @@ -16788,7 +16822,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6000_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); if (!cctrue (regs.ccrflags, 0)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 10 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -16805,7 +16839,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6001_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 0)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -16819,7 +16853,7 @@ didnt_jump:; uae_u32 REGPARAM2 CPUFUNC(op_60ff_4)(uae_u32 opcode, struct regstruct ®s) { { if (cctrue (regs.ccrflags, 0)) { - exception3i (opcode, m68k_getpc (regs) + 1); + exception3i (opcode, m68k_getpc () + 1); return 6 * CYCLE_UNIT / 2; } m68k_incpc (2); @@ -16833,10 +16867,10 @@ uae_u32 REGPARAM2 CPUFUNC(op_6100_4)(uae_u32 opcode, struct regstruct ®s) { uae_s16 src = get_iword (2); s = (uae_s32)src + 2; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + s); + exception3 (opcode, m68k_getpc () + s, 0, 1, m68k_getpc () + s); return 8 * CYCLE_UNIT / 2; } - m68k_do_bsr (regs, m68k_getpc (regs) + 4, s); + m68k_do_bsr (regs, m68k_getpc () + 4, s); }}return 18 * CYCLE_UNIT / 2; } @@ -16848,10 +16882,10 @@ uae_u32 REGPARAM2 CPUFUNC(op_6101_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 src = srcreg; s = (uae_s32)src + 2; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + s); + exception3 (opcode, m68k_getpc () + s, 0, 1, m68k_getpc () + s); return 4 * CYCLE_UNIT / 2; } - m68k_do_bsr (regs, m68k_getpc (regs) + 2, s); + m68k_do_bsr (regs, m68k_getpc () + 2, s); }}return 18 * CYCLE_UNIT / 2; } @@ -16862,10 +16896,10 @@ uae_u32 REGPARAM2 CPUFUNC(op_61ff_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 src = 0xffffffff; s = (uae_s32)src + 2; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + s); + exception3 (opcode, m68k_getpc () + s, 0, 1, m68k_getpc () + s); return 4 * CYCLE_UNIT / 2; } - m68k_do_bsr (regs, m68k_getpc (regs) + 2, s); + m68k_do_bsr (regs, m68k_getpc () + 2, s); }return 18 * CYCLE_UNIT / 2; } @@ -16875,7 +16909,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6200_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); if (!cctrue (regs.ccrflags, 2)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 10 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -16892,7 +16926,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6201_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 2)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -16902,14 +16936,11 @@ didnt_jump:; }}return 8 * CYCLE_UNIT / 2; } -#endif - -#ifdef PART_6 /* Bcc.L #.L (HI) */ uae_u32 REGPARAM2 CPUFUNC(op_62ff_4)(uae_u32 opcode, struct regstruct ®s) { { if (cctrue (regs.ccrflags, 2)) { - exception3i (opcode, m68k_getpc (regs) + 1); + exception3i (opcode, m68k_getpc () + 1); return 6 * CYCLE_UNIT / 2; } m68k_incpc (2); @@ -16922,7 +16953,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6300_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); if (!cctrue (regs.ccrflags, 3)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 10 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -16939,7 +16970,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6301_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 3)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -16949,11 +16980,14 @@ didnt_jump:; }}return 8 * CYCLE_UNIT / 2; } +#endif + +#ifdef PART_6 /* Bcc.L #.L (LS) */ uae_u32 REGPARAM2 CPUFUNC(op_63ff_4)(uae_u32 opcode, struct regstruct ®s) { { if (cctrue (regs.ccrflags, 3)) { - exception3i (opcode, m68k_getpc (regs) + 1); + exception3i (opcode, m68k_getpc () + 1); return 6 * CYCLE_UNIT / 2; } m68k_incpc (2); @@ -16966,7 +17000,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6400_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); if (!cctrue (regs.ccrflags, 4)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 10 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -16983,7 +17017,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6401_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 4)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -16997,7 +17031,7 @@ didnt_jump:; uae_u32 REGPARAM2 CPUFUNC(op_64ff_4)(uae_u32 opcode, struct regstruct ®s) { { if (cctrue (regs.ccrflags, 4)) { - exception3i (opcode, m68k_getpc (regs) + 1); + exception3i (opcode, m68k_getpc () + 1); return 6 * CYCLE_UNIT / 2; } m68k_incpc (2); @@ -17010,7 +17044,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6500_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); if (!cctrue (regs.ccrflags, 5)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 10 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -17027,7 +17061,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6501_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 5)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -17041,7 +17075,7 @@ didnt_jump:; uae_u32 REGPARAM2 CPUFUNC(op_65ff_4)(uae_u32 opcode, struct regstruct ®s) { { if (cctrue (regs.ccrflags, 5)) { - exception3i (opcode, m68k_getpc (regs) + 1); + exception3i (opcode, m68k_getpc () + 1); return 6 * CYCLE_UNIT / 2; } m68k_incpc (2); @@ -17054,7 +17088,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6600_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); if (!cctrue (regs.ccrflags, 6)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 10 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -17071,7 +17105,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6601_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 6)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -17085,7 +17119,7 @@ didnt_jump:; uae_u32 REGPARAM2 CPUFUNC(op_66ff_4)(uae_u32 opcode, struct regstruct ®s) { { if (cctrue (regs.ccrflags, 6)) { - exception3i (opcode, m68k_getpc (regs) + 1); + exception3i (opcode, m68k_getpc () + 1); return 6 * CYCLE_UNIT / 2; } m68k_incpc (2); @@ -17098,7 +17132,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6700_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); if (!cctrue (regs.ccrflags, 7)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 10 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -17115,7 +17149,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6701_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 7)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -17129,7 +17163,7 @@ didnt_jump:; uae_u32 REGPARAM2 CPUFUNC(op_67ff_4)(uae_u32 opcode, struct regstruct ®s) { { if (cctrue (regs.ccrflags, 7)) { - exception3i (opcode, m68k_getpc (regs) + 1); + exception3i (opcode, m68k_getpc () + 1); return 6 * CYCLE_UNIT / 2; } m68k_incpc (2); @@ -17142,7 +17176,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6800_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); if (!cctrue (regs.ccrflags, 8)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 10 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -17159,7 +17193,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6801_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 8)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -17173,7 +17207,7 @@ didnt_jump:; uae_u32 REGPARAM2 CPUFUNC(op_68ff_4)(uae_u32 opcode, struct regstruct ®s) { { if (cctrue (regs.ccrflags, 8)) { - exception3i (opcode, m68k_getpc (regs) + 1); + exception3i (opcode, m68k_getpc () + 1); return 6 * CYCLE_UNIT / 2; } m68k_incpc (2); @@ -17186,7 +17220,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6900_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); if (!cctrue (regs.ccrflags, 9)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 10 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -17203,7 +17237,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6901_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 9)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -17217,7 +17251,7 @@ didnt_jump:; uae_u32 REGPARAM2 CPUFUNC(op_69ff_4)(uae_u32 opcode, struct regstruct ®s) { { if (cctrue (regs.ccrflags, 9)) { - exception3i (opcode, m68k_getpc (regs) + 1); + exception3i (opcode, m68k_getpc () + 1); return 6 * CYCLE_UNIT / 2; } m68k_incpc (2); @@ -17230,7 +17264,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6a00_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); if (!cctrue (regs.ccrflags, 10)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 10 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -17247,7 +17281,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6a01_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 10)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -17261,7 +17295,7 @@ didnt_jump:; uae_u32 REGPARAM2 CPUFUNC(op_6aff_4)(uae_u32 opcode, struct regstruct ®s) { { if (cctrue (regs.ccrflags, 10)) { - exception3i (opcode, m68k_getpc (regs) + 1); + exception3i (opcode, m68k_getpc () + 1); return 6 * CYCLE_UNIT / 2; } m68k_incpc (2); @@ -17274,7 +17308,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6b00_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); if (!cctrue (regs.ccrflags, 11)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 10 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -17291,7 +17325,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6b01_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 11)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -17305,7 +17339,7 @@ didnt_jump:; uae_u32 REGPARAM2 CPUFUNC(op_6bff_4)(uae_u32 opcode, struct regstruct ®s) { { if (cctrue (regs.ccrflags, 11)) { - exception3i (opcode, m68k_getpc (regs) + 1); + exception3i (opcode, m68k_getpc () + 1); return 6 * CYCLE_UNIT / 2; } m68k_incpc (2); @@ -17318,7 +17352,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6c00_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); if (!cctrue (regs.ccrflags, 12)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 10 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -17335,7 +17369,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6c01_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 12)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -17349,7 +17383,7 @@ didnt_jump:; uae_u32 REGPARAM2 CPUFUNC(op_6cff_4)(uae_u32 opcode, struct regstruct ®s) { { if (cctrue (regs.ccrflags, 12)) { - exception3i (opcode, m68k_getpc (regs) + 1); + exception3i (opcode, m68k_getpc () + 1); return 6 * CYCLE_UNIT / 2; } m68k_incpc (2); @@ -17362,7 +17396,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6d00_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); if (!cctrue (regs.ccrflags, 13)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 10 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -17379,7 +17413,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6d01_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 13)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -17393,7 +17427,7 @@ didnt_jump:; uae_u32 REGPARAM2 CPUFUNC(op_6dff_4)(uae_u32 opcode, struct regstruct ®s) { { if (cctrue (regs.ccrflags, 13)) { - exception3i (opcode, m68k_getpc (regs) + 1); + exception3i (opcode, m68k_getpc () + 1); return 6 * CYCLE_UNIT / 2; } m68k_incpc (2); @@ -17406,7 +17440,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6e00_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); if (!cctrue (regs.ccrflags, 14)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 10 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -17423,7 +17457,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6e01_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 14)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -17437,7 +17471,7 @@ didnt_jump:; uae_u32 REGPARAM2 CPUFUNC(op_6eff_4)(uae_u32 opcode, struct regstruct ®s) { { if (cctrue (regs.ccrflags, 14)) { - exception3i (opcode, m68k_getpc (regs) + 1); + exception3i (opcode, m68k_getpc () + 1); return 6 * CYCLE_UNIT / 2; } m68k_incpc (2); @@ -17450,7 +17484,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6f00_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_s16 src = get_iword (2); if (!cctrue (regs.ccrflags, 15)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 10 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -17467,7 +17501,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_6f01_4)(uae_u32 opcode, struct regstruct ®s) {{ uae_u32 src = srcreg; if (!cctrue (regs.ccrflags, 15)) goto didnt_jump; if (src & 1) { - exception3i (opcode, m68k_getpc (regs) + 2 + (uae_s32)src); + exception3i (opcode, m68k_getpc () + 2 + (uae_s32)src); return 6 * CYCLE_UNIT / 2; } m68k_incpc ((uae_s32)src + 2); @@ -17481,7 +17515,7 @@ didnt_jump:; uae_u32 REGPARAM2 CPUFUNC(op_6fff_4)(uae_u32 opcode, struct regstruct ®s) { { if (cctrue (regs.ccrflags, 15)) { - exception3i (opcode, m68k_getpc (regs) + 1); + exception3i (opcode, m68k_getpc () + 1); return 6 * CYCLE_UNIT / 2; } m68k_incpc (2); @@ -17649,7 +17683,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_803a_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); @@ -17668,7 +17702,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_803b_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); @@ -17843,7 +17877,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_807a_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); @@ -17862,7 +17896,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_807b_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); @@ -18037,7 +18071,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80ba_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); @@ -18056,7 +18090,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80bb_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); @@ -18098,7 +18132,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80c0_4)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); if (dst < 0) SET_NFLG (1); m68k_incpc (2); - Exception (5, regs); + Exception (5); return 4 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -18134,7 +18168,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80d0_4)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); if (dst < 0) SET_NFLG (1); m68k_incpc (2); - Exception (5, regs); + Exception (5); return 8 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -18171,7 +18205,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80d8_4)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); if (dst < 0) SET_NFLG (1); m68k_incpc (2); - Exception (5, regs); + Exception (5); return 8 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -18208,7 +18242,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80e0_4)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); if (dst < 0) SET_NFLG (1); m68k_incpc (2); - Exception (5, regs); + Exception (5); return 10 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -18244,7 +18278,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80e8_4)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); if (dst < 0) SET_NFLG (1); m68k_incpc (4); - Exception (5, regs); + Exception (5); return 12 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -18280,7 +18314,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80f0_4)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); if (dst < 0) SET_NFLG (1); m68k_incpc (4); - Exception (5, regs); + Exception (5); return 14 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -18315,7 +18349,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80f8_4)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); if (dst < 0) SET_NFLG (1); m68k_incpc (4); - Exception (5, regs); + Exception (5); return 12 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -18350,7 +18384,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80f9_4)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); if (dst < 0) SET_NFLG (1); m68k_incpc (6); - Exception (5, regs); + Exception (5); return 16 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -18377,7 +18411,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80fa_4)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); @@ -18386,7 +18420,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80fa_4)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); if (dst < 0) SET_NFLG (1); m68k_incpc (4); - Exception (5, regs); + Exception (5); return 12 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -18414,7 +18448,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80fb_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s16 src = get_word (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); @@ -18423,7 +18457,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80fb_4)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); if (dst < 0) SET_NFLG (1); m68k_incpc (4); - Exception (5, regs); + Exception (5); return 14 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -18456,7 +18490,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_80fc_4)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); if (dst < 0) SET_NFLG (1); m68k_incpc (4); - Exception (5, regs); + Exception (5); return 8 * CYCLE_UNIT / 2; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; @@ -18921,7 +18955,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81c0_4)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); SET_ZFLG (1); m68k_incpc (2); - Exception (5, regs); + Exception (5); return 4 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -18962,7 +18996,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81d0_4)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); SET_ZFLG (1); m68k_incpc (2); - Exception (5, regs); + Exception (5); return 8 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -19004,7 +19038,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81d8_4)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); SET_ZFLG (1); m68k_incpc (2); - Exception (5, regs); + Exception (5); return 8 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -19046,7 +19080,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81e0_4)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); SET_ZFLG (1); m68k_incpc (2); - Exception (5, regs); + Exception (5); return 10 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -19087,7 +19121,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81e8_4)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); SET_ZFLG (1); m68k_incpc (4); - Exception (5, regs); + Exception (5); return 12 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -19128,7 +19162,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81f0_4)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); SET_ZFLG (1); m68k_incpc (4); - Exception (5, regs); + Exception (5); return 14 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -19168,7 +19202,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81f8_4)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); SET_ZFLG (1); m68k_incpc (4); - Exception (5, regs); + Exception (5); return 12 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -19208,7 +19242,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81f9_4)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); SET_ZFLG (1); m68k_incpc (6); - Exception (5, regs); + Exception (5); return 16 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -19241,7 +19275,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81fa_4)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); @@ -19249,7 +19283,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81fa_4)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); SET_ZFLG (1); m68k_incpc (4); - Exception (5, regs); + Exception (5); return 12 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -19283,7 +19317,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81fb_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s16 src = get_word (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); @@ -19291,7 +19325,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81fb_4)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); SET_ZFLG (1); m68k_incpc (4); - Exception (5, regs); + Exception (5); return 14 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -19329,7 +19363,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_81fc_4)(uae_u32 opcode, struct regstruct ®s) SET_VFLG (1); SET_ZFLG (1); m68k_incpc (4); - Exception (5, regs); + Exception (5); return 8 * CYCLE_UNIT / 2; } CLEAR_CZNV (); @@ -19543,7 +19577,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_903a_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); @@ -19567,7 +19601,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_903b_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); @@ -19813,7 +19847,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_907a_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); @@ -19837,7 +19871,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_907b_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); @@ -20083,7 +20117,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_90ba_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); @@ -20107,7 +20141,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_90bb_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); @@ -20282,7 +20316,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_90fa_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg (regs, dstreg); @@ -20298,7 +20332,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_90fb_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg (regs, dstreg); @@ -21083,7 +21117,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_91fa_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_areg (regs, dstreg); @@ -21099,7 +21133,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_91fb_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_areg (regs, dstreg); @@ -21293,7 +21327,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b03a_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); @@ -21315,7 +21349,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b03b_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); @@ -21539,7 +21573,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b07a_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); @@ -21561,7 +21595,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b07b_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); @@ -21633,9 +21667,6 @@ uae_u32 REGPARAM2 CPUFUNC(op_b088_4)(uae_u32 opcode, struct regstruct ®s) return 6 * CYCLE_UNIT / 2; } -#endif - -#ifdef PART_7 /* CMP.L (An),Dn */ uae_u32 REGPARAM2 CPUFUNC(op_b090_4)(uae_u32 opcode, struct regstruct ®s) { @@ -21701,6 +21732,9 @@ uae_u32 REGPARAM2 CPUFUNC(op_b0a0_4)(uae_u32 opcode, struct regstruct ®s) return 16 * CYCLE_UNIT / 2; } +#endif + +#ifdef PART_7 /* CMP.L (d16,An),Dn */ uae_u32 REGPARAM2 CPUFUNC(op_b0a8_4)(uae_u32 opcode, struct regstruct ®s) { @@ -21788,7 +21822,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b0ba_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); @@ -21810,7 +21844,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b0bb_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); @@ -22035,7 +22069,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b0fa_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg (regs, dstreg); @@ -22057,7 +22091,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b0fb_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg (regs, dstreg); @@ -22782,7 +22816,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b1fa_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_areg (regs, dstreg); @@ -22804,7 +22838,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_b1fb_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_areg (regs, dstreg); @@ -22986,7 +23020,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c03a_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); @@ -23005,7 +23039,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c03b_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); @@ -23180,7 +23214,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c07a_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); @@ -23199,7 +23233,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c07b_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); @@ -23374,7 +23408,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c0ba_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); @@ -23393,7 +23427,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c0bb_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); @@ -23586,7 +23620,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c0fa_4)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); @@ -23607,7 +23641,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c0fb_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); @@ -24275,7 +24309,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c1fa_4)(uae_u32 opcode, struct regstruct ®s) int count_cycles = 0; uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); @@ -24296,7 +24330,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_c1fb_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); @@ -24514,7 +24548,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d03a_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); @@ -24538,7 +24572,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d03b_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s8 src = get_byte (srca); { uae_s8 dst = m68k_dreg (regs, dstreg); @@ -24784,7 +24818,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d07a_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); @@ -24808,7 +24842,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d07b_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s16 src = get_word (srca); { uae_s16 dst = m68k_dreg (regs, dstreg); @@ -25054,7 +25088,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d0ba_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); @@ -25078,7 +25112,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d0bb_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_dreg (regs, dstreg); @@ -25253,7 +25287,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d0fa_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg (regs, dstreg); @@ -25269,7 +25303,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d0fb_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s16 src = get_word (srca); { uae_s32 dst = m68k_areg (regs, dstreg); @@ -26054,7 +26088,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d1fa_4)(uae_u32 opcode, struct regstruct ®s) { uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr srca; - srca = m68k_getpc (regs) + 2; + srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword (2); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_areg (regs, dstreg); @@ -26070,7 +26104,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_d1fb_4)(uae_u32 opcode, struct regstruct ®s) uae_u32 dstreg = (opcode >> 9) & 7; {{ uaecptr tmppc; uaecptr srca; - tmppc = m68k_getpc (regs) + 2; + tmppc = m68k_getpc () + 2; srca = get_disp_ea_000 (regs, tmppc, get_iword (2)); { uae_s32 src = get_long (srca); { uae_s32 dst = m68k_areg (regs, dstreg); @@ -26245,9 +26279,6 @@ uae_u32 REGPARAM2 CPUFUNC(op_e020_4)(uae_u32 opcode, struct regstruct ®s) return 6 * CYCLE_UNIT / 2 + count_cycles; } -#endif - -#ifdef PART_8 /* LSR.B Dn,Dn */ uae_u32 REGPARAM2 CPUFUNC(op_e028_4)(uae_u32 opcode, struct regstruct ®s) { @@ -26372,6 +26403,9 @@ uae_u32 REGPARAM2 CPUFUNC(op_e040_4)(uae_u32 opcode, struct regstruct ®s) return 6 * CYCLE_UNIT / 2 + count_cycles; } +#endif + +#ifdef PART_8 /* LSRQ.W #,Dn */ uae_u32 REGPARAM2 CPUFUNC(op_e048_4)(uae_u32 opcode, struct regstruct ®s) { @@ -28841,7 +28875,7 @@ return 20 * CYCLE_UNIT / 2; /* RTE.L */ uae_u32 REGPARAM2 CPUFUNC(op_4e73_5)(uae_u32 opcode, struct regstruct ®s) { -{if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; } +{if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; } {{ uaecptr sra; sra = m68k_areg (regs, 7); { uae_s16 sr = get_word (sra); @@ -28855,7 +28889,7 @@ uae_u32 REGPARAM2 CPUFUNC(op_4e73_5)(uae_u32 opcode, struct regstruct ®s) exception3i (0x4E73, pc); return 16 * CYCLE_UNIT / 2; } - m68k_setpc (regs, pc); + m68k_setpc (pc); MakeFromSR(regs); }}}}}}return 20 * CYCLE_UNIT / 2; } diff --git a/src/cpustbl.cpp b/src/cpustbl.cpp index 4b7c2408..b54f407f 100644 --- a/src/cpustbl.cpp +++ b/src/cpustbl.cpp @@ -1802,7 +1802,11 @@ const struct cputbl CPUFUNC(op_smalltbl_0)[] = { { CPUFUNC(op_eff0_0), 61424 }, /* BFINS */ { CPUFUNC(op_eff8_0), 61432 }, /* BFINS */ { CPUFUNC(op_eff9_0), 61433 }, /* BFINS */ +{ CPUFUNC(op_f000_0), 61440 }, /* MMUOP030 */ +{ CPUFUNC(op_f008_0), 61448 }, /* MMUOP030 */ { CPUFUNC(op_f010_0), 61456 }, /* MMUOP030 */ +{ CPUFUNC(op_f018_0), 61464 }, /* MMUOP030 */ +{ CPUFUNC(op_f020_0), 61472 }, /* MMUOP030 */ { CPUFUNC(op_f028_0), 61480 }, /* MMUOP030 */ { CPUFUNC(op_f030_0), 61488 }, /* MMUOP030 */ { CPUFUNC(op_f038_0), 61496 }, /* MMUOP030 */ @@ -3672,7 +3676,11 @@ const struct cputbl CPUFUNC(op_smalltbl_1)[] = { { CPUFUNC(op_eff0_0), 61424 }, /* BFINS */ { CPUFUNC(op_eff8_0), 61432 }, /* BFINS */ { CPUFUNC(op_eff9_0), 61433 }, /* BFINS */ +{ CPUFUNC(op_f000_0), 61440 }, /* MMUOP030 */ +{ CPUFUNC(op_f008_0), 61448 }, /* MMUOP030 */ { CPUFUNC(op_f010_0), 61456 }, /* MMUOP030 */ +{ CPUFUNC(op_f018_0), 61464 }, /* MMUOP030 */ +{ CPUFUNC(op_f020_0), 61472 }, /* MMUOP030 */ { CPUFUNC(op_f028_0), 61480 }, /* MMUOP030 */ { CPUFUNC(op_f030_0), 61488 }, /* MMUOP030 */ { CPUFUNC(op_f038_0), 61496 }, /* MMUOP030 */ @@ -5538,7 +5546,11 @@ const struct cputbl CPUFUNC(op_smalltbl_2)[] = { { CPUFUNC(op_eff0_0), 61424 }, /* BFINS */ { CPUFUNC(op_eff8_0), 61432 }, /* BFINS */ { CPUFUNC(op_eff9_0), 61433 }, /* BFINS */ +{ CPUFUNC(op_f000_0), 61440 }, /* MMUOP030 */ +{ CPUFUNC(op_f008_0), 61448 }, /* MMUOP030 */ { CPUFUNC(op_f010_0), 61456 }, /* MMUOP030 */ +{ CPUFUNC(op_f018_0), 61464 }, /* MMUOP030 */ +{ CPUFUNC(op_f020_0), 61472 }, /* MMUOP030 */ { CPUFUNC(op_f028_0), 61480 }, /* MMUOP030 */ { CPUFUNC(op_f030_0), 61488 }, /* MMUOP030 */ { CPUFUNC(op_f038_0), 61496 }, /* MMUOP030 */ @@ -8133,6 +8145,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_4a30_4), 18992 }, /* TST */ { CPUFUNC(op_4a38_4), 19000 }, /* TST */ { CPUFUNC(op_4a39_4), 19001 }, /* TST */ +{ CPUFUNC(op_4a3c_4), 19004 }, /* TST */ { CPUFUNC(op_4a40_4), 19008 }, /* TST */ { CPUFUNC(op_4a50_4), 19024 }, /* TST */ { CPUFUNC(op_4a58_4), 19032 }, /* TST */ @@ -8141,6 +8154,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_4a70_4), 19056 }, /* TST */ { CPUFUNC(op_4a78_4), 19064 }, /* TST */ { CPUFUNC(op_4a79_4), 19065 }, /* TST */ +{ CPUFUNC(op_4a7c_4), 19068 }, /* TST */ { CPUFUNC(op_4a80_4), 19072 }, /* TST */ { CPUFUNC(op_4a90_4), 19088 }, /* TST */ { CPUFUNC(op_4a98_4), 19096 }, /* TST */ @@ -8149,6 +8163,7 @@ const struct cputbl CPUFUNC(op_smalltbl_4)[] = { { CPUFUNC(op_4ab0_4), 19120 }, /* TST */ { CPUFUNC(op_4ab8_4), 19128 }, /* TST */ { CPUFUNC(op_4ab9_4), 19129 }, /* TST */ +{ CPUFUNC(op_4abc_4), 19132 }, /* TST */ { CPUFUNC(op_4ac0_4), 19136 }, /* TAS */ { CPUFUNC(op_4ad0_4), 19152 }, /* TAS */ { CPUFUNC(op_4ad8_4), 19160 }, /* TAS */ @@ -9680,6 +9695,7 @@ const struct cputbl CPUFUNC(op_smalltbl_5)[] = { { CPUFUNC(op_4a30_4), 18992 }, /* TST */ { CPUFUNC(op_4a38_4), 19000 }, /* TST */ { CPUFUNC(op_4a39_4), 19001 }, /* TST */ +{ CPUFUNC(op_4a3c_4), 19004 }, /* TST */ { CPUFUNC(op_4a40_4), 19008 }, /* TST */ { CPUFUNC(op_4a50_4), 19024 }, /* TST */ { CPUFUNC(op_4a58_4), 19032 }, /* TST */ @@ -9688,6 +9704,7 @@ const struct cputbl CPUFUNC(op_smalltbl_5)[] = { { CPUFUNC(op_4a70_4), 19056 }, /* TST */ { CPUFUNC(op_4a78_4), 19064 }, /* TST */ { CPUFUNC(op_4a79_4), 19065 }, /* TST */ +{ CPUFUNC(op_4a7c_4), 19068 }, /* TST */ { CPUFUNC(op_4a80_4), 19072 }, /* TST */ { CPUFUNC(op_4a90_4), 19088 }, /* TST */ { CPUFUNC(op_4a98_4), 19096 }, /* TST */ @@ -9696,6 +9713,7 @@ const struct cputbl CPUFUNC(op_smalltbl_5)[] = { { CPUFUNC(op_4ab0_4), 19120 }, /* TST */ { CPUFUNC(op_4ab8_4), 19128 }, /* TST */ { CPUFUNC(op_4ab9_4), 19129 }, /* TST */ +{ CPUFUNC(op_4abc_4), 19132 }, /* TST */ { CPUFUNC(op_4ac0_4), 19136 }, /* TAS */ { CPUFUNC(op_4ad0_4), 19152 }, /* TAS */ { CPUFUNC(op_4ad8_4), 19160 }, /* TAS */ @@ -11226,6 +11244,7 @@ const struct cputbl CPUFUNC(op_smalltbl_11)[] = { { CPUFUNC(op_4a30_11), 18992 }, /* TST */ { CPUFUNC(op_4a38_11), 19000 }, /* TST */ { CPUFUNC(op_4a39_11), 19001 }, /* TST */ +{ CPUFUNC(op_4a3c_11), 19004 }, /* TST */ { CPUFUNC(op_4a40_11), 19008 }, /* TST */ { CPUFUNC(op_4a50_11), 19024 }, /* TST */ { CPUFUNC(op_4a58_11), 19032 }, /* TST */ @@ -11234,6 +11253,7 @@ const struct cputbl CPUFUNC(op_smalltbl_11)[] = { { CPUFUNC(op_4a70_11), 19056 }, /* TST */ { CPUFUNC(op_4a78_11), 19064 }, /* TST */ { CPUFUNC(op_4a79_11), 19065 }, /* TST */ +{ CPUFUNC(op_4a7c_11), 19068 }, /* TST */ { CPUFUNC(op_4a80_11), 19072 }, /* TST */ { CPUFUNC(op_4a90_11), 19088 }, /* TST */ { CPUFUNC(op_4a98_11), 19096 }, /* TST */ @@ -11242,6 +11262,7 @@ const struct cputbl CPUFUNC(op_smalltbl_11)[] = { { CPUFUNC(op_4ab0_11), 19120 }, /* TST */ { CPUFUNC(op_4ab8_11), 19128 }, /* TST */ { CPUFUNC(op_4ab9_11), 19129 }, /* TST */ +{ CPUFUNC(op_4abc_11), 19132 }, /* TST */ { CPUFUNC(op_4ac0_11), 19136 }, /* TAS */ { CPUFUNC(op_4ad0_11), 19152 }, /* TAS */ { CPUFUNC(op_4ad8_11), 19160 }, /* TAS */ diff --git a/src/custom.cpp b/src/custom.cpp index ec187bf2..74355f4f 100644 --- a/src/custom.cpp +++ b/src/custom.cpp @@ -12,14 +12,15 @@ #include "sysdeps.h" #include #include + #include "options.h" #include "uae.h" #include "gensound.h" #include "audio.h" #include "sd-pandora/sound.h" #include "memory.h" -#include "newcpu.h" #include "custom.h" +#include "newcpu.h" #include "cia.h" #include "disk.h" #include "savestate.h" @@ -42,22 +43,20 @@ extern int screen_is_picasso; -static uae_u16 last_custom_value1; - -/* Events */ - unsigned long last_synctime = 0; static int frh_count = 0; #define LAST_SPEEDUP_LINE 30 -#define SPEEDUP_CYCLES_JIT 3000 +#define SPEEDUP_CYCLES_JIT 2800 #define SPEEDUP_CYCLES_NONJIT 600 -#define SPEEDUP_CYCLES_HAM 1000 -#define SPEEDUP_TIMELIMIT_JIT -1000 +#define SPEEDUP_TIMELIMIT_JIT -1500 #define SPEEDUP_TIMELIMIT_NONJIT -2000 -#define SPEEDUP_TIMELIMIT_HAM -4000 int pissoff_value = SPEEDUP_CYCLES_JIT * CYCLE_UNIT; int speedup_timelimit = SPEEDUP_TIMELIMIT_JIT; +static uae_u16 last_custom_value1; + +/* Events */ + static int rpt_did_reset; struct ev eventtab[ev_max]; struct ev2 eventtab2[ev2_max]; @@ -93,8 +92,9 @@ int maxvpos_nom = MAXVPOS_PAL; // nominal value (same as maxvpos but "faked" max static int maxvpos_total = 511; int minfirstline = VBLANK_ENDLINE_PAL; static int equ_vblank_endline = EQU_ENDLINE_PAL; +static bool equ_vblank_toggle = true; int vblank_hz = VBLANK_HZ_PAL; -frame_time_t syncbase; +int syncbase; static int fmode; static uae_u16 beamcon0; static uae_u16 new_beamcon0; @@ -130,9 +130,9 @@ static int last_sprite_point, nr_armed; static int sprite_width, sprres; int sprite_buffer_res; -static int bpl1dat_written, bpl1dat_early; +static uae_u16 bplxdat[8]; +static bool bpl1dat_written, bpl1dat_early, bpl1dat_written_at_least_once; static uae_s16 bpl1mod, bpl2mod; - static uaecptr bplpt[8]; static struct color_entry current_colors; @@ -162,12 +162,14 @@ static int last_hdiw; static enum diw_states diwstate, hdiwstate, ddfstate; static int last_copper_hpos; +static int copper_access; /* Sprite collisions */ static unsigned int clxdat, clxcon, clxcon2, clxcon_bpl_enable, clxcon_bpl_match; enum copper_states { COP_stop, + COP_waitforever, COP_read1, COP_read2, COP_bltwait, @@ -178,6 +180,9 @@ enum copper_states { COP_skip1, COP_strobe_delay1, COP_strobe_delay2, + COP_strobe_delay1x, + COP_strobe_delay2x, + COP_strobe_extra, // just to skip current cycle when CPU wrote to COPJMP COP_start_delay }; @@ -225,7 +230,8 @@ static int copper_enabled_thisline; * Statistics */ -static unsigned long int lastframetime = 0, timeframes = 0; +static unsigned long lastframetime = 0; +static unsigned long frametime = 0, timeframes = 0; unsigned long hsync_counter = 0; /* Recording of custom chip register changes. */ @@ -268,6 +274,23 @@ enum fetchstate { #define nodraw() (framecnt != 0) +void set_speedup_values(void) +{ + if(currprefs.m68k_speed < 0) { + if (currprefs.cachesize) { + pissoff_value = SPEEDUP_CYCLES_JIT * CYCLE_UNIT; + speedup_timelimit = SPEEDUP_TIMELIMIT_JIT; + } else { + pissoff_value = SPEEDUP_CYCLES_NONJIT * CYCLE_UNIT; + speedup_timelimit = SPEEDUP_TIMELIMIT_NONJIT; + } + } else { + pissoff_value = 0; + speedup_timelimit = 0; + } +} + + void reset_frame_rate_hack (void) { is_syncline = 0; @@ -276,9 +299,10 @@ void reset_frame_rate_hack (void) rpt_did_reset = 1; vsyncmintime = read_processor_time() + vsynctimebase; + write_log (_T("Resetting frame rate hack\n")); } -STATIC_INLINE void setclr (uae_u16 *_GCCRES_ p, uae_u16 val) +STATIC_INLINE void setclr (uae_u16 *p, uae_u16 val) { if (val & 0x8000) *p |= val & 0x7FFF; @@ -288,10 +312,10 @@ STATIC_INLINE void setclr (uae_u16 *_GCCRES_ p, uae_u16 val) static void update_mirrors(void) { - aga_mode = (currprefs.chipset_mask & CSMASK_AGA) ? 1 : 0; + aga_mode = (currprefs.chipset_mask & CSMASK_AGA) != 0; } -STATIC_INLINE uae_u8 *_GCCRES_ pfield_xlateptr (uaecptr plpt, int bytecount) +STATIC_INLINE uae_u8 *pfield_xlateptr (uaecptr plpt, int bytecount) { plpt &= chipmem_mask; if((plpt + bytecount) > allocated_chipmem) @@ -299,7 +323,7 @@ STATIC_INLINE uae_u8 *_GCCRES_ pfield_xlateptr (uaecptr plpt, int bytecount) return chipmemory + plpt; } -STATIC_INLINE void docols (struct color_entry *_GCCRES_ colentry) +STATIC_INLINE void docols (struct color_entry *colentry) { int i; @@ -350,6 +374,11 @@ static void remember_ctable (void) thisline_decision.ctable = remembered_color_entry; } +STATIC_INLINE int get_equ_vblank_endline (void) +{ + return equ_vblank_endline + (equ_vblank_toggle ? (lof_current ? 1 : 0) : 0); +} + /* Called to determine the state of the horizontal display window state * machine at the current position. It might have changed since we last * checked. */ @@ -362,10 +391,10 @@ static void decide_diw (int hpos) */ int hdiw = hpos >= maxhpos ? maxhpos * 2 + 1 : hpos * 2 + 2; - if (!(currprefs.chipset_mask & CSMASK_ECS_DENISE) && vpos <= equ_vblank_endline) { + if (!(currprefs.chipset_mask & CSMASK_ECS_DENISE) && vpos <= get_equ_vblank_endline ()) hdiw = diw_hcounter; - hdiw &= 511; - } + /* always mask, bad programs may have set maxhpos = 256 */ + hdiw &= 511; for (;;) { int lhdiw = hdiw; if (last_hdiw > lhdiw) @@ -394,7 +423,10 @@ static int real_bitplane_number[3][3][9]; /* Disable bitplane DMA if planes > available DMA slots. This is needed e.g. by the Sanity WOC demo (at the "Party Effect"). */ -#define GET_PLANES_LIMIT() real_bitplane_number[fetchmode][bplcon0_res][bplcon0_planes] +STATIC_INLINE int GET_PLANES_LIMIT () +{ + return real_bitplane_number[fetchmode][bplcon0_res][bplcon0_planes]; +} /* The HRM says 0xD8, but that can't work... */ #define HARD_DDF_STOP 0xd4 @@ -527,6 +559,7 @@ static uae_u32 fetched_aga1[MAX_PLANES]; /* Expansions from bplcon0/bplcon1. */ static int toscr_res, toscr_nr_planes; +static int toscr_nr_planes2; static int toscr_res2; static int toscr_delay[2]; @@ -553,10 +586,17 @@ static void record_color_change2 (int hpos, int regno, unsigned long value) pos++; // BPLCON4 change needs 1 lores pixel delay curr_color_changes[next_color_change].linepos = pos; curr_color_changes[next_color_change].regno = regno; - curr_color_changes[next_color_change++].value = value; + curr_color_changes[next_color_change].value = value; + next_color_change++; curr_color_changes[next_color_change].regno = -1; } +// OCS/ECS, lores, 7 planes = 4 "real" planes + BPL5DAT and BPL6DAT as static 5th and 6th plane +STATIC_INLINE int isocs7planes (void) +{ + return !(currprefs.chipset_mask & CSMASK_AGA) && bplcon0_res == 0 && bplcon0_planes == 7; +} + STATIC_INLINE int is_bitplane_dma (int hpos) { if (fetch_state == fetch_not_started || hpos < plfstrt) @@ -576,6 +616,12 @@ STATIC_INLINE void update_denise (int hpos) bplcon0dd = bplcon0d; } toscr_nr_planes = GET_PLANES (bplcon0d); + if (isocs7planes ()) { + if (toscr_nr_planes2 < 6) + toscr_nr_planes2 = 6; + } else { + toscr_nr_planes2 = toscr_nr_planes; + } } static int bpldmasetuphpos; @@ -616,13 +662,12 @@ static void setup_fmodes (int hpos) } bplcon0_planes = GET_PLANES (bplcon0); bplcon0_planes_limit = GET_PLANES_LIMIT (); - int fm_index = fetchmode * 4 + bplcon0_res; - fetchunit = fetchunits[fm_index]; + fetchunit = fetchunits[fetchmode * 4 + bplcon0_res]; fetchunit_mask = fetchunit - 1; - int fetchstart_shift = fetchstarts[fm_index]; + int fetchstart_shift = fetchstarts[fetchmode * 4 + bplcon0_res]; fetchstart = 1 << fetchstart_shift; fetchstart_mask = fetchstart - 1; - int fm_maxplane_shift = fm_maxplanes[fm_index]; + int fm_maxplane_shift = fm_maxplanes[fetchmode * 4 + bplcon0_res]; fm_maxplane = 1 << fm_maxplane_shift; fetch_modulo_cycle = fetchunit - fetchstart; curr_diagram = cycle_diagram_table[fetchmode][bplcon0_res][bplcon0_planes_limit]; @@ -703,13 +748,13 @@ STATIC_INLINE void compute_toscr_delay (int hpos, int bplcon1) STATIC_INLINE void update_toscr_planes (void) { - if (toscr_nr_planes > thisline_decision.nr_planes) { + if (toscr_nr_planes2 > thisline_decision.nr_planes) { if(thisline_decision.nr_planes > 0) { int j; - for (j = thisline_decision.nr_planes; j < toscr_nr_planes; j++) + for (j = thisline_decision.nr_planes; j < toscr_nr_planes2; j++) memset ((uae_u32 *)(line_data[next_lineno] + 2 * MAX_WORDS_PER_LINE * j), 0, out_offs * 4); } - thisline_decision.nr_planes = toscr_nr_planes; + thisline_decision.nr_planes = toscr_nr_planes2; } } @@ -719,14 +764,14 @@ STATIC_INLINE void maybe_first_bpl1dat (int hpos) // early bpl1dat crap fix (Sequential engine animation) if (plfleft_real < 0) { int i; - for (i = 0; i < thisline_decision.nr_planes; i++) { + for (i = 0; i < MAX_PLANES; i++) { todisplay[i][0] = 0; todisplay[i][1] = 0; todisplay[i][2] = 0; todisplay[i][3] = 0; } plfleft_real = hpos; - bpl1dat_early = 1; + bpl1dat_early = true; } } else { plfleft_real = thisline_decision.plfleft = hpos; @@ -739,21 +784,21 @@ STATIC_INLINE void fetch (int nr, int fm) if (nr < bplcon0_planes_limit) { uaecptr p = bplpt[nr]; if (nr == 0) - bpl1dat_written = 1; + bpl1dat_written = true; switch (fm) { case 0: - fetched[nr] = last_custom_value1 = CHIPMEM_AGNUS_WGET_CUSTOM (p); + fetched[nr] = bplxdat[nr] = last_custom_value1 = chipmem_wget_indirect (p); bplpt[nr] += 2; break; case 1: - fetched_aga0[nr] = CHIPMEM_LGET_CUSTOM (p); + fetched_aga0[nr] = chipmem_lget_indirect (p); last_custom_value1 = (uae_u16)fetched_aga0[nr]; bplpt[nr] += 4; break; case 2: - fetched_aga1[nr] = CHIPMEM_LGET_CUSTOM (p); - fetched_aga0[nr] = CHIPMEM_LGET_CUSTOM (p + 4); + fetched_aga1[nr] = chipmem_lget_indirect (p); + fetched_aga0[nr] = chipmem_lget_indirect (p + 4); last_custom_value1 = (uae_u16)fetched_aga0[nr]; bplpt[nr] += 8; break; @@ -771,7 +816,11 @@ STATIC_INLINE void fetch (int nr, int fm) mod = bpl1mod; bplpt[nr] += mod; } - } + } else { + // use whatever left in BPLxDAT if no DMA + // normally useless but "7-planes" feature won't work without this + fetched[nr] = bplxdat[nr]; + } } STATIC_INLINE void toscr_3_ecs (int nbits) @@ -781,20 +830,19 @@ STATIC_INLINE void toscr_3_ecs (int nbits) int i; uae_u32 mask = 0xFFFF >> (16 - nbits); - for (i = 0; i < toscr_nr_planes; i += 2) { + for (i = 0; i < toscr_nr_planes2; i += 2) { outword[i] <<= nbits; outword[i] |= (todisplay[i][0] >> (16 - nbits + delay1)) & mask; todisplay[i][0] <<= nbits; } - for (i = 1; i < toscr_nr_planes; i += 2) { + for (i = 1; i < toscr_nr_planes2; i += 2) { outword[i] <<= nbits; outword[i] |= (todisplay[i][0] >> (16 - nbits + delay2)) & mask; todisplay[i][0] <<= nbits; } } - -STATIC_INLINE void shift32plus (uae_u32 *p, const int n) +STATIC_INLINE void shift32plus (uae_u32 *p, int n) { uae_u32 t = p[1]; t <<= n; @@ -802,7 +850,7 @@ STATIC_INLINE void shift32plus (uae_u32 *p, const int n) p[1] = t; } -STATIC_INLINE void aga_shift (uae_u32 *p, const int n, const int fm) +STATIC_INLINE void aga_shift (uae_u32 *p, int n, int fm) { if (fm == 2) { shift32plus (p + 2, n); @@ -815,31 +863,40 @@ STATIC_INLINE void aga_shift (uae_u32 *p, const int n, const int fm) STATIC_INLINE void toscr_3_aga (int nbits, int fm) { - int offs[2]; - int off1[2]; + int delay1 = toscr_delay[0]; + int delay2 = toscr_delay[1]; int i; uae_u32 mask = 0xFFFF >> (16 - nbits); - - offs[0] = (16 << fm) - nbits + toscr_delay[0]; - off1[0] = offs[0] >> 5; - if (off1[0] == 3) - off1[0] = 2; - offs[0] -= off1[0] * 32; - offs[1] = (16 << fm) - nbits + toscr_delay[1]; - off1[1] = offs[1] >> 5; - if (off1[1] == 3) - off1[1] = 2; - offs[1] -= off1[1] * 32; - - for (i = 0; i < toscr_nr_planes; i += 1) { - int idx = i & 1; - uae_u32 t0 = todisplay[i][off1[idx]]; - uae_u32 t1 = todisplay[i][off1[idx] + 1]; - uae_u64 t = (((uae_u64)t1) << 32) | t0; - outword[i] <<= nbits; - outword[i] |= (t >> offs[idx]) & mask; - aga_shift (todisplay[i], nbits, fm); + { + int offs = (16 << fm) - nbits + delay1; + int off1 = offs >> 5; + if (off1 == 3) + off1 = 2; + offs -= off1 * 32; + for (i = 0; i < toscr_nr_planes2; i += 2) { + uae_u32 t0 = todisplay[i][off1]; + uae_u32 t1 = todisplay[i][off1 + 1]; + uae_u64 t = (((uae_u64)t1) << 32) | t0; + outword[i] <<= nbits; + outword[i] |= (t >> offs) & mask; + aga_shift (todisplay[i], nbits, fm); + } + } + { + int offs = (16 << fm) - nbits + delay2; + int off1 = offs >> 5; + if (off1 == 3) + off1 = 2; + offs -= off1 * 32; + for (i = 1; i < toscr_nr_planes2; i += 2) { + uae_u32 t0 = todisplay[i][off1]; + uae_u32 t1 = todisplay[i][off1 + 1]; + uae_u64 t = (((uae_u64)t1) << 32) | t0; + outword[i] <<= nbits; + outword[i] |= (t >> offs) & mask; + aga_shift (todisplay[i], nbits, fm); + } } } @@ -868,9 +925,8 @@ STATIC_INLINE void toscr_1 (int nbits, int fm) dataptr32 += out_offs; for (i = 0; i < thisline_decision.nr_planes; i++) { - if (i >= toscr_nr_planes) - outword[i] = 0; *dataptr32 = outword[i]; + outword[i] = 0; dataptr32 += MAX_WORDS_PER_LINE >> 1; } out_offs++; @@ -952,45 +1008,31 @@ STATIC_INLINE void flush_display (int fm) toscr_nbits = 0; } +STATIC_INLINE void fetch_start () +{ + fetch_state = fetch_started; +} + /* Called when all planes have been fetched, i.e. when a new block of data is available to be displayed. The data in fetched[] is moved into todisplay[]. */ -STATIC_INLINE void beginning_of_plane_block (int hpos, int fm) +STATIC_INLINE void beginning_of_plane_block_x (int hpos, int fm) { + int i; int oleft = thisline_decision.plfleft; static uae_u16 bplcon1t, bplcon1t2; flush_display (fm); - if (fm == 0) { - todisplay[0][0] |= fetched[0]; - todisplay[1][0] |= fetched[1]; - todisplay[2][0] |= fetched[2]; - todisplay[3][0] |= fetched[3]; - todisplay[4][0] |= fetched[4]; - todisplay[5][0] |= fetched[5]; - todisplay[6][0] |= fetched[6]; - todisplay[7][0] |= fetched[7]; + if (fm == 0) + for (i = 0; i < MAX_PLANES; i++) { + todisplay[i][0] |= fetched[i]; } - else { - if (fm == 2) { - todisplay[0][1] = fetched_aga1[0]; - todisplay[1][1] = fetched_aga1[1]; - todisplay[2][1] = fetched_aga1[2]; - todisplay[3][1] = fetched_aga1[3]; - todisplay[4][1] = fetched_aga1[4]; - todisplay[5][1] = fetched_aga1[5]; - todisplay[6][1] = fetched_aga1[6]; - todisplay[7][1] = fetched_aga1[7]; - } - todisplay[0][0] = fetched_aga0[0]; - todisplay[1][0] = fetched_aga0[1]; - todisplay[2][0] = fetched_aga0[2]; - todisplay[3][0] = fetched_aga0[3]; - todisplay[4][0] = fetched_aga0[4]; - todisplay[5][0] = fetched_aga0[5]; - todisplay[6][0] = fetched_aga0[6]; - todisplay[7][0] = fetched_aga0[7]; + else + for (i = 0; i < MAX_PLANES; i++) { + if (fm == 2) + todisplay[i][1] = fetched_aga1[i]; + todisplay[i][0] = fetched_aga0[i]; } update_denise (hpos); @@ -1006,265 +1048,182 @@ STATIC_INLINE void beginning_of_plane_block (int hpos, int fm) compute_toscr_delay (hpos, bplcon1t2); } +static void beginning_of_plane_block_0 (int hpos) { beginning_of_plane_block_x(hpos, 0); }; +static void beginning_of_plane_block_1 (int hpos) { beginning_of_plane_block_x(hpos, 1); }; +static void beginning_of_plane_block_2 (int hpos) { beginning_of_plane_block_x(hpos, 2); }; +STATIC_INLINE void beginning_of_plane_block (int hpos, int fm) +{ + if(fm == 0) + beginning_of_plane_block_0(hpos); + else if(fm == 1) + beginning_of_plane_block_1(hpos); + else + beginning_of_plane_block_2(hpos); +} -#define long_fetch_ecs_init(PLANE, NWORDS, DMA) \ - uae_u16 *real_pt = (uae_u16 *)pfield_xlateptr (bplpt[PLANE], NWORDS << 1); \ - int delay = toscr_delay[(PLANE & 1)]; \ - int tmp_nbits = out_nbits; \ - uae_u32 shiftbuffer = todisplay[PLANE][0]; \ - uae_u32 outval = outword[PLANE]; \ - uae_u32 fetchval = fetched[PLANE]; \ - uae_u32 *dataptr_start = (uae_u32 *)(line_data[next_lineno] + ((PLANE<<1)*MAX_WORDS_PER_LINE)); \ - register uae_u32 *dataptr = dataptr_start + out_offs; \ - if (DMA) \ - bplpt[PLANE] += NWORDS << 1; \ - if (real_pt == 0) \ - return; \ - while (NWORDS > 0) { \ - int bits_left = 32 - tmp_nbits; \ - uae_u32 t; \ - shiftbuffer |= fetchval; \ +/* The usual inlining tricks - don't touch unless you know what you are doing. */ +STATIC_INLINE void long_fetch_ecs(int plane, int nwords, int weird_number_of_bits, int dma) +{ + uae_u16 *real_pt = (uae_u16 *)pfield_xlateptr (bplpt[plane], nwords * 2); + int delay = toscr_delay[(plane & 1)]; + int tmp_nbits = out_nbits; + uae_u32 shiftbuffer = todisplay[plane][0]; + uae_u32 outval = outword[plane]; + uae_u32 fetchval = fetched[plane]; + uae_u32 *dataptr_start = (uae_u32 *)(line_data[next_lineno] + (2 * plane * MAX_WORDS_PER_LINE)); + uae_u32 *dataptr = dataptr_start + out_offs; + + if (dma) { + bplpt[plane] += nwords *2; + } + + if (real_pt == 0) + /* @@@ Don't do this, fall back on chipmem_wget instead. */ + return; + + while (nwords > 0) { + int bits_left = 32 - tmp_nbits; + uae_u32 t; + shiftbuffer |= fetchval; t = (shiftbuffer >> delay) & 0xFFFF; -#define long_fetch_ecs_weird() \ - if (bits_left < 16) { \ - outval <<= bits_left; \ - outval |= t >> (16 - bits_left); \ - *dataptr++ = outval; \ - outval = t; \ - tmp_nbits = 16 - bits_left; \ - shiftbuffer <<= 16; \ - } else - - -#define long_fetch_ecs_end(PLANE,NWORDS, DMA) \ - { \ - outval = (outval << 16) | t; \ - shiftbuffer <<= 16; \ - tmp_nbits += 16; \ - if (tmp_nbits == 32) { \ - *dataptr++ = outval; \ - tmp_nbits = 0; \ - } \ - } \ - NWORDS--; \ - if (DMA) { \ - __asm__ __volatile__ ( \ - "ldrh %[val], [%[pt]], #2 \n\t" \ - "rev16 %[val], %[val] \n\t" \ - : [val] "=r" (fetchval), [pt] "+r" (real_pt) ); \ - } \ - } \ - fetched[PLANE] = fetchval; \ - todisplay[PLANE][0] = shiftbuffer; \ - outword[PLANE] = outval; - - -static __inline__ void long_fetch_ecs_0(int plane, int nwords, int dma) -{ - long_fetch_ecs_init(plane, nwords, dma) - long_fetch_ecs_end(plane, nwords, dma) -} - -static __inline__ void long_fetch_ecs_1(int plane, int nwords, int dma) -{ - long_fetch_ecs_init(plane, nwords, dma) - long_fetch_ecs_weird() - long_fetch_ecs_end(plane, nwords, dma) + if (weird_number_of_bits && bits_left < 16) { + outval <<= bits_left; + outval |= t >> (16 - bits_left); + *dataptr++ = outval; + outval = t; + tmp_nbits = 16 - bits_left; + shiftbuffer <<= 16; + } else { + outval = (outval << 16) | t; + shiftbuffer <<= 16; + tmp_nbits += 16; + if (tmp_nbits == 32) { + *dataptr++ = outval; + tmp_nbits = 0; + } + } + nwords--; + if (dma) { + __asm__ ( + "ldrh %[val], [%[pt]], #2 \n\t" + "rev16 %[val], %[val] \n\t" + : [val] "=r" (fetchval), [pt] "+r" (real_pt) ); + } + } + fetched[plane] = fetchval; + todisplay[plane][0] = shiftbuffer; + outword[plane] = outval; } -#define long_fetch_aga_1_init() \ - uae_u32 *real_pt = (uae_u32 *)pfield_xlateptr (bplpt[plane], nwords * 2); \ - int tmp_nbits = out_nbits; \ - uae_u32 outval = outword[plane]; \ - uae_u32 fetchval0 = fetched_aga0[plane]; \ - uae_u32 fetchval1 = fetched_aga1[plane]; \ - uae_u32 *dataptr_start = (uae_u32 *)(line_data[next_lineno] + (plane<<1)*MAX_WORDS_PER_LINE); \ - uae_u32 *dataptr = dataptr_start + out_offs; \ - \ - int offs = (16 << 1) - 16 + toscr_delay[plane & 1]; \ - int off1 = offs >> 5; \ - if (off1 == 3) \ - off1 = 2; \ - offs -= off1 << 5; \ - \ - if (dma) \ - bplpt[plane] += nwords << 1; \ - \ - if (real_pt == 0) \ - /* @@@ Don't do this, fall back on chipmem_wget instead. */ \ - return; \ - \ - /* Instead of shifting a 64 bit value more than 16 bits, we */ \ - /* move the pointer for x bytes and shift a 32 bit value less */ \ - /* than 16 bits. See (1) */ \ - int buffer_add = (offs >> 4); \ - offs &= 15; \ - \ - while (nwords > 0) { \ - int i; \ - uae_u32 *shiftbuffer = todisplay[plane]; \ - \ - shiftbuffer[0] = fetchval0; \ - \ - /* (1) */ \ - if(buffer_add) \ - shiftbuffer = (uae_u32 *)((uae_u16 *)shiftbuffer + buffer_add); \ - \ - for (i = 0; i < (1 << 1); i++) { \ - int bits_left = 32 - tmp_nbits; \ - \ - uae_u32 t0 = shiftbuffer[off1]; \ - t0 = (uae_u32)(t0 >> offs) & 0xFFFF; +STATIC_INLINE void long_fetch_aga (int plane, int nwords, int weird_number_of_bits, int fm, int dma) +{ + uae_u32 *real_pt = (uae_u32 *)pfield_xlateptr (bplpt[plane], nwords * 2); + int delay = toscr_delay[plane & 1]; + int tmp_nbits = out_nbits; + uae_u32 outval = outword[plane]; + uae_u32 fetchval0 = fetched_aga0[plane]; + uae_u32 fetchval1 = fetched_aga1[plane]; + uae_u32 *dataptr_start = (uae_u32 *)(line_data[next_lineno] + 2 * plane * MAX_WORDS_PER_LINE); + uae_u32 *dataptr = dataptr_start + out_offs; -#define long_fetch_aga_2_init() \ - uae_u32 *real_pt = (uae_u32 *)pfield_xlateptr (bplpt[plane], nwords * 2); \ - int tmp_nbits = out_nbits; \ - uae_u32 outval = outword[plane]; \ - uae_u32 fetchval0 = fetched_aga0[plane]; \ - uae_u32 fetchval1 = fetched_aga1[plane]; \ - uae_u32 *dataptr_start = (uae_u32 *)(line_data[next_lineno] + (plane<<1)*MAX_WORDS_PER_LINE); \ - uae_u32 *dataptr = dataptr_start + out_offs; \ - \ - int offs = (16 << 2) - 16 + toscr_delay[plane & 1]; \ - int off1 = offs >> 5; \ - if (off1 == 3) \ - off1 = 2; \ - offs -= off1 << 5; \ - \ - if (dma) \ - bplpt[plane] += nwords << 1; \ - \ - if (real_pt == 0) \ - /* @@@ Don't do this, fall back on chipmem_wget instead. */ \ - return; \ - \ - /* Instead of shifting a 64 bit value more than 16 bits, we */ \ - /* move the pointer for x bytes and shift a 32 bit value less */ \ - /* than 16 bits. See (1) */ \ - int buffer_add = (offs >> 4); \ - offs &= 15; \ - \ - while (nwords > 0) { \ - int i; \ - uae_u32 *shiftbuffer = todisplay[plane]; \ - \ - shiftbuffer[0] = fetchval0; \ - shiftbuffer[1] = fetchval1; \ - \ - /* (1) */ \ - if(buffer_add) \ - shiftbuffer = (uae_u32 *)((uae_u16 *)shiftbuffer + buffer_add); \ - \ - for (i = 0; i < (1 << 2); i++) { \ - int bits_left = 32 - tmp_nbits; \ - \ - uae_u32 t0 = shiftbuffer[off1]; \ - t0 = (uae_u32)(t0 >> offs) & 0xFFFF; + int offs = (16 << fm) - 16 + delay; + int off1 = offs >> 5; + if (off1 == 3) + off1 = 2; + offs -= off1 << 5; -#define long_fetch_aga_weird() \ - if (bits_left < 16) { \ - outval <<= bits_left; \ - outval |= t0 >> (16 - bits_left); \ - *dataptr++ = outval; \ - outval = t0; \ - tmp_nbits = 16 - bits_left; \ - /* Instead of shifting 128 bit of data for 16 bit, */ \ - /* we move the pointer two bytes. See also (2) and (3) */ \ - /*aga_shift (shiftbuffer, 16, fm); */ \ - shiftbuffer = (uae_u32 *)((uae_u16 *)shiftbuffer - 1); \ - } else + if (dma) { + bplpt[plane] += nwords * 2; + } + + if (real_pt == 0) + /* @@@ Don't do this, fall back on chipmem_wget instead. */ + return; + + /* Instead of shifting a 64 bit value more than 16 bits, we */ + /* move the pointer for x bytes and shift a 32 bit value less */ + /* than 16 bits. See (1) */ + int buffer_add = (offs >> 4); + offs &= 15; + + while (nwords > 0) { + int i; + uae_u32 *shiftbuffer = todisplay[plane]; + + shiftbuffer[0] = fetchval0; + if(fm == 2) + shiftbuffer[1] = fetchval1; + + /* (1) */ + if(buffer_add) + shiftbuffer = (uae_u32 *)((uae_u16 *)shiftbuffer + buffer_add); + + for (i = 0; i < (1 << fm); i++) { + int bits_left = 32 - tmp_nbits; + + uae_u32 t0 = shiftbuffer[off1]; + + t0 = (uae_u32)((t0 >> offs) & 0xFFFF); -#define long_fetch_aga_1_end() \ - { \ - outval = (outval << 16) | t0; \ - /* (2) */ \ - /*aga_shift (shiftbuffer, 16, fm); */ \ - shiftbuffer = (uae_u32 *)((uae_u16 *)shiftbuffer - 1); \ - tmp_nbits += 16; \ - if (tmp_nbits == 32) { \ - *dataptr++ = outval; \ - tmp_nbits = 0; \ - } \ - } \ - } \ - \ - /* (3) */ \ - /* We have to move the data, but now, we can simply */ \ - /* copy long values and have to do it only once. */ \ - todisplay[plane][1] = todisplay[plane][0]; \ - \ - nwords -= 1 << 1; \ - \ - if (dma) { \ - fetchval0 = do_get_mem_long (real_pt); \ - real_pt += 1; \ - } \ - } \ - fetched_aga0[plane] = fetchval0; \ - fetched_aga1[plane] = fetchval1; \ + if (weird_number_of_bits && bits_left < 16) { + outval <<= bits_left; + outval |= t0 >> (16 - bits_left); + *dataptr++ = outval; + outval = t0; + tmp_nbits = 16 - bits_left; + /* Instead of shifting 128 bit of data for 16 bit, */ + /* we move the pointer two bytes. See also (2) and (3) */ + /*aga_shift (shiftbuffer, 16, fm); */ + shiftbuffer = (uae_u32 *)((uae_u16 *)shiftbuffer - 1); + } else { + outval = (outval << 16) | t0; + /* (2) */ + /*aga_shift (shiftbuffer, 16, fm); */ + shiftbuffer = (uae_u32 *)((uae_u16 *)shiftbuffer - 1); + tmp_nbits += 16; + if (tmp_nbits == 32) { + *dataptr++ = outval; + tmp_nbits = 0; + } + } + } + + /* (3) */ + /* We have to move the data, but now, we can simply */ + /* copy long values and have to do it only once. */ + if(fm == 1) + todisplay[plane][1] = todisplay[plane][0]; + else { + todisplay[plane][3] = todisplay[plane][1]; + todisplay[plane][2] = todisplay[plane][0]; + } + + nwords -= 1 << fm; + + if (dma) { + if(fm == 1) + fetchval0 = do_get_mem_long (real_pt); + else { + fetchval1 = do_get_mem_long (real_pt); + fetchval0 = do_get_mem_long (real_pt + 1); + } + real_pt += fm; + } + } + fetched_aga0[plane] = fetchval0; + fetched_aga1[plane] = fetchval1; outword[plane] = outval; - -#define long_fetch_aga_2_end() \ - { \ - outval = (outval << 16) | t0; \ - /* (2) */ \ - /*aga_shift (shiftbuffer, 16, fm); */ \ - shiftbuffer = (uae_u32 *)((uae_u16 *)shiftbuffer - 1); \ - tmp_nbits += 16; \ - if (tmp_nbits == 32) { \ - *dataptr++ = outval; \ - tmp_nbits = 0; \ - } \ - } \ - } \ - \ - /* (3) */ \ - /* We have to move the data, but now, we can simply */ \ - /* copy long values and have to do it only once. */ \ - todisplay[plane][3] = todisplay[plane][1]; \ - todisplay[plane][2] = todisplay[plane][0]; \ - \ - nwords -= 1 << 2; \ - \ - if (dma) { \ - fetchval1 = do_get_mem_long (real_pt); \ - fetchval0 = do_get_mem_long (real_pt + 1); \ - real_pt += 2; \ - } \ - } \ - fetched_aga0[plane] = fetchval0; \ - fetched_aga1[plane] = fetchval1; \ - outword[plane] = outval; - - -static __inline__ void long_fetch_aga_1_0(int plane, int nwords, int dma) -{ - long_fetch_aga_1_init() - long_fetch_aga_1_end() } -static __inline__ void long_fetch_aga_2_0(int plane, int nwords, int dma) -{ - long_fetch_aga_2_init() - long_fetch_aga_2_end() -} - -static __inline__ void long_fetch_aga_1_1(int plane, int nwords, int dma) -{ - long_fetch_aga_1_init() - long_fetch_aga_weird() - long_fetch_aga_1_end() -} - -static __inline__ void long_fetch_aga_2_1(int plane, int nwords, int dma) -{ - long_fetch_aga_2_init() - long_fetch_aga_weird() - long_fetch_aga_2_end() -} +static void long_fetch_ecs_0 (int hpos, int nwords, int dma) { long_fetch_ecs (hpos, nwords, 0, dma); } +static void long_fetch_ecs_1 (int hpos, int nwords, int dma) { long_fetch_ecs (hpos, nwords, 1, dma); } +static void long_fetch_aga_1_0 (int hpos, int nwords, int dma) { long_fetch_aga (hpos, nwords, 0, 1, dma); } +static void long_fetch_aga_1_1 (int hpos, int nwords, int dma) { long_fetch_aga (hpos, nwords, 1, 1, dma); } +static void long_fetch_aga_2_0 (int hpos, int nwords, int dma) { long_fetch_aga (hpos, nwords, 0, 2, dma); } +static void long_fetch_aga_2_1 (int hpos, int nwords, int dma) { long_fetch_aga (hpos, nwords, 1, 2, dma); } static void do_long_fetch (int nwords, int dma, int fm) { @@ -1383,13 +1342,14 @@ STATIC_INLINE int one_fetch_cycle_0 (int pos, int ddfstop_to_test, int dma, int // and we must not draw anything at all in next dma block if this happens // (Disposable Hero titlescreen) fetch_state = fetch_was_plane0; - bpl1dat_written = 0; + bpl1dat_written = false; } fetch_cycle++; toscr_nbits += toscr_res2; if (toscr_nbits > 16) { + write_log (_T("toscr_nbits > 16 (%d)"), toscr_nbits); toscr_nbits = 0; } if (toscr_nbits == 16) @@ -1408,10 +1368,52 @@ STATIC_INLINE int one_fetch_cycle (int pos, int ddfstop_to_test, int dma, int fm case 0: return one_fetch_cycle_fm0 (pos, ddfstop_to_test, dma); case 1: return one_fetch_cycle_fm1 (pos, ddfstop_to_test, dma); case 2: return one_fetch_cycle_fm2 (pos, ddfstop_to_test, dma); - default: return 0; + default: write_log (_T("fm corrupt")); return 0; } } +static void update_bpldats (int hpos) +{ + for (int i = 0; i < MAX_PLANES; i++) { + fetched_aga0[i] = bplxdat[i]; + fetched_aga1[i] = 0; + fetched[i] = bplxdat[i]; + } + beginning_of_plane_block (hpos, fetchmode); +} + +static void update_fetch_x (int until, int fm) +{ + int pos; + + if (nodraw ()) + return; + + pos = last_fetch_hpos; + update_toscr_planes (); + + // not optimized, update_fetch_x() is extremely rarely used. + for (; pos < until; pos++) { + + toscr_nbits += 2 << toscr_res; + + if (toscr_nbits > 16) { + write_log (_T("xtoscr_nbits > 16 (%d)"), toscr_nbits); + toscr_nbits = 0; + } + if (toscr_nbits == 16) + flush_display (fm); + + } + + if (until >= maxhpos) { + finish_final_fetch (pos, fm); + return; + } + + flush_display (fm); +} + STATIC_INLINE void update_fetch (int until, int fm) { int pos; @@ -1449,7 +1451,7 @@ STATIC_INLINE void update_fetch (int until, int fm) if (fetch_state == fetch_was_plane0) break; - fetch_state = fetch_started; + fetch_start (); if (one_fetch_cycle (pos, ddfstop_to_test, dma, fm)) return; } @@ -1498,7 +1500,7 @@ STATIC_INLINE void update_fetch (int until, int fm) beginning_of_plane_block (pos, fm); estimate_last_fetch_cycle (pos); } - fetch_state = fetch_started; + fetch_start (); if (one_fetch_cycle (pos, ddfstop_to_test, dma, fm)) return; @@ -1522,30 +1524,44 @@ STATIC_INLINE void decide_fetch (int hpos) case 0: update_fetch_0 (hpos); break; case 1: update_fetch_1 (hpos); break; case 2: update_fetch_2 (hpos); break; + default: write_log (_T("fetchmode corrupt")); } + } else if (bpl1dat_written_at_least_once) { + // "PIO" mode display + update_fetch_x (hpos, fetchmode); + bpl1dat_written = false; } maybe_check (hpos); last_fetch_hpos = hpos; } } -STATIC_INLINE void start_bpl_dma (int hstart) +static void reset_bpl_vars (void) { - plfstrt_sprite = plfstrt; - fetch_state = fetch_started; - fetch_cycle = 0; - last_fetch_hpos = hstart; - cycle_diagram_shift = last_fetch_hpos; out_nbits = 0; out_offs = 0; toscr_nbits = 0; thisline_decision.bplres = bplcon0_res; +} + +STATIC_INLINE void start_bpl_dma (int hstart) +{ + plfstrt_sprite = plfstrt; + fetch_start (); + fetch_cycle = 0; ddfstate = DIW_waiting_stop; compute_toscr_delay (last_fetch_hpos, bplcon1); /* If someone already wrote BPL1DAT, clear the area between that point and the real fetch start. */ + if (bpl1dat_written_at_least_once && hstart > last_fetch_hpos) { + update_fetch_x (hstart, fetchmode); + bpl1dat_written_at_least_once = false; + } else { + reset_bpl_vars (); + } +#if 0 if (!nodraw ()) { if (thisline_decision.plfleft >= 0) { out_nbits = (plfstrt - thisline_decision.plfleft) << (1 + toscr_res); @@ -1554,6 +1570,9 @@ STATIC_INLINE void start_bpl_dma (int hstart) } update_toscr_planes (); } +#endif + last_fetch_hpos = hstart; + cycle_diagram_shift = hstart; } /* this may turn on datafetch if program turns dma on during the ddf */ @@ -1660,11 +1679,26 @@ static void record_color_change (int hpos, int regno, unsigned long value) record_color_change2 (hpos, regno, value); } +static bool isbrdblank (int hpos, uae_u16 bplcon0, uae_u16 bplcon3) +{ + bool brdblank; + brdblank = (currprefs.chipset_mask & CSMASK_ECS_DENISE) && (bplcon0 & 1) && (bplcon3 & 0x20); + if (hpos >= 0 && current_colors.borderblank != brdblank) { + record_color_change (hpos, 0, COLOR_CHANGE_BRDBLANK | (brdblank ? 1 : 0)); + current_colors.borderblank = brdblank; + remembered_color_entry = -1; + } + return brdblank; +} + static void record_register_change (int hpos, int regno, uae_u16 value) { if (regno == 0x100) { // BPLCON0 if (value & 0x800) thisline_decision.ham_seen = 1; + isbrdblank (hpos, value, bplcon3); + } else if (regno == 0x106) { // BPLCON3 + isbrdblank (hpos, bplcon0, value); } record_color_change (hpos, regno + 0x1000, value); } @@ -1681,7 +1715,10 @@ static int expand_sprres (uae_u16 con0, uae_u16 con3) res = RES_LORES; break; case 0: /* ECS defaults (LORES,HIRES=LORES sprite,SHRES=HIRES sprite) */ - res = RES_LORES; + if ((currprefs.chipset_mask & CSMASK_ECS_DENISE) && GET_RES_DENISE (con0) == RES_SUPERHIRES) + res = RES_HIRES; + else + res = RES_LORES; break; case 1: res = RES_LORES; @@ -1705,14 +1742,6 @@ static int expand_sprres (uae_u16 con0, uae_u16 con3) do_playfield_collisions (); \ } -#define DO_SPRITE_COLLISIONS \ -{ \ - if (!clxcon_bpl_enable) \ - clxdat |= 0x1FE; \ - else \ - do_sprite_collisions (); \ -} - /* handle very rarely needed playfield collision (CLXDAT bit 0) */ /* only known game needing this is Rotor */ static void do_playfield_collisions (void) @@ -1757,6 +1786,14 @@ static void do_playfield_collisions (void) clxdat |= 1; } +#define DO_SPRITE_COLLISIONS \ +{ \ + if (!clxcon_bpl_enable) \ + clxdat |= 0x1FE; \ + else \ + do_sprite_collisions (); \ +} + /* Sprite-to-sprite collisions are taken care of in record_sprite. This one does playfield/sprite collisions. */ static void do_sprite_collisions (void) @@ -1825,7 +1862,7 @@ static void do_sprite_collisions (void) } } -STATIC_INLINE void record_sprite_1 (int sprxp, uae_u16 *_GCCRES_ buf, uae_u32 datab, int num, int dbl, +STATIC_INLINE void record_sprite_1 (int sprxp, uae_u16 *buf, uae_u32 datab, int num, int dbl, unsigned int mask, int do_collisions, uae_u32 collision_mask) { int j = 0; @@ -1883,7 +1920,7 @@ STATIC_INLINE void record_sprite_1 (int sprxp, uae_u16 *_GCCRES_ buf, uae_u32 da The data is recorded either in lores pixels (if OCS/ECS), or in hires or superhires pixels (if AGA). */ -static void record_sprite (int line, int num, int sprxp, uae_u16 *_GCCRES_ data, uae_u16 *_GCCRES_ datb, unsigned int ctl) +static void record_sprite (int line, int num, int sprxp, uae_u16 *data, uae_u16 *datb, unsigned int ctl) { struct sprite_entry *e = curr_sprite_entries + next_sprite_entry; int i; @@ -1912,9 +1949,11 @@ static void record_sprite (int line, int num, int sprxp, uae_u16 *_GCCRES_ data, e->has_attached = 0; } - if (sprxp < e->pos) + if (sprxp < e->pos) { + write_log (_T("sprxp < e->pos")); return; - + } + e->max = sprxp + width; e[1].first_pixel = e->first_pixel + ((e->max - e->pos + 3) & ~3); next_sprite_forced = 0; @@ -2107,9 +2146,9 @@ STATIC_INLINE void finish_decisions (void) next_color_change += (HBLANK_OFFSET + 1) / 2; diw_hcounter += maxhpos * 2; - if (!(currprefs.chipset_mask & CSMASK_ECS_DENISE) && vpos == equ_vblank_endline - 1) + if (!(currprefs.chipset_mask & CSMASK_ECS_DENISE) && vpos == get_equ_vblank_endline () - 1) diw_hcounter++; - if ((currprefs.chipset_mask & CSMASK_ECS_DENISE) || vpos > equ_vblank_endline) { + if ((currprefs.chipset_mask & CSMASK_ECS_DENISE) || vpos > get_equ_vblank_endline ()) { diw_hcounter = maxhpos * 2; last_hdiw = 2 - 1; } @@ -2121,11 +2160,12 @@ static void reset_decisions (void) if (nodraw ()) return; - toscr_nr_planes = 0; + toscr_nr_planes = toscr_nr_planes2 = 0; thisline_decision.bplres = bplcon0_res; thisline_decision.nr_planes = 0; - bpl1dat_written = 0; - bpl1dat_early = 0; + bpl1dat_written = false; + bpl1dat_written_at_least_once = false; + bpl1dat_early = false; plfleft_real = -1; thisline_decision.plfleft = -1; @@ -2162,39 +2202,13 @@ static void reset_decisions (void) if (plf_state == plf_active && !(currprefs.chipset_mask & CSMASK_ECS_AGNUS)) plf_state = plf_idle; - { - register int i; - register int c = 0; - register unsigned *ptr0=(uae_u32 *)todisplay; /* clear only todisplay[i][0] if OCS/ECS */ - register unsigned *ptr1=fetched; - register unsigned *ptr2=outword; - if (currprefs.chipset_mask & CSMASK_AGA) - { - register unsigned *ptr3=fetched_aga0; - register unsigned *ptr4=fetched_aga1; - for(i=0;i 1) update_sound (vblank_hz, (bplcon0 & 4) ? -1 : lof_store); } @@ -2227,8 +2241,21 @@ int current_maxvpos (void) static void compute_framesync (void) { - if (abs (vblank_hz - 50) < 1 || abs (vblank_hz - 60) < 1) { - //vsync_switchmode (vblank_hz > 55 ? 60 : 50); + int v; + + if (!picasso_on) { + if (abs (vblank_hz - 50) < 1 || abs (vblank_hz - 60) < 1) { + vsync_switchmode (vblank_hz); + } + v = (vblank_hz >= 55) ? 60 : 50; + } else { + v = (currprefs.ntscmode ? 60 : 50); + } + + changed_prefs.chipset_refreshrate = currprefs.chipset_refreshrate = v; + + if (target_graphics_buffer_update ()) { + reset_drawing (); } memset (line_decisions, 0, sizeof line_decisions); @@ -2264,6 +2291,7 @@ static void init_hz (bool fullinit) vblank_hz = VBLANK_HZ_PAL; sprite_vblank_endline = VBLANK_SPRITE_PAL; equ_vblank_endline = EQU_ENDLINE_PAL; + equ_vblank_toggle = true; } else { maxvpos = MAXVPOS_NTSC; maxhpos = MAXHPOS_NTSC; @@ -2271,7 +2299,11 @@ static void init_hz (bool fullinit) vblank_hz = VBLANK_HZ_NTSC; sprite_vblank_endline = VBLANK_SPRITE_NTSC; equ_vblank_endline = EQU_ENDLINE_NTSC; + equ_vblank_toggle = false; } + // long/short field refresh rate adjustment + vblank_hz = vblank_hz * (maxvpos * 2 + 1) / ((maxvpos + lof_current) * 2); + maxvpos_nom = maxvpos; if (vpos_count > 0) { // we come here if vpos_count != maxvpos and beamcon0 didn't change @@ -2293,7 +2325,9 @@ static void init_hz (bool fullinit) maxhpos = htotal + 1; float new_hz = 227.0 * 312.0 * 50.0 / (float)(maxvpos * maxhpos); vblank_hz = (int)(new_hz + 0.5); - minfirstline = vsstop; + minfirstline = vsstop > vbstop ? vsstop : vbstop; + if (minfirstline > maxvpos / 2) + minfirstline = vsstop > vsstop ? vbstop : vsstop; if (minfirstline < 2) minfirstline = 2; if (minfirstline >= maxvpos) @@ -2302,6 +2336,11 @@ static void init_hz (bool fullinit) maxvpos_nom = maxvpos; equ_vblank_endline = -1; hzc = 1; +#ifdef WITH_INGAME_WARNING + char _info[64]; + sprintf(_info, "Programmend HZ: %d", vblank_hz); + InGameMessage(_info); +#endif } if (maxvpos_nom >= MAXVPOS) maxvpos_nom = MAXVPOS; @@ -2328,6 +2367,9 @@ static void init_hz (bool fullinit) init_hz_p96 (); #endif inputdevice_tablet_strobe (); + + if (fullinit) + vpos_count_diff = maxvpos_nom; } void init_hz (void) @@ -2428,18 +2470,24 @@ static uae_u32 REGPARAM2 timehack_helper (TrapContext *context) /* * register functions */ -STATIC_INLINE uae_u16 DENISEID (void) +STATIC_INLINE uae_u16 DENISEID (int *missing) { + *missing = 0; if (currprefs.chipset_mask & CSMASK_AGA) { return 0x00F8; } if (currprefs.chipset_mask & CSMASK_ECS_DENISE) return 0xFFFC; + if (currprefs.cpu_model == 68000 && currprefs.cpu_compatible) + *missing = 1; return 0xFFFF; } STATIC_INLINE uae_u16 DMACONR (int hpos) { - return (dmacon | (bltstate == BLT_done ? 0 : 0x4000) | (blt_info.blitzero ? 0x2000 : 0)); + dmacon &= ~(0x4000 | 0x2000); + dmacon |= (bltstate == BLT_done ? 0 : 0x4000) + | (blt_info.blitzero ? 0x2000 : 0); + return dmacon; } STATIC_INLINE uae_u16 INTENAR (void) { @@ -2450,6 +2498,15 @@ STATIC_INLINE uae_u16 ADKCONR (void) return adkcon; } +STATIC_INLINE int GETVPOS (void) +{ + return vpos; +} +STATIC_INLINE int GETHPOS (void) +{ + return current_hpos (); +} + // DFF006 = 0.W must be valid result but better do this only in 68000 modes (whdload black screen!) #define HPOS_OFFSET (currprefs.cpu_model < 68020 ? 3 : 0) @@ -2457,8 +2514,8 @@ STATIC_INLINE uae_u16 ADKCONR (void) STATIC_INLINE uae_u16 VPOSR (void) { unsigned int csbit = 0; - uae_u16 vp = vpos; - uae_u16 hp = current_hpos (); + uae_u16 vp = GETVPOS (); + uae_u16 hp = GETHPOS (); if (hp + HPOS_OFFSET >= maxhpos) { vp++; @@ -2504,8 +2561,8 @@ static void VHPOSW (uae_u16 v) STATIC_INLINE uae_u16 VHPOSR (void) { - uae_u16 vp = vpos; - uae_u16 hp = current_hpos (); + uae_u16 vp = GETVPOS (); + uae_u16 hp = GETHPOS (); hp += HPOS_OFFSET; if (hp >= maxhpos) { hp -= maxhpos; @@ -2524,14 +2581,13 @@ STATIC_INLINE uae_u16 VHPOSR (void) return vp; } - -STATIC_INLINE int test_copper_dangerous (unsigned int address) +static int test_copper_dangerous (unsigned int address) { int addr = address & 0x01fe; if (addr < ((copcon & 2) ? ((currprefs.chipset_mask & CSMASK_ECS_AGNUS) ? 0 : 0x40) : 0x80)) { cop_state.state = COP_stop; copper_enabled_thisline = 0; - unset_special (regs, SPCFLAG_COPPER); + unset_special (SPCFLAG_COPPER); return 1; } return 0; @@ -2556,8 +2612,8 @@ static void immediate_copper (int num) break; pos++; oldpos = pos; - cop_state.i1 = CHIPMEM_AGNUS_WGET_CUSTOM (cop_state.ip); - cop_state.i2 = CHIPMEM_AGNUS_WGET_CUSTOM (cop_state.ip + 2); + cop_state.i1 = chipmem_wget_indirect (cop_state.ip); + cop_state.i2 = chipmem_wget_indirect (cop_state.ip + 2); cop_state.ip += 4; if (!(cop_state.i1 & 1)) { // move cop_state.i1 &= 0x1fe; @@ -2580,7 +2636,7 @@ static void immediate_copper (int num) } } cop_state.state = COP_stop; - unset_special (regs, SPCFLAG_COPPER); + unset_special (SPCFLAG_COPPER); } STATIC_INLINE void COP1LCH (uae_u16 v) @@ -2600,7 +2656,7 @@ STATIC_INLINE void COP2LCL (uae_u16 v) cop2lc = (cop2lc & ~0xffff) | (v & 0xfffe); } -static void compute_spcflag_copper (void); +static void compute_spcflag_copper (int hpos); // vblank = copper starts at hpos=2 // normal COPJMP write: takes 2 more cycles @@ -2609,12 +2665,16 @@ static void COPJMP (int num, int vblank) int was_active = eventtab[ev_copper].active; int oldstrobe = cop_state.strobe; - unset_special (regs, SPCFLAG_COPPER); + unset_special (SPCFLAG_COPPER); cop_state.ignore_next = 0; if (!oldstrobe) cop_state.state_prev = cop_state.state; - cop_state.state = vblank ? COP_start_delay : COP_strobe_delay1; - cop_state.vpos = vpos; + if ((cop_state.state == COP_wait || cop_state.state == COP_waitforever) && !vblank) { + cop_state.state = COP_strobe_delay1x; + } else { + cop_state.state = vblank ? COP_start_delay : (copper_access ? COP_strobe_delay1 : COP_strobe_extra); + } + cop_state.vpos = vpos; cop_state.hpos = current_hpos () & ~1; copper_enabled_thisline = 0; cop_state.strobe = num; @@ -2630,7 +2690,7 @@ static void COPJMP (int num, int vblank) events_schedule (); if (dmaen (DMA_COPPER)) { - compute_spcflag_copper (); + compute_spcflag_copper (current_hpos ()); } else if (oldstrobe > 0 && oldstrobe != num && cop_state.state_prev == COP_wait) { /* dma disabled, copper idle and accessed both COPxJMPs -> copper stops! */ cop_state.state = COP_stop; @@ -2663,20 +2723,20 @@ static void DMACON (int hpos, uae_u16 v) eventtab[ev_copper].active = 0; if (newcop && !oldcop) { - compute_spcflag_copper (); + compute_spcflag_copper (hpos); } else if (!newcop) { copper_enabled_thisline = 0; - unset_special (regs, SPCFLAG_COPPER); + unset_special (SPCFLAG_COPPER); } } if ((dmacon & DMA_BLITPRI) > (oldcon & DMA_BLITPRI) && bltstate != BLT_done) - set_special (regs, SPCFLAG_BLTNASTY); + set_special (SPCFLAG_BLTNASTY); if (dmaen (DMA_BLITTER) && bltstate == BLT_init) blitter_check_start (); if ((dmacon & (DMA_BLITPRI | DMA_BLITTER | DMA_MASTER)) != (DMA_BLITPRI | DMA_BLITTER | DMA_MASTER)) - unset_special (regs, SPCFLAG_BLTNASTY); + unset_special (SPCFLAG_BLTNASTY); if (changed & (DMA_MASTER | 0x0f)) audio_state_machine (); @@ -2710,7 +2770,7 @@ int intlev (void) return -1; } -STATIC_INLINE void INTENA (uae_u16 v) +static void INTENA (uae_u16 v) { uae_u16 old = intena; setclr (&intena,v); @@ -2791,11 +2851,22 @@ static void BPLxPTL (int hpos, uae_u16 v, int num) { decide_line (hpos); decide_fetch (hpos); + /* chipset feature: BPLxPTL write and next cycle doing DMA fetch using same pointer register -> + * this write goes nowhere (same happens with all DMA channels, not just BPL) + * (intro MoreNewStuffy by PlasmaForce) + */ + /* only detect copper accesses to prevent too fast CPU mode glitches */ + if (copper_access && is_bitplane_dma (hpos + 1) == num + 1) + return; bplpt[num] = (bplpt[num] & 0xffff0000) | (v & 0x0000fffe); } static void BPLCON0_Denise (int hpos, uae_u16 v, bool immediate) { + if (! (currprefs.chipset_mask & CSMASK_ECS_DENISE)) + v &= ~0x00F1; + else if (! (currprefs.chipset_mask & CSMASK_AGA)) + v &= ~0x00B0; v &= ~(0x0200 | 0x0100 | 0x0080 | 0x0020); if (bplcon0d == v) @@ -2806,7 +2877,7 @@ static void BPLCON0_Denise (int hpos, uae_u16 v, bool immediate) if (immediate) { record_register_change (hpos, 0x100, v); } else { - record_register_change (hpos, 0x100, (bplcon0d & ~(0x800 | 0x400 | 0x80)) | (v & (0x0800 | 0x400 | 0x80))); + record_register_change (hpos, 0x100, (bplcon0d & ~(0x800 | 0x400 | 0x80)) | (v & (0x0800 | 0x400 | 0x80 | 0x01))); } bplcon0d = v & ~0x80; @@ -2910,16 +2981,27 @@ static void BPL2MOD (int hpos, uae_u16 v) bpl2mod = v; } -STATIC_INLINE void BPL1DAT (int hpos, uae_u16 v) +/* Needed in special OCS/ECS "7-plane" mode, + * also handles CPU generated bitplane data + */ +static void BPLxDAT (int hpos, int num, uae_u16 v) { - decide_line (hpos); - decide_fetch (hpos); - - bpl1dat_written = 1; - if (thisline_decision.plfleft < 0) { - thisline_decision.plfleft = hpos; - compute_delay_offset (); + // only BPL0DAT access can do anything visible + if (num == 0 && hpos >= 7) { + decide_line (hpos); + decide_fetch (hpos); } + bplxdat[num] = v; + if (num == 0 && hpos >= 7) { + bpl1dat_written = true; + bpl1dat_written_at_least_once = true; + if (thisline_decision.plfleft < 0) { + thisline_decision.plfleft = hpos & ~3; + reset_bpl_vars (); + compute_delay_offset (); + } + update_bpldats (hpos); + } } static void DIWSTRT (int hpos, uae_u16 v) @@ -3028,13 +3110,14 @@ static void BLTBDAT (uae_u16 v) blt_info.bltbhold = v >> (bltcon1 >> 12); blt_info.bltbdat = v; } +STATIC_INLINE void BLTCDAT (uae_u16 v) { maybe_blit (0); blt_info.bltcdat = v; } -#define BLTCDAT(V) maybe_blit (0); blt_info.bltcdat = V -#define BLTAMOD(V) maybe_blit (1); blt_info.bltamod = (uae_s16)(V & 0xFFFE) -#define BLTBMOD(V) maybe_blit (1); blt_info.bltbmod = (uae_s16)(V & 0xFFFE) -#define BLTCMOD(V) maybe_blit (1); blt_info.bltcmod = (uae_s16)(V & 0xFFFE) -#define BLTDMOD(V) maybe_blit (1); blt_info.bltdmod = (uae_s16)(V & 0xFFFE) -#define BLTCON0(V) maybe_blit (0); bltcon0 = V; reset_blit (1) +STATIC_INLINE void BLTAMOD (uae_u16 v) { maybe_blit (1); blt_info.bltamod = (uae_s16)(v & 0xFFFE); } +STATIC_INLINE void BLTBMOD (uae_u16 v) { maybe_blit (1); blt_info.bltbmod = (uae_s16)(v & 0xFFFE); } +STATIC_INLINE void BLTCMOD (uae_u16 v) { maybe_blit (1); blt_info.bltcmod = (uae_s16)(v & 0xFFFE); } +STATIC_INLINE void BLTDMOD (uae_u16 v) { maybe_blit (1); blt_info.bltdmod = (uae_s16)(v & 0xFFFE); } + +STATIC_INLINE void BLTCON0 (uae_u16 v) { maybe_blit (2); bltcon0 = v; reset_blit (1); } /* The next category is "Most useless hardware register". * And the winner is... */ @@ -3042,22 +3125,23 @@ static void BLTCON0L (uae_u16 v) { if (! (currprefs.chipset_mask & CSMASK_ECS_AGNUS)) return; // ei voittoa. - maybe_blit (0); + maybe_blit (2); bltcon0 = (bltcon0 & 0xFF00) | (v & 0xFF); reset_blit (1); } +STATIC_INLINE void BLTCON1 (uae_u16 v) { maybe_blit (2); bltcon1 = v; reset_blit (2); } -#define BLTCON1(V) maybe_blit (0); bltcon1 = V; reset_blit (2) -#define BLTAFWM(V) maybe_blit (0); blt_info.bltafwm = V -#define BLTALWM(V) maybe_blit (0); blt_info.bltalwm = V -#define BLTAPTH(V) maybe_blit (0); bltapt = (bltapt & 0xffff) | ((uae_u32)V << 16) -#define BLTAPTL(V) maybe_blit (0); bltapt = (bltapt & ~0xffff) | (V & 0xFFFE) -#define BLTBPTH(V) maybe_blit (0); bltbpt = (bltbpt & 0xffff) | ((uae_u32)V << 16) -#define BLTBPTL(V) maybe_blit (0); bltbpt = (bltbpt & ~0xffff) | (V & 0xFFFE) -#define BLTCPTH(V) maybe_blit (0); bltcpt = (bltcpt & 0xffff) | ((uae_u32)V << 16) -#define BLTCPTL(V) maybe_blit (0); bltcpt = (bltcpt & ~0xffff) | (V & 0xFFFE) -#define BLTDPTH(V) maybe_blit (0); bltdpt = (bltdpt & 0xffff) | ((uae_u32)V << 16) -#define BLTDPTL(V) maybe_blit (0); bltdpt = (bltdpt & ~0xffff) | (V & 0xFFFE) +STATIC_INLINE void BLTAFWM (uae_u16 v) { maybe_blit (2); blt_info.bltafwm = v; } +STATIC_INLINE void BLTALWM (uae_u16 v) { maybe_blit (2); blt_info.bltalwm = v; } + +STATIC_INLINE void BLTAPTH (uae_u16 v) { maybe_blit (0); bltapt = (bltapt & 0xffff) | ((uae_u32)v << 16); } +STATIC_INLINE void BLTAPTL (uae_u16 v) { maybe_blit (0); bltapt = (bltapt & ~0xffff) | (v & 0xFFFE); } +STATIC_INLINE void BLTBPTH (uae_u16 v) { maybe_blit (0); bltbpt = (bltbpt & 0xffff) | ((uae_u32)v << 16); } +STATIC_INLINE void BLTBPTL (uae_u16 v) { maybe_blit (0); bltbpt = (bltbpt & ~0xffff) | (v & 0xFFFE); } +STATIC_INLINE void BLTCPTH (uae_u16 v) { maybe_blit (0); bltcpt = (bltcpt & 0xffff) | ((uae_u32)v << 16); } +STATIC_INLINE void BLTCPTL (uae_u16 v) { maybe_blit (0); bltcpt = (bltcpt & ~0xffff) | (v & 0xFFFE); } +STATIC_INLINE void BLTDPTH (uae_u16 v) { maybe_blit (0); bltdpt = (bltdpt & 0xffff) | ((uae_u32)v << 16); } +STATIC_INLINE void BLTDPTL (uae_u16 v) { maybe_blit (0); bltdpt = (bltdpt & ~0xffff) | (v & 0xFFFE); } static void BLTSIZE (uae_u16 v) { @@ -3170,11 +3254,10 @@ STATIC_INLINE void SPRxDATB_1 (uae_u16 v, int num) sprdatb[num][2] = v; sprdatb[num][3] = v; } -#define SPRxDATA(HPOS,V,NUM) decide_sprites (HPOS); SPRxDATA_1 (V, NUM) -#define SPRxDATB(HPOS,V,NUM) decide_sprites (HPOS); SPRxDATB_1 (V, NUM) -#define SPRxCTL(HPOS,V,NUM) decide_sprites (HPOS); SPRxCTL_1 (V, NUM) -#define SPRxPOS(HPOS,V,NUM) decide_sprites (HPOS); SPRxPOS_1 (V, NUM) - +STATIC_INLINE void SPRxDATA (int hpos, uae_u16 v, int num) { decide_sprites (hpos); SPRxDATA_1 (v, num); } +STATIC_INLINE void SPRxDATB (int hpos, uae_u16 v, int num) { decide_sprites (hpos); SPRxDATB_1 (v, num); } +STATIC_INLINE void SPRxCTL (int hpos, uae_u16 v, int num) { decide_sprites (hpos); SPRxCTL_1 (v, num); } +STATIC_INLINE void SPRxPOS (int hpos, uae_u16 v, int num) { decide_sprites (hpos); SPRxPOS_1 (v, num); } static void SPRxPTH (int hpos, uae_u16 v, int num) { decide_sprites (hpos); @@ -3277,6 +3360,7 @@ static void COLOR_WRITE (int hpos, uae_u16 v, int num) } else { if (current_colors.color_regs_ecs[num] == v) return; + /* Call this with the old table still intact. */ record_color_change (hpos, num, v); remembered_color_entry = -1; @@ -3372,7 +3456,7 @@ static void predict_copper (void) case COP_read2: w1 = cop_state.i1; - w2 = CHIPMEM_AGNUS_WGET_CUSTOM (ip); + w2 = chipmem_wget_indirect (ip); if (w1 & 1) { if (w2 & 1) return; // SKIP @@ -3389,17 +3473,25 @@ static void predict_copper (void) break; case COP_strobe_delay2: + case COP_strobe_delay2x: case COP_start_delay: c_hpos += 2; state = COP_read1; break; + case COP_strobe_extra: + c_hpos += 6; + state = COP_read1; + break; + case COP_strobe_delay1: + case COP_strobe_delay1x: c_hpos += 4; state = COP_read1; break; case COP_stop: + case COP_waitforever: case COP_bltwait: case COP_skip_in2: case COP_skip1: @@ -3426,9 +3518,9 @@ static void predict_copper (void) while (c_hpos + 1 < maxhpos) { if (state == COP_read1) { - w1 = CHIPMEM_AGNUS_WGET_CUSTOM (ip); + w1 = chipmem_wget_indirect (ip); if (w1 & 1) { - w2 = CHIPMEM_AGNUS_WGET_CUSTOM (ip + 2); + w2 = chipmem_wget_indirect (ip + 2); if (w2 & 1) break; // SKIP state = COP_wait; // WAIT @@ -3472,13 +3564,23 @@ static void predict_copper (void) cycle_count = c_hpos - cop_state.hpos; if (cycle_count >= 8) { cop_state.regtypes_modified = modified; - unset_special (regs, SPCFLAG_COPPER); + unset_special (SPCFLAG_COPPER); eventtab[ev_copper].active = 1; eventtab[ev_copper].evtime = get_cycles () + cycle_count * CYCLE_UNIT; events_schedule (); } } +STATIC_INLINE int custom_wput_copper (int hpos, uaecptr addr, uae_u32 value, int noget) +{ + int v; + + copper_access = 1; + v = custom_wput_1 (hpos, addr, value, noget); + copper_access = 0; + return v; +} + // "emulate" chip internal delays, not the right place but fast and 99.9% programs // use only copper to write BPLCON1 etc.. (exception is HulkaMania/TSP..) // this table should be filled with zeros and done somewhere else.. @@ -3504,7 +3606,7 @@ static int customdelay[]= { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }; -void update_copper (int until_hpos) +static void update_copper (int until_hpos) { int vp = vpos & (((cop_state.i2 >> 8) & 0x7F) | 0x80); int c_hpos = cop_state.hpos; @@ -3525,7 +3627,7 @@ void update_copper (int until_hpos) eventtab[ev_copper].active = 0; copper_enabled_thisline = 0; cop_state.state = COP_stop; - unset_special(regs, SPCFLAG_COPPER); + unset_special(SPCFLAG_COPPER); return; } @@ -3548,7 +3650,7 @@ void update_copper (int until_hpos) if (cop_state.movedelay) { // cop_state.movedelay is 0 or 1 cop_state.movedelay = 0; - custom_wput_1 (c_hpos, cop_state.moveaddr, cop_state.movedata, 0); + custom_wput_copper (c_hpos, cop_state.moveaddr, cop_state.movedata, 0); if (! copper_enabled_thisline) goto out; } @@ -3570,27 +3672,52 @@ void update_copper (int until_hpos) continue; cop_state.state = COP_skip1; break; + + case COP_strobe_extra: + // Wait 1 copper cycle doing nothing + cop_state.state = COP_strobe_delay1; + break; case COP_strobe_delay1: - // first cycle after COPJMP is just like normal first read cycle + // First cycle after COPJMP is just like normal first read cycle + // Cycle is used and needs to be free. if (copper_cant_read (old_hpos)) continue; cop_state.state = COP_strobe_delay2; cop_state.ip += 2; break; case COP_strobe_delay2: - // second cycle after COPJMP is like second read cycle except - // there is 0x1FE as a target register - // (following word is still read normally and tossed away) - if (copper_cant_read (old_hpos)) - continue; + // Second cycle after COPJMP. This is the strange one. + // This cycle does not need to be free + // But it still gets allocated by copper if it is free = CPU and blitter can't use it. cop_state.state = COP_read1; - // next cycle finally reads from new pointer + // Next cycle finally reads from new pointer if (cop_state.strobe == 1) cop_state.ip = cop1lc; else cop_state.ip = cop2lc; cop_state.strobe = 0; break; + + case COP_strobe_delay1x: + // First cycle after COPJMP and Copper was waiting. This is the buggy one. + // Cycle can be free and copper won't allocate it. + // If Blitter uses this cycle = Copper's address gets copied blitter DMA pointer.. + cop_state.state = COP_strobe_delay2x; + break; + case COP_strobe_delay2x: + // Second cycle fetches following word and tosses it away. Must be free cycle + // but is not allocated, blitter or cpu can still use it. + if (copper_cant_read (old_hpos)) + continue; + cop_state.state = COP_read1; + // Next cycle finally reads from new pointer + if (cop_state.strobe == 1) + cop_state.ip = cop1lc; + else + cop_state.ip = cop2lc; + cop_state.strobe = 0; + break; + case COP_start_delay: if (copper_cant_read (old_hpos)) continue; @@ -3601,7 +3728,7 @@ void update_copper (int until_hpos) case COP_read1: if (copper_cant_read (old_hpos)) continue; - cop_state.i1 = CHIPMEM_AGNUS_WGET_CUSTOM (cop_state.ip); + cop_state.i1 = chipmem_wget_indirect (cop_state.ip); cop_state.ip += 2; cop_state.state = COP_read2; break; @@ -3609,7 +3736,7 @@ void update_copper (int until_hpos) case COP_read2: if (copper_cant_read (old_hpos)) continue; - cop_state.i2 = CHIPMEM_AGNUS_WGET_CUSTOM (cop_state.ip); + cop_state.i2 = chipmem_wget_indirect (cop_state.ip); cop_state.ip += 2; if (cop_state.i1 & 1) { // WAIT or SKIP @@ -3644,7 +3771,7 @@ void update_copper (int until_hpos) cop_state.movedelay = 1; } else { int hpos2 = old_hpos; - custom_wput_1 (hpos2, reg, data, 0); + custom_wput_copper (hpos2, reg, data, 0); hpos2++; if (!nocustom () && reg >= 0x140 && reg < 0x180 && hpos2 >= SPR0_HPOS && hpos2 < SPR0_HPOS + 4 * MAX_SPRITES) { do_sprites (hpos2); @@ -3655,6 +3782,7 @@ void update_copper (int until_hpos) break; case COP_wait1: +#if 0 /* There's a nasty case here. As stated in the "Theory" comment above, we test against the incremented copper position. I believe this means that we have to increment the _vertical_ position at the last cycle in the line, @@ -3669,8 +3797,13 @@ void update_copper (int until_hpos) incrementing vpos and setting c_hpos to 0. Especially the various speedup hacks really assume that vpos remains constant during one line. Hence, this hack: defer the entire decision until the next line if necessary. */ - if (c_hpos >= (maxhpos & ~1) || (c_hpos & 1)) +#endif +#if 0 + /* Above is not true anymore */ + if (c_hpos >= (maxhpos & ~1) || (c_hpos & 1)) { break; + } +#endif cop_state.state = COP_wait; cop_state.vcmp = (cop_state.i1 & (cop_state.i2 | 0x8000)) >> 8; @@ -3679,53 +3812,58 @@ void update_copper (int until_hpos) vp = vpos & (((cop_state.i2 >> 8) & 0x7F) | 0x80); if (cop_state.i1 == 0xFFFF && cop_state.i2 == 0xFFFE) { - cop_state.state = COP_stop; + cop_state.state = COP_waitforever; copper_enabled_thisline = 0; - unset_special (regs, SPCFLAG_COPPER); + unset_special (SPCFLAG_COPPER); goto out; } if (vp < cop_state.vcmp) { copper_enabled_thisline = 0; - unset_special (regs, SPCFLAG_COPPER); + unset_special (SPCFLAG_COPPER); goto out; } /* fall through */ case COP_wait: - if (copper_cant_read (old_hpos)) - continue; + { + int ch_comp = c_hpos; + if (ch_comp & 1) + ch_comp = 0; + if (copper_cant_read (old_hpos)) + continue; - hp = c_hpos & (cop_state.i2 & 0xFE); - if (vp == cop_state.vcmp && hp < cop_state.hcmp) { - /* Position not reached yet. */ - if(currprefs.fast_copper) { - if ((cop_state.i2 & 0xFE) == 0xFE) { - int wait_finish = cop_state.hcmp - 2; - /* This will leave c_hpos untouched if it's equal to wait_finish. */ - if (wait_finish < c_hpos) - return; - else if (wait_finish <= until_hpos) { - c_hpos = wait_finish; - } else - c_hpos = until_hpos; - } - } - break; - } - - /* Now we know that the comparisons were successful. We might still - have to wait for the blitter though. */ - if ((cop_state.i2 & 0x8000) == 0) { - if (bltstate != BLT_done) { - /* We need to wait for the blitter. */ - cop_state.state = COP_bltwait; - copper_enabled_thisline = 0; - unset_special (regs, SPCFLAG_COPPER); - goto out; + hp = ch_comp & (cop_state.i2 & 0xFE); + if (vp == cop_state.vcmp && hp < cop_state.hcmp) { + /* Position not reached yet. */ + if(currprefs.fast_copper) { + if ((cop_state.i2 & 0xFE) == 0xFE) { + int wait_finish = cop_state.hcmp - 2; + /* This will leave c_hpos untouched if it's equal to wait_finish. */ + if (wait_finish < c_hpos) + return; + else if (wait_finish <= until_hpos) { + c_hpos = wait_finish; + } else + c_hpos = until_hpos; + } + } + break; } - } - cop_state.state = COP_read1; + /* Now we know that the comparisons were successful. We might still + have to wait for the blitter though. */ + if ((cop_state.i2 & 0x8000) == 0) { + if (bltstate != BLT_done) { + /* We need to wait for the blitter. */ + cop_state.state = COP_bltwait; + copper_enabled_thisline = 0; + unset_special (SPCFLAG_COPPER); + goto out; + } + } + + cop_state.state = COP_read1; + } break; case COP_skip1: @@ -3767,11 +3905,13 @@ out: } } -static void compute_spcflag_copper (void) +static void compute_spcflag_copper (int hpos) { + int wasenabled = copper_enabled_thisline; + copper_enabled_thisline = 0; - unset_special (regs, SPCFLAG_COPPER); - if (!dmaen (DMA_COPPER) || cop_state.state == COP_stop || cop_state.state == COP_bltwait || nocustom()) + unset_special (SPCFLAG_COPPER); + if (!dmaen (DMA_COPPER) || cop_state.state == COP_stop || cop_state.state == COP_waitforever || cop_state.state == COP_bltwait || nocustom()) return; if (cop_state.state == COP_wait) { @@ -3780,21 +3920,36 @@ static void compute_spcflag_copper (void) if (vp < cop_state.vcmp) return; } + // do not use past cycles if starting for the first time in this line + // (write to DMACON for example) hpos+1 for long lines + if (!wasenabled && cop_state.hpos < hpos && hpos < maxhpos) { + hpos = (hpos + 2) & ~1; + if (hpos > (maxhpos & ~1)) + hpos = maxhpos & ~1; + cop_state.hpos = hpos; + } + + // if COPJMPx was written while DMA was disabled, advance to next state, + // COP_strobe_extra is single cycle only and does not need free bus. + // (copper state emulation does not run if DMA is disabled) + if (!wasenabled && cop_state.state == COP_strobe_extra) + cop_state.state = COP_strobe_delay1; + copper_enabled_thisline = 1; if(currprefs.fast_copper) { predict_copper (); if (! eventtab[ev_copper].active) - set_special (regs, SPCFLAG_COPPER); + set_special (SPCFLAG_COPPER); } else - set_special (regs, SPCFLAG_COPPER); + set_special (SPCFLAG_COPPER); } static void copper_handler (void) { /* This will take effect immediately, within the same cycle. */ - set_special (regs, SPCFLAG_COPPER); + set_special (SPCFLAG_COPPER); if (! copper_enabled_thisline) return; @@ -3827,10 +3982,16 @@ void blitter_done_notify (void) if (dmaen (DMA_COPPER) && vp == vpos) { copper_enabled_thisline = 1; - set_special (regs, SPCFLAG_COPPER); + set_special (SPCFLAG_COPPER); } } +void do_copper (void) +{ + int hpos = current_hpos (); + update_copper (hpos); +} + /* ADDR is the address that is going to be read/written; this access is the reason why we want to update the copper. This function is also used from hsync_handler to finish up the line; for this case, we check @@ -3851,7 +4012,7 @@ STATIC_INLINE void sync_copper_with_cpu (int hpos, int do_schedule, unsigned int eventtab[ev_copper].active = 0; if (do_schedule) events_schedule (); - set_special (regs, SPCFLAG_COPPER); + set_special (SPCFLAG_COPPER); } /* Need to let the copper advance to the current position. */ @@ -3861,7 +4022,7 @@ STATIC_INLINE void sync_copper_with_cpu (int hpos, int do_schedule, unsigned int STATIC_INLINE uae_u16 sprite_fetch (struct sprite *s) { - last_custom_value1 = CHIPMEM_AGNUS_WGET_CUSTOM (s->pt); + last_custom_value1 = chipmem_wget_indirect (s->pt); s->pt += 2; return last_custom_value1; } @@ -4038,34 +4199,39 @@ void init_hardware_for_drawing_frame (void) next_sprite_forced = 1; } -static frame_time_t frametime2; +STATIC_INLINE void rtg_vsync (void) +{ +#ifdef PICASSO96 + picasso_handle_vsync (); +#endif +} void fpscounter_reset (void) { timeframes = 0; - frametime2 = 0; + frametime = 0; lastframetime = read_processor_time (); } static void fpscounter (void) { frame_time_t now, last; - int mcnt = 25; + const int mcnt = 20; now = read_processor_time (); last = now - lastframetime; lastframetime = now; - frametime2 += last; + frametime += last; timeframes++; if ((timeframes % mcnt) == 0) { - int fps = frametime2 == 0 ? 0 : (syncbase * mcnt) / (frametime2 / 10); + int fps = frametime == 0 ? 0 : (syncbase * mcnt) / (frametime / 10); if(currprefs.gfx_framerate > 0) fps = fps / (currprefs.gfx_framerate + 1); if (fps > 9999) fps = 9999; gui_data.fps = (fps + 5) / 10; - frametime2 = 0; + frametime = 0; } } @@ -4075,7 +4241,8 @@ static void vsync_handler_pre (void) handle_events (); #ifdef PICASSO96 - picasso_handle_vsync (); + if (currprefs.rtgmem_size) + rtg_vsync (); #endif blkdev_vsync (); @@ -4095,23 +4262,17 @@ static void vsync_handler_pre (void) filesys_vsync (); vsync_handle_redraw (); + + fpscounter(); + + vsync_handle_check (); } // emulated hardware vsync static void vsync_handler_post (void) { - fpscounter(); - - if (!currprefs.cachesize) { - if (currprefs.m68k_speed < 0) { - frame_time_t curr_time = read_processor_time (); - if (rpt_did_reset) - vsyncmintime = curr_time + vsynctimebase; - rpt_did_reset = 0; - } - } - DISK_vsync (); + if (bplcon0 & 4) lof_store = lof_store ? 0 : 1; lof_current = lof_store; @@ -4127,32 +4288,19 @@ static void vsync_handler_post (void) if (currprefs.cachesize) { vsyncmintime = last_synctime; frh_count = 0; - if(ham_drawn) { - pissoff_value = SPEEDUP_CYCLES_HAM * CYCLE_UNIT; - speedup_timelimit = SPEEDUP_TIMELIMIT_HAM; - } else { - pissoff_value = SPEEDUP_CYCLES_JIT * CYCLE_UNIT; - speedup_timelimit = SPEEDUP_TIMELIMIT_JIT; - } } else #endif { vsyncmintime = last_synctime + vsynctimebase * (maxvpos_nom - LAST_SPEEDUP_LINE) / maxvpos_nom; - pissoff_value = SPEEDUP_CYCLES_NONJIT * CYCLE_UNIT; - if(ham_drawn) { - speedup_timelimit = SPEEDUP_TIMELIMIT_HAM; - } else { - speedup_timelimit = SPEEDUP_TIMELIMIT_NONJIT; - } } - ham_drawn = false; - if ((beamcon0 & (0x20 | 0x80)) != (new_beamcon0 & (0x20 | 0x80)) || abs (vpos_count - vpos_count_diff) > 1 || lof_changed) { + if ((beamcon0 & (0x20 | 0x80)) != (new_beamcon0 & (0x20 | 0x80)) || (vpos_count > 0 && abs (vpos_count - vpos_count_diff) > 1) || lof_changed) { init_hz (); } - vpos_count_diff = vpos_count; + lof_changed = 0; + eventtab[ev_copper].active = 0; COPJMP (1, 1); @@ -4212,14 +4360,14 @@ static void dmal_func2 (void) if (w) { // write to disk if (disk_fifostatus () <= 0) { - dat = CHIPMEM_AGNUS_WGET_CUSTOM (pt); + dat = chipmem_wget_indirect (pt); DSKDAT (dat); } } else { // read from disk if (disk_fifostatus () >= 0) { dat = DSKDATR (); - CHIPMEM_AGNUS_WPUT_CUSTOM (pt, dat); + chipmem_wput_indirect (pt, dat); } } } @@ -4272,7 +4420,7 @@ static bool is_custom_vsync (void) return false; } -STATIC_INLINE void set_hpos (void) +static void set_hpos (void) { eventtab[ev_hsync].evtime = get_cycles () + HSYNCTIME; eventtab[ev_hsync].oldcycles = get_cycles (); @@ -4304,6 +4452,7 @@ static void hsync_handler_pre (bool onvsync) #ifdef PICASSO96 picasso_handle_hsync (); #endif + DISK_hsync (); if (currprefs.produce_sound) audio_hsync (); @@ -4332,8 +4481,7 @@ static void hsync_handler_post (bool onvsync) inputdevice_hsync (); -// Slows down emulation without improving compatability a lot -// last_custom_value1 = 0xffff; // refresh slots should set this to 0xffff + last_custom_value1 = 0xffff; // refresh slots should set this to 0xffff if (!nocustom()) { if (bltstate != BLT_done && dmaen (DMA_BITPLANE) && diwstate == DIW_waiting_stop) { @@ -4361,7 +4509,7 @@ static void hsync_handler_post (bool onvsync) if (trigger_frh(frh_count) && vpos < maxvpos_nom - LAST_SPEEDUP_LINE) { frh_handler(); } - is_syncline = trigger_frh(frh_count+1) && vpos < maxvpos_nom - LAST_SPEEDUP_LINE + 1 && ! rpt_did_reset; + is_syncline = trigger_frh(frh_count+1) && vpos < maxvpos_nom - LAST_SPEEDUP_LINE + 1 && !rpt_did_reset; } else { #endif is_syncline = vpos + 1 == maxvpos_nom + lof_store - LAST_SPEEDUP_LINE; @@ -4393,8 +4541,7 @@ static void hsync_handler_post (bool onvsync) plfstrt_sprite = plfstrt; /* See if there's a chance of a copper wait ending this line. */ cop_state.hpos = 0; - compute_spcflag_copper (); - + compute_spcflag_copper (maxhpos); } static void init_regtypes (void) @@ -4467,7 +4614,7 @@ static void hsync_handler (void) if (vs) { vsync_handler_pre (); if (savestate_check ()) { - uae_reset (0); + uae_reset (0, 0); return; } } @@ -4513,13 +4660,14 @@ void custom_prepare (void) hsync_handler_post (true); } -void custom_reset (int hardreset) +void custom_reset (bool hardreset, bool keyboardreset) { int i; int zero = 0; target_reset (); reset_all_systems (); + write_log (_T("Reset at %08X\n"), M68K_GETPC); if (! savestate_state) { hsync_counter = 0; @@ -4590,7 +4738,7 @@ void custom_reset (int hardreset) #ifdef JIT compemu_reset (); #endif - unset_special (regs, ~(SPCFLAG_BRK | SPCFLAG_MODE_CHANGE)); + unset_special (~(SPCFLAG_BRK | SPCFLAG_MODE_CHANGE)); vpos = 0; vpos_count = vpos_count_diff = 0; @@ -4682,6 +4830,7 @@ void custom_reset (int hardreset) if (hardreset) rtc_hardreset(); + #ifdef PICASSO96 picasso_reset (); #endif @@ -4719,7 +4868,7 @@ static void gen_custom_tables (void) } /* mousehack is now in "filesys boot rom" */ -static uae_u32 REGPARAM2 mousehack_helper_old (TrapContext *ctx) +static uae_u32 REGPARAM2 mousehack_helper_old (struct TrapContext *ctx) { return 0; } @@ -4801,7 +4950,7 @@ static uae_u32 REGPARAM2 custom_lgeti (uaecptr addr) STATIC_INLINE uae_u32 REGPARAM2 custom_wget_1 (uaecptr addr, int noput) { uae_u16 v; - + int missing; #ifdef JIT special_mem |= S_READ; #endif @@ -4825,7 +4974,11 @@ STATIC_INLINE uae_u32 REGPARAM2 custom_wget_1 (uaecptr addr, int noput) case 0x01A: v = DSKBYTR (current_hpos ()); break; case 0x01C: v = INTENAR (); break; case 0x01E: v = INTREQR (); break; - case 0x07C: v = DENISEID (); break; + case 0x07C: + v = DENISEID (&missing); + if (missing) + goto writeonly; + break; case 0x180: case 0x182: case 0x184: case 0x186: case 0x188: case 0x18A: case 0x18C: case 0x18E: case 0x190: case 0x192: case 0x194: case 0x196: @@ -4833,10 +4986,13 @@ STATIC_INLINE uae_u32 REGPARAM2 custom_wget_1 (uaecptr addr, int noput) case 0x1A4: case 0x1A6: case 0x1A8: case 0x1AA: case 0x1AC: case 0x1AE: case 0x1B0: case 0x1B2: case 0x1B4: case 0x1B6: case 0x1B8: case 0x1BA: case 0x1BC: case 0x1BE: + if (!(currprefs.chipset_mask & CSMASK_AGA)) + goto writeonly; v = COLOR_READ ((addr & 0x3E) / 2); break; default: +writeonly: /* OCS/ECS: * reading write-only register causes write with last value in chip * bus (custom registers, chipram, slowram) @@ -4853,18 +5009,22 @@ STATIC_INLINE uae_u32 REGPARAM2 custom_wget_1 (uaecptr addr, int noput) v = last_custom_value1; if (!noput) { int hpos = current_hpos (); + uae_u16 l = currprefs.cpu_compatible && currprefs.cpu_model == 68000 ? regs.irc : 0xffff; decide_line (hpos); decide_fetch (hpos); - custom_wput_1 (hpos, addr, last_custom_value1, 1); + custom_wput_1 (hpos, addr, l, 1); if (currprefs.chipset_mask & CSMASK_AGA) { - v = last_custom_value1; - last_custom_value1 = 0xffff; + v = l; } else { - v = 0xffff; + if (currprefs.chipset_mask & CSMASK_ECS_AGNUS) + v = 0xffff; + else + v = l; } } return v; } + last_custom_value1 = v; return v; } @@ -4923,7 +5083,7 @@ static int REGPARAM2 custom_wput_1 (int hpos, uaecptr addr, uae_u32 value, int n case 0x020: DSKPTH (value); break; case 0x022: DSKPTL (value); break; case 0x024: DSKLEN (value, hpos); break; - case 0x026: DSKDAT (value); break; + case 0x026: /* DSKDAT (value). Writing to DMA write registers won't do anything */; break; case 0x02A: VPOSW (value); break; case 0x02C: VHPOSW (value); break; @@ -4932,6 +5092,7 @@ static int REGPARAM2 custom_wput_1 (int hpos, uaecptr addr, uae_u32 value, int n case 0x032: break; case 0x034: POTGO (value); break; case 0x036: JOYTEST (value); break; + case 0x040: BLTCON0 (value); break; case 0x042: BLTCON1 (value); break; @@ -5037,14 +5198,14 @@ static int REGPARAM2 custom_wput_1 (int hpos, uaecptr addr, uae_u32 value, int n case 0x10C: BPLCON4 (hpos, value); break; case 0x10E: CLXCON2 (value); break; - case 0x110: BPL1DAT (hpos, value); break; - case 0x112: /* BPL2DAT (hpos, value); */ break; - case 0x114: /* BPL3DAT (hpos, value); */ break; - case 0x116: /* BPL4DAT (hpos, value); */ break; - case 0x118: /* BPL5DAT (hpos, value); */ break; - case 0x11A: /* BPL6DAT (hpos, value); */ break; - case 0x11C: /* BPL7DAT (hpos, value); */ break; - case 0x11E: /* BPL8DAT (hpos, value); */ break; + case 0x110: BPLxDAT (hpos, 0, value); break; + case 0x112: BPLxDAT (hpos, 1, value); break; + case 0x114: BPLxDAT (hpos, 2, value); break; + case 0x116: BPLxDAT (hpos, 3, value); break; + case 0x118: BPLxDAT (hpos, 4, value); break; + case 0x11A: BPLxDAT (hpos, 5, value); break; + case 0x11C: BPLxDAT (hpos, 6, value); break; + case 0x11E: BPLxDAT (hpos, 7, value); break; case 0x180: case 0x182: case 0x184: case 0x186: case 0x188: case 0x18A: case 0x18C: case 0x18E: case 0x190: case 0x192: case 0x194: case 0x196: @@ -5092,8 +5253,10 @@ static int REGPARAM2 custom_wput_1 (int hpos, uaecptr addr, uae_u32 value, int n case 0x1E0: if (vsstrt != value) { vsstrt = value; varsync (); } break; case 0x1E2: if (hcenter != value) { hcenter = value; varsync (); } break; case 0x1E4: DIWHIGH (hpos, value); break; + case 0x1FC: FMODE (hpos, value); break; case 0x1FE: FNULL (value); break; + /* writing to read-only register causes read access */ default: if (!noget) { @@ -5107,12 +5270,10 @@ static int REGPARAM2 custom_wput_1 (int hpos, uaecptr addr, uae_u32 value, int n static void REGPARAM2 custom_wput (uaecptr addr, uae_u32 value) { int hpos = current_hpos (); - #ifdef JIT special_mem |= S_WRITE; #endif sync_copper_with_cpu (hpos, 1, addr); - if (addr & 1) { addr &= ~1; custom_wput_1 (hpos, addr, (value >> 8) | (value & 0xff00), 0); @@ -5196,34 +5357,34 @@ uae_u8 *restore_custom (uae_u8 *src) RW; /* 012 POT0DAT */ RW; /* 014 POT1DAT */ RW; /* 016 POTINP -> see 034 */ - RW; /* 018 SERDATR* */ + RW; /* 018 SERDATR* */ dskbytr = RW; /* 01A DSKBYTR */ RW; /* 01C INTENAR -> see 09A */ RW; /* 01E INTREQR -> see 09C */ - dskpt = RL; /* 020-022 DSKPT */ + dskpt = RL; /* 020-022 DSKPT */ dsklen = RW; /* 024 DSKLEN */ - RW; /* 026 DSKDAT */ - RW; /* 028 REFPTR */ + RW; /* 026 DSKDAT */ + RW; /* 028 REFPTR */ i = RW; lof_store = lof_current = (i & 0x8000) ? 1 : 0; /* 02A VPOSW */ - RW; /* 02C VHPOSW */ - ru16=RW; COPCON(ru16); /* 02E COPCON */ + RW; /* 02C VHPOSW */ + COPCON(RW); /* 02E COPCON */ RW; /* 030 SERDAT */ - RW; /* 032 SERPER* */ - ru16=RW; POTGO(ru16); /* 034 POTGO */ - RW; /* 036 JOYTEST* */ - RW; /* 038 STREQU */ - RW; /* 03A STRVHBL */ - RW; /* 03C STRHOR */ - RW; /* 03E STRLONG */ - ru16=RW; BLTCON0(ru16); /* 040 BLTCON0 */ - ru16=RW; BLTCON1(ru16); /* 042 BLTCON1 */ - ru16=RW; BLTAFWM(ru16); /* 044 BLTAFWM */ - ru16=RW; BLTALWM(ru16); /* 046 BLTALWM */ - bltcpt=RL; // u32=RL; BLTCPTH(u32); /* 048-04B BLTCPT */ - bltbpt=RL; // u32=RL; BLTBPTH(u32); /* 04C-04F BLTBPT */ - bltapt=RL; // u32=RL; BLTAPTH(u32); /* 050-053 BLTAPT */ - bltdpt=RL; // u32=RL; BLTDPTH(u32); /* 054-057 BLTDPT */ - RW; /* 058 BLTSIZE */ + RW; /* 032 SERPER* */ + potgo_value = 0; POTGO (RW); /* 034 POTGO */ + RW; /* 036 JOYTEST* */ + RW; /* 038 STREQU */ + RW; /* 03A STRVHBL */ + RW; /* 03C STRHOR */ + RW; /* 03E STRLONG */ + BLTCON0(RW); /* 040 BLTCON0 */ + BLTCON1(RW); /* 042 BLTCON1 */ + BLTAFWM(RW); /* 044 BLTAFWM */ + BLTALWM(RW); /* 046 BLTALWM */ + bltcpt = RL; /* 048-04B BLTCPT */ + bltbpt = RL; /* 04C-04F BLTBPT */ + bltapt = RL; /* 050-053 BLTAPT */ + bltdpt = RL; /* 054-057 BLTDPT */ + RW; /* 058 BLTSIZE */ RW; /* 05A BLTCON0L -> see 040 */ blt_info.vblitsize=RW; /* 05C BLTSIZV */ blt_info.hblitsize=RW; /* 05E BLTSIZH */ @@ -5236,7 +5397,7 @@ uae_u8 *restore_custom (uae_u8 *src) RW; /* 06C ? */ RW; /* 06E ? */ blt_info.bltcdat =RW; /* 070 BLTCDAT */ - ru16=RW; BLTBDAT(ru16); /* 072 BLTBDAT */ + BLTBDAT(RW); /* 072 BLTBDAT */ blt_info.bltadat=RW; /* 074 BLTADAT */ RW; /* 076 ? */ RW; /* 078 ? */ @@ -5253,7 +5414,7 @@ uae_u8 *restore_custom (uae_u8 *src) ddfstrt = RW; /* 092 DDFSTRT */ ddfstop = RW; /* 094 DDFSTOP */ dmacon = RW & ~(0x2000|0x4000); /* 096 DMACON */ - ru16=RW; CLXCON(ru16); /* 098 CLXCON */ + CLXCON(RW); /* 098 CLXCON */ intena = RW; /* 09A INTENA */ intreq = RW; /* 09C INTREQ */ adkcon = RW; /* 09E ADKCON */ @@ -5267,9 +5428,9 @@ uae_u8 *restore_custom (uae_u8 *src) bpl1mod = RW; /* 108 BPL1MOD */ bpl2mod = RW; /* 10A BPL2MOD */ bplcon4 = RW; /* 10C BPLCON4 */ - ru16=RW; CLXCON2(ru16); /* 10E CLXCON2* */ + CLXCON2(RW); /* 10E CLXCON2* */ for(i = 0; i < 8; i++) - RW; /* BPLXDAT */ + bplxdat[i] = RW; /* BPLXDAT */ /* 120 - 17E Sprite regs */ for(i = 0; i < 32; i++) current_colors.color_regs_ecs[i] = RW; /* 180-1BE COLORxx */ @@ -5311,6 +5472,7 @@ uae_u8 *restore_custom (uae_u8 *src) fmode = RW; /* 1FC FMODE */ last_custom_value1 = RW; /* 1FE ? */ + current_colors.borderblank = isbrdblank (-1, bplcon0, bplcon3); DISK_restore_custom (dskpt, dsklen, dskbytr); FMODE (0, fmode); @@ -5325,7 +5487,7 @@ uae_u8 *restore_custom (uae_u8 *src) uae_u8 *save_custom (int *len, uae_u8 *dstptr, int full) { uae_u8 *dstbak, *dst; - int i; + int i, dummy; uae_u32 dskpt; uae_u16 dsklen, dsksync, dskbytr; @@ -5338,78 +5500,78 @@ uae_u8 *save_custom (int *len, uae_u8 *dstptr, int full) SL (currprefs.chipset_mask); SW (blt_info.bltddat); /* 000 BLTDDAT */ - SW (dmacon); /* 002 DMACONR */ - SW (VPOSR()); /* 004 VPOSR */ - SW (VHPOSR()); /* 006 VHPOSR */ - SW (0); /* 008 DSKDATR */ + SW (dmacon); /* 002 DMACONR */ + SW (VPOSR()); /* 004 VPOSR */ + SW (VHPOSR()); /* 006 VHPOSR */ + SW (0); /* 008 DSKDATR */ SW (JOYGET (0)); /* 00A JOY0DAT */ SW (JOYGET (1)); /* 00C JOY1DAT */ SW (clxdat | 0x8000); /* 00E CLXDAT */ - SW (ADKCONR()); /* 010 ADKCONR */ - SW (POT0DAT()); /* 012 POT0DAT */ - SW (POT1DAT()); /* 014 POT1DAT */ - SW (0) ; /* 016 POTINP * */ - SW (0); /* 018 SERDATR * */ - SW (dskbytr); /* 01A DSKBYTR */ - SW (INTENAR()); /* 01C INTENAR */ - SW (INTREQR()); /* 01E INTREQR */ - SL (dskpt); /* 020-023 DSKPT */ - SW (dsklen); /* 024 DSKLEN */ - SW (0); /* 026 DSKDAT */ - SW (0); /* 028 REFPTR */ + SW (ADKCONR()); /* 010 ADKCONR */ + SW (POT0DAT()); /* 012 POT0DAT */ + SW (POT1DAT()); /* 014 POT1DAT */ + SW (0) ; /* 016 POTINP * */ + SW (0); /* 018 SERDATR * */ + SW (dskbytr); /* 01A DSKBYTR */ + SW (INTENAR()); /* 01C INTENAR */ + SW (INTREQR()); /* 01E INTREQR */ + SL (dskpt); /* 020-023 DSKPT */ + SW (dsklen); /* 024 DSKLEN */ + SW (0); /* 026 DSKDAT */ + SW (0); /* 028 REFPTR */ SW ((lof_store ? 0x8001 : 0)); /* 02A VPOSW */ - SW (0); /* 02C VHPOSW */ - SW (copcon); /* 02E COPCON */ - SW (0); /* 030 SERDAT * */ - SW (0); /* 032 SERPER * */ + SW (0); /* 02C VHPOSW */ + SW (copcon); /* 02E COPCON */ + SW (0); /* 030 SERDAT * */ + SW (0); /* 032 SERPER * */ SW (potgo_value); /* 034 POTGO */ - SW (0); /* 036 JOYTEST * */ - SW (0); /* 038 STREQU */ - SW (0); /* 03A STRVBL */ - SW (0); /* 03C STRHOR */ - SW (0); /* 03E STRLONG */ - SW (bltcon0); /* 040 BLTCON0 */ - SW (bltcon1); /* 042 BLTCON1 */ + SW (0); /* 036 JOYTEST * */ + SW (0); /* 038 STREQU */ + SW (0); /* 03A STRVBL */ + SW (0); /* 03C STRHOR */ + SW (0); /* 03E STRLONG */ + SW (bltcon0); /* 040 BLTCON0 */ + SW (bltcon1); /* 042 BLTCON1 */ SW (blt_info.bltafwm); /* 044 BLTAFWM */ SW (blt_info.bltalwm); /* 046 BLTALWM */ - SL (bltcpt); /* 048-04B BLTCPT */ - SL (bltbpt); /* 04C-04F BLTBPT */ - SL (bltapt); /* 050-053 BLTAPT */ - SL (bltdpt); /* 054-057 BLTDPT */ - SW (0); /* 058 BLTSIZE */ - SW (0); /* 05A BLTCON0L (use BLTCON0 instead) */ - SW (blt_info.vblitsize); /* 05C BLTSIZV */ + SL (bltcpt); /* 048-04B BLTCPT */ + SL (bltbpt); /* 04C-04F BLTBPT */ + SL (bltapt); /* 050-053 BLTAPT */ + SL (bltdpt); /* 054-057 BLTDPT */ + SW (0); /* 058 BLTSIZE */ + SW (0); /* 05A BLTCON0L (use BLTCON0 instead) */ + SW (blt_info.vblitsize); /* 05C BLTSIZV */ SW (blt_info.hblitsize); /* 05E BLTSIZH */ - SW (blt_info.bltcmod); /* 060 BLTCMOD */ - SW (blt_info.bltbmod); /* 062 BLTBMOD */ - SW (blt_info.bltamod); /* 064 BLTAMOD */ - SW (blt_info.bltdmod); /* 066 BLTDMOD */ - SW (0); /* 068 ? */ - SW (0); /* 06A ? */ - SW (0); /* 06C ? */ - SW (0); /* 06E ? */ - SW (blt_info.bltcdat); /* 070 BLTCDAT */ - SW (blt_info.bltbdat); /* 072 BLTBDAT */ - SW (blt_info.bltadat); /* 074 BLTADAT */ - SW (0); /* 076 ? */ - SW (0); /* 078 ? */ - SW (0); /* 07A ? */ - SW (DENISEID()); /* 07C DENISEID/LISAID */ - SW (dsksync); /* 07E DSKSYNC */ - SL (cop1lc); /* 080-083 COP1LC */ - SL (cop2lc); /* 084-087 COP2LC */ - SW (0); /* 088 COPJMP1 */ - SW (0); /* 08A COPJMP2 */ - SW (0); /* 08C COPINS */ - SW (diwstrt); /* 08E DIWSTRT */ - SW (diwstop); /* 090 DIWSTOP */ - SW (ddfstrt); /* 092 DDFSTRT */ - SW (ddfstop); /* 094 DDFSTOP */ - SW (dmacon); /* 096 DMACON */ - SW (clxcon); /* 098 CLXCON */ - SW (intena); /* 09A INTENA */ - SW (intreq); /* 09C INTREQ */ - SW (adkcon); /* 09E ADKCON */ + SW (blt_info.bltcmod); /* 060 BLTCMOD */ + SW (blt_info.bltbmod); /* 062 BLTBMOD */ + SW (blt_info.bltamod); /* 064 BLTAMOD */ + SW (blt_info.bltdmod); /* 066 BLTDMOD */ + SW (0); /* 068 ? */ + SW (0); /* 06A ? */ + SW (0); /* 06C ? */ + SW (0); /* 06E ? */ + SW (blt_info.bltcdat); /* 070 BLTCDAT */ + SW (blt_info.bltbdat); /* 072 BLTBDAT */ + SW (blt_info.bltadat); /* 074 BLTADAT */ + SW (0); /* 076 ? */ + SW (0); /* 078 ? */ + SW (0); /* 07A ? */ + SW (DENISEID (&dummy)); /* 07C DENISEID/LISAID */ + SW (dsksync); /* 07E DSKSYNC */ + SL (cop1lc); /* 080-083 COP1LC */ + SL (cop2lc); /* 084-087 COP2LC */ + SW (0); /* 088 COPJMP1 */ + SW (0); /* 08A COPJMP2 */ + SW (0); /* 08C COPINS */ + SW (diwstrt); /* 08E DIWSTRT */ + SW (diwstop); /* 090 DIWSTOP */ + SW (ddfstrt); /* 092 DDFSTRT */ + SW (ddfstop); /* 094 DDFSTOP */ + SW (dmacon); /* 096 DMACON */ + SW (clxcon); /* 098 CLXCON */ + SW (intena); /* 09A INTENA */ + SW (intreq); /* 09C INTREQ */ + SW (adkcon); /* 09E ADKCON */ /* 0A0 - 0DE Audio regs */ for (i = 0; full && i < 32; i++) SW (0); @@ -5424,7 +5586,7 @@ uae_u8 *save_custom (int *len, uae_u8 *dstptr, int full) SW (bplcon4); /* 10C BPLCON4 */ SW (clxcon2); /* 10E CLXCON2 */ for (i = 0;i < 8; i++) - SW (0); /* 110 BPLxDAT */ + SW (bplxdat[i]); /* 110 BPLxDAT */ /* 120 - 17E Sprite regs */ if (full) { for (i = 0; i < 8; i++) { @@ -5548,6 +5710,7 @@ uae_u8 *restore_custom_extra (uae_u8 *src) if (!(v & 1)) v = 0; + cia_set_overlay ((v & 2) != 0); currprefs.cs_cd32c2p = changed_prefs.cs_cd32c2p = RBB; currprefs.cs_cd32cd = changed_prefs.cs_cd32cd = RBB; @@ -5565,7 +5728,7 @@ uae_u8 *save_custom_extra (int *len, uae_u8 *dstptr) else dstbak = dst = xmalloc (uae_u8, 1000); - SL (1); + SL ((&get_mem_bank (0) != &chipmem_bank ? 2 : 0) | 1); SB (currprefs.cs_cd32c2p); SB (currprefs.cs_cd32cd); @@ -5583,6 +5746,7 @@ void check_prefs_changed_custom (void) if (inputdevice_config_change_test ()) inputdevice_copyconfig (&changed_prefs, &currprefs); currprefs.immediate_blits = changed_prefs.immediate_blits; + currprefs.waiting_blits = changed_prefs.waiting_blits; currprefs.collision_level = changed_prefs.collision_level; currprefs.fast_copper = changed_prefs.fast_copper; currprefs.cs_cd32cd = changed_prefs.cs_cd32cd; diff --git a/src/disk.cpp b/src/disk.cpp index 2299ad57..762f8f8b 100644 --- a/src/disk.cpp +++ b/src/disk.cpp @@ -31,7 +31,7 @@ #include "cia.h" #include "debug.h" #include "crc32.h" -#include "inputdevice.h" +#include "fsdb.h" static int longwritemode = 0; @@ -884,7 +884,7 @@ static int drive_insert (drive * drv, struct uae_prefs *p, int dnum, const TCHAR zfile_fseek (drv->diskfile, 0, SEEK_SET); } - if (strncmp ((char *) buffer, "UAE-1ADF", 8) == 0) { + if (strncmp ((char*) buffer, "UAE-1ADF", 8) == 0) { read_header_ext2 (drv->diskfile, drv->trackdata, &drv->num_tracks, &drv->ddhd); drv->filetype = ADF_EXT2; @@ -1065,13 +1065,16 @@ static void rand_shifter (drive *drv) static void set_steplimit (drive *drv) { + // emulate step limit only if cycle-exact or approximate CPU speed + if (currprefs.m68k_speed != 0) + return; drv->steplimit = 10; drv->steplimitcycle = get_cycles (); } static int drive_empty (drive * drv) { - return drv->diskfile == 0; + return drv->diskfile == 0 && drv->dskchange_time >= 0; } static void drive_step (drive * drv, int step_direction) @@ -1095,6 +1098,8 @@ static void drive_step (drive * drv, int step_direction) if (drv->cyl < maxtrack + 3) { drv->cyl++; } + if (drv->cyl >= maxtrack) + write_log (_T("program tried to step over track %d\n"), maxtrack); } rand_shifter (drv); } @@ -1546,6 +1551,26 @@ static uae_u32 getmfmlong (uae_u16 *mbuf, int shift) return ((getmfmword (mbuf, shift) << 16) | getmfmword (mbuf + 1, shift)) & MFMMASK; } +#if MFM_VALIDATOR +static void check_valid_mfm (uae_u16 *mbuf, int words, int sector) +{ + int prevbit = 0; + for (int i = 0; i < words * 8; i++) { + int wordoffset = i / 8; + uae_u16 w = mbuf[wordoffset]; + uae_u16 wp = mbuf[wordoffset - 1]; + int bitoffset = (7 - (i & 7)) * 2; + int clockbit = w & (1 << (bitoffset + 1)); + int databit = w & (1 << (bitoffset + 0)); + + if ((clockbit && databit) || (clockbit && !databit && prevbit) || (!clockbit && !databit && !prevbit)) { + write_log (L"illegal mfm sector %d data %04x %04x, bit %d:%d\n", sector, wp, w, wordoffset, bitoffset); + } + prevbit = databit; + } +} +#endif + static int decode_buffer (uae_u16 *mbuf, int cyl, int drvsec, int ddhd, int filetype, int *drvsecp, int *sectable, int checkmode) { int i, secwritten = 0; @@ -1591,6 +1616,9 @@ static int decode_buffer (uae_u16 *mbuf, int cyl, int drvsec, int ddhd, int file return 2; continue; } +#if MFM_VALIDATOR + check_valid_mfm (mbuf - 4, 544 - 4 + 1, trackoffs); +#endif chksum = odd ^ even; for (i = 0; i < 4; i++) { odd = getmfmlong (mbuf, shift); @@ -1610,11 +1638,13 @@ static int decode_buffer (uae_u16 *mbuf, int cyl, int drvsec, int ddhd, int file even = getmfmlong (mbuf + 2, shift); mbuf += 4; if (((odd << 1) | even) != chksum) { + write_log (_T("Disk decode: checksum error on sector %d header\n"), trackoffs); if (filetype == ADF_EXT2) return 3; continue; } if (((id & 0x00ff0000) >> 16) != cyl * 2 + side) { + write_log (_T("Disk decode: mismatched track (%d <> %d) on sector %d header\n"), (id & 0x00ff0000) >> 16, cyl * 2 + side, trackoffs); if (filetype == ADF_EXT2) return 3; continue; @@ -1636,6 +1666,7 @@ static int decode_buffer (uae_u16 *mbuf, int cyl, int drvsec, int ddhd, int file chksum ^= odd ^ even; } if (chksum) { + write_log (_T("Disk decode: sector %d, data checksum error\n"), trackoffs); if (filetype == ADF_EXT2) return 4; continue; @@ -1689,7 +1720,11 @@ static int drive_write_pcdos (drive *drv) secbuf[3] = 0xfb; while (secwritten < drvsec) { + int mfmcount; + + mfmcount = 0; while (getmfmword (mbuf, shift) != 0x4489) { + mfmcount++; if (mbuf >= mend) return 1; shift++; @@ -1697,12 +1732,20 @@ static int drive_write_pcdos (drive *drv) shift = 0; mbuf++; } + if (sector >= 0 && mfmcount / 16 >= 43) + sector = -1; } + + mfmcount = 0; while (getmfmword (mbuf, shift) == 0x4489) { + mfmcount++; if (mbuf >= mend) return 1; mbuf++; } + if (mfmcount < 3) // ignore if less than 3 sync markers + continue; + mark = mfmdecode(&mbuf, shift); if (mark == 0xfe) { uae_u8 tmp[8]; @@ -1716,13 +1759,20 @@ static int drive_write_pcdos (drive *drv) tmp[0] = 0xa1; tmp[1] = 0xa1; tmp[2] = 0xa1; tmp[3] = mark; tmp[4] = cyl; tmp[5] = head; tmp[6] = sector; tmp[7] = size; + + // skip 28 bytes + for (i = 0; i < 28; i++) + mfmdecode (&mbuf, shift); + if (get_crc16(tmp, 8) != crc || cyl != drv->cyl || head != side || size != 2 || sector < 1 || sector > drv->num_secs) { + write_log (_T("PCDOS: track %d, corrupted sector header\n"), drv->cyl * 2 + side); return 1; } sector--; continue; } - if (mark != 0xfb) { + if (mark != 0xfb && mark != 0xfa) { + write_log (_T("PCDOS: track %d: unknown address mark %02X\n"), drv->cyl * 2 + side, mark); continue; } if (sector < 0) @@ -1731,14 +1781,20 @@ static int drive_write_pcdos (drive *drv) secbuf[i + 4] = mfmdecode(&mbuf, shift); crc = (mfmdecode(&mbuf, shift) << 8) | mfmdecode(&mbuf, shift); if (get_crc16(secbuf, 3 + 1 + 512) != crc) { + write_log (_T("PCDOS: track %d, sector %d data checksum error\n"), + drv->cyl * 2 + side, sector + 1); continue; } sectable[sector] = 1; secwritten++; zfile_fseek (drv->diskfile, drv->trackdata[drv->cyl * 2 + side].offs + sector * 512, SEEK_SET); zfile_fwrite (secbuf + 4, sizeof (uae_u8), 512, drv->diskfile); + write_log (_T("PCDOS: track %d sector %d written\n"), drv->cyl * 2 + side, sector + 1); sector = -1; } + if (secwritten != drv->num_secs) + write_log (_T("PCDOS: track %d, %d corrupted sectors ignored\n"), + drv->cyl * 2 + side, drv->num_secs - secwritten); return 0; } @@ -1769,6 +1825,7 @@ static int drive_write_ext2 (uae_u16 *bigmfmbuf, struct zfile *diskfile, trackid len = (tracklen + 7) / 8; if (len > ti->len) { + write_log (_T("disk raw write: image file's track %d is too small (%d < %d)!\n"), ti->track, ti->len, len); len = ti->len; } diskfile_update (diskfile, ti, tracklen, TRACK_RAW); @@ -1787,7 +1844,6 @@ static void drive_write_data (drive * drv) { int ret = -1; int tr = drv->cyl * 2 + side; - static int warned; if (drive_writeprotected (drv) || drv->trackdata[tr].type == TRACK_NONE) { /* read original track back because we didn't really write anything */ @@ -1801,6 +1857,7 @@ static void drive_write_data (drive * drv) switch (drv->filetype) { case ADF_NORMAL: if (drive_write_adf_amigados (drv)) { + static int warned; if (!warned) notify_user (NUMSG_NEEDEXT2); warned = 1; @@ -1811,16 +1868,19 @@ static void drive_write_data (drive * drv) case ADF_EXT2: if (!longwritemode) ret = drive_write_adf_amigados (drv); - if (ret) { -// drive_write_ext2 (drv->bigmfmbuf, drv->diskfile, &drv->trackdata[drv->cyl * 2 + side], -// longwritemode ? dsklength2 * 8 : drv->tracklen); - } - return; - case ADF_IPF: - break; - case ADF_PCDOS: - ret = drive_write_pcdos (drv); - break; + if (ret) { + write_log (_T("not an amigados track %d (error %d), writing as raw track\n"), drv->cyl * 2 + side, ret); + drive_write_ext2 (drv->bigmfmbuf, drv->diskfile, &drv->trackdata[drv->cyl * 2 + side], + longwritemode ? dsklength2 * 8 : drv->tracklen); + } + return; + case ADF_IPF: + break; + case ADF_PCDOS: + ret = drive_write_pcdos (drv); + if (ret) + write_log (_T("not a PC formatted track %d (error %d)\n"), drv->cyl * 2 + side, ret); + break; } drv->tracktiming[0] = 0; } @@ -1861,13 +1921,10 @@ static void floppy_get_rootblock (uae_u8 *dst, int block, const TCHAR *disk_name dst[12+3] = 0x48; dst[312] = dst[313] = dst[314] = dst[315] = (uae_u8)0xff; dst[316+2] = (block + 1) >> 8; dst[316+3] = (block + 1) & 255; - if(disk_name && _tcslen (disk_name) > 0) { - dst[432] = strlen (disk_name); - strcpy ((char*)dst + 433, disk_name); - } else { - dst[432] = strlen ("empty"); - strcpy ((char*)dst + 433, "empty"); - } + char *s = ua ((disk_name && _tcslen (disk_name) > 0) ? disk_name : _T("empty")); + dst[432] = strlen (s); + strcpy ((char*)dst + 433, s); + xfree (s); dst[508 + 3] = 1; disk_date (dst + 420); memcpy (dst + 472, dst + 420, 3 * 4); @@ -1884,13 +1941,15 @@ static void floppy_get_rootblock (uae_u8 *dst, int block, const TCHAR *disk_name /* type: 0=regular, 1=ext2adf */ /* adftype: 0=DD,1=HD,2=DD PC,3=HD PC,4=525SD */ -void disk_creatediskfile (const TCHAR *name, int type, drive_type adftype, const TCHAR *disk_name, bool ffs, bool bootable) +bool disk_creatediskfile (const TCHAR *name, int type, drive_type adftype, const TCHAR *disk_name, bool ffs, bool bootable, struct zfile *copyfrom) { int size = 32768; struct zfile *f; int i, l, file_size, tracks, track_len, sectors; uae_u8 *chunk = NULL; int ddhd = 1; + bool ok = false; + uae_u64 pos; if (type == 1) tracks = 2 * 83; @@ -1912,6 +1971,11 @@ void disk_creatediskfile (const TCHAR *name, int type, drive_type adftype, const tracks /= 2; } + if (copyfrom) { + pos = zfile_ftell (copyfrom); + zfile_fseek (copyfrom, 0, SEEK_SET); + } + f = zfile_fopen (name, _T("wb"), 0); chunk = xmalloc (uae_u8, size); if (f && chunk) { @@ -1931,11 +1995,12 @@ void disk_creatediskfile (const TCHAR *name, int type, drive_type adftype, const } zfile_fwrite (chunk, cylsize, 1, f); } + ok = true; } else { uae_u8 root[4]; uae_u8 rawtrack[3 * 4], dostrack[3 * 4]; l = track_len; - zfile_fwrite ((char *)"UAE-1ADF", 8, 1, f); + zfile_fwrite ("UAE-1ADF", 8, 1, f); root[0] = 0; root[1] = 0; /* flags (reserved) */ root[2] = 0; root[3] = tracks; /* number of tracks */ zfile_fwrite (root, 4, 1, f); @@ -1950,26 +2015,34 @@ void disk_creatediskfile (const TCHAR *name, int type, drive_type adftype, const for (i = 0; i < tracks; i++) { uae_u8 tmp[3 * 4]; memcpy (tmp, rawtrack, sizeof rawtrack); - if (dodos) + if (dodos || copyfrom) memcpy (tmp, dostrack, sizeof dostrack); zfile_fwrite (tmp, sizeof tmp, 1, f); } for (i = 0; i < tracks; i++) { memset (chunk, 0, size); - if (dodos) { - if (i == 0) - floppy_get_bootblock (chunk, ffs, bootable); - else if (i == 80) - floppy_get_rootblock (chunk, 80 * 11 * ddhd, disk_name, adftype); + if (copyfrom) { + zfile_fread (chunk, 11 * ddhd, 512, copyfrom); + } else { + if (dodos) { + if (i == 0) + floppy_get_bootblock (chunk, ffs, bootable); + else if (i == 80) + floppy_get_rootblock (chunk, 80 * 11 * ddhd, disk_name, adftype); + } } zfile_fwrite (chunk, l, 1, f); } + ok = true; } } xfree (chunk); zfile_fclose (f); + if (copyfrom) + zfile_fseek (copyfrom, pos, SEEK_SET); if (f) DISK_history_add (name, -1, HISTORY_FLOPPY, TRUE); + return ok; } int disk_getwriteprotect (struct uae_prefs *p, const TCHAR *name) @@ -1981,17 +2054,17 @@ int disk_getwriteprotect (struct uae_prefs *p, const TCHAR *name) static void diskfile_readonly (const TCHAR *name, bool readonly) { - struct stat st; + struct mystat st; int mode, oldmode; - if (stat (name, &st)) + if (!my_stat (name, &st)) return; - oldmode = mode = st.st_mode; + oldmode = mode = st.mode; mode &= ~FILEFLAG_WRITE; if (!readonly) mode |= FILEFLAG_WRITE; if (mode != oldmode) - chmod (name, mode); + my_chmod (name, mode); } static void setdskchangetime(drive *drv, int dsktime) @@ -2034,7 +2107,7 @@ int disk_setwriteprotect (struct uae_prefs *p, int num, const TCHAR *name, bool name2 = DISK_get_saveimagepath (name); if (needwritefile && zf2 == 0) - disk_creatediskfile (name2, 1, drvtype, NULL, false, false); + disk_creatediskfile (name2, 1, drvtype, NULL, false, false, NULL); zfile_fclose (zf2); if (writeprotected && iswritefileempty (p, name)) { for (i = 0; i < MAX_FLOPPY_DRIVES; i++) { @@ -2185,7 +2258,7 @@ void DISK_vsync (void) drv->dskready = true; } /* delay until new disk image is inserted */ - if (drv->dskchange_time) { + if (drv->dskchange_time > 0) { drv->dskchange_time--; if (drv->dskchange_time == 0) { drive_insert (drv, &currprefs, i, drv->newname, false); @@ -2210,7 +2283,7 @@ static TCHAR *tobin (uae_u8 v) return buf; } -STATIC_INLINE void fetch_DISK_select(uae_u8 data) +static void fetch_DISK_select(uae_u8 data) { selected = (data >> 3) & 15; side = 1 - ((data >> 2) & 1); @@ -2275,7 +2348,7 @@ void DISK_select (uae_u8 data) drive_motor (drv, 1); } } - if (dr == 0) + if (/*!currprefs.cs_df0idhw &&*/ dr == 0) drv->idbit = 0; } } @@ -2302,7 +2375,7 @@ uae_u8 DISK_status (void) st &= ~0x20; } } else { - if (dr > 0) { + if (/*currprefs.cs_df0idhw ||*/ dr > 0) { /* report drive ID */ if (drv->idbit && currprefs.floppyslots[dr].dfxtype != DRV_35_DD_ESCOM) st &= ~0x20; @@ -2312,7 +2385,7 @@ uae_u8 DISK_status (void) st &= ~0x20; } /* dskrdy needs some cycles after switching the motor off.. (Pro Tennis Tour) */ - if (dr == 0 && drv->motordelay) + if (/*!currprefs.cs_df0idhw &&*/ dr == 0 && drv->motordelay) st &= ~0x20; } if (drive_track0 (drv)) @@ -2421,7 +2494,7 @@ static void disk_doupdate_write (drive * drv, int floppybits) // fast disk modes, fill the fifo instantly if (currprefs.floppy_speed > 100 && !fifo_inuse[0] && !fifo_inuse[1] && !fifo_inuse[2]) { while (!fifo_inuse[2]) { - uae_u16 w = CHIPMEM_AGNUS_WGET_CUSTOM (dskpt); + uae_u16 w = chipmem_wget_indirect (dskpt); DSKDAT (w); dskpt += 2; } @@ -2559,7 +2632,7 @@ static int doreaddma (void) if (currprefs.floppy_speed > 100 && fifo_inuse[0] && fifo_inuse[1] && fifo_inuse[2]) { while (fifo_inuse[0]) { uae_u16 w = DSKDATR (); - CHIPMEM_AGNUS_WPUT_CUSTOM (dskpt, w); + chipmem_wput_indirect (dskpt, w); dskpt += 2; } } @@ -2788,6 +2861,7 @@ void DSKLEN (uae_u16 v, int hpos) if (dskdmaen != DSKDMA_OFF) { /* Megalomania and Knightmare does this */ if (dskdmaen == DSKDMA_WRITE) { + write_log (_T("warning: Disk write DMA aborted, %d words left PC=%x\n"), dsklength, M68K_GETPC); // did program write something that needs to be stored to file? for (dr = 0; dr < MAX_FLOPPY_DRIVES; dr++) { drive *drv2 = &floppy[dr]; @@ -2832,6 +2906,8 @@ void DSKLEN (uae_u16 v, int hpos) break; } if (dr == 4) { + write_log (_T("disk %s DMA started, drvmask=%x motormask=%x PC=%08x\n"), + dskdmaen == DSKDMA_WRITE ? _T("write") : _T("read"), selected ^ 15, motormask, M68K_GETPC); noselected = 1; } @@ -2883,7 +2959,7 @@ void DSKLEN (uae_u16 v, int hpos) return; } while (dsklength-- > 0) { - CHIPMEM_AGNUS_WPUT_CUSTOM (dskpt, drv->bigmfmbuf[pos >> 4]); + chipmem_wput_indirect (dskpt, drv->bigmfmbuf[pos >> 4]); dskpt += 2; pos += 16; pos %= drv->tracklen; @@ -2895,7 +2971,7 @@ void DSKLEN (uae_u16 v, int hpos) } else if (dskdmaen == DSKDMA_WRITE) { /* TURBO write */ for (i = 0; i < dsklength; i++) { - uae_u16 w = CHIPMEM_AGNUS_WGET_CUSTOM (dskpt + i * 2); + uae_u16 w = chipmem_wget_indirect (dskpt + i * 2); drv->bigmfmbuf[pos >> 4] = w; pos += 16; pos %= drv->tracklen; @@ -2908,9 +2984,9 @@ void DSKLEN (uae_u16 v, int hpos) if (!done && noselected) { while (dsklength-- > 0) { if (dskdmaen == DSKDMA_WRITE) { - uae_u16 w = CHIPMEM_AGNUS_WGET_CUSTOM (dskpt); + uae_u16 w = chipmem_wget_indirect (dskpt); } else { - CHIPMEM_AGNUS_WPUT_CUSTOM (dskpt, 0); + chipmem_wput_indirect (dskpt, 0); } dskpt += 2; } @@ -2954,6 +3030,7 @@ STATIC_INLINE bool iswrite (void) void DSKDAT (uae_u16 v) { if (fifo_inuse[2]) { + write_log (_T("DSKDAT: FIFO overflow!\n")); return; } fifo_inuse[2] = fifo_inuse[1]; @@ -2976,6 +3053,7 @@ uae_u16 DSKDATR (void) } } if (i < 0) { + write_log (_T("DSKDATR: FIFO underflow!\n")); } else if (dskdmaen > 0 && dskdmaen < 3 && dsklength <= 0 && disk_fifostatus () < 0) { disk_dmafinished (); } @@ -3044,6 +3122,8 @@ void DISK_init (void) if (!drive_insert (drv, &currprefs, dr, currprefs.floppyslots[dr].df, false)) disk_eject (dr); } + if (disk_empty (0)) + write_log (_T("No disk in drive 0.\n")); } void DISK_reset (void) @@ -3207,7 +3287,7 @@ uae_u8 *restore_disk(int num,uae_u8 *src) disabled |= 1 << num; if (changed_prefs.nr_floppies > num) changed_prefs.nr_floppies = num; - changed_prefs.floppyslots[num].dfxtype = (drive_type) -1; + changed_prefs.floppyslots[num].dfxtype = -1; } else { drv->motoroff = (state & 1) ? 0 : 1; drv->idbit = (state & 4) ? 1 : 0; @@ -3257,6 +3337,8 @@ uae_u8 *restore_disk(int num,uae_u8 *src) drive_insert (floppy + num, &currprefs, num, changed_prefs.floppyslots[num].df, false); if (drive_empty (floppy + num)) drv->dskchange = true; + } else { + drv->dskchange_time = -1; } } } diff --git a/src/diskutil.cpp b/src/diskutil.cpp index 76576416..b96eaa9e 100644 --- a/src/diskutil.cpp +++ b/src/diskutil.cpp @@ -1,257 +1,264 @@ -#include "sysconfig.h" -#include "sysdeps.h" - -#include "crc32.h" - -#define MFMMASK 0x55555555 -static uae_u32 getmfmlong (uae_u16 * mbuf) -{ - return (uae_u32)(((*mbuf << 16) | *(mbuf + 1)) & MFMMASK); -} - -#define FLOPPY_WRITE_LEN 6250 - -static int drive_write_adf_amigados (uae_u16 *mbuf, uae_u16 *mend, uae_u8 *writebuffer, uae_u8 *writebuffer_ok, int track, int *outsize) -{ - int i; - uae_u32 odd, even, chksum, id, dlong; - uae_u8 *secdata; - uae_u8 secbuf[544]; - - mend -= (4 + 16 + 8 + 512); - *outsize = 11 * 512; - for (;;) { - int trackoffs; - - /* all sectors complete? */ - for (i = 0; i < 11; i++) { - if (!writebuffer_ok[i]) - break; - } - if (i == 11) - return 0; - - do { - while (*mbuf++ != 0x4489) { - if (mbuf >= mend) { - write_log (_T("* track %d, unexpected end of data\n"), track); - return 1; - } - } - } while (*mbuf++ != 0x4489); - - odd = getmfmlong (mbuf); - even = getmfmlong (mbuf + 2); - mbuf += 4; - id = (odd << 1) | even; - - trackoffs = (id & 0xff00) >> 8; - if (trackoffs > 10) { - write_log (_T("* track %d, corrupt sector number %d\n"), track, trackoffs); - goto next; - } - /* this sector is already ok? */ - if (writebuffer_ok[trackoffs]) - goto next; - - chksum = odd ^ even; - for (i = 0; i < 4; i++) { - odd = getmfmlong (mbuf); - even = getmfmlong (mbuf + 8); - mbuf += 2; - - dlong = (odd << 1) | even; - if (dlong) { - write_log (_T("* track %d, sector %d header crc error\n"), track, trackoffs); - goto next; - } - chksum ^= odd ^ even; - } /* could check here if the label is nonstandard */ - mbuf += 8; - odd = getmfmlong (mbuf); - even = getmfmlong (mbuf + 2); - mbuf += 4; - if (((odd << 1) | even) != chksum || ((id & 0x00ff0000) >> 16) != (uae_u32)track) return 3; - odd = getmfmlong (mbuf); - even = getmfmlong (mbuf + 2); - mbuf += 4; - chksum = (odd << 1) | even; - secdata = secbuf + 32; - for (i = 0; i < 128; i++) { - odd = getmfmlong (mbuf); - even = getmfmlong (mbuf + 256); - mbuf += 2; - dlong = (odd << 1) | even; - *secdata++ = (uae_u8)(dlong >> 24); - *secdata++ = (uae_u8)(dlong >> 16); - *secdata++ = (uae_u8)(dlong >> 8); - *secdata++ = (uae_u8)dlong; - chksum ^= odd ^ even; - } - mbuf += 256; - if (chksum) { - write_log (_T("* track %d, sector %d data crc error\n"), track, trackoffs); - goto next; - } - memcpy (writebuffer + trackoffs * 512, secbuf + 32, 512); - writebuffer_ok[trackoffs] = 0xff; - continue; -next: - mbuf += 8; - } -} - -/* search and align to 0x4489 WORDSYNC markers */ -int isamigatrack(uae_u16 *amigamfmbuffer, uae_u8 *mfmdata, int len, uae_u8 *writebuffer, uae_u8 *writebuffer_ok, int track, int *outsize) -{ - uae_u16 *dst = amigamfmbuffer; - int shift, syncshift, sync; - uae_u32 l; - uae_u16 w; - - *outsize = 11 * 512; - len *= 8; - sync = syncshift = shift = 0; - while (len--) { - l = (mfmdata[0] << 16) | (mfmdata[1] << 8) | (mfmdata[2] << 0); - w = (uae_u16)(l >> (8 - shift)); - if (w == 0x4489) { - sync = 1; - syncshift = 0; - } - if (sync) { - if (syncshift == 0) *dst++ = w; - syncshift++; - if (syncshift == 16) syncshift = 0; - } - shift++; - if (shift == 8) { - mfmdata++; - shift = 0; - } - } - if (sync) - return drive_write_adf_amigados (amigamfmbuffer, dst, writebuffer, writebuffer_ok, track, outsize); - return -1; -} - -static uae_u16 getmfmword (uae_u16 *mbuf, int shift) -{ - return (mbuf[0] << shift) | (mbuf[1] >> (16 - shift)); -} -static uae_u8 mfmdecode (uae_u16 **mfmp, int shift) -{ - uae_u16 mfm = getmfmword (*mfmp, shift); - uae_u8 out = 0; - int i; - - (*mfmp)++; - mfm &= 0x5555; - for (i = 0; i < 8; i++) { - out >>= 1; - if (mfm & 1) - out |= 0x80; - mfm >>= 2; - } - return out; -} - -static int drive_write_adf_pc (uae_u16 *mbuf, uae_u16 *mend, uae_u8 *writebuffer, uae_u8 *writebuffer_ok, int track, int *outsize) -{ - int sectors, shift, sector, i; - uae_u8 mark; - uae_u8 secbuf[3 + 1 + 512]; - uae_u16 crc; - int mfmcount; - - secbuf[0] = secbuf[1] = secbuf[2] = 0xa1; - secbuf[3] = 0xfb; - - sectors = 0; - sector = -1; - shift = 0; - mend -= (4 + 16 + 8 + 512); - mfmcount = 0; - for (;;) { - - *outsize = sectors * 512; - while (getmfmword (mbuf, shift) != 0x4489) { - if (mbuf >= mend) { - if (sectors >= 7) { - *outsize = sectors * 512; - return 0; - } - write_log (_T("* track %d, unexpected end of data\n"), track); - return 1; - } - shift++; - if (shift == 16) { - shift = 0; - mbuf++; - } - } - mfmcount++; - while (getmfmword (mbuf, shift) == 0x4489) { - mfmcount++; - if (mbuf >= mend) { - if (sectors >= 7) { - *outsize = sectors * 512; - return 0; - } - return 1; - } - mbuf++; - } - mfmcount = 0; - mark = mfmdecode (&mbuf, shift); - if (mark == 0xfe) { - uae_u8 tmp[8]; - uae_u8 cyl, head, size; - - cyl = mfmdecode (&mbuf, shift); - head = mfmdecode (&mbuf, shift); - sector = mfmdecode (&mbuf, shift); - size = mfmdecode (&mbuf, shift); - crc = (mfmdecode (&mbuf, shift) << 8) | mfmdecode (&mbuf, shift); - - tmp[0] = 0xa1; tmp[1] = 0xa1; tmp[2] = 0xa1; tmp[3] = mark; - tmp[4] = cyl; tmp[5] = head; tmp[6] = sector; tmp[7] = size; - if (get_crc16 (tmp, 8) != crc || cyl != track / 2 || head != (track & 1) || size != 2 || sector < 1 || sector > 20) { - write_log (_T("PCDOS: track %d, corrupted sector header\n"), track); - continue; - } - sector--; - continue; - } - if (mark != 0xfb) { - write_log (_T("PCDOS: track %d: unknown address mark %02X\n"), track, mark); - continue; - } - if (sector < 0) - continue; - for (i = 0; i < 512; i++) - secbuf[i + 4] = mfmdecode (&mbuf, shift); - sectors++; - memcpy (writebuffer + sector * 512, secbuf + 4, 512); - sector = 0; - crc = (mfmdecode (&mbuf, shift) << 8) | mfmdecode (&mbuf, shift); - if (get_crc16 (secbuf, 3 + 1 + 512) != crc) { - write_log (_T("PCDOS: track %d, sector %d data checksum error\n"), - track, sector + 1); - continue; - } - - } - -} - -int ispctrack(uae_u16 *amigamfmbuffer, uae_u8 *mfmdata, int len, uae_u8 *writebuffer, uae_u8 *writebuffer_ok, int track, int *outsize) -{ - int i; - for (i = 0; i < len / 2; i++) - amigamfmbuffer[i] = mfmdata[i * 2 + 1] | (mfmdata[i * 2 + 0] << 8); - i = drive_write_adf_pc (amigamfmbuffer, amigamfmbuffer + len / 2, writebuffer, writebuffer_ok, track, outsize); - if (*outsize < 9 * 512) - *outsize = 9 * 512; - return i ? -1 : 0; -} +#include "sysconfig.h" +#include "sysdeps.h" + +#include "crc32.h" + +#define MFMMASK 0x55555555 +static uae_u32 getmfmlong (uae_u16 * mbuf) +{ + return (uae_u32)(((*mbuf << 16) | *(mbuf + 1)) & MFMMASK); +} + +#define FLOPPY_WRITE_LEN 6250 + +static int drive_write_adf_amigados (uae_u16 *mbuf, uae_u16 *mend, uae_u8 *writebuffer, uae_u8 *writebuffer_ok, int track, int *outsize) +{ + int i; + uae_u32 odd, even, chksum, id, dlong; + uae_u8 *secdata; + uae_u8 secbuf[544]; + + mend -= (4 + 16 + 8 + 512); + *outsize = 11 * 512; + for (;;) { + int trackoffs; + + /* all sectors complete? */ + for (i = 0; i < 11; i++) { + if (!writebuffer_ok[i]) + break; + } + if (i == 11) + return 0; + + do { + while (*mbuf++ != 0x4489) { + if (mbuf >= mend) { + write_log (_T("* track %d, unexpected end of data\n"), track); + return 1; + } + } + } while (*mbuf++ != 0x4489); + + odd = getmfmlong (mbuf); + even = getmfmlong (mbuf + 2); + mbuf += 4; + id = (odd << 1) | even; + + trackoffs = (id & 0xff00) >> 8; + if (trackoffs > 10) { + write_log (_T("* track %d, corrupt sector number %d\n"), track, trackoffs); + goto next; + } + /* this sector is already ok? */ + if (writebuffer_ok[trackoffs]) + goto next; + + chksum = odd ^ even; + for (i = 0; i < 4; i++) { + odd = getmfmlong (mbuf); + even = getmfmlong (mbuf + 8); + mbuf += 2; + + dlong = (odd << 1) | even; + if (dlong) { + write_log (_T("* track %d, sector %d header crc error\n"), track, trackoffs); + goto next; + } + chksum ^= odd ^ even; + } /* could check here if the label is nonstandard */ + mbuf += 8; + odd = getmfmlong (mbuf); + even = getmfmlong (mbuf + 2); + mbuf += 4; + if (((odd << 1) | even) != chksum || ((id & 0x00ff0000) >> 16) != (uae_u32)track) return 3; + odd = getmfmlong (mbuf); + even = getmfmlong (mbuf + 2); + mbuf += 4; + chksum = (odd << 1) | even; + secdata = secbuf + 32; + for (i = 0; i < 128; i++) { + odd = getmfmlong (mbuf); + even = getmfmlong (mbuf + 256); + mbuf += 2; + dlong = (odd << 1) | even; + *secdata++ = (uae_u8)(dlong >> 24); + *secdata++ = (uae_u8)(dlong >> 16); + *secdata++ = (uae_u8)(dlong >> 8); + *secdata++ = (uae_u8)dlong; + chksum ^= odd ^ even; + } + mbuf += 256; + if (chksum) { + write_log (_T("* track %d, sector %d data crc error\n"), track, trackoffs); + goto next; + } + memcpy (writebuffer + trackoffs * 512, secbuf + 32, 512); + writebuffer_ok[trackoffs] = 0xff; + continue; +next: + mbuf += 8; + } +} + +/* search and align to 0x4489 WORDSYNC markers */ +int isamigatrack(uae_u16 *amigamfmbuffer, uae_u8 *mfmdata, int len, uae_u8 *writebuffer, uae_u8 *writebuffer_ok, int track, int *outsize) +{ + uae_u16 *dst = amigamfmbuffer; + int shift, syncshift, sync; + uae_u32 l; + uae_u16 w; + + *outsize = 11 * 512; + len *= 8; + sync = syncshift = shift = 0; + while (len--) { + l = (mfmdata[0] << 16) | (mfmdata[1] << 8) | (mfmdata[2] << 0); + w = (uae_u16)(l >> (8 - shift)); + if (w == 0x4489) { + sync = 1; + syncshift = 0; + } + if (sync) { + if (syncshift == 0) *dst++ = w; + syncshift++; + if (syncshift == 16) syncshift = 0; + } + shift++; + if (shift == 8) { + mfmdata++; + shift = 0; + } + } + if (sync) + return drive_write_adf_amigados (amigamfmbuffer, dst, writebuffer, writebuffer_ok, track, outsize); + return -1; +} + +static uae_u16 getmfmword (uae_u16 *mbuf, int shift) +{ + return (mbuf[0] << shift) | (mbuf[1] >> (16 - shift)); +} +static uae_u8 mfmdecode (uae_u16 **mfmp, int shift) +{ + uae_u16 mfm = getmfmword (*mfmp, shift); + uae_u8 out = 0; + int i; + + (*mfmp)++; + mfm &= 0x5555; + for (i = 0; i < 8; i++) { + out >>= 1; + if (mfm & 1) + out |= 0x80; + mfm >>= 2; + } + return out; +} + +static int drive_write_adf_pc (uae_u16 *mbuf, uae_u16 *mend, uae_u8 *writebuffer, uae_u8 *writebuffer_ok, int track, int *outsecs) +{ + int sectors, shift, sector, i; + uae_u8 mark; + uae_u8 secbuf[3 + 1 + 512]; + uae_u16 crc; + int mfmcount; + + secbuf[0] = secbuf[1] = secbuf[2] = 0xa1; + secbuf[3] = 0xfb; + + sectors = 0; + sector = -1; + shift = 0; + mend -= (4 + 16 + 8 + 512); + for (;;) { + *outsecs = sectors; + + mfmcount = 0; + while (getmfmword (mbuf, shift) != 0x4489) { + mfmcount++; + if (mbuf >= mend) { + if (sectors >= 1) + return 0; + write_log (_T("* track %d, unexpected end of data\n"), track); + return 1; + } + shift++; + if (shift == 16) { + shift = 0; + mbuf++; + } + if (sector >= 0 && mfmcount / 16 >= 43) + sector = -1; + } + mfmcount = 0; + while (getmfmword (mbuf, shift) == 0x4489) { + mfmcount++; + if (mbuf >= mend) { + if (sectors >= 1) + return 0; + return 1; + } + mbuf++; + } + if (mfmcount < 3) // ignore if less than 3 sync markers + continue; + mark = mfmdecode (&mbuf, shift); + if (mark == 0xfe) { + uae_u8 tmp[8]; + uae_u8 cyl, head, size; + + cyl = mfmdecode (&mbuf, shift); + head = mfmdecode (&mbuf, shift); + sector = mfmdecode (&mbuf, shift); + size = mfmdecode (&mbuf, shift); + crc = (mfmdecode (&mbuf, shift) << 8) | mfmdecode (&mbuf, shift); + + tmp[0] = 0xa1; tmp[1] = 0xa1; tmp[2] = 0xa1; tmp[3] = mark; + tmp[4] = cyl; tmp[5] = head; tmp[6] = sector; tmp[7] = size; + + // skip 28 bytes + for (i = 0; i < 28; i++) + mfmdecode (&mbuf, shift); + + if (get_crc16 (tmp, 8) != crc || cyl != track / 2 || head != (track & 1) || size != 2 || sector < 1 || sector > 20) { + write_log (_T("PCDOS: track %d, corrupted sector header\n"), track); + continue; + } + sector--; + continue; + } + if (mark != 0xfb && mark != 0xfa) { + write_log (_T("PCDOS: track %d: unknown address mark %02X\n"), track, mark); + continue; + } + if (sector < 0) { + write_log (_T("PCDOS: track %d: data mark without header\n"), track); + continue; + } + for (i = 0; i < 512; i++) + secbuf[i + 4] = mfmdecode (&mbuf, shift); + crc = (mfmdecode (&mbuf, shift) << 8) | mfmdecode (&mbuf, shift); + if (get_crc16 (secbuf, 3 + 1 + 512) != crc) { + write_log (_T("PCDOS: track %d, sector %d data checksum error\n"), + track, sector + 1); + continue; + } + memcpy (writebuffer + sector * 512, secbuf + 4, 512); + sectors++; + sector = -1; + } + +} + +int ispctrack(uae_u16 *amigamfmbuffer, uae_u8 *mfmdata, int len, uae_u8 *writebuffer, uae_u8 *writebuffer_ok, int track, int *outsize) +{ + int i, outsecs; + for (i = 0; i < len / 2; i++) + amigamfmbuffer[i] = mfmdata[i * 2 + 1] | (mfmdata[i * 2 + 0] << 8); + i = drive_write_adf_pc (amigamfmbuffer, amigamfmbuffer + len / 2, writebuffer, writebuffer_ok, track, &outsecs); + *outsize = outsecs * 512; + if (*outsize < 9 * 512) + *outsize = 9 * 512; + return i ? -1 : 0; +} diff --git a/src/drawing.cpp b/src/drawing.cpp index 6e34e16d..b16ec5d1 100644 --- a/src/drawing.cpp +++ b/src/drawing.cpp @@ -35,8 +35,8 @@ #include "td-sdl/thread.h" #include "uae.h" #include "memory.h" -#include "newcpu.h" #include "custom.h" +#include "newcpu.h" #include "xwin.h" #include "autoconf.h" #include "gui.h" @@ -57,7 +57,6 @@ static void lores_reset (void) } bool aga_mode; /* mirror of chipset_mask & CSMASK_AGA */ -bool ham_drawn = false; #ifdef PANDORA #define OFFSET_Y_ADJUST 15 @@ -112,19 +111,12 @@ struct color_entry colors_for_drawing; than enough". The coordinates used for indexing into these arrays are almost, but not quite, Amiga coordinates (there's a constant offset). */ union pixdata_u { - /* Let's try to align this thing. */ - double uupzuq; - long int cruxmedo; uae_u8 apixels[MAX_PIXELS_PER_LINE * 2]; uae_u16 apixels_w[MAX_PIXELS_PER_LINE * 2 / sizeof (uae_u16)]; uae_u32 apixels_l[MAX_PIXELS_PER_LINE * 2 / sizeof (uae_u32)]; } pixdata; -#ifdef OS_WITHOUT_MEMORY_MANAGEMENT -uae_u16 *spixels; -#else uae_u16 spixels[MAX_SPR_PIXELS]; -#endif /* Eight bits for every pixel. */ union sps_union spixstate; @@ -160,7 +152,6 @@ static int visible_left_border, visible_right_border; static int linetoscr_x_adjust_bytes; static int thisframe_y_adjust; static int thisframe_y_adjust_real, max_ypos_thisframe; -static int extra_y_adjust; /* These are generated by the drawing code from the line_decisions array for each line that needs to be drawn. These are basically extracted out of @@ -171,19 +162,20 @@ static int plf1pri, plf2pri, bplxor; static uae_u32 plf_sprite_mask; static uae_u32 plf_sprite_mask_n16; static int sbasecol[2] = { 16, 16 }; +static bool brdsprt, brdblank; bool picasso_requested_on; bool picasso_on; int inhibit_frame; -int framecnt = 0, fs_framecnt = 0; +int framecnt = 0; /* Calculate idle time (time to wait for vsync) */ int idletime_frames = 0; unsigned long idletime_time = 0; int idletime_percent = 0; -#define IDLETIME_FRAMES 25 +#define IDLETIME_FRAMES 20 unsigned long time_per_frame = 20000; // Default for PAL (50 Hz): 20000 microsecs void adjust_idletime(unsigned long ms_waited) @@ -192,8 +184,8 @@ void adjust_idletime(unsigned long ms_waited) idletime_time += ms_waited; if(idletime_frames >= IDLETIME_FRAMES) { - unsigned long ms_per_frames = time_per_frame * idletime_frames * (1 + currprefs.gfx_framerate); - idletime_percent = idletime_time * 100 / ms_per_frames; + unsigned long ms_for_frames = time_per_frame * idletime_frames * (1 + currprefs.gfx_framerate); + idletime_percent = idletime_time * 100 / ms_for_frames; if(idletime_percent < 0) idletime_percent = 0; else if(idletime_percent > 100) @@ -201,24 +193,22 @@ void adjust_idletime(unsigned long ms_waited) idletime_time = 0; idletime_frames = 0; } + + if(currprefs.m68k_speed < 0) { + if(ms_waited < 500 && speedup_timelimit > -10000) + speedup_timelimit -= 500; + else if(ms_waited > 1400 && speedup_timelimit < -1000) + speedup_timelimit += 500; + } } -static __inline__ void count_frame (void) +STATIC_INLINE void count_frame (void) { - switch(currprefs.gfx_framerate) - { - case 0: // draw every frame (Limiting is done by waiting for vsync...) - fs_framecnt = 0; - break; - - case 1: // draw every second frame - fs_framecnt++; - if (fs_framecnt > 1) - fs_framecnt = 0; - break; - } + framecnt++; + if(framecnt > currprefs.gfx_framerate) + framecnt = 0; if (inhibit_frame) - fs_framecnt = 1; + framecnt = 1; } STATIC_INLINE int xshift (int x, int shift) @@ -398,6 +388,29 @@ static void pfield_init_linetoscr (void) if (playfield_end > visible_right_border) playfield_end = visible_right_border; + if (brdsprt && dip_for_drawing->nr_sprites) { + int min = visible_right_border, max = visible_left_border, i; + for (i = 0; i < dip_for_drawing->nr_sprites; i++) { + int x; + x = curr_sprite_entries[dip_for_drawing->first_sprite_entry + i].pos; + if (x < min) + min = x; + x = curr_sprite_entries[dip_for_drawing->first_sprite_entry + i].max; + if (x > max) + max = x; + } + min = coord_hw_to_window_x (min >> sprite_buffer_res) + (DIW_DDF_OFFSET << lores_shift); + max = coord_hw_to_window_x (max >> sprite_buffer_res) + (DIW_DDF_OFFSET << lores_shift); + if (min < playfield_start) + playfield_start = min; + if (playfield_start < visible_left_border) + playfield_start = visible_left_border; + if (max > playfield_end) + playfield_end = max; + if (playfield_end > visible_right_border) + playfield_end = visible_right_border; + } + if (sprite_first_x < sprite_last_x) { uae_u8 *p = spritepixels + sprite_first_x; int len = sprite_last_x - sprite_first_x + 1; @@ -431,6 +444,11 @@ static void pfield_init_linetoscr (void) } } +STATIC_INLINE xcolnr getbgc (bool blank) +{ + return (blank || colors_for_drawing.borderblank) ? 0 : colors_for_drawing.acolors[0]; +} + STATIC_INLINE void fill_line (void) { int nints; @@ -443,7 +461,7 @@ STATIC_INLINE void fill_line (void) else start = (int *)(((uae_u8*)xlinebuffer) + (visible_left_border << 1)); - val = colors_for_drawing.acolors[0]; + val = getbgc (false); val |= val << 16; for (; nints > 0; nints -= 8, start += 8) { *start = val; @@ -464,7 +482,7 @@ static void dummy_worker (int start, int stop) #ifdef ARMV6T2 STATIC_INLINE int DECODE_HAM8_1(int col, int pv) { - __asm__ __volatile__ ( + __asm__ ( "ubfx %[pv], %[pv], #3, #5 \n\t" "bfi %[col], %[pv], #0, #5 \n\t" : [col] "+r" (col) , [pv] "+r" (pv) ); @@ -472,7 +490,7 @@ STATIC_INLINE int DECODE_HAM8_1(int col, int pv) } STATIC_INLINE int DECODE_HAM8_2(int col, int pv) { - __asm__ __volatile__ ( + __asm__ ( "ubfx %[pv], %[pv], #3, #5 \n\t" "bfi %[col], %[pv], #11, #5 \n\t" : [col] "+r" (col) , [pv] "+r" (pv) ); @@ -480,7 +498,7 @@ STATIC_INLINE int DECODE_HAM8_2(int col, int pv) } STATIC_INLINE int DECODE_HAM8_3(int col, int pv) { - __asm__ __volatile__ ( + __asm__ ( "ubfx %[pv], %[pv], #2, #6 \n\t" "bfi %[col], %[pv], #5, #6 \n\t" : [col] "+r" (col) , [pv] "+r" (pv) ); @@ -489,7 +507,7 @@ STATIC_INLINE int DECODE_HAM8_3(int col, int pv) STATIC_INLINE int DECODE_HAM6_1(int col, int pv) { - __asm__ __volatile__ ( + __asm__ ( "lsl %[pv], %[pv], #1 \n\t" "bfi %[col], %[pv], #0, #5 \n\t" : [col] "+r" (col) , [pv] "+r" (pv) ); @@ -497,7 +515,7 @@ STATIC_INLINE int DECODE_HAM6_1(int col, int pv) } STATIC_INLINE int DECODE_HAM6_2(int col, int pv) { - __asm__ __volatile__ ( + __asm__ ( "lsl %[pv], %[pv], #1 \n\t" "bfi %[col], %[pv], #11, #5 \n\t" : [col] "+r" (col) , [pv] "+r" (pv) ); @@ -505,7 +523,7 @@ STATIC_INLINE int DECODE_HAM6_2(int col, int pv) } STATIC_INLINE int DECODE_HAM6_3(int col, int pv) { - __asm__ __volatile__ ( + __asm__ ( "lsl %[pv], %[pv], #2 \n\t" "bfi %[col], %[pv], #5, #6 \n\t" : [col] "+r" (col) , [pv] "+r" (pv) ); @@ -596,7 +614,6 @@ static void init_ham_decoding (void) static void decode_ham (int pix, int stoppos) { int todraw_amiga = res_shift_from_window (stoppos - pix); - ham_drawn = true; if (!bplham) { while (todraw_amiga-- > 0) { @@ -679,10 +696,8 @@ static void gen_pfield_tables (void) dblpf_2nd1[i] = plane1 == 0 ? (plane2 == 0 ? 0 : 2) : 1; dblpf_2nd2[i] = plane2 == 0 ? (plane1 == 0 ? 0 : 1) : 2; -#ifdef AGA dblpf_ind1_aga[i] = plane1 == 0 ? plane2 : plane1; dblpf_ind2_aga[i] = plane2 == 0 ? plane1 : plane2; -#endif dblpf_ms1[i] = plane1 == 0 ? (plane2 == 0 ? 16 : 8) : 0; dblpf_ms2[i] = plane2 == 0 ? (plane1 == 0 ? 16 : 0) : 8; @@ -727,7 +742,7 @@ static void gen_pfield_tables (void) } } -static void draw_sprites_normal_sp_lo_nat(struct sprite_entry *_GCCRES_ e) +static void draw_sprites_normal_sp_lo_nat(struct sprite_entry *e) { uae_u16 *buf = spixels + e->first_pixel; int pos, window_pos; @@ -751,7 +766,7 @@ static void draw_sprites_normal_sp_lo_nat(struct sprite_entry *_GCCRES_ e) } } -static void draw_sprites_normal_ham_lo_nat(struct sprite_entry *_GCCRES_ e) +static void draw_sprites_normal_ham_lo_nat(struct sprite_entry *e) { uae_u16 *buf = spixels + e->first_pixel; int pos, window_pos; @@ -776,7 +791,7 @@ static void draw_sprites_normal_ham_lo_nat(struct sprite_entry *_GCCRES_ e) } -static void draw_sprites_normal_dp_lo_nat(struct sprite_entry *_GCCRES_ e) +static void draw_sprites_normal_dp_lo_nat(struct sprite_entry *e) { int *shift_lookup = (bpldualpfpri ? dblpf_ms2 : dblpf_ms1); uae_u16 *buf = spixels + e->first_pixel; @@ -803,7 +818,7 @@ static void draw_sprites_normal_dp_lo_nat(struct sprite_entry *_GCCRES_ e) } } -static void draw_sprites_normal_sp_lo_at(struct sprite_entry *_GCCRES_ e) +static void draw_sprites_normal_sp_lo_at(struct sprite_entry *e) { uae_u16 *buf = spixels + e->first_pixel; uae_u8 *stbuf = spixstate.bytes + e->first_pixel; @@ -835,7 +850,7 @@ static void draw_sprites_normal_sp_lo_at(struct sprite_entry *_GCCRES_ e) } } -static void draw_sprites_normal_ham_lo_at(struct sprite_entry *_GCCRES_ e) +static void draw_sprites_normal_ham_lo_at(struct sprite_entry *e) { uae_u16 *buf = spixels + e->first_pixel; uae_u8 *stbuf = spixstate.bytes + e->first_pixel; @@ -867,7 +882,7 @@ static void draw_sprites_normal_ham_lo_at(struct sprite_entry *_GCCRES_ e) } } -static void draw_sprites_normal_dp_lo_at(struct sprite_entry *_GCCRES_ e) +static void draw_sprites_normal_dp_lo_at(struct sprite_entry *e) { int *shift_lookup = (bpldualpfpri ? dblpf_ms2 : dblpf_ms1); uae_u16 *buf = spixels + e->first_pixel; @@ -902,7 +917,7 @@ static void draw_sprites_normal_dp_lo_at(struct sprite_entry *_GCCRES_ e) } } -static void draw_sprites_normal_sp_hi_nat(struct sprite_entry *_GCCRES_ e) +static void draw_sprites_normal_sp_hi_nat(struct sprite_entry *e) { uae_u16 *buf = spixels + e->first_pixel; int pos, window_pos; @@ -927,7 +942,7 @@ static void draw_sprites_normal_sp_hi_nat(struct sprite_entry *_GCCRES_ e) } } -static void draw_sprites_normal_ham_hi_nat(struct sprite_entry *_GCCRES_ e) +static void draw_sprites_normal_ham_hi_nat(struct sprite_entry *e) { uae_u16 *buf = spixels + e->first_pixel; int pos, window_pos; @@ -954,7 +969,7 @@ static void draw_sprites_normal_ham_hi_nat(struct sprite_entry *_GCCRES_ e) } -static void draw_sprites_normal_dp_hi_nat(struct sprite_entry *_GCCRES_ e) +static void draw_sprites_normal_dp_hi_nat(struct sprite_entry *e) { int *shift_lookup = (bpldualpfpri ? dblpf_ms2 : dblpf_ms1); uae_u16 *buf = spixels + e->first_pixel; @@ -982,7 +997,7 @@ static void draw_sprites_normal_dp_hi_nat(struct sprite_entry *_GCCRES_ e) } } -static void draw_sprites_normal_sp_hi_at(struct sprite_entry *_GCCRES_ e) +static void draw_sprites_normal_sp_hi_at(struct sprite_entry *e) { uae_u16 *buf = spixels + e->first_pixel; uae_u8 *stbuf = spixstate.bytes + e->first_pixel; @@ -1015,7 +1030,7 @@ static void draw_sprites_normal_sp_hi_at(struct sprite_entry *_GCCRES_ e) } } -static void draw_sprites_normal_ham_hi_at(struct sprite_entry *_GCCRES_ e) +static void draw_sprites_normal_ham_hi_at(struct sprite_entry *e) { uae_u16 *buf = spixels + e->first_pixel; uae_u8 *stbuf = spixstate.bytes + e->first_pixel; @@ -1049,7 +1064,7 @@ static void draw_sprites_normal_ham_hi_at(struct sprite_entry *_GCCRES_ e) } } -static void draw_sprites_normal_dp_hi_at(struct sprite_entry *_GCCRES_ e) +static void draw_sprites_normal_dp_hi_at(struct sprite_entry *e) { int *shift_lookup = (bpldualpfpri ? dblpf_ms2 : dblpf_ms1); uae_u16 *buf = spixels + e->first_pixel; @@ -1086,7 +1101,7 @@ static void draw_sprites_normal_dp_hi_at(struct sprite_entry *_GCCRES_ e) } } -typedef void (*draw_sprites_func)(struct sprite_entry *_GCCRES_ e); +typedef void (*draw_sprites_func)(struct sprite_entry *e); static draw_sprites_func draw_sprites_dp_hi[2]={ draw_sprites_normal_dp_hi_nat, draw_sprites_normal_dp_hi_at }; static draw_sprites_func draw_sprites_sp_hi[2]={ @@ -1397,7 +1412,7 @@ static __inline__ void decide_draw_sprites(void) } #endif -static void pfield_doline_n0 (uae_u32 *_GCCRES_ pixels, int wordcount, int lineno) +static void pfield_doline_n0 (uae_u32 *pixels, int wordcount, int lineno) { memset(pixels, 0, wordcount << 5); } @@ -1408,7 +1423,7 @@ static void pfield_doline_n0 (uae_u32 *_GCCRES_ pixels, int wordcount, int linen b ^= (tmp << shift); \ } -static void pfield_doline_n5 (uae_u32 *_GCCRES_ pixels, int wordcount, int lineno) +static void pfield_doline_n5 (uae_u32 *pixels, int wordcount, int lineno) { uae_u8 *real_bplpt[5]; @@ -1461,7 +1476,7 @@ static void pfield_doline_n5 (uae_u32 *_GCCRES_ pixels, int wordcount, int linen } } -static void pfield_doline_n7 (uae_u32 *_GCCRES_ pixels, int wordcount, int lineno) +static void pfield_doline_n7 (uae_u32 *pixels, int wordcount, int lineno) { uae_u8 *real_bplpt[7]; real_bplpt[0] = DATA_POINTER (0); @@ -1518,7 +1533,7 @@ static void pfield_doline_n7 (uae_u32 *_GCCRES_ pixels, int wordcount, int linen } } -typedef void (*pfield_doline_func)(uae_u32 *_GCCRES_, int, int); +typedef void (*pfield_doline_func)(uae_u32 *, int, int); static pfield_doline_func pfield_doline_n[9]={ pfield_doline_n0, ARM_doline_n1, NEON_doline_n2, NEON_doline_n3, @@ -1594,14 +1609,12 @@ static void NOINLINE pfield_doline_n3 (uae_u32 *data, int count) { pfield_doline static void NOINLINE pfield_doline_n4 (uae_u32 *data, int count) { pfield_doline_1 (data, count, 4); } static void NOINLINE pfield_doline_n5 (uae_u32 *data, int count) { pfield_doline_1 (data, count, 5); } static void NOINLINE pfield_doline_n6 (uae_u32 *data, int count) { pfield_doline_1 (data, count, 6); } -#ifdef AGA static void NOINLINE pfield_doline_n7 (uae_u32 *data, int count) { pfield_doline_1 (data, count, 7); } static void NOINLINE pfield_doline_n8 (uae_u32 *data, int count) { pfield_doline_1 (data, count, 8); } -#endif #endif /* USE_ARMNEON */ -static __inline__ void pfield_doline (int lineno) +static void pfield_doline (int lineno) { int wordcount = dp_for_drawing->plflinelen; uae_u32 *data = pixdata.apixels_l + MAX_PIXELS_PER_LINE / 4; @@ -1665,7 +1678,7 @@ static void init_aspect_maps (void) for (i = 0; i < h; i++) native2amiga_line_map[i] = -1; - for (i = maxl-1; i >= minfirstline; i--) { + for (i = maxl - 1; i >= minfirstline; i--) { int j; for (j = i - minfirstline; j < h && native2amiga_line_map[j] == -1; j++) native2amiga_line_map[j] = i + currprefs.pandora_vertical_offset + OFFSET_Y_ADJUST; @@ -1705,6 +1718,8 @@ static void pfield_expand_dp_bplcon (void) plf_sprite_mask_n16 = ~(plf_sprite_mask >> 16); bpldualpf = (dp_for_drawing->bplcon0 & 0x400) == 0x400; bpldualpfpri = (dp_for_drawing->bplcon2 & 0x40) == 0x40; + + brdsprt = !brdblank && (currprefs.chipset_mask & CSMASK_AGA) && (dp_for_drawing->bplcon0 & 1) && (dp_for_drawing->bplcon3 & 0x02); } static bool isham (uae_u16 bplcon0) @@ -1756,7 +1771,7 @@ static enum { color_match_acolors, color_match_full } color_match_type; /* Set up colors_for_drawing to the state at the beginning of the currently drawn line. Try to avoid copying color tables around whenever possible. */ -STATIC_INLINE void adjust_drawing_colors (int ctable, int need_full) +static void adjust_drawing_colors (int ctable, int need_full) { if (drawing_color_matches != ctable) { if (need_full) { @@ -1765,6 +1780,7 @@ STATIC_INLINE void adjust_drawing_colors (int ctable, int need_full) } else { memcpy (colors_for_drawing.acolors, curr_color_tables[ctable].acolors, sizeof colors_for_drawing.acolors); + colors_for_drawing.borderblank = curr_color_tables[ctable].borderblank; color_match_type = color_match_acolors; } drawing_color_matches = ctable; @@ -1834,10 +1850,14 @@ STATIC_INLINE void do_color_changes (line_draw_func worker_border, line_draw_fun unsigned int value = curr_color_changes[i].value; if (regno >= 0x1000) { pfield_expand_dp_bplconx (regno, value); - } else { - color_reg_set (&colors_for_drawing, regno, value); - colors_for_drawing.acolors[regno] = getxcolor (value); - } + } else if (regno >= 0) { + if (regno == 0 && (value & COLOR_CHANGE_BRDBLANK)) { + colors_for_drawing.borderblank = (value & 1) != 0; + } else { + color_reg_set (&colors_for_drawing, regno, value); + colors_for_drawing.acolors[regno] = getxcolor (value); + } + } } if (lastpos >= endpos) break; @@ -1848,11 +1868,15 @@ static void pfield_draw_line (int lineno, int gfx_ypos) { dp_for_drawing = line_decisions + lineno; dip_for_drawing = curr_drawinfo + lineno; + + int border = 0; + if (dp_for_drawing->plfleft < 0) + border = 1; xlinebuffer = row_map[gfx_ypos]; xlinebuffer -= linetoscr_x_adjust_bytes; - if (dp_for_drawing->plfleft != -1) { + if (border == 0) { pfield_expand_dp_bplcon (); pfield_init_linetoscr (); pfield_doline (lineno); @@ -1885,10 +1909,37 @@ static void pfield_draw_line (int lineno, int gfx_ypos) do_color_changes (pfield_do_fill_line, pfield_do_linetoscr); } else { + int dosprites = 0; + adjust_drawing_colors (dp_for_drawing->ctable, 0); - if (dip_for_drawing->nr_color_changes == 0) { + + /* this makes things complex.. */ + if (brdsprt && dip_for_drawing->nr_sprites > 0) { + dosprites = 1; + pfield_expand_dp_bplcon (); + pfield_init_linetoscr (); + } + + if (!dosprites && dip_for_drawing->nr_color_changes == 0) { fill_line (); + return; + } + + if (dosprites) { + int i; + uae_u16 oxor = bplxor; + memset (pixdata.apixels, 0, sizeof pixdata); + decide_draw_sprites(); + for (i = 0; i < dip_for_drawing->nr_sprites; i++) { + struct sprite_entry *e = curr_sprite_entries + dip_for_drawing->first_sprite_entry + i; + draw_sprites_punt[e->has_attached](e); + } + bplxor = 0; + do_color_changes (pfield_do_fill_line, pfield_do_linetoscr); + bplxor = oxor; + } else { + playfield_start = visible_right_border; playfield_end = visible_right_border; do_color_changes(pfield_do_fill_line, pfield_do_fill_line); @@ -1926,172 +1977,15 @@ static void init_drawing_frame (void) drawing_color_matches = -1; } -/* - * Some code to put status information on the screen. - */ - -static const char *numbers = { /* ugly 0123456789CHD%+- */ -"+++++++--++++-+++++++++++++++++-++++++++++++++++++++++++++++++++++++++++++++-++++++-++++----++---+--------------" -"+xxxxx+--+xx+-+xxxxx++xxxxx++x+-+x++xxxxx++xxxxx++xxxxx++xxxxx++xxxxx++xxxx+-+x++x+-+xxx++-+xx+-+x---+----------" -"+x+++x+--++x+-+++++x++++++x++x+++x++x++++++x++++++++++x++x+++x++x+++x++x++++-+x++x+-+x++x+--+x++x+--+x+----+++--" -"+x+-+x+---+x+-+xxxxx++xxxxx++xxxxx++xxxxx++xxxxx+--++x+-+xxxxx++xxxxx++x+----+xxxx+-+x++x+----+x+--+xxx+--+xxx+-" -"+x+++x+---+x+-+x++++++++++x++++++x++++++x++x+++x+--+x+--+x+++x++++++x++x++++-+x++x+-+x++x+---+x+x+--+x+----+++--" -"+xxxxx+---+x+-+xxxxx++xxxxx+----+x++xxxxx++xxxxx+--+x+--+xxxxx++xxxxx++xxxx+-+x++x+-+xxx+---+x++xx--------------" -"+++++++---+++-++++++++++++++----+++++++++++++++++--+++--++++++++++++++++++++-++++++-++++------------------------" -}; - -static const char *letters = { /* ugly */ -"------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ " -"-xxxxx -xxxxx -xxxxx -xxxx- -xxxxx -xxxxx -xxxxx -x---x --xx-- -----x -x--x- -x---- -x---x -x---x --xxx- -xxxx- -xxxx- -xxxx- -xxxxx -xxxxx -x---x -x---x -x---x -x---x -x---x -xxxxx " -"-x---x -x---x -x---- -x---x -x---- -x---- -x---- -x---x --xx-- -----x -x-x-- -x---- -xxxxx -xx--x -x---x -x---x -x---- -x---x -x---- ---x-- -x---x -x---x --x-x- --x-x- -x---x ----x- " -"-xxxxx -xxxxx -x---- -x---x -xxxxx -xxxx- -xxxxx -xxxxx --xx-- -----x -xx--- -x---- -x---x -x-x-x -x---x -xxxx- -x---- -xxxx- -xxxxx ---x-- -x---x -x---x ---x-- ---x-- -x-x-x ---x-- " -"-x---x -x---x -x---- -x---x -x---- -x---- -x---x -x---x --xx-- -x---x -x-x-- -x---- -x---x -x--xx -x---x -x---- -x---- -x-x-- -----x ---x-- -x---x -xx-xx --x-x- ---x-- -xx-xx --x--- " -"-x---x -xxxxx -xxxxx -xxxx- -xxxxx -x---- -xxxxx -x---x --xx-- -xxxxx -x--x- -xxxx- -x---x -x---x --xxx- -x---- -xxxx- -x--xx -xxxxx ---x-- --xxx- ---x-- -x---x ---x-- -x---x -xxxxx " -"------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ ------ " -}; - - -STATIC_INLINE void putpixel (uae_u8 *buf, int x, xcolnr c8) +static void draw_status_line (int line, int statusy) { - uae_u16 *p = (uae_u16 *)buf + x; - *p = (uae_u16)c8; -} - -static void write_tdnumber (uae_u8 *buf, int x, int y, int num) -{ - int j; - const char *numptr; - - numptr = numbers + num * TD_NUM_WIDTH + NUMBERS_NUM * TD_NUM_WIDTH * y; - for (j = 0; j < TD_NUM_WIDTH; j++) { - if (*numptr == 'x') - putpixel (buf, x + j, xcolors[0xfff]); - else if (*numptr == '+') - putpixel (buf, x + j, xcolors[0x000]); - numptr++; - } -} - -static void write_tdletter (uae_u8 *buf, int x, int y, char ch) -{ - int j; - uae_u8 *numptr; - - numptr = (uae_u8 *)(letters + (ch-65) * TD_NUM_WIDTH + 26 * TD_NUM_WIDTH * y); - - for (j = 0; j < TD_NUM_WIDTH; j++) { - putpixel (buf, x + j, *numptr == 'x' ? xcolors[0xfff] : xcolors[0x000]); - numptr++; - } -} - -static void draw_status_line (int line) -{ - int x, y, i, j, led, on; - int on_rgb, off_rgb, c; uae_u8 *buf; -#ifdef PICASSO96 - if(picasso_on) - { - x = picasso_vidinfo.width - TD_PADX - 6 * TD_WIDTH; - y = line - (picasso_vidinfo.height - TD_TOTAL_HEIGHT); - xlinebuffer = (uae_u8*)prSDLScreen->pixels + picasso_vidinfo.rowbytes * line; - } - else -#endif - { - x = gfxvidinfo.outwidth - TD_PADX - 6 * TD_WIDTH; - y = line - (gfxvidinfo.outheight - TD_TOTAL_HEIGHT); - xlinebuffer = row_map[line]; - } + xlinebuffer = row_map[line]; buf = xlinebuffer; - - x += 100 - (TD_WIDTH * (currprefs.nr_floppies - 1)) - TD_WIDTH; - if(nr_units() < 1) - x += TD_WIDTH; - if(currprefs.pandora_hide_idle_led) - x += TD_WIDTH; -#ifdef PICASSO96 - if(picasso_on) - memset (buf + (x - 4) * 2, 0, (picasso_vidinfo.width - x + 4) * 2); - else -#endif - memset (buf + (x - 4) * gfxvidinfo.pixbytes, 0, (gfxvidinfo.outwidth - x + 4) * gfxvidinfo.pixbytes); - - for (led = (currprefs.pandora_hide_idle_led == 0) ? -2 : -1; led < (currprefs.nr_floppies+1); led++) { - int track; - if(led == 0 && nr_units() < 1) - continue; // skip led for HD if not in use - if (led > 0) { - /* Floppy */ - track = gui_data.drive_track[led-1]; - on = gui_data.drive_motor[led-1]; - on_rgb = 0x0c0; - off_rgb = 0x030; - if (gui_data.drive_writing[led-1]) - on_rgb = 0xc00; - } else if (led < -1) { - /* Idle time */ - track = idletime_percent; - on = 1; - on_rgb = 0x666; - off_rgb = 0x666; - } else if (led < 0) { - /* Power */ - track = gui_data.fps; - on = gui_data.powerled; - on_rgb = 0xc00; - off_rgb = 0x300; - } else { - /* Hard disk */ - track = -2; - - switch (gui_data.hd) { - case HDLED_OFF: - on = 0; - off_rgb = 0x003; - break; - case HDLED_READ: - on = 1; - on_rgb = 0x00c; - off_rgb = 0x003; - break; - case HDLED_WRITE: - on = 1; - on_rgb = 0xc00; - off_rgb = 0x300; - break; - } - } - c = xcolors[on ? on_rgb : off_rgb]; - - for (j = 0; j < TD_LED_WIDTH; j++) - putpixel (buf, x + j, c); - - if (y >= TD_PADY && y - TD_PADY < TD_NUM_HEIGHT) { - if (track >= 0) { - int tn = track >= 100 ? 3 : 2; - int offs = (TD_LED_WIDTH - tn * TD_NUM_WIDTH) / 2; - if(track >= 100) - { - write_tdnumber (buf, x + offs, y - TD_PADY, track / 100); - offs += TD_NUM_WIDTH; - } - write_tdnumber (buf, x + offs, y - TD_PADY, (track / 10) % 10); - write_tdnumber (buf, x + offs + TD_NUM_WIDTH, y - TD_PADY, track % 10); - } - else if (nr_units() > 0) { - int offs = (TD_LED_WIDTH - 2 * TD_NUM_WIDTH) / 2; - write_tdletter(buf, x + offs, y - TD_PADY, 'H'); - write_tdletter(buf, x + offs + TD_NUM_WIDTH, y - TD_PADY, 'D'); - } - } - x += TD_WIDTH; - } + draw_status_line_single (buf, statusy, gfxvidinfo.outwidth); } - static void finish_drawing_frame (void) { int i; @@ -2119,14 +2013,13 @@ static void finish_drawing_frame (void) int line = i + thisframe_y_adjust_real; if(line >= linestate_first_undecided) break; - pfield_draw_line (line, i); } if (currprefs.leds_on_screen) { for (i = 0; i < TD_TOTAL_HEIGHT; i++) { int line = gfxvidinfo.outheight - TD_TOTAL_HEIGHT + i; - draw_status_line (line); + draw_status_line (line, i); } } do_flush_screen (); @@ -2137,7 +2030,6 @@ STATIC_INLINE void check_picasso (void) #ifdef PICASSO96 if (picasso_requested_on == picasso_on) return; - picasso_on = picasso_requested_on; if (!picasso_on) @@ -2163,57 +2055,39 @@ void vsync_handle_check (void) notice_new_xcolors (); } check_prefs_changed_audio (); + check_prefs_changed_cd (); check_prefs_changed_custom (); check_prefs_changed_cpu (); } #ifdef RASPBERRY -int wait_for_vsync = 1; +int wait_for_vsync_dispmanx = 1; extern uae_sem_t vsync_wait_sem; #endif void vsync_handle_redraw (void) { - count_frame (); - if (framecnt == 0) { #ifdef RASPBERRY - if (wait_for_vsync == 1) + if (wait_for_vsync_dispmanx == 1) uae_sem_wait (&vsync_wait_sem); - wait_for_vsync = 1; + wait_for_vsync_dispmanx = 1; #endif finish_drawing_frame (); } -#ifdef PICASSO96 - else if(picasso_on) - { - if(currprefs.leds_on_screen) - { - int i; - gfx_lock_picasso(); - for (i = 0; i < TD_TOTAL_HEIGHT; i++) { - int line = picasso_vidinfo.height - TD_TOTAL_HEIGHT + i; - draw_status_line (line); - } - gfx_unlock_picasso(); - } - flush_screen(); - } -#endif + if (quit_program < 0) { quit_program = -quit_program; set_inhibit_frame (IHF_QUIT_PROGRAM); - set_special (regs, SPCFLAG_BRK); + set_special (SPCFLAG_BRK); return; } - vsync_handle_check(); + count_frame (); - framecnt = fs_framecnt; - if (framecnt == 0) init_drawing_frame (); @@ -2250,7 +2124,6 @@ void drawing_init (void) #ifdef PICASSO96 if (!isrestore ()) { - InitPicasso96 (); picasso_on = 0; picasso_requested_on = 0; gfx_set_picasso_state (0); diff --git a/src/events.cpp b/src/events.cpp index 855b8e5d..557c1a3e 100644 --- a/src/events.cpp +++ b/src/events.cpp @@ -16,7 +16,8 @@ #include "newcpu.h" #include "events.h" -frame_time_t vsynctimebase, vsyncmintime; +frame_time_t vsyncmintime; +int vsynctimebase; void events_schedule (void) { @@ -44,7 +45,7 @@ void do_cycles_cpu_fastest (unsigned long cycles_to_add) if (is_syncline && eventtab[ev_hsync].evtime - currcycle <= cycles_to_add) { int rpt = read_processor_time (); int v = rpt - vsyncmintime; - if (v > (int)syncbase || v < -((int)syncbase)) + if (v > syncbase || v < -syncbase) vsyncmintime = rpt; if (v < speedup_timelimit) { regs.pissoff = pissoff_value; diff --git a/src/expansion.cpp b/src/expansion.cpp index eb5d5bb6..5ba55b79 100644 --- a/src/expansion.cpp +++ b/src/expansion.cpp @@ -14,14 +14,13 @@ #include "options.h" #include "uae.h" -#include "autoconf.h" #include "memory.h" #include "rommgr.h" +#include "autoconf.h" #include "newcpu.h" #include "custom.h" #include "savestate.h" #include "zfile.h" -#include #define MAX_EXPANSION_BOARDS 8 @@ -202,7 +201,8 @@ static void expamem_init_clear2 (void) static void expamem_init_last (void) { - expamem_init_clear2(); + expamem_init_clear2(); + write_log (_T("Memory map after autoconfig:\n")); } void expamem_next(void) @@ -211,7 +211,7 @@ void expamem_next(void) map_banks (&expamem_bank, 0xE8, 1, 0); ++ecard; if (ecard < cardno) { - expamem_bank.name = card_name[ecard] ? card_name[ecard] : _T("None"); + expamem_bank.name = card_name[ecard] ? card_name[ecard] : (TCHAR*) _T("None"); (*card_init[ecard]) (); } else { expamem_init_clear2 (); @@ -284,12 +284,14 @@ static void REGPARAM2 expamem_wput (uaecptr addr, uae_u32 value) switch (addr & 0xff) { case 0x44: if (expamem_type() == zorroIII) { - uae_u32 p1, p2; + uae_u32 p1, p2 = 0; // +Bernd Roesch & Toni Wilen p1 = get_word (regs.regs[11] + 0x20); if (expamem[0] & add_memory) { // Z3 RAM expansion - p2 = z3fastmem_start >> 16; + p2 = 0; + if (currprefs.z3fastmem_size) + p2 = z3fastmem_start >> 16; } else { // Z3 P96 RAM #ifdef PICASSO96 @@ -680,7 +682,7 @@ static void expamem_map_filesys (void) write_log (_T("Filesystem: mapped memory @$%lx.\n"), filesys_start); /* 68k code needs to know this. */ a = here (); - org (rtarea_base + 0xFFFC); + org (rtarea_base + RTAREA_FSBOARD); dl (filesys_start + 0x2000); org (a); } @@ -734,7 +736,7 @@ static void expamem_init_filesys (void) * Zorro III expansion memory */ -static void expamem_map_z3fastmem_2 (addrbank *bank, uaecptr *startp, uae_u32 size, uae_u32 allocated) +static void expamem_map_z3fastmem_2 (addrbank *bank, uaecptr *startp, uae_u32 size, uae_u32 allocated, int chip) { int z3fs = ((expamem_hi | (expamem_lo >> 4)) << 16); int start = *startp; @@ -746,14 +748,14 @@ static void expamem_map_z3fastmem_2 (addrbank *bank, uaecptr *startp, uae_u32 si *startp = z3fs; map_banks (bank, start >> 16, size >> 16, allocated); } - write_log (_T("Z3MEM (32bit): mapped @$%08x: %d MB Zorro III fast memory \n"), - start, allocated / 0x100000); + write_log (_T("Z3MEM (32bit): mapped @$%08x: %d MB Zorro III %s memory \n"), + start, allocated / 0x100000, chip ? _T("chip") : _T("fast")); } } static void expamem_map_z3fastmem (void) { - expamem_map_z3fastmem_2 (&z3fastmem_bank, &z3fastmem_start, currprefs.z3fastmem_size, allocated_z3fastmem); + expamem_map_z3fastmem_2 (&z3fastmem_bank, &z3fastmem_start, currprefs.z3fastmem_size, allocated_z3fastmem, 0); } static void expamem_init_z3fastmem_2 (addrbank *bank, uae_u32 start, uae_u32 size, uae_u32 allocated) @@ -884,11 +886,40 @@ void free_fastmemory (void) fastmemory = 0; } +static bool mapped_malloc_dynamic (uae_u32 *currpsize, uae_u32 *changedpsize, uae_u8 **memory, uae_u32 *allocated, uae_u32 *mask, int max, const TCHAR *name) +{ + int alloc = *currpsize; + + *allocated = 0; + *memory = NULL; + *mask = 0; + + if (!alloc) + return false; + + while (alloc >= max * 1024 * 1024) { + uae_u8 *mem = mapped_malloc (alloc, name); + if (mem) { + *memory = mem; + *currpsize = alloc; + *changedpsize = alloc; + *mask = alloc - 1; + *allocated = alloc; + return true; + } + write_log (_T("Out of memory for %s, %d bytes.\n"), name, alloc); + alloc /= 2; + } + + return false; +} + static void allocate_expamem (void) { currprefs.fastmem_size = changed_prefs.fastmem_size; currprefs.z3fastmem_size = changed_prefs.z3fastmem_size; currprefs.rtgmem_size = changed_prefs.rtgmem_size; + currprefs.rtgmem_type = changed_prefs.rtgmem_type; z3fastmem_start = currprefs.z3fastmem_start; @@ -904,45 +935,21 @@ static void allocate_expamem (void) allocated_fastmem = 0; } } - memory_hardreset(); + memory_hardreset(1); } if (allocated_z3fastmem != currprefs.z3fastmem_size) { if (z3fastmem) mapped_free (z3fastmem); - z3fastmem = 0; - - allocated_z3fastmem = currprefs.z3fastmem_size; - z3fastmem_mask = allocated_z3fastmem - 1; - - if (allocated_z3fastmem) { - if(z3fastmem_start != z3_start_adr) - z3fastmem_start = z3_start_adr; - z3fastmem = mapped_malloc (allocated_z3fastmem, _T("z3")); - if (z3fastmem == 0) { - write_log (_T("Out of memory for 32 bit fast memory.\n")); - allocated_z3fastmem = 0; - } - } - memory_hardreset(); + mapped_malloc_dynamic (&currprefs.z3fastmem_size, &changed_prefs.z3fastmem_size, &z3fastmem, &allocated_z3fastmem, &z3fastmem_mask, 1, _T("z3")); + memory_hardreset(1); } #ifdef PICASSO96 if (allocated_gfxmem != currprefs.rtgmem_size) { if (gfxmemory) mapped_free (gfxmemory); - gfxmemory = 0; - - allocated_gfxmem = currprefs.rtgmem_size; - gfxmem_mask = allocated_gfxmem - 1; - - if (allocated_gfxmem) { - gfxmemory = mapped_malloc (allocated_gfxmem, currprefs.rtgmem_type ? _T("z3_gfx") : _T("z2_gfx")); - if (gfxmemory == 0) { - write_log (_T("Out of memory for graphics card memory\n")); - allocated_gfxmem = 0; - } - } - memory_hardreset(); + mapped_malloc_dynamic (&currprefs.rtgmem_size, &changed_prefs.rtgmem_size, &gfxmemory, &allocated_gfxmem, &gfxmem_mask, 1, currprefs.rtgmem_type ? _T("z3_gfx") : _T("z2_gfx")); + memory_hardreset(1); } #endif @@ -1028,7 +1035,7 @@ void expamem_reset (void) expamem_bank.name = _T("Autoconfig [reset]"); /* check if Kickstart version is below 1.3 */ - if (kickstart_version + if (kickstart_version && do_mount && (/* Kickstart 1.0 & 1.1! */ kickstart_version == 0xFFFF /* Kickstart < 1.3 */ @@ -1047,17 +1054,6 @@ void expamem_reset (void) card_map[cardno++] = expamem_map_fastcard; } -#ifdef CD32 - if (currprefs.cs_cd32cd && currprefs.fastmem_size == 0 && currprefs.chipmem_size <= 0x200000) { - int ids[] = { 23, -1 }; - //struct romlist *rl = getromlistbyids (ids); - //if (rl && !_tcscmp (rl->path, currprefs.cartfile)) { - // card_name[cardno] = _T("CD32MPEG"); - // card_init[cardno] = expamem_init_cd32fmv; - // card_map[cardno++] = expamem_map_cd32fmv; - //} - } -#endif #ifdef FILESYS if (do_mount) { card_name[cardno] = _T("UAEFS"); @@ -1103,24 +1099,28 @@ void expamem_reset (void) void expansion_init (void) { - allocated_fastmem = 0; - fastmem_mask = fastmem_start = 0; - fastmemory = 0; + if (savestate_state != STATE_RESTORE) { + + allocated_fastmem = 0; + fastmem_mask = fastmem_start = 0; + fastmemory = 0; + #ifdef PICASSO96 - allocated_gfxmem = 0; - gfxmem_mask = gfxmem_start = 0; - gfxmemory = 0; + allocated_gfxmem = 0; + gfxmem_mask = gfxmem_start = 0; + gfxmemory = 0; #endif + allocated_z3fastmem = 0; + z3fastmem_mask = z3fastmem_start = 0; + z3fastmem = 0; + } + #ifdef FILESYS filesys_start = 0; filesysory = 0; #endif - allocated_z3fastmem = 0; - z3fastmem_mask = z3fastmem_start = 0; - z3fastmem = 0; - expamem_lo = 0; expamem_hi = 0; @@ -1210,7 +1210,7 @@ void restore_pram (int len, size_t filepos) uae_u8 *save_expansion (int *len, uae_u8 *dstptr) { - uae_u8 *dstbak,*dst; + uae_u8 *dstbak, *dst; if (dstptr) dst = dstbak = dstptr; else diff --git a/src/filesys.asm b/src/filesys.asm index 58a96e7d..6682812a 100644 --- a/src/filesys.asm +++ b/src/filesys.asm @@ -56,7 +56,7 @@ start: dc.l exter_server-start ;4 28 dc.l bootcode-start ;5 32 dc.l setup_exter-start ;6 36 - dc.l mh_e-start ;7 40 + dc.l 0 ;7 40 dc.l clipboard_init-start ;8 44 ;52 @@ -143,7 +143,7 @@ residentcodeend: filesys_init: movem.l d0-d7/a0-a6,-(sp) move.l 4.w,a6 - move.w #$FFFC,d0 ; filesys base + move.w #$FFEC,d0 ; filesys base bsr getrtbase move.l (a0),a5 lea.l explibname(pc),a1 ; expansion lib name @@ -194,24 +194,6 @@ FSIN_nomoresub: bra.b FSIN_init_units FSIN_units_ok: - tst.w d5 - beq.s CDIN_done - moveq #0,d6 -CDIN_init_units: - move.w $10c(a5),d0 - btst d6,d0 - beq.s CDIN_next - movem.l d6/a3,-(sp) - move.l a3,a0 - bset #31,d6 - bsr.w make_cd_dev - movem.l (sp)+,d6/a3 -CDIN_next: - addq.w #1,d6 - cmp.w #8,d6 - bne.s CDIN_init_units -CDIN_done: - move.l 4.w,a6 move.l a3,a1 move.l #PP_TOTAL,d0 @@ -424,6 +406,38 @@ exter_server_exit: movem.l (sp)+,a2 rts +heartbeatvblank: + movem.l d0-d1/a0-a2,-(sp) + + move.w #$FF38,d0 + moveq #18,d1 + bsr.w getrtbase + jsr (a0) + move.l d0,a2 + + moveq #22,d0 + move.l #65536+1,d1 + jsr AllocMem(a6) + move.l d0,a1 + + move.b #2,8(a1) ;NT_INTERRUPT + move.b #-10,9(a1) ;priority + lea kaname(pc),a0 + move.l a0,10(a1) + lea kaint(pc),a0 + move.l a0,18(a1) + move.l a2,14(a1) + moveq #5,d0 ;INTB_VERTB + jsr -$00a8(a6) + + movem.l (sp)+,d0-d1/a0-a2 + rts + +kaint: + addq.l #1,(a1) + moveq #0,d0 + rts + setup_exter: movem.l d0-d1/a0-a1,-(sp) bsr.w residenthack @@ -440,7 +454,14 @@ setup_exter: move.w #$0214,8(a1) moveq.l #3,d0 jsr -168(a6) ; AddIntServer - move.w mh_e(pc),d0 + + bsr.w heartbeatvblank + + move.w #$FF38,d0 + moveq #4,d1 + bsr.w getrtbase + jsr (a0) + tst.l d0 beq.s .nomh bsr.w mousehack_init .nomh @@ -502,11 +523,11 @@ r15 move.l (a2),d2 ; hunk size (header) bset #1,d1 r2 bset #16,d1 lsl.l #2,d2 - move.l d2,d0 bne.s r17 clr.l (a2)+ ; empty hunk bra.s r18 -r17 addq.l #8,d0 ; size + pointer to next hunk + hunk size +r17 addq.l #8,d2 ; size + pointer to next hunk + hunk size + move.l d2,d0 jsr AllocMem(a6) tst.l d0 beq.w ree @@ -930,99 +951,6 @@ action_exall tst.l (a0) ; eac_Entries == 0 -> get more rts - ; mount CD drives using built-in AROS CDFS + uaescsi.device - -make_cd_dev: ; IN: A0 param_packet, D6: unit_no | 0x80000000 (=CD) - bsr.w fsres - move.l d0,PP_FSRES(a0) ; pointer to FileSystem.resource - move.l a0,-(sp) - move.w #$FFFC,d0 ; filesys base - bsr.w getrtbase - move.l (a0),a5 - move.w #$FF28,d0 ; fill in unit-dependent info (filesys_dev_storeinfo) - bsr.w getrtbase - move.l a0,a1 - move.l (sp)+,a0 - clr.l PP_FSSIZE(a0) ; filesystem size - clr.l PP_FSPTR(a0) ; filesystem memory - jsr (a1) - tst.l d0 - beq.w .fail - - ; allocate memory for loaded filesystem - move.l PP_FSSIZE(a0),d0 - beq.s .nofs - bmi.s .nofs - move.l a0,-(sp) - moveq #1,d1 - move.l 4.w,a6 - jsr AllocMem(a6) - move.l (sp)+,a0 - move.l d0,PP_FSPTR(a0) - beq.w .fail -.nofs - - move.l a4,a6 - move.l a0,-(sp) - jsr -144(a6) ; MakeDosNode() - move.l (sp)+,a0 ; parmpacket - move.l a0,a1 - move.l d0,a3 ; devicenode - move.w #$FF20,d0 ; record in ui.startup (filesys_dev_remember) - bsr.w getrtbase - jsr (a0) - moveq #0,d0 - move.l d0,8(a3) ; dn_Task - move.l d0,16(a3) ; dn_Handler - move.l d0,32(a3) ; dn_SegList - - move.l PP_FSPTR(a1),d0 - beq.s .nofs2 - move.l d0,a0 - bsr.w relocate - movem.l d0/a0-a1,-(sp) - move.l PP_FSSIZE(a1),d0 - move.l PP_FSPTR(a1),a1 - move.l 4.w,a6 - jsr FreeMem(a6) - movem.l (sp)+,d0/a0-a1 - bsr.w addfs -.nofs2 - move.w #$FF18,d0 ; update dn_SegList if needed (filesys_dev_bootfilesys) - bsr.w getrtbase - jsr (a0) - - move.b 79(a1),d3 ; bootpri - cmp.b #-128,d3 - beq.s .cdnoboot - move.l 4.w,a6 - moveq #20,d0 - move.l #65536+1,d1 - jsr AllocMem(a6) - move.l d0,a1 ; bootnode - move.w #$1000,d0 - or.b d3,d0 - move.w d0,8(a1) - move.l $104(a5),10(a1) ; filesys_configdev - move.l a3,16(a1) ; devicenode - lea.l 74(a4),a0 ; MountList - jsr -$0084(a6) ;Forbid - jsr -270(a6) ; Enqueue() - jsr -$008a(a6) ;Permit - bra.s .fail -.cdnoboot: - move.l a1,a2 ; bootnode - move.l a3,a0 ; parmpacket - moveq #0,d1 - move.l d1,a1 - moveq #1,d1 ; ADNF_STARTPROC (v36+) - moveq #-20,d0 - move.l a4,a6 ; expansion base - jsr -150(a6) ; AddDosNode - -.fail: - rts - ; mount harddrives, virtual or hdf make_dev: ; IN: A0 param_packet, D6: unit_no, D7: b0=autoboot,b1=onthefly,b2=v36+ @@ -1031,7 +959,7 @@ make_dev: ; IN: A0 param_packet, D6: unit_no, D7: b0=autoboot,b1=onthefly,b2=v36 bsr.w fsres move.l d0,PP_FSRES(a0) ; pointer to FileSystem.resource move.l a0,-(sp) - move.w #$FFFC,d0 ; filesys base + move.w #$FFEC,d0 ; filesys base bsr.w getrtbase move.l (a0),a5 move.w #$FF28,d0 ; fill in unit-dependent info (filesys_dev_storeinfo) @@ -1118,7 +1046,7 @@ nordbfs2: move.l d3,d0 move.b 79(a1),d3 ; bootpri tst.l d0 - bne.b MKDV_doboot + bne.b MKDV_doboot ; not directory harddrive? MKDV_is_filesys: move.l #6000,20(a3) ; dn_StackSize @@ -1246,6 +1174,21 @@ addfsonthefly ; d1 = fs index movem.l (sp)+,d2-d7/a2-a6 rts +clockreset: + move.w #$ff58,d0 ; fsmisc_helper + bsr.w getrtbase + moveq #3,d0 ; get time + jsr (a0) + move.l 168(a3),a1 + move.l d0,32(a1) + beq.s .cr + moveq #0,d0 + move.l d0,36(a1) + move.w #11,28(a1) ;TR_SETSYSTIME + move.b #1,30(a1) ;IOF_QUICK + jsr -$01c8(a6) ;DoIO +.cr rts + filesys_mainloop: move.l 4.w,a6 sub.l a1,a1 @@ -1271,6 +1214,7 @@ filesys_mainloop: ; 164: input.device ioreq (disk inserted/removed input message) ; 168: timer.device ioreq ; 172: disk change from host + ; 173: clock reset ; 176: my task ; 180: device node move.l #12+20+(80+44+1)+(1+3)+4+4+4+(1+3)+4+4,d0 @@ -1347,7 +1291,14 @@ FSML_loop: bset #13,d0 ; SIGBREAK_CTRL_D jsr -$013e(a6) ;Wait .msg - ; SIGBREAK_CTRL_D = disk change notification from native code + ; SIGBREAK_CTRL_D checks + ; clock reset + tst.b 173(a3) + beq.s .noclk + bsr.w clockreset + clr.b 173(a3) +.noclk + ; disk change notification from native code tst.b 172(a3) beq.s .nodc ; call filesys_media_change_reply (pre) @@ -1542,12 +1493,6 @@ LKCK_ret: move.l (a7)+,d5 rts -getrtbase: - lea start-8-4(pc),a0 - and.l #$FFFF,d0 - add.l d0,a0 - rts - ; mouse hack newlist: @@ -1688,32 +1633,30 @@ mhdoio: jsr -$01c8(a6) ;DoIO rts -; these shouldn't be here but it is easier this way.. - -mh_e: dc.w 0 -mh_cnt: dc.w -1 -mh_maxx: dc.w 0 -mh_maxy: dc.w 0 -mh_maxz: dc.w 0 -mh_x: dc.w 0 -mh_y: dc.w 0 -mh_z: dc.w 0 -mh_resx: dc.w 0 -mh_resy: dc.w 0 -mh_maxax: dc.w 0 -mh_maxay: dc.w 0 -mh_maxaz: dc.w 0 -mh_ax: dc.w 0 -mh_ay: dc.w 0 -mh_az: dc.w 0 -mh_pressure: dc.w 0 -mh_buttonbits: dc.l 0 -mh_inproximity: dc.w 0 -mh_absx: dc.w 0 -mh_absy: dc.w 0 +MH_E = 0 +MH_CNT = 2 +MH_MAXX = 4 +MH_MAXY = 6 +MH_MAXZ = 8 +MH_X = 10 +MH_Y = 12 +MH_Z = 14 +MH_RESX = 16 +MH_RESY = 18 +MH_MAXAX = 20 +MH_MAXAY = 22 +MH_MAXAZ = 24 +MH_AX = 26 +MH_AY = 28 +MH_AZ = 30 +MH_PRESSURE = 32 +MH_BUTTONBITS = 34 +MH_INPROXIMITY = 38 +MH_ABSX = 40 +MH_ABSY = 42 +MH_DATA_SIZE = 44 MH_INT = 0 - MH_FOO = (MH_INT+22) MH_FOO_CNT = 0 MH_FOO_BUTTONS = 4 @@ -1742,7 +1685,8 @@ MH_IEPT = (MH_IEH+22) ;IEPointerTable/IENewTablet MH_IENTTAGS = (MH_IEPT+32) ;space for ient_TagList MH_IO = (MH_IENTTAGS+16*4*2) MH_TM = (MH_IO+4) -MH_END = (MH_TM+4) +MH_DATA = (MH_TM+4) +MH_END = (MH_DATA+MH_DATA_SIZE) MH_MOUSEHACK = 0 MH_TABLET = 1 @@ -1858,7 +1802,7 @@ getgfxlimits: mousehack_task: move.l 4.w,a6 - move.w 20(a6),d7 + move.w 20(a6),d7 ; KS version moveq #-1,d0 jsr -$014a(a6) ;AllocSignal @@ -1886,6 +1830,14 @@ mousehack_task: moveq #-1,d0 move.w d0,MH_FOO_CNT(a3) + ; send data structure address + move.w #$FF38,d0 + moveq #5,d1 + bsr.w getrtbase + move.l a5,d0 + add.l #MH_DATA,d0 + jsr (a0) + lea MH_INT(a5),a1 move.b #2,8(a1) ;NT_INTERRUPT move.b #5,9(a1) ;priority @@ -1992,7 +1944,7 @@ mhloop move.l #22,36(a1) ;sizeof(struct InputEvent) move.l a2,40(a1) - move.b mh_e(pc),d0 + move.b MH_E+MH_DATA(a5),d0 cmp.w #39,d7 bcs.w .notablet btst #MH_TABLET,d0 @@ -2007,85 +1959,78 @@ mhloop move.b #3,5(a2) ;ie_SubClass = IESUBCLASS_NEWTABLET clr.l (a0) ;ient_CallBack clr.l 4(a0) - clr.w 6(a2) ;ie_Code clr.l 8(a0) clr.w 12(a0) - ;IEQUALIFIER_MIDBUTTON=0x1000/IEQUALIFIER_RBUTTON=0x2000/IEQUALIFIER_LEFTBUTTON=0x4000 - move.l mh_buttonbits(pc),d1 - and.w #7,d1 - moveq #7,d0 - sub.w d1,d0 - lsl.w #8,d0 - lsl.w #4,d0 - move.w d0,8(a2) ;ie_Qualifier + clr.w 6(a2) ;ie_Code + bsr.w buttonstoqual - move.w mh_x(pc),12+2(a0) ;ient_TabletX + move.w MH_X+MH_DATA(a5),12+2(a0) ;ient_TabletX clr.w 16(a0) - move.w mh_y(pc),16+2(a0) ;ient_TabletY + move.w MH_Y++MH_DATA(a5),16+2(a0) ;ient_TabletY clr.w 20(a0) - move.w mh_maxx(pc),20+2(a0) ;ient_RangeX + move.w MH_MAXX+MH_DATA(a5),20+2(a0) ;ient_RangeX clr.w 24(a0) - move.w mh_maxy(pc),24+2(a0) ;ient_RangeY + move.w MH_MAXY+MH_DATA(a5),24+2(a0) ;ient_RangeY lea MH_IENTTAGS(a5),a1 move.l a1,28(a0) ;ient_TagList move.l #TABLETA_Pressure,(a1)+ - move.w mh_pressure(pc),d0 + move.w MH_PRESSURE+MH_DATA(a5),d0 ext.l d0 asl.l #8,d0 move.l d0,(a1)+ move.l #TABLETA_ButtonBits,(a1)+ - move.l mh_buttonbits(pc),(a1)+ + move.l MH_BUTTONBITS+MH_DATA(a5),(a1)+ moveq #0,d0 - move.w mh_resx(pc),d0 + move.w MH_RESX+MH_DATA(a5),d0 bmi.s .noresx move.l #TABLETA_ResolutionX,(a1)+ move.l d0,(a1)+ .noresx - move.w mh_resy(pc),d0 + move.w MH_RESY+MH_DATA(a5),d0 bmi.s .noresy move.l #TABLETA_ResolutionY,(a1)+ move.l d0,(a1)+ .noresy - move.w mh_maxz(pc),d0 + move.w MH_MAXZ+MH_DATA(a5),d0 bmi.s .noz move.l #TABLETA_RangeZ,(a1)+ move.l d0,(a1)+ - move.w mh_z(pc),d0 + move.w MH_Z+MH_DATA(a5),d0 move.l #TABLETA_TabletZ,(a1)+ move.l d0,(a1)+ .noz - move.w mh_maxax(pc),d0 + move.w MH_MAXAX+MH_DATA(a5),d0 bmi.s .noax move.l #TABLETA_AngleX,(a1)+ - move.w mh_ax(pc),d0 + move.w MH_AX+MH_DATA(a5),d0 ext.l d0 asl.l #8,d0 move.l d0,(a1)+ .noax - move.w mh_maxay(pc),d0 + move.w MH_MAXAY++MH_DATA(a5),d0 bmi.s .noay move.l #TABLETA_AngleY,(a1)+ - move.w mh_ay(pc),d0 + move.w MH_AY+MH_DATA(a5),d0 ext.l d0 asl.l #8,d0 move.l d0,(a1)+ .noay - move.w mh_maxaz(pc),d0 + move.w MH_MAXAZ++MH_DATA(a5),d0 bmi.s .noaz move.l #TABLETA_AngleZ,(a1)+ - move.w mh_az(pc),d0 + move.w MH_AZ+MH_DATA(a5),d0 ext.l d0 asl.l #8,d0 move.l d0,(a1)+ .noaz moveq #0,d0 - move.w mh_inproximity(pc),d0 + move.w MH_INPROXIMITY+MH_DATA(a5),d0 bmi.s .noproxi move.l #TABLETA_InProximity,(a1)+ move.l d0,(a1)+ @@ -2097,7 +2042,7 @@ mhloop ;create mouse button events if button state changed move.w #$68,d3 ;IECODE_LBUTTON->IECODE_RBUTTON->IECODE_MBUTTON moveq #1,d2 - move.l mh_buttonbits(pc),d4 + move.l MH_BUTTONBITS+MH_DATA(a5),d4 .nextbut move.l d4,d0 and.l d2,d0 @@ -2128,18 +2073,18 @@ mhloop .notablet - move.b mh_e(pc),d0 + move.b MH_E+MH_DATA(a5),d0 btst #MH_MOUSEHACK,d0 beq.w mhloop clr.l (a2) move.w #$0400,4(a2) ;IECLASS_POINTERPOS clr.w 6(a2) ;ie_Code - clr.w 8(a2) ;ie_Qualifier + bsr.w buttonstoqual move.l MH_FOO_INTBASE(a3),a0 - move.w mh_absx(pc),d0 + move.w MH_ABSX+MH_DATA(a5),d0 move.w 34+14(a0),d1 add.w d1,d1 sub.w d1,d0 @@ -2148,7 +2093,7 @@ mhloop .xn move.w d0,10(a2) - move.w mh_absy(pc),d0 + move.w MH_ABSY+MH_DATA(a5),d0 move.w 34+12(a0),d1 add.w d1,d1 sub.w d1,d0 @@ -2164,12 +2109,31 @@ mhloop mhend rts +buttonstoqual: + ;IEQUALIFIER_MIDBUTTON=0x1000/IEQUALIFIER_RBUTTON=0x2000/IEQUALIFIER_LEFTBUTTON=0x4000 + move.l MH_BUTTONBITS+MH_DATA(a5),d1 + moveq #0,d0 + btst #0,d1 + beq.s .btq1 + bset #14,d0 +.btq1: + btst #1,d1 + beq.s .btq2 + bset #13,d0 +.btq2: + btst #2,d1 + beq.s .btq3 + bset #12,d0 +.btq3: + move.w d0,8(a2) ;ie_Qualifier + rts + mousehackint: tst.l MH_IO(a1) beq.s .l1 tst.l MH_TM(a1) beq.s .l1 - move.w mh_cnt(pc),d0 + move.w MH_CNT+MH_DATA(a1),d0 cmp.w MH_FOO+MH_FOO_CNT(a1),d0 beq.s .l2 move.w d0,MH_FOO+MH_FOO_CNT(a1) @@ -2611,7 +2575,11 @@ chook: movem.l (sp)+,d0-d1/a0 rts - +getrtbase: + lea start-8-4(pc),a0 + and.l #$FFFF,d0 + add.l d0,a0 + rts inp_dev: dc.b 'input.device',0 tim_dev: dc.b 'timer.device',0 @@ -2625,6 +2593,7 @@ clip_dev: dc.b 'clipboard.device',0 pointer_prefs: dc.b 'RAM:Env/Sys/Pointer.prefs',0 clname: dc.b 'UAE clipboard sharing',0 mhname: dc.b 'UAE mouse driver',0 +kaname: dc.b 'UAE heart beat',0 exter_name: dc.b 'UAE filesystem',0 fstaskname: dc.b 'UAE fs automounter',0 fsprocname: dc.b 'UAE fs automount process',0 diff --git a/src/filesys.cpp b/src/filesys.cpp index 37e87dd1..7eb38ece 100644 --- a/src/filesys.cpp +++ b/src/filesys.cpp @@ -29,8 +29,8 @@ #include "options.h" #include "uae.h" #include "memory.h" -#include "newcpu.h" #include "custom.h" +#include "newcpu.h" #include "filesys.h" #include "autoconf.h" #include "traps.h" @@ -44,28 +44,69 @@ #include "uaeresource.h" #include "inputdevice.h" #include "clipboard.h" +#ifdef RETROPLATFORM +#include "rp.h" +#endif #define TRACING_ENABLED 0 +int log_filesys = 0; + #if TRACING_ENABLED -#define TRACE(x) do { write_log x; } while(0) -#define DUMPLOCK(u,x) dumplock(u,x) -#if TRACING_ENABLED > 1 -#define TRACE2(x) do { write_log x; } while(0) +#if 0 +#define TRACE(x) if (log_filesys > 0 && (unit->volflags & MYVOLUMEINFO_CDFS)) { write_log x; } #else -#define TRACE2(x) +#define TRACE(x) if (log_filesys > 0) { write_log x; } #endif +#define TRACEI(x) if (log_filesys > 0) { write_log x; } +#define TRACE2(x) if (log_filesys >= 2) { write_log x; } +#define TRACE3(x) if (log_filesys >= 3) { write_log x; } +#define DUMPLOCK(u,x) dumplock(u,x) #else #define TRACE(x) #define DUMPLOCK(u,x) +#define TRACEI(x) #define TRACE2(x) +#define TRACE3(x) #endif +#define RTAREA_HEARTBEAT 0xFFFC + int bootrom_header, bootrom_items; static uae_u32 dlg (uae_u32 a) { return (dbg (a + 0) << 24) | (dbg (a + 1) << 16) | (dbg (a + 2) << 8) | (dbg (a + 3) << 0); } +static void aino_test (a_inode *aino) +{ +#ifdef AINO_DEBUG + a_inode *aino2 = aino, *aino3; + for (;;) { + if (!aino || !aino->next) + return; + if ((aino->checksum1 ^ aino->checksum2) != 0xaaaa5555) { + write_log (_T("PANIC: corrupted or freed but used aino detected!"), aino); + } + aino3 = aino; + aino = aino->next; + if (aino->prev != aino3) { + write_log (_T("PANIC: corrupted aino linking!\n")); + break; + } + if (aino == aino2) break; + } +#endif +} + +static void aino_test_init (a_inode *aino) +{ +#ifdef AINO_DEBUG + aino->checksum1 = (uae_u32)aino; + aino->checksum2 = aino->checksum1 ^ 0xaaaa5555; +#endif +} + + uaecptr filesys_initcode; static uae_u32 fsdevname, fshandlername, filesys_configdev; static int filesys_in_interrupt; @@ -77,7 +118,11 @@ static int automountunit = -1; #define DEVNAMES_PER_HDF 32 +#define UNIT_FILESYSTEM 0 +#define UNIT_CDFS 1 + typedef struct { + int unit_type; bool open; TCHAR *devname; /* device name, e.g. UAE0: */ uaecptr devname_amiga; @@ -195,6 +240,12 @@ static void close_filesys_unit (UnitInfo *uip) uip->open = 0; } +static uaedev_config_info *getuci (struct uaedev_config_info *uci, int nr) +{ + return &uci[nr]; +} + + static UnitInfo *getuip(struct uae_prefs *p, int index) { if (index < 0) @@ -255,7 +306,11 @@ int get_filesys_unitconfig (struct uae_prefs *p, int index, struct mountedinfo * } } mi->size = ui->hf.virtsize; - mi->nrcyls = (int)(uci->sectors * uci->surfaces ? (ui->hf.virtsize / uci->blocksize) / (uci->sectors * uci->surfaces) : 0); + if (uci->cyls) { + mi->nrcyls = uci->cyls; + } else { + mi->nrcyls = (int)(uci->sectors * uci->surfaces ? (ui->hf.virtsize / uci->blocksize) / (uci->sectors * uci->surfaces) : 0); + } if (!uci->ishdf) return FILESYS_VIRTUAL; if (uci->reserved == 0 && uci->sectors == 0 && uci->surfaces == 0) { @@ -293,6 +348,11 @@ static void striplength (TCHAR *s, int len) } static void fixcharset (TCHAR *s) { + char tmp[MAX_DPATH]; + if (!s) + return; + ua_fs_copy (tmp, MAX_DPATH, s, '_'); + au_fs_copy (s, strlen (tmp) + 1, tmp); } TCHAR *validatevolumename (TCHAR *s) @@ -392,10 +452,10 @@ static int set_filesys_volume(const TCHAR *rootdir, int *flags, bool *readonly, } static int set_filesys_unit_1 (int nr, - TCHAR *devname, TCHAR *volname, const TCHAR *rootdir, bool readonly, - int secspertrack, int surfaces, int reserved, + const TCHAR *devname, const TCHAR *volname, const TCHAR *rootdir, bool readonly, + int cyls, int secspertrack, int surfaces, int reserved, int blocksize, int bootpri, bool donotmount, bool autoboot, - TCHAR *filesysdir, int hdc, int flags) + const TCHAR *filesysdir, int hdc, int flags) { UnitInfo *ui; int i; @@ -436,6 +496,7 @@ static int set_filesys_unit_1 (int nr, ui->volname = filesys_createvolname (volname, rootdir, _T("harddrive")); ui->volflags = flags; } else { + ui->unit_type = UNIT_FILESYSTEM; ui->hf.secspertrack = secspertrack; ui->hf.surfaces = surfaces; ui->hf.reservedblocks = reserved; @@ -468,9 +529,13 @@ static int set_filesys_unit_1 (int nr, write_log(_T("Hardfile %s too small\n"), ui->hf.device_name); goto err; } - ui->hf.nrcyls = (int)(ui->hf.secspertrack * ui->hf.surfaces ? (ui->hf.virtsize / ui->hf.blocksize) / (ui->hf.secspertrack * ui->hf.surfaces) : 0); + if (cyls) { + ui->hf.nrcyls = cyls; + } else { + ui->hf.nrcyls = (int)(ui->hf.secspertrack * ui->hf.surfaces ? (ui->hf.virtsize / ui->hf.blocksize) / (ui->hf.secspertrack * ui->hf.surfaces) : 0); + } } - } + } ui->self = 0; ui->reset_state = FS_STARTUP; ui->wasisempty = emptydrive; @@ -501,23 +566,23 @@ err: } static int set_filesys_unit (int nr, - TCHAR *devname, TCHAR *volname, const TCHAR *rootdir, bool readonly, - int secspertrack, int surfaces, int reserved, + const TCHAR *devname, const TCHAR *volname, const TCHAR *rootdir, bool readonly, + int cyls, int secspertrack, int surfaces, int reserved, int blocksize, int bootpri, bool donotmount, bool autoboot, - TCHAR *filesysdir, int hdc, int flags) + const TCHAR *filesysdir, int hdc, int flags) { int ret; ret = set_filesys_unit_1 (nr, devname, volname, rootdir, readonly, - secspertrack, surfaces, reserved, blocksize, bootpri, donotmount, autoboot, + cyls, secspertrack, surfaces, reserved, blocksize, bootpri, donotmount, autoboot, filesysdir, hdc, flags); return ret; } -static int add_filesys_unit (TCHAR *devname, TCHAR *volname, const TCHAR *rootdir, bool readonly, - int secspertrack, int surfaces, int reserved, +static int add_filesys_unit (const TCHAR *devname, const TCHAR *volname, const TCHAR *rootdir, bool readonly, + int cyls, int secspertrack, int surfaces, int reserved, int blocksize, int bootpri, bool donotmount, bool autoboot, - TCHAR *filesysdir, int hdc, int flags) + const TCHAR *filesysdir, int hdc, int flags) { int ret; @@ -525,8 +590,14 @@ static int add_filesys_unit (TCHAR *devname, TCHAR *volname, const TCHAR *rootdi return -1; ret = set_filesys_unit_1 (-1, devname, volname, rootdir, readonly, - secspertrack, surfaces, reserved, blocksize, + cyls, secspertrack, surfaces, reserved, blocksize, bootpri, donotmount, autoboot, filesysdir, hdc, flags); +#ifdef RETROPLATFORM + if (ret >= 0) { + rp_hd_device_enable (ret, true); + rp_harddrive_image_change (ret, readonly, rootdir); + } +#endif return ret; } @@ -536,7 +607,7 @@ int kill_filesys_unitconfig (struct uae_prefs *p, int nr) if (nr < 0) return 0; - uci = &p->mountconfig[nr]; + uci = getuci (p->mountconfig, nr); hardfile_do_disk_change (uci, 0); if (uci->configoffset >= 0 && uci->controller == 0) filesys_media_change (uci->rootdir, 0, uci); @@ -553,8 +624,8 @@ int move_filesys_unitconfig (struct uae_prefs *p, int nr, int to) { struct uaedev_config_info *uci1, *uci2, tmpuci; - uci1 = &p->mountconfig[nr]; - uci2 = &p->mountconfig[to]; + uci1 = getuci (p->mountconfig, nr); + uci2 = getuci (p->mountconfig, to); if (nr == to) return 0; memcpy (&tmpuci, uci1, sizeof (struct uaedev_config_info)); @@ -563,24 +634,31 @@ int move_filesys_unitconfig (struct uae_prefs *p, int nr, int to) return 1; } +static void allocuci (struct uae_prefs *p, int nr, int idx) +{ + struct uaedev_config_info *uci = &p->mountconfig[nr]; + if (idx >= 0) { + UnitInfo *ui; + uci->configoffset = idx; + ui = &mountinfo.ui[idx]; + ui->configureddrive = 1; + } else { + uci->configoffset = -1; + } +} + static void initialize_mountinfo(void) { int nr; - struct uaedev_config_info *uci; UnitInfo *uip = &mountinfo.ui[0]; for (nr = 0; nr < currprefs.mountitems; nr++) { - uci = &currprefs.mountconfig[nr]; + struct uaedev_config_info *uci = &currprefs.mountconfig[nr]; if (uci->controller == HD_CONTROLLER_UAE) { int idx = set_filesys_unit_1 (-1, uci->devname, uci->ishdf ? NULL : uci->volname, uci->rootdir, - uci->readonly, uci->sectors, uci->surfaces, uci->reserved, + uci->readonly, uci->cyls, uci->sectors, uci->surfaces, uci->reserved, uci->blocksize, uci->bootpri, uci->donotmount, uci->autoboot, uci->filesys, 0, MYVOLUMEINFO_REUSABLE); - if (idx >= 0) { - UnitInfo *ui; - uci->configoffset = idx; - ui = &mountinfo.ui[idx]; - ui->configureddrive = 1; - } + allocuci (&currprefs, nr, idx); } } } @@ -594,7 +672,7 @@ int sprintf_filesys_unit (TCHAR *buffer, int num) uip[num].rootdir, uip[num].readonly ? "ro" : ""); else _stprintf (buffer, _T("(DH%d:) Hardfile, \"%s\", size %d Mbytes"), num, - uip[num].rootdir, uip[num].hf.virtsize / (1024 * 1024)); + uip[num].rootdir, (int)(uip[num].hf.virtsize / (1024 * 1024))); return 0; } @@ -638,7 +716,7 @@ struct hardfiledata *get_hardfile_data (int nr) #define dp64_Arg5 56 /* result codes */ -#define DOS_TRUE ((unsigned long)-1L) +#define DOS_TRUE ((uae_u32)-1L) #define DOS_FALSE (0L) #define MAXFILESIZE32 (0x7fffffff) @@ -709,7 +787,6 @@ struct hardfiledata *get_hardfile_data (int nr) #define DISK_TYPE_DOS 0x444f5300 /* DOS\0 */ #define DISK_TYPE_DOS_FFS 0x444f5301 /* DOS\1 */ #define CDFS_DOSTYPE 0x43440000 /* CDxx */ -//#define CDFS_DOSTYPE (USE_CDFS == 2 ? 0x43444653 : 0x43445644) typedef struct { uae_u32 uniq; @@ -863,18 +940,20 @@ static int flush_cache(Unit *unit, int num); static TCHAR *char1 (uaecptr addr) { - static TCHAR buf[1024]; + static uae_char buf[1024]; + static TCHAR bufx[1024]; unsigned int i = 0; do { buf[i] = get_byte(addr); addr++; } while (buf[i++] && i < sizeof(buf)); - return buf; + return au_fs_copy (bufx, sizeof (bufx) / sizeof (TCHAR), buf); } static TCHAR *bstr1 (uaecptr addr) { - static TCHAR buf[257]; + static TCHAR bufx[257]; + static uae_char buf[257]; int i; int n = get_byte(addr); addr++; @@ -882,36 +961,85 @@ static TCHAR *bstr1 (uaecptr addr) for (i = 0; i < n; i++, addr++) buf[i] = get_byte(addr); buf[i] = 0; - return buf; + return au_fs_copy (bufx, sizeof (bufx) / sizeof (TCHAR), buf); } static TCHAR *bstr (Unit *unit, uaecptr addr) { int i; int n = get_byte(addr); + uae_char buf[257]; addr++; for (i = 0; i < n; i++, addr++) - unit->tmpbuf3[i] = get_byte(addr); - unit->tmpbuf3[i] = 0; + buf[i] = get_byte (addr); + buf[i] = 0; + au_fs_copy (unit->tmpbuf3, sizeof (unit->tmpbuf3) / sizeof (TCHAR), buf); return unit->tmpbuf3; } static TCHAR *bstr_cut (Unit *unit, uaecptr addr) { TCHAR *p = unit->tmpbuf3; - int i, colon_seen = 0; + int i, colon_seen = 0, off; int n = get_byte (addr); + uae_char buf[257]; + off = 0; addr++; for (i = 0; i < n; i++, addr++) { uae_u8 c = get_byte(addr); - unit->tmpbuf3[i] = c; + buf[i] = c; if (c == '/' || (c == ':' && colon_seen++ == 0)) - p = unit->tmpbuf3 + i + 1; + off = i + 1; } - unit->tmpbuf3[i] = 0; - return p; + buf[i] = 0; + au_fs_copy (unit->tmpbuf3, sizeof (unit->tmpbuf3) / sizeof (TCHAR), buf); + return &p[off]; +} + +/* convert time_t to/from AmigaDOS time */ +static const uae_s64 msecs_per_day = 24 * 60 * 60 * 1000; +static const uae_s64 diff = ((8 * 365 + 2) * (24 * 60 * 60)) * (uae_u64)1000; + +void timeval_to_amiga (struct mytimeval *tv, int *days, int *mins, int *ticks) +{ + /* tv.tv_sec is secs since 1-1-1970 */ + /* days since 1-1-1978 */ + /* mins since midnight */ + /* ticks past minute @ 50Hz */ + + uae_s64 t = tv->tv_sec * 1000 + tv->tv_usec / 1000; + t -= diff; + if (t < 0) + t = 0; + *days = t / msecs_per_day; + t -= *days * msecs_per_day; + *mins = t / (60 * 1000); + t -= *mins * (60 * 1000); + *ticks = t / (1000 / 50); +} + +void amiga_to_timeval (struct mytimeval *tv, int days, int mins, int ticks) +{ + uae_s64 t; + + if (days < 0) + days = 0; + if (days > 9900 * 365) + days = 9900 * 365; // in future far enough? + if (mins < 0 || mins >= 24 * 60) + mins = 0; + if (ticks < 0 || ticks >= 60 * 50) + ticks = 0; + + t = ticks * 20; + t += mins * (60 * 1000); + t += ((uae_u64)days) * msecs_per_day; + t += diff; + + tv->tv_sec = t / 1000; + tv->tv_usec = (t % 1000) * 1000; } static Unit *units = 0; @@ -1021,26 +1149,26 @@ static uae_u32 fs_fsize (struct fs_filehandle *fsf) return (uae_u32)fs_fsize64 (fsf); } -static void - get_time (time_t t, long* days, long* mins, long* ticks); - -static void set_volume_name (Unit *unit, uae_u32 ctime) +static void set_volume_name (Unit *unit, struct mytimeval *tv) { int namelen; int i; + char *s; - namelen = strlen (unit->ui.volname); + s = ua_fs (unit->ui.volname, -1); + namelen = strlen (s); put_byte (unit->volume + 44, namelen); for (i = 0; i < namelen; i++) - put_byte (unit->volume + 45 + i, unit->ui.volname[i]); + put_byte (unit->volume + 45 + i, s[i]); put_byte (unit->volume + 45 + namelen, 0); - if (ctime) { - long days, mins, ticks; - get_time (ctime, &days, &mins, &ticks); + if (tv && (tv->tv_sec || tv->tv_usec)) { + int days, mins, ticks; + timeval_to_amiga (tv, &days, &mins, &ticks); put_long (unit->volume + 16, days); put_long (unit->volume + 20, mins); put_long (unit->volume + 24, ticks); } + xfree (s); unit->rootnode.aname = unit->ui.volname; unit->rootnode.nname = unit->ui.rootdir; unit->rootnode.mountcount = unit->mountcount; @@ -1048,6 +1176,8 @@ static void set_volume_name (Unit *unit, uae_u32 ctime) static int filesys_isvolume(Unit *unit) { + if (!unit->volume) + return 0; return get_byte (unit->volume + 44) || unit->ui.unknown_media; } @@ -1119,6 +1249,32 @@ int filesys_eject (int nr) return 1; } +static uae_u32 heartbeat; +static int heartbeat_count; +static int heartbeat_task; + +// This uses filesystem process to reduce resource usage +void setsystime (void) +{ + if (!currprefs.tod_hack) + return; + heartbeat = get_long (rtarea_base + RTAREA_HEARTBEAT); + heartbeat_task = 1; + heartbeat_count = 10; +} + +static void setsystime_vblank (void) +{ + Unit *u; + for (u = units; u; u = u->next) { + if (is_virtual (u->unit) && filesys_isvolume (u)) { + put_byte (u->volume + 173 - 32, 1); + uae_Signal (get_long (u->volume + 176 - 32), 1 << 13); + break; + } + } +} + int filesys_insert (int nr, TCHAR *volume, const TCHAR *rootdir, bool readonly, int flags) { UnitInfo *ui; @@ -1126,6 +1282,9 @@ int filesys_insert (int nr, TCHAR *volume, const TCHAR *rootdir, bool readonly, if (!mountertask) return 0; + + write_log (_T("filesys_insert(%d,'%s','%s','%d','%d)\n"), nr, volume ? volume : _T(""), rootdir, readonly, flags); + if (nr < 0) { for (u = units; u; u = u->next) { if (is_virtual (u->unit)) { @@ -1167,6 +1326,8 @@ int filesys_insert (int nr, TCHAR *volume, const TCHAR *rootdir, bool readonly, u->mount_readonly = readonly; u->mount_flags = flags; + write_log (_T("filesys_insert %d done!\n"), nr); + put_byte (u->volume + 172 - 32, -3); // wait for insert uae_Signal (get_long (u->volume + 176 - 32), 1 << 13); @@ -1198,6 +1359,12 @@ static uae_u32 filesys_media_change_reply (TrapContext *ctx, int mode) zfile_fclose_archive (u->zarchive); u->zarchive = NULL; u->ui.unknown_media = false; +#ifdef RETROPLATFORM + if (ui->unit_type == UNIT_CDFS) + rp_cd_image_change (ui->cddevno, NULL); + else + rp_harddrive_image_change (nr, false, NULL); +#endif } else { u->mount_changed = 0; } @@ -1205,11 +1372,10 @@ static uae_u32 filesys_media_change_reply (TrapContext *ctx, int mode) } else if (u->mount_changed > 0) { if (mode == 0) { // insert - uae_u32 ctime = 0; + struct mytimeval ctime = { 0 }; bool emptydrive = false; - struct uaedev_config_info *uci; + struct uaedev_config_info *uci = NULL; clear_exkeys (u); - uci = &currprefs.mountconfig[nr]; xfree (u->ui.rootdir); ui->rootdir = u->ui.rootdir = my_strdup (u->mount_rootdir); flush_cache(u, -1); @@ -1221,17 +1387,26 @@ static uae_u32 filesys_media_change_reply (TrapContext *ctx, int mode) return 0; xfree (u->ui.volname); ui->volname = u->ui.volname = filesys_createvolname (u->mount_volume, u->mount_rootdir, _T("removable")); +#ifdef RETROPLATFORM + rp_harddrive_image_change (nr, u->mount_readonly, u->mount_rootdir); +#endif + uci = getuci (currprefs.mountconfig, nr); if (u->ui.unknown_media) { write_log (_T("FILESYS: inserted unreadable volume NR=%d RO=%d\n"), nr, u->mount_readonly); } else { write_log (_T("FILESYS: inserted volume NR=%d RO=%d '%s' ('%s')\n"), nr, u->mount_readonly, ui->volname, u->mount_rootdir); - set_volume_name (u, ctime); + set_volume_name (u, &ctime); if (u->mount_flags >= 0) ui->volflags = u->volflags = u->ui.volflags = u->mount_flags; - _tcscpy (uci->volname, ui->volname); - _tcscpy (uci->rootdir, u->mount_rootdir); - if (u->mount_flags >= 0) - uci->readonly = ui->readonly = u->ui.readonly = u->mount_readonly; + if (uci != NULL) { + _tcscpy (uci->volname, ui->volname); + _tcscpy (uci->rootdir, u->mount_rootdir); + } + if (u->mount_flags >= 0) { + ui->readonly = u->ui.readonly = u->mount_readonly; + if (uci != NULL) + uci->readonly = u->mount_readonly; + } put_byte (u->volume + 44, 0); put_byte (u->volume + 172 - 32, 1); } @@ -1262,6 +1437,9 @@ int filesys_media_change (const TCHAR *rootdir, int inserted, struct uaedev_conf return 0; if (automountunit >= 0) return -1; + + write_log (_T("filesys_media_change('%s',%d,%p)\n"), rootdir, inserted, uci); + nr = -1; for (u = units; u; u = u->next) { if (is_virtual (u->unit)) { @@ -1330,7 +1508,7 @@ int filesys_media_change (const TCHAR *rootdir, int inserted, struct uaedev_conf _tcscpy (devname, uci->devname); else _stprintf (devname, _T("RDH%d"), nr_units()); - nr = add_filesys_unit (devname, volptr, rootdir, 0, 0, 0, 0, 0, 0, 0, 1, NULL, 0, MYVOLUMEINFO_REUSABLE); + nr = add_filesys_unit (devname, volptr, rootdir, 0, 0, 0, 0, 0, 0, 0, 0, 1, NULL, 0, MYVOLUMEINFO_REUSABLE); if (nr < 0) return 0; if (inserted > 1) @@ -1362,11 +1540,16 @@ static int fsdb_cando (Unit *unit) { if (unit->volflags & MYVOLUMEINFO_ARCHIVE) return 1; - return 0; + return 1; +} + +static void prepare_for_open (TCHAR *name) +{ } static void de_recycle_aino (Unit *unit, a_inode *aino) { + aino_test (aino); if (aino->next == 0 || aino == &unit->rootnode) return; aino->next->prev = aino->prev; @@ -1394,7 +1577,7 @@ static void dispose_aino (Unit *unit, a_inode **aip, a_inode *aino) static void free_all_ainos (Unit *u, a_inode *parent) { a_inode *a; - while (a = parent->child) { + while ((a = parent->child)) { free_all_ainos (u, a); dispose_aino (u, &parent->child, a); } @@ -1414,9 +1597,11 @@ static int flush_cache(Unit *unit, int num) a_inode **aip; aip = &parent->child; + aino_test (parent); if (parent && !parent->locked_children) { for (;;) { a_inode *aino = *aip; + aino_test (aino); if (aino == 0) break; /* Not recyclable if next == 0 (i.e., not chained into @@ -1458,23 +1643,34 @@ static int flush_cache(Unit *unit, int num) static void recycle_aino (Unit *unit, a_inode *new_aino) { + aino_test (new_aino); if (new_aino->dir || new_aino->shlock > 0 || new_aino->elock || new_aino == &unit->rootnode) /* Still in use */ return; - TRACE2((_T("Recycling; cache size %d, total_locked %d\n"), + TRACE3((_T("Recycling; cache size %d, total_locked %d\n"), unit->aino_cache_size, unit->total_locked_ainos)); if (unit->aino_cache_size > 5000 + unit->total_locked_ainos) { /* Reap a few. */ flush_cache (unit, 50); +#if 0 + { + TCHAR buffer[40]; + _stprintf (buffer, "%d ainos reaped.\n", i); + TRACE ((buffer)); + } +#endif } + aino_test (new_aino); /* Chain it into circular list. */ new_aino->next = unit->rootnode.next; new_aino->prev = &unit->rootnode; new_aino->prev->next = new_aino; new_aino->next->prev = new_aino; + aino_test (new_aino->next); + aino_test (new_aino->prev); unit->aino_cache_size++; } @@ -1512,6 +1708,8 @@ static void update_child_names (Unit *unit, a_inode *a, a_inode *parent) static void move_aino_children (Unit *unit, a_inode *from, a_inode *to) { + aino_test (from); + aino_test (to); to->child = from->child; from->child = 0; update_child_names (unit, to->child, to); @@ -1523,6 +1721,7 @@ static void delete_aino (Unit *unit, a_inode *aino) TRACE((_T("deleting aino %x\n"), aino->uniq)); + aino_test (aino); aino->dirty = 1; aino->deleted = 1; de_recycle_aino (unit, aino); @@ -1603,6 +1802,7 @@ static a_inode *lookup_aino (Unit *unit, uae_u32 uniq) unit->nr_cache_hits++; unit->nr_cache_lookups++; unit->aino_hash[hash] = a; + aino_test (a); return a; } @@ -1640,6 +1840,8 @@ static TCHAR *get_nname (Unit *unit, a_inode *base, TCHAR *rel, TCHAR **modified return NULL; } + aino_test (base); + /* If we have a mapping of some other aname to "rel", we must pretend * it does not exist. * This can happen for example if an Amiga program creates a @@ -1652,7 +1854,7 @@ static TCHAR *get_nname (Unit *unit, a_inode *base, TCHAR *rel, TCHAR **modified return 0; /* A file called "." (or whatever else is invalid on this filesystem) * does not exist, as far as the Amiga side is concerned. */ - if (fsdb_name_invalid (rel)) + if (fsdb_name_invalid_dir (rel)) return 0; /* See if we have a file that has the same name as the aname we are @@ -1671,16 +1873,28 @@ static TCHAR *create_nname (Unit *unit, a_inode *base, TCHAR *rel) { TCHAR *p; + aino_test (base); /* We are trying to create a file called REL. */ /* If the name is used otherwise in the directory (or globally), we * need a new unique nname. */ if (fsdb_name_invalid (rel) || fsdb_used_as_nname (base, rel)) { +#if 0 +oh_dear: +#endif p = fsdb_create_unique_nname (base, rel); return p; } p = build_nname (base->nname, rel); +#if 0 + /* Delete this code once we know everything works. */ + if (access (p, R_OK) >= 0 || errno != ENOENT) { + write_log (_T("Filesystem in trouble... please report.\n")); + xfree (p); + goto oh_dear; + } +#endif return p; } @@ -1751,6 +1965,9 @@ static void init_child_aino (Unit *unit, a_inode *base, a_inode *aino) base->locked_children++; } init_child_aino_tree(unit, base, aino); + + aino_test_init (aino); + aino_test (aino); } static a_inode *new_child_aino (Unit *unit, a_inode *base, TCHAR *rel) @@ -1825,6 +2042,9 @@ static a_inode *lookup_child_aino (Unit *unit, a_inode *base, TCHAR *rel, int *e a_inode *c = base->child; int l0 = _tcslen (rel); + aino_test (base); + aino_test (c); + if (base->dir == 0) { *err = ERROR_OBJECT_WRONG_TYPE; return 0; @@ -1852,6 +2072,9 @@ static a_inode *lookup_child_aino_for_exnext (Unit *unit, a_inode *base, TCHAR * int l0 = _tcslen (rel); int isvirtual = unit->volflags & MYVOLUMEINFO_ARCHIVE; + aino_test (base); + aino_test (c); + *err = 0; while (c != 0) { int l1 = _tcslen (c->nname); @@ -1900,6 +2123,8 @@ static a_inode *get_aino (Unit *unit, a_inode *base, const TCHAR *rel, int *err) a_inode *curr; int i; + aino_test (base); + *err = 0; TRACE((_T("get_path(%s,%s)\n"), base->aname, rel)); @@ -1965,12 +2190,14 @@ static Notify *new_notify (Unit *unit, TCHAR *name) return n; } +#if 0 static void free_notify_item(Notify *n) { xfree(n->fullname); xfree(n->partname); xfree(n); } +#endif static void free_notify (Unit *unit, int hash, Notify *n) { @@ -2052,6 +2279,7 @@ static Unit *startup_create_unit (UnitInfo *uinfo, int num) unit->rootnode.comment = 0; unit->rootnode.has_dbentry = 0; unit->rootnode.volflags = uinfo->volflags; + aino_test_init (&unit->rootnode); unit->aino_cache_size = 0; for (i = 0; i < MAX_AINO_HASH; i++) unit->aino_hash[i] = 0; @@ -2086,28 +2314,29 @@ static void filesys_start_thread (UnitInfo *ui, int nr) static uae_u32 REGPARAM2 startup_handler (TrapContext *context) { - /* Just got the startup packet. It's in A4. DosBase is in A2, + /* Just got the startup packet. It's in D3. DosBase is in A2, * our allocated volume structure is in A3, A5 is a pointer to * our port. */ uaecptr rootnode = get_long (m68k_areg (regs, 2) + 34); uaecptr dos_info = get_long (rootnode + 24) << 2; uaecptr pkt = m68k_dreg (regs, 3); + uaecptr arg1 = get_long (pkt + dp_Arg1); uaecptr arg2 = get_long (pkt + dp_Arg2); + uaecptr arg3 = get_long (pkt + dp_Arg3); uaecptr devnode; int nr; - TCHAR *devname = bstr1 (get_long (pkt + dp_Arg1) << 2); - TCHAR *s; Unit *unit; UnitInfo *uinfo; int late = 0; int ed, ef; uae_u64 uniq = 0; - uae_u32 cdays, ctime = 0; + uae_u32 cdays; + struct mytimeval ctime = { 0 }; - /* find UnitInfo with correct device name */ - s = _tcschr (devname, ':'); - if (s) - *s = '\0'; + // 1.3: + // dp_Arg1 contains crap (Should be name of device) + // dp_Arg2 = works as documented + // dp_Arg3 = NULL (!?). (Should be DeviceNode) for (nr = 0; nr < MAX_FILESYSTEM_UNITS; nr++) { /* Hardfile volume name? */ @@ -2121,18 +2350,20 @@ static uae_u32 REGPARAM2 startup_handler (TrapContext *context) } if (nr == MAX_FILESYSTEM_UNITS) { - write_log (_T("Failed attempt to mount device '%s'\n"), devname); + write_log (_T("Attempt to mount unknown filesystem device\n")); put_long (pkt + dp_Res1, DOS_FALSE); put_long (pkt + dp_Res2, ERROR_DEVICE_NOT_MOUNTED); return 0; } uinfo = mountinfo.ui + nr; + //devnode = arg3 << 2; + devnode = uinfo->devicenode; cdays = 3800 + nr; ed = my_existsdir (uinfo->rootdir); ef = my_existsfile (uinfo->rootdir); if (!uinfo->wasisempty && !ef && !ed) { - write_log (_T("Failed attempt to mount device '%s'\n"), devname); + write_log (_T("Failed attempt to mount device '%s' (%s)\n"), uinfo->devname, uinfo->rootdir); put_long (pkt + dp_Res1, DOS_FALSE); put_long (pkt + dp_Res2, ERROR_DEVICE_NOT_MOUNTED); return 0; @@ -2152,7 +2383,6 @@ static uae_u32 REGPARAM2 startup_handler (TrapContext *context) unit->ui.volname, unit->volflags, uinfo->wasisempty, ed, ef, unit->ui.rootdir); /* fill in our process in the device node */ - devnode = get_long (pkt + dp_Arg3) << 2; put_long (devnode + 8, unit->port); unit->dosbase = m68k_areg (regs, 2); @@ -2179,9 +2409,11 @@ static uae_u32 REGPARAM2 startup_handler (TrapContext *context) put_byte (unit->volume + 44, 0); if (!uinfo->wasisempty && !uinfo->unknown_media) { + int isvirtual = unit->volflags & (MYVOLUMEINFO_ARCHIVE); /* Set volume if non-empty */ - set_volume_name (unit, ctime); - fsdb_clean_dir (&unit->rootnode); + set_volume_name (unit, &ctime); + if (!isvirtual) + fsdb_clean_dir (&unit->rootnode); } put_long (unit->volume + 8, unit->port); @@ -2199,17 +2431,22 @@ static void int ret, err = ERROR_NO_FREE_STORE; int blocksize, nr; uae_u32 dostype; + bool fs = false, media = false; - blocksize = 1204; + blocksize = 512; /* not FFS because it is not understood by WB1.x C:Info */ dostype = DISK_TYPE_DOS; nr = unit->unit; if (unit->volflags & MYVOLUMEINFO_ARCHIVE) { ret = zfile_fs_usage_archive (unit->ui.rootdir, 0, &fsu); + fs = true; + media = filesys_isvolume (unit) != 0; } else { ret = get_fs_usage (unit->ui.rootdir, 0, &fsu); if (ret) err = dos_errno (); + fs = true; + media = filesys_isvolume (unit) != 0; } if (ret != 0) { PUT_PCK_RES1 (packet, DOS_FALSE); @@ -2221,23 +2458,41 @@ static void put_long (info + 4, nr); /* unit number */ put_long (info + 8, unit->ui.readonly || unit->ui.locked ? 80 : 82); /* state */ put_long (info + 20, blocksize); /* bytesperblock */ - if (disk_info && unit->ui.unknown_media) { + put_long (info + 32, 0); /* inuse */ + if (unit->ui.unknown_media) { + if (!disk_info) { + PUT_PCK_RES1 (packet, DOS_FALSE); + PUT_PCK_RES2 (packet, ERROR_NOT_A_DOS_DISK); + return; + } put_long (info + 12, 0); put_long (info + 16, 0); put_long (info + 24, ('B' << 24) | ('A' << 16) | ('D' << 8) | (0 << 0)); /* ID_UNREADABLE_DISK */ put_long (info + 28, 0); - } else if (disk_info && !filesys_isvolume (unit)) { + } else if (!media) { + if (!disk_info) { + PUT_PCK_RES1 (packet, DOS_FALSE); + PUT_PCK_RES2 (packet, ERROR_NO_DISK); + return; + } put_long (info + 12, 0); put_long (info + 16, 0); put_long (info + 24, -1); /* ID_NO_DISK_PRESENT */ put_long (info + 28, 0); } else { + if (fs && currprefs.filesys_limit) { + if (fsu.fsu_blocks > (uae_u64)currprefs.filesys_limit * 1024 / blocksize) { + uae_u32 oldblocks = fsu.fsu_blocks; + fsu.fsu_blocks = (uae_u32)((uae_u64)currprefs.filesys_limit * 1024 / blocksize); + fsu.fsu_bavail = (uae_u32)((uae_u64)fsu.fsu_bavail * fsu.fsu_blocks / oldblocks); + } + } put_long (info + 12, fsu.fsu_blocks ); /* numblocks */ put_long (info + 16, fsu.fsu_blocks - fsu.fsu_bavail); /* inuse */ put_long (info + 24, dostype); /* disk type */ put_long (info + 28, unit->volume >> 2); /* volume node */ + put_long (info + 32, (get_long (unit->volume + 28) || unit->keys) ? -1 : 0); /* inuse */ } - put_long (info + 32, 0); /* inuse */ PUT_PCK_RES1 (packet, DOS_TRUE); } @@ -2309,6 +2564,7 @@ static Key *new_key (Unit *unit) return k; } +#if TRACING_ENABLED static void dumplock (Unit *unit, uaecptr lock) { @@ -2330,6 +2586,7 @@ static void } TRACE((_T(" }\n"))); } +#endif static a_inode *find_aino (Unit *unit, uaecptr lock, const TCHAR *name, int *err) { @@ -2351,6 +2608,7 @@ static a_inode *find_aino (Unit *unit, uaecptr lock, const TCHAR *name, int *err if (a) { TRACE((_T("aino=\"%s\"\n"), a->nname)); } + aino_test (a); return a; } @@ -2641,50 +2899,6 @@ static void action_dup_lock_2 (unit, packet, k->aino->uniq); } -/* convert time_t to/from AmigaDOS time */ -static const int secs_per_day = 24 * 60 * 60; -static const int diff = (8 * 365 + 2) * (24 * 60 * 60); - -static void - get_time (time_t t, long* days, long* mins, long* ticks) -{ - /* time_t is secs since 1-1-1970 */ - /* days since 1-1-1978 */ - /* mins since midnight */ - /* ticks past minute @ 50Hz */ - - t -= diff; - if (t < 0) - t = 0; - *days = t / secs_per_day; - t -= *days * secs_per_day; - *mins = t / 60; - t -= *mins * 60; - *ticks = t * 50; -} - -static time_t -put_time (long days, long mins, long ticks) -{ - time_t t; - - if (days < 0) - days = 0; - if (days > 9900 * 365) - days = 9900 * 365; // in future far enough? - if (mins < 0 || mins >= 24 * 60) - mins = 0; - if (ticks < 0 || ticks >= 60 * 50) - ticks = 0; - - t = ticks / 50; - t += mins * 60; - t += ((uae_u64)days) * secs_per_day; - t += diff; - - return t; -} - static void free_exkey (Unit *unit, ExamineKey *ek) { if (--ek->aino->exnext_count == 0) { @@ -2777,34 +2991,43 @@ static void move_exkeys (Unit *unit, a_inode *from, a_inode *to) static void get_fileinfo (Unit *unit, dpacket packet, uaecptr info, a_inode *aino) { - struct _stat64 statbuf; - long days, mins, ticks; + struct mystat statbuf; + int days, mins, ticks; int i, n, entrytype, blocksize; int fsdb_can = fsdb_cando (unit); - char *x; + TCHAR *xs; + char *x, *x2; + bool ok = true; memset(&statbuf, 0, sizeof statbuf); /* No error checks - this had better work. */ if (unit->volflags & MYVOLUMEINFO_ARCHIVE) - zfile_stat_archive (aino->nname, &statbuf); + ok = zfile_stat_archive (aino->nname, &statbuf) != 0; else - stat64 (aino->nname, &statbuf); + my_stat (aino->nname, &statbuf); + + if (!ok) { + PUT_PCK_RES1 (packet, DOS_FALSE); + PUT_PCK_RES2 (packet, ERROR_NOT_A_DOS_DISK); + return; + } if (aino->parent == 0) { /* Guru book says ST_ROOT = 1 (root directory, not currently used) * but some programs really expect 2 from root dir.. */ entrytype = 2; - x = unit->ui.volname; + xs = unit->ui.volname; } else { entrytype = aino->dir ? 2 : -3; - x = aino->aname; + xs = aino->aname; } put_long (info + 4, entrytype); /* AmigaOS docs say these have to contain the same value. */ put_long (info + 120, entrytype); - TRACE((_T("name=\"%s\"\n"), x)); + TRACE((_T("name=\"%s\"\n"), xs)); + x2 = x = ua_fs (xs, -1); n = strlen (x); if (n > 106) n = 106; @@ -2814,16 +3037,17 @@ static void put_byte (info + i, *x), i++, x++; while (i < 108) put_byte (info + i, 0), i++; + xfree (x2); - put_long (info + 116, fsdb_can ? aino->amigaos_mode : fsdb_mode_supported(aino)); - put_long (info + 124, statbuf.st_size > MAXFILESIZE32 ? MAXFILESIZE32 : statbuf.st_size); + put_long (info + 116, fsdb_can ? aino->amigaos_mode : fsdb_mode_supported(aino)); + put_long (info + 124, statbuf.size > MAXFILESIZE32 ? MAXFILESIZE32 : (uae_u32)statbuf.size); #ifdef HAVE_ST_BLOCKS put_long (info + 128, statbuf.st_blocks); #else blocksize = 512; - put_long (info + 128, (statbuf.st_size + blocksize - 1) / blocksize); + put_long (info + 128, (statbuf.size + blocksize - 1) / blocksize); #endif - get_time (statbuf.st_mtime, &days, &mins, &ticks); + timeval_to_amiga (&statbuf.mtime, &days, &mins, &ticks); put_long (info + 132, days); put_long (info + 136, mins); put_long (info + 140, ticks); @@ -2832,9 +3056,10 @@ static void else { TRACE((_T("comment=\"%s\"\n"), aino->comment)); i = 144; - x = aino->comment; - if (! x) - x = _T(""); + xs = aino->comment; + if (!xs) + xs= _T(""); + x2 = x = ua_fs (xs, -1); n = strlen (x); if (n > 78) n = 78; @@ -2843,6 +3068,7 @@ static void put_byte (info + i, *x), i++, x++; while (i < 224) put_byte (info + i, 0), i++; + xfree (x2); } PUT_PCK_RES1 (packet, DOS_TRUE); } @@ -3076,9 +3302,10 @@ static int exalldo (uaecptr exalldata, uae_u32 exalldatasize, uae_u32 type, uaec int i; int size, size2; int entrytype; + TCHAR *xs = NULL, *commentx = NULL; uae_u32 flags = 15; - long days, mins, ticks; - struct _stat64 statbuf; + int days, mins, ticks; + struct mystat statbuf; int fsdb_can = fsdb_cando (unit); uae_u16 uid = 0, gid = 0; char *x = NULL, *comment = NULL; @@ -3088,15 +3315,16 @@ static int exalldo (uaecptr exalldata, uae_u32 exalldatasize, uae_u32 type, uaec if (unit->volflags & MYVOLUMEINFO_ARCHIVE) zfile_stat_archive (aino->nname, &statbuf); else - stat64 (aino->nname, &statbuf); + my_stat (aino->nname, &statbuf); if (aino->parent == 0) { entrytype = 2; - x = unit->ui.volname; + xs = unit->ui.volname; } else { entrytype = aino->dir ? 2 : -3; - x = aino->aname; + xs = aino->aname; } + x = ua_fs (xs, -1); size = 0; size2 = 4; @@ -3114,15 +3342,16 @@ static int exalldo (uaecptr exalldata, uae_u32 exalldatasize, uae_u32 type, uaec size2 += 4; } if (type >= 5) { - get_time (statbuf.st_mtime, &days, &mins, &ticks); + timeval_to_amiga (&statbuf.mtime, &days, &mins, &ticks); size2 += 12; } if (type >= 6) { size2 += 4; if (aino->comment == 0 || !fsdb_can) - comment = _T(""); + commentx = _T(""); else - comment = aino->comment; + commentx = aino->comment; + comment = ua_fs (commentx, -1); size += strlen (comment) + 1; size = (size + 3) & ~3; } @@ -3143,7 +3372,7 @@ static int exalldo (uaecptr exalldata, uae_u32 exalldatasize, uae_u32 type, uaec #if EXALL_DEBUG > 0 write_log (_T("ID=%d, %d, %08x: '%s'%s\n"), - get_long (control + 4), get_long (control + 0), exp, x, aino->dir ? _T(" [DIR]") : _T("")); + get_long (control + 4), get_long (control + 0), exp, xs, aino->dir ? _T(" [DIR]") : _T("")); #endif put_long (exp, exp + size + size2); /* ed_Next */ @@ -3157,7 +3386,7 @@ static int exalldo (uaecptr exalldata, uae_u32 exalldatasize, uae_u32 type, uaec if (type >= 2) put_long (exp + 8, entrytype); if (type >= 3) - put_long (exp + 12, statbuf.st_size > MAXFILESIZE32 ? MAXFILESIZE32 : statbuf.st_size); + put_long (exp + 12, statbuf.size > MAXFILESIZE32 ? MAXFILESIZE32 : statbuf.size); if (type >= 4) put_long (exp + 16, flags); if (type >= 5) { @@ -3180,6 +3409,8 @@ static int exalldo (uaecptr exalldata, uae_u32 exalldatasize, uae_u32 type, uaec put_long (control + 0, get_long (control + 0) + 1); ret = 1; end: + xfree (x); + xfree (comment); return ret; } @@ -3206,7 +3437,7 @@ static int action_examine_all_do (Unit *unit, uaecptr lock, ExAllKey *eak, uaecp ok = my_readdir (d->od, fn); else ok = 0; - } while (ok && d->fstype == FS_DIRECTORY && fsdb_name_invalid (fn)); + } while (ok && d->fstype == FS_DIRECTORY && fsdb_name_invalid_dir (fn)); if (!ok) return 0; } else { @@ -3269,7 +3500,7 @@ static int action_examine_all (Unit *unit, dpacket packet) uaecptr control = GET_PCK_ARG5 (packet); ExAllKey *eak = NULL; - a_inode *base; + a_inode *base = NULL; struct fs_dirhandle *d; int ok, i; uaecptr exp; @@ -3385,6 +3616,9 @@ static uae_u32 exall_helpder(TrapContext *context) uaecptr control = get_long (packet + dp_Arg5); uae_u32 id = get_long (control + 4); +#if EXALL_DEBUG > 0 + write_log (_T("FILESYS: EXALL extra round ID=%d\n"), id); +#endif if (id == EXALL_END) return 1; for (u = units; u; u = u->next) { @@ -3404,11 +3638,15 @@ static uae_u32 REGPARAM2 fsmisc_helper (TrapContext *context) switch (mode) { case 0: - return exall_helpder (context); + return exall_helpder (context); case 1: - return filesys_media_change_reply (context, 0); + return filesys_media_change_reply (context, 0); case 2: - return filesys_media_change_reply (context, 1); + return filesys_media_change_reply (context, 1); + case 3: + uae_u32 t = getlocaltime (); + uae_u32 secs = (uae_u32)t - (8 * 365 + 2) * 24 * 60 * 60; + return secs; } return 0; } @@ -3453,7 +3691,7 @@ static void populate_directory (Unit *unit, a_inode *base) base->locked_children++; unit->total_locked_ainos++; } - TRACE2((_T("Populating directory, child %p, locked_children %d\n"), + TRACE3((_T("Populating directory, child %p, locked_children %d\n"), base->child, base->locked_children)); for (;;) { uae_u64 uniq = 0; @@ -3470,7 +3708,7 @@ static void populate_directory (Unit *unit, a_inode *base) ok = my_readdir (d->od, fn); else ok = 0; - } while (ok && d->fstype == FS_DIRECTORY && fsdb_name_invalid (fn)); + } while (ok && d->fstype == FS_DIRECTORY && fsdb_name_invalid_dir (fn)); if (!ok) break; /* This calls init_child_aino, which will notice that the parent is @@ -3642,6 +3880,8 @@ static void do_find (Unit *unit, dpacket packet, int mode, int create, int fallb aino_created = 1; } + prepare_for_open (aino->nname); + openmode = (((mode & A_FIBF_READ) == 0 ? O_WRONLY : (mode & A_FIBF_WRITE) == 0 ? O_RDONLY : O_RDWR) @@ -3709,6 +3949,8 @@ static void aino = &unit->rootnode; mode = aino->amigaos_mode; /* Use same mode for opened filehandle as existing Lock() */ + prepare_for_open (aino->nname); + TRACE ((_T(" mode is %d\n"), mode)); openmode = (((mode & A_FIBF_READ) ? O_WRONLY : (mode & A_FIBF_WRITE) ? O_RDONLY @@ -3770,20 +4012,16 @@ static void /* change file/dir's parent dir modification time */ static void updatedirtime (a_inode *a1, int now) { - struct stat statbuf; - struct utimbuf ut; - long days, mins, ticks; + struct mystat statbuf; if (!a1->parent) return; if (!now) { - if (stat (a1->nname, &statbuf) == -1) + if (!my_stat (a1->nname, &statbuf)) return; - get_time (statbuf.st_mtime, &days, &mins, &ticks); - ut.actime = ut.modtime = put_time(days, mins, ticks); - utime (a1->parent->nname, &ut); + my_utime (a1->parent->nname, &statbuf.mtime); } else { - utime (a1->parent->nname, NULL); + my_utime (a1->parent->nname, NULL); } } @@ -3899,6 +4137,7 @@ static void k->file_pos += actual; } } + TRACE((_T("=%d\n"), actual)); } static void @@ -4501,7 +4740,7 @@ static void uaecptr name = GET_PCK_ARG3 (packet) << 2; uaecptr date = GET_PCK_ARG4 (packet); a_inode *a; - struct utimbuf ut; + struct mytimeval tv; int err; TRACE((_T("ACTION_SET_DATE(0x%lx,\"%s\")\n"), lock, bstr (unit, name))); @@ -4512,10 +4751,10 @@ static void return; } - ut.actime = ut.modtime = put_time(get_long (date), get_long (date + 4), - get_long (date + 8)); + amiga_to_timeval (&tv, get_long (date), get_long (date + 4), get_long (date + 8)); a = find_aino (unit, lock, bstr (unit, name), &err); - if (err == 0 && utime (a->nname, &ut) == -1) + write_log (_T("%llu.%u (%d,%d,%d) %s\n"), tv.tv_sec, tv.tv_usec, get_long (date), get_long (date + 4), get_long (date + 8), a->nname); + if (err == 0 && !my_utime (a->nname, &tv)) err = dos_errno (); if (err != 0) { PUT_PCK_RES1 (packet, DOS_FALSE); @@ -4656,7 +4895,7 @@ static void /* get volume name */ xfree (unit->ui.volname); - unit->ui.volname = my_strdup(bstr1 (name)); + unit->ui.volname = bstr1 (name); set_volume_name (unit, 0); PUT_PCK_RES1 (packet, DOS_TRUE); @@ -4738,10 +4977,10 @@ static void action_change_file_position64 (Unit *unit, dpacket packet) if (mode < 0) whence = SEEK_SET; - TRACE((_T("ACTION_CHANGE_FILE_POSITION64(%s,%I64d,%d)\n"), k->aino->nname, pos, mode)); + TRACE((_T("ACTION_CHANGE_FILE_POSITION64(%s,%lld,%d)\n"), k->aino->nname, pos, mode)); gui_flicker_led (LED_HD, unit->unit, 1); - cur = fs_lseek64 (k->fd, 0, SEEK_CUR); + cur = k->file_pos; { uae_s64 temppos; uae_s64 filesize = fs_fsize64 (k->fd); @@ -4767,8 +5006,9 @@ static void action_change_file_position64 (Unit *unit, dpacket packet) } else { PUT_PCK64_RES1 (packet, TRUE); PUT_PCK64_RES2 (packet, 0); - k->file_pos = cur; + k->file_pos = fs_lseek64 (k->fd, 0, SEEK_CUR); } + TRACE((_T("= oldpos %lld newpos %lld\n"), cur, k->file_pos)); } @@ -4783,7 +5023,7 @@ static void action_get_file_position64 (Unit *unit, dpacket packet) PUT_PCK64_RES2 (packet, ERROR_INVALID_LOCK); return; } - TRACE((_T("ACTION_GET_FILE_POSITION64(%s)\n"), k->aino->nname)); + TRACE((_T("ACTION_GET_FILE_POSITION64(%s)=%lld\n"), k->aino->nname, k->file_pos)); PUT_PCK64_RES1 (packet, k->file_pos); PUT_PCK64_RES2 (packet, 0); } @@ -4802,7 +5042,7 @@ static void action_change_file_size64 (Unit *unit, dpacket packet) if (mode < 0) whence = SEEK_SET; - TRACE((_T("ACTION_CHANGE_FILE_SIZE64(0x%lx, %I64d, 0x%x)\n"), GET_PCK64_ARG1 (packet), offset, mode)); + TRACE((_T("ACTION_CHANGE_FILE_SIZE64(0x%lx, %lld, 0x%x)\n"), GET_PCK64_ARG1 (packet), offset, mode)); k = lookup_key (unit, GET_PCK64_ARG1 (packet)); if (k == 0) { @@ -4824,11 +5064,11 @@ static void action_change_file_size64 (Unit *unit, dpacket packet) /* Write one then truncate: that should give the right size in all cases. */ fs_lseek (k->fd, offset, whence); - offset = fs_lseek (k->fd, offset, whence); + offset = fs_lseek64 (k->fd, offset, whence); fs_write (k->fd, /* whatever */(uae_u8*)&k1, 1); if (k->file_pos > offset) k->file_pos = offset; - fs_lseek (k->fd, k->file_pos, SEEK_SET); + fs_lseek64 (k->fd, k->file_pos, SEEK_SET); if (my_truncate (k->aino->nname, offset) == -1) { PUT_PCK64_RES1 (packet, DOS_FALSE); @@ -4852,8 +5092,8 @@ static void action_get_file_size64 (Unit *unit, dpacket packet) PUT_PCK64_RES2 (packet, ERROR_INVALID_LOCK); return; } - TRACE((_T("ACTION_GET_FILE_SIZE64(%s)\n"), k->aino->nname)); filesize = fs_fsize64 (k->fd); + TRACE((_T("ACTION_GET_FILE_SIZE64(%s)=%lld\n"), k->aino->nname, filesize)); if (filesize >= 0) { PUT_PCK64_RES1 (packet, filesize); PUT_PCK64_RES2 (packet, 0); @@ -4916,7 +5156,7 @@ static uae_u32 REGPARAM2 exter_int_helper (TrapContext *context) lockend = get_long (lockend); cnt++; } - TRACE2((_T("message_lock: %d %x %x %x\n"), cnt, locks, lockend, m68k_areg (regs, 3))); + TRACE3((_T("message_lock: %d %x %x %x\n"), cnt, locks, lockend, m68k_areg (regs, 3))); put_long (lockend, get_long (m68k_areg (regs, 3))); put_long (m68k_areg (regs, 3), locks); } @@ -5014,6 +5254,7 @@ static int handle_packet (Unit *unit, dpacket pck, uae_u32 msg) uae_s32 type = GET_PCK_TYPE (pck); PUT_PCK_RES2 (pck, 0); + TRACE((_T("unit=%x packet=%d\n"), unit, type)); if (unit->inhibited && filesys_isvolume(unit) && type != ACTION_INHIBIT && type != ACTION_MORE_CACHE && type != ACTION_DISK_INFO) { @@ -5094,52 +5335,60 @@ static int handle_packet (Unit *unit, dpacket pck, uae_u32 msg) } #ifdef UAE_FILESYS_THREADS + +static int filesys_iteration(UnitInfo *ui) +{ + dpacket pck; + uaecptr msg; + uae_u32 morelocks; + + pck = read_comm_pipe_u32_blocking (ui->unit_pipe); + msg = read_comm_pipe_u32_blocking (ui->unit_pipe); + morelocks = (uae_u32)read_comm_pipe_int_blocking (ui->unit_pipe); + + if (ui->reset_state == FS_GO_DOWN) { + if (pck != 0) + return 1; + /* Death message received. */ + uae_sem_post (&ui->reset_sync_sem); + /* Die. */ + return 0; + } + + put_long (get_long (morelocks), get_long (ui->self->locklist)); + put_long (ui->self->locklist, morelocks); + int ret = handle_packet (ui->self, pck, msg); + if (!ret) { + PUT_PCK_RES1 (pck, DOS_FALSE); + PUT_PCK_RES2 (pck, ERROR_ACTION_NOT_KNOWN); + } + if (ret >= 0) { + /* Mark the packet as processed for the list scan in the assembly code. */ + put_long (msg + 4, 0xffffffff); + } + /* Acquire the message lock, so that we know we can safely send the message. */ + ui->self->cmds_sent++; + /* The message is sent by our interrupt handler, so make sure an interrupt happens. */ + do_uae_int_requested(); + /* Send back the locks. */ + if (get_long (ui->self->locklist) != 0) + write_comm_pipe_int (ui->back_pipe, (int)(get_long (ui->self->locklist)), 0); + put_long (ui->self->locklist, 0); + return 1; +} + + static void *filesys_thread (void *unit_v) { - UnitInfo *ui = (UnitInfo *)unit_v; + UnitInfo *ui = (UnitInfo *)unit_v; uae_set_thread_priority (NULL, 1); - for (;;) { - dpacket pck; - uaecptr msg; - uae_u32 morelocks; - - pck = read_comm_pipe_u32_blocking (ui->unit_pipe); - msg = read_comm_pipe_u32_blocking (ui->unit_pipe); - morelocks = (uae_u32)read_comm_pipe_int_blocking (ui->unit_pipe); - - if (ui->reset_state == FS_GO_DOWN) { - if (pck != 0) - continue; - /* Death message received. */ -// dbg_rem_thread(ui->tid); - uae_sem_post (&ui->reset_sync_sem); - /* Die. */ - return 0; - } - - put_long (get_long (morelocks), get_long (ui->self->locklist)); - put_long (ui->self->locklist, morelocks); - int ret = handle_packet (ui->self, pck, msg); - if (!ret) { - PUT_PCK_RES1 (pck, DOS_FALSE); - PUT_PCK_RES2 (pck, ERROR_ACTION_NOT_KNOWN); - } - if (ret >= 0) { - /* Mark the packet as processed for the list scan in the assembly code. */ - put_long (msg + 4, 0xffffffff); + for (;;) { + if (!filesys_iteration (ui)) { + return 0; } - /* Acquire the message lock, so that we know we can safely send the message. */ - ui->self->cmds_sent++; - /* The message is sent by our interrupt handler, so make sure an interrupt happens. */ - do_uae_int_requested(); - /* Send back the locks. */ - if (get_long (ui->self->locklist) != 0) - write_comm_pipe_int (ui->back_pipe, (int)(get_long (ui->self->locklist)), 0); - put_long (ui->self->locklist, 0); - } -// dbg_rem_thread(ui->tid); - return 0; + } + return 0; } #endif @@ -5333,7 +5582,7 @@ static uae_u32 REGPARAM2 filesys_diagentry (TrapContext *context) uaecptr start = resaddr; uaecptr residents, tmp; - TRACE ((_T("filesystem: diagentry called\n"))); + write_log (_T("filesystem: diagentry called: %x\n"), resaddr); filesys_configdev = m68k_areg (regs, 3); init_filesys_diagentry (); @@ -5522,7 +5771,9 @@ int rdb_checksum (uae_char *id, uae_u8 *p, int block) sum += rl (p + i * 4); sum = -sum; if (sum) { - write_log (_T("RDB: block %d ('%s') checksum error\n"), block, id); + TCHAR *s = au (id); + write_log (_T("RDB: block %d ('%s') checksum error\n"), block, s); + xfree (s); return 0; } return 1; @@ -5570,7 +5821,27 @@ static TCHAR *device_dupfix (uaecptr expbase, TCHAR *devname) return my_strdup (newname); } -#define rdbmnt write_log (_T("Mounting uaehf.device %d (%d) (size=%I64u):\n"), unit_no, partnum, hfd->virtsize); +static const TCHAR *dostypes (uae_u32 dostype) +{ + static TCHAR dt[32]; + int j; + + j = 0; + for (int i = 0; i < 4; i++) { + uae_u8 c = dostype >> ((3 - i) * 8); + if (c >= ' ' && c <= 'z') { + dt[j++] = c; + } else { + dt[j++] = '\\'; + _stprintf (&dt[j], _T("%d"), c); + j += _tcslen (&dt[j]); + } + } + dt[j] = 0; + return dt; +} + +#define rdbmnt write_log (_T("Mounting uaehf.device %d (%d) (size=%llu):\n"), unit_no, partnum, hfd->virtsize); static int rdb_mount (UnitInfo *uip, int unit_no, int partnum, uaecptr parmpacket) { @@ -5601,7 +5872,7 @@ static int rdb_mount (UnitInfo *uip, int unit_no, int partnum, uaecptr parmpacke } if (lastblock * hfd->blocksize > hfd->virtsize) { rdbmnt - write_log (_T("failed, too small (%d*%d > %I64u)\n"), lastblock, hfd->blocksize, hfd->virtsize); + write_log (_T("failed, too small (%d*%d > %llu)\n"), lastblock, hfd->blocksize, hfd->virtsize); return -2; } for (rdblock = 0; rdblock < lastblock; rdblock++) { @@ -5643,6 +5914,17 @@ static int rdb_mount (UnitInfo *uip, int unit_no, int partnum, uaecptr parmpacke hfd->cylinders = rl (bufrdb + 64); hfd->sectors = rl (bufrdb + 68); hfd->heads = rl (bufrdb + 72); +#if 0 + { + int cyls, secs, heads; + getchsgeometry_hdf (hfd, hfd->virtsize, &cyls, &secs, &heads); + if (cyls * secs * heads > hfd->cylinders * hfd->sectors * hfd->heads) { + hfd->cylinders = cyls; + hfd->sectors = secs; + hfd->heads = heads; + } + } +#endif fileblock = rl (bufrdb + 32); buf = xmalloc (uae_u8, readblocksize); @@ -5676,7 +5958,9 @@ static int rdb_mount (UnitInfo *uip, int unit_no, int partnum, uaecptr parmpacke m68k_dreg (regs, 7) = m68k_dreg (regs, 7) & ~1; buf[37 + buf[36]] = 0; /* zero terminate BSTR */ - uip->rdb_devname_amiga[partnum] = ds (device_dupfix (get_long (parmpacket + PP_EXPLIB), ((char*)buf + 37))); + s = au ((char*)buf + 37); + uip->rdb_devname_amiga[partnum] = ds (device_dupfix (get_long (parmpacket + PP_EXPLIB), s)); + xfree (s); put_long (parmpacket, uip->rdb_devname_amiga[partnum]); /* name */ put_long (parmpacket + 4, ROM_hardfile_resname); put_long (parmpacket + 8, uip->devno); @@ -5719,7 +6003,7 @@ static int rdb_mount (UnitInfo *uip, int unit_no, int partnum, uaecptr parmpacke for (;;) { if (fileblock == -1) { if (!fsnode) - write_log (_T("RDB: FS %08X not in FileSystem.resource or in RDB\n"), dostype); + write_log (_T("RDB: FS %08X (%s) not in FileSystem.resource or in RDB\n"), dostype, dostypes (dostype)); goto error; } if (!legalrdbblock (uip, fileblock)) { @@ -5740,9 +6024,9 @@ static int rdb_mount (UnitInfo *uip, int unit_no, int partnum, uaecptr parmpacke newversion = (buf[36] << 8) | buf[37]; newrevision = (buf[38] << 8) | buf[39]; - write_log (_T("RDB: RDB filesystem %08X version %d.%d\n"), dostype, newversion, newrevision); + write_log (_T("RDB: RDB filesystem %08X (%s) version %d.%d\n"), dostype, dostypes (dostype), newversion, newrevision); if (fsnode) { - write_log (_T("RDB: %08X in FileSystem.resource version %d.%d\n"), dostype, oldversion, oldrevision); + write_log (_T("RDB: %08X (%s) in FileSystem.resource version %d.%d\n"), dostype, dostypes (dostype), oldversion, oldrevision); } if (newversion * 65536 + newrevision <= oldversion * 65536 + oldrevision && oldversion >= 0) { write_log (_T("RDB: FS in FileSystem.resource is newer or same, ignoring RDB filesystem\n")); @@ -5836,13 +6120,13 @@ static int dofakefilesys (UnitInfo *uip, uaecptr parmpacket) _tcscpy (tmp + i, _T("FastFileSystem")); } if (tmp[0] == 0) { - write_log (_T("RDB: no filesystem for dostype 0x%08X\n"), dostype); + write_log (_T("RDB: no filesystem for dostype 0x%08X (%s)\n"), dostype, dostypes (dostype)); if ((dostype & 0xffffff00) == 0x444f5300) return FILESYS_HARDFILE; write_log (_T("RDB: mounted without filesys\n")); return FILESYS_HARDFILE; } - write_log (_T("RDB: fakefilesys, trying to load '%s', dostype 0x%08X\n"), tmp, dostype); + write_log (_T("RDB: fakefilesys, trying to load '%s', dostype 0x%08X (%s)\n"), tmp, dostype, dostypes (dostype)); zf = zfile_fopen (tmp, _T("rb"), ZFD_NORMAL); if (!zf) { write_log (_T("RDB: filesys not found\n")); @@ -5863,7 +6147,7 @@ static int dofakefilesys (UnitInfo *uip, uaecptr parmpacket) uip->rdb_filesyssize = size; put_long (parmpacket + PP_FSSIZE, uip->rdb_filesyssize); addfakefilesys (parmpacket, dostype); - write_log (_T("HDF: faked RDB filesystem %08X loaded\n"), dostype); + write_log (_T("HDF: faked RDB filesystem %08X (%s) loaded\n"), dostype, dostypes (dostype)); return FILESYS_HARDFILE; } @@ -5902,6 +6186,7 @@ static uae_u32 REGPARAM2 filesys_dev_storeinfo (TrapContext *context) int type; uaecptr parmpacket = m68k_areg (regs, 0); + gui_flicker_led (LED_HD, unit_no, -1); type = is_hardfile (unit_no); if (type == FILESYS_HARDFILE_RDB) { /* RDB hardfile */ @@ -5924,12 +6209,12 @@ static uae_u32 REGPARAM2 filesys_dev_storeinfo (TrapContext *context) put_long (parmpacket + 60, 50); /* Number of buffers */ put_long (parmpacket + 64, 1); /* Buffer mem type */ put_long (parmpacket + 68, 0x7FFFFFFE); /* largest transfer */ - put_long (parmpacket + 72, 0x7FFFFFFE); /* addMask (?) */ + put_long (parmpacket + 72, 0xFFFFFFFE); /* dma mask */ put_long (parmpacket + 76, uip[unit_no].bootpri); /* bootPri */ put_long (parmpacket + 80, DISK_TYPE_DOS); /* DOS\0 */ if (type == FILESYS_VIRTUAL) { put_long (parmpacket + 4, fsdevname); - put_long (parmpacket + 20, 1024 >> 2); /* longwords per block */ + put_long (parmpacket + 20, 512 >> 2); /* longwords per block */ put_long (parmpacket + 28, 15); /* heads */ put_long (parmpacket + 32, 1); /* sectors per block */ put_long (parmpacket + 36, 127); /* sectors per track */ @@ -5962,14 +6247,13 @@ static uae_u32 REGPARAM2 mousehack_done (TrapContext *context) uaecptr diminfo = m68k_areg (regs, 2); uaecptr dispinfo = m68k_areg (regs, 3); uaecptr vp = m68k_areg (regs, 4); - input_mousehack_status (mode, diminfo, dispinfo, vp, m68k_dreg (regs, 2)); + return input_mousehack_status (mode, diminfo, dispinfo, vp, m68k_dreg (regs, 2)); } else if (mode == 10) { amiga_clipboard_die (); } else if (mode == 11) { amiga_clipboard_got_data (m68k_areg (regs, 2), m68k_dreg (regs, 2), m68k_dreg (regs, 0) + 8); } else if (mode == 12) { - amiga_clipboard_want_data (); - return 0; + return amiga_clipboard_want_data (); } else if (mode == 13) { return amiga_clipboard_proc_start (); } else if (mode == 14) { @@ -5982,6 +6266,8 @@ static uae_u32 REGPARAM2 mousehack_done (TrapContext *context) } else if (mode == 17) { uae_u32 v = 0; return v; + } else if (mode == 18) { + return rtarea_base + RTAREA_HEARTBEAT; } else if (mode == 101) { } else if (mode == 102) { uaecptr ret = 0; @@ -5996,6 +6282,15 @@ void filesys_vsync (void) { Unit *u; + if (!uae_boot_rom) + return; + if (heartbeat == get_long (rtarea_base + RTAREA_HEARTBEAT)) { + if (heartbeat_count > 0) + heartbeat_count--; + return; + } + heartbeat = get_long (rtarea_base + RTAREA_HEARTBEAT); + for (u = units; u; u = u->next) { if (u->reinsertdelay > 0) { u->reinsertdelay--; @@ -6008,6 +6303,14 @@ void filesys_vsync (void) } } record_timeout (u); + } + + if (heartbeat_count <= 0) + return; + + if (heartbeat_task & 1) { + setsystime_vblank (); + heartbeat_task &= ~1; } } @@ -6015,7 +6318,7 @@ void filesys_install (void) { uaecptr loop; - TRACE ((_T("Installing filesystem\n"))); + TRACEI ((_T("Installing filesystem\n"))); uae_sem_init (&singlethread_int_sem, 0, 1); @@ -6030,6 +6333,11 @@ void filesys_install (void) loop = here (); + org (rtarea_base + RTAREA_HEARTBEAT); + dl (0); + heartbeat = 0; + heartbeat_task = 0; + org (rtarea_base + 0xFF18); calltrap (deftrap2 (filesys_dev_bootfilesys, 0, _T("filesys_dev_bootfilesys"))); dw (RTS); @@ -6086,6 +6394,10 @@ void filesys_install_code (void) filesys_initcode = a + dlg (b) + bootrom_header - 4; } +#ifdef _WIN32 +#include "od-win32/win32_filesys.cpp" +#endif + static uae_u8 *restore_filesys_hardfile (UnitInfo *ui, uae_u8 *src) { struct hardfiledata *hfd = &ui->hf; @@ -6338,7 +6650,7 @@ static uae_u8 *restore_key(UnitInfo *ui, Unit *u, uae_u8 *src) openmode = ((k->dosmode & A_FIBF_READ) == 0 ? O_WRONLY : (k->dosmode & A_FIBF_WRITE) == 0 ? O_RDONLY : O_RDWR); - write_log (_T("FS: open file '%s' ('%s'), pos=%d\n"), p, pn, k->file_pos); + write_log (_T("FS: open file '%s' ('%s'), pos=%llu\n"), p, pn, k->file_pos); a = get_aino (u, &u->rootnode, p, &err); if (!a) write_log (_T("*** FS: Open file aino creation failed '%s'\n"), p); @@ -6378,9 +6690,9 @@ static uae_u8 *restore_key(UnitInfo *ui, Unit *u, uae_u8 *src) uae_s64 s; s = fs_fsize64 (k->fd); if (s != savedsize) - write_log (_T("FS: restored file '%s' size changed! orig=%I64d, now=%I64d!!\n"), p, savedsize, s); + write_log (_T("FS: restored file '%s' size changed! orig=%llu, now=%lld!!\n"), p, savedsize, s); if (k->file_pos > s) { - write_log (_T("FS: restored filepos larger than size of file '%s'!! %I64d > %d\n"), p, k->file_pos, s); + write_log (_T("FS: restored filepos larger than size of file '%s'!! %llu > %lld\n"), p, k->file_pos, s); k->file_pos = s; } fs_lseek64 (k->fd, k->file_pos, SEEK_SET); @@ -6498,11 +6810,14 @@ static int recurse_aino (UnitInfo *ui, a_inode *a, int cnt, uae_u8 **dstp) if (dstp) dst = *dstp; while (a) { + //write_log("recurse '%s' '%s' %d %08x\n", a->aname, a->nname, a->uniq, a->parent); if (a->elock || a->shlock || a->uniq == 0) { if (dst) { TCHAR *fn = NULL; + write_log (_T("uniq=%d %lld s=%d e=%d d=%d '%s' '%s'\n"), a->uniq, a->uniq_external, a->shlock, a->elock, a->dir, a->aname, a->nname); if (a->aname) { fn = getfullaname(a); + write_log (_T("->'%s'\n"), fn); } save_u64 (a->uniq); save_u32 (a->locked_children); @@ -6542,7 +6857,7 @@ static uae_u8 *save_key(uae_u8 *dst, Key *k) save_string (fn); save_u64 (k->file_pos); save_u64 (size); - write_log (_T("'%s' uniq=%d size=%I64d seekpos=%I64d mode=%d dosmode=%d\n"), + write_log (_T("'%s' uniq=%d size=%lld seekpos=%lld mode=%d dosmode=%d\n"), fn, k->uniq, size, k->file_pos, k->createmode, k->dosmode); xfree(fn); return dst; @@ -6667,6 +6982,7 @@ uae_u8 *save_filesys (int num, int *len) /* not initialized yet, do not save */ if ((type == FILESYS_VIRTUAL) && ui->self == NULL) return NULL; + write_log (_T("FS_FILESYS: '%s' '%s'\n"), ui->devname, ui->volname ? ui->volname : _T("")); dstbak = dst = xmalloc (uae_u8, 100000); save_u32 (2); /* version */ save_u32 (ui->devno); @@ -6730,7 +7046,7 @@ uae_u8 *restore_filesys (uae_u8 *src) volname = NULL; } if (set_filesys_unit (devno, devname, volname, rootdir, readonly, - ui->hf.secspertrack, ui->hf.surfaces, ui->hf.reservedblocks, ui->hf.blocksize, + ui->hf.cylinders, ui->hf.secspertrack, ui->hf.surfaces, ui->hf.reservedblocks, ui->hf.blocksize, bootpri, false, true, filesysdir[0] ? filesysdir : NULL, 0, 0) < 0) { write_log (_T("filesys '%s' failed to restore\n"), rootdir); goto end; diff --git a/src/filesys_bootrom.cpp b/src/filesys_bootrom.cpp index 1e3ac75d..ec824ed2 100644 --- a/src/filesys_bootrom.cpp +++ b/src/filesys_bootrom.cpp @@ -1,13 +1,13 @@ db(0x00); db(0x00); db(0x00); db(0x10); db(0x00); db(0x00); db(0x00); db(0x00); - db(0x00); db(0x00); db(0x00); db(0x09); db(0x60); db(0x00); db(0x0b); db(0x94); - db(0x00); db(0x00); db(0x09); db(0x70); db(0x00); db(0x00); db(0x00); db(0xe0); - db(0x00); db(0x00); db(0x02); db(0x9c); db(0x00); db(0x00); db(0x00); db(0x24); - db(0x00); db(0x00); db(0x03); db(0x58); db(0x00); db(0x00); db(0x0f); db(0x96); - db(0x00); db(0x00); db(0x14); db(0x26); db(0x43); db(0xfa); db(0x19); db(0x14); + db(0x00); db(0x00); db(0x00); db(0x09); db(0x60); db(0x00); db(0x0a); db(0xfe); + db(0x00); db(0x00); db(0x08); db(0xac); db(0x00); db(0x00); db(0x00); db(0xe0); + db(0x00); db(0x00); db(0x02); db(0x74); db(0x00); db(0x00); db(0x00); db(0x24); + db(0x00); db(0x00); db(0x03); db(0x82); db(0x00); db(0x00); db(0x00); db(0x00); + db(0x00); db(0x00); db(0x13); db(0x8c); db(0x43); db(0xfa); db(0x18); db(0x95); db(0x4e); db(0xae); db(0xff); db(0xa0); db(0x20); db(0x40); db(0x20); db(0x28); db(0x00); db(0x16); db(0x20); db(0x40); db(0x4e); db(0x90); db(0x4e); db(0x75); db(0x48); db(0xe7); db(0xe0); db(0xe2); db(0x30); db(0x3c); db(0xff); db(0x38); - db(0x72); db(0x11); db(0x61); db(0x00); db(0x0d); db(0xbe); db(0x4e); db(0x90); + db(0x72); db(0x11); db(0x61); db(0x00); db(0x17); db(0x7e); db(0x4e); db(0x90); db(0x4a); db(0x80); db(0x67); db(0x4c); db(0x2c); db(0x78); db(0x00); db(0x04); db(0x0c); db(0x6e); db(0x00); db(0x25); db(0x00); db(0x14); db(0x65); db(0x40); db(0x70); db(0x14); db(0x24); db(0x00); db(0x72); db(0x01); db(0x4e); db(0xae); @@ -22,71 +22,66 @@ db(0x20); db(0x68); db(0x00); db(0x02); db(0x2f); db(0x08); db(0x4e); db(0x90); db(0x20); db(0x5f); db(0x58); db(0x8f); db(0x48); db(0xe7); db(0xff); db(0x7e); db(0x22); db(0x4e); db(0x20); db(0x08); db(0x30); db(0x7c); db(0xff); db(0xb8); - db(0x4e); db(0xae); db(0xfe); db(0x5c); db(0x61); db(0x00); db(0x13); db(0x68); - db(0x61); db(0x00); db(0x17); db(0x30); db(0x4c); db(0xdf); db(0x7e); db(0xff); + db(0x4e); db(0xae); db(0xfe); db(0x5c); db(0x61); db(0x00); db(0x12); db(0xce); + db(0x61); db(0x00); db(0x16); db(0x94); db(0x4c); db(0xdf); db(0x7e); db(0xff); db(0x4e); db(0x75); db(0x00); db(0x00); db(0x08); db(0x00); db(0x00); db(0x02); db(0x67); db(0x06); db(0x4e); db(0xb9); db(0x00); db(0xf0); db(0x00); db(0x00); db(0x4e); db(0xf9); db(0x00); db(0xf0); db(0x00); db(0x00); db(0x00); db(0x00); db(0x48); db(0xe7); db(0xff); db(0xfe); db(0x2c); db(0x78); db(0x00); db(0x04); - db(0x30); db(0x3c); db(0xff); db(0xfc); db(0x61); db(0x00); db(0x0d); db(0x14); - db(0x2a); db(0x50); db(0x43); db(0xfa); db(0x18); db(0x75); db(0x70); db(0x24); + db(0x30); db(0x3c); db(0xff); db(0xec); db(0x61); db(0x00); db(0x16); db(0xd4); + db(0x2a); db(0x50); db(0x43); db(0xfa); db(0x17); db(0xf6); db(0x70); db(0x24); db(0x7a); db(0x01); db(0x4e); db(0xae); db(0xfd); db(0xd8); db(0x4a); db(0x80); - db(0x66); db(0x0c); db(0x43); db(0xfa); db(0x18); db(0x65); db(0x70); db(0x00); + db(0x66); db(0x0c); db(0x43); db(0xfa); db(0x17); db(0xe6); db(0x70); db(0x00); db(0x7a); db(0x00); db(0x4e); db(0xae); db(0xfd); db(0xd8); db(0x28); db(0x40); - db(0x4a); db(0xad); db(0x01); db(0x0c); db(0x67); db(0x00); db(0x00); db(0x84); + db(0x4a); db(0xad); db(0x01); db(0x0c); db(0x67); db(0x00); db(0x00); db(0x5c); db(0x20); db(0x3c); db(0x00); db(0x00); db(0x02); db(0x2c); db(0x22); db(0x3c); db(0x00); db(0x01); db(0x00); db(0x01); db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x26); db(0x40); db(0x27); db(0x4c); db(0x01); db(0x9c); db(0x7c); db(0x00); db(0xbc); db(0x6d); db(0x01); db(0x0e); db(0x64); db(0x2c); db(0x2f); db(0x06); db(0x7e); db(0x01); db(0x4a); db(0x45); db(0x67); db(0x04); db(0x08); db(0xc7); db(0x00); db(0x02); db(0x2f); db(0x0b); db(0x20); db(0x4b); db(0x61); db(0x00); - db(0x08); db(0x28); db(0x26); db(0x5f); db(0x0c); db(0x80); db(0xff); db(0xff); + db(0x07); db(0x64); db(0x26); db(0x5f); db(0x0c); db(0x80); db(0xff); db(0xff); db(0xff); db(0xfe); db(0x67); db(0x08); db(0x48); db(0x46); db(0x52); db(0x46); db(0x48); db(0x46); db(0x60); db(0xdc); db(0x2c); db(0x1f); db(0x52); db(0x46); - db(0x60); db(0xce); db(0x4a); db(0x45); db(0x67); db(0x24); db(0x7c); db(0x00); - db(0x30); db(0x2d); db(0x01); db(0x0c); db(0x0d); db(0x00); db(0x67); db(0x12); - db(0x48); db(0xe7); db(0x02); db(0x10); db(0x20); db(0x4b); db(0x08); db(0xc6); - db(0x00); db(0x1f); db(0x61); db(0x00); db(0x06); db(0xf8); db(0x4c); db(0xdf); - db(0x08); db(0x40); db(0x52); db(0x46); db(0x0c); db(0x46); db(0x00); db(0x08); - db(0x66); db(0xde); db(0x2c); db(0x78); db(0x00); db(0x04); db(0x22); db(0x4b); + db(0x60); db(0xce); db(0x2c); db(0x78); db(0x00); db(0x04); db(0x22); db(0x4b); db(0x20); db(0x3c); db(0x00); db(0x00); db(0x02); db(0x2c); db(0x4e); db(0xae); db(0xff); db(0x2e); db(0x2c); db(0x78); db(0x00); db(0x04); db(0x22); db(0x4c); db(0x4e); db(0xae); db(0xfe); db(0x62); db(0x78); db(0x03); db(0x0c); db(0x6e); db(0x00); db(0x24); db(0x00); db(0x14); db(0x65); db(0x04); db(0x00); db(0x44); db(0x01); db(0x00); db(0x43); db(0xf9); db(0x00); db(0x21); db(0x00); db(0x00); db(0x4e); db(0xae); db(0xfd); db(0xea); db(0x4a); db(0x80); db(0x66); db(0x20); - db(0x30); db(0x3c); db(0xff); db(0x80); db(0x61); db(0x00); db(0x0c); db(0x3c); + db(0x30); db(0x3c); db(0xff); db(0x80); db(0x61); db(0x00); db(0x16); db(0x24); db(0x4e); db(0x90); db(0x22); db(0x04); db(0x74); db(0xf6); db(0x20); db(0x7c); db(0x00); db(0x20); db(0x00); db(0x00); db(0x90); db(0x88); db(0x65); db(0x08); db(0x67); db(0x06); db(0x93); db(0xc9); db(0x4e); db(0xae); db(0xfd); db(0x96); - db(0x30); db(0x3c); db(0xff); db(0x80); db(0x61); db(0x00); db(0x0c); db(0x1c); + db(0x30); db(0x3c); db(0xff); db(0x80); db(0x61); db(0x00); db(0x16); db(0x04); db(0x4e); db(0x90); db(0x20); db(0x49); db(0x20); db(0x01); db(0x67); db(0x0c); - db(0x22); db(0x04); db(0x74); db(0xfb); db(0x43); db(0xfa); db(0x17); db(0x99); - db(0x4e); db(0xae); db(0xfd); db(0x96); db(0x41); db(0xfa); db(0x17); db(0x10); + db(0x22); db(0x04); db(0x74); db(0xfb); db(0x43); db(0xfa); db(0x17); db(0x42); + db(0x4e); db(0xae); db(0xfd); db(0x96); db(0x41); db(0xfa); db(0x16); db(0xb9); db(0x43); db(0xfa); db(0x00); db(0x54); db(0x70); db(0x0a); db(0x61); db(0x00); - db(0x0c); db(0xd6); db(0x22); db(0x40); db(0x72); db(0x01); db(0x30); db(0x3c); - db(0xff); db(0x48); db(0x61); db(0x00); db(0x0b); db(0xee); db(0x4e); db(0x90); + db(0x0c); db(0x62); db(0x22); db(0x40); db(0x72); db(0x01); db(0x30); db(0x3c); + db(0xff); db(0x48); db(0x61); db(0x00); db(0x15); db(0xd6); db(0x4e); db(0x90); db(0x4c); db(0xdf); db(0x7f); db(0xff); db(0x4e); db(0x75); db(0x48); db(0xe7); db(0x38); db(0x22); db(0x2c); db(0x78); db(0x00); db(0x04); db(0x24); db(0x00); db(0x28); db(0x01); db(0x26); db(0x09); db(0x24); db(0x48); db(0x43); db(0xfa); - db(0x17); db(0x0a); db(0x70); db(0x00); db(0x4e); db(0xae); db(0xfd); db(0xd8); + db(0x16); db(0xb3); db(0x70); db(0x00); db(0x4e); db(0xae); db(0xfd); db(0xd8); db(0x4a); db(0x80); db(0x67); db(0x14); db(0x2c); db(0x40); db(0x22); db(0x0a); db(0xe4); db(0x8b); db(0x4e); db(0xae); db(0xff); db(0x76); db(0x22); db(0x4e); db(0x2c); db(0x78); db(0x00); db(0x04); db(0x4e); db(0xae); db(0xfe); db(0x62); db(0x4c); db(0xdf); db(0x44); db(0x1c); db(0x4e); db(0x75); db(0x2c); db(0x78); db(0x00); db(0x04); db(0x70); db(0x00); db(0x08); db(0xc0); db(0x00); db(0x0d); - db(0x4e); db(0xae); db(0xfe); db(0xc2); db(0x41); db(0xfa); db(0x16); db(0xbb); + db(0x4e); db(0xae); db(0xfe); db(0xc2); db(0x41); db(0xfa); db(0x16); db(0x64); db(0x43); db(0xfa); db(0x00); db(0x16); db(0x70); db(0x0f); db(0x22); db(0x3c); db(0x00); db(0x00); db(0x1f); db(0x40); db(0x61); db(0x00); db(0xff); db(0xa8); db(0x60); db(0xdc); db(0x00); db(0x00); db(0x00); db(0x00); db(0x00); db(0x10); db(0x00); db(0x00); db(0x00); db(0x00); db(0x72); db(0x02); db(0x30); db(0x3c); - db(0xff); db(0x48); db(0x61); db(0x00); db(0x0b); db(0x76); db(0x4e); db(0x90); - db(0x22); db(0x00); db(0x6b); db(0x04); db(0x61); db(0x00); db(0x08); db(0x8c); + db(0xff); db(0x48); db(0x61); db(0x00); db(0x15); db(0x5e); db(0x4e); db(0x90); + db(0x22); db(0x00); db(0x6b); db(0x04); db(0x61); db(0x00); db(0x07); db(0xf0); db(0x70); db(0x00); db(0x4e); db(0x75); db(0x48); db(0xe7); db(0x00); db(0x20); - db(0x30); db(0x3c); db(0xff); db(0x50); db(0x61); db(0x00); db(0x0b); db(0x5c); + db(0x30); db(0x3c); db(0xff); db(0x50); db(0x61); db(0x00); db(0x15); db(0x44); db(0x70); db(0x00); db(0x4e); db(0x90); db(0x4a); db(0x80); db(0x67); db(0x00); db(0x00); db(0xa2); db(0x2c); db(0x78); db(0x00); db(0x04); db(0x30); db(0x3c); - db(0xff); db(0x50); db(0x61); db(0x00); db(0x0b); db(0x46); db(0x70); db(0x02); + db(0xff); db(0x50); db(0x61); db(0x00); db(0x15); db(0x2e); db(0x70); db(0x02); db(0x4e); db(0x90); db(0x0c); db(0x40); db(0x00); db(0x01); db(0x6d); db(0x00); db(0x00); db(0x7c); db(0x6e); db(0x06); db(0x4e); db(0xae); db(0xfe); db(0x92); db(0x60); db(0xe4); db(0x0c); db(0x40); db(0x00); db(0x02); db(0x6e); db(0x08); @@ -104,17 +99,29 @@ db(0x00); db(0x18); db(0x25); db(0x49); db(0x00); db(0x1a); db(0x20); db(0x69); db(0x00); db(0x10); db(0x22); db(0x4a); db(0x4e); db(0xae); db(0xfe); db(0x92); db(0x60); db(0x00); db(0xff); db(0x74); db(0x30); db(0x3c); db(0xff); db(0x50); - db(0x61); db(0x00); db(0x0a); db(0xb8); db(0x70); db(0x04); db(0x4e); db(0x90); + db(0x61); db(0x00); db(0x14); db(0xa0); db(0x70); db(0x04); db(0x4e); db(0x90); db(0x70); db(0x01); db(0x4c); db(0xdf); db(0x04); db(0x00); db(0x4e); db(0x75); - db(0x48); db(0xe7); db(0xc0); db(0xc0); db(0x61); db(0x00); db(0xfc); db(0xda); - db(0x70); db(0x1a); db(0x22); db(0x3c); db(0x00); db(0x01); db(0x00); db(0x01); - db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x22); db(0x40); db(0x41); db(0xfa); - db(0x15); db(0x8f); db(0x23); db(0x48); db(0x00); db(0x0a); db(0x41); db(0xfa); - db(0xff); db(0x24); db(0x23); db(0x48); db(0x00); db(0x0e); db(0x41); db(0xfa); - db(0xff); db(0x1c); db(0x23); db(0x48); db(0x00); db(0x12); db(0x33); db(0x7c); - db(0x02); db(0x14); db(0x00); db(0x08); db(0x70); db(0x03); db(0x4e); db(0xae); - db(0xff); db(0x58); db(0x30); db(0x3a); db(0x0c); db(0x02); db(0x67); db(0x04); - db(0x61); db(0x00); db(0x0b); db(0xa0); db(0x4c); db(0xdf); db(0x03); db(0x03); + db(0x48); db(0xe7); db(0xc0); db(0xe0); db(0x30); db(0x3c); db(0xff); db(0x38); + db(0x72); db(0x12); db(0x61); db(0x00); db(0x14); db(0x86); db(0x4e); db(0x90); + db(0x24); db(0x40); db(0x70); db(0x16); db(0x22); db(0x3c); db(0x00); db(0x01); + db(0x00); db(0x01); db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x22); db(0x40); + db(0x13); db(0x7c); db(0x00); db(0x02); db(0x00); db(0x08); db(0x13); db(0x7c); + db(0x00); db(0xf6); db(0x00); db(0x09); db(0x41); db(0xfa); db(0x15); db(0x13); + db(0x23); db(0x48); db(0x00); db(0x0a); db(0x41); db(0xfa); db(0x00); db(0x16); + db(0x23); db(0x48); db(0x00); db(0x12); db(0x23); db(0x4a); db(0x00); db(0x0e); + db(0x70); db(0x05); db(0x4e); db(0xae); db(0xff); db(0x58); db(0x4c); db(0xdf); + db(0x07); db(0x03); db(0x4e); db(0x75); db(0x52); db(0x91); db(0x70); db(0x00); + db(0x4e); db(0x75); db(0x48); db(0xe7); db(0xc0); db(0xc0); db(0x61); db(0x00); + db(0xfc); db(0xb0); db(0x70); db(0x1a); db(0x22); db(0x3c); db(0x00); db(0x01); + db(0x00); db(0x01); db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x22); db(0x40); + db(0x41); db(0xfa); db(0x14); db(0xe6); db(0x23); db(0x48); db(0x00); db(0x0a); + db(0x41); db(0xfa); db(0xfe); db(0xd2); db(0x23); db(0x48); db(0x00); db(0x0e); + db(0x41); db(0xfa); db(0xfe); db(0xca); db(0x23); db(0x48); db(0x00); db(0x12); + db(0x33); db(0x7c); db(0x02); db(0x14); db(0x00); db(0x08); db(0x70); db(0x03); + db(0x4e); db(0xae); db(0xff); db(0x58); db(0x61); db(0x00); db(0xff); db(0x72); + db(0x30); db(0x3c); db(0xff); db(0x38); db(0x72); db(0x04); db(0x61); db(0x00); + db(0x13); db(0xfa); db(0x4e); db(0x90); db(0x4a); db(0x80); db(0x67); db(0x04); + db(0x61); db(0x00); db(0x0a); db(0xcc); db(0x4c); db(0xdf); db(0x03); db(0x03); db(0x4e); db(0x75); db(0x48); db(0xe7); db(0xc0); db(0xf2); db(0x2c); db(0x78); db(0x00); db(0x04); db(0x24); db(0x48); db(0x26); db(0x49); db(0x20); db(0x3c); db(0x00); db(0x00); db(0x00); db(0xbe); db(0x22); db(0x3c); db(0x00); db(0x01); @@ -123,7 +130,7 @@ db(0x00); db(0x00); db(0x00); db(0x0e); db(0x52); db(0x40); db(0x0c); db(0x40); db(0x00); db(0x8c); db(0x66); db(0xf2); db(0x20); db(0x0a); db(0xe4); db(0x88); db(0x21); db(0x40); db(0x00); db(0x36); db(0x22); db(0x48); db(0x41); db(0xfa); - db(0x15); db(0x1f); db(0x23); db(0x48); db(0x00); db(0x0a); db(0x20); db(0x6b); + db(0x14); db(0x68); db(0x23); db(0x48); db(0x00); db(0x0a); db(0x20); db(0x6b); db(0x01); db(0x98); db(0x41); db(0xe8); db(0x00); db(0x12); db(0x4e); db(0xae); db(0xff); db(0x10); db(0x4c); db(0xdf); db(0x4f); db(0x03); db(0x4e); db(0x75); db(0x48); db(0xe7); db(0x7f); db(0x7e); db(0x2c); db(0x78); db(0x00); db(0x04); @@ -134,8 +141,8 @@ db(0xd7); db(0xc0); db(0x28); db(0x4a); db(0x9b); db(0xcd); db(0x7c); db(0x00); db(0x24); db(0x12); db(0x72); db(0x01); db(0x08); db(0x02); db(0x00); db(0x1e); db(0x67); db(0x04); db(0x08); db(0xc1); db(0x00); db(0x01); db(0x08); db(0xc1); - db(0x00); db(0x10); db(0xe5); db(0x8a); db(0x20); db(0x02); db(0x66); db(0x04); - db(0x42); db(0x9a); db(0x60); db(0x1e); db(0x50); db(0x80); db(0x4e); db(0xae); + db(0x00); db(0x10); db(0xe5); db(0x8a); db(0x66); db(0x04); db(0x42); db(0x9a); + db(0x60); db(0x20); db(0x50); db(0x82); db(0x20); db(0x02); db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x4a); db(0x80); db(0x67); db(0x00); db(0x00); db(0xa0); db(0x20); db(0x40); db(0x20); db(0xc2); db(0x24); db(0xc8); db(0x22); db(0x0d); db(0x67); db(0x06); db(0x20); db(0x08); db(0xe4); db(0x88); db(0x2a); db(0x80); @@ -160,13 +167,13 @@ db(0x60); db(0xf4); db(0x48); db(0xe7); db(0x40); db(0xe2); db(0x2c); db(0x78); db(0x00); db(0x04); db(0x41); db(0xee); db(0x01); db(0x50); db(0x20); db(0x50); db(0x4a); db(0x90); db(0x67); db(0x1a); db(0x22); db(0x68); db(0x00); db(0x0a); - db(0x45); db(0xfa); db(0x14); db(0x71); db(0x10); db(0x19); db(0x12); db(0x1a); + db(0x45); db(0xfa); db(0x13); db(0xba); db(0x10); db(0x19); db(0x12); db(0x1a); db(0xb0); db(0x01); db(0x66); db(0x06); db(0x4a); db(0x00); db(0x67); db(0x42); db(0x60); db(0xf2); db(0x20); db(0x50); db(0x60); db(0xe2); db(0x70); db(0x20); db(0x22); db(0x3c); db(0x00); db(0x01); db(0x00); db(0x01); db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x24); db(0x40); db(0x15); db(0x7c); db(0x00); db(0x08); - db(0x00); db(0x08); db(0x41); db(0xfa); db(0x14); db(0x47); db(0x25); db(0x48); - db(0x00); db(0x0a); db(0x41); db(0xfa); db(0x13); db(0xc3); db(0x25); db(0x48); + db(0x00); db(0x08); db(0x41); db(0xfa); db(0x13); db(0x90); db(0x25); db(0x48); + db(0x00); db(0x0a); db(0x41); db(0xfa); db(0x13); db(0x0c); db(0x25); db(0x48); db(0x00); db(0x0e); db(0x41); db(0xea); db(0x00); db(0x12); db(0x20); db(0x88); db(0x58); db(0x90); db(0x21); db(0x48); db(0x00); db(0x08); db(0x41); db(0xee); db(0x01); db(0x50); db(0x22); db(0x4a); db(0x4e); db(0xae); db(0xff); db(0x0a); @@ -271,239 +278,207 @@ db(0x4c); db(0xdf); db(0x7c); db(0xfc); db(0x20); db(0x6c); db(0x00); db(0x24); db(0x4a); db(0x90); db(0x4e); db(0x75); db(0x61); db(0x00); db(0xfc); db(0x7c); db(0x21); db(0x40); db(0x01); db(0x98); db(0x2f); db(0x08); db(0x30); db(0x3c); - db(0xff); db(0xfc); db(0x61); db(0x00); db(0x05); db(0x7e); db(0x2a); db(0x50); - db(0x30); db(0x3c); db(0xff); db(0x28); db(0x61); db(0x00); db(0x05); db(0x74); + db(0xff); db(0xec); db(0x61); db(0x00); db(0x0f); db(0x06); db(0x2a); db(0x50); + db(0x30); db(0x3c); db(0xff); db(0x28); db(0x61); db(0x00); db(0x0e); db(0xfc); db(0x22); db(0x48); db(0x20); db(0x5f); db(0x42); db(0xa8); db(0x01); db(0x90); - db(0x42); db(0xa8); db(0x01); db(0x94); db(0x4e); db(0x91); db(0x4a); db(0x80); - db(0x67); db(0x00); db(0x00); db(0xcc); db(0x20); db(0x28); db(0x01); db(0x90); - db(0x67); db(0x18); db(0x6b); db(0x16); db(0x2f); db(0x08); db(0x72); db(0x01); - db(0x2c); db(0x78); db(0x00); db(0x04); db(0x4e); db(0xae); db(0xff); db(0x3a); - db(0x20); db(0x5f); db(0x21); db(0x40); db(0x01); db(0x94); db(0x67); db(0x00); - db(0x00); db(0xae); db(0x2c); db(0x4c); db(0x2f); db(0x08); db(0x4e); db(0xae); - db(0xff); db(0x70); db(0x20); db(0x5f); db(0x22); db(0x48); db(0x26); db(0x40); - db(0x30); db(0x3c); db(0xff); db(0x20); db(0x61); db(0x00); db(0x05); db(0x2c); - db(0x4e); db(0x90); db(0x70); db(0x00); db(0x27); db(0x40); db(0x00); db(0x08); - db(0x27); db(0x40); db(0x00); db(0x10); db(0x27); db(0x40); db(0x00); db(0x20); - db(0x20); db(0x29); db(0x01); db(0x94); db(0x67); db(0x22); db(0x20); db(0x40); - db(0x61); db(0x00); db(0xfb); db(0x06); db(0x48); db(0xe7); db(0x80); db(0xc0); - db(0x20); db(0x29); db(0x01); db(0x90); db(0x22); db(0x69); db(0x01); db(0x94); - db(0x2c); db(0x78); db(0x00); db(0x04); db(0x4e); db(0xae); db(0xff); db(0x2e); - db(0x4c); db(0xdf); db(0x03); db(0x01); db(0x61); db(0x00); db(0xfa); db(0x94); - db(0x30); db(0x3c); db(0xff); db(0x18); db(0x61); db(0x00); db(0x04); db(0xec); - db(0x4e); db(0x90); db(0x16); db(0x29); db(0x00); db(0x4f); db(0x0c); db(0x03); - db(0x00); db(0x80); db(0x67); db(0x38); db(0x2c); db(0x78); db(0x00); db(0x04); - db(0x70); db(0x14); db(0x22); db(0x3c); db(0x00); db(0x01); db(0x00); db(0x01); - db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x22); db(0x40); db(0x30); db(0x3c); - db(0x10); db(0x00); db(0x80); db(0x03); db(0x33); db(0x40); db(0x00); db(0x08); - db(0x23); db(0x6d); db(0x01); db(0x04); db(0x00); db(0x0a); db(0x23); db(0x4b); - db(0x00); db(0x10); db(0x41); db(0xec); db(0x00); db(0x4a); db(0x4e); db(0xae); - db(0xff); db(0x7c); db(0x4e); db(0xae); db(0xfe); db(0xf2); db(0x4e); db(0xae); - db(0xff); db(0x76); db(0x60); db(0x12); db(0x24); db(0x49); db(0x20); db(0x4b); - db(0x72); db(0x00); db(0x22); db(0x41); db(0x72); db(0x01); db(0x70); db(0xec); - db(0x2c); db(0x4c); db(0x4e); db(0xae); db(0xff); db(0x6a); db(0x4e); db(0x75); - db(0x61); db(0x00); db(0xfb); db(0x80); db(0x21); db(0x40); db(0x01); db(0x98); - db(0x2f); db(0x08); db(0x30); db(0x3c); db(0xff); db(0xfc); db(0x61); db(0x00); - db(0x04); db(0x82); db(0x2a); db(0x50); db(0x30); db(0x3c); db(0xff); db(0x28); - db(0x61); db(0x00); db(0x04); db(0x78); db(0x22); db(0x48); db(0x20); db(0x5f); - db(0x42); db(0xa8); db(0x01); db(0x90); db(0x42); db(0xa8); db(0x01); db(0x94); - db(0x4e); db(0x91); db(0x26); db(0x00); db(0x0c); db(0x43); db(0xff); db(0xfe); - db(0x67); db(0x00); db(0xf8); db(0x7a); db(0x20); db(0x28); db(0x01); db(0x90); - db(0x67); db(0x14); db(0x6b); db(0x12); db(0x2f); db(0x08); db(0x72); db(0x01); - db(0x2c); db(0x78); db(0x00); db(0x04); db(0x4e); db(0xae); db(0xff); db(0x3a); - db(0x20); db(0x5f); db(0x21); db(0x40); db(0x01); db(0x94); db(0x4a); db(0x83); - db(0x6a); db(0x0e); db(0x22); db(0x48); db(0x30); db(0x3c); db(0xff); db(0x20); - db(0x61); db(0x00); db(0x04); db(0x38); db(0x4e); db(0x90); db(0x60); db(0x26); - db(0x2c); db(0x4c); db(0x2f); db(0x08); db(0x4e); db(0xae); db(0xff); db(0x70); - db(0x20); db(0x5f); db(0x22); db(0x48); db(0x26); db(0x40); db(0x30); db(0x3c); - db(0xff); db(0x20); db(0x61); db(0x00); db(0x04); db(0x1e); db(0x4e); db(0x90); - db(0x70); db(0x00); db(0x27); db(0x40); db(0x00); db(0x08); db(0x27); db(0x40); - db(0x00); db(0x10); db(0x27); db(0x40); db(0x00); db(0x20); db(0x4a); db(0xa9); - db(0x01); db(0x94); db(0x67); db(0x28); db(0x20); db(0x69); db(0x01); db(0x94); - db(0x61); db(0x00); db(0xf9); db(0xf6); db(0x48); db(0xe7); db(0x80); db(0xc0); - db(0x20); db(0x29); db(0x01); db(0x90); db(0x22); db(0x69); db(0x01); db(0x94); - db(0x2c); db(0x78); db(0x00); db(0x04); db(0x4e); db(0xae); db(0xff); db(0x2e); - db(0x4c); db(0xdf); db(0x03); db(0x01); db(0x4a); db(0x80); db(0x67); db(0x04); - db(0x61); db(0x00); db(0xf9); db(0x80); db(0x4a); db(0x83); db(0x6b); db(0x00); - db(0xf7); db(0xf4); db(0x30); db(0x3c); db(0xff); db(0x18); db(0x61); db(0x00); - db(0x03); db(0xd2); db(0x4e); db(0x90); db(0x20); db(0x03); db(0x16); db(0x29); - db(0x00); db(0x4f); db(0x4a); db(0x80); db(0x66); db(0x1a); db(0x27); db(0x7c); - db(0x00); db(0x00); db(0x17); db(0x70); db(0x00); db(0x14); db(0x41); db(0xfa); - db(0xf5); db(0xb4); db(0x20); db(0x08); db(0xe4); db(0x88); db(0x27); db(0x40); - db(0x00); db(0x20); db(0x70); db(0xff); db(0x27); db(0x40); db(0x00); db(0x24); - db(0x08); db(0x07); db(0x00); db(0x00); db(0x67); db(0x40); db(0x0c); db(0x03); - db(0x00); db(0x80); db(0x67); db(0x3a); db(0x2c); db(0x78); db(0x00); db(0x04); - db(0x70); db(0x14); db(0x22); db(0x3c); db(0x00); db(0x01); db(0x00); db(0x01); - db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x22); db(0x40); db(0x30); db(0x3c); - db(0x10); db(0x00); db(0x80); db(0x03); db(0x33); db(0x40); db(0x00); db(0x08); - db(0x23); db(0x6d); db(0x01); db(0x04); db(0x00); db(0x0a); db(0x23); db(0x4b); - db(0x00); db(0x10); db(0x41); db(0xec); db(0x00); db(0x4a); db(0x4e); db(0xae); - db(0xff); db(0x7c); db(0x4e); db(0xae); db(0xfe); db(0xf2); db(0x4e); db(0xae); - db(0xff); db(0x76); db(0x70); db(0x00); db(0x4e); db(0x75); db(0x24); db(0x49); - db(0x20); db(0x4b); db(0x72); db(0x00); db(0x22); db(0x41); db(0x08); db(0x07); - db(0x00); db(0x01); db(0x67); db(0x08); db(0x08); db(0x07); db(0x00); db(0x02); - db(0x67); db(0x02); db(0x72); db(0x01); db(0x70); db(0x80); db(0x2c); db(0x4c); - db(0x4e); db(0xae); db(0xff); db(0x6a); db(0x08); db(0x07); db(0x00); db(0x01); - db(0x67); db(0x5c); db(0x08); db(0x07); db(0x00); db(0x02); db(0x66); db(0x56); - db(0x20); db(0x52); db(0x74); db(0x02); db(0x52); db(0x82); db(0x4a); db(0x30); - db(0x28); db(0xfd); db(0x66); db(0xf8); db(0x2c); db(0x78); db(0x00); db(0x04); - db(0x20); db(0x02); db(0x72); db(0x01); db(0x4e); db(0xae); db(0xff); db(0x3a); - db(0x4a); db(0x80); db(0x67); db(0x3a); db(0x20); db(0x52); db(0x24); db(0x40); - db(0x22); db(0x4a); db(0x12); db(0xd8); db(0x66); db(0xfc); db(0x13); db(0x7c); - db(0x00); db(0x3a); db(0xff); db(0xff); db(0x42); db(0x11); db(0x2c); db(0x78); - db(0x00); db(0x04); db(0x43); db(0xfa); db(0x0e); db(0x3e); db(0x70); db(0x00); - db(0x4e); db(0xae); db(0xfd); db(0xd8); db(0x2c); db(0x40); db(0x22); db(0x0a); - db(0x4e); db(0xae); db(0xff); db(0x52); db(0x22); db(0x4e); db(0x2c); db(0x78); - db(0x00); db(0x04); db(0x4e); db(0xae); db(0xfe); db(0x62); db(0x22); db(0x4a); - db(0x20); db(0x02); db(0x4e); db(0xae); db(0xff); db(0x2e); db(0x70); db(0x00); - db(0x4e); db(0x75); db(0x48); db(0xe7); db(0x3f); db(0x3e); db(0x2c); db(0x01); - db(0x7e); db(0x06); db(0x2c); db(0x78); db(0x00); db(0x04); db(0x43); db(0xfa); - db(0x0e); db(0x39); db(0x70); db(0x24); db(0x4e); db(0xae); db(0xfd); db(0xd8); - db(0x4a); db(0x80); db(0x66); db(0x0e); db(0x08); db(0x87); db(0x00); db(0x02); - db(0x43); db(0xfa); db(0x0e); db(0x27); db(0x70); db(0x00); db(0x4e); db(0xae); - db(0xfd); db(0xd8); db(0x28); db(0x40); db(0x20); db(0x3c); db(0x00); db(0x00); - db(0x02); db(0x2c); db(0x22); db(0x3c); db(0x00); db(0x01); db(0x00); db(0x01); - db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x20); db(0x40); db(0x4a); db(0x80); - db(0x67); db(0x2c); db(0x21); db(0x4c); db(0x01); db(0x9c); db(0x48); db(0xe7); - db(0x00); db(0x8a); db(0x61); db(0x00); db(0xfe); db(0x04); db(0x4c); db(0xdf); - db(0x51); db(0x00); db(0x0c); db(0x80); db(0xff); db(0xff); db(0xff); db(0xfe); - db(0x67); db(0x08); db(0x48); db(0x46); db(0x52); db(0x46); db(0x48); db(0x46); - db(0x60); db(0xe4); db(0x22); db(0x48); db(0x20); db(0x3c); db(0x00); db(0x00); - db(0x02); db(0x2c); db(0x4e); db(0xae); db(0xff); db(0x2e); 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db(0x20); db(0x10); db(0x67); db(0x1e); db(0x20); db(0x40); - db(0x20); db(0x10); db(0x67); db(0x18); db(0x70); db(0x00); db(0x22); db(0x80); - db(0x22); db(0x4a); db(0x24); db(0x51); db(0x70); db(0x18); db(0x4e); db(0xae); - db(0xff); db(0x2e); db(0x06); db(0x86); db(0x00); db(0x01); db(0x00); db(0x00); - db(0x20); db(0x0a); db(0x66); db(0xec); db(0x26); db(0x87); db(0x2a); db(0x1f); - db(0x4e); db(0x75); db(0x41); db(0xfa); db(0xf1); db(0xf0); db(0x02); db(0x80); - db(0x00); db(0x00); db(0xff); db(0xff); db(0xd1); db(0xc0); db(0x4e); db(0x75); - db(0x20); db(0x88); db(0x58); db(0x90); db(0x42); db(0xa8); db(0x00); db(0x04); - db(0x21); db(0x48); db(0x00); db(0x08); db(0x4e); db(0x75); db(0x48); db(0xe7); - db(0x20); db(0x22); db(0x2c); db(0x78); db(0x00); db(0x04); db(0x70); db(0xff); - db(0x4e); db(0xae); db(0xfe); db(0xb6); db(0x91); db(0xc8); db(0x24); db(0x00); - db(0x6b); db(0x32); db(0x70); db(0x22); db(0x22); db(0x3c); db(0x00); db(0x01); - db(0x00); db(0x01); db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x91); db(0xc8); - db(0x24); db(0x40); db(0x4a); db(0x80); db(0x67); db(0x1e); db(0x15); db(0x7c); - db(0x00); db(0x04); db(0x00); db(0x08); db(0x15); db(0x42); db(0x00); db(0x0f); - db(0x93); db(0xc9); db(0x4e); db(0xae); db(0xfe); db(0xda); db(0x25); db(0x40); - db(0x00); db(0x10); db(0x41); db(0xea); db(0x00); db(0x14); db(0x61); db(0x00); - db(0xff); db(0xb0); db(0x20); db(0x4a); db(0x20); db(0x08); db(0x4c); db(0xdf); - db(0x44); db(0x04); db(0x4e); db(0x75); db(0x48); db(0xe7); db(0x20); db(0x22); - db(0x2c); db(0x78); db(0x00); db(0x04); db(0x4a); db(0x80); db(0x67); db(0x24); - db(0x24); db(0x40); db(0x24); db(0x01); db(0x66); db(0x02); db(0x74); db(0x30); - db(0x20); db(0x02); db(0x22); db(0x3c); db(0x00); db(0x01); db(0x00); db(0x01); - db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x20); db(0x40); db(0x11); db(0x7c); - db(0x00); db(0x0a); db(0x00); db(0x08); db(0x31); db(0x42); db(0x00); db(0x12); - db(0x21); db(0x4a); db(0x00); db(0x0e); db(0x4a); db(0x80); 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- db(0x00); db(0x34); db(0x24); db(0x40); db(0x15); db(0x7c); db(0x00); db(0x01); - db(0x00); db(0x08); db(0x15); db(0x44); db(0x00); db(0x09); db(0x25); db(0x42); - db(0x00); db(0x0a); db(0x47); db(0xea); db(0x00); db(0x5c); db(0x25); db(0x4b); - db(0x00); db(0x3a); db(0x47); db(0xeb); db(0x08); db(0x00); db(0x25); db(0x4b); - db(0x00); db(0x3e); db(0x25); db(0x4b); db(0x00); db(0x36); db(0x22); db(0x4a); - db(0x24); db(0x43); db(0x97); db(0xcb); db(0x24); db(0x09); db(0x4e); db(0xae); - db(0xfe); db(0xe6); db(0x20); db(0x02); db(0x4c); db(0xdf); db(0x4c); db(0x1c); - db(0x4e); db(0x75); db(0x41); db(0xfa); db(0x09); db(0xb2); db(0x43); db(0xfa); - db(0x01); db(0x5c); db(0x70); db(0x13); db(0x61); db(0x00); db(0xff); db(0x98); - db(0x4e); db(0x75); db(0x22); db(0x6d); db(0x02); db(0x0c); db(0x33); db(0x7c); - db(0x00); db(0x0a); db(0x00); db(0x1c); db(0x13); db(0x7c); db(0x00); db(0x01); - db(0x00); db(0x1e); db(0x4e); db(0xae); db(0xfe); db(0x38); db(0x22); db(0x6d); - db(0x02); db(0x0c); db(0x25); db(0x69); db(0x00); db(0x20); db(0x00); db(0x0e); - db(0x25); db(0x69); db(0x00); db(0x24); db(0x00); db(0x12); db(0x22); db(0x6d); - db(0x02); db(0x08); db(0x13); db(0x7c); db(0x00); db(0x01); db(0x00); db(0x1e); - db(0x4e); db(0xae); db(0xfe); db(0x38); db(0x4e); db(0x75); db(0x42); db(0xaa); - db(0x00); db(0x0e); db(0x42); db(0xaa); db(0x00); db(0x12); db(0x22); db(0x6d); - db(0x02); db(0x08); db(0x13); db(0x7c); db(0x00); db(0x01); db(0x00); db(0x1e); - db(0x4e); db(0xae); db(0xfe); db(0x38); db(0x4e); db(0x75); db(0x00); db(0x00); - db(0xff); db(0xff); db(0x00); db(0x00); db(0x00); db(0x00); db(0x00); db(0x00); - db(0x00); db(0x00); db(0x00); db(0x00); db(0x00); db(0x00); db(0x00); db(0x00); - db(0x00); db(0x00); db(0x00); db(0x00); db(0x00); db(0x00); db(0x00); db(0x00); - db(0x00); db(0x00); db(0x00); db(0x00); db(0x00); db(0x00); db(0x00); db(0x00); - db(0x00); db(0x00); db(0x00); db(0x00); db(0x00); db(0x00); db(0x00); db(0x00); - db(0x00); db(0x00); db(0x48); db(0xe7); db(0xf8); db(0xfe); db(0x2a); db(0x48); + db(0x42); db(0xa8); db(0x01); db(0x94); db(0x4e); db(0x91); db(0x26); db(0x00); + db(0x0c); db(0x43); db(0xff); db(0xfe); db(0x67); db(0x00); db(0xf9); db(0x16); + db(0x20); db(0x28); db(0x01); db(0x90); db(0x67); db(0x14); db(0x6b); db(0x12); + db(0x2f); db(0x08); db(0x72); db(0x01); db(0x2c); db(0x78); db(0x00); db(0x04); + db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x20); db(0x5f); db(0x21); db(0x40); + db(0x01); db(0x94); db(0x4a); db(0x83); db(0x6a); db(0x0e); db(0x22); db(0x48); + db(0x30); db(0x3c); db(0xff); db(0x20); db(0x61); db(0x00); db(0x0e); db(0xbc); + db(0x4e); db(0x90); db(0x60); db(0x26); db(0x2c); db(0x4c); db(0x2f); db(0x08); + db(0x4e); db(0xae); db(0xff); db(0x70); db(0x20); db(0x5f); db(0x22); db(0x48); + db(0x26); db(0x40); db(0x30); db(0x3c); db(0xff); db(0x20); db(0x61); db(0x00); + db(0x0e); db(0xa2); db(0x4e); db(0x90); db(0x70); db(0x00); db(0x27); db(0x40); + db(0x00); db(0x08); db(0x27); db(0x40); db(0x00); db(0x10); db(0x27); db(0x40); + db(0x00); db(0x20); db(0x4a); db(0xa9); db(0x01); db(0x94); db(0x67); db(0x28); + db(0x20); db(0x69); db(0x01); db(0x94); db(0x61); db(0x00); db(0xfa); db(0xf2); + db(0x48); db(0xe7); db(0x80); db(0xc0); db(0x20); db(0x29); db(0x01); db(0x90); + db(0x22); db(0x69); db(0x01); db(0x94); db(0x2c); db(0x78); db(0x00); db(0x04); + db(0x4e); db(0xae); db(0xff); db(0x2e); db(0x4c); db(0xdf); db(0x03); db(0x01); + db(0x4a); db(0x80); db(0x67); db(0x04); db(0x61); db(0x00); db(0xfa); db(0x7c); + db(0x4a); db(0x83); db(0x6b); db(0x00); db(0xf8); db(0x90); db(0x30); db(0x3c); + db(0xff); db(0x18); db(0x61); db(0x00); db(0x0e); db(0x56); db(0x4e); db(0x90); + db(0x20); db(0x03); db(0x16); db(0x29); db(0x00); db(0x4f); db(0x4a); db(0x80); + db(0x66); db(0x1a); db(0x27); db(0x7c); db(0x00); db(0x00); db(0x17); db(0x70); + db(0x00); db(0x14); db(0x41); db(0xfa); db(0xf6); db(0x78); db(0x20); db(0x08); + db(0xe4); db(0x88); db(0x27); db(0x40); db(0x00); db(0x20); db(0x70); db(0xff); + db(0x27); db(0x40); db(0x00); db(0x24); db(0x08); db(0x07); db(0x00); db(0x00); + db(0x67); db(0x40); db(0x0c); db(0x03); db(0x00); db(0x80); db(0x67); db(0x3a); + db(0x2c); db(0x78); db(0x00); db(0x04); db(0x70); db(0x14); db(0x22); db(0x3c); + db(0x00); db(0x01); db(0x00); db(0x01); db(0x4e); db(0xae); db(0xff); db(0x3a); + db(0x22); db(0x40); db(0x30); db(0x3c); db(0x10); db(0x00); db(0x80); db(0x03); + db(0x33); db(0x40); db(0x00); db(0x08); db(0x23); db(0x6d); db(0x01); db(0x04); + db(0x00); db(0x0a); db(0x23); db(0x4b); db(0x00); db(0x10); db(0x41); db(0xec); + db(0x00); db(0x4a); db(0x4e); db(0xae); db(0xff); db(0x7c); db(0x4e); db(0xae); + db(0xfe); db(0xf2); db(0x4e); db(0xae); db(0xff); db(0x76); db(0x70); db(0x00); + db(0x4e); db(0x75); db(0x24); db(0x49); db(0x20); db(0x4b); db(0x72); db(0x00); + db(0x22); db(0x41); db(0x08); db(0x07); db(0x00); db(0x01); db(0x67); db(0x08); + db(0x08); db(0x07); db(0x00); db(0x02); db(0x67); db(0x02); db(0x72); db(0x01); + db(0x70); db(0x80); db(0x2c); db(0x4c); db(0x4e); db(0xae); db(0xff); db(0x6a); + db(0x08); db(0x07); db(0x00); db(0x01); db(0x67); db(0x5c); db(0x08); db(0x07); + db(0x00); db(0x02); db(0x66); db(0x56); db(0x20); db(0x52); db(0x74); db(0x02); + db(0x52); db(0x82); db(0x4a); db(0x30); db(0x28); db(0xfd); db(0x66); db(0xf8); + db(0x2c); db(0x78); db(0x00); db(0x04); db(0x20); db(0x02); db(0x72); db(0x01); + db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x4a); db(0x80); db(0x67); db(0x3a); + db(0x20); db(0x52); db(0x24); db(0x40); db(0x22); db(0x4a); db(0x12); db(0xd8); + db(0x66); db(0xfc); db(0x13); db(0x7c); db(0x00); db(0x3a); db(0xff); db(0xff); + db(0x42); db(0x11); db(0x2c); db(0x78); db(0x00); db(0x04); db(0x43); db(0xfa); + db(0x0e); db(0x83); db(0x70); db(0x00); db(0x4e); db(0xae); db(0xfd); db(0xd8); + db(0x2c); db(0x40); db(0x22); db(0x0a); db(0x4e); db(0xae); db(0xff); db(0x52); + db(0x22); db(0x4e); db(0x2c); db(0x78); db(0x00); db(0x04); db(0x4e); db(0xae); + db(0xfe); db(0x62); db(0x22); db(0x4a); db(0x20); db(0x02); db(0x4e); db(0xae); + db(0xff); db(0x2e); db(0x70); db(0x00); db(0x4e); db(0x75); db(0x48); db(0xe7); + db(0x3f); db(0x3e); db(0x2c); db(0x01); db(0x7e); db(0x06); db(0x2c); db(0x78); + db(0x00); db(0x04); db(0x43); db(0xfa); db(0x0e); db(0x7e); db(0x70); db(0x24); + db(0x4e); db(0xae); db(0xfd); db(0xd8); db(0x4a); db(0x80); db(0x66); db(0x0e); + db(0x08); db(0x87); db(0x00); db(0x02); db(0x43); db(0xfa); db(0x0e); db(0x6c); + db(0x70); db(0x00); db(0x4e); db(0xae); db(0xfd); db(0xd8); db(0x28); db(0x40); + db(0x20); db(0x3c); db(0x00); db(0x00); db(0x02); db(0x2c); db(0x22); db(0x3c); + db(0x00); db(0x01); db(0x00); db(0x01); db(0x4e); db(0xae); db(0xff); db(0x3a); + db(0x20); db(0x40); db(0x4a); db(0x80); db(0x67); db(0x2c); db(0x21); db(0x4c); + db(0x01); db(0x9c); db(0x48); db(0xe7); db(0x00); db(0x8a); db(0x61); db(0x00); + db(0xfe); db(0x04); db(0x4c); db(0xdf); db(0x51); db(0x00); db(0x0c); db(0x80); + db(0xff); db(0xff); db(0xff); db(0xfe); db(0x67); db(0x08); db(0x48); db(0x46); + db(0x52); db(0x46); db(0x48); db(0x46); db(0x60); db(0xe4); db(0x22); db(0x48); + db(0x20); db(0x3c); db(0x00); db(0x00); db(0x02); db(0x2c); db(0x4e); db(0xae); + db(0xff); db(0x2e); db(0x22); db(0x4c); db(0x4e); db(0xae); db(0xfe); db(0x62); + db(0x4c); db(0xdf); db(0x7c); db(0xfc); db(0x4e); db(0x75); db(0x30); db(0x3c); + db(0xff); db(0x58); db(0x61); db(0x00); db(0x0c); db(0xe6); db(0x70); db(0x03); + db(0x4e); db(0x90); db(0x22); db(0x6b); db(0x00); db(0xa8); db(0x23); db(0x40); + db(0x00); db(0x20); db(0x67); db(0x16); db(0x70); db(0x00); db(0x23); db(0x40); + db(0x00); db(0x24); db(0x33); db(0x7c); db(0x00); db(0x0b); db(0x00); db(0x1c); + db(0x13); db(0x7c); db(0x00); db(0x01); db(0x00); db(0x1e); db(0x4e); db(0xae); + db(0xfe); db(0x38); db(0x4e); db(0x75); db(0x2c); db(0x78); db(0x00); db(0x04); + db(0x93); db(0xc9); db(0x4e); db(0xae); db(0xfe); db(0xda); db(0x20); db(0x40); + db(0x4b); db(0xe8); db(0x00); db(0x5c); db(0x43); db(0xfa); db(0x0d); db(0xa5); + db(0x70); db(0x00); db(0x4e); db(0xae); db(0xfd); db(0xd8); db(0x24); db(0x40); + db(0x20); db(0x3c); db(0x00); db(0x00); db(0x00); db(0xb9); db(0x22); db(0x3c); + db(0x00); db(0x01); db(0x00); db(0x01); db(0x4e); db(0xae); db(0xff); db(0x3a); + db(0x26); db(0x40); db(0x7c); db(0x00); db(0x26); db(0x86); db(0x27); db(0x46); + db(0x00); db(0x04); db(0x27); db(0x46); db(0x00); db(0x08); db(0x27); db(0x4a); + db(0x00); db(0xa0); db(0x50); db(0xeb); db(0x00); db(0x9e); db(0x93); db(0xc9); + db(0x4e); db(0xae); db(0xfe); db(0xda); db(0x27); db(0x40); db(0x00); db(0xb0); + db(0x41); db(0xfa); db(0x0c); db(0x7e); db(0x70); db(0x00); db(0x72); db(0x00); + db(0x61); db(0x00); db(0x02); db(0xae); db(0x27); db(0x40); db(0x00); db(0xa4); + db(0x41); db(0xfa); db(0x0c); db(0x7b); db(0x70); db(0x00); db(0x72); db(0x00); + db(0x61); db(0x00); db(0x02); db(0x9e); db(0x27); db(0x40); db(0x00); db(0xa8); + db(0x7a); db(0x00); db(0x20); db(0x4d); db(0x4e); db(0xae); db(0xfe); db(0x80); + db(0x20); db(0x4d); db(0x4e); db(0xae); db(0xfe); db(0x8c); db(0x28); db(0x40); + db(0x26); db(0x2c); db(0x00); db(0x0a); db(0x30); db(0x3c); db(0xff); db(0x40); + db(0x61); db(0x00); db(0x0c); db(0x38); db(0x70); db(0x00); db(0x4e); db(0x90); + db(0x24); db(0x00); db(0x70); db(0x01); db(0x61); db(0x00); db(0xfa); db(0x04); + db(0x08); db(0x02); db(0x00); db(0x01); db(0x67); db(0x06); db(0x70); db(0x01); + db(0x61); db(0x00); db(0xfb); db(0x6c); db(0x60); db(0x00); db(0x01); db(0x2e); + db(0x20); db(0x4d); db(0x4e); db(0xae); db(0xfe); db(0x8c); db(0x28); db(0x40); + db(0x4a); db(0x80); db(0x66); db(0x10); db(0x70); db(0x00); db(0x12); db(0x2d); + db(0x00); db(0x0f); db(0x03); db(0xc0); db(0x08); db(0xc0); db(0x00); db(0x0d); + db(0x4e); db(0xae); db(0xfe); db(0xc2); db(0x4a); db(0x2b); db(0x00); db(0xad); + db(0x67); db(0x08); db(0x61); db(0x00); db(0xff); db(0x0a); db(0x42); db(0x2b); + db(0x00); db(0xad); db(0x4a); db(0x2b); db(0x00); db(0xac); db(0x67); db(0x24); + db(0x30); db(0x3c); db(0xff); db(0x58); db(0x61); db(0x00); db(0x0b); db(0xe4); + db(0x70); db(0x01); db(0x4e); db(0x90); db(0x4a); db(0x80); db(0x67); db(0x04); + db(0x61); db(0x00); db(0xfb); db(0xfa); db(0x42); db(0x2b); db(0x00); db(0xac); + db(0x30); db(0x3c); db(0xff); db(0x58); db(0x61); db(0x00); db(0x0b); db(0xcc); + db(0x70); db(0x02); db(0x4e); db(0x90); db(0x20); db(0x0c); db(0x67); db(0x56); + db(0x0c); db(0x6c); db(0x00); db(0x26); db(0x00); db(0x12); db(0x66); db(0x4e); + db(0x0c); db(0xac); db(0x40); db(0x00); db(0x00); db(0x00); db(0x00); db(0x14); + db(0x66); db(0x44); db(0x0c); db(0x6c); db(0x12); db(0x34); db(0x00); db(0x18); + db(0x66); db(0x3c); db(0x20); db(0x6c); db(0x00); db(0x1a); db(0x20); db(0x28); + db(0x00); db(0x0c); db(0x02); db(0x80); db(0x80); db(0x00); db(0x00); db(0x08); + db(0x0c); db(0x80); db(0x80); db(0x00); db(0x00); db(0x08); db(0x66); db(0x1a); + db(0x02); db(0xa8); db(0x7f); db(0xff); db(0xff); db(0xff); db(0x00); db(0x0c); + db(0x20); db(0x68); db(0x00); db(0x10); db(0x22); db(0x4c); db(0x12); db(0xbc); + db(0x00); db(0x08); db(0x4e); db(0xae); db(0xfe); db(0x92); db(0x60); db(0x00); + db(0xff); db(0x60); db(0x22); db(0x4c); db(0x70); db(0x26); db(0x4e); db(0xae); + db(0xff); db(0x2e); db(0x60); db(0x00); db(0xff); db(0x54); db(0x74); db(0xfe); + db(0x20); db(0x0c); db(0x67); db(0x14); db(0x26); db(0x2c); db(0x00); db(0x0a); + db(0x66); db(0x42); db(0x74); db(0xff); db(0x30); db(0x3c); db(0xff); db(0x50); + db(0x61); db(0x00); db(0x0b); db(0x58); db(0x70); db(0x01); db(0x4e); db(0x90); + db(0x45); db(0xeb); db(0x00); db(0x04); db(0x20); db(0x52); db(0x20); db(0x08); + db(0x67); db(0x00); db(0xff); db(0x2e); db(0x22); db(0x50); db(0x20); db(0x40); + db(0x20); db(0x28); db(0x00); db(0x04); db(0xb4); db(0x80); db(0x66); db(0x16); + db(0x48); db(0xe7); db(0x00); db(0xc0); db(0x28); db(0x68); db(0x00); db(0x0a); + db(0x61); db(0x4a); db(0x53); db(0x85); db(0x4c); db(0xdf); db(0x03); db(0x00); + db(0x24); db(0x89); db(0x20); db(0x49); db(0x60); db(0xd8); db(0x24); db(0x48); + db(0x20); db(0x49); db(0x60); db(0xd2); db(0x0c); db(0x85); db(0x00); db(0x00); + db(0x00); db(0x14); db(0x65); db(0x00); db(0x00); db(0x0a); db(0x70); db(0x01); + db(0x29); db(0x40); db(0x00); db(0x04); db(0x60); db(0x12); db(0x61); db(0x5e); + db(0x30); db(0x3c); db(0xff); db(0x30); db(0x61); db(0x00); db(0x0b); db(0x04); + db(0x4e); db(0x90); db(0x4a); db(0x80); db(0x67); db(0x0e); db(0x52); db(0x85); + db(0x28); db(0xab); db(0x00); db(0x04); db(0x27); db(0x4c); db(0x00); db(0x04); + db(0x60); db(0x00); db(0xfe); db(0xd6); db(0x28); db(0x43); db(0x61); db(0x04); + db(0x60); db(0x00); db(0xfe); db(0xce); db(0x0c); db(0xac); db(0x00); db(0x00); + db(0x00); db(0x1f); db(0x00); db(0x08); db(0x66); db(0x04); db(0x61); db(0x00); + db(0xfa); db(0xe2); db(0x0c); db(0xac); db(0x00); db(0x00); db(0x04); db(0x09); + db(0x00); db(0x08); db(0x66); db(0x14); db(0x61); db(0x00); db(0xfb); db(0x10); + db(0x66); db(0x0e); db(0x30); db(0x3c); db(0xff); db(0x58); db(0x61); db(0x00); + db(0x0a); db(0xc2); db(0x70); db(0x00); db(0x4e); db(0x90); db(0x60); db(0xec); + db(0x22); db(0x54); db(0x20); db(0x6c); db(0x00); db(0x04); db(0x29); db(0x4d); + db(0x00); db(0x04); db(0x4e); db(0xee); db(0xfe); db(0x92); db(0x2f); db(0x05); + db(0x7a); db(0xfc); db(0x24); db(0x53); db(0x2e); db(0x0a); db(0x22); db(0x0a); + db(0x67); db(0x00); db(0x00); db(0x0c); db(0x52); db(0x85); db(0x67); db(0x1e); + db(0x22); db(0x4a); db(0x24); db(0x52); db(0x60); db(0xf0); db(0x52); db(0x85); + db(0x67); db(0x3c); db(0x24); db(0x47); db(0x70); db(0x18); db(0x72); db(0x01); + db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x52); db(0x46); db(0x24); db(0x40); + db(0x24); db(0x87); db(0x2e); db(0x0a); db(0x60); db(0xe8); db(0x20); db(0x12); + db(0x67); db(0x24); db(0x20); db(0x40); db(0x20); db(0x10); db(0x67); db(0x1e); + db(0x20); db(0x40); db(0x20); db(0x10); db(0x67); db(0x18); db(0x70); db(0x00); + db(0x22); db(0x80); db(0x22); db(0x4a); db(0x24); db(0x51); db(0x70); db(0x18); + db(0x4e); db(0xae); db(0xff); db(0x2e); db(0x06); db(0x86); db(0x00); db(0x01); + db(0x00); db(0x00); db(0x20); db(0x0a); db(0x66); db(0xec); db(0x26); db(0x87); + db(0x2a); db(0x1f); db(0x4e); db(0x75); db(0x20); db(0x88); db(0x58); db(0x90); + db(0x42); db(0xa8); db(0x00); db(0x04); db(0x21); db(0x48); db(0x00); db(0x08); + db(0x4e); db(0x75); db(0x48); db(0xe7); db(0x20); db(0x22); db(0x2c); db(0x78); + db(0x00); db(0x04); db(0x70); db(0xff); db(0x4e); db(0xae); db(0xfe); db(0xb6); + db(0x91); db(0xc8); db(0x24); db(0x00); db(0x6b); db(0x32); db(0x70); db(0x22); + db(0x22); db(0x3c); db(0x00); db(0x01); db(0x00); db(0x01); db(0x4e); db(0xae); + db(0xff); db(0x3a); db(0x91); db(0xc8); db(0x24); db(0x40); db(0x4a); db(0x80); + db(0x67); db(0x1e); db(0x15); db(0x7c); db(0x00); db(0x04); db(0x00); db(0x08); + db(0x15); db(0x42); db(0x00); db(0x0f); db(0x93); db(0xc9); db(0x4e); db(0xae); + db(0xfe); db(0xda); db(0x25); db(0x40); db(0x00); db(0x10); db(0x41); db(0xea); + db(0x00); db(0x14); db(0x61); db(0x00); db(0xff); db(0xb0); db(0x20); db(0x4a); + db(0x20); db(0x08); db(0x4c); db(0xdf); db(0x44); db(0x04); db(0x4e); db(0x75); + db(0x48); db(0xe7); db(0x20); db(0x22); db(0x2c); db(0x78); db(0x00); db(0x04); + db(0x4a); db(0x80); db(0x67); db(0x24); db(0x24); db(0x40); db(0x24); db(0x01); + db(0x66); db(0x02); db(0x74); db(0x30); db(0x20); db(0x02); db(0x22); db(0x3c); + db(0x00); db(0x01); db(0x00); db(0x01); db(0x4e); db(0xae); db(0xff); db(0x3a); + db(0x20); db(0x40); db(0x11); db(0x7c); db(0x00); db(0x0a); db(0x00); db(0x08); + db(0x31); db(0x42); db(0x00); db(0x12); db(0x21); db(0x4a); db(0x00); db(0x0e); + db(0x4a); db(0x80); db(0x4c); db(0xdf); db(0x44); db(0x04); db(0x4e); db(0x75); + db(0x48); db(0xe7); db(0x30); db(0x22); db(0x24); db(0x48); db(0x24); db(0x00); + db(0x26); db(0x01); db(0x2c); db(0x78); db(0x00); db(0x04); db(0x61); db(0x00); + db(0xff); db(0x6a); db(0x22); db(0x03); db(0x61); db(0x00); db(0xff); db(0xb2); + db(0x67); db(0x18); db(0x20); db(0x4a); db(0x22); db(0x40); db(0x24); db(0x40); + db(0x20); db(0x02); db(0x72); db(0x00); db(0x4e); db(0xae); db(0xfe); db(0x44); + db(0x22); db(0x00); db(0x70); db(0x00); db(0x4a); db(0x81); db(0x66); db(0x02); + db(0x20); db(0x0a); db(0x4a); db(0x80); db(0x4c); db(0xdf); db(0x44); db(0x0c); + db(0x4e); db(0x75); db(0x48); db(0xe7); db(0x38); db(0x32); db(0x2c); db(0x78); + db(0x00); db(0x04); db(0x28); db(0x00); db(0x24); db(0x08); db(0x26); db(0x09); + db(0x20); db(0x3c); db(0x00); db(0x00); db(0x08); db(0x5c); db(0x22); db(0x3c); + db(0x00); db(0x01); db(0x00); db(0x01); db(0x4e); db(0xae); db(0xff); db(0x3a); + db(0x4a); db(0x80); db(0x67); db(0x00); db(0x00); db(0x34); db(0x24); db(0x40); + db(0x15); db(0x7c); db(0x00); db(0x01); db(0x00); db(0x08); db(0x15); db(0x44); + db(0x00); db(0x09); db(0x25); db(0x42); db(0x00); db(0x0a); db(0x47); db(0xea); + db(0x00); db(0x5c); db(0x25); db(0x4b); db(0x00); db(0x3a); db(0x47); db(0xeb); + db(0x08); db(0x00); db(0x25); db(0x4b); db(0x00); db(0x3e); db(0x25); db(0x4b); + db(0x00); db(0x36); db(0x22); db(0x4a); db(0x24); db(0x43); db(0x97); db(0xcb); + db(0x24); db(0x09); db(0x4e); db(0xae); db(0xfe); db(0xe6); db(0x20); db(0x02); + db(0x4c); db(0xdf); db(0x4c); db(0x1c); db(0x4e); db(0x75); db(0x41); db(0xfa); + db(0x09); db(0xc0); db(0x43); db(0xfa); db(0x01); db(0x30); db(0x70); db(0x13); + db(0x61); db(0x00); db(0xff); db(0x98); db(0x4e); db(0x75); db(0x22); db(0x6d); + db(0x02); db(0x0c); db(0x33); db(0x7c); db(0x00); db(0x0a); db(0x00); db(0x1c); + db(0x13); db(0x7c); db(0x00); db(0x01); db(0x00); db(0x1e); db(0x4e); db(0xae); + db(0xfe); db(0x38); db(0x22); db(0x6d); db(0x02); db(0x0c); db(0x25); db(0x69); + db(0x00); db(0x20); db(0x00); db(0x0e); db(0x25); db(0x69); db(0x00); db(0x24); + db(0x00); db(0x12); db(0x22); db(0x6d); db(0x02); db(0x08); db(0x13); db(0x7c); + db(0x00); db(0x01); db(0x00); db(0x1e); db(0x4e); db(0xae); db(0xfe); db(0x38); + db(0x4e); db(0x75); db(0x42); db(0xaa); db(0x00); db(0x0e); db(0x42); db(0xaa); + db(0x00); db(0x12); db(0x22); db(0x6d); db(0x02); db(0x08); db(0x13); db(0x7c); + db(0x00); db(0x01); db(0x00); db(0x1e); db(0x4e); db(0xae); db(0xfe); db(0x38); + db(0x4e); db(0x75); db(0x48); db(0xe7); db(0xf8); db(0xfe); db(0x2a); db(0x48); db(0x95); db(0xca); db(0x97); db(0xcb); db(0x99); db(0xcc); db(0x78); db(0x00); db(0x2c); db(0x6d); db(0x00); db(0x18); db(0x20); db(0x6d); db(0x00); db(0x14); db(0x20); db(0x28); db(0x00); db(0x3c); db(0x67); db(0x5c); db(0x20); db(0x40); @@ -529,295 +504,304 @@ db(0x24); db(0x03); db(0x4e); db(0xae); db(0xfd); db(0x0c); db(0x4a); db(0x80); db(0x6b); db(0x04); db(0x47); db(0xed); db(0x00); db(0x90); db(0x34); db(0x2d); db(0x00); db(0x2c); db(0x30); db(0x3c); db(0xff); db(0x38); db(0x72); db(0x01); - db(0x61); db(0x00); db(0xfd); db(0x70); db(0x4e); db(0x90); db(0x4c); db(0xdf); + db(0x61); db(0x00); db(0x07); db(0xf8); db(0x4e); db(0x90); db(0x4c); db(0xdf); db(0x7f); db(0x1f); db(0x4e); db(0x75); db(0x2c); db(0x78); db(0x00); db(0x04); db(0x3e); db(0x2e); db(0x00); db(0x14); db(0x70); db(0xff); db(0x4e); db(0xae); db(0xfe); db(0xb6); db(0x7c); db(0x00); db(0x01); db(0xc6); db(0x93); db(0xc9); db(0x4e); db(0xae); db(0xfe); db(0xda); db(0x28); db(0x40); db(0x70); db(0x14); db(0x22); db(0x4c); db(0x4e); db(0xae); db(0xfe); db(0xd4); db(0x70); db(0x00); - db(0x30); db(0x3c); db(0x02); db(0x10); db(0x22); db(0x3c); db(0x00); db(0x01); + db(0x30); db(0x3c); db(0x02); db(0x3c); db(0x22); db(0x3c); db(0x00); db(0x01); db(0x00); db(0x01); db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x2a); db(0x40); db(0x47); db(0xed); db(0x00); db(0x16); db(0x27); db(0x4e); db(0x00); db(0x10); db(0x27); db(0x4c); db(0x00); db(0x08); db(0x27); db(0x46); db(0x00); db(0x0c); - db(0x70); db(0xff); db(0x37); db(0x40); db(0x00); db(0x00); db(0x43); db(0xed); - db(0x00); db(0x00); db(0x13); db(0x7c); db(0x00); db(0x02); db(0x00); db(0x08); - db(0x13); db(0x7c); db(0x00); db(0x05); db(0x00); db(0x09); db(0x41); db(0xfa); - db(0x07); db(0xf6); db(0x23); db(0x48); db(0x00); db(0x0a); db(0x41); db(0xfa); - db(0x02); db(0xda); db(0x23); db(0x48); db(0x00); db(0x12); db(0x23); db(0x4d); - db(0x00); db(0x0e); db(0x70); db(0x05); db(0x4e); db(0xae); db(0xff); db(0x58); - db(0x20); db(0x06); db(0x4e); db(0xae); db(0xfe); db(0xc2); db(0x70); db(0x00); - db(0x53); db(0xab); db(0x00); db(0x1c); db(0x6a); db(0x06); db(0x70); db(0x0a); - db(0x27); db(0x40); db(0x00); db(0x1c); db(0x4a); db(0xab); db(0x00); db(0x14); - db(0x66); db(0x16); db(0x4a); db(0xab); db(0x00); db(0x1c); db(0x66); db(0xe0); - db(0x43); db(0xfa); db(0x08); db(0x14); db(0x70); db(0x00); db(0x4e); db(0xae); - db(0xfd); db(0xd8); db(0x27); db(0x40); db(0x00); db(0x14); db(0x67); db(0xd0); - db(0x4a); db(0xab); db(0x00); db(0x18); db(0x66); db(0x18); db(0x4a); db(0xab); - db(0x00); db(0x1c); db(0x66); db(0xc4); db(0x43); db(0xfa); db(0x08); db(0x0a); + db(0x70); db(0xff); db(0x37); db(0x40); db(0x00); db(0x00); db(0x30); db(0x3c); + db(0xff); db(0x38); db(0x72); db(0x05); db(0x61); db(0x00); db(0x07); db(0x9c); + db(0x20); db(0x0d); db(0x06); db(0x80); db(0x00); db(0x00); db(0x02); db(0x10); + db(0x4e); db(0x90); db(0x43); db(0xed); db(0x00); db(0x00); db(0x13); db(0x7c); + db(0x00); db(0x02); db(0x00); db(0x08); db(0x13); db(0x7c); db(0x00); db(0x05); + db(0x00); db(0x09); db(0x41); db(0xfa); db(0x08); db(0x1c); db(0x23); db(0x48); + db(0x00); db(0x0a); db(0x41); db(0xfa); db(0x02); db(0xf4); db(0x23); db(0x48); + db(0x00); db(0x12); db(0x23); db(0x4d); db(0x00); db(0x0e); db(0x70); db(0x05); + db(0x4e); db(0xae); db(0xff); db(0x58); db(0x20); db(0x06); db(0x4e); db(0xae); + db(0xfe); db(0xc2); db(0x70); db(0x00); db(0x53); db(0xab); db(0x00); db(0x1c); + db(0x6a); db(0x06); db(0x70); db(0x0a); db(0x27); db(0x40); db(0x00); db(0x1c); + db(0x4a); db(0xab); db(0x00); db(0x14); db(0x66); db(0x16); db(0x4a); db(0xab); + db(0x00); db(0x1c); db(0x66); db(0xe0); db(0x43); db(0xfa); db(0x08); db(0x49); db(0x70); db(0x00); db(0x4e); db(0xae); db(0xfd); db(0xd8); db(0x27); db(0x40); - db(0x00); db(0x18); db(0x67); db(0x00); db(0xff); db(0xb4); db(0x4a); db(0xad); - db(0x02); db(0x08); db(0x66); db(0x38); db(0x4a); db(0xab); db(0x00); db(0x1c); - db(0x66); db(0xa6); db(0x4e); db(0xae); db(0xff); db(0x7c); db(0x41); db(0xee); - db(0x01); db(0x5e); db(0x43); db(0xfa); db(0x06); db(0xea); db(0x4e); db(0xae); - db(0xfe); db(0xec); db(0x24); db(0x00); db(0x4e); db(0xae); db(0xff); db(0x76); - db(0x4a); db(0x82); db(0x67); db(0x8c); db(0x41); db(0xfa); db(0x06); db(0xd8); - db(0x70); db(0x00); db(0x72); db(0x00); db(0x61); db(0x00); db(0xfd); db(0x16); - db(0x2b); db(0x40); db(0x02); db(0x08); db(0x67); db(0x00); db(0x02); db(0x42); - db(0x60); db(0x00); db(0xff); db(0x76); db(0x4a); db(0xad); db(0x02); db(0x0c); - db(0x66); db(0x48); db(0x4a); db(0xab); db(0x00); db(0x1c); db(0x66); db(0x00); - db(0xff); db(0x68); db(0x4e); db(0xae); db(0xff); db(0x7c); db(0x41); db(0xee); - db(0x01); db(0x5e); db(0x43); db(0xfa); db(0x06); db(0xb7); db(0x4e); db(0xae); - db(0xfe); db(0xec); db(0x24); db(0x00); db(0x4e); db(0xae); db(0xff); db(0x76); - db(0x4a); db(0x82); db(0x67); db(0x00); db(0xff); db(0x4c); db(0x41); db(0xfa); - db(0x06); db(0xa3); db(0x70); db(0x00); db(0x72); db(0x00); db(0x61); db(0x00); - db(0xfc); db(0xd4); db(0x2b); db(0x40); db(0x02); db(0x0c); db(0x67); db(0x00); - db(0x02); db(0x00); db(0x30); db(0x3c); db(0xff); db(0x38); db(0x72); db(0x00); - db(0x61); db(0x00); db(0xfc); db(0x20); db(0x4e); db(0x90); db(0x60); db(0x00); - db(0xff); db(0x28); db(0x0c); db(0x47); db(0x00); db(0x24); db(0x65); db(0x12); - db(0x53); db(0xab); db(0x00); db(0x34); db(0x6a); db(0x0c); db(0x20); db(0x4b); - db(0x61); db(0x00); db(0xfd); db(0xc8); db(0x70); db(0x32); db(0x27); db(0x40); - db(0x00); db(0x34); db(0x22); db(0x6d); db(0x02); db(0x08); db(0x45); db(0xed); - db(0x01); db(0x3c); db(0x33); db(0x7c); db(0x00); db(0x0b); db(0x00); db(0x1c); - db(0x23); db(0x7c); db(0x00); db(0x00); db(0x00); db(0x16); db(0x00); db(0x24); - db(0x23); db(0x4a); db(0x00); db(0x28); db(0x10); db(0x3a); db(0xfd); db(0x78); - db(0x0c); db(0x47); db(0x00); db(0x27); db(0x65); db(0x00); db(0x01); db(0x62); - db(0x08); db(0x00); db(0x00); db(0x01); db(0x67); db(0x00); db(0x01); db(0x5a); - db(0x41); db(0xed); db(0x01); db(0x68); db(0x25); db(0x48); db(0x00); db(0x0a); - db(0x15); db(0x7c); db(0x00); db(0x13); db(0x00); db(0x04); db(0x15); db(0x7c); - db(0x00); db(0x03); db(0x00); db(0x05); db(0x42); db(0x90); db(0x42); db(0xa8); - db(0x00); db(0x04); db(0x42); db(0x6a); db(0x00); db(0x06); db(0x42); db(0xa8); - db(0x00); db(0x08); db(0x42); db(0x68); db(0x00); db(0x0c); db(0x22); db(0x3a); - db(0xfd); db(0x60); db(0x02); db(0x41); db(0x00); db(0x07); db(0x70); db(0x07); - db(0x90); db(0x41); db(0xe1); db(0x48); db(0xe9); db(0x48); db(0x35); db(0x40); - db(0x00); db(0x08); db(0x31); db(0x7a); db(0xfd); db(0x34); db(0x00); db(0x0e); - db(0x42); db(0x68); db(0x00); db(0x10); db(0x31); db(0x7a); db(0xfd); db(0x2c); - db(0x00); db(0x12); db(0x42); db(0x68); db(0x00); db(0x14); db(0x31); db(0x7a); - db(0xfd); db(0x1a); db(0x00); db(0x16); db(0x42); db(0x68); db(0x00); db(0x18); - db(0x31); db(0x7a); db(0xfd); db(0x12); db(0x00); db(0x1a); db(0x43); db(0xed); - db(0x01); db(0x88); db(0x21); db(0x49); db(0x00); db(0x1c); db(0x22); db(0xfc); - db(0x80); db(0x03); db(0xa0); db(0x06); db(0x30); db(0x3a); db(0xfd); db(0x18); - db(0x48); db(0xc0); db(0xe1); db(0x80); db(0x22); db(0xc0); db(0x22); db(0xfc); - db(0x80); db(0x03); db(0xa0); db(0x07); db(0x22); db(0xfa); db(0xfd); db(0x0a); - db(0x70); db(0x00); db(0x30); db(0x3a); db(0xfc); db(0xf2); db(0x6b); db(0x08); - db(0x22); db(0xfc); db(0x80); db(0x03); db(0xa0); db(0x09); db(0x22); db(0xc0); - db(0x30); db(0x3a); db(0xfc); db(0xe6); db(0x6b); db(0x08); db(0x22); db(0xfc); - db(0x80); db(0x03); db(0xa0); db(0x0a); db(0x22); db(0xc0); db(0x30); db(0x3a); - db(0xfc); db(0xce); db(0x6b); db(0x14); db(0x22); db(0xfc); db(0x80); db(0x03); - db(0xa0); db(0x02); db(0x22); db(0xc0); db(0x30); db(0x3a); db(0xfc); db(0xc6); - db(0x22); db(0xfc); db(0x80); db(0x03); db(0xa0); db(0x01); db(0x22); db(0xc0); - db(0x30); db(0x3a); db(0xfc); db(0xc0); db(0x6b); db(0x10); db(0x22); db(0xfc); - db(0x80); db(0x03); db(0xa0); db(0x03); db(0x30); db(0x3a); db(0xfc); db(0xba); - db(0x48); db(0xc0); db(0xe1); db(0x80); db(0x22); db(0xc0); db(0x30); db(0x3a); - db(0xfc); db(0xac); db(0x6b); db(0x10); db(0x22); db(0xfc); db(0x80); db(0x03); - db(0xa0); db(0x04); db(0x30); db(0x3a); db(0xfc); db(0xa6); db(0x48); db(0xc0); - db(0xe1); db(0x80); db(0x22); db(0xc0); db(0x30); db(0x3a); db(0xfc); db(0x98); - db(0x6b); db(0x10); db(0x22); db(0xfc); db(0x80); db(0x03); db(0xa0); db(0x05); - db(0x30); db(0x3a); db(0xfc); db(0x92); db(0x48); db(0xc0); db(0xe1); db(0x80); - db(0x22); db(0xc0); db(0x70); db(0x00); db(0x30); db(0x3a); db(0xfc); db(0x8e); - db(0x6b); db(0x08); db(0x22); db(0xfc); db(0x80); db(0x03); db(0xa0); db(0x08); - db(0x22); db(0xc0); db(0x42); db(0x91); db(0x61); db(0x00); db(0xfc); db(0x40); - db(0x36); db(0x3c); db(0x00); db(0x68); db(0x74); db(0x01); db(0x28); db(0x3a); - db(0xfc); db(0x70); db(0x20); db(0x04); db(0xc0); db(0x82); db(0x22); db(0x2b); - db(0x00); db(0x04); db(0xc2); db(0x82); db(0xb2); db(0x80); db(0x67); db(0x22); - db(0x42); db(0x92); db(0x35); db(0x7c); db(0x02); db(0x00); db(0x00); db(0x04); - db(0x42); db(0xaa); db(0x00); db(0x0a); db(0x32); db(0x03); db(0x4a); db(0x00); - db(0x66); db(0x04); db(0x08); db(0xc1); db(0x00); db(0x07); db(0x35); db(0x41); - db(0x00); db(0x06); db(0x42); db(0x6a); db(0x00); db(0x08); db(0x61); db(0x00); - db(0xfc); db(0x06); db(0x52); db(0x43); db(0xd4); db(0x42); db(0x0c); db(0x42); - db(0x00); db(0x08); db(0x66); db(0xc6); db(0x27); db(0x44); db(0x00); db(0x04); - db(0x10); db(0x3a); db(0xfc); db(0x0c); db(0x08); db(0x00); db(0x00); db(0x00); - db(0x67); db(0x00); db(0xfd); db(0x7e); db(0x42); db(0x92); db(0x35); db(0x7c); - db(0x04); db(0x00); db(0x00); db(0x04); db(0x42); db(0x6a); db(0x00); db(0x06); - db(0x42); db(0x6a); db(0x00); db(0x08); db(0x20); db(0x6b); db(0x00); db(0x14); - db(0x30); db(0x3a); db(0xfc); db(0x14); db(0x32); db(0x28); db(0x00); db(0x30); + db(0x00); db(0x14); db(0x67); db(0xd0); db(0x4a); db(0xab); db(0x00); db(0x18); + db(0x66); db(0x18); db(0x4a); db(0xab); db(0x00); db(0x1c); db(0x66); db(0xc4); + db(0x43); db(0xfa); db(0x08); db(0x3f); db(0x70); db(0x00); db(0x4e); db(0xae); + db(0xfd); db(0xd8); db(0x27); db(0x40); db(0x00); db(0x18); db(0x67); db(0x00); + db(0xff); db(0xb4); db(0x4a); db(0xad); db(0x02); db(0x08); db(0x66); db(0x38); + db(0x4a); db(0xab); db(0x00); db(0x1c); db(0x66); db(0xa6); db(0x4e); db(0xae); + db(0xff); db(0x7c); db(0x41); db(0xee); db(0x01); db(0x5e); db(0x43); db(0xfa); + db(0x07); db(0x10); db(0x4e); db(0xae); db(0xfe); db(0xec); db(0x24); db(0x00); + db(0x4e); db(0xae); db(0xff); db(0x76); db(0x4a); db(0x82); db(0x67); db(0x8c); + db(0x41); db(0xfa); db(0x06); db(0xfe); db(0x70); db(0x00); db(0x72); db(0x00); + db(0x61); db(0x00); db(0xfd); db(0x2e); db(0x2b); db(0x40); db(0x02); db(0x08); + db(0x67); db(0x00); db(0x02); db(0x32); db(0x60); db(0x00); db(0xff); db(0x76); + db(0x4a); db(0xad); db(0x02); db(0x0c); db(0x66); db(0x48); db(0x4a); db(0xab); + db(0x00); db(0x1c); db(0x66); db(0x00); db(0xff); db(0x68); db(0x4e); db(0xae); + db(0xff); db(0x7c); db(0x41); db(0xee); db(0x01); db(0x5e); db(0x43); db(0xfa); + db(0x06); db(0xdd); db(0x4e); db(0xae); db(0xfe); db(0xec); db(0x24); db(0x00); + db(0x4e); db(0xae); db(0xff); db(0x76); db(0x4a); db(0x82); db(0x67); db(0x00); + db(0xff); db(0x4c); db(0x41); db(0xfa); db(0x06); db(0xc9); db(0x70); db(0x00); + db(0x72); db(0x00); db(0x61); db(0x00); db(0xfc); db(0xec); db(0x2b); db(0x40); + db(0x02); db(0x0c); db(0x67); db(0x00); db(0x01); db(0xf0); db(0x30); db(0x3c); + db(0xff); db(0x38); db(0x72); db(0x00); db(0x61); db(0x00); db(0x06); db(0x94); + db(0x4e); db(0x90); db(0x60); db(0x00); db(0xff); db(0x28); db(0x0c); db(0x47); + db(0x00); db(0x24); db(0x65); db(0x12); db(0x53); db(0xab); db(0x00); db(0x34); + db(0x6a); db(0x0c); db(0x20); db(0x4b); db(0x61); db(0x00); db(0xfd); db(0xb4); + db(0x70); db(0x32); db(0x27); db(0x40); db(0x00); db(0x34); db(0x22); db(0x6d); + db(0x02); db(0x08); db(0x45); db(0xed); db(0x01); db(0x3c); db(0x33); db(0x7c); + db(0x00); db(0x0b); db(0x00); db(0x1c); db(0x23); db(0x7c); db(0x00); db(0x00); + db(0x00); db(0x16); db(0x00); db(0x24); db(0x23); db(0x4a); db(0x00); db(0x28); + db(0x10); db(0x2d); db(0x02); db(0x10); db(0x0c); db(0x47); db(0x00); db(0x27); + db(0x65); db(0x00); db(0x01); db(0x52); db(0x08); db(0x00); db(0x00); db(0x01); + db(0x67); db(0x00); db(0x01); db(0x4a); db(0x41); db(0xed); db(0x01); db(0x68); + db(0x25); db(0x48); db(0x00); db(0x0a); db(0x15); db(0x7c); db(0x00); db(0x13); + db(0x00); db(0x04); db(0x15); db(0x7c); db(0x00); db(0x03); db(0x00); db(0x05); + db(0x42); db(0x90); db(0x42); db(0xa8); db(0x00); db(0x04); db(0x42); db(0xa8); + db(0x00); db(0x08); db(0x42); db(0x68); db(0x00); db(0x0c); db(0x42); db(0x6a); + db(0x00); db(0x06); db(0x61); db(0x00); db(0x01); db(0x72); db(0x31); db(0x6d); + db(0x02); db(0x1a); db(0x00); db(0x0e); db(0x42); db(0x68); db(0x00); db(0x10); + db(0x31); db(0x6d); db(0x02); db(0x1c); db(0x00); db(0x12); db(0x42); db(0x68); + db(0x00); db(0x14); db(0x31); db(0x6d); db(0x02); db(0x14); db(0x00); db(0x16); + db(0x42); db(0x68); db(0x00); db(0x18); db(0x31); db(0x6d); db(0x02); db(0x16); + db(0x00); db(0x1a); db(0x43); db(0xed); db(0x01); db(0x88); db(0x21); db(0x49); + db(0x00); db(0x1c); db(0x22); db(0xfc); db(0x80); db(0x03); db(0xa0); db(0x06); + db(0x30); db(0x2d); db(0x02); db(0x30); db(0x48); db(0xc0); db(0xe1); db(0x80); + db(0x22); db(0xc0); db(0x22); db(0xfc); db(0x80); db(0x03); db(0xa0); db(0x07); + db(0x22); db(0xed); db(0x02); db(0x32); db(0x70); db(0x00); db(0x30); db(0x2d); + db(0x02); db(0x20); db(0x6b); db(0x08); db(0x22); db(0xfc); db(0x80); db(0x03); + db(0xa0); db(0x09); db(0x22); db(0xc0); db(0x30); db(0x2d); db(0x02); db(0x22); + db(0x6b); db(0x08); db(0x22); db(0xfc); db(0x80); db(0x03); db(0xa0); db(0x0a); + db(0x22); db(0xc0); db(0x30); db(0x2d); db(0x02); db(0x18); db(0x6b); db(0x14); + db(0x22); db(0xfc); db(0x80); db(0x03); db(0xa0); db(0x02); db(0x22); db(0xc0); + db(0x30); db(0x2d); db(0x02); db(0x1e); db(0x22); db(0xfc); db(0x80); db(0x03); + db(0xa0); db(0x01); db(0x22); db(0xc0); db(0x30); db(0x2d); db(0x02); db(0x24); + db(0x6b); db(0x10); db(0x22); db(0xfc); db(0x80); db(0x03); db(0xa0); db(0x03); + db(0x30); db(0x2d); db(0x02); db(0x2a); db(0x48); db(0xc0); db(0xe1); db(0x80); + db(0x22); db(0xc0); db(0x30); db(0x2d); db(0x02); db(0x26); db(0x6b); db(0x10); + db(0x22); db(0xfc); db(0x80); db(0x03); db(0xa0); db(0x04); db(0x30); db(0x2d); + db(0x02); db(0x2c); db(0x48); db(0xc0); db(0xe1); db(0x80); db(0x22); db(0xc0); + db(0x30); db(0x2d); db(0x02); db(0x28); db(0x6b); db(0x10); db(0x22); db(0xfc); + db(0x80); db(0x03); db(0xa0); db(0x05); db(0x30); db(0x2d); db(0x02); db(0x2e); + db(0x48); db(0xc0); db(0xe1); db(0x80); db(0x22); db(0xc0); db(0x70); db(0x00); + db(0x30); db(0x2d); db(0x02); db(0x36); db(0x6b); db(0x08); db(0x22); db(0xfc); + db(0x80); db(0x03); db(0xa0); db(0x08); db(0x22); db(0xc0); db(0x42); db(0x91); + db(0x61); db(0x00); db(0xfc); db(0x68); db(0x36); db(0x3c); db(0x00); db(0x68); + db(0x74); db(0x01); db(0x28); db(0x2d); db(0x02); db(0x32); db(0x20); db(0x04); + db(0xc0); db(0x82); db(0x22); db(0x2b); db(0x00); db(0x04); db(0xc2); db(0x82); + db(0xb2); db(0x80); db(0x67); db(0x22); db(0x42); db(0x92); db(0x35); db(0x7c); + db(0x02); db(0x00); db(0x00); db(0x04); db(0x42); db(0xaa); db(0x00); db(0x0a); + db(0x32); db(0x03); db(0x4a); db(0x00); db(0x66); db(0x04); db(0x08); db(0xc1); + db(0x00); db(0x07); db(0x35); db(0x41); db(0x00); db(0x06); db(0x42); db(0x6a); + db(0x00); db(0x08); db(0x61); db(0x00); db(0xfc); db(0x2e); db(0x52); db(0x43); + db(0xd4); db(0x42); db(0x0c); db(0x42); db(0x00); db(0x08); db(0x66); db(0xc6); + db(0x27); db(0x44); db(0x00); db(0x04); db(0x10); db(0x2d); db(0x02); db(0x10); + db(0x08); db(0x00); db(0x00); db(0x00); db(0x67); db(0x00); db(0xfd); db(0x8e); + db(0x42); db(0x92); db(0x35); db(0x7c); db(0x04); db(0x00); db(0x00); db(0x04); + db(0x42); db(0x6a); db(0x00); db(0x06); db(0x61); db(0x00); db(0x00); db(0x38); + db(0x20); db(0x6b); db(0x00); db(0x14); db(0x30); db(0x2d); db(0x02); db(0x38); + db(0x32); db(0x28); db(0x00); db(0x30); db(0xd2); db(0x41); db(0x90); db(0x41); + db(0x6a); db(0x02); db(0x70); db(0x00); db(0x35); db(0x40); db(0x00); db(0x0a); + db(0x30); db(0x2d); db(0x02); db(0x3a); db(0x32); db(0x28); db(0x00); db(0x2e); db(0xd2); db(0x41); db(0x90); db(0x41); db(0x6a); db(0x02); db(0x70); db(0x00); - db(0x35); db(0x40); db(0x00); db(0x0a); db(0x30); db(0x3a); db(0xfc); db(0x02); - db(0x32); db(0x28); db(0x00); db(0x2e); db(0xd2); db(0x41); db(0x90); db(0x41); - db(0x6a); db(0x02); db(0x70); db(0x00); db(0x35); db(0x40); db(0x00); db(0x0c); - db(0x61); db(0x00); db(0xfb); db(0x78); db(0x60); db(0x00); db(0xfd); db(0x3a); - db(0x4e); db(0x75); db(0x4a); db(0xa9); db(0x02); db(0x08); db(0x67); db(0x14); - db(0x4a); db(0xa9); db(0x02); db(0x0c); db(0x67); db(0x0e); db(0x30); db(0x3a); - db(0xfb); db(0xb0); db(0xb0); db(0x69); db(0x00); db(0x16); db(0x67); db(0x14); - db(0x33); db(0x40); db(0x00); db(0x16); db(0x2c); db(0x69); db(0x00); db(0x26); - db(0x20); db(0x29); db(0x00); db(0x22); db(0x22); db(0x69); db(0x00); db(0x1e); - db(0x4e); db(0xae); db(0xfe); db(0xbc); db(0x53); db(0x69); db(0x00); db(0x46); - db(0x6a); db(0x12); db(0x33); db(0x7c); db(0x00); db(0x32); db(0x00); db(0x46); - db(0x30); db(0x3c); db(0xff); db(0x38); db(0x72); db(0x02); db(0x61); db(0x00); - db(0xf9); db(0xea); db(0x4e); db(0x90); db(0x41); db(0xf9); db(0x00); db(0xdf); - db(0xf0); db(0x00); db(0x70); db(0x00); db(0x4e); db(0x75); db(0x48); db(0xe7); - db(0x00); db(0x06); db(0x30); db(0x3c); db(0xff); db(0x38); db(0x72); db(0x11); - db(0x61); db(0x00); db(0xf9); db(0xd0); db(0x4e); db(0x90); db(0x08); db(0x00); - db(0x00); db(0x00); db(0x67); db(0x42); db(0x2c); db(0x78); db(0x00); db(0x04); - db(0x20); db(0x3c); db(0x00); db(0x00); db(0x00); db(0x88); db(0x22); db(0x3c); - db(0x00); db(0x01); db(0x00); db(0x01); db(0x4e); db(0xae); db(0xff); db(0x3a); - db(0x4a); db(0x80); db(0x67); db(0x00); db(0x00); db(0x40); db(0x2a); db(0x40); - db(0x2b); db(0x4e); db(0x00); db(0x14); db(0x30); db(0x3c); db(0xff); db(0x38); - db(0x72); db(0x0e); db(0x61); db(0x00); db(0xf9); db(0x9e); db(0x20); db(0x0d); - db(0x4e); db(0x90); db(0x41); db(0xfa); db(0x04); db(0x6c); db(0x43); db(0xfa); - db(0x01); db(0x14); db(0x70); db(0xf6); db(0x22); db(0x3c); db(0x00); db(0x00); - db(0x27); db(0x10); db(0x61); db(0x00); db(0xed); db(0xa2); db(0x70); db(0x00); - db(0x4c); db(0xdf); db(0x60); db(0x00); db(0x4e); db(0x75); db(0x30); db(0x3c); - db(0xff); db(0x38); db(0x72); db(0x0a); db(0x61); db(0x00); db(0xf9); db(0x74); - db(0x4e); db(0x90); db(0x4e); db(0x75); db(0x61); db(0xf0); db(0x20); db(0x0d); - db(0x67); db(0x1c); db(0x2c); db(0x6d); db(0x00); db(0x14); db(0x20); db(0x2d); - db(0x00); db(0x18); db(0x67); db(0x06); db(0x22); db(0x40); db(0x4e); db(0xae); - db(0xfe); db(0x62); db(0x22); db(0x4d); db(0x20); db(0x3c); db(0x00); db(0x00); - db(0x00); db(0x88); db(0x4e); db(0xae); db(0xff); db(0x2e); db(0x70); db(0x00); - db(0x4e); db(0x75); db(0x48); db(0xe7); db(0x38); db(0x3e); db(0x2c); db(0x6d); - db(0x00); db(0x18); db(0x41); db(0xfa); db(0x03); db(0xfa); db(0x22); db(0x08); - db(0x24); db(0x3c); db(0x00); db(0x00); db(0x03); db(0xed); db(0x4e); db(0xae); - db(0xff); db(0xe2); db(0x28); db(0x00); db(0x67); db(0x4c); db(0x45); db(0xed); - db(0x00); db(0x68); db(0x42); db(0x92); db(0x34); db(0xaa); db(0x00); db(0x02); - db(0x24); db(0x0a); db(0x54); db(0x82); db(0x76); db(0x02); db(0x22); db(0x04); - db(0x4e); db(0xae); db(0xff); db(0xd6); db(0xb6); db(0x80); db(0x66); db(0x32); - db(0x0c); db(0x92); db(0x50); db(0x4e); db(0x54); db(0x52); db(0x66); db(0xe4); - db(0x24); db(0x0a); db(0x76); db(0x04); db(0x22); db(0x04); db(0x4e); db(0xae); - db(0xff); db(0xd6); db(0x24); db(0x0a); db(0x76); db(0x20); db(0x22); db(0x04); - db(0x4e); db(0xae); db(0xff); db(0xd6); db(0xb6); db(0x80); db(0x66); db(0x12); - db(0x4a); db(0x6a); db(0x00); db(0x10); db(0x66); db(0xc4); db(0x30); db(0x3c); - db(0xff); db(0x38); db(0x72); db(0x10); db(0x61); db(0x00); db(0xf8); db(0xe4); - db(0x4e); db(0x90); db(0x22); db(0x04); db(0x67); db(0x04); db(0x4e); db(0xae); - db(0xff); db(0xdc); db(0x4c); db(0xdf); db(0x7c); db(0x1c); db(0x4e); db(0x75); - db(0x2c); db(0x6d); db(0x00); db(0x18); db(0x41); db(0xfa); db(0x03); db(0x72); - db(0x22); db(0x08); db(0x74); db(0xfe); db(0x4e); db(0xae); db(0xff); db(0xac); - db(0x22); db(0x00); db(0x67); db(0x34); db(0x4e); db(0xae); db(0xff); db(0xa6); - db(0x2c); db(0x6d); db(0x00); db(0x14); db(0x45); db(0xed); db(0x00); db(0x38); - db(0x70); db(0xff); db(0x4e); db(0xae); db(0xfe); db(0xb6); db(0x15); db(0x40); - db(0x00); db(0x14); db(0x41); db(0xfa); db(0x03); db(0x62); db(0x24); db(0x88); - db(0x25); db(0x7c); db(0x00); db(0x00); db(0x00); db(0x12); db(0x00); db(0x0c); - db(0x25); db(0x6d); db(0x00); db(0x08); db(0x00); db(0x10); db(0x2c); db(0x6d); - db(0x00); db(0x18); db(0x22); db(0x0a); db(0x4e); db(0xae); db(0xfc); db(0x88); - db(0x2c); db(0x6d); db(0x00); db(0x14); db(0x4e); db(0x75); db(0x00); db(0x00); - db(0x00); db(0x00); db(0x00); db(0x10); db(0x00); db(0x00); db(0x00); db(0x00); - db(0x30); db(0x3c); db(0xff); db(0x38); db(0x72); db(0x0d); db(0x61); db(0x00); - db(0xf8); db(0x72); db(0x4e); db(0x90); db(0x4a); db(0x80); db(0x67); db(0x00); - db(0xfe); db(0xfc); db(0x2a); db(0x40); db(0x2c); db(0x6d); db(0x00); db(0x14); - db(0x93); db(0xc9); db(0x4e); db(0xae); db(0xfe); db(0xda); db(0x2b); db(0x40); - db(0x00); db(0x08); db(0x43); db(0xfa); db(0x03); db(0x8e); db(0x70); db(0x00); - db(0x4e); db(0xae); db(0xfd); db(0xd8); db(0x2b); db(0x40); db(0x00); db(0x18); - db(0x67); db(0x00); db(0xfe); db(0xda); db(0x2c); db(0x40); db(0x72); db(0x32); - db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x41); db(0xfa); db(0x02); db(0xc6); - db(0x22); db(0x08); db(0x74); db(0xfe); db(0x4e); db(0xae); db(0xff); db(0xac); - db(0x4a); db(0x80); db(0x67); db(0xea); db(0x22); db(0x00); db(0x4e); db(0xae); - db(0xff); db(0xa6); db(0x72); db(0x32); db(0x4e); db(0xae); db(0xff); db(0x3a); - db(0x41); db(0xfa); db(0x02); db(0xb0); db(0x22); db(0x08); db(0x74); db(0xfe); - db(0x4e); db(0xae); db(0xff); db(0xac); db(0x4a); db(0x80); db(0x67); db(0x00); - db(0xfe); db(0xa4); db(0x22); db(0x00); db(0x4e); db(0xae); db(0xff); db(0xa6); - db(0x2c); db(0x6d); db(0x00); db(0x14); db(0x61); db(0x00); db(0xf8); db(0x20); - db(0x72); db(0x00); db(0x32); db(0x3c); db(0x00); db(0x34); db(0x61); db(0x00); - db(0xf8); db(0x64); db(0x28); db(0x40); db(0x4a); db(0x80); db(0x67); db(0x00); - db(0xfe); db(0x84); db(0x70); db(0x00); db(0x08); db(0xc0); db(0x00); db(0x0d); - db(0x4e); db(0xae); db(0xfe); db(0xc2); db(0x72); db(0x00); db(0x20); db(0x2d); - db(0x00); db(0x0c); db(0x41); db(0xfa); db(0x02); db(0x89); db(0x22); db(0x4c); - db(0x4e); db(0xae); db(0xfe); db(0x44); db(0x4a); db(0x80); db(0x66); db(0xe2); - db(0x20); db(0x6c); db(0x00); db(0x14); db(0x0c); db(0x68); db(0x00); db(0x25); - db(0x00); db(0x14); db(0x64); db(0x0c); db(0x61); db(0x00); db(0xfe); db(0x48); - db(0x70); db(0x00); db(0x4e); db(0xae); db(0xfe); db(0xc2); db(0x60); db(0xf8); - db(0x61); db(0x00); db(0xfe); db(0xe6); db(0x41); db(0xed); db(0x00); db(0x1c); - db(0x29); db(0x48); db(0x00); db(0x28); db(0x70); db(0x01); db(0x29); db(0x40); - db(0x00); db(0x24); db(0x39); db(0x7c); db(0x00); db(0x0c); db(0x00); db(0x1c); - db(0x2b); db(0x4d); db(0x00); db(0x2c); db(0x41); db(0xfa); db(0x01); db(0x60); - db(0x2b); db(0x48); db(0x00); db(0x24); db(0x22); db(0x4c); db(0x4e); db(0xae); - db(0xfe); db(0x38); db(0x30); db(0x3c); db(0xff); db(0x38); db(0x72); db(0x0f); - db(0x61); db(0x00); db(0xf7); db(0x88); db(0x4e); db(0x90); db(0x4a); db(0xad); - db(0x00); db(0x00); db(0x66); db(0x1c); db(0x70); db(0x00); db(0x74); db(0x00); - db(0x14); db(0x2d); db(0x00); db(0x4c); db(0x05); db(0xc0); db(0x08); db(0xc0); - db(0x00); db(0x0d); db(0x4e); db(0xae); db(0xfe); db(0xc2); db(0x05); db(0x00); - db(0x67); db(0x06); db(0x61); db(0x00); db(0xfe); db(0x1e); db(0x60); db(0xe4); - db(0x20); db(0x2d); db(0x00); db(0x00); db(0x67); db(0x00); db(0x00); db(0x76); - db(0x72); db(0x01); db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x2b); db(0x40); - db(0x00); db(0x04); db(0x30); db(0x3c); db(0xff); db(0x38); db(0x72); db(0x0c); - db(0x61); db(0x00); db(0xf7); db(0x48); db(0x4e); db(0x90); db(0x4a); db(0x80); - db(0x67); db(0x40); db(0x4a); db(0xad); db(0x00); db(0x04); db(0x67); db(0x3a); - db(0x39); db(0x7c); db(0x00); db(0x03); db(0x00); db(0x1c); db(0x42); db(0x2c); - db(0x00); db(0x1f); db(0x42); db(0xac); db(0x00); db(0x20); db(0x29); db(0x6d); - db(0x00); db(0x00); db(0x00); db(0x24); db(0x29); db(0x6d); db(0x00); db(0x04); - db(0x00); db(0x28); db(0x42); db(0xac); db(0x00); db(0x2c); db(0x42); db(0xac); - db(0x00); db(0x30); db(0x22); db(0x4c); db(0x4e); db(0xae); db(0xfe); db(0x38); - db(0x2b); db(0x6c); db(0x00); db(0x30); db(0x00); db(0x10); db(0x39); db(0x7c); - db(0x00); db(0x04); db(0x00); db(0x1c); db(0x22); db(0x4c); db(0x4e); db(0xae); - db(0xfe); db(0x38); db(0x20); db(0x2d); db(0x00); db(0x00); db(0x42); db(0xad); - db(0x00); db(0x00); db(0x22); db(0x2d); db(0x00); db(0x04); db(0x67); db(0x00); - db(0xff); db(0x74); db(0x22); db(0x41); db(0x4e); db(0xae); db(0xff); db(0x2e); - db(0x60); db(0x00); db(0xff); db(0x6a); db(0x39); db(0x7c); db(0x00); db(0x02); - db(0x00); db(0x1c); db(0x41); db(0xed); db(0x00); db(0x30); db(0x42); db(0x90); - db(0x42); db(0xa8); db(0x00); db(0x04); db(0x42); db(0x2c); db(0x00); db(0x1f); - db(0x42); db(0xac); db(0x00); db(0x2c); db(0x42); db(0xac); db(0x00); db(0x30); - db(0x29); db(0x48); db(0x00); db(0x28); db(0x70); db(0x08); db(0x29); db(0x40); - db(0x00); db(0x24); db(0x22); db(0x4c); db(0x4e); db(0xae); db(0xfe); db(0x38); - db(0x0c); db(0xad); db(0x46); db(0x4f); db(0x52); db(0x4d); db(0x00); db(0x30); - db(0x66); db(0x52); db(0x20); db(0x2d); db(0x00); db(0x34); db(0x67); db(0x4c); - db(0x6b); db(0x4a); db(0x2b); db(0x6c); db(0x00); db(0x30); db(0x00); db(0x10); - db(0x50); db(0x80); db(0x24); db(0x00); db(0x72); db(0x01); db(0x4e); db(0xae); - db(0xff); db(0x3a); db(0x4a); db(0x80); db(0x67); db(0x36); db(0x24); db(0x40); - db(0x20); db(0x4a); db(0x20); db(0xed); db(0x00); db(0x30); db(0x20); db(0xed); - db(0x00); db(0x34); db(0x29); db(0x48); db(0x00); db(0x28); db(0x20); db(0x02); - db(0x51); db(0x80); db(0x29); db(0x40); db(0x00); db(0x24); db(0x22); db(0x4c); - db(0x4e); db(0xae); db(0xfe); db(0x38); db(0x30); db(0x3c); db(0xff); db(0x38); - db(0x72); db(0x0b); db(0x61); db(0x00); db(0xf6); db(0x6e); db(0x20); db(0x2c); - db(0x00); db(0x20); db(0x4e); db(0x90); db(0x22); db(0x4a); db(0x20); db(0x02); - db(0x4e); db(0xae); db(0xff); db(0x2e); db(0x4a); db(0xac); db(0x00); db(0x20); - db(0x67); db(0x00); db(0xfe); db(0xda); db(0x41); db(0xed); db(0x00); db(0x30); - db(0x29); db(0x48); db(0x00); db(0x28); db(0x70); db(0x01); db(0x29); db(0x40); - db(0x00); db(0x24); db(0x42); db(0xac); db(0x00); db(0x20); db(0x22); db(0x4c); - db(0x4e); db(0xae); db(0xfe); db(0x38); db(0x60); db(0xde); db(0x41); db(0xe8); - db(0xff); db(0xe4); db(0x20); db(0x29); db(0x00); db(0x08); db(0xb0); db(0xa8); - db(0x00); db(0x10); db(0x67); db(0x1a); db(0x21); db(0x40); db(0x00); db(0x10); - db(0x2f); db(0x0e); db(0x2c); db(0x68); db(0x00); db(0x14); db(0x22); db(0x68); - db(0x00); db(0x08); db(0x70); db(0x00); db(0x08); db(0xc0); db(0x00); db(0x0d); - db(0x4e); db(0xae); db(0xfe); db(0xbc); db(0x2c); db(0x5f); db(0x70); db(0x00); - db(0x4e); db(0x75); db(0x2c); db(0x78); db(0x00); db(0x04); db(0x74); db(0xff); + db(0x35); db(0x40); db(0x00); db(0x0c); db(0x61); db(0x00); db(0xfb); db(0xa0); + db(0x60); db(0x00); db(0xfd); db(0x4a); db(0x4e); db(0x75); db(0x22); db(0x2d); + db(0x02); db(0x32); db(0x70); db(0x00); db(0x08); db(0x01); db(0x00); db(0x00); + db(0x67); db(0x04); db(0x08); db(0xc0); db(0x00); db(0x0e); db(0x08); db(0x01); + db(0x00); db(0x01); db(0x67); db(0x04); db(0x08); db(0xc0); db(0x00); db(0x0d); + db(0x08); db(0x01); db(0x00); db(0x02); db(0x67); db(0x04); db(0x08); db(0xc0); + db(0x00); db(0x0c); db(0x35); db(0x40); db(0x00); db(0x08); db(0x4e); db(0x75); + db(0x4a); db(0xa9); db(0x02); db(0x08); db(0x67); db(0x14); db(0x4a); db(0xa9); + db(0x02); db(0x0c); db(0x67); db(0x0e); db(0x30); db(0x29); db(0x02); db(0x12); + db(0xb0); db(0x69); db(0x00); db(0x16); db(0x67); db(0x14); db(0x33); db(0x40); + db(0x00); db(0x16); db(0x2c); db(0x69); db(0x00); db(0x26); db(0x20); db(0x29); + db(0x00); db(0x22); db(0x22); db(0x69); db(0x00); db(0x1e); db(0x4e); db(0xae); + db(0xfe); db(0xbc); db(0x53); db(0x69); db(0x00); db(0x46); db(0x6a); db(0x12); + db(0x33); db(0x7c); db(0x00); db(0x32); db(0x00); db(0x46); db(0x30); db(0x3c); + db(0xff); db(0x38); db(0x72); db(0x02); db(0x61); db(0x00); db(0x04); db(0x44); + db(0x4e); db(0x90); db(0x41); db(0xf9); db(0x00); db(0xdf); db(0xf0); db(0x00); + db(0x70); db(0x00); db(0x4e); db(0x75); db(0x48); db(0xe7); db(0x00); db(0x06); db(0x30); db(0x3c); db(0xff); db(0x38); db(0x72); db(0x11); db(0x61); db(0x00); - db(0xf6); db(0x02); db(0x4e); db(0x90); db(0x08); db(0x00); db(0x00); db(0x01); - db(0x67); db(0x38); db(0x74); db(0x00); db(0x4e); db(0xae); db(0xff); db(0x7c); - db(0x41); db(0xee); db(0x01); db(0x5e); db(0x43); db(0xfa); db(0x00); db(0x62); - db(0x4e); db(0xae); db(0xfe); db(0xec); db(0x4a); db(0x80); db(0x67); db(0x1e); - db(0x20); db(0x40); db(0x43); db(0xfa); db(0x00); db(0x22); db(0x24); db(0x68); - db(0xff); db(0xe4); db(0x21); db(0x49); db(0xff); db(0xe4); db(0x22); db(0x48); - db(0x30); db(0x3c); db(0xff); db(0x38); db(0x72); db(0x65); db(0x61); db(0x00); - db(0xf5); db(0xca); db(0x4e); db(0x90); db(0x74); db(0x01); db(0x4e); db(0xae); - db(0xff); db(0x76); db(0x20); db(0x02); db(0x4e); db(0x75); db(0x59); db(0x8f); - db(0x48); db(0xe7); db(0xc0); db(0x80); db(0x30); db(0x3c); db(0xff); db(0x38); - db(0x72); db(0x66); db(0x61); db(0x00); db(0xf5); db(0xae); db(0x4e); db(0x90); - db(0x4c); db(0xdf); db(0x01); db(0x03); db(0x4e); db(0x75); db(0x69); db(0x6e); - db(0x70); db(0x75); db(0x74); db(0x2e); db(0x64); db(0x65); db(0x76); db(0x69); - db(0x63); db(0x65); db(0x00); db(0x74); db(0x69); db(0x6d); db(0x65); db(0x72); - db(0x2e); db(0x64); db(0x65); db(0x76); db(0x69); db(0x63); db(0x65); db(0x00); - db(0x63); db(0x6f); db(0x6e); db(0x73); db(0x6f); db(0x6c); db(0x65); db(0x2e); - db(0x64); db(0x65); db(0x76); db(0x69); db(0x63); db(0x65); db(0x00); db(0x44); - db(0x45); db(0x56); db(0x53); db(0x00); db(0x44); db(0x45); db(0x56); db(0x53); - db(0x3a); db(0x00); db(0x44); db(0x45); db(0x56); db(0x53); db(0x3a); db(0x63); + db(0x04); db(0x2a); db(0x4e); db(0x90); db(0x08); db(0x00); db(0x00); db(0x00); + db(0x67); db(0x42); db(0x2c); db(0x78); db(0x00); db(0x04); db(0x20); db(0x3c); + db(0x00); db(0x00); db(0x00); db(0x88); db(0x22); db(0x3c); db(0x00); db(0x01); + db(0x00); db(0x01); db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x4a); db(0x80); + db(0x67); db(0x00); db(0x00); db(0x40); db(0x2a); db(0x40); db(0x2b); db(0x4e); + db(0x00); db(0x14); db(0x30); db(0x3c); db(0xff); db(0x38); db(0x72); db(0x0e); + db(0x61); db(0x00); db(0x03); db(0xf8); db(0x20); db(0x0d); db(0x4e); db(0x90); + db(0x41); db(0xfa); db(0x04); db(0x78); db(0x43); db(0xfa); db(0x01); db(0x12); + db(0x70); db(0xf6); db(0x22); db(0x3c); db(0x00); db(0x00); db(0x27); db(0x10); + db(0x61); db(0x00); db(0xee); db(0x14); db(0x70); db(0x00); db(0x4c); db(0xdf); + db(0x60); db(0x00); db(0x4e); db(0x75); db(0x30); db(0x3c); db(0xff); db(0x38); + db(0x72); db(0x0a); db(0x61); db(0x00); db(0x03); db(0xce); db(0x4e); db(0x90); + db(0x4e); db(0x75); db(0x61); db(0xf0); db(0x20); db(0x0d); db(0x67); db(0x1c); + db(0x2c); db(0x6d); db(0x00); db(0x14); db(0x20); db(0x2d); db(0x00); db(0x18); + db(0x67); db(0x06); db(0x22); db(0x40); db(0x4e); db(0xae); db(0xfe); db(0x62); + db(0x22); db(0x4d); db(0x20); db(0x3c); db(0x00); db(0x00); db(0x00); db(0x88); + db(0x4e); db(0xae); db(0xff); db(0x2e); db(0x70); db(0x00); db(0x4e); db(0x75); + db(0x48); db(0xe7); db(0x38); db(0x3e); db(0x2c); db(0x6d); db(0x00); db(0x18); + db(0x41); db(0xfa); db(0x04); db(0x06); db(0x22); db(0x08); db(0x24); db(0x3c); + db(0x00); db(0x00); db(0x03); db(0xed); db(0x4e); db(0xae); db(0xff); db(0xe2); + db(0x28); db(0x00); db(0x67); db(0x4c); db(0x45); db(0xed); db(0x00); db(0x68); + db(0x42); db(0x92); db(0x34); db(0xaa); db(0x00); db(0x02); db(0x24); db(0x0a); + db(0x54); db(0x82); db(0x76); db(0x02); db(0x22); db(0x04); db(0x4e); db(0xae); + db(0xff); db(0xd6); db(0xb6); db(0x80); db(0x66); db(0x32); db(0x0c); db(0x92); + db(0x50); db(0x4e); db(0x54); db(0x52); db(0x66); db(0xe4); db(0x24); db(0x0a); + db(0x76); db(0x04); db(0x22); db(0x04); db(0x4e); db(0xae); db(0xff); db(0xd6); + db(0x24); db(0x0a); db(0x76); db(0x20); db(0x22); db(0x04); db(0x4e); db(0xae); + db(0xff); db(0xd6); db(0xb6); db(0x80); db(0x66); db(0x12); db(0x4a); db(0x6a); + db(0x00); db(0x10); db(0x66); db(0xc4); db(0x30); db(0x3c); db(0xff); db(0x38); + db(0x72); db(0x10); db(0x61); db(0x00); db(0x03); db(0x3e); db(0x4e); db(0x90); + db(0x22); db(0x04); db(0x67); db(0x04); db(0x4e); db(0xae); db(0xff); db(0xdc); + db(0x4c); db(0xdf); db(0x7c); db(0x1c); db(0x4e); db(0x75); db(0x2c); db(0x6d); + db(0x00); db(0x18); db(0x41); db(0xfa); db(0x03); db(0x7e); db(0x22); db(0x08); + db(0x74); db(0xfe); db(0x4e); db(0xae); db(0xff); db(0xac); db(0x22); db(0x00); + db(0x67); db(0x34); db(0x4e); db(0xae); db(0xff); db(0xa6); db(0x2c); db(0x6d); + db(0x00); db(0x14); db(0x45); db(0xed); db(0x00); db(0x38); db(0x70); db(0xff); + db(0x4e); db(0xae); db(0xfe); db(0xb6); db(0x15); db(0x40); db(0x00); db(0x14); + db(0x41); db(0xfa); db(0x03); db(0x6e); db(0x24); db(0x88); db(0x25); db(0x7c); + db(0x00); db(0x00); db(0x00); db(0x12); db(0x00); db(0x0c); db(0x25); db(0x6d); + db(0x00); db(0x08); db(0x00); db(0x10); db(0x2c); db(0x6d); db(0x00); db(0x18); + db(0x22); db(0x0a); db(0x4e); db(0xae); db(0xfc); db(0x88); db(0x2c); db(0x6d); + db(0x00); db(0x14); db(0x4e); db(0x75); db(0x00); db(0x00); db(0x00); db(0x10); + db(0x00); db(0x00); db(0x00); db(0x00); db(0x30); db(0x3c); db(0xff); db(0x38); + db(0x72); db(0x0d); db(0x61); db(0x00); db(0x02); db(0xce); db(0x4e); db(0x90); + db(0x4a); db(0x80); db(0x67); db(0x00); db(0xfe); db(0xfe); db(0x2a); db(0x40); + db(0x2c); db(0x6d); db(0x00); db(0x14); db(0x93); db(0xc9); db(0x4e); db(0xae); + db(0xfe); db(0xda); db(0x2b); db(0x40); db(0x00); db(0x08); db(0x43); db(0xfa); + db(0x03); db(0xab); db(0x70); db(0x00); db(0x4e); db(0xae); db(0xfd); db(0xd8); + db(0x2b); db(0x40); db(0x00); db(0x18); db(0x67); db(0x00); db(0xfe); db(0xdc); + db(0x2c); db(0x40); db(0x72); db(0x32); db(0x4e); db(0xae); db(0xff); db(0x3a); + db(0x41); db(0xfa); db(0x02); db(0xd4); db(0x22); db(0x08); db(0x74); db(0xfe); + db(0x4e); db(0xae); db(0xff); db(0xac); db(0x4a); db(0x80); db(0x67); db(0xea); + db(0x22); db(0x00); db(0x4e); db(0xae); db(0xff); db(0xa6); db(0x72); db(0x32); + db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x41); db(0xfa); db(0x02); db(0xbe); + db(0x22); db(0x08); db(0x74); db(0xfe); db(0x4e); db(0xae); db(0xff); db(0xac); + db(0x4a); db(0x80); db(0x67); db(0x00); db(0xfe); db(0xa6); db(0x22); db(0x00); + db(0x4e); db(0xae); db(0xff); db(0xa6); db(0x2c); db(0x6d); db(0x00); db(0x14); + db(0x61); db(0x00); db(0xf8); db(0x20); db(0x72); db(0x00); db(0x32); db(0x3c); + db(0x00); db(0x34); db(0x61); db(0x00); db(0xf8); db(0x64); db(0x28); db(0x40); + db(0x4a); db(0x80); db(0x67); db(0x00); db(0xfe); db(0x86); db(0x70); db(0x00); + db(0x08); db(0xc0); db(0x00); db(0x0d); db(0x4e); db(0xae); db(0xfe); db(0xc2); + db(0x72); db(0x00); db(0x20); db(0x2d); db(0x00); db(0x0c); db(0x41); db(0xfa); + db(0x02); db(0x97); db(0x22); db(0x4c); db(0x4e); db(0xae); db(0xfe); db(0x44); + db(0x4a); db(0x80); db(0x66); db(0xe2); db(0x20); db(0x6c); db(0x00); db(0x14); + db(0x0c); db(0x68); db(0x00); db(0x25); db(0x00); db(0x14); db(0x64); db(0x0c); + db(0x61); db(0x00); db(0xfe); db(0x4a); db(0x70); db(0x00); db(0x4e); db(0xae); + db(0xfe); db(0xc2); db(0x60); db(0xf8); db(0x61); db(0x00); db(0xfe); db(0xe8); + db(0x41); db(0xed); db(0x00); db(0x1c); db(0x29); db(0x48); db(0x00); db(0x28); + db(0x70); db(0x01); db(0x29); db(0x40); db(0x00); db(0x24); db(0x39); db(0x7c); + db(0x00); db(0x0c); db(0x00); db(0x1c); db(0x2b); db(0x4d); db(0x00); db(0x2c); + db(0x41); db(0xfa); db(0x01); db(0x60); db(0x2b); db(0x48); db(0x00); db(0x24); + db(0x22); db(0x4c); db(0x4e); db(0xae); db(0xfe); db(0x38); db(0x30); db(0x3c); + db(0xff); db(0x38); db(0x72); db(0x0f); db(0x61); db(0x00); db(0x01); db(0xe4); + db(0x4e); db(0x90); db(0x4a); db(0xad); db(0x00); db(0x00); db(0x66); db(0x1c); + db(0x70); db(0x00); db(0x74); db(0x00); db(0x14); db(0x2d); db(0x00); db(0x4c); + db(0x05); db(0xc0); db(0x08); db(0xc0); db(0x00); db(0x0d); db(0x4e); db(0xae); + db(0xfe); db(0xc2); db(0x05); db(0x00); db(0x67); db(0x06); db(0x61); db(0x00); + db(0xfe); db(0x20); db(0x60); db(0xe4); db(0x20); db(0x2d); db(0x00); db(0x00); + db(0x67); db(0x00); db(0x00); db(0x76); db(0x72); db(0x01); db(0x4e); db(0xae); + db(0xff); db(0x3a); db(0x2b); db(0x40); db(0x00); db(0x04); db(0x30); db(0x3c); + db(0xff); db(0x38); db(0x72); db(0x0c); db(0x61); db(0x00); db(0x01); db(0xa4); + db(0x4e); db(0x90); db(0x4a); db(0x80); db(0x67); db(0x40); db(0x4a); db(0xad); + db(0x00); db(0x04); db(0x67); db(0x3a); db(0x39); db(0x7c); db(0x00); db(0x03); + db(0x00); db(0x1c); db(0x42); db(0x2c); db(0x00); db(0x1f); db(0x42); db(0xac); + db(0x00); db(0x20); db(0x29); db(0x6d); db(0x00); db(0x00); db(0x00); db(0x24); + db(0x29); db(0x6d); db(0x00); db(0x04); db(0x00); db(0x28); db(0x42); db(0xac); + db(0x00); db(0x2c); db(0x42); db(0xac); db(0x00); db(0x30); db(0x22); db(0x4c); + db(0x4e); db(0xae); db(0xfe); db(0x38); db(0x2b); db(0x6c); db(0x00); db(0x30); + db(0x00); db(0x10); db(0x39); db(0x7c); db(0x00); db(0x04); db(0x00); db(0x1c); + db(0x22); db(0x4c); db(0x4e); db(0xae); db(0xfe); db(0x38); db(0x20); db(0x2d); + db(0x00); db(0x00); db(0x42); db(0xad); db(0x00); db(0x00); db(0x22); db(0x2d); + db(0x00); db(0x04); db(0x67); db(0x00); db(0xff); db(0x74); db(0x22); db(0x41); + db(0x4e); db(0xae); db(0xff); db(0x2e); db(0x60); db(0x00); db(0xff); db(0x6a); + db(0x39); db(0x7c); db(0x00); db(0x02); db(0x00); db(0x1c); db(0x41); db(0xed); + db(0x00); db(0x30); db(0x42); db(0x90); db(0x42); db(0xa8); db(0x00); db(0x04); + db(0x42); db(0x2c); db(0x00); db(0x1f); db(0x42); db(0xac); db(0x00); db(0x2c); + db(0x42); db(0xac); db(0x00); db(0x30); db(0x29); db(0x48); db(0x00); db(0x28); + db(0x70); db(0x08); db(0x29); db(0x40); db(0x00); db(0x24); db(0x22); db(0x4c); + db(0x4e); db(0xae); db(0xfe); db(0x38); db(0x0c); db(0xad); db(0x46); db(0x4f); + db(0x52); db(0x4d); db(0x00); db(0x30); db(0x66); db(0x52); db(0x20); db(0x2d); + db(0x00); db(0x34); db(0x67); db(0x4c); db(0x6b); db(0x4a); db(0x2b); db(0x6c); + db(0x00); db(0x30); db(0x00); db(0x10); db(0x50); db(0x80); db(0x24); db(0x00); + db(0x72); db(0x01); db(0x4e); db(0xae); db(0xff); db(0x3a); db(0x4a); db(0x80); + db(0x67); db(0x36); db(0x24); db(0x40); db(0x20); db(0x4a); db(0x20); db(0xed); + db(0x00); db(0x30); db(0x20); db(0xed); db(0x00); db(0x34); db(0x29); db(0x48); + db(0x00); db(0x28); db(0x20); db(0x02); db(0x51); db(0x80); db(0x29); db(0x40); + db(0x00); db(0x24); db(0x22); db(0x4c); db(0x4e); db(0xae); db(0xfe); db(0x38); + db(0x30); db(0x3c); db(0xff); db(0x38); db(0x72); db(0x0b); db(0x61); db(0x00); + db(0x00); db(0xca); db(0x20); db(0x2c); db(0x00); db(0x20); db(0x4e); db(0x90); + db(0x22); db(0x4a); db(0x20); db(0x02); db(0x4e); db(0xae); db(0xff); db(0x2e); + db(0x4a); db(0xac); db(0x00); db(0x20); db(0x67); db(0x00); db(0xfe); db(0xda); + db(0x41); db(0xed); db(0x00); db(0x30); db(0x29); db(0x48); db(0x00); db(0x28); + db(0x70); db(0x01); db(0x29); db(0x40); db(0x00); db(0x24); db(0x42); db(0xac); + db(0x00); db(0x20); db(0x22); db(0x4c); db(0x4e); db(0xae); db(0xfe); db(0x38); + db(0x60); db(0xde); db(0x41); db(0xe8); db(0xff); db(0xe4); db(0x20); db(0x29); + db(0x00); db(0x08); db(0xb0); db(0xa8); db(0x00); db(0x10); db(0x67); db(0x1a); + db(0x21); db(0x40); db(0x00); db(0x10); db(0x2f); db(0x0e); db(0x2c); db(0x68); + db(0x00); db(0x14); db(0x22); db(0x68); db(0x00); db(0x08); db(0x70); db(0x00); + db(0x08); db(0xc0); db(0x00); db(0x0d); db(0x4e); db(0xae); db(0xfe); db(0xbc); + db(0x2c); db(0x5f); db(0x70); db(0x00); db(0x4e); db(0x75); db(0x2c); db(0x78); + db(0x00); db(0x04); db(0x74); db(0xff); db(0x30); db(0x3c); db(0xff); db(0x38); + db(0x72); db(0x11); db(0x61); db(0x00); db(0x00); db(0x5e); db(0x4e); db(0x90); + db(0x08); db(0x00); db(0x00); db(0x01); db(0x67); db(0x38); db(0x74); db(0x00); + db(0x4e); db(0xae); db(0xff); db(0x7c); db(0x41); db(0xee); db(0x01); db(0x5e); + db(0x43); db(0xfa); db(0x00); db(0x70); db(0x4e); db(0xae); db(0xfe); db(0xec); + db(0x4a); db(0x80); db(0x67); db(0x1e); db(0x20); db(0x40); db(0x43); db(0xfa); + db(0x00); db(0x22); db(0x24); db(0x68); db(0xff); db(0xe4); db(0x21); db(0x49); + db(0xff); db(0xe4); db(0x22); db(0x48); db(0x30); db(0x3c); db(0xff); db(0x38); + db(0x72); db(0x65); db(0x61); db(0x00); db(0x00); db(0x26); db(0x4e); db(0x90); + db(0x74); db(0x01); db(0x4e); db(0xae); db(0xff); db(0x76); db(0x20); db(0x02); + db(0x4e); db(0x75); db(0x59); db(0x8f); db(0x48); db(0xe7); db(0xc0); db(0x80); + db(0x30); db(0x3c); db(0xff); db(0x38); db(0x72); db(0x66); db(0x61); db(0x00); + db(0x00); db(0x0a); db(0x4e); db(0x90); db(0x4c); db(0xdf); db(0x01); db(0x03); + db(0x4e); db(0x75); db(0x41); db(0xfa); db(0xe8); db(0x30); db(0x02); db(0x80); + db(0x00); db(0x00); db(0xff); db(0xff); db(0xd1); db(0xc0); db(0x4e); db(0x75); + db(0x69); db(0x6e); db(0x70); db(0x75); db(0x74); db(0x2e); db(0x64); db(0x65); + db(0x76); db(0x69); db(0x63); db(0x65); db(0x00); db(0x74); db(0x69); db(0x6d); + db(0x65); db(0x72); db(0x2e); db(0x64); db(0x65); db(0x76); db(0x69); db(0x63); + db(0x65); db(0x00); db(0x63); db(0x6f); db(0x6e); db(0x73); db(0x6f); db(0x6c); + db(0x65); db(0x2e); db(0x64); db(0x65); db(0x76); db(0x69); db(0x63); db(0x65); + db(0x00); db(0x44); db(0x45); db(0x56); db(0x53); db(0x00); db(0x44); db(0x45); + db(0x56); db(0x53); db(0x3a); db(0x00); db(0x44); db(0x45); db(0x56); db(0x53); + db(0x3a); db(0x63); db(0x6c); db(0x69); db(0x70); db(0x62); db(0x6f); db(0x61); + db(0x72); db(0x64); db(0x2e); db(0x64); db(0x65); db(0x76); db(0x69); db(0x63); + db(0x65); db(0x00); db(0x52); db(0x41); db(0x4d); db(0x3a); db(0x00); db(0x63); db(0x6c); db(0x69); db(0x70); db(0x62); db(0x6f); db(0x61); db(0x72); db(0x64); db(0x2e); db(0x64); db(0x65); db(0x76); db(0x69); db(0x63); db(0x65); db(0x00); - db(0x52); db(0x41); db(0x4d); db(0x3a); db(0x00); db(0x63); db(0x6c); db(0x69); - db(0x70); db(0x62); db(0x6f); db(0x61); db(0x72); db(0x64); db(0x2e); db(0x64); - db(0x65); db(0x76); db(0x69); db(0x63); db(0x65); db(0x00); db(0x52); db(0x41); - db(0x4d); db(0x3a); db(0x45); db(0x6e); db(0x76); db(0x2f); db(0x53); db(0x79); - db(0x73); db(0x2f); db(0x50); db(0x6f); db(0x69); db(0x6e); db(0x74); db(0x65); - db(0x72); db(0x2e); db(0x70); db(0x72); db(0x65); db(0x66); db(0x73); db(0x00); - db(0x55); db(0x41); db(0x45); db(0x20); db(0x63); db(0x6c); db(0x69); db(0x70); - db(0x62); db(0x6f); db(0x61); db(0x72); db(0x64); db(0x20); db(0x73); db(0x68); - db(0x61); db(0x72); db(0x69); db(0x6e); db(0x67); db(0x00); db(0x55); db(0x41); - db(0x45); db(0x20); db(0x6d); db(0x6f); db(0x75); db(0x73); db(0x65); db(0x20); - db(0x64); db(0x72); db(0x69); db(0x76); db(0x65); db(0x72); db(0x00); db(0x55); - db(0x41); db(0x45); db(0x20); db(0x66); db(0x69); db(0x6c); db(0x65); db(0x73); - db(0x79); db(0x73); db(0x74); db(0x65); db(0x6d); db(0x00); db(0x55); db(0x41); - db(0x45); db(0x20); db(0x66); db(0x73); db(0x20); db(0x61); db(0x75); db(0x74); - db(0x6f); db(0x6d); db(0x6f); db(0x75); db(0x6e); db(0x74); db(0x65); db(0x72); - db(0x00); db(0x55); db(0x41); db(0x45); db(0x20); db(0x66); db(0x73); db(0x20); - db(0x61); db(0x75); db(0x74); db(0x6f); db(0x6d); db(0x6f); db(0x75); db(0x6e); - db(0x74); db(0x20); db(0x70); db(0x72); db(0x6f); db(0x63); db(0x65); db(0x73); - db(0x73); db(0x00); db(0x64); db(0x6f); db(0x73); db(0x2e); db(0x6c); db(0x69); - db(0x62); db(0x72); db(0x61); db(0x72); db(0x79); db(0x00); db(0x69); db(0x6e); - db(0x74); db(0x75); db(0x69); db(0x74); db(0x69); db(0x6f); db(0x6e); db(0x2e); - db(0x6c); db(0x69); db(0x62); db(0x72); db(0x61); db(0x72); db(0x79); db(0x00); - db(0x67); db(0x72); db(0x61); db(0x70); db(0x68); db(0x69); db(0x63); db(0x73); + db(0x52); db(0x41); db(0x4d); db(0x3a); db(0x45); db(0x6e); db(0x76); db(0x2f); + db(0x53); db(0x79); db(0x73); db(0x2f); db(0x50); db(0x6f); db(0x69); db(0x6e); + db(0x74); db(0x65); db(0x72); db(0x2e); db(0x70); db(0x72); db(0x65); db(0x66); + db(0x73); db(0x00); db(0x55); db(0x41); db(0x45); db(0x20); db(0x63); db(0x6c); + db(0x69); db(0x70); db(0x62); db(0x6f); db(0x61); db(0x72); db(0x64); db(0x20); + db(0x73); db(0x68); db(0x61); db(0x72); db(0x69); db(0x6e); db(0x67); db(0x00); + db(0x55); db(0x41); db(0x45); db(0x20); db(0x6d); db(0x6f); db(0x75); db(0x73); + db(0x65); db(0x20); db(0x64); db(0x72); db(0x69); db(0x76); db(0x65); db(0x72); + db(0x00); db(0x55); db(0x41); db(0x45); db(0x20); db(0x68); db(0x65); db(0x61); + db(0x72); db(0x74); db(0x20); db(0x62); db(0x65); db(0x61); db(0x74); db(0x00); + db(0x55); db(0x41); db(0x45); db(0x20); db(0x66); db(0x69); db(0x6c); db(0x65); + db(0x73); db(0x79); db(0x73); db(0x74); db(0x65); db(0x6d); db(0x00); db(0x55); + db(0x41); db(0x45); db(0x20); db(0x66); db(0x73); db(0x20); db(0x61); db(0x75); + db(0x74); db(0x6f); db(0x6d); db(0x6f); db(0x75); db(0x6e); db(0x74); db(0x65); + db(0x72); db(0x00); db(0x55); db(0x41); db(0x45); db(0x20); db(0x66); db(0x73); + db(0x20); db(0x61); db(0x75); db(0x74); db(0x6f); db(0x6d); db(0x6f); db(0x75); + db(0x6e); db(0x74); db(0x20); db(0x70); db(0x72); db(0x6f); db(0x63); db(0x65); + db(0x73); db(0x73); db(0x00); db(0x64); db(0x6f); db(0x73); db(0x2e); db(0x6c); + db(0x69); db(0x62); db(0x72); db(0x61); db(0x72); db(0x79); db(0x00); db(0x69); + db(0x6e); db(0x74); db(0x75); db(0x69); db(0x74); db(0x69); db(0x6f); db(0x6e); db(0x2e); db(0x6c); db(0x69); db(0x62); db(0x72); db(0x61); db(0x72); db(0x79); - db(0x00); db(0x65); db(0x78); db(0x70); db(0x61); db(0x6e); db(0x73); db(0x69); - db(0x6f); db(0x6e); db(0x2e); db(0x6c); db(0x69); db(0x62); db(0x72); db(0x61); - db(0x72); db(0x79); db(0x00); db(0x46); db(0x69); db(0x6c); db(0x65); db(0x53); - db(0x79); db(0x73); db(0x74); db(0x65); db(0x6d); db(0x2e); db(0x72); db(0x65); - db(0x73); db(0x6f); db(0x75); db(0x72); db(0x63); db(0x65); db(0x00); db(0x6d); - db(0x65); db(0x67); db(0x61); db(0x63); db(0x68); db(0x69); db(0x70); db(0x20); - db(0x6d); db(0x65); db(0x6d); db(0x6f); db(0x72); db(0x79); db(0x00); db(0x00); + db(0x00); db(0x67); db(0x72); db(0x61); db(0x70); db(0x68); db(0x69); db(0x63); + db(0x73); db(0x2e); db(0x6c); db(0x69); db(0x62); db(0x72); db(0x61); db(0x72); + db(0x79); db(0x00); db(0x65); db(0x78); db(0x70); db(0x61); db(0x6e); db(0x73); + db(0x69); db(0x6f); db(0x6e); db(0x2e); db(0x6c); db(0x69); db(0x62); db(0x72); + db(0x61); db(0x72); db(0x79); db(0x00); db(0x46); db(0x69); db(0x6c); db(0x65); + db(0x53); db(0x79); db(0x73); db(0x74); db(0x65); db(0x6d); db(0x2e); db(0x72); + db(0x65); db(0x73); db(0x6f); db(0x75); db(0x72); db(0x63); db(0x65); db(0x00); + db(0x6d); db(0x65); db(0x67); db(0x61); db(0x63); db(0x68); db(0x69); db(0x70); + db(0x20); db(0x6d); db(0x65); db(0x6d); db(0x6f); db(0x72); db(0x79); db(0x00); db(0x00); db(0x00); db(0x03); db(0xf2); diff --git a/src/fpp.cpp b/src/fpp.cpp index 1d852f51..64dd9d3a 100644 --- a/src/fpp.cpp +++ b/src/fpp.cpp @@ -17,8 +17,8 @@ #include "options.h" #include "memory.h" -#include "newcpu.h" #include "custom.h" +#include "newcpu.h" #include "ersatz.h" #include "md-pandora/md-fpp.h" #include "savestate.h" @@ -28,7 +28,7 @@ STATIC_INLINE int isinrom (void) { - return (munge24 (m68k_getpc (regs)) & 0xFFF80000) == 0xF80000; + return (munge24 (m68k_getpc ()) & 0xFFF80000) == 0xF80000; } static uae_u32 xhex_pi[] ={0x2168c235, 0xc90fdaa2, 0x4000}; @@ -127,7 +127,7 @@ static void fpu_op_illg (uae_u32 opcode, struct regstruct ®s, int pcoffset) || (currprefs.cpu_model == 68040 && currprefs.fpu_model == 0)) { /* 68040 unimplemented/68060 FPU disabled exception. * Line F exception with different stack frame.. */ - uaecptr newpc = m68k_getpc(regs); + uaecptr newpc = m68k_getpc(); uaecptr oldpc = newpc - pcoffset; regs.t0 = regs.t1 = 0; MakeSR(regs); @@ -137,33 +137,33 @@ static void fpu_op_illg (uae_u32 opcode, struct regstruct ®s, int pcoffset) } regs.s = 1; m68k_areg(regs, 7) -= 4; - put_long (m68k_areg(regs, 7), oldpc); + x_put_long (m68k_areg(regs, 7), oldpc); m68k_areg(regs, 7) -= 4; - put_long (m68k_areg(regs, 7), oldpc); + x_put_long (m68k_areg(regs, 7), oldpc); m68k_areg(regs, 7) -= 2; - put_word (m68k_areg(regs, 7), 0x4000 + 11 * 4); + x_put_word (m68k_areg(regs, 7), 0x4000 + 11 * 4); m68k_areg(regs, 7) -= 4; - put_long (m68k_areg(regs, 7), newpc); + x_put_long (m68k_areg(regs, 7), newpc); m68k_areg(regs, 7) -= 2; - put_word (m68k_areg(regs, 7), regs.sr); + x_put_word (m68k_areg(regs, 7), regs.sr); write_log(_T("68040/060 FPU disabled exception PC=%x\n"), newpc); - newpc = get_long (regs.vbr + 11 * 4); - m68k_setpc(regs, newpc); + newpc = x_get_long (regs.vbr + 11 * 4); + m68k_setpc(newpc); #ifdef JIT - set_special(regs, SPCFLAG_END_COMPILE); + set_special(SPCFLAG_END_COMPILE); #endif return; } - op_illg (opcode, regs); + op_illg (opcode); } -STATIC_INLINE int fault_if_no_fpu (uae_u32 opcode, struct regstruct ®s, int pcoffset) +STATIC_INLINE bool fault_if_no_fpu (uae_u32 opcode, struct regstruct ®s, int pcoffset) { if ((regs.pcr & 2) || currprefs.fpu_model <= 0) { fpu_op_illg (opcode, regs, pcoffset); - return 1; + return true; } - return 0; + return false; } static int get_fpu_version(void) @@ -184,7 +184,7 @@ static int get_fpu_version(void) #define fp_round_to_minus_infinity(x) fp_floor(x) #define fp_round_to_plus_infinity(x) fp_ceil(x) -#define fp_round_to_zero(x) ((int)(x)) +#define fp_round_to_zero(x) ((x) >= 0.0 ? floor(x) : ceil(x)) #define fp_round_to_nearest(x) ((int)((x) + 0.5)) STATIC_INLINE tointtype toint(fptype src, fptype minval, fptype maxval) @@ -217,6 +217,10 @@ STATIC_INLINE tointtype toint(fptype src, fptype minval, fptype maxval) #endif } +#ifndef HAVE_ISINF +extern int isinf (double x); +#endif + uae_u32 get_fpsr (void) { uae_u32 answer = regs.fpsr & 0x00ffffff; @@ -394,31 +398,31 @@ STATIC_INLINE int get_fp_value (uae_u32 opcode, uae_u16 extra, fptype *src) ad = m68k_areg (regs, reg); break; case 5: - ad = m68k_areg (regs, reg) + (uae_s32) (uae_s16) x_next_iword (regs); + ad = m68k_areg (regs, reg) + (uae_s32) (uae_s16) x_next_iword (); break; case 6: - ad = get_disp_ea_020 (regs, m68k_areg (regs, reg), x_next_iword (regs)); + ad = x_get_disp_ea_020 (m68k_areg (regs, reg), x_next_iword ()); break; case 7: switch (reg) { case 0: - ad = (uae_s32) (uae_s16) x_next_iword (regs); + ad = (uae_s32) (uae_s16) x_next_iword (); break; case 1: - ad = x_next_ilong (regs); + ad = x_next_ilong (); break; case 2: - ad = m68k_getpc (regs); - ad += (uae_s32) (uae_s16) x_next_iword (regs); + ad = m68k_getpc (); + ad += (uae_s32) (uae_s16) x_next_iword (); break; case 3: - tmppc = m68k_getpc (regs); - tmp = x_next_iword (regs); - ad = get_disp_ea_020 (regs, tmppc, tmp); + tmppc = m68k_getpc (); + tmp = x_next_iword (); + ad = x_get_disp_ea_020 (tmppc, tmp); break; case 4: - ad = m68k_getpc (regs); - m68k_setpc (regs, ad + sz2[size]); + ad = m68k_getpc (); + m68k_setpc (ad + sz2[size]); if (size == 6) ad++; break; @@ -428,39 +432,39 @@ STATIC_INLINE int get_fp_value (uae_u32 opcode, uae_u16 extra, fptype *src) } switch (size) { case 0: - *src = (fptype) (uae_s32) get_long (ad); + *src = (fptype) (uae_s32) x_get_long (ad); break; case 1: - *src = to_single (get_long (ad)); + *src = to_single (x_get_long (ad)); break; case 2:{ uae_u32 wrd1, wrd2, wrd3; - wrd1 = get_long (ad); + wrd1 = x_get_long (ad); ad += 4; - wrd2 = get_long (ad); + wrd2 = x_get_long (ad); ad += 4; - wrd3 = get_long (ad); + wrd3 = x_get_long (ad); *src = to_exten (wrd1, wrd2, wrd3); } break; case 3:{ uae_u32 wrd1, wrd2, wrd3; - wrd1 = get_long (ad); + wrd1 = x_get_long (ad); ad += 4; - wrd2 = get_long (ad); + wrd2 = x_get_long (ad); ad += 4; - wrd3 = get_long (ad); + wrd3 = x_get_long (ad); *src = to_pack (wrd1, wrd2, wrd3); } break; case 4: - *src = (fptype) (uae_s16) get_word (ad); + *src = (fptype) (uae_s16) x_get_word (ad); break; case 5:{ uae_u32 wrd1, wrd2; - wrd1 = get_long (ad); + wrd1 = x_get_long (ad); ad += 4; - wrd2 = get_long (ad); + wrd2 = x_get_long (ad); *src = to_double (wrd1, wrd2); } break; @@ -529,31 +533,31 @@ STATIC_INLINE int put_fp_value (struct regstruct ®s, fptype value, uae_u32 op ad = m68k_areg (regs, reg); break; case 5: - ad = m68k_areg (regs, reg) + (uae_s32) (uae_s16) x_next_iword (regs); + ad = m68k_areg (regs, reg) + (uae_s32) (uae_s16) x_next_iword (); break; case 6: - ad = get_disp_ea_020 (regs, m68k_areg (regs, reg), x_next_iword (regs)); + ad = x_get_disp_ea_020 (m68k_areg (regs, reg), x_next_iword ()); break; case 7: switch (reg) { case 0: - ad = (uae_s32) (uae_s16) x_next_iword (regs); + ad = (uae_s32) (uae_s16) x_next_iword (); break; case 1: - ad = x_next_ilong (regs); + ad = x_next_ilong (); break; case 2: - ad = m68k_getpc (regs); - ad += (uae_s32) (uae_s16) x_next_iword (regs); + ad = m68k_getpc (); + ad += (uae_s32) (uae_s16) x_next_iword (); break; case 3: - tmppc = m68k_getpc (regs); - tmp = x_next_iword (regs); - ad = get_disp_ea_020 (regs, tmppc, tmp); + tmppc = m68k_getpc (); + tmp = x_next_iword (); + ad = x_get_disp_ea_020 (tmppc, tmp); break; case 4: - ad = m68k_getpc (regs); - m68k_setpc (regs, ad + sz2[size]); + ad = m68k_getpc (); + m68k_setpc (ad + sz2[size]); break; default: return 0; @@ -561,46 +565,46 @@ STATIC_INLINE int put_fp_value (struct regstruct ®s, fptype value, uae_u32 op } switch (size) { case 0: - put_long (ad, (uae_u32)toint(value, -2147483648.0, 2147483647.0)); + x_put_long (ad, (uae_u32)toint(value, -2147483648.0, 2147483647.0)); break; case 1: - put_long (ad, from_single (value)); + x_put_long (ad, from_single (value)); break; case 2: { uae_u32 wrd1, wrd2, wrd3; from_exten (value, &wrd1, &wrd2, &wrd3); - put_long (ad, wrd1); + x_put_long (ad, wrd1); ad += 4; - put_long (ad, wrd2); + x_put_long (ad, wrd2); ad += 4; - put_long (ad, wrd3); + x_put_long (ad, wrd3); } break; case 3: { uae_u32 wrd1, wrd2, wrd3; from_pack (value, &wrd1, &wrd2, &wrd3); - put_long (ad, wrd1); + x_put_long (ad, wrd1); ad += 4; - put_long (ad, wrd2); + x_put_long (ad, wrd2); ad += 4; - put_long (ad, wrd3); + x_put_long (ad, wrd3); } break; case 4: - put_word (ad, (uae_s16) toint(value, -32768.0, 32767.0)); + x_put_word (ad, (uae_s16) toint(value, -32768.0, 32767.0)); break; case 5:{ uae_u32 wrd1, wrd2; from_double (value, &wrd1, &wrd2); - put_long (ad, wrd1); + x_put_long (ad, wrd1); ad += 4; - put_long (ad, wrd2); + x_put_long (ad, wrd2); } break; case 6: - put_byte (ad, (uae_s8)toint(value, -128.0, 127.0)); + x_put_byte (ad, (uae_s8)toint(value, -128.0, 127.0)); break; default: return 0; @@ -631,27 +635,27 @@ STATIC_INLINE int get_fp_ad (uae_u32 opcode, uae_u32 * ad) *ad = m68k_areg (regs, reg); break; case 5: - *ad = m68k_areg (regs, reg) + (uae_s32) (uae_s16) x_next_iword (regs); + *ad = m68k_areg (regs, reg) + (uae_s32) (uae_s16) x_next_iword (); break; case 6: - *ad = get_disp_ea_020 (regs, m68k_areg (regs, reg), x_next_iword (regs)); + *ad = x_get_disp_ea_020 (m68k_areg (regs, reg), x_next_iword ()); break; case 7: switch (reg) { case 0: - *ad = (uae_s32) (uae_s16) x_next_iword (regs); + *ad = (uae_s32) (uae_s16) x_next_iword (); break; case 1: - *ad = x_next_ilong (regs); + *ad = x_next_ilong (); break; case 2: - *ad = m68k_getpc (regs); - *ad += (uae_s32) (uae_s16) x_next_iword (regs); + *ad = m68k_getpc (); + *ad += (uae_s32) (uae_s16) x_next_iword (); break; case 3: - tmppc = m68k_getpc (regs); - tmp = x_next_iword (regs); - *ad = get_disp_ea_020 (regs, tmppc, tmp); + tmppc = m68k_getpc (); + tmp = x_next_iword (); + *ad = x_get_disp_ea_020 (tmppc, tmp); break; default: return 0; @@ -744,18 +748,19 @@ STATIC_INLINE int fpp_cond (int condition) void fpuop_dbcc (uae_u32 opcode, struct regstruct ®s, uae_u16 extra) { - uaecptr pc = (uae_u32) m68k_getpc (regs); + uaecptr pc = (uae_u32) m68k_getpc (); uae_s32 disp; int cc; #if DEBUG_FPP if (!isinrom ()) - write_log (_T("fdbcc_opp at %08lx\n"), m68k_getpc (regs)); + write_log (_T("fdbcc_opp at %08lx\n"), m68k_getpc ()); #endif if (fault_if_no_fpu (opcode, regs, 4)) return; - disp = (uae_s32) (uae_s16) x_next_iword (regs); + regs.fpiar = m68k_getpc () - 4; + disp = (uae_s32) (uae_s16) x_next_iword (); cc = fpp_cond (extra & 0x3f); if (cc == -1) { fpu_op_illg (opcode, regs, 4); @@ -765,7 +770,7 @@ void fpuop_dbcc (uae_u32 opcode, struct regstruct ®s, uae_u16 extra) m68k_dreg (regs, reg) = ((m68k_dreg (regs, reg) & 0xffff0000) | (((m68k_dreg (regs, reg) & 0xffff) - 1) & 0xffff)); if ((m68k_dreg (regs, reg) & 0xffff) != 0xffff) - m68k_setpc (regs, pc + disp); + m68k_setpc (pc + disp); } } @@ -776,11 +781,12 @@ void fpuop_scc (uae_u32 opcode, struct regstruct ®s, uae_u16 extra) #if DEBUG_FPP if (!isinrom ()) - write_log (_T("fscc_opp at %08lx\n"), m68k_getpc (regs)); + write_log (_T("fscc_opp at %08lx\n"), m68k_getpc ()); #endif if (fault_if_no_fpu (opcode, regs, 4)) return; + regs.fpiar = m68k_getpc () - 4; cc = fpp_cond (extra & 0x3f); if (cc == -1) { fpu_op_illg (opcode, regs, 4); @@ -788,50 +794,54 @@ void fpuop_scc (uae_u32 opcode, struct regstruct ®s, uae_u16 extra) m68k_dreg (regs, opcode & 7) = (m68k_dreg (regs, opcode & 7) & ~0xff) | (cc ? 0xff : 0x00); } else { if (get_fp_ad (opcode, &ad) == 0) { - m68k_setpc (regs, m68k_getpc (regs) - 4); - op_illg (opcode, regs); + m68k_setpc (m68k_getpc () - 4); + op_illg (opcode); } else - put_byte (ad, cc ? 0xff : 0x00); + x_put_byte (ad, cc ? 0xff : 0x00); } } void fpuop_trapcc (uae_u32 opcode, struct regstruct ®s, uaecptr oldpc, uae_u16 extra) { int cc; + uaecptr pc = m68k_getpc (); #if DEBUG_FPP if (!isinrom ()) - write_log (_T("ftrapcc_opp at %08lx\n"), m68k_getpc (regs)); + write_log (_T("ftrapcc_opp at %08lx\n"), m68k_getpc ()); #endif - if (fault_if_no_fpu (opcode, regs, m68k_getpc(regs) - oldpc)) + if (fault_if_no_fpu (opcode, regs, pc - oldpc)) return; + regs.fpiar = oldpc; cc = fpp_cond (extra & 0x3f); if (cc == -1) { - fpu_op_illg (opcode, regs, m68k_getpc(regs) - oldpc); + fpu_op_illg (opcode, regs, pc - oldpc); } if (cc) - Exception (7, regs); + Exception (7); } -void fpuop_bcc (uae_u32 opcode, struct regstruct ®s, uaecptr pc, uae_u32 extra) +void fpuop_bcc (uae_u32 opcode, struct regstruct ®s, uaecptr oldpc, uae_u32 extra) { int cc; + uaecptr pc = m68k_getpc (); #if DEBUG_FPP if (!isinrom ()) - write_log (_T("fbcc_opp at %08lx\n"), m68k_getpc (regs)); + write_log (_T("fbcc_opp at %08lx\n"), m68k_getpc ()); #endif - if (fault_if_no_fpu (opcode, regs, m68k_getpc(regs) - pc)) + if (fault_if_no_fpu (opcode, regs, pc - oldpc)) return; + regs.fpiar = oldpc; cc = fpp_cond (opcode & 0x3f); if (cc == -1) { - fpu_op_illg (opcode, regs, m68k_getpc(regs) - pc); + fpu_op_illg (opcode, regs, pc - oldpc); } else if (cc) { if ((opcode & 0x40) == 0) extra = (uae_s32) (uae_s16) extra; - m68k_setpc (regs, pc + extra); + m68k_setpc (oldpc + extra); } } @@ -840,11 +850,12 @@ void fpuop_save (uae_u32 opcode, struct regstruct ®s) uae_u32 ad; int incr = (opcode & 0x38) == 0x20 ? -1 : 1; int fpu_version = get_fpu_version(); + uaecptr pc = m68k_getpc () - 2; int i; #if DEBUG_FPP if (!isinrom ()) - write_log (_T("fsave_opp at %08lx\n"), m68k_getpc (regs)); + write_log (_T("fsave_opp at %08lx\n"), m68k_getpc ()); #endif if (fault_if_no_fpu (opcode, regs, 2)) return; @@ -854,51 +865,56 @@ void fpuop_save (uae_u32 opcode, struct regstruct ®s) return; } +// if (regs.fpcr == 0 && regs.fpsr == 0 && regs.fpiar == 0 && +// regs.fp[0] == + + regs.fpiar = pc; + if (currprefs.fpu_model == 68060) { /* 12 byte 68060 IDLE frame. */ if (incr < 0) { ad -= 4; - put_long (ad, 0x00000000); + x_put_long (ad, 0x00000000); ad -= 4; - put_long (ad, 0x00000000); + x_put_long (ad, 0x00000000); ad -= 4; - put_long (ad, 0x00006000); + x_put_long (ad, 0x00006000); } else { - put_long (ad, 0x00006000); + x_put_long (ad, 0x00006000); ad += 4; - put_long (ad, 0x00000000); + x_put_long (ad, 0x00000000); ad += 4; - put_long (ad, 0x00000000); + x_put_long (ad, 0x00000000); ad += 4; } } else if (currprefs.fpu_model == 68040) { /* 4 byte 68040 IDLE frame. */ if (incr < 0) { ad -= 4; - put_long (ad, fpu_version << 24); + x_put_long (ad, fpu_version << 24); } else { - put_long (ad, fpu_version << 24); + x_put_long (ad, fpu_version << 24); ad += 4; } } else { /* 68881/68882 */ int idle_size = currprefs.fpu_model == 68882 ? 0x38 : 0x18; if (incr < 0) { ad -= 4; - put_long (ad, 0x70000000); + x_put_long (ad, 0x70000000); for (i = 0; i < (idle_size - 1) / 4; i++) { ad -= 4; - put_long (ad, 0x00000000); + x_put_long (ad, 0x00000000); } ad -= 4; - put_long (ad, (fpu_version << 24) | (idle_size << 16)); + x_put_long (ad, (fpu_version << 24) | (idle_size << 16)); } else { - put_long (ad, (fpu_version << 24) | (idle_size << 16)); + x_put_long (ad, (fpu_version << 24) | (idle_size << 16)); ad += 4; for (i = 0; i < (idle_size - 1) / 4; i++) { - put_long (ad, 0x00000000); + x_put_long (ad, 0x00000000); ad += 4; } - put_long (ad, 0x70000000); + x_put_long (ad, 0x70000000); ad += 4; } } @@ -910,13 +926,14 @@ void fpuop_save (uae_u32 opcode, struct regstruct ®s) void fpuop_restore (uae_u32 opcode, struct regstruct ®s) { + uaecptr pc = m68k_getpc () - 2; uae_u32 ad; uae_u32 d; int incr = (opcode & 0x38) == 0x20 ? -1 : 1; #if DEBUG_FPP if (!isinrom ()) - write_log (_T("frestore_opp at %08lx\n"), m68k_getpc (regs)); + write_log (_T("frestore_opp at %08lx\n"), m68k_getpc ()); #endif if (fault_if_no_fpu (opcode, regs, 2)) return; @@ -925,14 +942,17 @@ void fpuop_restore (uae_u32 opcode, struct regstruct ®s) fpu_op_illg (opcode, regs, 2); return; } + + regs.fpiar = pc; + if (currprefs.fpu_model == 68060) { /* all 68060 FPU frames are 12 bytes */ if (incr < 0) { ad -= 4; - d = get_long (ad); + d = x_get_long (ad); ad -= 8; } else { - d = get_long (ad); + d = x_get_long (ad); ad += 4; ad += 8; } @@ -942,7 +962,7 @@ void fpuop_restore (uae_u32 opcode, struct regstruct ®s) if (incr < 0) { /* @@@ This may be wrong. */ ad -= 4; - d = get_long (ad); + d = x_get_long (ad); if ((d & 0xff000000) != 0) { /* Not a NULL frame? */ if ((d & 0x00ff0000) == 0) { /* IDLE */ } else if ((d & 0x00ff0000) == 0x00300000) { /* UNIMP */ @@ -952,7 +972,7 @@ void fpuop_restore (uae_u32 opcode, struct regstruct ®s) } } } else { - d = get_long (ad); + d = x_get_long (ad); ad += 4; if ((d & 0xff000000) != 0) { /* Not a NULL frame? */ if ((d & 0x00ff0000) == 0) { /* IDLE */ @@ -966,7 +986,7 @@ void fpuop_restore (uae_u32 opcode, struct regstruct ®s) } else { /* 68881/68882 */ if (incr < 0) { ad -= 4; - d = get_long (ad); + d = x_get_long (ad); if ((d & 0xff000000) != 0) { if ((d & 0x00ff0000) == 0x00180000) ad -= 6 * 4; @@ -976,7 +996,7 @@ void fpuop_restore (uae_u32 opcode, struct regstruct ®s) ad -= 45 * 4; } } else { - d = get_long (ad); + d = x_get_long (ad); ad += 4; if ((d & 0xff000000) != 0) { if ((d & 0x00ff0000) == 0x00180000) @@ -1003,10 +1023,11 @@ static void fpuop_arithmetic2 (uae_u32 opcode, struct regstruct ®s, uae_u16 e { int reg; fptype src; + uaecptr pc = m68k_getpc () - 4; #if DEBUG_FPP if (!isinrom ()) - write_log (_T("FPP %04lx %04x at %08lx\n"), opcode & 0xffff, extra, m68k_getpc (regs) - 4); + write_log (_T("FPP %04lx %04x at %08lx\n"), opcode & 0xffff, extra, pc); #endif if (fault_if_no_fpu (opcode, regs, 4)) return; @@ -1014,8 +1035,8 @@ static void fpuop_arithmetic2 (uae_u32 opcode, struct regstruct ®s, uae_u16 e switch ((extra >> 13) & 0x7) { case 3: if (put_fp_value (regs, regs.fp[(extra >> 7) & 7], opcode, extra) == 0) { - m68k_setpc (regs, m68k_getpc (regs) - 4); - op_illg (opcode, regs); + m68k_setpc (pc); + op_illg (opcode); } return; case 4: @@ -1059,13 +1080,13 @@ static void fpuop_arithmetic2 (uae_u32 opcode, struct regstruct ®s, uae_u16 e } else if ((opcode & 0x3f) == 0x3c) { if ((extra & 0x2000) == 0) { if (extra & 0x1000) { - regs.fpcr = x_next_ilong (regs); + regs.fpcr = x_next_ilong (); native_set_fpucw (regs.fpcr); } if (extra & 0x0800) - set_fpsr (x_next_ilong (regs)); + set_fpsr (x_next_ilong ()); if (extra & 0x0400) - regs.fpiar = x_next_ilong (regs); + regs.fpiar = x_next_ilong (); } } else if (extra & 0x2000) { /* FMOVEM FPP->memory */ @@ -1073,8 +1094,8 @@ static void fpuop_arithmetic2 (uae_u32 opcode, struct regstruct ®s, uae_u16 e int incr = 0; if (get_fp_ad (opcode, &ad) == 0) { - m68k_setpc (regs, m68k_getpc (regs) - 4); - op_illg (opcode, regs); + m68k_setpc (pc); + op_illg (opcode); return; } if ((opcode & 0x38) == 0x20) { @@ -1087,15 +1108,15 @@ static void fpuop_arithmetic2 (uae_u32 opcode, struct regstruct ®s, uae_u16 e } ad -= incr; if (extra & 0x1000) { - put_long (ad, regs.fpcr & 0xffff); + x_put_long (ad, regs.fpcr & 0xffff); ad += 4; } if (extra & 0x0800) { - put_long (ad, get_fpsr()); + x_put_long (ad, get_fpsr()); ad += 4; } if (extra & 0x0400) { - put_long (ad, regs.fpiar); + x_put_long (ad, regs.fpiar); ad += 4; } ad -= incr; @@ -1109,8 +1130,8 @@ static void fpuop_arithmetic2 (uae_u32 opcode, struct regstruct ®s, uae_u16 e int incr = 0; if (get_fp_ad (opcode, &ad) == 0) { - m68k_setpc (regs, m68k_getpc (regs) - 4); - op_illg (opcode, regs); + m68k_setpc (pc); + op_illg (opcode); return; } if((opcode & 0x38) == 0x20) { @@ -1123,16 +1144,16 @@ static void fpuop_arithmetic2 (uae_u32 opcode, struct regstruct ®s, uae_u16 e ad = ad - incr; } if (extra & 0x1000) { - regs.fpcr = get_long (ad); + regs.fpcr = x_get_long (ad); native_set_fpucw(regs.fpcr); ad += 4; } if (extra & 0x0800) { - set_fpsr(get_long (ad)); + set_fpsr(x_get_long (ad)); ad += 4; } if (extra & 0x0400) { - regs.fpiar = get_long (ad); + regs.fpiar = x_get_long (ad); ad += 4; } if ((opcode & 0x38) == 0x18) @@ -1149,8 +1170,8 @@ static void fpuop_arithmetic2 (uae_u32 opcode, struct regstruct ®s, uae_u16 e if (extra & 0x2000) { /* FMOVEM FPP->memory */ if (get_fp_ad (opcode, &ad) == 0) { - m68k_setpc (regs, m68k_getpc (regs) - 4); - op_illg (opcode, regs); + m68k_setpc (pc); + op_illg (opcode); return; } switch ((extra >> 11) & 3) { @@ -1177,11 +1198,11 @@ static void fpuop_arithmetic2 (uae_u32 opcode, struct regstruct ®s, uae_u16 e if (list & 0x80) { from_exten (regs.fp[reg], &wrd1, &wrd2, &wrd3); ad -= 4; - put_long (ad, wrd3); + x_put_long (ad, wrd3); ad -= 4; - put_long (ad, wrd2); + x_put_long (ad, wrd2); ad -= 4; - put_long (ad, wrd1); + x_put_long (ad, wrd1); } list <<= 1; } @@ -1190,11 +1211,11 @@ static void fpuop_arithmetic2 (uae_u32 opcode, struct regstruct ®s, uae_u16 e uae_u32 wrd1, wrd2, wrd3; if (list & 0x80) { from_exten (regs.fp[reg], &wrd1, &wrd2, &wrd3); - put_long (ad, wrd1); + x_put_long (ad, wrd1); ad += 4; - put_long (ad, wrd2); + x_put_long (ad, wrd2); ad += 4; - put_long (ad, wrd3); + x_put_long (ad, wrd3); ad += 4; } list <<= 1; @@ -1207,8 +1228,8 @@ static void fpuop_arithmetic2 (uae_u32 opcode, struct regstruct ®s, uae_u16 e } else { /* FMOVEM memory->FPP */ if (get_fp_ad (opcode, &ad) == 0) { - m68k_setpc (regs, m68k_getpc (regs) - 4); - op_illg (opcode, regs); + m68k_setpc (pc); + op_illg (opcode); return; } switch ((extra >> 11) & 3) { @@ -1234,11 +1255,11 @@ static void fpuop_arithmetic2 (uae_u32 opcode, struct regstruct ®s, uae_u16 e uae_u32 wrd1, wrd2, wrd3; if (list & 0x80) { ad -= 4; - wrd3 = get_long (ad); + wrd3 = x_get_long (ad); ad -= 4; - wrd2 = get_long (ad); + wrd2 = x_get_long (ad); ad -= 4; - wrd1 = get_long (ad); + wrd1 = x_get_long (ad); regs.fp[reg] = to_exten(wrd1, wrd2, wrd3); } list <<= 1; @@ -1247,11 +1268,11 @@ static void fpuop_arithmetic2 (uae_u32 opcode, struct regstruct ®s, uae_u16 e for (reg = 0; reg <= 7; reg++) { uae_u32 wrd1, wrd2, wrd3; if (list & 0x80) { - wrd1 = get_long (ad); + wrd1 = x_get_long (ad); ad += 4; - wrd2 = get_long (ad); + wrd2 = x_get_long (ad); ad += 4; - wrd3 = get_long (ad); + wrd3 = x_get_long (ad); ad += 4; regs.fp[reg] = to_exten(wrd1, wrd2, wrd3); } @@ -1337,19 +1358,23 @@ static void fpuop_arithmetic2 (uae_u32 opcode, struct regstruct ®s, uae_u16 e regs.fp[reg] = *fp_1e4096; break; default: - m68k_setpc (regs, m68k_getpc (regs) - 4); - op_illg (opcode, regs); + m68k_setpc (pc); + op_illg (opcode); return; } MAKE_FPSR (regs.fp[reg]); return; } if (get_fp_value (opcode, extra, &src) == 0) { - m68k_setpc (regs, m68k_getpc (regs) - 4); - op_illg (opcode, regs); + m68k_setpc (pc); + op_illg (opcode); return; } + + regs.fpiar = pc; + switch (extra & 0x7f) { + case 0x00: /* FMOVE */ case 0x40: /* Explicit rounding. This is just a quick fix. */ case 0x44: /* Same for all other cases that have three choices */ @@ -1574,15 +1599,15 @@ static void fpuop_arithmetic2 (uae_u32 opcode, struct regstruct ®s, uae_u16 e MAKE_FPSR (src); return; default: - m68k_setpc (regs, m68k_getpc (regs) - 4); - op_illg (opcode, regs); + m68k_setpc (pc); + op_illg (opcode); return; } MAKE_FPSR (regs.fp[reg]); return; } - m68k_setpc (regs, m68k_getpc (regs) - 4); - op_illg (opcode, regs); + m68k_setpc (pc); + op_illg (opcode); } void fpuop_arithmetic (uae_u32 opcode, struct regstruct ®s, uae_u16 extra) diff --git a/src/fsdb.cpp b/src/fsdb.cpp index cb4a706c..b4048c76 100644 --- a/src/fsdb.cpp +++ b/src/fsdb.cpp @@ -53,7 +53,7 @@ TCHAR *fsdb_search_dir (const TCHAR *dirname, TCHAR *rel) { TCHAR *p = 0; int de; - struct my_opendir_s *dir; + my_opendir_s *dir; TCHAR fn[MAX_DPATH]; dir = my_opendir (dirname); @@ -94,14 +94,16 @@ static void kill_fsdb (a_inode *dir) xfree (n); } -static void fsdb_fixup (FILE *f, TCHAR *buf, int size, a_inode *base) +static void fsdb_fixup (FILE *f, uae_u8 *buf, int size, a_inode *base) { TCHAR *nname; int ret; if (buf[0] == 0) return; - nname = build_nname (base->nname, buf + 5 + 257); + TCHAR *fnname = au ((char*)buf + 5 + 257); + nname = build_nname (base->nname, fnname); + xfree (fnname); ret = fsdb_exists (nname); if (ret) { xfree (nname); @@ -116,7 +118,7 @@ static void fsdb_fixup (FILE *f, TCHAR *buf, int size, a_inode *base) /* Prune the db file the first time this directory is opened in a session. */ void fsdb_clean_dir (a_inode *dir) { - TCHAR buf[1 + 4 + 257 + 257 + 81]; + uae_u8 buf[1 + 4 + 257 + 257 + 81]; TCHAR *n; FILE *f; off_t pos1 = 0, pos2; @@ -144,7 +146,11 @@ void fsdb_clean_dir (a_inode *dir) pos1 += sizeof buf; } fclose (f); - my_truncate (n, pos1); + if (pos1 == 0) { + kill_fsdb (dir); + } else { + my_truncate (n, pos1); + } xfree (n); } @@ -152,14 +158,17 @@ static a_inode *aino_from_buf (a_inode *base, uae_u8 *buf, long off) { uae_u32 mode; a_inode *aino = xcalloc (a_inode, 1); + TCHAR *s; mode = do_get_mem_long ((uae_u32 *)(buf + 1)); buf += 5; - aino->aname = my_strdup ((char*)buf); + aino->aname = au ((char*)buf); buf += 257; - aino->nname = build_nname (base->nname, (char*)buf); + s = au ((char*)buf); + aino->nname = build_nname (base->nname, s); + xfree (s); buf += 257; - aino->comment = *buf != '\0' ? my_strdup ((char*)buf) : 0; + aino->comment = *buf != '\0' ? au ((char*)buf) : 0; fsdb_fill_file_attrs (base, aino); aino->amigaos_mode = mode; aino->has_dbentry = 1; @@ -178,13 +187,17 @@ a_inode *fsdb_lookup_aino_aname (a_inode *base, const TCHAR *aname) } for (;;) { uae_u8 buf[1 + 4 + 257 + 257 + 81]; + TCHAR *s; if (fread (buf, 1, sizeof buf, f) < sizeof buf) break; - if (buf[0] != 0 && same_aname ((char*)buf + 5, aname)) { + s = au ((char*)buf + 5); + if (buf[0] != 0 && same_aname (s, aname)) { long pos = ftell (f) - sizeof buf; fclose (f); + xfree (s); return aino_from_buf (base, buf, pos); } + xfree (s); } fclose (f); return 0; @@ -193,21 +206,25 @@ a_inode *fsdb_lookup_aino_aname (a_inode *base, const TCHAR *aname) a_inode *fsdb_lookup_aino_nname (a_inode *base, const TCHAR *nname) { FILE *f; + char *s; f = get_fsdb (base, _T("r+b")); if (f == 0) { return 0; } + s = ua (nname); for (;;) { uae_u8 buf[1 + 4 + 257 + 257 + 81]; if (fread (buf, 1, sizeof buf, f) < sizeof buf) break; - if (buf[0] != 0 && strcmp ((char*)buf + 5 + 257, nname) == 0) { + if (buf[0] != 0 && strcmp ((char*)buf + 5 + 257, s) == 0) { long pos = ftell (f) - sizeof buf; fclose (f); + xfree (s); return aino_from_buf (base, buf, pos); } } + xfree (s); fclose (f); return 0; } @@ -222,14 +239,18 @@ int fsdb_used_as_nname (a_inode *base, const TCHAR *nname) return 0; } for (;;) { + TCHAR *s; if (fread (buf, 1, sizeof buf, f) < sizeof buf) break; if (buf[0] == 0) continue; - if (strcmp ((char*)buf + 5 + 257, nname) == 0) { + s = au ((char*)buf + 5 + 257); + if (_tcscmp (s, nname) == 0) { + xfree (s); fclose (f); return 1; } + xfree (s); } fclose (f); return 0; @@ -252,13 +273,13 @@ static int needs_dbentry (a_inode *aino) static void write_aino (FILE *f, a_inode *aino) { uae_u8 buf[1 + 4 + 257 + 257 + 81] = { 0 }; - buf[0] = aino->needs_dbentry; + buf[0] = aino->needs_dbentry ? 1 : 0; do_put_mem_long ((uae_u32 *)(buf + 1), aino->amigaos_mode); - strncpy ((char*)buf + 5, aino->aname, 256); + ua_copy ((char*)buf + 5, 256, aino->aname); buf[5 + 256] = '\0'; - strncpy ((char*)buf + 5 + 257, nname_begin (aino->nname), 256); + ua_copy ((char*)buf + 5 + 257, 256, nname_begin (aino->nname)); buf[5 + 257 + 256] = '\0'; - strncpy ((char*)buf + 5 + 2 * 257, aino->comment ? aino->comment : _T(""), 80); + ua_copy ((char*)buf + 5 + 2 * 257, 80, aino->comment ? aino->comment : _T("")); buf[5 + 2 * 257 + 80] = '\0'; aino->db_offset = ftell (f); fwrite (buf, 1, sizeof buf, f); @@ -281,6 +302,11 @@ void fsdb_dir_writeback (a_inode *dir) /* First pass: clear dirty bits where unnecessary, and see if any work * needs to be done. */ for (aino = dir->child; aino; aino = aino->sibling) { + /* + int old_needs_dbentry = aino->needs_dbentry || aino->has_dbentry; + aino->needs_dbentry = needs_dbentry (aino); + entries_needed |= aino->has_dbentry | aino->needs_dbentry; + */ int old_needs_dbentry = aino->has_dbentry; int need = needs_dbentry (aino); aino->needs_dbentry = need; @@ -329,10 +355,12 @@ void fsdb_dir_writeback (a_inode *dir) i = 0; while (!aino->has_dbentry && i < size) { - if (!strcmp ((const char *)(tmpbuf + i + 5), aino->aname)) { + TCHAR *s = au ((char*)tmpbuf + i + 5); + if (!_tcscmp (s, aino->aname)) { aino->has_dbentry = 1; aino->db_offset = i; } + xfree (s); i += 1 + 4 + 257 + 257 + 81; } if (! aino->has_dbentry) { diff --git a/src/fsdb_unix.cpp b/src/fsdb_unix.cpp index 7d609771..31fffcef 100644 --- a/src/fsdb_unix.cpp +++ b/src/fsdb_unix.cpp @@ -13,6 +13,7 @@ #include "config.h" #include "fsdb.h" +#include "uae.h" /* these are deadly (but I think allowed on the Amiga): */ #define NUM_EVILCHARS 7 @@ -21,37 +22,50 @@ static TCHAR evilchars[NUM_EVILCHARS] = { '\\', '*', '?', '\"', '<', '>', '|' }; static int fsdb_name_invalid_2 (const TCHAR *n, int dir) { int i; + int l = _tcslen (n); /* the reserved fsdb filename */ if (_tcscmp (n, FSDB_FILE) == 0) return -1; + if (dir) { + if (n[0] == '.' && l == 1) + return -1; + if (n[0] == '.' && n[1] == '.' && l == 2) + return -1; + } + /* these characters are *never* allowed */ for (i = 0; i < NUM_EVILCHARS; i++) { if (_tcschr (n, evilchars[i]) != 0) return 1; } - if (n[0] != '.') - return 0; - if (n[1] == '\0') - return 1; - return n[1] == '.' && n[2] == '\0'; + return 0; /* the filename passed all checks, now it should be ok */ } int fsdb_name_invalid (const TCHAR *n) { - int v = fsdb_name_invalid_2 (n, 0); - if (v <= 0) - return v; - write_log (_T("FILESYS: '%s' illegal filename\n"), n); - return v; + int v = fsdb_name_invalid_2 (n, 0); + if (v <= 0) + return v; + write_log (_T("FILESYS: '%s' illegal filename\n"), n); + return v; } -int fsdb_exists (char *nname) +int fsdb_name_invalid_dir (const TCHAR *n) { - struct stat statbuf; - return (stat (nname, &statbuf) != -1); + int v = fsdb_name_invalid_2 (n, 1); + if (v <= 0) + return v; + write_log (_T("FILESYS: '%s' illegal filename\n"), n); + return v; +} + +int fsdb_exists (const char *nname) +{ + struct stat statbuf; + return (stat (nname, &statbuf) != -1); } /* For an a_inode we have newly created based on a filename we found on the @@ -166,11 +180,7 @@ char *fsdb_create_unique_nname (a_inode *base, const char *suggestion) /* tmpnam isn't reentrant and I don't really want to hack configure * right now to see whether tmpnam_r is available... */ for (i = 0; i < 8; i++) { -#ifdef WIN32 - tmp[i] = "_abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789"[rand () % 63]; -#else - tmp[i] = "_abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789"[random () % 63]; -#endif + tmp[i] = "_abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789"[uaerand () % 63]; } } } diff --git a/src/fsusage.cpp b/src/fsusage.cpp index 9d924dfc..b86db9b1 100644 --- a/src/fsusage.cpp +++ b/src/fsusage.cpp @@ -17,12 +17,10 @@ #include "sysconfig.h" #include "sysdeps.h" -#include "config.h" #include #include #include -#include #include "fsusage.h" @@ -50,11 +48,7 @@ static long adjust_blocks(long blocks, int fromsize, int tosize) Return the actual number of bytes read, zero for EOF, or negative for an error. */ -int -safe_read - (int desc, - TCHAR *ptr, - int len) +int safe_read (int desc, TCHAR *ptr, int len) { int n_chars; @@ -81,11 +75,8 @@ safe_read Return 0 if successful, -1 if not. When returning -1, ensure that ERRNO is either a system error value, or zero if DISK is NULL on a system that requires a non-NULL value. */ -int -get_fs_usage - (const TCHAR *path, - const TCHAR *disk, - struct fs_usage *fsp) +#ifndef WINDOWS +int get_fs_usage (const TCHAR *path, const TCHAR *disk, struct fs_usage *fsp) { #ifdef STAT_STATFS3_OSF1 # define CONVERT_BLOCKS(B) adjust_blocks ((B), fsd.f_fsize, 512) @@ -231,3 +222,4 @@ get_fs_usage return 0; } +#endif diff --git a/src/genblitter.cpp b/src/genblitter.cpp index bfcc53c8..81cc317a 100644 --- a/src/genblitter.cpp +++ b/src/genblitter.cpp @@ -97,15 +97,15 @@ static void generate_func(void) printf("uaecptr dstp = 0;\n"); printf("for (j = 0; j < b->vblitsize; j++) {\n"); printf("\tfor (i = 0; i < b->hblitsize; i++) {\n\t\tuae_u32 bltadat, srca;\n\n"); - if (c_is_on) printf("\t\tif (ptc) { srcc = chipmem_agnus_wget (ptc); ptc += 2; }\n"); - if (b_is_on) printf("\t\tif (ptb) {\n\t\t\tuae_u32 bltbdat = blt_info.bltbdat = chipmem_agnus_wget (ptb); ptb += 2;\n"); + if (c_is_on) printf("\t\tif (ptc) { srcc = chipmem_wget_indirect (ptc); ptc += 2; }\n"); + if (b_is_on) printf("\t\tif (ptb) {\n\t\t\tuae_u32 bltbdat = blt_info.bltbdat = chipmem_wget_indirect (ptb); ptb += 2;\n"); if (b_is_on) printf("\t\t\tsrcb = (((uae_u32)prevb << 16) | bltbdat) >> b->blitbshift;\n"); if (b_is_on) printf("\t\t\tprevb = bltbdat;\n\t\t}\n"); - if (a_is_on) printf("\t\tif (pta) { bltadat = blt_info.bltadat = chipmem_agnus_wget (pta); pta += 2; } else { bltadat = blt_info.bltadat; }\n"); + if (a_is_on) printf("\t\tif (pta) { bltadat = blt_info.bltadat = chipmem_wget_indirect (pta); pta += 2; } else { bltadat = blt_info.bltadat; }\n"); if (a_is_on) printf("\t\tbltadat &= blit_masktable[i];\n"); if (a_is_on) printf("\t\tsrca = (((uae_u32)preva << 16) | bltadat) >> b->blitashift;\n"); if (a_is_on) printf("\t\tpreva = bltadat;\n"); - printf("\t\tif (dstp) chipmem_agnus_wput (dstp, dstd);\n"); + printf("\t\tif (dstp) chipmem_wput_indirect (dstp, dstd);\n"); printf("\t\tdstd = (%s) & 0xFFFF;\n", blitops[blttbl[i]].s); printf("\t\ttotald |= dstd;\n"); printf("\t\tif (ptd) { dstp = ptd; ptd += 2; }\n"); @@ -117,7 +117,7 @@ static void generate_func(void) printf("}\n"); if (b_is_on) printf("b->bltbhold = srcb;\n"); if (c_is_on) printf("b->bltcdat = srcc;\n"); - printf("\t\tif (dstp) chipmem_agnus_wput (dstp, dstd);\n"); + printf("\t\tif (dstp) chipmem_wput_indirect (dstp, dstd);\n"); #if 0 printf("}\n"); #endif @@ -174,15 +174,15 @@ static void generate_func(void) printf("uaecptr dstp = 0;\n"); printf("for (j = 0; j < b->vblitsize; j++) {\n"); printf("\tfor (i = 0; i < b->hblitsize; i++) {\n\t\tuae_u32 bltadat, srca;\n"); - if (c_is_on) printf("\t\tif (ptc) { srcc = chipmem_agnus_wget (ptc); ptc -= 2; }\n"); - if (b_is_on) printf("\t\tif (ptb) {\n\t\t\tuae_u32 bltbdat = blt_info.bltbdat = chipmem_agnus_wget (ptb); ptb -= 2;\n"); + if (c_is_on) printf("\t\tif (ptc) { srcc = chipmem_wget_indirect (ptc); ptc -= 2; }\n"); + if (b_is_on) printf("\t\tif (ptb) {\n\t\t\tuae_u32 bltbdat = blt_info.bltbdat = chipmem_wget_indirect (ptb); ptb -= 2;\n"); if (b_is_on) printf("\t\t\tsrcb = ((bltbdat << 16) | prevb) >> b->blitdownbshift;\n"); if (b_is_on) printf("\t\t\tprevb = bltbdat;\n\t\t}\n"); - if (a_is_on) printf("\t\tif (pta) { bltadat = blt_info.bltadat = chipmem_agnus_wget (pta); pta -= 2; } else { bltadat = blt_info.bltadat; }\n"); + if (a_is_on) printf("\t\tif (pta) { bltadat = blt_info.bltadat = chipmem_wget_indirect (pta); pta -= 2; } else { bltadat = blt_info.bltadat; }\n"); if (a_is_on) printf("\t\tbltadat &= blit_masktable[i];\n"); if (a_is_on) printf("\t\tsrca = (((uae_u32)bltadat << 16) | preva) >> b->blitdownashift;\n"); if (a_is_on) printf("\t\tpreva = bltadat;\n"); - printf("\t\tif (dstp) chipmem_agnus_wput (dstp, dstd);\n"); + printf("\t\tif (dstp) chipmem_wput_indirect (dstp, dstd);\n"); printf("\t\tdstd = (%s) & 0xFFFF;\n", blitops[blttbl[i]].s); printf("\t\ttotald |= dstd;\n"); printf("\t\tif (ptd) { dstp = ptd; ptd -= 2; }\n"); @@ -194,7 +194,7 @@ static void generate_func(void) printf("}\n"); if (b_is_on) printf("b->bltbhold = srcb;\n"); if (c_is_on) printf("b->bltcdat = srcc;\n"); - printf("\t\tif (dstp) chipmem_agnus_wput (dstp, dstd);\n"); + printf("\t\tif (dstp) chipmem_wput_indirect (dstp, dstd);\n"); #if 0 printf("}\n"); #endif diff --git a/src/gencpu.cpp b/src/gencpu.cpp index b2d3790f..da891770 100644 --- a/src/gencpu.cpp +++ b/src/gencpu.cpp @@ -783,7 +783,7 @@ static void setpc (const char *format, ...) if (using_mmu) printf ("\tm68k_setpci (regs, %s);\n", buffer); else - printf ("\tm68k_setpc (regs, %s);\n", buffer); + printf ("\tm68k_setpc (%s);\n", buffer); } static void incpc (const char *format, ...) @@ -2763,7 +2763,7 @@ static void resetvars (void) dstblrmw = NULL; dstwlrmw = NULL; dstllrmw = NULL; - getpc = "m68k_getpc (regs)"; + getpc = "m68k_getpc ()"; if (using_indirect > 0) { // tracer @@ -3018,7 +3018,7 @@ static void resetvars (void) dstw = "put_word"; srcb = "get_byte"; dstb = "put_byte"; - getpc = "m68k_getpc (regs)"; + getpc = "m68k_getpc ()"; } else { // generic + direct prefetch_long = "get_ilong"; @@ -3087,13 +3087,13 @@ static void gen_opcode (unsigned int opcode) /* fall through */ case 2: /* priviledged */ - printf ("if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; }\n"); + printf ("if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; }\n"); start_brace (); break; case 3: /* privileged if size == word */ if (curi->size == sz_byte) break; - printf ("if (!regs.s) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; }\n"); + printf ("if (!regs.s) { Exception (8); return 4 * CYCLE_UNIT / 2; }\n"); start_brace (); break; } @@ -3742,7 +3742,7 @@ static void gen_opcode (unsigned int opcode) genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0); gen_set_fault_pc (); sync_m68k_pc (); - printf ("\tException (src + 32, regs);\n"); + printf ("\tException (src + 32);\n"); did_prefetch = 1; clear_m68k_offset(); if (using_ce || using_prefetch) @@ -3791,9 +3791,9 @@ static void gen_opcode (unsigned int opcode) case i_LPSTOP: /* 68060 */ printf ("\tuae_u16 sw = %s (2);\n", srcwi); printf ("\tuae_u16 sr;\n"); - printf ("\tif (sw != (0x100|0x80|0x40)) { Exception (4, regs); return 4 * CYCLE_UNIT / 2; }\n"); + printf ("\tif (sw != (0x100|0x80|0x40)) { Exception (4); return 4 * CYCLE_UNIT / 2; }\n"); printf ("\tsr = %s (4);\n", srcwi); - printf ("\tif (!(sr & 0x8000)) { Exception (8, regs); return 4 * CYCLE_UNIT / 2; }\n"); + printf ("\tif (!(sr & 0x8000)) { Exception (8); return 4 * CYCLE_UNIT / 2; }\n"); printf ("\tregs.sr = sr;\n"); makefromsr (); printf ("\tm68k_setstopped();\n"); @@ -3880,7 +3880,7 @@ static void gen_opcode (unsigned int opcode) printf ("\t\telse if (frame == 0xa) { m68k_areg (regs, 7) += offset + 24; break; }\n"); printf ("\t\telse if (frame == 0xb) { m68k_areg (regs, 7) += offset + 84; break; }\n"); } - printf ("\t\telse { m68k_areg (regs, 7) += offset; Exception (14, regs); return 4 * CYCLE_UNIT / 2; }\n"); + printf ("\t\telse { m68k_areg (regs, 7) += offset; Exception (14); return 4 * CYCLE_UNIT / 2; }\n"); printf ("\t\tregs.sr = newsr;\n"); makefromsr (); printf ("}\n"); @@ -3977,7 +3977,7 @@ static void gen_opcode (unsigned int opcode) } else if (using_prefetch_020) { printf ("\tm68k_do_rtsi ();\n"); } else { - printf ("\tm68k_do_rts (regs);\n"); + printf ("\tm68k_do_rts ();\n"); } printf ("\tif (%s & 1) {\n", getpc); printf ("\t\tuaecptr faultpc = %s;\n", getpc); @@ -3994,7 +3994,7 @@ static void gen_opcode (unsigned int opcode) sync_m68k_pc (); fill_prefetch_next (); printf ("\tif (GET_VFLG ()) {\n"); - printf ("\t\tException (7, regs);\n"); + printf ("\t\tException (7);\n"); printf ("\t\treturn 4 * CYCLE_UNIT / 2;\n"); printf ("\t}\n"); break; @@ -4100,7 +4100,7 @@ static void gen_opcode (unsigned int opcode) printf ("\ts = (uae_s32)src + 2;\n"); if (using_exception_3) { printf ("\tif (src & 1) {\n"); - printf ("\t\texception3i (opcode, m68k_getpc (regs) + s);\n"); + printf ("\t\texception3 (opcode, m68k_getpc () + s, 0, 1, m68k_getpc () + s);\n"); returncycles_exception ("", (count_read + 1 + count_write) * 4 + count_cycles); printf ("\t}\n"); } @@ -4296,7 +4296,7 @@ bccl_not68020: printf("\t\tif (dst < 0) SET_NFLG (1);\n"); } incpc ("%d", m68k_pc_offset); - printf ("\t\tException (5, regs);\n"); + printf ("\t\tException (5);\n"); returncycles_exception ("", (count_read + 1 + count_write) * 4 + count_cycles); printf ("\t} else {\n"); printf ("\t\tuae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;\n"); @@ -4344,7 +4344,7 @@ bccl_not68020: printf("\t\tSET_ZFLG (1);\n"); } incpc ("%d", m68k_pc_offset); - printf ("\t\tException (5, regs);\n"); + printf ("\t\tException (5);\n"); returncycles_exception ("", (count_read + 1 + count_write) * 4 + count_cycles); printf ("\t}\n"); printf ("\tCLEAR_CZNV ();\n"); @@ -4442,13 +4442,13 @@ bccl_not68020: addcycles000 (4); printf ("\tif (dst > src) {\n"); printf ("\t\tSET_NFLG (0);\n"); - printf ("\t\tException (6, regs);\n"); + printf ("\t\tException (6);\n"); returncycles_exception ("", (count_read + 1 + count_write) * 4 + count_cycles); printf ("\t}\n"); addcycles000 (2); printf ("\tif ((uae_s32)dst < 0) {\n"); printf ("\t\tSET_NFLG (1);\n"); - printf ("\t\tException (6, regs);\n"); + printf ("\t\tException (6);\n"); returncycles_exception ("", (count_read + 1 + count_write) * 4 + count_cycles); printf ("\t}\n"); fill_prefetch_next (); @@ -4475,7 +4475,7 @@ bccl_not68020: } printf ("\tSET_ZFLG (upper == reg || lower == reg);\n"); printf ("\tSET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower);\n"); - printf ("\tif ((extra & 0x800) && GET_CFLG ()) { Exception (6, regs);\n"); + printf ("\tif ((extra & 0x800) && GET_CFLG ()) { Exception (6);\n"); returncycles_exception ("", (count_read + 1 + count_write) * 4 + count_cycles); printf("\t}\n}\n"); break; @@ -4938,7 +4938,7 @@ bccl_not68020: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, GF_LRMW); genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_LRMW); //if (cpu_level == 5 && curi->size > 0) { - // printf ("\tif ((dsta & %d) && currprefs.int_no_unimplemented && get_cpu_model () == 68060) {\n", curi->size == 1 ? 1 : 3); + // printf ("\tif ((dsta & %d) && currprefs.cpu_compatible && get_cpu_model () == 68060) {\n", curi->size == 1 ? 1 : 3); // if (curi->dmode == Aipi || curi->dmode == Apdi) // printf ("\t\tm68k_areg (regs, dstreg) %c= %d;\n", curi->dmode == Aipi ? '-' : '+', 1 << curi->size); // sync_m68k_pc_noreset (); @@ -4952,7 +4952,7 @@ bccl_not68020: printf ("\tint ru = (src >> 6) & 7;\n"); printf ("\tint rc = src & 7;\n"); genflags (flag_cmp, curi->size, "newv", "m68k_dreg (regs, rc)", "dst"); - gen_set_fault_pc (); + sync_m68k_pc (); printf ("\tif (GET_ZFLG ())"); old_brace_level = n_braces; start_brace (); @@ -5059,24 +5059,24 @@ bccl_not68020: break; case i_BKPT: /* only needed for hardware emulators */ sync_m68k_pc (); - printf ("\top_illg (opcode, regs);\n"); + printf ("\top_illg (opcode);\n"); did_prefetch = -1; break; case i_CALLM: /* not present in 68030 */ sync_m68k_pc (); - printf ("\top_illg (opcode, regs);\n"); + printf ("\top_illg (opcode);\n"); did_prefetch = -1; break; case i_RTM: /* not present in 68030 */ sync_m68k_pc (); - printf ("\top_illg (opcode, regs);\n"); + printf ("\top_illg (opcode);\n"); did_prefetch = -1; break; case i_TRAPcc: if (curi->smode != am_unknown && curi->smode != am_illg) genamode (curi, curi->smode, "srcreg", curi->size, "dummy", 1, 0, 0); fill_prefetch_0 (); - printf ("\tif (cctrue (regs.ccrflags, %d)) { Exception (7, regs); goto %s; }\n", curi->cc, endlabelstr); + printf ("\tif (cctrue (regs.ccrflags, %d)) { Exception (7); goto %s; }\n", curi->cc, endlabelstr); need_endlabel = 1; break; case i_DIVL: @@ -5085,7 +5085,7 @@ bccl_not68020: genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0); sync_m68k_pc (); printf ("\tif (dst == 0) {\n"); - printf ("\t\tException (5, regs);\n"); + printf ("\t\tException (5);\n"); printf ("\t\treturn 4 * CYCLE_UNIT / 2;\n"); printf ("\t}\n"); printf ("\tm68k_divl(opcode, dst, extra);\n"); diff --git a/src/gfxutil.cpp b/src/gfxutil.cpp index 86fc4c50..d9bd5f2e 100644 --- a/src/gfxutil.cpp +++ b/src/gfxutil.cpp @@ -29,7 +29,7 @@ unsigned int doMask (int p, int bits, int shift) /* p is a value from 0 to 15 (Amiga color value) * scale to 0..255, shift to align msb with mask, and apply mask */ - unsigned long val = p * 0x11111111UL; + uae_u32 val = p * 0x11111111UL; if (!bits) return 0; val >>= (32 - bits); diff --git a/src/hardfile.cpp b/src/hardfile.cpp index 8896f93d..5cdb0140 100644 --- a/src/hardfile.cpp +++ b/src/hardfile.cpp @@ -24,20 +24,25 @@ #include "gui.h" #include "uae.h" #include "execio.h" +#include "zfile.h" +#undef DEBUGME +#define hf_log +#define hf_log2 +#define scsi_log +#define hf_log3 + +//#define DEBUGME +#ifdef DEBUGME #undef hf_log +#define hf_log write_log #undef hf_log2 +#define hf_log2 write_log #undef hf_log3 +#define hf_log3 write_log #undef scsi_log - -//#define hf_log write_log -//#define hf_log2 write_log -//#define hf_log3 write_log -//#define scsi_log write_log -#define hf_log(FORMATO, RESTO...) -#define hf_log2(FORMATO, RESTO...) -#define hf_log3(FORMATO, RESTO...) -#define scsi_log(FORMATO, RESTO...) +#define scsi_log write_log +#endif #define MAX_ASYNC_REQUESTS 50 @@ -58,12 +63,35 @@ struct hardfileprivdata { uaecptr changeint; }; +STATIC_INLINE uae_u32 gl (uae_u8 *p) +{ + return (p[0] << 24) | (p[1] << 16) | (p[2] << 8) | (p[3] << 0); +} + static uae_sem_t change_sem = 0; static struct hardfileprivdata hardfpd[MAX_FILESYSTEM_UNITS]; static uae_u32 nscmd_cmd; +static void wl (uae_u8 *p, int v) +{ + p[0] = v >> 24; + p[1] = v >> 16; + p[2] = v >> 8; + p[3] = v; +} +static void ww (uae_u8 *p, int v) +{ + p[0] = v >> 8; + p[1] = v; +} +static int rl (uae_u8 *p) +{ + return (p[0] << 24) | (p[1] << 16) | (p[2] << 8) | (p[3]); +} + + static void getchs2 (struct hardfiledata *hfd, int *cyl, int *cylsec, int *head, int *tracksec) { unsigned int total = (unsigned int)(hfd->virtsize / 1024); @@ -103,7 +131,7 @@ static void getchs2 (struct hardfiledata *hfd, int *cyl, int *cylsec, int *head, *head = heads; } -static void getchs (struct hardfiledata *hfd, int *cyl, int *cylsec, int *head, int *tracksec) +static void getchsx (struct hardfiledata *hfd, int *cyl, int *cylsec, int *head, int *tracksec) { getchs2 (hfd, cyl, cylsec, head, tracksec); hf_log (_T("CHS: %08X-%08X %d %d %d %d %d\n"), @@ -111,6 +139,307 @@ static void getchs (struct hardfiledata *hfd, int *cyl, int *cylsec, int *head, *cyl, *cylsec, *head, *tracksec); } +static void getchsgeometry2 (uae_u64 size, int *pcyl, int *phead, int *psectorspertrack, int mode) +{ + int sptt[4]; + int i, spt, head, cyl; + uae_u64 total = (unsigned int)(size / 512); + + if (mode == 1) { + // old-style head=1, spt=32 always mode + head = 1; + spt = 32; + cyl = total / (head * spt); + + } else { + + sptt[0] = 63; + sptt[1] = 127; + sptt[2] = 255; + sptt[3] = -1; + + for (i = 0; sptt[i] >= 0; i++) { + spt = sptt[i]; + for (head = 4; head <= 16;head++) { + cyl = total / (head * spt); + if (size <= 512 * 1024 * 1024) { + if (cyl <= 1023) + break; + } else { + if (cyl < 16383) + break; + if (cyl < 32767 && head >= 5) + break; + if (cyl <= 65535) + break; + } + } + if (head <= 16) + break; + } + + } + + *pcyl = cyl; + *phead = head; + *psectorspertrack = spt; +} + +void getchsgeometry (uae_u64 size, int *pcyl, int *phead, int *psectorspertrack) +{ + getchsgeometry2 (size, pcyl, phead, psectorspertrack, 0); +} + +void getchsgeometry_hdf (struct hardfiledata *hfd, uae_u64 size, int *pcyl, int *phead, int *psectorspertrack) +{ + uae_u8 block[512]; + int i; + + if (size <= 512 * 1024 * 1024) { + *phead = 1; + *psectorspertrack = 32; + } + memset (block, 0, sizeof block); + if (hfd) { + hdf_read (hfd, block, 0, 512); + if (block[0] == 'D' && block[1] == 'O' && block[2] == 'S') { + int mode; + for (mode = 0; mode < 2; mode++) { + uae_u32 rootblock; + uae_u32 chk = 0; + getchsgeometry2 (size, pcyl, phead, psectorspertrack, mode); + rootblock = (2 + ((*pcyl) * (*phead) * (*psectorspertrack) - 1)) / 2; + memset (block, 0, sizeof block); + hdf_read (hfd, block, (uae_u64)rootblock * 512, 512); + for (i = 0; i < 512; i += 4) + chk += (block[i] << 24) | (block[i + 1] << 16) | (block[i + 2] << 8) | (block[i + 3] << 0); + if (!chk && block[0] == 0 && block[1] == 0 && block[2] == 0 && block[3] == 2 && + block[4] == 0 && block[5] == 0 && block[6] == 0 && block[7] == 0 && + block[8] == 0 && block[9] == 0 && block[10] == 0 && block[11] == 0 && + block[508] == 0 && block[509] == 0 && block[510] == 0 && block[511] == 1) { + return; + } + } + } + } + getchsgeometry2 (size, pcyl, phead, psectorspertrack, 2); +} + +void getchspgeometry (uae_u64 total, int *pcyl, int *phead, int *psectorspertrack, bool idegeometry) +{ + uae_u64 blocks = total / 512; + + if (blocks > 16515072) { + /* >8G, CHS=16383/16/63 */ + *pcyl = 16383; + *phead = 16; + *psectorspertrack = 63; + return; + } + if (idegeometry) { + *phead = 16; + *psectorspertrack = 63; + *pcyl = blocks / ((*psectorspertrack) * (*phead)); + return; + } + getchsgeometry (total, pcyl, phead, psectorspertrack); +} + +static void getchshd (struct hardfiledata *hfd, int *pcyl, int *phead, int *psectorspertrack) +{ + getchspgeometry (hfd->virtsize, pcyl, phead, psectorspertrack, false); +} + + +static void pl (uae_u8 *p, int off, uae_u32 v) +{ + p += off * 4; + p[0] = v >> 24; + p[1] = v >> 16; + p[2] = v >> 8; + p[3] = v >> 0; +} + +static void rdb_crc (uae_u8 *p) +{ + uae_u32 sum; + int i, blocksize; + + sum =0; + blocksize = rl (p + 1 * 4); + for (i = 0; i < blocksize; i++) + sum += rl (p + i * 4); + sum = -sum; + pl (p, 2, sum); +} + +static void create_virtual_rdb (struct hardfiledata *hfd, uae_u32 dostype, int bootpri, const TCHAR *filesys) +{ + uae_u8 *rdb, *part, *denv; + int cyl = hfd->heads * hfd->secspertrack; + int cyls = 262144 / (cyl * 512); + int size = cyl * cyls * 512; + + rdb = xcalloc (uae_u8, size); + hfd->virtual_rdb = rdb; + hfd->virtual_size = size; + part = rdb + 512; + pl(rdb, 0, 0x5244534b); + pl(rdb, 1, 64); + pl(rdb, 2, 0); // chksum + pl(rdb, 3, 0); // hostid + pl(rdb, 4, 512); // blockbytes + pl(rdb, 5, 0); // flags + pl(rdb, 6, -1); // badblock + pl(rdb, 7, 1); // part + pl(rdb, 8, -1); // fs + pl(rdb, 9, -1); // driveinit + pl(rdb, 10, -1); // reserved + pl(rdb, 11, -1); // reserved + pl(rdb, 12, -1); // reserved + pl(rdb, 13, -1); // reserved + pl(rdb, 14, -1); // reserved + pl(rdb, 15, -1); // reserved + pl(rdb, 16, hfd->nrcyls); + pl(rdb, 17, hfd->secspertrack); + pl(rdb, 18, hfd->heads); + pl(rdb, 19, 0); // interleave + pl(rdb, 20, 0); // park + pl(rdb, 21, -1); // res + pl(rdb, 22, -1); // res + pl(rdb, 23, -1); // res + pl(rdb, 24, 0); // writeprecomp + pl(rdb, 25, 0); // reducedwrite + pl(rdb, 26, 0); // steprate + pl(rdb, 27, -1); // res + pl(rdb, 28, -1); // res + pl(rdb, 29, -1); // res + pl(rdb, 30, -1); // res + pl(rdb, 31, -1); // res + pl(rdb, 32, 0); // rdbblockslo + pl(rdb, 33, cyl * cyls); // rdbblockshi + pl(rdb, 34, cyls); // locyl + pl(rdb, 35, hfd->nrcyls + cyls); // hicyl + pl(rdb, 36, cyl); // cylblocks + pl(rdb, 37, 0); // autopark + pl(rdb, 38, 2); // highrdskblock + pl(rdb, 39, -1); // res + ua_copy ((char*)rdb + 40 * 4, -1, hfd->vendor_id); + ua_copy ((char*)rdb + 42 * 4, -1, hfd->product_id); + ua_copy ((char*)rdb + 46 * 4, -1, _T("UAE")); + rdb_crc (rdb); + + pl(part, 0, 0x50415254); + pl(part, 1, 64); + pl(part, 2, 0); + pl(part, 3, 0); + pl(part, 4, -1); + pl(part, 5, 1); // bootable + pl(part, 6, -1); + pl(part, 7, -1); + pl(part, 8, 0); // devflags + part[9 * 4] = _tcslen (hfd->device_name); + ua_copy ((char*)part + 9 * 4 + 1, -1, hfd->device_name); + + denv = part + 128; + pl(denv, 0, 80); + pl(denv, 1, 512 / 4); + pl(denv, 2, 0); // secorg + pl(denv, 3, hfd->heads); + pl(denv, 4, hfd->blocksize / 512); + pl(denv, 5, hfd->secspertrack); + pl(denv, 6, hfd->reservedblocks); + pl(denv, 7, 0); // prealloc + pl(denv, 8, 0); // interleave + pl(denv, 9, cyls); // lowcyl + pl(denv, 10, hfd->nrcyls + cyls - 1); + pl(denv, 11, 50); + pl(denv, 12, 0); + pl(denv, 13, 0x00ffffff); + pl(denv, 14, 0x7ffffffe); + pl(denv, 15, bootpri); + pl(denv, 16, dostype); + rdb_crc (part); + + hfd->virtsize += size; + +} + +void hdf_hd_close (struct hd_hardfiledata *hfd) +{ + if (!hfd) + return; + hdf_close (&hfd->hfd); + xfree (hfd->path); +} + +int hdf_hd_open (struct hd_hardfiledata *hfd, const TCHAR *path, int blocksize, int readonly, + const TCHAR *devname, int cyls, int sectors, int surfaces, int reserved, + int bootpri, const TCHAR *filesys, + int pcyls, int pheads, int psecs) +{ + memset (hfd, 0, sizeof (struct hd_hardfiledata)); + hfd->bootpri = bootpri; + hfd->hfd.blocksize = blocksize; + hfd->hfd.readonly = readonly; + if (!hdf_open (&hfd->hfd, path)) + return 0; + hfd->path = my_strdup(path); + hfd->hfd.cylinders = cyls; + hfd->hfd.heads = surfaces; + hfd->hfd.reservedblocks = reserved; + hfd->hfd.secspertrack = sectors; + if (devname) + _tcscpy (hfd->hfd.device_name, devname); + if (pcyls && pheads && psecs) { + hfd->cyls = pcyls; + hfd->heads = pheads; + hfd->secspertrack = psecs; + } else if (cyls && surfaces && sectors) { + hfd->cyls = cyls; + hfd->heads = surfaces; + hfd->secspertrack = sectors; + } else { + getchshd (&hfd->hfd, &hfd->cyls, &hfd->heads, &hfd->secspertrack); + } + hfd->cyls_def = hfd->cyls; + hfd->secspertrack_def = hfd->secspertrack; + hfd->heads_def = hfd->heads; + if (hfd->hfd.heads && hfd->hfd.secspertrack) { + uae_u8 buf[512] = { 0 }; + hdf_read (&hfd->hfd, buf, 0, 512); + if (buf[0] != 0 && memcmp (buf, _T("RDSK"), 4)) { + hfd->hfd.nrcyls = (hfd->hfd.virtsize / blocksize) / (sectors * surfaces); + create_virtual_rdb (&hfd->hfd, rl (buf), hfd->bootpri, filesys); + while (hfd->hfd.nrcyls * surfaces * sectors > hfd->cyls_def * hfd->secspertrack_def * hfd->heads_def) { + hfd->cyls_def++; + } + } + } + hfd->size = hfd->hfd.virtsize; + return 1; +} + +static int hdf_write2 (struct hardfiledata *hfd, void *buffer, uae_u64 offset, int len); +static int hdf_read2 (struct hardfiledata *hfd, void *buffer, uae_u64 offset, int len); + +static void hdf_init_cache (struct hardfiledata *hfd) +{ +} +static void hdf_flush_cache (struct hardfiledata *hdf) +{ +} + +static int hdf_cache_read (struct hardfiledata *hfd, void *buffer, uae_u64 offset, int len) +{ + return hdf_read2 (hfd, buffer, offset, len); +} + +static int hdf_cache_write (struct hardfiledata *hfd, void *buffer, uae_u64 offset, int len) +{ + return hdf_write2 (hfd, buffer, offset, len); +} + int hdf_open (struct hardfiledata *hfd, const TCHAR *pname) { hfd->adide = 0; @@ -130,6 +459,11 @@ static int hdf_read2 (struct hardfiledata *hfd, void *buffer, uae_u64 offset, in return hdf_read_target (hfd, buffer, offset, len); } +static int hdf_write2 (struct hardfiledata *hfd, void *buffer, uae_u64 offset, int len) +{ + return hdf_write_target (hfd, buffer, offset, len); +} + static void adide_decode (void *v, int len) { int i; @@ -276,10 +610,10 @@ int hdf_read (struct hardfiledata *hfd, void *buffer, uae_u64 offset, int len) int v; if (!hfd->adide) { - v = hdf_read2 (hfd, buffer, offset, len); + v = hdf_cache_read (hfd, buffer, offset, len); } else { offset += 512; - v = hdf_read2 (hfd, buffer, offset, len); + v = hdf_cache_read (hfd, buffer, offset, len); adide_decode (buffer, len); } if (hfd->byteswap) @@ -287,11 +621,6 @@ int hdf_read (struct hardfiledata *hfd, void *buffer, uae_u64 offset, int len) return v; } -static int hdf_write2 (struct hardfiledata *hfd, void *buffer, uae_u64 offset, int len) -{ - return hdf_write_target (hfd, buffer, offset, len); -} - int hdf_write (struct hardfiledata *hfd, void *buffer, uae_u64 offset, int len) { int v; @@ -299,11 +628,11 @@ int hdf_write (struct hardfiledata *hfd, void *buffer, uae_u64 offset, int len) if (hfd->byteswap) hdf_byteswap (buffer, len); if (!hfd->adide) { - v = hdf_write2 (hfd, buffer, offset, len); + v = hdf_cache_write (hfd, buffer, offset, len); } else { offset += 512; adide_encode (buffer, len); - v = hdf_write2 (hfd, buffer, offset, len); + v = hdf_cache_write (hfd, buffer, offset, len); adide_decode (buffer, len); } if (hfd->byteswap) @@ -321,7 +650,7 @@ static uae_u64 cmd_readx (struct hardfiledata *hfd, uae_u8 *dataptr, uae_u64 off static uae_u64 cmd_read (struct hardfiledata *hfd, uaecptr dataptr, uae_u64 offset, uae_u64 len) { addrbank *bank_data = &get_mem_bank (dataptr); - if (!bank_data || !bank_data->check (dataptr, len)) + if (!len || !bank_data || !bank_data->check (dataptr, len)) return 0; return cmd_readx (hfd, bank_data->xlateaddr (dataptr), offset, len); } @@ -336,11 +665,20 @@ static uae_u64 cmd_writex (struct hardfiledata *hfd, uae_u8 *dataptr, uae_u64 of static uae_u64 cmd_write (struct hardfiledata *hfd, uaecptr dataptr, uae_u64 offset, uae_u64 len) { addrbank *bank_data = &get_mem_bank (dataptr); - if (!bank_data || !bank_data->check (dataptr, len)) + if (!len || !bank_data || !bank_data->check (dataptr, len)) return 0; return cmd_writex (hfd, bank_data->xlateaddr (dataptr), offset, len); } +static int checkbounds (struct hardfiledata *hfd, uae_u64 offset, uae_u64 len) +{ + if (offset >= hfd->virtsize) + return 0; + if (offset + len > hfd->virtsize) + return 0; + return 1; +} + static int nodisk (struct hardfiledata *hfd) { if (hfd->drive_empty) @@ -360,7 +698,7 @@ void hardfile_do_disk_change (struct uaedev_config_info *uci, int insert) return; uae_sem_wait (&change_sem); hardfpd[fsid].changenum++; - write_log(_T("uaehf.device:%d media status=%d\n"), fsid, insert); + write_log (_T("uaehf.device:%d media status=%d changenum=%d\n"), fsid, insert, hardfpd[fsid].changenum); hfd->drive_empty = newstate; j = 0; while (j < MAX_ASYNC_REQUESTS) { @@ -491,7 +829,7 @@ static uae_u32 REGPARAM2 hardfile_open (TrapContext *context) } } if (unit < 1000 || is_hardfile(unit) == FILESYS_VIRTUAL) - err = 50; /* c */ + err = 50; /* HFERR_NoBoard */ } else { err = IOERR_BADLENGTH; } @@ -551,7 +889,7 @@ static uae_u32 hardfile_do_io (struct hardfiledata *hfd, struct hardfileprivdata goto no_disk; offset = get_long (request + 44); len = get_long (request + 36); /* io_Length */ - if ((offset & bmask) || dataptr == 0) { + if (offset & bmask) { unaligned (cmd, offset, len, hfd->blocksize); goto bad_command; } @@ -572,7 +910,7 @@ static uae_u32 hardfile_do_io (struct hardfiledata *hfd, struct hardfileprivdata goto no_disk; offset64 = get_long (request + 44) | ((uae_u64)get_long (request + 32) << 32); len = get_long (request + 36); /* io_Length */ - if ((offset64 & bmask) || dataptr == 0) { + if (offset64 & bmask) { unaligned (cmd, offset64, len, hfd->blocksize); goto bad_command; } @@ -591,12 +929,12 @@ static uae_u32 hardfile_do_io (struct hardfiledata *hfd, struct hardfileprivdata case CMD_FORMAT: /* Format */ if (nodisk (hfd)) goto no_disk; - if (hfd->readonly) { + if (hfd->readonly || hfd->dangerous) { error = 28; /* write protect */ } else { offset = get_long (request + 44); len = get_long (request + 36); /* io_Length */ - if ((offset & bmask) || dataptr == 0) { + if (offset & bmask) { unaligned (cmd, offset, len, hfd->blocksize); goto bad_command; } @@ -618,12 +956,12 @@ static uae_u32 hardfile_do_io (struct hardfiledata *hfd, struct hardfileprivdata case NSCMD_TD_FORMAT64: if (nodisk (hfd)) goto no_disk; - if (hfd->readonly) { + if (hfd->readonly || hfd->dangerous) { error = 28; /* write protect */ } else { offset64 = get_long (request + 44) | ((uae_u64)get_long (request + 32) << 32); len = get_long (request + 36); /* io_Length */ - if ((offset64 & bmask) || dataptr == 0) { + if (offset64 & bmask) { unaligned (cmd, offset64, len, hfd->blocksize); goto bad_command; } @@ -664,7 +1002,7 @@ no_disk: case CMD_GETNUMTRACKS: { int cyl, cylsec, head, tracksec; - getchs (hfd, &cyl, &cylsec, &head, &tracksec); + getchsx (hfd, &cyl, &cylsec, &head, &tracksec); actual = cyl * head; break; } @@ -673,7 +1011,7 @@ no_disk: { int cyl, cylsec, head, tracksec; uae_u64 size; - getchs (hfd, &cyl, &cylsec, &head, &tracksec); + getchsx (hfd, &cyl, &cylsec, &head, &tracksec); put_long (dataptr + 0, hfd->blocksize); size = hfd->virtsize / hfd->blocksize; if (size > 0x00ffffffff) @@ -690,7 +1028,7 @@ no_disk: break; case CMD_PROTSTATUS: - if (hfd->readonly) + if (hfd->readonly || hfd->dangerous) actual = -1; else actual = 0; @@ -728,6 +1066,7 @@ no_disk: case HD_SCSICMD: /* SCSI */ error = IOERR_NOCMD; + write_log (_T("UAEHF: HD_SCSICMD tried on regular HDF, unit %d\n"), unit); break; default: @@ -768,6 +1107,8 @@ static int hardfile_can_quick (uae_u32 command) { switch (command) { + case CMD_REMCHANGEINT: + return -1; case CMD_RESET: case CMD_STOP: case CMD_START: @@ -775,8 +1116,8 @@ static int hardfile_can_quick (uae_u32 command) case CMD_PROTSTATUS: case CMD_MOTOR: case CMD_GETDRIVETYPE: - case CMD_GETNUMTRACKS: case CMD_GETGEOMETRY: + case CMD_GETNUMTRACKS: case NSCMD_DEVICEQUERY: return 1; } @@ -797,6 +1138,7 @@ static uae_u32 REGPARAM2 hardfile_beginio (TrapContext *context) int unit = mangleunit (get_long (request + 24)); struct hardfiledata *hfd = get_hardfile_data (unit); struct hardfileprivdata *hfpd = &hardfpd[unit]; + int canquick; put_byte (request + 8, NT_MESSAGE); start_thread(context, unit); @@ -805,10 +1147,13 @@ static uae_u32 REGPARAM2 hardfile_beginio (TrapContext *context) return get_byte (request + 31); } put_byte (request + 31, 0); - if ((flags & 1) && hardfile_canquick (hfd, request)) { + canquick = hardfile_canquick (hfd, request); + if (((flags & 1) && canquick) || (canquick < 0)) { hf_log (_T("hf quickio unit=%d request=%p cmd=%d\n"), unit, request, cmd); if (hardfile_do_io (hfd, hfpd, request)) hf_log2 (_T("uaehf.device cmd %d bug with IO_QUICK\n"), cmd); + if (!(flags & 1)) + uae_ReplyMsg (request); return get_byte (request + 31); } else { hf_log2 (_T("hf asyncio unit=%d request=%p cmd=%d\n"), unit, request, cmd); diff --git a/src/include/audio.h b/src/include/audio.h index 080aa31c..96287f18 100644 --- a/src/include/audio.h +++ b/src/include/audio.h @@ -37,6 +37,12 @@ extern int audio_activate(void); enum { SND_MONO, SND_STEREO, SND_4CH_CLONEDSTEREO, SND_4CH, SND_6CH_CLONEDSTEREO, SND_6CH, SND_NONE }; +STATIC_INLINE int get_audio_ismono (int stereomode) +{ + if (stereomode == 0) + return 1; + return 0; +} #define SOUND_MAX_DELAY_BUFFER 1024 #define SOUND_MAX_LOG_DELAY 10 diff --git a/src/include/autoconf.h b/src/include/autoconf.h index 3df3d687..28b86689 100644 --- a/src/include/autoconf.h +++ b/src/include/autoconf.h @@ -8,6 +8,11 @@ #define RTAREA_DEFAULT 0xf00000 #define RTAREA_BACKUP 0xef0000 +#define RTAREA_SIZE 0x10000 +#define RTAREA_TRAPS 0x2000 +#define RTAREA_RTG 0x3000 +#define RTAREA_FSBOARD 0xFFEC +#define RTAREA_INT 0xFFEB extern uae_u32 addr (int); extern void db (uae_u8); @@ -87,6 +92,6 @@ extern void expansion_init (void); extern void expansion_cleanup (void); extern void expansion_clear (void); -extern void uaegfx_install_code (void); +extern void uaegfx_install_code (uaecptr); extern uae_u32 emulib_target_getcpurate (uae_u32, uae_u32*); diff --git a/src/include/blitter.h b/src/include/blitter.h index db2b2532..fc6951b1 100644 --- a/src/include/blitter.h +++ b/src/include/blitter.h @@ -25,8 +25,7 @@ extern uae_u16 bltsize; extern uae_u16 bltcon0,bltcon1; extern uae_u32 bltapt,bltbpt,bltcpt,bltdpt; -extern long blit_firstline_cycles; - +extern void maybe_blit2 (int); extern void reset_blit (int); extern int blitnasty (void); extern void blitter_handler (void); @@ -43,15 +42,11 @@ STATIC_INLINE void maybe_blit (int hack) if (savestate_state) return; - if (hack && get_cycles() < blit_firstline_cycles) - return; - - blitter_handler (); + maybe_blit2(hack); } - extern void blitter_check_start (void); -typedef void blitter_func(uaecptr, uaecptr, uaecptr, uaecptr, struct bltinfo *_GCCRES_); +typedef void blitter_func(uaecptr, uaecptr, uaecptr, uaecptr, struct bltinfo *); #define BLITTER_MAX_WORDS 2048 diff --git a/src/include/blkdev.h b/src/include/blkdev.h index 32fc258b..293718ff 100644 --- a/src/include/blkdev.h +++ b/src/include/blkdev.h @@ -4,9 +4,8 @@ #define SCSI_UNIT_DISABLED -1 #define SCSI_UNIT_DEFAULT 0 #define SCSI_UNIT_IMAGE 1 -//#define SCSI_UNIT_IOCTL 2 -//#define SCSI_UNIT_SPTI 3 -//#define SCSI_UNIT_ASPI 4 +#define SCSI_UNIT_IOCTL 2 +#define SCSI_UNIT_SPTI 3 //#define device_debug write_log #define device_debug @@ -45,6 +44,7 @@ struct cd_toc_head { int first_track, first_track_offset; int last_track, last_track_offset; + int firstaddress; // LSN int lastaddress; // LSN int tracks; int points; @@ -103,7 +103,7 @@ typedef int (*open_bus_func)(int flags); typedef void (*close_bus_func)(void); typedef int (*open_device_func)(int, const TCHAR*, int); typedef void (*close_device_func)(int); -typedef struct device_info* (*info_device_func)(int, struct device_info*, int); +typedef struct device_info* (*info_device_func)(int, struct device_info*, int, int); typedef uae_u8* (*execscsicmd_out_func)(int, uae_u8*, int); typedef uae_u8* (*execscsicmd_in_func)(int, uae_u8*, int, int*); typedef int (*execscsicmd_direct_func)(int, struct amigascsi*); @@ -152,8 +152,6 @@ struct device_functions { }; -//extern struct device_functions *device_func[MAX_TOTAL_SCSI_DEVICES]; - extern int device_func_init(int flags); extern void device_func_reset(void); extern int sys_command_open (int unitnum); @@ -175,6 +173,10 @@ extern int sys_command_write (int unitnum, uae_u8 *data, int block, int size); extern int sys_command_scsi_direct_native (int unitnum, struct amigascsi *as); extern int sys_command_scsi_direct (int unitnum, uaecptr request); extern int sys_command_ismedia (int unitnum, int quick); +extern struct device_info *sys_command_info_session (int unitnum, struct device_info *di, int, int); + +extern void scsi_atapi_fixup_pre (uae_u8 *scsi_cmd, int *len, uae_u8 **data, int *datalen, int *parm); +extern void scsi_atapi_fixup_post (uae_u8 *scsi_cmd, int len, uae_u8 *olddata, uae_u8 *data, int *datalen, int parm); extern void scsi_log_before (uae_u8 *cdb, int cdblen, uae_u8 *data, int datalen); extern void scsi_log_after (uae_u8 *data, int datalen, uae_u8 *sense, int senselen); @@ -201,5 +203,3 @@ extern void blkdev_cd_change (int unitnum, const TCHAR *name); extern void blkdev_entergui (void); extern void blkdev_exitgui (void); - -bool filesys_do_disk_change (int, bool); diff --git a/src/include/bsdsocket.h b/src/include/bsdsocket.h index aaf54dae..5e55b791 100644 --- a/src/include/bsdsocket.h +++ b/src/include/bsdsocket.h @@ -1,207 +1,206 @@ - /* - * UAE - The Un*x Amiga Emulator - * - * bsdsocket.library emulation - * - * Copyright 1997,98 Mathias Ortmann - * - */ - -#define TRACING_ENABLED - -#ifdef TRACING_ENABLED -#define BSDTRACE(x) do { write_log x; } while(0) -#else -#define BSDTRACE(x) -#endif - -extern int init_socket_layer (void); -extern void deinit_socket_layer (void); - -/* inital size of per-process descriptor table (currently fixed) */ -#define DEFAULT_DTABLE_SIZE 64 - -#define SCRATCHBUFSIZE 128 - -#define MAXPENDINGASYNC 512 - -#define MAXADDRLEN 256 - -#ifdef _WIN32 -#define SOCKET_TYPE SOCKET -#else -#define SOCKET_TYPE int -#endif - -/* allocated and maintained on a per-task basis */ -struct socketbase { - struct socketbase *next; - struct socketbase *nextsig; /* queue for tasks to signal */ - - uaecptr sysbase; - int dosignal; /* signal flag */ - uae_u32 ownertask; /* task that opened the library */ - int signal; /* signal allocated for that task */ - int sb_errno, sb_herrno; /* errno and herrno variables */ - uae_u32 errnoptr, herrnoptr; /* pointers */ - uae_u32 errnosize, herrnosize; /* pinter sizes */ - int dtablesize; /* current descriptor/flag etc. table size */ - SOCKET_TYPE *dtable; /* socket descriptor table */ - int *ftable; /* socket flags */ - int resultval; - uae_u32 hostent; /* pointer to the current hostent structure (Amiga mem) */ - uae_u32 hostentsize; - uae_u32 protoent; /* pointer to the current protoent structure (Amiga mem) */ - uae_u32 protoentsize; - uae_u32 servent; /* pointer to the current servent structure (Amiga mem) */ - uae_u32 serventsize; - uae_u32 sigstosend; - uae_u32 eventsigs; /* EVENT sigmask */ - uae_u32 eintrsigs; /* EINTR sigmask */ - int eintr; /* interrupted by eintrsigs? */ - int eventindex; /* current socket looked at by GetSocketEvents() to prevent starvation */ - uae_u32 logstat; - uae_u32 logptr; - uae_u32 logmask; - uae_u32 logfacility; - uaecptr fdcallback; - - unsigned int *mtable; /* window messages allocated for asynchronous event notification */ - /* host-specific fields below */ -#ifdef _WIN32 - SOCKET_TYPE sockAbort; /* for aborting WinSock2 select() (damn Microsoft) */ - SOCKET_TYPE sockAsync; /* for aborting WSBAsyncSelect() in window message handler */ - int needAbort; /* abort flag */ - void *hAsyncTask; /* async task handle */ - void *hEvent; /* thread event handle */ -#else - uae_sem_t sem; /* semaphore to notify the socket thread of work */ - uae_thread_id thread; /* socket thread */ - int sockabort[2]; /* pipe used to tell the thread to abort a select */ - int action; - int s; /* for accept */ - uae_u32 name; /* For gethostbyname */ - uae_u32 a_addr; /* gethostbyaddr, accept */ - uae_u32 a_addrlen; /* for gethostbyaddr, accept */ - uae_u32 flags; - void *buf; - uae_u32 len; - uae_u32 to, tolen, from, fromlen; - int nfds; - uae_u32 sets [3]; - uae_u32 timeout; - uae_u32 sigmp; -#endif - TrapContext *context; -}; - -#define LIBRARY_SIZEOF 36 - -struct UAEBSDBase { - uae_u8 dummy[LIBRARY_SIZEOF]; - struct socketbase *sb; - uae_u8 scratchbuf[SCRATCHBUFSIZE]; -}; - -/* socket flags */ -/* socket events to report */ -#define REP_ACCEPT 0x01 /* there is a connection to accept() */ -#define REP_CONNECT 0x02 /* connect() completed */ -#define REP_OOB 0x04 /* socket has out-of-band data */ -#define REP_READ 0x08 /* socket is readable */ -#define REP_WRITE 0x10 /* socket is writeable */ -#define REP_ERROR 0x20 /* asynchronous error on socket */ -#define REP_CLOSE 0x40 /* connection closed (graceful or not) */ -#define REP_ALL 0x7f -/* socket events that occurred */ -#define SET_ACCEPT 0x0100 /* there is a connection to accept() */ -#define SET_CONNECT 0x0200 /* connect() completed */ -#define SET_OOB 0x0400 /* socket has out-of-band data */ -#define SET_READ 0x0800 /* socket is readable */ -#define SET_WRITE 0x1000 /* socket is writeable */ -#define SET_ERROR 0x2000 /* asynchronous error on socket */ -#define SET_CLOSE 0x4000 /* connection closed (graceful or not) */ -#define SET_ALL 0x7f00 -/* socket properties */ -#define SF_BLOCKING 0x80000000 -#define SF_BLOCKINGINPROGRESS 0x40000000 -/* STBC_FDCALLBACK */ -#define FDCB_FREE 0 -#define FDCB_ALLOC 1 -#define FDCB_CHECK 2 - -uae_u32 addstr (uae_u32 * dst, const TCHAR *src); -uae_u32 addstr_ansi (uae_u32 * dst, const uae_char *src); -uae_u32 strncpyha (uae_u32 dst, const uae_char *src, int size); -uae_u32 addmem (uae_u32 * dst, const uae_char *src, int len); - -#define SB struct socketbase *sb - -extern void bsdsocklib_seterrno (SB, int); -extern void bsdsocklib_setherrno (SB, int); - -extern void sockmsg (unsigned int, WPARAM, LPARAM); -extern void sockabort (SB); - -extern void addtosigqueue (SB, int); -extern void removefromsigqueue (SB); -extern void sigsockettasks (void); -extern void locksigqueue (void); -extern void unlocksigqueue (void); - -extern BOOL checksd(TrapContext*, SB, int sd); -extern void setsd(TrapContext*, SB, int , SOCKET_TYPE); -extern int getsd (TrapContext*, SB, SOCKET_TYPE); -extern SOCKET_TYPE getsock (SB, int); -extern void releasesock (TrapContext*, SB, int); - -extern void waitsig (TrapContext *context, SB); -extern void cancelsig (TrapContext *context, SB); - -extern int host_sbinit (TrapContext*, SB); -extern void host_sbcleanup (SB); -extern void host_sbreset (void); -extern void host_closesocketquick (SOCKET_TYPE); - -extern int host_dup2socket (TrapContext *, SB, int, int); -extern int host_socket (TrapContext *, SB, int, int, int); -extern uae_u32 host_bind (TrapContext *, SB, uae_u32, uae_u32, uae_u32); -extern uae_u32 host_listen (TrapContext *, SB, uae_u32, uae_u32); -extern void host_accept (TrapContext *, SB, uae_u32, uae_u32, uae_u32); -extern void host_sendto (TrapContext *, SB, uae_u32, uae_u32, uae_u32, uae_u32, uae_u32, uae_u32); -extern void host_recvfrom (TrapContext *, SB, uae_u32, uae_u32, uae_u32, uae_u32, uae_u32, uae_u32); -extern uae_u32 host_shutdown (SB, uae_u32, uae_u32); -extern void host_setsockopt (SB, uae_u32, uae_u32, uae_u32, uae_u32, uae_u32); -extern uae_u32 host_getsockopt (SB, uae_u32, uae_u32, uae_u32, uae_u32, uae_u32); -extern uae_u32 host_getsockname (SB, uae_u32, uae_u32, uae_u32); -extern uae_u32 host_getpeername (SB, uae_u32, uae_u32, uae_u32); -extern uae_u32 host_IoctlSocket (TrapContext *, SB, uae_u32, uae_u32, uae_u32); -extern uae_u32 host_shutdown (SB, uae_u32, uae_u32); -extern int host_CloseSocket (TrapContext *, SB, int); -extern void host_connect (TrapContext *, SB, uae_u32, uae_u32, uae_u32); -extern void host_WaitSelect (TrapContext *, SB, uae_u32, uae_u32, uae_u32, uae_u32, uae_u32, uae_u32); -extern uae_u32 host_SetSocketSignals (void); -extern uae_u32 host_getdtablesize (void); -extern uae_u32 host_ObtainSocket (void); -extern uae_u32 host_ReleaseSocket (void); -extern uae_u32 host_ReleaseCopyOfSocket (void); -extern uae_u32 host_Inet_NtoA (TrapContext *context, SB, uae_u32); -extern uae_u32 host_inet_addr (uae_u32); -extern uae_u32 host_Inet_LnaOf (void); -extern uae_u32 host_Inet_NetOf (void); -extern uae_u32 host_Inet_MakeAddr (void); -extern uae_u32 host_inet_network (void); -extern void host_gethostbynameaddr (TrapContext *, SB, uae_u32, uae_u32, long); -extern uae_u32 host_getnetbyname (void); -extern uae_u32 host_getnetbyaddr (void); -extern void host_getservbynameport (TrapContext *, SB, uae_u32, uae_u32, uae_u32); -extern void host_getprotobyname (TrapContext *, SB, uae_u32); -extern void host_getprotobynumber (TrapContext *, SB, uae_u32); -extern uae_u32 host_vsyslog (void); -extern uae_u32 host_Dup2Socket (void); -extern uae_u32 host_gethostname (uae_u32, uae_u32); + /* + * UAE - The Un*x Amiga Emulator + * + * bsdsocket.library emulation + * + * Copyright 1997,98 Mathias Ortmann + * + */ + +#define BSD_TRACING_ENABLED 0 + +extern int log_bsd; + +#define ISBSDTRACE (log_bsd || BSD_TRACING_ENABLED) +#define BSDTRACE(x) do { if (ISBSDTRACE) { write_log x; } } while(0) + +extern int init_socket_layer (void); +extern void deinit_socket_layer (void); + +/* inital size of per-process descriptor table (currently fixed) */ +#define DEFAULT_DTABLE_SIZE 64 + +#define SCRATCHBUFSIZE 128 + +#define MAXPENDINGASYNC 512 + +#define MAXADDRLEN 256 + +#ifdef _WIN32 +#define SOCKET_TYPE SOCKET +#else +#define SOCKET_TYPE int +#endif + +/* allocated and maintained on a per-task basis */ +struct socketbase { + struct socketbase *next; + struct socketbase *nextsig; /* queue for tasks to signal */ + + uaecptr sysbase; + int dosignal; /* signal flag */ + uae_u32 ownertask; /* task that opened the library */ + int signal; /* signal allocated for that task */ + int sb_errno, sb_herrno; /* errno and herrno variables */ + uae_u32 errnoptr, herrnoptr; /* pointers */ + uae_u32 errnosize, herrnosize; /* pinter sizes */ + int dtablesize; /* current descriptor/flag etc. table size */ + SOCKET_TYPE *dtable; /* socket descriptor table */ + int *ftable; /* socket flags */ + int resultval; + uae_u32 hostent; /* pointer to the current hostent structure (Amiga mem) */ + uae_u32 hostentsize; + uae_u32 protoent; /* pointer to the current protoent structure (Amiga mem) */ + uae_u32 protoentsize; + uae_u32 servent; /* pointer to the current servent structure (Amiga mem) */ + uae_u32 serventsize; + uae_u32 sigstosend; + uae_u32 eventsigs; /* EVENT sigmask */ + uae_u32 eintrsigs; /* EINTR sigmask */ + int eintr; /* interrupted by eintrsigs? */ + int eventindex; /* current socket looked at by GetSocketEvents() to prevent starvation */ + uae_u32 logstat; + uae_u32 logptr; + uae_u32 logmask; + uae_u32 logfacility; + uaecptr fdcallback; + + unsigned int *mtable; /* window messages allocated for asynchronous event notification */ + /* host-specific fields below */ +#ifdef _WIN32 + SOCKET_TYPE sockAbort; /* for aborting WinSock2 select() (damn Microsoft) */ + SOCKET_TYPE sockAsync; /* for aborting WSBAsyncSelect() in window message handler */ + int needAbort; /* abort flag */ + void *hAsyncTask; /* async task handle */ + void *hEvent; /* thread event handle */ +#else + uae_sem_t sem; /* semaphore to notify the socket thread of work */ + uae_thread_id thread; /* socket thread */ + int sockabort[2]; /* pipe used to tell the thread to abort a select */ + int action; + int s; /* for accept */ + uae_u32 name; /* For gethostbyname */ + uae_u32 a_addr; /* gethostbyaddr, accept */ + uae_u32 a_addrlen; /* for gethostbyaddr, accept */ + uae_u32 flags; + void *buf; + uae_u32 len; + uae_u32 to, tolen, from, fromlen; + int nfds; + uae_u32 sets [3]; + uae_u32 timeout; + uae_u32 sigmp; +#endif + TrapContext *context; +}; + +#define LIBRARY_SIZEOF 36 + +struct UAEBSDBase { + uae_u8 dummy[LIBRARY_SIZEOF]; + struct socketbase *sb; + uae_u8 scratchbuf[SCRATCHBUFSIZE]; +}; + +/* socket flags */ +/* socket events to report */ +#define REP_ACCEPT 0x01 /* there is a connection to accept() */ +#define REP_CONNECT 0x02 /* connect() completed */ +#define REP_OOB 0x04 /* socket has out-of-band data */ +#define REP_READ 0x08 /* socket is readable */ +#define REP_WRITE 0x10 /* socket is writeable */ +#define REP_ERROR 0x20 /* asynchronous error on socket */ +#define REP_CLOSE 0x40 /* connection closed (graceful or not) */ +#define REP_ALL 0x7f +/* socket events that occurred */ +#define SET_ACCEPT 0x0100 /* there is a connection to accept() */ +#define SET_CONNECT 0x0200 /* connect() completed */ +#define SET_OOB 0x0400 /* socket has out-of-band data */ +#define SET_READ 0x0800 /* socket is readable */ +#define SET_WRITE 0x1000 /* socket is writeable */ +#define SET_ERROR 0x2000 /* asynchronous error on socket */ +#define SET_CLOSE 0x4000 /* connection closed (graceful or not) */ +#define SET_ALL 0x7f00 +/* socket properties */ +#define SF_BLOCKING 0x80000000 +#define SF_BLOCKINGINPROGRESS 0x40000000 +/* STBC_FDCALLBACK */ +#define FDCB_FREE 0 +#define FDCB_ALLOC 1 +#define FDCB_CHECK 2 + +uae_u32 addstr (uae_u32 * dst, const TCHAR *src); +uae_u32 addstr_ansi (uae_u32 * dst, const uae_char *src); +uae_u32 strncpyha (uae_u32 dst, const uae_char *src, int size); +uae_u32 addmem (uae_u32 * dst, const uae_char *src, int len); + +#define SB struct socketbase *sb + +extern void bsdsocklib_seterrno (SB, int); +extern void bsdsocklib_setherrno (SB, int); + +extern void sockmsg (unsigned int, WPARAM, LPARAM); +extern void sockabort (SB); + +extern void addtosigqueue (SB, int); +extern void removefromsigqueue (SB); +extern void sigsockettasks (void); +extern void locksigqueue (void); +extern void unlocksigqueue (void); + +extern BOOL checksd(TrapContext*, SB, int sd); +extern void setsd(TrapContext*, SB, int , SOCKET_TYPE); +extern int getsd (TrapContext*, SB, SOCKET_TYPE); +extern SOCKET_TYPE getsock (SB, int); +extern void releasesock (TrapContext*, SB, int); + +extern void waitsig (TrapContext *context, SB); +extern void cancelsig (TrapContext *context, SB); + +extern int host_sbinit (TrapContext*, SB); +extern void host_sbcleanup (SB); +extern void host_sbreset (void); +extern void host_closesocketquick (SOCKET_TYPE); + +extern int host_dup2socket (TrapContext *, SB, int, int); +extern int host_socket (TrapContext *, SB, int, int, int); +extern uae_u32 host_bind (TrapContext *, SB, uae_u32, uae_u32, uae_u32); +extern uae_u32 host_listen (TrapContext *, SB, uae_u32, uae_u32); +extern void host_accept (TrapContext *, SB, uae_u32, uae_u32, uae_u32); +extern void host_sendto (TrapContext *, SB, uae_u32, uae_u32, uae_u32, uae_u32, uae_u32, uae_u32); +extern void host_recvfrom (TrapContext *, SB, uae_u32, uae_u32, uae_u32, uae_u32, uae_u32, uae_u32); +extern uae_u32 host_shutdown (SB, uae_u32, uae_u32); +extern void host_setsockopt (SB, uae_u32, uae_u32, uae_u32, uae_u32, uae_u32); +extern uae_u32 host_getsockopt (SB, uae_u32, uae_u32, uae_u32, uae_u32, uae_u32); +extern uae_u32 host_getsockname (SB, uae_u32, uae_u32, uae_u32); +extern uae_u32 host_getpeername (SB, uae_u32, uae_u32, uae_u32); +extern uae_u32 host_IoctlSocket (TrapContext *, SB, uae_u32, uae_u32, uae_u32); +extern uae_u32 host_shutdown (SB, uae_u32, uae_u32); +extern int host_CloseSocket (TrapContext *, SB, int); +extern void host_connect (TrapContext *, SB, uae_u32, uae_u32, uae_u32); +extern void host_WaitSelect (TrapContext *, SB, uae_u32, uae_u32, uae_u32, uae_u32, uae_u32, uae_u32); +extern uae_u32 host_SetSocketSignals (void); +extern uae_u32 host_getdtablesize (void); +extern uae_u32 host_ObtainSocket (void); +extern uae_u32 host_ReleaseSocket (void); +extern uae_u32 host_ReleaseCopyOfSocket (void); +extern uae_u32 host_Inet_NtoA (TrapContext *context, SB, uae_u32); +extern uae_u32 host_inet_addr (uae_u32); +extern uae_u32 host_Inet_LnaOf (void); +extern uae_u32 host_Inet_NetOf (void); +extern uae_u32 host_Inet_MakeAddr (void); +extern uae_u32 host_inet_network (void); +extern void host_gethostbynameaddr (TrapContext *, SB, uae_u32, uae_u32, long); +extern uae_u32 host_getnetbyname (void); +extern uae_u32 host_getnetbyaddr (void); +extern void host_getservbynameport (TrapContext *, SB, uae_u32, uae_u32, uae_u32); +extern void host_getprotobyname (TrapContext *, SB, uae_u32); +extern void host_getprotobynumber (TrapContext *, SB, uae_u32); +extern uae_u32 host_vsyslog (void); +extern uae_u32 host_Dup2Socket (void); +extern uae_u32 host_gethostname (uae_u32, uae_u32); extern uae_u32 callfdcallback (TrapContext *context, SB, uae_u32 fd, uae_u32 action); - -extern uaecptr bsdlib_startup (uaecptr); -extern void bsdlib_install (void); -extern void bsdlib_reset (void); + +extern uaecptr bsdlib_startup (uaecptr); +extern void bsdlib_install (void); +extern void bsdlib_reset (void); diff --git a/src/include/calc.h b/src/include/calc.h new file mode 100644 index 00000000..be732348 --- /dev/null +++ b/src/include/calc.h @@ -0,0 +1,3 @@ + +extern bool calc(const TCHAR *input, double *outval); +extern bool iscalcformula (const TCHAR *formula); diff --git a/src/include/cia.h b/src/include/cia.h index 96b97018..7982438b 100644 --- a/src/include/cia.h +++ b/src/include/cia.h @@ -16,5 +16,6 @@ extern void diskindex_handler (void); extern void cia_diskindex (void); extern void rethink_cias (void); +extern void cia_set_overlay (bool); extern void rtc_hardreset(void); diff --git a/src/include/clipboard.h b/src/include/clipboard.h index 751f1ab8..d2b3994a 100644 --- a/src/include/clipboard.h +++ b/src/include/clipboard.h @@ -1,5 +1,5 @@ -extern void amiga_clipboard_want_data (void); +extern int amiga_clipboard_want_data (void); extern void amiga_clipboard_got_data (uaecptr data, uae_u32 size, uae_u32 actual); extern void amiga_clipboard_die (void); extern void amiga_clipboard_init (void); diff --git a/src/include/cpu_prefetch.h b/src/include/cpu_prefetch.h index e9a64b6c..78d90c05 100644 --- a/src/include/cpu_prefetch.h +++ b/src/include/cpu_prefetch.h @@ -2,7 +2,7 @@ STATIC_INLINE uae_u32 get_word_prefetch (struct regstruct ®s, int o) { uae_u32 v = regs.irc; - regs.irc = get_wordi (m68k_getpc (regs) + o); + regs.irc = get_wordi (m68k_getpc () + o); return v; } STATIC_INLINE uae_u32 get_long_prefetch (struct regstruct ®s, int o) diff --git a/src/include/cputbl.h b/src/include/cputbl.h index e8650200..9b48c7d9 100644 --- a/src/include/cputbl.h +++ b/src/include/cputbl.h @@ -3574,8 +3574,16 @@ extern cpuop_func op_eff8_0_nf; extern cpuop_func op_eff8_0_ff; extern cpuop_func op_eff9_0_nf; extern cpuop_func op_eff9_0_ff; +extern cpuop_func op_f000_0_nf; +extern cpuop_func op_f000_0_ff; +extern cpuop_func op_f008_0_nf; +extern cpuop_func op_f008_0_ff; extern cpuop_func op_f010_0_nf; extern cpuop_func op_f010_0_ff; +extern cpuop_func op_f018_0_nf; +extern cpuop_func op_f018_0_ff; +extern cpuop_func op_f020_0_nf; +extern cpuop_func op_f020_0_ff; extern cpuop_func op_f028_0_nf; extern cpuop_func op_f028_0_ff; extern cpuop_func op_f030_0_nf; @@ -5192,6 +5200,8 @@ extern cpuop_func op_4a38_4_nf; extern cpuop_func op_4a38_4_ff; extern cpuop_func op_4a39_4_nf; extern cpuop_func op_4a39_4_ff; +extern cpuop_func op_4a3c_4_nf; +extern cpuop_func op_4a3c_4_ff; extern cpuop_func op_4a40_4_nf; extern cpuop_func op_4a40_4_ff; extern cpuop_func op_4a50_4_nf; @@ -5208,6 +5218,8 @@ extern cpuop_func op_4a78_4_nf; extern cpuop_func op_4a78_4_ff; extern cpuop_func op_4a79_4_nf; extern cpuop_func op_4a79_4_ff; +extern cpuop_func op_4a7c_4_nf; +extern cpuop_func op_4a7c_4_ff; extern cpuop_func op_4a80_4_nf; extern cpuop_func op_4a80_4_ff; extern cpuop_func op_4a90_4_nf; @@ -5224,6 +5236,8 @@ extern cpuop_func op_4ab8_4_nf; extern cpuop_func op_4ab8_4_ff; extern cpuop_func op_4ab9_4_nf; extern cpuop_func op_4ab9_4_ff; +extern cpuop_func op_4abc_4_nf; +extern cpuop_func op_4abc_4_ff; extern cpuop_func op_4ac0_4_nf; extern cpuop_func op_4ac0_4_ff; extern cpuop_func op_4ad0_4_nf; @@ -8300,6 +8314,8 @@ extern cpuop_func op_4a38_11_nf; extern cpuop_func op_4a38_11_ff; extern cpuop_func op_4a39_11_nf; extern cpuop_func op_4a39_11_ff; +extern cpuop_func op_4a3c_11_nf; +extern cpuop_func op_4a3c_11_ff; extern cpuop_func op_4a40_11_nf; extern cpuop_func op_4a40_11_ff; extern cpuop_func op_4a50_11_nf; @@ -8316,6 +8332,8 @@ extern cpuop_func op_4a78_11_nf; extern cpuop_func op_4a78_11_ff; extern cpuop_func op_4a79_11_nf; extern cpuop_func op_4a79_11_ff; +extern cpuop_func op_4a7c_11_nf; +extern cpuop_func op_4a7c_11_ff; extern cpuop_func op_4a80_11_nf; extern cpuop_func op_4a80_11_ff; extern cpuop_func op_4a90_11_nf; @@ -8332,6 +8350,8 @@ extern cpuop_func op_4ab8_11_nf; extern cpuop_func op_4ab8_11_ff; extern cpuop_func op_4ab9_11_nf; extern cpuop_func op_4ab9_11_ff; +extern cpuop_func op_4abc_11_nf; +extern cpuop_func op_4abc_11_ff; extern cpuop_func op_4ac0_11_nf; extern cpuop_func op_4ac0_11_ff; extern cpuop_func op_4ad0_11_nf; diff --git a/src/include/custom.h b/src/include/custom.h index 8f515288..67db9d9f 100644 --- a/src/include/custom.h +++ b/src/include/custom.h @@ -19,11 +19,17 @@ #define CSMASK_AGA 4 #define CSMASK_MASK (CSMASK_ECS_AGNUS | CSMASK_ECS_DENISE | CSMASK_AGA) +#define CHIPSET_CLOCK_PAL 3546895 +#define CHIPSET_CLOCK_NTSC 3579545 + +extern void set_speedup_values(void); extern int custom_init (void); extern void custom_prepare (void); -extern void custom_reset (int hardreset); +extern void custom_reset (bool hardreset, bool keyboardreset); extern int intlev (void); +extern void do_copper (void); + extern void notice_new_xcolors (void); extern void init_row_map (void); extern void init_hz_full (void); @@ -31,7 +37,6 @@ extern void init_custom (void); extern bool picasso_requested_on; extern bool picasso_on; -extern void set_picasso_hack_rate (int hz); extern unsigned long int hsync_counter; @@ -40,21 +45,15 @@ extern uae_u16 intreq; extern int vpos; -extern void update_copper (int until_hpos); - -STATIC_INLINE void do_copper (void) +STATIC_INLINE int dmaen (unsigned int dmamask) { - int hpos = current_hpos (); - update_copper (hpos); + return (dmamask & dmacon) && (dmacon & 0x200); } -#define dmaen(DMAMASK) (int)((DMAMASK & dmacon) && (dmacon & 0x200)) - #define SPCFLAG_STOP 2 #define SPCFLAG_COPPER 4 #define SPCFLAG_INT 8 #define SPCFLAG_BRK 16 -#define SPCFLAG_EXTRA_CYCLES 32 #define SPCFLAG_TRACE 64 #define SPCFLAG_DOTRACE 128 #define SPCFLAG_DOINT 256 /* arg, JIT fails without this.. */ @@ -63,14 +62,20 @@ STATIC_INLINE void do_copper (void) #define SPCFLAG_ACTION_REPLAY 2048 #define SPCFLAG_TRAP 4096 /* enforcer-hack */ #define SPCFLAG_MODE_CHANGE 8192 +#ifdef JIT #define SPCFLAG_END_COMPILE 16384 +#endif extern uae_u16 adkcon; extern void INTREQ (uae_u16); extern void INTREQ_0 (uae_u16); extern void INTREQ_f (uae_u16); -#define send_interrupt(num) (INTREQ_0(0x8000 | (1 << num))) +STATIC_INLINE void send_interrupt (int num) +{ + INTREQ_0 (0x8000 | (1 << num)); +} + STATIC_INLINE uae_u16 INTREQR (void) { return intreq; diff --git a/src/include/disk.h b/src/include/disk.h index f948e1ad..4067179f 100644 --- a/src/include/disk.h +++ b/src/include/disk.h @@ -30,7 +30,7 @@ extern void DISK_hsync (void); extern void DISK_reset (void); extern int disk_getwriteprotect (struct uae_prefs *p, const TCHAR *name); extern int disk_setwriteprotect (struct uae_prefs *p, int num, const TCHAR *name, bool writeprotected); -extern void disk_creatediskfile (const TCHAR *name, int type, drive_type adftype, const TCHAR *disk_name, bool ffs, bool bootable); +extern bool disk_creatediskfile (const TCHAR *name, int type, drive_type adftype, const TCHAR *disk_name, bool ffs, bool bootable, struct zfile *copyfrom); extern int DISK_history_add (const TCHAR *name, int idx, int type, int donotcheck); extern TCHAR *DISK_history_get (int idx, int type); int DISK_examine_image (struct uae_prefs *p, int num, uae_u32 *crc32); diff --git a/src/include/drawing.h b/src/include/drawing.h index a882fa92..05ea1254 100644 --- a/src/include/drawing.h +++ b/src/include/drawing.h @@ -15,13 +15,12 @@ * invisible anyway due to hardware DDF limits. */ #define DISPLAY_LEFT_SHIFT 0x38 -#define PIXEL_XPOS(HPOS) ((((HPOS)<<1) - DISPLAY_LEFT_SHIFT + DIW_DDF_OFFSET - 1) ) +#define PIXEL_XPOS(HPOS) (((HPOS)*2 - DISPLAY_LEFT_SHIFT + DIW_DDF_OFFSET - 1) ) #define max_diwlastword (PIXEL_XPOS(0x1d4>> 1)) #define lores_shift 0 extern bool aga_mode; -extern bool ham_drawn; STATIC_INLINE int coord_hw_to_window_x (int x) { @@ -57,6 +56,7 @@ struct color_entry { uae_u16 color_regs_ecs[32]; xcolnr acolors[256]; uae_u32 color_regs_aga[256]; + bool borderblank; }; /* convert 24 bit AGA Amiga RGB to native color */ @@ -68,7 +68,7 @@ struct color_entry { STATIC_INLINE uae_u16 CONVERT_RGB(uae_u32 c) { uae_u16 ret; - __asm__ __volatile__ ( + __asm__ ( "ubfx r1, %[c], #19, #5 \n\t" "ubfx r2, %[c], #10, #6 \n\t" "ubfx %[v], %[c], #3, #5 \n\t" @@ -88,7 +88,7 @@ STATIC_INLINE xcolnr getxcolor (int c) } /* functions for reading, writing, copying and comparing struct color_entry */ -STATIC_INLINE int color_reg_get (struct color_entry *_GCCRES_ ce, int c) +STATIC_INLINE int color_reg_get (struct color_entry *ce, int c) { if (aga_mode) return ce->color_regs_aga[c]; @@ -96,7 +96,7 @@ STATIC_INLINE int color_reg_get (struct color_entry *_GCCRES_ ce, int c) return ce->color_regs_ecs[c]; } -STATIC_INLINE void color_reg_set (struct color_entry *_GCCRES_ ce, int c, int v) +STATIC_INLINE void color_reg_set (struct color_entry *ce, int c, int v) { if (aga_mode) ce->color_regs_aga[c] = v; @@ -105,15 +105,15 @@ STATIC_INLINE void color_reg_set (struct color_entry *_GCCRES_ ce, int c, int v) } /* ugly copy hack, is there better solution? */ -STATIC_INLINE void color_reg_cpy (struct color_entry *_GCCRES_ dst, struct color_entry *_GCCRES_ src) +STATIC_INLINE void color_reg_cpy (struct color_entry *dst, struct color_entry *src) { + dst->borderblank = src->borderblank; if (aga_mode) /* copy acolors and color_regs_aga */ memcpy (dst->acolors, src->acolors, sizeof(struct color_entry) - sizeof(uae_u16) * 32); else /* copy first 32 acolors and color_regs_ecs */ - memcpy(dst->color_regs_ecs, src->color_regs_ecs, - sizeof(uae_u16) * 32 + sizeof(xcolnr) * 32); + memcpy(dst->color_regs_ecs, src->color_regs_ecs, sizeof(uae_u16) * 32 + sizeof(xcolnr) * 32); } /* @@ -125,6 +125,7 @@ STATIC_INLINE void color_reg_cpy (struct color_entry *_GCCRES_ dst, struct color * but a list of structures containing information on how to draw the line. */ +#define COLOR_CHANGE_BRDBLANK 0x80000000 struct color_change { int linepos; int regno; @@ -156,13 +157,13 @@ extern union sps_union spixstate; extern uae_u16 spixels[MAX_SPR_PIXELS]; /* Way too much... */ -#define MAX_REG_CHANGE ((MAXVPOS + 1) * 2 * MAXHPOS) - -extern struct color_change *curr_color_changes; +#define MAX_REG_CHANGE ((MAXVPOS + 1) * MAXHPOS) extern struct color_entry curr_color_tables[(MAXVPOS + 2) * 2]; extern struct sprite_entry *curr_sprite_entries; +extern struct color_change *curr_color_changes; +extern struct draw_info curr_drawinfo[2 * (MAXVPOS + 2) + 1]; /* struct decision contains things we save across drawing frames for * comparison (smart update stuff). */ @@ -190,7 +191,6 @@ struct draw_info { }; extern struct decision line_decisions[2 * (MAXVPOS + 2) + 1]; -extern struct draw_info curr_drawinfo[2 * (MAXVPOS + 2) + 1]; extern uae_u8 line_data[(MAXVPOS + 2) * 2][MAX_PLANES * MAX_WORDS_PER_LINE * 2]; diff --git a/src/include/events.h b/src/include/events.h index a6323b65..8df56033 100644 --- a/src/include/events.h +++ b/src/include/events.h @@ -14,9 +14,9 @@ #include "md-pandora/rpt.h" -extern frame_time_t vsynctimebase, vsyncmintime; +extern frame_time_t vsyncmintime; +extern int vsynctimebase, syncbase; extern void reset_frame_rate_hack (void); -extern frame_time_t syncbase; extern int speedup_timelimit; extern void compute_vsynctime (void); diff --git a/src/include/filesys.h b/src/include/filesys.h index 753fc096..2033efe5 100644 --- a/src/include/filesys.h +++ b/src/include/filesys.h @@ -41,6 +41,20 @@ struct hardfiledata { TCHAR *emptyname; }; +struct hd_hardfiledata { + struct hardfiledata hfd; + int bootpri; + uae_u64 size; + int cyls; + int heads; + int secspertrack; + int cyls_def; + int secspertrack_def; + int heads_def; + TCHAR *path; + int ansi_version; +}; + #define HD_CONTROLLER_UAE 0 #define HD_CONTROLLER_IDE0 1 #define HD_CONTROLLER_IDE1 2 @@ -77,7 +91,16 @@ extern int hdf_write (struct hardfiledata *hfd, void *buffer, uae_u64 offset, in extern int get_native_path(uae_u32 lock, TCHAR *out); extern void hardfile_do_disk_change (struct uaedev_config_info *uci, int insert); +void hdf_hd_close(struct hd_hardfiledata *hfd); +int hdf_hd_open(struct hd_hardfiledata *hfd, const TCHAR *path, int blocksize, int readonly, + const TCHAR *devname, int cyls, int sectors, int surfaces, int reserved, + int bootpri, const TCHAR *filesys, + int pcyls, int pheads, int psectors); + extern int hdf_open_target (struct hardfiledata *hfd, const TCHAR *name); extern void hdf_close_target (struct hardfiledata *hfd); extern int hdf_read_target (struct hardfiledata *hfd, void *buffer, uae_u64 offset, int len); extern int hdf_write_target (struct hardfiledata *hfd, void *buffer, uae_u64 offset, int len); +extern void getchsgeometry (uae_u64 size, int *pcyl, int *phead, int *psectorspertrack); +extern void getchsgeometry_hdf (struct hardfiledata *hfd, uae_u64 size, int *pcyl, int *phead, int *psectorspertrack); +extern void getchspgeometry (uae_u64 total, int *pcyl, int *phead, int *psectorspertrack, bool idegeometry); diff --git a/src/include/fsdb.h b/src/include/fsdb.h index 1739cf09..98f0ef2c 100644 --- a/src/include/fsdb.h +++ b/src/include/fsdb.h @@ -107,7 +107,7 @@ extern void fsdb_dir_writeback (a_inode *); extern int fsdb_used_as_nname (a_inode *base, const TCHAR *); extern a_inode *fsdb_lookup_aino_aname (a_inode *base, const TCHAR *); extern a_inode *fsdb_lookup_aino_nname (a_inode *base, const TCHAR *); -extern int fsdb_exists (TCHAR *nname); +extern int fsdb_exists (const TCHAR *nname); STATIC_INLINE int same_aname (const TCHAR *an1, const TCHAR *an2) { @@ -116,6 +116,7 @@ STATIC_INLINE int same_aname (const TCHAR *an1, const TCHAR *an2) /* Filesystem-dependent functions. */ extern int fsdb_name_invalid (const TCHAR *n); +extern int fsdb_name_invalid_dir (const TCHAR *n); extern int fsdb_fill_file_attrs (a_inode *, a_inode *); extern int fsdb_set_file_attrs (a_inode *); extern int fsdb_mode_representable_p (const a_inode *, int); @@ -148,6 +149,10 @@ extern int my_existsfile (const TCHAR *name); extern int my_existsdir (const TCHAR *name); extern FILE *my_opentext (const TCHAR*); +extern bool my_stat (const TCHAR *name, struct mystat *ms); +extern bool my_utime (const TCHAR *name, struct mytimeval *tv); +extern bool my_chmod (const TCHAR *name, uae_u32 mode); + #define MYVOLUMEINFO_READONLY 1 #define MYVOLUMEINFO_STREAMS 2 #define MYVOLUMEINFO_ARCHIVE 4 diff --git a/src/include/gui.h b/src/include/gui.h index 88f053c0..ba38c8d6 100644 --- a/src/include/gui.h +++ b/src/include/gui.h @@ -12,7 +12,6 @@ extern void gui_exit (void); extern void gui_led (int, int); extern void gui_handle_events (void); extern void gui_filename (int, const TCHAR *); -extern void gui_fps (int fps); extern void gui_flicker_led (int, int, int); extern void gui_disk_image_change (int, const TCHAR *, bool writeprotected); extern unsigned int gui_ledstate; @@ -47,15 +46,16 @@ struct gui_info bool drive_writing[4]; /* drive is writing */ bool drive_disabled[4]; /* drive is disabled */ bool powerled; /* state of power led */ - uae_u8 drive_side; /* floppy side */ - uae_u8 hd; /* harddrive */ - uae_u8 cd; /* CD */ + uae_s8 drive_side; /* floppy side */ + uae_s8 hd; /* harddrive */ + uae_s8 cd; /* CD */ int fps; int sndbuf, sndbuf_status; TCHAR df[4][256]; /* inserted image */ uae_u32 crc32[4]; /* crc32 of image */ }; #define NUM_LEDS (LED_MAX) +#define VISIBLE_LEDS 6 extern struct gui_info gui_data; diff --git a/src/include/inputdevice.h b/src/include/inputdevice.h index 247a6d32..77f796bc 100644 --- a/src/include/inputdevice.h +++ b/src/include/inputdevice.h @@ -30,6 +30,7 @@ #define IDTYPE_JOYSTICK 0 #define IDTYPE_MOUSE 1 #define IDTYPE_KEYBOARD 2 +#define IDTYPE_MAX 3 struct inputdevice_functions { int (*init)(void); @@ -52,7 +53,7 @@ extern struct inputdevice_functions inputdevicefunc_keyboard; struct uae_input_device_default_node { int evt; - int flags; + uae_u64 flags; }; struct uae_input_device_kbr_default { @@ -69,7 +70,7 @@ struct inputevent { int data; }; -#define MAX_INPUT_QUALIFIERS (8+4) +#define MAX_INPUT_QUALIFIERS (8 + 5) /* event flags */ #define ID_FLAG_AUTOFIRE 1 @@ -80,26 +81,24 @@ struct inputevent { #define ID_FLAG_GAMEPORTSCUSTOM_MASK (ID_FLAG_GAMEPORTSCUSTOM1 | ID_FLAG_GAMEPORTSCUSTOM2) #define ID_FLAG_AUTOFIRE_MASK (ID_FLAG_TOGGLE | ID_FLAG_INVERTTOGGLE | ID_FLAG_AUTOFIRE) -#define ID_FLAG_CANRELEASE 0x2000 -#define ID_FLAG_TOGGLED 0x4000 -#define ID_FLAG_CUSTOMEVENT_TOGGLED 0x8000 -#define ID_FLAG_QUALIFIER1 0x00010000 -#define ID_FLAG_QUALIFIER2 0x00020000 -#define ID_FLAG_QUALIFIER3 0x00040000 -#define ID_FLAG_QUALIFIER4 0x00080000 -#define ID_FLAG_QUALIFIER5 0x00100000 -#define ID_FLAG_QUALIFIER6 0x00200000 -#define ID_FLAG_QUALIFIER7 0x00400000 -#define ID_FLAG_QUALIFIER8 0x00800000 -#define ID_FLAG_QUALIFIER_SPECIAL 0x01000000 -#define ID_FLAG_QUALIFIER_SHIFT 0x02000000 -#define ID_FLAG_QUALIFIER_CONTROL 0x04000000 -#define ID_FLAG_QUALIFIER_ALT 0x08000000 -#define ID_FLAG_QUALIFIER_MASK 0x0fff0000 -#define ID_FLAG_SAVE_MASK_CONFIG 0xff -#define ID_FLAG_SAVE_MASK_QUALIFIERS ID_FLAG_QUALIFIER_MASK -#define ID_FLAG_SAVE_MASK_FULL (ID_FLAG_SAVE_MASK_CONFIG | ID_FLAG_SAVE_MASK_QUALIFIERS) +#define ID_FLAG_QUALIFIER1 0x000000100000000 +#define ID_FLAG_QUALIFIER1_R 0x000000200000000 +#define ID_FLAG_QUALIFIER2 0x000000400000000 +#define ID_FLAG_QUALIFIER3 0x000001000000000 +#define ID_FLAG_QUALIFIER4 0x000004000000000 +#define ID_FLAG_QUALIFIER5 0x000010000000000 +#define ID_FLAG_QUALIFIER6 0x000040000000000 +#define ID_FLAG_QUALIFIER7 0x000100000000000 +#define ID_FLAG_QUALIFIER8 0x000400000000000 +#define ID_FLAG_QUALIFIER_SPECIAL 0x001000000000000 +#define ID_FLAG_QUALIFIER_SPECIAL_R 0x002000000000000 +#define ID_FLAG_QUALIFIER_SHIFT 0x004000000000000 +#define ID_FLAG_QUALIFIER_CONTROL 0x010000000000000 +#define ID_FLAG_QUALIFIER_ALT 0x040000000000000 +#define ID_FLAG_QUALIFIER_WIN 0x100000000000000 +#define ID_FLAG_QUALIFIER_MASK 0xfffffff00000000 +#define ID_FLAG_QUALIFIER_MASK_R 0xaaaaaaa00000000 #define IDEV_WIDGET_NONE 0 #define IDEV_WIDGET_BUTTON 1 @@ -113,35 +112,49 @@ struct inputevent { #define IDEV_MAPPED_INVERTTOGGLE 8 #define IDEV_MAPPED_GAMEPORTSCUSTOM1 16 #define IDEV_MAPPED_GAMEPORTSCUSTOM2 32 -#define IDEV_MAPPED_QUALIFIER1 0x00010000 -#define IDEV_MAPPED_QUALIFIER2 0x00020000 -#define IDEV_MAPPED_QUALIFIER3 0x00040000 -#define IDEV_MAPPED_QUALIFIER4 0x00080000 -#define IDEV_MAPPED_QUALIFIER5 0x00100000 -#define IDEV_MAPPED_QUALIFIER6 0x00200000 -#define IDEV_MAPPED_QUALIFIER7 0x00400000 -#define IDEV_MAPPED_QUALIFIER8 0x00800000 -#define IDEV_MAPPED_QUALIFIER_SPECIAL 0x01000000 -#define IDEV_MAPPED_QUALIFIER_SHIFT 0x02000000 -#define IDEV_MAPPED_QUALIFIER_CONTROL 0x04000000 -#define IDEV_MAPPED_QUALIFIER_ALT 0x08000000 -#define IDEV_MAPPED_QUALIFIER_MASK 0x0fff0000 +#define IDEV_MAPPED_QUALIFIER1 0x000000100000000 +#define IDEV_MAPPED_QUALIFIER2 0x000000400000000 +#define IDEV_MAPPED_QUALIFIER3 0x000001000000000 +#define IDEV_MAPPED_QUALIFIER4 0x000004000000000 +#define IDEV_MAPPED_QUALIFIER5 0x000010000000000 +#define IDEV_MAPPED_QUALIFIER6 0x000040000000000 +#define IDEV_MAPPED_QUALIFIER7 0x000100000000000 +#define IDEV_MAPPED_QUALIFIER8 0x000400000000000 +#define IDEV_MAPPED_QUALIFIER_SPECIAL 0x001000000000000 +#define IDEV_MAPPED_QUALIFIER_SHIFT 0x004000000000000 +#define IDEV_MAPPED_QUALIFIER_CONTROL 0x010000000000000 +#define IDEV_MAPPED_QUALIFIER_ALT 0x040000000000000 +#define IDEV_MAPPED_QUALIFIER_WIN 0x100000000000000 +#define IDEV_MAPPED_QUALIFIER_MASK 0xfffffff00000000 #define ID_BUTTON_OFFSET 0 #define ID_BUTTON_TOTAL 32 #define ID_AXIS_OFFSET 32 #define ID_AXIS_TOTAL 32 -extern int inputdevice_set_mapping (int devnum, int num, const TCHAR *name, TCHAR *custom, int flags, int port, int sub); -extern int inputdevice_get_mapping (int devnum, int num, int *pflags, int *port, TCHAR *name, TCHAR *custom, int sub); +extern int inputdevice_iterate (int devnum, int num, TCHAR *name, int *af); +extern bool inputdevice_set_gameports_mapping (struct uae_prefs *prefs, int devnum, int num, int evtnum, uae_u64 flags, int port); +extern int inputdevice_set_mapping (int devnum, int num, const TCHAR *name, TCHAR *custom, uae_u64 flags, int port, int sub); +extern int inputdevice_get_mapping (int devnum, int num, uae_u64 *pflags, int *port, TCHAR *name, TCHAR *custom, int sub); extern void inputdevice_copyconfig (const struct uae_prefs *src, struct uae_prefs *dst); +extern void inputdevice_copy_single_config (struct uae_prefs *p, int src, int dst, int devnum, int selectedwidget); +extern void inputdevice_swap_ports (struct uae_prefs *p, int devnum); +extern void inputdevice_swap_compa_ports (struct uae_prefs *p, int portswap); +extern void inputdevice_config_change (void); extern int inputdevice_config_change_test (void); +extern int inputdevice_get_device_index (int devnum); +extern TCHAR *inputdevice_get_device_name (int type, int devnum); +extern TCHAR *inputdevice_get_device_name2 (int devnum); +extern TCHAR *inputdevice_get_device_unique_name (int type, int devnum); +extern int inputdevice_get_device_status (int devnum); +extern void inputdevice_set_device_status (int devnum, int enabled); +extern int inputdevice_get_device_total (int type); extern int inputdevice_get_widget_num (int devnum); extern int inputdevice_get_widget_type (int devnum, int num, TCHAR *name); -extern int input_get_default_mouse (struct uae_input_device *uid, int num, int port, int af); -extern int input_get_default_joystick (struct uae_input_device *uid, int num, int port, int af, int mode); -extern int input_get_default_joystick_analog (struct uae_input_device *uid, int num, int port, int af); +extern int input_get_default_mouse (struct uae_input_device *uid, int num, int port, int af, bool gp); +extern int input_get_default_joystick (struct uae_input_device *uid, int num, int port, int af, int mode, bool gp); +extern int input_get_default_joystick_analog (struct uae_input_device *uid, int num, int port, int af, bool gp); extern int input_get_default_keyboard (int num); #define DEFEVENT(A, B, C, D, E, F) INPUTEVENT_ ## A, @@ -157,7 +170,7 @@ extern uae_u8 handle_parport_joystick (int port, uae_u8 pra, uae_u8 dra); extern uae_u8 handle_joystick_buttons (uae_u8, uae_u8); extern int inputdevice_is_tablet (void); -extern void input_mousehack_status (int mode, uaecptr diminfo, uaecptr dispinfo, uaecptr vp, uae_u32 moffset); +extern int input_mousehack_status (int mode, uaecptr diminfo, uaecptr dispinfo, uaecptr vp, uae_u32 moffset); extern void input_mousehack_mouseoffset (uaecptr pointerprefs); extern void setmousebuttonstateall (int mouse, uae_u32 buttonbits, uae_u32 buttonmask); @@ -169,16 +182,21 @@ extern int getjoystickstate (int mouse); void setmousestate (int mouse, int axis, int data, int isabs); extern int getmousestate (int mouse); -extern void inputdevice_updateconfig (struct uae_prefs *prefs); -extern void inputdevice_updateconfig_internal (struct uae_prefs *prefs); +extern void inputdevice_updateconfig (const struct uae_prefs *srcprefs, struct uae_prefs *dstprefs); +extern void inputdevice_updateconfig_internal (const struct uae_prefs *srcprefs, struct uae_prefs *dstprefs); extern int inputdevice_translatekeycode (int keyboard, int scancode, int state); extern void inputdevice_checkqualifierkeycode (int keyboard, int scancode, int state); extern void inputdevice_setkeytranslation (struct uae_input_device_kbr_default **trans, int **kbmaps); extern void inputdevice_do_keyboard (int code, int state); extern int inputdevice_iskeymapped (int keyboard, int scancode); +extern int inputdevice_get_compatibility_input (struct uae_prefs*, int, int*, int**, int**); extern struct inputevent *inputdevice_get_eventinfo (int evt); extern bool inputdevice_get_eventname (const struct inputevent *ie, TCHAR *out); +extern void inputdevice_compa_prepare_custom (struct uae_prefs *prefs, int index, int mode); +extern void inputdevice_compa_clear (struct uae_prefs *prefs, int index); +extern int intputdevice_compa_get_eventtype (int evt, int **axistable); +extern void inputdevice_sparecopy (struct uae_input_device *uid, int num, int sub); extern uae_u16 potgo_value; extern uae_u16 POTGOR (void); @@ -213,7 +231,9 @@ extern void inputdevice_handle_inputcode (void); extern void inputdevice_tablet_strobe (void); -extern int input_getqualifiers (void); +extern uae_u64 input_getqualifiers (void); + +extern void setsystime (void); extern int inputdevice_get_device_total (int type); extern TCHAR *inputdevice_get_device_name (int type, int devnum); @@ -245,3 +265,5 @@ extern TCHAR *inputdevice_get_device_name (int type, int devnum); extern int jsem_isjoy (int port, const struct uae_prefs *p); extern int jsem_ismouse (int port, const struct uae_prefs *p); extern int jsem_iskbdjoy (int port, const struct uae_prefs *p); + +extern int inputdevice_uaelib (const TCHAR *, const TCHAR *); diff --git a/src/include/joystick.h b/src/include/joystick.h deleted file mode 100644 index 62fce1cb..00000000 --- a/src/include/joystick.h +++ /dev/null @@ -1,13 +0,0 @@ - /* - * UAE - The Un*x Amiga Emulator - * - * Joystick emulation prototypes - * - * Copyright 1995 Bernd Schmidt - */ - -extern void read_joystick (int nr, int *dir, int *button); -extern void init_joystick (void); -extern void close_joystick (void); - -extern void joystick_setting_changed (void); diff --git a/src/include/keyboard.h b/src/include/keyboard.h index 404a8615..46b0c221 100644 --- a/src/include/keyboard.h +++ b/src/include/keyboard.h @@ -167,5 +167,7 @@ enum aks { AKS_ENTERGUI = 0x200, AKS_SCREENSHOT_FILE, AKS_SCREENSHOT_CLIPBOARD, AKS_QUALIFIER1, AKS_QUALIFIER2, AKS_QUALIFIER3, AKS_QUALIFIER4, AKS_QUALIFIER5, AKS_QUALIFIER6, AKS_QUALIFIER7, AKS_QUALIFIER8, AKS_QUALIFIER_SPECIAL, AKS_QUALIFIER_SHIFT, AKS_QUALIFIER_CONTROL, - AKS_QUALIFIER_ALT + AKS_QUALIFIER_ALT, AKS_QUALIFIER_WIN }; + +#define AKS_FIRST AKS_ENTERGUI diff --git a/src/include/memory.h b/src/include/memory.h index 8333c3ef..0cf2e9b0 100644 --- a/src/include/memory.h +++ b/src/include/memory.h @@ -132,7 +132,8 @@ extern void memory_init (void); extern void memory_cleanup (void); extern void map_banks (addrbank *bank, int first, int count, int realsize); extern void map_overlay (int chip); -extern void memory_hardreset (void); +extern void memory_hardreset (int); +extern void memory_clear (void); extern void free_fastmemory (void); #define longget(addr) (call_mem_get_func(get_mem_bank(addr).lget, addr)) @@ -168,19 +169,6 @@ STATIC_INLINE uae_u32 get_wordi(uaecptr addr) return wordgeti(addr); } -STATIC_INLINE void put_long(uaecptr addr, uae_u32 l) -{ - longput(addr, l); -} -STATIC_INLINE void put_word(uaecptr addr, uae_u32 w) -{ - wordput(addr, w); -} -STATIC_INLINE void put_byte(uaecptr addr, uae_u32 b) -{ - byteput(addr, b); -} - /* * Read a host pointer from addr */ @@ -211,6 +199,19 @@ STATIC_INLINE void *get_pointer (uaecptr addr) # endif #endif +STATIC_INLINE void put_long(uaecptr addr, uae_u32 l) +{ + longput(addr, l); +} +STATIC_INLINE void put_word(uaecptr addr, uae_u32 w) +{ + wordput(addr, w); +} +STATIC_INLINE void put_byte(uaecptr addr, uae_u32 b) +{ + byteput(addr, b); +} + /* * Store host pointer v at addr */ @@ -257,17 +258,15 @@ extern uae_u32 chipmem_mask, chipmem_full_mask, kickmem_mask; extern uae_u8 *kickmemory; extern addrbank dummy_bank; -static __inline__ uae_u16 CHIPMEM_AGNUS_WGET_CUSTOM (uae_u32 PT) { +STATIC_INLINE uae_u32 chipmem_lget_indirect(uae_u32 PT) { + return do_get_mem_long((uae_u32 *)&chipmemory[PT & chipmem_full_mask]); +} +STATIC_INLINE uae_u32 chipmem_wget_indirect (uae_u32 PT) { return do_get_mem_word((uae_u16 *)&chipmemory[PT & chipmem_full_mask]); } +#define chipmem_wput_indirect chipmem_agnus_wput +extern void REGPARAM2 chipmem_agnus_wput (uaecptr addr, uae_u32 w); -static __inline void CHIPMEM_AGNUS_WPUT_CUSTOM (uae_u32 PT, uae_u16 DA) { - do_put_mem_word((uae_u16 *)&chipmemory[PT & chipmem_full_mask], DA); -} - -static __inline__ uae_u32 CHIPMEM_LGET_CUSTOM(uae_u32 PT) { - return do_get_mem_long((uae_u32 *)&chipmemory[PT & chipmem_mask]); -} extern uae_u8 *mapped_malloc (size_t, const TCHAR*); extern void mapped_free (uae_u8 *); @@ -283,26 +282,4 @@ extern void memcpyah (uae_u8 *dst, uaecptr src, int size); extern uae_s32 getz2size (struct uae_prefs *p); extern uae_u32 getz2endaddr (void); -#if defined(ARMV6_ASSEMBLY) - -extern "C" { - void *arm_memset(void *s, int c, size_t n); - void *arm_memcpy(void *dest, const void *src, size_t n); -} - -/* 4-byte alignment */ -//#define UAE4ALL_ALIGN __attribute__ ((__aligned__ (4))) -#define UAE4ALL_ALIGN __attribute__ ((__aligned__ (16))) -#define uae4all_memclr(p,l) arm_memset(p,0,l) -#define uae4all_memcpy arm_memcpy - -#else - -/* 4-byte alignment */ -#define UAE4ALL_ALIGN __attribute__ ((__aligned__ (4))) -#define uae4all_memcpy memcpy -#define uae4all_memclr(p,l) memset(p, 0, l) - -#endif - #endif diff --git a/src/include/native2amiga.h b/src/include/native2amiga.h index 524e2e8a..a4b7eb63 100644 --- a/src/include/native2amiga.h +++ b/src/include/native2amiga.h @@ -21,8 +21,8 @@ * function has to be setup with deftrap2() and * TRAPFLAG_EXTRA_STACK and stack magic is required. */ -uaecptr uae_AllocMem (TrapContext *context, uae_u32 size, uae_u32 flags); -void uae_FreeMem (TrapContext *context, uaecptr memory, uae_u32 size); +uaecptr uae_AllocMem (TrapContext *context, uae_u32 size, uae_u32 flags, uaecptr sysbase); +void uae_FreeMem (TrapContext *context, uaecptr memory, uae_u32 size, uaecptr sysbase); /* diff --git a/src/include/newcpu.h b/src/include/newcpu.h index 937feb44..a57f3c17 100644 --- a/src/include/newcpu.h +++ b/src/include/newcpu.h @@ -57,7 +57,7 @@ struct cputbl { }; #ifdef JIT -typedef unsigned long REGPARAM3 compop_func (uae_u32) REGPARAM; +typedef uae_u32 REGPARAM3 compop_func (uae_u32) REGPARAM; struct comptbl { compop_func *handler; @@ -66,7 +66,10 @@ struct comptbl { }; #endif -extern unsigned long REGPARAM3 op_illg (uae_u32, struct regstruct ®s) REGPARAM; +#define op_illg(op) _op_illg(op, regs) +extern uae_u32 REGPARAM3 _op_illg (uae_u32, struct regstruct ®s) REGPARAM; +#define op_unimpl() _op_unimpl(regs) +extern void REGPARAM3 _op_unimpl (struct regstruct ®s) REGPARAM; typedef uae_u8 flagtype; @@ -130,7 +133,7 @@ struct regstruct uae_u32 panic_pc, panic_addr; signed long pissoff; }; -extern unsigned long int nextevent, is_syncline, currcycle; +extern unsigned long nextevent, is_syncline, currcycle; extern struct regstruct regs; @@ -143,13 +146,15 @@ STATIC_INLINE uae_u32 munge24(uae_u32 x) extern int cpu_cycles; -STATIC_INLINE void set_special (struct regstruct ®s, uae_u32 x) +#define set_special(x) _set_special(regs, x) +STATIC_INLINE void _set_special (struct regstruct ®s, uae_u32 x) { regs.spcflags |= x; cycles_do_special(regs); } -STATIC_INLINE void unset_special (struct regstruct ®s, uae_u32 x) +#define unset_special(x) _unset_special(regs, x) +STATIC_INLINE void _unset_special (struct regstruct ®s, uae_u32 x) { regs.spcflags &= ~x; } @@ -157,29 +162,27 @@ STATIC_INLINE void unset_special (struct regstruct ®s, uae_u32 x) #define m68k_dreg(r,num) ((r).regs[(num)]) #define m68k_areg(r,num) (((r).regs + 8)[(num)]) -STATIC_INLINE void m68k_setpc (struct regstruct ®s, uaecptr newpc) +#define m68k_setpc(newpc) _m68k_setpc(regs, newpc) +STATIC_INLINE void _m68k_setpc (struct regstruct ®s, uaecptr newpc) { regs.pc_p = regs.pc_oldp = get_real_address (newpc); regs.instruction_pc = regs.pc = newpc; } -STATIC_INLINE uaecptr m68k_getpc (struct regstruct ®s) +#define m68k_getpc() _m68k_getpc(regs) +STATIC_INLINE uaecptr _m68k_getpc (struct regstruct ®s) { return (uaecptr)(regs.pc + ((uae_u8*)regs.pc_p - (uae_u8*)regs.pc_oldp)); } -#define M68K_GETPC m68k_getpc(regs) +#define M68K_GETPC _m68k_getpc(regs) #define m68k_incpc(o) ((regs).pc_p += (o)) -STATIC_INLINE uaecptr m68k_getpci (struct regstruct ®s) -{ - return regs.pc; -} - -STATIC_INLINE void m68k_do_rts (struct regstruct ®s) +#define m68k_do_rts() _m68k_do_rts(regs) +STATIC_INLINE void _m68k_do_rts (struct regstruct ®s) { uae_u32 newpc = get_long (m68k_areg (regs, 7)); - m68k_setpc (regs, newpc); + m68k_setpc (newpc); m68k_areg(regs, 7) += 4; } @@ -193,6 +196,7 @@ STATIC_INLINE void m68k_do_bsr (struct regstruct ®s, uaecptr oldpc, uae_s32 o #define get_ibyte(o) do_get_mem_byte((uae_u8 *)((regs).pc_p + (o) + 1)) #define get_iword(o) do_get_mem_word((uae_u16 *)((regs).pc_p + (o))) #define get_ilong(o) do_get_mem_long((uae_u32 *)((regs).pc_p + (o))) + #define get_iword2(regs,o) do_get_mem_word((uae_u16 *)((regs).pc_p + (o))) /* These are only used by the 68020/68881 code, and therefore don't @@ -210,13 +214,21 @@ STATIC_INLINE uae_u32 next_ilong (struct regstruct ®s) return r; } -extern uae_u32 (*x_next_iword)(struct regstruct ®s); -extern uae_u32 (*x_next_ilong)(struct regstruct ®s); +#define x_get_word get_word +#define x_get_long get_long +#define x_put_byte put_byte +#define x_put_word put_word +#define x_put_long put_long +#define x_next_iword() next_iword(regs) +#define x_next_ilong() next_ilong(regs) extern void m68k_setstopped (void); extern void m68k_resumestopped (void); -extern uae_u32 REGPARAM3 get_disp_ea_020 (struct regstruct ®s, uae_u32 base, uae_u32 dp) REGPARAM; +#define x_get_disp_ea_020(base,dp) _get_disp_ea_020(regs, base, dp) +#define get_disp_ea_020(base,dp) _get_disp_ea_020(regs, base, dp) +extern uae_u32 REGPARAM3 _get_disp_ea_020 (struct regstruct ®s, uae_u32 base, uae_u32 dp) REGPARAM; + extern uae_u32 REGPARAM3 get_bitfield (uae_u32 src, uae_u32 bdata[2], uae_s32 offset, int width) REGPARAM; extern void REGPARAM3 put_bitfield (uae_u32 dst, uae_u32 bdata[2], uae_u32 val, uae_s32 offset, int width) REGPARAM; @@ -224,8 +236,10 @@ extern int get_cpu_model(void); extern void REGPARAM3 MakeSR (struct regstruct ®s) REGPARAM; extern void REGPARAM3 MakeFromSR (struct regstruct ®s) REGPARAM; -extern void REGPARAM3 Exception (int, struct regstruct ®s) REGPARAM; +#define Exception(nr) _Exception(nr, regs) +extern void REGPARAM3 _Exception (int, struct regstruct ®s) REGPARAM; extern void doint (void); +extern void dump_counts (void); extern int m68k_move2c (int, uae_u32 *); extern int m68k_movec2 (int, uae_u32 *); extern void m68k_divl (uae_u32, uae_u32, uae_u16); @@ -235,22 +249,7 @@ extern void m68k_go (int); extern void m68k_reset (int); extern int getDivu68kCycles(uae_u32 dividend, uae_u16 divisor); extern int getDivs68kCycles(uae_s32 dividend, uae_s16 divisor); - -STATIC_INLINE int bitset_count(uae_u32 data) -{ - unsigned int const MASK1 = 0x55555555; - unsigned int const MASK2 = 0x33333333; - unsigned int const MASK4 = 0x0f0f0f0f; - unsigned int const MASK6 = 0x0000003f; - - unsigned int const w = (data & MASK1) + ((data >> 1) & MASK1); - unsigned int const x = (w & MASK2) + ((w >> 2) & MASK2); - unsigned int const y = ((x + (x >> 4)) & MASK4); - unsigned int const z = (y + (y >> 8)); - unsigned int const c = (z + (z >> 16)) & MASK6; - - return c; -} +extern void protect_roms (bool); STATIC_INLINE int bitset_count16(uae_u16 data) { @@ -281,6 +280,7 @@ extern void fpu_reset (void); extern void exception3 (uae_u32 opcode, uaecptr addr); extern void exception3i (uae_u32 opcode, uaecptr addr); +extern void exception3 (uae_u32 opcode, uaecptr addr, int w, int i, uaecptr pc); extern void exception2 (uaecptr addr); extern void cpureset (void); @@ -298,8 +298,7 @@ extern const struct cputbl op_smalltbl_3_ff[]; extern const struct cputbl op_smalltbl_4_ff[]; /* 68000 */ extern const struct cputbl op_smalltbl_5_ff[]; -/* 68000 slow but compatible. */ -extern const struct cputbl op_smalltbl_11_ff[]; +extern const struct cputbl op_smalltbl_11_ff[]; // prefetch extern cpuop_func *cpufunctbl[65536] ASM_SYM_FOR_FUNC ("cpufunctbl"); diff --git a/src/include/options.h b/src/include/options.h index 872526db..0488957e 100644 --- a/src/include/options.h +++ b/src/include/options.h @@ -8,7 +8,7 @@ */ #define UAEMAJOR 2 -#define UAEMINOR 4 +#define UAEMINOR 5 #define UAESUBREV 1 extern long int version; @@ -40,7 +40,7 @@ struct uae_input_device { TCHAR *configname; uae_s16 eventid[MAX_INPUT_DEVICE_EVENTS][MAX_INPUT_SUB_EVENT_ALL]; TCHAR *custom[MAX_INPUT_DEVICE_EVENTS][MAX_INPUT_SUB_EVENT_ALL]; - uae_u32 flags[MAX_INPUT_DEVICE_EVENTS][MAX_INPUT_SUB_EVENT_ALL]; + uae_u64 flags[MAX_INPUT_DEVICE_EVENTS][MAX_INPUT_SUB_EVENT_ALL]; uae_s8 port[MAX_INPUT_DEVICE_EVENTS][MAX_INPUT_SUB_EVENT_ALL]; uae_s16 extra[MAX_INPUT_DEVICE_EVENTS]; uae_s8 enabled; @@ -99,12 +99,15 @@ struct uaedev_config_info { bool autoboot; bool donotmount; TCHAR filesys[MAX_DPATH]; + int cyls; // zero if detected from size int surfaces; int sectors; int reserved; int blocksize; int configoffset; int controller; + // zero if default + int pcyls, pheads, psecs; }; struct uae_prefs { @@ -143,6 +146,7 @@ struct uae_prefs { #endif bool immediate_blits; + int waiting_blits; unsigned int chipset_mask; bool ntscmode; int chipset_refreshrate; @@ -152,6 +156,7 @@ struct uae_prefs { int floppy_speed; int floppy_write_length; bool tod_hack; + int filesys_limit; bool cs_cd32cd; bool cs_cd32c2p; @@ -237,9 +242,10 @@ extern void cfgfile_target_write_str (struct zfile *f, const TCHAR *option, cons extern void cfgfile_target_dwrite_str (struct zfile *f, const TCHAR *option, const TCHAR *value); extern struct uaedev_config_info *add_filesys_config (struct uae_prefs *p, int index, - TCHAR *devname, TCHAR *volname, TCHAR *rootdir, bool readonly, - int secspertrack, int surfaces, int reserved, - int blocksize, int bootpri, TCHAR *filesysdir, int hdc, int flags); + const TCHAR *devname, const TCHAR *volname, const TCHAR *rootdir, bool readonly, + int cyls, int secspertrack, int surfaces, int reserved, + int blocksize, int bootpri, const TCHAR *filesysdir, int hdc, int flags, + int pcyls, int pheads, int psecs); extern void default_prefs (struct uae_prefs *, int); extern void discard_prefs (struct uae_prefs *, int); @@ -271,6 +277,9 @@ extern int cfgfile_save (struct uae_prefs *p, const TCHAR *filename, int); extern void cfgfile_parse_line (struct uae_prefs *p, TCHAR *, int); extern int cfgfile_parse_option (struct uae_prefs *p, TCHAR *option, TCHAR *value, int); extern int cfgfile_get_description (const TCHAR *filename, TCHAR *description); +extern uae_u32 cfgfile_uaelib (int mode, uae_u32 name, uae_u32 dst, uae_u32 maxlen); +extern uae_u32 cfgfile_uaelib_modify (uae_u32 mode, uae_u32 parms, uae_u32 size, uae_u32 out, uae_u32 outsize); +extern uae_u32 cfgfile_modify (uae_u32 index, TCHAR *parms, uae_u32 size, TCHAR *out, uae_u32 outsize); extern void cfgfile_addcfgparam (TCHAR *); extern int cfgfile_configuration_change(int); extern void fixup_prefs_dimensions (struct uae_prefs *prefs); @@ -280,6 +289,7 @@ extern void fixup_cpu (struct uae_prefs *prefs); extern void check_prefs_changed_custom (void); extern void check_prefs_changed_cpu (void); extern void check_prefs_changed_audio (void); +extern void check_prefs_changed_cd (void); extern int check_prefs_changed_gfx (void); extern struct uae_prefs currprefs, changed_prefs; diff --git a/src/include/picasso96.h b/src/include/picasso96.h index 04e6bf8b..196134a2 100644 --- a/src/include/picasso96.h +++ b/src/include/picasso96.h @@ -590,10 +590,11 @@ extern struct picasso96_state_struct picasso96_state; extern void picasso_enablescreen (int on); extern void picasso_refresh (void); extern void init_hz_p96 (void); -static __inline__ void picasso_handle_hsync (void) +STATIC_INLINE void picasso_handle_hsync (void) { } extern void picasso_handle_vsync (void); +extern void picasso_trigger_vblank (void); extern void picasso_reset (void); extern int picasso_palette (void); @@ -632,7 +633,8 @@ extern int p96hsync_counter; #define CARD_PORTSIRQ (CARD_VBLANKIRQ + 22) #define CARD_IRQFLAG (CARD_PORTSIRQ + 22) #define CARD_IRQPTR (CARD_IRQFLAG + 4) -#define CARD_IRQCODE (CARD_IRQPTR + 4) +#define CARD_IRQEXECBASE (CARD_IRQPTR + 4) +#define CARD_IRQCODE (CARD_IRQEXECBASE + 4) #define CARD_END (CARD_IRQCODE + 11 * 2) #define CARD_SIZEOF CARD_END diff --git a/src/include/readcpu.h b/src/include/readcpu.h index 46128c1f..8f37e4ac 100644 --- a/src/include/readcpu.h +++ b/src/include/readcpu.h @@ -76,6 +76,7 @@ struct instr_def { uae_u8 bitpos[16]; unsigned int mask; int cpulevel; + int unimpcpulevel; int plevel; struct { unsigned int flaguse:3; @@ -107,9 +108,10 @@ extern struct instr { unsigned int suse:1; unsigned int duse:1; unsigned int unused1:1; - unsigned int clev:3; - unsigned int cflow:3; + unsigned int clev:3, unimpclev:3; unsigned int unused2:2; + unsigned int cflow:3; + unsigned int unused3:5; } *table68k; extern void read_table68k (void); diff --git a/src/include/savestate.h b/src/include/savestate.h index 5ada5f59..d500d802 100644 --- a/src/include/savestate.h +++ b/src/include/savestate.h @@ -94,6 +94,7 @@ extern void restore_audio_finish (void); extern uae_u8 *restore_cia (int, uae_u8 *); extern uae_u8 *save_cia (int, int *, uae_u8 *); extern void restore_cia_finish (void); +extern void restore_cia_start (void); extern uae_u8 *restore_expansion (uae_u8 *); extern uae_u8 *save_expansion (int *, uae_u8 *); diff --git a/src/include/scsidev.h b/src/include/scsidev.h index 282f95d8..fdbe4bd1 100644 --- a/src/include/scsidev.h +++ b/src/include/scsidev.h @@ -23,8 +23,5 @@ extern int log_scsi; #define UAESCSI_CDEMU 0 #define UAESCSI_SPTI 1 #define UAESCSI_SPTISCAN 2 -#define UAESCSI_ASPI_FIRST 3 -#define UAESCSI_ADAPTECASPI 3 -#define UAESCSI_NEROASPI 4 -#define UAESCSI_FROGASPI 5 +#define UAESCSI_LAST 2 #endif \ No newline at end of file diff --git a/src/include/statusline.h b/src/include/statusline.h index 45596f58..8b6acd86 100644 --- a/src/include/statusline.h +++ b/src/include/statusline.h @@ -21,3 +21,5 @@ static int td_pos = (TD_RIGHT|TD_BOTTOM); #define STATUSLINE_CHIPSET 1 #define STATUSLINE_RTG 2 #define STATUSLINE_TARGET 0x80 + +extern void draw_status_line_single (uae_u8 *buf, int y, int totalwidth); diff --git a/src/include/sysdeps.h b/src/include/sysdeps.h index b424de4c..5e007df7 100644 --- a/src/include/sysdeps.h +++ b/src/include/sysdeps.h @@ -15,6 +15,7 @@ * Copyright 1996, 1997 Bernd Schmidt */ +using namespace std; #include #include #include @@ -145,23 +146,6 @@ struct utimbuf }; #endif -#if defined(WARPUP) -#include "devices/timer.h" -#include "osdep/posixemu.h" -#define REGPARAM -#define REGPARAM2 -#define RETSIGTYPE -#define USE_ZFILE -#define strcasecmp stricmp -#define memcpy q_memcpy -#define memset q_memset -#define strdup my_strdup -#define random rand -#define creat(x,y) open("T:creat",O_CREAT|O_RDWR|O_TRUNC,777) -extern void* q_memset(void*,int,size_t); -extern void* q_memcpy(void*,const void*,size_t); -#endif - #ifdef __DOS__ #include #include @@ -237,6 +221,18 @@ typedef uae_u32 uaecptr; extern TCHAR *my_strdup (const TCHAR*s); #endif +extern TCHAR *my_strdup_ansi (const char*); +extern TCHAR *au (const char*); +extern char *ua (const TCHAR*); +extern TCHAR *au_fs (const char*); +extern char *ua_fs (const TCHAR*, int); +extern char *ua_copy (char *dst, int maxlen, const TCHAR *src); +extern TCHAR *au_copy (TCHAR *dst, int maxlen, const char *src); +extern char *ua_fs_copy (char *dst, int maxlen, const TCHAR *src, int defchar); +extern TCHAR *au_fs_copy (TCHAR *dst, int maxlen, const char *src); +extern char *uutf8 (const TCHAR *s); +extern TCHAR *utf8u (const char *s); + /* We can only rely on GNU C getting enums right. Mickeysoft VSC++ is known * to have problems, and it's likely that other compilers choke too. */ #ifdef __GNUC__ @@ -268,10 +264,6 @@ extern TCHAR *my_strdup (const TCHAR*s); #undef DONT_HAVE_STDIO #undef DONT_HAVE_MALLOC -#if defined(WARPUP) -#define DONT_HAVE_POSIX -#endif - #if defined PANDORA #include @@ -376,8 +368,6 @@ extern void mallocemu_free (void *ptr); #define ASM_SYM_FOR_FUNC(a) #endif -#include "target.h" - #ifdef UAE_CONSOLE #undef write_log #define write_log write_log_standard @@ -418,6 +408,8 @@ extern void gui_message (const TCHAR *,...); #endif #endif +#include "target.h" + /* Every Amiga hardware clock cycle takes this many "virtual" cycles. This used to be hardcoded as 1, but using higher values allows us to time some stuff more precisely. @@ -446,11 +438,11 @@ extern void gui_message (const TCHAR *,...); #ifdef ARMV6_ASSEMBLY -static inline uae_u32 do_byteswap_32(uae_u32 v) {__asm__ ( +STATIC_INLINE uae_u32 do_byteswap_32(uae_u32 v) {__asm__ ( "rev %0, %0" : "=r" (v) : "0" (v) ); return v;} -static inline uae_u32 do_byteswap_16(uae_u32 v) {__asm__ ( +STATIC_INLINE uae_u32 do_byteswap_16(uae_u32 v) {__asm__ ( "revsh %0, %0\n\t" "uxth %0, %0" : "=r" (v) : "0" (v) ); return v;} diff --git a/src/include/uae.h b/src/include/uae.h index 8e776657..bc289de1 100644 --- a/src/include/uae.h +++ b/src/include/uae.h @@ -14,23 +14,30 @@ extern void do_leave_program (void); extern void start_program (void); extern void leave_program (void); extern void real_main (int, TCHAR **); +extern void virtualdevice_init (void); extern void usage (void); extern void sleep_millis (int ms); extern void sleep_millis_main (int ms); extern void sleep_millis_busy (int ms); +#define UAE_QUIT 1 +#define UAE_RESET 2 +#define UAE_RESET_KEYBOARD 3 +#define UAE_RESET_HARD 4 -extern void uae_reset (int); +extern void uae_reset (int, int); extern void uae_quit (void); -extern void uae_restart (int, TCHAR*); +extern void uae_restart (int, const TCHAR*); extern void reset_all_systems (void); extern void target_reset (void); extern void target_run (void); extern void target_quit (void); +extern void target_restart (void); extern void stripslashes (TCHAR *p); extern void fixtrailing (TCHAR *p); extern void getpathpart (TCHAR *outpath, int size, const TCHAR *inpath); extern void getfilepart (TCHAR *out, int size, const TCHAR *path); +extern uae_u32 getlocaltime (void); extern int quit_program; diff --git a/src/include/xwin.h b/src/include/xwin.h index d663db7f..dd5f195d 100644 --- a/src/include/xwin.h +++ b/src/include/xwin.h @@ -15,11 +15,12 @@ typedef int (*allocfunc_type)(int, int, int, xcolnr *); extern xcolnr xcolors[4096]; extern int graphics_setup (void); -extern int graphics_init (void); +extern int graphics_init (bool); extern void graphics_leave (void); extern void handle_events (void); extern int handle_msgpump (void); extern void setup_brkhandler (void); +extern bool vsync_switchmode (int); STATIC_INLINE int isvsync_chipset (void) { if (picasso_on) @@ -34,10 +35,11 @@ STATIC_INLINE int isvsync_rtg (void) return 1; } -extern void flush_screen (); +extern void flush_screen (void); extern int lockscr (void); extern void unlockscr (void); +extern bool target_graphics_buffer_update (void); extern void screenshot (int); diff --git a/src/include/zarchive.h b/src/include/zarchive.h index 69c80279..c4458a8a 100644 --- a/src/include/zarchive.h +++ b/src/include/zarchive.h @@ -1,15 +1,20 @@ +typedef uae_s64 (*ZFILEREAD)(void*, uae_u64, uae_u64, struct zfile*); +typedef uae_s64 (*ZFILEWRITE)(const void*, uae_u64, uae_u64, struct zfile*); +typedef uae_s64 (*ZFILESEEK)(struct zfile*, uae_s64, int); + struct zfile { TCHAR *name; TCHAR *zipname; TCHAR *mode; FILE *f; // real file handle if physical file uae_u8 *data; // unpacked data - struct zfile *archiveparent; // set if parent is archive and this has not yet been unpacked (datasize < size) - int archiveid; + int dataseek; // use seek position even if real file + struct zfile *archiveparent; // set if parent is archive and this has not yet been unpacked (datasize < size) + int archiveid; uae_s64 size; // real size - uae_s64 datasize; // available size (not yet unpacked completely?) - uae_s64 allocsize; // memory allocated before realloc() needed again + uae_s64 datasize; // available size (not yet unpacked completely?) + uae_s64 allocsize; // memory allocated before realloc() needed again uae_s64 seek; // seek position int deleteafterclose; int textmode; @@ -18,6 +23,10 @@ struct zfile { struct zfile *parent; uae_u64 offset; // byte offset from parent file int opencnt; + ZFILEREAD zfileread; + ZFILEWRITE zfilewrite; + ZFILESEEK zfileseek; + void *userdata; int useparent; }; @@ -40,7 +49,7 @@ struct znode { struct zfile *f; TCHAR *comment; int flags; - time_t mtime; + struct mytimeval mtime; /* decompressor specific */ unsigned int offset; unsigned int offset2; @@ -72,40 +81,57 @@ struct zarchive_info uae_s64 size; int flags; TCHAR *comment; - time_t t; + struct mytimeval tv; }; #define ArchiveFormat7Zip '7z ' +#define ArchiveFormatRAR 'rar ' #define ArchiveFormatZIP 'zip ' #define ArchiveFormatLHA 'lha ' #define ArchiveFormatLZX 'lzx ' #define ArchiveFormatPLAIN '----' +#define ArchiveFormatDIR 'DIR ' #define ArchiveFormatAA 'aa ' // method only #define ArchiveFormatADF 'DOS ' +#define ArchiveFormatRDB 'RDSK' +#define ArchiveFormatMBR 'MBR ' +#define ArchiveFormatFAT 'FAT ' +#define ArchiveFormatTAR 'tar ' #define PEEK_BYTES 1024 #define FILE_PEEK 1 #define FILE_DELAYEDOPEN 2 -extern int zfile_is_ignore_ext(const TCHAR *name); +extern int zfile_is_ignore_ext (const TCHAR *name); -extern struct zvolume *zvolume_alloc(struct zfile *z, unsigned int id, void *handle, const TCHAR*); -extern struct zvolume *zvolume_alloc_empty(struct zvolume *zv, const TCHAR *name); +extern struct zvolume *zvolume_alloc (struct zfile *z, unsigned int id, void *handle, const TCHAR*); +extern struct zvolume *zvolume_alloc_empty (struct zvolume *zv, const TCHAR *name); -extern struct znode *zvolume_addfile_abs(struct zvolume *zv, struct zarchive_info*); -extern struct znode *zvolume_adddir_abs(struct zvolume *zv, struct zarchive_info *zai); -extern struct znode *znode_adddir(struct znode *parent, const TCHAR *name, struct zarchive_info*); +extern struct znode *zvolume_addfile_abs (struct zvolume *zv, struct zarchive_info*); +extern struct znode *zvolume_adddir_abs (struct zvolume *zv, struct zarchive_info *zai); +extern struct znode *znode_adddir (struct znode *parent, const TCHAR *name, struct zarchive_info*); -extern struct zvolume *archive_directory_plain(struct zfile *zf); +extern struct zvolume *archive_directory_plain (struct zfile *zf); extern struct zvolume *archive_directory_lha(struct zfile *zf); extern struct zfile *archive_access_lha (struct znode *zn); extern struct zvolume *archive_directory_zip(struct zfile *zf); extern struct zvolume *archive_directory_7z (struct zfile *z); +extern struct zfile *archive_access_7z (struct znode *zn); +extern struct zvolume *archive_directory_rar (struct zfile *z); +extern struct zfile *archive_access_rar (struct znode *zn); extern struct zvolume *archive_directory_lzx (struct zfile *in_file); extern struct zfile *archive_access_lzx (struct znode *zn); +extern struct zvolume *archive_directory_arcacc (struct zfile *z, unsigned int id); +extern struct zfile *archive_access_arcacc (struct znode *zn); extern struct zvolume *archive_directory_adf (struct znode *zn, struct zfile *z); +extern struct zvolume *archive_directory_rdb (struct zfile *z); +extern struct zvolume *archive_directory_fat (struct zfile *z); +extern struct zvolume *archive_directory_tar (struct zfile *zf); +extern struct zfile *archive_access_tar (struct znode *zn); extern struct zfile *archive_access_select (struct znode *parent, struct zfile *zf, unsigned int id, int doselect, int *retcode, int index); +extern struct zfile *archive_access_arcacc_select (struct zfile *zf, unsigned int id, int *retcode); +extern int isfat (uae_u8*); extern void archive_access_scan (struct zfile *zf, zfile_callback zc, void *user, unsigned int id); @@ -114,4 +140,4 @@ extern void archive_access_close (void *handle, unsigned int id); extern struct zfile *archive_getzfile (struct znode *zn, unsigned int id, int flags); extern struct zfile *archive_unpackzfile (struct zfile *zf); -extern struct zfile *decompress_zfd (struct zfile*); \ No newline at end of file +extern struct zfile *decompress_zfd (struct zfile*); diff --git a/src/include/zfile.h b/src/include/zfile.h index dcc785cb..e2880329 100644 --- a/src/include/zfile.h +++ b/src/include/zfile.h @@ -38,6 +38,7 @@ extern struct zfile *zfile_fopen (const TCHAR *, const TCHAR *, int mask, int in extern struct zfile *zfile_fopen_empty (struct zfile*, const TCHAR *name, uae_u64 size); extern struct zfile *zfile_fopen_empty (struct zfile*, const TCHAR *name); extern struct zfile *zfile_fopen_data (const TCHAR *name, uae_u64 size, const uae_u8 *data); +extern struct zfile *zfile_fopen_load_zfile (struct zfile *f); extern uae_u8 *zfile_load_data (const TCHAR *name, const uae_u8 *data,int datalen, int *outlen); extern struct zfile *zfile_fopen_parent (struct zfile*, const TCHAR*, uae_u64 offset, uae_u64 size); @@ -47,10 +48,10 @@ extern uae_s64 zfile_fseek (struct zfile *z, uae_s64 offset, int mode); extern uae_s64 zfile_ftell (struct zfile *z); extern uae_s64 zfile_size (struct zfile *z); extern size_t zfile_fread (void *b, size_t l1, size_t l2, struct zfile *z); -extern size_t zfile_fwrite (void *b, size_t l1, size_t l2, struct zfile *z); +extern size_t zfile_fwrite (const void *b, size_t l1, size_t l2, struct zfile *z); extern TCHAR *zfile_fgets (TCHAR *s, int size, struct zfile *z); extern char *zfile_fgetsa (char *s, int size, struct zfile *z); -extern size_t zfile_fputs (struct zfile *z, TCHAR *s); +extern size_t zfile_fputs (struct zfile *z, const TCHAR *s); extern int zfile_getc (struct zfile *z); extern int zfile_putc (int c, struct zfile *z); extern int zfile_ferror (struct zfile *z); @@ -71,6 +72,8 @@ extern int zfile_is_diskimage (const TCHAR *name); extern int iszip (struct zfile *z); extern int zfile_convertimage (const TCHAR *src, const TCHAR *dst); extern struct zfile *zuncompress (struct znode*, struct zfile *z, int dodefault, int mask, int *retcode, int index); +extern void zfile_seterror (const TCHAR *format, ...); +extern TCHAR *zfile_geterror (void); extern int zfile_truncate (struct zfile *z, uae_s64 size); #define ZFD_NONE 0 @@ -107,9 +110,10 @@ extern const TCHAR *uae_diskimageextensions[]; extern struct zvolume *zfile_fopen_archive(const TCHAR *filename); extern struct zvolume *zfile_fopen_archive (const TCHAR *filename, int flags); +extern struct zvolume *zfile_fopen_archive_root (const TCHAR *filename, int flags); extern void zfile_fclose_archive(struct zvolume *zv); extern int zfile_fs_usage_archive(const TCHAR *path, const TCHAR *disk, struct fs_usage *fsp); -extern int zfile_stat_archive(const TCHAR *path, struct _stat64 *statbuf); +extern int zfile_stat_archive (const TCHAR *path, struct mystat *statbuf); extern struct zdirectory *zfile_opendir_archive (const TCHAR *path); extern struct zdirectory *zfile_opendir_archive (const TCHAR *path, int flags); extern void zfile_closedir_archive(struct zdirectory*); @@ -123,4 +127,19 @@ extern unsigned int zfile_read_archive (struct zfile *d, void *b, unsigned int s extern void zfile_close_archive (struct zfile *d); extern struct zfile *zfile_open_archive (const TCHAR *path, int flags); extern int zfile_exists_archive(const TCHAR *path, const TCHAR *rel); -extern bool zfile_needwrite (struct zfile*); \ No newline at end of file +extern bool zfile_needwrite (struct zfile*); + +struct mytimeval +{ + uae_s64 tv_sec; + uae_s32 tv_usec; +}; + +struct mystat +{ + uae_s64 size; + uae_u32 mode; + struct mytimeval mtime; +}; +extern void timeval_to_amiga (struct mytimeval *tv, int* days, int* mins, int* ticks); +extern void amiga_to_timeval (struct mytimeval *tv, int days, int mins, int ticks); \ No newline at end of file diff --git a/src/inputdevice.cpp b/src/inputdevice.cpp index 2e561f71..2ac68ebc 100644 --- a/src/inputdevice.cpp +++ b/src/inputdevice.cpp @@ -3,7 +3,7 @@ * * joystick/mouse emulation * -* Copyright 2001-2010 Toni Wilen +* Copyright 2001-2012 Toni Wilen * * new fetures: * - very configurable (and very complex to configure :) @@ -29,19 +29,25 @@ #include "xwin.h" #include "drawing.h" #include "uae.h" -#include "joystick.h" #include "picasso96.h" #include "gui.h" #include "savestate.h" -extern int bootrom_header; - // 01 = host events // 02 = joystick // 04 = cia buttons // 16 = potgo // 32 = vsync +#define ID_FLAG_CANRELEASE 0x1000 +#define ID_FLAG_TOGGLED 0x2000 +#define ID_FLAG_CUSTOMEVENT_TOGGLED1 0x4000 +#define ID_FLAG_CUSTOMEVENT_TOGGLED2 0x8000 + +#define ID_FLAG_SAVE_MASK_CONFIG 0x000000ff +#define ID_FLAG_SAVE_MASK_QUALIFIERS ID_FLAG_QUALIFIER_MASK +#define ID_FLAG_SAVE_MASK_FULL (ID_FLAG_SAVE_MASK_CONFIG | ID_FLAG_SAVE_MASK_QUALIFIERS) + #define IE_INVERT 0x80 #define IE_CDTV 0x100 @@ -63,7 +69,7 @@ extern int bootrom_header; #define AM_K (AM_KEY|AM_JOY_BUT|AM_MOUSE_BUT|AM_AF) /* generic button/switch */ #define AM_KK (AM_KEY|AM_JOY_BUT|AM_MOUSE_BUT) -#define DEFEVENT(A, B, C, D, E, F) {#A, B, C, D, E, F }, +#define DEFEVENT(A, B, C, D, E, F) {_T(#A), B, C, D, E, F }, static struct inputevent events[] = { {0, 0, AM_K,0,0,0}, #include "inputevents.def" @@ -84,7 +90,8 @@ struct uae_input_device2 { static struct uae_input_device2 joysticks2[MAX_INPUT_DEVICES]; static struct uae_input_device2 mice2[MAX_INPUT_DEVICES]; static uae_u8 scancodeused[MAX_INPUT_DEVICES][256]; -static int qualifiers; +static uae_u64 qualifiers, qualifiers_r; +static uae_s16 *qualifiers_evt[MAX_INPUT_QUALIFIERS]; static int joymodes[MAX_JPORTS]; static int *joyinputs[MAX_JPORTS]; @@ -97,7 +104,7 @@ static int handle_input_event (int nr, int state, int max, int autofire); static int handle_input_event (int nr, int state, int max, int autofire, bool canstoprecord, bool playbackevent); #endif -static struct inputdevice_functions idev[3]; +static struct inputdevice_functions idev[IDTYPE_MAX]; static int isdevice (struct uae_input_device *id) { @@ -111,6 +118,23 @@ static int isdevice (struct uae_input_device *id) return 0; } +int inputdevice_uaelib (const TCHAR *s, const TCHAR *parm) +{ + int i; + + for (i = 1; events[i].name; i++) { + if (!_tcscmp (s, events[i].confname)) { +#ifdef INPUTDEVICE_SIMPLE + handle_input_event (i, _tstol (parm), 1, 0); +#else + handle_input_event (i, _tstol (parm), 1, 0, false, false); +#endif + return 1; + } + } + return 0; +} + static struct uae_input_device *joysticks; static struct uae_input_device *mice; static struct uae_input_device *keyboards; @@ -230,6 +254,8 @@ static void freejport (struct uae_prefs *dst, int num) } static void copyjport (const struct uae_prefs *src, struct uae_prefs *dst, int num) { + if (!src) + return; freejport (dst, num); _tcscpy (dst->jports[num].configname, src->jports[num].configname); _tcscpy (dst->jports[num].name, src->jports[num].name); @@ -240,7 +266,7 @@ static void copyjport (const struct uae_prefs *src, struct uae_prefs *dst, int n static bool write_config_head (struct zfile *f, int idnum, int devnum, TCHAR *name, struct uae_input_device *id, struct inputdevice_functions *idf) { - TCHAR tmp2[MAX_DPATH]; + TCHAR tmp2[CONFIG_BLEN]; if (idnum == GAMEPORT_INPUT_SETTINGS) { if (!isdevice (id)) @@ -294,7 +320,11 @@ static bool write_config_head (struct zfile *f, int idnum, int devnum, TCHAR *na static bool write_slot (TCHAR *p, struct uae_input_device *uid, int i, int j) { bool ok = false; - int flags = uid->flags[i][j]; + if (i < 0 || j < 0) { + _tcscpy (p, _T("NULL")); + return false; + } + uae_u64 flags = uid->flags[i][j]; if (uid->custom[i][j] && _tcslen (uid->custom[i][j]) > 0) { _stprintf (p, _T("'%s'.%d"), uid->custom[i][j], flags & ID_FLAG_SAVE_MASK_CONFIG); ok = true; @@ -307,9 +337,12 @@ static bool write_slot (TCHAR *p, struct uae_input_device *uid, int i, int j) if (ok && (flags & ID_FLAG_SAVE_MASK_QUALIFIERS)) { TCHAR *p2 = p + _tcslen (p); *p2++ = '.'; - for (int i = 0; i < MAX_INPUT_QUALIFIERS; i++) { + for (int i = 0; i < MAX_INPUT_QUALIFIERS * 2; i++) { if ((ID_FLAG_QUALIFIER1 << i) & flags) { - _stprintf (p2, _T("%c"), 'A' + i); + if (i & 1) + _stprintf (p2, _T("%c"), 'a' + i / 2); + else + _stprintf (p2, _T("%c"), 'A' + i / 2); p2++; } } @@ -329,7 +362,7 @@ static void kbrlabel (TCHAR *s) static void write_config2 (struct zfile *f, int idnum, int i, int offset, const TCHAR *extra, struct uae_input_device *id) { - TCHAR tmp2[200], tmp3[200], *p; + TCHAR tmp2[CONFIG_BLEN], tmp3[CONFIG_BLEN], *p; int evt, got, j, k; TCHAR *custom; const int *slotorder; @@ -340,7 +373,7 @@ static void write_config2 (struct zfile *f, int idnum, int i, int offset, const got = 0; slotorder = slotorder1; - // if gameports non-custom mapping in slot0 -> save slot4 as slot0 + // if gameports non-custom mapping in slot0 -> save slot8 as slot0 if (id->port[io][0] && !(id->flags[io][0] & ID_FLAG_GAMEPORTSCUSTOM_MASK)) slotorder = slotorder2; @@ -350,16 +383,12 @@ static void write_config2 (struct zfile *f, int idnum, int i, int offset, const custom = id->custom[io][slotorder[j]]; if (custom == NULL && evt <= 0) { for (k = j + 1; k < MAX_INPUT_SUB_EVENT; k++) { - if (id->eventid[io][slotorder[k]] > 0 || id->custom[io][slotorder[k]] != NULL) + if ((id->port[io][k] == 0 || id->port[io][k] == MAX_JPORTS + 1) && (id->eventid[io][slotorder[k]] > 0 || id->custom[io][slotorder[k]] != NULL)) break; } if (k == MAX_INPUT_SUB_EVENT) break; } - if (id->port[io][0] > 0) { - if (!(id->flags[io][0] & ID_FLAG_GAMEPORTSCUSTOM_MASK) && id->port[io][SPARE_SUB_EVENT] == 0) - break; - } if (p > tmp2) { *p++ = ','; @@ -368,8 +397,9 @@ static void write_config2 (struct zfile *f, int idnum, int i, int offset, const bool ok = write_slot (p, id, io, slotorder[j]); p += _tcslen (p); if (ok) { - if (id->port[io][slotorder[j]] > 0) { - _stprintf (p, _T(".%d"), id->port[io][slotorder[j]] - 1); + if (id->port[io][slotorder[j]] > 0 && id->port[io][slotorder[j]] < MAX_JPORTS + 1) { + int pnum = id->port[io][slotorder[j]] - 1; + _stprintf (p, _T(".%d"), pnum); p += _tcslen (p); if (idnum != GAMEPORT_INPUT_SETTINGS && j == 0 && id->port[io][SPARE_SUB_EVENT] && slotorder == slotorder1) { *p++ = '.'; @@ -387,7 +417,7 @@ static void write_config2 (struct zfile *f, int idnum, int i, int offset, const static void write_kbr_config (struct zfile *f, int idnum, int devnum, struct uae_input_device *kbr, struct inputdevice_functions *idf) { - TCHAR tmp1[200], tmp2[200], tmp3[200], tmp4[200], tmp5[200], *p; + TCHAR tmp1[CONFIG_BLEN], tmp2[CONFIG_BLEN], tmp3[CONFIG_BLEN], tmp4[CONFIG_BLEN], tmp5[CONFIG_BLEN], *p; int i, j, k, evt, skip; const int *slotorder; @@ -478,7 +508,7 @@ static void write_kbr_config (struct zfile *f, int idnum, int devnum, struct uae } } -static void write_config (struct zfile *f, int idnum, int devnum, TCHAR *name, struct uae_input_device *id, struct uae_input_device2 *id2, struct inputdevice_functions *idf) +static void write_config (struct zfile *f, int idnum, int devnum, TCHAR *name, struct uae_input_device *id, struct inputdevice_functions *idf) { TCHAR tmp1[MAX_DPATH]; int i; @@ -517,21 +547,31 @@ void write_inputdevice_config (struct uae_prefs *p, struct zfile *f) cfgfile_dwrite_str (f, tmp, p->input_config_name[id]); } for (i = 0; i < MAX_INPUT_DEVICES; i++) - write_config (f, id, i, _T("joystick"), &p->joystick_settings[id][i], &joysticks2[i], &idev[IDTYPE_JOYSTICK]); + write_config (f, id, i, _T("joystick"), &p->joystick_settings[id][i], &idev[IDTYPE_JOYSTICK]); for (i = 0; i < MAX_INPUT_DEVICES; i++) - write_config (f, id, i, _T("mouse"), &p->mouse_settings[id][i], &mice2[i], &idev[IDTYPE_MOUSE]); + write_config (f, id, i, _T("mouse"), &p->mouse_settings[id][i], &idev[IDTYPE_MOUSE]); for (i = 0; i < MAX_INPUT_DEVICES; i++) write_kbr_config (f, id, i, &p->keyboard_settings[id][i], &idev[IDTYPE_KEYBOARD]); } } -static int getqual (const TCHAR **pp) +static uae_u64 getqual (const TCHAR **pp) { const TCHAR *p = *pp; - int mask = 0; + uae_u64 mask = 0; - while (*p >= 'A' && *p <= 'Z') { - mask |= ID_FLAG_QUALIFIER1 << (*p - 'A'); + while ((*p >= 'A' && *p <= 'Z') || (*p >= 'a' && *p <= 'z')) { + bool press = (*p >= 'A' && *p <= 'Z'); + int shift, inc; + + if (press) { + shift = *p - 'A'; + inc = 0; + } else { + shift = *p - 'a'; + inc = 1; + } + mask |= ID_FLAG_QUALIFIER1 << (shift * 2 + inc); p++; } while (*p != 0 && *p !='.' && *p != ',') @@ -564,14 +604,25 @@ static int getnum (const TCHAR **pp) static TCHAR *getstring (const TCHAR **pp) { int i; - static TCHAR str[1000]; + static TCHAR str[CONFIG_BLEN]; const TCHAR *p = *pp; + bool quoteds = false; + bool quotedd = false; if (*p == 0) return 0; i = 0; - while (*p != 0 && *p !='.' && *p != ',' && i < 1000 - 1) + while (*p != 0 && i < 1000 - 1) { + if (*p == '\"') + quotedd = quotedd ? false : true; + if (*p == '\'') + quoteds = quoteds ? false : true; + if (!quotedd && !quoteds) { + if (*p == '.' || *p == ',') + break; + } str[i++] = *p++; + } if (*p == '.' || *p == ',') p++; str[i] = 0; @@ -690,7 +741,7 @@ static void inputdevice_default_kb_all (struct uae_prefs *p) inputdevice_default_kb (p, i); } -static bool read_slot (TCHAR *parm, int num, int joystick, int button, struct uae_input_device *id, int keynum, int subnum, struct inputevent *ie, int flags, int port, TCHAR *custom) +static bool read_slot (TCHAR *parm, int num, int joystick, int button, struct uae_input_device *id, int keynum, int subnum, struct inputevent *ie, uae_u64 flags, int port, TCHAR *custom) { int mask; @@ -923,7 +974,8 @@ void read_inputdevice_config (struct uae_prefs *pr, const TCHAR *option, TCHAR * custom = NULL; for (subnum = 0; subnum < MAX_INPUT_SUB_EVENT; subnum++) { - int flags, port; + uae_u64 flags; + int port; xfree (custom); custom = NULL; p2 = getstring (&p); @@ -935,7 +987,7 @@ void read_inputdevice_config (struct uae_prefs *pr, const TCHAR *option, TCHAR * if (p[-1] == '.') flags = getnum (&p) & ID_FLAG_SAVE_MASK_CONFIG; if (p[-1] == '.') { - if (p[0] >= 'A' && p[0] <= 'Z') + if ((p[0] >= 'A' && p[0] <= 'Z') || (p[0] >= 'a' && p[0] <= 'z')) flags |= getqual (&p); if (p[-1] == '.') port = getnum (&p) + 1; @@ -948,7 +1000,7 @@ void read_inputdevice_config (struct uae_prefs *pr, const TCHAR *option, TCHAR * int flags2 = 0; if (p[-1] == '.') flags2 = getnum (&p) & ID_FLAG_SAVE_MASK_CONFIG; - if (p[-1] == '.' && p[0] >= 'A' && p[0] <= 'Z') + if (p[-1] == '.' && (p[0] >= 'A' && p[0] <= 'Z') || (p[0] >= 'a' && p[0] <= 'z')) flags |= getqual (&p); TCHAR *custom2 = NULL; struct inputevent *ie2 = readevent (p2, &custom2); @@ -1014,43 +1066,39 @@ int inputdevice_is_tablet (void) return 0; } -static int getmhoffset (void) -{ - if (!uae_boot_rom) - return 0; - return get_long (rtarea_base + bootrom_header + 7 * 4) + bootrom_header; -} +static uaecptr mousehack_address; +static bool mousehack_enabled; static void mousehack_reset (void) { - int off; - mouseoffset_x = mouseoffset_y = 0; mousehack_alive_cnt = 0; tablet_data = 0; - off = getmhoffset (); - if (off) - rtarea[off + MH_E] = 0; + if (mousehack_address) + put_byte (mousehack_address + MH_E, 0); + mousehack_address = 0; + mousehack_enabled = false; } -static void mousehack_enable (void) +static bool mousehack_enable (void) { - int off, mode; + int mode; if (!uae_boot_rom || currprefs.input_tablet == TABLET_OFF) - return; - off = getmhoffset (); - if (rtarea[off + MH_E]) - return; + return false; + if (mousehack_address && mousehack_enabled) + return true; mode = 0x80; if (currprefs.input_tablet == TABLET_MOUSEHACK) mode |= 1; if (inputdevice_is_tablet () > 0) mode |= 2; -#ifndef INPUTDEVICE_SIMPLE - write_log (_T("Mouse driver enabled (%s)\n"), ((mode & 3) == 3 ? _T("tablet+mousehack") : ((mode & 3) == 2) ? _T("tablet") : _T("mousehack"))); -#endif - rtarea[off + MH_E] = 0x80; + if (mousehack_address) { + write_log (_T("Mouse driver enabled (%s)\n"), ((mode & 3) == 3 ? _T("tablet+mousehack") : ((mode & 3) == 2) ? _T("tablet") : _T("mousehack"))); + put_byte (mousehack_address + MH_E, mode); + mousehack_enabled = true; + } + return true; } void input_mousehack_mouseoffset (uaecptr pointerprefs) @@ -1059,65 +1107,77 @@ void input_mousehack_mouseoffset (uaecptr pointerprefs) mouseoffset_y = (uae_s16)get_word (pointerprefs + 30); } -void input_mousehack_status (int mode, uaecptr diminfo, uaecptr dispinfo, uaecptr vp, uae_u32 moffset) +int input_mousehack_status (int mode, uaecptr diminfo, uaecptr dispinfo, uaecptr vp, uae_u32 moffset) { - if (mode == 0) { - uae_u8 v = rtarea[getmhoffset ()]; - v |= 0x40; - rtarea[getmhoffset ()] = v; - write_log (_T("Tablet driver running (%02x)\n"), v); + if (mode == 4) { + return mousehack_enable () ? 1 : 0; + } else if (mode == 5) { + mousehack_address = m68k_dreg (regs, 0); + mousehack_enable (); + } else if (mode == 0) { + if (mousehack_address) { + uae_u8 v = get_byte (mousehack_address + MH_E); + v |= 0x40; + put_byte (mousehack_address + MH_E, v); + write_log (_T("Tablet driver running (%08x,%02x)\n"), mousehack_address, v); + } } else if (mode == 2) { if (mousehack_alive_cnt == 0) mousehack_alive_cnt = -100; else if (mousehack_alive_cnt > 0) mousehack_alive_cnt = 100; } + return 1; } void inputdevice_tablet_strobe (void) { - uae_u8 *p; - uae_u32 off; - mousehack_enable (); if (!uae_boot_rom) return; if (!tablet_data) return; - off = getmhoffset (); - p = rtarea + off; - p[MH_CNT]++; + if (mousehack_address) + put_byte (mousehack_address + MH_CNT, get_byte (mousehack_address + MH_CNT) + 1); } -static void inputdevice_mh_abs (int x, int y) +static void inputdevice_mh_abs (int x, int y, uae_u32 buttonbits) { uae_u8 *p; - uae_u8 tmp[4]; - uae_u32 off; + uae_u8 tmp1[4], tmp2[4]; mousehack_enable (); - off = getmhoffset (); - p = rtarea + off; + if (!mousehack_address) + return; + p = get_real_address (mousehack_address); - memcpy (tmp, p + MH_ABSX, sizeof tmp); + memcpy (tmp1, p + MH_ABSX, sizeof tmp1); + memcpy (tmp2, p + MH_BUTTONBITS, sizeof tmp2); x -= mouseoffset_x + 1; y -= mouseoffset_y + 2; + //write_log (_T("%dx%d %08x\n"), x, y, buttonbits); + p[MH_ABSX] = x >> 8; p[MH_ABSX + 1] = x; p[MH_ABSY] = y >> 8; p[MH_ABSY + 1] = y; - if (!memcmp (tmp, p + MH_ABSX, sizeof tmp)) + p[MH_BUTTONBITS + 0] = buttonbits >> 24; + p[MH_BUTTONBITS + 1] = buttonbits >> 16; + p[MH_BUTTONBITS + 2] = buttonbits >> 8; + p[MH_BUTTONBITS + 3] = buttonbits >> 0; + + if (!memcmp (tmp1, p + MH_ABSX, sizeof tmp1) && !memcmp (tmp2, p + MH_BUTTONBITS, sizeof tmp2)) return; - rtarea[off + MH_E] = 0xc0 | 1; + p[MH_E] = 0xc0 | 1; p[MH_CNT]++; tablet_data = 1; } -static void mousehack_helper (void) +static void mousehack_helper (uae_u32 buttonmask) { int x, y; @@ -1136,7 +1196,7 @@ static void mousehack_helper (void) x = coord_native_to_amiga_x (x); y = coord_native_to_amiga_y (y) << 1; } - inputdevice_mh_abs (x, y); + inputdevice_mh_abs (x, y, buttonmask); } STATIC_INLINE int getbuttonstate (int joy, int button) @@ -1169,7 +1229,9 @@ STATIC_INLINE int getvelocity (int num, int subnum, int pct) return v; } -static void mouseupdate (int pct, int vsync) +#define MOUSEXY_MAX 16384 + +static void mouseupdate (int pct, bool vsync) { int v, i; int max = 120; @@ -1187,10 +1249,26 @@ static void mouseupdate (int pct, int vsync) v = getvelocity (i, 0, pct); mxd += v; mouse_x[i] += v; + if (mouse_x[i] < 0) { + mouse_x[i] += MOUSEXY_MAX; + mouse_frame_x[i] = mouse_x[i] - v; + } + if (mouse_x[i] >= MOUSEXY_MAX) { + mouse_x[i] -= MOUSEXY_MAX; + mouse_frame_x[i] = mouse_x[i] - v; + } v = getvelocity (i, 1, pct); myd += v; mouse_y[i] += v; + if (mouse_y[i] < 0) { + mouse_y[i] += MOUSEXY_MAX; + mouse_frame_y[i] = mouse_y[i] - v; + } + if (mouse_y[i] >= MOUSEXY_MAX) { + mouse_y[i] -= MOUSEXY_MAX; + mouse_frame_y[i] = mouse_y[i] - v; + } #ifndef INPUTDEVICE_SIMPLE v = getvelocity (i, 2, pct); @@ -1202,10 +1280,14 @@ static void mouseupdate (int pct, int vsync) if (!mouse_deltanoreset[i][2]) mouse_delta[i][2] = 0; - if (mouse_frame_x[i] - mouse_x[i] > max) + if (mouse_frame_x[i] - mouse_x[i] > max) { mouse_x[i] = mouse_frame_x[i] - max; - if (mouse_frame_x[i] - mouse_x[i] < -max) + mouse_x[i] &= MOUSEXY_MAX - 1; + } + if (mouse_frame_x[i] - mouse_x[i] < -max) { mouse_x[i] = mouse_frame_x[i] + max; + mouse_x[i] &= MOUSEXY_MAX - 1; + } if (mouse_frame_y[i] - mouse_y[i] > max) mouse_y[i] = mouse_frame_y[i] - max; @@ -1232,9 +1314,9 @@ STATIC_INLINE void readinput (void) diff = totalvpos - input_vpos; if (diff > 0) { if (diff < 10) { - mouseupdate (0, 0); + mouseupdate (0, false); } else { - mouseupdate (diff * 1000 / current_maxvpos (), 0); + mouseupdate (diff * 1000 / current_maxvpos (), false); } } input_vpos = totalvpos; @@ -1277,6 +1359,11 @@ static void joymousecounter (int joy) else if (cnty == 0 && ocnty == 3) mouse_y[joy] += 4; mouse_y[joy] = (mouse_y[joy] & 0xfc) | cnty; + + if (!left || !right || !top || !bot) { + mouse_frame_x[joy] = mouse_x[joy]; + mouse_frame_y[joy] = mouse_y[joy]; + } } STATIC_INLINE uae_u16 getjoystate (int joy) @@ -1715,7 +1802,7 @@ STATIC_INLINE int check_input_queue (int evt) int i; for (i = 0; i < INPUT_QUEUE_SIZE; i++) { iq = &input_queue[i]; - if (iq->evt == evt) + if (iq->evt == evt && iq->linecnt >= 0) return i; } return -1; @@ -1728,8 +1815,11 @@ static void queue_input_event (int evt, const TCHAR *custom, int state, int max, #endif { struct input_queue_struct *iq; - int idx = check_input_queue (evt); + int idx; + if (!evt) + return; + idx = check_input_queue (evt); if (state < 0 && idx >= 0) { iq = &input_queue[idx]; iq->nextlinecnt = -1; @@ -1760,7 +1850,7 @@ static void queue_input_event (int evt, const TCHAR *custom, int state, int max, iq->evt = evt; iq->state = iq->storedstate = state; iq->max = max; - iq->linecnt = linecnt; + iq->linecnt = linecnt < 0 ? maxvpos + maxvpos / 2 : linecnt; #ifdef INPUTDEVICE_SIMPLE iq->nextlinecnt = linecnt; #else @@ -1796,7 +1886,7 @@ void inputdevice_handle_inputcode (void) int state = inputcode_pending_state; if (code == 0) - goto end; + return; inputcode_pending = 0; @@ -1806,25 +1896,33 @@ void inputdevice_handle_inputcode (void) { case AKS_ENTERGUI: gui_display (-1); + setsystime (); break; case AKS_QUIT: uae_quit (); break; case AKS_SOFTRESET: - uae_reset (0); + uae_reset (0, 0); break; case AKS_HARDRESET: - uae_reset (1); + uae_reset (1, 1); break; } -end:; } -STATIC_INLINE int isqual (int evt) +STATIC_INLINE int getqualid (int evt) { if (evt > INPUTEVENT_SPC_QUALIFIER_START && evt < INPUTEVENT_SPC_QUALIFIER_END) - return ID_FLAG_QUALIFIER1 << (evt - INPUTEVENT_SPC_QUALIFIER1); - return 0; + return evt - INPUTEVENT_SPC_QUALIFIER1; + return -1; +} + +STATIC_INLINE uae_u64 isqual (int evt) +{ + int num = getqualid (evt); + if (num < 0) + return 0; + return ID_FLAG_QUALIFIER1 << (num * 2); } #ifdef INPUTDEVICE_SIMPLE @@ -1839,10 +1937,17 @@ static int handle_input_event (int nr, int state, int max, int autofire, bool ca if (nr <= 0 || nr == INPUTEVENT_SPC_CUSTOM_EVENT) return 0; + +#ifdef _WIN32 + // ignore norrmal GUI event if forced gui key is in use + if (currprefs.win32_guikey >= 0 && nr == INPUTEVENT_SPC_ENTERGUI) + return 0; +#endif + ie = &events[nr]; if (isqual (nr)) return 0; // qualifiers do nothing - if (ie->unit == 0 && ie->data >= 0x200) { + if (ie->unit == 0 && ie->data >= AKS_FIRST) { isaks = true; if (!state) // release AKS_ does nothing return 0; @@ -2055,14 +2160,14 @@ static void inputdevice_checkconfig (void) currprefs.input_autofire_linecnt = changed_prefs.input_autofire_linecnt; currprefs.input_mouse_speed = changed_prefs.input_mouse_speed; - inputdevice_updateconfig (&currprefs); + inputdevice_updateconfig (&changed_prefs, &currprefs); } } void inputdevice_vsync (void) { input_frame++; - mouseupdate (0, 1); + mouseupdate (0, true); inputdevice_read (); inputdelay = uaerand () % (maxvpos <= 1 ? 1 : maxvpos - 1); @@ -2085,6 +2190,7 @@ void inputdevice_reset (void) mousehack_reset (); if (inputdevice_is_tablet ()) mousehack_enable (); + potgo_value = 0; } static int getoldport (struct uae_input_device *id) @@ -2222,39 +2328,83 @@ static int switchdevice (struct uae_input_device *id, int num, bool buttonmode) return 0; } -int input_getqualifiers (void) +uae_u64 input_getqualifiers (void) { return qualifiers; } -static bool checkqualifiers (int evt, int flags, int qualmask) +static bool checkqualifiers (int evt, uae_u64 flags, uae_u64 *qualmask, uae_s16 events[MAX_INPUT_SUB_EVENT_ALL]) { + int i, j; + int qualid = getqualid (evt); + int nomatch = 0; + bool isspecial = (qualifiers & (ID_FLAG_QUALIFIER_SPECIAL | ID_FLAG_QUALIFIER_SPECIAL_R)) != 0; + flags &= ID_FLAG_QUALIFIER_MASK; + if (qualid >= 0 && events) + qualifiers_evt[qualid] = events; /* special set and new qualifier pressed? do not sent it to Amiga-side */ - if ((qualifiers & ID_FLAG_QUALIFIER_SPECIAL) && isqual (evt)) + if ((qualifiers & (ID_FLAG_QUALIFIER_SPECIAL | ID_FLAG_QUALIFIER_SPECIAL_R)) && qualid >= 0) return false; - if (!qualmask) // no qualifiers in any slot - return true; - if (flags == qualifiers || (flags && flags == (qualifiers & ~ID_FLAG_QUALIFIER_SPECIAL))) - return true; - return false; + + for (i = 0; i < MAX_INPUT_SUB_EVENT; i++) { + if (qualmask[i]) + break; + } + if (i == MAX_INPUT_SUB_EVENT) { + // no qualifiers in any slot and no special = always match + return isspecial == false; + } + + for (i = 0; i < MAX_INPUT_SUB_EVENT; i++) { + for (j = 0; j < MAX_INPUT_QUALIFIERS; j++) { + uae_u64 mask = (ID_FLAG_QUALIFIER1 | ID_FLAG_QUALIFIER1_R) << (j * 2); + bool isqualmask = (qualmask[i] & mask) != 0; + bool isqual = (qualifiers & mask) != 0; + if (isqualmask != isqual) { + nomatch++; + break; + } + } + } + if (nomatch == MAX_INPUT_SUB_EVENT) { + // no matched qualifiers in any slot + // allow all slots without qualifiers + // special = never accept + if (isspecial) + return false; + return flags ? false : true; + } + + for (i = 0; i < MAX_INPUT_QUALIFIERS; i++) { + uae_u64 mask = (ID_FLAG_QUALIFIER1 | ID_FLAG_QUALIFIER1_R) << (i * 2); + bool isflags = (flags & mask) != 0; + bool isqual = (qualifiers & mask) != 0; + if (isflags != isqual) + return false; + } + return true; } + static void setqualifiers (int evt, int state) { - int mask = isqual (evt); + uae_u64 mask = isqual (evt); if (!mask) return; if (state) qualifiers |= mask; else qualifiers &= ~mask; + //write_log (_T("%llx\n"), qualifiers); } -static int getqualmask (struct uae_input_device *id, int num, bool *qualonly) + +static uae_u64 getqualmask (uae_u64 *qualmask, struct uae_input_device *id, int num, bool *qualonly) { - int mask = 0, mask2 = 0; + uae_u64 mask = 0, mask2 = 0; for (int i = 0; i < MAX_INPUT_SUB_EVENT; i++) { int evt = id->eventid[num][i]; mask |= id->flags[num][i]; + qualmask[i] = id->flags[num][i] & ID_FLAG_QUALIFIER_MASK; mask2 |= isqual (evt); } mask &= ID_FLAG_QUALIFIER_MASK; @@ -2266,60 +2416,109 @@ static int getqualmask (struct uae_input_device *id, int num, bool *qualonly) return mask; } -static void process_custom_event (struct uae_input_device *id, int offset, int state, int qualmask, int autofire) +#ifndef INPUTDEVICE_SIMPLE +static bool process_custom_event (struct uae_input_device *id, int offset, int state, uae_u64 *qualmask, int autofire, int sub) { - int idx, slotoffset, flags, custompos; + int idx, slotoffset, custompos; + TCHAR *custom; + uae_u64 flags, qual; -#ifdef INPUTDEVICE_SIMPLE - queue_input_event (-1, -1, 0, 0); -#else - queue_input_event (-1, NULL, -1, 0, 0, 1); -#endif if (!id) - return; + return false; + + slotoffset = sub & ~3; + sub &= 3; + flags = id->flags[offset][slotoffset]; + qual = flags & ID_FLAG_QUALIFIER_MASK; + custom = id->custom[offset][slotoffset]; + int af = flags & ID_FLAG_AUTOFIRE_MASK; + + for (idx = 1; idx < 4; idx++) { + uae_u64 flags2 = id->flags[offset][slotoffset + idx]; + TCHAR *custom2 = id->custom[offset][slotoffset + idx]; + + // all slots must have same qualifier + if ((flags2 & ID_FLAG_QUALIFIER_MASK) != qual) + break; + // no slot must have autofire + if ((flags2 & ID_FLAG_AUTOFIRE_MASK) || (flags & ID_FLAG_AUTOFIRE_MASK)) + break; + } + // at least slot 0 and 2 must have custom + if (custom == NULL || id->custom[offset][slotoffset + 2] == NULL) + idx = -1; + + if (idx < 4) { + id->flags[offset][slotoffset] &= ~(ID_FLAG_CUSTOMEVENT_TOGGLED1 | ID_FLAG_CUSTOMEVENT_TOGGLED2); + int evt2 = id->eventid[offset][slotoffset + sub]; + uae_u64 flags2 = id->flags[offset][slotoffset + sub]; + if (checkqualifiers (evt2, flags2, qualmask, NULL)) { + custom = id->custom[offset][slotoffset + sub]; + if (state && custom) { + if (autofire) + queue_input_event (-1, custom, 1, 1, currprefs.input_autofire_linecnt, 1); + handle_custom_event (custom); + return true; + } + } + return false; + } + + if (sub != 0) + return false; slotoffset = 0; - if (!checkqualifiers (id->eventid[offset][slotoffset], id->flags[offset][slotoffset], qualmask)) { + if (!checkqualifiers (id->eventid[offset][slotoffset], id->flags[offset][slotoffset], qualmask, NULL)) { slotoffset = 4; - if (!checkqualifiers (id->eventid[offset][slotoffset], id->flags[offset][slotoffset], qualmask)) - return; + if (!checkqualifiers (id->eventid[offset][slotoffset], id->flags[offset][slotoffset], qualmask, NULL)) + return false; } flags = id->flags[offset][slotoffset]; - custompos = (flags & ID_FLAG_CUSTOMEVENT_TOGGLED) ? 1 : 0; + custompos = (flags & ID_FLAG_CUSTOMEVENT_TOGGLED1) ? 1 : 0; + custompos |= (flags & ID_FLAG_CUSTOMEVENT_TOGGLED2) ? 2 : 0; - idx = -1; if (state < 0) { idx = 0; custompos = 0; } else { - idx = state > 0 ? 0 : 1; - if (custompos) - idx += 2; - if (state == 0) - custompos ^= 1; + if (state > 0) { + if (custompos & 1) + return false; // waiting for release + } else { + if (!(custompos & 1)) + return false; // waiting for press + } + idx = custompos; + custompos++; } - if (autofire) -#ifdef INPUTDEVICE_SIMPLE - queue_input_event (-1, 1, 1, currprefs.input_autofire_linecnt); -#else - queue_input_event (-1, NULL, 1, 1, currprefs.input_autofire_linecnt, 1); -#endif - if (state) { - id->flags[offset][slotoffset] &= ~ID_FLAG_CUSTOMEVENT_TOGGLED; - id->flags[offset][slotoffset] |= custompos ? ID_FLAG_CUSTOMEVENT_TOGGLED : 0; + queue_input_event (-1, NULL, -1, 0, 0, 1); + + if ((id->flags[offset][slotoffset + idx] & ID_FLAG_QUALIFIER_MASK) == qual) { + custom = id->custom[offset][slotoffset + idx]; + if (autofire) + queue_input_event (-1, custom, 1, 1, currprefs.input_autofire_linecnt, 1); + if (custom) + handle_custom_event (custom); } + + id->flags[offset][slotoffset] &= ~(ID_FLAG_CUSTOMEVENT_TOGGLED1 | ID_FLAG_CUSTOMEVENT_TOGGLED2); + id->flags[offset][slotoffset] |= (custompos & 1) ? ID_FLAG_CUSTOMEVENT_TOGGLED1 : 0; + id->flags[offset][slotoffset] |= (custompos & 2) ? ID_FLAG_CUSTOMEVENT_TOGGLED2 : 0; + + return true; } +#endif static void setbuttonstateall (struct uae_input_device *id, struct uae_input_device2 *id2, int button, int state) { static frame_time_t switchdevice_timeout; int i; uae_u32 mask = 1 << button; - uae_u32 omask = id2->buttonmask & mask; + uae_u32 omask = id2 ? id2->buttonmask & mask : 0; uae_u32 nmask = (state ? 1 : 0) << button; - int qualmask; + uae_u64 qualmask[MAX_INPUT_SUB_EVENT]; bool qualonly; if (!id->enabled) { @@ -2337,34 +2536,35 @@ static void setbuttonstateall (struct uae_input_device *id, struct uae_input_dev if (button >= ID_BUTTON_TOTAL) return; - qualmask = getqualmask (id, ID_BUTTON_OFFSET + button, &qualonly); + getqualmask (qualmask, id, ID_BUTTON_OFFSET + button, &qualonly); + + bool didcustom = false; for (i = 0; i < MAX_INPUT_SUB_EVENT; i++) { - uae_u32 *flagsp = &id->flags[ID_BUTTON_OFFSET + button][sublevdir[state <= 0 ? 1 : 0][i]]; - int evt = evt = id->eventid[ID_BUTTON_OFFSET + button][sublevdir[state <= 0 ? 1 : 0][i]]; - int flags = flagsp[0]; + int sub = sublevdir[state == 0 ? 1 : 0][i]; + uae_u64 *flagsp = &id->flags[ID_BUTTON_OFFSET + button][sub]; + int evt = id->eventid[ID_BUTTON_OFFSET + button][sub]; + uae_u64 flags = flagsp[0]; int autofire = (flags & ID_FLAG_AUTOFIRE) ? 1 : 0; #ifndef INPUTDEVICE_SIMPLE int toggle = (flags & ID_FLAG_TOGGLE) ? 1 : 0; int inverttoggle = (flags & ID_FLAG_INVERTTOGGLE) ? 1 : 0; -#endif if (!state) { - if (i == 0) - process_custom_event (id, ID_BUTTON_OFFSET + button, state, qualmask, autofire); + didcustom |= process_custom_event (id, ID_BUTTON_OFFSET + button, state, qualmask, autofire, i); } +#endif - setqualifiers (flags, state > 0); + setqualifiers (evt, state > 0); if (qualonly) continue; #ifndef INPUTDEVICE_SIMPLE if (state < 0) { - if (!checkqualifiers (evt, flags, qualmask)) + if (!checkqualifiers (evt, flags, qualmask, NULL)) continue; handle_input_event (evt, 1, 1, 0, true, false); - queue_input_event (evt, NULL, 0, 1, 1, 0); /* send release event next frame */ - process_custom_event (id, ID_BUTTON_OFFSET + button, state, qualmask, 0); + didcustom |= process_custom_event (id, ID_BUTTON_OFFSET + button, state, qualmask, 0, i); } else if (inverttoggle) { /* pressed = firebutton, not pressed = autofire */ if (state) { @@ -2373,23 +2573,21 @@ static void setbuttonstateall (struct uae_input_device *id, struct uae_input_dev } else { handle_input_event (evt, 1, 1, autofire, true, false); } - if (i == 0) - process_custom_event (id, ID_BUTTON_OFFSET + button, 1, qualmask, autofire); + didcustom |= process_custom_event (id, ID_BUTTON_OFFSET + button, state, qualmask, autofire, i); } else if (toggle) { if (!state) continue; if (omask & mask) continue; - if (!checkqualifiers (evt, flags, qualmask)) + if (!checkqualifiers (evt, flags, qualmask, NULL)) continue; *flagsp ^= ID_FLAG_TOGGLED; int toggled = (*flagsp & ID_FLAG_TOGGLED) ? 1 : 0; handle_input_event (evt, toggled, 1, autofire, true, false); - if (i == 0) - process_custom_event (id, ID_BUTTON_OFFSET + button, toggled, qualmask, autofire); + didcustom |= process_custom_event (id, ID_BUTTON_OFFSET + button, toggled, qualmask, autofire, i); } else { #endif - if (!checkqualifiers (evt, flags, qualmask)) { + if (!checkqualifiers (evt, flags, qualmask, NULL)) { if (!state && !(flags & ID_FLAG_CANRELEASE)) { continue; } else if (state) { @@ -2405,16 +2603,23 @@ static void setbuttonstateall (struct uae_input_device *id, struct uae_input_dev handle_input_event (evt, state, 1, autofire); #else handle_input_event (evt, state, 1, autofire, true, false); + if (state) + didcustom |= process_custom_event (id, ID_BUTTON_OFFSET + button, state, qualmask, autofire, i); #endif - if (i == 0) - process_custom_event (id, ID_BUTTON_OFFSET + button, state, qualmask, autofire); } #ifndef INPUTDEVICE_SIMPLE } #endif } - if ((omask ^ nmask) & mask) { + if (!didcustom) +#ifndef INPUTDEVICE_SIMPLE + queue_input_event (-1, NULL, -1, 0, 0, 1); +#else + queue_input_event (-1, -1, 0, 0); +#endif + + if (id2 && ((omask ^ nmask) & mask)) { if (state) id2->buttonmask |= mask; else @@ -2906,25 +3111,42 @@ static void setautofireevent (struct uae_input_device *uid, int num, int sub, in } } -static void sparerestore (struct uae_input_device *uid, int num, int sub) +static void inputdevice_sparerestore (struct uae_input_device *uid, int num, int sub) { - uid->eventid[num][sub] = uid->eventid[num][SPARE_SUB_EVENT]; - uid->flags[num][sub] = uid->flags[num][SPARE_SUB_EVENT]; - uid->custom[num][sub] = uid->custom[num][SPARE_SUB_EVENT]; + if (uid->port[num][SPARE_SUB_EVENT]) { + uid->eventid[num][sub] = uid->eventid[num][SPARE_SUB_EVENT]; + uid->flags[num][sub] = uid->flags[num][SPARE_SUB_EVENT]; + uid->custom[num][sub] = uid->custom[num][SPARE_SUB_EVENT]; + } else { + uid->eventid[num][sub] = 0; + uid->flags[num][sub] = 0; + xfree (uid->custom[num][sub]); + uid->custom[num][sub] = 0; + } uid->eventid[num][SPARE_SUB_EVENT] = 0; uid->flags[num][SPARE_SUB_EVENT] = 0; uid->port[num][SPARE_SUB_EVENT] = 0; uid->custom[num][SPARE_SUB_EVENT] = 0; } -static void sparecopy (struct uae_input_device *uid, int num, int sub) +void inputdevice_sparecopy (struct uae_input_device *uid, int num, int sub) { - uid->eventid[num][SPARE_SUB_EVENT] = uid->eventid[num][sub]; - uid->flags[num][SPARE_SUB_EVENT] = uid->flags[num][sub]; - uid->port[num][SPARE_SUB_EVENT] = MAX_JPORTS + 1; - xfree (uid->custom[num][SPARE_SUB_EVENT]); - uid->custom[num][SPARE_SUB_EVENT] = uid->custom[num][sub]; - uid->custom[num][sub] = NULL; + if (uid->port[num][SPARE_SUB_EVENT] != 0) + return; + if (uid->eventid[num][sub] <= 0 && uid->custom[num][sub] == NULL) { + uid->eventid[num][SPARE_SUB_EVENT] = 0; + uid->flags[num][SPARE_SUB_EVENT] = 0; + uid->port[num][SPARE_SUB_EVENT] = 0; + xfree (uid->custom[num][SPARE_SUB_EVENT]); + uid->custom[num][SPARE_SUB_EVENT] = NULL; + } else { + uid->eventid[num][SPARE_SUB_EVENT] = uid->eventid[num][sub]; + uid->flags[num][SPARE_SUB_EVENT] = uid->flags[num][sub]; + uid->port[num][SPARE_SUB_EVENT] = MAX_JPORTS + 1; + xfree (uid->custom[num][SPARE_SUB_EVENT]); + uid->custom[num][SPARE_SUB_EVENT] = uid->custom[num][sub]; + uid->custom[num][sub] = NULL; + } } static void setcompakb (int *kb, int *srcmap, int index, int af) @@ -2938,7 +3160,7 @@ static void setcompakb (int *kb, int *srcmap, int index, int af) struct uae_input_device *uid = &keyboards[m]; for (int l = 0; l < MAX_INPUT_DEVICE_EVENTS; l++) { if (uid->extra[l] == id) { - sparecopy (uid, l, 0); + inputdevice_sparecopy (uid, l, 0); uid->eventid[l][0] = srcmap[k]; uid->flags[l][0] = 0; uid->port[l][0] = index + 1; @@ -3070,7 +3292,7 @@ static void cleardevgp (struct uae_input_device *uid, int num, bool nocustom, in uid[num].custom[i][j] = NULL; uid[num].port[i][j] = 0; if (uid[num].port[i][SPARE_SUB_EVENT]) - sparerestore (&uid[num], i, j); + inputdevice_sparerestore (&uid[num], i, j); } } } @@ -3088,7 +3310,7 @@ static void cleardevkbrgp (struct uae_input_device *uid, int num, bool nocustom, uid[num].custom[i][j] = NULL; uid[num].port[i][j] = 0; if (uid[num].port[i][SPARE_SUB_EVENT]) { - sparerestore (&uid[num], i, j); + inputdevice_sparerestore (&uid[num], i, j); } else if (j == 0) { set_kbr_default_event (&uid[num], keyboard_default, i); } @@ -3135,6 +3357,7 @@ void inputdevice_compa_clear (struct uae_prefs *prefs, int index) static void cleardev (struct uae_input_device *uid, int num) { for (int i = 0; i < MAX_INPUT_DEVICE_EVENTS; i++) { + inputdevice_sparecopy (&uid[num], i, 0); for (int j = 0; j < MAX_INPUT_SUB_EVENT; j++) { uid[num].eventid[i][j] = 0; uid[num].flags[i][j] = 0; @@ -3367,7 +3590,7 @@ static void compatibility_copy (struct uae_prefs *prefs, bool gameports) case JSEM_MODE_DEFAULT: case JSEM_MODE_MOUSE: default: - input_get_default_mouse (mice, joy, i, af); + input_get_default_mouse (mice, joy, i, af, !gameports); joymodes[i] = JSEM_MODE_MOUSE; break; } @@ -3396,7 +3619,7 @@ static void compatibility_copy (struct uae_prefs *prefs, bool gameports) default: { bool iscd32 = mode == JSEM_MODE_JOYSTICK_CD32 || (mode == JSEM_MODE_DEFAULT && prefs->cs_cd32cd); - input_get_default_joystick (joysticks, joy, i, af, mode); + input_get_default_joystick (joysticks, joy, i, af, mode, !gameports); if (iscd32) joymodes[i] = JSEM_MODE_JOYSTICK_CD32; #ifndef INPUTDEVICE_SIMPLE @@ -3409,18 +3632,18 @@ static void compatibility_copy (struct uae_prefs *prefs, bool gameports) } #ifndef INPUTDEVICE_SIMPLE case JSEM_MODE_JOYSTICK_ANALOG: - input_get_default_joystick_analog (joysticks, joy, i, af); + input_get_default_joystick_analog (joysticks, joy, i, af, !gameports); joymodes[i] = JSEM_MODE_JOYSTICK_ANALOG; break; #endif case JSEM_MODE_MOUSE: - input_get_default_mouse (joysticks, joy, i, af); + input_get_default_mouse (joysticks, joy, i, af, !gameports); joymodes[i] = JSEM_MODE_MOUSE; break; #ifndef INPUTDEVICE_SIMPLE case JSEM_MODE_MOUSE_CDTV: joymodes[i] = JSEM_MODE_MOUSE_CDTV; - input_get_default_joystick (joysticks, joy, i, af, mode); + input_get_default_joystick (joysticks, joy, i, af, mode, !gameports); break; #endif } @@ -3534,7 +3757,7 @@ static void compatibility_copy (struct uae_prefs *prefs, bool gameports) if (joy >= 0) { if (gameports) cleardev (joysticks, joy); - input_get_default_joystick (joysticks, joy, i, af, 0); + input_get_default_joystick (joysticks, joy, i, af, 0, !gameports); _tcsncpy (prefs->jports[i].name, idev[IDTYPE_JOYSTICK].get_friendlyname (joy), MAX_JPORTNAME - 1); _tcsncpy (prefs->jports[i].configname, idev[IDTYPE_JOYSTICK].get_uniquename (joy), MAX_JPORTNAME - 1); used[joy] = 1; @@ -3688,11 +3911,25 @@ static void matchdevices_all (struct uae_prefs *prefs) } } -bool inputdevice_set_gameports_mapping (struct uae_prefs *prefs, int devnum, int num, int evtnum, int flags, int port) +bool inputdevice_set_gameports_mapping (struct uae_prefs *prefs, int devnum, int num, int evtnum, uae_u64 flags, int port) { TCHAR name[256]; struct inputevent *ie; + int sub; + if (evtnum < 0) { + joysticks = prefs->joystick_settings[GAMEPORT_INPUT_SETTINGS]; + mice = prefs->mouse_settings[GAMEPORT_INPUT_SETTINGS]; + keyboards = prefs->keyboard_settings[GAMEPORT_INPUT_SETTINGS]; + for (sub = 0; sub < MAX_INPUT_SUB_EVENT; sub++) { + int port2 = 0; + inputdevice_get_mapping (devnum, num, NULL, &port2, NULL, NULL, sub); + if (port2 == port + 1) { + inputdevice_set_mapping (devnum, num, NULL, NULL, 0, 0, sub); + } + } + return true; + } ie = inputdevice_get_eventinfo (evtnum); if (!inputdevice_get_eventname (ie, name)) return false; @@ -3700,9 +3937,13 @@ bool inputdevice_set_gameports_mapping (struct uae_prefs *prefs, int devnum, int mice = prefs->mouse_settings[GAMEPORT_INPUT_SETTINGS]; keyboards = prefs->keyboard_settings[GAMEPORT_INPUT_SETTINGS]; - int sub = 0; + sub = 0; if (inputdevice_get_widget_type (devnum, num, NULL) != IDEV_WIDGET_KEY) { for (sub = 0; sub < MAX_INPUT_SUB_EVENT; sub++) { + int port2 = 0; + int evt = inputdevice_get_mapping (devnum, num, NULL, &port2, NULL, NULL, sub); + if (port2 == port + 1 && evt == evtnum) + break; if (!inputdevice_get_mapping (devnum, num, NULL, NULL, NULL, NULL, sub)) break; } @@ -3715,7 +3956,8 @@ bool inputdevice_set_gameports_mapping (struct uae_prefs *prefs, int devnum, int mice = prefs->mouse_settings[prefs->input_selected_setting]; keyboards = prefs->keyboard_settings[prefs->input_selected_setting]; if (prefs->input_selected_setting != GAMEPORT_INPUT_SETTINGS) { - int xflags, xport; + int xport; + uae_u64 xflags; TCHAR xname[MAX_DPATH], xcustom[MAX_DPATH]; inputdevice_get_mapping (devnum, num, &xflags, &xport, xname, xcustom, 0); if (xport == 0) @@ -3752,50 +3994,52 @@ static void resetinput (void) } } -void inputdevice_updateconfig_internal (struct uae_prefs *prefs) +void inputdevice_updateconfig_internal (const struct uae_prefs *srcprrefs, struct uae_prefs *dstprefs) { int i; keyboard_default = keyboard_default_table[currprefs.input_keyboard_type]; - copyjport (&changed_prefs, &currprefs, 0); - copyjport (&changed_prefs, &currprefs, 1); - copyjport (&changed_prefs, &currprefs, 2); - copyjport (&changed_prefs, &currprefs, 3); + copyjport (srcprrefs, dstprefs, 0); + copyjport (srcprrefs, dstprefs, 1); + copyjport (srcprrefs, dstprefs, 2); + copyjport (srcprrefs, dstprefs, 3); resetinput (); - joysticks = prefs->joystick_settings[prefs->input_selected_setting]; - mice = prefs->mouse_settings[prefs->input_selected_setting]; - keyboards = prefs->keyboard_settings[prefs->input_selected_setting]; + joysticks = dstprefs->joystick_settings[dstprefs->input_selected_setting]; + mice = dstprefs->mouse_settings[dstprefs->input_selected_setting]; + keyboards = dstprefs->keyboard_settings[dstprefs->input_selected_setting]; - matchdevices_all (prefs); + matchdevices_all (dstprefs); memset (joysticks2, 0, sizeof joysticks2); memset (mice2, 0, sizeof mice2); - joysticks = prefs->joystick_settings[GAMEPORT_INPUT_SETTINGS]; - mice = prefs->mouse_settings[GAMEPORT_INPUT_SETTINGS]; - keyboards = prefs->keyboard_settings[GAMEPORT_INPUT_SETTINGS]; + joysticks = dstprefs->joystick_settings[GAMEPORT_INPUT_SETTINGS]; + mice = dstprefs->mouse_settings[GAMEPORT_INPUT_SETTINGS]; + keyboards = dstprefs->keyboard_settings[GAMEPORT_INPUT_SETTINGS]; for (i = 0; i < MAX_INPUT_SETTINGS; i++) { joysticks[i].enabled = 0; mice[i].enabled = 0; } - compatibility_copy (prefs, true); - joysticks = prefs->joystick_settings[prefs->input_selected_setting]; - mice = prefs->mouse_settings[prefs->input_selected_setting]; - keyboards = prefs->keyboard_settings[prefs->input_selected_setting]; - if (prefs->input_selected_setting != GAMEPORT_INPUT_SETTINGS) { - compatibility_copy (prefs, false); + + compatibility_copy (dstprefs, true); + joysticks = dstprefs->joystick_settings[dstprefs->input_selected_setting]; + mice = dstprefs->mouse_settings[dstprefs->input_selected_setting]; + keyboards = dstprefs->keyboard_settings[dstprefs->input_selected_setting]; + + if (dstprefs->input_selected_setting != GAMEPORT_INPUT_SETTINGS) { + compatibility_copy (dstprefs, false); } - disableifempty (prefs); - scanevents (prefs); + disableifempty (dstprefs); + scanevents (dstprefs); } -void inputdevice_updateconfig (struct uae_prefs *prefs) +void inputdevice_updateconfig (const struct uae_prefs *srcprefs, struct uae_prefs *dstprefs) { - inputdevice_updateconfig_internal (prefs); + inputdevice_updateconfig_internal (srcprefs, dstprefs); } // set default prefs to all input configuration settings @@ -3838,29 +4082,65 @@ int inputdevice_iskeymapped (int keyboard, int scancode) return scancodeused[keyboard][scancode]; } +static void rqualifiers (uae_u64 flags, bool release) +{ + uae_u64 mask = ID_FLAG_QUALIFIER1 << 1; + for (int i = 0; i < MAX_INPUT_QUALIFIERS; i++) { + if ((flags & mask) && (mask & (qualifiers << 1))) { + if (release) { + if (!(mask & qualifiers_r)) { + qualifiers_r |= mask; + for (int ii = 0; ii < MAX_INPUT_SUB_EVENT; ii++) { + int qevt = qualifiers_evt[i][ii]; + if (qevt > 0) { + write_log (_T("Released %d '%s'\n"), qevt, events[qevt].name); + inputdevice_do_keyboard (events[qevt].data, 0); + } + } + } + } else { + if ((mask & qualifiers_r)) { + qualifiers_r &= ~mask; + for (int ii = 0; ii < MAX_INPUT_SUB_EVENT; ii++) { + int qevt = qualifiers_evt[i][ii]; + if (qevt > 0) { + write_log (_T("Pressed %d '%s'\n"), qevt, events[qevt].name); + inputdevice_do_keyboard (events[qevt].data, 1); + } + } + } + } + } + mask <<= 2; + } +} + static int inputdevice_translatekeycode_2 (int keyboard, int scancode, int state, bool qualifiercheckonly) { struct uae_input_device *na = &keyboards[keyboard]; int j, k; int handled = 0; + bool didcustom = false; if (!keyboards || scancode < 0) return handled; - if (!state) - process_custom_event (NULL, 0, 0, 0, 0); +// if (!state) +// process_custom_event (NULL, 0, 0, 0, 0, 0); j = 0; while (j < MAX_INPUT_DEVICE_EVENTS && na->extra[j] >= 0) { if (na->extra[j] == scancode) { bool qualonly; - int qualmask = getqualmask (na, j, &qualonly); + uae_u64 qualmask[MAX_INPUT_SUB_EVENT]; + getqualmask (qualmask, na, j, &qualonly); + if (qualonly) qualifiercheckonly = true; for (k = 0; k < MAX_INPUT_SUB_EVENT; k++) {/* send key release events in reverse order */ - uae_u32 *flagsp = &na->flags[j][sublevdir[state == 0 ? 1 : 0][k]]; + uae_u64 *flagsp = &na->flags[j][sublevdir[state == 0 ? 1 : 0][k]]; int evt = na->eventid[j][sublevdir[state == 0 ? 1 : 0][k]]; - int flags = *flagsp; + uae_u64 flags = *flagsp; int autofire = (flags & ID_FLAG_AUTOFIRE) ? 1 : 0; #ifndef INPUTDEVICE_SIMPLE int toggle = (flags & ID_FLAG_TOGGLE) ? 1 : 0; @@ -3869,10 +4149,26 @@ static int inputdevice_translatekeycode_2 (int keyboard, int scancode, int state #endif setqualifiers (evt, state > 0); - if (qualifiercheckonly) + if (qualifiercheckonly) { + if (!state && (flags & ID_FLAG_CANRELEASE)) { + *flagsp &= ~ID_FLAG_CANRELEASE; +#ifdef INPUTDEVICE_SIMPLE + handle_input_event (evt, state, 1, autofire); +#else + handle_input_event (evt, state, 1, autofire, true, false); + if (k == 0) { + process_custom_event (na, j, state, qualmask, autofire, k); + } +#endif + } continue; + } #ifndef INPUTDEVICE_SIMPLE + if (!state) { + didcustom |= process_custom_event (na, j, state, qualmask, autofire, k); + } + if (inverttoggle) { na->flags[j][sublevdir[state == 0 ? 1 : 0][k]] &= ~ID_FLAG_TOGGLED; if (state) { @@ -3881,41 +4177,49 @@ static int inputdevice_translatekeycode_2 (int keyboard, int scancode, int state } else { handled |= handle_input_event (evt, 1, 1, autofire, true, false); } - if (k == 0) - process_custom_event (na, j, state, qualmask, autofire); + didcustom |= process_custom_event (na, j, state, qualmask, autofire, k); } else if (toggle) { if (!state) continue; - if (!checkqualifiers (evt, flags, qualmask)) + if (!checkqualifiers (evt, flags, qualmask, na->eventid[j])) continue; *flagsp ^= ID_FLAG_TOGGLED; toggled = (*flagsp & ID_FLAG_TOGGLED) ? 1 : 0; handled |= handle_input_event (evt, toggled, 1, autofire, true, false); if (k == 0) - process_custom_event (na, j, state, qualmask, autofire); + didcustom |= process_custom_event (na, j, state, qualmask, autofire, k); } else { #endif - if (!checkqualifiers (evt, flags, qualmask)) { + rqualifiers (flags, state ? true : false); + if (!checkqualifiers (evt, flags, qualmask, na->eventid[j])) { if (!state && !(flags & ID_FLAG_CANRELEASE)) continue; else if (state) continue; } - if (state) + if (state) { *flagsp |= ID_FLAG_CANRELEASE; - else + } else { + if (!(flags & ID_FLAG_CANRELEASE)) + continue; *flagsp &= ~ID_FLAG_CANRELEASE; + } #ifdef INPUTDEVICE_SIMPLE handled |= handle_input_event (evt, state, 1, autofire); #else handled |= handle_input_event (evt, state, 1, autofire, true, false); + didcustom |= process_custom_event (na, j, state, qualmask, autofire, k); #endif - if (k == 0) - process_custom_event (na, j, state, qualmask, autofire); #ifndef INPUTDEVICE_SIMPLE } #endif } + if (!didcustom) +#ifdef INPUTDEVICE_SIMPLE + queue_input_event (-1, -1, 0, 0); +#else + queue_input_event (-1, NULL, -1, 0, 0, 1); +#endif return handled; } j++; @@ -3965,7 +4269,7 @@ static struct uae_input_device *get_uid (const struct inputdevice_functions *id, return uid; } -static int get_event_data (const struct inputdevice_functions *id, int devnum, int num, int *eventid, TCHAR **custom, int *flags, int *port, int sub) +static int get_event_data (const struct inputdevice_functions *id, int devnum, int num, int *eventid, TCHAR **custom, uae_u64 *flags, int *port, int sub) { const struct uae_input_device *uid = get_uid (id, devnum); int type = id->get_widget_type (devnum, num, 0, 0); @@ -4004,12 +4308,37 @@ static int get_event_data (const struct inputdevice_functions *id, int devnum, i return -1; } -static int put_event_data (const struct inputdevice_functions *id, int devnum, int num, int eventid, TCHAR *custom, int flags, int port, int sub) +static TCHAR *stripstrdup (const TCHAR *s) +{ + TCHAR *out = my_strdup (s); + if (!out) + return NULL; + for (int i = 0; out[i]; i++) { + if (out[i] < ' ') + out[i] = ' '; + } + return out; +} + +static int put_event_data (const struct inputdevice_functions *id, int devnum, int num, int eventid, TCHAR *custom, uae_u64 flags, int port, int sub) { struct uae_input_device *uid = get_uid (id, devnum); int type = id->get_widget_type (devnum, num, 0, 0); int i, ret; + for (i = 0; i < MAX_INPUT_QUALIFIERS; i++) { + uae_u64 mask1 = ID_FLAG_QUALIFIER1 << (i * 2); + uae_u64 mask2 = mask1 << 1; + if ((flags & (mask1 | mask2)) == (mask1 | mask2)) + flags &= ~mask2; + } + if (custom && custom[0] == 0) + custom = NULL; + if (custom) + eventid = 0; + if (eventid <= 0 && !custom) + flags = 0; + ret = -1; if (type == IDEV_WIDGET_BUTTON || type == IDEV_WIDGET_BUTTONAXIS) { i = num - id->get_widget_first (devnum, IDEV_WIDGET_BUTTON) + ID_BUTTON_OFFSET; @@ -4059,36 +4388,46 @@ static int is_event_used (const struct inputdevice_functions *id, int devnum, in // device based index from global device index int inputdevice_get_device_index (int devnum) { - if (devnum < idev[IDTYPE_JOYSTICK].get_num ()) + int jcnt = idev[IDTYPE_JOYSTICK].get_num (); + int mcnt = idev[IDTYPE_MOUSE].get_num (); + int kcnt = idev[IDTYPE_KEYBOARD].get_num (); + + if (devnum < jcnt) return devnum; - else if (devnum < idev[IDTYPE_JOYSTICK].get_num () + idev[IDTYPE_MOUSE].get_num ()) - return devnum - idev[IDTYPE_JOYSTICK].get_num (); - else if (devnum < idev[IDTYPE_JOYSTICK].get_num () + idev[IDTYPE_MOUSE].get_num () + idev[IDTYPE_KEYBOARD].get_num ()) - return devnum - idev[IDTYPE_JOYSTICK].get_num () - idev[IDTYPE_MOUSE].get_num (); - else - return -1; + else if (devnum < jcnt + mcnt) + return devnum - jcnt; + else if (devnum < jcnt + mcnt + kcnt) + return devnum - (jcnt + mcnt); + return -1; } static int getdevnum (int type, int devnum) { + int jcnt = idev[IDTYPE_JOYSTICK].get_num (); + int mcnt = idev[IDTYPE_MOUSE].get_num (); + int kcnt = idev[IDTYPE_KEYBOARD].get_num (); + if (type == IDTYPE_JOYSTICK) return devnum; - if (type == IDTYPE_MOUSE) - return idev[IDTYPE_JOYSTICK].get_num () + devnum; - if (type == IDTYPE_KEYBOARD) - return idev[IDTYPE_JOYSTICK].get_num () + idev[IDTYPE_MOUSE].get_num () + devnum; + else if (type == IDTYPE_MOUSE) + return jcnt + devnum; + else if (type == IDTYPE_KEYBOARD) + return jcnt + mcnt + devnum; return -1; } static int gettype (int devnum) { - if (devnum < idev[IDTYPE_JOYSTICK].get_num ()) + int jcnt = idev[IDTYPE_JOYSTICK].get_num (); + int mcnt = idev[IDTYPE_MOUSE].get_num (); + int kcnt = idev[IDTYPE_KEYBOARD].get_num (); + + if (devnum < jcnt) return IDTYPE_JOYSTICK; - else if (devnum < idev[IDTYPE_JOYSTICK].get_num () + idev[IDTYPE_MOUSE].get_num ()) + else if (devnum < jcnt + mcnt) return IDTYPE_MOUSE; - else if (devnum < idev[IDTYPE_JOYSTICK].get_num () + idev[IDTYPE_MOUSE].get_num () + idev[IDTYPE_KEYBOARD].get_num ()) + else if (devnum < jcnt + mcnt + kcnt) return IDTYPE_KEYBOARD; - else return -1; } @@ -4174,7 +4513,8 @@ int inputdevice_iterate (int devnum, int num, TCHAR *name, int *af) const struct inputdevice_functions *idf = getidf (devnum); static int id_iterator; struct inputevent *ie; - int mask, data, flags, type; + int mask, data, type; + uae_u64 flags; int devindex = inputdevice_get_device_index (devnum); *af = 0; @@ -4226,11 +4566,12 @@ int inputdevice_iterate (int devnum, int num, TCHAR *name, int *af) } // return mapped event from devnum/num/sub -int inputdevice_get_mapping (int devnum, int num, int *pflags, int *pport, TCHAR *name, TCHAR *custom, int sub) +int inputdevice_get_mapping (int devnum, int num, uae_u64 *pflags, int *pport, TCHAR *name, TCHAR *custom, int sub) { const struct inputdevice_functions *idf = getidf (devnum); const struct uae_input_device *uid = get_uid (idf, inputdevice_get_device_index (devnum)); - int flags = 0, flag, port, data; + int port, data; + uae_u64 flags = 0, flag; int devindex = inputdevice_get_device_index (devnum); TCHAR *customp = NULL; @@ -4279,11 +4620,12 @@ int inputdevice_get_mapping (int devnum, int num, int *pflags, int *pport, TCHAR } // set event name/custom/flags to devnum/num/sub -int inputdevice_set_mapping (int devnum, int num, const TCHAR *name, TCHAR *custom, int flags, int port, int sub) +int inputdevice_set_mapping (int devnum, int num, const TCHAR *name, TCHAR *custom, uae_u64 flags, int port, int sub) { const struct inputdevice_functions *idf = getidf (devnum); const struct uae_input_device *uid = get_uid (idf, inputdevice_get_device_index (devnum)); - int eid, data, flag, portp, amask; + int eid, data, portp, amask; + uae_u64 flag; TCHAR ename[256]; int devindex = inputdevice_get_device_index (devnum); TCHAR *customp = NULL; @@ -4380,7 +4722,7 @@ void inputdevice_copyconfig (const struct uae_prefs *src, struct uae_prefs *dst) } } - inputdevice_updateconfig (dst); + inputdevice_updateconfig (src, dst); } static void swapjoydevice (struct uae_input_device *uid, int **swaps) @@ -4434,7 +4776,7 @@ void inputdevice_swap_compa_ports (struct uae_prefs *prefs, int portswap) memcpy (&tmp, &prefs->jports[portswap], sizeof (struct jport)); memcpy (&prefs->jports[portswap], &prefs->jports[portswap + 1], sizeof (struct jport)); memcpy (&prefs->jports[portswap + 1], &tmp, sizeof (struct jport)); - inputdevice_updateconfig (prefs); + inputdevice_updateconfig (NULL, prefs); } // swap device "devnum" ports 0<>1 and 2<>3 @@ -4469,28 +4811,49 @@ void inputdevice_swap_ports (struct uae_prefs *p, int devnum) } //memcpy (p->joystick_settings[dst], p->joystick_settings[src], sizeof (struct uae_input_device) * MAX_INPUT_DEVICES); -static void copydev (struct uae_input_device *dst, struct uae_input_device *src) +static void copydev (struct uae_input_device *dst, struct uae_input_device *src, int selectedwidget) { for (int i = 0; i < MAX_INPUT_DEVICES; i++) { for (int j = 0; j < MAX_INPUT_DEVICE_EVENTS; j++) { - for (int k = 0; k < MAX_INPUT_SUB_EVENT_ALL; k++) { - xfree (dst[i].custom[j][k]); - } + if (j == selectedwidget || selectedwidget < 0) { + for (int k = 0; k < MAX_INPUT_SUB_EVENT_ALL; k++) { + xfree (dst[i].custom[j][k]); + } + } + } + if (selectedwidget < 0) { + xfree (dst[i].configname); + xfree (dst[i].name); + } + } + if (selectedwidget < 0) { + memcpy (dst, src, sizeof (struct uae_input_device) * MAX_INPUT_DEVICES); + } else { + int j = selectedwidget; + for (int i = 0; i < MAX_INPUT_DEVICES; i++) { + for (int k = 0; k < MAX_INPUT_SUB_EVENT_ALL; k++) { + dst[i].eventid[j][k] = src[i].eventid[j][k]; + dst[i].custom[j][k] = src[i].custom[j][k]; + dst[i].flags[j][k] = src[i].flags[j][k]; + dst[i].port[j][k] = src[i].port[j][k]; + } + dst[i].extra[j] = src[i].extra[j]; } - xfree (dst[i].configname); - xfree (dst[i].name); } - memcpy (dst, src, sizeof (struct uae_input_device) * MAX_INPUT_DEVICES); for (int i = 0; i < MAX_INPUT_DEVICES; i++) { for (int j = 0; j < MAX_INPUT_DEVICE_EVENTS; j++) { - for (int k = 0; k < MAX_INPUT_SUB_EVENT_ALL; k++) { - if (dst[i].custom) - dst[i].custom[j][k] = my_strdup (dst[i].custom[j][k]); - } + if (j == selectedwidget || selectedwidget < 0) { + for (int k = 0; k < MAX_INPUT_SUB_EVENT_ALL; k++) { + if (dst[i].custom) + dst[i].custom[j][k] = my_strdup (dst[i].custom[j][k]); + } + } } - dst[i].configname = my_strdup (dst[i].configname); - dst[i].name = my_strdup (dst[i].name); - } + if (selectedwidget < 0) { + dst[i].configname = my_strdup (dst[i].configname); + dst[i].name = my_strdup (dst[i].name); + } + } } // copy whole configuration #x-slot to another @@ -4498,6 +4861,12 @@ static void copydev (struct uae_input_device *dst, struct uae_input_device *src) // +2 = default (pc keyboard) void inputdevice_copy_single_config (struct uae_prefs *p, int src, int dst, int devnum, int selectedwidget) { + if (selectedwidget >= 0) { + if (devnum < 0) + return; + if (gettype (devnum) != IDTYPE_KEYBOARD) + return; + } if (src >= MAX_INPUT_SETTINGS) { if (gettype (devnum) == IDTYPE_KEYBOARD) { p->input_keyboard_type = src > MAX_INPUT_SETTINGS ? 1 : 0; @@ -4509,11 +4878,11 @@ void inputdevice_copy_single_config (struct uae_prefs *p, int src, int dst, int return; if (src < MAX_INPUT_SETTINGS) { if (devnum < 0 || gettype (devnum) == IDTYPE_JOYSTICK) - copydev (p->joystick_settings[dst], p->joystick_settings[src]); + copydev (p->joystick_settings[dst], p->joystick_settings[src], selectedwidget); if (devnum < 0 || gettype (devnum) == IDTYPE_MOUSE) - copydev (p->mouse_settings[dst], p->mouse_settings[src]); + copydev (p->mouse_settings[dst], p->mouse_settings[src], selectedwidget); if (devnum < 0 || gettype (devnum) == IDTYPE_KEYBOARD) - copydev (p->keyboard_settings[dst], p->keyboard_settings[src]); + copydev (p->keyboard_settings[dst], p->keyboard_settings[src], selectedwidget); } } @@ -4521,6 +4890,8 @@ void inputdevice_acquire (int allmode) { int i; + //write_log (_T("inputdevice_acquire\n")); + for (i = 0; i < MAX_INPUT_DEVICES; i++) idev[IDTYPE_JOYSTICK].unacquire (i); for (i = 0; i < MAX_INPUT_DEVICES; i++) @@ -4547,6 +4918,8 @@ void inputdevice_acquire (int allmode) idev[IDTYPE_JOYSTICK].acquire (-1, 0); idev[IDTYPE_MOUSE].acquire (-1, 0); idev[IDTYPE_KEYBOARD].acquire (-1, 0); + // if (!input_acquired) + // write_log (_T("input devices acquired (%s)\n"), allmode ? "all" : "selected only"); input_acquired = 1; } @@ -4554,6 +4927,8 @@ void inputdevice_unacquire (void) { int i; + //write_log (_T("inputdevice_unacquire\n")); + for (i = 0; i < MAX_INPUT_DEVICES; i++) idev[IDTYPE_JOYSTICK].unacquire (i); for (i = 0; i < MAX_INPUT_DEVICES; i++) @@ -4592,6 +4967,10 @@ void setjoybuttonstateall (int joy, uae_u32 buttonbits, uae_u32 buttonmask) { int i; +#if 0 + if (ignoreoldinput (joy)) + return; +#endif for (i = 0; i < ID_BUTTON_TOTAL; i++) { if (buttonmask & (1 << i)) setbuttonstateall (&joysticks[joy], &joysticks2[joy], i, (buttonbits & (1 << i)) ? 1 : 0); @@ -4604,6 +4983,7 @@ void setjoybuttonstateall (int joy, uae_u32 buttonbits, uae_u32 buttonmask) void setmousebuttonstateall (int mouse, uae_u32 buttonbits, uae_u32 buttonmask) { int i; + uae_u32 obuttonmask = mice2[mouse].buttonmask; for (i = 0; i < ID_BUTTON_TOTAL; i++) { if (buttonmask & (1 << i)) @@ -4611,12 +4991,18 @@ void setmousebuttonstateall (int mouse, uae_u32 buttonbits, uae_u32 buttonmask) else if (buttonbits & (1 << i)) setbuttonstateall (&mice[mouse], &mice2[mouse], i, -1); } + if (obuttonmask != mice2[mouse].buttonmask) + mousehack_helper (mice2[mouse].buttonmask); } #endif void setmousebuttonstate (int mouse, int button, int state) { + uae_u32 obuttonmask = mice2[mouse].buttonmask; + setbuttonstateall (&mice[mouse], &mice2[mouse], button, state); + if (obuttonmask != mice2[mouse].buttonmask) + mousehack_helper (mice2[mouse].buttonmask); } @@ -4686,7 +5072,7 @@ void setmousestate (int mouse, int axis, int data, int isabs) else lastmy = data; if (axis) - mousehack_helper (); + mousehack_helper (mice2[mouse].buttonmask); if (currprefs.input_tablet == TABLET_MOUSEHACK && mousehack_alive ()) return; } diff --git a/src/inputevents.def b/src/inputevents.def index 673389be..631d0beb 100644 --- a/src/inputevents.def +++ b/src/inputevents.def @@ -1,6 +1,6 @@ /* joystick/mouse port 1 */ -DEFEVENT(JOYPORT1_START,_T("Joystick port 1"), AM_INFO, 0,1,0) +DEFEVENT(JOYPORT1_START,_T("[Joystick port 1]"), AM_INFO, 0,1,0) DEFEVENT(MOUSE1_FIRST, _T(""), AM_DUMMY, 0,0,0) @@ -52,7 +52,7 @@ DEFEVENT(JOY1_CD32_BLUE,_T("Joy1 CD32 Blue"),AM_K,4,1,JOYBUTTON_CD32_BLUE) /* joystick/mouse port 2 */ -DEFEVENT(JOYPORT2_START,_T("Joystick port 2"), AM_INFO, 0,2,0) +DEFEVENT(JOYPORT2_START,_T("[Joystick port 2]"), AM_INFO, 0,2,0) DEFEVENT(MOUSE2_FIRST, _T(""), AM_DUMMY, 0,0,0) @@ -94,6 +94,8 @@ DEFEVENT(JOY2_CD32_YELLOW,_T("Joy2 CD32 Yellow"),AM_K,4,2,JOYBUTTON_CD32_YELLOW) DEFEVENT(JOY2_CD32_RED,_T("Joy2 CD32 Red"),AM_K,4,2,JOYBUTTON_CD32_RED) DEFEVENT(JOY2_CD32_BLUE,_T("Joy2 CD32 Blue"),AM_K,4,2,JOYBUTTON_CD32_BLUE) +DEFEVENT(LIGHTPEN_FIRST, _T(""), AM_DUMMY, 0,0,0) + DEFEVENT(LIGHTPEN_HORIZ,_T("Lightpen Horizontal"),AM_MOUSE_AXIS|AM_JOY_AXIS,0,5,0) DEFEVENT(LIGHTPEN_VERT,_T("Lightpen Vertical"),AM_MOUSE_AXIS|AM_JOY_AXIS,0,5,1) DEFEVENT(LIGHTPEN_LEFT,_T("Lightpen Left"),AM_K,1,5,DIR_LEFT) @@ -101,9 +103,11 @@ DEFEVENT(LIGHTPEN_RIGHT,_T("Lightpen Right"),AM_K,1,5,DIR_RIGHT) DEFEVENT(LIGHTPEN_UP,_T("Lightpen Up"),AM_K,1,5,DIR_UP) DEFEVENT(LIGHTPEN_DOWN,_T("Lightpen Down"),AM_K,1,5,DIR_DOWN) +DEFEVENT(LIGHTPEN_LAST, _T(""), AM_DUMMY, 0,0,0) + /* parallel port joystick adapter */ -DEFEVENT(PAR_JOY1_START, _T("Parallel port joystick adapter"), AM_INFO, 0,3,0) +DEFEVENT(PAR_JOY1_START, _T("[Parallel port joystick adapter]"), AM_INFO, 0,3,0) DEFEVENT(PAR_JOY1_HORIZ,_T("Parallel Joy1 Horizontal"),AM_JOY_AXIS,0,3,DIR_LEFT|DIR_RIGHT) DEFEVENT(PAR_JOY1_VERT,_T("Parallel Joy1 Vertical"),AM_JOY_AXIS,0,3,DIR_UP|DIR_DOWN) @@ -137,7 +141,7 @@ DEFEVENT(PAR_JOY_END, _T(""), AM_DUMMY, 0,0,0) /* qualifiers */ -DEFEVENT(SPC_QUALIFIER_START,_T("Qualifiers"),AM_INFO, 0,0,0) +DEFEVENT(SPC_QUALIFIER_START,_T("[Qualifiers]"),AM_INFO, 0,0,0) DEFEVENT(SPC_QUALIFIER1,_T("Qualifier 1"),AM_KK,0,0,AKS_QUALIFIER1) DEFEVENT(SPC_QUALIFIER2,_T("Qualifier 2"),AM_KK,0,0,AKS_QUALIFIER2) @@ -151,12 +155,13 @@ DEFEVENT(SPC_QUALIFIER_SPECIAL,_T("Qualifier Special"),AM_KK,0,0,AKS_QUALIFIER_S DEFEVENT(SPC_QUALIFIER_SHIFT,_T("Qualifier Shift"),AM_KK,0,0,AKS_QUALIFIER_SHIFT) DEFEVENT(SPC_QUALIFIER_CONTROL,_T("Qualifier Control"),AM_KK,0,0,AKS_QUALIFIER_CONTROL) DEFEVENT(SPC_QUALIFIER_ALT,_T("Qualifier Alt"),AM_KK,0,0,AKS_QUALIFIER_ALT) +DEFEVENT(SPC_QUALIFIER_WIN,_T("Qualifier Win"),AM_KK,0,0,AKS_QUALIFIER_WIN) DEFEVENT(SPC_QUALIFIER_END, _T(""), AM_DUMMY, 0,0,0) /* keys */ -DEFEVENT(KEY_START,_T("Keyboard"),AM_INFO, 0,0,0) +DEFEVENT(KEY_START,_T("[Keyboard]"),AM_INFO, 0,0,0) DEFEVENT(KEY_F1,_T("F1"),AM_K,0,0,AK_F1) DEFEVENT(KEY_F2,_T("F2"),AM_K,0,0,AK_F2) @@ -316,6 +321,8 @@ DEFEVENT(KEY_7F,_T("Keycode 0x7F"),AM_K,0,0,0x7f) /* special */ +DEFEVENT(SPC_START,_T("[Miscellaneous]"),AM_INFO,0,0,0) + DEFEVENT(SPC_CUSTOM_EVENT,_T(""),AM_K,0,0,0) DEFEVENT(SPC_ENTERGUI,_T("Enter GUI"),AM_K,0,0,AKS_ENTERGUI) DEFEVENT(SPC_SCREENSHOT,_T("Screenshot (file)"),AM_K,0,0,AKS_SCREENSHOT_FILE) diff --git a/src/jit/codegen_arm.cpp b/src/jit/codegen_arm.cpp index d8ae6efd..7d013b8a 100644 --- a/src/jit/codegen_arm.cpp +++ b/src/jit/codegen_arm.cpp @@ -103,17 +103,19 @@ uae_u8 call_saved[]={0,0,0,0, 1,1,1,1, 1,1,1,1, 0,1,1,1}; - Special registers (such like the stack pointer) should not be "preserved" by pushing, even though they are "saved" across function calls */ -static const uae_u8 need_to_preserve[]={0,0,0,0, 1,1,1,1, 1,1,1,1, 0,0,0,0}; +/* Without save and restore R12, we sometimes get seg faults when entering gui... + Don't understand why. */ +static const uae_u8 need_to_preserve[]={0,0,0,0, 1,1,1,1, 1,1,1,1, 1,0,0,0}; static const uae_u32 PRESERVE_MASK = ((1<>= 2; while(nbytes--) { NOP(); } } -static inline void raw_emit_nop(void) +STATIC_INLINE void raw_emit_nop(void) { NOP(); } @@ -872,7 +874,7 @@ LOWFUNC(WRITE,NONE,2,compemu_raw_test_l_rr,(RR4 d, RR4 s)) } LENDFUNC(WRITE,NONE,2,compemu_raw_test_l_rr,(RR4 d, RR4 s)) -static inline void compemu_raw_call(uae_u32 t) +STATIC_INLINE void compemu_raw_call(uae_u32 t) { #ifdef ARMV6T2 MOVW_ri16(REG_WORK1, t); @@ -886,14 +888,14 @@ static inline void compemu_raw_call(uae_u32 t) POP(RLR_INDEX); } -static inline void compemu_raw_call_r(RR4 r) +STATIC_INLINE void compemu_raw_call_r(RR4 r) { PUSH(RLR_INDEX); BLX_r(r); POP(RLR_INDEX); } -static inline void compemu_raw_jcc_l_oponly(int cc) +STATIC_INLINE void compemu_raw_jcc_l_oponly(int cc) { switch (cc) { case 9: // LS @@ -920,7 +922,7 @@ static inline void compemu_raw_jcc_l_oponly(int cc) // emit of target will be done by caller } -static inline void compemu_raw_jl(uae_u32 t) +STATIC_INLINE void compemu_raw_jl(uae_u32 t) { #ifdef ARMV6T2 MOVW_ri16(REG_WORK1, t); @@ -932,13 +934,13 @@ static inline void compemu_raw_jl(uae_u32 t) #endif } -static inline void compemu_raw_jmp(uae_u32 t) +STATIC_INLINE void compemu_raw_jmp(uae_u32 t) { LDR_rRI(RPC_INDEX, RPC_INDEX, -4); emit_long(t); } -static inline void compemu_raw_jmp_m_indexed(uae_u32 base, uae_u32 r, uae_u32 m) +STATIC_INLINE void compemu_raw_jmp_m_indexed(uae_u32 base, uae_u32 r, uae_u32 m) { int shft; switch(m) { @@ -954,12 +956,12 @@ static inline void compemu_raw_jmp_m_indexed(uae_u32 base, uae_u32 r, uae_u32 m) emit_long(base); } -static inline void compemu_raw_jmp_r(RR4 r) +STATIC_INLINE void compemu_raw_jmp_r(RR4 r) { BX_r(r); } -static inline void compemu_raw_jnz(uae_u32 t) +STATIC_INLINE void compemu_raw_jnz(uae_u32 t) { #ifdef ARMV6T2 BEQ_i(1); @@ -971,12 +973,12 @@ static inline void compemu_raw_jnz(uae_u32 t) #endif } -static inline void compemu_raw_jz_b_oponly(void) +STATIC_INLINE void compemu_raw_jz_b_oponly(void) { BEQ_i(0); // Real distance set by caller } -static inline void compemu_raw_branch(IMM d) +STATIC_INLINE void compemu_raw_branch(IMM d) { B_i((d >> 2) - 1); } diff --git a/src/jit/compemu.cpp b/src/jit/compemu.cpp index 4f9f9c4f..9ffa905b 100644 --- a/src/jit/compemu.cpp +++ b/src/jit/compemu.cpp @@ -25,7 +25,7 @@ extern void comp_fscc_opp(); extern void comp_fbcc_opp(); #ifdef PART_1 -unsigned long REGPARAM2 op_0_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_0_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -44,7 +44,7 @@ unsigned long REGPARAM2 op_0_0_comp_ff(uae_u32 opcode) /* OR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_10_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -66,7 +66,7 @@ unsigned long REGPARAM2 op_10_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_18_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_18_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -88,7 +88,7 @@ unsigned long REGPARAM2 op_18_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_20_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -111,7 +111,7 @@ unsigned long REGPARAM2 op_20_0_comp_ff(uae_u32 opcode) /* OR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_28_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_28_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -133,7 +133,7 @@ unsigned long REGPARAM2 op_28_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_30_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -154,7 +154,7 @@ unsigned long REGPARAM2 op_30_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_38_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_38_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -174,7 +174,7 @@ unsigned long REGPARAM2 op_38_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_39_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_39_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -194,7 +194,7 @@ unsigned long REGPARAM2 op_39_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3c_0_comp_ff(uae_u32 opcode) /* ORSR */ +uae_u32 REGPARAM2 op_3c_0_comp_ff(uae_u32 opcode) /* ORSR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -208,7 +208,7 @@ unsigned long REGPARAM2 op_3c_0_comp_ff(uae_u32 opcode) /* ORSR */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_40_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_40_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -227,7 +227,7 @@ unsigned long REGPARAM2 op_40_0_comp_ff(uae_u32 opcode) /* OR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_50_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_50_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -249,7 +249,7 @@ unsigned long REGPARAM2 op_50_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_58_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_58_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -271,7 +271,7 @@ unsigned long REGPARAM2 op_58_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_60_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_60_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -294,7 +294,7 @@ unsigned long REGPARAM2 op_60_0_comp_ff(uae_u32 opcode) /* OR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_68_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_68_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -316,7 +316,7 @@ unsigned long REGPARAM2 op_68_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_70_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_70_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -337,7 +337,7 @@ unsigned long REGPARAM2 op_70_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_78_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_78_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -357,7 +357,7 @@ unsigned long REGPARAM2 op_78_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_79_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_79_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -377,7 +377,7 @@ unsigned long REGPARAM2 op_79_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_80_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_80_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -396,7 +396,7 @@ unsigned long REGPARAM2 op_80_0_comp_ff(uae_u32 opcode) /* OR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_90_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -418,7 +418,7 @@ unsigned long REGPARAM2 op_90_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_98_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_98_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -440,7 +440,7 @@ unsigned long REGPARAM2 op_98_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a0_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_a0_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -463,7 +463,7 @@ unsigned long REGPARAM2 op_a0_0_comp_ff(uae_u32 opcode) /* OR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a8_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_a8_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -485,7 +485,7 @@ unsigned long REGPARAM2 op_a8_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_b0_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -506,7 +506,7 @@ unsigned long REGPARAM2 op_b0_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b8_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_b8_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -526,7 +526,7 @@ unsigned long REGPARAM2 op_b8_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b9_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_b9_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -546,7 +546,7 @@ unsigned long REGPARAM2 op_b9_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_100_0_comp_ff(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_100_0_comp_ff(uae_u32 opcode) /* BTST */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -562,7 +562,7 @@ unsigned long REGPARAM2 op_100_0_comp_ff(uae_u32 opcode) /* BTST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_110_0_comp_ff(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_110_0_comp_ff(uae_u32 opcode) /* BTST */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -582,7 +582,7 @@ unsigned long REGPARAM2 op_110_0_comp_ff(uae_u32 opcode) /* BTST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_118_0_comp_ff(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_118_0_comp_ff(uae_u32 opcode) /* BTST */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -602,7 +602,7 @@ unsigned long REGPARAM2 op_118_0_comp_ff(uae_u32 opcode) /* BTST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_120_0_comp_ff(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_120_0_comp_ff(uae_u32 opcode) /* BTST */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -623,7 +623,7 @@ unsigned long REGPARAM2 op_120_0_comp_ff(uae_u32 opcode) /* BTST */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_128_0_comp_ff(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_128_0_comp_ff(uae_u32 opcode) /* BTST */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -643,7 +643,7 @@ unsigned long REGPARAM2 op_128_0_comp_ff(uae_u32 opcode) /* BTST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_130_0_comp_ff(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_130_0_comp_ff(uae_u32 opcode) /* BTST */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -662,7 +662,7 @@ unsigned long REGPARAM2 op_130_0_comp_ff(uae_u32 opcode) /* BTST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_138_0_comp_ff(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_138_0_comp_ff(uae_u32 opcode) /* BTST */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -680,7 +680,7 @@ unsigned long REGPARAM2 op_138_0_comp_ff(uae_u32 opcode) /* BTST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_139_0_comp_ff(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_139_0_comp_ff(uae_u32 opcode) /* BTST */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -698,7 +698,7 @@ unsigned long REGPARAM2 op_139_0_comp_ff(uae_u32 opcode) /* BTST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_13a_0_comp_ff(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_13a_0_comp_ff(uae_u32 opcode) /* BTST */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_s32 dstreg = 2; @@ -719,7 +719,7 @@ unsigned long REGPARAM2 op_13a_0_comp_ff(uae_u32 opcode) /* BTST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_13b_0_comp_ff(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_13b_0_comp_ff(uae_u32 opcode) /* BTST */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_s32 dstreg = 3; @@ -741,7 +741,7 @@ unsigned long REGPARAM2 op_13b_0_comp_ff(uae_u32 opcode) /* BTST */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_13c_0_comp_ff(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_13c_0_comp_ff(uae_u32 opcode) /* BTST */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -757,7 +757,7 @@ unsigned long REGPARAM2 op_13c_0_comp_ff(uae_u32 opcode) /* BTST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_140_0_comp_ff(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_140_0_comp_ff(uae_u32 opcode) /* BCHG */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -775,7 +775,7 @@ unsigned long REGPARAM2 op_140_0_comp_ff(uae_u32 opcode) /* BCHG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_150_0_comp_ff(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_150_0_comp_ff(uae_u32 opcode) /* BCHG */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -796,7 +796,7 @@ unsigned long REGPARAM2 op_150_0_comp_ff(uae_u32 opcode) /* BCHG */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_158_0_comp_ff(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_158_0_comp_ff(uae_u32 opcode) /* BCHG */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -817,7 +817,7 @@ unsigned long REGPARAM2 op_158_0_comp_ff(uae_u32 opcode) /* BCHG */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_160_0_comp_ff(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_160_0_comp_ff(uae_u32 opcode) /* BCHG */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -839,7 +839,7 @@ unsigned long REGPARAM2 op_160_0_comp_ff(uae_u32 opcode) /* BCHG */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_168_0_comp_ff(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_168_0_comp_ff(uae_u32 opcode) /* BCHG */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -860,7 +860,7 @@ unsigned long REGPARAM2 op_168_0_comp_ff(uae_u32 opcode) /* BCHG */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_170_0_comp_ff(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_170_0_comp_ff(uae_u32 opcode) /* BCHG */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -880,7 +880,7 @@ unsigned long REGPARAM2 op_170_0_comp_ff(uae_u32 opcode) /* BCHG */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_178_0_comp_ff(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_178_0_comp_ff(uae_u32 opcode) /* BCHG */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -899,7 +899,7 @@ unsigned long REGPARAM2 op_178_0_comp_ff(uae_u32 opcode) /* BCHG */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_179_0_comp_ff(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_179_0_comp_ff(uae_u32 opcode) /* BCHG */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -918,7 +918,7 @@ unsigned long REGPARAM2 op_179_0_comp_ff(uae_u32 opcode) /* BCHG */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_180_0_comp_ff(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_180_0_comp_ff(uae_u32 opcode) /* BCLR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -936,7 +936,7 @@ unsigned long REGPARAM2 op_180_0_comp_ff(uae_u32 opcode) /* BCLR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_190_0_comp_ff(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_190_0_comp_ff(uae_u32 opcode) /* BCLR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -957,7 +957,7 @@ unsigned long REGPARAM2 op_190_0_comp_ff(uae_u32 opcode) /* BCLR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_198_0_comp_ff(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_198_0_comp_ff(uae_u32 opcode) /* BCLR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -978,7 +978,7 @@ unsigned long REGPARAM2 op_198_0_comp_ff(uae_u32 opcode) /* BCLR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1a0_0_comp_ff(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_1a0_0_comp_ff(uae_u32 opcode) /* BCLR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -1000,7 +1000,7 @@ unsigned long REGPARAM2 op_1a0_0_comp_ff(uae_u32 opcode) /* BCLR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1a8_0_comp_ff(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_1a8_0_comp_ff(uae_u32 opcode) /* BCLR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -1021,7 +1021,7 @@ unsigned long REGPARAM2 op_1a8_0_comp_ff(uae_u32 opcode) /* BCLR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1b0_0_comp_ff(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_1b0_0_comp_ff(uae_u32 opcode) /* BCLR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -1041,7 +1041,7 @@ unsigned long REGPARAM2 op_1b0_0_comp_ff(uae_u32 opcode) /* BCLR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1b8_0_comp_ff(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_1b8_0_comp_ff(uae_u32 opcode) /* BCLR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -1060,7 +1060,7 @@ unsigned long REGPARAM2 op_1b8_0_comp_ff(uae_u32 opcode) /* BCLR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1b9_0_comp_ff(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_1b9_0_comp_ff(uae_u32 opcode) /* BCLR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -1079,7 +1079,7 @@ unsigned long REGPARAM2 op_1b9_0_comp_ff(uae_u32 opcode) /* BCLR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1c0_0_comp_ff(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_1c0_0_comp_ff(uae_u32 opcode) /* BSET */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -1097,7 +1097,7 @@ unsigned long REGPARAM2 op_1c0_0_comp_ff(uae_u32 opcode) /* BSET */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1d0_0_comp_ff(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_1d0_0_comp_ff(uae_u32 opcode) /* BSET */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -1118,7 +1118,7 @@ unsigned long REGPARAM2 op_1d0_0_comp_ff(uae_u32 opcode) /* BSET */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1d8_0_comp_ff(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_1d8_0_comp_ff(uae_u32 opcode) /* BSET */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -1139,7 +1139,7 @@ unsigned long REGPARAM2 op_1d8_0_comp_ff(uae_u32 opcode) /* BSET */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1e0_0_comp_ff(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_1e0_0_comp_ff(uae_u32 opcode) /* BSET */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -1161,7 +1161,7 @@ unsigned long REGPARAM2 op_1e0_0_comp_ff(uae_u32 opcode) /* BSET */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1e8_0_comp_ff(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_1e8_0_comp_ff(uae_u32 opcode) /* BSET */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -1182,7 +1182,7 @@ unsigned long REGPARAM2 op_1e8_0_comp_ff(uae_u32 opcode) /* BSET */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1f0_0_comp_ff(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_1f0_0_comp_ff(uae_u32 opcode) /* BSET */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -1202,7 +1202,7 @@ unsigned long REGPARAM2 op_1f0_0_comp_ff(uae_u32 opcode) /* BSET */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1f8_0_comp_ff(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_1f8_0_comp_ff(uae_u32 opcode) /* BSET */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -1221,7 +1221,7 @@ unsigned long REGPARAM2 op_1f8_0_comp_ff(uae_u32 opcode) /* BSET */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1f9_0_comp_ff(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_1f9_0_comp_ff(uae_u32 opcode) /* BSET */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -1240,7 +1240,7 @@ unsigned long REGPARAM2 op_1f9_0_comp_ff(uae_u32 opcode) /* BSET */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_200_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_200_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -1259,7 +1259,7 @@ unsigned long REGPARAM2 op_200_0_comp_ff(uae_u32 opcode) /* AND */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_210_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_210_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -1281,7 +1281,7 @@ unsigned long REGPARAM2 op_210_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_218_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_218_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -1303,7 +1303,7 @@ unsigned long REGPARAM2 op_218_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_220_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_220_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -1326,7 +1326,7 @@ unsigned long REGPARAM2 op_220_0_comp_ff(uae_u32 opcode) /* AND */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_228_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_228_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -1348,7 +1348,7 @@ unsigned long REGPARAM2 op_228_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_230_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_230_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -1369,7 +1369,7 @@ unsigned long REGPARAM2 op_230_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_238_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_238_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -1389,7 +1389,7 @@ unsigned long REGPARAM2 op_238_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_239_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_239_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -1409,7 +1409,7 @@ unsigned long REGPARAM2 op_239_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_23c_0_comp_ff(uae_u32 opcode) /* ANDSR */ +uae_u32 REGPARAM2 op_23c_0_comp_ff(uae_u32 opcode) /* ANDSR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -1423,7 +1423,7 @@ unsigned long REGPARAM2 op_23c_0_comp_ff(uae_u32 opcode) /* ANDSR */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_240_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_240_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -1442,7 +1442,7 @@ unsigned long REGPARAM2 op_240_0_comp_ff(uae_u32 opcode) /* AND */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_250_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_250_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -1464,7 +1464,7 @@ unsigned long REGPARAM2 op_250_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_258_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_258_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -1486,7 +1486,7 @@ unsigned long REGPARAM2 op_258_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_260_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_260_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -1509,7 +1509,7 @@ unsigned long REGPARAM2 op_260_0_comp_ff(uae_u32 opcode) /* AND */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_268_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_268_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -1531,7 +1531,7 @@ unsigned long REGPARAM2 op_268_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_270_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_270_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -1552,7 +1552,7 @@ unsigned long REGPARAM2 op_270_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_278_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_278_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -1572,7 +1572,7 @@ unsigned long REGPARAM2 op_278_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_279_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_279_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -1592,7 +1592,7 @@ unsigned long REGPARAM2 op_279_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_280_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_280_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -1611,7 +1611,7 @@ unsigned long REGPARAM2 op_280_0_comp_ff(uae_u32 opcode) /* AND */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_290_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_290_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -1633,7 +1633,7 @@ unsigned long REGPARAM2 op_290_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_298_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_298_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -1655,7 +1655,7 @@ unsigned long REGPARAM2 op_298_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2a0_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_2a0_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -1678,7 +1678,7 @@ unsigned long REGPARAM2 op_2a0_0_comp_ff(uae_u32 opcode) /* AND */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2a8_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_2a8_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -1700,7 +1700,7 @@ unsigned long REGPARAM2 op_2a8_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2b0_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_2b0_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -1721,7 +1721,7 @@ unsigned long REGPARAM2 op_2b0_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2b8_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_2b8_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -1741,7 +1741,7 @@ unsigned long REGPARAM2 op_2b8_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2b9_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_2b9_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -1761,7 +1761,7 @@ unsigned long REGPARAM2 op_2b9_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_400_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_400_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -1781,7 +1781,7 @@ unsigned long REGPARAM2 op_400_0_comp_ff(uae_u32 opcode) /* SUB */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_410_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_410_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -1804,7 +1804,7 @@ unsigned long REGPARAM2 op_410_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_418_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_418_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -1827,7 +1827,7 @@ unsigned long REGPARAM2 op_418_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_420_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_420_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -1851,7 +1851,7 @@ unsigned long REGPARAM2 op_420_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_428_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_428_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -1874,7 +1874,7 @@ unsigned long REGPARAM2 op_428_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_430_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_430_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -1896,7 +1896,7 @@ unsigned long REGPARAM2 op_430_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_438_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_438_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -1917,7 +1917,7 @@ unsigned long REGPARAM2 op_438_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_439_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_439_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -1938,7 +1938,7 @@ unsigned long REGPARAM2 op_439_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_440_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_440_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -1958,7 +1958,7 @@ unsigned long REGPARAM2 op_440_0_comp_ff(uae_u32 opcode) /* SUB */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_450_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_450_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -1981,7 +1981,7 @@ unsigned long REGPARAM2 op_450_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_458_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_458_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2004,7 +2004,7 @@ unsigned long REGPARAM2 op_458_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_460_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_460_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2028,7 +2028,7 @@ unsigned long REGPARAM2 op_460_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_468_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_468_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2051,7 +2051,7 @@ unsigned long REGPARAM2 op_468_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_470_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_470_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2073,7 +2073,7 @@ unsigned long REGPARAM2 op_470_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_478_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_478_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -2094,7 +2094,7 @@ unsigned long REGPARAM2 op_478_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_479_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_479_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -2115,7 +2115,7 @@ unsigned long REGPARAM2 op_479_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_480_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_480_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2135,7 +2135,7 @@ unsigned long REGPARAM2 op_480_0_comp_ff(uae_u32 opcode) /* SUB */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_490_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_490_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2158,7 +2158,7 @@ unsigned long REGPARAM2 op_490_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_498_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_498_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2181,7 +2181,7 @@ unsigned long REGPARAM2 op_498_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a0_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_4a0_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2205,7 +2205,7 @@ unsigned long REGPARAM2 op_4a0_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a8_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_4a8_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2228,7 +2228,7 @@ unsigned long REGPARAM2 op_4a8_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4b0_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_4b0_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2250,7 +2250,7 @@ unsigned long REGPARAM2 op_4b0_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4b8_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_4b8_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -2271,7 +2271,7 @@ unsigned long REGPARAM2 op_4b8_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4b9_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_4b9_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -2292,7 +2292,7 @@ unsigned long REGPARAM2 op_4b9_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_600_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_600_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2312,7 +2312,7 @@ unsigned long REGPARAM2 op_600_0_comp_ff(uae_u32 opcode) /* ADD */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_610_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_610_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2335,7 +2335,7 @@ unsigned long REGPARAM2 op_610_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_618_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_618_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2358,7 +2358,7 @@ unsigned long REGPARAM2 op_618_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_620_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_620_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2382,7 +2382,7 @@ unsigned long REGPARAM2 op_620_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_628_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_628_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2405,7 +2405,7 @@ unsigned long REGPARAM2 op_628_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_630_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_630_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2427,7 +2427,7 @@ unsigned long REGPARAM2 op_630_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_638_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_638_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -2448,7 +2448,7 @@ unsigned long REGPARAM2 op_638_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_639_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_639_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -2469,7 +2469,7 @@ unsigned long REGPARAM2 op_639_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_640_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_640_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2489,7 +2489,7 @@ unsigned long REGPARAM2 op_640_0_comp_ff(uae_u32 opcode) /* ADD */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_650_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_650_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2512,7 +2512,7 @@ unsigned long REGPARAM2 op_650_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_658_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_658_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2535,7 +2535,7 @@ unsigned long REGPARAM2 op_658_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_660_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_660_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2559,7 +2559,7 @@ unsigned long REGPARAM2 op_660_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_668_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_668_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2582,7 +2582,7 @@ unsigned long REGPARAM2 op_668_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_670_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_670_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2604,7 +2604,7 @@ unsigned long REGPARAM2 op_670_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_678_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_678_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -2625,7 +2625,7 @@ unsigned long REGPARAM2 op_678_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_679_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_679_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -2646,7 +2646,7 @@ unsigned long REGPARAM2 op_679_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_680_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_680_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2666,7 +2666,7 @@ unsigned long REGPARAM2 op_680_0_comp_ff(uae_u32 opcode) /* ADD */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_690_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_690_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2689,7 +2689,7 @@ unsigned long REGPARAM2 op_690_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_698_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_698_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2712,7 +2712,7 @@ unsigned long REGPARAM2 op_698_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6a0_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_6a0_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2736,7 +2736,7 @@ unsigned long REGPARAM2 op_6a0_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6a8_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_6a8_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2759,7 +2759,7 @@ unsigned long REGPARAM2 op_6a8_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6b0_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_6b0_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2781,7 +2781,7 @@ unsigned long REGPARAM2 op_6b0_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6b8_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_6b8_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -2802,7 +2802,7 @@ unsigned long REGPARAM2 op_6b8_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6b9_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_6b9_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -2823,7 +2823,7 @@ unsigned long REGPARAM2 op_6b9_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_800_0_comp_ff(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_800_0_comp_ff(uae_u32 opcode) /* BTST */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2839,7 +2839,7 @@ unsigned long REGPARAM2 op_800_0_comp_ff(uae_u32 opcode) /* BTST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_810_0_comp_ff(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_810_0_comp_ff(uae_u32 opcode) /* BTST */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2859,7 +2859,7 @@ unsigned long REGPARAM2 op_810_0_comp_ff(uae_u32 opcode) /* BTST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_818_0_comp_ff(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_818_0_comp_ff(uae_u32 opcode) /* BTST */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2879,7 +2879,7 @@ unsigned long REGPARAM2 op_818_0_comp_ff(uae_u32 opcode) /* BTST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_820_0_comp_ff(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_820_0_comp_ff(uae_u32 opcode) /* BTST */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2900,7 +2900,7 @@ unsigned long REGPARAM2 op_820_0_comp_ff(uae_u32 opcode) /* BTST */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_828_0_comp_ff(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_828_0_comp_ff(uae_u32 opcode) /* BTST */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2920,7 +2920,7 @@ unsigned long REGPARAM2 op_828_0_comp_ff(uae_u32 opcode) /* BTST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_830_0_comp_ff(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_830_0_comp_ff(uae_u32 opcode) /* BTST */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -2939,7 +2939,7 @@ unsigned long REGPARAM2 op_830_0_comp_ff(uae_u32 opcode) /* BTST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_838_0_comp_ff(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_838_0_comp_ff(uae_u32 opcode) /* BTST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -2957,7 +2957,7 @@ unsigned long REGPARAM2 op_838_0_comp_ff(uae_u32 opcode) /* BTST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_839_0_comp_ff(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_839_0_comp_ff(uae_u32 opcode) /* BTST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -2975,7 +2975,7 @@ unsigned long REGPARAM2 op_839_0_comp_ff(uae_u32 opcode) /* BTST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_83a_0_comp_ff(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_83a_0_comp_ff(uae_u32 opcode) /* BTST */ { uae_s32 dstreg = 2; uae_u32 dodgy=0; @@ -2996,7 +2996,7 @@ unsigned long REGPARAM2 op_83a_0_comp_ff(uae_u32 opcode) /* BTST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_83b_0_comp_ff(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_83b_0_comp_ff(uae_u32 opcode) /* BTST */ { uae_s32 dstreg = 3; uae_u32 dodgy=0; @@ -3018,7 +3018,7 @@ unsigned long REGPARAM2 op_83b_0_comp_ff(uae_u32 opcode) /* BTST */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_83c_0_comp_ff(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_83c_0_comp_ff(uae_u32 opcode) /* BTST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -3034,7 +3034,7 @@ unsigned long REGPARAM2 op_83c_0_comp_ff(uae_u32 opcode) /* BTST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_840_0_comp_ff(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_840_0_comp_ff(uae_u32 opcode) /* BCHG */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3052,7 +3052,7 @@ unsigned long REGPARAM2 op_840_0_comp_ff(uae_u32 opcode) /* BCHG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_850_0_comp_ff(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_850_0_comp_ff(uae_u32 opcode) /* BCHG */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3073,7 +3073,7 @@ unsigned long REGPARAM2 op_850_0_comp_ff(uae_u32 opcode) /* BCHG */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_858_0_comp_ff(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_858_0_comp_ff(uae_u32 opcode) /* BCHG */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3094,7 +3094,7 @@ unsigned long REGPARAM2 op_858_0_comp_ff(uae_u32 opcode) /* BCHG */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_860_0_comp_ff(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_860_0_comp_ff(uae_u32 opcode) /* BCHG */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3116,7 +3116,7 @@ unsigned long REGPARAM2 op_860_0_comp_ff(uae_u32 opcode) /* BCHG */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_868_0_comp_ff(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_868_0_comp_ff(uae_u32 opcode) /* BCHG */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3137,7 +3137,7 @@ unsigned long REGPARAM2 op_868_0_comp_ff(uae_u32 opcode) /* BCHG */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_870_0_comp_ff(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_870_0_comp_ff(uae_u32 opcode) /* BCHG */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3157,7 +3157,7 @@ unsigned long REGPARAM2 op_870_0_comp_ff(uae_u32 opcode) /* BCHG */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_878_0_comp_ff(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_878_0_comp_ff(uae_u32 opcode) /* BCHG */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -3176,7 +3176,7 @@ unsigned long REGPARAM2 op_878_0_comp_ff(uae_u32 opcode) /* BCHG */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_879_0_comp_ff(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_879_0_comp_ff(uae_u32 opcode) /* BCHG */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -3195,7 +3195,7 @@ unsigned long REGPARAM2 op_879_0_comp_ff(uae_u32 opcode) /* BCHG */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_880_0_comp_ff(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_880_0_comp_ff(uae_u32 opcode) /* BCLR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3213,7 +3213,7 @@ unsigned long REGPARAM2 op_880_0_comp_ff(uae_u32 opcode) /* BCLR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_890_0_comp_ff(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_890_0_comp_ff(uae_u32 opcode) /* BCLR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3234,7 +3234,7 @@ unsigned long REGPARAM2 op_890_0_comp_ff(uae_u32 opcode) /* BCLR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_898_0_comp_ff(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_898_0_comp_ff(uae_u32 opcode) /* BCLR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3255,7 +3255,7 @@ unsigned long REGPARAM2 op_898_0_comp_ff(uae_u32 opcode) /* BCLR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8a0_0_comp_ff(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_8a0_0_comp_ff(uae_u32 opcode) /* BCLR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3277,7 +3277,7 @@ unsigned long REGPARAM2 op_8a0_0_comp_ff(uae_u32 opcode) /* BCLR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8a8_0_comp_ff(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_8a8_0_comp_ff(uae_u32 opcode) /* BCLR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3298,7 +3298,7 @@ unsigned long REGPARAM2 op_8a8_0_comp_ff(uae_u32 opcode) /* BCLR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8b0_0_comp_ff(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_8b0_0_comp_ff(uae_u32 opcode) /* BCLR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3318,7 +3318,7 @@ unsigned long REGPARAM2 op_8b0_0_comp_ff(uae_u32 opcode) /* BCLR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8b8_0_comp_ff(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_8b8_0_comp_ff(uae_u32 opcode) /* BCLR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -3337,7 +3337,7 @@ unsigned long REGPARAM2 op_8b8_0_comp_ff(uae_u32 opcode) /* BCLR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8b9_0_comp_ff(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_8b9_0_comp_ff(uae_u32 opcode) /* BCLR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -3356,7 +3356,7 @@ unsigned long REGPARAM2 op_8b9_0_comp_ff(uae_u32 opcode) /* BCLR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8c0_0_comp_ff(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_8c0_0_comp_ff(uae_u32 opcode) /* BSET */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3374,7 +3374,7 @@ unsigned long REGPARAM2 op_8c0_0_comp_ff(uae_u32 opcode) /* BSET */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8d0_0_comp_ff(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_8d0_0_comp_ff(uae_u32 opcode) /* BSET */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3395,7 +3395,7 @@ unsigned long REGPARAM2 op_8d0_0_comp_ff(uae_u32 opcode) /* BSET */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8d8_0_comp_ff(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_8d8_0_comp_ff(uae_u32 opcode) /* BSET */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3416,7 +3416,7 @@ unsigned long REGPARAM2 op_8d8_0_comp_ff(uae_u32 opcode) /* BSET */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8e0_0_comp_ff(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_8e0_0_comp_ff(uae_u32 opcode) /* BSET */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3438,7 +3438,7 @@ unsigned long REGPARAM2 op_8e0_0_comp_ff(uae_u32 opcode) /* BSET */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8e8_0_comp_ff(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_8e8_0_comp_ff(uae_u32 opcode) /* BSET */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3459,7 +3459,7 @@ unsigned long REGPARAM2 op_8e8_0_comp_ff(uae_u32 opcode) /* BSET */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8f0_0_comp_ff(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_8f0_0_comp_ff(uae_u32 opcode) /* BSET */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3479,7 +3479,7 @@ unsigned long REGPARAM2 op_8f0_0_comp_ff(uae_u32 opcode) /* BSET */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8f8_0_comp_ff(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_8f8_0_comp_ff(uae_u32 opcode) /* BSET */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -3498,7 +3498,7 @@ unsigned long REGPARAM2 op_8f8_0_comp_ff(uae_u32 opcode) /* BSET */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8f9_0_comp_ff(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_8f9_0_comp_ff(uae_u32 opcode) /* BSET */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -3517,7 +3517,7 @@ unsigned long REGPARAM2 op_8f9_0_comp_ff(uae_u32 opcode) /* BSET */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a00_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a00_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3536,7 +3536,7 @@ unsigned long REGPARAM2 op_a00_0_comp_ff(uae_u32 opcode) /* EOR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a10_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a10_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3558,7 +3558,7 @@ unsigned long REGPARAM2 op_a10_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a18_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a18_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3580,7 +3580,7 @@ unsigned long REGPARAM2 op_a18_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a20_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a20_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3603,7 +3603,7 @@ unsigned long REGPARAM2 op_a20_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a28_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a28_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3625,7 +3625,7 @@ unsigned long REGPARAM2 op_a28_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a30_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a30_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3646,7 +3646,7 @@ unsigned long REGPARAM2 op_a30_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a38_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a38_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -3666,7 +3666,7 @@ unsigned long REGPARAM2 op_a38_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a39_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a39_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -3686,7 +3686,7 @@ unsigned long REGPARAM2 op_a39_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a3c_0_comp_ff(uae_u32 opcode) /* EORSR */ +uae_u32 REGPARAM2 op_a3c_0_comp_ff(uae_u32 opcode) /* EORSR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -3700,7 +3700,7 @@ unsigned long REGPARAM2 op_a3c_0_comp_ff(uae_u32 opcode) /* EORSR */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a40_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a40_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3719,7 +3719,7 @@ unsigned long REGPARAM2 op_a40_0_comp_ff(uae_u32 opcode) /* EOR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a50_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a50_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3741,7 +3741,7 @@ unsigned long REGPARAM2 op_a50_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a58_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a58_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3763,7 +3763,7 @@ unsigned long REGPARAM2 op_a58_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a60_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a60_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3786,7 +3786,7 @@ unsigned long REGPARAM2 op_a60_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a68_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a68_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3808,7 +3808,7 @@ unsigned long REGPARAM2 op_a68_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a70_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a70_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3829,7 +3829,7 @@ unsigned long REGPARAM2 op_a70_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a78_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a78_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -3849,7 +3849,7 @@ unsigned long REGPARAM2 op_a78_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a79_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a79_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -3869,7 +3869,7 @@ unsigned long REGPARAM2 op_a79_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a80_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a80_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3888,7 +3888,7 @@ unsigned long REGPARAM2 op_a80_0_comp_ff(uae_u32 opcode) /* EOR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a90_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a90_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3910,7 +3910,7 @@ unsigned long REGPARAM2 op_a90_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a98_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a98_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3932,7 +3932,7 @@ unsigned long REGPARAM2 op_a98_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_aa0_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_aa0_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3955,7 +3955,7 @@ unsigned long REGPARAM2 op_aa0_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_aa8_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_aa8_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3977,7 +3977,7 @@ unsigned long REGPARAM2 op_aa8_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_ab0_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_ab0_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -3998,7 +3998,7 @@ unsigned long REGPARAM2 op_ab0_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_ab8_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_ab8_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -4018,7 +4018,7 @@ unsigned long REGPARAM2 op_ab8_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_ab9_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_ab9_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -4041,7 +4041,7 @@ return 0; #endif #ifdef PART_2 -unsigned long REGPARAM2 op_c00_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c00_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -4058,7 +4058,7 @@ unsigned long REGPARAM2 op_c00_0_comp_ff(uae_u32 opcode) /* CMP */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c10_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c10_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -4079,7 +4079,7 @@ unsigned long REGPARAM2 op_c10_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c18_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c18_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -4100,7 +4100,7 @@ unsigned long REGPARAM2 op_c18_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c20_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c20_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -4122,7 +4122,7 @@ unsigned long REGPARAM2 op_c20_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c28_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c28_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -4143,7 +4143,7 @@ unsigned long REGPARAM2 op_c28_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c30_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c30_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -4163,7 +4163,7 @@ unsigned long REGPARAM2 op_c30_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c38_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c38_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -4182,7 +4182,7 @@ unsigned long REGPARAM2 op_c38_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c39_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c39_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -4201,7 +4201,7 @@ unsigned long REGPARAM2 op_c39_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c3a_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c3a_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_s32 dstreg = 2; uae_u32 dodgy=0; @@ -4223,7 +4223,7 @@ unsigned long REGPARAM2 op_c3a_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c3b_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c3b_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_s32 dstreg = 3; uae_u32 dodgy=0; @@ -4246,7 +4246,7 @@ unsigned long REGPARAM2 op_c3b_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c40_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c40_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -4263,7 +4263,7 @@ unsigned long REGPARAM2 op_c40_0_comp_ff(uae_u32 opcode) /* CMP */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c50_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c50_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -4284,7 +4284,7 @@ unsigned long REGPARAM2 op_c50_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c58_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c58_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -4305,7 +4305,7 @@ unsigned long REGPARAM2 op_c58_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c60_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c60_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -4327,7 +4327,7 @@ unsigned long REGPARAM2 op_c60_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c68_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c68_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -4348,7 +4348,7 @@ unsigned long REGPARAM2 op_c68_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c70_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c70_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -4368,7 +4368,7 @@ unsigned long REGPARAM2 op_c70_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c78_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c78_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -4387,7 +4387,7 @@ unsigned long REGPARAM2 op_c78_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c79_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c79_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -4406,7 +4406,7 @@ unsigned long REGPARAM2 op_c79_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c7a_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c7a_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_s32 dstreg = 2; uae_u32 dodgy=0; @@ -4428,7 +4428,7 @@ unsigned long REGPARAM2 op_c7a_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c7b_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c7b_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_s32 dstreg = 3; uae_u32 dodgy=0; @@ -4451,7 +4451,7 @@ unsigned long REGPARAM2 op_c7b_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c80_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c80_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -4468,7 +4468,7 @@ unsigned long REGPARAM2 op_c80_0_comp_ff(uae_u32 opcode) /* CMP */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c90_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c90_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -4489,7 +4489,7 @@ unsigned long REGPARAM2 op_c90_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c98_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c98_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -4510,7 +4510,7 @@ unsigned long REGPARAM2 op_c98_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_ca0_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_ca0_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -4532,7 +4532,7 @@ unsigned long REGPARAM2 op_ca0_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_ca8_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_ca8_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -4553,7 +4553,7 @@ unsigned long REGPARAM2 op_ca8_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_cb0_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_cb0_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -4573,7 +4573,7 @@ unsigned long REGPARAM2 op_cb0_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_cb8_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_cb8_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -4592,7 +4592,7 @@ unsigned long REGPARAM2 op_cb8_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_cb9_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_cb9_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -4611,7 +4611,7 @@ unsigned long REGPARAM2 op_cb9_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_cba_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_cba_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_s32 dstreg = 2; uae_u32 dodgy=0; @@ -4633,7 +4633,7 @@ unsigned long REGPARAM2 op_cba_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_cbb_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_cbb_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_s32 dstreg = 3; uae_u32 dodgy=0; @@ -4656,7 +4656,7 @@ unsigned long REGPARAM2 op_cbb_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1000_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1000_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -4675,7 +4675,7 @@ unsigned long REGPARAM2 op_1000_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1010_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1010_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -4698,7 +4698,7 @@ unsigned long REGPARAM2 op_1010_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1018_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1018_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -4721,7 +4721,7 @@ unsigned long REGPARAM2 op_1018_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1020_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1020_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -4745,7 +4745,7 @@ unsigned long REGPARAM2 op_1020_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1028_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1028_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -4768,7 +4768,7 @@ unsigned long REGPARAM2 op_1028_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1030_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1030_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -4790,7 +4790,7 @@ unsigned long REGPARAM2 op_1030_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1038_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1038_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -4811,7 +4811,7 @@ unsigned long REGPARAM2 op_1038_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1039_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1039_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -4832,7 +4832,7 @@ unsigned long REGPARAM2 op_1039_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_103a_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_103a_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -4855,7 +4855,7 @@ unsigned long REGPARAM2 op_103a_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_103b_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_103b_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -4879,7 +4879,7 @@ unsigned long REGPARAM2 op_103b_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_103c_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_103c_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -4898,7 +4898,7 @@ unsigned long REGPARAM2 op_103c_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1080_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1080_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -4917,7 +4917,7 @@ unsigned long REGPARAM2 op_1080_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1090_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1090_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -4940,7 +4940,7 @@ unsigned long REGPARAM2 op_1090_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1098_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1098_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -4963,7 +4963,7 @@ unsigned long REGPARAM2 op_1098_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10a0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10a0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -4987,7 +4987,7 @@ unsigned long REGPARAM2 op_10a0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10a8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10a8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5010,7 +5010,7 @@ unsigned long REGPARAM2 op_10a8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10b0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10b0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5032,7 +5032,7 @@ unsigned long REGPARAM2 op_10b0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10b8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10b8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -5053,7 +5053,7 @@ unsigned long REGPARAM2 op_10b8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10b9_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10b9_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -5074,7 +5074,7 @@ unsigned long REGPARAM2 op_10b9_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10ba_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10ba_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -5097,7 +5097,7 @@ unsigned long REGPARAM2 op_10ba_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10bb_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10bb_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -5121,7 +5121,7 @@ unsigned long REGPARAM2 op_10bb_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10bc_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10bc_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -5140,7 +5140,7 @@ unsigned long REGPARAM2 op_10bc_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10c0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10c0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5159,7 +5159,7 @@ unsigned long REGPARAM2 op_10c0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10d0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10d0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5182,7 +5182,7 @@ unsigned long REGPARAM2 op_10d0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10d8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10d8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5205,7 +5205,7 @@ unsigned long REGPARAM2 op_10d8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10e0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10e0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5229,7 +5229,7 @@ unsigned long REGPARAM2 op_10e0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10e8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10e8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5252,7 +5252,7 @@ unsigned long REGPARAM2 op_10e8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10f0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10f0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5274,7 +5274,7 @@ unsigned long REGPARAM2 op_10f0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10f8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10f8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -5295,7 +5295,7 @@ unsigned long REGPARAM2 op_10f8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10f9_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10f9_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -5316,7 +5316,7 @@ unsigned long REGPARAM2 op_10f9_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10fa_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10fa_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -5339,7 +5339,7 @@ unsigned long REGPARAM2 op_10fa_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10fb_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10fb_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -5363,7 +5363,7 @@ unsigned long REGPARAM2 op_10fb_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10fc_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10fc_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -5382,7 +5382,7 @@ unsigned long REGPARAM2 op_10fc_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1100_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1100_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5402,7 +5402,7 @@ unsigned long REGPARAM2 op_1100_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1110_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1110_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5426,7 +5426,7 @@ unsigned long REGPARAM2 op_1110_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1118_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1118_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5450,7 +5450,7 @@ unsigned long REGPARAM2 op_1118_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1120_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1120_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5475,7 +5475,7 @@ unsigned long REGPARAM2 op_1120_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1128_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1128_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5499,7 +5499,7 @@ unsigned long REGPARAM2 op_1128_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1130_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1130_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5522,7 +5522,7 @@ unsigned long REGPARAM2 op_1130_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1138_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1138_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -5544,7 +5544,7 @@ unsigned long REGPARAM2 op_1138_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1139_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1139_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -5566,7 +5566,7 @@ unsigned long REGPARAM2 op_1139_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_113a_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_113a_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -5590,7 +5590,7 @@ unsigned long REGPARAM2 op_113a_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_113b_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_113b_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -5615,7 +5615,7 @@ unsigned long REGPARAM2 op_113b_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_113c_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_113c_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -5635,7 +5635,7 @@ unsigned long REGPARAM2 op_113c_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1140_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1140_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5654,7 +5654,7 @@ unsigned long REGPARAM2 op_1140_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1150_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1150_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5677,7 +5677,7 @@ unsigned long REGPARAM2 op_1150_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1158_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1158_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5700,7 +5700,7 @@ unsigned long REGPARAM2 op_1158_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1160_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1160_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5724,7 +5724,7 @@ unsigned long REGPARAM2 op_1160_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1168_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1168_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5747,7 +5747,7 @@ unsigned long REGPARAM2 op_1168_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1170_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1170_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5769,7 +5769,7 @@ unsigned long REGPARAM2 op_1170_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1178_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1178_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -5790,7 +5790,7 @@ unsigned long REGPARAM2 op_1178_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1179_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1179_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -5811,7 +5811,7 @@ unsigned long REGPARAM2 op_1179_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_117a_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_117a_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -5834,7 +5834,7 @@ unsigned long REGPARAM2 op_117a_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_117b_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_117b_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -5858,7 +5858,7 @@ unsigned long REGPARAM2 op_117b_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_117c_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_117c_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -5877,7 +5877,7 @@ unsigned long REGPARAM2 op_117c_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1180_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1180_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5895,7 +5895,7 @@ unsigned long REGPARAM2 op_1180_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1190_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1190_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5917,7 +5917,7 @@ unsigned long REGPARAM2 op_1190_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1198_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1198_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5939,7 +5939,7 @@ unsigned long REGPARAM2 op_1198_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11a0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11a0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5962,7 +5962,7 @@ unsigned long REGPARAM2 op_11a0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11a8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11a8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -5984,7 +5984,7 @@ unsigned long REGPARAM2 op_11a8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11b0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11b0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -6005,7 +6005,7 @@ unsigned long REGPARAM2 op_11b0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11b8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11b8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -6025,7 +6025,7 @@ unsigned long REGPARAM2 op_11b8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11b9_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11b9_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -6045,7 +6045,7 @@ unsigned long REGPARAM2 op_11b9_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11ba_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11ba_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -6067,7 +6067,7 @@ unsigned long REGPARAM2 op_11ba_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11bb_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11bb_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -6090,7 +6090,7 @@ unsigned long REGPARAM2 op_11bb_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11bc_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11bc_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -6108,7 +6108,7 @@ unsigned long REGPARAM2 op_11bc_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11c0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11c0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -6125,7 +6125,7 @@ unsigned long REGPARAM2 op_11c0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11d0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11d0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -6146,7 +6146,7 @@ unsigned long REGPARAM2 op_11d0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11d8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11d8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -6167,7 +6167,7 @@ unsigned long REGPARAM2 op_11d8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11e0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11e0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -6189,7 +6189,7 @@ unsigned long REGPARAM2 op_11e0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11e8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11e8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -6210,7 +6210,7 @@ unsigned long REGPARAM2 op_11e8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11f0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11f0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -6230,7 +6230,7 @@ unsigned long REGPARAM2 op_11f0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11f8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11f8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -6249,7 +6249,7 @@ unsigned long REGPARAM2 op_11f8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11f9_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11f9_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -6268,7 +6268,7 @@ unsigned long REGPARAM2 op_11f9_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11fa_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11fa_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -6289,7 +6289,7 @@ unsigned long REGPARAM2 op_11fa_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11fb_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11fb_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -6311,7 +6311,7 @@ unsigned long REGPARAM2 op_11fb_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11fc_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11fc_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -6328,7 +6328,7 @@ unsigned long REGPARAM2 op_11fc_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_13c0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_13c0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -6345,7 +6345,7 @@ unsigned long REGPARAM2 op_13c0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_13d0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_13d0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -6366,7 +6366,7 @@ unsigned long REGPARAM2 op_13d0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_13d8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_13d8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -6387,7 +6387,7 @@ unsigned long REGPARAM2 op_13d8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_13e0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_13e0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -6409,7 +6409,7 @@ unsigned long REGPARAM2 op_13e0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_13e8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_13e8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -6430,7 +6430,7 @@ unsigned long REGPARAM2 op_13e8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_13f0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_13f0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -6450,7 +6450,7 @@ unsigned long REGPARAM2 op_13f0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_13f8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_13f8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -6469,7 +6469,7 @@ unsigned long REGPARAM2 op_13f8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_13f9_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_13f9_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -6488,7 +6488,7 @@ unsigned long REGPARAM2 op_13f9_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_13fa_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_13fa_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -6509,7 +6509,7 @@ unsigned long REGPARAM2 op_13fa_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_13fb_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_13fb_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -6531,7 +6531,7 @@ unsigned long REGPARAM2 op_13fb_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_13fc_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_13fc_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -6548,7 +6548,7 @@ unsigned long REGPARAM2 op_13fc_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2000_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2000_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -6567,7 +6567,7 @@ unsigned long REGPARAM2 op_2000_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2008_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2008_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -6588,7 +6588,7 @@ unsigned long REGPARAM2 op_2008_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2010_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2010_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -6611,7 +6611,7 @@ unsigned long REGPARAM2 op_2010_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2018_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2018_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -6634,7 +6634,7 @@ unsigned long REGPARAM2 op_2018_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2020_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2020_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -6658,7 +6658,7 @@ unsigned long REGPARAM2 op_2020_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2028_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2028_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -6681,7 +6681,7 @@ unsigned long REGPARAM2 op_2028_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2030_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2030_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -6703,7 +6703,7 @@ unsigned long REGPARAM2 op_2030_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2038_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2038_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -6724,7 +6724,7 @@ unsigned long REGPARAM2 op_2038_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2039_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2039_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -6745,7 +6745,7 @@ unsigned long REGPARAM2 op_2039_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_203a_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_203a_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -6768,7 +6768,7 @@ unsigned long REGPARAM2 op_203a_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_203b_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_203b_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -6792,7 +6792,7 @@ unsigned long REGPARAM2 op_203b_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_203c_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_203c_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -6811,7 +6811,7 @@ unsigned long REGPARAM2 op_203c_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2040_0_comp_ff(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_2040_0_comp_ff(uae_u32 opcode) /* MOVEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -6827,7 +6827,7 @@ unsigned long REGPARAM2 op_2040_0_comp_ff(uae_u32 opcode) /* MOVEA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2048_0_comp_ff(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_2048_0_comp_ff(uae_u32 opcode) /* MOVEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -6845,7 +6845,7 @@ unsigned long REGPARAM2 op_2048_0_comp_ff(uae_u32 opcode) /* MOVEA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2050_0_comp_ff(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_2050_0_comp_ff(uae_u32 opcode) /* MOVEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -6865,7 +6865,7 @@ unsigned long REGPARAM2 op_2050_0_comp_ff(uae_u32 opcode) /* MOVEA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2058_0_comp_ff(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_2058_0_comp_ff(uae_u32 opcode) /* MOVEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -6885,7 +6885,7 @@ unsigned long REGPARAM2 op_2058_0_comp_ff(uae_u32 opcode) /* MOVEA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2060_0_comp_ff(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_2060_0_comp_ff(uae_u32 opcode) /* MOVEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -6906,7 +6906,7 @@ unsigned long REGPARAM2 op_2060_0_comp_ff(uae_u32 opcode) /* MOVEA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2068_0_comp_ff(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_2068_0_comp_ff(uae_u32 opcode) /* MOVEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -6926,7 +6926,7 @@ unsigned long REGPARAM2 op_2068_0_comp_ff(uae_u32 opcode) /* MOVEA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2070_0_comp_ff(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_2070_0_comp_ff(uae_u32 opcode) /* MOVEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -6945,7 +6945,7 @@ unsigned long REGPARAM2 op_2070_0_comp_ff(uae_u32 opcode) /* MOVEA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2078_0_comp_ff(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_2078_0_comp_ff(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -6963,7 +6963,7 @@ unsigned long REGPARAM2 op_2078_0_comp_ff(uae_u32 opcode) /* MOVEA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2079_0_comp_ff(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_2079_0_comp_ff(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -6981,7 +6981,7 @@ unsigned long REGPARAM2 op_2079_0_comp_ff(uae_u32 opcode) /* MOVEA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_207a_0_comp_ff(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_207a_0_comp_ff(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -7001,7 +7001,7 @@ unsigned long REGPARAM2 op_207a_0_comp_ff(uae_u32 opcode) /* MOVEA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_207b_0_comp_ff(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_207b_0_comp_ff(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -7022,7 +7022,7 @@ unsigned long REGPARAM2 op_207b_0_comp_ff(uae_u32 opcode) /* MOVEA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_207c_0_comp_ff(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_207c_0_comp_ff(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -7038,7 +7038,7 @@ unsigned long REGPARAM2 op_207c_0_comp_ff(uae_u32 opcode) /* MOVEA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2080_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2080_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7057,7 +7057,7 @@ unsigned long REGPARAM2 op_2080_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2088_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2088_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7078,7 +7078,7 @@ unsigned long REGPARAM2 op_2088_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2090_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2090_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7101,7 +7101,7 @@ unsigned long REGPARAM2 op_2090_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2098_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2098_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7124,7 +7124,7 @@ unsigned long REGPARAM2 op_2098_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20a0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20a0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7148,7 +7148,7 @@ unsigned long REGPARAM2 op_20a0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20a8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20a8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7171,7 +7171,7 @@ unsigned long REGPARAM2 op_20a8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20b0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20b0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7193,7 +7193,7 @@ unsigned long REGPARAM2 op_20b0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20b8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20b8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -7214,7 +7214,7 @@ unsigned long REGPARAM2 op_20b8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20b9_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20b9_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -7235,7 +7235,7 @@ unsigned long REGPARAM2 op_20b9_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20ba_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20ba_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -7258,7 +7258,7 @@ unsigned long REGPARAM2 op_20ba_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20bb_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20bb_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -7282,7 +7282,7 @@ unsigned long REGPARAM2 op_20bb_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20bc_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20bc_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -7301,7 +7301,7 @@ unsigned long REGPARAM2 op_20bc_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20c0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20c0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7320,7 +7320,7 @@ unsigned long REGPARAM2 op_20c0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20c8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20c8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7341,7 +7341,7 @@ unsigned long REGPARAM2 op_20c8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20d0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20d0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7364,7 +7364,7 @@ unsigned long REGPARAM2 op_20d0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20d8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20d8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7387,7 +7387,7 @@ unsigned long REGPARAM2 op_20d8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20e0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20e0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7411,7 +7411,7 @@ unsigned long REGPARAM2 op_20e0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20e8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20e8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7434,7 +7434,7 @@ unsigned long REGPARAM2 op_20e8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20f0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20f0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7456,7 +7456,7 @@ unsigned long REGPARAM2 op_20f0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20f8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20f8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -7477,7 +7477,7 @@ unsigned long REGPARAM2 op_20f8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20f9_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20f9_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -7498,7 +7498,7 @@ unsigned long REGPARAM2 op_20f9_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20fa_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20fa_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -7521,7 +7521,7 @@ unsigned long REGPARAM2 op_20fa_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20fb_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20fb_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -7545,7 +7545,7 @@ unsigned long REGPARAM2 op_20fb_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20fc_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20fc_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -7564,7 +7564,7 @@ unsigned long REGPARAM2 op_20fc_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2100_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2100_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7584,7 +7584,7 @@ unsigned long REGPARAM2 op_2100_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2108_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2108_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7606,7 +7606,7 @@ unsigned long REGPARAM2 op_2108_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2110_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2110_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7630,7 +7630,7 @@ unsigned long REGPARAM2 op_2110_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2118_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2118_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7654,7 +7654,7 @@ unsigned long REGPARAM2 op_2118_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2120_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2120_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7679,7 +7679,7 @@ unsigned long REGPARAM2 op_2120_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2128_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2128_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7703,7 +7703,7 @@ unsigned long REGPARAM2 op_2128_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2130_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2130_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7726,7 +7726,7 @@ unsigned long REGPARAM2 op_2130_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2138_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2138_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -7748,7 +7748,7 @@ unsigned long REGPARAM2 op_2138_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2139_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2139_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -7770,7 +7770,7 @@ unsigned long REGPARAM2 op_2139_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_213a_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_213a_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -7794,7 +7794,7 @@ unsigned long REGPARAM2 op_213a_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_213b_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_213b_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -7819,7 +7819,7 @@ unsigned long REGPARAM2 op_213b_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_213c_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_213c_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -7839,7 +7839,7 @@ unsigned long REGPARAM2 op_213c_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2140_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2140_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7858,7 +7858,7 @@ unsigned long REGPARAM2 op_2140_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2148_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2148_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7879,7 +7879,7 @@ unsigned long REGPARAM2 op_2148_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2150_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2150_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7902,7 +7902,7 @@ unsigned long REGPARAM2 op_2150_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2158_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2158_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7925,7 +7925,7 @@ unsigned long REGPARAM2 op_2158_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2160_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2160_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7949,7 +7949,7 @@ unsigned long REGPARAM2 op_2160_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2168_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2168_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7972,7 +7972,7 @@ unsigned long REGPARAM2 op_2168_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2170_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2170_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -7994,7 +7994,7 @@ unsigned long REGPARAM2 op_2170_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2178_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2178_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -8015,7 +8015,7 @@ unsigned long REGPARAM2 op_2178_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2179_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2179_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -8036,7 +8036,7 @@ unsigned long REGPARAM2 op_2179_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_217a_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_217a_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -8059,7 +8059,7 @@ unsigned long REGPARAM2 op_217a_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_217b_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_217b_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -8083,7 +8083,7 @@ unsigned long REGPARAM2 op_217b_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_217c_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_217c_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -8102,7 +8102,7 @@ unsigned long REGPARAM2 op_217c_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2180_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2180_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -8120,7 +8120,7 @@ unsigned long REGPARAM2 op_2180_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2188_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2188_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -8140,32 +8140,32 @@ unsigned long REGPARAM2 op_2188_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } +uae_u32 REGPARAM2 op_2190_0_comp_ff(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ jff_TST_l(src); + live_flags(); + writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); +return 0; +} #endif #ifdef PART_3 -unsigned long REGPARAM2 op_2190_0_comp_ff(uae_u32 opcode) /* MOVE */ -{ - uae_s32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; - uae_u32 dodgy=(srcreg==(uae_s32)dstreg); - uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; - m68k_pc_offset+=2; -{ uae_u8 scratchie=S1; -{ int srca=dodgy?scratchie++:srcreg+8; - if (dodgy) - mov_l_rr(srca,srcreg+8); -{ int src=scratchie++; - readlong(srca,src,scratchie); -{ int dsta=scratchie++; - calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); - dont_care_flags(); -{ jff_TST_l(src); - live_flags(); - writelong(dsta,src,scratchie); -}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); -return 0; -} -unsigned long REGPARAM2 op_2198_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2198_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -8187,7 +8187,7 @@ unsigned long REGPARAM2 op_2198_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21a0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21a0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -8210,7 +8210,7 @@ unsigned long REGPARAM2 op_21a0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21a8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21a8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -8232,7 +8232,7 @@ unsigned long REGPARAM2 op_21a8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21b0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21b0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -8253,7 +8253,7 @@ unsigned long REGPARAM2 op_21b0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21b8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21b8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -8273,7 +8273,7 @@ unsigned long REGPARAM2 op_21b8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21b9_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21b9_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -8293,7 +8293,7 @@ unsigned long REGPARAM2 op_21b9_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21ba_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21ba_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -8315,7 +8315,7 @@ unsigned long REGPARAM2 op_21ba_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21bb_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21bb_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -8338,7 +8338,7 @@ unsigned long REGPARAM2 op_21bb_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21bc_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21bc_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -8356,7 +8356,7 @@ unsigned long REGPARAM2 op_21bc_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21c0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21c0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -8373,7 +8373,7 @@ unsigned long REGPARAM2 op_21c0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21c8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21c8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -8392,7 +8392,7 @@ unsigned long REGPARAM2 op_21c8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21d0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21d0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -8413,7 +8413,7 @@ unsigned long REGPARAM2 op_21d0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21d8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21d8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -8434,7 +8434,7 @@ unsigned long REGPARAM2 op_21d8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21e0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21e0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -8456,7 +8456,7 @@ unsigned long REGPARAM2 op_21e0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21e8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21e8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -8477,7 +8477,7 @@ unsigned long REGPARAM2 op_21e8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21f0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21f0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -8497,7 +8497,7 @@ unsigned long REGPARAM2 op_21f0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21f8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21f8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -8516,7 +8516,7 @@ unsigned long REGPARAM2 op_21f8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21f9_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21f9_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -8535,7 +8535,7 @@ unsigned long REGPARAM2 op_21f9_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21fa_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21fa_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -8556,7 +8556,7 @@ unsigned long REGPARAM2 op_21fa_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21fb_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21fb_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -8578,7 +8578,7 @@ unsigned long REGPARAM2 op_21fb_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21fc_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21fc_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -8595,7 +8595,7 @@ unsigned long REGPARAM2 op_21fc_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_23c0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_23c0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -8612,7 +8612,7 @@ unsigned long REGPARAM2 op_23c0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_23c8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_23c8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -8631,7 +8631,7 @@ unsigned long REGPARAM2 op_23c8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_23d0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_23d0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -8652,7 +8652,7 @@ unsigned long REGPARAM2 op_23d0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_23d8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_23d8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -8673,7 +8673,7 @@ unsigned long REGPARAM2 op_23d8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_23e0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_23e0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -8695,7 +8695,7 @@ unsigned long REGPARAM2 op_23e0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_23e8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_23e8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -8716,7 +8716,7 @@ unsigned long REGPARAM2 op_23e8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_23f0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_23f0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -8736,7 +8736,7 @@ unsigned long REGPARAM2 op_23f0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_23f8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_23f8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -8755,7 +8755,7 @@ unsigned long REGPARAM2 op_23f8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_23f9_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_23f9_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -8774,7 +8774,7 @@ unsigned long REGPARAM2 op_23f9_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_23fa_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_23fa_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -8795,7 +8795,7 @@ unsigned long REGPARAM2 op_23fa_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_23fb_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_23fb_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -8817,7 +8817,7 @@ unsigned long REGPARAM2 op_23fb_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_23fc_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_23fc_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -8834,7 +8834,7 @@ unsigned long REGPARAM2 op_23fc_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3000_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3000_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -8853,7 +8853,7 @@ unsigned long REGPARAM2 op_3000_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3008_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3008_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -8874,7 +8874,7 @@ unsigned long REGPARAM2 op_3008_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3010_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3010_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -8897,7 +8897,7 @@ unsigned long REGPARAM2 op_3010_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3018_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3018_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -8920,7 +8920,7 @@ unsigned long REGPARAM2 op_3018_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3020_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3020_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -8944,7 +8944,7 @@ unsigned long REGPARAM2 op_3020_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3028_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3028_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -8967,7 +8967,7 @@ unsigned long REGPARAM2 op_3028_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3030_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3030_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -8989,7 +8989,7 @@ unsigned long REGPARAM2 op_3030_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3038_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3038_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -9010,7 +9010,7 @@ unsigned long REGPARAM2 op_3038_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3039_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3039_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -9031,7 +9031,7 @@ unsigned long REGPARAM2 op_3039_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_303a_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_303a_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -9054,7 +9054,7 @@ unsigned long REGPARAM2 op_303a_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_303b_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_303b_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -9078,7 +9078,7 @@ unsigned long REGPARAM2 op_303b_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_303c_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_303c_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -9097,7 +9097,7 @@ unsigned long REGPARAM2 op_303c_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3040_0_comp_ff(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_3040_0_comp_ff(uae_u32 opcode) /* MOVEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -9113,7 +9113,7 @@ unsigned long REGPARAM2 op_3040_0_comp_ff(uae_u32 opcode) /* MOVEA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3048_0_comp_ff(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_3048_0_comp_ff(uae_u32 opcode) /* MOVEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -9131,7 +9131,7 @@ unsigned long REGPARAM2 op_3048_0_comp_ff(uae_u32 opcode) /* MOVEA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3050_0_comp_ff(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_3050_0_comp_ff(uae_u32 opcode) /* MOVEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -9151,7 +9151,7 @@ unsigned long REGPARAM2 op_3050_0_comp_ff(uae_u32 opcode) /* MOVEA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3058_0_comp_ff(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_3058_0_comp_ff(uae_u32 opcode) /* MOVEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -9171,7 +9171,7 @@ unsigned long REGPARAM2 op_3058_0_comp_ff(uae_u32 opcode) /* MOVEA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3060_0_comp_ff(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_3060_0_comp_ff(uae_u32 opcode) /* MOVEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -9192,7 +9192,7 @@ unsigned long REGPARAM2 op_3060_0_comp_ff(uae_u32 opcode) /* MOVEA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3068_0_comp_ff(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_3068_0_comp_ff(uae_u32 opcode) /* MOVEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -9212,7 +9212,7 @@ unsigned long REGPARAM2 op_3068_0_comp_ff(uae_u32 opcode) /* MOVEA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3070_0_comp_ff(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_3070_0_comp_ff(uae_u32 opcode) /* MOVEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -9231,7 +9231,7 @@ unsigned long REGPARAM2 op_3070_0_comp_ff(uae_u32 opcode) /* MOVEA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3078_0_comp_ff(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_3078_0_comp_ff(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -9249,7 +9249,7 @@ unsigned long REGPARAM2 op_3078_0_comp_ff(uae_u32 opcode) /* MOVEA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3079_0_comp_ff(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_3079_0_comp_ff(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -9267,7 +9267,7 @@ unsigned long REGPARAM2 op_3079_0_comp_ff(uae_u32 opcode) /* MOVEA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_307a_0_comp_ff(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_307a_0_comp_ff(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -9287,7 +9287,7 @@ unsigned long REGPARAM2 op_307a_0_comp_ff(uae_u32 opcode) /* MOVEA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_307b_0_comp_ff(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_307b_0_comp_ff(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -9308,7 +9308,7 @@ unsigned long REGPARAM2 op_307b_0_comp_ff(uae_u32 opcode) /* MOVEA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_307c_0_comp_ff(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_307c_0_comp_ff(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -9324,7 +9324,7 @@ unsigned long REGPARAM2 op_307c_0_comp_ff(uae_u32 opcode) /* MOVEA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3080_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3080_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -9343,7 +9343,7 @@ unsigned long REGPARAM2 op_3080_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3088_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3088_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -9364,7 +9364,7 @@ unsigned long REGPARAM2 op_3088_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3090_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3090_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -9387,7 +9387,7 @@ unsigned long REGPARAM2 op_3090_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3098_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3098_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -9410,7 +9410,7 @@ unsigned long REGPARAM2 op_3098_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30a0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30a0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -9434,7 +9434,7 @@ unsigned long REGPARAM2 op_30a0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30a8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30a8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -9457,7 +9457,7 @@ unsigned long REGPARAM2 op_30a8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30b0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30b0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -9479,7 +9479,7 @@ unsigned long REGPARAM2 op_30b0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30b8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30b8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -9500,7 +9500,7 @@ unsigned long REGPARAM2 op_30b8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30b9_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30b9_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -9521,7 +9521,7 @@ unsigned long REGPARAM2 op_30b9_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30ba_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30ba_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -9544,7 +9544,7 @@ unsigned long REGPARAM2 op_30ba_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30bb_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30bb_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -9568,7 +9568,7 @@ unsigned long REGPARAM2 op_30bb_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30bc_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30bc_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -9587,7 +9587,7 @@ unsigned long REGPARAM2 op_30bc_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30c0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30c0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -9606,7 +9606,7 @@ unsigned long REGPARAM2 op_30c0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30c8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30c8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -9627,7 +9627,7 @@ unsigned long REGPARAM2 op_30c8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30d0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30d0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -9650,7 +9650,7 @@ unsigned long REGPARAM2 op_30d0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30d8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30d8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -9673,7 +9673,7 @@ unsigned long REGPARAM2 op_30d8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30e0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30e0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -9697,7 +9697,7 @@ unsigned long REGPARAM2 op_30e0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30e8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30e8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -9720,7 +9720,7 @@ unsigned long REGPARAM2 op_30e8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30f0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30f0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -9742,7 +9742,7 @@ unsigned long REGPARAM2 op_30f0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30f8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30f8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -9763,7 +9763,7 @@ unsigned long REGPARAM2 op_30f8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30f9_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30f9_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -9784,7 +9784,7 @@ unsigned long REGPARAM2 op_30f9_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30fa_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30fa_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -9807,7 +9807,7 @@ unsigned long REGPARAM2 op_30fa_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30fb_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30fb_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -9831,7 +9831,7 @@ unsigned long REGPARAM2 op_30fb_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30fc_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30fc_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -9850,7 +9850,7 @@ unsigned long REGPARAM2 op_30fc_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3100_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3100_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -9870,7 +9870,7 @@ unsigned long REGPARAM2 op_3100_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3108_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3108_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -9892,7 +9892,7 @@ unsigned long REGPARAM2 op_3108_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3110_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3110_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -9916,7 +9916,7 @@ unsigned long REGPARAM2 op_3110_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3118_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3118_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -9940,7 +9940,7 @@ unsigned long REGPARAM2 op_3118_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3120_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3120_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -9965,7 +9965,7 @@ unsigned long REGPARAM2 op_3120_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3128_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3128_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -9989,7 +9989,7 @@ unsigned long REGPARAM2 op_3128_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3130_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3130_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -10012,7 +10012,7 @@ unsigned long REGPARAM2 op_3130_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3138_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3138_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -10034,7 +10034,7 @@ unsigned long REGPARAM2 op_3138_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3139_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3139_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -10056,7 +10056,7 @@ unsigned long REGPARAM2 op_3139_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_313a_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_313a_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -10080,7 +10080,7 @@ unsigned long REGPARAM2 op_313a_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_313b_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_313b_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -10105,7 +10105,7 @@ unsigned long REGPARAM2 op_313b_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_313c_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_313c_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -10125,7 +10125,7 @@ unsigned long REGPARAM2 op_313c_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3140_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3140_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -10144,7 +10144,7 @@ unsigned long REGPARAM2 op_3140_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3148_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3148_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -10165,7 +10165,7 @@ unsigned long REGPARAM2 op_3148_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3150_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3150_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -10188,7 +10188,7 @@ unsigned long REGPARAM2 op_3150_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3158_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3158_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -10211,7 +10211,7 @@ unsigned long REGPARAM2 op_3158_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3160_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3160_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -10235,7 +10235,7 @@ unsigned long REGPARAM2 op_3160_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3168_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3168_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -10258,7 +10258,7 @@ unsigned long REGPARAM2 op_3168_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3170_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3170_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -10280,7 +10280,7 @@ unsigned long REGPARAM2 op_3170_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3178_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3178_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -10301,7 +10301,7 @@ unsigned long REGPARAM2 op_3178_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3179_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3179_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -10322,7 +10322,7 @@ unsigned long REGPARAM2 op_3179_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_317a_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_317a_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -10345,7 +10345,7 @@ unsigned long REGPARAM2 op_317a_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_317b_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_317b_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -10369,7 +10369,7 @@ unsigned long REGPARAM2 op_317b_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_317c_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_317c_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -10388,7 +10388,7 @@ unsigned long REGPARAM2 op_317c_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3180_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3180_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -10406,7 +10406,7 @@ unsigned long REGPARAM2 op_3180_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3188_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3188_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -10426,7 +10426,7 @@ unsigned long REGPARAM2 op_3188_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3190_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3190_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -10448,7 +10448,7 @@ unsigned long REGPARAM2 op_3190_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3198_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3198_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -10470,7 +10470,7 @@ unsigned long REGPARAM2 op_3198_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31a0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31a0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -10493,7 +10493,7 @@ unsigned long REGPARAM2 op_31a0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31a8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31a8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -10515,7 +10515,7 @@ unsigned long REGPARAM2 op_31a8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31b0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31b0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -10536,7 +10536,7 @@ unsigned long REGPARAM2 op_31b0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31b8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31b8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -10556,7 +10556,7 @@ unsigned long REGPARAM2 op_31b8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31b9_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31b9_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -10576,7 +10576,7 @@ unsigned long REGPARAM2 op_31b9_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31ba_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31ba_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -10598,7 +10598,7 @@ unsigned long REGPARAM2 op_31ba_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31bb_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31bb_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -10621,7 +10621,7 @@ unsigned long REGPARAM2 op_31bb_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31bc_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31bc_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -10639,7 +10639,7 @@ unsigned long REGPARAM2 op_31bc_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31c0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31c0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -10656,7 +10656,7 @@ unsigned long REGPARAM2 op_31c0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31c8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31c8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -10675,7 +10675,7 @@ unsigned long REGPARAM2 op_31c8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31d0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31d0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -10696,7 +10696,7 @@ unsigned long REGPARAM2 op_31d0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31d8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31d8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -10717,7 +10717,7 @@ unsigned long REGPARAM2 op_31d8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31e0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31e0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -10739,7 +10739,7 @@ unsigned long REGPARAM2 op_31e0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31e8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31e8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -10760,7 +10760,7 @@ unsigned long REGPARAM2 op_31e8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31f0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31f0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -10780,7 +10780,7 @@ unsigned long REGPARAM2 op_31f0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31f8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31f8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -10799,7 +10799,7 @@ unsigned long REGPARAM2 op_31f8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31f9_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31f9_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -10818,7 +10818,7 @@ unsigned long REGPARAM2 op_31f9_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31fa_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31fa_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -10839,7 +10839,7 @@ unsigned long REGPARAM2 op_31fa_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31fb_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31fb_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -10861,7 +10861,7 @@ unsigned long REGPARAM2 op_31fb_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31fc_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31fc_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -10878,7 +10878,7 @@ unsigned long REGPARAM2 op_31fc_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_33c0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_33c0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -10895,7 +10895,7 @@ unsigned long REGPARAM2 op_33c0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_33c8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_33c8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -10914,7 +10914,7 @@ unsigned long REGPARAM2 op_33c8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_33d0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_33d0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -10935,7 +10935,7 @@ unsigned long REGPARAM2 op_33d0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_33d8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_33d8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -10956,7 +10956,7 @@ unsigned long REGPARAM2 op_33d8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_33e0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_33e0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -10978,7 +10978,7 @@ unsigned long REGPARAM2 op_33e0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_33e8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_33e8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -10999,7 +10999,7 @@ unsigned long REGPARAM2 op_33e8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_33f0_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_33f0_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11019,7 +11019,7 @@ unsigned long REGPARAM2 op_33f0_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_33f8_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_33f8_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -11038,7 +11038,7 @@ unsigned long REGPARAM2 op_33f8_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_33f9_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_33f9_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -11057,7 +11057,7 @@ unsigned long REGPARAM2 op_33f9_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_33fa_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_33fa_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -11078,7 +11078,7 @@ unsigned long REGPARAM2 op_33fa_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_33fb_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_33fb_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -11100,7 +11100,7 @@ unsigned long REGPARAM2 op_33fb_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_33fc_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_33fc_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -11117,7 +11117,7 @@ unsigned long REGPARAM2 op_33fc_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4000_0_comp_ff(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4000_0_comp_ff(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11135,7 +11135,7 @@ unsigned long REGPARAM2 op_4000_0_comp_ff(uae_u32 opcode) /* NEGX */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4010_0_comp_ff(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4010_0_comp_ff(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11156,7 +11156,7 @@ unsigned long REGPARAM2 op_4010_0_comp_ff(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4018_0_comp_ff(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4018_0_comp_ff(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11177,7 +11177,7 @@ unsigned long REGPARAM2 op_4018_0_comp_ff(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4020_0_comp_ff(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4020_0_comp_ff(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11199,7 +11199,7 @@ unsigned long REGPARAM2 op_4020_0_comp_ff(uae_u32 opcode) /* NEGX */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4028_0_comp_ff(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4028_0_comp_ff(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11220,7 +11220,7 @@ unsigned long REGPARAM2 op_4028_0_comp_ff(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4030_0_comp_ff(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4030_0_comp_ff(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11240,7 +11240,7 @@ unsigned long REGPARAM2 op_4030_0_comp_ff(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4038_0_comp_ff(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4038_0_comp_ff(uae_u32 opcode) /* NEGX */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -11259,7 +11259,7 @@ unsigned long REGPARAM2 op_4038_0_comp_ff(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4039_0_comp_ff(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4039_0_comp_ff(uae_u32 opcode) /* NEGX */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -11278,7 +11278,7 @@ unsigned long REGPARAM2 op_4039_0_comp_ff(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4040_0_comp_ff(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4040_0_comp_ff(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11296,7 +11296,7 @@ unsigned long REGPARAM2 op_4040_0_comp_ff(uae_u32 opcode) /* NEGX */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4050_0_comp_ff(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4050_0_comp_ff(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11317,7 +11317,7 @@ unsigned long REGPARAM2 op_4050_0_comp_ff(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4058_0_comp_ff(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4058_0_comp_ff(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11338,7 +11338,7 @@ unsigned long REGPARAM2 op_4058_0_comp_ff(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4060_0_comp_ff(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4060_0_comp_ff(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11360,7 +11360,7 @@ unsigned long REGPARAM2 op_4060_0_comp_ff(uae_u32 opcode) /* NEGX */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4068_0_comp_ff(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4068_0_comp_ff(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11381,7 +11381,7 @@ unsigned long REGPARAM2 op_4068_0_comp_ff(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4070_0_comp_ff(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4070_0_comp_ff(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11401,7 +11401,7 @@ unsigned long REGPARAM2 op_4070_0_comp_ff(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4078_0_comp_ff(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4078_0_comp_ff(uae_u32 opcode) /* NEGX */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -11420,7 +11420,7 @@ unsigned long REGPARAM2 op_4078_0_comp_ff(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4079_0_comp_ff(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4079_0_comp_ff(uae_u32 opcode) /* NEGX */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -11439,7 +11439,7 @@ unsigned long REGPARAM2 op_4079_0_comp_ff(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4080_0_comp_ff(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4080_0_comp_ff(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11457,7 +11457,7 @@ unsigned long REGPARAM2 op_4080_0_comp_ff(uae_u32 opcode) /* NEGX */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4090_0_comp_ff(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4090_0_comp_ff(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11478,7 +11478,7 @@ unsigned long REGPARAM2 op_4090_0_comp_ff(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4098_0_comp_ff(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4098_0_comp_ff(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11499,7 +11499,7 @@ unsigned long REGPARAM2 op_4098_0_comp_ff(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_40a0_0_comp_ff(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_40a0_0_comp_ff(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11521,7 +11521,7 @@ unsigned long REGPARAM2 op_40a0_0_comp_ff(uae_u32 opcode) /* NEGX */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_40a8_0_comp_ff(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_40a8_0_comp_ff(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11542,7 +11542,7 @@ unsigned long REGPARAM2 op_40a8_0_comp_ff(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_40b0_0_comp_ff(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_40b0_0_comp_ff(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11562,7 +11562,7 @@ unsigned long REGPARAM2 op_40b0_0_comp_ff(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_40b8_0_comp_ff(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_40b8_0_comp_ff(uae_u32 opcode) /* NEGX */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -11581,7 +11581,7 @@ unsigned long REGPARAM2 op_40b8_0_comp_ff(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_40b9_0_comp_ff(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_40b9_0_comp_ff(uae_u32 opcode) /* NEGX */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -11600,7 +11600,7 @@ unsigned long REGPARAM2 op_40b9_0_comp_ff(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_41d0_0_comp_ff(uae_u32 opcode) /* LEA */ +uae_u32 REGPARAM2 op_41d0_0_comp_ff(uae_u32 opcode) /* LEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -11617,7 +11617,7 @@ unsigned long REGPARAM2 op_41d0_0_comp_ff(uae_u32 opcode) /* LEA */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_41e8_0_comp_ff(uae_u32 opcode) /* LEA */ +uae_u32 REGPARAM2 op_41e8_0_comp_ff(uae_u32 opcode) /* LEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -11634,7 +11634,7 @@ unsigned long REGPARAM2 op_41e8_0_comp_ff(uae_u32 opcode) /* LEA */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_41f0_0_comp_ff(uae_u32 opcode) /* LEA */ +uae_u32 REGPARAM2 op_41f0_0_comp_ff(uae_u32 opcode) /* LEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -11650,7 +11650,7 @@ unsigned long REGPARAM2 op_41f0_0_comp_ff(uae_u32 opcode) /* LEA */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_41f8_0_comp_ff(uae_u32 opcode) /* LEA */ +uae_u32 REGPARAM2 op_41f8_0_comp_ff(uae_u32 opcode) /* LEA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -11665,7 +11665,7 @@ unsigned long REGPARAM2 op_41f8_0_comp_ff(uae_u32 opcode) /* LEA */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_41f9_0_comp_ff(uae_u32 opcode) /* LEA */ +uae_u32 REGPARAM2 op_41f9_0_comp_ff(uae_u32 opcode) /* LEA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -11680,7 +11680,7 @@ unsigned long REGPARAM2 op_41f9_0_comp_ff(uae_u32 opcode) /* LEA */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_41fa_0_comp_ff(uae_u32 opcode) /* LEA */ +uae_u32 REGPARAM2 op_41fa_0_comp_ff(uae_u32 opcode) /* LEA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -11697,7 +11697,7 @@ unsigned long REGPARAM2 op_41fa_0_comp_ff(uae_u32 opcode) /* LEA */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_41fb_0_comp_ff(uae_u32 opcode) /* LEA */ +uae_u32 REGPARAM2 op_41fb_0_comp_ff(uae_u32 opcode) /* LEA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -11715,7 +11715,7 @@ unsigned long REGPARAM2 op_41fb_0_comp_ff(uae_u32 opcode) /* LEA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4200_0_comp_ff(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4200_0_comp_ff(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11732,7 +11732,7 @@ unsigned long REGPARAM2 op_4200_0_comp_ff(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4210_0_comp_ff(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4210_0_comp_ff(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11750,7 +11750,7 @@ unsigned long REGPARAM2 op_4210_0_comp_ff(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4218_0_comp_ff(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4218_0_comp_ff(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11768,7 +11768,7 @@ unsigned long REGPARAM2 op_4218_0_comp_ff(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4220_0_comp_ff(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4220_0_comp_ff(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11787,7 +11787,7 @@ unsigned long REGPARAM2 op_4220_0_comp_ff(uae_u32 opcode) /* CLR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4228_0_comp_ff(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4228_0_comp_ff(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11805,7 +11805,7 @@ unsigned long REGPARAM2 op_4228_0_comp_ff(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4230_0_comp_ff(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4230_0_comp_ff(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11822,7 +11822,7 @@ unsigned long REGPARAM2 op_4230_0_comp_ff(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4238_0_comp_ff(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4238_0_comp_ff(uae_u32 opcode) /* CLR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -11838,7 +11838,7 @@ unsigned long REGPARAM2 op_4238_0_comp_ff(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4239_0_comp_ff(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4239_0_comp_ff(uae_u32 opcode) /* CLR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -11854,7 +11854,7 @@ unsigned long REGPARAM2 op_4239_0_comp_ff(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4240_0_comp_ff(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4240_0_comp_ff(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11871,7 +11871,7 @@ unsigned long REGPARAM2 op_4240_0_comp_ff(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4250_0_comp_ff(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4250_0_comp_ff(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11889,7 +11889,7 @@ unsigned long REGPARAM2 op_4250_0_comp_ff(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4258_0_comp_ff(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4258_0_comp_ff(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11907,7 +11907,7 @@ unsigned long REGPARAM2 op_4258_0_comp_ff(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4260_0_comp_ff(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4260_0_comp_ff(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11926,7 +11926,7 @@ unsigned long REGPARAM2 op_4260_0_comp_ff(uae_u32 opcode) /* CLR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4268_0_comp_ff(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4268_0_comp_ff(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11944,7 +11944,7 @@ unsigned long REGPARAM2 op_4268_0_comp_ff(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4270_0_comp_ff(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4270_0_comp_ff(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -11961,7 +11961,7 @@ unsigned long REGPARAM2 op_4270_0_comp_ff(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4278_0_comp_ff(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4278_0_comp_ff(uae_u32 opcode) /* CLR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -11977,7 +11977,7 @@ unsigned long REGPARAM2 op_4278_0_comp_ff(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4279_0_comp_ff(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4279_0_comp_ff(uae_u32 opcode) /* CLR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -11993,7 +11993,7 @@ unsigned long REGPARAM2 op_4279_0_comp_ff(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4280_0_comp_ff(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4280_0_comp_ff(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12010,7 +12010,7 @@ unsigned long REGPARAM2 op_4280_0_comp_ff(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4290_0_comp_ff(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4290_0_comp_ff(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12028,7 +12028,7 @@ unsigned long REGPARAM2 op_4290_0_comp_ff(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4298_0_comp_ff(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4298_0_comp_ff(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12046,7 +12046,7 @@ unsigned long REGPARAM2 op_4298_0_comp_ff(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_42a0_0_comp_ff(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_42a0_0_comp_ff(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12065,7 +12065,7 @@ unsigned long REGPARAM2 op_42a0_0_comp_ff(uae_u32 opcode) /* CLR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_42a8_0_comp_ff(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_42a8_0_comp_ff(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12083,7 +12083,7 @@ unsigned long REGPARAM2 op_42a8_0_comp_ff(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_42b0_0_comp_ff(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_42b0_0_comp_ff(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12100,7 +12100,7 @@ unsigned long REGPARAM2 op_42b0_0_comp_ff(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_42b8_0_comp_ff(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_42b8_0_comp_ff(uae_u32 opcode) /* CLR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -12116,7 +12116,7 @@ unsigned long REGPARAM2 op_42b8_0_comp_ff(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_42b9_0_comp_ff(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_42b9_0_comp_ff(uae_u32 opcode) /* CLR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -12135,7 +12135,7 @@ return 0; #endif #ifdef PART_4 -unsigned long REGPARAM2 op_4400_0_comp_ff(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4400_0_comp_ff(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12152,7 +12152,7 @@ unsigned long REGPARAM2 op_4400_0_comp_ff(uae_u32 opcode) /* NEG */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4410_0_comp_ff(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4410_0_comp_ff(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12172,7 +12172,7 @@ unsigned long REGPARAM2 op_4410_0_comp_ff(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4418_0_comp_ff(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4418_0_comp_ff(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12192,7 +12192,7 @@ unsigned long REGPARAM2 op_4418_0_comp_ff(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4420_0_comp_ff(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4420_0_comp_ff(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12213,7 +12213,7 @@ unsigned long REGPARAM2 op_4420_0_comp_ff(uae_u32 opcode) /* NEG */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4428_0_comp_ff(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4428_0_comp_ff(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12233,7 +12233,7 @@ unsigned long REGPARAM2 op_4428_0_comp_ff(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4430_0_comp_ff(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4430_0_comp_ff(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12252,7 +12252,7 @@ unsigned long REGPARAM2 op_4430_0_comp_ff(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4438_0_comp_ff(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4438_0_comp_ff(uae_u32 opcode) /* NEG */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -12270,7 +12270,7 @@ unsigned long REGPARAM2 op_4438_0_comp_ff(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4439_0_comp_ff(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4439_0_comp_ff(uae_u32 opcode) /* NEG */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -12288,7 +12288,7 @@ unsigned long REGPARAM2 op_4439_0_comp_ff(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4440_0_comp_ff(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4440_0_comp_ff(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12305,7 +12305,7 @@ unsigned long REGPARAM2 op_4440_0_comp_ff(uae_u32 opcode) /* NEG */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4450_0_comp_ff(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4450_0_comp_ff(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12325,7 +12325,7 @@ unsigned long REGPARAM2 op_4450_0_comp_ff(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4458_0_comp_ff(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4458_0_comp_ff(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12345,7 +12345,7 @@ unsigned long REGPARAM2 op_4458_0_comp_ff(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4460_0_comp_ff(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4460_0_comp_ff(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12366,7 +12366,7 @@ unsigned long REGPARAM2 op_4460_0_comp_ff(uae_u32 opcode) /* NEG */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4468_0_comp_ff(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4468_0_comp_ff(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12386,7 +12386,7 @@ unsigned long REGPARAM2 op_4468_0_comp_ff(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4470_0_comp_ff(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4470_0_comp_ff(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12405,7 +12405,7 @@ unsigned long REGPARAM2 op_4470_0_comp_ff(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4478_0_comp_ff(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4478_0_comp_ff(uae_u32 opcode) /* NEG */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -12423,7 +12423,7 @@ unsigned long REGPARAM2 op_4478_0_comp_ff(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4479_0_comp_ff(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4479_0_comp_ff(uae_u32 opcode) /* NEG */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -12441,7 +12441,7 @@ unsigned long REGPARAM2 op_4479_0_comp_ff(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4480_0_comp_ff(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4480_0_comp_ff(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12458,7 +12458,7 @@ unsigned long REGPARAM2 op_4480_0_comp_ff(uae_u32 opcode) /* NEG */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4490_0_comp_ff(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4490_0_comp_ff(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12478,7 +12478,7 @@ unsigned long REGPARAM2 op_4490_0_comp_ff(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4498_0_comp_ff(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4498_0_comp_ff(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12498,7 +12498,7 @@ unsigned long REGPARAM2 op_4498_0_comp_ff(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_44a0_0_comp_ff(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_44a0_0_comp_ff(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12519,7 +12519,7 @@ unsigned long REGPARAM2 op_44a0_0_comp_ff(uae_u32 opcode) /* NEG */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_44a8_0_comp_ff(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_44a8_0_comp_ff(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12539,7 +12539,7 @@ unsigned long REGPARAM2 op_44a8_0_comp_ff(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_44b0_0_comp_ff(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_44b0_0_comp_ff(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12558,7 +12558,7 @@ unsigned long REGPARAM2 op_44b0_0_comp_ff(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_44b8_0_comp_ff(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_44b8_0_comp_ff(uae_u32 opcode) /* NEG */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -12576,7 +12576,7 @@ unsigned long REGPARAM2 op_44b8_0_comp_ff(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_44b9_0_comp_ff(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_44b9_0_comp_ff(uae_u32 opcode) /* NEG */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -12594,7 +12594,7 @@ unsigned long REGPARAM2 op_44b9_0_comp_ff(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4600_0_comp_ff(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4600_0_comp_ff(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12611,7 +12611,7 @@ unsigned long REGPARAM2 op_4600_0_comp_ff(uae_u32 opcode) /* NOT */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4610_0_comp_ff(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4610_0_comp_ff(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12631,7 +12631,7 @@ unsigned long REGPARAM2 op_4610_0_comp_ff(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4618_0_comp_ff(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4618_0_comp_ff(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12651,7 +12651,7 @@ unsigned long REGPARAM2 op_4618_0_comp_ff(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4620_0_comp_ff(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4620_0_comp_ff(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12672,7 +12672,7 @@ unsigned long REGPARAM2 op_4620_0_comp_ff(uae_u32 opcode) /* NOT */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4628_0_comp_ff(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4628_0_comp_ff(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12692,7 +12692,7 @@ unsigned long REGPARAM2 op_4628_0_comp_ff(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4630_0_comp_ff(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4630_0_comp_ff(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12711,7 +12711,7 @@ unsigned long REGPARAM2 op_4630_0_comp_ff(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4638_0_comp_ff(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4638_0_comp_ff(uae_u32 opcode) /* NOT */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -12729,7 +12729,7 @@ unsigned long REGPARAM2 op_4638_0_comp_ff(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4639_0_comp_ff(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4639_0_comp_ff(uae_u32 opcode) /* NOT */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -12747,7 +12747,7 @@ unsigned long REGPARAM2 op_4639_0_comp_ff(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4640_0_comp_ff(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4640_0_comp_ff(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12764,7 +12764,7 @@ unsigned long REGPARAM2 op_4640_0_comp_ff(uae_u32 opcode) /* NOT */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4650_0_comp_ff(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4650_0_comp_ff(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12784,7 +12784,7 @@ unsigned long REGPARAM2 op_4650_0_comp_ff(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4658_0_comp_ff(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4658_0_comp_ff(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12804,7 +12804,7 @@ unsigned long REGPARAM2 op_4658_0_comp_ff(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4660_0_comp_ff(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4660_0_comp_ff(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12825,7 +12825,7 @@ unsigned long REGPARAM2 op_4660_0_comp_ff(uae_u32 opcode) /* NOT */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4668_0_comp_ff(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4668_0_comp_ff(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12845,7 +12845,7 @@ unsigned long REGPARAM2 op_4668_0_comp_ff(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4670_0_comp_ff(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4670_0_comp_ff(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12864,7 +12864,7 @@ unsigned long REGPARAM2 op_4670_0_comp_ff(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4678_0_comp_ff(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4678_0_comp_ff(uae_u32 opcode) /* NOT */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -12882,7 +12882,7 @@ unsigned long REGPARAM2 op_4678_0_comp_ff(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4679_0_comp_ff(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4679_0_comp_ff(uae_u32 opcode) /* NOT */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -12900,7 +12900,7 @@ unsigned long REGPARAM2 op_4679_0_comp_ff(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4680_0_comp_ff(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4680_0_comp_ff(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12917,7 +12917,7 @@ unsigned long REGPARAM2 op_4680_0_comp_ff(uae_u32 opcode) /* NOT */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4690_0_comp_ff(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4690_0_comp_ff(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12937,7 +12937,7 @@ unsigned long REGPARAM2 op_4690_0_comp_ff(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4698_0_comp_ff(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4698_0_comp_ff(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12957,7 +12957,7 @@ unsigned long REGPARAM2 op_4698_0_comp_ff(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_46a0_0_comp_ff(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_46a0_0_comp_ff(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12978,7 +12978,7 @@ unsigned long REGPARAM2 op_46a0_0_comp_ff(uae_u32 opcode) /* NOT */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_46a8_0_comp_ff(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_46a8_0_comp_ff(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -12998,7 +12998,7 @@ unsigned long REGPARAM2 op_46a8_0_comp_ff(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_46b0_0_comp_ff(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_46b0_0_comp_ff(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -13017,7 +13017,7 @@ unsigned long REGPARAM2 op_46b0_0_comp_ff(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_46b8_0_comp_ff(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_46b8_0_comp_ff(uae_u32 opcode) /* NOT */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -13035,7 +13035,7 @@ unsigned long REGPARAM2 op_46b8_0_comp_ff(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_46b9_0_comp_ff(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_46b9_0_comp_ff(uae_u32 opcode) /* NOT */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -13053,7 +13053,7 @@ unsigned long REGPARAM2 op_46b9_0_comp_ff(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4808_0_comp_ff(uae_u32 opcode) /* LINK */ +uae_u32 REGPARAM2 op_4808_0_comp_ff(uae_u32 opcode) /* LINK */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -13074,7 +13074,7 @@ unsigned long REGPARAM2 op_4808_0_comp_ff(uae_u32 opcode) /* LINK */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4840_0_comp_ff(uae_u32 opcode) /* SWAP */ +uae_u32 REGPARAM2 op_4840_0_comp_ff(uae_u32 opcode) /* SWAP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -13091,7 +13091,7 @@ if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4850_0_comp_ff(uae_u32 opcode) /* PEA */ +uae_u32 REGPARAM2 op_4850_0_comp_ff(uae_u32 opcode) /* PEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -13110,7 +13110,7 @@ if (srcreg==7) dodgy=1; }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4868_0_comp_ff(uae_u32 opcode) /* PEA */ +uae_u32 REGPARAM2 op_4868_0_comp_ff(uae_u32 opcode) /* PEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -13129,7 +13129,7 @@ if (srcreg==7) dodgy=1; }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4870_0_comp_ff(uae_u32 opcode) /* PEA */ +uae_u32 REGPARAM2 op_4870_0_comp_ff(uae_u32 opcode) /* PEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -13147,7 +13147,7 @@ if (srcreg==7) dodgy=1; }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4878_0_comp_ff(uae_u32 opcode) /* PEA */ +uae_u32 REGPARAM2 op_4878_0_comp_ff(uae_u32 opcode) /* PEA */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -13163,7 +13163,7 @@ unsigned long REGPARAM2 op_4878_0_comp_ff(uae_u32 opcode) /* PEA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4879_0_comp_ff(uae_u32 opcode) /* PEA */ +uae_u32 REGPARAM2 op_4879_0_comp_ff(uae_u32 opcode) /* PEA */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -13179,7 +13179,7 @@ unsigned long REGPARAM2 op_4879_0_comp_ff(uae_u32 opcode) /* PEA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_487a_0_comp_ff(uae_u32 opcode) /* PEA */ +uae_u32 REGPARAM2 op_487a_0_comp_ff(uae_u32 opcode) /* PEA */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -13197,7 +13197,7 @@ unsigned long REGPARAM2 op_487a_0_comp_ff(uae_u32 opcode) /* PEA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_487b_0_comp_ff(uae_u32 opcode) /* PEA */ +uae_u32 REGPARAM2 op_487b_0_comp_ff(uae_u32 opcode) /* PEA */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -13216,7 +13216,7 @@ unsigned long REGPARAM2 op_487b_0_comp_ff(uae_u32 opcode) /* PEA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4880_0_comp_ff(uae_u32 opcode) /* EXT */ +uae_u32 REGPARAM2 op_4880_0_comp_ff(uae_u32 opcode) /* EXT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -13233,7 +13233,7 @@ unsigned long REGPARAM2 op_4880_0_comp_ff(uae_u32 opcode) /* EXT */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4890_0_comp_ff(uae_u32 opcode) /* MVMLE */ +uae_u32 REGPARAM2 op_4890_0_comp_ff(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -13266,7 +13266,7 @@ unsigned long REGPARAM2 op_4890_0_comp_ff(uae_u32 opcode) /* MVMLE */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_48a0_0_comp_ff(uae_u32 opcode) /* MVMLE */ +uae_u32 REGPARAM2 op_48a0_0_comp_ff(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -13300,7 +13300,7 @@ unsigned long REGPARAM2 op_48a0_0_comp_ff(uae_u32 opcode) /* MVMLE */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_48a8_0_comp_ff(uae_u32 opcode) /* MVMLE */ +uae_u32 REGPARAM2 op_48a8_0_comp_ff(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -13333,7 +13333,7 @@ unsigned long REGPARAM2 op_48a8_0_comp_ff(uae_u32 opcode) /* MVMLE */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_48b0_0_comp_ff(uae_u32 opcode) /* MVMLE */ +uae_u32 REGPARAM2 op_48b0_0_comp_ff(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -13365,7 +13365,7 @@ unsigned long REGPARAM2 op_48b0_0_comp_ff(uae_u32 opcode) /* MVMLE */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_48b8_0_comp_ff(uae_u32 opcode) /* MVMLE */ +uae_u32 REGPARAM2 op_48b8_0_comp_ff(uae_u32 opcode) /* MVMLE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -13396,7 +13396,7 @@ unsigned long REGPARAM2 op_48b8_0_comp_ff(uae_u32 opcode) /* MVMLE */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_48b9_0_comp_ff(uae_u32 opcode) /* MVMLE */ +uae_u32 REGPARAM2 op_48b9_0_comp_ff(uae_u32 opcode) /* MVMLE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -13427,7 +13427,7 @@ unsigned long REGPARAM2 op_48b9_0_comp_ff(uae_u32 opcode) /* MVMLE */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_48c0_0_comp_ff(uae_u32 opcode) /* EXT */ +uae_u32 REGPARAM2 op_48c0_0_comp_ff(uae_u32 opcode) /* EXT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -13444,7 +13444,7 @@ unsigned long REGPARAM2 op_48c0_0_comp_ff(uae_u32 opcode) /* EXT */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_48d0_0_comp_ff(uae_u32 opcode) /* MVMLE */ +uae_u32 REGPARAM2 op_48d0_0_comp_ff(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -13477,7 +13477,7 @@ unsigned long REGPARAM2 op_48d0_0_comp_ff(uae_u32 opcode) /* MVMLE */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_48e0_0_comp_ff(uae_u32 opcode) /* MVMLE */ +uae_u32 REGPARAM2 op_48e0_0_comp_ff(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -13511,7 +13511,7 @@ unsigned long REGPARAM2 op_48e0_0_comp_ff(uae_u32 opcode) /* MVMLE */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_48e8_0_comp_ff(uae_u32 opcode) /* MVMLE */ +uae_u32 REGPARAM2 op_48e8_0_comp_ff(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -13544,7 +13544,7 @@ unsigned long REGPARAM2 op_48e8_0_comp_ff(uae_u32 opcode) /* MVMLE */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_48f0_0_comp_ff(uae_u32 opcode) /* MVMLE */ +uae_u32 REGPARAM2 op_48f0_0_comp_ff(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -13576,7 +13576,7 @@ unsigned long REGPARAM2 op_48f0_0_comp_ff(uae_u32 opcode) /* MVMLE */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_48f8_0_comp_ff(uae_u32 opcode) /* MVMLE */ +uae_u32 REGPARAM2 op_48f8_0_comp_ff(uae_u32 opcode) /* MVMLE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -13607,7 +13607,7 @@ unsigned long REGPARAM2 op_48f8_0_comp_ff(uae_u32 opcode) /* MVMLE */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_48f9_0_comp_ff(uae_u32 opcode) /* MVMLE */ +uae_u32 REGPARAM2 op_48f9_0_comp_ff(uae_u32 opcode) /* MVMLE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -13638,7 +13638,7 @@ unsigned long REGPARAM2 op_48f9_0_comp_ff(uae_u32 opcode) /* MVMLE */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_49c0_0_comp_ff(uae_u32 opcode) /* EXT */ +uae_u32 REGPARAM2 op_49c0_0_comp_ff(uae_u32 opcode) /* EXT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -13655,7 +13655,7 @@ unsigned long REGPARAM2 op_49c0_0_comp_ff(uae_u32 opcode) /* EXT */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a00_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a00_0_comp_ff(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -13669,7 +13669,7 @@ unsigned long REGPARAM2 op_4a00_0_comp_ff(uae_u32 opcode) /* TST */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a10_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a10_0_comp_ff(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -13687,7 +13687,7 @@ unsigned long REGPARAM2 op_4a10_0_comp_ff(uae_u32 opcode) /* TST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a18_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a18_0_comp_ff(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -13705,7 +13705,7 @@ unsigned long REGPARAM2 op_4a18_0_comp_ff(uae_u32 opcode) /* TST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a20_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a20_0_comp_ff(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -13724,7 +13724,7 @@ unsigned long REGPARAM2 op_4a20_0_comp_ff(uae_u32 opcode) /* TST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a28_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a28_0_comp_ff(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -13742,7 +13742,7 @@ unsigned long REGPARAM2 op_4a28_0_comp_ff(uae_u32 opcode) /* TST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a30_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a30_0_comp_ff(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -13759,7 +13759,7 @@ unsigned long REGPARAM2 op_4a30_0_comp_ff(uae_u32 opcode) /* TST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a38_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a38_0_comp_ff(uae_u32 opcode) /* TST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -13775,7 +13775,7 @@ unsigned long REGPARAM2 op_4a38_0_comp_ff(uae_u32 opcode) /* TST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a39_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a39_0_comp_ff(uae_u32 opcode) /* TST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -13791,7 +13791,7 @@ unsigned long REGPARAM2 op_4a39_0_comp_ff(uae_u32 opcode) /* TST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a3a_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a3a_0_comp_ff(uae_u32 opcode) /* TST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -13809,7 +13809,7 @@ unsigned long REGPARAM2 op_4a3a_0_comp_ff(uae_u32 opcode) /* TST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a3b_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a3b_0_comp_ff(uae_u32 opcode) /* TST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -13828,7 +13828,7 @@ unsigned long REGPARAM2 op_4a3b_0_comp_ff(uae_u32 opcode) /* TST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a3c_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a3c_0_comp_ff(uae_u32 opcode) /* TST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -13842,7 +13842,7 @@ unsigned long REGPARAM2 op_4a3c_0_comp_ff(uae_u32 opcode) /* TST */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a40_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a40_0_comp_ff(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -13856,7 +13856,7 @@ unsigned long REGPARAM2 op_4a40_0_comp_ff(uae_u32 opcode) /* TST */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a48_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a48_0_comp_ff(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -13872,7 +13872,7 @@ unsigned long REGPARAM2 op_4a48_0_comp_ff(uae_u32 opcode) /* TST */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a50_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a50_0_comp_ff(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -13890,7 +13890,7 @@ unsigned long REGPARAM2 op_4a50_0_comp_ff(uae_u32 opcode) /* TST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a58_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a58_0_comp_ff(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -13908,7 +13908,7 @@ unsigned long REGPARAM2 op_4a58_0_comp_ff(uae_u32 opcode) /* TST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a60_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a60_0_comp_ff(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -13927,7 +13927,7 @@ unsigned long REGPARAM2 op_4a60_0_comp_ff(uae_u32 opcode) /* TST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a68_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a68_0_comp_ff(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -13945,7 +13945,7 @@ unsigned long REGPARAM2 op_4a68_0_comp_ff(uae_u32 opcode) /* TST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a70_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a70_0_comp_ff(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -13962,7 +13962,7 @@ unsigned long REGPARAM2 op_4a70_0_comp_ff(uae_u32 opcode) /* TST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a78_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a78_0_comp_ff(uae_u32 opcode) /* TST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -13978,7 +13978,7 @@ unsigned long REGPARAM2 op_4a78_0_comp_ff(uae_u32 opcode) /* TST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a79_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a79_0_comp_ff(uae_u32 opcode) /* TST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -13994,7 +13994,7 @@ unsigned long REGPARAM2 op_4a79_0_comp_ff(uae_u32 opcode) /* TST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a7a_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a7a_0_comp_ff(uae_u32 opcode) /* TST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -14012,7 +14012,7 @@ unsigned long REGPARAM2 op_4a7a_0_comp_ff(uae_u32 opcode) /* TST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a7b_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a7b_0_comp_ff(uae_u32 opcode) /* TST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -14031,7 +14031,7 @@ unsigned long REGPARAM2 op_4a7b_0_comp_ff(uae_u32 opcode) /* TST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a7c_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a7c_0_comp_ff(uae_u32 opcode) /* TST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -14045,7 +14045,7 @@ unsigned long REGPARAM2 op_4a7c_0_comp_ff(uae_u32 opcode) /* TST */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a80_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a80_0_comp_ff(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -14059,7 +14059,7 @@ unsigned long REGPARAM2 op_4a80_0_comp_ff(uae_u32 opcode) /* TST */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a88_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a88_0_comp_ff(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -14075,7 +14075,7 @@ unsigned long REGPARAM2 op_4a88_0_comp_ff(uae_u32 opcode) /* TST */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a90_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a90_0_comp_ff(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -14093,7 +14093,7 @@ unsigned long REGPARAM2 op_4a90_0_comp_ff(uae_u32 opcode) /* TST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a98_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a98_0_comp_ff(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -14111,7 +14111,7 @@ unsigned long REGPARAM2 op_4a98_0_comp_ff(uae_u32 opcode) /* TST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4aa0_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4aa0_0_comp_ff(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -14130,7 +14130,7 @@ unsigned long REGPARAM2 op_4aa0_0_comp_ff(uae_u32 opcode) /* TST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4aa8_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4aa8_0_comp_ff(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -14148,7 +14148,7 @@ unsigned long REGPARAM2 op_4aa8_0_comp_ff(uae_u32 opcode) /* TST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4ab0_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4ab0_0_comp_ff(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -14165,7 +14165,7 @@ unsigned long REGPARAM2 op_4ab0_0_comp_ff(uae_u32 opcode) /* TST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4ab8_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4ab8_0_comp_ff(uae_u32 opcode) /* TST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -14181,7 +14181,7 @@ unsigned long REGPARAM2 op_4ab8_0_comp_ff(uae_u32 opcode) /* TST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4ab9_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4ab9_0_comp_ff(uae_u32 opcode) /* TST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -14197,7 +14197,7 @@ unsigned long REGPARAM2 op_4ab9_0_comp_ff(uae_u32 opcode) /* TST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4aba_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4aba_0_comp_ff(uae_u32 opcode) /* TST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -14215,7 +14215,7 @@ unsigned long REGPARAM2 op_4aba_0_comp_ff(uae_u32 opcode) /* TST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4abb_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4abb_0_comp_ff(uae_u32 opcode) /* TST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -14234,7 +14234,7 @@ unsigned long REGPARAM2 op_4abb_0_comp_ff(uae_u32 opcode) /* TST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4abc_0_comp_ff(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4abc_0_comp_ff(uae_u32 opcode) /* TST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -14248,7 +14248,7 @@ unsigned long REGPARAM2 op_4abc_0_comp_ff(uae_u32 opcode) /* TST */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4c00_0_comp_ff(uae_u32 opcode) /* MULL */ +uae_u32 REGPARAM2 op_4c00_0_comp_ff(uae_u32 opcode) /* MULL */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -14278,7 +14278,7 @@ unsigned long REGPARAM2 op_4c00_0_comp_ff(uae_u32 opcode) /* MULL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4c10_0_comp_ff(uae_u32 opcode) /* MULL */ +uae_u32 REGPARAM2 op_4c10_0_comp_ff(uae_u32 opcode) /* MULL */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -14312,7 +14312,7 @@ unsigned long REGPARAM2 op_4c10_0_comp_ff(uae_u32 opcode) /* MULL */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4c18_0_comp_ff(uae_u32 opcode) /* MULL */ +uae_u32 REGPARAM2 op_4c18_0_comp_ff(uae_u32 opcode) /* MULL */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -14346,7 +14346,7 @@ unsigned long REGPARAM2 op_4c18_0_comp_ff(uae_u32 opcode) /* MULL */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4c20_0_comp_ff(uae_u32 opcode) /* MULL */ +uae_u32 REGPARAM2 op_4c20_0_comp_ff(uae_u32 opcode) /* MULL */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -14381,7 +14381,7 @@ unsigned long REGPARAM2 op_4c20_0_comp_ff(uae_u32 opcode) /* MULL */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4c28_0_comp_ff(uae_u32 opcode) /* MULL */ +uae_u32 REGPARAM2 op_4c28_0_comp_ff(uae_u32 opcode) /* MULL */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -14415,7 +14415,7 @@ unsigned long REGPARAM2 op_4c28_0_comp_ff(uae_u32 opcode) /* MULL */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4c30_0_comp_ff(uae_u32 opcode) /* MULL */ +uae_u32 REGPARAM2 op_4c30_0_comp_ff(uae_u32 opcode) /* MULL */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -14448,7 +14448,7 @@ unsigned long REGPARAM2 op_4c30_0_comp_ff(uae_u32 opcode) /* MULL */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4c38_0_comp_ff(uae_u32 opcode) /* MULL */ +uae_u32 REGPARAM2 op_4c38_0_comp_ff(uae_u32 opcode) /* MULL */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -14480,7 +14480,7 @@ unsigned long REGPARAM2 op_4c38_0_comp_ff(uae_u32 opcode) /* MULL */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4c39_0_comp_ff(uae_u32 opcode) /* MULL */ +uae_u32 REGPARAM2 op_4c39_0_comp_ff(uae_u32 opcode) /* MULL */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -14512,7 +14512,7 @@ unsigned long REGPARAM2 op_4c39_0_comp_ff(uae_u32 opcode) /* MULL */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4c3a_0_comp_ff(uae_u32 opcode) /* MULL */ +uae_u32 REGPARAM2 op_4c3a_0_comp_ff(uae_u32 opcode) /* MULL */ { uae_s32 dstreg = 2; uae_u32 dodgy=0; @@ -14547,7 +14547,7 @@ unsigned long REGPARAM2 op_4c3a_0_comp_ff(uae_u32 opcode) /* MULL */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4c3b_0_comp_ff(uae_u32 opcode) /* MULL */ +uae_u32 REGPARAM2 op_4c3b_0_comp_ff(uae_u32 opcode) /* MULL */ { uae_s32 dstreg = 3; uae_u32 dodgy=0; @@ -14583,7 +14583,7 @@ unsigned long REGPARAM2 op_4c3b_0_comp_ff(uae_u32 opcode) /* MULL */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4c3c_0_comp_ff(uae_u32 opcode) /* MULL */ +uae_u32 REGPARAM2 op_4c3c_0_comp_ff(uae_u32 opcode) /* MULL */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -14613,7 +14613,7 @@ unsigned long REGPARAM2 op_4c3c_0_comp_ff(uae_u32 opcode) /* MULL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4c90_0_comp_ff(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4c90_0_comp_ff(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -14647,7 +14647,7 @@ unsigned long REGPARAM2 op_4c90_0_comp_ff(uae_u32 opcode) /* MVMEL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4c98_0_comp_ff(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4c98_0_comp_ff(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -14682,7 +14682,7 @@ unsigned long REGPARAM2 op_4c98_0_comp_ff(uae_u32 opcode) /* MVMEL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4ca8_0_comp_ff(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4ca8_0_comp_ff(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -14716,7 +14716,7 @@ unsigned long REGPARAM2 op_4ca8_0_comp_ff(uae_u32 opcode) /* MVMEL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4cb0_0_comp_ff(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4cb0_0_comp_ff(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -14749,7 +14749,7 @@ unsigned long REGPARAM2 op_4cb0_0_comp_ff(uae_u32 opcode) /* MVMEL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4cb8_0_comp_ff(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4cb8_0_comp_ff(uae_u32 opcode) /* MVMEL */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -14781,7 +14781,7 @@ unsigned long REGPARAM2 op_4cb8_0_comp_ff(uae_u32 opcode) /* MVMEL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4cb9_0_comp_ff(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4cb9_0_comp_ff(uae_u32 opcode) /* MVMEL */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -14813,7 +14813,7 @@ unsigned long REGPARAM2 op_4cb9_0_comp_ff(uae_u32 opcode) /* MVMEL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4cba_0_comp_ff(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4cba_0_comp_ff(uae_u32 opcode) /* MVMEL */ { uae_s32 dstreg = 2; uae_u32 dodgy=0; @@ -14848,7 +14848,7 @@ unsigned long REGPARAM2 op_4cba_0_comp_ff(uae_u32 opcode) /* MVMEL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4cbb_0_comp_ff(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4cbb_0_comp_ff(uae_u32 opcode) /* MVMEL */ { uae_s32 dstreg = 3; uae_u32 dodgy=0; @@ -14884,7 +14884,7 @@ unsigned long REGPARAM2 op_4cbb_0_comp_ff(uae_u32 opcode) /* MVMEL */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4cd0_0_comp_ff(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4cd0_0_comp_ff(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -14918,7 +14918,7 @@ unsigned long REGPARAM2 op_4cd0_0_comp_ff(uae_u32 opcode) /* MVMEL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4cd8_0_comp_ff(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4cd8_0_comp_ff(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -14953,7 +14953,7 @@ unsigned long REGPARAM2 op_4cd8_0_comp_ff(uae_u32 opcode) /* MVMEL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4ce8_0_comp_ff(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4ce8_0_comp_ff(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -14987,7 +14987,7 @@ unsigned long REGPARAM2 op_4ce8_0_comp_ff(uae_u32 opcode) /* MVMEL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4cf0_0_comp_ff(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4cf0_0_comp_ff(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -15020,7 +15020,7 @@ unsigned long REGPARAM2 op_4cf0_0_comp_ff(uae_u32 opcode) /* MVMEL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4cf8_0_comp_ff(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4cf8_0_comp_ff(uae_u32 opcode) /* MVMEL */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -15052,7 +15052,7 @@ unsigned long REGPARAM2 op_4cf8_0_comp_ff(uae_u32 opcode) /* MVMEL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4cf9_0_comp_ff(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4cf9_0_comp_ff(uae_u32 opcode) /* MVMEL */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -15084,7 +15084,7 @@ unsigned long REGPARAM2 op_4cf9_0_comp_ff(uae_u32 opcode) /* MVMEL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4cfa_0_comp_ff(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4cfa_0_comp_ff(uae_u32 opcode) /* MVMEL */ { uae_s32 dstreg = 2; uae_u32 dodgy=0; @@ -15119,7 +15119,7 @@ unsigned long REGPARAM2 op_4cfa_0_comp_ff(uae_u32 opcode) /* MVMEL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4cfb_0_comp_ff(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4cfb_0_comp_ff(uae_u32 opcode) /* MVMEL */ { uae_s32 dstreg = 3; uae_u32 dodgy=0; @@ -15155,7 +15155,7 @@ unsigned long REGPARAM2 op_4cfb_0_comp_ff(uae_u32 opcode) /* MVMEL */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4e50_0_comp_ff(uae_u32 opcode) /* LINK */ +uae_u32 REGPARAM2 op_4e50_0_comp_ff(uae_u32 opcode) /* LINK */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -15176,7 +15176,7 @@ unsigned long REGPARAM2 op_4e50_0_comp_ff(uae_u32 opcode) /* LINK */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4e58_0_comp_ff(uae_u32 opcode) /* UNLK */ +uae_u32 REGPARAM2 op_4e58_0_comp_ff(uae_u32 opcode) /* UNLK */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -15194,7 +15194,7 @@ unsigned long REGPARAM2 op_4e58_0_comp_ff(uae_u32 opcode) /* UNLK */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4e71_0_comp_ff(uae_u32 opcode) /* NOP */ +uae_u32 REGPARAM2 op_4e71_0_comp_ff(uae_u32 opcode) /* NOP */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -15203,7 +15203,7 @@ unsigned long REGPARAM2 op_4e71_0_comp_ff(uae_u32 opcode) /* NOP */ } if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4e74_0_comp_ff(uae_u32 opcode) /* RTD */ +uae_u32 REGPARAM2 op_4e74_0_comp_ff(uae_u32 opcode) /* RTD */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -15222,7 +15222,7 @@ unsigned long REGPARAM2 op_4e74_0_comp_ff(uae_u32 opcode) /* RTD */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4e75_0_comp_ff(uae_u32 opcode) /* RTS */ +uae_u32 REGPARAM2 op_4e75_0_comp_ff(uae_u32 opcode) /* RTS */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -15238,7 +15238,7 @@ unsigned long REGPARAM2 op_4e75_0_comp_ff(uae_u32 opcode) /* RTS */ } if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4e90_0_comp_ff(uae_u32 opcode) /* JSR */ +uae_u32 REGPARAM2 op_4e90_0_comp_ff(uae_u32 opcode) /* JSR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -15260,7 +15260,7 @@ unsigned long REGPARAM2 op_4e90_0_comp_ff(uae_u32 opcode) /* JSR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4ea8_0_comp_ff(uae_u32 opcode) /* JSR */ +uae_u32 REGPARAM2 op_4ea8_0_comp_ff(uae_u32 opcode) /* JSR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -15282,7 +15282,7 @@ unsigned long REGPARAM2 op_4ea8_0_comp_ff(uae_u32 opcode) /* JSR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4eb0_0_comp_ff(uae_u32 opcode) /* JSR */ +uae_u32 REGPARAM2 op_4eb0_0_comp_ff(uae_u32 opcode) /* JSR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -15303,7 +15303,7 @@ unsigned long REGPARAM2 op_4eb0_0_comp_ff(uae_u32 opcode) /* JSR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4eb8_0_comp_ff(uae_u32 opcode) /* JSR */ +uae_u32 REGPARAM2 op_4eb8_0_comp_ff(uae_u32 opcode) /* JSR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -15323,7 +15323,7 @@ unsigned long REGPARAM2 op_4eb8_0_comp_ff(uae_u32 opcode) /* JSR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4eb9_0_comp_ff(uae_u32 opcode) /* JSR */ +uae_u32 REGPARAM2 op_4eb9_0_comp_ff(uae_u32 opcode) /* JSR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -15343,7 +15343,7 @@ unsigned long REGPARAM2 op_4eb9_0_comp_ff(uae_u32 opcode) /* JSR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4eba_0_comp_ff(uae_u32 opcode) /* JSR */ +uae_u32 REGPARAM2 op_4eba_0_comp_ff(uae_u32 opcode) /* JSR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -15365,7 +15365,7 @@ unsigned long REGPARAM2 op_4eba_0_comp_ff(uae_u32 opcode) /* JSR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4ebb_0_comp_ff(uae_u32 opcode) /* JSR */ +uae_u32 REGPARAM2 op_4ebb_0_comp_ff(uae_u32 opcode) /* JSR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -15388,7 +15388,7 @@ unsigned long REGPARAM2 op_4ebb_0_comp_ff(uae_u32 opcode) /* JSR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4ed0_0_comp_ff(uae_u32 opcode) /* JMP */ +uae_u32 REGPARAM2 op_4ed0_0_comp_ff(uae_u32 opcode) /* JMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -15405,7 +15405,7 @@ unsigned long REGPARAM2 op_4ed0_0_comp_ff(uae_u32 opcode) /* JMP */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4ee8_0_comp_ff(uae_u32 opcode) /* JMP */ +uae_u32 REGPARAM2 op_4ee8_0_comp_ff(uae_u32 opcode) /* JMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -15422,7 +15422,7 @@ unsigned long REGPARAM2 op_4ee8_0_comp_ff(uae_u32 opcode) /* JMP */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4ef0_0_comp_ff(uae_u32 opcode) /* JMP */ +uae_u32 REGPARAM2 op_4ef0_0_comp_ff(uae_u32 opcode) /* JMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -15438,7 +15438,7 @@ unsigned long REGPARAM2 op_4ef0_0_comp_ff(uae_u32 opcode) /* JMP */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4ef8_0_comp_ff(uae_u32 opcode) /* JMP */ +uae_u32 REGPARAM2 op_4ef8_0_comp_ff(uae_u32 opcode) /* JMP */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -15453,7 +15453,7 @@ unsigned long REGPARAM2 op_4ef8_0_comp_ff(uae_u32 opcode) /* JMP */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4ef9_0_comp_ff(uae_u32 opcode) /* JMP */ +uae_u32 REGPARAM2 op_4ef9_0_comp_ff(uae_u32 opcode) /* JMP */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -15468,7 +15468,7 @@ unsigned long REGPARAM2 op_4ef9_0_comp_ff(uae_u32 opcode) /* JMP */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4efa_0_comp_ff(uae_u32 opcode) /* JMP */ +uae_u32 REGPARAM2 op_4efa_0_comp_ff(uae_u32 opcode) /* JMP */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -15485,7 +15485,7 @@ unsigned long REGPARAM2 op_4efa_0_comp_ff(uae_u32 opcode) /* JMP */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4efb_0_comp_ff(uae_u32 opcode) /* JMP */ +uae_u32 REGPARAM2 op_4efb_0_comp_ff(uae_u32 opcode) /* JMP */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -15503,7 +15503,7 @@ unsigned long REGPARAM2 op_4efb_0_comp_ff(uae_u32 opcode) /* JMP */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5000_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5000_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -15524,7 +15524,7 @@ unsigned long REGPARAM2 op_5000_0_comp_ff(uae_u32 opcode) /* ADD */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5010_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5010_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -15548,7 +15548,7 @@ unsigned long REGPARAM2 op_5010_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5018_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5018_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -15572,7 +15572,7 @@ unsigned long REGPARAM2 op_5018_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5020_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5020_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -15597,7 +15597,7 @@ unsigned long REGPARAM2 op_5020_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5028_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5028_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -15621,7 +15621,7 @@ unsigned long REGPARAM2 op_5028_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5030_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5030_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -15644,7 +15644,7 @@ unsigned long REGPARAM2 op_5030_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5038_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5038_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dodgy=0; @@ -15666,7 +15666,7 @@ unsigned long REGPARAM2 op_5038_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5039_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5039_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dodgy=0; @@ -15688,7 +15688,7 @@ unsigned long REGPARAM2 op_5039_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5040_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5040_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -15709,7 +15709,7 @@ unsigned long REGPARAM2 op_5040_0_comp_ff(uae_u32 opcode) /* ADD */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5048_0_comp_ff(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_5048_0_comp_ff(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -15728,7 +15728,7 @@ unsigned long REGPARAM2 op_5048_0_comp_ff(uae_u32 opcode) /* ADDA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5050_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5050_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -15752,7 +15752,7 @@ unsigned long REGPARAM2 op_5050_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5058_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5058_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -15776,7 +15776,7 @@ unsigned long REGPARAM2 op_5058_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5060_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5060_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -15801,7 +15801,7 @@ unsigned long REGPARAM2 op_5060_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5068_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5068_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -15825,7 +15825,7 @@ unsigned long REGPARAM2 op_5068_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5070_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5070_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -15848,7 +15848,7 @@ unsigned long REGPARAM2 op_5070_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5078_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5078_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dodgy=0; @@ -15870,7 +15870,7 @@ unsigned long REGPARAM2 op_5078_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5079_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5079_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dodgy=0; @@ -15892,7 +15892,7 @@ unsigned long REGPARAM2 op_5079_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5080_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5080_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -15913,7 +15913,7 @@ unsigned long REGPARAM2 op_5080_0_comp_ff(uae_u32 opcode) /* ADD */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5088_0_comp_ff(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_5088_0_comp_ff(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -15932,10 +15932,7 @@ unsigned long REGPARAM2 op_5088_0_comp_ff(uae_u32 opcode) /* ADDA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -#endif - -#ifdef PART_5 -unsigned long REGPARAM2 op_5090_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5090_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -15959,7 +15956,7 @@ unsigned long REGPARAM2 op_5090_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5098_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5098_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -15983,7 +15980,10 @@ unsigned long REGPARAM2 op_5098_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_50a0_0_comp_ff(uae_u32 opcode) /* ADD */ +#endif + +#ifdef PART_5 +uae_u32 REGPARAM2 op_50a0_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16008,7 +16008,7 @@ unsigned long REGPARAM2 op_50a0_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_50a8_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_50a8_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16032,7 +16032,7 @@ unsigned long REGPARAM2 op_50a8_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_50b0_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_50b0_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16055,7 +16055,7 @@ unsigned long REGPARAM2 op_50b0_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_50b8_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_50b8_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dodgy=0; @@ -16077,7 +16077,7 @@ unsigned long REGPARAM2 op_50b8_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_50b9_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_50b9_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dodgy=0; @@ -16099,7 +16099,7 @@ unsigned long REGPARAM2 op_50b9_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_50c0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_50c0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -16114,7 +16114,7 @@ unsigned long REGPARAM2 op_50c0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_50c8_0_comp_ff(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_50c8_0_comp_ff(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -16135,7 +16135,7 @@ unsigned long REGPARAM2 op_50c8_0_comp_ff(uae_u32 opcode) /* DBcc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_50d0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_50d0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -16151,7 +16151,7 @@ unsigned long REGPARAM2 op_50d0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_50d8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_50d8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -16167,7 +16167,7 @@ unsigned long REGPARAM2 op_50d8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_50e0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_50e0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -16184,7 +16184,7 @@ unsigned long REGPARAM2 op_50e0_0_comp_ff(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_50e8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_50e8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -16200,7 +16200,7 @@ unsigned long REGPARAM2 op_50e8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_50f0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_50f0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -16215,7 +16215,7 @@ unsigned long REGPARAM2 op_50f0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_50f8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_50f8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -16229,7 +16229,7 @@ unsigned long REGPARAM2 op_50f8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_50f9_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_50f9_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -16243,7 +16243,7 @@ unsigned long REGPARAM2 op_50f9_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5100_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5100_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16264,7 +16264,7 @@ unsigned long REGPARAM2 op_5100_0_comp_ff(uae_u32 opcode) /* SUB */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5110_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5110_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16288,7 +16288,7 @@ unsigned long REGPARAM2 op_5110_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5118_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5118_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16312,7 +16312,7 @@ unsigned long REGPARAM2 op_5118_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5120_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5120_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16337,7 +16337,7 @@ unsigned long REGPARAM2 op_5120_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5128_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5128_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16361,7 +16361,7 @@ unsigned long REGPARAM2 op_5128_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5130_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5130_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16384,7 +16384,7 @@ unsigned long REGPARAM2 op_5130_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5138_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5138_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dodgy=0; @@ -16406,7 +16406,7 @@ unsigned long REGPARAM2 op_5138_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5139_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5139_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dodgy=0; @@ -16428,7 +16428,7 @@ unsigned long REGPARAM2 op_5139_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5140_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5140_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16449,7 +16449,7 @@ unsigned long REGPARAM2 op_5140_0_comp_ff(uae_u32 opcode) /* SUB */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5148_0_comp_ff(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_5148_0_comp_ff(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16468,7 +16468,7 @@ unsigned long REGPARAM2 op_5148_0_comp_ff(uae_u32 opcode) /* SUBA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5150_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5150_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16492,7 +16492,7 @@ unsigned long REGPARAM2 op_5150_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5158_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5158_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16516,7 +16516,7 @@ unsigned long REGPARAM2 op_5158_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5160_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5160_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16541,7 +16541,7 @@ unsigned long REGPARAM2 op_5160_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5168_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5168_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16565,7 +16565,7 @@ unsigned long REGPARAM2 op_5168_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5170_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5170_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16588,7 +16588,7 @@ unsigned long REGPARAM2 op_5170_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5178_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5178_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dodgy=0; @@ -16610,7 +16610,7 @@ unsigned long REGPARAM2 op_5178_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5179_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5179_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dodgy=0; @@ -16632,7 +16632,7 @@ unsigned long REGPARAM2 op_5179_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5180_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5180_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16653,7 +16653,7 @@ unsigned long REGPARAM2 op_5180_0_comp_ff(uae_u32 opcode) /* SUB */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5188_0_comp_ff(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_5188_0_comp_ff(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16672,7 +16672,7 @@ unsigned long REGPARAM2 op_5188_0_comp_ff(uae_u32 opcode) /* SUBA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5190_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5190_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16696,7 +16696,7 @@ unsigned long REGPARAM2 op_5190_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5198_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5198_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16720,7 +16720,7 @@ unsigned long REGPARAM2 op_5198_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_51a0_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_51a0_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16745,7 +16745,7 @@ unsigned long REGPARAM2 op_51a0_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_51a8_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_51a8_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16769,7 +16769,7 @@ unsigned long REGPARAM2 op_51a8_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_51b0_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_51b0_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -16792,7 +16792,7 @@ unsigned long REGPARAM2 op_51b0_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_51b8_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_51b8_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dodgy=0; @@ -16814,7 +16814,7 @@ unsigned long REGPARAM2 op_51b8_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_51b9_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_51b9_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dodgy=0; @@ -16836,7 +16836,7 @@ unsigned long REGPARAM2 op_51b9_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_51c0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_51c0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -16851,7 +16851,7 @@ unsigned long REGPARAM2 op_51c0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_51c8_0_comp_ff(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_51c8_0_comp_ff(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -16877,7 +16877,7 @@ unsigned long REGPARAM2 op_51c8_0_comp_ff(uae_u32 opcode) /* DBcc */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_51d0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_51d0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -16893,7 +16893,7 @@ unsigned long REGPARAM2 op_51d0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_51d8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_51d8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -16909,7 +16909,7 @@ unsigned long REGPARAM2 op_51d8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_51e0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_51e0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -16926,7 +16926,7 @@ unsigned long REGPARAM2 op_51e0_0_comp_ff(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_51e8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_51e8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -16942,7 +16942,7 @@ unsigned long REGPARAM2 op_51e8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_51f0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_51f0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -16957,7 +16957,7 @@ unsigned long REGPARAM2 op_51f0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_51f8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_51f8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -16971,7 +16971,7 @@ unsigned long REGPARAM2 op_51f8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_51f9_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_51f9_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -16985,7 +16985,7 @@ unsigned long REGPARAM2 op_51f9_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_52c0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_52c0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17001,7 +17001,7 @@ unsigned long REGPARAM2 op_52c0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_52c8_0_comp_ff(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_52c8_0_comp_ff(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17027,7 +17027,7 @@ unsigned long REGPARAM2 op_52c8_0_comp_ff(uae_u32 opcode) /* DBcc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_52d0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_52d0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17044,7 +17044,7 @@ unsigned long REGPARAM2 op_52d0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_52d8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_52d8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17061,7 +17061,7 @@ unsigned long REGPARAM2 op_52d8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_52e0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_52e0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17079,7 +17079,7 @@ unsigned long REGPARAM2 op_52e0_0_comp_ff(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_52e8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_52e8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17096,7 +17096,7 @@ unsigned long REGPARAM2 op_52e8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_52f0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_52f0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17112,7 +17112,7 @@ unsigned long REGPARAM2 op_52f0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_52f8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_52f8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -17127,7 +17127,7 @@ unsigned long REGPARAM2 op_52f8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_52f9_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_52f9_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -17142,7 +17142,7 @@ unsigned long REGPARAM2 op_52f9_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_53c0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_53c0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17158,7 +17158,7 @@ unsigned long REGPARAM2 op_53c0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_53c8_0_comp_ff(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_53c8_0_comp_ff(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17184,7 +17184,7 @@ unsigned long REGPARAM2 op_53c8_0_comp_ff(uae_u32 opcode) /* DBcc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_53d0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_53d0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17201,7 +17201,7 @@ unsigned long REGPARAM2 op_53d0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_53d8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_53d8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17218,7 +17218,7 @@ unsigned long REGPARAM2 op_53d8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_53e0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_53e0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17236,7 +17236,7 @@ unsigned long REGPARAM2 op_53e0_0_comp_ff(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_53e8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_53e8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17253,7 +17253,7 @@ unsigned long REGPARAM2 op_53e8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_53f0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_53f0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17269,7 +17269,7 @@ unsigned long REGPARAM2 op_53f0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_53f8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_53f8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -17284,7 +17284,7 @@ unsigned long REGPARAM2 op_53f8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_53f9_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_53f9_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -17299,7 +17299,7 @@ unsigned long REGPARAM2 op_53f9_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_54c0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_54c0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17315,7 +17315,7 @@ unsigned long REGPARAM2 op_54c0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_54c8_0_comp_ff(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_54c8_0_comp_ff(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17341,7 +17341,7 @@ unsigned long REGPARAM2 op_54c8_0_comp_ff(uae_u32 opcode) /* DBcc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_54d0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_54d0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17358,7 +17358,7 @@ unsigned long REGPARAM2 op_54d0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_54d8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_54d8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17375,7 +17375,7 @@ unsigned long REGPARAM2 op_54d8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_54e0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_54e0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17393,7 +17393,7 @@ unsigned long REGPARAM2 op_54e0_0_comp_ff(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_54e8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_54e8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17410,7 +17410,7 @@ unsigned long REGPARAM2 op_54e8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_54f0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_54f0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17426,7 +17426,7 @@ unsigned long REGPARAM2 op_54f0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_54f8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_54f8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -17441,7 +17441,7 @@ unsigned long REGPARAM2 op_54f8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_54f9_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_54f9_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -17456,7 +17456,7 @@ unsigned long REGPARAM2 op_54f9_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_55c0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_55c0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17472,7 +17472,7 @@ unsigned long REGPARAM2 op_55c0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_55c8_0_comp_ff(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_55c8_0_comp_ff(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17498,7 +17498,7 @@ unsigned long REGPARAM2 op_55c8_0_comp_ff(uae_u32 opcode) /* DBcc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_55d0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_55d0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17515,7 +17515,7 @@ unsigned long REGPARAM2 op_55d0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_55d8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_55d8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17532,7 +17532,7 @@ unsigned long REGPARAM2 op_55d8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_55e0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_55e0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17550,7 +17550,7 @@ unsigned long REGPARAM2 op_55e0_0_comp_ff(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_55e8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_55e8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17567,7 +17567,7 @@ unsigned long REGPARAM2 op_55e8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_55f0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_55f0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17583,7 +17583,7 @@ unsigned long REGPARAM2 op_55f0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_55f8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_55f8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -17598,7 +17598,7 @@ unsigned long REGPARAM2 op_55f8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_55f9_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_55f9_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -17613,7 +17613,7 @@ unsigned long REGPARAM2 op_55f9_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_56c0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_56c0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17629,7 +17629,7 @@ unsigned long REGPARAM2 op_56c0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_56c8_0_comp_ff(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_56c8_0_comp_ff(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17655,7 +17655,7 @@ unsigned long REGPARAM2 op_56c8_0_comp_ff(uae_u32 opcode) /* DBcc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_56d0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_56d0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17672,7 +17672,7 @@ unsigned long REGPARAM2 op_56d0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_56d8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_56d8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17689,7 +17689,7 @@ unsigned long REGPARAM2 op_56d8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_56e0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_56e0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17707,7 +17707,7 @@ unsigned long REGPARAM2 op_56e0_0_comp_ff(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_56e8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_56e8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17724,7 +17724,7 @@ unsigned long REGPARAM2 op_56e8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_56f0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_56f0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17740,7 +17740,7 @@ unsigned long REGPARAM2 op_56f0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_56f8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_56f8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -17755,7 +17755,7 @@ unsigned long REGPARAM2 op_56f8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_56f9_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_56f9_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -17770,7 +17770,7 @@ unsigned long REGPARAM2 op_56f9_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_57c0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_57c0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17786,7 +17786,7 @@ unsigned long REGPARAM2 op_57c0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_57c8_0_comp_ff(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_57c8_0_comp_ff(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17812,7 +17812,7 @@ unsigned long REGPARAM2 op_57c8_0_comp_ff(uae_u32 opcode) /* DBcc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_57d0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_57d0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17829,7 +17829,7 @@ unsigned long REGPARAM2 op_57d0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_57d8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_57d8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17846,7 +17846,7 @@ unsigned long REGPARAM2 op_57d8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_57e0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_57e0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17864,7 +17864,7 @@ unsigned long REGPARAM2 op_57e0_0_comp_ff(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_57e8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_57e8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17881,7 +17881,7 @@ unsigned long REGPARAM2 op_57e8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_57f0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_57f0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17897,7 +17897,7 @@ unsigned long REGPARAM2 op_57f0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_57f8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_57f8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -17912,7 +17912,7 @@ unsigned long REGPARAM2 op_57f8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_57f9_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_57f9_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -17927,7 +17927,7 @@ unsigned long REGPARAM2 op_57f9_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_58c0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_58c0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17943,7 +17943,7 @@ unsigned long REGPARAM2 op_58c0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_58c8_0_comp_ff(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_58c8_0_comp_ff(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17969,7 +17969,7 @@ unsigned long REGPARAM2 op_58c8_0_comp_ff(uae_u32 opcode) /* DBcc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_58d0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_58d0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -17986,7 +17986,7 @@ unsigned long REGPARAM2 op_58d0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_58d8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_58d8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18003,7 +18003,7 @@ unsigned long REGPARAM2 op_58d8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_58e0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_58e0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18021,7 +18021,7 @@ unsigned long REGPARAM2 op_58e0_0_comp_ff(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_58e8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_58e8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18038,7 +18038,7 @@ unsigned long REGPARAM2 op_58e8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_58f0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_58f0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18054,7 +18054,7 @@ unsigned long REGPARAM2 op_58f0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_58f8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_58f8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -18069,7 +18069,7 @@ unsigned long REGPARAM2 op_58f8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_58f9_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_58f9_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -18084,7 +18084,7 @@ unsigned long REGPARAM2 op_58f9_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_59c0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_59c0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18100,7 +18100,7 @@ unsigned long REGPARAM2 op_59c0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_59c8_0_comp_ff(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_59c8_0_comp_ff(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18126,7 +18126,7 @@ unsigned long REGPARAM2 op_59c8_0_comp_ff(uae_u32 opcode) /* DBcc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_59d0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_59d0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18143,7 +18143,7 @@ unsigned long REGPARAM2 op_59d0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_59d8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_59d8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18160,7 +18160,7 @@ unsigned long REGPARAM2 op_59d8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_59e0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_59e0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18178,7 +18178,7 @@ unsigned long REGPARAM2 op_59e0_0_comp_ff(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_59e8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_59e8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18195,7 +18195,7 @@ unsigned long REGPARAM2 op_59e8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_59f0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_59f0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18211,7 +18211,7 @@ unsigned long REGPARAM2 op_59f0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_59f8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_59f8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -18226,7 +18226,7 @@ unsigned long REGPARAM2 op_59f8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_59f9_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_59f9_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -18241,7 +18241,7 @@ unsigned long REGPARAM2 op_59f9_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ac0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ac0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18257,7 +18257,7 @@ unsigned long REGPARAM2 op_5ac0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ac8_0_comp_ff(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_5ac8_0_comp_ff(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18283,7 +18283,7 @@ unsigned long REGPARAM2 op_5ac8_0_comp_ff(uae_u32 opcode) /* DBcc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ad0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ad0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18300,7 +18300,7 @@ unsigned long REGPARAM2 op_5ad0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ad8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ad8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18317,7 +18317,7 @@ unsigned long REGPARAM2 op_5ad8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ae0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ae0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18335,7 +18335,7 @@ unsigned long REGPARAM2 op_5ae0_0_comp_ff(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ae8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ae8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18352,7 +18352,7 @@ unsigned long REGPARAM2 op_5ae8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5af0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5af0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18368,7 +18368,7 @@ unsigned long REGPARAM2 op_5af0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5af8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5af8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -18383,7 +18383,7 @@ unsigned long REGPARAM2 op_5af8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5af9_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5af9_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -18398,7 +18398,7 @@ unsigned long REGPARAM2 op_5af9_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5bc0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5bc0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18414,7 +18414,7 @@ unsigned long REGPARAM2 op_5bc0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5bc8_0_comp_ff(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_5bc8_0_comp_ff(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18440,7 +18440,7 @@ unsigned long REGPARAM2 op_5bc8_0_comp_ff(uae_u32 opcode) /* DBcc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5bd0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5bd0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18457,7 +18457,7 @@ unsigned long REGPARAM2 op_5bd0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5bd8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5bd8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18474,7 +18474,7 @@ unsigned long REGPARAM2 op_5bd8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5be0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5be0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18492,7 +18492,7 @@ unsigned long REGPARAM2 op_5be0_0_comp_ff(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5be8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5be8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18509,7 +18509,7 @@ unsigned long REGPARAM2 op_5be8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5bf0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5bf0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18525,7 +18525,7 @@ unsigned long REGPARAM2 op_5bf0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5bf8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5bf8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -18540,7 +18540,7 @@ unsigned long REGPARAM2 op_5bf8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5bf9_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5bf9_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -18555,7 +18555,7 @@ unsigned long REGPARAM2 op_5bf9_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5cc0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5cc0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18571,7 +18571,7 @@ unsigned long REGPARAM2 op_5cc0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5cc8_0_comp_ff(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_5cc8_0_comp_ff(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18597,7 +18597,7 @@ unsigned long REGPARAM2 op_5cc8_0_comp_ff(uae_u32 opcode) /* DBcc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5cd0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5cd0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18614,7 +18614,7 @@ unsigned long REGPARAM2 op_5cd0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5cd8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5cd8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18631,7 +18631,7 @@ unsigned long REGPARAM2 op_5cd8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ce0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ce0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18649,7 +18649,7 @@ unsigned long REGPARAM2 op_5ce0_0_comp_ff(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ce8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ce8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18666,7 +18666,7 @@ unsigned long REGPARAM2 op_5ce8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5cf0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5cf0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18682,7 +18682,7 @@ unsigned long REGPARAM2 op_5cf0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5cf8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5cf8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -18697,7 +18697,7 @@ unsigned long REGPARAM2 op_5cf8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5cf9_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5cf9_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -18712,7 +18712,7 @@ unsigned long REGPARAM2 op_5cf9_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5dc0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5dc0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18728,7 +18728,7 @@ unsigned long REGPARAM2 op_5dc0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5dc8_0_comp_ff(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_5dc8_0_comp_ff(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18754,7 +18754,7 @@ unsigned long REGPARAM2 op_5dc8_0_comp_ff(uae_u32 opcode) /* DBcc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5dd0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5dd0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18771,7 +18771,7 @@ unsigned long REGPARAM2 op_5dd0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5dd8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5dd8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18788,7 +18788,7 @@ unsigned long REGPARAM2 op_5dd8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5de0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5de0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18806,7 +18806,7 @@ unsigned long REGPARAM2 op_5de0_0_comp_ff(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5de8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5de8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18823,7 +18823,7 @@ unsigned long REGPARAM2 op_5de8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5df0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5df0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18839,7 +18839,7 @@ unsigned long REGPARAM2 op_5df0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5df8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5df8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -18854,7 +18854,7 @@ unsigned long REGPARAM2 op_5df8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5df9_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5df9_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -18869,7 +18869,7 @@ unsigned long REGPARAM2 op_5df9_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ec0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ec0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18885,7 +18885,7 @@ unsigned long REGPARAM2 op_5ec0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ec8_0_comp_ff(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_5ec8_0_comp_ff(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18911,7 +18911,7 @@ unsigned long REGPARAM2 op_5ec8_0_comp_ff(uae_u32 opcode) /* DBcc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ed0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ed0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18928,7 +18928,7 @@ unsigned long REGPARAM2 op_5ed0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ed8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ed8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18945,7 +18945,7 @@ unsigned long REGPARAM2 op_5ed8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ee0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ee0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18963,7 +18963,7 @@ unsigned long REGPARAM2 op_5ee0_0_comp_ff(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ee8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ee8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18980,7 +18980,7 @@ unsigned long REGPARAM2 op_5ee8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ef0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ef0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -18996,7 +18996,7 @@ unsigned long REGPARAM2 op_5ef0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ef8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ef8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -19011,7 +19011,7 @@ unsigned long REGPARAM2 op_5ef8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ef9_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ef9_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -19026,7 +19026,7 @@ unsigned long REGPARAM2 op_5ef9_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5fc0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5fc0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -19042,7 +19042,7 @@ unsigned long REGPARAM2 op_5fc0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5fc8_0_comp_ff(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_5fc8_0_comp_ff(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -19068,7 +19068,7 @@ unsigned long REGPARAM2 op_5fc8_0_comp_ff(uae_u32 opcode) /* DBcc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5fd0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5fd0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -19085,7 +19085,7 @@ unsigned long REGPARAM2 op_5fd0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5fd8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5fd8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -19102,7 +19102,7 @@ unsigned long REGPARAM2 op_5fd8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5fe0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5fe0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -19120,7 +19120,7 @@ unsigned long REGPARAM2 op_5fe0_0_comp_ff(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5fe8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5fe8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -19137,7 +19137,7 @@ unsigned long REGPARAM2 op_5fe8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ff0_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ff0_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -19153,7 +19153,7 @@ unsigned long REGPARAM2 op_5ff0_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ff8_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ff8_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -19168,7 +19168,7 @@ unsigned long REGPARAM2 op_5ff8_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ff9_0_comp_ff(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ff9_0_comp_ff(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -19183,7 +19183,7 @@ unsigned long REGPARAM2 op_5ff9_0_comp_ff(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6000_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6000_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -19203,7 +19203,7 @@ unsigned long REGPARAM2 op_6000_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6001_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6001_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dodgy=0; @@ -19224,7 +19224,7 @@ unsigned long REGPARAM2 op_6001_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_60ff_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_60ff_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -19244,7 +19244,7 @@ unsigned long REGPARAM2 op_60ff_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6100_0_comp_ff(uae_u32 opcode) /* BSR */ +uae_u32 REGPARAM2 op_6100_0_comp_ff(uae_u32 opcode) /* BSR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -19264,7 +19264,7 @@ unsigned long REGPARAM2 op_6100_0_comp_ff(uae_u32 opcode) /* BSR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6101_0_comp_ff(uae_u32 opcode) /* BSR */ +uae_u32 REGPARAM2 op_6101_0_comp_ff(uae_u32 opcode) /* BSR */ { uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dodgy=0; @@ -19285,7 +19285,7 @@ unsigned long REGPARAM2 op_6101_0_comp_ff(uae_u32 opcode) /* BSR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_61ff_0_comp_ff(uae_u32 opcode) /* BSR */ +uae_u32 REGPARAM2 op_61ff_0_comp_ff(uae_u32 opcode) /* BSR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -19305,7 +19305,7 @@ unsigned long REGPARAM2 op_61ff_0_comp_ff(uae_u32 opcode) /* BSR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6200_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6200_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -19327,7 +19327,7 @@ unsigned long REGPARAM2 op_6200_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6201_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6201_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dodgy=0; @@ -19350,77 +19350,77 @@ unsigned long REGPARAM2 op_6201_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } +uae_u32 REGPARAM2 op_62ff_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v1, v2; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(src, m68k_pc_offset - m68k_pc_offset_thisinst - 2); + arm_ADD_l_ri(src, (uintptr)comp_pc_p); + mov_l_ri(PC_P, (uintptr)comp_pc_p); + arm_ADD_l_ri(src, m68k_pc_offset); + arm_ADD_l_ri(PC_P, m68k_pc_offset); + m68k_pc_offset = 0; + v1 = get_const(PC_P); + v2 = get_const(src); + register_branch(v1, v2, 8); + make_flags_live(); +}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); +return 0; +} +uae_u32 REGPARAM2 op_6300_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v1, v2; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sub_l_ri(src, m68k_pc_offset - m68k_pc_offset_thisinst - 2); + arm_ADD_l_ri(src, (uintptr)comp_pc_p); + mov_l_ri(PC_P, (uintptr)comp_pc_p); + arm_ADD_l_ri(src, m68k_pc_offset); + arm_ADD_l_ri(PC_P, m68k_pc_offset); + m68k_pc_offset = 0; + v1 = get_const(PC_P); + v2 = get_const(src); + register_branch(v1, v2, 9); + make_flags_live(); +}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); +return 0; +} +uae_u32 REGPARAM2 op_6301_0_comp_ff(uae_u32 opcode) /* Bcc */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v1, v2; +{ int src = scratchie++; + mov_l_ri(src,srcreg); + sub_l_ri(src, m68k_pc_offset - m68k_pc_offset_thisinst - 2); + arm_ADD_l_ri(src, (uintptr)comp_pc_p); + mov_l_ri(PC_P, (uintptr)comp_pc_p); + arm_ADD_l_ri(src, m68k_pc_offset); + arm_ADD_l_ri(PC_P, m68k_pc_offset); + m68k_pc_offset = 0; + v1 = get_const(PC_P); + v2 = get_const(src); + register_branch(v1, v2, 9); + make_flags_live(); +}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); +return 0; +} #endif #ifdef PART_6 -unsigned long REGPARAM2 op_62ff_0_comp_ff(uae_u32 opcode) /* Bcc */ -{ - uae_u32 dodgy=0; - uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; - m68k_pc_offset+=2; -{ uae_u8 scratchie=S1; - uae_u32 v1, v2; -{ int src = scratchie++; - mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); - sub_l_ri(src, m68k_pc_offset - m68k_pc_offset_thisinst - 2); - arm_ADD_l_ri(src, (uintptr)comp_pc_p); - mov_l_ri(PC_P, (uintptr)comp_pc_p); - arm_ADD_l_ri(src, m68k_pc_offset); - arm_ADD_l_ri(PC_P, m68k_pc_offset); - m68k_pc_offset = 0; - v1 = get_const(PC_P); - v2 = get_const(src); - register_branch(v1, v2, 8); - make_flags_live(); -}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); -return 0; -} -unsigned long REGPARAM2 op_6300_0_comp_ff(uae_u32 opcode) /* Bcc */ -{ - uae_u32 dodgy=0; - uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; - m68k_pc_offset+=2; -{ uae_u8 scratchie=S1; - uae_u32 v1, v2; -{ int src = scratchie++; - mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); - sub_l_ri(src, m68k_pc_offset - m68k_pc_offset_thisinst - 2); - arm_ADD_l_ri(src, (uintptr)comp_pc_p); - mov_l_ri(PC_P, (uintptr)comp_pc_p); - arm_ADD_l_ri(src, m68k_pc_offset); - arm_ADD_l_ri(PC_P, m68k_pc_offset); - m68k_pc_offset = 0; - v1 = get_const(PC_P); - v2 = get_const(src); - register_branch(v1, v2, 9); - make_flags_live(); -}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); -return 0; -} -unsigned long REGPARAM2 op_6301_0_comp_ff(uae_u32 opcode) /* Bcc */ -{ - uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); - uae_u32 dodgy=0; - uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; - m68k_pc_offset+=2; -{ uae_u8 scratchie=S1; - uae_u32 v1, v2; -{ int src = scratchie++; - mov_l_ri(src,srcreg); - sub_l_ri(src, m68k_pc_offset - m68k_pc_offset_thisinst - 2); - arm_ADD_l_ri(src, (uintptr)comp_pc_p); - mov_l_ri(PC_P, (uintptr)comp_pc_p); - arm_ADD_l_ri(src, m68k_pc_offset); - arm_ADD_l_ri(PC_P, m68k_pc_offset); - m68k_pc_offset = 0; - v1 = get_const(PC_P); - v2 = get_const(src); - register_branch(v1, v2, 9); - make_flags_live(); -}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); -return 0; -} -unsigned long REGPARAM2 op_63ff_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_63ff_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -19442,7 +19442,7 @@ unsigned long REGPARAM2 op_63ff_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6400_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6400_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -19464,7 +19464,7 @@ unsigned long REGPARAM2 op_6400_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6401_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6401_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dodgy=0; @@ -19487,7 +19487,7 @@ unsigned long REGPARAM2 op_6401_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_64ff_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_64ff_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -19509,7 +19509,7 @@ unsigned long REGPARAM2 op_64ff_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6500_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6500_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -19531,7 +19531,7 @@ unsigned long REGPARAM2 op_6500_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6501_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6501_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dodgy=0; @@ -19554,7 +19554,7 @@ unsigned long REGPARAM2 op_6501_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_65ff_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_65ff_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -19576,7 +19576,7 @@ unsigned long REGPARAM2 op_65ff_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6600_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6600_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -19598,7 +19598,7 @@ unsigned long REGPARAM2 op_6600_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6601_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6601_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dodgy=0; @@ -19621,7 +19621,7 @@ unsigned long REGPARAM2 op_6601_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_66ff_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_66ff_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -19643,7 +19643,7 @@ unsigned long REGPARAM2 op_66ff_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6700_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6700_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -19665,7 +19665,7 @@ unsigned long REGPARAM2 op_6700_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6701_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6701_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dodgy=0; @@ -19688,7 +19688,7 @@ unsigned long REGPARAM2 op_6701_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_67ff_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_67ff_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -19710,7 +19710,7 @@ unsigned long REGPARAM2 op_67ff_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6a00_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6a00_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -19732,7 +19732,7 @@ unsigned long REGPARAM2 op_6a00_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6a01_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6a01_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dodgy=0; @@ -19755,7 +19755,7 @@ unsigned long REGPARAM2 op_6a01_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6aff_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6aff_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -19777,7 +19777,7 @@ unsigned long REGPARAM2 op_6aff_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6b00_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6b00_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -19799,7 +19799,7 @@ unsigned long REGPARAM2 op_6b00_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6b01_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6b01_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dodgy=0; @@ -19822,7 +19822,7 @@ unsigned long REGPARAM2 op_6b01_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6bff_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6bff_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -19844,7 +19844,7 @@ unsigned long REGPARAM2 op_6bff_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6c00_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6c00_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -19866,7 +19866,7 @@ unsigned long REGPARAM2 op_6c00_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6c01_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6c01_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dodgy=0; @@ -19889,7 +19889,7 @@ unsigned long REGPARAM2 op_6c01_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6cff_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6cff_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -19911,7 +19911,7 @@ unsigned long REGPARAM2 op_6cff_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6d00_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6d00_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -19933,7 +19933,7 @@ unsigned long REGPARAM2 op_6d00_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6d01_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6d01_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dodgy=0; @@ -19956,7 +19956,7 @@ unsigned long REGPARAM2 op_6d01_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6dff_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6dff_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -19978,7 +19978,7 @@ unsigned long REGPARAM2 op_6dff_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6e00_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6e00_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -20000,7 +20000,7 @@ unsigned long REGPARAM2 op_6e00_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6e01_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6e01_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dodgy=0; @@ -20023,7 +20023,7 @@ unsigned long REGPARAM2 op_6e01_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6eff_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6eff_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -20045,7 +20045,7 @@ unsigned long REGPARAM2 op_6eff_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6f00_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6f00_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -20067,7 +20067,7 @@ unsigned long REGPARAM2 op_6f00_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6f01_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6f01_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dodgy=0; @@ -20090,7 +20090,7 @@ unsigned long REGPARAM2 op_6f01_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6fff_0_comp_ff(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6fff_0_comp_ff(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -20112,7 +20112,7 @@ unsigned long REGPARAM2 op_6fff_0_comp_ff(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_7000_0_comp_ff(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_7000_0_comp_ff(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dstreg = (opcode >> 9) & 7; @@ -20132,7 +20132,7 @@ unsigned long REGPARAM2 op_7000_0_comp_ff(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8000_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8000_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -20151,7 +20151,7 @@ unsigned long REGPARAM2 op_8000_0_comp_ff(uae_u32 opcode) /* OR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8010_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8010_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -20174,7 +20174,7 @@ unsigned long REGPARAM2 op_8010_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8018_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8018_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -20197,7 +20197,7 @@ unsigned long REGPARAM2 op_8018_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8020_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8020_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -20221,7 +20221,7 @@ unsigned long REGPARAM2 op_8020_0_comp_ff(uae_u32 opcode) /* OR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8028_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8028_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -20244,7 +20244,7 @@ unsigned long REGPARAM2 op_8028_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8030_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8030_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -20266,7 +20266,7 @@ unsigned long REGPARAM2 op_8030_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8038_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8038_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -20287,7 +20287,7 @@ unsigned long REGPARAM2 op_8038_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8039_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8039_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -20308,7 +20308,7 @@ unsigned long REGPARAM2 op_8039_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_803a_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_803a_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -20331,7 +20331,7 @@ unsigned long REGPARAM2 op_803a_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_803b_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_803b_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -20355,7 +20355,7 @@ unsigned long REGPARAM2 op_803b_0_comp_ff(uae_u32 opcode) /* OR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_803c_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_803c_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -20374,7 +20374,7 @@ unsigned long REGPARAM2 op_803c_0_comp_ff(uae_u32 opcode) /* OR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8040_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8040_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -20393,7 +20393,7 @@ unsigned long REGPARAM2 op_8040_0_comp_ff(uae_u32 opcode) /* OR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8050_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8050_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -20416,7 +20416,7 @@ unsigned long REGPARAM2 op_8050_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8058_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8058_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -20439,7 +20439,7 @@ unsigned long REGPARAM2 op_8058_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8060_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8060_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -20463,7 +20463,7 @@ unsigned long REGPARAM2 op_8060_0_comp_ff(uae_u32 opcode) /* OR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8068_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8068_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -20486,7 +20486,7 @@ unsigned long REGPARAM2 op_8068_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8070_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8070_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -20508,7 +20508,7 @@ unsigned long REGPARAM2 op_8070_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8078_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8078_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -20529,7 +20529,7 @@ unsigned long REGPARAM2 op_8078_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8079_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8079_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -20550,7 +20550,7 @@ unsigned long REGPARAM2 op_8079_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_807a_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_807a_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -20573,7 +20573,7 @@ unsigned long REGPARAM2 op_807a_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_807b_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_807b_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -20597,7 +20597,7 @@ unsigned long REGPARAM2 op_807b_0_comp_ff(uae_u32 opcode) /* OR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_807c_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_807c_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -20616,7 +20616,7 @@ unsigned long REGPARAM2 op_807c_0_comp_ff(uae_u32 opcode) /* OR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8080_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8080_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -20635,7 +20635,7 @@ unsigned long REGPARAM2 op_8080_0_comp_ff(uae_u32 opcode) /* OR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8090_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8090_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -20658,7 +20658,7 @@ unsigned long REGPARAM2 op_8090_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8098_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8098_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -20681,7 +20681,7 @@ unsigned long REGPARAM2 op_8098_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_80a0_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_80a0_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -20705,7 +20705,7 @@ unsigned long REGPARAM2 op_80a0_0_comp_ff(uae_u32 opcode) /* OR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_80a8_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_80a8_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -20728,7 +20728,7 @@ unsigned long REGPARAM2 op_80a8_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_80b0_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_80b0_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -20750,7 +20750,7 @@ unsigned long REGPARAM2 op_80b0_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_80b8_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_80b8_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -20771,7 +20771,7 @@ unsigned long REGPARAM2 op_80b8_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_80b9_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_80b9_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -20792,7 +20792,7 @@ unsigned long REGPARAM2 op_80b9_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_80ba_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_80ba_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -20815,7 +20815,7 @@ unsigned long REGPARAM2 op_80ba_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_80bb_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_80bb_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -20839,7 +20839,7 @@ unsigned long REGPARAM2 op_80bb_0_comp_ff(uae_u32 opcode) /* OR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_80bc_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_80bc_0_comp_ff(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -20858,7 +20858,7 @@ unsigned long REGPARAM2 op_80bc_0_comp_ff(uae_u32 opcode) /* OR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8110_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8110_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -20880,7 +20880,7 @@ unsigned long REGPARAM2 op_8110_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8118_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8118_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -20902,7 +20902,7 @@ unsigned long REGPARAM2 op_8118_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8120_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8120_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -20925,7 +20925,7 @@ unsigned long REGPARAM2 op_8120_0_comp_ff(uae_u32 opcode) /* OR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8128_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8128_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -20947,7 +20947,7 @@ unsigned long REGPARAM2 op_8128_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8130_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8130_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -20968,7 +20968,7 @@ unsigned long REGPARAM2 op_8130_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8138_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8138_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -20988,7 +20988,7 @@ unsigned long REGPARAM2 op_8138_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8139_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8139_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -21008,7 +21008,7 @@ unsigned long REGPARAM2 op_8139_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8150_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8150_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -21030,7 +21030,7 @@ unsigned long REGPARAM2 op_8150_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8158_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8158_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -21052,7 +21052,7 @@ unsigned long REGPARAM2 op_8158_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8160_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8160_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -21075,7 +21075,7 @@ unsigned long REGPARAM2 op_8160_0_comp_ff(uae_u32 opcode) /* OR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8168_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8168_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -21097,7 +21097,7 @@ unsigned long REGPARAM2 op_8168_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8170_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8170_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -21118,7 +21118,7 @@ unsigned long REGPARAM2 op_8170_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8178_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8178_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -21138,7 +21138,7 @@ unsigned long REGPARAM2 op_8178_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8179_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8179_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -21158,7 +21158,7 @@ unsigned long REGPARAM2 op_8179_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8190_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8190_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -21180,7 +21180,7 @@ unsigned long REGPARAM2 op_8190_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8198_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8198_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -21202,7 +21202,7 @@ unsigned long REGPARAM2 op_8198_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_81a0_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_81a0_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -21225,7 +21225,7 @@ unsigned long REGPARAM2 op_81a0_0_comp_ff(uae_u32 opcode) /* OR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_81a8_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_81a8_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -21247,7 +21247,7 @@ unsigned long REGPARAM2 op_81a8_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_81b0_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_81b0_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -21268,7 +21268,7 @@ unsigned long REGPARAM2 op_81b0_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_81b8_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_81b8_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -21288,7 +21288,7 @@ unsigned long REGPARAM2 op_81b8_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_81b9_0_comp_ff(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_81b9_0_comp_ff(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -21308,7 +21308,7 @@ unsigned long REGPARAM2 op_81b9_0_comp_ff(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9000_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9000_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21328,7 +21328,7 @@ unsigned long REGPARAM2 op_9000_0_comp_ff(uae_u32 opcode) /* SUB */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9010_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9010_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21352,7 +21352,7 @@ unsigned long REGPARAM2 op_9010_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9018_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9018_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21376,7 +21376,7 @@ unsigned long REGPARAM2 op_9018_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9020_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9020_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21401,7 +21401,7 @@ unsigned long REGPARAM2 op_9020_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9028_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9028_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21425,7 +21425,7 @@ unsigned long REGPARAM2 op_9028_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9030_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9030_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21448,7 +21448,7 @@ unsigned long REGPARAM2 op_9030_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9038_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9038_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -21470,7 +21470,7 @@ unsigned long REGPARAM2 op_9038_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9039_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9039_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -21492,7 +21492,7 @@ unsigned long REGPARAM2 op_9039_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_903a_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_903a_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -21516,7 +21516,7 @@ unsigned long REGPARAM2 op_903a_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_903b_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_903b_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -21541,7 +21541,7 @@ unsigned long REGPARAM2 op_903b_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_903c_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_903c_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -21561,7 +21561,7 @@ unsigned long REGPARAM2 op_903c_0_comp_ff(uae_u32 opcode) /* SUB */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9040_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9040_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21581,7 +21581,7 @@ unsigned long REGPARAM2 op_9040_0_comp_ff(uae_u32 opcode) /* SUB */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9048_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9048_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21603,7 +21603,7 @@ unsigned long REGPARAM2 op_9048_0_comp_ff(uae_u32 opcode) /* SUB */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9050_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9050_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21627,7 +21627,7 @@ unsigned long REGPARAM2 op_9050_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9058_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9058_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21651,7 +21651,7 @@ unsigned long REGPARAM2 op_9058_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9060_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9060_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21676,7 +21676,7 @@ unsigned long REGPARAM2 op_9060_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9068_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9068_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21700,7 +21700,7 @@ unsigned long REGPARAM2 op_9068_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9070_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9070_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21723,7 +21723,7 @@ unsigned long REGPARAM2 op_9070_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9078_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9078_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -21745,7 +21745,7 @@ unsigned long REGPARAM2 op_9078_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9079_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9079_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -21767,7 +21767,7 @@ unsigned long REGPARAM2 op_9079_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_907a_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_907a_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -21791,7 +21791,7 @@ unsigned long REGPARAM2 op_907a_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_907b_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_907b_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -21816,7 +21816,7 @@ unsigned long REGPARAM2 op_907b_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_907c_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_907c_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -21836,7 +21836,7 @@ unsigned long REGPARAM2 op_907c_0_comp_ff(uae_u32 opcode) /* SUB */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9080_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9080_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21856,7 +21856,7 @@ unsigned long REGPARAM2 op_9080_0_comp_ff(uae_u32 opcode) /* SUB */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9088_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9088_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21878,7 +21878,7 @@ unsigned long REGPARAM2 op_9088_0_comp_ff(uae_u32 opcode) /* SUB */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9090_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9090_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21902,7 +21902,7 @@ unsigned long REGPARAM2 op_9090_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9098_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9098_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21926,7 +21926,7 @@ unsigned long REGPARAM2 op_9098_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90a0_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_90a0_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21951,7 +21951,7 @@ unsigned long REGPARAM2 op_90a0_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90a8_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_90a8_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21975,7 +21975,7 @@ unsigned long REGPARAM2 op_90a8_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90b0_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_90b0_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -21998,7 +21998,7 @@ unsigned long REGPARAM2 op_90b0_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90b8_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_90b8_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -22020,7 +22020,7 @@ unsigned long REGPARAM2 op_90b8_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90b9_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_90b9_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -22042,7 +22042,7 @@ unsigned long REGPARAM2 op_90b9_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90ba_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_90ba_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -22066,7 +22066,7 @@ unsigned long REGPARAM2 op_90ba_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90bb_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_90bb_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -22091,7 +22091,7 @@ unsigned long REGPARAM2 op_90bb_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90bc_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_90bc_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -22111,7 +22111,7 @@ unsigned long REGPARAM2 op_90bc_0_comp_ff(uae_u32 opcode) /* SUB */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90c0_0_comp_ff(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_90c0_0_comp_ff(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -22129,7 +22129,7 @@ unsigned long REGPARAM2 op_90c0_0_comp_ff(uae_u32 opcode) /* SUBA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90c8_0_comp_ff(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_90c8_0_comp_ff(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -22149,7 +22149,7 @@ unsigned long REGPARAM2 op_90c8_0_comp_ff(uae_u32 opcode) /* SUBA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90d0_0_comp_ff(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_90d0_0_comp_ff(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -22171,7 +22171,7 @@ unsigned long REGPARAM2 op_90d0_0_comp_ff(uae_u32 opcode) /* SUBA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90d8_0_comp_ff(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_90d8_0_comp_ff(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -22193,7 +22193,7 @@ unsigned long REGPARAM2 op_90d8_0_comp_ff(uae_u32 opcode) /* SUBA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90e0_0_comp_ff(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_90e0_0_comp_ff(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -22216,7 +22216,7 @@ unsigned long REGPARAM2 op_90e0_0_comp_ff(uae_u32 opcode) /* SUBA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90e8_0_comp_ff(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_90e8_0_comp_ff(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -22238,7 +22238,7 @@ unsigned long REGPARAM2 op_90e8_0_comp_ff(uae_u32 opcode) /* SUBA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90f0_0_comp_ff(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_90f0_0_comp_ff(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -22259,7 +22259,7 @@ unsigned long REGPARAM2 op_90f0_0_comp_ff(uae_u32 opcode) /* SUBA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90f8_0_comp_ff(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_90f8_0_comp_ff(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -22279,7 +22279,7 @@ unsigned long REGPARAM2 op_90f8_0_comp_ff(uae_u32 opcode) /* SUBA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90f9_0_comp_ff(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_90f9_0_comp_ff(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -22299,7 +22299,7 @@ unsigned long REGPARAM2 op_90f9_0_comp_ff(uae_u32 opcode) /* SUBA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90fa_0_comp_ff(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_90fa_0_comp_ff(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -22321,7 +22321,7 @@ unsigned long REGPARAM2 op_90fa_0_comp_ff(uae_u32 opcode) /* SUBA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90fb_0_comp_ff(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_90fb_0_comp_ff(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -22344,7 +22344,7 @@ unsigned long REGPARAM2 op_90fb_0_comp_ff(uae_u32 opcode) /* SUBA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90fc_0_comp_ff(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_90fc_0_comp_ff(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -22362,7 +22362,7 @@ unsigned long REGPARAM2 op_90fc_0_comp_ff(uae_u32 opcode) /* SUBA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9100_0_comp_ff(uae_u32 opcode) /* SUBX */ +uae_u32 REGPARAM2 op_9100_0_comp_ff(uae_u32 opcode) /* SUBX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -22383,7 +22383,7 @@ if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9108_0_comp_ff(uae_u32 opcode) /* SUBX */ +uae_u32 REGPARAM2 op_9108_0_comp_ff(uae_u32 opcode) /* SUBX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -22413,7 +22413,7 @@ if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); }}}}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9110_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9110_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -22436,7 +22436,7 @@ unsigned long REGPARAM2 op_9110_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9118_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9118_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -22459,7 +22459,7 @@ unsigned long REGPARAM2 op_9118_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9120_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9120_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -22483,7 +22483,7 @@ unsigned long REGPARAM2 op_9120_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9128_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9128_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -22506,7 +22506,7 @@ unsigned long REGPARAM2 op_9128_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9130_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9130_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -22528,7 +22528,7 @@ unsigned long REGPARAM2 op_9130_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9138_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9138_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -22549,7 +22549,7 @@ unsigned long REGPARAM2 op_9138_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9139_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9139_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -22570,7 +22570,7 @@ unsigned long REGPARAM2 op_9139_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9140_0_comp_ff(uae_u32 opcode) /* SUBX */ +uae_u32 REGPARAM2 op_9140_0_comp_ff(uae_u32 opcode) /* SUBX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -22591,7 +22591,7 @@ if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9148_0_comp_ff(uae_u32 opcode) /* SUBX */ +uae_u32 REGPARAM2 op_9148_0_comp_ff(uae_u32 opcode) /* SUBX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -22621,7 +22621,7 @@ if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); }}}}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9150_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9150_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -22644,7 +22644,7 @@ unsigned long REGPARAM2 op_9150_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9158_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9158_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -22667,7 +22667,7 @@ unsigned long REGPARAM2 op_9158_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9160_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9160_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -22691,7 +22691,7 @@ unsigned long REGPARAM2 op_9160_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9168_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9168_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -22714,7 +22714,7 @@ unsigned long REGPARAM2 op_9168_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9170_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9170_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -22736,7 +22736,7 @@ unsigned long REGPARAM2 op_9170_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9178_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9178_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -22757,7 +22757,7 @@ unsigned long REGPARAM2 op_9178_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9179_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9179_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -22778,7 +22778,7 @@ unsigned long REGPARAM2 op_9179_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9180_0_comp_ff(uae_u32 opcode) /* SUBX */ +uae_u32 REGPARAM2 op_9180_0_comp_ff(uae_u32 opcode) /* SUBX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -22799,7 +22799,7 @@ if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9188_0_comp_ff(uae_u32 opcode) /* SUBX */ +uae_u32 REGPARAM2 op_9188_0_comp_ff(uae_u32 opcode) /* SUBX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -22829,7 +22829,7 @@ if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); }}}}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9190_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9190_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -22852,7 +22852,7 @@ unsigned long REGPARAM2 op_9190_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9198_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9198_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -22875,7 +22875,7 @@ unsigned long REGPARAM2 op_9198_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91a0_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_91a0_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -22899,7 +22899,7 @@ unsigned long REGPARAM2 op_91a0_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91a8_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_91a8_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -22922,7 +22922,7 @@ unsigned long REGPARAM2 op_91a8_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91b0_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_91b0_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -22944,7 +22944,7 @@ unsigned long REGPARAM2 op_91b0_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91b8_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_91b8_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -22965,7 +22965,7 @@ unsigned long REGPARAM2 op_91b8_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91b9_0_comp_ff(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_91b9_0_comp_ff(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -22986,7 +22986,7 @@ unsigned long REGPARAM2 op_91b9_0_comp_ff(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91c0_0_comp_ff(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_91c0_0_comp_ff(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23004,7 +23004,7 @@ unsigned long REGPARAM2 op_91c0_0_comp_ff(uae_u32 opcode) /* SUBA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91c8_0_comp_ff(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_91c8_0_comp_ff(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23024,7 +23024,7 @@ unsigned long REGPARAM2 op_91c8_0_comp_ff(uae_u32 opcode) /* SUBA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91d0_0_comp_ff(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_91d0_0_comp_ff(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23046,7 +23046,7 @@ unsigned long REGPARAM2 op_91d0_0_comp_ff(uae_u32 opcode) /* SUBA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91d8_0_comp_ff(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_91d8_0_comp_ff(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23068,7 +23068,7 @@ unsigned long REGPARAM2 op_91d8_0_comp_ff(uae_u32 opcode) /* SUBA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91e0_0_comp_ff(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_91e0_0_comp_ff(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23091,7 +23091,7 @@ unsigned long REGPARAM2 op_91e0_0_comp_ff(uae_u32 opcode) /* SUBA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91e8_0_comp_ff(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_91e8_0_comp_ff(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23113,7 +23113,7 @@ unsigned long REGPARAM2 op_91e8_0_comp_ff(uae_u32 opcode) /* SUBA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91f0_0_comp_ff(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_91f0_0_comp_ff(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23134,7 +23134,7 @@ unsigned long REGPARAM2 op_91f0_0_comp_ff(uae_u32 opcode) /* SUBA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91f8_0_comp_ff(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_91f8_0_comp_ff(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -23154,7 +23154,7 @@ unsigned long REGPARAM2 op_91f8_0_comp_ff(uae_u32 opcode) /* SUBA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91f9_0_comp_ff(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_91f9_0_comp_ff(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -23174,7 +23174,7 @@ unsigned long REGPARAM2 op_91f9_0_comp_ff(uae_u32 opcode) /* SUBA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91fa_0_comp_ff(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_91fa_0_comp_ff(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -23196,7 +23196,7 @@ unsigned long REGPARAM2 op_91fa_0_comp_ff(uae_u32 opcode) /* SUBA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91fb_0_comp_ff(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_91fb_0_comp_ff(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -23219,7 +23219,7 @@ unsigned long REGPARAM2 op_91fb_0_comp_ff(uae_u32 opcode) /* SUBA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91fc_0_comp_ff(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_91fc_0_comp_ff(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -23237,7 +23237,7 @@ unsigned long REGPARAM2 op_91fc_0_comp_ff(uae_u32 opcode) /* SUBA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b000_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b000_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23254,7 +23254,7 @@ unsigned long REGPARAM2 op_b000_0_comp_ff(uae_u32 opcode) /* CMP */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b010_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b010_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23275,7 +23275,7 @@ unsigned long REGPARAM2 op_b010_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b018_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b018_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23296,7 +23296,7 @@ unsigned long REGPARAM2 op_b018_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b020_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b020_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23318,7 +23318,7 @@ unsigned long REGPARAM2 op_b020_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b028_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b028_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23339,7 +23339,7 @@ unsigned long REGPARAM2 op_b028_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b030_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b030_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23359,7 +23359,7 @@ unsigned long REGPARAM2 op_b030_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b038_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b038_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -23378,7 +23378,7 @@ unsigned long REGPARAM2 op_b038_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b039_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b039_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -23397,7 +23397,7 @@ unsigned long REGPARAM2 op_b039_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b03a_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b03a_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -23418,7 +23418,7 @@ unsigned long REGPARAM2 op_b03a_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b03b_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b03b_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -23440,7 +23440,7 @@ unsigned long REGPARAM2 op_b03b_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b03c_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b03c_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -23457,7 +23457,7 @@ unsigned long REGPARAM2 op_b03c_0_comp_ff(uae_u32 opcode) /* CMP */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b040_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b040_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23474,7 +23474,7 @@ unsigned long REGPARAM2 op_b040_0_comp_ff(uae_u32 opcode) /* CMP */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b048_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b048_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23493,7 +23493,7 @@ unsigned long REGPARAM2 op_b048_0_comp_ff(uae_u32 opcode) /* CMP */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b050_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b050_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23514,7 +23514,7 @@ unsigned long REGPARAM2 op_b050_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b058_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b058_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23535,7 +23535,7 @@ unsigned long REGPARAM2 op_b058_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b060_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b060_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23557,7 +23557,7 @@ unsigned long REGPARAM2 op_b060_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b068_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b068_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23578,7 +23578,7 @@ unsigned long REGPARAM2 op_b068_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b070_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b070_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23598,7 +23598,7 @@ unsigned long REGPARAM2 op_b070_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b078_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b078_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -23617,7 +23617,7 @@ unsigned long REGPARAM2 op_b078_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b079_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b079_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -23636,7 +23636,7 @@ unsigned long REGPARAM2 op_b079_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b07a_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b07a_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -23657,7 +23657,7 @@ unsigned long REGPARAM2 op_b07a_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b07b_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b07b_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -23679,7 +23679,7 @@ unsigned long REGPARAM2 op_b07b_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b07c_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b07c_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -23696,7 +23696,7 @@ unsigned long REGPARAM2 op_b07c_0_comp_ff(uae_u32 opcode) /* CMP */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b080_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b080_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23713,7 +23713,7 @@ unsigned long REGPARAM2 op_b080_0_comp_ff(uae_u32 opcode) /* CMP */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b088_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b088_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23732,74 +23732,74 @@ unsigned long REGPARAM2 op_b088_0_comp_ff(uae_u32 opcode) /* CMP */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } +uae_u32 REGPARAM2 op_b090_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); + jff_CMP_l(dst,src); + live_flags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); +return 0; +} +uae_u32 REGPARAM2 op_b098_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + arm_ADD_l_ri8(srcreg+8,4); +{ int dst=dstreg; +{ dont_care_flags(); + jff_CMP_l(dst,src); + live_flags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); +return 0; +} +uae_u32 REGPARAM2 op_b0a0_0_comp_ff(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + arm_SUB_l_ri8(srcreg+8,4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); + jff_CMP_l(dst,src); + live_flags(); + if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); +}}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); +return 0; +} #endif #ifdef PART_7 -unsigned long REGPARAM2 op_b090_0_comp_ff(uae_u32 opcode) /* CMP */ -{ - uae_s32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; - uae_u32 dodgy=0; - uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; - m68k_pc_offset+=2; -{ uae_u8 scratchie=S1; -{ int srca=dodgy?scratchie++:srcreg+8; - if (dodgy) - mov_l_rr(srca,srcreg+8); -{ int src=scratchie++; - readlong(srca,src,scratchie); -{ int dst=dstreg; -{ dont_care_flags(); - jff_CMP_l(dst,src); - live_flags(); - if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); -}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); -return 0; -} -unsigned long REGPARAM2 op_b098_0_comp_ff(uae_u32 opcode) /* CMP */ -{ - uae_s32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; - uae_u32 dodgy=0; - uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; - m68k_pc_offset+=2; -{ uae_u8 scratchie=S1; -{ int srca=scratchie++; - mov_l_rr(srca,srcreg+8); -{ int src=scratchie++; - readlong(srca,src,scratchie); - arm_ADD_l_ri8(srcreg+8,4); -{ int dst=dstreg; -{ dont_care_flags(); - jff_CMP_l(dst,src); - live_flags(); - if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); -}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); -return 0; -} -unsigned long REGPARAM2 op_b0a0_0_comp_ff(uae_u32 opcode) /* CMP */ -{ - uae_s32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; - uae_u32 dodgy=0; - uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; - m68k_pc_offset+=2; -{ uae_u8 scratchie=S1; -{{ int srca=dodgy?scratchie++:srcreg+8; - arm_SUB_l_ri8(srcreg+8,4); - if (dodgy) - mov_l_rr(srca,8+srcreg); -{ int src=scratchie++; - readlong(srca,src,scratchie); -{ int dst=dstreg; -{ dont_care_flags(); - jff_CMP_l(dst,src); - live_flags(); - if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); -}}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); -return 0; -} -unsigned long REGPARAM2 op_b0a8_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b0a8_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23820,7 +23820,7 @@ unsigned long REGPARAM2 op_b0a8_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0b0_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b0b0_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23840,7 +23840,7 @@ unsigned long REGPARAM2 op_b0b0_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0b8_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b0b8_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -23859,7 +23859,7 @@ unsigned long REGPARAM2 op_b0b8_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0b9_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b0b9_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -23878,7 +23878,7 @@ unsigned long REGPARAM2 op_b0b9_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0ba_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b0ba_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -23899,7 +23899,7 @@ unsigned long REGPARAM2 op_b0ba_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0bb_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b0bb_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -23921,7 +23921,7 @@ unsigned long REGPARAM2 op_b0bb_0_comp_ff(uae_u32 opcode) /* CMP */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0bc_0_comp_ff(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b0bc_0_comp_ff(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -23938,7 +23938,7 @@ unsigned long REGPARAM2 op_b0bc_0_comp_ff(uae_u32 opcode) /* CMP */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0c0_0_comp_ff(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b0c0_0_comp_ff(uae_u32 opcode) /* CMPA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23957,7 +23957,7 @@ unsigned long REGPARAM2 op_b0c0_0_comp_ff(uae_u32 opcode) /* CMPA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0c8_0_comp_ff(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b0c8_0_comp_ff(uae_u32 opcode) /* CMPA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -23978,7 +23978,7 @@ unsigned long REGPARAM2 op_b0c8_0_comp_ff(uae_u32 opcode) /* CMPA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0d0_0_comp_ff(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b0d0_0_comp_ff(uae_u32 opcode) /* CMPA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -24001,7 +24001,7 @@ unsigned long REGPARAM2 op_b0d0_0_comp_ff(uae_u32 opcode) /* CMPA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0d8_0_comp_ff(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b0d8_0_comp_ff(uae_u32 opcode) /* CMPA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -24024,7 +24024,7 @@ unsigned long REGPARAM2 op_b0d8_0_comp_ff(uae_u32 opcode) /* CMPA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0e0_0_comp_ff(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b0e0_0_comp_ff(uae_u32 opcode) /* CMPA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -24048,7 +24048,7 @@ unsigned long REGPARAM2 op_b0e0_0_comp_ff(uae_u32 opcode) /* CMPA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0e8_0_comp_ff(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b0e8_0_comp_ff(uae_u32 opcode) /* CMPA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -24071,7 +24071,7 @@ unsigned long REGPARAM2 op_b0e8_0_comp_ff(uae_u32 opcode) /* CMPA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0f0_0_comp_ff(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b0f0_0_comp_ff(uae_u32 opcode) /* CMPA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -24093,7 +24093,7 @@ unsigned long REGPARAM2 op_b0f0_0_comp_ff(uae_u32 opcode) /* CMPA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0f8_0_comp_ff(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b0f8_0_comp_ff(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -24114,7 +24114,7 @@ unsigned long REGPARAM2 op_b0f8_0_comp_ff(uae_u32 opcode) /* CMPA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0f9_0_comp_ff(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b0f9_0_comp_ff(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -24135,7 +24135,7 @@ unsigned long REGPARAM2 op_b0f9_0_comp_ff(uae_u32 opcode) /* CMPA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0fa_0_comp_ff(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b0fa_0_comp_ff(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -24158,7 +24158,7 @@ unsigned long REGPARAM2 op_b0fa_0_comp_ff(uae_u32 opcode) /* CMPA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0fb_0_comp_ff(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b0fb_0_comp_ff(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -24182,7 +24182,7 @@ unsigned long REGPARAM2 op_b0fb_0_comp_ff(uae_u32 opcode) /* CMPA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0fc_0_comp_ff(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b0fc_0_comp_ff(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -24201,7 +24201,7 @@ unsigned long REGPARAM2 op_b0fc_0_comp_ff(uae_u32 opcode) /* CMPA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b100_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b100_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -24220,7 +24220,7 @@ unsigned long REGPARAM2 op_b100_0_comp_ff(uae_u32 opcode) /* EOR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b108_0_comp_ff(uae_u32 opcode) /* CMPM */ +uae_u32 REGPARAM2 op_b108_0_comp_ff(uae_u32 opcode) /* CMPM */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -24245,7 +24245,7 @@ unsigned long REGPARAM2 op_b108_0_comp_ff(uae_u32 opcode) /* CMPM */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b110_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b110_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -24267,7 +24267,7 @@ unsigned long REGPARAM2 op_b110_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b118_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b118_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -24289,7 +24289,7 @@ unsigned long REGPARAM2 op_b118_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b120_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b120_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -24312,7 +24312,7 @@ unsigned long REGPARAM2 op_b120_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b128_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b128_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -24334,7 +24334,7 @@ unsigned long REGPARAM2 op_b128_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b130_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b130_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -24355,7 +24355,7 @@ unsigned long REGPARAM2 op_b130_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b138_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b138_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -24375,7 +24375,7 @@ unsigned long REGPARAM2 op_b138_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b139_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b139_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -24395,7 +24395,7 @@ unsigned long REGPARAM2 op_b139_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b140_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b140_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -24414,7 +24414,7 @@ unsigned long REGPARAM2 op_b140_0_comp_ff(uae_u32 opcode) /* EOR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b148_0_comp_ff(uae_u32 opcode) /* CMPM */ +uae_u32 REGPARAM2 op_b148_0_comp_ff(uae_u32 opcode) /* CMPM */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -24439,7 +24439,7 @@ unsigned long REGPARAM2 op_b148_0_comp_ff(uae_u32 opcode) /* CMPM */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b150_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b150_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -24461,7 +24461,7 @@ unsigned long REGPARAM2 op_b150_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b158_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b158_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -24483,7 +24483,7 @@ unsigned long REGPARAM2 op_b158_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b160_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b160_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -24506,7 +24506,7 @@ unsigned long REGPARAM2 op_b160_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b168_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b168_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -24528,7 +24528,7 @@ unsigned long REGPARAM2 op_b168_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b170_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b170_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -24549,7 +24549,7 @@ unsigned long REGPARAM2 op_b170_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b178_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b178_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -24569,7 +24569,7 @@ unsigned long REGPARAM2 op_b178_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b179_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b179_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -24589,7 +24589,7 @@ unsigned long REGPARAM2 op_b179_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b180_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b180_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -24608,7 +24608,7 @@ unsigned long REGPARAM2 op_b180_0_comp_ff(uae_u32 opcode) /* EOR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b188_0_comp_ff(uae_u32 opcode) /* CMPM */ +uae_u32 REGPARAM2 op_b188_0_comp_ff(uae_u32 opcode) /* CMPM */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -24633,7 +24633,7 @@ unsigned long REGPARAM2 op_b188_0_comp_ff(uae_u32 opcode) /* CMPM */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b190_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b190_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -24655,7 +24655,7 @@ unsigned long REGPARAM2 op_b190_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b198_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b198_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -24677,7 +24677,7 @@ unsigned long REGPARAM2 op_b198_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1a0_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b1a0_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -24700,7 +24700,7 @@ unsigned long REGPARAM2 op_b1a0_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1a8_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b1a8_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -24722,7 +24722,7 @@ unsigned long REGPARAM2 op_b1a8_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1b0_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b1b0_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -24743,7 +24743,7 @@ unsigned long REGPARAM2 op_b1b0_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1b8_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b1b8_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -24763,7 +24763,7 @@ unsigned long REGPARAM2 op_b1b8_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1b9_0_comp_ff(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b1b9_0_comp_ff(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -24783,7 +24783,7 @@ unsigned long REGPARAM2 op_b1b9_0_comp_ff(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1c0_0_comp_ff(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b1c0_0_comp_ff(uae_u32 opcode) /* CMPA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -24802,7 +24802,7 @@ unsigned long REGPARAM2 op_b1c0_0_comp_ff(uae_u32 opcode) /* CMPA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1c8_0_comp_ff(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b1c8_0_comp_ff(uae_u32 opcode) /* CMPA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -24823,7 +24823,7 @@ unsigned long REGPARAM2 op_b1c8_0_comp_ff(uae_u32 opcode) /* CMPA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1d0_0_comp_ff(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b1d0_0_comp_ff(uae_u32 opcode) /* CMPA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -24846,7 +24846,7 @@ unsigned long REGPARAM2 op_b1d0_0_comp_ff(uae_u32 opcode) /* CMPA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1d8_0_comp_ff(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b1d8_0_comp_ff(uae_u32 opcode) /* CMPA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -24869,7 +24869,7 @@ unsigned long REGPARAM2 op_b1d8_0_comp_ff(uae_u32 opcode) /* CMPA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1e0_0_comp_ff(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b1e0_0_comp_ff(uae_u32 opcode) /* CMPA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -24893,7 +24893,7 @@ unsigned long REGPARAM2 op_b1e0_0_comp_ff(uae_u32 opcode) /* CMPA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1e8_0_comp_ff(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b1e8_0_comp_ff(uae_u32 opcode) /* CMPA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -24916,7 +24916,7 @@ unsigned long REGPARAM2 op_b1e8_0_comp_ff(uae_u32 opcode) /* CMPA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1f0_0_comp_ff(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b1f0_0_comp_ff(uae_u32 opcode) /* CMPA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -24938,7 +24938,7 @@ unsigned long REGPARAM2 op_b1f0_0_comp_ff(uae_u32 opcode) /* CMPA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1f8_0_comp_ff(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b1f8_0_comp_ff(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -24959,7 +24959,7 @@ unsigned long REGPARAM2 op_b1f8_0_comp_ff(uae_u32 opcode) /* CMPA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1f9_0_comp_ff(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b1f9_0_comp_ff(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -24980,7 +24980,7 @@ unsigned long REGPARAM2 op_b1f9_0_comp_ff(uae_u32 opcode) /* CMPA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1fa_0_comp_ff(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b1fa_0_comp_ff(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -25003,7 +25003,7 @@ unsigned long REGPARAM2 op_b1fa_0_comp_ff(uae_u32 opcode) /* CMPA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1fb_0_comp_ff(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b1fb_0_comp_ff(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -25027,7 +25027,7 @@ unsigned long REGPARAM2 op_b1fb_0_comp_ff(uae_u32 opcode) /* CMPA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1fc_0_comp_ff(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b1fc_0_comp_ff(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -25046,7 +25046,7 @@ unsigned long REGPARAM2 op_b1fc_0_comp_ff(uae_u32 opcode) /* CMPA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c000_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c000_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -25065,7 +25065,7 @@ unsigned long REGPARAM2 op_c000_0_comp_ff(uae_u32 opcode) /* AND */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c010_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c010_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -25088,7 +25088,7 @@ unsigned long REGPARAM2 op_c010_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c018_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c018_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -25111,7 +25111,7 @@ unsigned long REGPARAM2 op_c018_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c020_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c020_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -25135,7 +25135,7 @@ unsigned long REGPARAM2 op_c020_0_comp_ff(uae_u32 opcode) /* AND */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c028_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c028_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -25158,7 +25158,7 @@ unsigned long REGPARAM2 op_c028_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c030_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c030_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -25180,7 +25180,7 @@ unsigned long REGPARAM2 op_c030_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c038_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c038_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -25201,7 +25201,7 @@ unsigned long REGPARAM2 op_c038_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c039_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c039_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -25222,7 +25222,7 @@ unsigned long REGPARAM2 op_c039_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c03a_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c03a_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -25245,7 +25245,7 @@ unsigned long REGPARAM2 op_c03a_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c03b_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c03b_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -25269,7 +25269,7 @@ unsigned long REGPARAM2 op_c03b_0_comp_ff(uae_u32 opcode) /* AND */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c03c_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c03c_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -25288,7 +25288,7 @@ unsigned long REGPARAM2 op_c03c_0_comp_ff(uae_u32 opcode) /* AND */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c040_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c040_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -25307,7 +25307,7 @@ unsigned long REGPARAM2 op_c040_0_comp_ff(uae_u32 opcode) /* AND */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c050_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c050_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -25330,7 +25330,7 @@ unsigned long REGPARAM2 op_c050_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c058_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c058_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -25353,7 +25353,7 @@ unsigned long REGPARAM2 op_c058_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c060_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c060_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -25377,7 +25377,7 @@ unsigned long REGPARAM2 op_c060_0_comp_ff(uae_u32 opcode) /* AND */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c068_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c068_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -25400,7 +25400,7 @@ unsigned long REGPARAM2 op_c068_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c070_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c070_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -25422,7 +25422,7 @@ unsigned long REGPARAM2 op_c070_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c078_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c078_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -25443,7 +25443,7 @@ unsigned long REGPARAM2 op_c078_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c079_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c079_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -25464,7 +25464,7 @@ unsigned long REGPARAM2 op_c079_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c07a_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c07a_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -25487,7 +25487,7 @@ unsigned long REGPARAM2 op_c07a_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c07b_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c07b_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -25511,7 +25511,7 @@ unsigned long REGPARAM2 op_c07b_0_comp_ff(uae_u32 opcode) /* AND */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c07c_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c07c_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -25530,7 +25530,7 @@ unsigned long REGPARAM2 op_c07c_0_comp_ff(uae_u32 opcode) /* AND */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c080_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c080_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -25549,7 +25549,7 @@ unsigned long REGPARAM2 op_c080_0_comp_ff(uae_u32 opcode) /* AND */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c090_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c090_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -25572,7 +25572,7 @@ unsigned long REGPARAM2 op_c090_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c098_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c098_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -25595,7 +25595,7 @@ unsigned long REGPARAM2 op_c098_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0a0_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c0a0_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -25619,7 +25619,7 @@ unsigned long REGPARAM2 op_c0a0_0_comp_ff(uae_u32 opcode) /* AND */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0a8_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c0a8_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -25642,7 +25642,7 @@ unsigned long REGPARAM2 op_c0a8_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0b0_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c0b0_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -25664,7 +25664,7 @@ unsigned long REGPARAM2 op_c0b0_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0b8_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c0b8_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -25685,7 +25685,7 @@ unsigned long REGPARAM2 op_c0b8_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0b9_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c0b9_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -25706,7 +25706,7 @@ unsigned long REGPARAM2 op_c0b9_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0ba_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c0ba_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -25729,7 +25729,7 @@ unsigned long REGPARAM2 op_c0ba_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0bb_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c0bb_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -25753,7 +25753,7 @@ unsigned long REGPARAM2 op_c0bb_0_comp_ff(uae_u32 opcode) /* AND */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0bc_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c0bc_0_comp_ff(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -25772,7 +25772,7 @@ unsigned long REGPARAM2 op_c0bc_0_comp_ff(uae_u32 opcode) /* AND */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0c0_0_comp_ff(uae_u32 opcode) /* MULU */ +uae_u32 REGPARAM2 op_c0c0_0_comp_ff(uae_u32 opcode) /* MULU */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -25790,7 +25790,7 @@ unsigned long REGPARAM2 op_c0c0_0_comp_ff(uae_u32 opcode) /* MULU */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0d0_0_comp_ff(uae_u32 opcode) /* MULU */ +uae_u32 REGPARAM2 op_c0d0_0_comp_ff(uae_u32 opcode) /* MULU */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -25812,7 +25812,7 @@ unsigned long REGPARAM2 op_c0d0_0_comp_ff(uae_u32 opcode) /* MULU */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0d8_0_comp_ff(uae_u32 opcode) /* MULU */ +uae_u32 REGPARAM2 op_c0d8_0_comp_ff(uae_u32 opcode) /* MULU */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -25834,7 +25834,7 @@ unsigned long REGPARAM2 op_c0d8_0_comp_ff(uae_u32 opcode) /* MULU */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0e0_0_comp_ff(uae_u32 opcode) /* MULU */ +uae_u32 REGPARAM2 op_c0e0_0_comp_ff(uae_u32 opcode) /* MULU */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -25857,7 +25857,7 @@ unsigned long REGPARAM2 op_c0e0_0_comp_ff(uae_u32 opcode) /* MULU */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0e8_0_comp_ff(uae_u32 opcode) /* MULU */ +uae_u32 REGPARAM2 op_c0e8_0_comp_ff(uae_u32 opcode) /* MULU */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -25879,7 +25879,7 @@ unsigned long REGPARAM2 op_c0e8_0_comp_ff(uae_u32 opcode) /* MULU */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0f0_0_comp_ff(uae_u32 opcode) /* MULU */ +uae_u32 REGPARAM2 op_c0f0_0_comp_ff(uae_u32 opcode) /* MULU */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -25900,7 +25900,7 @@ unsigned long REGPARAM2 op_c0f0_0_comp_ff(uae_u32 opcode) /* MULU */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0f8_0_comp_ff(uae_u32 opcode) /* MULU */ +uae_u32 REGPARAM2 op_c0f8_0_comp_ff(uae_u32 opcode) /* MULU */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -25920,7 +25920,7 @@ unsigned long REGPARAM2 op_c0f8_0_comp_ff(uae_u32 opcode) /* MULU */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0f9_0_comp_ff(uae_u32 opcode) /* MULU */ +uae_u32 REGPARAM2 op_c0f9_0_comp_ff(uae_u32 opcode) /* MULU */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -25940,7 +25940,7 @@ unsigned long REGPARAM2 op_c0f9_0_comp_ff(uae_u32 opcode) /* MULU */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0fa_0_comp_ff(uae_u32 opcode) /* MULU */ +uae_u32 REGPARAM2 op_c0fa_0_comp_ff(uae_u32 opcode) /* MULU */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -25962,7 +25962,7 @@ unsigned long REGPARAM2 op_c0fa_0_comp_ff(uae_u32 opcode) /* MULU */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0fb_0_comp_ff(uae_u32 opcode) /* MULU */ +uae_u32 REGPARAM2 op_c0fb_0_comp_ff(uae_u32 opcode) /* MULU */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -25985,7 +25985,7 @@ unsigned long REGPARAM2 op_c0fb_0_comp_ff(uae_u32 opcode) /* MULU */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0fc_0_comp_ff(uae_u32 opcode) /* MULU */ +uae_u32 REGPARAM2 op_c0fc_0_comp_ff(uae_u32 opcode) /* MULU */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -26003,7 +26003,7 @@ unsigned long REGPARAM2 op_c0fc_0_comp_ff(uae_u32 opcode) /* MULU */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c110_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c110_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -26025,7 +26025,7 @@ unsigned long REGPARAM2 op_c110_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c118_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c118_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -26047,7 +26047,7 @@ unsigned long REGPARAM2 op_c118_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c120_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c120_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -26070,7 +26070,7 @@ unsigned long REGPARAM2 op_c120_0_comp_ff(uae_u32 opcode) /* AND */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c128_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c128_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -26092,7 +26092,7 @@ unsigned long REGPARAM2 op_c128_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c130_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c130_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -26113,7 +26113,7 @@ unsigned long REGPARAM2 op_c130_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c138_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c138_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -26133,7 +26133,7 @@ unsigned long REGPARAM2 op_c138_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c139_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c139_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -26153,7 +26153,7 @@ unsigned long REGPARAM2 op_c139_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c140_0_comp_ff(uae_u32 opcode) /* EXG */ +uae_u32 REGPARAM2 op_c140_0_comp_ff(uae_u32 opcode) /* EXG */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -26172,7 +26172,7 @@ unsigned long REGPARAM2 op_c140_0_comp_ff(uae_u32 opcode) /* EXG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c148_0_comp_ff(uae_u32 opcode) /* EXG */ +uae_u32 REGPARAM2 op_c148_0_comp_ff(uae_u32 opcode) /* EXG */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -26195,7 +26195,7 @@ unsigned long REGPARAM2 op_c148_0_comp_ff(uae_u32 opcode) /* EXG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c150_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c150_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -26217,7 +26217,7 @@ unsigned long REGPARAM2 op_c150_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c158_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c158_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -26239,7 +26239,7 @@ unsigned long REGPARAM2 op_c158_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c160_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c160_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -26262,7 +26262,7 @@ unsigned long REGPARAM2 op_c160_0_comp_ff(uae_u32 opcode) /* AND */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c168_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c168_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -26284,7 +26284,7 @@ unsigned long REGPARAM2 op_c168_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c170_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c170_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -26305,7 +26305,7 @@ unsigned long REGPARAM2 op_c170_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c178_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c178_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -26325,7 +26325,7 @@ unsigned long REGPARAM2 op_c178_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c179_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c179_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -26345,7 +26345,7 @@ unsigned long REGPARAM2 op_c179_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c188_0_comp_ff(uae_u32 opcode) /* EXG */ +uae_u32 REGPARAM2 op_c188_0_comp_ff(uae_u32 opcode) /* EXG */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -26366,7 +26366,7 @@ unsigned long REGPARAM2 op_c188_0_comp_ff(uae_u32 opcode) /* EXG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c190_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c190_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -26388,7 +26388,7 @@ unsigned long REGPARAM2 op_c190_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c198_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c198_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -26410,7 +26410,7 @@ unsigned long REGPARAM2 op_c198_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1a0_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c1a0_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -26433,7 +26433,7 @@ unsigned long REGPARAM2 op_c1a0_0_comp_ff(uae_u32 opcode) /* AND */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1a8_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c1a8_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -26455,7 +26455,7 @@ unsigned long REGPARAM2 op_c1a8_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1b0_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c1b0_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -26476,7 +26476,7 @@ unsigned long REGPARAM2 op_c1b0_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1b8_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c1b8_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -26496,7 +26496,7 @@ unsigned long REGPARAM2 op_c1b8_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1b9_0_comp_ff(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c1b9_0_comp_ff(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -26516,7 +26516,7 @@ unsigned long REGPARAM2 op_c1b9_0_comp_ff(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1c0_0_comp_ff(uae_u32 opcode) /* MULS */ +uae_u32 REGPARAM2 op_c1c0_0_comp_ff(uae_u32 opcode) /* MULS */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -26534,7 +26534,7 @@ unsigned long REGPARAM2 op_c1c0_0_comp_ff(uae_u32 opcode) /* MULS */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1d0_0_comp_ff(uae_u32 opcode) /* MULS */ +uae_u32 REGPARAM2 op_c1d0_0_comp_ff(uae_u32 opcode) /* MULS */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -26556,7 +26556,7 @@ unsigned long REGPARAM2 op_c1d0_0_comp_ff(uae_u32 opcode) /* MULS */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1d8_0_comp_ff(uae_u32 opcode) /* MULS */ +uae_u32 REGPARAM2 op_c1d8_0_comp_ff(uae_u32 opcode) /* MULS */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -26578,7 +26578,7 @@ unsigned long REGPARAM2 op_c1d8_0_comp_ff(uae_u32 opcode) /* MULS */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1e0_0_comp_ff(uae_u32 opcode) /* MULS */ +uae_u32 REGPARAM2 op_c1e0_0_comp_ff(uae_u32 opcode) /* MULS */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -26601,7 +26601,7 @@ unsigned long REGPARAM2 op_c1e0_0_comp_ff(uae_u32 opcode) /* MULS */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1e8_0_comp_ff(uae_u32 opcode) /* MULS */ +uae_u32 REGPARAM2 op_c1e8_0_comp_ff(uae_u32 opcode) /* MULS */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -26623,7 +26623,7 @@ unsigned long REGPARAM2 op_c1e8_0_comp_ff(uae_u32 opcode) /* MULS */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1f0_0_comp_ff(uae_u32 opcode) /* MULS */ +uae_u32 REGPARAM2 op_c1f0_0_comp_ff(uae_u32 opcode) /* MULS */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -26644,7 +26644,7 @@ unsigned long REGPARAM2 op_c1f0_0_comp_ff(uae_u32 opcode) /* MULS */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1f8_0_comp_ff(uae_u32 opcode) /* MULS */ +uae_u32 REGPARAM2 op_c1f8_0_comp_ff(uae_u32 opcode) /* MULS */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -26664,7 +26664,7 @@ unsigned long REGPARAM2 op_c1f8_0_comp_ff(uae_u32 opcode) /* MULS */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1f9_0_comp_ff(uae_u32 opcode) /* MULS */ +uae_u32 REGPARAM2 op_c1f9_0_comp_ff(uae_u32 opcode) /* MULS */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -26684,7 +26684,7 @@ unsigned long REGPARAM2 op_c1f9_0_comp_ff(uae_u32 opcode) /* MULS */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1fa_0_comp_ff(uae_u32 opcode) /* MULS */ +uae_u32 REGPARAM2 op_c1fa_0_comp_ff(uae_u32 opcode) /* MULS */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -26706,7 +26706,7 @@ unsigned long REGPARAM2 op_c1fa_0_comp_ff(uae_u32 opcode) /* MULS */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1fb_0_comp_ff(uae_u32 opcode) /* MULS */ +uae_u32 REGPARAM2 op_c1fb_0_comp_ff(uae_u32 opcode) /* MULS */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -26729,7 +26729,7 @@ unsigned long REGPARAM2 op_c1fb_0_comp_ff(uae_u32 opcode) /* MULS */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1fc_0_comp_ff(uae_u32 opcode) /* MULS */ +uae_u32 REGPARAM2 op_c1fc_0_comp_ff(uae_u32 opcode) /* MULS */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -26747,7 +26747,7 @@ unsigned long REGPARAM2 op_c1fc_0_comp_ff(uae_u32 opcode) /* MULS */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d000_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d000_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -26767,7 +26767,7 @@ unsigned long REGPARAM2 op_d000_0_comp_ff(uae_u32 opcode) /* ADD */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d010_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d010_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -26791,7 +26791,7 @@ unsigned long REGPARAM2 op_d010_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d018_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d018_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -26815,7 +26815,7 @@ unsigned long REGPARAM2 op_d018_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d020_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d020_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -26840,7 +26840,7 @@ unsigned long REGPARAM2 op_d020_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d028_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d028_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -26864,7 +26864,7 @@ unsigned long REGPARAM2 op_d028_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d030_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d030_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -26887,7 +26887,7 @@ unsigned long REGPARAM2 op_d030_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d038_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d038_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -26909,7 +26909,7 @@ unsigned long REGPARAM2 op_d038_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d039_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d039_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -26931,7 +26931,7 @@ unsigned long REGPARAM2 op_d039_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d03a_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d03a_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -26955,7 +26955,7 @@ unsigned long REGPARAM2 op_d03a_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d03b_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d03b_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -26980,7 +26980,7 @@ unsigned long REGPARAM2 op_d03b_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d03c_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d03c_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -27000,7 +27000,7 @@ unsigned long REGPARAM2 op_d03c_0_comp_ff(uae_u32 opcode) /* ADD */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d040_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d040_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27020,7 +27020,7 @@ unsigned long REGPARAM2 op_d040_0_comp_ff(uae_u32 opcode) /* ADD */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d048_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d048_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27042,7 +27042,7 @@ unsigned long REGPARAM2 op_d048_0_comp_ff(uae_u32 opcode) /* ADD */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d050_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d050_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27066,7 +27066,7 @@ unsigned long REGPARAM2 op_d050_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d058_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d058_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27090,7 +27090,7 @@ unsigned long REGPARAM2 op_d058_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d060_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d060_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27115,7 +27115,7 @@ unsigned long REGPARAM2 op_d060_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d068_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d068_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27139,7 +27139,7 @@ unsigned long REGPARAM2 op_d068_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d070_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d070_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27162,7 +27162,7 @@ unsigned long REGPARAM2 op_d070_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d078_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d078_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -27184,7 +27184,7 @@ unsigned long REGPARAM2 op_d078_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d079_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d079_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -27206,7 +27206,7 @@ unsigned long REGPARAM2 op_d079_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d07a_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d07a_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -27230,7 +27230,7 @@ unsigned long REGPARAM2 op_d07a_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d07b_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d07b_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -27255,7 +27255,7 @@ unsigned long REGPARAM2 op_d07b_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d07c_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d07c_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -27275,7 +27275,7 @@ unsigned long REGPARAM2 op_d07c_0_comp_ff(uae_u32 opcode) /* ADD */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d080_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d080_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27295,7 +27295,7 @@ unsigned long REGPARAM2 op_d080_0_comp_ff(uae_u32 opcode) /* ADD */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d088_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d088_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27317,7 +27317,7 @@ unsigned long REGPARAM2 op_d088_0_comp_ff(uae_u32 opcode) /* ADD */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d090_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d090_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27341,7 +27341,7 @@ unsigned long REGPARAM2 op_d090_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d098_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d098_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27365,7 +27365,7 @@ unsigned long REGPARAM2 op_d098_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0a0_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d0a0_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27390,7 +27390,7 @@ unsigned long REGPARAM2 op_d0a0_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0a8_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d0a8_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27414,7 +27414,7 @@ unsigned long REGPARAM2 op_d0a8_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0b0_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d0b0_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27437,7 +27437,7 @@ unsigned long REGPARAM2 op_d0b0_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0b8_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d0b8_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -27459,7 +27459,7 @@ unsigned long REGPARAM2 op_d0b8_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0b9_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d0b9_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -27481,7 +27481,7 @@ unsigned long REGPARAM2 op_d0b9_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0ba_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d0ba_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -27505,7 +27505,7 @@ unsigned long REGPARAM2 op_d0ba_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0bb_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d0bb_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -27530,7 +27530,7 @@ unsigned long REGPARAM2 op_d0bb_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0bc_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d0bc_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -27550,7 +27550,7 @@ unsigned long REGPARAM2 op_d0bc_0_comp_ff(uae_u32 opcode) /* ADD */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0c0_0_comp_ff(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d0c0_0_comp_ff(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27568,7 +27568,7 @@ unsigned long REGPARAM2 op_d0c0_0_comp_ff(uae_u32 opcode) /* ADDA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0c8_0_comp_ff(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d0c8_0_comp_ff(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27588,7 +27588,7 @@ unsigned long REGPARAM2 op_d0c8_0_comp_ff(uae_u32 opcode) /* ADDA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0d0_0_comp_ff(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d0d0_0_comp_ff(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27610,7 +27610,7 @@ unsigned long REGPARAM2 op_d0d0_0_comp_ff(uae_u32 opcode) /* ADDA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0d8_0_comp_ff(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d0d8_0_comp_ff(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27632,7 +27632,7 @@ unsigned long REGPARAM2 op_d0d8_0_comp_ff(uae_u32 opcode) /* ADDA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0e0_0_comp_ff(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d0e0_0_comp_ff(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27655,7 +27655,7 @@ unsigned long REGPARAM2 op_d0e0_0_comp_ff(uae_u32 opcode) /* ADDA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0e8_0_comp_ff(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d0e8_0_comp_ff(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27677,7 +27677,7 @@ unsigned long REGPARAM2 op_d0e8_0_comp_ff(uae_u32 opcode) /* ADDA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0f0_0_comp_ff(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d0f0_0_comp_ff(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27698,7 +27698,7 @@ unsigned long REGPARAM2 op_d0f0_0_comp_ff(uae_u32 opcode) /* ADDA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0f8_0_comp_ff(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d0f8_0_comp_ff(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -27718,7 +27718,7 @@ unsigned long REGPARAM2 op_d0f8_0_comp_ff(uae_u32 opcode) /* ADDA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0f9_0_comp_ff(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d0f9_0_comp_ff(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -27738,7 +27738,7 @@ unsigned long REGPARAM2 op_d0f9_0_comp_ff(uae_u32 opcode) /* ADDA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0fa_0_comp_ff(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d0fa_0_comp_ff(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -27760,7 +27760,7 @@ unsigned long REGPARAM2 op_d0fa_0_comp_ff(uae_u32 opcode) /* ADDA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0fb_0_comp_ff(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d0fb_0_comp_ff(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -27783,7 +27783,7 @@ unsigned long REGPARAM2 op_d0fb_0_comp_ff(uae_u32 opcode) /* ADDA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0fc_0_comp_ff(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d0fc_0_comp_ff(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -27801,7 +27801,7 @@ unsigned long REGPARAM2 op_d0fc_0_comp_ff(uae_u32 opcode) /* ADDA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d100_0_comp_ff(uae_u32 opcode) /* ADDX */ +uae_u32 REGPARAM2 op_d100_0_comp_ff(uae_u32 opcode) /* ADDX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27822,7 +27822,7 @@ unsigned long REGPARAM2 op_d100_0_comp_ff(uae_u32 opcode) /* ADDX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d108_0_comp_ff(uae_u32 opcode) /* ADDX */ +uae_u32 REGPARAM2 op_d108_0_comp_ff(uae_u32 opcode) /* ADDX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -27852,7 +27852,7 @@ unsigned long REGPARAM2 op_d108_0_comp_ff(uae_u32 opcode) /* ADDX */ }}}}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d110_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d110_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -27875,7 +27875,7 @@ unsigned long REGPARAM2 op_d110_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d118_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d118_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -27898,7 +27898,7 @@ unsigned long REGPARAM2 op_d118_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d120_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d120_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -27922,7 +27922,7 @@ unsigned long REGPARAM2 op_d120_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d128_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d128_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -27945,7 +27945,7 @@ unsigned long REGPARAM2 op_d128_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d130_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d130_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -27967,7 +27967,7 @@ unsigned long REGPARAM2 op_d130_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d138_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d138_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -27988,7 +27988,7 @@ unsigned long REGPARAM2 op_d138_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d139_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d139_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -28009,7 +28009,7 @@ unsigned long REGPARAM2 op_d139_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d140_0_comp_ff(uae_u32 opcode) /* ADDX */ +uae_u32 REGPARAM2 op_d140_0_comp_ff(uae_u32 opcode) /* ADDX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -28030,7 +28030,7 @@ unsigned long REGPARAM2 op_d140_0_comp_ff(uae_u32 opcode) /* ADDX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d148_0_comp_ff(uae_u32 opcode) /* ADDX */ +uae_u32 REGPARAM2 op_d148_0_comp_ff(uae_u32 opcode) /* ADDX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -28060,7 +28060,7 @@ unsigned long REGPARAM2 op_d148_0_comp_ff(uae_u32 opcode) /* ADDX */ }}}}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d150_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d150_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28083,7 +28083,7 @@ unsigned long REGPARAM2 op_d150_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d158_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d158_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28106,7 +28106,7 @@ unsigned long REGPARAM2 op_d158_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d160_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d160_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28130,7 +28130,7 @@ unsigned long REGPARAM2 op_d160_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d168_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d168_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28153,7 +28153,7 @@ unsigned long REGPARAM2 op_d168_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d170_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d170_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28175,7 +28175,7 @@ unsigned long REGPARAM2 op_d170_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d178_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d178_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -28196,7 +28196,7 @@ unsigned long REGPARAM2 op_d178_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d179_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d179_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -28217,7 +28217,7 @@ unsigned long REGPARAM2 op_d179_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d180_0_comp_ff(uae_u32 opcode) /* ADDX */ +uae_u32 REGPARAM2 op_d180_0_comp_ff(uae_u32 opcode) /* ADDX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -28238,7 +28238,7 @@ unsigned long REGPARAM2 op_d180_0_comp_ff(uae_u32 opcode) /* ADDX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d188_0_comp_ff(uae_u32 opcode) /* ADDX */ +uae_u32 REGPARAM2 op_d188_0_comp_ff(uae_u32 opcode) /* ADDX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -28268,7 +28268,7 @@ unsigned long REGPARAM2 op_d188_0_comp_ff(uae_u32 opcode) /* ADDX */ }}}}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d190_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d190_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28291,7 +28291,7 @@ unsigned long REGPARAM2 op_d190_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d198_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d198_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28314,7 +28314,7 @@ unsigned long REGPARAM2 op_d198_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1a0_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d1a0_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28338,7 +28338,7 @@ unsigned long REGPARAM2 op_d1a0_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1a8_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d1a8_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28361,7 +28361,7 @@ unsigned long REGPARAM2 op_d1a8_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1b0_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d1b0_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28383,7 +28383,7 @@ unsigned long REGPARAM2 op_d1b0_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1b8_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d1b8_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -28404,7 +28404,7 @@ unsigned long REGPARAM2 op_d1b8_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1b9_0_comp_ff(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d1b9_0_comp_ff(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -28425,7 +28425,7 @@ unsigned long REGPARAM2 op_d1b9_0_comp_ff(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1c0_0_comp_ff(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d1c0_0_comp_ff(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -28443,7 +28443,7 @@ unsigned long REGPARAM2 op_d1c0_0_comp_ff(uae_u32 opcode) /* ADDA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1c8_0_comp_ff(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d1c8_0_comp_ff(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -28463,7 +28463,7 @@ unsigned long REGPARAM2 op_d1c8_0_comp_ff(uae_u32 opcode) /* ADDA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1d0_0_comp_ff(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d1d0_0_comp_ff(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -28485,7 +28485,7 @@ unsigned long REGPARAM2 op_d1d0_0_comp_ff(uae_u32 opcode) /* ADDA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1d8_0_comp_ff(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d1d8_0_comp_ff(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -28507,7 +28507,7 @@ unsigned long REGPARAM2 op_d1d8_0_comp_ff(uae_u32 opcode) /* ADDA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1e0_0_comp_ff(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d1e0_0_comp_ff(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -28530,7 +28530,7 @@ unsigned long REGPARAM2 op_d1e0_0_comp_ff(uae_u32 opcode) /* ADDA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1e8_0_comp_ff(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d1e8_0_comp_ff(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -28552,7 +28552,7 @@ unsigned long REGPARAM2 op_d1e8_0_comp_ff(uae_u32 opcode) /* ADDA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1f0_0_comp_ff(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d1f0_0_comp_ff(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -28573,7 +28573,7 @@ unsigned long REGPARAM2 op_d1f0_0_comp_ff(uae_u32 opcode) /* ADDA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1f8_0_comp_ff(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d1f8_0_comp_ff(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -28593,7 +28593,7 @@ unsigned long REGPARAM2 op_d1f8_0_comp_ff(uae_u32 opcode) /* ADDA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1f9_0_comp_ff(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d1f9_0_comp_ff(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -28613,7 +28613,7 @@ unsigned long REGPARAM2 op_d1f9_0_comp_ff(uae_u32 opcode) /* ADDA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1fa_0_comp_ff(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d1fa_0_comp_ff(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -28635,7 +28635,7 @@ unsigned long REGPARAM2 op_d1fa_0_comp_ff(uae_u32 opcode) /* ADDA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1fb_0_comp_ff(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d1fb_0_comp_ff(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -28658,7 +28658,7 @@ unsigned long REGPARAM2 op_d1fb_0_comp_ff(uae_u32 opcode) /* ADDA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1fc_0_comp_ff(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d1fc_0_comp_ff(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -28676,7 +28676,7 @@ unsigned long REGPARAM2 op_d1fc_0_comp_ff(uae_u32 opcode) /* ADDA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e000_0_comp_ff(uae_u32 opcode) /* ASR */ +uae_u32 REGPARAM2 op_e000_0_comp_ff(uae_u32 opcode) /* ASR */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -28698,7 +28698,7 @@ unsigned long REGPARAM2 op_e000_0_comp_ff(uae_u32 opcode) /* ASR */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e008_0_comp_ff(uae_u32 opcode) /* LSR */ +uae_u32 REGPARAM2 op_e008_0_comp_ff(uae_u32 opcode) /* LSR */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -28720,7 +28720,7 @@ unsigned long REGPARAM2 op_e008_0_comp_ff(uae_u32 opcode) /* LSR */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e018_0_comp_ff(uae_u32 opcode) /* ROR */ +uae_u32 REGPARAM2 op_e018_0_comp_ff(uae_u32 opcode) /* ROR */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -28741,7 +28741,7 @@ unsigned long REGPARAM2 op_e018_0_comp_ff(uae_u32 opcode) /* ROR */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e020_0_comp_ff(uae_u32 opcode) /* ASR */ +uae_u32 REGPARAM2 op_e020_0_comp_ff(uae_u32 opcode) /* ASR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28766,10 +28766,7 @@ if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -#endif - -#ifdef PART_8 -unsigned long REGPARAM2 op_e028_0_comp_ff(uae_u32 opcode) /* LSR */ +uae_u32 REGPARAM2 op_e028_0_comp_ff(uae_u32 opcode) /* LSR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28794,7 +28791,7 @@ if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e038_0_comp_ff(uae_u32 opcode) /* ROR */ +uae_u32 REGPARAM2 op_e038_0_comp_ff(uae_u32 opcode) /* ROR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28818,7 +28815,7 @@ if ((uae_u32)srcreg==(uae_u32)dstreg) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e040_0_comp_ff(uae_u32 opcode) /* ASR */ +uae_u32 REGPARAM2 op_e040_0_comp_ff(uae_u32 opcode) /* ASR */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -28840,7 +28837,10 @@ unsigned long REGPARAM2 op_e040_0_comp_ff(uae_u32 opcode) /* ASR */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e048_0_comp_ff(uae_u32 opcode) /* LSR */ +#endif + +#ifdef PART_8 +uae_u32 REGPARAM2 op_e048_0_comp_ff(uae_u32 opcode) /* LSR */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -28862,7 +28862,7 @@ unsigned long REGPARAM2 op_e048_0_comp_ff(uae_u32 opcode) /* LSR */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e058_0_comp_ff(uae_u32 opcode) /* ROR */ +uae_u32 REGPARAM2 op_e058_0_comp_ff(uae_u32 opcode) /* ROR */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -28883,7 +28883,7 @@ unsigned long REGPARAM2 op_e058_0_comp_ff(uae_u32 opcode) /* ROR */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e060_0_comp_ff(uae_u32 opcode) /* ASR */ +uae_u32 REGPARAM2 op_e060_0_comp_ff(uae_u32 opcode) /* ASR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28908,7 +28908,7 @@ if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e068_0_comp_ff(uae_u32 opcode) /* LSR */ +uae_u32 REGPARAM2 op_e068_0_comp_ff(uae_u32 opcode) /* LSR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28933,7 +28933,7 @@ if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e078_0_comp_ff(uae_u32 opcode) /* ROR */ +uae_u32 REGPARAM2 op_e078_0_comp_ff(uae_u32 opcode) /* ROR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -28957,7 +28957,7 @@ if ((uae_u32)srcreg==(uae_u32)dstreg) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e080_0_comp_ff(uae_u32 opcode) /* ASR */ +uae_u32 REGPARAM2 op_e080_0_comp_ff(uae_u32 opcode) /* ASR */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -28979,7 +28979,7 @@ unsigned long REGPARAM2 op_e080_0_comp_ff(uae_u32 opcode) /* ASR */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e088_0_comp_ff(uae_u32 opcode) /* LSR */ +uae_u32 REGPARAM2 op_e088_0_comp_ff(uae_u32 opcode) /* LSR */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -29001,7 +29001,7 @@ unsigned long REGPARAM2 op_e088_0_comp_ff(uae_u32 opcode) /* LSR */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e098_0_comp_ff(uae_u32 opcode) /* ROR */ +uae_u32 REGPARAM2 op_e098_0_comp_ff(uae_u32 opcode) /* ROR */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -29022,7 +29022,7 @@ unsigned long REGPARAM2 op_e098_0_comp_ff(uae_u32 opcode) /* ROR */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e0a0_0_comp_ff(uae_u32 opcode) /* ASR */ +uae_u32 REGPARAM2 op_e0a0_0_comp_ff(uae_u32 opcode) /* ASR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -29047,7 +29047,7 @@ if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e0a8_0_comp_ff(uae_u32 opcode) /* LSR */ +uae_u32 REGPARAM2 op_e0a8_0_comp_ff(uae_u32 opcode) /* LSR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -29072,7 +29072,7 @@ if (!(needed_flags & FLAG_CZNV)) dont_care_flags(); if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e0b8_0_comp_ff(uae_u32 opcode) /* ROR */ +uae_u32 REGPARAM2 op_e0b8_0_comp_ff(uae_u32 opcode) /* ROR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -29096,7 +29096,7 @@ if ((uae_u32)srcreg==(uae_u32)dstreg) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e0d0_0_comp_ff(uae_u32 opcode) /* ASRW */ +uae_u32 REGPARAM2 op_e0d0_0_comp_ff(uae_u32 opcode) /* ASRW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -29116,7 +29116,7 @@ unsigned long REGPARAM2 op_e0d0_0_comp_ff(uae_u32 opcode) /* ASRW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e0d8_0_comp_ff(uae_u32 opcode) /* ASRW */ +uae_u32 REGPARAM2 op_e0d8_0_comp_ff(uae_u32 opcode) /* ASRW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -29136,7 +29136,7 @@ unsigned long REGPARAM2 op_e0d8_0_comp_ff(uae_u32 opcode) /* ASRW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e0e0_0_comp_ff(uae_u32 opcode) /* ASRW */ +uae_u32 REGPARAM2 op_e0e0_0_comp_ff(uae_u32 opcode) /* ASRW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -29157,7 +29157,7 @@ unsigned long REGPARAM2 op_e0e0_0_comp_ff(uae_u32 opcode) /* ASRW */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e0e8_0_comp_ff(uae_u32 opcode) /* ASRW */ +uae_u32 REGPARAM2 op_e0e8_0_comp_ff(uae_u32 opcode) /* ASRW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -29177,7 +29177,7 @@ unsigned long REGPARAM2 op_e0e8_0_comp_ff(uae_u32 opcode) /* ASRW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e0f0_0_comp_ff(uae_u32 opcode) /* ASRW */ +uae_u32 REGPARAM2 op_e0f0_0_comp_ff(uae_u32 opcode) /* ASRW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -29196,7 +29196,7 @@ unsigned long REGPARAM2 op_e0f0_0_comp_ff(uae_u32 opcode) /* ASRW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e0f8_0_comp_ff(uae_u32 opcode) /* ASRW */ +uae_u32 REGPARAM2 op_e0f8_0_comp_ff(uae_u32 opcode) /* ASRW */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -29214,7 +29214,7 @@ unsigned long REGPARAM2 op_e0f8_0_comp_ff(uae_u32 opcode) /* ASRW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e0f9_0_comp_ff(uae_u32 opcode) /* ASRW */ +uae_u32 REGPARAM2 op_e0f9_0_comp_ff(uae_u32 opcode) /* ASRW */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -29232,7 +29232,7 @@ unsigned long REGPARAM2 op_e0f9_0_comp_ff(uae_u32 opcode) /* ASRW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e100_0_comp_ff(uae_u32 opcode) /* ASL */ +uae_u32 REGPARAM2 op_e100_0_comp_ff(uae_u32 opcode) /* ASL */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -29254,7 +29254,7 @@ unsigned long REGPARAM2 op_e100_0_comp_ff(uae_u32 opcode) /* ASL */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e108_0_comp_ff(uae_u32 opcode) /* LSL */ +uae_u32 REGPARAM2 op_e108_0_comp_ff(uae_u32 opcode) /* LSL */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -29276,7 +29276,7 @@ unsigned long REGPARAM2 op_e108_0_comp_ff(uae_u32 opcode) /* LSL */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e118_0_comp_ff(uae_u32 opcode) /* ROL */ +uae_u32 REGPARAM2 op_e118_0_comp_ff(uae_u32 opcode) /* ROL */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -29297,7 +29297,7 @@ unsigned long REGPARAM2 op_e118_0_comp_ff(uae_u32 opcode) /* ROL */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e120_0_comp_ff(uae_u32 opcode) /* ASL */ +uae_u32 REGPARAM2 op_e120_0_comp_ff(uae_u32 opcode) /* ASL */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -29322,7 +29322,7 @@ if ((uae_u32)srcreg==(uae_u32)dstreg) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e128_0_comp_ff(uae_u32 opcode) /* LSL */ +uae_u32 REGPARAM2 op_e128_0_comp_ff(uae_u32 opcode) /* LSL */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -29347,7 +29347,7 @@ if ((uae_u32)srcreg==(uae_u32)dstreg) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e138_0_comp_ff(uae_u32 opcode) /* ROL */ +uae_u32 REGPARAM2 op_e138_0_comp_ff(uae_u32 opcode) /* ROL */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -29371,7 +29371,7 @@ if ((uae_u32)srcreg==(uae_u32)dstreg) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e140_0_comp_ff(uae_u32 opcode) /* ASL */ +uae_u32 REGPARAM2 op_e140_0_comp_ff(uae_u32 opcode) /* ASL */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -29393,7 +29393,7 @@ unsigned long REGPARAM2 op_e140_0_comp_ff(uae_u32 opcode) /* ASL */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e148_0_comp_ff(uae_u32 opcode) /* LSL */ +uae_u32 REGPARAM2 op_e148_0_comp_ff(uae_u32 opcode) /* LSL */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -29415,7 +29415,7 @@ unsigned long REGPARAM2 op_e148_0_comp_ff(uae_u32 opcode) /* LSL */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e158_0_comp_ff(uae_u32 opcode) /* ROL */ +uae_u32 REGPARAM2 op_e158_0_comp_ff(uae_u32 opcode) /* ROL */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -29436,7 +29436,7 @@ unsigned long REGPARAM2 op_e158_0_comp_ff(uae_u32 opcode) /* ROL */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e160_0_comp_ff(uae_u32 opcode) /* ASL */ +uae_u32 REGPARAM2 op_e160_0_comp_ff(uae_u32 opcode) /* ASL */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -29461,7 +29461,7 @@ if ((uae_u32)srcreg==(uae_u32)dstreg) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e168_0_comp_ff(uae_u32 opcode) /* LSL */ +uae_u32 REGPARAM2 op_e168_0_comp_ff(uae_u32 opcode) /* LSL */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -29486,7 +29486,7 @@ if ((uae_u32)srcreg==(uae_u32)dstreg) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e178_0_comp_ff(uae_u32 opcode) /* ROL */ +uae_u32 REGPARAM2 op_e178_0_comp_ff(uae_u32 opcode) /* ROL */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -29510,7 +29510,7 @@ if ((uae_u32)srcreg==(uae_u32)dstreg) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e180_0_comp_ff(uae_u32 opcode) /* ASL */ +uae_u32 REGPARAM2 op_e180_0_comp_ff(uae_u32 opcode) /* ASL */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -29532,7 +29532,7 @@ unsigned long REGPARAM2 op_e180_0_comp_ff(uae_u32 opcode) /* ASL */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e188_0_comp_ff(uae_u32 opcode) /* LSL */ +uae_u32 REGPARAM2 op_e188_0_comp_ff(uae_u32 opcode) /* LSL */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -29554,7 +29554,7 @@ unsigned long REGPARAM2 op_e188_0_comp_ff(uae_u32 opcode) /* LSL */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e198_0_comp_ff(uae_u32 opcode) /* ROL */ +uae_u32 REGPARAM2 op_e198_0_comp_ff(uae_u32 opcode) /* ROL */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -29575,7 +29575,7 @@ unsigned long REGPARAM2 op_e198_0_comp_ff(uae_u32 opcode) /* ROL */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e1a0_0_comp_ff(uae_u32 opcode) /* ASL */ +uae_u32 REGPARAM2 op_e1a0_0_comp_ff(uae_u32 opcode) /* ASL */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -29600,7 +29600,7 @@ if ((uae_u32)srcreg==(uae_u32)dstreg) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e1a8_0_comp_ff(uae_u32 opcode) /* LSL */ +uae_u32 REGPARAM2 op_e1a8_0_comp_ff(uae_u32 opcode) /* LSL */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -29625,7 +29625,7 @@ if ((uae_u32)srcreg==(uae_u32)dstreg) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e1b8_0_comp_ff(uae_u32 opcode) /* ROL */ +uae_u32 REGPARAM2 op_e1b8_0_comp_ff(uae_u32 opcode) /* ROL */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -29649,7 +29649,7 @@ if ((uae_u32)srcreg==(uae_u32)dstreg) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e1d0_0_comp_ff(uae_u32 opcode) /* ASLW */ +uae_u32 REGPARAM2 op_e1d0_0_comp_ff(uae_u32 opcode) /* ASLW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -29669,7 +29669,7 @@ unsigned long REGPARAM2 op_e1d0_0_comp_ff(uae_u32 opcode) /* ASLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e1d8_0_comp_ff(uae_u32 opcode) /* ASLW */ +uae_u32 REGPARAM2 op_e1d8_0_comp_ff(uae_u32 opcode) /* ASLW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -29689,7 +29689,7 @@ unsigned long REGPARAM2 op_e1d8_0_comp_ff(uae_u32 opcode) /* ASLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e1e0_0_comp_ff(uae_u32 opcode) /* ASLW */ +uae_u32 REGPARAM2 op_e1e0_0_comp_ff(uae_u32 opcode) /* ASLW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -29710,7 +29710,7 @@ unsigned long REGPARAM2 op_e1e0_0_comp_ff(uae_u32 opcode) /* ASLW */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e1e8_0_comp_ff(uae_u32 opcode) /* ASLW */ +uae_u32 REGPARAM2 op_e1e8_0_comp_ff(uae_u32 opcode) /* ASLW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -29730,7 +29730,7 @@ unsigned long REGPARAM2 op_e1e8_0_comp_ff(uae_u32 opcode) /* ASLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e1f0_0_comp_ff(uae_u32 opcode) /* ASLW */ +uae_u32 REGPARAM2 op_e1f0_0_comp_ff(uae_u32 opcode) /* ASLW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -29749,7 +29749,7 @@ unsigned long REGPARAM2 op_e1f0_0_comp_ff(uae_u32 opcode) /* ASLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e1f8_0_comp_ff(uae_u32 opcode) /* ASLW */ +uae_u32 REGPARAM2 op_e1f8_0_comp_ff(uae_u32 opcode) /* ASLW */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -29767,7 +29767,7 @@ unsigned long REGPARAM2 op_e1f8_0_comp_ff(uae_u32 opcode) /* ASLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e1f9_0_comp_ff(uae_u32 opcode) /* ASLW */ +uae_u32 REGPARAM2 op_e1f9_0_comp_ff(uae_u32 opcode) /* ASLW */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -29785,7 +29785,7 @@ unsigned long REGPARAM2 op_e1f9_0_comp_ff(uae_u32 opcode) /* ASLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e2d0_0_comp_ff(uae_u32 opcode) /* LSRW */ +uae_u32 REGPARAM2 op_e2d0_0_comp_ff(uae_u32 opcode) /* LSRW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -29805,7 +29805,7 @@ unsigned long REGPARAM2 op_e2d0_0_comp_ff(uae_u32 opcode) /* LSRW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e2d8_0_comp_ff(uae_u32 opcode) /* LSRW */ +uae_u32 REGPARAM2 op_e2d8_0_comp_ff(uae_u32 opcode) /* LSRW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -29825,7 +29825,7 @@ unsigned long REGPARAM2 op_e2d8_0_comp_ff(uae_u32 opcode) /* LSRW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e2e0_0_comp_ff(uae_u32 opcode) /* LSRW */ +uae_u32 REGPARAM2 op_e2e0_0_comp_ff(uae_u32 opcode) /* LSRW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -29846,7 +29846,7 @@ unsigned long REGPARAM2 op_e2e0_0_comp_ff(uae_u32 opcode) /* LSRW */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e2e8_0_comp_ff(uae_u32 opcode) /* LSRW */ +uae_u32 REGPARAM2 op_e2e8_0_comp_ff(uae_u32 opcode) /* LSRW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -29866,7 +29866,7 @@ unsigned long REGPARAM2 op_e2e8_0_comp_ff(uae_u32 opcode) /* LSRW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e2f0_0_comp_ff(uae_u32 opcode) /* LSRW */ +uae_u32 REGPARAM2 op_e2f0_0_comp_ff(uae_u32 opcode) /* LSRW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -29885,7 +29885,7 @@ unsigned long REGPARAM2 op_e2f0_0_comp_ff(uae_u32 opcode) /* LSRW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e2f8_0_comp_ff(uae_u32 opcode) /* LSRW */ +uae_u32 REGPARAM2 op_e2f8_0_comp_ff(uae_u32 opcode) /* LSRW */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -29903,7 +29903,7 @@ unsigned long REGPARAM2 op_e2f8_0_comp_ff(uae_u32 opcode) /* LSRW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e2f9_0_comp_ff(uae_u32 opcode) /* LSRW */ +uae_u32 REGPARAM2 op_e2f9_0_comp_ff(uae_u32 opcode) /* LSRW */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -29921,7 +29921,7 @@ unsigned long REGPARAM2 op_e2f9_0_comp_ff(uae_u32 opcode) /* LSRW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e3d0_0_comp_ff(uae_u32 opcode) /* LSLW */ +uae_u32 REGPARAM2 op_e3d0_0_comp_ff(uae_u32 opcode) /* LSLW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -29941,7 +29941,7 @@ unsigned long REGPARAM2 op_e3d0_0_comp_ff(uae_u32 opcode) /* LSLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e3d8_0_comp_ff(uae_u32 opcode) /* LSLW */ +uae_u32 REGPARAM2 op_e3d8_0_comp_ff(uae_u32 opcode) /* LSLW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -29961,7 +29961,7 @@ unsigned long REGPARAM2 op_e3d8_0_comp_ff(uae_u32 opcode) /* LSLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e3e0_0_comp_ff(uae_u32 opcode) /* LSLW */ +uae_u32 REGPARAM2 op_e3e0_0_comp_ff(uae_u32 opcode) /* LSLW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -29982,7 +29982,7 @@ unsigned long REGPARAM2 op_e3e0_0_comp_ff(uae_u32 opcode) /* LSLW */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e3e8_0_comp_ff(uae_u32 opcode) /* LSLW */ +uae_u32 REGPARAM2 op_e3e8_0_comp_ff(uae_u32 opcode) /* LSLW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -30002,7 +30002,7 @@ unsigned long REGPARAM2 op_e3e8_0_comp_ff(uae_u32 opcode) /* LSLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e3f0_0_comp_ff(uae_u32 opcode) /* LSLW */ +uae_u32 REGPARAM2 op_e3f0_0_comp_ff(uae_u32 opcode) /* LSLW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -30021,7 +30021,7 @@ unsigned long REGPARAM2 op_e3f0_0_comp_ff(uae_u32 opcode) /* LSLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e3f8_0_comp_ff(uae_u32 opcode) /* LSLW */ +uae_u32 REGPARAM2 op_e3f8_0_comp_ff(uae_u32 opcode) /* LSLW */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -30039,7 +30039,7 @@ unsigned long REGPARAM2 op_e3f8_0_comp_ff(uae_u32 opcode) /* LSLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e3f9_0_comp_ff(uae_u32 opcode) /* LSLW */ +uae_u32 REGPARAM2 op_e3f9_0_comp_ff(uae_u32 opcode) /* LSLW */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -30057,7 +30057,7 @@ unsigned long REGPARAM2 op_e3f9_0_comp_ff(uae_u32 opcode) /* LSLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e6d0_0_comp_ff(uae_u32 opcode) /* RORW */ +uae_u32 REGPARAM2 op_e6d0_0_comp_ff(uae_u32 opcode) /* RORW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -30077,7 +30077,7 @@ unsigned long REGPARAM2 op_e6d0_0_comp_ff(uae_u32 opcode) /* RORW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e6d8_0_comp_ff(uae_u32 opcode) /* RORW */ +uae_u32 REGPARAM2 op_e6d8_0_comp_ff(uae_u32 opcode) /* RORW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -30097,7 +30097,7 @@ unsigned long REGPARAM2 op_e6d8_0_comp_ff(uae_u32 opcode) /* RORW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e6e0_0_comp_ff(uae_u32 opcode) /* RORW */ +uae_u32 REGPARAM2 op_e6e0_0_comp_ff(uae_u32 opcode) /* RORW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -30118,7 +30118,7 @@ unsigned long REGPARAM2 op_e6e0_0_comp_ff(uae_u32 opcode) /* RORW */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e6e8_0_comp_ff(uae_u32 opcode) /* RORW */ +uae_u32 REGPARAM2 op_e6e8_0_comp_ff(uae_u32 opcode) /* RORW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -30138,7 +30138,7 @@ unsigned long REGPARAM2 op_e6e8_0_comp_ff(uae_u32 opcode) /* RORW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e6f0_0_comp_ff(uae_u32 opcode) /* RORW */ +uae_u32 REGPARAM2 op_e6f0_0_comp_ff(uae_u32 opcode) /* RORW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -30157,7 +30157,7 @@ unsigned long REGPARAM2 op_e6f0_0_comp_ff(uae_u32 opcode) /* RORW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e6f8_0_comp_ff(uae_u32 opcode) /* RORW */ +uae_u32 REGPARAM2 op_e6f8_0_comp_ff(uae_u32 opcode) /* RORW */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -30175,7 +30175,7 @@ unsigned long REGPARAM2 op_e6f8_0_comp_ff(uae_u32 opcode) /* RORW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e6f9_0_comp_ff(uae_u32 opcode) /* RORW */ +uae_u32 REGPARAM2 op_e6f9_0_comp_ff(uae_u32 opcode) /* RORW */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -30193,7 +30193,7 @@ unsigned long REGPARAM2 op_e6f9_0_comp_ff(uae_u32 opcode) /* RORW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e7d0_0_comp_ff(uae_u32 opcode) /* ROLW */ +uae_u32 REGPARAM2 op_e7d0_0_comp_ff(uae_u32 opcode) /* ROLW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -30213,7 +30213,7 @@ unsigned long REGPARAM2 op_e7d0_0_comp_ff(uae_u32 opcode) /* ROLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e7d8_0_comp_ff(uae_u32 opcode) /* ROLW */ +uae_u32 REGPARAM2 op_e7d8_0_comp_ff(uae_u32 opcode) /* ROLW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -30233,7 +30233,7 @@ unsigned long REGPARAM2 op_e7d8_0_comp_ff(uae_u32 opcode) /* ROLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e7e0_0_comp_ff(uae_u32 opcode) /* ROLW */ +uae_u32 REGPARAM2 op_e7e0_0_comp_ff(uae_u32 opcode) /* ROLW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -30254,7 +30254,7 @@ unsigned long REGPARAM2 op_e7e0_0_comp_ff(uae_u32 opcode) /* ROLW */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e7e8_0_comp_ff(uae_u32 opcode) /* ROLW */ +uae_u32 REGPARAM2 op_e7e8_0_comp_ff(uae_u32 opcode) /* ROLW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -30274,7 +30274,7 @@ unsigned long REGPARAM2 op_e7e8_0_comp_ff(uae_u32 opcode) /* ROLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e7f0_0_comp_ff(uae_u32 opcode) /* ROLW */ +uae_u32 REGPARAM2 op_e7f0_0_comp_ff(uae_u32 opcode) /* ROLW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -30293,7 +30293,7 @@ unsigned long REGPARAM2 op_e7f0_0_comp_ff(uae_u32 opcode) /* ROLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e7f8_0_comp_ff(uae_u32 opcode) /* ROLW */ +uae_u32 REGPARAM2 op_e7f8_0_comp_ff(uae_u32 opcode) /* ROLW */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -30311,7 +30311,7 @@ unsigned long REGPARAM2 op_e7f8_0_comp_ff(uae_u32 opcode) /* ROLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e7f9_0_comp_ff(uae_u32 opcode) /* ROLW */ +uae_u32 REGPARAM2 op_e7f9_0_comp_ff(uae_u32 opcode) /* ROLW */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -30329,7 +30329,7 @@ unsigned long REGPARAM2 op_e7f9_0_comp_ff(uae_u32 opcode) /* ROLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_f600_0_comp_ff(uae_u32 opcode) /* MOVE16 */ +uae_u32 REGPARAM2 op_f600_0_comp_ff(uae_u32 opcode) /* MOVE16 */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -30352,7 +30352,7 @@ if (special_mem) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_f608_0_comp_ff(uae_u32 opcode) /* MOVE16 */ +uae_u32 REGPARAM2 op_f608_0_comp_ff(uae_u32 opcode) /* MOVE16 */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -30375,7 +30375,7 @@ if (special_mem) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_f610_0_comp_ff(uae_u32 opcode) /* MOVE16 */ +uae_u32 REGPARAM2 op_f610_0_comp_ff(uae_u32 opcode) /* MOVE16 */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -30398,7 +30398,7 @@ if (special_mem) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_f618_0_comp_ff(uae_u32 opcode) /* MOVE16 */ +uae_u32 REGPARAM2 op_f618_0_comp_ff(uae_u32 opcode) /* MOVE16 */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -30421,7 +30421,7 @@ if (special_mem) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_f620_0_comp_ff(uae_u32 opcode) /* MOVE16 */ +uae_u32 REGPARAM2 op_f620_0_comp_ff(uae_u32 opcode) /* MOVE16 */ { uae_s32 srcreg = (opcode & 7); uae_s32 dstreg = 0; @@ -30465,7 +30465,7 @@ extern void comp_fscc_opp(); extern void comp_fbcc_opp(); #ifdef PART_1 -unsigned long REGPARAM2 op_0_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_0_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -30483,7 +30483,7 @@ unsigned long REGPARAM2 op_0_0_comp_nf(uae_u32 opcode) /* OR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_10_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -30504,7 +30504,7 @@ unsigned long REGPARAM2 op_10_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_18_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_18_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -30525,7 +30525,7 @@ unsigned long REGPARAM2 op_18_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_20_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -30547,7 +30547,7 @@ unsigned long REGPARAM2 op_20_0_comp_nf(uae_u32 opcode) /* OR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_28_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_28_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -30568,7 +30568,7 @@ unsigned long REGPARAM2 op_28_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_30_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -30588,7 +30588,7 @@ unsigned long REGPARAM2 op_30_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_38_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_38_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -30607,7 +30607,7 @@ unsigned long REGPARAM2 op_38_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_39_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_39_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -30626,7 +30626,7 @@ unsigned long REGPARAM2 op_39_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3c_0_comp_nf(uae_u32 opcode) /* ORSR */ +uae_u32 REGPARAM2 op_3c_0_comp_nf(uae_u32 opcode) /* ORSR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -30637,7 +30637,7 @@ unsigned long REGPARAM2 op_3c_0_comp_nf(uae_u32 opcode) /* ORSR */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_40_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_40_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -30655,7 +30655,7 @@ unsigned long REGPARAM2 op_40_0_comp_nf(uae_u32 opcode) /* OR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_50_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_50_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -30676,7 +30676,7 @@ unsigned long REGPARAM2 op_50_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_58_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_58_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -30697,7 +30697,7 @@ unsigned long REGPARAM2 op_58_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_60_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_60_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -30719,7 +30719,7 @@ unsigned long REGPARAM2 op_60_0_comp_nf(uae_u32 opcode) /* OR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_68_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_68_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -30740,7 +30740,7 @@ unsigned long REGPARAM2 op_68_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_70_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_70_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -30760,7 +30760,7 @@ unsigned long REGPARAM2 op_70_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_78_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_78_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -30779,7 +30779,7 @@ unsigned long REGPARAM2 op_78_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_79_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_79_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -30798,7 +30798,7 @@ unsigned long REGPARAM2 op_79_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_80_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_80_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -30816,7 +30816,7 @@ unsigned long REGPARAM2 op_80_0_comp_nf(uae_u32 opcode) /* OR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_90_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -30837,7 +30837,7 @@ unsigned long REGPARAM2 op_90_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_98_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_98_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -30858,7 +30858,7 @@ unsigned long REGPARAM2 op_98_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a0_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_a0_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -30880,7 +30880,7 @@ unsigned long REGPARAM2 op_a0_0_comp_nf(uae_u32 opcode) /* OR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a8_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_a8_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -30901,7 +30901,7 @@ unsigned long REGPARAM2 op_a8_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_b0_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -30921,7 +30921,7 @@ unsigned long REGPARAM2 op_b0_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b8_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_b8_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -30940,7 +30940,7 @@ unsigned long REGPARAM2 op_b8_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b9_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_b9_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -30959,7 +30959,7 @@ unsigned long REGPARAM2 op_b9_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_100_0_comp_nf(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_100_0_comp_nf(uae_u32 opcode) /* BTST */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -30973,7 +30973,7 @@ unsigned long REGPARAM2 op_100_0_comp_nf(uae_u32 opcode) /* BTST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_110_0_comp_nf(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_110_0_comp_nf(uae_u32 opcode) /* BTST */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -30991,7 +30991,7 @@ unsigned long REGPARAM2 op_110_0_comp_nf(uae_u32 opcode) /* BTST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_118_0_comp_nf(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_118_0_comp_nf(uae_u32 opcode) /* BTST */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31009,7 +31009,7 @@ unsigned long REGPARAM2 op_118_0_comp_nf(uae_u32 opcode) /* BTST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_120_0_comp_nf(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_120_0_comp_nf(uae_u32 opcode) /* BTST */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31028,7 +31028,7 @@ unsigned long REGPARAM2 op_120_0_comp_nf(uae_u32 opcode) /* BTST */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_128_0_comp_nf(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_128_0_comp_nf(uae_u32 opcode) /* BTST */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31046,7 +31046,7 @@ unsigned long REGPARAM2 op_128_0_comp_nf(uae_u32 opcode) /* BTST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_130_0_comp_nf(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_130_0_comp_nf(uae_u32 opcode) /* BTST */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31063,7 +31063,7 @@ unsigned long REGPARAM2 op_130_0_comp_nf(uae_u32 opcode) /* BTST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_138_0_comp_nf(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_138_0_comp_nf(uae_u32 opcode) /* BTST */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -31079,7 +31079,7 @@ unsigned long REGPARAM2 op_138_0_comp_nf(uae_u32 opcode) /* BTST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_139_0_comp_nf(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_139_0_comp_nf(uae_u32 opcode) /* BTST */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -31095,7 +31095,7 @@ unsigned long REGPARAM2 op_139_0_comp_nf(uae_u32 opcode) /* BTST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_13a_0_comp_nf(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_13a_0_comp_nf(uae_u32 opcode) /* BTST */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_s32 dstreg = 2; @@ -31114,7 +31114,7 @@ unsigned long REGPARAM2 op_13a_0_comp_nf(uae_u32 opcode) /* BTST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_13b_0_comp_nf(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_13b_0_comp_nf(uae_u32 opcode) /* BTST */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_s32 dstreg = 3; @@ -31134,7 +31134,7 @@ unsigned long REGPARAM2 op_13b_0_comp_nf(uae_u32 opcode) /* BTST */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_13c_0_comp_nf(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_13c_0_comp_nf(uae_u32 opcode) /* BTST */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -31148,7 +31148,7 @@ unsigned long REGPARAM2 op_13c_0_comp_nf(uae_u32 opcode) /* BTST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_140_0_comp_nf(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_140_0_comp_nf(uae_u32 opcode) /* BCHG */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31165,7 +31165,7 @@ unsigned long REGPARAM2 op_140_0_comp_nf(uae_u32 opcode) /* BCHG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_150_0_comp_nf(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_150_0_comp_nf(uae_u32 opcode) /* BCHG */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31185,7 +31185,7 @@ unsigned long REGPARAM2 op_150_0_comp_nf(uae_u32 opcode) /* BCHG */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_158_0_comp_nf(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_158_0_comp_nf(uae_u32 opcode) /* BCHG */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31205,7 +31205,7 @@ unsigned long REGPARAM2 op_158_0_comp_nf(uae_u32 opcode) /* BCHG */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_160_0_comp_nf(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_160_0_comp_nf(uae_u32 opcode) /* BCHG */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31226,7 +31226,7 @@ unsigned long REGPARAM2 op_160_0_comp_nf(uae_u32 opcode) /* BCHG */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_168_0_comp_nf(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_168_0_comp_nf(uae_u32 opcode) /* BCHG */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31246,7 +31246,7 @@ unsigned long REGPARAM2 op_168_0_comp_nf(uae_u32 opcode) /* BCHG */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_170_0_comp_nf(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_170_0_comp_nf(uae_u32 opcode) /* BCHG */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31265,7 +31265,7 @@ unsigned long REGPARAM2 op_170_0_comp_nf(uae_u32 opcode) /* BCHG */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_178_0_comp_nf(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_178_0_comp_nf(uae_u32 opcode) /* BCHG */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -31283,7 +31283,7 @@ unsigned long REGPARAM2 op_178_0_comp_nf(uae_u32 opcode) /* BCHG */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_179_0_comp_nf(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_179_0_comp_nf(uae_u32 opcode) /* BCHG */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -31301,7 +31301,7 @@ unsigned long REGPARAM2 op_179_0_comp_nf(uae_u32 opcode) /* BCHG */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_180_0_comp_nf(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_180_0_comp_nf(uae_u32 opcode) /* BCLR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31318,7 +31318,7 @@ unsigned long REGPARAM2 op_180_0_comp_nf(uae_u32 opcode) /* BCLR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_190_0_comp_nf(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_190_0_comp_nf(uae_u32 opcode) /* BCLR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31338,7 +31338,7 @@ unsigned long REGPARAM2 op_190_0_comp_nf(uae_u32 opcode) /* BCLR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_198_0_comp_nf(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_198_0_comp_nf(uae_u32 opcode) /* BCLR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31358,7 +31358,7 @@ unsigned long REGPARAM2 op_198_0_comp_nf(uae_u32 opcode) /* BCLR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1a0_0_comp_nf(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_1a0_0_comp_nf(uae_u32 opcode) /* BCLR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31379,7 +31379,7 @@ unsigned long REGPARAM2 op_1a0_0_comp_nf(uae_u32 opcode) /* BCLR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1a8_0_comp_nf(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_1a8_0_comp_nf(uae_u32 opcode) /* BCLR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31399,7 +31399,7 @@ unsigned long REGPARAM2 op_1a8_0_comp_nf(uae_u32 opcode) /* BCLR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1b0_0_comp_nf(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_1b0_0_comp_nf(uae_u32 opcode) /* BCLR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31418,7 +31418,7 @@ unsigned long REGPARAM2 op_1b0_0_comp_nf(uae_u32 opcode) /* BCLR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1b8_0_comp_nf(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_1b8_0_comp_nf(uae_u32 opcode) /* BCLR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -31436,7 +31436,7 @@ unsigned long REGPARAM2 op_1b8_0_comp_nf(uae_u32 opcode) /* BCLR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1b9_0_comp_nf(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_1b9_0_comp_nf(uae_u32 opcode) /* BCLR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -31454,7 +31454,7 @@ unsigned long REGPARAM2 op_1b9_0_comp_nf(uae_u32 opcode) /* BCLR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1c0_0_comp_nf(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_1c0_0_comp_nf(uae_u32 opcode) /* BSET */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31471,7 +31471,7 @@ unsigned long REGPARAM2 op_1c0_0_comp_nf(uae_u32 opcode) /* BSET */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1d0_0_comp_nf(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_1d0_0_comp_nf(uae_u32 opcode) /* BSET */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31491,7 +31491,7 @@ unsigned long REGPARAM2 op_1d0_0_comp_nf(uae_u32 opcode) /* BSET */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1d8_0_comp_nf(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_1d8_0_comp_nf(uae_u32 opcode) /* BSET */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31511,7 +31511,7 @@ unsigned long REGPARAM2 op_1d8_0_comp_nf(uae_u32 opcode) /* BSET */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1e0_0_comp_nf(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_1e0_0_comp_nf(uae_u32 opcode) /* BSET */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31532,7 +31532,7 @@ unsigned long REGPARAM2 op_1e0_0_comp_nf(uae_u32 opcode) /* BSET */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1e8_0_comp_nf(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_1e8_0_comp_nf(uae_u32 opcode) /* BSET */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31552,7 +31552,7 @@ unsigned long REGPARAM2 op_1e8_0_comp_nf(uae_u32 opcode) /* BSET */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1f0_0_comp_nf(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_1f0_0_comp_nf(uae_u32 opcode) /* BSET */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -31571,7 +31571,7 @@ unsigned long REGPARAM2 op_1f0_0_comp_nf(uae_u32 opcode) /* BSET */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1f8_0_comp_nf(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_1f8_0_comp_nf(uae_u32 opcode) /* BSET */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -31589,7 +31589,7 @@ unsigned long REGPARAM2 op_1f8_0_comp_nf(uae_u32 opcode) /* BSET */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1f9_0_comp_nf(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_1f9_0_comp_nf(uae_u32 opcode) /* BSET */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -31607,7 +31607,7 @@ unsigned long REGPARAM2 op_1f9_0_comp_nf(uae_u32 opcode) /* BSET */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_200_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_200_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -31625,7 +31625,7 @@ unsigned long REGPARAM2 op_200_0_comp_nf(uae_u32 opcode) /* AND */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_210_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_210_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -31646,7 +31646,7 @@ unsigned long REGPARAM2 op_210_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_218_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_218_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -31667,7 +31667,7 @@ unsigned long REGPARAM2 op_218_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_220_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_220_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -31689,7 +31689,7 @@ unsigned long REGPARAM2 op_220_0_comp_nf(uae_u32 opcode) /* AND */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_228_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_228_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -31710,7 +31710,7 @@ unsigned long REGPARAM2 op_228_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_230_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_230_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -31730,7 +31730,7 @@ unsigned long REGPARAM2 op_230_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_238_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_238_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -31749,7 +31749,7 @@ unsigned long REGPARAM2 op_238_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_239_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_239_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -31768,7 +31768,7 @@ unsigned long REGPARAM2 op_239_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_23c_0_comp_nf(uae_u32 opcode) /* ANDSR */ +uae_u32 REGPARAM2 op_23c_0_comp_nf(uae_u32 opcode) /* ANDSR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -31779,7 +31779,7 @@ unsigned long REGPARAM2 op_23c_0_comp_nf(uae_u32 opcode) /* ANDSR */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_240_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_240_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -31797,7 +31797,7 @@ unsigned long REGPARAM2 op_240_0_comp_nf(uae_u32 opcode) /* AND */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_250_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_250_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -31818,7 +31818,7 @@ unsigned long REGPARAM2 op_250_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_258_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_258_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -31839,7 +31839,7 @@ unsigned long REGPARAM2 op_258_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_260_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_260_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -31861,7 +31861,7 @@ unsigned long REGPARAM2 op_260_0_comp_nf(uae_u32 opcode) /* AND */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_268_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_268_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -31882,7 +31882,7 @@ unsigned long REGPARAM2 op_268_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_270_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_270_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -31902,7 +31902,7 @@ unsigned long REGPARAM2 op_270_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_278_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_278_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -31921,7 +31921,7 @@ unsigned long REGPARAM2 op_278_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_279_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_279_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -31940,7 +31940,7 @@ unsigned long REGPARAM2 op_279_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_280_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_280_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -31958,7 +31958,7 @@ unsigned long REGPARAM2 op_280_0_comp_nf(uae_u32 opcode) /* AND */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_290_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_290_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -31979,7 +31979,7 @@ unsigned long REGPARAM2 op_290_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_298_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_298_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32000,7 +32000,7 @@ unsigned long REGPARAM2 op_298_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2a0_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_2a0_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32022,7 +32022,7 @@ unsigned long REGPARAM2 op_2a0_0_comp_nf(uae_u32 opcode) /* AND */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2a8_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_2a8_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32043,7 +32043,7 @@ unsigned long REGPARAM2 op_2a8_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2b0_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_2b0_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32063,7 +32063,7 @@ unsigned long REGPARAM2 op_2b0_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2b8_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_2b8_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -32082,7 +32082,7 @@ unsigned long REGPARAM2 op_2b8_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2b9_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_2b9_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -32101,7 +32101,7 @@ unsigned long REGPARAM2 op_2b9_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_400_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_400_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32119,7 +32119,7 @@ unsigned long REGPARAM2 op_400_0_comp_nf(uae_u32 opcode) /* SUB */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_410_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_410_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32140,7 +32140,7 @@ unsigned long REGPARAM2 op_410_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_418_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_418_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32161,7 +32161,7 @@ unsigned long REGPARAM2 op_418_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_420_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_420_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32183,7 +32183,7 @@ unsigned long REGPARAM2 op_420_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_428_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_428_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32204,7 +32204,7 @@ unsigned long REGPARAM2 op_428_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_430_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_430_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32224,7 +32224,7 @@ unsigned long REGPARAM2 op_430_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_438_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_438_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -32243,7 +32243,7 @@ unsigned long REGPARAM2 op_438_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_439_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_439_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -32262,7 +32262,7 @@ unsigned long REGPARAM2 op_439_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_440_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_440_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32280,7 +32280,7 @@ unsigned long REGPARAM2 op_440_0_comp_nf(uae_u32 opcode) /* SUB */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_450_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_450_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32301,7 +32301,7 @@ unsigned long REGPARAM2 op_450_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_458_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_458_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32322,7 +32322,7 @@ unsigned long REGPARAM2 op_458_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_460_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_460_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32344,7 +32344,7 @@ unsigned long REGPARAM2 op_460_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_468_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_468_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32365,7 +32365,7 @@ unsigned long REGPARAM2 op_468_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_470_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_470_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32385,7 +32385,7 @@ unsigned long REGPARAM2 op_470_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_478_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_478_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -32404,7 +32404,7 @@ unsigned long REGPARAM2 op_478_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_479_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_479_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -32423,7 +32423,7 @@ unsigned long REGPARAM2 op_479_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_480_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_480_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32441,7 +32441,7 @@ unsigned long REGPARAM2 op_480_0_comp_nf(uae_u32 opcode) /* SUB */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_490_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_490_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32462,7 +32462,7 @@ unsigned long REGPARAM2 op_490_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_498_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_498_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32483,7 +32483,7 @@ unsigned long REGPARAM2 op_498_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a0_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_4a0_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32505,7 +32505,7 @@ unsigned long REGPARAM2 op_4a0_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a8_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_4a8_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32526,7 +32526,7 @@ unsigned long REGPARAM2 op_4a8_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4b0_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_4b0_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32546,7 +32546,7 @@ unsigned long REGPARAM2 op_4b0_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4b8_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_4b8_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -32565,7 +32565,7 @@ unsigned long REGPARAM2 op_4b8_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4b9_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_4b9_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -32584,7 +32584,7 @@ unsigned long REGPARAM2 op_4b9_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_600_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_600_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32602,7 +32602,7 @@ unsigned long REGPARAM2 op_600_0_comp_nf(uae_u32 opcode) /* ADD */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_610_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_610_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32623,7 +32623,7 @@ unsigned long REGPARAM2 op_610_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_618_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_618_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32644,7 +32644,7 @@ unsigned long REGPARAM2 op_618_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_620_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_620_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32666,7 +32666,7 @@ unsigned long REGPARAM2 op_620_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_628_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_628_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32687,7 +32687,7 @@ unsigned long REGPARAM2 op_628_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_630_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_630_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32707,7 +32707,7 @@ unsigned long REGPARAM2 op_630_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_638_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_638_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -32726,7 +32726,7 @@ unsigned long REGPARAM2 op_638_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_639_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_639_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -32745,7 +32745,7 @@ unsigned long REGPARAM2 op_639_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_640_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_640_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32763,7 +32763,7 @@ unsigned long REGPARAM2 op_640_0_comp_nf(uae_u32 opcode) /* ADD */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_650_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_650_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32784,7 +32784,7 @@ unsigned long REGPARAM2 op_650_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_658_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_658_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32805,7 +32805,7 @@ unsigned long REGPARAM2 op_658_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_660_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_660_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32827,7 +32827,7 @@ unsigned long REGPARAM2 op_660_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_668_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_668_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32848,7 +32848,7 @@ unsigned long REGPARAM2 op_668_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_670_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_670_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32868,7 +32868,7 @@ unsigned long REGPARAM2 op_670_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_678_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_678_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -32887,7 +32887,7 @@ unsigned long REGPARAM2 op_678_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_679_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_679_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -32906,7 +32906,7 @@ unsigned long REGPARAM2 op_679_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_680_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_680_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32924,7 +32924,7 @@ unsigned long REGPARAM2 op_680_0_comp_nf(uae_u32 opcode) /* ADD */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_690_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_690_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32945,7 +32945,7 @@ unsigned long REGPARAM2 op_690_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_698_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_698_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32966,7 +32966,7 @@ unsigned long REGPARAM2 op_698_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6a0_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_6a0_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -32988,7 +32988,7 @@ unsigned long REGPARAM2 op_6a0_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6a8_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_6a8_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33009,7 +33009,7 @@ unsigned long REGPARAM2 op_6a8_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6b0_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_6b0_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33029,7 +33029,7 @@ unsigned long REGPARAM2 op_6b0_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6b8_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_6b8_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -33048,7 +33048,7 @@ unsigned long REGPARAM2 op_6b8_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6b9_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_6b9_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -33067,7 +33067,7 @@ unsigned long REGPARAM2 op_6b9_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_800_0_comp_nf(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_800_0_comp_nf(uae_u32 opcode) /* BTST */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33081,7 +33081,7 @@ unsigned long REGPARAM2 op_800_0_comp_nf(uae_u32 opcode) /* BTST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_810_0_comp_nf(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_810_0_comp_nf(uae_u32 opcode) /* BTST */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33099,7 +33099,7 @@ unsigned long REGPARAM2 op_810_0_comp_nf(uae_u32 opcode) /* BTST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_818_0_comp_nf(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_818_0_comp_nf(uae_u32 opcode) /* BTST */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33117,7 +33117,7 @@ unsigned long REGPARAM2 op_818_0_comp_nf(uae_u32 opcode) /* BTST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_820_0_comp_nf(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_820_0_comp_nf(uae_u32 opcode) /* BTST */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33136,7 +33136,7 @@ unsigned long REGPARAM2 op_820_0_comp_nf(uae_u32 opcode) /* BTST */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_828_0_comp_nf(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_828_0_comp_nf(uae_u32 opcode) /* BTST */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33154,7 +33154,7 @@ unsigned long REGPARAM2 op_828_0_comp_nf(uae_u32 opcode) /* BTST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_830_0_comp_nf(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_830_0_comp_nf(uae_u32 opcode) /* BTST */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33171,7 +33171,7 @@ unsigned long REGPARAM2 op_830_0_comp_nf(uae_u32 opcode) /* BTST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_838_0_comp_nf(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_838_0_comp_nf(uae_u32 opcode) /* BTST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -33187,7 +33187,7 @@ unsigned long REGPARAM2 op_838_0_comp_nf(uae_u32 opcode) /* BTST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_839_0_comp_nf(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_839_0_comp_nf(uae_u32 opcode) /* BTST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -33203,7 +33203,7 @@ unsigned long REGPARAM2 op_839_0_comp_nf(uae_u32 opcode) /* BTST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_83a_0_comp_nf(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_83a_0_comp_nf(uae_u32 opcode) /* BTST */ { uae_s32 dstreg = 2; uae_u32 dodgy=0; @@ -33222,7 +33222,7 @@ unsigned long REGPARAM2 op_83a_0_comp_nf(uae_u32 opcode) /* BTST */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_83b_0_comp_nf(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_83b_0_comp_nf(uae_u32 opcode) /* BTST */ { uae_s32 dstreg = 3; uae_u32 dodgy=0; @@ -33242,7 +33242,7 @@ unsigned long REGPARAM2 op_83b_0_comp_nf(uae_u32 opcode) /* BTST */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_83c_0_comp_nf(uae_u32 opcode) /* BTST */ +uae_u32 REGPARAM2 op_83c_0_comp_nf(uae_u32 opcode) /* BTST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -33256,7 +33256,7 @@ unsigned long REGPARAM2 op_83c_0_comp_nf(uae_u32 opcode) /* BTST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_840_0_comp_nf(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_840_0_comp_nf(uae_u32 opcode) /* BCHG */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33273,7 +33273,7 @@ unsigned long REGPARAM2 op_840_0_comp_nf(uae_u32 opcode) /* BCHG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_850_0_comp_nf(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_850_0_comp_nf(uae_u32 opcode) /* BCHG */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33293,7 +33293,7 @@ unsigned long REGPARAM2 op_850_0_comp_nf(uae_u32 opcode) /* BCHG */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_858_0_comp_nf(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_858_0_comp_nf(uae_u32 opcode) /* BCHG */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33313,7 +33313,7 @@ unsigned long REGPARAM2 op_858_0_comp_nf(uae_u32 opcode) /* BCHG */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_860_0_comp_nf(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_860_0_comp_nf(uae_u32 opcode) /* BCHG */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33334,7 +33334,7 @@ unsigned long REGPARAM2 op_860_0_comp_nf(uae_u32 opcode) /* BCHG */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_868_0_comp_nf(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_868_0_comp_nf(uae_u32 opcode) /* BCHG */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33354,7 +33354,7 @@ unsigned long REGPARAM2 op_868_0_comp_nf(uae_u32 opcode) /* BCHG */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_870_0_comp_nf(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_870_0_comp_nf(uae_u32 opcode) /* BCHG */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33373,7 +33373,7 @@ unsigned long REGPARAM2 op_870_0_comp_nf(uae_u32 opcode) /* BCHG */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_878_0_comp_nf(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_878_0_comp_nf(uae_u32 opcode) /* BCHG */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -33391,7 +33391,7 @@ unsigned long REGPARAM2 op_878_0_comp_nf(uae_u32 opcode) /* BCHG */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_879_0_comp_nf(uae_u32 opcode) /* BCHG */ +uae_u32 REGPARAM2 op_879_0_comp_nf(uae_u32 opcode) /* BCHG */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -33409,7 +33409,7 @@ unsigned long REGPARAM2 op_879_0_comp_nf(uae_u32 opcode) /* BCHG */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_880_0_comp_nf(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_880_0_comp_nf(uae_u32 opcode) /* BCLR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33426,7 +33426,7 @@ unsigned long REGPARAM2 op_880_0_comp_nf(uae_u32 opcode) /* BCLR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_890_0_comp_nf(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_890_0_comp_nf(uae_u32 opcode) /* BCLR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33446,7 +33446,7 @@ unsigned long REGPARAM2 op_890_0_comp_nf(uae_u32 opcode) /* BCLR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_898_0_comp_nf(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_898_0_comp_nf(uae_u32 opcode) /* BCLR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33466,7 +33466,7 @@ unsigned long REGPARAM2 op_898_0_comp_nf(uae_u32 opcode) /* BCLR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8a0_0_comp_nf(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_8a0_0_comp_nf(uae_u32 opcode) /* BCLR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33487,7 +33487,7 @@ unsigned long REGPARAM2 op_8a0_0_comp_nf(uae_u32 opcode) /* BCLR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8a8_0_comp_nf(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_8a8_0_comp_nf(uae_u32 opcode) /* BCLR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33507,7 +33507,7 @@ unsigned long REGPARAM2 op_8a8_0_comp_nf(uae_u32 opcode) /* BCLR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8b0_0_comp_nf(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_8b0_0_comp_nf(uae_u32 opcode) /* BCLR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33526,7 +33526,7 @@ unsigned long REGPARAM2 op_8b0_0_comp_nf(uae_u32 opcode) /* BCLR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8b8_0_comp_nf(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_8b8_0_comp_nf(uae_u32 opcode) /* BCLR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -33544,7 +33544,7 @@ unsigned long REGPARAM2 op_8b8_0_comp_nf(uae_u32 opcode) /* BCLR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8b9_0_comp_nf(uae_u32 opcode) /* BCLR */ +uae_u32 REGPARAM2 op_8b9_0_comp_nf(uae_u32 opcode) /* BCLR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -33562,7 +33562,7 @@ unsigned long REGPARAM2 op_8b9_0_comp_nf(uae_u32 opcode) /* BCLR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8c0_0_comp_nf(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_8c0_0_comp_nf(uae_u32 opcode) /* BSET */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33579,7 +33579,7 @@ unsigned long REGPARAM2 op_8c0_0_comp_nf(uae_u32 opcode) /* BSET */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8d0_0_comp_nf(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_8d0_0_comp_nf(uae_u32 opcode) /* BSET */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33599,7 +33599,7 @@ unsigned long REGPARAM2 op_8d0_0_comp_nf(uae_u32 opcode) /* BSET */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8d8_0_comp_nf(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_8d8_0_comp_nf(uae_u32 opcode) /* BSET */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33619,7 +33619,7 @@ unsigned long REGPARAM2 op_8d8_0_comp_nf(uae_u32 opcode) /* BSET */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8e0_0_comp_nf(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_8e0_0_comp_nf(uae_u32 opcode) /* BSET */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33640,7 +33640,7 @@ unsigned long REGPARAM2 op_8e0_0_comp_nf(uae_u32 opcode) /* BSET */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8e8_0_comp_nf(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_8e8_0_comp_nf(uae_u32 opcode) /* BSET */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33660,7 +33660,7 @@ unsigned long REGPARAM2 op_8e8_0_comp_nf(uae_u32 opcode) /* BSET */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8f0_0_comp_nf(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_8f0_0_comp_nf(uae_u32 opcode) /* BSET */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33679,7 +33679,7 @@ unsigned long REGPARAM2 op_8f0_0_comp_nf(uae_u32 opcode) /* BSET */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8f8_0_comp_nf(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_8f8_0_comp_nf(uae_u32 opcode) /* BSET */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -33697,7 +33697,7 @@ unsigned long REGPARAM2 op_8f8_0_comp_nf(uae_u32 opcode) /* BSET */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8f9_0_comp_nf(uae_u32 opcode) /* BSET */ +uae_u32 REGPARAM2 op_8f9_0_comp_nf(uae_u32 opcode) /* BSET */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -33715,7 +33715,7 @@ unsigned long REGPARAM2 op_8f9_0_comp_nf(uae_u32 opcode) /* BSET */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a00_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a00_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33733,7 +33733,7 @@ unsigned long REGPARAM2 op_a00_0_comp_nf(uae_u32 opcode) /* EOR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a10_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a10_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33754,7 +33754,7 @@ unsigned long REGPARAM2 op_a10_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a18_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a18_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33775,7 +33775,7 @@ unsigned long REGPARAM2 op_a18_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a20_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a20_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33797,7 +33797,7 @@ unsigned long REGPARAM2 op_a20_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a28_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a28_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33818,7 +33818,7 @@ unsigned long REGPARAM2 op_a28_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a30_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a30_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33838,7 +33838,7 @@ unsigned long REGPARAM2 op_a30_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a38_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a38_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -33857,7 +33857,7 @@ unsigned long REGPARAM2 op_a38_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a39_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a39_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -33876,7 +33876,7 @@ unsigned long REGPARAM2 op_a39_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a3c_0_comp_nf(uae_u32 opcode) /* EORSR */ +uae_u32 REGPARAM2 op_a3c_0_comp_nf(uae_u32 opcode) /* EORSR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -33887,7 +33887,7 @@ unsigned long REGPARAM2 op_a3c_0_comp_nf(uae_u32 opcode) /* EORSR */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a40_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a40_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33905,7 +33905,7 @@ unsigned long REGPARAM2 op_a40_0_comp_nf(uae_u32 opcode) /* EOR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a50_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a50_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33926,7 +33926,7 @@ unsigned long REGPARAM2 op_a50_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a58_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a58_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33947,7 +33947,7 @@ unsigned long REGPARAM2 op_a58_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a60_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a60_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33969,7 +33969,7 @@ unsigned long REGPARAM2 op_a60_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a68_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a68_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -33990,7 +33990,7 @@ unsigned long REGPARAM2 op_a68_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a70_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a70_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -34010,7 +34010,7 @@ unsigned long REGPARAM2 op_a70_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a78_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a78_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -34029,7 +34029,7 @@ unsigned long REGPARAM2 op_a78_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a79_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a79_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -34048,7 +34048,7 @@ unsigned long REGPARAM2 op_a79_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a80_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a80_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -34066,7 +34066,7 @@ unsigned long REGPARAM2 op_a80_0_comp_nf(uae_u32 opcode) /* EOR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a90_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a90_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -34087,7 +34087,7 @@ unsigned long REGPARAM2 op_a90_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_a98_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_a98_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -34108,7 +34108,7 @@ unsigned long REGPARAM2 op_a98_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_aa0_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_aa0_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -34130,7 +34130,7 @@ unsigned long REGPARAM2 op_aa0_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_aa8_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_aa8_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -34151,7 +34151,7 @@ unsigned long REGPARAM2 op_aa8_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_ab0_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_ab0_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -34171,7 +34171,7 @@ unsigned long REGPARAM2 op_ab0_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_ab8_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_ab8_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -34190,7 +34190,7 @@ unsigned long REGPARAM2 op_ab8_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_ab9_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_ab9_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -34212,7 +34212,7 @@ return 0; #endif #ifdef PART_2 -unsigned long REGPARAM2 op_c00_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c00_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -34227,7 +34227,7 @@ unsigned long REGPARAM2 op_c00_0_comp_nf(uae_u32 opcode) /* CMP */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c10_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c10_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -34246,7 +34246,7 @@ unsigned long REGPARAM2 op_c10_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c18_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c18_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -34265,7 +34265,7 @@ unsigned long REGPARAM2 op_c18_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c20_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c20_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -34285,7 +34285,7 @@ unsigned long REGPARAM2 op_c20_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c28_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c28_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -34304,7 +34304,7 @@ unsigned long REGPARAM2 op_c28_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c30_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c30_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -34322,7 +34322,7 @@ unsigned long REGPARAM2 op_c30_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c38_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c38_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -34339,7 +34339,7 @@ unsigned long REGPARAM2 op_c38_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c39_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c39_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -34356,7 +34356,7 @@ unsigned long REGPARAM2 op_c39_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c3a_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c3a_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_s32 dstreg = 2; uae_u32 dodgy=0; @@ -34376,7 +34376,7 @@ unsigned long REGPARAM2 op_c3a_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c3b_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c3b_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_s32 dstreg = 3; uae_u32 dodgy=0; @@ -34397,7 +34397,7 @@ unsigned long REGPARAM2 op_c3b_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c40_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c40_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -34412,7 +34412,7 @@ unsigned long REGPARAM2 op_c40_0_comp_nf(uae_u32 opcode) /* CMP */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c50_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c50_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -34431,7 +34431,7 @@ unsigned long REGPARAM2 op_c50_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c58_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c58_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -34450,7 +34450,7 @@ unsigned long REGPARAM2 op_c58_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c60_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c60_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -34470,7 +34470,7 @@ unsigned long REGPARAM2 op_c60_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c68_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c68_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -34489,7 +34489,7 @@ unsigned long REGPARAM2 op_c68_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c70_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c70_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -34507,7 +34507,7 @@ unsigned long REGPARAM2 op_c70_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c78_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c78_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -34524,7 +34524,7 @@ unsigned long REGPARAM2 op_c78_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c79_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c79_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -34541,7 +34541,7 @@ unsigned long REGPARAM2 op_c79_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c7a_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c7a_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_s32 dstreg = 2; uae_u32 dodgy=0; @@ -34561,7 +34561,7 @@ unsigned long REGPARAM2 op_c7a_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c7b_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c7b_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_s32 dstreg = 3; uae_u32 dodgy=0; @@ -34582,7 +34582,7 @@ unsigned long REGPARAM2 op_c7b_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c80_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c80_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -34597,7 +34597,7 @@ unsigned long REGPARAM2 op_c80_0_comp_nf(uae_u32 opcode) /* CMP */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c90_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c90_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -34616,7 +34616,7 @@ unsigned long REGPARAM2 op_c90_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c98_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_c98_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -34635,7 +34635,7 @@ unsigned long REGPARAM2 op_c98_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_ca0_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_ca0_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -34655,7 +34655,7 @@ unsigned long REGPARAM2 op_ca0_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_ca8_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_ca8_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -34674,7 +34674,7 @@ unsigned long REGPARAM2 op_ca8_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_cb0_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_cb0_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -34692,7 +34692,7 @@ unsigned long REGPARAM2 op_cb0_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_cb8_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_cb8_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -34709,7 +34709,7 @@ unsigned long REGPARAM2 op_cb8_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_cb9_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_cb9_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -34726,7 +34726,7 @@ unsigned long REGPARAM2 op_cb9_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_cba_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_cba_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_s32 dstreg = 2; uae_u32 dodgy=0; @@ -34746,7 +34746,7 @@ unsigned long REGPARAM2 op_cba_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_cbb_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_cbb_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_s32 dstreg = 3; uae_u32 dodgy=0; @@ -34767,7 +34767,7 @@ unsigned long REGPARAM2 op_cbb_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1000_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1000_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -34785,7 +34785,7 @@ unsigned long REGPARAM2 op_1000_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1010_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1010_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -34807,7 +34807,7 @@ unsigned long REGPARAM2 op_1010_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1018_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1018_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -34829,7 +34829,7 @@ unsigned long REGPARAM2 op_1018_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1020_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1020_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -34852,7 +34852,7 @@ unsigned long REGPARAM2 op_1020_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1028_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1028_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -34874,7 +34874,7 @@ unsigned long REGPARAM2 op_1028_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1030_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1030_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -34895,7 +34895,7 @@ unsigned long REGPARAM2 op_1030_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1038_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1038_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -34915,7 +34915,7 @@ unsigned long REGPARAM2 op_1038_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1039_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1039_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -34935,7 +34935,7 @@ unsigned long REGPARAM2 op_1039_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_103a_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_103a_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -34957,7 +34957,7 @@ unsigned long REGPARAM2 op_103a_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_103b_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_103b_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -34980,7 +34980,7 @@ unsigned long REGPARAM2 op_103b_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_103c_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_103c_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -34998,7 +34998,7 @@ unsigned long REGPARAM2 op_103c_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1080_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1080_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35015,7 +35015,7 @@ unsigned long REGPARAM2 op_1080_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1090_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1090_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35036,7 +35036,7 @@ unsigned long REGPARAM2 op_1090_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1098_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1098_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35057,7 +35057,7 @@ unsigned long REGPARAM2 op_1098_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10a0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10a0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35079,7 +35079,7 @@ unsigned long REGPARAM2 op_10a0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10a8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10a8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35100,7 +35100,7 @@ unsigned long REGPARAM2 op_10a8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10b0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10b0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35120,7 +35120,7 @@ unsigned long REGPARAM2 op_10b0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10b8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10b8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -35139,7 +35139,7 @@ unsigned long REGPARAM2 op_10b8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10b9_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10b9_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -35158,7 +35158,7 @@ unsigned long REGPARAM2 op_10b9_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10ba_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10ba_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -35179,7 +35179,7 @@ unsigned long REGPARAM2 op_10ba_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10bb_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10bb_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -35201,7 +35201,7 @@ unsigned long REGPARAM2 op_10bb_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10bc_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10bc_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -35218,7 +35218,7 @@ unsigned long REGPARAM2 op_10bc_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10c0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10c0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35235,7 +35235,7 @@ unsigned long REGPARAM2 op_10c0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10d0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10d0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35256,7 +35256,7 @@ unsigned long REGPARAM2 op_10d0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10d8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10d8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35277,7 +35277,7 @@ unsigned long REGPARAM2 op_10d8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10e0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10e0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35299,7 +35299,7 @@ unsigned long REGPARAM2 op_10e0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10e8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10e8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35320,7 +35320,7 @@ unsigned long REGPARAM2 op_10e8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10f0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10f0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35340,7 +35340,7 @@ unsigned long REGPARAM2 op_10f0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10f8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10f8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -35359,7 +35359,7 @@ unsigned long REGPARAM2 op_10f8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10f9_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10f9_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -35378,7 +35378,7 @@ unsigned long REGPARAM2 op_10f9_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10fa_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10fa_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -35399,7 +35399,7 @@ unsigned long REGPARAM2 op_10fa_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10fb_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10fb_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -35421,7 +35421,7 @@ unsigned long REGPARAM2 op_10fb_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_10fc_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_10fc_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -35438,7 +35438,7 @@ unsigned long REGPARAM2 op_10fc_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1100_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1100_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35456,7 +35456,7 @@ unsigned long REGPARAM2 op_1100_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1110_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1110_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35478,7 +35478,7 @@ unsigned long REGPARAM2 op_1110_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1118_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1118_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35500,7 +35500,7 @@ unsigned long REGPARAM2 op_1118_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1120_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1120_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35523,7 +35523,7 @@ unsigned long REGPARAM2 op_1120_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1128_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1128_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35545,7 +35545,7 @@ unsigned long REGPARAM2 op_1128_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1130_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1130_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35566,7 +35566,7 @@ unsigned long REGPARAM2 op_1130_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1138_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1138_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -35586,7 +35586,7 @@ unsigned long REGPARAM2 op_1138_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1139_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1139_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -35606,7 +35606,7 @@ unsigned long REGPARAM2 op_1139_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_113a_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_113a_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -35628,7 +35628,7 @@ unsigned long REGPARAM2 op_113a_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_113b_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_113b_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -35651,7 +35651,7 @@ unsigned long REGPARAM2 op_113b_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_113c_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_113c_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -35669,7 +35669,7 @@ unsigned long REGPARAM2 op_113c_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1140_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1140_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35686,7 +35686,7 @@ unsigned long REGPARAM2 op_1140_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1150_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1150_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35707,7 +35707,7 @@ unsigned long REGPARAM2 op_1150_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1158_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1158_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35728,7 +35728,7 @@ unsigned long REGPARAM2 op_1158_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1160_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1160_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35750,7 +35750,7 @@ unsigned long REGPARAM2 op_1160_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1168_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1168_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35771,7 +35771,7 @@ unsigned long REGPARAM2 op_1168_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1170_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1170_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35791,7 +35791,7 @@ unsigned long REGPARAM2 op_1170_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1178_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1178_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -35810,7 +35810,7 @@ unsigned long REGPARAM2 op_1178_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1179_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1179_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -35829,7 +35829,7 @@ unsigned long REGPARAM2 op_1179_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_117a_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_117a_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -35850,7 +35850,7 @@ unsigned long REGPARAM2 op_117a_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_117b_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_117b_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -35872,7 +35872,7 @@ unsigned long REGPARAM2 op_117b_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_117c_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_117c_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -35889,7 +35889,7 @@ unsigned long REGPARAM2 op_117c_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1180_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1180_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35905,7 +35905,7 @@ unsigned long REGPARAM2 op_1180_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1190_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1190_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35925,7 +35925,7 @@ unsigned long REGPARAM2 op_1190_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_1198_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_1198_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35945,7 +35945,7 @@ unsigned long REGPARAM2 op_1198_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11a0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11a0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35966,7 +35966,7 @@ unsigned long REGPARAM2 op_11a0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11a8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11a8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -35986,7 +35986,7 @@ unsigned long REGPARAM2 op_11a8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11b0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11b0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -36005,7 +36005,7 @@ unsigned long REGPARAM2 op_11b0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11b8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11b8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -36023,7 +36023,7 @@ unsigned long REGPARAM2 op_11b8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11b9_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11b9_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -36041,7 +36041,7 @@ unsigned long REGPARAM2 op_11b9_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11ba_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11ba_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -36061,7 +36061,7 @@ unsigned long REGPARAM2 op_11ba_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11bb_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11bb_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -36082,7 +36082,7 @@ unsigned long REGPARAM2 op_11bb_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11bc_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11bc_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -36098,7 +36098,7 @@ unsigned long REGPARAM2 op_11bc_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11c0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11c0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -36113,7 +36113,7 @@ unsigned long REGPARAM2 op_11c0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11d0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11d0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -36132,7 +36132,7 @@ unsigned long REGPARAM2 op_11d0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11d8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11d8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -36151,7 +36151,7 @@ unsigned long REGPARAM2 op_11d8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11e0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11e0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -36171,7 +36171,7 @@ unsigned long REGPARAM2 op_11e0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11e8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11e8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -36190,7 +36190,7 @@ unsigned long REGPARAM2 op_11e8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11f0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11f0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -36208,7 +36208,7 @@ unsigned long REGPARAM2 op_11f0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11f8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11f8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -36225,7 +36225,7 @@ unsigned long REGPARAM2 op_11f8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11f9_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11f9_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -36242,7 +36242,7 @@ unsigned long REGPARAM2 op_11f9_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11fa_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11fa_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -36261,7 +36261,7 @@ unsigned long REGPARAM2 op_11fa_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11fb_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11fb_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -36281,7 +36281,7 @@ unsigned long REGPARAM2 op_11fb_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_11fc_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_11fc_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -36296,7 +36296,7 @@ unsigned long REGPARAM2 op_11fc_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_13c0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_13c0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -36311,7 +36311,7 @@ unsigned long REGPARAM2 op_13c0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_13d0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_13d0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -36330,7 +36330,7 @@ unsigned long REGPARAM2 op_13d0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_13d8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_13d8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -36349,7 +36349,7 @@ unsigned long REGPARAM2 op_13d8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_13e0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_13e0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -36369,7 +36369,7 @@ unsigned long REGPARAM2 op_13e0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_13e8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_13e8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -36388,7 +36388,7 @@ unsigned long REGPARAM2 op_13e8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_13f0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_13f0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -36406,7 +36406,7 @@ unsigned long REGPARAM2 op_13f0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_13f8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_13f8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -36423,7 +36423,7 @@ unsigned long REGPARAM2 op_13f8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_13f9_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_13f9_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -36440,7 +36440,7 @@ unsigned long REGPARAM2 op_13f9_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_13fa_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_13fa_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -36459,7 +36459,7 @@ unsigned long REGPARAM2 op_13fa_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_13fb_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_13fb_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -36479,7 +36479,7 @@ unsigned long REGPARAM2 op_13fb_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_13fc_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_13fc_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -36494,7 +36494,7 @@ unsigned long REGPARAM2 op_13fc_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2000_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2000_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -36512,7 +36512,7 @@ unsigned long REGPARAM2 op_2000_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2008_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2008_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -36532,7 +36532,7 @@ unsigned long REGPARAM2 op_2008_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2010_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2010_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -36554,7 +36554,7 @@ unsigned long REGPARAM2 op_2010_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2018_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2018_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -36576,7 +36576,7 @@ unsigned long REGPARAM2 op_2018_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2020_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2020_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -36599,7 +36599,7 @@ unsigned long REGPARAM2 op_2020_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2028_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2028_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -36621,7 +36621,7 @@ unsigned long REGPARAM2 op_2028_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2030_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2030_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -36642,7 +36642,7 @@ unsigned long REGPARAM2 op_2030_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2038_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2038_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -36662,7 +36662,7 @@ unsigned long REGPARAM2 op_2038_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2039_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2039_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -36682,7 +36682,7 @@ unsigned long REGPARAM2 op_2039_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_203a_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_203a_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -36704,7 +36704,7 @@ unsigned long REGPARAM2 op_203a_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_203b_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_203b_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -36727,7 +36727,7 @@ unsigned long REGPARAM2 op_203b_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_203c_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_203c_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -36745,7 +36745,7 @@ unsigned long REGPARAM2 op_203c_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2040_0_comp_nf(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_2040_0_comp_nf(uae_u32 opcode) /* MOVEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -36761,7 +36761,7 @@ unsigned long REGPARAM2 op_2040_0_comp_nf(uae_u32 opcode) /* MOVEA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2048_0_comp_nf(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_2048_0_comp_nf(uae_u32 opcode) /* MOVEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -36779,7 +36779,7 @@ unsigned long REGPARAM2 op_2048_0_comp_nf(uae_u32 opcode) /* MOVEA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2050_0_comp_nf(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_2050_0_comp_nf(uae_u32 opcode) /* MOVEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -36799,7 +36799,7 @@ unsigned long REGPARAM2 op_2050_0_comp_nf(uae_u32 opcode) /* MOVEA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2058_0_comp_nf(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_2058_0_comp_nf(uae_u32 opcode) /* MOVEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -36819,7 +36819,7 @@ unsigned long REGPARAM2 op_2058_0_comp_nf(uae_u32 opcode) /* MOVEA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2060_0_comp_nf(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_2060_0_comp_nf(uae_u32 opcode) /* MOVEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -36840,7 +36840,7 @@ unsigned long REGPARAM2 op_2060_0_comp_nf(uae_u32 opcode) /* MOVEA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2068_0_comp_nf(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_2068_0_comp_nf(uae_u32 opcode) /* MOVEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -36860,7 +36860,7 @@ unsigned long REGPARAM2 op_2068_0_comp_nf(uae_u32 opcode) /* MOVEA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2070_0_comp_nf(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_2070_0_comp_nf(uae_u32 opcode) /* MOVEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -36879,7 +36879,7 @@ unsigned long REGPARAM2 op_2070_0_comp_nf(uae_u32 opcode) /* MOVEA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2078_0_comp_nf(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_2078_0_comp_nf(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -36897,7 +36897,7 @@ unsigned long REGPARAM2 op_2078_0_comp_nf(uae_u32 opcode) /* MOVEA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2079_0_comp_nf(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_2079_0_comp_nf(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -36915,7 +36915,7 @@ unsigned long REGPARAM2 op_2079_0_comp_nf(uae_u32 opcode) /* MOVEA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_207a_0_comp_nf(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_207a_0_comp_nf(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -36935,7 +36935,7 @@ unsigned long REGPARAM2 op_207a_0_comp_nf(uae_u32 opcode) /* MOVEA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_207b_0_comp_nf(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_207b_0_comp_nf(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -36956,7 +36956,7 @@ unsigned long REGPARAM2 op_207b_0_comp_nf(uae_u32 opcode) /* MOVEA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_207c_0_comp_nf(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_207c_0_comp_nf(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -36972,7 +36972,7 @@ unsigned long REGPARAM2 op_207c_0_comp_nf(uae_u32 opcode) /* MOVEA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2080_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2080_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -36989,7 +36989,7 @@ unsigned long REGPARAM2 op_2080_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2088_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2088_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -37008,7 +37008,7 @@ unsigned long REGPARAM2 op_2088_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2090_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2090_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -37029,7 +37029,7 @@ unsigned long REGPARAM2 op_2090_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2098_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2098_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -37050,7 +37050,7 @@ unsigned long REGPARAM2 op_2098_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20a0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20a0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -37072,7 +37072,7 @@ unsigned long REGPARAM2 op_20a0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20a8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20a8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -37093,7 +37093,7 @@ unsigned long REGPARAM2 op_20a8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20b0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20b0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -37113,7 +37113,7 @@ unsigned long REGPARAM2 op_20b0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20b8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20b8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -37132,7 +37132,7 @@ unsigned long REGPARAM2 op_20b8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20b9_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20b9_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -37151,7 +37151,7 @@ unsigned long REGPARAM2 op_20b9_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20ba_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20ba_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -37172,7 +37172,7 @@ unsigned long REGPARAM2 op_20ba_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20bb_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20bb_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -37194,7 +37194,7 @@ unsigned long REGPARAM2 op_20bb_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20bc_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20bc_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -37211,7 +37211,7 @@ unsigned long REGPARAM2 op_20bc_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20c0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20c0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -37228,7 +37228,7 @@ unsigned long REGPARAM2 op_20c0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20c8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20c8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -37247,7 +37247,7 @@ unsigned long REGPARAM2 op_20c8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20d0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20d0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -37268,7 +37268,7 @@ unsigned long REGPARAM2 op_20d0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20d8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20d8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -37289,7 +37289,7 @@ unsigned long REGPARAM2 op_20d8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20e0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20e0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -37311,7 +37311,7 @@ unsigned long REGPARAM2 op_20e0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20e8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20e8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -37332,7 +37332,7 @@ unsigned long REGPARAM2 op_20e8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20f0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20f0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -37352,7 +37352,7 @@ unsigned long REGPARAM2 op_20f0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20f8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20f8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -37371,7 +37371,7 @@ unsigned long REGPARAM2 op_20f8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20f9_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20f9_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -37390,7 +37390,7 @@ unsigned long REGPARAM2 op_20f9_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20fa_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20fa_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -37411,7 +37411,7 @@ unsigned long REGPARAM2 op_20fa_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20fb_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20fb_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -37433,7 +37433,7 @@ unsigned long REGPARAM2 op_20fb_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_20fc_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_20fc_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -37450,7 +37450,7 @@ unsigned long REGPARAM2 op_20fc_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2100_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2100_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -37468,7 +37468,7 @@ unsigned long REGPARAM2 op_2100_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2108_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2108_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -37488,7 +37488,7 @@ unsigned long REGPARAM2 op_2108_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2110_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2110_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -37510,7 +37510,7 @@ unsigned long REGPARAM2 op_2110_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2118_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2118_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -37532,7 +37532,7 @@ unsigned long REGPARAM2 op_2118_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2120_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2120_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -37555,7 +37555,7 @@ unsigned long REGPARAM2 op_2120_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2128_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2128_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -37577,7 +37577,7 @@ unsigned long REGPARAM2 op_2128_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2130_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2130_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -37598,7 +37598,7 @@ unsigned long REGPARAM2 op_2130_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2138_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2138_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -37618,7 +37618,7 @@ unsigned long REGPARAM2 op_2138_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2139_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2139_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -37638,7 +37638,7 @@ unsigned long REGPARAM2 op_2139_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_213a_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_213a_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -37660,7 +37660,7 @@ unsigned long REGPARAM2 op_213a_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_213b_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_213b_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -37683,7 +37683,7 @@ unsigned long REGPARAM2 op_213b_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_213c_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_213c_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -37701,7 +37701,7 @@ unsigned long REGPARAM2 op_213c_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2140_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2140_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -37718,7 +37718,7 @@ unsigned long REGPARAM2 op_2140_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2148_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2148_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -37737,7 +37737,7 @@ unsigned long REGPARAM2 op_2148_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2150_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2150_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -37758,7 +37758,7 @@ unsigned long REGPARAM2 op_2150_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2158_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2158_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -37779,7 +37779,7 @@ unsigned long REGPARAM2 op_2158_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2160_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2160_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -37801,7 +37801,7 @@ unsigned long REGPARAM2 op_2160_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2168_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2168_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -37822,7 +37822,7 @@ unsigned long REGPARAM2 op_2168_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2170_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2170_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -37842,7 +37842,7 @@ unsigned long REGPARAM2 op_2170_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2178_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2178_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -37861,7 +37861,7 @@ unsigned long REGPARAM2 op_2178_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2179_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2179_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -37880,7 +37880,7 @@ unsigned long REGPARAM2 op_2179_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_217a_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_217a_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -37901,7 +37901,7 @@ unsigned long REGPARAM2 op_217a_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_217b_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_217b_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -37923,7 +37923,7 @@ unsigned long REGPARAM2 op_217b_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_217c_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_217c_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -37940,7 +37940,7 @@ unsigned long REGPARAM2 op_217c_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2180_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2180_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -37956,7 +37956,7 @@ unsigned long REGPARAM2 op_2180_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_2188_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2188_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -37974,30 +37974,30 @@ unsigned long REGPARAM2 op_2188_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } +uae_u32 REGPARAM2 op_2190_0_comp_nf(uae_u32 opcode) /* MOVE */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=(srcreg==(uae_s32)dstreg); + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dsta=scratchie++; + calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); + dont_care_flags(); +{ writelong(dsta,src,scratchie); +}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); +return 0; +} #endif #ifdef PART_3 -unsigned long REGPARAM2 op_2190_0_comp_nf(uae_u32 opcode) /* MOVE */ -{ - uae_s32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; - uae_u32 dodgy=(srcreg==(uae_s32)dstreg); - uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; - m68k_pc_offset+=2; -{ uae_u8 scratchie=S1; -{ int srca=dodgy?scratchie++:srcreg+8; - if (dodgy) - mov_l_rr(srca,srcreg+8); -{ int src=scratchie++; - readlong(srca,src,scratchie); -{ int dsta=scratchie++; - calc_disp_ea_020(dstreg+8,comp_get_iword((m68k_pc_offset+=2)-2),dsta,scratchie); - dont_care_flags(); -{ writelong(dsta,src,scratchie); -}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); -return 0; -} -unsigned long REGPARAM2 op_2198_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_2198_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -38017,7 +38017,7 @@ unsigned long REGPARAM2 op_2198_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21a0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21a0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -38038,7 +38038,7 @@ unsigned long REGPARAM2 op_21a0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21a8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21a8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -38058,7 +38058,7 @@ unsigned long REGPARAM2 op_21a8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21b0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21b0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -38077,7 +38077,7 @@ unsigned long REGPARAM2 op_21b0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21b8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21b8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -38095,7 +38095,7 @@ unsigned long REGPARAM2 op_21b8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21b9_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21b9_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -38113,7 +38113,7 @@ unsigned long REGPARAM2 op_21b9_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21ba_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21ba_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -38133,7 +38133,7 @@ unsigned long REGPARAM2 op_21ba_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21bb_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21bb_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -38154,7 +38154,7 @@ unsigned long REGPARAM2 op_21bb_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21bc_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21bc_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -38170,7 +38170,7 @@ unsigned long REGPARAM2 op_21bc_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21c0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21c0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -38185,7 +38185,7 @@ unsigned long REGPARAM2 op_21c0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21c8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21c8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -38202,7 +38202,7 @@ unsigned long REGPARAM2 op_21c8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21d0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21d0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -38221,7 +38221,7 @@ unsigned long REGPARAM2 op_21d0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21d8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21d8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -38240,7 +38240,7 @@ unsigned long REGPARAM2 op_21d8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21e0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21e0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -38260,7 +38260,7 @@ unsigned long REGPARAM2 op_21e0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21e8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21e8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -38279,7 +38279,7 @@ unsigned long REGPARAM2 op_21e8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21f0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21f0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -38297,7 +38297,7 @@ unsigned long REGPARAM2 op_21f0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21f8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21f8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -38314,7 +38314,7 @@ unsigned long REGPARAM2 op_21f8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21f9_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21f9_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -38331,7 +38331,7 @@ unsigned long REGPARAM2 op_21f9_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21fa_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21fa_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -38350,7 +38350,7 @@ unsigned long REGPARAM2 op_21fa_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21fb_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21fb_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -38370,7 +38370,7 @@ unsigned long REGPARAM2 op_21fb_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_21fc_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_21fc_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -38385,7 +38385,7 @@ unsigned long REGPARAM2 op_21fc_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_23c0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_23c0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -38400,7 +38400,7 @@ unsigned long REGPARAM2 op_23c0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_23c8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_23c8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -38417,7 +38417,7 @@ unsigned long REGPARAM2 op_23c8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_23d0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_23d0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -38436,7 +38436,7 @@ unsigned long REGPARAM2 op_23d0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_23d8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_23d8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -38455,7 +38455,7 @@ unsigned long REGPARAM2 op_23d8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_23e0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_23e0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -38475,7 +38475,7 @@ unsigned long REGPARAM2 op_23e0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_23e8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_23e8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -38494,7 +38494,7 @@ unsigned long REGPARAM2 op_23e8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_23f0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_23f0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -38512,7 +38512,7 @@ unsigned long REGPARAM2 op_23f0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_23f8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_23f8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -38529,7 +38529,7 @@ unsigned long REGPARAM2 op_23f8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_23f9_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_23f9_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -38546,7 +38546,7 @@ unsigned long REGPARAM2 op_23f9_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_23fa_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_23fa_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -38565,7 +38565,7 @@ unsigned long REGPARAM2 op_23fa_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_23fb_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_23fb_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -38585,7 +38585,7 @@ unsigned long REGPARAM2 op_23fb_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_23fc_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_23fc_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -38600,7 +38600,7 @@ unsigned long REGPARAM2 op_23fc_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3000_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3000_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -38618,7 +38618,7 @@ unsigned long REGPARAM2 op_3000_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3008_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3008_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -38638,7 +38638,7 @@ unsigned long REGPARAM2 op_3008_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3010_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3010_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -38660,7 +38660,7 @@ unsigned long REGPARAM2 op_3010_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3018_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3018_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -38682,7 +38682,7 @@ unsigned long REGPARAM2 op_3018_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3020_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3020_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -38705,7 +38705,7 @@ unsigned long REGPARAM2 op_3020_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3028_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3028_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -38727,7 +38727,7 @@ unsigned long REGPARAM2 op_3028_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3030_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3030_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -38748,7 +38748,7 @@ unsigned long REGPARAM2 op_3030_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3038_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3038_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -38768,7 +38768,7 @@ unsigned long REGPARAM2 op_3038_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3039_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3039_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -38788,7 +38788,7 @@ unsigned long REGPARAM2 op_3039_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_303a_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_303a_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -38810,7 +38810,7 @@ unsigned long REGPARAM2 op_303a_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_303b_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_303b_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -38833,7 +38833,7 @@ unsigned long REGPARAM2 op_303b_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_303c_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_303c_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -38851,7 +38851,7 @@ unsigned long REGPARAM2 op_303c_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3040_0_comp_nf(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_3040_0_comp_nf(uae_u32 opcode) /* MOVEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -38867,7 +38867,7 @@ unsigned long REGPARAM2 op_3040_0_comp_nf(uae_u32 opcode) /* MOVEA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3048_0_comp_nf(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_3048_0_comp_nf(uae_u32 opcode) /* MOVEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -38885,7 +38885,7 @@ unsigned long REGPARAM2 op_3048_0_comp_nf(uae_u32 opcode) /* MOVEA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3050_0_comp_nf(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_3050_0_comp_nf(uae_u32 opcode) /* MOVEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -38905,7 +38905,7 @@ unsigned long REGPARAM2 op_3050_0_comp_nf(uae_u32 opcode) /* MOVEA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3058_0_comp_nf(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_3058_0_comp_nf(uae_u32 opcode) /* MOVEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -38925,7 +38925,7 @@ unsigned long REGPARAM2 op_3058_0_comp_nf(uae_u32 opcode) /* MOVEA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3060_0_comp_nf(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_3060_0_comp_nf(uae_u32 opcode) /* MOVEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -38946,7 +38946,7 @@ unsigned long REGPARAM2 op_3060_0_comp_nf(uae_u32 opcode) /* MOVEA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3068_0_comp_nf(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_3068_0_comp_nf(uae_u32 opcode) /* MOVEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -38966,7 +38966,7 @@ unsigned long REGPARAM2 op_3068_0_comp_nf(uae_u32 opcode) /* MOVEA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3070_0_comp_nf(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_3070_0_comp_nf(uae_u32 opcode) /* MOVEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -38985,7 +38985,7 @@ unsigned long REGPARAM2 op_3070_0_comp_nf(uae_u32 opcode) /* MOVEA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3078_0_comp_nf(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_3078_0_comp_nf(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -39003,7 +39003,7 @@ unsigned long REGPARAM2 op_3078_0_comp_nf(uae_u32 opcode) /* MOVEA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3079_0_comp_nf(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_3079_0_comp_nf(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -39021,7 +39021,7 @@ unsigned long REGPARAM2 op_3079_0_comp_nf(uae_u32 opcode) /* MOVEA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_307a_0_comp_nf(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_307a_0_comp_nf(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -39041,7 +39041,7 @@ unsigned long REGPARAM2 op_307a_0_comp_nf(uae_u32 opcode) /* MOVEA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_307b_0_comp_nf(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_307b_0_comp_nf(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -39062,7 +39062,7 @@ unsigned long REGPARAM2 op_307b_0_comp_nf(uae_u32 opcode) /* MOVEA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_307c_0_comp_nf(uae_u32 opcode) /* MOVEA */ +uae_u32 REGPARAM2 op_307c_0_comp_nf(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -39078,7 +39078,7 @@ unsigned long REGPARAM2 op_307c_0_comp_nf(uae_u32 opcode) /* MOVEA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3080_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3080_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -39095,7 +39095,7 @@ unsigned long REGPARAM2 op_3080_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3088_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3088_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -39114,7 +39114,7 @@ unsigned long REGPARAM2 op_3088_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3090_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3090_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -39135,7 +39135,7 @@ unsigned long REGPARAM2 op_3090_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3098_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3098_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -39156,7 +39156,7 @@ unsigned long REGPARAM2 op_3098_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30a0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30a0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -39178,7 +39178,7 @@ unsigned long REGPARAM2 op_30a0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30a8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30a8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -39199,7 +39199,7 @@ unsigned long REGPARAM2 op_30a8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30b0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30b0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -39219,7 +39219,7 @@ unsigned long REGPARAM2 op_30b0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30b8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30b8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -39238,7 +39238,7 @@ unsigned long REGPARAM2 op_30b8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30b9_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30b9_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -39257,7 +39257,7 @@ unsigned long REGPARAM2 op_30b9_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30ba_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30ba_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -39278,7 +39278,7 @@ unsigned long REGPARAM2 op_30ba_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30bb_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30bb_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -39300,7 +39300,7 @@ unsigned long REGPARAM2 op_30bb_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30bc_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30bc_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -39317,7 +39317,7 @@ unsigned long REGPARAM2 op_30bc_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30c0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30c0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -39334,7 +39334,7 @@ unsigned long REGPARAM2 op_30c0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30c8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30c8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -39353,7 +39353,7 @@ unsigned long REGPARAM2 op_30c8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30d0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30d0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -39374,7 +39374,7 @@ unsigned long REGPARAM2 op_30d0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30d8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30d8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -39395,7 +39395,7 @@ unsigned long REGPARAM2 op_30d8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30e0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30e0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -39417,7 +39417,7 @@ unsigned long REGPARAM2 op_30e0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30e8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30e8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -39438,7 +39438,7 @@ unsigned long REGPARAM2 op_30e8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30f0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30f0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -39458,7 +39458,7 @@ unsigned long REGPARAM2 op_30f0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30f8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30f8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -39477,7 +39477,7 @@ unsigned long REGPARAM2 op_30f8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30f9_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30f9_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -39496,7 +39496,7 @@ unsigned long REGPARAM2 op_30f9_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30fa_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30fa_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -39517,7 +39517,7 @@ unsigned long REGPARAM2 op_30fa_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30fb_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30fb_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -39539,7 +39539,7 @@ unsigned long REGPARAM2 op_30fb_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_30fc_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_30fc_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -39556,7 +39556,7 @@ unsigned long REGPARAM2 op_30fc_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3100_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3100_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -39574,7 +39574,7 @@ unsigned long REGPARAM2 op_3100_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3108_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3108_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -39594,7 +39594,7 @@ unsigned long REGPARAM2 op_3108_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3110_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3110_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -39616,7 +39616,7 @@ unsigned long REGPARAM2 op_3110_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3118_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3118_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -39638,7 +39638,7 @@ unsigned long REGPARAM2 op_3118_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3120_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3120_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -39661,7 +39661,7 @@ unsigned long REGPARAM2 op_3120_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3128_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3128_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -39683,7 +39683,7 @@ unsigned long REGPARAM2 op_3128_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3130_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3130_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -39704,7 +39704,7 @@ unsigned long REGPARAM2 op_3130_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3138_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3138_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -39724,7 +39724,7 @@ unsigned long REGPARAM2 op_3138_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3139_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3139_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -39744,7 +39744,7 @@ unsigned long REGPARAM2 op_3139_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_313a_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_313a_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -39766,7 +39766,7 @@ unsigned long REGPARAM2 op_313a_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_313b_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_313b_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -39789,7 +39789,7 @@ unsigned long REGPARAM2 op_313b_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_313c_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_313c_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -39807,7 +39807,7 @@ unsigned long REGPARAM2 op_313c_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3140_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3140_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -39824,7 +39824,7 @@ unsigned long REGPARAM2 op_3140_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3148_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3148_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -39843,7 +39843,7 @@ unsigned long REGPARAM2 op_3148_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3150_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3150_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -39864,7 +39864,7 @@ unsigned long REGPARAM2 op_3150_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3158_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3158_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -39885,7 +39885,7 @@ unsigned long REGPARAM2 op_3158_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3160_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3160_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -39907,7 +39907,7 @@ unsigned long REGPARAM2 op_3160_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3168_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3168_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -39928,7 +39928,7 @@ unsigned long REGPARAM2 op_3168_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3170_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3170_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -39948,7 +39948,7 @@ unsigned long REGPARAM2 op_3170_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3178_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3178_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -39967,7 +39967,7 @@ unsigned long REGPARAM2 op_3178_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3179_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3179_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -39986,7 +39986,7 @@ unsigned long REGPARAM2 op_3179_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_317a_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_317a_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -40007,7 +40007,7 @@ unsigned long REGPARAM2 op_317a_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_317b_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_317b_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -40029,7 +40029,7 @@ unsigned long REGPARAM2 op_317b_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_317c_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_317c_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -40046,7 +40046,7 @@ unsigned long REGPARAM2 op_317c_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3180_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3180_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -40062,7 +40062,7 @@ unsigned long REGPARAM2 op_3180_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3188_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3188_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -40080,7 +40080,7 @@ unsigned long REGPARAM2 op_3188_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3190_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3190_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -40100,7 +40100,7 @@ unsigned long REGPARAM2 op_3190_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_3198_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_3198_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -40120,7 +40120,7 @@ unsigned long REGPARAM2 op_3198_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31a0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31a0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -40141,7 +40141,7 @@ unsigned long REGPARAM2 op_31a0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31a8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31a8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -40161,7 +40161,7 @@ unsigned long REGPARAM2 op_31a8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31b0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31b0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -40180,7 +40180,7 @@ unsigned long REGPARAM2 op_31b0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31b8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31b8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -40198,7 +40198,7 @@ unsigned long REGPARAM2 op_31b8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31b9_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31b9_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -40216,7 +40216,7 @@ unsigned long REGPARAM2 op_31b9_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31ba_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31ba_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -40236,7 +40236,7 @@ unsigned long REGPARAM2 op_31ba_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31bb_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31bb_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -40257,7 +40257,7 @@ unsigned long REGPARAM2 op_31bb_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31bc_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31bc_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -40273,7 +40273,7 @@ unsigned long REGPARAM2 op_31bc_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31c0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31c0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -40288,7 +40288,7 @@ unsigned long REGPARAM2 op_31c0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31c8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31c8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -40305,7 +40305,7 @@ unsigned long REGPARAM2 op_31c8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31d0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31d0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -40324,7 +40324,7 @@ unsigned long REGPARAM2 op_31d0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31d8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31d8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -40343,7 +40343,7 @@ unsigned long REGPARAM2 op_31d8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31e0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31e0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -40363,7 +40363,7 @@ unsigned long REGPARAM2 op_31e0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31e8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31e8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -40382,7 +40382,7 @@ unsigned long REGPARAM2 op_31e8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31f0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31f0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -40400,7 +40400,7 @@ unsigned long REGPARAM2 op_31f0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31f8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31f8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -40417,7 +40417,7 @@ unsigned long REGPARAM2 op_31f8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31f9_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31f9_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -40434,7 +40434,7 @@ unsigned long REGPARAM2 op_31f9_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31fa_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31fa_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -40453,7 +40453,7 @@ unsigned long REGPARAM2 op_31fa_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31fb_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31fb_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -40473,7 +40473,7 @@ unsigned long REGPARAM2 op_31fb_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_31fc_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_31fc_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -40488,7 +40488,7 @@ unsigned long REGPARAM2 op_31fc_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_33c0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_33c0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -40503,7 +40503,7 @@ unsigned long REGPARAM2 op_33c0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_33c8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_33c8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -40520,7 +40520,7 @@ unsigned long REGPARAM2 op_33c8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_33d0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_33d0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -40539,7 +40539,7 @@ unsigned long REGPARAM2 op_33d0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_33d8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_33d8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -40558,7 +40558,7 @@ unsigned long REGPARAM2 op_33d8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_33e0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_33e0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -40578,7 +40578,7 @@ unsigned long REGPARAM2 op_33e0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_33e8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_33e8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -40597,7 +40597,7 @@ unsigned long REGPARAM2 op_33e8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_33f0_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_33f0_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -40615,7 +40615,7 @@ unsigned long REGPARAM2 op_33f0_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_33f8_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_33f8_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -40632,7 +40632,7 @@ unsigned long REGPARAM2 op_33f8_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_33f9_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_33f9_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -40649,7 +40649,7 @@ unsigned long REGPARAM2 op_33f9_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_33fa_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_33fa_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -40668,7 +40668,7 @@ unsigned long REGPARAM2 op_33fa_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_33fb_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_33fb_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -40688,7 +40688,7 @@ unsigned long REGPARAM2 op_33fb_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_33fc_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_33fc_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -40703,7 +40703,7 @@ unsigned long REGPARAM2 op_33fc_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4000_0_comp_nf(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4000_0_comp_nf(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -40718,7 +40718,7 @@ unsigned long REGPARAM2 op_4000_0_comp_nf(uae_u32 opcode) /* NEGX */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4010_0_comp_nf(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4010_0_comp_nf(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -40736,7 +40736,7 @@ unsigned long REGPARAM2 op_4010_0_comp_nf(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4018_0_comp_nf(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4018_0_comp_nf(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -40754,7 +40754,7 @@ unsigned long REGPARAM2 op_4018_0_comp_nf(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4020_0_comp_nf(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4020_0_comp_nf(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -40773,7 +40773,7 @@ unsigned long REGPARAM2 op_4020_0_comp_nf(uae_u32 opcode) /* NEGX */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4028_0_comp_nf(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4028_0_comp_nf(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -40791,7 +40791,7 @@ unsigned long REGPARAM2 op_4028_0_comp_nf(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4030_0_comp_nf(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4030_0_comp_nf(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -40808,7 +40808,7 @@ unsigned long REGPARAM2 op_4030_0_comp_nf(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4038_0_comp_nf(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4038_0_comp_nf(uae_u32 opcode) /* NEGX */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -40824,7 +40824,7 @@ unsigned long REGPARAM2 op_4038_0_comp_nf(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4039_0_comp_nf(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4039_0_comp_nf(uae_u32 opcode) /* NEGX */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -40840,7 +40840,7 @@ unsigned long REGPARAM2 op_4039_0_comp_nf(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4040_0_comp_nf(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4040_0_comp_nf(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -40855,7 +40855,7 @@ unsigned long REGPARAM2 op_4040_0_comp_nf(uae_u32 opcode) /* NEGX */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4050_0_comp_nf(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4050_0_comp_nf(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -40873,7 +40873,7 @@ unsigned long REGPARAM2 op_4050_0_comp_nf(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4058_0_comp_nf(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4058_0_comp_nf(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -40891,7 +40891,7 @@ unsigned long REGPARAM2 op_4058_0_comp_nf(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4060_0_comp_nf(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4060_0_comp_nf(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -40910,7 +40910,7 @@ unsigned long REGPARAM2 op_4060_0_comp_nf(uae_u32 opcode) /* NEGX */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4068_0_comp_nf(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4068_0_comp_nf(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -40928,7 +40928,7 @@ unsigned long REGPARAM2 op_4068_0_comp_nf(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4070_0_comp_nf(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4070_0_comp_nf(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -40945,7 +40945,7 @@ unsigned long REGPARAM2 op_4070_0_comp_nf(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4078_0_comp_nf(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4078_0_comp_nf(uae_u32 opcode) /* NEGX */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -40961,7 +40961,7 @@ unsigned long REGPARAM2 op_4078_0_comp_nf(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4079_0_comp_nf(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4079_0_comp_nf(uae_u32 opcode) /* NEGX */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -40977,7 +40977,7 @@ unsigned long REGPARAM2 op_4079_0_comp_nf(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4080_0_comp_nf(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4080_0_comp_nf(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -40992,7 +40992,7 @@ unsigned long REGPARAM2 op_4080_0_comp_nf(uae_u32 opcode) /* NEGX */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4090_0_comp_nf(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4090_0_comp_nf(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41010,7 +41010,7 @@ unsigned long REGPARAM2 op_4090_0_comp_nf(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4098_0_comp_nf(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_4098_0_comp_nf(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41028,7 +41028,7 @@ unsigned long REGPARAM2 op_4098_0_comp_nf(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_40a0_0_comp_nf(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_40a0_0_comp_nf(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41047,7 +41047,7 @@ unsigned long REGPARAM2 op_40a0_0_comp_nf(uae_u32 opcode) /* NEGX */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_40a8_0_comp_nf(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_40a8_0_comp_nf(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41065,7 +41065,7 @@ unsigned long REGPARAM2 op_40a8_0_comp_nf(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_40b0_0_comp_nf(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_40b0_0_comp_nf(uae_u32 opcode) /* NEGX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41082,7 +41082,7 @@ unsigned long REGPARAM2 op_40b0_0_comp_nf(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_40b8_0_comp_nf(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_40b8_0_comp_nf(uae_u32 opcode) /* NEGX */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -41098,7 +41098,7 @@ unsigned long REGPARAM2 op_40b8_0_comp_nf(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_40b9_0_comp_nf(uae_u32 opcode) /* NEGX */ +uae_u32 REGPARAM2 op_40b9_0_comp_nf(uae_u32 opcode) /* NEGX */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -41114,7 +41114,7 @@ unsigned long REGPARAM2 op_40b9_0_comp_nf(uae_u32 opcode) /* NEGX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_41d0_0_comp_nf(uae_u32 opcode) /* LEA */ +uae_u32 REGPARAM2 op_41d0_0_comp_nf(uae_u32 opcode) /* LEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -41131,7 +41131,7 @@ unsigned long REGPARAM2 op_41d0_0_comp_nf(uae_u32 opcode) /* LEA */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_41e8_0_comp_nf(uae_u32 opcode) /* LEA */ +uae_u32 REGPARAM2 op_41e8_0_comp_nf(uae_u32 opcode) /* LEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -41148,7 +41148,7 @@ unsigned long REGPARAM2 op_41e8_0_comp_nf(uae_u32 opcode) /* LEA */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_41f0_0_comp_nf(uae_u32 opcode) /* LEA */ +uae_u32 REGPARAM2 op_41f0_0_comp_nf(uae_u32 opcode) /* LEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -41164,7 +41164,7 @@ unsigned long REGPARAM2 op_41f0_0_comp_nf(uae_u32 opcode) /* LEA */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_41f8_0_comp_nf(uae_u32 opcode) /* LEA */ +uae_u32 REGPARAM2 op_41f8_0_comp_nf(uae_u32 opcode) /* LEA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -41179,7 +41179,7 @@ unsigned long REGPARAM2 op_41f8_0_comp_nf(uae_u32 opcode) /* LEA */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_41f9_0_comp_nf(uae_u32 opcode) /* LEA */ +uae_u32 REGPARAM2 op_41f9_0_comp_nf(uae_u32 opcode) /* LEA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -41194,7 +41194,7 @@ unsigned long REGPARAM2 op_41f9_0_comp_nf(uae_u32 opcode) /* LEA */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_41fa_0_comp_nf(uae_u32 opcode) /* LEA */ +uae_u32 REGPARAM2 op_41fa_0_comp_nf(uae_u32 opcode) /* LEA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -41211,7 +41211,7 @@ unsigned long REGPARAM2 op_41fa_0_comp_nf(uae_u32 opcode) /* LEA */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_41fb_0_comp_nf(uae_u32 opcode) /* LEA */ +uae_u32 REGPARAM2 op_41fb_0_comp_nf(uae_u32 opcode) /* LEA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -41229,7 +41229,7 @@ unsigned long REGPARAM2 op_41fb_0_comp_nf(uae_u32 opcode) /* LEA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4200_0_comp_nf(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4200_0_comp_nf(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41245,7 +41245,7 @@ unsigned long REGPARAM2 op_4200_0_comp_nf(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4210_0_comp_nf(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4210_0_comp_nf(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41262,7 +41262,7 @@ unsigned long REGPARAM2 op_4210_0_comp_nf(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4218_0_comp_nf(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4218_0_comp_nf(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41279,7 +41279,7 @@ unsigned long REGPARAM2 op_4218_0_comp_nf(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4220_0_comp_nf(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4220_0_comp_nf(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41297,7 +41297,7 @@ unsigned long REGPARAM2 op_4220_0_comp_nf(uae_u32 opcode) /* CLR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4228_0_comp_nf(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4228_0_comp_nf(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41314,7 +41314,7 @@ unsigned long REGPARAM2 op_4228_0_comp_nf(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4230_0_comp_nf(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4230_0_comp_nf(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41330,7 +41330,7 @@ unsigned long REGPARAM2 op_4230_0_comp_nf(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4238_0_comp_nf(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4238_0_comp_nf(uae_u32 opcode) /* CLR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -41345,7 +41345,7 @@ unsigned long REGPARAM2 op_4238_0_comp_nf(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4239_0_comp_nf(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4239_0_comp_nf(uae_u32 opcode) /* CLR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -41360,7 +41360,7 @@ unsigned long REGPARAM2 op_4239_0_comp_nf(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4240_0_comp_nf(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4240_0_comp_nf(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41376,7 +41376,7 @@ unsigned long REGPARAM2 op_4240_0_comp_nf(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4250_0_comp_nf(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4250_0_comp_nf(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41393,7 +41393,7 @@ unsigned long REGPARAM2 op_4250_0_comp_nf(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4258_0_comp_nf(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4258_0_comp_nf(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41410,7 +41410,7 @@ unsigned long REGPARAM2 op_4258_0_comp_nf(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4260_0_comp_nf(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4260_0_comp_nf(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41428,7 +41428,7 @@ unsigned long REGPARAM2 op_4260_0_comp_nf(uae_u32 opcode) /* CLR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4268_0_comp_nf(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4268_0_comp_nf(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41445,7 +41445,7 @@ unsigned long REGPARAM2 op_4268_0_comp_nf(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4270_0_comp_nf(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4270_0_comp_nf(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41461,7 +41461,7 @@ unsigned long REGPARAM2 op_4270_0_comp_nf(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4278_0_comp_nf(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4278_0_comp_nf(uae_u32 opcode) /* CLR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -41476,7 +41476,7 @@ unsigned long REGPARAM2 op_4278_0_comp_nf(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4279_0_comp_nf(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4279_0_comp_nf(uae_u32 opcode) /* CLR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -41491,7 +41491,7 @@ unsigned long REGPARAM2 op_4279_0_comp_nf(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4280_0_comp_nf(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4280_0_comp_nf(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41507,7 +41507,7 @@ unsigned long REGPARAM2 op_4280_0_comp_nf(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4290_0_comp_nf(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4290_0_comp_nf(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41524,7 +41524,7 @@ unsigned long REGPARAM2 op_4290_0_comp_nf(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4298_0_comp_nf(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_4298_0_comp_nf(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41541,7 +41541,7 @@ unsigned long REGPARAM2 op_4298_0_comp_nf(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_42a0_0_comp_nf(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_42a0_0_comp_nf(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41559,7 +41559,7 @@ unsigned long REGPARAM2 op_42a0_0_comp_nf(uae_u32 opcode) /* CLR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_42a8_0_comp_nf(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_42a8_0_comp_nf(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41576,7 +41576,7 @@ unsigned long REGPARAM2 op_42a8_0_comp_nf(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_42b0_0_comp_nf(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_42b0_0_comp_nf(uae_u32 opcode) /* CLR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41592,7 +41592,7 @@ unsigned long REGPARAM2 op_42b0_0_comp_nf(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_42b8_0_comp_nf(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_42b8_0_comp_nf(uae_u32 opcode) /* CLR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -41607,7 +41607,7 @@ unsigned long REGPARAM2 op_42b8_0_comp_nf(uae_u32 opcode) /* CLR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_42b9_0_comp_nf(uae_u32 opcode) /* CLR */ +uae_u32 REGPARAM2 op_42b9_0_comp_nf(uae_u32 opcode) /* CLR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -41625,7 +41625,7 @@ return 0; #endif #ifdef PART_4 -unsigned long REGPARAM2 op_4400_0_comp_nf(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4400_0_comp_nf(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41640,7 +41640,7 @@ unsigned long REGPARAM2 op_4400_0_comp_nf(uae_u32 opcode) /* NEG */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4410_0_comp_nf(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4410_0_comp_nf(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41658,7 +41658,7 @@ unsigned long REGPARAM2 op_4410_0_comp_nf(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4418_0_comp_nf(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4418_0_comp_nf(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41676,7 +41676,7 @@ unsigned long REGPARAM2 op_4418_0_comp_nf(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4420_0_comp_nf(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4420_0_comp_nf(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41695,7 +41695,7 @@ unsigned long REGPARAM2 op_4420_0_comp_nf(uae_u32 opcode) /* NEG */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4428_0_comp_nf(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4428_0_comp_nf(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41713,7 +41713,7 @@ unsigned long REGPARAM2 op_4428_0_comp_nf(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4430_0_comp_nf(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4430_0_comp_nf(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41730,7 +41730,7 @@ unsigned long REGPARAM2 op_4430_0_comp_nf(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4438_0_comp_nf(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4438_0_comp_nf(uae_u32 opcode) /* NEG */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -41746,7 +41746,7 @@ unsigned long REGPARAM2 op_4438_0_comp_nf(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4439_0_comp_nf(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4439_0_comp_nf(uae_u32 opcode) /* NEG */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -41762,7 +41762,7 @@ unsigned long REGPARAM2 op_4439_0_comp_nf(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4440_0_comp_nf(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4440_0_comp_nf(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41777,7 +41777,7 @@ unsigned long REGPARAM2 op_4440_0_comp_nf(uae_u32 opcode) /* NEG */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4450_0_comp_nf(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4450_0_comp_nf(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41795,7 +41795,7 @@ unsigned long REGPARAM2 op_4450_0_comp_nf(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4458_0_comp_nf(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4458_0_comp_nf(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41813,7 +41813,7 @@ unsigned long REGPARAM2 op_4458_0_comp_nf(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4460_0_comp_nf(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4460_0_comp_nf(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41832,7 +41832,7 @@ unsigned long REGPARAM2 op_4460_0_comp_nf(uae_u32 opcode) /* NEG */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4468_0_comp_nf(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4468_0_comp_nf(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41850,7 +41850,7 @@ unsigned long REGPARAM2 op_4468_0_comp_nf(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4470_0_comp_nf(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4470_0_comp_nf(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41867,7 +41867,7 @@ unsigned long REGPARAM2 op_4470_0_comp_nf(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4478_0_comp_nf(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4478_0_comp_nf(uae_u32 opcode) /* NEG */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -41883,7 +41883,7 @@ unsigned long REGPARAM2 op_4478_0_comp_nf(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4479_0_comp_nf(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4479_0_comp_nf(uae_u32 opcode) /* NEG */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -41899,7 +41899,7 @@ unsigned long REGPARAM2 op_4479_0_comp_nf(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4480_0_comp_nf(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4480_0_comp_nf(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41914,7 +41914,7 @@ unsigned long REGPARAM2 op_4480_0_comp_nf(uae_u32 opcode) /* NEG */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4490_0_comp_nf(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4490_0_comp_nf(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41932,7 +41932,7 @@ unsigned long REGPARAM2 op_4490_0_comp_nf(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4498_0_comp_nf(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_4498_0_comp_nf(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41950,7 +41950,7 @@ unsigned long REGPARAM2 op_4498_0_comp_nf(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_44a0_0_comp_nf(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_44a0_0_comp_nf(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41969,7 +41969,7 @@ unsigned long REGPARAM2 op_44a0_0_comp_nf(uae_u32 opcode) /* NEG */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_44a8_0_comp_nf(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_44a8_0_comp_nf(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -41987,7 +41987,7 @@ unsigned long REGPARAM2 op_44a8_0_comp_nf(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_44b0_0_comp_nf(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_44b0_0_comp_nf(uae_u32 opcode) /* NEG */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -42004,7 +42004,7 @@ unsigned long REGPARAM2 op_44b0_0_comp_nf(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_44b8_0_comp_nf(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_44b8_0_comp_nf(uae_u32 opcode) /* NEG */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -42020,7 +42020,7 @@ unsigned long REGPARAM2 op_44b8_0_comp_nf(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_44b9_0_comp_nf(uae_u32 opcode) /* NEG */ +uae_u32 REGPARAM2 op_44b9_0_comp_nf(uae_u32 opcode) /* NEG */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -42036,7 +42036,7 @@ unsigned long REGPARAM2 op_44b9_0_comp_nf(uae_u32 opcode) /* NEG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4600_0_comp_nf(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4600_0_comp_nf(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -42052,7 +42052,7 @@ unsigned long REGPARAM2 op_4600_0_comp_nf(uae_u32 opcode) /* NOT */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4610_0_comp_nf(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4610_0_comp_nf(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -42071,7 +42071,7 @@ unsigned long REGPARAM2 op_4610_0_comp_nf(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4618_0_comp_nf(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4618_0_comp_nf(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -42090,7 +42090,7 @@ unsigned long REGPARAM2 op_4618_0_comp_nf(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4620_0_comp_nf(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4620_0_comp_nf(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -42110,7 +42110,7 @@ unsigned long REGPARAM2 op_4620_0_comp_nf(uae_u32 opcode) /* NOT */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4628_0_comp_nf(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4628_0_comp_nf(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -42129,7 +42129,7 @@ unsigned long REGPARAM2 op_4628_0_comp_nf(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4630_0_comp_nf(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4630_0_comp_nf(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -42147,7 +42147,7 @@ unsigned long REGPARAM2 op_4630_0_comp_nf(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4638_0_comp_nf(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4638_0_comp_nf(uae_u32 opcode) /* NOT */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -42164,7 +42164,7 @@ unsigned long REGPARAM2 op_4638_0_comp_nf(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4639_0_comp_nf(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4639_0_comp_nf(uae_u32 opcode) /* NOT */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -42181,7 +42181,7 @@ unsigned long REGPARAM2 op_4639_0_comp_nf(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4640_0_comp_nf(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4640_0_comp_nf(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -42197,7 +42197,7 @@ unsigned long REGPARAM2 op_4640_0_comp_nf(uae_u32 opcode) /* NOT */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4650_0_comp_nf(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4650_0_comp_nf(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -42216,7 +42216,7 @@ unsigned long REGPARAM2 op_4650_0_comp_nf(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4658_0_comp_nf(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4658_0_comp_nf(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -42235,7 +42235,7 @@ unsigned long REGPARAM2 op_4658_0_comp_nf(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4660_0_comp_nf(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4660_0_comp_nf(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -42255,7 +42255,7 @@ unsigned long REGPARAM2 op_4660_0_comp_nf(uae_u32 opcode) /* NOT */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4668_0_comp_nf(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4668_0_comp_nf(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -42274,7 +42274,7 @@ unsigned long REGPARAM2 op_4668_0_comp_nf(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4670_0_comp_nf(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4670_0_comp_nf(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -42292,7 +42292,7 @@ unsigned long REGPARAM2 op_4670_0_comp_nf(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4678_0_comp_nf(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4678_0_comp_nf(uae_u32 opcode) /* NOT */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -42309,7 +42309,7 @@ unsigned long REGPARAM2 op_4678_0_comp_nf(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4679_0_comp_nf(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4679_0_comp_nf(uae_u32 opcode) /* NOT */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -42326,7 +42326,7 @@ unsigned long REGPARAM2 op_4679_0_comp_nf(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4680_0_comp_nf(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4680_0_comp_nf(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -42342,7 +42342,7 @@ unsigned long REGPARAM2 op_4680_0_comp_nf(uae_u32 opcode) /* NOT */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4690_0_comp_nf(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4690_0_comp_nf(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -42361,7 +42361,7 @@ unsigned long REGPARAM2 op_4690_0_comp_nf(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4698_0_comp_nf(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_4698_0_comp_nf(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -42380,7 +42380,7 @@ unsigned long REGPARAM2 op_4698_0_comp_nf(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_46a0_0_comp_nf(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_46a0_0_comp_nf(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -42400,7 +42400,7 @@ unsigned long REGPARAM2 op_46a0_0_comp_nf(uae_u32 opcode) /* NOT */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_46a8_0_comp_nf(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_46a8_0_comp_nf(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -42419,7 +42419,7 @@ unsigned long REGPARAM2 op_46a8_0_comp_nf(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_46b0_0_comp_nf(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_46b0_0_comp_nf(uae_u32 opcode) /* NOT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -42437,7 +42437,7 @@ unsigned long REGPARAM2 op_46b0_0_comp_nf(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_46b8_0_comp_nf(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_46b8_0_comp_nf(uae_u32 opcode) /* NOT */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -42454,7 +42454,7 @@ unsigned long REGPARAM2 op_46b8_0_comp_nf(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_46b9_0_comp_nf(uae_u32 opcode) /* NOT */ +uae_u32 REGPARAM2 op_46b9_0_comp_nf(uae_u32 opcode) /* NOT */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -42471,7 +42471,7 @@ unsigned long REGPARAM2 op_46b9_0_comp_nf(uae_u32 opcode) /* NOT */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4808_0_comp_nf(uae_u32 opcode) /* LINK */ +uae_u32 REGPARAM2 op_4808_0_comp_nf(uae_u32 opcode) /* LINK */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -42492,7 +42492,7 @@ unsigned long REGPARAM2 op_4808_0_comp_nf(uae_u32 opcode) /* LINK */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4840_0_comp_nf(uae_u32 opcode) /* SWAP */ +uae_u32 REGPARAM2 op_4840_0_comp_nf(uae_u32 opcode) /* SWAP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -42507,7 +42507,7 @@ unsigned long REGPARAM2 op_4840_0_comp_nf(uae_u32 opcode) /* SWAP */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4850_0_comp_nf(uae_u32 opcode) /* PEA */ +uae_u32 REGPARAM2 op_4850_0_comp_nf(uae_u32 opcode) /* PEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -42526,7 +42526,7 @@ if (srcreg==7) dodgy=1; }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4868_0_comp_nf(uae_u32 opcode) /* PEA */ +uae_u32 REGPARAM2 op_4868_0_comp_nf(uae_u32 opcode) /* PEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -42545,7 +42545,7 @@ if (srcreg==7) dodgy=1; }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4870_0_comp_nf(uae_u32 opcode) /* PEA */ +uae_u32 REGPARAM2 op_4870_0_comp_nf(uae_u32 opcode) /* PEA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -42563,7 +42563,7 @@ if (srcreg==7) dodgy=1; }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4878_0_comp_nf(uae_u32 opcode) /* PEA */ +uae_u32 REGPARAM2 op_4878_0_comp_nf(uae_u32 opcode) /* PEA */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -42579,7 +42579,7 @@ unsigned long REGPARAM2 op_4878_0_comp_nf(uae_u32 opcode) /* PEA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4879_0_comp_nf(uae_u32 opcode) /* PEA */ +uae_u32 REGPARAM2 op_4879_0_comp_nf(uae_u32 opcode) /* PEA */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -42595,7 +42595,7 @@ unsigned long REGPARAM2 op_4879_0_comp_nf(uae_u32 opcode) /* PEA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_487a_0_comp_nf(uae_u32 opcode) /* PEA */ +uae_u32 REGPARAM2 op_487a_0_comp_nf(uae_u32 opcode) /* PEA */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -42613,7 +42613,7 @@ unsigned long REGPARAM2 op_487a_0_comp_nf(uae_u32 opcode) /* PEA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_487b_0_comp_nf(uae_u32 opcode) /* PEA */ +uae_u32 REGPARAM2 op_487b_0_comp_nf(uae_u32 opcode) /* PEA */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -42632,7 +42632,7 @@ unsigned long REGPARAM2 op_487b_0_comp_nf(uae_u32 opcode) /* PEA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4880_0_comp_nf(uae_u32 opcode) /* EXT */ +uae_u32 REGPARAM2 op_4880_0_comp_nf(uae_u32 opcode) /* EXT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -42648,7 +42648,7 @@ unsigned long REGPARAM2 op_4880_0_comp_nf(uae_u32 opcode) /* EXT */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4890_0_comp_nf(uae_u32 opcode) /* MVMLE */ +uae_u32 REGPARAM2 op_4890_0_comp_nf(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -42681,7 +42681,7 @@ unsigned long REGPARAM2 op_4890_0_comp_nf(uae_u32 opcode) /* MVMLE */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_48a0_0_comp_nf(uae_u32 opcode) /* MVMLE */ +uae_u32 REGPARAM2 op_48a0_0_comp_nf(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -42715,7 +42715,7 @@ unsigned long REGPARAM2 op_48a0_0_comp_nf(uae_u32 opcode) /* MVMLE */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_48a8_0_comp_nf(uae_u32 opcode) /* MVMLE */ +uae_u32 REGPARAM2 op_48a8_0_comp_nf(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -42748,7 +42748,7 @@ unsigned long REGPARAM2 op_48a8_0_comp_nf(uae_u32 opcode) /* MVMLE */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_48b0_0_comp_nf(uae_u32 opcode) /* MVMLE */ +uae_u32 REGPARAM2 op_48b0_0_comp_nf(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -42780,7 +42780,7 @@ unsigned long REGPARAM2 op_48b0_0_comp_nf(uae_u32 opcode) /* MVMLE */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_48b8_0_comp_nf(uae_u32 opcode) /* MVMLE */ +uae_u32 REGPARAM2 op_48b8_0_comp_nf(uae_u32 opcode) /* MVMLE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -42811,7 +42811,7 @@ unsigned long REGPARAM2 op_48b8_0_comp_nf(uae_u32 opcode) /* MVMLE */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_48b9_0_comp_nf(uae_u32 opcode) /* MVMLE */ +uae_u32 REGPARAM2 op_48b9_0_comp_nf(uae_u32 opcode) /* MVMLE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -42842,7 +42842,7 @@ unsigned long REGPARAM2 op_48b9_0_comp_nf(uae_u32 opcode) /* MVMLE */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_48c0_0_comp_nf(uae_u32 opcode) /* EXT */ +uae_u32 REGPARAM2 op_48c0_0_comp_nf(uae_u32 opcode) /* EXT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -42858,7 +42858,7 @@ unsigned long REGPARAM2 op_48c0_0_comp_nf(uae_u32 opcode) /* EXT */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_48d0_0_comp_nf(uae_u32 opcode) /* MVMLE */ +uae_u32 REGPARAM2 op_48d0_0_comp_nf(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -42891,7 +42891,7 @@ unsigned long REGPARAM2 op_48d0_0_comp_nf(uae_u32 opcode) /* MVMLE */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_48e0_0_comp_nf(uae_u32 opcode) /* MVMLE */ +uae_u32 REGPARAM2 op_48e0_0_comp_nf(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -42925,7 +42925,7 @@ unsigned long REGPARAM2 op_48e0_0_comp_nf(uae_u32 opcode) /* MVMLE */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_48e8_0_comp_nf(uae_u32 opcode) /* MVMLE */ +uae_u32 REGPARAM2 op_48e8_0_comp_nf(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -42958,7 +42958,7 @@ unsigned long REGPARAM2 op_48e8_0_comp_nf(uae_u32 opcode) /* MVMLE */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_48f0_0_comp_nf(uae_u32 opcode) /* MVMLE */ +uae_u32 REGPARAM2 op_48f0_0_comp_nf(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -42990,7 +42990,7 @@ unsigned long REGPARAM2 op_48f0_0_comp_nf(uae_u32 opcode) /* MVMLE */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_48f8_0_comp_nf(uae_u32 opcode) /* MVMLE */ +uae_u32 REGPARAM2 op_48f8_0_comp_nf(uae_u32 opcode) /* MVMLE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -43021,7 +43021,7 @@ unsigned long REGPARAM2 op_48f8_0_comp_nf(uae_u32 opcode) /* MVMLE */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_48f9_0_comp_nf(uae_u32 opcode) /* MVMLE */ +uae_u32 REGPARAM2 op_48f9_0_comp_nf(uae_u32 opcode) /* MVMLE */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -43052,7 +43052,7 @@ unsigned long REGPARAM2 op_48f9_0_comp_nf(uae_u32 opcode) /* MVMLE */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_49c0_0_comp_nf(uae_u32 opcode) /* EXT */ +uae_u32 REGPARAM2 op_49c0_0_comp_nf(uae_u32 opcode) /* EXT */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -43068,7 +43068,7 @@ unsigned long REGPARAM2 op_49c0_0_comp_nf(uae_u32 opcode) /* EXT */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a00_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a00_0_comp_nf(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -43080,7 +43080,7 @@ unsigned long REGPARAM2 op_4a00_0_comp_nf(uae_u32 opcode) /* TST */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a10_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a10_0_comp_nf(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -43096,7 +43096,7 @@ unsigned long REGPARAM2 op_4a10_0_comp_nf(uae_u32 opcode) /* TST */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a18_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a18_0_comp_nf(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -43112,7 +43112,7 @@ unsigned long REGPARAM2 op_4a18_0_comp_nf(uae_u32 opcode) /* TST */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a20_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a20_0_comp_nf(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -43129,7 +43129,7 @@ unsigned long REGPARAM2 op_4a20_0_comp_nf(uae_u32 opcode) /* TST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a28_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a28_0_comp_nf(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -43145,7 +43145,7 @@ unsigned long REGPARAM2 op_4a28_0_comp_nf(uae_u32 opcode) /* TST */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a30_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a30_0_comp_nf(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -43160,7 +43160,7 @@ unsigned long REGPARAM2 op_4a30_0_comp_nf(uae_u32 opcode) /* TST */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a38_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a38_0_comp_nf(uae_u32 opcode) /* TST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -43174,7 +43174,7 @@ unsigned long REGPARAM2 op_4a38_0_comp_nf(uae_u32 opcode) /* TST */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a39_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a39_0_comp_nf(uae_u32 opcode) /* TST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -43188,7 +43188,7 @@ unsigned long REGPARAM2 op_4a39_0_comp_nf(uae_u32 opcode) /* TST */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a3a_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a3a_0_comp_nf(uae_u32 opcode) /* TST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -43204,7 +43204,7 @@ unsigned long REGPARAM2 op_4a3a_0_comp_nf(uae_u32 opcode) /* TST */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a3b_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a3b_0_comp_nf(uae_u32 opcode) /* TST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -43221,7 +43221,7 @@ unsigned long REGPARAM2 op_4a3b_0_comp_nf(uae_u32 opcode) /* TST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a3c_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a3c_0_comp_nf(uae_u32 opcode) /* TST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -43233,7 +43233,7 @@ unsigned long REGPARAM2 op_4a3c_0_comp_nf(uae_u32 opcode) /* TST */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a40_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a40_0_comp_nf(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -43245,7 +43245,7 @@ unsigned long REGPARAM2 op_4a40_0_comp_nf(uae_u32 opcode) /* TST */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a48_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a48_0_comp_nf(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -43259,7 +43259,7 @@ unsigned long REGPARAM2 op_4a48_0_comp_nf(uae_u32 opcode) /* TST */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a50_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a50_0_comp_nf(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -43275,7 +43275,7 @@ unsigned long REGPARAM2 op_4a50_0_comp_nf(uae_u32 opcode) /* TST */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a58_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a58_0_comp_nf(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -43291,7 +43291,7 @@ unsigned long REGPARAM2 op_4a58_0_comp_nf(uae_u32 opcode) /* TST */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a60_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a60_0_comp_nf(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -43308,7 +43308,7 @@ unsigned long REGPARAM2 op_4a60_0_comp_nf(uae_u32 opcode) /* TST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a68_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a68_0_comp_nf(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -43324,7 +43324,7 @@ unsigned long REGPARAM2 op_4a68_0_comp_nf(uae_u32 opcode) /* TST */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a70_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a70_0_comp_nf(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -43339,7 +43339,7 @@ unsigned long REGPARAM2 op_4a70_0_comp_nf(uae_u32 opcode) /* TST */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a78_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a78_0_comp_nf(uae_u32 opcode) /* TST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -43353,7 +43353,7 @@ unsigned long REGPARAM2 op_4a78_0_comp_nf(uae_u32 opcode) /* TST */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a79_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a79_0_comp_nf(uae_u32 opcode) /* TST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -43367,7 +43367,7 @@ unsigned long REGPARAM2 op_4a79_0_comp_nf(uae_u32 opcode) /* TST */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a7a_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a7a_0_comp_nf(uae_u32 opcode) /* TST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -43383,7 +43383,7 @@ unsigned long REGPARAM2 op_4a7a_0_comp_nf(uae_u32 opcode) /* TST */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a7b_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a7b_0_comp_nf(uae_u32 opcode) /* TST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -43400,7 +43400,7 @@ unsigned long REGPARAM2 op_4a7b_0_comp_nf(uae_u32 opcode) /* TST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a7c_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a7c_0_comp_nf(uae_u32 opcode) /* TST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -43412,7 +43412,7 @@ unsigned long REGPARAM2 op_4a7c_0_comp_nf(uae_u32 opcode) /* TST */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a80_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a80_0_comp_nf(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -43424,7 +43424,7 @@ unsigned long REGPARAM2 op_4a80_0_comp_nf(uae_u32 opcode) /* TST */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a88_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a88_0_comp_nf(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -43438,7 +43438,7 @@ unsigned long REGPARAM2 op_4a88_0_comp_nf(uae_u32 opcode) /* TST */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a90_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a90_0_comp_nf(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -43454,7 +43454,7 @@ unsigned long REGPARAM2 op_4a90_0_comp_nf(uae_u32 opcode) /* TST */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4a98_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4a98_0_comp_nf(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -43470,7 +43470,7 @@ unsigned long REGPARAM2 op_4a98_0_comp_nf(uae_u32 opcode) /* TST */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4aa0_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4aa0_0_comp_nf(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -43487,7 +43487,7 @@ unsigned long REGPARAM2 op_4aa0_0_comp_nf(uae_u32 opcode) /* TST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4aa8_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4aa8_0_comp_nf(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -43503,7 +43503,7 @@ unsigned long REGPARAM2 op_4aa8_0_comp_nf(uae_u32 opcode) /* TST */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4ab0_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4ab0_0_comp_nf(uae_u32 opcode) /* TST */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -43518,7 +43518,7 @@ unsigned long REGPARAM2 op_4ab0_0_comp_nf(uae_u32 opcode) /* TST */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4ab8_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4ab8_0_comp_nf(uae_u32 opcode) /* TST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -43532,7 +43532,7 @@ unsigned long REGPARAM2 op_4ab8_0_comp_nf(uae_u32 opcode) /* TST */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4ab9_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4ab9_0_comp_nf(uae_u32 opcode) /* TST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -43546,7 +43546,7 @@ unsigned long REGPARAM2 op_4ab9_0_comp_nf(uae_u32 opcode) /* TST */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4aba_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4aba_0_comp_nf(uae_u32 opcode) /* TST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -43562,7 +43562,7 @@ unsigned long REGPARAM2 op_4aba_0_comp_nf(uae_u32 opcode) /* TST */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4abb_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4abb_0_comp_nf(uae_u32 opcode) /* TST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -43579,7 +43579,7 @@ unsigned long REGPARAM2 op_4abb_0_comp_nf(uae_u32 opcode) /* TST */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4abc_0_comp_nf(uae_u32 opcode) /* TST */ +uae_u32 REGPARAM2 op_4abc_0_comp_nf(uae_u32 opcode) /* TST */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -43591,7 +43591,7 @@ unsigned long REGPARAM2 op_4abc_0_comp_nf(uae_u32 opcode) /* TST */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4c00_0_comp_nf(uae_u32 opcode) /* MULL */ +uae_u32 REGPARAM2 op_4c00_0_comp_nf(uae_u32 opcode) /* MULL */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -43620,7 +43620,7 @@ unsigned long REGPARAM2 op_4c00_0_comp_nf(uae_u32 opcode) /* MULL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4c10_0_comp_nf(uae_u32 opcode) /* MULL */ +uae_u32 REGPARAM2 op_4c10_0_comp_nf(uae_u32 opcode) /* MULL */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -43653,7 +43653,7 @@ unsigned long REGPARAM2 op_4c10_0_comp_nf(uae_u32 opcode) /* MULL */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4c18_0_comp_nf(uae_u32 opcode) /* MULL */ +uae_u32 REGPARAM2 op_4c18_0_comp_nf(uae_u32 opcode) /* MULL */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -43686,7 +43686,7 @@ unsigned long REGPARAM2 op_4c18_0_comp_nf(uae_u32 opcode) /* MULL */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4c20_0_comp_nf(uae_u32 opcode) /* MULL */ +uae_u32 REGPARAM2 op_4c20_0_comp_nf(uae_u32 opcode) /* MULL */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -43720,7 +43720,7 @@ unsigned long REGPARAM2 op_4c20_0_comp_nf(uae_u32 opcode) /* MULL */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4c28_0_comp_nf(uae_u32 opcode) /* MULL */ +uae_u32 REGPARAM2 op_4c28_0_comp_nf(uae_u32 opcode) /* MULL */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -43753,7 +43753,7 @@ unsigned long REGPARAM2 op_4c28_0_comp_nf(uae_u32 opcode) /* MULL */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4c30_0_comp_nf(uae_u32 opcode) /* MULL */ +uae_u32 REGPARAM2 op_4c30_0_comp_nf(uae_u32 opcode) /* MULL */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -43785,7 +43785,7 @@ unsigned long REGPARAM2 op_4c30_0_comp_nf(uae_u32 opcode) /* MULL */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4c38_0_comp_nf(uae_u32 opcode) /* MULL */ +uae_u32 REGPARAM2 op_4c38_0_comp_nf(uae_u32 opcode) /* MULL */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -43816,7 +43816,7 @@ unsigned long REGPARAM2 op_4c38_0_comp_nf(uae_u32 opcode) /* MULL */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4c39_0_comp_nf(uae_u32 opcode) /* MULL */ +uae_u32 REGPARAM2 op_4c39_0_comp_nf(uae_u32 opcode) /* MULL */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -43847,7 +43847,7 @@ unsigned long REGPARAM2 op_4c39_0_comp_nf(uae_u32 opcode) /* MULL */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4c3a_0_comp_nf(uae_u32 opcode) /* MULL */ +uae_u32 REGPARAM2 op_4c3a_0_comp_nf(uae_u32 opcode) /* MULL */ { uae_s32 dstreg = 2; uae_u32 dodgy=0; @@ -43881,7 +43881,7 @@ unsigned long REGPARAM2 op_4c3a_0_comp_nf(uae_u32 opcode) /* MULL */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4c3b_0_comp_nf(uae_u32 opcode) /* MULL */ +uae_u32 REGPARAM2 op_4c3b_0_comp_nf(uae_u32 opcode) /* MULL */ { uae_s32 dstreg = 3; uae_u32 dodgy=0; @@ -43916,7 +43916,7 @@ unsigned long REGPARAM2 op_4c3b_0_comp_nf(uae_u32 opcode) /* MULL */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4c3c_0_comp_nf(uae_u32 opcode) /* MULL */ +uae_u32 REGPARAM2 op_4c3c_0_comp_nf(uae_u32 opcode) /* MULL */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -43945,7 +43945,7 @@ unsigned long REGPARAM2 op_4c3c_0_comp_nf(uae_u32 opcode) /* MULL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4c90_0_comp_nf(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4c90_0_comp_nf(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -43979,7 +43979,7 @@ unsigned long REGPARAM2 op_4c90_0_comp_nf(uae_u32 opcode) /* MVMEL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4c98_0_comp_nf(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4c98_0_comp_nf(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -44014,7 +44014,7 @@ unsigned long REGPARAM2 op_4c98_0_comp_nf(uae_u32 opcode) /* MVMEL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4ca8_0_comp_nf(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4ca8_0_comp_nf(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -44048,7 +44048,7 @@ unsigned long REGPARAM2 op_4ca8_0_comp_nf(uae_u32 opcode) /* MVMEL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4cb0_0_comp_nf(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4cb0_0_comp_nf(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -44081,7 +44081,7 @@ unsigned long REGPARAM2 op_4cb0_0_comp_nf(uae_u32 opcode) /* MVMEL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4cb8_0_comp_nf(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4cb8_0_comp_nf(uae_u32 opcode) /* MVMEL */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -44113,7 +44113,7 @@ unsigned long REGPARAM2 op_4cb8_0_comp_nf(uae_u32 opcode) /* MVMEL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4cb9_0_comp_nf(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4cb9_0_comp_nf(uae_u32 opcode) /* MVMEL */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -44145,7 +44145,7 @@ unsigned long REGPARAM2 op_4cb9_0_comp_nf(uae_u32 opcode) /* MVMEL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4cba_0_comp_nf(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4cba_0_comp_nf(uae_u32 opcode) /* MVMEL */ { uae_s32 dstreg = 2; uae_u32 dodgy=0; @@ -44180,7 +44180,7 @@ unsigned long REGPARAM2 op_4cba_0_comp_nf(uae_u32 opcode) /* MVMEL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4cbb_0_comp_nf(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4cbb_0_comp_nf(uae_u32 opcode) /* MVMEL */ { uae_s32 dstreg = 3; uae_u32 dodgy=0; @@ -44216,7 +44216,7 @@ unsigned long REGPARAM2 op_4cbb_0_comp_nf(uae_u32 opcode) /* MVMEL */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4cd0_0_comp_nf(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4cd0_0_comp_nf(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -44250,7 +44250,7 @@ unsigned long REGPARAM2 op_4cd0_0_comp_nf(uae_u32 opcode) /* MVMEL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4cd8_0_comp_nf(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4cd8_0_comp_nf(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -44285,7 +44285,7 @@ unsigned long REGPARAM2 op_4cd8_0_comp_nf(uae_u32 opcode) /* MVMEL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4ce8_0_comp_nf(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4ce8_0_comp_nf(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -44319,7 +44319,7 @@ unsigned long REGPARAM2 op_4ce8_0_comp_nf(uae_u32 opcode) /* MVMEL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4cf0_0_comp_nf(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4cf0_0_comp_nf(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -44352,7 +44352,7 @@ unsigned long REGPARAM2 op_4cf0_0_comp_nf(uae_u32 opcode) /* MVMEL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4cf8_0_comp_nf(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4cf8_0_comp_nf(uae_u32 opcode) /* MVMEL */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -44384,7 +44384,7 @@ unsigned long REGPARAM2 op_4cf8_0_comp_nf(uae_u32 opcode) /* MVMEL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4cf9_0_comp_nf(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4cf9_0_comp_nf(uae_u32 opcode) /* MVMEL */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -44416,7 +44416,7 @@ unsigned long REGPARAM2 op_4cf9_0_comp_nf(uae_u32 opcode) /* MVMEL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4cfa_0_comp_nf(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4cfa_0_comp_nf(uae_u32 opcode) /* MVMEL */ { uae_s32 dstreg = 2; uae_u32 dodgy=0; @@ -44451,7 +44451,7 @@ unsigned long REGPARAM2 op_4cfa_0_comp_nf(uae_u32 opcode) /* MVMEL */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4cfb_0_comp_nf(uae_u32 opcode) /* MVMEL */ +uae_u32 REGPARAM2 op_4cfb_0_comp_nf(uae_u32 opcode) /* MVMEL */ { uae_s32 dstreg = 3; uae_u32 dodgy=0; @@ -44487,7 +44487,7 @@ unsigned long REGPARAM2 op_4cfb_0_comp_nf(uae_u32 opcode) /* MVMEL */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4e50_0_comp_nf(uae_u32 opcode) /* LINK */ +uae_u32 REGPARAM2 op_4e50_0_comp_nf(uae_u32 opcode) /* LINK */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -44508,7 +44508,7 @@ unsigned long REGPARAM2 op_4e50_0_comp_nf(uae_u32 opcode) /* LINK */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4e58_0_comp_nf(uae_u32 opcode) /* UNLK */ +uae_u32 REGPARAM2 op_4e58_0_comp_nf(uae_u32 opcode) /* UNLK */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -44526,7 +44526,7 @@ unsigned long REGPARAM2 op_4e58_0_comp_nf(uae_u32 opcode) /* UNLK */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4e71_0_comp_nf(uae_u32 opcode) /* NOP */ +uae_u32 REGPARAM2 op_4e71_0_comp_nf(uae_u32 opcode) /* NOP */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -44535,7 +44535,7 @@ unsigned long REGPARAM2 op_4e71_0_comp_nf(uae_u32 opcode) /* NOP */ } if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4e74_0_comp_nf(uae_u32 opcode) /* RTD */ +uae_u32 REGPARAM2 op_4e74_0_comp_nf(uae_u32 opcode) /* RTD */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -44554,7 +44554,7 @@ unsigned long REGPARAM2 op_4e74_0_comp_nf(uae_u32 opcode) /* RTD */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4e75_0_comp_nf(uae_u32 opcode) /* RTS */ +uae_u32 REGPARAM2 op_4e75_0_comp_nf(uae_u32 opcode) /* RTS */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -44570,7 +44570,7 @@ unsigned long REGPARAM2 op_4e75_0_comp_nf(uae_u32 opcode) /* RTS */ } if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4e90_0_comp_nf(uae_u32 opcode) /* JSR */ +uae_u32 REGPARAM2 op_4e90_0_comp_nf(uae_u32 opcode) /* JSR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -44592,7 +44592,7 @@ unsigned long REGPARAM2 op_4e90_0_comp_nf(uae_u32 opcode) /* JSR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4ea8_0_comp_nf(uae_u32 opcode) /* JSR */ +uae_u32 REGPARAM2 op_4ea8_0_comp_nf(uae_u32 opcode) /* JSR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -44614,7 +44614,7 @@ unsigned long REGPARAM2 op_4ea8_0_comp_nf(uae_u32 opcode) /* JSR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4eb0_0_comp_nf(uae_u32 opcode) /* JSR */ +uae_u32 REGPARAM2 op_4eb0_0_comp_nf(uae_u32 opcode) /* JSR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -44635,7 +44635,7 @@ unsigned long REGPARAM2 op_4eb0_0_comp_nf(uae_u32 opcode) /* JSR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4eb8_0_comp_nf(uae_u32 opcode) /* JSR */ +uae_u32 REGPARAM2 op_4eb8_0_comp_nf(uae_u32 opcode) /* JSR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -44655,7 +44655,7 @@ unsigned long REGPARAM2 op_4eb8_0_comp_nf(uae_u32 opcode) /* JSR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4eb9_0_comp_nf(uae_u32 opcode) /* JSR */ +uae_u32 REGPARAM2 op_4eb9_0_comp_nf(uae_u32 opcode) /* JSR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -44675,7 +44675,7 @@ unsigned long REGPARAM2 op_4eb9_0_comp_nf(uae_u32 opcode) /* JSR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4eba_0_comp_nf(uae_u32 opcode) /* JSR */ +uae_u32 REGPARAM2 op_4eba_0_comp_nf(uae_u32 opcode) /* JSR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -44697,7 +44697,7 @@ unsigned long REGPARAM2 op_4eba_0_comp_nf(uae_u32 opcode) /* JSR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4ebb_0_comp_nf(uae_u32 opcode) /* JSR */ +uae_u32 REGPARAM2 op_4ebb_0_comp_nf(uae_u32 opcode) /* JSR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -44720,7 +44720,7 @@ unsigned long REGPARAM2 op_4ebb_0_comp_nf(uae_u32 opcode) /* JSR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4ed0_0_comp_nf(uae_u32 opcode) /* JMP */ +uae_u32 REGPARAM2 op_4ed0_0_comp_nf(uae_u32 opcode) /* JMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -44737,7 +44737,7 @@ unsigned long REGPARAM2 op_4ed0_0_comp_nf(uae_u32 opcode) /* JMP */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4ee8_0_comp_nf(uae_u32 opcode) /* JMP */ +uae_u32 REGPARAM2 op_4ee8_0_comp_nf(uae_u32 opcode) /* JMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -44754,7 +44754,7 @@ unsigned long REGPARAM2 op_4ee8_0_comp_nf(uae_u32 opcode) /* JMP */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4ef0_0_comp_nf(uae_u32 opcode) /* JMP */ +uae_u32 REGPARAM2 op_4ef0_0_comp_nf(uae_u32 opcode) /* JMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -44770,7 +44770,7 @@ unsigned long REGPARAM2 op_4ef0_0_comp_nf(uae_u32 opcode) /* JMP */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4ef8_0_comp_nf(uae_u32 opcode) /* JMP */ +uae_u32 REGPARAM2 op_4ef8_0_comp_nf(uae_u32 opcode) /* JMP */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -44785,7 +44785,7 @@ unsigned long REGPARAM2 op_4ef8_0_comp_nf(uae_u32 opcode) /* JMP */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4ef9_0_comp_nf(uae_u32 opcode) /* JMP */ +uae_u32 REGPARAM2 op_4ef9_0_comp_nf(uae_u32 opcode) /* JMP */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -44800,7 +44800,7 @@ unsigned long REGPARAM2 op_4ef9_0_comp_nf(uae_u32 opcode) /* JMP */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4efa_0_comp_nf(uae_u32 opcode) /* JMP */ +uae_u32 REGPARAM2 op_4efa_0_comp_nf(uae_u32 opcode) /* JMP */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -44817,7 +44817,7 @@ unsigned long REGPARAM2 op_4efa_0_comp_nf(uae_u32 opcode) /* JMP */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_4efb_0_comp_nf(uae_u32 opcode) /* JMP */ +uae_u32 REGPARAM2 op_4efb_0_comp_nf(uae_u32 opcode) /* JMP */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -44835,7 +44835,7 @@ unsigned long REGPARAM2 op_4efb_0_comp_nf(uae_u32 opcode) /* JMP */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5000_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5000_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -44854,7 +44854,7 @@ unsigned long REGPARAM2 op_5000_0_comp_nf(uae_u32 opcode) /* ADD */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5010_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5010_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -44876,7 +44876,7 @@ unsigned long REGPARAM2 op_5010_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5018_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5018_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -44898,7 +44898,7 @@ unsigned long REGPARAM2 op_5018_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5020_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5020_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -44921,7 +44921,7 @@ unsigned long REGPARAM2 op_5020_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5028_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5028_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -44943,7 +44943,7 @@ unsigned long REGPARAM2 op_5028_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5030_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5030_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -44964,7 +44964,7 @@ unsigned long REGPARAM2 op_5030_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5038_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5038_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dodgy=0; @@ -44984,7 +44984,7 @@ unsigned long REGPARAM2 op_5038_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5039_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5039_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dodgy=0; @@ -45004,7 +45004,7 @@ unsigned long REGPARAM2 op_5039_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5040_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5040_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45023,7 +45023,7 @@ unsigned long REGPARAM2 op_5040_0_comp_nf(uae_u32 opcode) /* ADD */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5048_0_comp_nf(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_5048_0_comp_nf(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45042,7 +45042,7 @@ unsigned long REGPARAM2 op_5048_0_comp_nf(uae_u32 opcode) /* ADDA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5050_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5050_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45064,7 +45064,7 @@ unsigned long REGPARAM2 op_5050_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5058_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5058_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45086,7 +45086,7 @@ unsigned long REGPARAM2 op_5058_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5060_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5060_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45109,7 +45109,7 @@ unsigned long REGPARAM2 op_5060_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5068_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5068_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45131,7 +45131,7 @@ unsigned long REGPARAM2 op_5068_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5070_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5070_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45152,7 +45152,7 @@ unsigned long REGPARAM2 op_5070_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5078_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5078_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dodgy=0; @@ -45172,7 +45172,7 @@ unsigned long REGPARAM2 op_5078_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5079_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5079_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dodgy=0; @@ -45192,7 +45192,7 @@ unsigned long REGPARAM2 op_5079_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5080_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5080_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45211,7 +45211,7 @@ unsigned long REGPARAM2 op_5080_0_comp_nf(uae_u32 opcode) /* ADD */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5088_0_comp_nf(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_5088_0_comp_nf(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45230,10 +45230,7 @@ unsigned long REGPARAM2 op_5088_0_comp_nf(uae_u32 opcode) /* ADDA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -#endif - -#ifdef PART_5 -unsigned long REGPARAM2 op_5090_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5090_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45255,7 +45252,7 @@ unsigned long REGPARAM2 op_5090_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5098_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_5098_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45277,7 +45274,10 @@ unsigned long REGPARAM2 op_5098_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_50a0_0_comp_nf(uae_u32 opcode) /* ADD */ +#endif + +#ifdef PART_5 +uae_u32 REGPARAM2 op_50a0_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45300,7 +45300,7 @@ unsigned long REGPARAM2 op_50a0_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_50a8_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_50a8_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45322,7 +45322,7 @@ unsigned long REGPARAM2 op_50a8_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_50b0_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_50b0_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45343,7 +45343,7 @@ unsigned long REGPARAM2 op_50b0_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_50b8_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_50b8_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dodgy=0; @@ -45363,7 +45363,7 @@ unsigned long REGPARAM2 op_50b8_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_50b9_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_50b9_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dodgy=0; @@ -45383,7 +45383,7 @@ unsigned long REGPARAM2 op_50b9_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_50c0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_50c0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -45398,7 +45398,7 @@ unsigned long REGPARAM2 op_50c0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_50c8_0_comp_nf(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_50c8_0_comp_nf(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -45419,7 +45419,7 @@ unsigned long REGPARAM2 op_50c8_0_comp_nf(uae_u32 opcode) /* DBcc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_50d0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_50d0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -45435,7 +45435,7 @@ unsigned long REGPARAM2 op_50d0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_50d8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_50d8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -45451,7 +45451,7 @@ unsigned long REGPARAM2 op_50d8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_50e0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_50e0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -45468,7 +45468,7 @@ unsigned long REGPARAM2 op_50e0_0_comp_nf(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_50e8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_50e8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -45484,7 +45484,7 @@ unsigned long REGPARAM2 op_50e8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_50f0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_50f0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -45499,7 +45499,7 @@ unsigned long REGPARAM2 op_50f0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_50f8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_50f8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -45513,7 +45513,7 @@ unsigned long REGPARAM2 op_50f8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_50f9_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_50f9_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -45527,7 +45527,7 @@ unsigned long REGPARAM2 op_50f9_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5100_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5100_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45546,7 +45546,7 @@ unsigned long REGPARAM2 op_5100_0_comp_nf(uae_u32 opcode) /* SUB */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5110_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5110_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45568,7 +45568,7 @@ unsigned long REGPARAM2 op_5110_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5118_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5118_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45590,7 +45590,7 @@ unsigned long REGPARAM2 op_5118_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5120_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5120_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45613,7 +45613,7 @@ unsigned long REGPARAM2 op_5120_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5128_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5128_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45635,7 +45635,7 @@ unsigned long REGPARAM2 op_5128_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5130_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5130_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45656,7 +45656,7 @@ unsigned long REGPARAM2 op_5130_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5138_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5138_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dodgy=0; @@ -45676,7 +45676,7 @@ unsigned long REGPARAM2 op_5138_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5139_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5139_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dodgy=0; @@ -45696,7 +45696,7 @@ unsigned long REGPARAM2 op_5139_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5140_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5140_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45715,7 +45715,7 @@ unsigned long REGPARAM2 op_5140_0_comp_nf(uae_u32 opcode) /* SUB */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5148_0_comp_nf(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_5148_0_comp_nf(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45734,7 +45734,7 @@ unsigned long REGPARAM2 op_5148_0_comp_nf(uae_u32 opcode) /* SUBA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5150_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5150_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45756,7 +45756,7 @@ unsigned long REGPARAM2 op_5150_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5158_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5158_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45778,7 +45778,7 @@ unsigned long REGPARAM2 op_5158_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5160_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5160_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45801,7 +45801,7 @@ unsigned long REGPARAM2 op_5160_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5168_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5168_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45823,7 +45823,7 @@ unsigned long REGPARAM2 op_5168_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5170_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5170_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45844,7 +45844,7 @@ unsigned long REGPARAM2 op_5170_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5178_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5178_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dodgy=0; @@ -45864,7 +45864,7 @@ unsigned long REGPARAM2 op_5178_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5179_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5179_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dodgy=0; @@ -45884,7 +45884,7 @@ unsigned long REGPARAM2 op_5179_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5180_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5180_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45903,7 +45903,7 @@ unsigned long REGPARAM2 op_5180_0_comp_nf(uae_u32 opcode) /* SUB */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5188_0_comp_nf(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_5188_0_comp_nf(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45922,7 +45922,7 @@ unsigned long REGPARAM2 op_5188_0_comp_nf(uae_u32 opcode) /* SUBA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5190_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5190_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45944,7 +45944,7 @@ unsigned long REGPARAM2 op_5190_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5198_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_5198_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45966,7 +45966,7 @@ unsigned long REGPARAM2 op_5198_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_51a0_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_51a0_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -45989,7 +45989,7 @@ unsigned long REGPARAM2 op_51a0_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_51a8_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_51a8_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -46011,7 +46011,7 @@ unsigned long REGPARAM2 op_51a8_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_51b0_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_51b0_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -46032,7 +46032,7 @@ unsigned long REGPARAM2 op_51b0_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_51b8_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_51b8_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dodgy=0; @@ -46052,7 +46052,7 @@ unsigned long REGPARAM2 op_51b8_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_51b9_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_51b9_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dodgy=0; @@ -46072,7 +46072,7 @@ unsigned long REGPARAM2 op_51b9_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_51c0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_51c0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46087,7 +46087,7 @@ unsigned long REGPARAM2 op_51c0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_51c8_0_comp_nf(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_51c8_0_comp_nf(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46113,7 +46113,7 @@ unsigned long REGPARAM2 op_51c8_0_comp_nf(uae_u32 opcode) /* DBcc */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_51d0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_51d0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46129,7 +46129,7 @@ unsigned long REGPARAM2 op_51d0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_51d8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_51d8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46145,7 +46145,7 @@ unsigned long REGPARAM2 op_51d8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_51e0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_51e0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46162,7 +46162,7 @@ unsigned long REGPARAM2 op_51e0_0_comp_nf(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_51e8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_51e8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46178,7 +46178,7 @@ unsigned long REGPARAM2 op_51e8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_51f0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_51f0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46193,7 +46193,7 @@ unsigned long REGPARAM2 op_51f0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_51f8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_51f8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -46207,7 +46207,7 @@ unsigned long REGPARAM2 op_51f8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_51f9_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_51f9_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -46221,7 +46221,7 @@ unsigned long REGPARAM2 op_51f9_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_52c0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_52c0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46237,7 +46237,7 @@ unsigned long REGPARAM2 op_52c0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_52c8_0_comp_nf(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_52c8_0_comp_nf(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46263,7 +46263,7 @@ unsigned long REGPARAM2 op_52c8_0_comp_nf(uae_u32 opcode) /* DBcc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_52d0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_52d0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46280,7 +46280,7 @@ unsigned long REGPARAM2 op_52d0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_52d8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_52d8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46297,7 +46297,7 @@ unsigned long REGPARAM2 op_52d8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_52e0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_52e0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46315,7 +46315,7 @@ unsigned long REGPARAM2 op_52e0_0_comp_nf(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_52e8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_52e8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46332,7 +46332,7 @@ unsigned long REGPARAM2 op_52e8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_52f0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_52f0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46348,7 +46348,7 @@ unsigned long REGPARAM2 op_52f0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_52f8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_52f8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -46363,7 +46363,7 @@ unsigned long REGPARAM2 op_52f8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_52f9_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_52f9_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -46378,7 +46378,7 @@ unsigned long REGPARAM2 op_52f9_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_53c0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_53c0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46394,7 +46394,7 @@ unsigned long REGPARAM2 op_53c0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_53c8_0_comp_nf(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_53c8_0_comp_nf(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46420,7 +46420,7 @@ unsigned long REGPARAM2 op_53c8_0_comp_nf(uae_u32 opcode) /* DBcc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_53d0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_53d0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46437,7 +46437,7 @@ unsigned long REGPARAM2 op_53d0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_53d8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_53d8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46454,7 +46454,7 @@ unsigned long REGPARAM2 op_53d8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_53e0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_53e0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46472,7 +46472,7 @@ unsigned long REGPARAM2 op_53e0_0_comp_nf(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_53e8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_53e8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46489,7 +46489,7 @@ unsigned long REGPARAM2 op_53e8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_53f0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_53f0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46505,7 +46505,7 @@ unsigned long REGPARAM2 op_53f0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_53f8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_53f8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -46520,7 +46520,7 @@ unsigned long REGPARAM2 op_53f8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_53f9_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_53f9_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -46535,7 +46535,7 @@ unsigned long REGPARAM2 op_53f9_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_54c0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_54c0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46551,7 +46551,7 @@ unsigned long REGPARAM2 op_54c0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_54c8_0_comp_nf(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_54c8_0_comp_nf(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46577,7 +46577,7 @@ unsigned long REGPARAM2 op_54c8_0_comp_nf(uae_u32 opcode) /* DBcc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_54d0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_54d0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46594,7 +46594,7 @@ unsigned long REGPARAM2 op_54d0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_54d8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_54d8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46611,7 +46611,7 @@ unsigned long REGPARAM2 op_54d8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_54e0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_54e0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46629,7 +46629,7 @@ unsigned long REGPARAM2 op_54e0_0_comp_nf(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_54e8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_54e8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46646,7 +46646,7 @@ unsigned long REGPARAM2 op_54e8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_54f0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_54f0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46662,7 +46662,7 @@ unsigned long REGPARAM2 op_54f0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_54f8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_54f8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -46677,7 +46677,7 @@ unsigned long REGPARAM2 op_54f8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_54f9_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_54f9_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -46692,7 +46692,7 @@ unsigned long REGPARAM2 op_54f9_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_55c0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_55c0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46708,7 +46708,7 @@ unsigned long REGPARAM2 op_55c0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_55c8_0_comp_nf(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_55c8_0_comp_nf(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46734,7 +46734,7 @@ unsigned long REGPARAM2 op_55c8_0_comp_nf(uae_u32 opcode) /* DBcc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_55d0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_55d0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46751,7 +46751,7 @@ unsigned long REGPARAM2 op_55d0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_55d8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_55d8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46768,7 +46768,7 @@ unsigned long REGPARAM2 op_55d8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_55e0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_55e0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46786,7 +46786,7 @@ unsigned long REGPARAM2 op_55e0_0_comp_nf(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_55e8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_55e8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46803,7 +46803,7 @@ unsigned long REGPARAM2 op_55e8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_55f0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_55f0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46819,7 +46819,7 @@ unsigned long REGPARAM2 op_55f0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_55f8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_55f8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -46834,7 +46834,7 @@ unsigned long REGPARAM2 op_55f8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_55f9_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_55f9_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -46849,7 +46849,7 @@ unsigned long REGPARAM2 op_55f9_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_56c0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_56c0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46865,7 +46865,7 @@ unsigned long REGPARAM2 op_56c0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_56c8_0_comp_nf(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_56c8_0_comp_nf(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46891,7 +46891,7 @@ unsigned long REGPARAM2 op_56c8_0_comp_nf(uae_u32 opcode) /* DBcc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_56d0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_56d0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46908,7 +46908,7 @@ unsigned long REGPARAM2 op_56d0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_56d8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_56d8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46925,7 +46925,7 @@ unsigned long REGPARAM2 op_56d8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_56e0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_56e0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46943,7 +46943,7 @@ unsigned long REGPARAM2 op_56e0_0_comp_nf(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_56e8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_56e8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46960,7 +46960,7 @@ unsigned long REGPARAM2 op_56e8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_56f0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_56f0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -46976,7 +46976,7 @@ unsigned long REGPARAM2 op_56f0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_56f8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_56f8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -46991,7 +46991,7 @@ unsigned long REGPARAM2 op_56f8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_56f9_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_56f9_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -47006,7 +47006,7 @@ unsigned long REGPARAM2 op_56f9_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_57c0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_57c0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47022,7 +47022,7 @@ unsigned long REGPARAM2 op_57c0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_57c8_0_comp_nf(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_57c8_0_comp_nf(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47048,7 +47048,7 @@ unsigned long REGPARAM2 op_57c8_0_comp_nf(uae_u32 opcode) /* DBcc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_57d0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_57d0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47065,7 +47065,7 @@ unsigned long REGPARAM2 op_57d0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_57d8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_57d8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47082,7 +47082,7 @@ unsigned long REGPARAM2 op_57d8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_57e0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_57e0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47100,7 +47100,7 @@ unsigned long REGPARAM2 op_57e0_0_comp_nf(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_57e8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_57e8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47117,7 +47117,7 @@ unsigned long REGPARAM2 op_57e8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_57f0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_57f0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47133,7 +47133,7 @@ unsigned long REGPARAM2 op_57f0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_57f8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_57f8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -47148,7 +47148,7 @@ unsigned long REGPARAM2 op_57f8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_57f9_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_57f9_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -47163,7 +47163,7 @@ unsigned long REGPARAM2 op_57f9_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_58c0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_58c0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47179,7 +47179,7 @@ unsigned long REGPARAM2 op_58c0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_58c8_0_comp_nf(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_58c8_0_comp_nf(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47205,7 +47205,7 @@ unsigned long REGPARAM2 op_58c8_0_comp_nf(uae_u32 opcode) /* DBcc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_58d0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_58d0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47222,7 +47222,7 @@ unsigned long REGPARAM2 op_58d0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_58d8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_58d8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47239,7 +47239,7 @@ unsigned long REGPARAM2 op_58d8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_58e0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_58e0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47257,7 +47257,7 @@ unsigned long REGPARAM2 op_58e0_0_comp_nf(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_58e8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_58e8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47274,7 +47274,7 @@ unsigned long REGPARAM2 op_58e8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_58f0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_58f0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47290,7 +47290,7 @@ unsigned long REGPARAM2 op_58f0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_58f8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_58f8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -47305,7 +47305,7 @@ unsigned long REGPARAM2 op_58f8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_58f9_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_58f9_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -47320,7 +47320,7 @@ unsigned long REGPARAM2 op_58f9_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_59c0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_59c0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47336,7 +47336,7 @@ unsigned long REGPARAM2 op_59c0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_59c8_0_comp_nf(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_59c8_0_comp_nf(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47362,7 +47362,7 @@ unsigned long REGPARAM2 op_59c8_0_comp_nf(uae_u32 opcode) /* DBcc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_59d0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_59d0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47379,7 +47379,7 @@ unsigned long REGPARAM2 op_59d0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_59d8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_59d8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47396,7 +47396,7 @@ unsigned long REGPARAM2 op_59d8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_59e0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_59e0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47414,7 +47414,7 @@ unsigned long REGPARAM2 op_59e0_0_comp_nf(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_59e8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_59e8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47431,7 +47431,7 @@ unsigned long REGPARAM2 op_59e8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_59f0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_59f0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47447,7 +47447,7 @@ unsigned long REGPARAM2 op_59f0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_59f8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_59f8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -47462,7 +47462,7 @@ unsigned long REGPARAM2 op_59f8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_59f9_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_59f9_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -47477,7 +47477,7 @@ unsigned long REGPARAM2 op_59f9_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ac0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ac0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47493,7 +47493,7 @@ unsigned long REGPARAM2 op_5ac0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ac8_0_comp_nf(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_5ac8_0_comp_nf(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47519,7 +47519,7 @@ unsigned long REGPARAM2 op_5ac8_0_comp_nf(uae_u32 opcode) /* DBcc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ad0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ad0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47536,7 +47536,7 @@ unsigned long REGPARAM2 op_5ad0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ad8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ad8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47553,7 +47553,7 @@ unsigned long REGPARAM2 op_5ad8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ae0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ae0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47571,7 +47571,7 @@ unsigned long REGPARAM2 op_5ae0_0_comp_nf(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ae8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ae8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47588,7 +47588,7 @@ unsigned long REGPARAM2 op_5ae8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5af0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5af0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47604,7 +47604,7 @@ unsigned long REGPARAM2 op_5af0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5af8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5af8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -47619,7 +47619,7 @@ unsigned long REGPARAM2 op_5af8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5af9_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5af9_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -47634,7 +47634,7 @@ unsigned long REGPARAM2 op_5af9_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5bc0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5bc0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47650,7 +47650,7 @@ unsigned long REGPARAM2 op_5bc0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5bc8_0_comp_nf(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_5bc8_0_comp_nf(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47676,7 +47676,7 @@ unsigned long REGPARAM2 op_5bc8_0_comp_nf(uae_u32 opcode) /* DBcc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5bd0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5bd0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47693,7 +47693,7 @@ unsigned long REGPARAM2 op_5bd0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5bd8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5bd8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47710,7 +47710,7 @@ unsigned long REGPARAM2 op_5bd8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5be0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5be0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47728,7 +47728,7 @@ unsigned long REGPARAM2 op_5be0_0_comp_nf(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5be8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5be8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47745,7 +47745,7 @@ unsigned long REGPARAM2 op_5be8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5bf0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5bf0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47761,7 +47761,7 @@ unsigned long REGPARAM2 op_5bf0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5bf8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5bf8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -47776,7 +47776,7 @@ unsigned long REGPARAM2 op_5bf8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5bf9_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5bf9_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -47791,7 +47791,7 @@ unsigned long REGPARAM2 op_5bf9_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5cc0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5cc0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47807,7 +47807,7 @@ unsigned long REGPARAM2 op_5cc0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5cc8_0_comp_nf(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_5cc8_0_comp_nf(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47833,7 +47833,7 @@ unsigned long REGPARAM2 op_5cc8_0_comp_nf(uae_u32 opcode) /* DBcc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5cd0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5cd0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47850,7 +47850,7 @@ unsigned long REGPARAM2 op_5cd0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5cd8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5cd8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47867,7 +47867,7 @@ unsigned long REGPARAM2 op_5cd8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ce0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ce0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47885,7 +47885,7 @@ unsigned long REGPARAM2 op_5ce0_0_comp_nf(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ce8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ce8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47902,7 +47902,7 @@ unsigned long REGPARAM2 op_5ce8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5cf0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5cf0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47918,7 +47918,7 @@ unsigned long REGPARAM2 op_5cf0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5cf8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5cf8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -47933,7 +47933,7 @@ unsigned long REGPARAM2 op_5cf8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5cf9_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5cf9_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -47948,7 +47948,7 @@ unsigned long REGPARAM2 op_5cf9_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5dc0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5dc0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47964,7 +47964,7 @@ unsigned long REGPARAM2 op_5dc0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5dc8_0_comp_nf(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_5dc8_0_comp_nf(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -47990,7 +47990,7 @@ unsigned long REGPARAM2 op_5dc8_0_comp_nf(uae_u32 opcode) /* DBcc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5dd0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5dd0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -48007,7 +48007,7 @@ unsigned long REGPARAM2 op_5dd0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5dd8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5dd8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -48024,7 +48024,7 @@ unsigned long REGPARAM2 op_5dd8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5de0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5de0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -48042,7 +48042,7 @@ unsigned long REGPARAM2 op_5de0_0_comp_nf(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5de8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5de8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -48059,7 +48059,7 @@ unsigned long REGPARAM2 op_5de8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5df0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5df0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -48075,7 +48075,7 @@ unsigned long REGPARAM2 op_5df0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5df8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5df8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -48090,7 +48090,7 @@ unsigned long REGPARAM2 op_5df8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5df9_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5df9_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -48105,7 +48105,7 @@ unsigned long REGPARAM2 op_5df9_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ec0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ec0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -48121,7 +48121,7 @@ unsigned long REGPARAM2 op_5ec0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ec8_0_comp_nf(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_5ec8_0_comp_nf(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -48147,7 +48147,7 @@ unsigned long REGPARAM2 op_5ec8_0_comp_nf(uae_u32 opcode) /* DBcc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ed0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ed0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -48164,7 +48164,7 @@ unsigned long REGPARAM2 op_5ed0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ed8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ed8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -48181,7 +48181,7 @@ unsigned long REGPARAM2 op_5ed8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ee0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ee0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -48199,7 +48199,7 @@ unsigned long REGPARAM2 op_5ee0_0_comp_nf(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ee8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ee8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -48216,7 +48216,7 @@ unsigned long REGPARAM2 op_5ee8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ef0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ef0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -48232,7 +48232,7 @@ unsigned long REGPARAM2 op_5ef0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ef8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ef8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -48247,7 +48247,7 @@ unsigned long REGPARAM2 op_5ef8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ef9_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ef9_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -48262,7 +48262,7 @@ unsigned long REGPARAM2 op_5ef9_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5fc0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5fc0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -48278,7 +48278,7 @@ unsigned long REGPARAM2 op_5fc0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5fc8_0_comp_nf(uae_u32 opcode) /* DBcc */ +uae_u32 REGPARAM2 op_5fc8_0_comp_nf(uae_u32 opcode) /* DBcc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -48304,7 +48304,7 @@ unsigned long REGPARAM2 op_5fc8_0_comp_nf(uae_u32 opcode) /* DBcc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5fd0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5fd0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -48321,7 +48321,7 @@ unsigned long REGPARAM2 op_5fd0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5fd8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5fd8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -48338,7 +48338,7 @@ unsigned long REGPARAM2 op_5fd8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5fe0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5fe0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -48356,7 +48356,7 @@ unsigned long REGPARAM2 op_5fe0_0_comp_nf(uae_u32 opcode) /* Scc */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5fe8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5fe8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -48373,7 +48373,7 @@ unsigned long REGPARAM2 op_5fe8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ff0_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ff0_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -48389,7 +48389,7 @@ unsigned long REGPARAM2 op_5ff0_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ff8_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ff8_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -48404,7 +48404,7 @@ unsigned long REGPARAM2 op_5ff8_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_5ff9_0_comp_nf(uae_u32 opcode) /* Scc */ +uae_u32 REGPARAM2 op_5ff9_0_comp_nf(uae_u32 opcode) /* Scc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -48419,7 +48419,7 @@ unsigned long REGPARAM2 op_5ff9_0_comp_nf(uae_u32 opcode) /* Scc */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6000_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6000_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -48439,7 +48439,7 @@ unsigned long REGPARAM2 op_6000_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6001_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6001_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dodgy=0; @@ -48460,7 +48460,7 @@ unsigned long REGPARAM2 op_6001_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_60ff_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_60ff_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -48480,7 +48480,7 @@ unsigned long REGPARAM2 op_60ff_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6100_0_comp_nf(uae_u32 opcode) /* BSR */ +uae_u32 REGPARAM2 op_6100_0_comp_nf(uae_u32 opcode) /* BSR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -48500,7 +48500,7 @@ unsigned long REGPARAM2 op_6100_0_comp_nf(uae_u32 opcode) /* BSR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6101_0_comp_nf(uae_u32 opcode) /* BSR */ +uae_u32 REGPARAM2 op_6101_0_comp_nf(uae_u32 opcode) /* BSR */ { uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dodgy=0; @@ -48521,7 +48521,7 @@ unsigned long REGPARAM2 op_6101_0_comp_nf(uae_u32 opcode) /* BSR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_61ff_0_comp_nf(uae_u32 opcode) /* BSR */ +uae_u32 REGPARAM2 op_61ff_0_comp_nf(uae_u32 opcode) /* BSR */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -48541,7 +48541,7 @@ unsigned long REGPARAM2 op_61ff_0_comp_nf(uae_u32 opcode) /* BSR */ }}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6200_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6200_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -48563,7 +48563,7 @@ unsigned long REGPARAM2 op_6200_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6201_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6201_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dodgy=0; @@ -48586,77 +48586,77 @@ unsigned long REGPARAM2 op_6201_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } +uae_u32 REGPARAM2 op_62ff_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v1, v2; +{ int src = scratchie++; + mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); + sub_l_ri(src, m68k_pc_offset - m68k_pc_offset_thisinst - 2); + arm_ADD_l_ri(src, (uintptr)comp_pc_p); + mov_l_ri(PC_P, (uintptr)comp_pc_p); + arm_ADD_l_ri(src, m68k_pc_offset); + arm_ADD_l_ri(PC_P, m68k_pc_offset); + m68k_pc_offset = 0; + v1 = get_const(PC_P); + v2 = get_const(src); + register_branch(v1, v2, 8); + make_flags_live(); +}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); +return 0; +} +uae_u32 REGPARAM2 op_6300_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v1, v2; +{ int src = scratchie++; + mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); + sub_l_ri(src, m68k_pc_offset - m68k_pc_offset_thisinst - 2); + arm_ADD_l_ri(src, (uintptr)comp_pc_p); + mov_l_ri(PC_P, (uintptr)comp_pc_p); + arm_ADD_l_ri(src, m68k_pc_offset); + arm_ADD_l_ri(PC_P, m68k_pc_offset); + m68k_pc_offset = 0; + v1 = get_const(PC_P); + v2 = get_const(src); + register_branch(v1, v2, 9); + make_flags_live(); +}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); +return 0; +} +uae_u32 REGPARAM2 op_6301_0_comp_nf(uae_u32 opcode) /* Bcc */ +{ + uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; + uae_u32 v1, v2; +{ int src = scratchie++; + mov_l_ri(src,srcreg); + sub_l_ri(src, m68k_pc_offset - m68k_pc_offset_thisinst - 2); + arm_ADD_l_ri(src, (uintptr)comp_pc_p); + mov_l_ri(PC_P, (uintptr)comp_pc_p); + arm_ADD_l_ri(src, m68k_pc_offset); + arm_ADD_l_ri(PC_P, m68k_pc_offset); + m68k_pc_offset = 0; + v1 = get_const(PC_P); + v2 = get_const(src); + register_branch(v1, v2, 9); + make_flags_live(); +}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); +return 0; +} #endif #ifdef PART_6 -unsigned long REGPARAM2 op_62ff_0_comp_nf(uae_u32 opcode) /* Bcc */ -{ - uae_u32 dodgy=0; - uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; - m68k_pc_offset+=2; -{ uae_u8 scratchie=S1; - uae_u32 v1, v2; -{ int src = scratchie++; - mov_l_ri(src,comp_get_ilong((m68k_pc_offset+=4)-4)); - sub_l_ri(src, m68k_pc_offset - m68k_pc_offset_thisinst - 2); - arm_ADD_l_ri(src, (uintptr)comp_pc_p); - mov_l_ri(PC_P, (uintptr)comp_pc_p); - arm_ADD_l_ri(src, m68k_pc_offset); - arm_ADD_l_ri(PC_P, m68k_pc_offset); - m68k_pc_offset = 0; - v1 = get_const(PC_P); - v2 = get_const(src); - register_branch(v1, v2, 8); - make_flags_live(); -}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); -return 0; -} -unsigned long REGPARAM2 op_6300_0_comp_nf(uae_u32 opcode) /* Bcc */ -{ - uae_u32 dodgy=0; - uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; - m68k_pc_offset+=2; -{ uae_u8 scratchie=S1; - uae_u32 v1, v2; -{ int src = scratchie++; - mov_l_ri(src,(uae_s32)(uae_s16)comp_get_iword((m68k_pc_offset+=2)-2)); - sub_l_ri(src, m68k_pc_offset - m68k_pc_offset_thisinst - 2); - arm_ADD_l_ri(src, (uintptr)comp_pc_p); - mov_l_ri(PC_P, (uintptr)comp_pc_p); - arm_ADD_l_ri(src, m68k_pc_offset); - arm_ADD_l_ri(PC_P, m68k_pc_offset); - m68k_pc_offset = 0; - v1 = get_const(PC_P); - v2 = get_const(src); - register_branch(v1, v2, 9); - make_flags_live(); -}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); -return 0; -} -unsigned long REGPARAM2 op_6301_0_comp_nf(uae_u32 opcode) /* Bcc */ -{ - uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); - uae_u32 dodgy=0; - uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; - m68k_pc_offset+=2; -{ uae_u8 scratchie=S1; - uae_u32 v1, v2; -{ int src = scratchie++; - mov_l_ri(src,srcreg); - sub_l_ri(src, m68k_pc_offset - m68k_pc_offset_thisinst - 2); - arm_ADD_l_ri(src, (uintptr)comp_pc_p); - mov_l_ri(PC_P, (uintptr)comp_pc_p); - arm_ADD_l_ri(src, m68k_pc_offset); - arm_ADD_l_ri(PC_P, m68k_pc_offset); - m68k_pc_offset = 0; - v1 = get_const(PC_P); - v2 = get_const(src); - register_branch(v1, v2, 9); - make_flags_live(); -}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); -return 0; -} -unsigned long REGPARAM2 op_63ff_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_63ff_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -48678,7 +48678,7 @@ unsigned long REGPARAM2 op_63ff_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6400_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6400_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -48700,7 +48700,7 @@ unsigned long REGPARAM2 op_6400_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6401_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6401_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dodgy=0; @@ -48723,7 +48723,7 @@ unsigned long REGPARAM2 op_6401_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_64ff_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_64ff_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -48745,7 +48745,7 @@ unsigned long REGPARAM2 op_64ff_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6500_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6500_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -48767,7 +48767,7 @@ unsigned long REGPARAM2 op_6500_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6501_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6501_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dodgy=0; @@ -48790,7 +48790,7 @@ unsigned long REGPARAM2 op_6501_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_65ff_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_65ff_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -48812,7 +48812,7 @@ unsigned long REGPARAM2 op_65ff_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6600_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6600_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -48834,7 +48834,7 @@ unsigned long REGPARAM2 op_6600_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6601_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6601_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dodgy=0; @@ -48857,7 +48857,7 @@ unsigned long REGPARAM2 op_6601_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_66ff_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_66ff_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -48879,7 +48879,7 @@ unsigned long REGPARAM2 op_66ff_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6700_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6700_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -48901,7 +48901,7 @@ unsigned long REGPARAM2 op_6700_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6701_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6701_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dodgy=0; @@ -48924,7 +48924,7 @@ unsigned long REGPARAM2 op_6701_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_67ff_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_67ff_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -48946,7 +48946,7 @@ unsigned long REGPARAM2 op_67ff_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6a00_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6a00_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -48968,7 +48968,7 @@ unsigned long REGPARAM2 op_6a00_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6a01_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6a01_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dodgy=0; @@ -48991,7 +48991,7 @@ unsigned long REGPARAM2 op_6a01_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6aff_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6aff_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -49013,7 +49013,7 @@ unsigned long REGPARAM2 op_6aff_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6b00_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6b00_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -49035,7 +49035,7 @@ unsigned long REGPARAM2 op_6b00_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6b01_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6b01_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dodgy=0; @@ -49058,7 +49058,7 @@ unsigned long REGPARAM2 op_6b01_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6bff_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6bff_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -49080,7 +49080,7 @@ unsigned long REGPARAM2 op_6bff_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6c00_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6c00_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -49102,7 +49102,7 @@ unsigned long REGPARAM2 op_6c00_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6c01_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6c01_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dodgy=0; @@ -49125,7 +49125,7 @@ unsigned long REGPARAM2 op_6c01_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6cff_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6cff_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -49147,7 +49147,7 @@ unsigned long REGPARAM2 op_6cff_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6d00_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6d00_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -49169,7 +49169,7 @@ unsigned long REGPARAM2 op_6d00_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6d01_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6d01_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dodgy=0; @@ -49192,7 +49192,7 @@ unsigned long REGPARAM2 op_6d01_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6dff_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6dff_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -49214,7 +49214,7 @@ unsigned long REGPARAM2 op_6dff_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6e00_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6e00_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -49236,7 +49236,7 @@ unsigned long REGPARAM2 op_6e00_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6e01_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6e01_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dodgy=0; @@ -49259,7 +49259,7 @@ unsigned long REGPARAM2 op_6e01_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6eff_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6eff_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -49281,7 +49281,7 @@ unsigned long REGPARAM2 op_6eff_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6f00_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6f00_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -49303,7 +49303,7 @@ unsigned long REGPARAM2 op_6f00_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6f01_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6f01_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dodgy=0; @@ -49326,7 +49326,7 @@ unsigned long REGPARAM2 op_6f01_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_6fff_0_comp_nf(uae_u32 opcode) /* Bcc */ +uae_u32 REGPARAM2 op_6fff_0_comp_nf(uae_u32 opcode) /* Bcc */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -49348,7 +49348,7 @@ unsigned long REGPARAM2 op_6fff_0_comp_nf(uae_u32 opcode) /* Bcc */ }} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_7000_0_comp_nf(uae_u32 opcode) /* MOVE */ +uae_u32 REGPARAM2 op_7000_0_comp_nf(uae_u32 opcode) /* MOVE */ { uae_s32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dstreg = (opcode >> 9) & 7; @@ -49367,7 +49367,7 @@ unsigned long REGPARAM2 op_7000_0_comp_nf(uae_u32 opcode) /* MOVE */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8000_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8000_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -49385,7 +49385,7 @@ unsigned long REGPARAM2 op_8000_0_comp_nf(uae_u32 opcode) /* OR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8010_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8010_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -49407,7 +49407,7 @@ unsigned long REGPARAM2 op_8010_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8018_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8018_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -49429,7 +49429,7 @@ unsigned long REGPARAM2 op_8018_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8020_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8020_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -49452,7 +49452,7 @@ unsigned long REGPARAM2 op_8020_0_comp_nf(uae_u32 opcode) /* OR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8028_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8028_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -49474,7 +49474,7 @@ unsigned long REGPARAM2 op_8028_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8030_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8030_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -49495,7 +49495,7 @@ unsigned long REGPARAM2 op_8030_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8038_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8038_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -49515,7 +49515,7 @@ unsigned long REGPARAM2 op_8038_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8039_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8039_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -49535,7 +49535,7 @@ unsigned long REGPARAM2 op_8039_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_803a_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_803a_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -49557,7 +49557,7 @@ unsigned long REGPARAM2 op_803a_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_803b_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_803b_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -49580,7 +49580,7 @@ unsigned long REGPARAM2 op_803b_0_comp_nf(uae_u32 opcode) /* OR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_803c_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_803c_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -49598,7 +49598,7 @@ unsigned long REGPARAM2 op_803c_0_comp_nf(uae_u32 opcode) /* OR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8040_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8040_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -49616,7 +49616,7 @@ unsigned long REGPARAM2 op_8040_0_comp_nf(uae_u32 opcode) /* OR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8050_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8050_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -49638,7 +49638,7 @@ unsigned long REGPARAM2 op_8050_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8058_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8058_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -49660,7 +49660,7 @@ unsigned long REGPARAM2 op_8058_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8060_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8060_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -49683,7 +49683,7 @@ unsigned long REGPARAM2 op_8060_0_comp_nf(uae_u32 opcode) /* OR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8068_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8068_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -49705,7 +49705,7 @@ unsigned long REGPARAM2 op_8068_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8070_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8070_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -49726,7 +49726,7 @@ unsigned long REGPARAM2 op_8070_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8078_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8078_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -49746,7 +49746,7 @@ unsigned long REGPARAM2 op_8078_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8079_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8079_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -49766,7 +49766,7 @@ unsigned long REGPARAM2 op_8079_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_807a_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_807a_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -49788,7 +49788,7 @@ unsigned long REGPARAM2 op_807a_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_807b_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_807b_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -49811,7 +49811,7 @@ unsigned long REGPARAM2 op_807b_0_comp_nf(uae_u32 opcode) /* OR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_807c_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_807c_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -49829,7 +49829,7 @@ unsigned long REGPARAM2 op_807c_0_comp_nf(uae_u32 opcode) /* OR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8080_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8080_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -49847,7 +49847,7 @@ unsigned long REGPARAM2 op_8080_0_comp_nf(uae_u32 opcode) /* OR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8090_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8090_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -49869,7 +49869,7 @@ unsigned long REGPARAM2 op_8090_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8098_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8098_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -49891,7 +49891,7 @@ unsigned long REGPARAM2 op_8098_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_80a0_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_80a0_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -49914,7 +49914,7 @@ unsigned long REGPARAM2 op_80a0_0_comp_nf(uae_u32 opcode) /* OR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_80a8_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_80a8_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -49936,7 +49936,7 @@ unsigned long REGPARAM2 op_80a8_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_80b0_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_80b0_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -49957,7 +49957,7 @@ unsigned long REGPARAM2 op_80b0_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_80b8_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_80b8_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -49977,7 +49977,7 @@ unsigned long REGPARAM2 op_80b8_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_80b9_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_80b9_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -49997,7 +49997,7 @@ unsigned long REGPARAM2 op_80b9_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_80ba_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_80ba_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -50019,7 +50019,7 @@ unsigned long REGPARAM2 op_80ba_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_80bb_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_80bb_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -50042,7 +50042,7 @@ unsigned long REGPARAM2 op_80bb_0_comp_nf(uae_u32 opcode) /* OR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_80bc_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_80bc_0_comp_nf(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -50060,7 +50060,7 @@ unsigned long REGPARAM2 op_80bc_0_comp_nf(uae_u32 opcode) /* OR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8110_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8110_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -50081,7 +50081,7 @@ unsigned long REGPARAM2 op_8110_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8118_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8118_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -50102,7 +50102,7 @@ unsigned long REGPARAM2 op_8118_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8120_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8120_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -50124,7 +50124,7 @@ unsigned long REGPARAM2 op_8120_0_comp_nf(uae_u32 opcode) /* OR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8128_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8128_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -50145,7 +50145,7 @@ unsigned long REGPARAM2 op_8128_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8130_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8130_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -50165,7 +50165,7 @@ unsigned long REGPARAM2 op_8130_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8138_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8138_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -50184,7 +50184,7 @@ unsigned long REGPARAM2 op_8138_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8139_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8139_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -50203,7 +50203,7 @@ unsigned long REGPARAM2 op_8139_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8150_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8150_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -50224,7 +50224,7 @@ unsigned long REGPARAM2 op_8150_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8158_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8158_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -50245,7 +50245,7 @@ unsigned long REGPARAM2 op_8158_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8160_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8160_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -50267,7 +50267,7 @@ unsigned long REGPARAM2 op_8160_0_comp_nf(uae_u32 opcode) /* OR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8168_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8168_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -50288,7 +50288,7 @@ unsigned long REGPARAM2 op_8168_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8170_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8170_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -50308,7 +50308,7 @@ unsigned long REGPARAM2 op_8170_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8178_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8178_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -50327,7 +50327,7 @@ unsigned long REGPARAM2 op_8178_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8179_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8179_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -50346,7 +50346,7 @@ unsigned long REGPARAM2 op_8179_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8190_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8190_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -50367,7 +50367,7 @@ unsigned long REGPARAM2 op_8190_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_8198_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_8198_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -50388,7 +50388,7 @@ unsigned long REGPARAM2 op_8198_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_81a0_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_81a0_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -50410,7 +50410,7 @@ unsigned long REGPARAM2 op_81a0_0_comp_nf(uae_u32 opcode) /* OR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_81a8_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_81a8_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -50431,7 +50431,7 @@ unsigned long REGPARAM2 op_81a8_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_81b0_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_81b0_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -50451,7 +50451,7 @@ unsigned long REGPARAM2 op_81b0_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_81b8_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_81b8_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -50470,7 +50470,7 @@ unsigned long REGPARAM2 op_81b8_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_81b9_0_comp_nf(uae_u32 opcode) /* OR */ +uae_u32 REGPARAM2 op_81b9_0_comp_nf(uae_u32 opcode) /* OR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -50489,7 +50489,7 @@ unsigned long REGPARAM2 op_81b9_0_comp_nf(uae_u32 opcode) /* OR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9000_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9000_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -50507,7 +50507,7 @@ unsigned long REGPARAM2 op_9000_0_comp_nf(uae_u32 opcode) /* SUB */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9010_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9010_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -50529,7 +50529,7 @@ unsigned long REGPARAM2 op_9010_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9018_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9018_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -50551,7 +50551,7 @@ unsigned long REGPARAM2 op_9018_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9020_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9020_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -50574,7 +50574,7 @@ unsigned long REGPARAM2 op_9020_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9028_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9028_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -50596,7 +50596,7 @@ unsigned long REGPARAM2 op_9028_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9030_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9030_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -50617,7 +50617,7 @@ unsigned long REGPARAM2 op_9030_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9038_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9038_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -50637,7 +50637,7 @@ unsigned long REGPARAM2 op_9038_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9039_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9039_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -50657,7 +50657,7 @@ unsigned long REGPARAM2 op_9039_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_903a_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_903a_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -50679,7 +50679,7 @@ unsigned long REGPARAM2 op_903a_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_903b_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_903b_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -50702,7 +50702,7 @@ unsigned long REGPARAM2 op_903b_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_903c_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_903c_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -50720,7 +50720,7 @@ unsigned long REGPARAM2 op_903c_0_comp_nf(uae_u32 opcode) /* SUB */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9040_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9040_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -50738,7 +50738,7 @@ unsigned long REGPARAM2 op_9040_0_comp_nf(uae_u32 opcode) /* SUB */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9048_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9048_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -50758,7 +50758,7 @@ unsigned long REGPARAM2 op_9048_0_comp_nf(uae_u32 opcode) /* SUB */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9050_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9050_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -50780,7 +50780,7 @@ unsigned long REGPARAM2 op_9050_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9058_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9058_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -50802,7 +50802,7 @@ unsigned long REGPARAM2 op_9058_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9060_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9060_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -50825,7 +50825,7 @@ unsigned long REGPARAM2 op_9060_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9068_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9068_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -50847,7 +50847,7 @@ unsigned long REGPARAM2 op_9068_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9070_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9070_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -50868,7 +50868,7 @@ unsigned long REGPARAM2 op_9070_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9078_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9078_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -50888,7 +50888,7 @@ unsigned long REGPARAM2 op_9078_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9079_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9079_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -50908,7 +50908,7 @@ unsigned long REGPARAM2 op_9079_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_907a_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_907a_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -50930,7 +50930,7 @@ unsigned long REGPARAM2 op_907a_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_907b_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_907b_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -50953,7 +50953,7 @@ unsigned long REGPARAM2 op_907b_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_907c_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_907c_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -50971,7 +50971,7 @@ unsigned long REGPARAM2 op_907c_0_comp_nf(uae_u32 opcode) /* SUB */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9080_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9080_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -50989,7 +50989,7 @@ unsigned long REGPARAM2 op_9080_0_comp_nf(uae_u32 opcode) /* SUB */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9088_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9088_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -51009,7 +51009,7 @@ unsigned long REGPARAM2 op_9088_0_comp_nf(uae_u32 opcode) /* SUB */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9090_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9090_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -51031,7 +51031,7 @@ unsigned long REGPARAM2 op_9090_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9098_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9098_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -51053,7 +51053,7 @@ unsigned long REGPARAM2 op_9098_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90a0_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_90a0_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -51076,7 +51076,7 @@ unsigned long REGPARAM2 op_90a0_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90a8_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_90a8_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -51098,7 +51098,7 @@ unsigned long REGPARAM2 op_90a8_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90b0_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_90b0_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -51119,7 +51119,7 @@ unsigned long REGPARAM2 op_90b0_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90b8_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_90b8_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -51139,7 +51139,7 @@ unsigned long REGPARAM2 op_90b8_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90b9_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_90b9_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -51159,7 +51159,7 @@ unsigned long REGPARAM2 op_90b9_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90ba_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_90ba_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -51181,7 +51181,7 @@ unsigned long REGPARAM2 op_90ba_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90bb_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_90bb_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -51204,7 +51204,7 @@ unsigned long REGPARAM2 op_90bb_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90bc_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_90bc_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -51222,7 +51222,7 @@ unsigned long REGPARAM2 op_90bc_0_comp_nf(uae_u32 opcode) /* SUB */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90c0_0_comp_nf(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_90c0_0_comp_nf(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -51240,7 +51240,7 @@ unsigned long REGPARAM2 op_90c0_0_comp_nf(uae_u32 opcode) /* SUBA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90c8_0_comp_nf(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_90c8_0_comp_nf(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -51260,7 +51260,7 @@ unsigned long REGPARAM2 op_90c8_0_comp_nf(uae_u32 opcode) /* SUBA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90d0_0_comp_nf(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_90d0_0_comp_nf(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -51282,7 +51282,7 @@ unsigned long REGPARAM2 op_90d0_0_comp_nf(uae_u32 opcode) /* SUBA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90d8_0_comp_nf(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_90d8_0_comp_nf(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -51304,7 +51304,7 @@ unsigned long REGPARAM2 op_90d8_0_comp_nf(uae_u32 opcode) /* SUBA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90e0_0_comp_nf(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_90e0_0_comp_nf(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -51327,7 +51327,7 @@ unsigned long REGPARAM2 op_90e0_0_comp_nf(uae_u32 opcode) /* SUBA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90e8_0_comp_nf(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_90e8_0_comp_nf(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -51349,7 +51349,7 @@ unsigned long REGPARAM2 op_90e8_0_comp_nf(uae_u32 opcode) /* SUBA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90f0_0_comp_nf(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_90f0_0_comp_nf(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -51370,7 +51370,7 @@ unsigned long REGPARAM2 op_90f0_0_comp_nf(uae_u32 opcode) /* SUBA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90f8_0_comp_nf(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_90f8_0_comp_nf(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -51390,7 +51390,7 @@ unsigned long REGPARAM2 op_90f8_0_comp_nf(uae_u32 opcode) /* SUBA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90f9_0_comp_nf(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_90f9_0_comp_nf(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -51410,7 +51410,7 @@ unsigned long REGPARAM2 op_90f9_0_comp_nf(uae_u32 opcode) /* SUBA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90fa_0_comp_nf(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_90fa_0_comp_nf(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -51432,7 +51432,7 @@ unsigned long REGPARAM2 op_90fa_0_comp_nf(uae_u32 opcode) /* SUBA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90fb_0_comp_nf(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_90fb_0_comp_nf(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -51455,7 +51455,7 @@ unsigned long REGPARAM2 op_90fb_0_comp_nf(uae_u32 opcode) /* SUBA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_90fc_0_comp_nf(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_90fc_0_comp_nf(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -51473,7 +51473,7 @@ unsigned long REGPARAM2 op_90fc_0_comp_nf(uae_u32 opcode) /* SUBA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9100_0_comp_nf(uae_u32 opcode) /* SUBX */ +uae_u32 REGPARAM2 op_9100_0_comp_nf(uae_u32 opcode) /* SUBX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -51491,7 +51491,7 @@ unsigned long REGPARAM2 op_9100_0_comp_nf(uae_u32 opcode) /* SUBX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9108_0_comp_nf(uae_u32 opcode) /* SUBX */ +uae_u32 REGPARAM2 op_9108_0_comp_nf(uae_u32 opcode) /* SUBX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -51518,7 +51518,7 @@ unsigned long REGPARAM2 op_9108_0_comp_nf(uae_u32 opcode) /* SUBX */ }}}}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9110_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9110_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -51539,7 +51539,7 @@ unsigned long REGPARAM2 op_9110_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9118_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9118_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -51560,7 +51560,7 @@ unsigned long REGPARAM2 op_9118_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9120_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9120_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -51582,7 +51582,7 @@ unsigned long REGPARAM2 op_9120_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9128_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9128_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -51603,7 +51603,7 @@ unsigned long REGPARAM2 op_9128_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9130_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9130_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -51623,7 +51623,7 @@ unsigned long REGPARAM2 op_9130_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9138_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9138_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -51642,7 +51642,7 @@ unsigned long REGPARAM2 op_9138_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9139_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9139_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -51661,7 +51661,7 @@ unsigned long REGPARAM2 op_9139_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9140_0_comp_nf(uae_u32 opcode) /* SUBX */ +uae_u32 REGPARAM2 op_9140_0_comp_nf(uae_u32 opcode) /* SUBX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -51679,7 +51679,7 @@ unsigned long REGPARAM2 op_9140_0_comp_nf(uae_u32 opcode) /* SUBX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9148_0_comp_nf(uae_u32 opcode) /* SUBX */ +uae_u32 REGPARAM2 op_9148_0_comp_nf(uae_u32 opcode) /* SUBX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -51706,7 +51706,7 @@ unsigned long REGPARAM2 op_9148_0_comp_nf(uae_u32 opcode) /* SUBX */ }}}}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9150_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9150_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -51727,7 +51727,7 @@ unsigned long REGPARAM2 op_9150_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9158_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9158_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -51748,7 +51748,7 @@ unsigned long REGPARAM2 op_9158_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9160_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9160_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -51770,7 +51770,7 @@ unsigned long REGPARAM2 op_9160_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9168_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9168_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -51791,7 +51791,7 @@ unsigned long REGPARAM2 op_9168_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9170_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9170_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -51811,7 +51811,7 @@ unsigned long REGPARAM2 op_9170_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9178_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9178_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -51830,7 +51830,7 @@ unsigned long REGPARAM2 op_9178_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9179_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9179_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -51849,7 +51849,7 @@ unsigned long REGPARAM2 op_9179_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9180_0_comp_nf(uae_u32 opcode) /* SUBX */ +uae_u32 REGPARAM2 op_9180_0_comp_nf(uae_u32 opcode) /* SUBX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -51867,7 +51867,7 @@ unsigned long REGPARAM2 op_9180_0_comp_nf(uae_u32 opcode) /* SUBX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9188_0_comp_nf(uae_u32 opcode) /* SUBX */ +uae_u32 REGPARAM2 op_9188_0_comp_nf(uae_u32 opcode) /* SUBX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -51894,7 +51894,7 @@ unsigned long REGPARAM2 op_9188_0_comp_nf(uae_u32 opcode) /* SUBX */ }}}}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9190_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9190_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -51915,7 +51915,7 @@ unsigned long REGPARAM2 op_9190_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_9198_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_9198_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -51936,7 +51936,7 @@ unsigned long REGPARAM2 op_9198_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91a0_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_91a0_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -51958,7 +51958,7 @@ unsigned long REGPARAM2 op_91a0_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91a8_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_91a8_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -51979,7 +51979,7 @@ unsigned long REGPARAM2 op_91a8_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91b0_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_91b0_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -51999,7 +51999,7 @@ unsigned long REGPARAM2 op_91b0_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91b8_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_91b8_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -52018,7 +52018,7 @@ unsigned long REGPARAM2 op_91b8_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91b9_0_comp_nf(uae_u32 opcode) /* SUB */ +uae_u32 REGPARAM2 op_91b9_0_comp_nf(uae_u32 opcode) /* SUB */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -52037,7 +52037,7 @@ unsigned long REGPARAM2 op_91b9_0_comp_nf(uae_u32 opcode) /* SUB */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91c0_0_comp_nf(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_91c0_0_comp_nf(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -52055,7 +52055,7 @@ unsigned long REGPARAM2 op_91c0_0_comp_nf(uae_u32 opcode) /* SUBA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91c8_0_comp_nf(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_91c8_0_comp_nf(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -52075,7 +52075,7 @@ unsigned long REGPARAM2 op_91c8_0_comp_nf(uae_u32 opcode) /* SUBA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91d0_0_comp_nf(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_91d0_0_comp_nf(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -52097,7 +52097,7 @@ unsigned long REGPARAM2 op_91d0_0_comp_nf(uae_u32 opcode) /* SUBA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91d8_0_comp_nf(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_91d8_0_comp_nf(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -52119,7 +52119,7 @@ unsigned long REGPARAM2 op_91d8_0_comp_nf(uae_u32 opcode) /* SUBA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91e0_0_comp_nf(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_91e0_0_comp_nf(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -52142,7 +52142,7 @@ unsigned long REGPARAM2 op_91e0_0_comp_nf(uae_u32 opcode) /* SUBA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91e8_0_comp_nf(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_91e8_0_comp_nf(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -52164,7 +52164,7 @@ unsigned long REGPARAM2 op_91e8_0_comp_nf(uae_u32 opcode) /* SUBA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91f0_0_comp_nf(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_91f0_0_comp_nf(uae_u32 opcode) /* SUBA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -52185,7 +52185,7 @@ unsigned long REGPARAM2 op_91f0_0_comp_nf(uae_u32 opcode) /* SUBA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91f8_0_comp_nf(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_91f8_0_comp_nf(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -52205,7 +52205,7 @@ unsigned long REGPARAM2 op_91f8_0_comp_nf(uae_u32 opcode) /* SUBA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91f9_0_comp_nf(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_91f9_0_comp_nf(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -52225,7 +52225,7 @@ unsigned long REGPARAM2 op_91f9_0_comp_nf(uae_u32 opcode) /* SUBA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91fa_0_comp_nf(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_91fa_0_comp_nf(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -52247,7 +52247,7 @@ unsigned long REGPARAM2 op_91fa_0_comp_nf(uae_u32 opcode) /* SUBA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91fb_0_comp_nf(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_91fb_0_comp_nf(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -52270,7 +52270,7 @@ unsigned long REGPARAM2 op_91fb_0_comp_nf(uae_u32 opcode) /* SUBA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_91fc_0_comp_nf(uae_u32 opcode) /* SUBA */ +uae_u32 REGPARAM2 op_91fc_0_comp_nf(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -52288,7 +52288,7 @@ unsigned long REGPARAM2 op_91fc_0_comp_nf(uae_u32 opcode) /* SUBA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b000_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b000_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -52303,7 +52303,7 @@ unsigned long REGPARAM2 op_b000_0_comp_nf(uae_u32 opcode) /* CMP */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b010_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b010_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -52322,7 +52322,7 @@ unsigned long REGPARAM2 op_b010_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b018_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b018_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -52341,7 +52341,7 @@ unsigned long REGPARAM2 op_b018_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b020_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b020_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -52361,7 +52361,7 @@ unsigned long REGPARAM2 op_b020_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b028_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b028_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -52380,7 +52380,7 @@ unsigned long REGPARAM2 op_b028_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b030_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b030_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -52398,7 +52398,7 @@ unsigned long REGPARAM2 op_b030_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b038_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b038_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -52415,7 +52415,7 @@ unsigned long REGPARAM2 op_b038_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b039_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b039_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -52432,7 +52432,7 @@ unsigned long REGPARAM2 op_b039_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b03a_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b03a_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -52451,7 +52451,7 @@ unsigned long REGPARAM2 op_b03a_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b03b_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b03b_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -52471,7 +52471,7 @@ unsigned long REGPARAM2 op_b03b_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b03c_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b03c_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -52486,7 +52486,7 @@ unsigned long REGPARAM2 op_b03c_0_comp_nf(uae_u32 opcode) /* CMP */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b040_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b040_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -52501,7 +52501,7 @@ unsigned long REGPARAM2 op_b040_0_comp_nf(uae_u32 opcode) /* CMP */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b048_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b048_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -52518,7 +52518,7 @@ unsigned long REGPARAM2 op_b048_0_comp_nf(uae_u32 opcode) /* CMP */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b050_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b050_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -52537,7 +52537,7 @@ unsigned long REGPARAM2 op_b050_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b058_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b058_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -52556,7 +52556,7 @@ unsigned long REGPARAM2 op_b058_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b060_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b060_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -52576,7 +52576,7 @@ unsigned long REGPARAM2 op_b060_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b068_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b068_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -52595,7 +52595,7 @@ unsigned long REGPARAM2 op_b068_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b070_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b070_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -52613,7 +52613,7 @@ unsigned long REGPARAM2 op_b070_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b078_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b078_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -52630,7 +52630,7 @@ unsigned long REGPARAM2 op_b078_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b079_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b079_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -52647,7 +52647,7 @@ unsigned long REGPARAM2 op_b079_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b07a_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b07a_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -52666,7 +52666,7 @@ unsigned long REGPARAM2 op_b07a_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b07b_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b07b_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -52686,7 +52686,7 @@ unsigned long REGPARAM2 op_b07b_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b07c_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b07c_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -52701,7 +52701,7 @@ unsigned long REGPARAM2 op_b07c_0_comp_nf(uae_u32 opcode) /* CMP */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b080_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b080_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -52716,7 +52716,7 @@ unsigned long REGPARAM2 op_b080_0_comp_nf(uae_u32 opcode) /* CMP */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b088_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b088_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -52733,68 +52733,68 @@ unsigned long REGPARAM2 op_b088_0_comp_nf(uae_u32 opcode) /* CMP */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } +uae_u32 REGPARAM2 op_b090_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=dodgy?scratchie++:srcreg+8; + if (dodgy) + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); +return 0; +} +uae_u32 REGPARAM2 op_b098_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{ int srca=scratchie++; + mov_l_rr(srca,srcreg+8); +{ int src=scratchie++; + readlong(srca,src,scratchie); + arm_ADD_l_ri8(srcreg+8,4); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); +return 0; +} +uae_u32 REGPARAM2 op_b0a0_0_comp_nf(uae_u32 opcode) /* CMP */ +{ + uae_s32 srcreg = (opcode & 7); + uae_u32 dstreg = (opcode >> 9) & 7; + uae_u32 dodgy=0; + uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; + m68k_pc_offset+=2; +{ uae_u8 scratchie=S1; +{{ int srca=dodgy?scratchie++:srcreg+8; + arm_SUB_l_ri8(srcreg+8,4); + if (dodgy) + mov_l_rr(srca,8+srcreg); +{ int src=scratchie++; + readlong(srca,src,scratchie); +{ int dst=dstreg; +{ dont_care_flags(); +/* Weird --- CMP with noflags ;-) */ +}}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); +return 0; +} #endif #ifdef PART_7 -unsigned long REGPARAM2 op_b090_0_comp_nf(uae_u32 opcode) /* CMP */ -{ - uae_s32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; - uae_u32 dodgy=0; - uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; - m68k_pc_offset+=2; -{ uae_u8 scratchie=S1; -{ int srca=dodgy?scratchie++:srcreg+8; - if (dodgy) - mov_l_rr(srca,srcreg+8); -{ int src=scratchie++; - readlong(srca,src,scratchie); -{ int dst=dstreg; -{ dont_care_flags(); -/* Weird --- CMP with noflags ;-) */ -}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); -return 0; -} -unsigned long REGPARAM2 op_b098_0_comp_nf(uae_u32 opcode) /* CMP */ -{ - uae_s32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; - uae_u32 dodgy=0; - uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; - m68k_pc_offset+=2; -{ uae_u8 scratchie=S1; -{ int srca=scratchie++; - mov_l_rr(srca,srcreg+8); -{ int src=scratchie++; - readlong(srca,src,scratchie); - arm_ADD_l_ri8(srcreg+8,4); -{ int dst=dstreg; -{ dont_care_flags(); -/* Weird --- CMP with noflags ;-) */ -}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); -return 0; -} -unsigned long REGPARAM2 op_b0a0_0_comp_nf(uae_u32 opcode) /* CMP */ -{ - uae_s32 srcreg = (opcode & 7); - uae_u32 dstreg = (opcode >> 9) & 7; - uae_u32 dodgy=0; - uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; - m68k_pc_offset+=2; -{ uae_u8 scratchie=S1; -{{ int srca=dodgy?scratchie++:srcreg+8; - arm_SUB_l_ri8(srcreg+8,4); - if (dodgy) - mov_l_rr(srca,8+srcreg); -{ int src=scratchie++; - readlong(srca,src,scratchie); -{ int dst=dstreg; -{ dont_care_flags(); -/* Weird --- CMP with noflags ;-) */ -}}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); -return 0; -} -unsigned long REGPARAM2 op_b0a8_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b0a8_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -52813,7 +52813,7 @@ unsigned long REGPARAM2 op_b0a8_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0b0_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b0b0_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -52831,7 +52831,7 @@ unsigned long REGPARAM2 op_b0b0_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0b8_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b0b8_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -52848,7 +52848,7 @@ unsigned long REGPARAM2 op_b0b8_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0b9_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b0b9_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -52865,7 +52865,7 @@ unsigned long REGPARAM2 op_b0b9_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0ba_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b0ba_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -52884,7 +52884,7 @@ unsigned long REGPARAM2 op_b0ba_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0bb_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b0bb_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -52904,7 +52904,7 @@ unsigned long REGPARAM2 op_b0bb_0_comp_nf(uae_u32 opcode) /* CMP */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0bc_0_comp_nf(uae_u32 opcode) /* CMP */ +uae_u32 REGPARAM2 op_b0bc_0_comp_nf(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -52919,7 +52919,7 @@ unsigned long REGPARAM2 op_b0bc_0_comp_nf(uae_u32 opcode) /* CMP */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0c0_0_comp_nf(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b0c0_0_comp_nf(uae_u32 opcode) /* CMPA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -52936,7 +52936,7 @@ unsigned long REGPARAM2 op_b0c0_0_comp_nf(uae_u32 opcode) /* CMPA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0c8_0_comp_nf(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b0c8_0_comp_nf(uae_u32 opcode) /* CMPA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -52955,7 +52955,7 @@ unsigned long REGPARAM2 op_b0c8_0_comp_nf(uae_u32 opcode) /* CMPA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0d0_0_comp_nf(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b0d0_0_comp_nf(uae_u32 opcode) /* CMPA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -52976,7 +52976,7 @@ unsigned long REGPARAM2 op_b0d0_0_comp_nf(uae_u32 opcode) /* CMPA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0d8_0_comp_nf(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b0d8_0_comp_nf(uae_u32 opcode) /* CMPA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -52997,7 +52997,7 @@ unsigned long REGPARAM2 op_b0d8_0_comp_nf(uae_u32 opcode) /* CMPA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0e0_0_comp_nf(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b0e0_0_comp_nf(uae_u32 opcode) /* CMPA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -53019,7 +53019,7 @@ unsigned long REGPARAM2 op_b0e0_0_comp_nf(uae_u32 opcode) /* CMPA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0e8_0_comp_nf(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b0e8_0_comp_nf(uae_u32 opcode) /* CMPA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -53040,7 +53040,7 @@ unsigned long REGPARAM2 op_b0e8_0_comp_nf(uae_u32 opcode) /* CMPA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0f0_0_comp_nf(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b0f0_0_comp_nf(uae_u32 opcode) /* CMPA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -53060,7 +53060,7 @@ unsigned long REGPARAM2 op_b0f0_0_comp_nf(uae_u32 opcode) /* CMPA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0f8_0_comp_nf(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b0f8_0_comp_nf(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -53079,7 +53079,7 @@ unsigned long REGPARAM2 op_b0f8_0_comp_nf(uae_u32 opcode) /* CMPA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0f9_0_comp_nf(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b0f9_0_comp_nf(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -53098,7 +53098,7 @@ unsigned long REGPARAM2 op_b0f9_0_comp_nf(uae_u32 opcode) /* CMPA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0fa_0_comp_nf(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b0fa_0_comp_nf(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -53119,7 +53119,7 @@ unsigned long REGPARAM2 op_b0fa_0_comp_nf(uae_u32 opcode) /* CMPA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0fb_0_comp_nf(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b0fb_0_comp_nf(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -53141,7 +53141,7 @@ unsigned long REGPARAM2 op_b0fb_0_comp_nf(uae_u32 opcode) /* CMPA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b0fc_0_comp_nf(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b0fc_0_comp_nf(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -53158,7 +53158,7 @@ unsigned long REGPARAM2 op_b0fc_0_comp_nf(uae_u32 opcode) /* CMPA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b100_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b100_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -53176,7 +53176,7 @@ unsigned long REGPARAM2 op_b100_0_comp_nf(uae_u32 opcode) /* EOR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b108_0_comp_nf(uae_u32 opcode) /* CMPM */ +uae_u32 REGPARAM2 op_b108_0_comp_nf(uae_u32 opcode) /* CMPM */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -53199,7 +53199,7 @@ unsigned long REGPARAM2 op_b108_0_comp_nf(uae_u32 opcode) /* CMPM */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b110_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b110_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -53220,7 +53220,7 @@ unsigned long REGPARAM2 op_b110_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b118_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b118_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -53241,7 +53241,7 @@ unsigned long REGPARAM2 op_b118_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b120_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b120_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -53263,7 +53263,7 @@ unsigned long REGPARAM2 op_b120_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b128_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b128_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -53284,7 +53284,7 @@ unsigned long REGPARAM2 op_b128_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b130_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b130_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -53304,7 +53304,7 @@ unsigned long REGPARAM2 op_b130_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b138_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b138_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -53323,7 +53323,7 @@ unsigned long REGPARAM2 op_b138_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b139_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b139_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -53342,7 +53342,7 @@ unsigned long REGPARAM2 op_b139_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b140_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b140_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -53360,7 +53360,7 @@ unsigned long REGPARAM2 op_b140_0_comp_nf(uae_u32 opcode) /* EOR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b148_0_comp_nf(uae_u32 opcode) /* CMPM */ +uae_u32 REGPARAM2 op_b148_0_comp_nf(uae_u32 opcode) /* CMPM */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -53383,7 +53383,7 @@ unsigned long REGPARAM2 op_b148_0_comp_nf(uae_u32 opcode) /* CMPM */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b150_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b150_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -53404,7 +53404,7 @@ unsigned long REGPARAM2 op_b150_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b158_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b158_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -53425,7 +53425,7 @@ unsigned long REGPARAM2 op_b158_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b160_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b160_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -53447,7 +53447,7 @@ unsigned long REGPARAM2 op_b160_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b168_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b168_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -53468,7 +53468,7 @@ unsigned long REGPARAM2 op_b168_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b170_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b170_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -53488,7 +53488,7 @@ unsigned long REGPARAM2 op_b170_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b178_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b178_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -53507,7 +53507,7 @@ unsigned long REGPARAM2 op_b178_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b179_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b179_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -53526,7 +53526,7 @@ unsigned long REGPARAM2 op_b179_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b180_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b180_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -53544,7 +53544,7 @@ unsigned long REGPARAM2 op_b180_0_comp_nf(uae_u32 opcode) /* EOR */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b188_0_comp_nf(uae_u32 opcode) /* CMPM */ +uae_u32 REGPARAM2 op_b188_0_comp_nf(uae_u32 opcode) /* CMPM */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -53567,7 +53567,7 @@ unsigned long REGPARAM2 op_b188_0_comp_nf(uae_u32 opcode) /* CMPM */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b190_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b190_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -53588,7 +53588,7 @@ unsigned long REGPARAM2 op_b190_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b198_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b198_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -53609,7 +53609,7 @@ unsigned long REGPARAM2 op_b198_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1a0_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b1a0_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -53631,7 +53631,7 @@ unsigned long REGPARAM2 op_b1a0_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1a8_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b1a8_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -53652,7 +53652,7 @@ unsigned long REGPARAM2 op_b1a8_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1b0_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b1b0_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -53672,7 +53672,7 @@ unsigned long REGPARAM2 op_b1b0_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1b8_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b1b8_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -53691,7 +53691,7 @@ unsigned long REGPARAM2 op_b1b8_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1b9_0_comp_nf(uae_u32 opcode) /* EOR */ +uae_u32 REGPARAM2 op_b1b9_0_comp_nf(uae_u32 opcode) /* EOR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -53710,7 +53710,7 @@ unsigned long REGPARAM2 op_b1b9_0_comp_nf(uae_u32 opcode) /* EOR */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1c0_0_comp_nf(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b1c0_0_comp_nf(uae_u32 opcode) /* CMPA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -53727,7 +53727,7 @@ unsigned long REGPARAM2 op_b1c0_0_comp_nf(uae_u32 opcode) /* CMPA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1c8_0_comp_nf(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b1c8_0_comp_nf(uae_u32 opcode) /* CMPA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -53746,7 +53746,7 @@ unsigned long REGPARAM2 op_b1c8_0_comp_nf(uae_u32 opcode) /* CMPA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1d0_0_comp_nf(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b1d0_0_comp_nf(uae_u32 opcode) /* CMPA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -53767,7 +53767,7 @@ unsigned long REGPARAM2 op_b1d0_0_comp_nf(uae_u32 opcode) /* CMPA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1d8_0_comp_nf(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b1d8_0_comp_nf(uae_u32 opcode) /* CMPA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -53788,7 +53788,7 @@ unsigned long REGPARAM2 op_b1d8_0_comp_nf(uae_u32 opcode) /* CMPA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1e0_0_comp_nf(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b1e0_0_comp_nf(uae_u32 opcode) /* CMPA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -53810,7 +53810,7 @@ unsigned long REGPARAM2 op_b1e0_0_comp_nf(uae_u32 opcode) /* CMPA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1e8_0_comp_nf(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b1e8_0_comp_nf(uae_u32 opcode) /* CMPA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -53831,7 +53831,7 @@ unsigned long REGPARAM2 op_b1e8_0_comp_nf(uae_u32 opcode) /* CMPA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1f0_0_comp_nf(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b1f0_0_comp_nf(uae_u32 opcode) /* CMPA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -53851,7 +53851,7 @@ unsigned long REGPARAM2 op_b1f0_0_comp_nf(uae_u32 opcode) /* CMPA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1f8_0_comp_nf(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b1f8_0_comp_nf(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -53870,7 +53870,7 @@ unsigned long REGPARAM2 op_b1f8_0_comp_nf(uae_u32 opcode) /* CMPA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1f9_0_comp_nf(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b1f9_0_comp_nf(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -53889,7 +53889,7 @@ unsigned long REGPARAM2 op_b1f9_0_comp_nf(uae_u32 opcode) /* CMPA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1fa_0_comp_nf(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b1fa_0_comp_nf(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -53910,7 +53910,7 @@ unsigned long REGPARAM2 op_b1fa_0_comp_nf(uae_u32 opcode) /* CMPA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1fb_0_comp_nf(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b1fb_0_comp_nf(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -53932,7 +53932,7 @@ unsigned long REGPARAM2 op_b1fb_0_comp_nf(uae_u32 opcode) /* CMPA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_b1fc_0_comp_nf(uae_u32 opcode) /* CMPA */ +uae_u32 REGPARAM2 op_b1fc_0_comp_nf(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -53949,7 +53949,7 @@ unsigned long REGPARAM2 op_b1fc_0_comp_nf(uae_u32 opcode) /* CMPA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c000_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c000_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -53967,7 +53967,7 @@ unsigned long REGPARAM2 op_c000_0_comp_nf(uae_u32 opcode) /* AND */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c010_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c010_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -53989,7 +53989,7 @@ unsigned long REGPARAM2 op_c010_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c018_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c018_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -54011,7 +54011,7 @@ unsigned long REGPARAM2 op_c018_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c020_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c020_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -54034,7 +54034,7 @@ unsigned long REGPARAM2 op_c020_0_comp_nf(uae_u32 opcode) /* AND */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c028_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c028_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -54056,7 +54056,7 @@ unsigned long REGPARAM2 op_c028_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c030_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c030_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -54077,7 +54077,7 @@ unsigned long REGPARAM2 op_c030_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c038_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c038_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -54097,7 +54097,7 @@ unsigned long REGPARAM2 op_c038_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c039_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c039_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -54117,7 +54117,7 @@ unsigned long REGPARAM2 op_c039_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c03a_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c03a_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -54139,7 +54139,7 @@ unsigned long REGPARAM2 op_c03a_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c03b_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c03b_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -54162,7 +54162,7 @@ unsigned long REGPARAM2 op_c03b_0_comp_nf(uae_u32 opcode) /* AND */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c03c_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c03c_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -54180,7 +54180,7 @@ unsigned long REGPARAM2 op_c03c_0_comp_nf(uae_u32 opcode) /* AND */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c040_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c040_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -54198,7 +54198,7 @@ unsigned long REGPARAM2 op_c040_0_comp_nf(uae_u32 opcode) /* AND */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c050_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c050_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -54220,7 +54220,7 @@ unsigned long REGPARAM2 op_c050_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c058_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c058_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -54242,7 +54242,7 @@ unsigned long REGPARAM2 op_c058_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c060_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c060_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -54265,7 +54265,7 @@ unsigned long REGPARAM2 op_c060_0_comp_nf(uae_u32 opcode) /* AND */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c068_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c068_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -54287,7 +54287,7 @@ unsigned long REGPARAM2 op_c068_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c070_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c070_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -54308,7 +54308,7 @@ unsigned long REGPARAM2 op_c070_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c078_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c078_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -54328,7 +54328,7 @@ unsigned long REGPARAM2 op_c078_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c079_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c079_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -54348,7 +54348,7 @@ unsigned long REGPARAM2 op_c079_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c07a_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c07a_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -54370,7 +54370,7 @@ unsigned long REGPARAM2 op_c07a_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c07b_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c07b_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -54393,7 +54393,7 @@ unsigned long REGPARAM2 op_c07b_0_comp_nf(uae_u32 opcode) /* AND */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c07c_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c07c_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -54411,7 +54411,7 @@ unsigned long REGPARAM2 op_c07c_0_comp_nf(uae_u32 opcode) /* AND */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c080_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c080_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -54429,7 +54429,7 @@ unsigned long REGPARAM2 op_c080_0_comp_nf(uae_u32 opcode) /* AND */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c090_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c090_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -54451,7 +54451,7 @@ unsigned long REGPARAM2 op_c090_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c098_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c098_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -54473,7 +54473,7 @@ unsigned long REGPARAM2 op_c098_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0a0_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c0a0_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -54496,7 +54496,7 @@ unsigned long REGPARAM2 op_c0a0_0_comp_nf(uae_u32 opcode) /* AND */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0a8_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c0a8_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -54518,7 +54518,7 @@ unsigned long REGPARAM2 op_c0a8_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0b0_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c0b0_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -54539,7 +54539,7 @@ unsigned long REGPARAM2 op_c0b0_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0b8_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c0b8_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -54559,7 +54559,7 @@ unsigned long REGPARAM2 op_c0b8_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0b9_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c0b9_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -54579,7 +54579,7 @@ unsigned long REGPARAM2 op_c0b9_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0ba_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c0ba_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -54601,7 +54601,7 @@ unsigned long REGPARAM2 op_c0ba_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0bb_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c0bb_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -54624,7 +54624,7 @@ unsigned long REGPARAM2 op_c0bb_0_comp_nf(uae_u32 opcode) /* AND */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0bc_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c0bc_0_comp_nf(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -54642,7 +54642,7 @@ unsigned long REGPARAM2 op_c0bc_0_comp_nf(uae_u32 opcode) /* AND */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0c0_0_comp_nf(uae_u32 opcode) /* MULU */ +uae_u32 REGPARAM2 op_c0c0_0_comp_nf(uae_u32 opcode) /* MULU */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -54659,7 +54659,7 @@ unsigned long REGPARAM2 op_c0c0_0_comp_nf(uae_u32 opcode) /* MULU */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0d0_0_comp_nf(uae_u32 opcode) /* MULU */ +uae_u32 REGPARAM2 op_c0d0_0_comp_nf(uae_u32 opcode) /* MULU */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -54680,7 +54680,7 @@ unsigned long REGPARAM2 op_c0d0_0_comp_nf(uae_u32 opcode) /* MULU */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0d8_0_comp_nf(uae_u32 opcode) /* MULU */ +uae_u32 REGPARAM2 op_c0d8_0_comp_nf(uae_u32 opcode) /* MULU */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -54701,7 +54701,7 @@ unsigned long REGPARAM2 op_c0d8_0_comp_nf(uae_u32 opcode) /* MULU */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0e0_0_comp_nf(uae_u32 opcode) /* MULU */ +uae_u32 REGPARAM2 op_c0e0_0_comp_nf(uae_u32 opcode) /* MULU */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -54723,7 +54723,7 @@ unsigned long REGPARAM2 op_c0e0_0_comp_nf(uae_u32 opcode) /* MULU */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0e8_0_comp_nf(uae_u32 opcode) /* MULU */ +uae_u32 REGPARAM2 op_c0e8_0_comp_nf(uae_u32 opcode) /* MULU */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -54744,7 +54744,7 @@ unsigned long REGPARAM2 op_c0e8_0_comp_nf(uae_u32 opcode) /* MULU */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0f0_0_comp_nf(uae_u32 opcode) /* MULU */ +uae_u32 REGPARAM2 op_c0f0_0_comp_nf(uae_u32 opcode) /* MULU */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -54764,7 +54764,7 @@ unsigned long REGPARAM2 op_c0f0_0_comp_nf(uae_u32 opcode) /* MULU */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0f8_0_comp_nf(uae_u32 opcode) /* MULU */ +uae_u32 REGPARAM2 op_c0f8_0_comp_nf(uae_u32 opcode) /* MULU */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -54783,7 +54783,7 @@ unsigned long REGPARAM2 op_c0f8_0_comp_nf(uae_u32 opcode) /* MULU */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0f9_0_comp_nf(uae_u32 opcode) /* MULU */ +uae_u32 REGPARAM2 op_c0f9_0_comp_nf(uae_u32 opcode) /* MULU */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -54802,7 +54802,7 @@ unsigned long REGPARAM2 op_c0f9_0_comp_nf(uae_u32 opcode) /* MULU */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0fa_0_comp_nf(uae_u32 opcode) /* MULU */ +uae_u32 REGPARAM2 op_c0fa_0_comp_nf(uae_u32 opcode) /* MULU */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -54823,7 +54823,7 @@ unsigned long REGPARAM2 op_c0fa_0_comp_nf(uae_u32 opcode) /* MULU */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0fb_0_comp_nf(uae_u32 opcode) /* MULU */ +uae_u32 REGPARAM2 op_c0fb_0_comp_nf(uae_u32 opcode) /* MULU */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -54845,7 +54845,7 @@ unsigned long REGPARAM2 op_c0fb_0_comp_nf(uae_u32 opcode) /* MULU */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c0fc_0_comp_nf(uae_u32 opcode) /* MULU */ +uae_u32 REGPARAM2 op_c0fc_0_comp_nf(uae_u32 opcode) /* MULU */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -54862,7 +54862,7 @@ unsigned long REGPARAM2 op_c0fc_0_comp_nf(uae_u32 opcode) /* MULU */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c110_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c110_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -54883,7 +54883,7 @@ unsigned long REGPARAM2 op_c110_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c118_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c118_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -54904,7 +54904,7 @@ unsigned long REGPARAM2 op_c118_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c120_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c120_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -54926,7 +54926,7 @@ unsigned long REGPARAM2 op_c120_0_comp_nf(uae_u32 opcode) /* AND */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c128_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c128_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -54947,7 +54947,7 @@ unsigned long REGPARAM2 op_c128_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c130_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c130_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -54967,7 +54967,7 @@ unsigned long REGPARAM2 op_c130_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c138_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c138_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -54986,7 +54986,7 @@ unsigned long REGPARAM2 op_c138_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c139_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c139_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -55005,7 +55005,7 @@ unsigned long REGPARAM2 op_c139_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c140_0_comp_nf(uae_u32 opcode) /* EXG */ +uae_u32 REGPARAM2 op_c140_0_comp_nf(uae_u32 opcode) /* EXG */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -55024,7 +55024,7 @@ unsigned long REGPARAM2 op_c140_0_comp_nf(uae_u32 opcode) /* EXG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c148_0_comp_nf(uae_u32 opcode) /* EXG */ +uae_u32 REGPARAM2 op_c148_0_comp_nf(uae_u32 opcode) /* EXG */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -55047,7 +55047,7 @@ unsigned long REGPARAM2 op_c148_0_comp_nf(uae_u32 opcode) /* EXG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c150_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c150_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -55068,7 +55068,7 @@ unsigned long REGPARAM2 op_c150_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c158_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c158_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -55089,7 +55089,7 @@ unsigned long REGPARAM2 op_c158_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c160_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c160_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -55111,7 +55111,7 @@ unsigned long REGPARAM2 op_c160_0_comp_nf(uae_u32 opcode) /* AND */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c168_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c168_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -55132,7 +55132,7 @@ unsigned long REGPARAM2 op_c168_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c170_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c170_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -55152,7 +55152,7 @@ unsigned long REGPARAM2 op_c170_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c178_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c178_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -55171,7 +55171,7 @@ unsigned long REGPARAM2 op_c178_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c179_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c179_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -55190,7 +55190,7 @@ unsigned long REGPARAM2 op_c179_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c188_0_comp_nf(uae_u32 opcode) /* EXG */ +uae_u32 REGPARAM2 op_c188_0_comp_nf(uae_u32 opcode) /* EXG */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -55211,7 +55211,7 @@ unsigned long REGPARAM2 op_c188_0_comp_nf(uae_u32 opcode) /* EXG */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c190_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c190_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -55232,7 +55232,7 @@ unsigned long REGPARAM2 op_c190_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c198_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c198_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -55253,7 +55253,7 @@ unsigned long REGPARAM2 op_c198_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1a0_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c1a0_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -55275,7 +55275,7 @@ unsigned long REGPARAM2 op_c1a0_0_comp_nf(uae_u32 opcode) /* AND */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1a8_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c1a8_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -55296,7 +55296,7 @@ unsigned long REGPARAM2 op_c1a8_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1b0_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c1b0_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -55316,7 +55316,7 @@ unsigned long REGPARAM2 op_c1b0_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1b8_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c1b8_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -55335,7 +55335,7 @@ unsigned long REGPARAM2 op_c1b8_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1b9_0_comp_nf(uae_u32 opcode) /* AND */ +uae_u32 REGPARAM2 op_c1b9_0_comp_nf(uae_u32 opcode) /* AND */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -55354,7 +55354,7 @@ unsigned long REGPARAM2 op_c1b9_0_comp_nf(uae_u32 opcode) /* AND */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1c0_0_comp_nf(uae_u32 opcode) /* MULS */ +uae_u32 REGPARAM2 op_c1c0_0_comp_nf(uae_u32 opcode) /* MULS */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -55371,7 +55371,7 @@ unsigned long REGPARAM2 op_c1c0_0_comp_nf(uae_u32 opcode) /* MULS */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1d0_0_comp_nf(uae_u32 opcode) /* MULS */ +uae_u32 REGPARAM2 op_c1d0_0_comp_nf(uae_u32 opcode) /* MULS */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -55392,7 +55392,7 @@ unsigned long REGPARAM2 op_c1d0_0_comp_nf(uae_u32 opcode) /* MULS */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1d8_0_comp_nf(uae_u32 opcode) /* MULS */ +uae_u32 REGPARAM2 op_c1d8_0_comp_nf(uae_u32 opcode) /* MULS */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -55413,7 +55413,7 @@ unsigned long REGPARAM2 op_c1d8_0_comp_nf(uae_u32 opcode) /* MULS */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1e0_0_comp_nf(uae_u32 opcode) /* MULS */ +uae_u32 REGPARAM2 op_c1e0_0_comp_nf(uae_u32 opcode) /* MULS */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -55435,7 +55435,7 @@ unsigned long REGPARAM2 op_c1e0_0_comp_nf(uae_u32 opcode) /* MULS */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1e8_0_comp_nf(uae_u32 opcode) /* MULS */ +uae_u32 REGPARAM2 op_c1e8_0_comp_nf(uae_u32 opcode) /* MULS */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -55456,7 +55456,7 @@ unsigned long REGPARAM2 op_c1e8_0_comp_nf(uae_u32 opcode) /* MULS */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1f0_0_comp_nf(uae_u32 opcode) /* MULS */ +uae_u32 REGPARAM2 op_c1f0_0_comp_nf(uae_u32 opcode) /* MULS */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -55476,7 +55476,7 @@ unsigned long REGPARAM2 op_c1f0_0_comp_nf(uae_u32 opcode) /* MULS */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1f8_0_comp_nf(uae_u32 opcode) /* MULS */ +uae_u32 REGPARAM2 op_c1f8_0_comp_nf(uae_u32 opcode) /* MULS */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -55495,7 +55495,7 @@ unsigned long REGPARAM2 op_c1f8_0_comp_nf(uae_u32 opcode) /* MULS */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1f9_0_comp_nf(uae_u32 opcode) /* MULS */ +uae_u32 REGPARAM2 op_c1f9_0_comp_nf(uae_u32 opcode) /* MULS */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -55514,7 +55514,7 @@ unsigned long REGPARAM2 op_c1f9_0_comp_nf(uae_u32 opcode) /* MULS */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1fa_0_comp_nf(uae_u32 opcode) /* MULS */ +uae_u32 REGPARAM2 op_c1fa_0_comp_nf(uae_u32 opcode) /* MULS */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -55535,7 +55535,7 @@ unsigned long REGPARAM2 op_c1fa_0_comp_nf(uae_u32 opcode) /* MULS */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1fb_0_comp_nf(uae_u32 opcode) /* MULS */ +uae_u32 REGPARAM2 op_c1fb_0_comp_nf(uae_u32 opcode) /* MULS */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -55557,7 +55557,7 @@ unsigned long REGPARAM2 op_c1fb_0_comp_nf(uae_u32 opcode) /* MULS */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_c1fc_0_comp_nf(uae_u32 opcode) /* MULS */ +uae_u32 REGPARAM2 op_c1fc_0_comp_nf(uae_u32 opcode) /* MULS */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -55574,7 +55574,7 @@ unsigned long REGPARAM2 op_c1fc_0_comp_nf(uae_u32 opcode) /* MULS */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d000_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d000_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -55592,7 +55592,7 @@ unsigned long REGPARAM2 op_d000_0_comp_nf(uae_u32 opcode) /* ADD */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d010_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d010_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -55614,7 +55614,7 @@ unsigned long REGPARAM2 op_d010_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d018_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d018_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -55636,7 +55636,7 @@ unsigned long REGPARAM2 op_d018_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d020_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d020_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -55659,7 +55659,7 @@ unsigned long REGPARAM2 op_d020_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d028_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d028_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -55681,7 +55681,7 @@ unsigned long REGPARAM2 op_d028_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d030_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d030_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -55702,7 +55702,7 @@ unsigned long REGPARAM2 op_d030_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d038_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d038_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -55722,7 +55722,7 @@ unsigned long REGPARAM2 op_d038_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d039_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d039_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -55742,7 +55742,7 @@ unsigned long REGPARAM2 op_d039_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d03a_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d03a_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -55764,7 +55764,7 @@ unsigned long REGPARAM2 op_d03a_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d03b_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d03b_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -55787,7 +55787,7 @@ unsigned long REGPARAM2 op_d03b_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d03c_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d03c_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -55805,7 +55805,7 @@ unsigned long REGPARAM2 op_d03c_0_comp_nf(uae_u32 opcode) /* ADD */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d040_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d040_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -55823,7 +55823,7 @@ unsigned long REGPARAM2 op_d040_0_comp_nf(uae_u32 opcode) /* ADD */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d048_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d048_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -55843,7 +55843,7 @@ unsigned long REGPARAM2 op_d048_0_comp_nf(uae_u32 opcode) /* ADD */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d050_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d050_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -55865,7 +55865,7 @@ unsigned long REGPARAM2 op_d050_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d058_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d058_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -55887,7 +55887,7 @@ unsigned long REGPARAM2 op_d058_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d060_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d060_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -55910,7 +55910,7 @@ unsigned long REGPARAM2 op_d060_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d068_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d068_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -55932,7 +55932,7 @@ unsigned long REGPARAM2 op_d068_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d070_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d070_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -55953,7 +55953,7 @@ unsigned long REGPARAM2 op_d070_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d078_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d078_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -55973,7 +55973,7 @@ unsigned long REGPARAM2 op_d078_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d079_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d079_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -55993,7 +55993,7 @@ unsigned long REGPARAM2 op_d079_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d07a_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d07a_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -56015,7 +56015,7 @@ unsigned long REGPARAM2 op_d07a_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d07b_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d07b_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -56038,7 +56038,7 @@ unsigned long REGPARAM2 op_d07b_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d07c_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d07c_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -56056,7 +56056,7 @@ unsigned long REGPARAM2 op_d07c_0_comp_nf(uae_u32 opcode) /* ADD */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d080_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d080_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -56074,7 +56074,7 @@ unsigned long REGPARAM2 op_d080_0_comp_nf(uae_u32 opcode) /* ADD */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d088_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d088_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -56094,7 +56094,7 @@ unsigned long REGPARAM2 op_d088_0_comp_nf(uae_u32 opcode) /* ADD */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d090_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d090_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -56116,7 +56116,7 @@ unsigned long REGPARAM2 op_d090_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d098_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d098_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -56138,7 +56138,7 @@ unsigned long REGPARAM2 op_d098_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0a0_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d0a0_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -56161,7 +56161,7 @@ unsigned long REGPARAM2 op_d0a0_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0a8_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d0a8_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -56183,7 +56183,7 @@ unsigned long REGPARAM2 op_d0a8_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0b0_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d0b0_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -56204,7 +56204,7 @@ unsigned long REGPARAM2 op_d0b0_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0b8_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d0b8_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -56224,7 +56224,7 @@ unsigned long REGPARAM2 op_d0b8_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0b9_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d0b9_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -56244,7 +56244,7 @@ unsigned long REGPARAM2 op_d0b9_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0ba_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d0ba_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -56266,7 +56266,7 @@ unsigned long REGPARAM2 op_d0ba_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0bb_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d0bb_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -56289,7 +56289,7 @@ unsigned long REGPARAM2 op_d0bb_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0bc_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d0bc_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -56307,7 +56307,7 @@ unsigned long REGPARAM2 op_d0bc_0_comp_nf(uae_u32 opcode) /* ADD */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0c0_0_comp_nf(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d0c0_0_comp_nf(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -56325,7 +56325,7 @@ unsigned long REGPARAM2 op_d0c0_0_comp_nf(uae_u32 opcode) /* ADDA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0c8_0_comp_nf(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d0c8_0_comp_nf(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -56345,7 +56345,7 @@ unsigned long REGPARAM2 op_d0c8_0_comp_nf(uae_u32 opcode) /* ADDA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0d0_0_comp_nf(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d0d0_0_comp_nf(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -56367,7 +56367,7 @@ unsigned long REGPARAM2 op_d0d0_0_comp_nf(uae_u32 opcode) /* ADDA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0d8_0_comp_nf(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d0d8_0_comp_nf(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -56389,7 +56389,7 @@ unsigned long REGPARAM2 op_d0d8_0_comp_nf(uae_u32 opcode) /* ADDA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0e0_0_comp_nf(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d0e0_0_comp_nf(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -56412,7 +56412,7 @@ unsigned long REGPARAM2 op_d0e0_0_comp_nf(uae_u32 opcode) /* ADDA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0e8_0_comp_nf(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d0e8_0_comp_nf(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -56434,7 +56434,7 @@ unsigned long REGPARAM2 op_d0e8_0_comp_nf(uae_u32 opcode) /* ADDA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0f0_0_comp_nf(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d0f0_0_comp_nf(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -56455,7 +56455,7 @@ unsigned long REGPARAM2 op_d0f0_0_comp_nf(uae_u32 opcode) /* ADDA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0f8_0_comp_nf(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d0f8_0_comp_nf(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -56475,7 +56475,7 @@ unsigned long REGPARAM2 op_d0f8_0_comp_nf(uae_u32 opcode) /* ADDA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0f9_0_comp_nf(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d0f9_0_comp_nf(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -56495,7 +56495,7 @@ unsigned long REGPARAM2 op_d0f9_0_comp_nf(uae_u32 opcode) /* ADDA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0fa_0_comp_nf(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d0fa_0_comp_nf(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -56517,7 +56517,7 @@ unsigned long REGPARAM2 op_d0fa_0_comp_nf(uae_u32 opcode) /* ADDA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0fb_0_comp_nf(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d0fb_0_comp_nf(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -56540,7 +56540,7 @@ unsigned long REGPARAM2 op_d0fb_0_comp_nf(uae_u32 opcode) /* ADDA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d0fc_0_comp_nf(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d0fc_0_comp_nf(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -56558,7 +56558,7 @@ unsigned long REGPARAM2 op_d0fc_0_comp_nf(uae_u32 opcode) /* ADDA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d100_0_comp_nf(uae_u32 opcode) /* ADDX */ +uae_u32 REGPARAM2 op_d100_0_comp_nf(uae_u32 opcode) /* ADDX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -56576,7 +56576,7 @@ unsigned long REGPARAM2 op_d100_0_comp_nf(uae_u32 opcode) /* ADDX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d108_0_comp_nf(uae_u32 opcode) /* ADDX */ +uae_u32 REGPARAM2 op_d108_0_comp_nf(uae_u32 opcode) /* ADDX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -56603,7 +56603,7 @@ unsigned long REGPARAM2 op_d108_0_comp_nf(uae_u32 opcode) /* ADDX */ }}}}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d110_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d110_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -56624,7 +56624,7 @@ unsigned long REGPARAM2 op_d110_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d118_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d118_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -56645,7 +56645,7 @@ unsigned long REGPARAM2 op_d118_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d120_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d120_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -56667,7 +56667,7 @@ unsigned long REGPARAM2 op_d120_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d128_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d128_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -56688,7 +56688,7 @@ unsigned long REGPARAM2 op_d128_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d130_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d130_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -56708,7 +56708,7 @@ unsigned long REGPARAM2 op_d130_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d138_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d138_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -56727,7 +56727,7 @@ unsigned long REGPARAM2 op_d138_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d139_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d139_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -56746,7 +56746,7 @@ unsigned long REGPARAM2 op_d139_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d140_0_comp_nf(uae_u32 opcode) /* ADDX */ +uae_u32 REGPARAM2 op_d140_0_comp_nf(uae_u32 opcode) /* ADDX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -56764,7 +56764,7 @@ unsigned long REGPARAM2 op_d140_0_comp_nf(uae_u32 opcode) /* ADDX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d148_0_comp_nf(uae_u32 opcode) /* ADDX */ +uae_u32 REGPARAM2 op_d148_0_comp_nf(uae_u32 opcode) /* ADDX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -56791,7 +56791,7 @@ unsigned long REGPARAM2 op_d148_0_comp_nf(uae_u32 opcode) /* ADDX */ }}}}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d150_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d150_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -56812,7 +56812,7 @@ unsigned long REGPARAM2 op_d150_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d158_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d158_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -56833,7 +56833,7 @@ unsigned long REGPARAM2 op_d158_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d160_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d160_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -56855,7 +56855,7 @@ unsigned long REGPARAM2 op_d160_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d168_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d168_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -56876,7 +56876,7 @@ unsigned long REGPARAM2 op_d168_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d170_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d170_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -56896,7 +56896,7 @@ unsigned long REGPARAM2 op_d170_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d178_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d178_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -56915,7 +56915,7 @@ unsigned long REGPARAM2 op_d178_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d179_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d179_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -56934,7 +56934,7 @@ unsigned long REGPARAM2 op_d179_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d180_0_comp_nf(uae_u32 opcode) /* ADDX */ +uae_u32 REGPARAM2 op_d180_0_comp_nf(uae_u32 opcode) /* ADDX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -56952,7 +56952,7 @@ unsigned long REGPARAM2 op_d180_0_comp_nf(uae_u32 opcode) /* ADDX */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d188_0_comp_nf(uae_u32 opcode) /* ADDX */ +uae_u32 REGPARAM2 op_d188_0_comp_nf(uae_u32 opcode) /* ADDX */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -56979,7 +56979,7 @@ unsigned long REGPARAM2 op_d188_0_comp_nf(uae_u32 opcode) /* ADDX */ }}}}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d190_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d190_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -57000,7 +57000,7 @@ unsigned long REGPARAM2 op_d190_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d198_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d198_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -57021,7 +57021,7 @@ unsigned long REGPARAM2 op_d198_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1a0_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d1a0_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -57043,7 +57043,7 @@ unsigned long REGPARAM2 op_d1a0_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1a8_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d1a8_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -57064,7 +57064,7 @@ unsigned long REGPARAM2 op_d1a8_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1b0_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d1b0_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -57084,7 +57084,7 @@ unsigned long REGPARAM2 op_d1b0_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1b8_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d1b8_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -57103,7 +57103,7 @@ unsigned long REGPARAM2 op_d1b8_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1b9_0_comp_nf(uae_u32 opcode) /* ADD */ +uae_u32 REGPARAM2 op_d1b9_0_comp_nf(uae_u32 opcode) /* ADD */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dodgy=0; @@ -57122,7 +57122,7 @@ unsigned long REGPARAM2 op_d1b9_0_comp_nf(uae_u32 opcode) /* ADD */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1c0_0_comp_nf(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d1c0_0_comp_nf(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -57140,7 +57140,7 @@ unsigned long REGPARAM2 op_d1c0_0_comp_nf(uae_u32 opcode) /* ADDA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1c8_0_comp_nf(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d1c8_0_comp_nf(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -57160,7 +57160,7 @@ unsigned long REGPARAM2 op_d1c8_0_comp_nf(uae_u32 opcode) /* ADDA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1d0_0_comp_nf(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d1d0_0_comp_nf(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -57182,7 +57182,7 @@ unsigned long REGPARAM2 op_d1d0_0_comp_nf(uae_u32 opcode) /* ADDA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1d8_0_comp_nf(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d1d8_0_comp_nf(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -57204,7 +57204,7 @@ unsigned long REGPARAM2 op_d1d8_0_comp_nf(uae_u32 opcode) /* ADDA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1e0_0_comp_nf(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d1e0_0_comp_nf(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -57227,7 +57227,7 @@ unsigned long REGPARAM2 op_d1e0_0_comp_nf(uae_u32 opcode) /* ADDA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1e8_0_comp_nf(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d1e8_0_comp_nf(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -57249,7 +57249,7 @@ unsigned long REGPARAM2 op_d1e8_0_comp_nf(uae_u32 opcode) /* ADDA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1f0_0_comp_nf(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d1f0_0_comp_nf(uae_u32 opcode) /* ADDA */ { uae_s32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; @@ -57270,7 +57270,7 @@ unsigned long REGPARAM2 op_d1f0_0_comp_nf(uae_u32 opcode) /* ADDA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1f8_0_comp_nf(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d1f8_0_comp_nf(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -57290,7 +57290,7 @@ unsigned long REGPARAM2 op_d1f8_0_comp_nf(uae_u32 opcode) /* ADDA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1f9_0_comp_nf(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d1f9_0_comp_nf(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -57310,7 +57310,7 @@ unsigned long REGPARAM2 op_d1f9_0_comp_nf(uae_u32 opcode) /* ADDA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1fa_0_comp_nf(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d1fa_0_comp_nf(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -57332,7 +57332,7 @@ unsigned long REGPARAM2 op_d1fa_0_comp_nf(uae_u32 opcode) /* ADDA */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1fb_0_comp_nf(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d1fb_0_comp_nf(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -57355,7 +57355,7 @@ unsigned long REGPARAM2 op_d1fb_0_comp_nf(uae_u32 opcode) /* ADDA */ }}}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_d1fc_0_comp_nf(uae_u32 opcode) /* ADDA */ +uae_u32 REGPARAM2 op_d1fc_0_comp_nf(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; uae_u32 dodgy=0; @@ -57373,7 +57373,7 @@ unsigned long REGPARAM2 op_d1fc_0_comp_nf(uae_u32 opcode) /* ADDA */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e000_0_comp_nf(uae_u32 opcode) /* ASR */ +uae_u32 REGPARAM2 op_e000_0_comp_nf(uae_u32 opcode) /* ASR */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -57393,7 +57393,7 @@ unsigned long REGPARAM2 op_e000_0_comp_nf(uae_u32 opcode) /* ASR */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e008_0_comp_nf(uae_u32 opcode) /* LSR */ +uae_u32 REGPARAM2 op_e008_0_comp_nf(uae_u32 opcode) /* LSR */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -57413,7 +57413,7 @@ unsigned long REGPARAM2 op_e008_0_comp_nf(uae_u32 opcode) /* LSR */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e018_0_comp_nf(uae_u32 opcode) /* ROR */ +uae_u32 REGPARAM2 op_e018_0_comp_nf(uae_u32 opcode) /* ROR */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -57433,7 +57433,7 @@ unsigned long REGPARAM2 op_e018_0_comp_nf(uae_u32 opcode) /* ROR */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e020_0_comp_nf(uae_u32 opcode) /* ASR */ +uae_u32 REGPARAM2 op_e020_0_comp_nf(uae_u32 opcode) /* ASR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -57456,10 +57456,7 @@ if ((uae_u32)srcreg==(uae_u32)dstreg) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -#endif - -#ifdef PART_8 -unsigned long REGPARAM2 op_e028_0_comp_nf(uae_u32 opcode) /* LSR */ +uae_u32 REGPARAM2 op_e028_0_comp_nf(uae_u32 opcode) /* LSR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -57482,7 +57479,7 @@ if ((uae_u32)srcreg==(uae_u32)dstreg) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e038_0_comp_nf(uae_u32 opcode) /* ROR */ +uae_u32 REGPARAM2 op_e038_0_comp_nf(uae_u32 opcode) /* ROR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -57505,7 +57502,7 @@ if ((uae_u32)srcreg==(uae_u32)dstreg) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e040_0_comp_nf(uae_u32 opcode) /* ASR */ +uae_u32 REGPARAM2 op_e040_0_comp_nf(uae_u32 opcode) /* ASR */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -57525,7 +57522,10 @@ unsigned long REGPARAM2 op_e040_0_comp_nf(uae_u32 opcode) /* ASR */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e048_0_comp_nf(uae_u32 opcode) /* LSR */ +#endif + +#ifdef PART_8 +uae_u32 REGPARAM2 op_e048_0_comp_nf(uae_u32 opcode) /* LSR */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -57545,7 +57545,7 @@ unsigned long REGPARAM2 op_e048_0_comp_nf(uae_u32 opcode) /* LSR */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e058_0_comp_nf(uae_u32 opcode) /* ROR */ +uae_u32 REGPARAM2 op_e058_0_comp_nf(uae_u32 opcode) /* ROR */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -57565,7 +57565,7 @@ unsigned long REGPARAM2 op_e058_0_comp_nf(uae_u32 opcode) /* ROR */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e060_0_comp_nf(uae_u32 opcode) /* ASR */ +uae_u32 REGPARAM2 op_e060_0_comp_nf(uae_u32 opcode) /* ASR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -57588,7 +57588,7 @@ if ((uae_u32)srcreg==(uae_u32)dstreg) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e068_0_comp_nf(uae_u32 opcode) /* LSR */ +uae_u32 REGPARAM2 op_e068_0_comp_nf(uae_u32 opcode) /* LSR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -57611,7 +57611,7 @@ if ((uae_u32)srcreg==(uae_u32)dstreg) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e078_0_comp_nf(uae_u32 opcode) /* ROR */ +uae_u32 REGPARAM2 op_e078_0_comp_nf(uae_u32 opcode) /* ROR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -57634,7 +57634,7 @@ if ((uae_u32)srcreg==(uae_u32)dstreg) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e080_0_comp_nf(uae_u32 opcode) /* ASR */ +uae_u32 REGPARAM2 op_e080_0_comp_nf(uae_u32 opcode) /* ASR */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -57654,7 +57654,7 @@ unsigned long REGPARAM2 op_e080_0_comp_nf(uae_u32 opcode) /* ASR */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e088_0_comp_nf(uae_u32 opcode) /* LSR */ +uae_u32 REGPARAM2 op_e088_0_comp_nf(uae_u32 opcode) /* LSR */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -57674,7 +57674,7 @@ unsigned long REGPARAM2 op_e088_0_comp_nf(uae_u32 opcode) /* LSR */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e098_0_comp_nf(uae_u32 opcode) /* ROR */ +uae_u32 REGPARAM2 op_e098_0_comp_nf(uae_u32 opcode) /* ROR */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -57694,7 +57694,7 @@ unsigned long REGPARAM2 op_e098_0_comp_nf(uae_u32 opcode) /* ROR */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e0a0_0_comp_nf(uae_u32 opcode) /* ASR */ +uae_u32 REGPARAM2 op_e0a0_0_comp_nf(uae_u32 opcode) /* ASR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -57717,7 +57717,7 @@ if ((uae_u32)srcreg==(uae_u32)dstreg) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e0a8_0_comp_nf(uae_u32 opcode) /* LSR */ +uae_u32 REGPARAM2 op_e0a8_0_comp_nf(uae_u32 opcode) /* LSR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -57740,7 +57740,7 @@ if ((uae_u32)srcreg==(uae_u32)dstreg) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e0b8_0_comp_nf(uae_u32 opcode) /* ROR */ +uae_u32 REGPARAM2 op_e0b8_0_comp_nf(uae_u32 opcode) /* ROR */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -57763,7 +57763,7 @@ if ((uae_u32)srcreg==(uae_u32)dstreg) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e0d0_0_comp_nf(uae_u32 opcode) /* ASRW */ +uae_u32 REGPARAM2 op_e0d0_0_comp_nf(uae_u32 opcode) /* ASRW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -57782,7 +57782,7 @@ unsigned long REGPARAM2 op_e0d0_0_comp_nf(uae_u32 opcode) /* ASRW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e0d8_0_comp_nf(uae_u32 opcode) /* ASRW */ +uae_u32 REGPARAM2 op_e0d8_0_comp_nf(uae_u32 opcode) /* ASRW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -57801,7 +57801,7 @@ unsigned long REGPARAM2 op_e0d8_0_comp_nf(uae_u32 opcode) /* ASRW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e0e0_0_comp_nf(uae_u32 opcode) /* ASRW */ +uae_u32 REGPARAM2 op_e0e0_0_comp_nf(uae_u32 opcode) /* ASRW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -57821,7 +57821,7 @@ unsigned long REGPARAM2 op_e0e0_0_comp_nf(uae_u32 opcode) /* ASRW */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e0e8_0_comp_nf(uae_u32 opcode) /* ASRW */ +uae_u32 REGPARAM2 op_e0e8_0_comp_nf(uae_u32 opcode) /* ASRW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -57840,7 +57840,7 @@ unsigned long REGPARAM2 op_e0e8_0_comp_nf(uae_u32 opcode) /* ASRW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e0f0_0_comp_nf(uae_u32 opcode) /* ASRW */ +uae_u32 REGPARAM2 op_e0f0_0_comp_nf(uae_u32 opcode) /* ASRW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -57858,7 +57858,7 @@ unsigned long REGPARAM2 op_e0f0_0_comp_nf(uae_u32 opcode) /* ASRW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e0f8_0_comp_nf(uae_u32 opcode) /* ASRW */ +uae_u32 REGPARAM2 op_e0f8_0_comp_nf(uae_u32 opcode) /* ASRW */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -57875,7 +57875,7 @@ unsigned long REGPARAM2 op_e0f8_0_comp_nf(uae_u32 opcode) /* ASRW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e0f9_0_comp_nf(uae_u32 opcode) /* ASRW */ +uae_u32 REGPARAM2 op_e0f9_0_comp_nf(uae_u32 opcode) /* ASRW */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -57892,7 +57892,7 @@ unsigned long REGPARAM2 op_e0f9_0_comp_nf(uae_u32 opcode) /* ASRW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e100_0_comp_nf(uae_u32 opcode) /* ASL */ +uae_u32 REGPARAM2 op_e100_0_comp_nf(uae_u32 opcode) /* ASL */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -57912,7 +57912,7 @@ unsigned long REGPARAM2 op_e100_0_comp_nf(uae_u32 opcode) /* ASL */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e108_0_comp_nf(uae_u32 opcode) /* LSL */ +uae_u32 REGPARAM2 op_e108_0_comp_nf(uae_u32 opcode) /* LSL */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -57932,7 +57932,7 @@ unsigned long REGPARAM2 op_e108_0_comp_nf(uae_u32 opcode) /* LSL */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e118_0_comp_nf(uae_u32 opcode) /* ROL */ +uae_u32 REGPARAM2 op_e118_0_comp_nf(uae_u32 opcode) /* ROL */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -57952,7 +57952,7 @@ unsigned long REGPARAM2 op_e118_0_comp_nf(uae_u32 opcode) /* ROL */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e120_0_comp_nf(uae_u32 opcode) /* ASL */ +uae_u32 REGPARAM2 op_e120_0_comp_nf(uae_u32 opcode) /* ASL */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -57975,7 +57975,7 @@ if ((uae_u32)srcreg==(uae_u32)dstreg) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e128_0_comp_nf(uae_u32 opcode) /* LSL */ +uae_u32 REGPARAM2 op_e128_0_comp_nf(uae_u32 opcode) /* LSL */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -57998,7 +57998,7 @@ if ((uae_u32)srcreg==(uae_u32)dstreg) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e138_0_comp_nf(uae_u32 opcode) /* ROL */ +uae_u32 REGPARAM2 op_e138_0_comp_nf(uae_u32 opcode) /* ROL */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -58021,7 +58021,7 @@ if ((uae_u32)srcreg==(uae_u32)dstreg) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e140_0_comp_nf(uae_u32 opcode) /* ASL */ +uae_u32 REGPARAM2 op_e140_0_comp_nf(uae_u32 opcode) /* ASL */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -58041,7 +58041,7 @@ unsigned long REGPARAM2 op_e140_0_comp_nf(uae_u32 opcode) /* ASL */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e148_0_comp_nf(uae_u32 opcode) /* LSL */ +uae_u32 REGPARAM2 op_e148_0_comp_nf(uae_u32 opcode) /* LSL */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -58061,7 +58061,7 @@ unsigned long REGPARAM2 op_e148_0_comp_nf(uae_u32 opcode) /* LSL */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e158_0_comp_nf(uae_u32 opcode) /* ROL */ +uae_u32 REGPARAM2 op_e158_0_comp_nf(uae_u32 opcode) /* ROL */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -58081,7 +58081,7 @@ unsigned long REGPARAM2 op_e158_0_comp_nf(uae_u32 opcode) /* ROL */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e160_0_comp_nf(uae_u32 opcode) /* ASL */ +uae_u32 REGPARAM2 op_e160_0_comp_nf(uae_u32 opcode) /* ASL */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -58104,7 +58104,7 @@ if ((uae_u32)srcreg==(uae_u32)dstreg) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e168_0_comp_nf(uae_u32 opcode) /* LSL */ +uae_u32 REGPARAM2 op_e168_0_comp_nf(uae_u32 opcode) /* LSL */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -58127,7 +58127,7 @@ if ((uae_u32)srcreg==(uae_u32)dstreg) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e178_0_comp_nf(uae_u32 opcode) /* ROL */ +uae_u32 REGPARAM2 op_e178_0_comp_nf(uae_u32 opcode) /* ROL */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -58150,7 +58150,7 @@ if ((uae_u32)srcreg==(uae_u32)dstreg) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e180_0_comp_nf(uae_u32 opcode) /* ASL */ +uae_u32 REGPARAM2 op_e180_0_comp_nf(uae_u32 opcode) /* ASL */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -58170,7 +58170,7 @@ unsigned long REGPARAM2 op_e180_0_comp_nf(uae_u32 opcode) /* ASL */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e188_0_comp_nf(uae_u32 opcode) /* LSL */ +uae_u32 REGPARAM2 op_e188_0_comp_nf(uae_u32 opcode) /* LSL */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -58190,7 +58190,7 @@ unsigned long REGPARAM2 op_e188_0_comp_nf(uae_u32 opcode) /* LSL */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e198_0_comp_nf(uae_u32 opcode) /* ROL */ +uae_u32 REGPARAM2 op_e198_0_comp_nf(uae_u32 opcode) /* ROL */ { uae_s32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; @@ -58210,7 +58210,7 @@ unsigned long REGPARAM2 op_e198_0_comp_nf(uae_u32 opcode) /* ROL */ if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e1a0_0_comp_nf(uae_u32 opcode) /* ASL */ +uae_u32 REGPARAM2 op_e1a0_0_comp_nf(uae_u32 opcode) /* ASL */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -58233,7 +58233,7 @@ if ((uae_u32)srcreg==(uae_u32)dstreg) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e1a8_0_comp_nf(uae_u32 opcode) /* LSL */ +uae_u32 REGPARAM2 op_e1a8_0_comp_nf(uae_u32 opcode) /* LSL */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -58256,7 +58256,7 @@ if ((uae_u32)srcreg==(uae_u32)dstreg) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e1b8_0_comp_nf(uae_u32 opcode) /* ROL */ +uae_u32 REGPARAM2 op_e1b8_0_comp_nf(uae_u32 opcode) /* ROL */ { uae_s32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; @@ -58279,7 +58279,7 @@ if ((uae_u32)srcreg==(uae_u32)dstreg) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_e1d0_0_comp_nf(uae_u32 opcode) /* ASLW */ +uae_u32 REGPARAM2 op_e1d0_0_comp_nf(uae_u32 opcode) /* ASLW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -58298,7 +58298,7 @@ unsigned long REGPARAM2 op_e1d0_0_comp_nf(uae_u32 opcode) /* ASLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e1d8_0_comp_nf(uae_u32 opcode) /* ASLW */ +uae_u32 REGPARAM2 op_e1d8_0_comp_nf(uae_u32 opcode) /* ASLW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -58317,7 +58317,7 @@ unsigned long REGPARAM2 op_e1d8_0_comp_nf(uae_u32 opcode) /* ASLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e1e0_0_comp_nf(uae_u32 opcode) /* ASLW */ +uae_u32 REGPARAM2 op_e1e0_0_comp_nf(uae_u32 opcode) /* ASLW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -58337,7 +58337,7 @@ unsigned long REGPARAM2 op_e1e0_0_comp_nf(uae_u32 opcode) /* ASLW */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e1e8_0_comp_nf(uae_u32 opcode) /* ASLW */ +uae_u32 REGPARAM2 op_e1e8_0_comp_nf(uae_u32 opcode) /* ASLW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -58356,7 +58356,7 @@ unsigned long REGPARAM2 op_e1e8_0_comp_nf(uae_u32 opcode) /* ASLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e1f0_0_comp_nf(uae_u32 opcode) /* ASLW */ +uae_u32 REGPARAM2 op_e1f0_0_comp_nf(uae_u32 opcode) /* ASLW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -58374,7 +58374,7 @@ unsigned long REGPARAM2 op_e1f0_0_comp_nf(uae_u32 opcode) /* ASLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e1f8_0_comp_nf(uae_u32 opcode) /* ASLW */ +uae_u32 REGPARAM2 op_e1f8_0_comp_nf(uae_u32 opcode) /* ASLW */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -58391,7 +58391,7 @@ unsigned long REGPARAM2 op_e1f8_0_comp_nf(uae_u32 opcode) /* ASLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e1f9_0_comp_nf(uae_u32 opcode) /* ASLW */ +uae_u32 REGPARAM2 op_e1f9_0_comp_nf(uae_u32 opcode) /* ASLW */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -58408,7 +58408,7 @@ unsigned long REGPARAM2 op_e1f9_0_comp_nf(uae_u32 opcode) /* ASLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e2d0_0_comp_nf(uae_u32 opcode) /* LSRW */ +uae_u32 REGPARAM2 op_e2d0_0_comp_nf(uae_u32 opcode) /* LSRW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -58427,7 +58427,7 @@ unsigned long REGPARAM2 op_e2d0_0_comp_nf(uae_u32 opcode) /* LSRW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e2d8_0_comp_nf(uae_u32 opcode) /* LSRW */ +uae_u32 REGPARAM2 op_e2d8_0_comp_nf(uae_u32 opcode) /* LSRW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -58446,7 +58446,7 @@ unsigned long REGPARAM2 op_e2d8_0_comp_nf(uae_u32 opcode) /* LSRW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e2e0_0_comp_nf(uae_u32 opcode) /* LSRW */ +uae_u32 REGPARAM2 op_e2e0_0_comp_nf(uae_u32 opcode) /* LSRW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -58466,7 +58466,7 @@ unsigned long REGPARAM2 op_e2e0_0_comp_nf(uae_u32 opcode) /* LSRW */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e2e8_0_comp_nf(uae_u32 opcode) /* LSRW */ +uae_u32 REGPARAM2 op_e2e8_0_comp_nf(uae_u32 opcode) /* LSRW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -58485,7 +58485,7 @@ unsigned long REGPARAM2 op_e2e8_0_comp_nf(uae_u32 opcode) /* LSRW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e2f0_0_comp_nf(uae_u32 opcode) /* LSRW */ +uae_u32 REGPARAM2 op_e2f0_0_comp_nf(uae_u32 opcode) /* LSRW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -58503,7 +58503,7 @@ unsigned long REGPARAM2 op_e2f0_0_comp_nf(uae_u32 opcode) /* LSRW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e2f8_0_comp_nf(uae_u32 opcode) /* LSRW */ +uae_u32 REGPARAM2 op_e2f8_0_comp_nf(uae_u32 opcode) /* LSRW */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -58520,7 +58520,7 @@ unsigned long REGPARAM2 op_e2f8_0_comp_nf(uae_u32 opcode) /* LSRW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e2f9_0_comp_nf(uae_u32 opcode) /* LSRW */ +uae_u32 REGPARAM2 op_e2f9_0_comp_nf(uae_u32 opcode) /* LSRW */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -58537,7 +58537,7 @@ unsigned long REGPARAM2 op_e2f9_0_comp_nf(uae_u32 opcode) /* LSRW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e3d0_0_comp_nf(uae_u32 opcode) /* LSLW */ +uae_u32 REGPARAM2 op_e3d0_0_comp_nf(uae_u32 opcode) /* LSLW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -58556,7 +58556,7 @@ unsigned long REGPARAM2 op_e3d0_0_comp_nf(uae_u32 opcode) /* LSLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e3d8_0_comp_nf(uae_u32 opcode) /* LSLW */ +uae_u32 REGPARAM2 op_e3d8_0_comp_nf(uae_u32 opcode) /* LSLW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -58575,7 +58575,7 @@ unsigned long REGPARAM2 op_e3d8_0_comp_nf(uae_u32 opcode) /* LSLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e3e0_0_comp_nf(uae_u32 opcode) /* LSLW */ +uae_u32 REGPARAM2 op_e3e0_0_comp_nf(uae_u32 opcode) /* LSLW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -58595,7 +58595,7 @@ unsigned long REGPARAM2 op_e3e0_0_comp_nf(uae_u32 opcode) /* LSLW */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e3e8_0_comp_nf(uae_u32 opcode) /* LSLW */ +uae_u32 REGPARAM2 op_e3e8_0_comp_nf(uae_u32 opcode) /* LSLW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -58614,7 +58614,7 @@ unsigned long REGPARAM2 op_e3e8_0_comp_nf(uae_u32 opcode) /* LSLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e3f0_0_comp_nf(uae_u32 opcode) /* LSLW */ +uae_u32 REGPARAM2 op_e3f0_0_comp_nf(uae_u32 opcode) /* LSLW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -58632,7 +58632,7 @@ unsigned long REGPARAM2 op_e3f0_0_comp_nf(uae_u32 opcode) /* LSLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e3f8_0_comp_nf(uae_u32 opcode) /* LSLW */ +uae_u32 REGPARAM2 op_e3f8_0_comp_nf(uae_u32 opcode) /* LSLW */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -58649,7 +58649,7 @@ unsigned long REGPARAM2 op_e3f8_0_comp_nf(uae_u32 opcode) /* LSLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e3f9_0_comp_nf(uae_u32 opcode) /* LSLW */ +uae_u32 REGPARAM2 op_e3f9_0_comp_nf(uae_u32 opcode) /* LSLW */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -58666,7 +58666,7 @@ unsigned long REGPARAM2 op_e3f9_0_comp_nf(uae_u32 opcode) /* LSLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e6d0_0_comp_nf(uae_u32 opcode) /* RORW */ +uae_u32 REGPARAM2 op_e6d0_0_comp_nf(uae_u32 opcode) /* RORW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -58685,7 +58685,7 @@ unsigned long REGPARAM2 op_e6d0_0_comp_nf(uae_u32 opcode) /* RORW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e6d8_0_comp_nf(uae_u32 opcode) /* RORW */ +uae_u32 REGPARAM2 op_e6d8_0_comp_nf(uae_u32 opcode) /* RORW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -58704,7 +58704,7 @@ unsigned long REGPARAM2 op_e6d8_0_comp_nf(uae_u32 opcode) /* RORW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e6e0_0_comp_nf(uae_u32 opcode) /* RORW */ +uae_u32 REGPARAM2 op_e6e0_0_comp_nf(uae_u32 opcode) /* RORW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -58724,7 +58724,7 @@ unsigned long REGPARAM2 op_e6e0_0_comp_nf(uae_u32 opcode) /* RORW */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e6e8_0_comp_nf(uae_u32 opcode) /* RORW */ +uae_u32 REGPARAM2 op_e6e8_0_comp_nf(uae_u32 opcode) /* RORW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -58743,7 +58743,7 @@ unsigned long REGPARAM2 op_e6e8_0_comp_nf(uae_u32 opcode) /* RORW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e6f0_0_comp_nf(uae_u32 opcode) /* RORW */ +uae_u32 REGPARAM2 op_e6f0_0_comp_nf(uae_u32 opcode) /* RORW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -58761,7 +58761,7 @@ unsigned long REGPARAM2 op_e6f0_0_comp_nf(uae_u32 opcode) /* RORW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e6f8_0_comp_nf(uae_u32 opcode) /* RORW */ +uae_u32 REGPARAM2 op_e6f8_0_comp_nf(uae_u32 opcode) /* RORW */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -58778,7 +58778,7 @@ unsigned long REGPARAM2 op_e6f8_0_comp_nf(uae_u32 opcode) /* RORW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e6f9_0_comp_nf(uae_u32 opcode) /* RORW */ +uae_u32 REGPARAM2 op_e6f9_0_comp_nf(uae_u32 opcode) /* RORW */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -58795,7 +58795,7 @@ unsigned long REGPARAM2 op_e6f9_0_comp_nf(uae_u32 opcode) /* RORW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e7d0_0_comp_nf(uae_u32 opcode) /* ROLW */ +uae_u32 REGPARAM2 op_e7d0_0_comp_nf(uae_u32 opcode) /* ROLW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -58814,7 +58814,7 @@ unsigned long REGPARAM2 op_e7d0_0_comp_nf(uae_u32 opcode) /* ROLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e7d8_0_comp_nf(uae_u32 opcode) /* ROLW */ +uae_u32 REGPARAM2 op_e7d8_0_comp_nf(uae_u32 opcode) /* ROLW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -58833,7 +58833,7 @@ unsigned long REGPARAM2 op_e7d8_0_comp_nf(uae_u32 opcode) /* ROLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e7e0_0_comp_nf(uae_u32 opcode) /* ROLW */ +uae_u32 REGPARAM2 op_e7e0_0_comp_nf(uae_u32 opcode) /* ROLW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -58853,7 +58853,7 @@ unsigned long REGPARAM2 op_e7e0_0_comp_nf(uae_u32 opcode) /* ROLW */ }}}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e7e8_0_comp_nf(uae_u32 opcode) /* ROLW */ +uae_u32 REGPARAM2 op_e7e8_0_comp_nf(uae_u32 opcode) /* ROLW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -58872,7 +58872,7 @@ unsigned long REGPARAM2 op_e7e8_0_comp_nf(uae_u32 opcode) /* ROLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e7f0_0_comp_nf(uae_u32 opcode) /* ROLW */ +uae_u32 REGPARAM2 op_e7f0_0_comp_nf(uae_u32 opcode) /* ROLW */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -58890,7 +58890,7 @@ unsigned long REGPARAM2 op_e7f0_0_comp_nf(uae_u32 opcode) /* ROLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e7f8_0_comp_nf(uae_u32 opcode) /* ROLW */ +uae_u32 REGPARAM2 op_e7f8_0_comp_nf(uae_u32 opcode) /* ROLW */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -58907,7 +58907,7 @@ unsigned long REGPARAM2 op_e7f8_0_comp_nf(uae_u32 opcode) /* ROLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_e7f9_0_comp_nf(uae_u32 opcode) /* ROLW */ +uae_u32 REGPARAM2 op_e7f9_0_comp_nf(uae_u32 opcode) /* ROLW */ { uae_u32 dodgy=0; uae_u32 m68k_pc_offset_thisinst=m68k_pc_offset; @@ -58924,7 +58924,7 @@ unsigned long REGPARAM2 op_e7f9_0_comp_nf(uae_u32 opcode) /* ROLW */ }}}} if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc(); return 0; } -unsigned long REGPARAM2 op_f600_0_comp_nf(uae_u32 opcode) /* MOVE16 */ +uae_u32 REGPARAM2 op_f600_0_comp_nf(uae_u32 opcode) /* MOVE16 */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -58947,7 +58947,7 @@ if (special_mem) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_f608_0_comp_nf(uae_u32 opcode) /* MOVE16 */ +uae_u32 REGPARAM2 op_f608_0_comp_nf(uae_u32 opcode) /* MOVE16 */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -58970,7 +58970,7 @@ if (special_mem) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_f610_0_comp_nf(uae_u32 opcode) /* MOVE16 */ +uae_u32 REGPARAM2 op_f610_0_comp_nf(uae_u32 opcode) /* MOVE16 */ { uae_s32 srcreg = (opcode & 7); uae_u32 dodgy=0; @@ -58993,7 +58993,7 @@ if (special_mem) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_f618_0_comp_nf(uae_u32 opcode) /* MOVE16 */ +uae_u32 REGPARAM2 op_f618_0_comp_nf(uae_u32 opcode) /* MOVE16 */ { uae_u32 dstreg = opcode & 7; uae_u32 dodgy=0; @@ -59016,7 +59016,7 @@ if (special_mem) { if (failure) m68k_pc_offset=m68k_pc_offset_thisinst; return 0; } -unsigned long REGPARAM2 op_f620_0_comp_nf(uae_u32 opcode) /* MOVE16 */ +uae_u32 REGPARAM2 op_f620_0_comp_nf(uae_u32 opcode) /* MOVE16 */ { uae_s32 srcreg = (opcode & 7); uae_s32 dstreg = 0; diff --git a/src/jit/compemu_midfunc_arm.cpp b/src/jit/compemu_midfunc_arm.cpp index ec13f6d2..4af469ba 100644 --- a/src/jit/compemu_midfunc_arm.cpp +++ b/src/jit/compemu_midfunc_arm.cpp @@ -463,7 +463,7 @@ MENDFUNC(2,arm_SUB_l_ri8,(RW4 d, IMM i)) // Other -static inline void flush_cpu_icache(void *start, void *stop) +STATIC_INLINE void flush_cpu_icache(void *start, void *stop) { register void *_beg __asm ("a1") = start; register void *_end __asm ("a2") = stop; @@ -480,11 +480,11 @@ static inline void flush_cpu_icache(void *start, void *stop) #endif } -static inline void write_jmp_target(uae_u32* jmpaddr, cpuop_func* a) { +STATIC_INLINE void write_jmp_target(uae_u32* jmpaddr, cpuop_func* a) { *(jmpaddr) = (uae_u32)a; flush_cpu_icache((void *)jmpaddr, (void *)&jmpaddr[1]); } -static inline void emit_jmp_target(uae_u32 a) { +STATIC_INLINE void emit_jmp_target(uae_u32 a) { emit_long((uae_u32)a); } diff --git a/src/jit/compemu_support.cpp b/src/jit/compemu_support.cpp index ca09d870..00002f4c 100644 --- a/src/jit/compemu_support.cpp +++ b/src/jit/compemu_support.cpp @@ -606,20 +606,20 @@ static HardBlockAllocator BlockInfoAllocator; static HardBlockAllocator ChecksumInfoAllocator; #endif -static inline checksum_info *alloc_checksum_info(void) +STATIC_INLINE checksum_info *alloc_checksum_info(void) { checksum_info *csi = ChecksumInfoAllocator.acquire(); csi->next = NULL; return csi; } -static inline void free_checksum_info(checksum_info *csi) +STATIC_INLINE void free_checksum_info(checksum_info *csi) { csi->next = NULL; ChecksumInfoAllocator.release(csi); } -static inline void free_checksum_info_chain(checksum_info *csi) +STATIC_INLINE void free_checksum_info_chain(checksum_info *csi) { while (csi != NULL) { checksum_info *csi2 = csi->next; @@ -628,7 +628,7 @@ static inline void free_checksum_info_chain(checksum_info *csi) } } -static inline blockinfo *alloc_blockinfo(void) +STATIC_INLINE blockinfo *alloc_blockinfo(void) { blockinfo *bi = BlockInfoAllocator.acquire(); #if USE_CHECKSUM_INFO @@ -637,7 +637,7 @@ static inline blockinfo *alloc_blockinfo(void) return bi; } -static inline void free_blockinfo(blockinfo *bi) +STATIC_INLINE void free_blockinfo(blockinfo *bi) { #if USE_CHECKSUM_INFO free_checksum_info_chain(bi->csi); @@ -736,7 +736,7 @@ static uae_u32 data_buffers_used = 0; static uae_s32 data_natmem_pos = 0; -static inline void compemu_raw_branch(IMM d); +STATIC_INLINE void compemu_raw_branch(IMM d); STATIC_INLINE void data_check_end(uae_s32 n, uae_s32 codesize) { @@ -2746,7 +2746,7 @@ void compemu_reset(void) } // OPCODE is in big endian format, use cft_map() beforehand, if needed. -static inline void reset_compop(int opcode) +STATIC_INLINE void reset_compop(int opcode) { compfunctbl[opcode] = NULL; nfcompfunctbl[opcode] = NULL; @@ -2771,7 +2771,7 @@ void build_comp(void) for (opcode = 0; opcode < 65536; opcode++) { reset_compop(opcode); #ifdef NOFLAGS_SUPPORT - nfcpufunctbl[opcode] = op_illg; + nfcpufunctbl[opcode] = _op_illg; #endif prop[opcode].use_flags = 0x1f; prop[opcode].set_flags = 0x1f; @@ -2920,7 +2920,7 @@ static void flush_icache_hard(uaecptr ptr, int n) #endif current_compile_p = compiled_code; - set_special(regs, 0); /* To get out of compiled code */ + set_special(0); /* To get out of compiled code */ } @@ -2970,7 +2970,7 @@ STATIC_INLINE void flush_icache_lazy(uaecptr ptr, int n) int failure; -static inline unsigned int get_opcode_cft_map(unsigned int f) +STATIC_INLINE unsigned int get_opcode_cft_map(unsigned int f) { return ((f >> 8) & 255) | ((f & 255) << 8); } diff --git a/src/jit/compstbl.cpp b/src/jit/compstbl.cpp index 97ec8acc..44834373 100644 --- a/src/jit/compstbl.cpp +++ b/src/jit/compstbl.cpp @@ -1796,7 +1796,11 @@ extern const struct comptbl op_smalltbl_0_comp_ff[] = { { NULL, 0x00000000, 61424 }, /* BFINS */ { NULL, 0x00000000, 61432 }, /* BFINS */ { NULL, 0x00000000, 61433 }, /* BFINS */ +{ NULL, 0x00000001, 61440 }, /* MMUOP030 */ +{ NULL, 0x00000001, 61448 }, /* MMUOP030 */ { NULL, 0x00000001, 61456 }, /* MMUOP030 */ +{ NULL, 0x00000001, 61464 }, /* MMUOP030 */ +{ NULL, 0x00000001, 61472 }, /* MMUOP030 */ { NULL, 0x00000001, 61480 }, /* MMUOP030 */ { NULL, 0x00000001, 61488 }, /* MMUOP030 */ { NULL, 0x00000001, 61496 }, /* MMUOP030 */ @@ -3665,7 +3669,11 @@ extern const struct comptbl op_smalltbl_0_comp_nf[] = { { NULL, 0x00000000, 61424 }, /* BFINS */ { NULL, 0x00000000, 61432 }, /* BFINS */ { NULL, 0x00000000, 61433 }, /* BFINS */ +{ NULL, 0x00000001, 61440 }, /* MMUOP030 */ +{ NULL, 0x00000001, 61448 }, /* MMUOP030 */ { NULL, 0x00000001, 61456 }, /* MMUOP030 */ +{ NULL, 0x00000001, 61464 }, /* MMUOP030 */ +{ NULL, 0x00000001, 61472 }, /* MMUOP030 */ { NULL, 0x00000001, 61480 }, /* MMUOP030 */ { NULL, 0x00000001, 61488 }, /* MMUOP030 */ { NULL, 0x00000001, 61496 }, /* MMUOP030 */ diff --git a/src/jit/gencomp_arm.cpp b/src/jit/gencomp_arm.cpp index 33de422b..460df817 100644 --- a/src/jit/gencomp_arm.cpp +++ b/src/jit/gencomp_arm.cpp @@ -270,7 +270,7 @@ finish_braces(void) close_brace(); } -static inline void gen_update_next_handler(void) +static __inline__ void gen_update_next_handler(void) { return; /* Can anything clever be done here? */ } @@ -3021,11 +3021,11 @@ generate_one_opcode(int rp, int noflags) if (noflags) { fprintf(stblfile, "{ op_%lx_%d_comp_nf, 0x%08x, %ld }, /* %s */\n", opcode, postfix, flags, opcode, name); fprintf(headerfile, "extern compop_func op_%lx_%d_comp_nf;\n", opcode, postfix); - printf("unsigned long REGPARAM2 op_%lx_%d_comp_nf(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, name); + printf("uae_u32 REGPARAM2 op_%lx_%d_comp_nf(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, name); } else { fprintf(stblfile, "{ op_%lx_%d_comp_ff, 0x%08x, %ld }, /* %s */\n", opcode, postfix, flags, opcode, name); fprintf(headerfile, "extern compop_func op_%lx_%d_comp_ff;\n", opcode, postfix); - printf("unsigned long REGPARAM2 op_%lx_%d_comp_ff(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, name); + printf("uae_u32 REGPARAM2 op_%lx_%d_comp_ff(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, name); } com_flush(); } diff --git a/src/keybuf.cpp b/src/keybuf.cpp index e4bcd08b..a6bdc4f2 100644 --- a/src/keybuf.cpp +++ b/src/keybuf.cpp @@ -71,5 +71,5 @@ int record_key (int kc) void keybuf_init (void) { kpb_first = kpb_last = 0; - inputdevice_updateconfig (&currprefs); + inputdevice_updateconfig (&changed_prefs, &currprefs); } diff --git a/src/linetoscr.c b/src/linetoscr.c index a7cfa0c6..1d05dd4e 100644 --- a/src/linetoscr.c +++ b/src/linetoscr.c @@ -6,7 +6,7 @@ STATIC_INLINE uae_u32 merge_words(uae_u32 val, uae_u32 val2) { - __asm__ __volatile__ ( + __asm__ ( "pkhbt %[o], %[o], %[d], lsl #16 \n\t" : [o] "+r" (val) : [d] "r" (val2) ); return val; @@ -14,7 +14,7 @@ STATIC_INLINE uae_u32 merge_words(uae_u32 val, uae_u32 val2) STATIC_INLINE uae_u32 double_word(uae_u32 val) { - __asm__ __volatile__ ( + __asm__ ( "pkhbt %[o], %[o], %[o], lsl #16 \n\t" : [o] "+r" (val) ); return val; diff --git a/src/main.cpp b/src/main.cpp index 09eb8faa..6fb35798 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -16,8 +16,8 @@ #include "audio.h" #include "sd-pandora/sound.h" #include "memory.h" -#include "newcpu.h" #include "custom.h" +#include "newcpu.h" #include "disk.h" #include "debug.h" #include "xwin.h" @@ -142,6 +142,9 @@ void fixup_cpu(struct uae_prefs *p) p->fpu_model = 68060; break; } + + if (p->immediate_blits && p->waiting_blits) + p->waiting_blits = 0; } @@ -272,12 +275,23 @@ void fixup_prefs (struct uae_prefs *p) #if !defined (JIT) p->cachesize = 0; #endif +#ifdef CPU_68000_ONLY + p->cpu_model = 68000; + p->fpu_model = 0; +#endif +#ifndef AGA + p->chipset_mask &= ~CSMASK_AGA; +#endif +#ifndef AUTOCONFIG + p->z3fastmem_size = 0; + p->fastmem_size = 0; + p->rtgmem_size = 0; +#endif #if !defined (BSDSOCKET) p->socket_emu = 0; #endif blkdev_fix_prefs (p); - target_fixup_options (p); } @@ -286,24 +300,26 @@ static int restart_program; static TCHAR restart_config[MAX_DPATH]; static int default_config; -void uae_reset (int hardreset) +void uae_reset (int hardreset, int keyboardreset) { if (quit_program == 0) { - quit_program = -2; + quit_program = -UAE_RESET; + if (keyboardreset) + quit_program = -UAE_RESET_KEYBOARD; if (hardreset) - quit_program = -3; + quit_program = -UAE_RESET_HARD; } } void uae_quit (void) { - if (quit_program != -1) - quit_program = -1; + if (quit_program != -UAE_QUIT) + quit_program = -UAE_QUIT; target_quit (); } /* 0 = normal, 1 = nogui, -1 = disable nogui */ -void uae_restart (int opengui, TCHAR *cfgfile) +void uae_restart (int opengui, const TCHAR *cfgfile) { uae_quit (); restart_program = opengui > 0 ? 1 : (opengui == 0 ? 2 : 3); @@ -311,6 +327,7 @@ void uae_restart (int opengui, TCHAR *cfgfile) default_config = 0; if (cfgfile) _tcscpy (restart_config, cfgfile); + target_restart (); } static void parse_cmdline_2 (int argc, TCHAR **argv) @@ -488,12 +505,12 @@ void reset_all_systems (void) */ void do_start_program (void) { - if (quit_program == -1) + if (quit_program == -UAE_QUIT) return; /* Do a reset on startup. Whether this is elegant is debatable. */ - inputdevice_updateconfig (&currprefs); + inputdevice_updateconfig (&changed_prefs, &currprefs); if (quit_program >= 0) - quit_program = 2; + quit_program = UAE_RESET; m68k_go (1); } @@ -506,6 +523,7 @@ void do_leave_program (void) inputdevice_close (); DISK_free (); close_sound (); + dump_counts (); #ifdef CD32 akiko_free (); #endif @@ -539,6 +557,28 @@ void leave_program (void) do_leave_program (); } +void virtualdevice_init (void) +{ +#ifdef AUTOCONFIG + rtarea_setup (); +#endif +#ifdef FILESYS + rtarea_init (); + uaeres_install (); + hardfile_install (); +#endif +#ifdef AUTOCONFIG + expansion_init (); + emulib_install (); +#endif +#ifdef FILESYS + filesys_install (); +#endif +#if defined (BSDSOCKET) + bsdlib_install (); +#endif +} + static int real_main2 (int argc, TCHAR **argv) { #ifdef RASPBERRY @@ -608,36 +648,26 @@ static int real_main2 (int argc, TCHAR **argv) + memset (&gui_data, 0, sizeof gui_data); + gui_data.cd = -1; + gui_data.hd = -1; + +#ifdef PICASSO96 + picasso_reset (); +#endif + fixup_prefs (&currprefs); changed_prefs = currprefs; target_run (); /* force sound settings change */ currprefs.produce_sound = 0; -#ifdef AUTOCONFIG - rtarea_setup (); -#endif -#ifdef FILESYS - rtarea_init (); - uaeres_install (); - hardfile_install(); -#endif keybuf_init (); /* Must come after init_joystick */ -#ifdef AUTOCONFIG - expansion_init (); -#endif -#ifdef FILESYS - filesys_install (); -#endif - memory_init (); + memory_hardreset (2); memory_reset (); #ifdef AUTOCONFIG -#if defined (BSDSOCKET) - bsdlib_install (); -#endif - emulib_install (); native2amiga_install (); #endif @@ -649,7 +679,7 @@ static int real_main2 (int argc, TCHAR **argv) gui_update (); - if (graphics_init ()) { + if (graphics_init (true)) { if(!init_audio ()) { if (sound_available && currprefs.produce_sound > 1) { @@ -686,3 +716,8 @@ int main (int argc, TCHAR **argv) return 0; } #endif + +#ifdef SINGLEFILE +uae_u8 singlefile_config[50000] = { "_CONFIG_STARTS_HERE" }; +uae_u8 singlefile_data[1500000] = { "_DATA_STARTS_HERE" }; +#endif diff --git a/src/md-pandora/m68k.h b/src/md-pandora/m68k.h index 6422e479..15e8c133 100644 --- a/src/md-pandora/m68k.h +++ b/src/md-pandora/m68k.h @@ -151,7 +151,7 @@ struct flag_struct { #define COPY_CARRY() (regs.ccrflags.x = ((regs.ccrflags.nzcv >> 29) & 1)) -static inline int cctrue(struct flag_struct &flags, int cc) +STATIC_INLINE int cctrue(struct flag_struct &flags, int cc) { unsigned int nzcv = flags.nzcv; switch(cc){ @@ -216,7 +216,7 @@ struct flag_struct { #define COPY_CARRY() (regs.ccrflags.x = regs.ccrflags.c) -static inline int cctrue(struct flag_struct &flags, const int cc) +STATIC_INLINE int cctrue(struct flag_struct &flags, const int cc) { switch(cc){ case 0: return 1; /* T */ diff --git a/src/md-pandora/maccess.h b/src/md-pandora/maccess.h index 0e55fc2b..49db277a 100644 --- a/src/md-pandora/maccess.h +++ b/src/md-pandora/maccess.h @@ -9,16 +9,12 @@ #ifndef MACCESS_UAE_H #define MACCESS_UAE_H -#define likely(x) __builtin_expect((x),1) -#define unlikely(x) __builtin_expect((x),0) - - #ifdef ARMV6_ASSEMBLY STATIC_INLINE uae_u16 do_get_mem_word(uae_u16 *_GCCRES_ a) { uae_u16 v; - __asm__ __volatile__ ( + __asm__ ( "ldrh %[v], [%[a]] \n\t" "rev16 %[v], %[v] \n\t" : [v] "=r" (v) : [a] "r" (a) ); @@ -39,7 +35,7 @@ STATIC_INLINE uae_u16 do_get_mem_word(uae_u16 *_GCCRES_ a) STATIC_INLINE uae_u32 do_get_mem_long(uae_u32 *a) { uae_u32 v; - __asm__ __volatile__ ( + __asm__ ( "ldr %[v], [%[a]] \n\t" "rev %[v], %[v] \n\t" : [v] "=r" (v) : [a] "r" (a) ); @@ -63,7 +59,7 @@ STATIC_INLINE uae_u8 do_get_mem_byte(uae_u8 *_GCCRES_ a) #ifdef ARMV6_ASSEMBLY STATIC_INLINE void do_put_mem_word(uae_u16 *_GCCRES_ a, uae_u16 v) { - __asm__ __volatile__ ( + __asm__ ( "rev16 r2, %[v] \n\t" "strh r2, [%[a]] \n\t" : : [v] "r" (v), [a] "r" (a) : "r2", "memory" ); @@ -81,7 +77,7 @@ STATIC_INLINE void do_put_mem_word(uae_u16 *_GCCRES_ a, uae_u16 v) #ifdef ARMV6_ASSEMBLY STATIC_INLINE void do_put_mem_long(uae_u32 *_GCCRES_ a, uae_u32 v) { - __asm__ __volatile__ ( + __asm__ ( "rev r2, %[v] \n\t" "str r2, [%[a]] \n\t" : : [v] "r" (v), [a] "r" (a) : "r2", "memory" ); diff --git a/src/memory.cpp b/src/memory.cpp index 9c3355a0..9c478183 100644 --- a/src/memory.cpp +++ b/src/memory.cpp @@ -11,12 +11,12 @@ #include "options.h" #include "uae.h" -#include "ersatz.h" -#include "zfile.h" #include "memory.h" #include "rommgr.h" -#include "newcpu.h" +#include "ersatz.h" +#include "zfile.h" #include "custom.h" +#include "newcpu.h" #include "autoconf.h" #include "savestate.h" #include "crc32.h" @@ -27,6 +27,7 @@ /* Set by each memory handler that does not simply access real memory. */ int special_mem; #endif +static int mem_hardreset; uae_u32 allocated_chipmem; uae_u32 allocated_fastmem; @@ -34,9 +35,7 @@ uae_u32 allocated_bogomem; uae_u32 allocated_gfxmem; uae_u32 allocated_z3fastmem; -uae_u32 max_z3fastmem = 128 * 1024 * 1024; - -static size_t bootrom_filepos, chip_filepos, bogo_filepos, rom_filepos, a3000lmem_filepos, a3000hmem_filepos; +static size_t bootrom_filepos, chip_filepos, bogo_filepos, rom_filepos; /* Set if we notice during initialization that settings changed, and we must clear all memory to prevent bogus contents from confusing @@ -76,23 +75,35 @@ static int REGPARAM3 dummy_check (uaecptr addr, uae_u32 size) REGPARAM; #define NONEXISTINGDATA 0 //#define NONEXISTINGDATA 0xffffffff +STATIC_INLINE uae_u32 dummy_get (uaecptr addr, int size) +{ + uae_u32 v; + if (currprefs.cpu_model >= 68020) + return NONEXISTINGDATA; + v = (regs.irc << 16) | regs.irc; + if (size == 4) { + ; + } else if (size == 2) { + v &= 0xffff; + } else { + v = (addr & 1) ? (v & 0xff) : ((v >> 8) & 0xff); + } + return v; +} + static uae_u32 REGPARAM2 dummy_lget (uaecptr addr) { #ifdef JIT special_mem |= S_READ; #endif - if (currprefs.cpu_model >= 68020) - return NONEXISTINGDATA; - return (regs.irc << 16) | regs.irc; + return dummy_get (addr, 4); } uae_u32 REGPARAM2 dummy_lgeti (uaecptr addr) { #ifdef JIT special_mem |= S_READ; #endif - if (currprefs.cpu_model >= 68020) - return NONEXISTINGDATA; - return (regs.irc << 16) | regs.irc; + return dummy_get (addr, 4); } static uae_u32 REGPARAM2 dummy_wget (uaecptr addr) @@ -100,18 +111,14 @@ static uae_u32 REGPARAM2 dummy_wget (uaecptr addr) #ifdef JIT special_mem |= S_READ; #endif - if (currprefs.cpu_model >= 68020) - return NONEXISTINGDATA; - return regs.irc; + return dummy_get (addr, 2); } uae_u32 REGPARAM2 dummy_wgeti (uaecptr addr) { #ifdef JIT special_mem |= S_READ; #endif - if (currprefs.cpu_model >= 68020) - return NONEXISTINGDATA; - return regs.irc; + return dummy_get (addr, 2); } static uae_u32 REGPARAM2 dummy_bget (uaecptr addr) @@ -119,9 +126,7 @@ static uae_u32 REGPARAM2 dummy_bget (uaecptr addr) #ifdef JIT special_mem |= S_READ; #endif - if (currprefs.cpu_model >= 68020) - return NONEXISTINGDATA; - return (addr & 1) ? (regs.irc & 0xff) : ((regs.irc >> 8) & 0xff); + return dummy_get (addr, 1); } static void REGPARAM2 dummy_lput (uaecptr addr, uae_u32 l) @@ -209,41 +214,6 @@ void REGPARAM2 chipmem_bput (uaecptr addr, uae_u32 b) chipmemory[addr] = b; } -static uae_u32 REGPARAM2 chipmem_agnus_lget (uaecptr addr) -{ - uae_u32 *m; - - addr &= chipmem_full_mask; - m = (uae_u32 *)(chipmemory + addr); - return do_get_mem_long (m); -} - -uae_u32 REGPARAM2 chipmem_agnus_wget (uaecptr addr) -{ - uae_u16 *m; - - addr &= chipmem_full_mask; - m = (uae_u16 *)(chipmemory + addr); - return do_get_mem_word (m); -} - -static uae_u32 REGPARAM2 chipmem_agnus_bget (uaecptr addr) -{ - addr &= chipmem_full_mask; - return chipmemory[addr]; -} - -static void REGPARAM2 chipmem_agnus_lput (uaecptr addr, uae_u32 l) -{ - uae_u32 *m; - - addr &= chipmem_full_mask; - if (addr >= allocated_chipmem) - return; - m = (uae_u32 *)(chipmemory + addr); - do_put_mem_long (m, l); -} - void REGPARAM2 chipmem_agnus_wput (uaecptr addr, uae_u32 w) { uae_u16 *m; @@ -255,14 +225,6 @@ void REGPARAM2 chipmem_agnus_wput (uaecptr addr, uae_u32 w) do_put_mem_word (m, w); } -static void REGPARAM2 chipmem_agnus_bput (uaecptr addr, uae_u32 b) -{ - addr &= chipmem_full_mask; - if (addr >= allocated_chipmem) - return; - chipmemory[addr] = b; -} - static int REGPARAM2 chipmem_check (uaecptr addr, uae_u32 size) { addr &= chipmem_mask; @@ -568,13 +530,13 @@ uae_u8 *REGPARAM2 default_xlate (uaecptr a) } be_cnt++; if (be_cnt > 1000) { - uae_reset (0); + uae_reset (0, 0); be_cnt = 0; } else { regs.panic = 1; - regs.panic_pc = m68k_getpc (regs); + regs.panic_pc = m68k_getpc (); regs.panic_addr = a; - set_special (regs, SPCFLAG_BRK); + set_special (SPCFLAG_BRK); } } } @@ -733,14 +695,14 @@ static bool load_extendedkickstart (const TCHAR *romextfile, int type) zfile_fseek (f, off, SEEK_SET); switch (extendedkickmem_type) { case EXTENDED_ROM_CDTV: - extendedkickmem_start = 0xf00000; extendedkickmemory = mapped_malloc (extendedkickmem_size, _T("rom_f0")); extendedkickmem_bank.baseaddr = extendedkickmemory; + extendedkickmem_start = 0xf00000; break; case EXTENDED_ROM_CD32: - extendedkickmem_start = 0xe00000; extendedkickmemory = mapped_malloc (extendedkickmem_size, _T("rom_e0")); extendedkickmem_bank.baseaddr = extendedkickmemory; + extendedkickmem_start = 0xe00000; break; } if (extendedkickmemory) { @@ -772,7 +734,9 @@ static int patch_residents (uae_u8 *kickmemory, int size) j = 0; while (residents[j]) { if (!memcmp (residents[j], kickmemory + addr - base, strlen (residents[j]) + 1)) { - write_log (_T("KSPatcher: '%s' at %08X disabled\n"), residents[j], i + base); + TCHAR *s = au (residents[j]); + write_log (_T("KSPatcher: '%s' at %08X disabled\n"), s, i + base); + xfree (s); kickmemory[i] = 0x4b; /* destroy RTC_MATCHWORD */ patched++; break; @@ -889,6 +853,7 @@ static int load_kickstart (void) extendedkickmem_size = 0x80000; extendedkickmem_type = EXTENDED_ROM_KS; extendedkickmemory = mapped_malloc (extendedkickmem_size, _T("rom_e0")); + extendedkickmem_start = 0xe00000; extendedkickmem_bank.baseaddr = extendedkickmemory; zfile_fseek (f, extpos, SEEK_SET); read_kickstart (f, extendedkickmemory, extendedkickmem_size, 0, 1); @@ -903,6 +868,7 @@ static int load_kickstart (void) zfile_fseek (f, extpos + 524288 * 2, SEEK_SET); read_kickstart (f, extendedkickmemory2 + 524288, 524288, 0, 1); extendedkickmem2_mask = extendedkickmem2_size - 1; + extendedkickmem2_start = 0xa80000; } } @@ -946,7 +912,7 @@ static void allocate_memory (void) write_log (_T("Fatal error: out of memory for chipmem.\n")); allocated_chipmem = 0; } else { - need_hardreset = 1; + need_hardreset = true; if (memsize > allocated_chipmem) memset (chipmemory + allocated_chipmem, 0xff, memsize - allocated_chipmem); } @@ -976,12 +942,14 @@ static void allocate_memory (void) allocated_bogomem = 0; } } - need_hardreset = 1; + need_hardreset = true; } if (savestate_state == STATE_RESTORE) { if (bootrom_filepos) { + protect_roms (false); restore_ram (bootrom_filepos, rtarea); + protect_roms (true); } restore_ram (chip_filepos, chipmemory); if (allocated_bogomem > 0) @@ -998,11 +966,12 @@ void map_overlay (int chip) { int size; addrbank *cb; - int currPC = m68k_getpc(regs); + int currPC = m68k_getpc(); size = allocated_chipmem >= 0x180000 ? (allocated_chipmem >> 16) : 32; cb = &chipmem_bank; if (chip) { + map_banks (&dummy_bank, 0, 32, 0); map_banks (cb, 0, size, allocated_chipmem); } else { addrbank *rb = NULL; @@ -1019,7 +988,7 @@ void map_overlay (int chip) map_banks (rb, 0, size, 0x80000); } if (!isrestore () && valid_address (regs.pc, 4)) - m68k_setpc(regs, currPC); + m68k_setpc(currPC); } uae_s32 getz2size (struct uae_prefs *p) @@ -1049,32 +1018,52 @@ uae_u32 getz2endaddr (void) return start + 2 * 1024 * 1024; } +void memory_clear (void) +{ + mem_hardreset = 0; + if (savestate_state == STATE_RESTORE) + return; + if (chipmemory) + memset (chipmemory, 0, allocated_chipmem); + if (bogomemory) + memset (bogomemory, 0, allocated_bogomem); + expansion_clear (); +} + void memory_reset (void) { int bnk, bnk_end; + bool gayleorfatgary; + need_hardreset = false; + /* Use changed_prefs, as m68k_reset is called later. */ + if (last_address_space_24 != changed_prefs.address_space_24) + need_hardreset = true; + last_address_space_24 = changed_prefs.address_space_24; + + if (mem_hardreset > 2) + memory_init (); + + be_cnt = 0; currprefs.chipmem_size = changed_prefs.chipmem_size; currprefs.bogomem_size = changed_prefs.bogomem_size; - need_hardreset = 0; - /* Use changed_prefs, as m68k_reset is called later. */ - if (last_address_space_24 != changed_prefs.address_space_24) - need_hardreset = 1; - - last_address_space_24 = changed_prefs.address_space_24; + gayleorfatgary = (currprefs.chipset_mask & CSMASK_AGA); init_mem_banks (); allocate_memory (); - if (_tcscmp (currprefs.romfile, changed_prefs.romfile) != 0 + if (mem_hardreset > 1 + || _tcscmp (currprefs.romfile, changed_prefs.romfile) != 0 || _tcscmp (currprefs.romextfile, changed_prefs.romextfile) != 0) { + protect_roms (false); write_log (_T("ROM loader.. (%s)\n"), currprefs.romfile); kickstart_rom = 1; memcpy (currprefs.romfile, changed_prefs.romfile, sizeof currprefs.romfile); memcpy (currprefs.romextfile, changed_prefs.romextfile, sizeof currprefs.romextfile); - need_hardreset = 1; + need_hardreset = true; mapped_free (extendedkickmemory); extendedkickmemory = 0; extendedkickmem_size = 0; @@ -1106,7 +1095,7 @@ void memory_reset (void) if (rd->cloanto) cloanto_rom = 1; kickstart_rom = 0; - if ((rd->type & ROMTYPE_SPECIALKICK | ROMTYPE_KICK) == ROMTYPE_KICK) + if ((rd->type & (ROMTYPE_SPECIALKICK | ROMTYPE_KICK)) == ROMTYPE_KICK) kickstart_rom = 1; } else { write_log (_T("Unknown ROM '%s' loaded\n"), currprefs.romfile); @@ -1114,6 +1103,7 @@ void memory_reset (void) } patch_kick (); write_log (_T("ROM loader end\n")); + protect_roms (true); } map_banks (&custom_bank, 0xC0, 0xE0 - 0xC0, 0); @@ -1126,9 +1116,10 @@ void memory_reset (void) bnk = allocated_chipmem >> 16; if (bnk < 0x20 + (currprefs.fastmem_size >> 16)) bnk = 0x20 + (currprefs.fastmem_size >> 16); - bnk_end = (currprefs.chipset_mask & CSMASK_AGA) ? 0xBF : 0xA0; + bnk_end = gayleorfatgary ? 0xBF : 0xA0; map_banks (&dummy_bank, bnk, bnk_end - bnk, 0); - if (currprefs.chipset_mask & CSMASK_AGA) { + if (gayleorfatgary) { + // a3000 or a4000 = custom chips from 0xc0 to 0xd0 map_banks (&dummy_bank, 0xc0, 0xd8 - 0xc0, 0); } @@ -1141,9 +1132,11 @@ void memory_reset (void) map_banks (&bogomem_bank, 0xC0, t, 0); } map_banks (&clock_bank, 0xDC, 1, 0); +#ifdef CD32 if (currprefs.cs_cd32c2p || currprefs.cs_cd32cd || currprefs.cs_cd32nvram) { map_banks (&akiko_bank, AKIKO_BASE >> 16, 1, 0); } +#endif map_banks (&kickmem_bank, 0xF8, 8, 0); /* map beta Kickstarts at 0x200000/0xC00000/0xF00000 */ @@ -1182,14 +1175,25 @@ void memory_reset (void) if ((cloanto_rom) && !extendedkickmem_type) map_banks (&kickmem_bank, 0xE0, 8, 0); - if (extendedkickmem_type == EXTENDED_ROM_CD32 || extendedkickmem_type == EXTENDED_ROM_KS) - map_banks (&extendedkickmem_bank, 0xb0, 8, 0); + if (currprefs.chipset_mask & CSMASK_AGA) { + if (extendedkickmem_type == EXTENDED_ROM_CD32 || extendedkickmem_type == EXTENDED_ROM_KS) + map_banks (&extendedkickmem_bank, 0xb0, 8, 0); + else + map_banks (&kickmem_bank, 0xb0, 8, 0); + map_banks (&kickmem_bank, 0xa8, 8, 0); + } + if (mem_hardreset) { + memory_clear (); + } write_log (_T("memory init end\n")); } void memory_init (void) { + init_mem_banks (); + virtualdevice_init (); + allocated_chipmem = 0; allocated_bogomem = 0; kickmemory = 0; @@ -1201,8 +1205,6 @@ void memory_init (void) chipmemory = 0; bogomemory = 0; - init_mem_banks (); - kickmemory = mapped_malloc (0x80000, _T("kick")); memset (kickmemory, 0, 0x80000); kickmem_bank.baseaddr = kickmemory; @@ -1232,15 +1234,10 @@ void memory_cleanup (void) init_mem_banks (); } -void memory_hardreset(void) +void memory_hardreset (int mode) { - if (savestate_state == STATE_RESTORE) - return; - if (chipmemory) - memset (chipmemory, 0, allocated_chipmem); - if (bogomemory) - memset (bogomemory, 0, allocated_bogomem); - expansion_clear(); + if (mode + 1 > mem_hardreset) + mem_hardreset = mode + 1; } void map_banks (addrbank *bank, int start, int size, int realsize) @@ -1373,7 +1370,8 @@ uae_u8 *restore_rom (uae_u8 *src) } xfree (s); if (!crcdet) - write_log (_T("WARNING: ROM '%s' not found!\n"), romn); + write_log (_T("WARNING: ROM '%s' %d.%d (CRC32=%08x %08x-%08x) not found!\n"), + romn, version >> 16, version & 0xffff, crc32, mem_start, mem_start + mem_size - 1); xfree (romn); return src; @@ -1422,6 +1420,9 @@ uae_u8 *save_rom (int first, int *len, uae_u8 *dstptr) mem_real_start = extendedkickmemory; mem_size = extendedkickmem_size; path = currprefs.romextfile; + version = longget (mem_start + 12); /* version+revision */ + if (version == 0xffffffff) + version = longget (mem_start + 16); _stprintf (tmpname, _T("Extended")); break; default: @@ -1482,16 +1483,16 @@ uae_char *strcpyah_safe (uae_char *dst, uaecptr src, int maxsize) { uae_char *res = dst; uae_u8 b; + dst[0] = 0; do { if (!addr_valid (_T("_tcscpyah"), src, 1)) return res; b = get_byte(src++); *dst++ = b; + *dst = 0; maxsize--; - if (maxsize <= 1) { - *dst++= 0; + if (maxsize <= 1) break; - } } while (b); return res; } diff --git a/src/native2amiga.cpp b/src/native2amiga.cpp index bfcefffd..a4a6d2b9 100644 --- a/src/native2amiga.cpp +++ b/src/native2amiga.cpp @@ -15,8 +15,8 @@ #include "td-sdl/thread.h" #include "options.h" #include "memory.h" -#include "newcpu.h" #include "custom.h" +#include "newcpu.h" #include "autoconf.h" #include "traps.h" #include "native2amiga.h" @@ -112,21 +112,21 @@ void uae_NotificationHack(uaecptr port, uaecptr nr) void uae_NewList(uaecptr list) { - put_long (list, list + 4); - put_long (list + 4, 0); - put_long (list + 8, list); + x_put_long (list, list + 4); + x_put_long (list + 4, 0); + x_put_long (list + 8, list); } -uaecptr uae_AllocMem (TrapContext *context, uae_u32 size, uae_u32 flags) +uaecptr uae_AllocMem (TrapContext *context, uae_u32 size, uae_u32 flags, uaecptr sysbase) { m68k_dreg (regs, 0) = size; m68k_dreg (regs, 1) = flags; - return CallLib (context, get_long (4), -198); /* AllocMem */ + return CallLib (context, sysbase, -198); /* AllocMem */ } -void uae_FreeMem (TrapContext *context, uaecptr memory, uae_u32 size) +void uae_FreeMem (TrapContext *context, uaecptr memory, uae_u32 size, uaecptr sysbase) { m68k_dreg (regs, 0) = size; m68k_areg (regs, 1) = memory; - CallLib (context, get_long (4), -0xD2); /* FreeMem */ + CallLib (context, sysbase, -0xD2); /* FreeMem */ } diff --git a/src/newcpu.cpp b/src/newcpu.cpp index 774ca5b1..d026b71e 100644 --- a/src/newcpu.cpp +++ b/src/newcpu.cpp @@ -37,8 +37,8 @@ #include "options.h" #include "uae.h" #include "memory.h" -#include "newcpu.h" #include "custom.h" +#include "newcpu.h" #include "cpu_prefetch.h" #include "autoconf.h" #include "traps.h" @@ -48,7 +48,7 @@ #include "blitter.h" #include "ar.h" #include "cia.h" -#include +#include "inputdevice.h" #ifdef JIT #include "jit/compemu.h" @@ -82,6 +82,7 @@ cpuop_func *cpufunctbl[65536]; extern uae_u32 get_fpsr(void); +#define COUNT_INSTRS 0 #define MC68060_PCR 0x04300000 #define MC68EC060_PCR 0x04310000 @@ -89,26 +90,64 @@ static uae_u64 srp_030, crp_030; static uae_u32 tt0_030, tt1_030, tc_030; static uae_u16 mmusr_030; -uae_u32 (*x_next_iword)(struct regstruct ®s); -uae_u32 (*x_next_ilong)(struct regstruct ®s); +#if COUNT_INSTRS +static unsigned long int instrcount[65536]; +static uae_u16 opcodenums[65536]; -// indirect memory access functions -static void set_x_funcs (void) +static int compfn (const void *el1, const void *el2) { - if (currprefs.cpu_model < 68020) { - if (currprefs.cpu_compatible) { - x_next_iword = NULL; - x_next_ilong = NULL; - } else { - x_next_iword = next_iword; - x_next_ilong = next_ilong; - } - } else { - x_next_iword = next_iword; - x_next_ilong = next_ilong; - } + return instrcount[*(const uae_u16 *)el1] < instrcount[*(const uae_u16 *)el2]; } +static TCHAR *icountfilename (void) +{ + TCHAR *name = getenv ("INSNCOUNT"); + if (name) + return name; + return COUNT_INSTRS == 2 ? "frequent.68k" : "insncount"; +} + +void dump_counts (void) +{ + FILE *f = fopen (icountfilename (), "w"); + unsigned long int total; + int i; + + write_log (_T("Writing instruction count file...\n")); + for (i = 0; i < 65536; i++) { + opcodenums[i] = i; + total += instrcount[i]; + } + qsort (opcodenums, 65536, sizeof (uae_u16), compfn); + + fprintf (f, "Total: %lu\n", total); + for (i=0; i < 65536; i++) { + unsigned long int cnt = instrcount[opcodenums[i]]; + struct instr *dp; + struct mnemolookup *lookup; + if (!cnt) + break; + dp = table68k + opcodenums[i]; + for (lookup = lookuptab;lookup->mnemo != dp->mnemo; lookup++) + ; + fprintf (f, "%04x: %lu %s\n", opcodenums[i], cnt, lookup->name); + } + fclose (f); +} + +STATIC_INLINE void count_instr (unsigned int opcode) +{ + instrcount[opcode]++; +} +#else +void dump_counts (void) +{ +} +STATIC_INLINE void count_instr (unsigned int opcode) +{ +} +#endif + static void set_cpu_caches(void) { #ifdef JIT @@ -142,7 +181,12 @@ static void set_cpu_caches(void) STATIC_INLINE uae_u32 op_illg_1 (uae_u32 opcode, struct regstruct ®s) { - op_illg (opcode, regs); + op_illg (opcode); + return 4; +} +static uae_u32 REGPARAM2 op_unimpl_1 (uae_u32 opcode, struct regstruct ®s) +{ + op_illg (opcode); return 4; } @@ -209,19 +253,31 @@ static void build_cpufunctbl (void) } for (opcode = 0; opcode < 65536; opcode++) { cpuop_func *f; + instr *table = &table68k[opcode]; - if (table68k[opcode].mnemo == i_ILLG) + if (table->mnemo == i_ILLG) continue; + + /* unimplemented opcode? */ + if (table->unimpclev > 0 && lvl >= table->unimpclev) { + if (currprefs.cpu_compatible && currprefs.cpu_model == 68060) { + cpufunctbl[opcode] = op_unimpl_1; + } else { + cpufunctbl[opcode] = op_illg_1; + } + continue; + } + if (currprefs.fpu_model && currprefs.cpu_model < 68020) { /* more hack fpu to 68000/68010 mode */ - if (table68k[opcode].clev > lvl && (opcode & 0xfe00) != 0xf200) + if (table->clev > lvl && (opcode & 0xfe00) != 0xf200) continue; - } else if (table68k[opcode].clev > lvl) { + } else if (table->clev > lvl) { continue; } - if (table68k[opcode].handler != -1) { - int idx = table68k[opcode].handler; + if (table->handler != -1) { + int idx = table->handler; f = cpufunctbl[idx]; if (f == op_illg_1) abort(); @@ -237,13 +293,17 @@ static void build_cpufunctbl (void) void fill_prefetch (void) { - regs.ir = get_word (m68k_getpc (regs)); - regs.irc = get_word (m68k_getpc (regs) + 2); + if (currprefs.cpu_model >= 68020) + return; + regs.ir = x_get_word (m68k_getpc ()); + regs.irc = x_get_word (m68k_getpc () + 2); } static void fill_prefetch_quick (void) { - regs.ir = get_word (m68k_getpc (regs)); - regs.irc = get_word (m68k_getpc (regs) + 2); + if (currprefs.cpu_model >= 68020) + return; + regs.ir = get_word (m68k_getpc ()); + regs.irc = get_word (m68k_getpc () + 2); } unsigned long cycles_shift; @@ -318,14 +378,17 @@ void check_prefs_changed_cpu (void) build_cpufunctbl (); changed = true; } - if (changed || currprefs.m68k_speed != changed_prefs.m68k_speed) { + if (changed + || currprefs.m68k_speed != changed_prefs.m68k_speed) { currprefs.m68k_speed = changed_prefs.m68k_speed; update_68k_cycles (); changed = true; } + if (changed) { - set_special (regs, SPCFLAG_BRK); + set_special (SPCFLAG_BRK); reset_frame_rate_hack (); + set_speedup_values(); } } @@ -346,6 +409,9 @@ void init_m68k (void) movem_next[i] = i & (~(1 << j)); } +#if COUNT_INSTRS + memset (instrcount, 0, sizeof instrcount); +#endif write_log (_T("Building CPU table for configuration: %d"), currprefs.cpu_model); regs.address_space_mask = 0xffffffff; if (currprefs.cpu_compatible) { @@ -354,8 +420,13 @@ void init_m68k (void) } if (currprefs.fpu_model > 0) write_log (_T("/%d"), currprefs.fpu_model); - if (currprefs.cpu_compatible) - write_log (_T(" prefetch")); + if (currprefs.cpu_compatible) { + if (currprefs.cpu_model <= 68020) { + write_log (_T(" prefetch")); + } else { + write_log (_T(" fake prefetch")); + } + } if (currprefs.address_space_24) { regs.address_space_mask = 0x00ffffff; write_log (_T(" 24-bit")); @@ -366,7 +437,6 @@ void init_m68k (void) do_merges (); build_cpufunctbl (); - set_x_funcs (); #ifdef JIT /* We need to check whether NATMEM settings have changed @@ -375,7 +445,7 @@ void init_m68k (void) #endif } -unsigned long int nextevent, is_syncline, currcycle; +unsigned long nextevent, is_syncline, currcycle; struct regstruct regs; @@ -465,7 +535,7 @@ void REGPARAM2 put_bitfield (uae_u32 dst, uae_u32 bdata[2], uae_u32 val, uae_s32 } } -uae_u32 REGPARAM2 get_disp_ea_020 (struct regstruct ®s, uae_u32 base, uae_u32 dp) +uae_u32 REGPARAM2 _get_disp_ea_020 (struct regstruct ®s, uae_u32 base, uae_u32 dp) { int reg = (dp >> 12) & 15; uae_s32 regd = regs.regs[reg]; @@ -541,9 +611,6 @@ void REGPARAM2 MakeFromSR (struct regstruct ®s) regs.m = (regs.sr >> 12) & 1; regs.intmask = (regs.sr >> 8) & 7; if (currprefs.cpu_model >= 68020) { - /* 68060 does not have MSP but does have M-bit.. */ - if (currprefs.cpu_model >= 68060) - regs.msp = regs.isp; if (olds != regs.s) { if (olds) { if (oldm) @@ -564,8 +631,6 @@ void REGPARAM2 MakeFromSR (struct regstruct ®s) m68k_areg (regs, 7) = regs.msp; } } - if (currprefs.cpu_model >= 68060) - regs.t0 = 0; } else { regs.t0 = regs.m = 0; if (olds != regs.s) { @@ -581,11 +646,11 @@ void REGPARAM2 MakeFromSR (struct regstruct ®s) doint(); if (regs.t1 || regs.t0) - set_special (regs, SPCFLAG_TRACE); + set_special (SPCFLAG_TRACE); else /* Keep SPCFLAG_DOTRACE, we still want a trace exception for SR-modifying instructions (including STOP). */ - unset_special (regs, SPCFLAG_TRACE); + unset_special (SPCFLAG_TRACE); } static void add_approximate_exception_cycles(int nr) @@ -618,8 +683,7 @@ static void add_approximate_exception_cycles(int nr) break; } } - } - else { + } else { // 68000 exceptions if (nr >= 24 && nr <= 31) { /* Interrupts */ @@ -641,8 +705,8 @@ static void add_approximate_exception_cycles(int nr) case 10: cycles = 34 * CYCLE_UNIT / 2; break; /* Line-A */ case 11: cycles = 34 * CYCLE_UNIT / 2; break; /* Line-F */ default: - cycles = 4 * CYCLE_UNIT / 2; - break; + cycles = 4 * CYCLE_UNIT / 2; + break; } } } @@ -652,13 +716,13 @@ static void add_approximate_exception_cycles(int nr) static void exception_trace (int nr) { - unset_special (regs, SPCFLAG_TRACE | SPCFLAG_DOTRACE); + unset_special (SPCFLAG_TRACE | SPCFLAG_DOTRACE); if (regs.t1 && !regs.t0) { /* trace stays pending if exception is div by zero, chk, * trapv or trap #x */ if (nr == 5 || nr == 6 || nr == 7 || (nr >= 32 && nr <= 47)) - set_special (regs, SPCFLAG_DOTRACE); + set_special (SPCFLAG_DOTRACE); } regs.t1 = regs.t0 = regs.m = 0; } @@ -667,17 +731,17 @@ static uae_u32 exception_pc (int nr) { // zero divide, chk, trapcc/trapv, trace, trap# if (nr == 5 || nr == 6 || nr == 7 || nr == 9 || (nr >= 32 && nr <= 47)) - return m68k_getpc (regs); + return m68k_getpc (); return regs.instruction_pc; } -void REGPARAM2 Exception (int nr, struct regstruct ®s) +void REGPARAM2 _Exception (int nr, struct regstruct ®s) { uae_u32 currpc, newpc; int sv = regs.s; if (currprefs.cachesize) - regs.instruction_pc = m68k_getpc (regs); + regs.instruction_pc = m68k_getpc (); if (nr >= 24 && nr < 24 + 8 && currprefs.cpu_model <= 68010) nr = get_byte (0x00fffff1 | (nr << 1)); @@ -704,33 +768,33 @@ void REGPARAM2 Exception (int nr, struct regstruct ®s) // 68040 bus error (not really, some garbage?) for (i = 0 ; i < 18 ; i++) { m68k_areg(regs, 7) -= 2; - put_word (m68k_areg(regs, 7), 0); + x_put_word (m68k_areg(regs, 7), 0); } m68k_areg(regs, 7) -= 4; - put_long (m68k_areg(regs, 7), last_fault_for_exception_3); + x_put_long (m68k_areg(regs, 7), last_fault_for_exception_3); m68k_areg(regs, 7) -= 2; - put_word (m68k_areg(regs, 7), 0); + x_put_word (m68k_areg(regs, 7), 0); m68k_areg(regs, 7) -= 2; - put_word (m68k_areg(regs, 7), 0); + x_put_word (m68k_areg(regs, 7), 0); m68k_areg(regs, 7) -= 2; - put_word (m68k_areg(regs, 7), 0); + x_put_word (m68k_areg(regs, 7), 0); m68k_areg(regs, 7) -= 2; - put_word (m68k_areg(regs, 7), 0x0140 | (sv ? 6 : 2)); /* SSW */ + x_put_word (m68k_areg(regs, 7), 0x0140 | (sv ? 6 : 2)); /* SSW */ m68k_areg(regs, 7) -= 4; - put_long (m68k_areg(regs, 7), last_addr_for_exception_3); + x_put_long (m68k_areg(regs, 7), last_addr_for_exception_3); m68k_areg(regs, 7) -= 2; - put_word (m68k_areg(regs, 7), 0x7000 + nr * 4); + x_put_word (m68k_areg(regs, 7), 0x7000 + nr * 4); m68k_areg (regs, 7) -= 4; - put_long (m68k_areg (regs, 7), regs.instruction_pc); + x_put_long (m68k_areg (regs, 7), regs.instruction_pc); m68k_areg (regs, 7) -= 2; - put_word (m68k_areg (regs, 7), regs.sr); + x_put_word (m68k_areg (regs, 7), regs.sr); goto kludge_me_do; } else { m68k_areg(regs, 7) -= 4; - put_long (m68k_areg(regs, 7), last_fault_for_exception_3); + x_put_long (m68k_areg(regs, 7), last_fault_for_exception_3); m68k_areg(regs, 7) -= 2; - put_word (m68k_areg(regs, 7), 0x2000 + nr * 4); + x_put_word (m68k_areg(regs, 7), 0x2000 + nr * 4); } } else { // 68020 address error @@ -739,76 +803,76 @@ void REGPARAM2 Exception (int nr, struct regstruct ®s) ssw |= 0x20; for (i = 0 ; i < 36; i++) { m68k_areg(regs, 7) -= 2; - put_word (m68k_areg(regs, 7), 0); + x_put_word (m68k_areg(regs, 7), 0); } m68k_areg(regs, 7) -= 4; - put_long (m68k_areg(regs, 7), last_fault_for_exception_3); + x_put_long (m68k_areg(regs, 7), last_fault_for_exception_3); m68k_areg(regs, 7) -= 2; - put_word (m68k_areg(regs, 7), 0); + x_put_word (m68k_areg(regs, 7), 0); m68k_areg(regs, 7) -= 2; - put_word (m68k_areg(regs, 7), 0); + x_put_word (m68k_areg(regs, 7), 0); m68k_areg(regs, 7) -= 2; - put_word (m68k_areg(regs, 7), 0); + x_put_word (m68k_areg(regs, 7), 0); m68k_areg(regs, 7) -= 2; - put_word (m68k_areg(regs, 7), ssw); + x_put_word (m68k_areg(regs, 7), ssw); m68k_areg(regs, 7) -= 2; - put_word (m68k_areg(regs, 7), 0xb000 + nr * 4); + x_put_word (m68k_areg(regs, 7), 0xb000 + nr * 4); } - write_log (_T("Exception %d (%x) at %x -> %x!\n"), nr, regs.instruction_pc, currpc, get_long (regs.vbr + 4*nr)); + write_log (_T("Exception %d (%x) at %x -> %x!\n"), nr, regs.instruction_pc, currpc, x_get_long (regs.vbr + 4*nr)); } else if (nr ==5 || nr == 6 || nr == 7 || nr == 9) { m68k_areg(regs, 7) -= 4; - put_long (m68k_areg(regs, 7), regs.instruction_pc); + x_put_long (m68k_areg(regs, 7), regs.instruction_pc); m68k_areg(regs, 7) -= 2; - put_word (m68k_areg(regs, 7), 0x2000 + nr * 4); + x_put_word (m68k_areg(regs, 7), 0x2000 + nr * 4); } else if (regs.m && nr >= 24 && nr < 32) { /* M + Interrupt */ m68k_areg(regs, 7) -= 2; - put_word (m68k_areg(regs, 7), nr * 4); + x_put_word (m68k_areg(regs, 7), nr * 4); m68k_areg(regs, 7) -= 4; - put_long (m68k_areg(regs, 7), currpc); + x_put_long (m68k_areg(regs, 7), currpc); m68k_areg(regs, 7) -= 2; - put_word (m68k_areg(regs, 7), regs.sr); + x_put_word (m68k_areg(regs, 7), regs.sr); regs.sr |= (1 << 13); regs.msp = m68k_areg(regs, 7); m68k_areg(regs, 7) = regs.isp; m68k_areg(regs, 7) -= 2; - put_word (m68k_areg(regs, 7), 0x1000 + nr * 4); + x_put_word (m68k_areg(regs, 7), 0x1000 + nr * 4); } else { m68k_areg(regs, 7) -= 2; - put_word (m68k_areg(regs, 7), nr * 4); + x_put_word (m68k_areg(regs, 7), nr * 4); } } else { - currpc = m68k_getpc (regs); + currpc = m68k_getpc (); if (nr == 2 || nr == 3) { // 68000 address error uae_u16 mode = (sv ? 4 : 0) | (last_instructionaccess_for_exception_3 ? 2 : 1); mode |= last_writeaccess_for_exception_3 ? 0 : 16; m68k_areg(regs, 7) -= 14; /* fixme: bit3=I/N */ - put_word (m68k_areg(regs, 7) + 0, mode); - put_long (m68k_areg(regs, 7) + 2, last_fault_for_exception_3); - put_word (m68k_areg(regs, 7) + 6, last_op_for_exception_3); - put_word (m68k_areg(regs, 7) + 8, regs.sr); - put_long (m68k_areg(regs, 7) + 10, last_addr_for_exception_3); - write_log (_T("Exception %d (%x) at %x -> %x!\n"), nr, last_fault_for_exception_3, currpc, get_long (regs.vbr + 4*nr)); + x_put_word (m68k_areg(regs, 7) + 0, mode); + x_put_long (m68k_areg(regs, 7) + 2, last_fault_for_exception_3); + x_put_word (m68k_areg(regs, 7) + 6, last_op_for_exception_3); + x_put_word (m68k_areg(regs, 7) + 8, regs.sr); + x_put_long (m68k_areg(regs, 7) + 10, last_addr_for_exception_3); + write_log (_T("Exception %d (%x) at %x -> %x!\n"), nr, last_fault_for_exception_3, currpc, x_get_long (regs.vbr + 4*nr)); goto kludge_me_do; } } m68k_areg(regs, 7) -= 4; - put_long (m68k_areg(regs, 7), currpc); + x_put_long (m68k_areg(regs, 7), currpc); m68k_areg(regs, 7) -= 2; - put_word (m68k_areg(regs, 7), regs.sr); + x_put_word (m68k_areg(regs, 7), regs.sr); kludge_me_do: - newpc = get_long (regs.vbr + 4 * nr); + newpc = x_get_long (regs.vbr + 4 * nr); if (newpc & 1) { if (nr == 2 || nr == 3) - uae_reset (1); /* there is nothing else we can do.. */ + uae_reset (1, 0); /* there is nothing else we can do.. */ else exception3 (regs.ir, newpc); return; } - m68k_setpc (regs, newpc); + m68k_setpc (newpc); #ifdef JIT - set_special(regs, SPCFLAG_END_COMPILE); + set_special(SPCFLAG_END_COMPILE); #endif fill_prefetch (); exception_trace (nr); @@ -817,9 +881,9 @@ kludge_me_do: STATIC_INLINE void do_interrupt(int nr, struct regstruct ®s) { regs.stopped = 0; - unset_special (regs, SPCFLAG_STOP); + unset_special (SPCFLAG_STOP); - Exception (nr + 24, regs); + Exception (nr + 24); regs.intmask = nr; doint(); @@ -829,14 +893,7 @@ int movec_illg (int regno) { int regno2 = regno & 0x7ff; - if (currprefs.cpu_model == 68060) { - if (regno <= 8) - return 0; - if (regno == 0x800 || regno == 0x801 || - regno == 0x806 || regno == 0x807 || regno == 0x808) - return 0; - return 1; - } else if (currprefs.cpu_model == 68010) { + if (currprefs.cpu_model == 68010) { if (regno2 < 2) return 0; return 1; @@ -865,7 +922,7 @@ int movec_illg (int regno) int m68k_move2c (int regno, uae_u32 *regp) { if (movec_illg (regno)) { - op_illg (0x4E7B, regs); + op_illg (0x4E7B); return 0; } else { switch (regno) { @@ -880,15 +937,13 @@ int m68k_move2c (int regno, uae_u32 *regp) cacr_mask = 0x00003f1f; else if (currprefs.cpu_model == 68040) cacr_mask = 0x80008000; - else if (currprefs.cpu_model == 68060) - cacr_mask = 0xf8e0e000; regs.cacr = *regp & cacr_mask; set_cpu_caches(); } break; /* 68040/060 only */ case 3: - regs.tcr = *regp & (currprefs.cpu_model == 68060 ? 0xfffe : 0xc000); + regs.tcr = *regp & 0xc000; break; /* no differences between 68040 and 68060 */ @@ -922,7 +977,7 @@ int m68k_move2c (int regno, uae_u32 *regp) } break; default: - op_illg (0x4E7B, regs); + op_illg (0x4E7B); return 0; } } @@ -932,7 +987,7 @@ int m68k_move2c (int regno, uae_u32 *regp) int m68k_movec2 (int regno, uae_u32 *regp) { if (movec_illg (regno)) { - op_illg (0x4E7A, regs); + op_illg (0x4E7A); return 0; } else { switch (regno) { @@ -948,8 +1003,6 @@ int m68k_movec2 (int regno, uae_u32 *regp) cacr_mask = 0x00003313; else if (currprefs.cpu_model == 68040) cacr_mask = 0x80008000; - else if (currprefs.cpu_model == 68060) - cacr_mask = 0xf880e000; *regp = v & cacr_mask; } break; @@ -971,7 +1024,7 @@ int m68k_movec2 (int regno, uae_u32 *regp) case 0x808: *regp = regs.pcr; break; default: - op_illg (0x4E7A, regs); + op_illg (0x4E7A); return 0; } } @@ -1004,12 +1057,12 @@ STATIC_INLINE int div_unsigned(uae_u32 src_hi, uae_u32 src_lo, uae_u32 div, uae_ void m68k_divl (uae_u32 opcode, uae_u32 src, uae_u16 extra) { -#if defined(uae_s64) // Done in caller //if (src == 0) { - // Exception (5, regs); + // Exception (5); // return; //} +#if defined(uae_s64) if (extra & 0x800) { /* signed variant */ uae_s64 a = (uae_s64)(uae_s32)m68k_dreg(regs, (extra >> 12) & 7); @@ -1061,11 +1114,6 @@ void m68k_divl (uae_u32 opcode, uae_u32 src, uae_u16 extra) } } #else - // Done in caller - //if (src == 0) { - // Exception (5, regs); - // return; - //} if (extra & 0x800) { /* signed variant */ uae_s32 lo = (uae_s32)m68k_dreg(regs, (extra >> 12) & 7); @@ -1238,7 +1286,7 @@ void m68k_reset (int hardreset) regs.spcflags = 0; #ifdef SAVESTATE if (isrestore ()) { - m68k_setpc (regs, regs.pc); + m68k_setpc (regs.pc); SET_XFLG ((regs.sr >> 4) & 1); SET_NFLG ((regs.sr >> 3) & 1); SET_ZFLG ((regs.sr >> 2) & 1); @@ -1258,7 +1306,7 @@ void m68k_reset (int hardreset) } #endif m68k_areg (regs, 7) = get_long (0); - m68k_setpc (regs, get_long (4)); + m68k_setpc (get_long (4)); regs.s = 1; regs.m = 0; regs.stopped = 0; @@ -1300,9 +1348,14 @@ void m68k_reset (int hardreset) fill_prefetch_quick (); } -unsigned long REGPARAM2 op_illg (uae_u32 opcode, struct regstruct ®s) +void REGPARAM2 _op_unimpl (struct regstruct ®s) { - uaecptr pc = m68k_getpc (regs); + Exception (61); +} + +uae_u32 REGPARAM2 _op_illg (uae_u32 opcode, struct regstruct ®s) +{ + uaecptr pc = m68k_getpc (); int inrom = in_rom(pc); int inrt = in_rtarea(pc); @@ -1335,15 +1388,15 @@ unsigned long REGPARAM2 op_illg (uae_u32 opcode, struct regstruct ®s) #endif if ((opcode & 0xF000) == 0xF000) { - Exception (0xB, regs); + Exception (0xB); return 4; } if ((opcode & 0xF000) == 0xA000) { - Exception (0xA, regs); + Exception (0xA); return 4; } - Exception (4, regs); + Exception (4); return 4; } @@ -1351,72 +1404,79 @@ unsigned long REGPARAM2 op_illg (uae_u32 opcode, struct regstruct ®s) static void mmu_op30_pmove(uaecptr pc, uae_u32 opcode, uae_u16 next, uaecptr extra) { + int mode = (opcode >> 3) & 7; int preg = (next >> 10) & 31; int rw = (next >> 9) & 1; int fd = (next >> 8) & 1; TCHAR *reg = NULL; int siz; + // Dn, An, (An)+, -(An), abs and indirect + if (mode == 0 || mode == 1 || mode == 3 || mode == 4 || mode >= 6) { + op_illg (opcode); + return; + } + switch (preg) { case 0x10: // TC reg = _T("TC"); siz = 4; if (rw) - put_long(extra, tc_030); + x_put_long(extra, tc_030); else - tc_030 = get_long(extra); + tc_030 = x_get_long(extra); break; case 0x12: // SRP reg = _T("SRP"); siz = 8; if (rw) { - put_long(extra, srp_030 >> 32); - put_long(extra + 4, srp_030); + x_put_long(extra, srp_030 >> 32); + x_put_long(extra + 4, srp_030); } else { - srp_030 = (uae_u64)get_long(extra) << 32; - srp_030 |= get_long(extra + 4); + srp_030 = (uae_u64)x_get_long(extra) << 32; + srp_030 |= x_get_long(extra + 4); } break; case 0x13: // CRP reg = _T("CRP"); siz = 8; if (rw) { - put_long(extra, crp_030 >> 32); - put_long(extra + 4, crp_030); + x_put_long(extra, crp_030 >> 32); + x_put_long(extra + 4, crp_030); } else { - crp_030 = (uae_u64)get_long(extra) << 32; - crp_030 |= get_long(extra + 4); + crp_030 = (uae_u64)x_get_long(extra) << 32; + crp_030 |= x_get_long(extra + 4); } break; case 0x18: // MMUSR reg = _T("MMUSR"); siz = 2; if (rw) - put_word(extra, mmusr_030); + x_put_word(extra, mmusr_030); else - mmusr_030 = get_word(extra); + mmusr_030 = x_get_word(extra); break; case 0x02: // TT0 reg = _T("TT0"); siz = 4; if (rw) - put_long(extra, tt0_030); + x_put_long(extra, tt0_030); else - tt0_030 = get_long(extra); + tt0_030 = x_get_long(extra); break; case 0x03: // TT1 reg = _T("TT1"); siz = 4; if (rw) - put_long(extra, tt1_030); + x_put_long(extra, tt1_030); else - tt1_030 = get_long(extra); + tt1_030 = x_get_long(extra); break; } if (!reg) { - op_illg(opcode, regs); + op_illg(opcode); return; } } @@ -1428,21 +1488,49 @@ static void mmu_op30_ptest(uaecptr pc, uae_u32 opcode, uae_u16 next, uaecptr ext static void mmu_op30_pflush(uaecptr pc, uae_u32 opcode, uae_u16 next, uaecptr extra) { + int mode = (opcode >> 3) & 7; + int flushmode = (next >> 10) & 7; + + switch (flushmode) + { + case 6: + // Dn, An, (An)+, -(An), abs and indirect + if (mode == 0 || mode == 1 || mode == 3 || mode == 4 || mode >= 6) { + op_illg (opcode); + return; + } + break; + case 4: + break; + case 1: + break; + default: + op_illg (opcode); + return; + } } void mmu_op30 (uaecptr pc, uae_u32 opcode, struct regstruct ®s, uae_u16 extra, uaecptr extraa) { - if (currprefs.cpu_model != 68030) { - m68k_setpc (regs, pc); - op_illg (opcode, regs); - return; - } - if (extra & 0x8000) - mmu_op30_ptest (pc, opcode, extra, extraa); - else if (extra & 0x2000) - mmu_op30_pflush (pc, opcode, extra, extraa); - else - mmu_op30_pmove (pc, opcode, extra, extraa); + int type = extra >> 13; + + switch (type) + { + case 0: + case 2: + case 3: + mmu_op30_pmove (pc, opcode, extra, extraa); + break; + case 1: + mmu_op30_pflush (pc, opcode, extra, extraa); + break; + case 4: + mmu_op30_ptest (pc, opcode, extra, extraa); + break; + default: + op_illg (opcode); + break; + } } void mmu_op(uae_u32 opcode, struct regstruct ®s, uae_u32 extra) @@ -1452,18 +1540,13 @@ void mmu_op(uae_u32 opcode, struct regstruct ®s, uae_u32 extra) regs.mmusr = 0; return; } else if ((opcode & 0x0FD8) == 0x548) { - if (currprefs.cpu_model < 68060) { /* PTEST not in 68060 */ - /* PTEST */ - return; - } + /* PTEST */ + return; } else if ((opcode & 0x0FB8) == 0x588) { /* PLPA */ - if (currprefs.cpu_model == 68060) { - return; - } } - m68k_setpc (regs, m68k_getpc (regs) - 2); - op_illg (opcode, regs); + m68k_setpc (m68k_getpc () - 2); + op_illg (opcode); } #endif @@ -1475,9 +1558,9 @@ static void do_trace (void) /* should also include TRAP, CHK, SR modification FPcc */ /* probably never used so why bother */ /* We can afford this to be inefficient... */ - m68k_setpc (regs, m68k_getpc (regs)); + m68k_setpc (m68k_getpc ()); fill_prefetch (); - opcode = get_word (regs.pc); + opcode = x_get_word (regs.pc); if (opcode == 0x4e73 /* RTE */ || opcode == 0x4e74 /* RTD */ || opcode == 0x4e75 /* RTS */ @@ -1492,32 +1575,32 @@ static void do_trace (void) && !cctrue (regs.ccrflags, (opcode >> 8) & 0xf) && (uae_s16)m68k_dreg (regs, opcode & 7) != 0)) { - unset_special (regs, SPCFLAG_TRACE); - set_special (regs, SPCFLAG_DOTRACE); + unset_special (SPCFLAG_TRACE); + set_special (SPCFLAG_DOTRACE); } } else if (regs.t1) { - unset_special (regs, SPCFLAG_TRACE); - set_special (regs, SPCFLAG_DOTRACE); + unset_special (SPCFLAG_TRACE); + set_special (SPCFLAG_DOTRACE); } } void doint (void) { if (currprefs.cpu_compatible) - set_special (regs, SPCFLAG_INT); + set_special (SPCFLAG_INT); else - set_special (regs, SPCFLAG_DOINT); + set_special (SPCFLAG_DOINT); } STATIC_INLINE int do_specialties (int cycles, struct regstruct ®s) { - regs.instruction_pc = m68k_getpc (regs); + regs.instruction_pc = m68k_getpc (); if (regs.spcflags & SPCFLAG_COPPER) do_copper (); #ifdef JIT - unset_special(regs, SPCFLAG_END_COMPILE); /* has done its job */ + unset_special(SPCFLAG_END_COMPILE); /* has done its job */ #endif while ((regs.spcflags & SPCFLAG_BLTNASTY) && dmaen (DMA_BLITTER) && cycles > 0) { @@ -1535,13 +1618,13 @@ STATIC_INLINE int do_specialties (int cycles, struct regstruct ®s) } if (regs.spcflags & SPCFLAG_DOTRACE) - Exception (9, regs); + Exception (9); while (regs.spcflags & SPCFLAG_STOP) { if (uae_int_requested) { INTREQ_f (0x8008); - set_special (regs, SPCFLAG_INT); + set_special (SPCFLAG_INT); } { extern void bsdsock_fake_int_handler (void); @@ -1556,18 +1639,17 @@ STATIC_INLINE int do_specialties (int cycles, struct regstruct ®s) if (regs.spcflags & (SPCFLAG_INT | SPCFLAG_DOINT)) { int intr = intlev (); - unset_special (regs, SPCFLAG_INT | SPCFLAG_DOINT); + unset_special (SPCFLAG_INT | SPCFLAG_DOINT); if (intr > 0 && intr > regs.intmask) do_interrupt (intr, regs); } if ((regs.spcflags & (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE))) { - unset_special (regs, SPCFLAG_BRK | SPCFLAG_MODE_CHANGE); + unset_special (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE); // SPCFLAG_BRK breaks STOP condition, need to prefetch m68k_resumestopped (); return 1; } - } if (regs.spcflags & SPCFLAG_TRACE) @@ -1575,18 +1657,18 @@ STATIC_INLINE int do_specialties (int cycles, struct regstruct ®s) if (regs.spcflags & SPCFLAG_INT) { int intr = intlev (); - unset_special (regs, SPCFLAG_INT | SPCFLAG_DOINT); + unset_special (SPCFLAG_INT | SPCFLAG_DOINT); if (intr > 0 && (intr > regs.intmask || intr == 7)) do_interrupt (intr, regs); } if (regs.spcflags & SPCFLAG_DOINT) { - unset_special (regs, SPCFLAG_DOINT); - set_special (regs, SPCFLAG_INT); + unset_special (SPCFLAG_DOINT); + set_special (SPCFLAG_INT); } if ((regs.spcflags & (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE))) { - unset_special (regs, SPCFLAG_BRK | SPCFLAG_MODE_CHANGE); + unset_special (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE); return 1; } @@ -1606,16 +1688,18 @@ static void m68k_run_1 (void) #if defined (CPU_arm) & defined(USE_ARMNEON) // Well not really since pli is ArmV7... /* Load ARM code for next opcode into L2 cache during execute of do_cycles() */ - __asm__ __volatile__ ("pli [%[radr]]\n\t" \ + __asm__ volatile ("pli [%[radr]]\n\t" \ : : [radr] "r" (cpufunctbl[opcode]) : ); #endif + count_instr (opcode); do_cycles (cpu_cycles); cpu_cycles = (*cpufunctbl[opcode])(opcode, r); cpu_cycles = adjust_cycles(cpu_cycles); if (r.spcflags) { - if (do_specialties (cpu_cycles, r)) + if (do_specialties (cpu_cycles, r)) { return; + } } if (!currprefs.cpu_compatible) return; @@ -1663,7 +1747,9 @@ void execute_normal(void) start_pc = r.pc; for (;;) { /* Take note: This is the do-it-normal loop */ - uae_u16 opcode = get_iword2 (r, 0); + uae_u16 opcode; + + opcode = get_iword2 (r, 0); special_mem = DISTRUST_CONSISTENT_MEM; pc_hist[blocklen].location = (uae_u16*)r.pc_p; @@ -1692,7 +1778,7 @@ static void m68k_run_jit (void) /* Whenever we return from that, we should check spcflags */ if (uae_int_requested) { INTREQ_f (0x8008); - set_special (regs, SPCFLAG_INT); + set_special (SPCFLAG_INT); } if (regs.spcflags) { if (do_specialties (0, regs)) { @@ -1703,57 +1789,22 @@ static void m68k_run_jit (void) } #endif /* JIT */ -/* emulate simple prefetch */ -static void m68k_run_2p (void) -{ - uae_u32 prefetch, prefetch_pc; - struct regstruct &r = regs; - - prefetch_pc = m68k_getpc (r); - prefetch = get_long (prefetch_pc); - for (;;) { - uae_u32 pc = m68k_getpc (r); - uae_u16 opcode; - - r.instruction_pc = pc; - - do_cycles (cpu_cycles); - - if (pc == prefetch_pc) { - opcode = prefetch >> 16; - } else if (pc == prefetch_pc + 2) { - opcode = prefetch; - } else { - opcode = get_word (pc); - prefetch_pc = pc + 2; - prefetch = get_long (prefetch_pc); - } - - cpu_cycles = (*cpufunctbl[opcode])(opcode, r); - cpu_cycles = adjust_cycles(cpu_cycles); - if (r.spcflags) { - if (do_specialties (cpu_cycles, r)) - return; - } - } -} - /* Same thing, but don't use prefetch to get opcode. */ static void m68k_run_2 (void) { struct regstruct &r = regs; for (;;) { - r.instruction_pc = m68k_getpc (r); + r.instruction_pc = m68k_getpc (); uae_u16 opcode = get_iword2 (r, 0); #if defined (CPU_arm) & defined(USE_ARMNEON) // Well not really since pli is ArmV7... /* Load ARM code for next opcode into L2 cache during execute of do_cycles() */ - __asm__ __volatile__ ("pli [%[radr]]\n\t" \ + __asm__ volatile ("pli [%[radr]]\n\t" \ : : [radr] "r" (cpufunctbl[opcode]) : ); #endif - + count_instr (opcode); do_cycles (cpu_cycles); cpu_cycles = (*cpufunctbl[opcode])(opcode, r); cpu_cycles = adjust_cycles(cpu_cycles); @@ -1772,7 +1823,7 @@ static void exception2_handle (uaecptr addr, uaecptr fault) last_fault_for_exception_3 = fault; last_writeaccess_for_exception_3 = 0; last_instructionaccess_for_exception_3 = 0; - Exception (2, regs); + Exception (2); } void m68k_go (int may_quit) @@ -1793,10 +1844,11 @@ void m68k_go (int may_quit) void (*run_func)(void); if (quit_program > 0) { - int hardreset = (quit_program == 3 ? 1 : 0) | hardboot; - if (quit_program == 1) + int hardreset = (quit_program == UAE_RESET_HARD ? 1 : 0) | hardboot; + bool kbreset = quit_program == UAE_RESET_KEYBOARD; + if (quit_program == UAE_QUIT) break; - if(quit_program == 3) + if(quit_program == UAE_RESET_HARD) reinit_amiga(); int restored = 0; @@ -1811,24 +1863,23 @@ void m68k_go (int may_quit) #endif set_cycles (0); check_prefs_changed_adr24(); - custom_reset (hardreset); + custom_reset (hardreset != 0, kbreset); m68k_reset (hardreset); if (hardreset) { - memory_hardreset(); + memory_clear (); write_log (_T("hardreset, memory cleared\n")); } #ifdef SAVESTATE /* We may have been restoring state, but we're done now. */ if (isrestore ()) { - map_overlay (1); - savestate_restore_finish (); + savestate_restore_finish (); startup = 1; restored = 1; } #endif if (currprefs.produce_sound == 0) eventtab[ev_audio].active = 0; - m68k_setpc (regs, regs.pc); + m68k_setpc (regs.pc); check_prefs_changed_audio (); if (!restored || hsync_counter == 0) @@ -1847,22 +1898,24 @@ void m68k_go (int may_quit) /* system is very badly confused */ write_log (_T("double bus error or corrupted stack, forcing reboot..\n")); regs.panic = 0; - uae_reset (1); + uae_reset (1, 0); } } - set_x_funcs (); - if (startup) + if (startup) { custom_prepare (); + protect_roms (true); + } startup = 0; run_func = currprefs.cpu_compatible && currprefs.cpu_model == 68000 ? m68k_run_1 : #ifdef JIT currprefs.cpu_model >= 68020 && currprefs.cachesize ? m68k_run_jit : #endif - currprefs.cpu_compatible ? m68k_run_2p : m68k_run_2; + m68k_run_2; run_func (); } + protect_roms (false); in_m68k_go--; } @@ -1883,8 +1936,6 @@ uae_u8 *restore_cpu (uae_u8 *src) changed_prefs.address_space_24 = 0; if (flags & CPUTYPE_EC) changed_prefs.address_space_24 = 1; - if (model > 68020) - changed_prefs.cpu_compatible = 0; currprefs.address_space_24 = changed_prefs.address_space_24; currprefs.cpu_compatible = changed_prefs.cpu_compatible; for (i = 0; i < 15; i++) @@ -1939,6 +1990,7 @@ uae_u8 *restore_cpu (uae_u8 *src) currprefs.m68k_speed = changed_prefs.m68k_speed = 0; } set_cpu_caches(); + write_log (_T("CPU: %d%s%03d, PC=%08X\n"), model / 1000, flags & 1 ? _T("EC") : _T(""), model % 1000, regs.pc); @@ -1948,13 +2000,13 @@ uae_u8 *restore_cpu (uae_u8 *src) void restore_cpu_finish(void) { init_m68k (); - m68k_setpc (regs, regs.pc); + m68k_setpc (regs.pc); doint (); fill_prefetch_quick (); set_cycles (0); events_schedule (); if (regs.stopped) - set_special (regs, SPCFLAG_STOP); + set_special (SPCFLAG_STOP); } uae_u8 *restore_cpu_extra (uae_u8 *src) @@ -1963,7 +2015,7 @@ uae_u8 *restore_cpu_extra (uae_u8 *src) uae_u32 flags = restore_u32 (); currprefs.cpu_compatible = changed_prefs.cpu_compatible = (flags & 2) ? true : false; - currprefs.cachesize = changed_prefs.cachesize = (flags & 8) ? 8192 : 0; + //currprefs.cachesize = changed_prefs.cachesize = (flags & 8) ? 8192 : 0; currprefs.m68k_speed = changed_prefs.m68k_speed = 0; if (flags & 4) @@ -2010,7 +2062,7 @@ uae_u8 *save_cpu (int *len, uae_u8 *dstptr) save_u32 (0x80000000 | 0x40000000 | (currprefs.address_space_24 ? 1 : 0)); /* FLAGS */ for(i = 0;i < 15; i++) save_u32 (regs.regs[i]); /* D0-D7 A0-A6 */ - save_u32 (m68k_getpc (regs)); /* PC */ + save_u32 (m68k_getpc ()); /* PC */ save_u16 (regs.irc); /* prefetch */ save_u16 (regs.ir); /* instruction prefetch */ MakeSR (regs); @@ -2063,41 +2115,48 @@ uae_u8 *save_cpu (int *len, uae_u8 *dstptr) #endif /* SAVESTATE */ -static void exception3f (uae_u32 opcode, uaecptr addr, int writeaccess, int instructionaccess) +static void exception3f (uae_u32 opcode, uaecptr addr, int writeaccess, int instructionaccess, uae_u32 pc) { if (currprefs.cpu_model >= 68040) addr &= ~1; - if (currprefs.cpu_model <= 68010) - last_addr_for_exception_3 = m68k_getpc (regs) + 2; - else - last_addr_for_exception_3 = regs.instruction_pc; + if (currprefs.cpu_model >= 68020) { + last_addr_for_exception_3 = regs.instruction_pc; + } else if (pc == 0xffffffff) { + last_addr_for_exception_3 = m68k_getpc () + 2; + } else { + last_addr_for_exception_3 = pc; + } last_fault_for_exception_3 = addr; last_op_for_exception_3 = opcode; last_writeaccess_for_exception_3 = writeaccess; last_instructionaccess_for_exception_3 = instructionaccess; - Exception (3, regs); + Exception (3); } void exception3 (uae_u32 opcode, uaecptr addr) { - exception3f (opcode, addr, 0, 0); + exception3f (opcode, addr, 0, 0, 0xffffffff); } void exception3i (uae_u32 opcode, uaecptr addr) { - exception3f (opcode, addr, 0, 1); + exception3f (opcode, addr, 0, 1, 0xffffffff); +} +void exception3 (uae_u32 opcode, uaecptr addr, int w, int i, uaecptr pc) +{ + exception3f (opcode, addr, w, i, pc); } void exception2 (uaecptr addr) { write_log (_T("delayed exception2!\n")); - regs.panic_pc = m68k_getpc (regs); + regs.panic_pc = m68k_getpc (); regs.panic_addr = addr; regs.panic = 2; - set_special (regs, SPCFLAG_BRK); - m68k_setpc (regs, 0xf80000); + set_special (SPCFLAG_BRK); + m68k_setpc (0xf80000); #ifdef JIT - set_special (regs, SPCFLAG_END_COMPILE); + set_special (SPCFLAG_END_COMPILE); #endif fill_prefetch (); } @@ -2108,21 +2167,21 @@ void cpureset (void) uaecptr ksboot = 0xf80002 - 2; /* -2 = RESET hasn't increased PC yet */ uae_u16 ins; - if (currprefs.cpu_compatible) { - custom_reset (0); + if (currprefs.cpu_compatible && currprefs.cpu_model <= 68020) { + custom_reset (false, false); return; } - pc = m68k_getpc(regs); + pc = m68k_getpc(); if (pc >= currprefs.chipmem_size) { addrbank *b = &get_mem_bank(pc); if (b->check(pc, 2 + 2)) { /* We have memory, hope for the best.. */ - custom_reset (0); + custom_reset (false, false); return; } write_log (_T("M68K RESET PC=%x, rebooting..\n"), pc); - custom_reset (0); - m68k_setpc (regs, ksboot); + custom_reset (false, false); + m68k_setpc (ksboot); return; } /* panic, RAM is going to disappear under PC */ @@ -2131,15 +2190,15 @@ void cpureset (void) int reg = ins & 7; uae_u32 addr = m68k_areg (regs, reg); write_log (_T("reset/jmp (ax) combination emulated -> %x\n"), addr); - custom_reset (0); + custom_reset (false, false); if (addr < 0x80000) addr += 0xf80000; - m68k_setpc (regs, addr - 2); + m68k_setpc (addr - 2); return; } write_log (_T("M68K RESET PC=%x, rebooting..\n"), pc); - custom_reset (0); - m68k_setpc (regs, ksboot); + custom_reset (false, false); + m68k_setpc (ksboot); } void m68k_setstopped (void) @@ -2148,7 +2207,7 @@ void m68k_setstopped (void) /* A traced STOP instruction drops through immediately without actually stopping. */ if ((regs.spcflags & SPCFLAG_DOTRACE) == 0) - set_special (regs, SPCFLAG_STOP); + set_special (SPCFLAG_STOP); else m68k_resumestopped (); } @@ -2159,7 +2218,7 @@ void m68k_resumestopped (void) return; regs.stopped = 0; fill_prefetch (); - unset_special (regs, SPCFLAG_STOP); + unset_special (SPCFLAG_STOP); } /* diff --git a/src/od-gles/gles_gfx.cpp b/src/od-gles/gles_gfx.cpp index 6ae7c659..f1457f06 100644 --- a/src/od-gles/gles_gfx.cpp +++ b/src/od-gles/gles_gfx.cpp @@ -245,6 +245,10 @@ void unlockscr (void) //SDL_UnlockSurface(prSDLScreen); } +void wait_for_vsync(void) +{ + // Temporary +} void flush_screen () { @@ -391,7 +395,7 @@ int GetSurfacePixelFormat(void) } -int graphics_init (void) +int graphics_init (bool mousecapture) { int i,j; @@ -525,6 +529,70 @@ static int save_thumb(char *path) return ret; } +bool vsync_switchmode (int hz) +{ + int changed_height = changed_prefs.gfx_size.height; + + if (hz >= 55) + hz = 60; + else + hz = 50; + + if(hz == 50 && currVSyncRate == 60) + { + // Switch from NTSC -> PAL + switch(changed_height) { + case 200: changed_height = 240; break; + case 216: changed_height = 262; break; + case 240: changed_height = 270; break; + case 256: changed_height = 270; break; + case 262: changed_height = 270; break; + case 270: changed_height = 270; break; + } + } + else if(hz == 60 && currVSyncRate == 50) + { + // Switch from PAL -> NTSC + switch(changed_height) { + case 200: changed_height = 200; break; + case 216: changed_height = 200; break; + case 240: changed_height = 200; break; + case 256: changed_height = 216; break; + case 262: changed_height = 216; break; + case 270: changed_height = 240; break; + } + } + + if(changed_height == currprefs.gfx_size.height && hz == currprefs.chipset_refreshrate) + return true; + + changed_prefs.gfx_size.height = changed_height; + + return true; +} + +bool target_graphics_buffer_update (void) +{ + bool rate_changed = 0; + //bool rate_changed = SetVSyncRate(currprefs.chipset_refreshrate); + + if(currprefs.gfx_size.height != changed_prefs.gfx_size.height) + { + update_display(&changed_prefs); + rate_changed = true; + } + + if(rate_changed) + { + black_screen_now(); + fpscounter_reset(); + time_per_frame = 1000 * 1000 / (currprefs.chipset_refreshrate); + } + + return true; +} + + #ifdef PICASSO96 @@ -651,6 +719,7 @@ void gfx_set_picasso_modeinfo (uae_u32 w, uae_u32 h, uae_u32 depth, RGBFTYPE rgb } } + void gfx_set_picasso_state (int on) { if (on == screen_is_picasso) diff --git a/src/od-pandora/bsdsocket_host.cpp b/src/od-pandora/bsdsocket_host.cpp index 4533a080..c9915673 100644 --- a/src/od-pandora/bsdsocket_host.cpp +++ b/src/od-pandora/bsdsocket_host.cpp @@ -614,10 +614,10 @@ static void copyProtoent (TrapContext *context, SB, const struct protoent *p) size += strlen (p->p_aliases[numaliases++]) + 5; if (sb->protoent) { - uae_FreeMem (context, sb->protoent, sb->protoentsize); + uae_FreeMem (context, sb->protoent, sb->protoentsize, sb->sysbase); } - sb->protoent = uae_AllocMem (context, size, 0); + sb->protoent = uae_AllocMem (context, size, 0, sb->sysbase); if (!sb->protoent) { write_log ("BSDSOCK: WARNING - copyProtoent() ran out of Amiga memory (couldn't allocate %d bytes)\n", size); @@ -1359,10 +1359,10 @@ void host_getservbynameport (TrapContext *context, SB, uae_u32 name, uae_u32 pro size += strlen (s->s_aliases[numaliases++]) + 5; if (sb->servent) { - uae_FreeMem (context, sb->servent, sb->serventsize); + uae_FreeMem (context, sb->servent, sb->serventsize, sb->sysbase); } - sb->servent = uae_AllocMem (context, size, 0); + sb->servent = uae_AllocMem (context, size, 0, sb->sysbase); if (!sb->servent) { write_log ("BSDSOCK: WARNING - getservby%s() ran out of Amiga memory (couldn't allocate %d bytes)\n",type ? "port" : "name", size); @@ -1408,7 +1408,7 @@ int host_sbinit (TrapContext *context, SB) } /* Alloc hostent buffer */ - sb->hostent = uae_AllocMem (context, 1024, 0); + sb->hostent = uae_AllocMem (context, 1024, 0, sb->sysbase); sb->hostentsize = 1024; /* @@@ The thread should be PTHREAD_CREATE_DETACHED */ diff --git a/src/od-pandora/charset.cpp b/src/od-pandora/charset.cpp new file mode 100644 index 00000000..9433a944 --- /dev/null +++ b/src/od-pandora/charset.cpp @@ -0,0 +1,84 @@ +#include "sysconfig.h" +#include "sysdeps.h" + +#include + +// UAE4ARM and fs-uae uses only chars / UTF-8 internally, so TCHAR is typedefed to +// char (WinUAE uses wchar_t internally). + +char *ua (const TCHAR *s) +{ + if (s == NULL) + return NULL; + return strdup (s); +} + +char *au (const TCHAR *s) +{ + if (s == NULL) + return NULL; + return strdup (s); +} + +TCHAR* utf8u (const char *s) +{ + if (s == NULL) + return NULL; + return ua (s); +} + +char* uutf8 (const TCHAR *s) +{ + if (s == NULL) + return NULL; + return ua (s); +} + +TCHAR *au_copy (TCHAR *dst, int maxlen, const char *src) +{ + // this should match the WinUAE au_copy behavior, where either the + // entire string is copied (and null-terminated), or the result is + // an empty string + if (uae_tcslcpy (dst, src, maxlen) >= maxlen) { + dst[0] = '\0'; + } + return dst; +} + +char *ua_copy (char *dst, int maxlen, const TCHAR *src) +{ + return au_copy (dst, maxlen, src); +} + +TCHAR *my_strdup_ansi (const char *src) +{ + return strdup (src); +} + +TCHAR *au_fs (const char *src) +{ + if (src == NULL) + return NULL; + return strdup(src); +} + +char *ua_fs (const TCHAR *s, int defchar) +{ + if (s == NULL) + return NULL; + return strdup(s); +} + +TCHAR *au_fs_copy (TCHAR *dst, int maxlen, const char *src) +{ + dst[0] = 0; + strncpy(dst, src, maxlen); + return dst; +} + +char *ua_fs_copy (char *dst, int maxlen, const TCHAR *src, int defchar) +{ + dst[0] = 0; + strncpy(dst, src, maxlen); + return dst; +} diff --git a/src/od-pandora/fsdb_host.cpp b/src/od-pandora/fsdb_host.cpp index 13707882..45b7ad49 100644 --- a/src/od-pandora/fsdb_host.cpp +++ b/src/od-pandora/fsdb_host.cpp @@ -2,6 +2,9 @@ #include "sysdeps.h" #include "config.h" #include "fsdb.h" +#include "zfile.h" +#include +#include int dos_errno(void) @@ -34,3 +37,69 @@ int dos_errno(void) return ERROR_NOT_IMPLEMENTED; } } + + +bool my_stat (const TCHAR *name, struct mystat *statbuf) +{ + struct stat64 st; + + if(stat64(name, &st) == -1) { + write_log("my_stat: stat on file %s failed\n", name); + return false; + } + + statbuf->size = st.st_size; + statbuf->mode = 0; + if (st.st_mode & S_IRUSR) { + statbuf->mode |= FILEFLAG_READ; + } + if (st.st_mode & S_IWUSR) { + statbuf->mode |= FILEFLAG_WRITE; + } + statbuf->mtime.tv_sec = st.st_mtime; + statbuf->mtime.tv_usec = 0; + + return true; +} + + +bool my_chmod (const TCHAR *name, uae_u32 mode) +{ + // return result of mystat so invalid file will return false + struct mystat ms; + return my_stat(name, &ms); +} + + +bool my_utime (const TCHAR *name, struct mytimeval *tv) +{ + struct mytimeval mtv; + struct timeval times[2]; + + if(tv == NULL) { + struct timeval time; + struct timezone tz; + + gettimeofday(&time, &tz); + mtv.tv_sec = time.tv_sec + tz.tz_minuteswest; + mtv.tv_usec = time.tv_usec; + } else { + mtv.tv_sec = tv->tv_sec; + mtv.tv_usec = tv->tv_usec; + } + + times[0].tv_sec = mtv.tv_sec; + times[0].tv_usec = mtv.tv_usec; + times[1].tv_sec = mtv.tv_sec; + times[1].tv_usec = mtv.tv_usec; + if(utimes(name, times) == 0) + return true; + + return false; +} + +// Get local time in secs, starting from 01.01.1970 +uae_u32 getlocaltime (void) +{ + return time(NULL); // ToDo: convert UTC to local time... +} diff --git a/src/od-pandora/gui/CreateFilesysHardfile.cpp b/src/od-pandora/gui/CreateFilesysHardfile.cpp index 515d57fa..6d45b074 100644 --- a/src/od-pandora/gui/CreateFilesysHardfile.cpp +++ b/src/od-pandora/gui/CreateFilesysHardfile.cpp @@ -16,7 +16,6 @@ #include "autoconf.h" #include "filesys.h" #include "gui.h" -#include "target.h" #include "gui_handling.h" @@ -249,6 +248,7 @@ static void CreateFilesysHardfileLoop(void) // Now we let the Gui object draw itself. uae_gui->draw(); // Finally we update the screen. + wait_for_vsync(); SDL_Flip(gui_screen); } } @@ -301,8 +301,8 @@ bool CreateFilesysHardfile(void) uci = add_filesys_config(&changed_prefs, -1, (char *) txtDevice->getText().c_str(), 0, (char *) txtPath->getText().c_str(), 0, - 32, (size / 1024) + 1, 2, 512, - bp, 0, 0, 0); + 0, 32, (size / 1024) + 1, 2, 512, + bp, 0, 0, 0, 0, 0, 0); if (uci) hardfile_do_disk_change (uci, 1); } diff --git a/src/od-pandora/gui/EditFilesysHardfile.cpp b/src/od-pandora/gui/EditFilesysHardfile.cpp index c7a867fb..d4118c76 100644 --- a/src/od-pandora/gui/EditFilesysHardfile.cpp +++ b/src/od-pandora/gui/EditFilesysHardfile.cpp @@ -16,7 +16,6 @@ #include "autoconf.h" #include "filesys.h" #include "gui.h" -#include "target.h" #include "gui_handling.h" @@ -315,6 +314,7 @@ static void EditFilesysHardfileLoop(void) // Now we let the Gui object draw itself. uae_gui->draw(); // Finally we update the screen. + wait_for_vsync(); SDL_Flip(gui_screen); } } @@ -382,9 +382,9 @@ bool EditFilesysHardfile(int unit_no) uci = add_filesys_config(&changed_prefs, unit_no, (char *) txtDevice->getText().c_str(), 0, (char *) txtPath->getText().c_str(), !chkReadWrite->isSelected(), - atoi(txtSectors->getText().c_str()), atoi(txtSurfaces->getText().c_str()), + 0, atoi(txtSectors->getText().c_str()), atoi(txtSurfaces->getText().c_str()), atoi(txtReserved->getText().c_str()), atoi(txtBlocksize->getText().c_str()), - bp, 0, 0, 0); + bp, 0, 0, 0, 0, 0, 0); if (uci) hardfile_do_disk_change (uci, 1); } diff --git a/src/od-pandora/gui/EditFilesysVirtual.cpp b/src/od-pandora/gui/EditFilesysVirtual.cpp index 6baffb34..68651cdc 100644 --- a/src/od-pandora/gui/EditFilesysVirtual.cpp +++ b/src/od-pandora/gui/EditFilesysVirtual.cpp @@ -16,7 +16,6 @@ #include "autoconf.h" #include "filesys.h" #include "gui.h" -#include "target.h" #include "gui_handling.h" @@ -250,6 +249,7 @@ static void EditFilesysVirtualLoop(void) // Now we let the Gui object draw itself. uae_gui->draw(); // Finally we update the screen. + wait_for_vsync(); SDL_Flip(gui_screen); } } @@ -303,7 +303,7 @@ bool EditFilesysVirtual(int unit_no) uci = add_filesys_config(&changed_prefs, unit_no, (char *) txtDevice->getText().c_str(), (char *) txtVolume->getText().c_str(), (char *) txtPath->getText().c_str(), - !chkReadWrite->isSelected(), 0, 0, 0, 0, bp, 0, 0, 0); + !chkReadWrite->isSelected(), 0, 0, 0, 0, 0, bp, 0, 0, 0, 0, 0, 0); if (uci) filesys_media_change (uci->rootdir, 1, uci); } diff --git a/src/od-pandora/gui/InGameMessage.cpp b/src/od-pandora/gui/InGameMessage.cpp index 7d583cdc..c4966094 100644 --- a/src/od-pandora/gui/InGameMessage.cpp +++ b/src/od-pandora/gui/InGameMessage.cpp @@ -10,7 +10,6 @@ #include "options.h" #include "uae.h" #include "gui.h" -#include "target.h" #include "gui_handling.h" @@ -92,6 +91,7 @@ void InGameMessage(const char *msg) cmdDone->requestFocus(); msg_done = 0; + bool drawn = false; while(!msg_done) { //------------------------------------------------- diff --git a/src/od-pandora/gui/Navigation.cpp b/src/od-pandora/gui/Navigation.cpp index 89ee1f37..a0635e80 100644 --- a/src/od-pandora/gui/Navigation.cpp +++ b/src/od-pandora/gui/Navigation.cpp @@ -9,7 +9,6 @@ #include "sysconfig.h" #include "sysdeps.h" #include "config.h" -#include "target.h" #include "gui_handling.h" typedef struct @@ -79,11 +78,12 @@ static NavigationMap navMap[] = // PanelChipset { "OCS", "Chipset", "BlitNormal", "CollFull", "ECS Agnus" }, { "ECS Agnus", "Chipset", "Immediate", "OCS", "Full ECS" }, - { "Full ECS", "Chipset", "Immediate", "ECS Agnus", "AGA" }, + { "Full ECS", "Chipset", "BlitWait", "ECS Agnus", "AGA" }, { "AGA", "Chipset", "Chipset", "Full ECS", "NTSC" }, { "NTSC", "Chipset", "Chipset", "AGA", "CollNone" }, { "BlitNormal", "OCS", "Fast copper", "CollFull", "Immediate" }, - { "Immediate", "ECS Agnus", "Fast copper", "BlitNormal", "CollNone" }, + { "Immediate", "ECS Agnus", "Fast copper", "BlitNormal", "BlitWait" }, + { "BlitWait", "Full ECS", "Fast copper", "Immediate", "CollNone" }, { "Fast copper", "BlitNormal", "Chipset", "CollFull", "CollNone" }, { "CollNone", "Chipset", "Chipset", "NTSC", "Sprites only" }, { "Sprites only", "Chipset", "Chipset", "CollNone", "CollPlay" }, diff --git a/src/od-pandora/gui/PanelCPU.cpp b/src/od-pandora/gui/PanelCPU.cpp index 486d652b..98c35189 100644 --- a/src/od-pandora/gui/PanelCPU.cpp +++ b/src/od-pandora/gui/PanelCPU.cpp @@ -12,7 +12,6 @@ #include "options.h" #include "uae.h" #include "gui.h" -#include "target.h" #include "gui_handling.h" diff --git a/src/od-pandora/gui/PanelChipset.cpp b/src/od-pandora/gui/PanelChipset.cpp index d9923d99..6a761829 100644 --- a/src/od-pandora/gui/PanelChipset.cpp +++ b/src/od-pandora/gui/PanelChipset.cpp @@ -15,7 +15,6 @@ #include "memory.h" #include "newcpu.h" #include "custom.h" -#include "target.h" #include "gui_handling.h" @@ -28,6 +27,7 @@ static gcn::UaeCheckBox* chkNTSC; static gcn::Window *grpBlitter; static gcn::UaeRadioButton* optBlitNormal; static gcn::UaeRadioButton* optBlitImmed; +static gcn::UaeRadioButton* optBlitWait; static gcn::Window *grpCopper; static gcn::UaeCheckBox* chkFastCopper; static gcn::Window *grpCollisionLevel; @@ -92,6 +92,7 @@ class BlitterButtonActionListener : public gcn::ActionListener void action(const gcn::ActionEvent& actionEvent) { changed_prefs.immediate_blits = optBlitImmed->isSelected(); + changed_prefs.waiting_blits = optBlitWait->isSelected(); } }; static BlitterButtonActionListener* blitterButtonActionListener; @@ -157,12 +158,17 @@ void InitPanelChipset(const struct _ConfigCategory& category) optBlitImmed = new gcn::UaeRadioButton("Immediate", "radiocblittergroup"); optBlitImmed->addActionListener(blitterButtonActionListener); + optBlitWait = new gcn::UaeRadioButton("Wait for blit.", "radiocblittergroup"); + optBlitWait->setId("BlitWait"); + optBlitWait->addActionListener(blitterButtonActionListener); + grpBlitter = new gcn::Window("Blitter"); grpBlitter->setPosition(DISTANCE_BORDER + grpChipset->getWidth() + DISTANCE_NEXT_X, DISTANCE_BORDER); grpBlitter->add(optBlitNormal, 5, 10); grpBlitter->add(optBlitImmed, 5, 40); + grpBlitter->add(optBlitWait, 5, 70); grpBlitter->setMovable(false); - grpBlitter->setSize(120, 85); + grpBlitter->setSize(120, 115); grpBlitter->setBaseColor(gui_baseCol); category.panel->add(grpBlitter); @@ -227,6 +233,7 @@ void ExitPanelChipset(void) delete optBlitNormal; delete optBlitImmed; + delete optBlitWait; delete grpBlitter; delete blitterButtonActionListener; @@ -258,6 +265,8 @@ void RefreshPanelChipset(void) if(changed_prefs.immediate_blits) optBlitImmed->setSelected(true); + else if(changed_prefs.waiting_blits) + optBlitWait->setSelected(true); else optBlitNormal->setSelected(true); diff --git a/src/od-pandora/gui/PanelConfig.cpp b/src/od-pandora/gui/PanelConfig.cpp index ab963b33..8f87365e 100644 --- a/src/od-pandora/gui/PanelConfig.cpp +++ b/src/od-pandora/gui/PanelConfig.cpp @@ -12,7 +12,6 @@ #include "uae.h" #include "blkdev.h" #include "gui.h" -#include "target.h" #include "gui_handling.h" @@ -213,9 +212,9 @@ class ConfigsListActionListener : public gcn::ActionListener DisableResume(); RefreshAllPanels(); if(emulating) - uae_reset(1); + uae_reset(1, 1); else - uae_reset(0); + uae_reset(0, 1); gui_running = false; } else diff --git a/src/od-pandora/gui/PanelDisplay.cpp b/src/od-pandora/gui/PanelDisplay.cpp index b0e89763..8c0c6946 100644 --- a/src/od-pandora/gui/PanelDisplay.cpp +++ b/src/od-pandora/gui/PanelDisplay.cpp @@ -14,7 +14,6 @@ #include "memory.h" #include "uae.h" #include "gui.h" -#include "target.h" #include "gui_handling.h" diff --git a/src/od-pandora/gui/PanelFloppy.cpp b/src/od-pandora/gui/PanelFloppy.cpp index 24f55a76..2c745dfa 100644 --- a/src/od-pandora/gui/PanelFloppy.cpp +++ b/src/od-pandora/gui/PanelFloppy.cpp @@ -15,7 +15,6 @@ #include "disk.h" #include "uae.h" #include "gui.h" -#include "target.h" #include "gui_handling.h" @@ -324,7 +323,7 @@ class CreateDiskActionListener : public gcn::ActionListener extractFileName(tmp, diskname); removeFileExtension(diskname); diskname[31] = '\0'; - disk_creatediskfile(tmp, 0, DRV_35_DD, diskname, false, false); + disk_creatediskfile(tmp, 0, DRV_35_DD, diskname, false, false, NULL); AddFileToDiskList(tmp, 1); extractPath(tmp, currentDir); } @@ -341,7 +340,7 @@ class CreateDiskActionListener : public gcn::ActionListener extractFileName(tmp, diskname); removeFileExtension(diskname); diskname[31] = '\0'; - disk_creatediskfile(tmp, 0, DRV_35_HD, diskname, false, false); + disk_creatediskfile(tmp, 0, DRV_35_HD, diskname, false, false, NULL); AddFileToDiskList(tmp, 1); extractPath(tmp, currentDir); } diff --git a/src/od-pandora/gui/PanelHD.cpp b/src/od-pandora/gui/PanelHD.cpp index 7a56961e..b0d59217 100644 --- a/src/od-pandora/gui/PanelHD.cpp +++ b/src/od-pandora/gui/PanelHD.cpp @@ -17,7 +17,6 @@ #include "filesys.h" #include "blkdev.h" #include "gui.h" -#include "target.h" #include "gui_handling.h" diff --git a/src/od-pandora/gui/PanelInput.cpp b/src/od-pandora/gui/PanelInput.cpp index 120099c1..542fe66d 100644 --- a/src/od-pandora/gui/PanelInput.cpp +++ b/src/od-pandora/gui/PanelInput.cpp @@ -16,7 +16,6 @@ #include "autoconf.h" #include "filesys.h" #include "gui.h" -#include "target.h" #include "gui_handling.h" #include "keyboard.h" #include "inputdevice.h" @@ -177,7 +176,7 @@ class InputActionListener : public gcn::ActionListener changed_prefs.jports[0].mode = JSEM_MODE_JOYSTICK; break; } - inputdevice_updateconfig(&changed_prefs); + inputdevice_updateconfig(NULL, &changed_prefs); } else if (actionEvent.getSource() == cboPort1) { @@ -192,7 +191,7 @@ class InputActionListener : public gcn::ActionListener changed_prefs.jports[1].mode = JSEM_MODE_JOYSTICK; break; } - inputdevice_updateconfig(&changed_prefs); + inputdevice_updateconfig(NULL, &changed_prefs); } else if (actionEvent.getSource() == cboAutofire) diff --git a/src/od-pandora/gui/PanelMisc.cpp b/src/od-pandora/gui/PanelMisc.cpp index eead385e..59c07826 100644 --- a/src/od-pandora/gui/PanelMisc.cpp +++ b/src/od-pandora/gui/PanelMisc.cpp @@ -16,7 +16,6 @@ #include "autoconf.h" #include "filesys.h" #include "gui.h" -#include "target.h" #include "gui_handling.h" diff --git a/src/od-pandora/gui/PanelPaths.cpp b/src/od-pandora/gui/PanelPaths.cpp index 8f386e41..083bd638 100644 --- a/src/od-pandora/gui/PanelPaths.cpp +++ b/src/od-pandora/gui/PanelPaths.cpp @@ -10,7 +10,6 @@ #include "options.h" #include "uae.h" #include "gui.h" -#include "target.h" #include "gui_handling.h" static gcn::Label *lblSystemROMs; diff --git a/src/od-pandora/gui/PanelRAM.cpp b/src/od-pandora/gui/PanelRAM.cpp index 45b0bd20..75b099b7 100644 --- a/src/od-pandora/gui/PanelRAM.cpp +++ b/src/od-pandora/gui/PanelRAM.cpp @@ -14,7 +14,6 @@ #include "memory.h" #include "uae.h" #include "gui.h" -#include "target.h" #include "gui_handling.h" diff --git a/src/od-pandora/gui/PanelROM.cpp b/src/od-pandora/gui/PanelROM.cpp index c8edf103..2efcc0c6 100644 --- a/src/od-pandora/gui/PanelROM.cpp +++ b/src/od-pandora/gui/PanelROM.cpp @@ -15,7 +15,6 @@ #include "rommgr.h" #include "uae.h" #include "gui.h" -#include "target.h" #include "gui_handling.h" static gcn::Label *lblMainROM; diff --git a/src/od-pandora/gui/PanelSavestate.cpp b/src/od-pandora/gui/PanelSavestate.cpp index cf2dfb5e..3dd54bdf 100644 --- a/src/od-pandora/gui/PanelSavestate.cpp +++ b/src/od-pandora/gui/PanelSavestate.cpp @@ -20,7 +20,6 @@ #include "uae.h" #include "gui.h" #include "savestate.h" -#include "target.h" #include "gui_handling.h" @@ -240,7 +239,7 @@ void RefreshPanelSavestate(void) } } - bool enabled = nr_units () == 0; + bool enabled = 1; // nr_units () == 0; optState0->setEnabled(enabled); optState1->setEnabled(enabled); optState2->setEnabled(enabled); diff --git a/src/od-pandora/gui/PanelSound.cpp b/src/od-pandora/gui/PanelSound.cpp index 89bcb0d5..eb73e273 100644 --- a/src/od-pandora/gui/PanelSound.cpp +++ b/src/od-pandora/gui/PanelSound.cpp @@ -16,7 +16,6 @@ #include "memory.h" #include "newcpu.h" #include "custom.h" -#include "target.h" #include "gui_handling.h" #include "sd-pandora/sound.h" diff --git a/src/od-pandora/gui/SelectFile.cpp b/src/od-pandora/gui/SelectFile.cpp index 83854d63..1c0b7ba4 100644 --- a/src/od-pandora/gui/SelectFile.cpp +++ b/src/od-pandora/gui/SelectFile.cpp @@ -350,6 +350,7 @@ static void SelectFileLoop(void) // Now we let the Gui object draw itself. uae_gui->draw(); // Finally we update the screen. + wait_for_vsync(); SDL_Flip(gui_screen); if(!dialogCreated) diff --git a/src/od-pandora/gui/SelectFolder.cpp b/src/od-pandora/gui/SelectFolder.cpp index 6fbe3212..18c23491 100644 --- a/src/od-pandora/gui/SelectFolder.cpp +++ b/src/od-pandora/gui/SelectFolder.cpp @@ -250,6 +250,7 @@ static void SelectFolderLoop(void) // Now we let the Gui object draw itself. uae_gui->draw(); // Finally we update the screen. + wait_for_vsync(); SDL_Flip(gui_screen); } } diff --git a/src/od-pandora/gui/ShowMessage.cpp b/src/od-pandora/gui/ShowMessage.cpp index e7e7e678..b9f1b7ff 100644 --- a/src/od-pandora/gui/ShowMessage.cpp +++ b/src/od-pandora/gui/ShowMessage.cpp @@ -143,6 +143,7 @@ static void ShowMessageLoop(void) // Now we let the Gui object draw itself. uae_gui->draw(); // Finally we update the screen. + wait_for_vsync(); SDL_Flip(gui_screen); } } diff --git a/src/od-pandora/gui/main_window.cpp b/src/od-pandora/gui/main_window.cpp index 8ac675af..4bf10ec9 100644 --- a/src/od-pandora/gui/main_window.cpp +++ b/src/od-pandora/gui/main_window.cpp @@ -10,7 +10,6 @@ #include "options.h" #include "uae.h" #include "gui.h" -#include "target.h" #include "gui_handling.h" #include "memory.h" #include "autoconf.h" @@ -204,7 +203,7 @@ namespace sdl //------------------------------------------------ // First start of emulator -> reset Amiga //------------------------------------------------ - uae_reset(0); + uae_reset(0,1); gui_running = false; } } else @@ -228,7 +227,7 @@ namespace sdl //------------------------------------------------- // Reset Amiga //------------------------------------------------- - uae_reset(1); + uae_reset(1,1); gui_running = false; break; @@ -278,6 +277,7 @@ namespace sdl // Now we let the Gui object draw itself. uae_gui->draw(); // Finally we update the screen. + wait_for_vsync(); SDL_Flip(gui_screen); if(refreshFuncAfterDraw != NULL) @@ -312,7 +312,7 @@ namespace widgets //------------------------------------------------- // Reset Amiga via click on Reset-button //------------------------------------------------- - uae_reset(1); + uae_reset(1, 1); gui_running = false; } else if(actionEvent.getSource() == cmdRestart) @@ -346,7 +346,7 @@ namespace widgets //------------------------------------------------ // First start of emulator -> reset Amiga //------------------------------------------------ - uae_reset(0); + uae_reset(0, 1); gui_running = false; } } @@ -592,7 +592,7 @@ void run_gui(void) std::cout << "Unknown exception" << std::endl; uae_quit(); } - if(quit_program > 1 || quit_program < -1) + if(quit_program > UAE_QUIT || quit_program < -UAE_QUIT) { //-------------------------------------------------- // Prepare everything for Reset of Amiga @@ -600,6 +600,6 @@ void run_gui(void) currprefs.nr_floppies = changed_prefs.nr_floppies; if(gui_rtarea_flags_onenter != gui_create_rtarea_flag(&changed_prefs)) - quit_program = -3; // Hardreset required... + quit_program = -UAE_RESET_HARD; // Hardreset required... } } diff --git a/src/od-pandora/mp3decoder.cpp b/src/od-pandora/mp3decoder.cpp index ba8d8ef7..d8fa14e9 100644 --- a/src/od-pandora/mp3decoder.cpp +++ b/src/od-pandora/mp3decoder.cpp @@ -1,7 +1,6 @@ #include "sysconfig.h" #include "sysdeps.h" -#include "target.h" #include "zfile.h" #include "mp3decoder.h" #include "cda_play.h" diff --git a/src/od-pandora/neon_helper.s b/src/od-pandora/neon_helper.s index 736aad37..07a166f3 100644 --- a/src/od-pandora/neon_helper.s +++ b/src/od-pandora/neon_helper.s @@ -758,8 +758,6 @@ NEON_doline_n8_exit: ldmia sp!, {r4-r8, pc} -.data - .align 8 Lookup_doline_n1: diff --git a/src/od-pandora/pandora.cpp b/src/od-pandora/pandora.cpp index 8e3c22a0..f642e7d5 100644 --- a/src/od-pandora/pandora.cpp +++ b/src/od-pandora/pandora.cpp @@ -30,7 +30,6 @@ #include "inputdevice.h" #include "keybuf.h" #include "keyboard.h" -#include "joystick.h" #include "disk.h" #include "savestate.h" #include "traps.h" @@ -333,6 +332,11 @@ void target_save_options (struct zfile *f, struct uae_prefs *p) } +void target_restart (void) +{ +} + + TCHAR *target_expand_environment (const TCHAR *path) { return strdup(path); @@ -463,7 +467,7 @@ int target_cfgfile_load (struct uae_prefs *p, const char *filename, int type, in } if(!isdefault) - inputdevice_updateconfig (p); + inputdevice_updateconfig (NULL, p); SetLastActiveConfig(filename); @@ -710,6 +714,21 @@ void loadAdfDir(void) } +int currVSyncRate = 0; +bool SetVSyncRate(int hz) +{ + char cmd[64]; + + if(currVSyncRate != hz) + { + snprintf((char*)cmd, 64, "sudo /usr/pandora/scripts/op_lcdrate.sh %d", hz); + system(cmd); + currVSyncRate = hz; + return true; + } + return false; +} + void setCpuSpeed() { #ifdef PANDORA_SPECIFIC @@ -727,9 +746,9 @@ void setCpuSpeed() if(changed_prefs.ntscmode != currprefs.ntscmode) { if(changed_prefs.ntscmode) - system("sudo /usr/pandora/scripts/op_lcdrate.sh 60"); + SetVSyncRate(60); else - system("sudo /usr/pandora/scripts/op_lcdrate.sh 50"); + SetVSyncRate(50); } #else return; @@ -806,7 +825,7 @@ uae_u32 emulib_target_getcpurate (uae_u32 v, uae_u32 *low) int main (int argc, char *argv[]) { struct sigaction action; - + defaultCpuSpeed = getDefaultCpuSpeed(); // Get startup path @@ -1063,8 +1082,9 @@ void amiga_clipboard_got_data (uaecptr data, uae_u32 size, uae_u32 actual) { } -void amiga_clipboard_want_data (void) +int amiga_clipboard_want_data (void) { + return 0; } void clipboard_vsync (void) diff --git a/src/od-pandora/pandora_gfx.cpp b/src/od-pandora/pandora_gfx.cpp index 92a028c3..6acd3a12 100644 --- a/src/od-pandora/pandora_gfx.cpp +++ b/src/od-pandora/pandora_gfx.cpp @@ -23,9 +23,21 @@ #include #endif +#include +#include + +#ifndef OMAPFB_WAITFORVSYNC +#define OMAPFB_WAITFORVSYNC _IOW('F', 0x20, unsigned int) +#endif +#ifndef OMAPFB_WAITFORVSYNC_FRAME +#define OMAPFB_WAITFORVSYNC_FRAME _IOWR('O', 70, unsigned int) +#endif + /* SDL variable for output of emulation */ SDL_Surface *prSDLScreen = NULL; +static int fbdev = -1; +static unsigned int current_vsync_frame = 0; /* Possible screen modes (x and y resolutions) */ #define MAX_SCREEN_MODES 6 @@ -58,7 +70,6 @@ int delay_savestate_frame = 0; #endif -static unsigned long previous_synctime = 0; static unsigned long next_synctime = 0; @@ -137,6 +148,11 @@ void graphics_subshutdown (void) SDL_FreeSurface(prSDLScreen); prSDLScreen = NULL; } + if(fbdev != -1) + { + close(fbdev); + fbdev = -1; + } } @@ -186,6 +202,9 @@ static void open_screen(struct uae_prefs *p) setenv("SDL_OMAP_LAYER_SIZE", layersize, 1); #endif } +#ifndef WIN32 + setenv("SDL_OMAP_VSYNC", "0", 1); +#endif #ifdef ANDROIDSDL update_onscreen(); @@ -215,6 +234,17 @@ static void open_screen(struct uae_prefs *p) InitAmigaVidMode(p); init_row_map(); } + + current_vsync_frame = 0; + fbdev = open("/dev/fb0", O_RDWR); + if(fbdev != -1) + { + // Check if we have vsync with frame counter... + current_vsync_frame = 0; + ioctl(fbdev, OMAPFB_WAITFORVSYNC_FRAME, ¤t_vsync_frame); + if(current_vsync_frame != 0) + current_vsync_frame += 2; + } } @@ -260,6 +290,8 @@ int check_prefs_changed_gfx (void) init_hz_full (); changed = 1; } + + currprefs.filesys_limit = changed_prefs.filesys_limit; return changed; } @@ -277,6 +309,17 @@ void unlockscr (void) SDL_UnlockSurface(prSDLScreen); } + +void wait_for_vsync(void) +{ + if(fbdev != -1) + { + unsigned int dummy; + ioctl(fbdev, OMAPFB_WAITFORVSYNC, &dummy); + } +} + + void flush_screen () { if (savestate_state == STATE_DOSAVE) @@ -291,26 +334,47 @@ void flush_screen () } } - unsigned long start = read_processor_time(); - if(start < next_synctime && next_synctime - start > time_per_frame - 1000) - usleep((next_synctime - start) - 750); - #ifdef WITH_LOGGING RefreshLiveInfo(); #endif - - SDL_Flip(prSDLScreen); + + unsigned long start = read_processor_time(); + if(current_vsync_frame == 0) + { + // Old style for vsync and idle time calc + if(start < next_synctime && next_synctime - start > time_per_frame - 1000) + usleep((next_synctime - start) - 750); + ioctl(fbdev, OMAPFB_WAITFORVSYNC, ¤t_vsync_frame); + } + else + { + // New style for vsync and idle time calc + int wait_till = current_vsync_frame; + do + { + ioctl(fbdev, OMAPFB_WAITFORVSYNC_FRAME, ¤t_vsync_frame); + } while (wait_till >= current_vsync_frame); + + if(wait_till + 1 != current_vsync_frame) + { + // We missed a vsync... + next_synctime = 0; + } + current_vsync_frame += currprefs.gfx_framerate; + } + last_synctime = read_processor_time(); + SDL_Flip(prSDLScreen); if(!screen_is_picasso) gfxvidinfo.bufmem = (uae_u8 *)prSDLScreen->pixels; - - if(last_synctime - next_synctime > time_per_frame - 1000 || next_synctime < start) + + if(last_synctime - next_synctime > time_per_frame * (1 + currprefs.gfx_framerate) - 1000 || next_synctime < start) adjust_idletime(0); else adjust_idletime(next_synctime - start); - if(last_synctime - next_synctime > time_per_frame - 5000) + if (last_synctime - next_synctime > time_per_frame - 5000) next_synctime = last_synctime + time_per_frame * (1 + currprefs.gfx_framerate); else next_synctime = next_synctime + time_per_frame * (1 + currprefs.gfx_framerate); @@ -425,7 +489,7 @@ int GetSurfacePixelFormat(void) } -int graphics_init (void) +int graphics_init (bool mousecapture) { graphics_subinit (); @@ -670,7 +734,72 @@ void picasso_InitResolutions (void) modesList(); DisplayModes = Displays[0].DisplayModes; } +#endif +bool vsync_switchmode (int hz) +{ + int changed_height = changed_prefs.gfx_size.height; + + if (hz >= 55) + hz = 60; + else + hz = 50; + + if(hz == 50 && currVSyncRate == 60) + { + // Switch from NTSC -> PAL + switch(changed_height) { + case 200: changed_height = 240; break; + case 216: changed_height = 262; break; + case 240: changed_height = 270; break; + case 256: changed_height = 270; break; + case 262: changed_height = 270; break; + case 270: changed_height = 270; break; + } + } + else if(hz == 60 && currVSyncRate == 50) + { + // Switch from PAL -> NTSC + switch(changed_height) { + case 200: changed_height = 200; break; + case 216: changed_height = 200; break; + case 240: changed_height = 200; break; + case 256: changed_height = 216; break; + case 262: changed_height = 216; break; + case 270: changed_height = 240; break; + } + } + + if(changed_height == currprefs.gfx_size.height && hz == currprefs.chipset_refreshrate) + return true; + + changed_prefs.gfx_size.height = changed_height; + + return true; +} + + +bool target_graphics_buffer_update (void) +{ + bool rate_changed = SetVSyncRate(currprefs.chipset_refreshrate); + + if(currprefs.gfx_size.height != changed_prefs.gfx_size.height) + { + update_display(&changed_prefs); + rate_changed = true; + } + + if(rate_changed) + { + black_screen_now(); + fpscounter_reset(); + time_per_frame = 1000 * 1000 / (currprefs.chipset_refreshrate); + } + + return true; +} + +#ifdef PICASSO96 void gfx_set_picasso_state (int on) { if (on == screen_is_picasso) diff --git a/src/od-pandora/pandora_gui.cpp b/src/od-pandora/pandora_gui.cpp index 19c932db..4d2b549b 100644 --- a/src/od-pandora/pandora_gui.cpp +++ b/src/od-pandora/pandora_gui.cpp @@ -438,7 +438,7 @@ static void after_leave_gui(void) } } if(update) - inputdevice_updateconfig(&changed_prefs); + inputdevice_updateconfig(NULL, &changed_prefs); inputdevice_copyconfig (&changed_prefs, &currprefs); inputdevice_config_change_test(); @@ -460,7 +460,7 @@ int gui_init (void) gui_to_prefs(); if(quit_program < 0) quit_program = -quit_program; - if(quit_program == 1) + if(quit_program == UAE_QUIT) ret = -2; // Quit without start of emulator setCpuSpeed(); @@ -591,7 +591,7 @@ void gui_handle_events (void) if(keystate[SDLK_LCTRL] && keystate[SDLK_LSUPER] && (keystate[SDLK_RSUPER] ||keystate[SDLK_MENU])) - uae_reset(0); + uae_reset(0,1); // L + R if(triggerL && triggerR) diff --git a/src/od-pandora/pandora_input.cpp b/src/od-pandora/pandora_input.cpp index 9af09705..314f82a3 100644 --- a/src/od-pandora/pandora_input.cpp +++ b/src/od-pandora/pandora_input.cpp @@ -143,30 +143,28 @@ struct inputdevice_functions inputdevicefunc_mouse = { get_mouse_flags }; -static void setid (struct uae_input_device *uid, int i, int slot, int sub, int port, int evt) +static void setid (struct uae_input_device *uid, int i, int slot, int sub, int port, int evt, bool gp) { - uid->eventid[slot][SPARE_SUB_EVENT] = uid->eventid[slot][sub]; - uid->flags[slot][SPARE_SUB_EVENT] = uid->flags[slot][sub]; - uid->port[slot][SPARE_SUB_EVENT] = MAX_JPORTS + 1; - + if (gp) + inputdevice_sparecopy (&uid[i], slot, 0); uid[i].eventid[slot][sub] = evt; uid[i].port[slot][sub] = port + 1; } -static void setid_af (struct uae_input_device *uid, int i, int slot, int sub, int port, int evt, int af) +static void setid_af (struct uae_input_device *uid, int i, int slot, int sub, int port, int evt, int af, bool gp) { - setid (uid, i, slot, sub, port, evt); + setid (uid, i, slot, sub, port, evt, gp); uid[i].flags[slot][sub] &= ~ID_FLAG_AUTOFIRE_MASK; if (af >= JPORT_AF_NORMAL) uid[i].flags[slot][sub] |= ID_FLAG_AUTOFIRE; } -int input_get_default_mouse (struct uae_input_device *uid, int i, int port, int af) +int input_get_default_mouse (struct uae_input_device *uid, int i, int port, int af, bool gp) { - setid (uid, i, ID_AXIS_OFFSET + 0, 0, port, port ? INPUTEVENT_MOUSE2_HORIZ : INPUTEVENT_MOUSE1_HORIZ); - setid (uid, i, ID_AXIS_OFFSET + 1, 0, port, port ? INPUTEVENT_MOUSE2_VERT : INPUTEVENT_MOUSE1_VERT); - setid_af (uid, i, ID_BUTTON_OFFSET + 0, 0, port, port ? INPUTEVENT_JOY2_FIRE_BUTTON : INPUTEVENT_JOY1_FIRE_BUTTON, af); - setid (uid, i, ID_BUTTON_OFFSET + 1, 0, port, port ? INPUTEVENT_JOY2_2ND_BUTTON : INPUTEVENT_JOY1_2ND_BUTTON); + setid (uid, i, ID_AXIS_OFFSET + 0, 0, port, port ? INPUTEVENT_MOUSE2_HORIZ : INPUTEVENT_MOUSE1_HORIZ, gp); + setid (uid, i, ID_AXIS_OFFSET + 1, 0, port, port ? INPUTEVENT_MOUSE2_VERT : INPUTEVENT_MOUSE1_VERT, gp); + setid_af (uid, i, ID_BUTTON_OFFSET + 0, 0, port, port ? INPUTEVENT_JOY2_FIRE_BUTTON : INPUTEVENT_JOY1_FIRE_BUTTON, af, gp); + setid (uid, i, ID_BUTTON_OFFSET + 1, 0, port, port ? INPUTEVENT_JOY2_2ND_BUTTON : INPUTEVENT_JOY1_2ND_BUTTON, gp); if (i == 0) return 1; @@ -489,30 +487,28 @@ struct inputdevice_functions inputdevicefunc_joystick = { get_joystick_flags }; -int input_get_default_joystick (struct uae_input_device *uid, int num, int port, int af, int mode) +int input_get_default_joystick (struct uae_input_device *uid, int num, int port, int af, int mode, bool gp) { int h, v; h = port ? INPUTEVENT_JOY2_HORIZ : INPUTEVENT_JOY1_HORIZ;; v = port ? INPUTEVENT_JOY2_VERT : INPUTEVENT_JOY1_VERT; - setid (uid, num, ID_AXIS_OFFSET + 0, 0, port, h); - setid (uid, num, ID_AXIS_OFFSET + 1, 0, port, v); + setid (uid, num, ID_AXIS_OFFSET + 0, 0, port, h, gp); + setid (uid, num, ID_AXIS_OFFSET + 1, 0, port, v, gp); - setid_af (uid, num, ID_BUTTON_OFFSET + 0, 0, port, port ? INPUTEVENT_JOY2_FIRE_BUTTON : INPUTEVENT_JOY1_FIRE_BUTTON, af); - setid (uid, num, ID_BUTTON_OFFSET + 1, 0, port, port ? INPUTEVENT_JOY2_2ND_BUTTON : INPUTEVENT_JOY1_2ND_BUTTON); - setid (uid, num, ID_BUTTON_OFFSET + 2, 0, port, port ? INPUTEVENT_JOY2_3RD_BUTTON : INPUTEVENT_JOY1_3RD_BUTTON); + setid_af (uid, num, ID_BUTTON_OFFSET + 0, 0, port, port ? INPUTEVENT_JOY2_FIRE_BUTTON : INPUTEVENT_JOY1_FIRE_BUTTON, af, gp); + setid (uid, num, ID_BUTTON_OFFSET + 1, 0, port, port ? INPUTEVENT_JOY2_2ND_BUTTON : INPUTEVENT_JOY1_2ND_BUTTON, gp); + setid (uid, num, ID_BUTTON_OFFSET + 2, 0, port, port ? INPUTEVENT_JOY2_3RD_BUTTON : INPUTEVENT_JOY1_3RD_BUTTON, gp); if (mode == JSEM_MODE_JOYSTICK_CD32) { - setid_af (uid, num, ID_BUTTON_OFFSET + 0, 0, port, port ? INPUTEVENT_JOY2_CD32_RED : INPUTEVENT_JOY1_CD32_RED, af); - setid_af (uid, num, ID_BUTTON_OFFSET + 0, 1, port, port ? INPUTEVENT_JOY2_FIRE_BUTTON : INPUTEVENT_JOY1_FIRE_BUTTON, af); - setid (uid, num, ID_BUTTON_OFFSET + 1, 0, port, port ? INPUTEVENT_JOY2_CD32_BLUE : INPUTEVENT_JOY1_CD32_BLUE); - setid (uid, num, ID_BUTTON_OFFSET + 1, 1, port, port ? INPUTEVENT_JOY2_2ND_BUTTON : INPUTEVENT_JOY1_2ND_BUTTON); - setid (uid, num, ID_BUTTON_OFFSET + 2, 0, port, port ? INPUTEVENT_JOY2_CD32_GREEN : INPUTEVENT_JOY1_CD32_GREEN); - setid (uid, num, ID_BUTTON_OFFSET + 3, 0, port, port ? INPUTEVENT_JOY2_CD32_YELLOW : INPUTEVENT_JOY1_CD32_YELLOW); - setid (uid, num, ID_BUTTON_OFFSET + 4, 0, port, port ? INPUTEVENT_JOY2_CD32_RWD : INPUTEVENT_JOY1_CD32_RWD); - setid (uid, num, ID_BUTTON_OFFSET + 5, 0, port, port ? INPUTEVENT_JOY2_CD32_FFW : INPUTEVENT_JOY1_CD32_FFW); - setid (uid, num, ID_BUTTON_OFFSET + 6, 0, port, port ? INPUTEVENT_JOY2_CD32_PLAY : INPUTEVENT_JOY1_CD32_PLAY); + setid_af (uid, num, ID_BUTTON_OFFSET + 0, 0, port, port ? INPUTEVENT_JOY2_CD32_RED : INPUTEVENT_JOY1_CD32_RED, af, gp); + setid (uid, num, ID_BUTTON_OFFSET + 1, 0, port, port ? INPUTEVENT_JOY2_CD32_BLUE : INPUTEVENT_JOY1_CD32_BLUE, gp); + setid (uid, num, ID_BUTTON_OFFSET + 2, 0, port, port ? INPUTEVENT_JOY2_CD32_GREEN : INPUTEVENT_JOY1_CD32_GREEN, gp); + setid (uid, num, ID_BUTTON_OFFSET + 3, 0, port, port ? INPUTEVENT_JOY2_CD32_YELLOW : INPUTEVENT_JOY1_CD32_YELLOW, gp); + setid (uid, num, ID_BUTTON_OFFSET + 4, 0, port, port ? INPUTEVENT_JOY2_CD32_RWD : INPUTEVENT_JOY1_CD32_RWD, gp); + setid (uid, num, ID_BUTTON_OFFSET + 5, 0, port, port ? INPUTEVENT_JOY2_CD32_FFW : INPUTEVENT_JOY1_CD32_FFW, gp); + setid (uid, num, ID_BUTTON_OFFSET + 6, 0, port, port ? INPUTEVENT_JOY2_CD32_PLAY : INPUTEVENT_JOY1_CD32_PLAY, gp); } if (num == 0) { return 1; diff --git a/src/od-pandora/pandora_mem.cpp b/src/od-pandora/pandora_mem.cpp index 334b702a..a5adf648 100644 --- a/src/od-pandora/pandora_mem.cpp +++ b/src/od-pandora/pandora_mem.cpp @@ -8,14 +8,18 @@ #include "memory.h" #include "newcpu.h" #include "custom.h" +#include "akiko.h" #include #include +extern uae_u8 *extendedkickmemory2; + uae_u8* natmem_offset = 0; uae_u32 natmem_size; static uae_u64 totalAmigaMemSize; #define MAXAMIGAMEM 0x6000000 // 64 MB (16 MB for standard Amiga stuff, 16 MG RTG, 64 MB Z3 fast) +uae_u32 max_z3fastmem; /* JIT can access few bytes outside of memory block of it executes code at the very end of memory block */ #define BARRIER 32 @@ -60,7 +64,7 @@ void alloc_AmigaMem(void) abort(); } additional_mem = (uae_u8*) mmap(natmem_offset + 0x10000000, ADDITIONAL_MEMSIZE + BARRIER, - PROT_READ | PROT_WRITE | PROT_EXEC, MAP_PRIVATE | MAP_ANONYMOUS | MAP_FIXED, -1, 0); + PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANONYMOUS | MAP_FIXED, -1, 0); if(additional_mem != MAP_FAILED) { // Allocation successful -> we can use natmem_offset for entire memory access @@ -189,3 +193,29 @@ uae_u8 *mapped_malloc (size_t s, const char *file) void mapped_free (uae_u8 *p) { } + + +void protect_roms (bool protect) +{ +/* + If this code is enabled, we can't switch back from JIT to nonJIT emulation... + + if (protect) { + // protect only if JIT enabled, always allow unprotect + if (!currprefs.cachesize) + return; + } + + // Protect all regions, which contains ROM + if(extendedkickmemory != NULL) + mprotect(extendedkickmemory, 0x80000, protect ? PROT_READ : PROT_READ | PROT_WRITE); + if(extendedkickmemory2 != NULL) + mprotect(extendedkickmemory2, 0x80000, protect ? PROT_READ : PROT_READ | PROT_WRITE); + if(kickmemory != NULL) + mprotect(kickmemory, 0x80000, protect ? PROT_READ : PROT_READ | PROT_WRITE); + if(rtarea != NULL) + mprotect(rtarea, RTAREA_SIZE, protect ? PROT_READ : PROT_READ | PROT_WRITE); + if(filesysory != NULL) + mprotect(filesysory, 0x10000, protect ? PROT_READ : PROT_READ | PROT_WRITE); +*/ +} diff --git a/src/od-pandora/pandora_rp9.cpp b/src/od-pandora/pandora_rp9.cpp index 11de6343..332b0420 100644 --- a/src/od-pandora/pandora_rp9.cpp +++ b/src/od-pandora/pandora_rp9.cpp @@ -361,9 +361,9 @@ static void parse_boot(struct uae_prefs *p, xmlNode *node) sprintf(dhx, "DH%d", add_HDF_DHnum); ++add_HDF_DHnum; if(hardfile_testrdb (target_file)) - uci = add_filesys_config(p, -1, dhx, 0, target_file, readonly, 0, 0, 0, 512, 127, 0, 0, 0); + uci = add_filesys_config(p, -1, dhx, 0, target_file, readonly, 0, 0, 0, 0, 512, 127, 0, 0, 0, 0, 0, 0); else - uci = add_filesys_config(p, -1, dhx, 0, target_file, readonly, 32, 1, 2, 512, 127, 0, 0, 0); + uci = add_filesys_config(p, -1, dhx, 0, target_file, readonly, 0, 32, 1, 2, 512, 127, 0, 0, 0, 0, 0, 0); if (uci) hardfile_do_disk_change (uci, 1); gui_force_rtarea_hdchange(); @@ -460,9 +460,9 @@ static void extract_media(struct uae_prefs *p, unzFile uz, xmlNode *node) sprintf(dhx, "DH%d", add_HDF_DHnum); ++add_HDF_DHnum; if(hardfile_testrdb (target_file)) - uci = add_filesys_config(p, -1, dhx, 0, target_file, 0, 0, 0, 0, 512, 0, 0, 0, 0); + uci = add_filesys_config(p, -1, dhx, 0, target_file, 0, 0, 0, 0, 0, 512, 0, 0, 0, 0, 0, 0, 0); else - uci = add_filesys_config(p, -1, dhx, 0, target_file, 0, 32, 1, 2, 512, 0, 0, 0, 0); + uci = add_filesys_config(p, -1, dhx, 0, target_file, 0, 0, 32, 1, 2, 512, 0, 0, 0, 0, 0, 0, 0); if (uci) hardfile_do_disk_change (uci, 1); gui_force_rtarea_hdchange(); diff --git a/src/od-pandora/picasso96.cpp b/src/od-pandora/picasso96.cpp index 55a2adae..33e9606a 100644 --- a/src/od-pandora/picasso96.cpp +++ b/src/od-pandora/picasso96.cpp @@ -48,8 +48,8 @@ #include "options.h" #include "td-sdl/thread.h" #include "memory.h" -#include "newcpu.h" #include "custom.h" +#include "newcpu.h" #include "xwin.h" #include "savestate.h" #include "autoconf.h" @@ -71,10 +71,10 @@ static int p96syncrate; int p96hsync_counter; #ifdef PICASSO96 - -#define P96TRACING_ENABLED 0 -#define P96TRACING_LEVEL 0 - +#ifdef DEBUG // Change this to _DEBUG for debugging +#define P96TRACING_ENABLED 1 +#define P96TRACING_LEVEL 1 +#endif static void flushpixels(void); #if P96TRACING_ENABLED #define P96TRACE(x) do { write_log x; } while(0) @@ -157,7 +157,10 @@ static void checkrtglibrary(void) uae_u16 ver = get_word(v + 20); uae_u16 rev = get_word(v + 22); if (ver * 10000 + rev < UAE_RTG_LIBRARY_VERSION * 10000 + UAE_RTG_LIBRARY_REVISION) { - write_log(_T("installed rtg.library: %d.%d, required: %d.%d\n"), ver, rev, UAE_RTG_LIBRARY_VERSION, UAE_RTG_LIBRARY_REVISION); + TCHAR msg[2000]; + sprintf(msg, _T("installed rtg.library: %d.%d, required: %d.%d\n"), ver, rev, UAE_RTG_LIBRARY_VERSION, UAE_RTG_LIBRARY_REVISION); + write_log(msg); + gui_message(msg); } else { write_log(_T("P96: rtg.library %d.%d detected\n"), ver, rev); } @@ -521,15 +524,17 @@ void picasso_trigger_vblank (void) return; put_long (uaegfx_base + CARD_IRQPTR, ABI_interrupt + PSSO_BoardInfo_SoftInterrupt); put_byte (uaegfx_base + CARD_IRQFLAG, 1); - INTREQ (0x8000 | 0x0008); } void picasso_handle_vsync (void) { - picasso_trigger_vblank(); + if (currprefs.rtgmem_size == 0) + return; - if (!picasso_on) - return; + if (!picasso_on) { + picasso_trigger_vblank (); + return; + } framecnt++; @@ -537,8 +542,10 @@ void picasso_handle_vsync (void) ; } else { flushpixels (); + flush_screen(); } - gfx_unlock_picasso (); + + picasso_trigger_vblank(); } static int set_panning_called = 0; @@ -580,13 +587,12 @@ enum { RGBFB_CLUT_8 }; -static void setconvert (void) +static int getconvert (int rgbformat, int pixbytes) { - int d = picasso_vidinfo.pixbytes; - int v; + int v = 0; + int d = pixbytes; - v = 0; - switch (picasso96_state.RGBFormat) + switch (rgbformat) { case RGBFB_CLUT: if (d == 1) @@ -672,9 +678,16 @@ static void setconvert (void) v = RGBFB_R8G8B8A8_32; break; } - picasso_convert = v; + return v; +} + +static void setconvert (void) +{ + picasso_convert = getconvert (picasso96_state.RGBFormat, picasso_vidinfo.pixbytes); host_mode = GetSurfacePixelFormat(); - write_log (_T("RTG conversion: Depth=%d HostRGBF=%d P96RGBF=%d Mode=%d\n"), d, host_mode, picasso96_state.RGBFormat, v); + picasso_palette (); + write_log (_T("RTG conversion: Depth=%d HostRGBF=%d P96RGBF=%d Mode=%d\n"), + picasso_vidinfo.pixbytes, host_mode, picasso96_state.RGBFormat, picasso_convert); } /* Clear our screen, since we've got a new Picasso screen-mode, and refresh with the proper contents @@ -1055,6 +1068,8 @@ d7: RGBFTYPE RGBFormat */ static uae_u32 REGPARAM2 picasso_SetSpritePosition (TrapContext *ctx) { + uaecptr bi = m68k_areg (regs, 0); + boardinfo = bi; return 0; } @@ -1073,6 +1088,8 @@ This function changes one of the possible three colors of the hardware sprite. */ static uae_u32 REGPARAM2 picasso_SetSpriteColor (TrapContext *ctx) { + uaecptr bi = m68k_areg (regs, 0); + boardinfo = bi; return 0; } @@ -1104,6 +1121,8 @@ compensate for this when accounting for hotspot offsets and sprite dimensions. */ static uae_u32 REGPARAM2 picasso_SetSpriteImage (TrapContext *ctx) { + uaecptr bi = m68k_areg (regs, 0); + boardinfo = bi; return 0; } @@ -1468,7 +1487,7 @@ void picasso96_alloc (TrapContext *ctx) picasso96_alloc2 (ctx); } -static uaecptr inituaegfxfuncs (uaecptr start, uaecptr ABI); +static void inituaegfxfuncs (uaecptr start, uaecptr ABI); static void inituaegfx (uaecptr ABI) { uae_u32 flags; @@ -1503,14 +1522,17 @@ static void inituaegfx (uaecptr ABI) flags = get_long (ABI + PSSO_BoardInfo_Flags); flags &= 0xffff0000; + if (flags & BIF_NOBLITTER) + write_log (_T("P96: Blitter disabled in devs:monitors/uaegfx!\n")); flags |= BIF_BLITTER | BIF_NOMEMORYMODEMIX; flags &= ~BIF_HARDWARESPRITE; - if (flags & BIF_NOBLITTER) - write_log (_T("P96: Blitter disabled in devs:monitors/uaegfx!\n")); - if (!uaegfx_old) flags |= BIF_VBLANKINTERRUPT; + if (!(flags & BIF_INDISPLAYCHAIN)) { + write_log (_T("P96: BIF_INDISPLAYCHAIN force-enabled!\n")); + flags |= BIF_INDISPLAYCHAIN; + } put_long (ABI + PSSO_BoardInfo_Flags, flags); @@ -1537,10 +1559,13 @@ static void addmode (uaecptr AmigaBoardInfo, uaecptr *amem, struct LibResolution res->Height = h; res->Flags = P96F_PUBLIC; memcpy (res->P96ID, "P96-0:", 6); - if (name) - strcpy (res->Name, name); - else + if (name) { + char *n2 = ua (name); + strcpy (res->Name, n2); + xfree (n2); + } else { sprintf (res->Name, "UAE:%4dx%4d", w, h); + } for (depth = 8; depth <= 32; depth++) { if (!p96depth (depth)) @@ -1561,7 +1586,7 @@ static void addmode (uaecptr AmigaBoardInfo, uaecptr *amem, struct LibResolution static uae_u32 REGPARAM2 picasso_InitCard (TrapContext *ctx) { int LibResolutionStructureCount = 0; - int i, j, unkcnt; + int i, j, unkcnt, cnt; uaecptr amem; uaecptr AmigaBoardInfo = m68k_areg (regs, 0); @@ -1575,12 +1600,15 @@ static uae_u32 REGPARAM2 picasso_InitCard (TrapContext *ctx) inituaegfx (AmigaBoardInfo); i = 0; - unkcnt = 0; + unkcnt = cnt = 0; while (newmodes[i].depth >= 0) { struct LibResolution res = { 0 }; + TCHAR *s; j = i; addmode (AmigaBoardInfo, &amem, &res, newmodes[i].res.width, newmodes[i].res.height, NULL, 0, &unkcnt); - write_log (_T("%08X %4dx%4d %s\n"), res.DisplayID, res.Width, res.Height, res.Name); + s = au (res.Name); + write_log (_T("%2d: %08X %4dx%4d %s\n"), ++cnt, res.DisplayID, res.Width, res.Height, s); + xfree (s); while (newmodes[i].depth >= 0 && newmodes[i].res.width == newmodes[j].res.width && newmodes[i].res.height == newmodes[j].res.height) @@ -1693,6 +1721,8 @@ static uae_u32 REGPARAM2 picasso_SetColorArray (TrapContext *ctx) uae_u16 count = m68k_dreg (regs, 1); uaecptr boardinfo = m68k_areg (regs, 0); uaecptr clut = boardinfo + PSSO_BoardInfo_CLUT; + if (start > 256 || start + count > 256) + return 0; updateclut (clut, start, count); P96TRACE((_T("SetColorArray(%d,%d)\n"), start, count)); return 1; @@ -2567,7 +2597,8 @@ static uae_u32 REGPARAM2 picasso_SetDisplay (TrapContext *ctx) void init_hz_p96 (void) { - p96vblank = currprefs.ntscmode ? 60 : 50; + p96vblank = vblank_hz; + p96syncrate = maxvpos_nom * vblank_hz / p96vblank; } /* NOTE: Watch for those planeptrs of 0x00000000 and 0xFFFFFFFF for all zero / all one bitmaps !!!! */ @@ -2830,6 +2861,22 @@ static uae_u32 REGPARAM2 picasso_BlitPlanar2Direct (TrapContext *ctx) return result; } +#include "statusline.h" +static void statusline (uae_u8 *dst) +{ + int y; + int dst_height, dst_width, pitch; + + dst_height = picasso96_state.Height; + dst_width = picasso96_state.Width; + pitch = picasso_vidinfo.rowbytes; + for (y = 0; y < TD_TOTAL_HEIGHT; y++) { + int line = dst_height - TD_TOTAL_HEIGHT + y; + uae_u8 *buf = dst + line * pitch; + draw_status_line_single (buf, y, dst_width); + } +} + static void copyall (uae_u8 *src, uae_u8 *dst) { if (picasso96_state.RGBFormat == RGBFB_R5G6B5) @@ -2857,14 +2904,15 @@ static void flushpixels (void) if (doskip () && p96skipmode == 1) return; - if(picasso96_state.RGBFormat == RGBFB_CLUT) - picasso_palette (); - dst = gfx_lock_picasso (); if (dst == NULL) return; copyall (src + off, dst); + + if(currprefs.leds_on_screen) + statusline (dst); + gfx_unlock_picasso (); } @@ -2998,11 +3046,11 @@ static void initvblankirq (TrapContext *ctx, uaecptr base) put_long (p2 + 14, base + CARD_IRQFLAG); put_long (p2 + 18, c); - put_word (c, 0x4a11); c += 2; // tst.b (a1) + put_word (c, 0x4a11); c += 2; // tst.b (a1) CARD_IRQFLAG put_word (c, 0x670e); c += 2; // beq.s label put_word (c, 0x4211); c += 2; // clr.b (a1) - put_long (c, 0x22690004); c += 4; // move.l 4(a1),a1 - put_long (c, 0x2c780004); c += 4; // move.l 4.w,a6 + put_long (c, 0x2c690008); c += 4; // move.l 8(a1),a6 CARD_IRQEXECBASE + put_long (c, 0x22690004); c += 4; // move.l 4(a1),a1 CARD_IRQPTR put_long (c, 0x4eaeff4c); c += 4; // jsr Cause(a6) put_word (c, 0x7000); c += 2; // label: moveq #0,d0 put_word (c, RTS); // rts @@ -3060,13 +3108,10 @@ static uae_u32 REGPARAM2 picasso_SetMemoryMode(TrapContext *ctx) if (ABI) \ put_long (ABI + func, start); -static uaecptr inituaegfxfuncs (uaecptr start, uaecptr ABI) +static void inituaegfxfuncs (uaecptr start, uaecptr ABI) { - uaecptr old = here (); - uaecptr ptr; - if (uaegfx_old) - return 0; + return; org (start); dw (RTS); @@ -3222,26 +3267,26 @@ static uaecptr inituaegfxfuncs (uaecptr start, uaecptr ABI) if (ABI) initvblankABI (uaegfx_base, ABI); - ptr = here (); - org (old); - return ptr; } void picasso_reset (void) { - uaegfx_base = 0; - uaegfx_old = 0; - uaegfx_active = 0; - interrupt_enabled = 0; - reserved_gfxmem = 0; - resetpalette(); + if (savestate_state != STATE_RESTORE) { + uaegfx_base = 0; + uaegfx_old = 0; + uaegfx_active = 0; + interrupt_enabled = 0; + reserved_gfxmem = 0; + resetpalette(); + InitPicasso96 (); + } } -void uaegfx_install_code (void) +void uaegfx_install_code (uaecptr start) { - uaecptr start = here (); uaegfx_rom = start; - org (inituaegfxfuncs (start, 0)); + org (start); + inituaegfxfuncs (start, 0); } #define UAEGFX_VERSION 3 @@ -3323,6 +3368,7 @@ static uaecptr uaegfx_card_install (TrapContext *ctx, uae_u32 extrasize) m68k_dreg (regs, 0) = 0; put_long (uaegfx_base + CARD_EXPANSIONBASE, CallLib (ctx, exec, -0x228)); /* OpenLibrary */ put_long (uaegfx_base + CARD_EXECBASE, exec); + put_long (uaegfx_base + CARD_IRQEXECBASE, exec); put_long (uaegfx_base + CARD_NAME, uaegfx_resname); put_long (uaegfx_base + CARD_RESLIST, uaegfx_base + CARD_SIZEOF); put_long (uaegfx_base + CARD_RESLISTSIZE, extrasize); @@ -3384,14 +3430,20 @@ void restore_p96_finish (void) init_alloc (NULL, 0); if (uaegfx_rom && boardinfo) inituaegfxfuncs (uaegfx_rom, boardinfo); - if (set_gc_called) { - init_picasso_screen (); - init_hz_p96 (); - } +#if 0 + if (picasso_requested_on) { + picasso_on = true; + set_gc_called = 1; + init_picasso_screen (); + init_hz_p96 (); + picasso_refresh (); + } +#endif } uae_u8 *restore_p96 (uae_u8 *src) { uae_u32 flags; + int i; if (restore_u32 () != 2) return src; @@ -3420,6 +3472,13 @@ uae_u8 *restore_p96 (uae_u8 *src) uaegfx_base = restore_u32 (); uaegfx_rom = restore_u32 (); boardinfo = restore_u32 (); + if (flags & 64) { + for (i = 0; i < 256; i++) { + picasso96_state.CLUT[i].Red = restore_u8 (); + picasso96_state.CLUT[i].Green = restore_u8 (); + picasso96_state.CLUT[i].Blue = restore_u8 (); + } + } picasso96_state.HostAddress = NULL; picasso_SetPanningInit(); picasso96_state.Extent = picasso96_state.Address + picasso96_state.BytesPerRow * picasso96_state.VirtualHeight; @@ -3429,6 +3488,7 @@ uae_u8 *restore_p96 (uae_u8 *src) uae_u8 *save_p96 (int *len, uae_u8 *dstptr) { uae_u8 *dstbak,*dst; + int i; if (currprefs.rtgmem_size == 0) return NULL; @@ -3438,7 +3498,7 @@ uae_u8 *save_p96 (int *len, uae_u8 *dstptr) dstbak = dst = xmalloc (uae_u8, 1000); save_u32 (2); save_u32 ((picasso_on ? 1 : 0) | (set_gc_called ? 2 : 0) | (set_panning_called ? 4 : 0) | - (interrupt_enabled ? 32 : 0)); + (interrupt_enabled ? 32 : 0) | 64); save_u32 (currprefs.rtgmem_size); save_u32 (picasso96_state.Address); save_u32 (picasso96_state.RGBFormat); @@ -3455,6 +3515,11 @@ uae_u8 *save_p96 (int *len, uae_u8 *dstptr) save_u32 (uaegfx_base); save_u32 (uaegfx_rom); save_u32 (boardinfo); + for (i = 0; i < 256; i++) { + save_u8 (picasso96_state.CLUT[i].Red); + save_u8 (picasso96_state.CLUT[i].Green); + save_u8 (picasso96_state.CLUT[i].Blue); + } *len = dst - dstbak; return dstbak; } diff --git a/src/od-pandora/sigsegv_handler.cpp b/src/od-pandora/sigsegv_handler.cpp index d9ba75fe..1a9413cd 100644 --- a/src/od-pandora/sigsegv_handler.cpp +++ b/src/od-pandora/sigsegv_handler.cpp @@ -63,7 +63,7 @@ enum { ARM_REG_CPSR = 16 }; -static inline void unknown_instruction(uae_u32 instr) +STATIC_INLINE void unknown_instruction(uae_u32 instr) { panicbug("Unknown instruction %08x!\n", instr); SDL_Quit(); @@ -76,7 +76,8 @@ static bool handle_arm_instruction(unsigned long *pregs, uintptr addr) unsigned int *pc = (unsigned int *)pregs[ARM_REG_PC]; panicbug("IP: %p [%08x] %p\n", pc, pc[0], addr); - if (pc == 0) return false; + if (pc == 0) + return false; if (in_handler > 0) { @@ -111,26 +112,28 @@ static bool handle_arm_instruction(unsigned long *pregs, uintptr addr) style = SIGNED; transfer_size = SIZE_BYTE; break; - } + } break; - case 2: - case 3: // Single Data Transfer (LDR, STR) + case 2: + case 3: // Single Data Transfer (LDR, STR) style = UNSIGNED; // Determine transfer size (B bit) if (((opcode >> 22) & 1) == 1) - transfer_size = SIZE_BYTE; + transfer_size = SIZE_BYTE; else - transfer_size = SIZE_INT; + transfer_size = SIZE_INT; break; - default: + default: panicbug("FIXME: support load/store mutliple?\n"); + in_handler--; return false; - } + } - // Check for invalid transfer size (SWP instruction?) - if (transfer_size == SIZE_UNKNOWN) { - panicbug("Invalid transfer size\n"); - return false; + // Check for invalid transfer size (SWP instruction?) + if (transfer_size == SIZE_UNKNOWN) { + panicbug("Invalid transfer size\n"); + in_handler--; + return false; } // Determine transfer type (L bit) @@ -142,15 +145,15 @@ static bool handle_arm_instruction(unsigned long *pregs, uintptr addr) int rd = (opcode >> 12) & 0xf; #if DEBUG static const char * reg_names[] = { - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", - "r8", "r9", "sl", "fp", "ip", "sp", "lr", "pc" + "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", + "r8", "r9", "sl", "fp", "ip", "sp", "lr", "pc" }; panicbug("%s %s register %s\n", - transfer_size == SIZE_BYTE ? "byte" : - transfer_size == SIZE_WORD ? "word" : - transfer_size == SIZE_INT ? "long" : "unknown", - transfer_type == TYPE_LOAD ? "load to" : "store from", - reg_names[rd]); + transfer_size == SIZE_BYTE ? "byte" : + transfer_size == SIZE_WORD ? "word" : + transfer_size == SIZE_INT ? "long" : "unknown", + transfer_type == TYPE_LOAD ? "load to" : "store from", + reg_names[rd]); panicbug("\n"); // for (int i = 0; i < 16; i++) { // panicbug("%s : %p", reg_names[i], pregs[i]); @@ -201,6 +204,7 @@ static bool handle_arm_instruction(unsigned long *pregs, uintptr addr) buserr: panicbug("Amiga bus error\n"); + in_handler--; // BUS_ERROR(addr); return false; @@ -219,6 +223,10 @@ void signal_segv(int signum, siginfo_t* info, void*ptr) ucontext_t *ucontext = (ucontext_t*)ptr; Dl_info dlinfo; +#ifdef TRACER + trace_end(); +#endif + void **bp = 0; void *ip = 0; @@ -233,6 +241,7 @@ void signal_segv(int signum, siginfo_t* info, void*ptr) printf("Illegal Instruction!\n"); else printf("Segmentation Fault!\n"); + printf("info.si_signo = %d\n", signum); printf("info.si_errno = %d\n", info->si_errno); // printf("info.si_code = %d (%s)\n", info->si_code, si_codes[info->si_code]); @@ -262,34 +271,58 @@ void signal_segv(int signum, siginfo_t* info, void*ptr) printf("Err Code = 0x%08x\n", ucontext->uc_mcontext.error_code); printf("Old Mask = 0x%08x\n", ucontext->uc_mcontext.oldmask); - dump_compiler((uae_u32*)ucontext->uc_mcontext.arm_pc); - -// printf("Stack trace:\n"); -// ip = (void*)ucontext->uc_mcontext.arm_r10; -// bp = (void**)ucontext->uc_mcontext.arm_r10; -// while(bp && ip) { -// if (!dladdr(ip, &dlinfo)) { -// printf("IP out of range\n"); -// break; -// } -// const char *symname = dlinfo.dli_sname; -// printf("% 2d: %p <%s + 0x%08x> (%s)\n", ++f, ip, symname, -// (unsigned long)ip - (unsigned long)dlinfo.dli_saddr, dlinfo.dli_fname); -// if(dlinfo.dli_sname && !strcmp(dlinfo.dli_sname, "main")) -// break; -// ip = bp[1]; -// bp = (void**)bp[0]; -// } -// -// printf("Stack trace (non-dedicated):\n"); -// char **strings; -// void *bt[20]; -// int sz = backtrace(bt, 20); -// strings = backtrace_symbols(bt, sz); -// for(i = 0; i < sz; ++i) -// printf("%s\n", strings[i]); -// printf("End of stack trace.\n"); +// dump_compiler((uae_u32*)ucontext->uc_mcontext.arm_pc); + void *getaddr = (void *)ucontext->uc_mcontext.arm_lr; + if(dladdr(getaddr, &dlinfo)) + printf("LR - 0x%08X: <%s> (%s)\n", getaddr, dlinfo.dli_sname, dlinfo.dli_fname); + else + printf("LR - 0x%08X: symbol not found\n", getaddr); + +// printf("Stack trace:\n"); + +/* + #define MAX_BACKTRACE 10 + + void *array[MAX_BACKTRACE]; + int size = backtrace(array, MAX_BACKTRACE); + for(int i=0; i (%s)\n", array[i], symname, + (unsigned long)array[i] - (unsigned long)dlinfo.dli_saddr, dlinfo.dli_fname); + } + } +*/ + +/* + ip = (void*)ucontext->uc_mcontext.arm_r10; + bp = (void**)ucontext->uc_mcontext.arm_r10; + while(bp && ip) { + if (!dladdr(ip, &dlinfo)) { + printf("IP out of range\n"); + break; + } + const char *symname = dlinfo.dli_sname; + printf("% 2d: %p <%s + 0x%08x> (%s)\n", ++f, ip, symname, + (unsigned long)ip - (unsigned long)dlinfo.dli_saddr, dlinfo.dli_fname); + if(dlinfo.dli_sname && !strcmp(dlinfo.dli_sname, "main")) + break; + ip = bp[1]; + bp = (void**)bp[0]; + } + + printf("Stack trace (non-dedicated):\n"); + char **strings; + void *bt[20]; + int sz = backtrace(bt, 20); + strings = backtrace_symbols(bt, sz); + for(i = 0; i < sz; ++i) + printf("%s\n", strings[i]); + printf("End of stack trace.\n"); +*/ + SDL_Quit(); - abort(); + exit(1); } diff --git a/src/od-pandora/sysconfig.h b/src/od-pandora/sysconfig.h index f749f76b..38709750 100644 --- a/src/od-pandora/sysconfig.h +++ b/src/od-pandora/sysconfig.h @@ -77,7 +77,7 @@ #define HAVE_GETMNTENT 1 /* Define if your struct stat has st_blocks. */ -#define HAVE_ST_BLOCKS +/* #undef HAVE_ST_BLOCKS */ /* Define if utime(file, NULL) sets file's timestamp to the present. */ #define HAVE_UTIME_NULL 1 @@ -446,6 +446,14 @@ #define strcmpi(x,y) strcasecmp(x,y) #define stricmp(x,y) strcasecmp(x,y) +#define A_ZIP +//#define A_RAR +#define A_7Z +#define A_LHA +#define A_LZX +#define A_DMS +#define A_WRP + #ifndef MAX_PATH #define MAX_PATH 256 #endif @@ -466,6 +474,10 @@ typedef unsigned char boolean; #define FALSE 0 #define TRUE 1 +#ifndef USHORT +#define USHORT unsigned short +#endif + #define Sleep(x) usleep(x*1000) /* Some defines to make it easier to compare files with WinUAE */ @@ -475,6 +487,7 @@ typedef unsigned char boolean; #define _tcsftime(w,x,y,z) strftime(w,x,y,z) #define _timezone timezone #define _daylight daylight +#define _ftime(x) ftime(x) #define _tfopen(x,y) fopen(x,y) #define _ftelli64(x) ftello64(x) #define _fseeki64(x,y,z) fseeko64(x,y,z) @@ -497,10 +510,15 @@ typedef unsigned char boolean; #define _totlower(x) tolower(x) #define _istupper(x) isupper(x) #define _istspace(x) isspace(x) +#define _istdigit(x) isdigit(x) #define _tstoi(x) atoi(x) #define _tstol(x) atol(x) +#define _tstof(x) atof(x) #define _tcstol(x,y,z) strtol(x,y,z) #define _tcstod(x,y) strtod(x,y) #define _stprintf sprintf #define _vstprintf(x,y,z) vsprintf(x,y,z) #define _vsntprintf(w,x,y,z) vsnprintf(w,x,y,z) +#define _strtoui64(x,y,z) strtoll(x,y,z) +#define _istalnum(x) isalnum(x) +#define _tcsspn(x,y) strspn(x,y) diff --git a/src/od-pandora/target.h b/src/od-pandora/target.h index e8acde10..063dcb07 100644 --- a/src/od-pandora/target.h +++ b/src/od-pandora/target.h @@ -6,6 +6,8 @@ * Copyright 1997 Bernd Schmidt */ +#include + #define TARGET_NAME "pandora" #define NO_MAIN_IN_MAIN_C @@ -17,10 +19,14 @@ extern int emulating; extern int z3_start_adr; extern int rtg_start_adr; +extern int currVSyncRate; + void run_gui(void); void InGameMessage(const char *msg); +void wait_for_vsync(void); void saveAdfDir(void); +bool SetVSyncRate(int hz); void setCpuSpeed(void); void resetCpuSpeed(void); void update_display(struct uae_prefs *); @@ -51,3 +57,48 @@ void reinit_amiga(void); int count_HDs(struct uae_prefs *p); extern void gui_force_rtarea_hdchange(void); extern bool hardfile_testrdb (const TCHAR *filename); + +#ifdef __cplusplus + extern "C" { +#endif + void trace_begin (void); + void trace_end (void); +#ifdef __cplusplus + } +#endif + + +STATIC_INLINE size_t uae_tcslcpy(TCHAR *dst, const TCHAR *src, size_t size) +{ + if (size == 0) { + return 0; + } + size_t src_len = _tcslen(src); + size_t cpy_len = src_len; + if (cpy_len >= size) { + cpy_len = size - 1; + } + memcpy(dst, src, cpy_len * sizeof(TCHAR)); + dst[cpy_len] = _T('\0'); + return src_len; +} + +STATIC_INLINE size_t uae_strlcpy(char *dst, const char *src, size_t size) +{ + if (size == 0) { + return 0; + } + size_t src_len = strlen(src); + size_t cpy_len = src_len; + if (cpy_len >= size) { + cpy_len = size - 1; + } + memcpy(dst, src, cpy_len); + dst[cpy_len] = '\0'; + return src_len; +} + +STATIC_INLINE int max(int x, int y) +{ + return x > y ? x : y; +} diff --git a/src/od-pandora/writelog.cpp b/src/od-pandora/writelog.cpp index acca7c2e..0d9bb8ee 100644 --- a/src/od-pandora/writelog.cpp +++ b/src/od-pandora/writelog.cpp @@ -58,5 +58,5 @@ void jit_abort (const TCHAR *format,...) if (!happened) gui_message ("JIT: Serious error:\n%s", buffer); happened = 1; - uae_reset (1); + uae_reset (1, 0); } diff --git a/src/od-rasp/rasp_gfx.cpp b/src/od-rasp/rasp_gfx.cpp index f3c2e59a..67cde1ca 100644 --- a/src/od-rasp/rasp_gfx.cpp +++ b/src/od-rasp/rasp_gfx.cpp @@ -347,6 +347,11 @@ void unlockscr (void) //SDL_UnlockSurface(prSDLScreen); } +void wait_for_vsync(void) +{ + // Temporary +} + void flush_screen () { @@ -526,7 +531,7 @@ int GetSurfacePixelFormat(void) } -int graphics_init (void) +int graphics_init(bool mousecapture) { int i,j; @@ -782,6 +787,70 @@ void picasso_InitResolutions (void) DisplayModes = Displays[0].DisplayModes; } +bool vsync_switchmode (int hz) +{ + int changed_height = changed_prefs.gfx_size.height; + + if (hz >= 55) + hz = 60; + else + hz = 50; + + if(hz == 50 && currVSyncRate == 60) + { + // Switch from NTSC -> PAL + switch(changed_height) { + case 200: changed_height = 240; break; + case 216: changed_height = 262; break; + case 240: changed_height = 270; break; + case 256: changed_height = 270; break; + case 262: changed_height = 270; break; + case 270: changed_height = 270; break; + } + } + else if(hz == 60 && currVSyncRate == 50) + { + // Switch from PAL -> NTSC + switch(changed_height) { + case 200: changed_height = 200; break; + case 216: changed_height = 200; break; + case 240: changed_height = 200; break; + case 256: changed_height = 216; break; + case 262: changed_height = 216; break; + case 270: changed_height = 240; break; + } + } + + if(changed_height == currprefs.gfx_size.height && hz == currprefs.chipset_refreshrate) + return true; + + changed_prefs.gfx_size.height = changed_height; + + return true; +} + +bool target_graphics_buffer_update (void) +{ + bool rate_changed = 0; + //bool rate_changed = SetVSyncRate(currprefs.chipset_refreshrate); + + if(currprefs.gfx_size.height != changed_prefs.gfx_size.height) + { + update_display(&changed_prefs); + rate_changed = true; + } + + if(rate_changed) + { + black_screen_now(); + fpscounter_reset(); + time_per_frame = 1000 * 1000 / (currprefs.chipset_refreshrate); + } + + return true; +} + + void gfx_set_picasso_state (int on) { if (on == screen_is_picasso) diff --git a/src/readcpu.cpp b/src/readcpu.cpp index 34c01078..491e747b 100644 --- a/src/readcpu.cpp +++ b/src/readcpu.cpp @@ -163,28 +163,6 @@ struct mnemolookup lookuptab[] = { struct instr *table68k; -static int specialcase (uae_u16 opcode, int cpu_lev) -{ - int mode = (opcode >> 3) & 7; - int reg = opcode & 7; - - if (cpu_lev >= 2) - return cpu_lev; - /* TST.W A0, TST.L A0, TST.x (d16,PC) and TST.x (d8,PC,Xn) are 68020+ only */ - if ((opcode & 0xff00) == 0x4a00) { - if (mode == 7 && (reg == 4 || reg == 2 || reg == 3)) - return 2; - if (mode == 1) /* Ax */ - return 2; - } - /* CMPI.W #x,(d16,PC) and CMPI.W #x,(d8,PC,Xn) are 68020+ only */ - if ((opcode & 0xff00) == 0x0c00) { - if (mode == 7 && (reg == 2 || reg == 3)) - return 2; - } - return cpu_lev; -} - static amodes mode_from_str (const TCHAR *str) { if (_tcsncmp (str, _T("Dreg"), 4) == 0) return Dreg; @@ -786,7 +764,8 @@ endofline: table68k[opc].duse = usedst; table68k[opc].stype = srctype; table68k[opc].plev = id.plevel; - table68k[opc].clev = specialcase(opc, id.cpulevel); + table68k[opc].clev = id.cpulevel; + table68k[opc].unimpclev = id.unimpcpulevel; #if 0 for (i = 0; i < 5; i++) { diff --git a/src/rommgr.cpp b/src/rommgr.cpp index 9e0b0304..275dcba1 100644 --- a/src/rommgr.cpp +++ b/src/rommgr.cpp @@ -634,14 +634,14 @@ int load_keyring (struct uae_prefs *p, const TCHAR *path) tmp[0] = 0; switch (cnt) { - case 0: - if (path) + case 0: + if (path) { - _tcscpy (tmp, path); + _tcscpy (tmp, path); _tcscat (tmp, _T("rom.key")); } - break; - case 1: + break; + case 1: if (p) { _tcscpy (tmp, p->path_rom); _tcscat (tmp, _T("rom.key")); @@ -839,7 +839,9 @@ int decode_rom (uae_u8 *mem, int size, int mode, int real_size) { if (mode == 1) { if (!decode_cloanto_rom_do (mem, size, real_size)) { +#ifndef SINGLEFILE notify_user (NUMSG_NOROMKEY); +#endif return 0; } return 1; @@ -1277,7 +1279,9 @@ void kickstart_fix_checksum (uae_u8 *mem, int size) int kickstart_checksum (uae_u8 *mem, int size) { if (!kickstart_checksum_do (mem, size)) { +#ifndef SINGLEFILE notify_user (NUMSG_KSROMCRCERROR); +#endif return 0; } return 1; diff --git a/src/savestate.cpp b/src/savestate.cpp index 72dea996..b1d437fe 100644 --- a/src/savestate.cpp +++ b/src/savestate.cpp @@ -48,11 +48,11 @@ #include "sysdeps.h" #include "options.h" +#include "memory.h" #include "zfile.h" #include "autoconf.h" -#include "memory.h" -#include "newcpu.h" #include "custom.h" +#include "newcpu.h" #include "savestate.h" #include "uae.h" #include "gui.h" @@ -79,6 +79,14 @@ static void state_incompatible_warn(void) if (currprefs.socket_emu) dowarn = 1; #endif +#ifdef SCSIEMU + if (currprefs.scsi) + dowarn = 1; +#endif +#ifdef CATWEASEL + if (currprefs.catweasel) + dowarn = 1; +#endif #ifdef FILESYS for(i = 0; i < currprefs.mountitems; i++) { struct mountedinfo mi; @@ -126,10 +134,13 @@ void save_u8_func (uae_u8 **dstp, uae_u8 v) void save_string_func (uae_u8 **dstp, const TCHAR *from) { uae_u8 *dst = *dstp; - while(from && *from) - *dst++ = *from++; + char *s, *s2; + s2 = s = uutf8 (from); + while (s && *s) + *dst++ = *s++; *dst++ = 0; *dstp = dst; + xfree (s2); } void save_path_func (uae_u8 **dstp, const TCHAR *from, int type) { @@ -175,6 +186,7 @@ TCHAR *restore_string_func (uae_u8 **dstp) uae_u8 v; uae_u8 *dst = *dstp; char *top, *to; + TCHAR *s; len = strlen((char *)dst) + 1; top = to = xmalloc (char, len); do { @@ -182,7 +194,9 @@ TCHAR *restore_string_func (uae_u8 **dstp) *top++ = v; } while(v); *dstp = dst; - return to; + s = utf8u (to); + xfree (to); + return s; } TCHAR *restore_path_func (uae_u8 **dstp, int type) { @@ -198,6 +212,7 @@ static void save_chunk (struct zfile *f, uae_u8 *chunk, size_t len, TCHAR *name, uae_u32 flags; size_t pos; size_t chunklen, len2; + char *s; if (!chunk) return; @@ -207,7 +222,9 @@ static void save_chunk (struct zfile *f, uae_u8 *chunk, size_t len, TCHAR *name, return; } /* chunk name */ - zfile_fwrite (name, 1, 4, f); + s = ua (name); + zfile_fwrite (s, 1, 4, f); + xfree (s); pos = zfile_ftell (f); /* chunk size */ dst = &tmp[0]; @@ -261,8 +278,9 @@ static uae_u8 *restore_chunk (struct zfile *f, TCHAR *name, size_t *len, size_t *totallen = 0; /* chunk name */ - zfile_fread (name, 1, 4, f); - name[4] = 0; + zfile_fread (tmp, 1, 4, f); + tmp[4] = 0; + au_copy (name, 5, (char*)tmp); /* chunk size */ zfile_fread (tmp, 1, 4, f); src = tmp; @@ -298,7 +316,9 @@ static uae_u8 *restore_chunk (struct zfile *f, TCHAR *name, size_t *len, size_t && _tcscmp (name, _T("ZCRM")) != 0 && _tcscmp (name, _T("PRAM")) != 0 && _tcscmp (name, _T("A3K1")) != 0 - && _tcscmp (name, _T("A3K2")) != 0) + && _tcscmp (name, _T("A3K2")) != 0 + && _tcscmp (name, _T("BORO")) != 0 + ) { /* extra bytes at the end needed to handle old statefiles that now have new fields */ mem = xcalloc (uae_u8, *totallen + 100); @@ -390,6 +410,7 @@ void restore_state (const TCHAR *filename) savestate_file = f; restore_header (chunk); xfree (chunk); + restore_cia_start (); changed_prefs.bogomem_size = 0; changed_prefs.chipmem_size = 0; changed_prefs.fastmem_size = 0; @@ -546,6 +567,7 @@ void savestate_restore_finish (void) restore_cpu_finish(); restore_audio_finish (); restore_disk_finish (); + restore_akiko_finish (); #ifdef PICASSO96 restore_p96_finish (); #endif @@ -729,6 +751,7 @@ static int save_state_internal (struct zfile *f, const TCHAR *description, int c save_chunk (f, dst, len, _T("CD32"), 0); xfree (dst); #endif + #ifdef FILESYS dst = save_filesys_common (&len); if (dst) { @@ -774,13 +797,6 @@ int save_state (const TCHAR *filename, const TCHAR *description) f = zfile_fopen (filename, _T("w+b"), 0); if (!f) return 0; - if (savestate_specialdump) { - size_t pos; - pos = zfile_ftell(f); - save_rams (f, -1); - zfile_fclose (f); - return 1; - } int v = save_state_internal (f, description, comp, true); if (v) write_log (_T("Save of '%s' complete\n"), filename); diff --git a/src/sd-pandora/sound.cpp b/src/sd-pandora/sound.cpp index 45b406d1..a4137c1d 100644 --- a/src/sd-pandora/sound.cpp +++ b/src/sd-pandora/sound.cpp @@ -53,10 +53,16 @@ void update_sound (int freq, int lof) freq = lastfreq; lastfreq = freq; - if (lof < 0) { + if (currprefs.ntscmode) { + hpos += 0.5; lines += 0.5; + } else { + if (lof < 0) + lines += 0.5; + else if(lof > 0) + lines += 1.0; } - + evtime = hpos * lines * freq * CYCLE_UNIT / (float)currprefs.sound_freq; scaled_sample_evtime = (int)evtime; } @@ -221,6 +227,12 @@ void finish_sound_buffer (void) } +void pause_sound_buffer (void) +{ + reset_sound (); +} + + void restart_sound_buffer(void) { sndbufpt = render_sndbuff = sndbuffer[wrcnt&3]; diff --git a/src/sd-pandora/sound.h b/src/sd-pandora/sound.h index 36556123..614aa6c4 100644 --- a/src/sd-pandora/sound.h +++ b/src/sd-pandora/sound.h @@ -22,6 +22,7 @@ extern uae_u16 *finish_sndbuff; extern int sndbufsize; extern void finish_sound_buffer (void); extern void restart_sound_buffer (void); +extern void pause_sound_buffer (void); extern void finish_cdaudio_buffer (void); extern bool cdaudio_catchup(void); extern int init_sound(void); @@ -32,6 +33,10 @@ extern void pause_sound (void); extern void reset_sound (void); extern void sound_volume (int); +STATIC_INLINE void set_sound_buffers (void) +{ +} + #define check_sound_buffers() { if (sndbufpt >= finish_sndbuff) finish_sound_buffer (); } STATIC_INLINE void clear_sound_buffers (void) @@ -39,11 +44,14 @@ STATIC_INLINE void clear_sound_buffers (void) memset (sndbuffer, 0, 4 * (SNDBUFFER_LEN + 32) * DEFAULT_SOUND_CHANNELS); } +#define PUT_SOUND_WORD_MONO(x) put_sound_word_mono_func(x) + #define PUT_SOUND_WORD(b) do { *sndbufpt = b; sndbufpt = sndbufpt + 1; } while (0) #define PUT_SOUND_WORD_STEREO(l,r) do { *((uae_u32 *)sndbufpt) = (r << 16) | (l & 0xffff); sndbufpt = sndbufpt + 2; } while (0) #define DEFAULT_SOUND_BITS 16 #define DEFAULT_SOUND_FREQ 44100 +#define HAVE_STEREO_SUPPORT #define FILTER_SOUND_OFF 0 #define FILTER_SOUND_EMUL 1 diff --git a/src/sd-sdl/sound_sdl_new.cpp b/src/sd-sdl/sound_sdl_new.cpp index 36b82f59..e4fbbca7 100644 --- a/src/sd-sdl/sound_sdl_new.cpp +++ b/src/sd-sdl/sound_sdl_new.cpp @@ -271,6 +271,10 @@ void finish_sound_buffer (void) #endif } +void pause_sound_buffer (void) +{ + reset_sound (); +} void restart_sound_buffer(void) { diff --git a/src/sinctable.cpp b/src/sinctable.cpp index 44afceae..724b1016 100644 --- a/src/sinctable.cpp +++ b/src/sinctable.cpp @@ -1,626 +1,630 @@ -/* tables are: a500 off, a500 on, a1200 off, a1200 on, vanilla. */ -static const int winsinc_integral[5][2048] = { - { -131072,131072,131072,131072,131072,131072,131072,131072,131072,131072,131072, -131071,131071,131071,131071,131071,131071,131071,131071,131071,131071,131071,131070, -131070,131070,131070,131070,131069,131069,131069,131069,131068,131068,131067,131067, -131066,131066,131065,131065,131064,131063,131062,131062,131061,131060,131058,131057, -131056,131055,131053,131051,131050,131048,131046,131043,131041,131039,131036,131033, -131030,131027,131023,131019,131016,131011,131007,131002,130997,130992,130986,130980, -130973,130967,130959,130952,130944,130935,130926,130917,130907,130896,130885,130873, -130861,130848,130835,130820,130805,130789,130773,130756,130737,130718,130698,130677, -130655,130633,130609,130584,130557,130530,130502,130472,130441,130408,130375,130339, -130303,130265,130225,130184,130141,130096,130050,130002,129952,129900,129846,129790, -129732,129672,129609,129545,129478,129409,129337,129263,129186,129107,129025,128940, -128852,128762,128669,128572,128473,128370,128264,128155,128043,127927,127807,127684, -127558,127428,127293,127156,127014,126868,126718,126564,126406,126243,126076,125905, -125729,125549,125364,125174,124980,124780,124576,124367,124152,123933,123708,123478, -123243,123002,122756,122505,122247,121985,121716,121442,121162,120876,120584,120286, -119982,119672,119356,119033,118705,118370,118029,117682,117328,116967,116601,116228, -115848,115462,115069,114670,114264,113851,113432,113006,112573,112134,111688,111236, -110777,110311,109838,109359,108874,108381,107882,107377,106865,106346,105821,105290, -104752,104208,103657,103100,102537,101968,101392,100811,100224,99630,99031,98426, -97816,97199,96578,95950,95318,94680,94037,93389,92736,92079,91416,90749,90077,89401, -88721,88037,87348,86656,85960,85260,84557,83851,83141,82429,81713,80995,80274,79551, -78826,78098,77369,76638,75905,75171,74435,73699,72961,72223,71484,70745,70006,69266, -68527,67788,67050,66312,65576,64840,64106,63373,62641,61912,61184,60459,59736,59015, -58297,57582,56871,56162,55457,54755,54058,53364,52674,51989,51308,50632,49960,49294, -48632,47976,47325,46680,46041,45407,44780,44158,43543,42934,42332,41737,41148,40566, -39991,39424,38863,38310,37765,37227,36696,36173,35659,35152,34652,34161,33678,33204, -32737,32279,31828,31387,30953,30528,30112,29704,29304,28913,28530,28155,27790,27432, -27083,26743,26411,26087,25772,25465,25166,24875,24593,24318,24052,23794,23543,23300, -23066,22838,22619,22406,22202,22004,21814,21631,21454,21285,21122,20966,20816,20673, -20536,20404,20279,20160,20046,19938,19835,19738,19645,19558,19475,19396,19322,19253, -19187,19126,19068,19014,18963,18915,18871,18830,18791,18755,18721,18690,18661,18633, -18608,18584,18561,18540,18520,18501,18483,18465,18448,18431,18414,18398,18381,18364, -18347,18329,18310,18291,18270,18249,18226,18203,18177,18150,18122,18092,18060,18026, -17990,17951,17911,17868,17823,17775,17725,17672,17617,17559,17498,17434,17368,17298, -17226,17150,17072,16990,16906,16818,16727,16634,16537,16437,16334,16228,16119,16007, -15892,15774,15653,15529,15403,15273,15141,15006,14868,14728,14585,14440,14293,14143, -13990,13836,13680,13521,13361,13198,13035,12869,12702,12533,12363,12192,12019,11846, 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--3275,-3263,-3247,-3227,-3202,-3174,-3141,-3104,-3064,-3019,-2971,-2919,-2864,-2805, --2743,-2678,-2610,-2539,-2464,-2387,-2308,-2226,-2142,-2055,-1966,-1876,-1783,-1689, --1594,-1497,-1399,-1299,-1199,-1098,-996,-894,-791,-689,-586,-483,-380,-278,-176,-75, -26,126,224,322,418,513,606,698,788,877,963,1047,1129,1209,1287,1362,1434,1504, -1572,1637,1698,1757,1814,1867,1917,1964,2008,2049,2086,2121,2152,2180,2205,2227, -2245,2260,2272,2280,2286,2288,2287,2283,2276,2265,2252,2236,2216,2194,2169,2142, -2111,2078,2042,2004,1963,1921,1875,1828,1778,1727,1673,1618,1561,1502,1442,1380, -1317,1253,1187,1120,1053,984,915,846,775,705,633,562,491,419,348,277,206,135,65,-5, --74,-142,-209,-276,-341,-406,-469,-531,-592,-651,-709,-765,-820,-873,-924,-974, --1021,-1067,-1111,-1153,-1193,-1231,-1267,-1301,-1332,-1362,-1389,-1414,-1437,-1457, --1476,-1492,-1505,-1517,-1526,-1534,-1538,-1541,-1542,-1540,-1536,-1530,-1522,-1512, --1500,-1486,-1470,-1452,-1432,-1410,-1387,-1362,-1335,-1306,-1276,-1245,-1212,-1178, --1142,-1105,-1067,-1028,-987,-946,-904,-861,-817,-772,-727,-681,-635,-588,-541,-494, --446,-399,-351,-303,-255,-208,-160,-113,-66,-20,26,72,117,161,205,248,290,331,371, -411,449,486,523,558,592,624,656,686,715,743,769,794,817,839,860,879,897,913,928, -941,953,963,972,979,985,989,992,993,993,992,989,984,979,972,963,954,943,931,917, -903,887,870,852,833,813,792,771,748,724,700,675,649,623,596,568,540,512,483,453, -424,394,363,333,302,272,241,210,180,149,119,88,58,28,-1,-30,-59,-88,-115,-143,-170, --196,-222,-247,-272,-296,-319,-341,-363,-384,-404,-423,-441,-459,-476,-491,-506, --520,-533,-545,-557,-567,-576,-584,-592,-598,-604,-608,-612,-614,-616,-617,-616, --615,-613,-610,-607,-602,-597,-591,-583,-576,-567,-558,-548,-537,-526,-514,-501, --488,-474,-460,-445,-430,-414,-398,-382,-365,-347,-330,-312,-294,-276,-257,-239, --220,-201,-182,-163,-144,-126,-107,-88,-69,-51,-32,-14,4,22,39,56,73,90,106,122,137, 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--39,-41,-43,-45,-46,-48,-50,-51,-52,-53,-54,-55,-56,-57,-58,-58,-59,-59,-59,-59, --59,-59,-59,-59,-58,-58,-57,-57,-56,-55,-54,-54,-53,-51,-50,-49,-48,-46,-45,-44, --42,-41,-39,-37,-36,-34,-32,-31,-29,-27,-25,-23,-22,-20,-18,-16,-14,-12,-11,-9,-7, --5,-4,-2,0,1,3,5,6,8,9,11,12,13,15,16,17,18,19,20,21,22,23,24,25,25,26,27,27,28, -28,29,29,29,29,29,30,30,30,30,29,29,29,29,29,28,28,27,27,27,26,25,25,24,24,23,22, -21,21,20,19,18,17,16,16,15,14,13,12,11,10,9,8,7,7,6,5,4,3,2,1,0,0,-1,-2,-3,-3,-4, --5,-6,-6,-7,-7,-8,-9,-9,-10,-10,-11,-11,-11,-12,-12,-12,-13,-13,-13,-13,-14,-14, --14,-14,-14,-14,-14,-14,-14,-14,-14,-14,-14,-13,-13,-13,-13,-13,-12,-12,-12,-11, --11,-11,-10,-10,-10,-9,-9,-9,-8,-8,-7,-7,-6,-6,-6,-5,-5,-4,-4,-3,-3,-3,-2,-2,-1,-1, --1,0,0,1,1,1,2,2,2,3,3,3,3,4,4,4,4,5,5,5,5,5,5,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6, -6,6,6,6,5,5,5,5,5,5,5,4,4,4,4,4,4,3,3,3,3,3,2,2,2,2,2,2,1,1,1,1,1,0,0,0,0,0,0,-1, --1,-1,-1,-1,-1,-1,-1,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-3,-3,-3,-3,-3,-3, --3,-3,-3,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-1,-1,-1,-1,-1,-1, --1,-1,-1,-1,-1,-1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, -1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, -0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, -0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, -0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, - }, -}; + /* + * Table generated by contrib/sinc-integral.py. + */ + +/* tables are: a500 off, a500 on, a1200 off, a1200 on, vanilla. */ +const int winsinc_integral[5][SINC_QUEUE_MAX_AGE] = { + { +131072,131072,131072,131072,131072,131072,131072,131072,131072,131072,131072, +131071,131071,131071,131071,131071,131071,131071,131071,131071,131071,131071,131070, +131070,131070,131070,131070,131069,131069,131069,131069,131068,131068,131067,131067, +131066,131066,131065,131065,131064,131063,131062,131062,131061,131060,131058,131057, +131056,131055,131053,131051,131050,131048,131046,131043,131041,131039,131036,131033, +131030,131027,131023,131019,131016,131011,131007,131002,130997,130992,130986,130980, +130973,130967,130959,130952,130944,130935,130926,130917,130907,130896,130885,130873, +130861,130848,130835,130820,130805,130789,130773,130756,130737,130718,130698,130677, +130655,130633,130609,130584,130557,130530,130502,130472,130441,130408,130375,130339, +130303,130265,130225,130184,130141,130096,130050,130002,129952,129900,129846,129790, +129732,129672,129609,129545,129478,129409,129337,129263,129186,129107,129025,128940, +128852,128762,128669,128572,128473,128370,128264,128155,128043,127927,127807,127684, +127558,127428,127293,127156,127014,126868,126718,126564,126406,126243,126076,125905, +125729,125549,125364,125174,124980,124780,124576,124367,124152,123933,123708,123478, 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"td-sdl/thread.h" +#include "uae.h" +#include "memory.h" +#include "newcpu.h" +#include "custom.h" +#include "xwin.h" +#include "autoconf.h" +#include "gui.h" +#include "picasso96.h" +#include "drawing.h" +#include "savestate.h" +#include "statusline.h" + +extern SDL_Surface *prSDLScreen; +extern int idletime_percent; + +/* + * Some code to put status information on the screen. + */ + +static const char *numbers = { /* ugly 0123456789CHD%+- */ +"+++++++--++++-+++++++++++++++++-++++++++++++++++++++++++++++++++++++++++++++-++++++-++++----++---+--------------" +"+xxxxx+--+xx+-+xxxxx++xxxxx++x+-+x++xxxxx++xxxxx++xxxxx++xxxxx++xxxxx++xxxx+-+x++x+-+xxx++-+xx+-+x---+----------" +"+x+++x+--++x+-+++++x++++++x++x+++x++x++++++x++++++++++x++x+++x++x+++x++x++++-+x++x+-+x++x+--+x++x+--+x+----+++--" +"+x+-+x+---+x+-+xxxxx++xxxxx++xxxxx++xxxxx++xxxxx+--++x+-+xxxxx++xxxxx++x+----+xxxx+-+x++x+----+x+--+xxx+--+xxx+-" +"+x+++x+---+x+-+x++++++++++x++++++x++++++x++x+++x+--+x+--+x+++x++++++x++x++++-+x++x+-+x++x+---+x+x+--+x+----+++--" +"+xxxxx+---+x+-+xxxxx++xxxxx+----+x++xxxxx++xxxxx+--+x+--+xxxxx++xxxxx++xxxx+-+x++x+-+xxx+---+x++xx--------------" +"+++++++---+++-++++++++++++++----+++++++++++++++++--+++--++++++++++++++++++++-++++++-++++------------------------" +}; + +STATIC_INLINE void putpixel (uae_u8 *buf, int x, xcolnr c8) +{ + uae_u16 *p = (uae_u16 *)buf + x; + *p = (uae_u16)c8; +} + +static void write_tdnumber (uae_u8 *buf, int x, int y, int num) +{ + int j; + const char *numptr; + + numptr = numbers + num * TD_NUM_WIDTH + NUMBERS_NUM * TD_NUM_WIDTH * y; + for (j = 0; j < TD_NUM_WIDTH; j++) { + if (*numptr == 'x') + putpixel (buf, x + j, xcolors[0xfff]); + else if (*numptr == '+') + putpixel (buf, x + j, xcolors[0x000]); + numptr++; + } +} + +void draw_status_line_single (uae_u8 *buf, int y, int totalwidth) +{ + int x, i, j, led, on; + int on_rgb, off_rgb, c; + + x = totalwidth - TD_PADX - VISIBLE_LEDS * TD_WIDTH; + x += 100 - (TD_WIDTH * (currprefs.nr_floppies - 1)) - TD_WIDTH; + if(nr_units() < 1) + x += TD_WIDTH; + if(currprefs.pandora_hide_idle_led) + x += TD_WIDTH; + + if(picasso_on) + memset (buf + (x - 4) * 2, 0, (prSDLScreen->w - x + 4) * 2); + else + memset (buf + (x - 4) * gfxvidinfo.pixbytes, 0, (gfxvidinfo.outwidth - x + 4) * gfxvidinfo.pixbytes); + + for (led = (currprefs.pandora_hide_idle_led == 0) ? -2 : -1; led < (currprefs.nr_floppies+1); led++) { + int track; + if(led == 0 && nr_units() < 1) + continue; // skip led for HD if not in use + if (led > 0) { + /* Floppy */ + track = gui_data.drive_track[led-1]; + on = gui_data.drive_motor[led-1]; + on_rgb = 0x0c0; + off_rgb = 0x030; + if (gui_data.drive_writing[led-1]) + on_rgb = 0xc00; + } else if (led < -1) { + /* Idle time */ + track = idletime_percent; + on = 1; + on_rgb = 0x666; + off_rgb = 0x666; + } else if (led < 0) { + /* Power */ + track = gui_data.fps; + on = gui_data.powerled; + on_rgb = 0xc00; + off_rgb = 0x300; + } else { + /* Hard disk */ + track = -2; + + switch (gui_data.hd) { + case HDLED_OFF: + on = 0; + off_rgb = 0x003; + break; + case HDLED_READ: + on = 1; + on_rgb = 0x00c; + off_rgb = 0x003; + break; + case HDLED_WRITE: + on = 1; + on_rgb = 0xc00; + off_rgb = 0x300; + break; + } + } + c = xcolors[on ? on_rgb : off_rgb]; + + for (j = 0; j < TD_LED_WIDTH; j++) + putpixel (buf, x + j, c); + + if (y >= TD_PADY && y - TD_PADY < TD_NUM_HEIGHT) { + if (track >= 0) { + int tn = track >= 100 ? 3 : 2; + int offs = (TD_LED_WIDTH - tn * TD_NUM_WIDTH) / 2; + if(track >= 100) + { + write_tdnumber (buf, x + offs, y - TD_PADY, track / 100); + offs += TD_NUM_WIDTH; + } + write_tdnumber (buf, x + offs, y - TD_PADY, (track / 10) % 10); + write_tdnumber (buf, x + offs + TD_NUM_WIDTH, y - TD_PADY, track % 10); + } + else if (nr_units() > 0) { + int offs = (TD_LED_WIDTH - 2 * TD_NUM_WIDTH) / 2; + //write_tdletter(buf, x + offs, y - TD_PADY, 'H'); + //write_tdletter(buf, x + offs + TD_NUM_WIDTH, y - TD_PADY, 'D'); + write_tdnumber (buf, x + offs, y - TD_PADY, 11); + write_tdnumber (buf, x + offs + TD_NUM_WIDTH, y - TD_PADY, 12); + } + } + x += TD_WIDTH; + } +} diff --git a/src/table68k b/src/table68k index 4cad4f0f..738e7538 100644 --- a/src/table68k +++ b/src/table68k @@ -29,16 +29,21 @@ % Ara: --> (Ar) % L: --> (xxx.L) % -% Fields on a line: -% 16 chars bitpattern : +% Fields on a line: +% 16 chars bitpattern : % CPU level / privilege level : % CPU level 0: 68000 % 1: 68010 % 2: 68020 % 3: 68030 % 4: 68040 -% 5: 68060 (not used to produce a cputbl) +% 5: 68060 % [Everything from 68020 possibly allows for FPU emulation] +% Unimplemented after: +% 0: Normal +% 3: Not implemented in 68030 and later +% 4: Not implemented in 68040 and later +% 5: Not implemented in 68060 % privilege level 0: not privileged % 1: unprivileged only on 68000 (check regs.s) % 2: privileged (check regs.s) @@ -71,222 +76,225 @@ % instruction % -0000 0000 0011 1100:00:XNZVC:XNZVC:--:10: ORSR.B #1 -0000 0000 0111 1100:02:XNZVC:XNZVC:T-:10: ORSR.W #1 -0000 0zz0 11ss sSSS:20:-?Z?C:-----:T-:11: CHK2.z #1,s[!Dreg,Areg,Aipi,Apdi,Immd] -0000 0000 zzdd dDDD:00:-NZ00:-----:--:13: OR.z #z,d[!Areg] -0000 0010 0011 1100:00:XNZVC:XNZVC:--:10: ANDSR.B #1 -0000 0010 0111 1100:02:XNZVC:XNZVC:T-:10: ANDSR.W #1 -0000 0010 zzdd dDDD:00:-NZ00:-----:--:13: AND.z #z,d[!Areg] -0000 0100 zzdd dDDD:00:XNZVC:-----:--:13: SUB.z #z,d[!Areg] -0000 0110 zzdd dDDD:00:XNZVC:-----:--:13: ADD.z #z,d[!Areg] -0000 0110 11ss sSSS:20:-----:XNZVC:--:10: CALLM s[!Dreg,Areg,Aipi,Apdi,Immd] -0000 0110 11ss sSSS:20:XNZVC:-----:-R:10: RTM s[Dreg,Areg] -0000 1000 00ss sSSS:00:--Z--:-----:--:11: BTST #1,s[!Areg] -0000 1000 01ss sSSS:00:--Z--:-----:--:13: BCHG #1,s[!Areg,Immd,PC8r,PC16] -0000 1000 10ss sSSS:00:--Z--:-----:--:13: BCLR #1,s[!Areg,Immd,PC8r,PC16] -0000 1000 11ss sSSS:00:--Z--:-----:--:13: BSET #1,s[!Areg,Immd,PC8r,PC16] -0000 1010 0011 1100:00:XNZVC:XNZVC:--:10: EORSR.B #1 -0000 1010 0111 1100:02:XNZVC:XNZVC:T-:10: EORSR.W #1 -0000 1010 zzdd dDDD:00:-NZ00:-----:--:13: EOR.z #z,d[!Areg] -0000 1100 zzss sSSS:00:-NZVC:-----:--:11: CMP.z #z,s[!Areg,Immd] +0000 0000 0011 1100:000:XNZVC:XNZVC:--:10: ORSR.B #1 +0000 0000 0111 1100:002:XNZVC:XNZVC:T-:10: ORSR.W #1 +0000 0zz0 11ss sSSS:250:-?Z?C:-----:T-:11: CHK2.z #1,s[!Dreg,Areg,Aipi,Apdi,Immd] +0000 0000 zzdd dDDD:000:-NZ00:-----:--:13: OR.z #z,d[!Areg] +0000 0010 0011 1100:000:XNZVC:XNZVC:--:10: ANDSR.B #1 +0000 0010 0111 1100:002:XNZVC:XNZVC:T-:10: ANDSR.W #1 +0000 0010 zzdd dDDD:000:-NZ00:-----:--:13: AND.z #z,d[!Areg] +0000 0100 zzdd dDDD:000:XNZVC:-----:--:13: SUB.z #z,d[!Areg] +0000 0110 zzdd dDDD:000:XNZVC:-----:--:13: ADD.z #z,d[!Areg] +0000 0110 11ss sSSS:230:-----:XNZVC:--:10: CALLM s[!Dreg,Areg,Aipi,Apdi,Immd] +0000 0110 11ss sSSS:230:XNZVC:-----:-R:10: RTM s[Dreg,Areg] +0000 1000 00ss sSSS:000:--Z--:-----:--:11: BTST #1,s[!Areg] +0000 1000 01ss sSSS:000:--Z--:-----:--:13: BCHG #1,s[!Areg,Immd,PC8r,PC16] +0000 1000 10ss sSSS:000:--Z--:-----:--:13: BCLR #1,s[!Areg,Immd,PC8r,PC16] +0000 1000 11ss sSSS:000:--Z--:-----:--:13: BSET #1,s[!Areg,Immd,PC8r,PC16] +0000 1010 0011 1100:000:XNZVC:XNZVC:--:10: EORSR.B #1 +0000 1010 0111 1100:002:XNZVC:XNZVC:T-:10: EORSR.W #1 +0000 1010 zzdd dDDD:000:-NZ00:-----:--:13: EOR.z #z,d[!Areg] +0000 1100 zzss sSSS:000:-NZVC:-----:--:11: CMP.z #z,s[!Areg,Immd,PC8r,PC16] +0000 1100 zzss sSSS:200:-NZVC:-----:--:11: CMP.z #z,s[PC8r,PC16] -0000 1010 11ss sSSS:20:-NZVC:-----:--:13: CAS.B #1,s[!Dreg,Areg,Immd,PC8r,PC16] -0000 1100 11ss sSSS:20:-NZVC:-----:--:13: CAS.W #1,s[!Dreg,Areg,Immd,PC8r,PC16] -0000 1100 1111 1100:20:-NZVC:-----:--:10: CAS2.W #2 -0000 1110 zzss sSSS:22:-----:-----:T-:13: MOVES.z #1,s[!Dreg,Areg,Immd,PC8r,PC16] -0000 1110 11ss sSSS:20:-NZVC:-----:--:13: CAS.L #1,s[!Dreg,Areg,Immd,PC8r,PC16] -0000 1110 1111 1100:20:-NZVC:-----:--:10: CAS2.L #2 +0000 1010 11ss sSSS:200:-NZVC:-----:--:13: CAS.B #1,s[!Dreg,Areg,Immd,PC8r,PC16] +0000 1100 11ss sSSS:200:-NZVC:-----:--:13: CAS.W #1,s[!Dreg,Areg,Immd,PC8r,PC16] +0000 1100 1111 1100:250:-NZVC:-----:--:10: CAS2.W #2 +0000 1110 zzss sSSS:202:-----:-----:T-:13: MOVES.z #1,s[!Dreg,Areg,Immd,PC8r,PC16] +0000 1110 11ss sSSS:200:-NZVC:-----:--:13: CAS.L #1,s[!Dreg,Areg,Immd,PC8r,PC16] +0000 1110 1111 1100:250:-NZVC:-----:--:10: CAS2.L #2 -0000 rrr1 00dd dDDD:00:-----:-----:--:12: MVPMR.W d[Areg-Ad16],Dr -0000 rrr1 01dd dDDD:00:-----:-----:--:12: MVPMR.L d[Areg-Ad16],Dr -0000 rrr1 10dd dDDD:00:-----:-----:--:12: MVPRM.W Dr,d[Areg-Ad16] -0000 rrr1 11dd dDDD:00:-----:-----:--:12: MVPRM.L Dr,d[Areg-Ad16] -0000 rrr1 00ss sSSS:00:--Z--:-----:--:11: BTST Dr,s[!Areg] -0000 rrr1 01ss sSSS:00:--Z--:-----:--:13: BCHG Dr,s[!Areg,Immd,PC8r,PC16] -0000 rrr1 10ss sSSS:00:--Z--:-----:--:13: BCLR Dr,s[!Areg,Immd,PC8r,PC16] -0000 rrr1 11ss sSSS:00:--Z--:-----:--:13: BSET Dr,s[!Areg,Immd,PC8r,PC16] +0000 rrr1 00dd dDDD:000:-----:-----:--:12: MVPMR.W d[Areg-Ad16],Dr +0000 rrr1 01dd dDDD:000:-----:-----:--:12: MVPMR.L d[Areg-Ad16],Dr +0000 rrr1 10dd dDDD:000:-----:-----:--:12: MVPRM.W Dr,d[Areg-Ad16] +0000 rrr1 11dd dDDD:000:-----:-----:--:12: MVPRM.L Dr,d[Areg-Ad16] +0000 rrr1 00ss sSSS:000:--Z--:-----:--:11: BTST Dr,s[!Areg] +0000 rrr1 01ss sSSS:000:--Z--:-----:--:13: BCHG Dr,s[!Areg,Immd,PC8r,PC16] +0000 rrr1 10ss sSSS:000:--Z--:-----:--:13: BCLR Dr,s[!Areg,Immd,PC8r,PC16] +0000 rrr1 11ss sSSS:000:--Z--:-----:--:13: BSET Dr,s[!Areg,Immd,PC8r,PC16] -0001 DDDd ddss sSSS:00:-NZ00:-----:--:12: MOVE.B s,d[!Areg] -0010 DDDd ddss sSSS:00:-----:-----:--:12: MOVEA.L s,d[Areg] -0010 DDDd ddss sSSS:00:-NZ00:-----:--:12: MOVE.L s,d[!Areg] -0011 DDDd ddss sSSS:00:-----:-----:--:12: MOVEA.W s,d[Areg] -0011 DDDd ddss sSSS:00:-NZ00:-----:--:12: MOVE.W s,d[!Areg] +0001 DDDd ddss sSSS:000:-NZ00:-----:--:12: MOVE.B s,d[!Areg] +0010 DDDd ddss sSSS:000:-----:-----:--:12: MOVEA.L s,d[Areg] +0010 DDDd ddss sSSS:000:-NZ00:-----:--:12: MOVE.L s,d[!Areg] +0011 DDDd ddss sSSS:000:-----:-----:--:12: MOVEA.W s,d[Areg] +0011 DDDd ddss sSSS:000:-NZ00:-----:--:12: MOVE.W s,d[!Areg] -0100 0000 zzdd dDDD:00:XNZVC:X-Z--:--:30: NEGX.z d[!Areg] -0100 0000 11dd dDDD:01:-----:XNZVC:T-:10: MVSR2.W d[!Areg] -0100 0010 zzdd dDDD:00:-0100:-----:--:20: CLR.z d[!Areg] -0100 0010 11dd dDDD:10:-----:XNZVC:--:10: MVSR2.B d[!Areg] -0100 0100 zzdd dDDD:00:XNZVC:-----:--:30: NEG.z d[!Areg] -0100 0100 11ss sSSS:00:XNZVC:-----:--:10: MV2SR.B s[!Areg] -0100 0110 zzdd dDDD:00:-NZ00:-----:--:30: NOT.z d[!Areg] -0100 0110 11ss sSSS:02:XNZVC:XNZVC:T-:10: MV2SR.W s[!Areg] -0100 1000 0000 1rrr:20:-----:-----:--:31: LINK.L Ar,#2 -0100 1000 00dd dDDD:00:X?Z?C:X-Z--:--:30: NBCD.B d[!Areg] -0100 1000 0100 1kkk:20:-----:-----:T-:10: BKPT #k -0100 1000 01ss sSSS:00:-NZ00:-----:--:30: SWAP.W s[Dreg] -0100 1000 01ss sSSS:00:-----:-----:--:00: PEA.L s[!Dreg,Areg,Aipi,Apdi,Immd] -0100 1000 10dd dDDD:00:-NZ00:-----:--:30: EXT.W d[Dreg] -0100 1000 10dd dDDD:00:-----:-----:--:02: MVMLE.W #1,d[!Dreg,Areg,Aipi] -0100 1000 11dd dDDD:00:-NZ00:-----:--:30: EXT.L d[Dreg] -0100 1000 11dd dDDD:00:-----:-----:--:02: MVMLE.L #1,d[!Dreg,Areg,Aipi] -0100 1001 11dd dDDD:20:-NZ00:-----:--:30: EXT.B d[Dreg] -0100 1010 zzss sSSS:00:-NZ00:-----:--:10: TST.z s -0100 1010 11dd dDDD:00:-NZ00:-----:--:30: TAS.B d[!Areg] -0100 1010 1111 1100:00:-----:-----:T-:00: ILLEGAL -0100 1100 00ss sSSS:20:-NZVC:-----:--:13: MULL.L #1,s[!Areg] -0100 1100 01ss sSSS:20:-NZV0:-----:T-:13: DIVL.L #1,s[!Areg] -0100 1100 10ss sSSS:00:-----:-----:--:01: MVMEL.W #1,s[!Dreg,Areg,Apdi,Immd] -0100 1100 11ss sSSS:00:-----:-----:--:01: MVMEL.L #1,s[!Dreg,Areg,Apdi,Immd] -0100 1110 0100 JJJJ:00:-----:XNZVC:--:10: TRAP #J -0100 1110 0101 0rrr:00:-----:-----:--:31: LINK.W Ar,#1 -0100 1110 0101 1rrr:00:-----:-----:--:30: UNLK.L Ar -0100 1110 0110 0rrr:02:-----:-----:T-:10: MVR2USP.L Ar -0100 1110 0110 1rrr:02:-----:-----:T-:20: MVUSP2R.L Ar -0100 1110 0111 0000:02:-----:-----:T-:00: RESET -0100 1110 0111 0001:00:-----:-----:--:00: NOP -0100 1110 0111 0010:02:XNZVC:-----:T-:10: STOP #1 -0100 1110 0111 0011:02:XNZVC:-----:TR:00: RTE -0100 1110 0111 0100:00:-----:-----:-R:10: RTD #1 -0100 1110 0111 0101:00:-----:-----:-R:00: RTS -0100 1110 0111 0110:00:-----:XNZVC:T-:00: TRAPV -0100 1110 0111 0111:00:XNZVC:-----:-R:00: RTR -0100 1110 0111 1010:12:-----:-----:T-:10: MOVEC2 #1 -0100 1110 0111 1011:12:-----:-----:T-:10: MOVE2C #1 -0100 1110 10ss sSSS:00://///://///:-J:80: JSR.L s[!Dreg,Areg,Aipi,Apdi,Immd] -0100 rrr1 00ss sSSS:20:-N???:-----:T-:11: CHK.L s[!Areg],Dr -0100 rrr1 10ss sSSS:00:-N???:-----:T-:11: CHK.W s[!Areg],Dr -0100 1110 11ss sSSS:00://///://///:-J:80: JMP.L s[!Dreg,Areg,Aipi,Apdi,Immd] -0100 rrr1 11ss sSSS:00:-----:-----:--:02: LEA.L s[!Dreg,Areg,Aipi,Apdi,Immd],Ar +0100 0000 zzdd dDDD:000:XNZVC:X-Z--:--:30: NEGX.z d[!Areg] +0100 0000 11dd dDDD:001:-----:XNZVC:T-:10: MVSR2.W d[!Areg] +0100 0010 zzdd dDDD:000:-0100:-----:--:20: CLR.z d[!Areg] +0100 0010 11dd dDDD:100:-----:XNZVC:--:10: MVSR2.B d[!Areg] +0100 0100 zzdd dDDD:000:XNZVC:-----:--:30: NEG.z d[!Areg] +0100 0100 11ss sSSS:000:XNZVC:-----:--:10: MV2SR.B s[!Areg] +0100 0110 zzdd dDDD:000:-NZ00:-----:--:30: NOT.z d[!Areg] +0100 0110 11ss sSSS:002:XNZVC:XNZVC:T-:10: MV2SR.W s[!Areg] +0100 1000 0000 1rrr:200:-----:-----:--:31: LINK.L Ar,#2 +0100 1000 00dd dDDD:000:X?Z?C:X-Z--:--:30: NBCD.B d[!Areg] +0100 1000 0100 1kkk:200:-----:-----:T-:10: BKPT #k +0100 1000 01ss sSSS:000:-NZ00:-----:--:30: SWAP.W s[Dreg] +0100 1000 01ss sSSS:000:-----:-----:--:00: PEA.L s[!Dreg,Areg,Aipi,Apdi,Immd] +0100 1000 10dd dDDD:000:-NZ00:-----:--:30: EXT.W d[Dreg] +0100 1000 10dd dDDD:000:-----:-----:--:02: MVMLE.W #1,d[!Dreg,Areg,Aipi] +0100 1000 11dd dDDD:000:-NZ00:-----:--:30: EXT.L d[Dreg] +0100 1000 11dd dDDD:000:-----:-----:--:02: MVMLE.L #1,d[!Dreg,Areg,Aipi] +0100 1001 11dd dDDD:200:-NZ00:-----:--:30: EXT.B d[Dreg] +0100 1010 zzss sSSS:000:-NZ00:-----:--:10: TST.z s[!Areg,PC16,PC8r] +0100 1010 zzss sSSS:200:-NZ00:-----:--:10: TST.z s[Areg,PC16,PC8r] +0100 1010 11dd dDDD:000:-NZ00:-----:--:30: TAS.B d[!Areg] +0100 1010 1111 1100:000:-----:-----:T-:00: ILLEGAL +0100 1100 00ss sSSS:200:-NZVC:-----:--:13: MULL.L #1,s[!Areg] +0100 1100 01ss sSSS:200:-NZV0:-----:T-:13: DIVL.L #1,s[!Areg] +0100 1100 10ss sSSS:000:-----:-----:--:01: MVMEL.W #1,s[!Dreg,Areg,Apdi,Immd] +0100 1100 11ss sSSS:000:-----:-----:--:01: MVMEL.L #1,s[!Dreg,Areg,Apdi,Immd] +0100 1110 0100 JJJJ:000:-----:XNZVC:--:10: TRAP #J +0100 1110 0101 0rrr:000:-----:-----:--:31: LINK.W Ar,#1 +0100 1110 0101 1rrr:000:-----:-----:--:30: UNLK.L Ar +0100 1110 0110 0rrr:002:-----:-----:T-:10: MVR2USP.L Ar +0100 1110 0110 1rrr:002:-----:-----:T-:20: MVUSP2R.L Ar +0100 1110 0111 0000:002:-----:-----:T-:00: RESET +0100 1110 0111 0001:000:-----:-----:--:00: NOP +0100 1110 0111 0010:002:XNZVC:-----:T-:10: STOP #1 +0100 1110 0111 0011:002:XNZVC:-----:TR:00: RTE +0100 1110 0111 0100:000:-----:-----:-R:10: RTD #1 +0100 1110 0111 0101:000:-----:-----:-R:00: RTS +0100 1110 0111 0110:000:-----:XNZVC:T-:00: TRAPV +0100 1110 0111 0111:000:XNZVC:-----:-R:00: RTR +0100 1110 0111 1010:102:-----:-----:T-:10: MOVEC2 #1 +0100 1110 0111 1011:102:-----:-----:T-:10: MOVE2C #1 +0100 1110 10ss sSSS:000://///://///:-J:80: JSR.L s[!Dreg,Areg,Aipi,Apdi,Immd] +0100 rrr1 00ss sSSS:200:-N???:-----:T-:11: CHK.L s[!Areg],Dr +0100 rrr1 10ss sSSS:000:-N???:-----:T-:11: CHK.W s[!Areg],Dr +0100 1110 11ss sSSS:000://///://///:-J:80: JMP.L s[!Dreg,Areg,Aipi,Apdi,Immd] +0100 rrr1 11ss sSSS:000:-----:-----:--:02: LEA.L s[!Dreg,Areg,Aipi,Apdi,Immd],Ar % This variant of ADDQ is word and long sized only -0101 jjj0 01dd dDDD:00:-----:-----:--:13: ADDA.W #j,d[Areg] -0101 jjj0 10dd dDDD:00:-----:-----:--:13: ADDA.L #j,d[Areg] -0101 jjj0 zzdd dDDD:00:XNZVC:-----:--:13: ADD.z #j,d[!Areg] +0101 jjj0 01dd dDDD:000:-----:-----:--:13: ADDA.W #j,d[Areg] +0101 jjj0 10dd dDDD:000:-----:-----:--:13: ADDA.L #j,d[Areg] +0101 jjj0 zzdd dDDD:000:XNZVC:-----:--:13: ADD.z #j,d[!Areg] % This variant of SUBQ is word and long sized only -0101 jjj1 01dd dDDD:00:-----:-----:--:13: SUBA.W #j,d[Areg] -0101 jjj1 10dd dDDD:00:-----:-----:--:13: SUBA.L #j,d[Areg] -0101 jjj1 zzdd dDDD:00:XNZVC:-----:--:13: SUB.z #j,d[!Areg] +0101 jjj1 01dd dDDD:000:-----:-----:--:13: SUBA.W #j,d[Areg] +0101 jjj1 10dd dDDD:000:-----:-----:--:13: SUBA.L #j,d[Areg] +0101 jjj1 zzdd dDDD:000:XNZVC:-----:--:13: SUB.z #j,d[!Areg] -0101 cccc 1100 1rrr:00:-----:-++++:-B:31: DBcc.W Dr,#1 -0101 cccc 11dd dDDD:00:-----:-++++:--:20: Scc.B d[!Areg] -0101 cccc 1111 1010:20:-----:-????:T-:10: TRAPcc #1 -0101 cccc 1111 1011:20:-----:-????:T-:10: TRAPcc #2 -0101 cccc 1111 1100:20:-----:-????:T-:00: TRAPcc +0101 cccc 1100 1rrr:000:-----:-++++:-B:31: DBcc.W Dr,#1 +0101 cccc 11dd dDDD:000:-----:-++++:--:20: Scc.B d[!Areg] +0101 cccc 1111 1010:200:-----:-????:T-:10: TRAPcc #1 +0101 cccc 1111 1011:200:-----:-????:T-:10: TRAPcc #2 +0101 cccc 1111 1100:200:-----:-????:T-:00: TRAPcc % Bxx.L is 68020 only, but setting the CPU level to 2 would give illegal % instruction exceptions when compiling a 68000 only emulation, which isn't % what we want either. -0110 0001 0000 0000:00://///://///:-B:40: BSR.W #1 -0110 0001 IIII IIII:00://///://///:-B:40: BSR.B #i -0110 0001 1111 1111:00://///://///:-B:40: BSR.L #2 -0110 CCCC 0000 0000:00:-----:-++++:-B:40: Bcc.W #1 -0110 CCCC IIII IIII:00:-----:-++++:-B:40: Bcc.B #i -0110 CCCC 1111 1111:00:-----:-++++:-B:40: Bcc.L #2 +0110 0001 0000 0000:000://///://///:-B:40: BSR.W #1 +0110 0001 IIII IIII:000://///://///:-B:40: BSR.B #i +0110 0001 1111 1111:000://///://///:-B:40: BSR.L #2 +0110 CCCC 0000 0000:000:-----:-++++:-B:40: Bcc.W #1 +0110 CCCC IIII IIII:000:-----:-++++:-B:40: Bcc.B #i +0110 CCCC 1111 1111:000:-----:-++++:-B:40: Bcc.L #2 -0111 rrr0 iiii iiii:00:-NZ00:-----:--:12: MOVE.L #i,Dr +0111 rrr0 iiii iiii:000:-NZ00:-----:--:12: MOVE.L #i,Dr -1000 rrr0 zzss sSSS:00:-NZ00:-----:--:13: OR.z s[!Areg],Dr -1000 rrr0 11ss sSSS:00:-NZV0:-----:T-:13: DIVU.W s[!Areg],Dr -1000 rrr1 00dd dDDD:00:X?Z?C:X-Z--:--:13: SBCD.B d[Dreg],Dr -1000 rrr1 00dd dDDD:00:X?Z?C:X-Z--:--:13: SBCD.B d[Areg-Apdi],Arp -1000 rrr1 zzdd dDDD:00:-NZ00:-----:--:13: OR.z Dr,d[!Areg,Dreg] -1000 rrr1 01dd dDDD:20:-----:-----:--:12: PACK d[Dreg],Dr -1000 rrr1 01dd dDDD:20:-----:-----:--:12: PACK d[Areg-Apdi],Arp -1000 rrr1 10dd dDDD:20:-----:-----:--:12: UNPK d[Dreg],Dr -1000 rrr1 10dd dDDD:20:-----:-----:--:12: UNPK d[Areg-Apdi],Arp -1000 rrr1 11ss sSSS:00:-NZV0:-----:T-:13: DIVS.W s[!Areg],Dr +1000 rrr0 zzss sSSS:000:-NZ00:-----:--:13: OR.z s[!Areg],Dr +1000 rrr0 11ss sSSS:000:-NZV0:-----:T-:13: DIVU.W s[!Areg],Dr +1000 rrr1 00dd dDDD:000:X?Z?C:X-Z--:--:13: SBCD.B d[Dreg],Dr +1000 rrr1 00dd dDDD:000:X?Z?C:X-Z--:--:13: SBCD.B d[Areg-Apdi],Arp +1000 rrr1 zzdd dDDD:000:-NZ00:-----:--:13: OR.z Dr,d[!Areg,Dreg] +1000 rrr1 01dd dDDD:200:-----:-----:--:12: PACK d[Dreg],Dr +1000 rrr1 01dd dDDD:200:-----:-----:--:12: PACK d[Areg-Apdi],Arp +1000 rrr1 10dd dDDD:200:-----:-----:--:12: UNPK d[Dreg],Dr +1000 rrr1 10dd dDDD:200:-----:-----:--:12: UNPK d[Areg-Apdi],Arp +1000 rrr1 11ss sSSS:000:-NZV0:-----:T-:13: DIVS.W s[!Areg],Dr -1001 rrr0 zzss sSSS:00:XNZVC:-----:--:13: SUB.z s,Dr -1001 rrr0 11ss sSSS:00:-----:-----:--:13: SUBA.W s,Ar -1001 rrr1 zzdd dDDD:00:XNZVC:X-Z--:--:13: SUBX.z d[Dreg],Dr -1001 rrr1 zzdd dDDD:00:XNZVC:X-Z--:--:13: SUBX.z d[Areg-Apdi],Arp -1001 rrr1 zzdd dDDD:00:XNZVC:-----:--:13: SUB.z Dr,d[!Areg,Dreg] -1001 rrr1 11ss sSSS:00:-----:-----:--:13: SUBA.L s,Ar +1001 rrr0 zzss sSSS:000:XNZVC:-----:--:13: SUB.z s,Dr +1001 rrr0 11ss sSSS:000:-----:-----:--:13: SUBA.W s,Ar +1001 rrr1 zzdd dDDD:000:XNZVC:X-Z--:--:13: SUBX.z d[Dreg],Dr +1001 rrr1 zzdd dDDD:000:XNZVC:X-Z--:--:13: SUBX.z d[Areg-Apdi],Arp +1001 rrr1 zzdd dDDD:000:XNZVC:-----:--:13: SUB.z Dr,d[!Areg,Dreg] +1001 rrr1 11ss sSSS:000:-----:-----:--:13: SUBA.L s,Ar -1011 rrr0 zzss sSSS:00:-NZVC:-----:--:11: CMP.z s,Dr -1011 rrr0 11ss sSSS:00:-NZVC:-----:--:11: CMPA.W s,Ar -1011 rrr1 11ss sSSS:00:-NZVC:-----:--:11: CMPA.L s,Ar -1011 rrr1 zzdd dDDD:00:-NZVC:-----:--:11: CMPM.z d[Areg-Aipi],ArP -1011 rrr1 zzdd dDDD:00:-NZ00:-----:--:13: EOR.z Dr,d[!Areg] +1011 rrr0 zzss sSSS:000:-NZVC:-----:--:11: CMP.z s,Dr +1011 rrr0 11ss sSSS:000:-NZVC:-----:--:11: CMPA.W s,Ar +1011 rrr1 11ss sSSS:000:-NZVC:-----:--:11: CMPA.L s,Ar +1011 rrr1 zzdd dDDD:000:-NZVC:-----:--:11: CMPM.z d[Areg-Aipi],ArP +1011 rrr1 zzdd dDDD:000:-NZ00:-----:--:13: EOR.z Dr,d[!Areg] -1100 rrr0 zzss sSSS:00:-NZ00:-----:--:13: AND.z s[!Areg],Dr -1100 rrr0 11ss sSSS:00:-NZ00:-----:--:13: MULU.W s[!Areg],Dr -1100 rrr1 00dd dDDD:00:X?Z?C:X-Z--:--:13: ABCD.B d[Dreg],Dr -1100 rrr1 00dd dDDD:00:X?Z?C:X-Z--:--:13: ABCD.B d[Areg-Apdi],Arp -1100 rrr1 zzdd dDDD:00:-NZ00:-----:--:13: AND.z Dr,d[!Areg,Dreg] -1100 rrr1 01dd dDDD:00:-----:-----:--:33: EXG.L Dr,d[Dreg] -1100 rrr1 01dd dDDD:00:-----:-----:--:33: EXG.L Ar,d[Areg] -1100 rrr1 10dd dDDD:00:-----:-----:--:33: EXG.L Dr,d[Areg] -1100 rrr1 11ss sSSS:00:-NZ00:-----:--:13: MULS.W s[!Areg],Dr +1100 rrr0 zzss sSSS:000:-NZ00:-----:--:13: AND.z s[!Areg],Dr +1100 rrr0 11ss sSSS:000:-NZ00:-----:--:13: MULU.W s[!Areg],Dr +1100 rrr1 00dd dDDD:000:X?Z?C:X-Z--:--:13: ABCD.B d[Dreg],Dr +1100 rrr1 00dd dDDD:000:X?Z?C:X-Z--:--:13: ABCD.B d[Areg-Apdi],Arp +1100 rrr1 zzdd dDDD:000:-NZ00:-----:--:13: AND.z Dr,d[!Areg,Dreg] +1100 rrr1 01dd dDDD:000:-----:-----:--:33: EXG.L Dr,d[Dreg] +1100 rrr1 01dd dDDD:000:-----:-----:--:33: EXG.L Ar,d[Areg] +1100 rrr1 10dd dDDD:000:-----:-----:--:33: EXG.L Dr,d[Areg] +1100 rrr1 11ss sSSS:000:-NZ00:-----:--:13: MULS.W s[!Areg],Dr -1101 rrr0 zzss sSSS:00:XNZVC:-----:--:13: ADD.z s,Dr -1101 rrr0 11ss sSSS:00:-----:-----:--:13: ADDA.W s,Ar -1101 rrr1 zzdd dDDD:00:XNZVC:X-Z--:--:13: ADDX.z d[Dreg],Dr -1101 rrr1 zzdd dDDD:00:XNZVC:X-Z--:--:13: ADDX.z d[Areg-Apdi],Arp -1101 rrr1 zzdd dDDD:00:XNZVC:-----:--:13: ADD.z Dr,d[!Areg,Dreg] -1101 rrr1 11ss sSSS:00:-----:-----:--:13: ADDA.L s,Ar +1101 rrr0 zzss sSSS:000:XNZVC:-----:--:13: ADD.z s,Dr +1101 rrr0 11ss sSSS:000:-----:-----:--:13: ADDA.W s,Ar +1101 rrr1 zzdd dDDD:000:XNZVC:X-Z--:--:13: ADDX.z d[Dreg],Dr +1101 rrr1 zzdd dDDD:000:XNZVC:X-Z--:--:13: ADDX.z d[Areg-Apdi],Arp +1101 rrr1 zzdd dDDD:000:XNZVC:-----:--:13: ADD.z Dr,d[!Areg,Dreg] +1101 rrr1 11ss sSSS:000:-----:-----:--:13: ADDA.L s,Ar -1110 jjjf zz00 0RRR:00:XNZVC:-----:--:13: ASf.z #j,DR -1110 jjjf zz00 1RRR:00:XNZ0C:-----:--:13: LSf.z #j,DR -1110 jjjf zz01 0RRR:00:XNZ0C:X----:--:13: ROXf.z #j,DR -1110 jjjf zz01 1RRR:00:-NZ0C:-----:--:13: ROf.z #j,DR -1110 rrrf zz10 0RRR:00:XNZVC:X----:--:13: ASf.z Dr,DR -1110 rrrf zz10 1RRR:00:XNZ0C:X----:--:13: LSf.z Dr,DR -1110 rrrf zz11 0RRR:00:XNZ0C:X----:--:13: ROXf.z Dr,DR -1110 rrrf zz11 1RRR:00:-NZ0C:-----:--:13: ROf.z Dr,DR -1110 000f 11dd dDDD:00:XNZVC:-----:--:13: ASfW.W d[!Dreg,Areg] -1110 001f 11dd dDDD:00:XNZ0C:-----:--:13: LSfW.W d[!Dreg,Areg] -1110 010f 11dd dDDD:00:XNZ0C:X----:--:13: ROXfW.W d[!Dreg,Areg] -1110 011f 11dd dDDD:00:-NZ0C:-----:--:13: ROfW.W d[!Dreg,Areg] +1110 jjjf zz00 0RRR:000:XNZVC:-----:--:13: ASf.z #j,DR +1110 jjjf zz00 1RRR:000:XNZ0C:-----:--:13: LSf.z #j,DR +1110 jjjf zz01 0RRR:000:XNZ0C:X----:--:13: ROXf.z #j,DR +1110 jjjf zz01 1RRR:000:-NZ0C:-----:--:13: ROf.z #j,DR +1110 rrrf zz10 0RRR:000:XNZVC:X----:--:13: ASf.z Dr,DR +1110 rrrf zz10 1RRR:000:XNZ0C:X----:--:13: LSf.z Dr,DR +1110 rrrf zz11 0RRR:000:XNZ0C:X----:--:13: ROXf.z Dr,DR +1110 rrrf zz11 1RRR:000:-NZ0C:-----:--:13: ROf.z Dr,DR +1110 000f 11dd dDDD:000:XNZVC:-----:--:13: ASfW.W d[!Dreg,Areg] +1110 001f 11dd dDDD:000:XNZ0C:-----:--:13: LSfW.W d[!Dreg,Areg] +1110 010f 11dd dDDD:000:XNZ0C:X----:--:13: ROXfW.W d[!Dreg,Areg] +1110 011f 11dd dDDD:000:-NZ0C:-----:--:13: ROfW.W d[!Dreg,Areg] -1110 1000 11ss sSSS:20:-NZ00:-----:--:11: BFTST #1,s[!Areg,Apdi,Aipi,Immd] -1110 1001 11ss sSSS:20:-NZ00:-----:--:11: BFEXTU #1,s[!Areg,Apdi,Aipi,Immd] -1110 1010 11ss sSSS:20:-NZ00:-----:--:13: BFCHG #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16] -1110 1011 11ss sSSS:20:-NZ00:-----:--:11: BFEXTS #1,s[!Areg,Apdi,Aipi,Immd] -1110 1100 11ss sSSS:20:-NZ00:-----:--:13: BFCLR #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16] -1110 1101 11ss sSSS:20:-NZ00:-----:--:11: BFFFO #1,s[!Areg,Apdi,Aipi,Immd] -1110 1110 11ss sSSS:20:-NZ00:-----:--:13: BFSET #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16] -1110 1111 11ss sSSS:20:-NZ00:-----:--:13: BFINS #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16] +1110 1000 11ss sSSS:200:-NZ00:-----:--:11: BFTST #1,s[!Areg,Apdi,Aipi,Immd] +1110 1001 11ss sSSS:200:-NZ00:-----:--:11: BFEXTU #1,s[!Areg,Apdi,Aipi,Immd] +1110 1010 11ss sSSS:200:-NZ00:-----:--:13: BFCHG #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16] +1110 1011 11ss sSSS:200:-NZ00:-----:--:11: BFEXTS #1,s[!Areg,Apdi,Aipi,Immd] +1110 1100 11ss sSSS:200:-NZ00:-----:--:13: BFCLR #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16] +1110 1101 11ss sSSS:200:-NZ00:-----:--:11: BFFFO #1,s[!Areg,Apdi,Aipi,Immd] +1110 1110 11ss sSSS:200:-NZ00:-----:--:13: BFSET #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16] +1110 1111 11ss sSSS:200:-NZ00:-----:--:13: BFINS #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16] % floating point co processor -1111 0010 00ss sSSS:20:-----:-----:--:11: FPP #1,s -1111 0010 01ss sSSS:20:-----:-----:-B:11: FDBcc #1,s[Areg-Dreg] -1111 0010 01ss sSSS:20:-----:-----:--:11: FScc #1,s[!Areg,Immd,PC8r,PC16] -1111 0010 0111 1010:20:-----:-----:T-:10: FTRAPcc #1 -1111 0010 0111 1011:20:-----:-----:T-:10: FTRAPcc #2 -1111 0010 0111 1100:20:-----:-----:T-:00: FTRAPcc -1111 0010 10KK KKKK:20:-----:-----:-B:11: FBcc #K,#1 -1111 0010 11KK KKKK:20:-----:-----:-B:11: FBcc #K,#2 -1111 0011 00ss sSSS:22:-----:-----:--:20: FSAVE s[!Dreg,Areg,Aipi,Immd,PC8r,PC16] -1111 0011 01ss sSSS:22:-----:-----:--:10: FRESTORE s[!Dreg,Areg,Apdi,Immd] +1111 0010 00ss sSSS:200:-----:-----:--:11: FPP #1,s +1111 0010 01ss sSSS:200:-----:-----:-B:11: FDBcc #1,s[Areg-Dreg] +1111 0010 01ss sSSS:200:-----:-----:--:11: FScc #1,s[!Areg,Immd,PC8r,PC16] +1111 0010 0111 1010:200:-----:-----:T-:10: FTRAPcc #1 +1111 0010 0111 1011:200:-----:-----:T-:10: FTRAPcc #2 +1111 0010 0111 1100:200:-----:-----:T-:00: FTRAPcc +1111 0010 10KK KKKK:200:-----:-----:-B:11: FBcc #K,#1 +1111 0010 11KK KKKK:200:-----:-----:-B:11: FBcc #K,#2 +1111 0011 00ss sSSS:202:-----:-----:--:20: FSAVE s[!Dreg,Areg,Aipi,Immd,PC8r,PC16] +1111 0011 01ss sSSS:202:-----:-----:--:10: FRESTORE s[!Dreg,Areg,Apdi,Immd] % 68030 MMU (allowed addressing modes not checked!) -1111 0000 00ss sSSS:32:?????:?????:T-:11: MMUOP030 s[Aind,Ad16,Ad8r,absl,absw],#1 +1111 0000 00ss sSSS:342:?????:?????:T-:11: MMUOP030 s[Dreg,Areg,Apdi,Aipi,Aind,Ad16,Ad8r,absl,absw],#1 % 68040/68060 instructions -1111 0100 pp00 1rrr:42:-----:-----:T-:02: CINVL #p,Ar -1111 0100 pp01 0rrr:42:-----:-----:T-:02: CINVP #p,Ar -1111 0100 pp01 1rrr:42:-----:-----:T-:00: CINVA #p -1111 0100 pp10 1rrr:42:-----:-----:T-:02: CPUSHL #p,Ar -1111 0100 pp11 0rrr:42:-----:-----:T-:02: CPUSHP #p,Ar -1111 0100 pp11 1rrr:42:-----:-----:T-:00: CPUSHA #p -1111 0101 0000 0rrr:42:-----:-----:T-:00: PFLUSHN Ara -1111 0101 0000 1rrr:42:-----:-----:T-:00: PFLUSH Ara -1111 0101 0001 0rrr:42:-----:-----:T-:00: PFLUSHAN Ara -1111 0101 0001 1rrr:42:-----:-----:T-:00: PFLUSHA Ara -1111 0101 0100 1rrr:42:-----:-----:T-:00: PTESTR Ara -1111 0101 0110 1rrr:42:-----:-----:T-:00: PTESTW Ara +1111 0100 pp00 1rrr:402:-----:-----:T-:02: CINVL #p,Ar +1111 0100 pp01 0rrr:402:-----:-----:T-:02: CINVP #p,Ar +1111 0100 pp01 1rrr:402:-----:-----:T-:00: CINVA #p +1111 0100 pp10 1rrr:402:-----:-----:T-:02: CPUSHL #p,Ar +1111 0100 pp11 0rrr:402:-----:-----:T-:02: CPUSHP #p,Ar +1111 0100 pp11 1rrr:402:-----:-----:T-:00: CPUSHA #p +1111 0101 0000 0rrr:402:-----:-----:T-:00: PFLUSHN Ara +1111 0101 0000 1rrr:402:-----:-----:T-:00: PFLUSH Ara +1111 0101 0001 0rrr:402:-----:-----:T-:00: PFLUSHAN Ara +1111 0101 0001 1rrr:402:-----:-----:T-:00: PFLUSHA Ara +% 68040 only +1111 0101 0100 1rrr:452:-----:-----:T-:00: PTESTR Ara +1111 0101 0110 1rrr:452:-----:-----:T-:00: PTESTW Ara % destination register number is encoded in the following word -1111 0110 0010 0rrr:40:-----:-----:--:12: MOVE16 ArP,AxP -1111 0110 00ss sSSS:40:-----:-----:--:12: MOVE16 s[Dreg-Aipi],Al -1111 0110 00dd dDDD:40:-----:-----:--:12: MOVE16 Al,d[Areg-Aipi] -1111 0110 00ss sSSS:40:-----:-----:--:12: MOVE16 s[Aind],Al -1111 0110 00dd dDDD:40:-----:-----:--:12: MOVE16 Al,d[Aipi-Aind] +1111 0110 0010 0rrr:400:-----:-----:--:12: MOVE16 ArP,AxP +1111 0110 00ss sSSS:400:-----:-----:--:12: MOVE16 s[Dreg-Aipi],Al +1111 0110 00dd dDDD:400:-----:-----:--:12: MOVE16 Al,d[Areg-Aipi] +1111 0110 00ss sSSS:400:-----:-----:--:12: MOVE16 s[Aind],Al +1111 0110 00dd dDDD:400:-----:-----:--:12: MOVE16 Al,d[Aipi-Aind] % 68060 -1111 1000 0000 0000:52:?????:?????:T-:10: LPSTOP #1 -1111 0101 1000 1rrr:52:-----:-----:T-:00: PLPAR Ara -1111 0101 1100 1rrr:52:-----:-----:T-:00: PLPAW Ara +1111 1000 0000 0000:502:?????:?????:T-:10: LPSTOP #1 +1111 0101 1000 1rrr:502:-----:-----:T-:00: PLPAR Ara +1111 0101 1100 1rrr:502:-----:-----:T-:00: PLPAW Ara diff --git a/src/trace.c b/src/trace.c new file mode 100644 index 00000000..c517cc8f --- /dev/null +++ b/src/trace.c @@ -0,0 +1,81 @@ +#define _GNU_SOURCE + +#include +#include +#include +#include + + +#define MAX_TRACE 2000 + +static void* trc_func[MAX_TRACE]; +static void* trc_caller[MAX_TRACE]; +static int trc_enter[MAX_TRACE]; +static int trc_number[MAX_TRACE]; +static int trc_next_write = 0; +static int trc_counter = 0; + +static int do_trace = 0; + +static FILE *fd; + + +void trace_begin (void) +{ + if(do_trace) + return; + memset(trc_enter, 0, sizeof(int) * MAX_TRACE); + do_trace = 1; +} + +void trace_end (void) +{ + if(do_trace) { + do_trace = 0; + + fd = fopen("trace.txt", "w"); + for(int i=0; i 0) { + Dl_info dlinfo; + memset(&dlinfo, 0, sizeof(dlinfo)); + int func_found = dladdr(trc_func[trc_next_write], &dlinfo); + if(func_found && dlinfo.dli_sname != NULL) { + fprintf(fd, "%8d - %s 0x%08X from 0x%08X (%s)\n", trc_number[trc_next_write], (trc_enter[trc_next_write] == 1 ? "enter" : "leave"), + trc_func[trc_next_write], trc_caller[trc_next_write], dlinfo.dli_sname); + } + } + ++trc_next_write; + if(trc_next_write >= MAX_TRACE) + trc_next_write = 0; + } + fclose(fd); + } +} + +void __cyg_profile_func_enter (void *func, void *caller) +{ + if(do_trace) { + trc_enter[trc_next_write] = 1; + trc_func[trc_next_write] = func; + trc_caller[trc_next_write] = caller; + trc_number[trc_next_write] = trc_counter; + ++trc_counter; + ++trc_next_write; + if(trc_next_write >= MAX_TRACE) + trc_next_write = 0; + } +} + +void __cyg_profile_func_exit (void *func, void *caller) +{ + if(do_trace) { + trc_enter[trc_next_write] = 2; + trc_func[trc_next_write] = func; + trc_caller[trc_next_write] = caller; + trc_number[trc_next_write] = trc_counter; + ++trc_counter; + ++trc_next_write; + if(trc_next_write >= MAX_TRACE) + trc_next_write = 0; + } +} diff --git a/src/traps.cpp b/src/traps.cpp index bed3e515..24ad35fb 100644 --- a/src/traps.cpp +++ b/src/traps.cpp @@ -165,7 +165,7 @@ void REGPARAM2 m68k_handle_trap (unsigned int trap_num) m68k_dreg (regs, 0) = retval; if (implicit_rts) { - m68k_do_rts (regs); + m68k_do_rts (); fill_prefetch (); } } @@ -179,11 +179,18 @@ void REGPARAM2 m68k_handle_trap (unsigned int trap_num) * Implementation of extended traps */ +struct TrapCPUContext +{ + uae_u32 regs[16]; + uae_u32 pc; + int intmask; +}; + struct TrapContext { /* Trap's working copy of 68k state. This is what the trap handler should * access to get arguments from 68k space. */ - struct regstruct regs; + //struct regstruct regs; /* Trap handler function that gets called on the trap context */ TrapHandler trap_handler; @@ -193,7 +200,8 @@ struct TrapContext uae_u32 trap_retval; /* Copy of 68k state at trap entry. */ - struct regstruct saved_regs; + //struct regstruct saved_regs; + struct TrapCPUContext saved_regs; /* Thread which effects the trap context. */ uae_thread_id thread; @@ -209,6 +217,19 @@ struct TrapContext uae_u32 call68k_retval; }; +static void copytocpucontext(struct TrapCPUContext *cpu) +{ + memcpy (cpu->regs, regs.regs, sizeof (regs.regs)); + cpu->intmask = regs.intmask; + cpu->pc = m68k_getpc (); +} +static void copyfromcpucontext(struct TrapCPUContext *cpu, uae_u32 pc) +{ + memcpy (regs.regs, cpu->regs, sizeof (regs.regs)); + regs.intmask = cpu->intmask; + m68k_setpc (pc); +} + /* 68k addresses which invoke the corresponding traps. */ static uaecptr m68k_call_trapaddr; @@ -244,19 +265,16 @@ static void *trap_thread (void *arg) /* Enter critical section - only one trap at a time, please! */ uae_sem_wait (&trap_mutex); - // In WinUAE, ccrflags are not part of regs-struct, so don't restore - // these flags here. Keep the current flags... - struct flag_struct currflags = regs.ccrflags; - regs = context->saved_regs; - regs.ccrflags = currflags; + //regs = context->saved_regs; + /* Set PC to address of the exit handler, so that it will be called + * when the 68k context resumes. */ + copyfromcpucontext (&context->saved_regs, exit_trap_trapaddr); /* Don't allow an interrupt and thus potentially another * trap to be invoked while we hold the above mutex. * This is probably just being paranoid. */ regs.intmask = 7; - /* Set PC to address of the exit handler, so that it will be called - * when the 68k context resumes. */ - m68k_setpc (regs, exit_trap_trapaddr); + //m68k_setpc (exit_trap_trapaddr); current_context = context; /* Switch back to 68k context */ @@ -283,7 +301,8 @@ static void trap_HandleExtendedTrap (TrapHandler handler_func, int has_retval) context->trap_handler = handler_func; context->trap_has_retval = has_retval; - context->saved_regs = regs; + //context->saved_regs = regs; + copytocpucontext (&context->saved_regs); /* Start thread to handle new trap context. */ uae_start_thread_fast (trap_thread, (void *)context, &context->thread); @@ -322,7 +341,7 @@ static uae_u32 trap_Call68k (TrapContext *context, uaecptr func_addr) /* Set PC to address of 68k call trap, so that it will be * executed when emulator context resumes. */ - m68k_setpc (regs, m68k_call_trapaddr); + m68k_setpc (m68k_call_trapaddr); fill_prefetch (); /* Switch to emulator context. */ @@ -341,7 +360,7 @@ static uae_u32 trap_Call68k (TrapContext *context, uaecptr func_addr) /* * Handles the emulator's side of a 68k call (from an extended trap) */ -static uae_u32 REGPARAM3 m68k_call_handler (TrapContext *dummy_ctx) +static uae_u32 REGPARAM2 m68k_call_handler (TrapContext *dummy_ctx) { TrapContext *context = current_context; @@ -363,7 +382,7 @@ static uae_u32 REGPARAM3 m68k_call_handler (TrapContext *dummy_ctx) m68k_areg (regs, 7) = sp; /* Set PC to address of 68k function to call. */ - m68k_setpc (regs, context->call68k_func_addr); + m68k_setpc (context->call68k_func_addr); fill_prefetch (); /* End critical section: allow other traps run. */ @@ -379,7 +398,7 @@ static uae_u32 REGPARAM3 m68k_call_handler (TrapContext *dummy_ctx) /* * Handles the return from a 68k call at the emulator's side. */ -static uae_u32 REGPARAM3 m68k_return_handler (TrapContext *dummy_ctx) +static uae_u32 REGPARAM2 m68k_return_handler (TrapContext *dummy_ctx) { TrapContext *context; uae_u32 sp; @@ -413,7 +432,7 @@ static uae_u32 REGPARAM3 m68k_return_handler (TrapContext *dummy_ctx) * Handles completion of an extended trap and passes * return value from trap function to 68k space. */ -static uae_u32 REGPARAM3 exit_trap_handler (TrapContext *dummy_ctx) +static uae_u32 REGPARAM2 exit_trap_handler (TrapContext *dummy_ctx) { TrapContext *context = current_context; @@ -421,11 +440,8 @@ static uae_u32 REGPARAM3 exit_trap_handler (TrapContext *dummy_ctx) uae_wait_thread (context->thread); /* Restore 68k state saved at trap entry. */ - // In WinUAE, ccrflags are not part of regs-struct, so don't restore - // these flags here. Keep the current flags... - struct flag_struct currflags = regs.ccrflags; - regs = context->saved_regs; - regs.ccrflags = currflags; + //regs = context->saved_regs; + copyfromcpucontext (&context->saved_regs, context->saved_regs.pc); /* If trap is supposed to return a value, then store * return value in D0. */ diff --git a/src/uaelib.cpp b/src/uaelib.cpp index 226925ec..9f783cc7 100755 --- a/src/uaelib.cpp +++ b/src/uaelib.cpp @@ -41,13 +41,13 @@ static uae_u32 emulib_GetVersion (void) */ static uae_u32 emulib_HardReset (void) { - uae_reset(0); + uae_reset(1, 1); return 0; } static uae_u32 emulib_Reset (void) { - uae_reset(0); + uae_reset(0, 0); return 0; } @@ -68,7 +68,9 @@ static uae_u32 emulib_EnableSound (uae_u32 val) */ static uae_u32 emulib_EnableJoystick (uae_u32 val) { - return 0; + currprefs.jports[0].id = val & 255; + currprefs.jports[1].id = (val >> 8) & 255; + return 1; } /* @@ -111,7 +113,7 @@ static uae_u32 REGPARAM2 emulib_ChgCMemSize (uae_u32 memsize) m68k_dreg (regs, 0) = 0; changed_prefs.chipmem_size = memsize; - uae_reset(0); + uae_reset(1, 1); return 1; } @@ -129,7 +131,7 @@ static uae_u32 REGPARAM2 emulib_ChgSMemSize (uae_u32 memsize) m68k_dreg (regs, 0) = 0; changed_prefs.bogomem_size = memsize; - uae_reset (0); + uae_reset (1, 1); return 1; } @@ -146,7 +148,7 @@ static uae_u32 REGPARAM2 emulib_ChgFMemSize (uae_u32 memsize) } m68k_dreg (regs, 0) = 0; changed_prefs.fastmem_size = memsize; - uae_reset (0); + uae_reset (1, 1); return 0; } @@ -157,6 +159,7 @@ static uae_u32 emulib_InsertDisk (uaecptr name, uae_u32 drive) { int i = 0; char real_name[256]; + TCHAR *s; if (drive > 3) return 0; @@ -167,7 +170,9 @@ static uae_u32 emulib_InsertDisk (uaecptr name, uae_u32 drive) if (i == 255) return 0; /* ENAMETOOLONG */ - _tcscpy (changed_prefs.floppyslots[drive].df, real_name); + s = au (real_name); + _tcscpy (changed_prefs.floppyslots[drive].df, s); + xfree (s); return 1; } @@ -187,7 +192,7 @@ static uae_u32 emulib_ExitEmu (void) */ static uae_u32 emulib_GetUaeConfig (uaecptr place) { - int i; + int i, j; put_long (place, version); put_long (place + 4, allocated_chipmem); @@ -195,7 +200,7 @@ static uae_u32 emulib_GetUaeConfig (uaecptr place) put_long (place + 12, allocated_fastmem); put_long (place + 16, currprefs.gfx_framerate); put_long (place + 20, currprefs.produce_sound); - put_long (place + 24, 0); + put_long (place + 24, currprefs.jports[0].id | (currprefs.jports[1].id << 8)); put_long (place + 28, 0); if (disk_empty (0)) put_byte (place + 32, 0); @@ -214,11 +219,11 @@ static uae_u32 emulib_GetUaeConfig (uaecptr place) else put_byte (place + 35, 1); - for (i = 0; i < 256; i++) { - put_byte ((place + 36 + i), currprefs.floppyslots[0].df[i]); - put_byte ((place + 36 + i + 256), currprefs.floppyslots[1].df[i]); - put_byte ((place + 36 + i + 512), currprefs.floppyslots[2].df[i]); - put_byte ((place + 36 + i + 768), currprefs.floppyslots[3].df[i]); + for (j = 0; j < 4; j++) { + char *s = ua (currprefs.floppyslots[j].df); + for (i = 0; i < 256; i++) + put_byte (place + 36 + i + j * 256, s[i]); + xfree (s); } return 1; } @@ -309,6 +314,7 @@ static uae_u32 emulib_Minimize (void) static int native_dos_op (uae_u32 mode, uae_u32 p1, uae_u32 p2, uae_u32 p3) { TCHAR tmp[MAX_DPATH]; + char *s; int v, i; if (mode) @@ -319,16 +325,18 @@ static int native_dos_op (uae_u32 mode, uae_u32 p1, uae_u32 p2, uae_u32 p3) v = get_native_path (p1, tmp); if (v) return v; - for (i = 0; i <= strlen(tmp) && i < p3 - 1; i++) { - put_byte (p2 + i, tmp[i]); + s = ua (tmp); + for (i = 0; i <= strlen (s) && i < p3 - 1; i++) { + put_byte (p2 + i, s[i]); put_byte (p2 + i + 1, 0); } + xfree (s); return 0; } extern uae_u32 picasso_demux (uae_u32 arg, TrapContext *context); -STATIC_INLINE uae_u32 REGPARAM2 uaelib_demux2 (TrapContext *context) +static uae_u32 REGPARAM2 uaelib_demux2 (TrapContext *context) { #define ARG0 (get_long (m68k_areg (regs, 7) + 4)) #define ARG1 (get_long (m68k_areg (regs, 7) + 8)) @@ -367,9 +375,10 @@ STATIC_INLINE uae_u32 REGPARAM2 uaelib_demux2 (TrapContext *context) case 70: return 0; /* RESERVED. Something uses this.. */ - case 80: return 0xffffffff; - case 81: return 0; - case 82: return 0; + case 80: + return 0xffffffff; + case 81: return cfgfile_uaelib (ARG1, ARG2, ARG3, ARG4); + case 82: return cfgfile_uaelib_modify (ARG1, ARG2, ARG3, ARG4, ARG5); case 83: return 0; #ifdef DEBUGGER case 84: return mmu_init (ARG1, ARG2, ARG3); @@ -377,7 +386,9 @@ STATIC_INLINE uae_u32 REGPARAM2 uaelib_demux2 (TrapContext *context) case 85: return native_dos_op (ARG1, ARG2, ARG3, ARG4); case 86: if (valid_address(ARG1, 1)) { - write_log(_T("DBG: %s\n"), get_real_address(ARG1)); + TCHAR *s = au ((char*)get_real_address (ARG1)); + write_log (_T("DBG: %s\n"), s); + xfree (s); return 1; } return 0; diff --git a/src/uaeresource.cpp b/src/uaeresource.cpp index 2d2cd1bb..0950c9ff 100644 --- a/src/uaeresource.cpp +++ b/src/uaeresource.cpp @@ -24,11 +24,14 @@ static uae_u32 REGPARAM2 res_getfunc (TrapContext *ctx) uaecptr funcname = m68k_areg (regs, 0); uae_char tmp[256]; uae_u32 p; + TCHAR *s; if (funcname == 0) return 0; strcpyah_safe (tmp, funcname, sizeof tmp); - p = find_trap (tmp); + s = au (tmp); + p = find_trap (s); + xfree (s); return p; } diff --git a/src/zfile.cpp b/src/zfile.cpp index 83f51812..b35416fd 100644 --- a/src/zfile.cpp +++ b/src/zfile.cpp @@ -8,6 +8,7 @@ */ #define RECURSIVE_ARCHIVES 1 +//#define ZFILE_DEBUG #include "sysconfig.h" #include "sysdeps.h" @@ -27,13 +28,124 @@ #include "archivers/dms/pfile.h" #include "archivers/wrp/warp.h" -#ifdef ANDROIDSDL -#include -#endif - static struct zfile *zlist = 0; -const TCHAR *uae_archive_extensions[] = { _T("zip"), _T("7z"), _T("lha"), _T("lzh"), _T("lzx"), NULL }; +const TCHAR *uae_archive_extensions[] = { _T("zip"), _T("rar"), _T("7z"), _T("lha"), _T("lzh"), _T("lzx"), _T("tar"), NULL }; + +#define MAX_CACHE_ENTRIES 10 + +struct zdisktrack +{ + void *data; + int len; +}; +struct zdiskimage +{ + int tracks; + struct zdisktrack zdisktracks[2 * 84]; +}; +struct zcache +{ + TCHAR *name; + struct zdiskimage *zd; + void *data; + int size; + struct zcache *next; + time_t tm; +}; +static struct zcache *zcachedata; + +static struct zcache *cache_get (const TCHAR *name) +{ + struct zcache *zc = zcachedata; + while (zc) { + if (!_tcscmp (name, zc->name)) { + zc->tm = time (NULL); + return zc; + } + zc = zc->next; + } + return NULL; +} + +static void zcache_flush (void) +{ +} + +static void zcache_free_data (struct zcache *zc) +{ + int i; + if (zc->zd) { + for (i = 0; i < zc->zd->tracks; i++) { + xfree (zc->zd->zdisktracks[i].data); + } + xfree (zc->zd); + } + xfree (zc->data); + xfree (zc->name); +} + +static void zcache_free (struct zcache *zc) +{ + struct zcache *pl = NULL; + struct zcache *l = zcachedata; + struct zcache *nxt; + + while (l != zc) { + if (l == 0) + return; + pl = l; + l = l->next; + } + if (l) + nxt = l->next; + zcache_free_data (zc); + if (l == 0) + return; + if(!pl) + zcachedata = nxt; + else + pl->next = nxt; +} + +static void zcache_close (void) +{ + struct zcache *zc = zcachedata; + while (zc) { + struct zcache *n = zc->next; + zcache_free_data (zc); + xfree (n); + zc = n; + } +} + +static void zcache_check (void) +{ + int cnt = 0; + struct zcache *zc = zcachedata, *last = NULL; + while (zc) { + last = zc; + zc = zc->next; + cnt++; + } + write_log (_T("CACHE: %d\n"), cnt); + if (cnt >= MAX_CACHE_ENTRIES && last) + zcache_free (last); +} + +static struct zcache *zcache_put (const TCHAR *name, struct zdiskimage *data) +{ + struct zcache *zc; + + zcache_check (); + zc = xcalloc (struct zcache, 1); + zc->next = zcachedata; + zcachedata = zc; + zc->zd = data; + zc->name = my_strdup (name); + zc->tm = time (NULL); + return zc; +} static void checkarchiveparent (struct zfile *z) { @@ -70,6 +182,7 @@ static void zfile_free (struct zfile *f) xfree (f->name); xfree (f->data); xfree (f->mode); + xfree (f->userdata); xfree (f); } @@ -85,6 +198,7 @@ void zfile_exit (void) void zfile_fclose (struct zfile *f) { + //write_log (_T("%p\n"), f); if (!f) return; if (f->opencnt < 0) { @@ -174,6 +288,8 @@ int zfile_gettype (struct zfile *z) return ZFILE_NVR; if (strcasecmp (ext, _T("uae")) == 0) return ZFILE_CONFIGURATION; + if (strcasecmp (ext, _T("cue")) == 0 || strcasecmp (ext, _T("iso")) == 0 || strcasecmp (ext, _T("ccd")) == 0 || strcasecmp (ext, _T("mds")) == 0) + return ZFILE_CDIMAGE; } memset (buf, 0, sizeof (buf)); zfile_fread (buf, 8, 1, z); @@ -197,6 +313,210 @@ int zfile_gettype (struct zfile *z) return ZFILE_UNKNOWN; } +#define VHD_DYNAMIC 3 +#define VHD_FIXED 2 + +STATIC_INLINE uae_u32 gl (uae_u8 *p) +{ + return (p[0] << 24) | (p[1] << 16) | (p[2] << 8) | (p[3] << 0); +} + +static uae_u32 vhd_checksum (uae_u8 *p, int offset) +{ + int i; + uae_u32 sum; + + sum = 0; + for (i = 0; i < 512; i++) { + if (offset >= 0 && i >= offset && i < offset + 4) + continue; + sum += p[i]; + } + return ~sum; +} + +struct zfile_vhd +{ + int vhd_type; + uae_u64 virtsize; + uae_u32 vhd_bamoffset; + uae_u32 vhd_blocksize; + uae_u8 *vhd_header, *vhd_sectormap; + uae_u64 vhd_footerblock; + uae_u32 vhd_bamsize; + uae_u64 vhd_sectormapblock; + uae_u32 vhd_bitmapsize; +}; + + +static uae_u64 vhd_fread2 (struct zfile *zf, void *dataptrv, uae_u64 offset, uae_u64 len) +{ + uae_u32 bamoffset; + uae_u32 sectoroffset; + uae_u64 read; + struct zfile *zp = zf->parent; + struct zfile_vhd *zvhd = (struct zfile_vhd*)zf->userdata; + uae_u8 *dataptr = (uae_u8*)dataptrv; + + //write_log (_T("%08x %08x\n"), (uae_u32)offset, (uae_u32)len); + read = 0; + if (offset & 511) + return read; + if (len & 511) + return read; + while (len > 0) { + bamoffset = (offset / zvhd->vhd_blocksize) * 4 + zvhd->vhd_bamoffset; + sectoroffset = gl (zvhd->vhd_header + bamoffset); + if (sectoroffset == 0xffffffff) { + memset (dataptr, 0, 512); + read += 512; + } else { + int bitmapoffsetbits; + int bitmapoffsetbytes; + int sectormapblock; + + bitmapoffsetbits = (offset / 512) % (zvhd->vhd_blocksize / 512); + bitmapoffsetbytes = bitmapoffsetbits / 8; + sectormapblock = sectoroffset * 512 + (bitmapoffsetbytes & ~511); + if (zvhd->vhd_sectormapblock != sectormapblock) { + // read sector bitmap + //write_log (_T("BM %08x\n"), sectormapblock); + zfile_fseek (zp, sectormapblock, SEEK_SET); + if (zfile_fread (zvhd->vhd_sectormap, 1, 512, zp) != 512) + return read; + zvhd->vhd_sectormapblock = sectormapblock; + } + // block allocated in bitmap? + if (zvhd->vhd_sectormap[bitmapoffsetbytes & 511] & (1 << (7 - (bitmapoffsetbits & 7)))) { + // read data block + int block = sectoroffset * 512 + zvhd->vhd_bitmapsize + bitmapoffsetbits * 512; + //write_log (_T("DB %08x\n"), block); + zfile_fseek (zp, block, SEEK_SET); + if (zfile_fread (dataptr, 1, 512, zp) != 512) + return read; + } else { + memset (dataptr, 0, 512); + } + read += 512; + } + len -= 512; + dataptr += 512; + offset += 512; + } + return read; +} +static uae_s64 vhd_fread (void *data, uae_u64 l1, uae_u64 l2, struct zfile *zf) +{ + uae_u64 size = l1 * l2; + uae_u64 out = 0; + int len = 0; + + if (!l1 || !l2) + return 0; + if ((zf->seek & 511) || (size & 511)) { + uae_u8 tmp[512]; + + if (zf->seek & 511) { + int s; + s = 512 - (zf->seek & 511); + vhd_fread2 (zf, tmp, zf->seek & ~511, 512); + memcpy ((uae_u8*)data + len, tmp + 512 - s, s); + len += s; + out += s; + zf->seek += s; + } + while (size > 0) { + int s = size > 512 ? 512 : size; + vhd_fread2 (zf, tmp, zf->seek, 512); + memcpy ((uae_u8*)data + len, tmp, s); + zf->seek += s; + size -= s; + out += s; + } + } else { + out = vhd_fread2 (zf, data, zf->seek, size); + zf->seek += out; + out /= l1; + } + return out; +} + +static struct zfile *vhd (struct zfile *z) +{ + uae_u8 tmp[512], tmp2[512]; + uae_u32 v; + struct zfile_vhd *zvhd; + uae_u64 fsize; + + zvhd = xcalloc (struct zfile_vhd, 1); + zfile_fseek (z, 0, SEEK_END); + fsize = zfile_ftell (z); + zfile_fseek (z, 0, SEEK_SET); + if (zfile_fread (tmp, 1, 512, z) != 512) + goto nonvhd; + v = gl (tmp + 8); // features + if ((v & 3) != 2) + goto nonvhd; + v = gl (tmp + 8 + 4); // version + if ((v >> 16) != 1) + goto nonvhd; + zvhd->vhd_type = gl (tmp + 8 + 4 + 4 + 8 + 4 + 4 + 4 + 4 + 8 + 8 + 4); + if (zvhd->vhd_type != VHD_FIXED && zvhd->vhd_type != VHD_DYNAMIC) + goto nonvhd; + v = gl (tmp + 8 + 4 + 4 + 8 + 4 + 4 + 4 + 4 + 8 + 8 + 4 + 4); + if (v == 0) + goto nonvhd; + if (vhd_checksum (tmp, 8 + 4 + 4 + 8 + 4 + 4 + 4 + 4 + 8 + 8 + 4 + 4) != v) + goto nonvhd; + zfile_fseek (z, fsize - sizeof tmp2, SEEK_SET); + if (zfile_fread (tmp2, 1, 512, z) != 512) + goto end; + if (memcmp (tmp, tmp2, sizeof tmp)) + goto nonvhd; + zvhd->vhd_footerblock = fsize - 512; + zvhd->virtsize = (uae_u64)(gl (tmp + 8 + 4 + 4 + 8 + 4 + 4 +4 + 4 + 8)) << 32; + zvhd->virtsize |= gl (tmp + 8 + 4 + 4 + 8 + 4 + 4 +4 + 4 + 8 + 4); + if (zvhd->vhd_type == VHD_DYNAMIC) { + uae_u32 size; + zvhd->vhd_bamoffset = gl (tmp + 8 + 4 + 4 + 4); + if (zvhd->vhd_bamoffset == 0 || zvhd->vhd_bamoffset >= fsize) + goto end; + zfile_fseek (z, zvhd->vhd_bamoffset, SEEK_SET); + if (zfile_fread (tmp, 1, 512, z) != 512) + goto end; + v = gl (tmp + 8 + 8 + 8 + 4 + 4 + 4); + if (vhd_checksum (tmp, 8 + 8 + 8 + 4 + 4 + 4) != v) + goto end; + v = gl (tmp + 8 + 8 + 8); + if ((v >> 16) != 1) + goto end; + zvhd->vhd_blocksize = gl (tmp + 8 + 8 + 8 + 4 + 4); + zvhd->vhd_bamoffset = gl (tmp + 8 + 8 + 4); + zvhd->vhd_bamsize = (((zvhd->virtsize + zvhd->vhd_blocksize - 1) / zvhd->vhd_blocksize) * 4 + 511) & ~511; + size = zvhd->vhd_bamoffset + zvhd->vhd_bamsize; + zvhd->vhd_header = xmalloc (uae_u8, size); + zfile_fseek (z, 0, SEEK_SET); + if (zfile_fread (zvhd->vhd_header, 1, size, z) != size) + goto end; + zvhd->vhd_sectormap = xmalloc (uae_u8, 512); + zvhd->vhd_sectormapblock = -1; + zvhd->vhd_bitmapsize = ((zvhd->vhd_blocksize / (8 * 512)) + 511) & ~511; + } + z = zfile_fopen_parent (z, NULL, 0, zvhd->virtsize); + z->useparent = 0; + z->dataseek = 1; + z->userdata = zvhd; + z->zfileread = vhd_fread; + write_log (_T("%s is VHD %s image, virtual size=%lldK\n"), + zfile_getname (z), + zvhd->vhd_type == 2 ? _T("fixed") : _T("dynamic"), + zvhd->virtsize / 1024); + return z; +nonvhd: +end: + return z; +} + static struct zfile *zfile_gunzip (struct zfile *z, int *retcode) { uae_u8 header[2 + 1 + 1 + 4 + 1 + 1]; @@ -231,11 +551,13 @@ static struct zfile *zfile_gunzip (struct zfile *z, int *retcode) } if (flags & 8) { /* get original file name */ + uae_char aname[MAX_DPATH]; i = 0; do { - zfile_fread (name + i, 1, 1, z); - } while (i < MAX_DPATH - 1 && name[i++]); - name[i] = 0; + zfile_fread (aname + i, 1, 1, z); + } while (i < MAX_DPATH - 1 && aname[i++]); + aname[i] = 0; + au_copy (name, MAX_DPATH, aname); } if (flags & 16) { /* skip comment */ i = 0; @@ -371,6 +693,7 @@ static struct zfile *extadf (struct zfile *z, int index, int *retcode) if (index == 0) { r = isamigatrack (amigamfmbuffer, (uae_u8*)mfm, len, outbuf, writebuffer_ok, i, &outsize); if (r < 0 && i == 0) { + zfile_seterror (_T("'%s' is not AmigaDOS formatted"), zo->name); goto end; } if (i == 0) @@ -378,6 +701,7 @@ static struct zfile *extadf (struct zfile *z, int index, int *retcode) } else { r = ispctrack (amigamfmbuffer, (uae_u8*)mfm, len, outbuf, writebuffer_ok, i, &outsize); if (r < 0 && i == 0) { + zfile_seterror (_T("'%s' is not PC formatted"), zo->name); goto end; } if (i == 0) @@ -412,6 +736,144 @@ end: return NULL; } +#ifdef CAPS +#include "caps/caps_win32.h" +static struct zfile *ipf (struct zfile *z, int index, int *retcode) +{ + int i, j, r; + struct zfile *zo; + TCHAR *orgname = zfile_getname (z); + TCHAR *ext = _tcsrchr (orgname, '.'); + TCHAR newname[MAX_DPATH]; + uae_u16 *amigamfmbuffer; + uae_u8 writebuffer_ok[32]; + int tracks, len; + int outsize; + int startpos = 0; + uae_u8 *outbuf; + uae_u8 tmp[12]; + struct zcache *zc; + + if (checkwrite (z, retcode)) + return NULL; + + if (index > 2) + return NULL; + + zc = cache_get (z->name); + if (!zc) { + uae_u16 *mfm; + struct zdiskimage *zd; + if (!caps_loadimage (z, 0, &tracks)) + return NULL; + mfm = xcalloc (uae_u16, 32000 / 2); + zd = xcalloc (struct zdiskimage, 1); + zd->tracks = tracks; + for (i = 0; i < tracks; i++) { + uae_u8 *buf, *p; + int mrev, gapo; + caps_loadtrack (mfm, NULL, 0, i, &len, &mrev, &gapo); + //write_log (_T("%d: %d %d %d\n"), i, mrev, gapo, len); + len /= 8; + buf = p = xmalloc (uae_u8, len); + for (j = 0; j < len / 2; j++) { + uae_u16 v = mfm[j]; + *p++ = v >> 8; + *p++ = v; + } + zd->zdisktracks[i].data = buf; + zd->zdisktracks[i].len = len; + } + caps_unloadimage (0); + zc = zcache_put (z->name, zd); + } + + outbuf = xcalloc (uae_u8, 16384); + amigamfmbuffer = xcalloc (uae_u16, 32000 / 2); + if (ext) { + _tcscpy (newname, orgname); + _tcscpy (newname + _tcslen (newname) - _tcslen (ext), _T(".adf")); + } else { + _tcscat (newname, _T(".adf")); + } + if (index == 1) + _tcscpy (newname + _tcslen (newname) - 4, _T(".ima")); + if (index == 2) + _tcscpy (newname + _tcslen (newname) - 4, _T(".ext.adf")); + + zo = zfile_fopen_empty (z, newname, 0); + if (!zo) + goto end; + + if (retcode) + *retcode = 1; + + tracks = zc->zd->tracks; + + if (index > 1) { + zfile_fwrite ("UAE-1ADF", 8, 1, zo); + tmp[0] = 0; tmp[1] = 0; /* flags (reserved) */ + tmp[2] = 0; tmp[3] = tracks; /* number of tracks */ + zfile_fwrite (tmp, 4, 1, zo); + memset (tmp, 0, sizeof tmp); + tmp[2] = 0; tmp[3] = 1; /* track type */ + startpos = zfile_ftell (zo); + for (i = 0; i < tracks; i++) + zfile_fwrite (tmp, sizeof tmp, 1, zo); + } + + outsize = 0; + for (i = 0; i < tracks; i++) { + uae_u8 *p = (uae_u8*)zc->zd->zdisktracks[i].data; + len = zc->zd->zdisktracks[i].len; + memset (writebuffer_ok, 0, sizeof writebuffer_ok); + memset (outbuf, 0, 16384); + if (index == 0) { + r = isamigatrack (amigamfmbuffer, p, len, outbuf, writebuffer_ok, i, &outsize); + if (r < 0 && i == 0) { + zfile_seterror (_T("'%s' is not AmigaDOS formatted"), orgname); + goto end; + } + zfile_fwrite (outbuf, 1, outsize, zo); + } else if (index == 1) { + r = ispctrack (amigamfmbuffer, p, len, outbuf, writebuffer_ok, i, &outsize); + if (r < 0 && i == 0) { + zfile_seterror (_T("'%s' is not PC formatted"), orgname); + goto end; + } + zfile_fwrite (outbuf, outsize, 1, zo); + } else { + int pos = zfile_ftell (zo); + int maxlen = len > 12798 ? len : 12798; + int lenb = len * 8; + + if (maxlen & 1) + maxlen++; + zfile_fseek (zo, startpos + i * 12 + 4, SEEK_SET); + tmp[4] = 0; tmp[5] = 0; tmp[6] = maxlen >> 8; tmp[7] = maxlen; + tmp[8] = lenb >> 24; tmp[9] = lenb >> 16; tmp[10] = lenb >> 8; tmp[11] = lenb; + zfile_fwrite (tmp + 4, 2, 4, zo); + zfile_fseek (zo, pos, SEEK_SET); + zfile_fwrite (p, 1, len, zo); + if (maxlen > len) + zfile_fwrite (outbuf, 1, maxlen - len, zo); + } + } + zfile_fclose (z); + xfree (amigamfmbuffer); + xfree (outbuf); + if (index == 0) + truncate880k (zo); + return zo; +end: + zfile_fclose (zo); + xfree (amigamfmbuffer); + xfree (outbuf); + return NULL; +} +#endif + +#ifdef A_LZX static struct zfile *dsq (struct zfile *z, int lzx, int *retcode) { struct zfile *zi = NULL; @@ -502,7 +964,9 @@ static struct zfile *dsq (struct zfile *z, int lzx, int *retcode) zfile_fclose (zi); return z; } +#endif +#ifdef A_WRP static struct zfile *wrp (struct zfile *z, int *retcode) { if (zfile_needwrite (z)) { @@ -512,7 +976,9 @@ static struct zfile *wrp (struct zfile *z, int *retcode) } return unwarp (z); } +#endif +#ifdef A_DMS static struct zfile *dms (struct zfile *z, int index, int *retcode) { int ret; @@ -583,6 +1049,7 @@ end: zfile_fclose (zextra[i]); return zo; } +#endif const TCHAR *uae_ignoreextensions[] = { _T(".gif"), _T(".jpg"), _T(".png"), _T(".xml"), _T(".pdf"), _T(".txt"), 0 }; @@ -623,20 +1090,20 @@ int zfile_is_diskimage (const TCHAR *name) } static const TCHAR *archive_extensions[] = { - _T("7z"), _T("zip"), _T("lha"), _T("lzh"), _T("lzx"), + _T("7z"), _T("rar"), _T("zip"), _T("lha"), _T("lzh"), _T("lzx"), _T("adf"), _T("adz"), _T("dsq"), _T("dms"), _T("ipf"), _T("fdi"), _T("wrp"), _T("ima"), - _T("hdf"), + _T("hdf"), _T("tar"), NULL }; -static const TCHAR *plugins_7z[] = { _T("7z"), _T("zip"), _T("lha"), _T("lzh"), _T("lzx"), _T("adf"), _T("dsq"), _T("hdf"), NULL }; -static const uae_char *plugins_7z_x[] = { "7z", "MK", NULL, NULL, NULL, NULL, NULL, NULL, NULL }; +static const TCHAR *plugins_7z[] = { _T("7z"), _T("rar"), _T("zip"), _T("lha"), _T("lzh"), _T("lzx"), _T("adf"), _T("dsq"), _T("hdf"), _T("tar"), NULL }; +static const uae_char *plugins_7z_x[] = { "7z", "Rar!", "MK", NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL }; static const int plugins_7z_t[] = { - ArchiveFormat7Zip, ArchiveFormatZIP, ArchiveFormatLHA, ArchiveFormatLHA, ArchiveFormatLZX, - ArchiveFormatADF, ArchiveFormatADF, ArchiveFormatADF + ArchiveFormat7Zip, ArchiveFormatRAR, ArchiveFormatZIP, ArchiveFormatLHA, ArchiveFormatLHA, ArchiveFormatLZX, + ArchiveFormatADF, ArchiveFormatADF, ArchiveFormatADF, ArchiveFormatTAR }; static const int plugins_7z_m[] = { - ZFD_ARCHIVE, ZFD_ARCHIVE, ZFD_ARCHIVE, ZFD_ARCHIVE, ZFD_ARCHIVE, - ZFD_ADF, ZFD_ADF, ZFD_ADF + ZFD_ARCHIVE, ZFD_ARCHIVE, ZFD_ARCHIVE, ZFD_ARCHIVE, ZFD_ARCHIVE, ZFD_ARCHIVE, + ZFD_ADF, ZFD_ADF, ZFD_ADF, ZFD_ARCHIVE }; int iszip (struct zfile *z, int mask) @@ -664,6 +1131,11 @@ int iszip (struct zfile *z, int mask) if (!strcasecmp (ext, _T(".7z"))) { if(header[0] == '7' && header[1] == 'z') return ArchiveFormat7Zip; + return 0; + } + if (!strcasecmp (ext, _T(".rar"))) { + if (header[0] == 'R' && header[1] == 'a' && header[2] == 'r' && header[3] == '!') + return ArchiveFormatRAR; return 0; } if (!strcasecmp (ext, _T(".lha")) || !strcasecmp (ext, _T(".lzh"))) { @@ -681,8 +1153,14 @@ int iszip (struct zfile *z, int mask) if (!strcasecmp (ext, _T(".adf"))) { if (header[0] == 'D' && header[1] == 'O' && header[2] == 'S' && (header[3] >= 0 && header[3] <= 7)) return ArchiveFormatADF; + if (isfat (header)) + return ArchiveFormatFAT; return 0; } + if (!strcasecmp (ext, _T(".ima"))) { + if (isfat (header)) + return ArchiveFormatFAT; + } } if (mask & ZFD_HD) { if (!strcasecmp (ext, _T(".hdf"))) { @@ -690,9 +1168,20 @@ int iszip (struct zfile *z, int mask) return ArchiveFormatADF; if (header[0] == 'S' && header[1] == 'F' && header[2] == 'S') return ArchiveFormatADF; + if (header[0] == 'R' && header[1] == 'D' && header[2] == 'S' && header[3] == 'K') + return ArchiveFormatRDB; + if (isfat (header)) + return ArchiveFormatFAT; return 0; } } +#if defined(ARCHIVEACCESS) + for (i = 0; plugins_7z_x[i]; i++) { + if ((plugins_7z_m[i] & mask) && plugins_7z_x[i] && !strcasecmp (ext + 1, plugins_7z[i]) && + !memcmp (header, plugins_7z_x[i], strlen (plugins_7z_x[i]))) + return plugins_7z_t[i]; + } +#endif return 0; } int iszip (struct zfile *z) @@ -727,6 +1216,10 @@ struct zfile *zuncompress (struct znode *parent, struct zfile *z, int dodefault, return archive_access_select (parent, z, ArchiveFormatLHA, dodefault, retcode, index); if (strcasecmp (ext, _T("lzx")) == 0) return archive_access_select (parent, z, ArchiveFormatLZX, dodefault, retcode, index); + if (strcasecmp (ext, _T("rar")) == 0) + return archive_access_select (parent, z, ArchiveFormatRAR, dodefault, retcode, index); + if (strcasecmp (ext, _T("tar")) == 0) + return archive_access_select (parent, z, ArchiveFormatTAR, dodefault, retcode, index); } if (mask & ZFD_UNPACK) { if (index == 0) { @@ -738,28 +1231,61 @@ struct zfile *zuncompress (struct znode *parent, struct zfile *z, int dodefault, return zfile_gunzip (z, retcode); if (strcasecmp (ext, _T("hdz")) == 0) return zfile_gunzip (z, retcode); +#ifdef A_WRP if (strcasecmp (ext, _T("wrp")) == 0) return wrp (z, retcode); +#endif } +#ifdef A_DMS if (strcasecmp (ext, _T("dms")) == 0) return dms (z, index, retcode); +#endif } + if (mask & ZFD_RAWDISK) { +#ifdef CAPS + if (strcasecmp (ext, _T("ipf")) == 0) + return ipf (z, index, retcode); +#endif + if (mask & (ZFD_RAWDISK_PC | ZFD_RAWDISK_AMIGA)) + return NULL; + } +#if defined(ARCHIVEACCESS) + if (index == 0) { + for (i = 0; plugins_7z_x[i]; i++) { + if ((plugins_7z_t[i] & mask) && strcasecmp (ext, plugins_7z[i]) == 0) + return archive_access_arcacc_select (z, plugins_7z_t[i], retcode); + } + } +#endif } memset (header, 0, sizeof (header)); zfile_fseek (z, 0, SEEK_SET); zfile_fread (header, sizeof (header), 1, z); zfile_fseek (z, 0, SEEK_SET); + if (!memcmp (header, "conectix", 8)) { + if (index > 0) + return NULL; + return vhd (z); + } if (mask & ZFD_UNPACK) { if (index == 0) { if (header[0] == 0x1f && header[1] == 0x8b) return zfile_gunzip (z, retcode); +#ifdef A_LZX if (header[0] == 'P' && header[1] == 'K' && header[2] == 'D') return dsq (z, 0, retcode); +#endif } +#ifdef A_DMS if (header[0] == 'D' && header[1] == 'M' && header[2] == 'S' && header[3] == '!') return dms (z, index, retcode); +#endif } if (mask & ZFD_RAWDISK) { +#ifdef CAPS + if (header[0] == 'C' && header[1] == 'A' && header[2] == 'P' && header[3] == 'S') + return ipf (z, index, retcode); +#endif if (!memcmp (header, "UAE-1ADF", 8)) return extadf (z, index, retcode); } @@ -768,6 +1294,8 @@ struct zfile *zuncompress (struct znode *parent, struct zfile *z, int dodefault, if (mask & ZFD_ARCHIVE) { if (header[0] == 'P' && header[1] == 'K') return archive_access_select (parent, z, ArchiveFormatZIP, dodefault, retcode, index); + if (header[0] == 'R' && header[1] == 'a' && header[2] == 'r' && header[3] == '!') + return archive_access_select (parent, z, ArchiveFormatRAR, dodefault, retcode, index); if (header[0] == 'L' && header[1] == 'Z' && header[2] == 'X') return archive_access_select (parent, z, ArchiveFormatLZX, dodefault, retcode, index); if (header[2] == '-' && header[3] == 'l' && header[4] == 'h' && header[6] == '-') @@ -778,12 +1306,16 @@ struct zfile *zuncompress (struct znode *parent, struct zfile *z, int dodefault, return archive_access_select (parent, z, ArchiveFormatADF, dodefault, retcode, index); if (header[0] == 'S' && header[1] == 'F' && header[2] == 'S') return archive_access_select (parent, z, ArchiveFormatADF, dodefault, retcode, index); + if (isfat (header)) + return archive_access_select (parent, z, ArchiveFormatFAT, dodefault, retcode, index); } if (ext) { if (mask & ZFD_UNPACK) { +#ifdef A_LZX if (strcasecmp (ext, _T("dsq")) == 0) return dsq (z, 1, retcode); +#endif } if (mask & ZFD_ADF) { if (strcasecmp (ext, _T("adf")) == 0 && !memcmp (header, "DOS", 3)) @@ -793,6 +1325,44 @@ struct zfile *zuncompress (struct znode *parent, struct zfile *z, int dodefault, return NULL; } +#ifdef SINGLEFILE +extern uae_u8 singlefile_data[]; + +static struct zfile *zfile_opensinglefile(struct zfile *l) +{ + uae_u8 *p = singlefile_data; + int size, offset; + TCHAR tmp[256], *s; + + _tcscpy (tmp, l->name); + s = tmp + _tcslen (tmp) - 1; + while (*s != 0 && *s != '/' && *s != '\\') + s--; + if (s > tmp) + s++; + write_log (_T("loading from singlefile: '%s'\n"), tmp); + while (*p++); + offset = (p[0] << 24)|(p[1] << 16)|(p[2] << 8)|(p[3] << 0); + p += 4; + for (;;) { + size = (p[0] << 24)|(p[1] << 16)|(p[2] << 8)|(p[3] << 0); + if (!size) + break; + if (!strcmpi (tmp, p + 4)) { + l->data = singlefile_data + offset; + l->size = size; + write_log (_T("found, size %d\n"), size); + return l; + } + offset += size; + p += 4; + p += _tcslen (p) + 1; + } + write_log (_T("not found\n")); + return 0; +} +#endif + static struct zfile *zfile_fopen_nozip (const TCHAR *name, const TCHAR *mode) { struct zfile *l; @@ -863,6 +1433,10 @@ static struct zfile *zfile_fopen_2 (const TCHAR *name, const TCHAR *mode, int ma if( *name == '\0' ) return NULL; +#ifdef SINGLEFILE + if (zfile_opensinglefile (l)) + return l; +#endif l = openzip (name); if (l) { if (writeneeded (mode)) { @@ -871,7 +1445,7 @@ static struct zfile *zfile_fopen_2 (const TCHAR *name, const TCHAR *mode, int ma } l->zfdmask = mask; } else { - struct stat st; + struct mystat st; l = zfile_create (NULL); l->mode = my_strdup (mode); l->name = my_strdup (name); @@ -886,8 +1460,8 @@ static struct zfile *zfile_fopen_2 (const TCHAR *name, const TCHAR *mode, int ma zfile_fclose (l); return 0; } - if (stat (l->name, &st) != -1) - l->size = st.st_size; + if (my_stat (l->name, &st)) + l->size = st.size; l->f = f; } return l; @@ -970,11 +1544,116 @@ static struct zfile *zfile_fopen_x (const TCHAR *name, const TCHAR *mode, int ma return l; } +#ifdef _WIN32 +static int isinternetfile (const TCHAR *name) +{ + if (!_tcsnicmp (name, _T("http://"), 7) || !_tcsnicmp (name, _T("https://"), 8)) + return 1; + if (!_tcsnicmp (name, _T("ftp://"), 6)) + return -1; + return 0; +} +#include +#define INETBUFFERLEN 1000000 +static struct zfile *zfile_fopen_internet (const TCHAR *name, const TCHAR *mode, int mask) +{ + static HINTERNET hi; + HINTERNET i = NULL; + TCHAR tmp[MAX_DPATH]; + DWORD ierr = 0; + DWORD outbuf = sizeof tmp / sizeof (TCHAR); + uae_u8 *data = 0; + int bufferlen = INETBUFFERLEN; + int datalen; + DWORD didread; + struct zfile *zf = NULL; + + if (_tcschr (mode, 'w') || _tcschr (mode, 'a')) + return NULL; + tmp[0] = 0; + if (!hi) { + hi = InternetOpen (WINUAEAPPNAME, INTERNET_OPEN_TYPE_PRECONFIG_WITH_NO_AUTOPROXY, NULL, NULL, 0); + if (hi == NULL) { + write_log (_T("InternetOpen() failed, %d\n"), GetLastError ()); + return NULL; + } + } + i = InternetOpenUrl (hi, name, NULL, 0, INTERNET_FLAG_NO_COOKIES, 0); + if (i == NULL) { + DWORD err = GetLastError (); + if (err == ERROR_INTERNET_EXTENDED_ERROR) + InternetGetLastResponseInfo (&ierr, tmp, &outbuf); + write_log (_T("InternetOpenUrl(%s) failed %d (%d,%s)\n"), name, err, ierr, tmp); + goto end; + } + + if (isinternetfile (name) > 0) { + DWORD statuscode; + DWORD hindex = 0; + DWORD size = sizeof statuscode; + if (!HttpQueryInfo (i, HTTP_QUERY_STATUS_CODE | HTTP_QUERY_FLAG_NUMBER, &statuscode, &size, &hindex)) { + DWORD err = GetLastError (); + write_log (_T("HttpQueryInfo(%s) failed %d\n"), name, err); + goto end; + } + if (statuscode != 200) { + write_log (_T("HttpQueryInfo(%s)=%d\n"), name, statuscode); + goto end; + } + } + + if (mask & ZFD_CHECKONLY) { + zf = zfile_create (NULL); + goto end; + } + + datalen = 0; + data = xmalloc (uae_u8, bufferlen); + for (;;) { + if (!InternetReadFile (i, data + datalen, INETBUFFERLEN, &didread)) { + DWORD err = GetLastError (); + if (err == ERROR_INTERNET_EXTENDED_ERROR) + InternetGetLastResponseInfo (&ierr, tmp, &outbuf); + write_log (_T("InternetReadFile(%s) failed %d (%d,%s)\n"), name, err, ierr, tmp); + break; + } + if (didread == 0) + break; + datalen += didread; + if (datalen > bufferlen - INETBUFFERLEN) { + bufferlen += INETBUFFERLEN; + data = xrealloc (uae_u8, data, bufferlen); + if (!data) { + datalen = 0; + break; + } + } + } + if (datalen > 0) { + zf = zfile_create (NULL); + if (zf) { + zf->size = datalen; + zf->data = data; + data = NULL; + } + } +end: + if (i) + InternetCloseHandle (i); + free (data); + return zf; +} +#endif + static struct zfile *zfile_fopenx2 (const TCHAR *name, const TCHAR *mode, int mask, int index) { struct zfile *f; TCHAR tmp[MAX_DPATH]; +#ifdef _WIN32 + if (isinternetfile (name)) + return zfile_fopen_internet (name, mode, mask); +#endif f = zfile_fopen_x (name, mode, mask, index); if (f) return f; @@ -987,13 +1666,34 @@ static struct zfile *zfile_fopenx2 (const TCHAR *name, const TCHAR *mode, int ma if (f) return f; } +#if 0 + name += 2; + if (name[0] == '/' || name[0] == '\\') + name++; + for (;;) { + _tcscpy (tmp, start_path_data); + _tcscpy (tmp, name); + f = zfile_fopen_x (tmp, mode, mask); + if (f) + return f; + while (name[0]) { + name++; + if (name[-1] == '/' || name[-1] == '\\') + break; + } + if (name[0] == 0) + break; + } +#endif return NULL; } static struct zfile *zfile_fopenx (const TCHAR *name, const TCHAR *mode, int mask, int index) { struct zfile *zf; + //write_log (_T("zfile_fopen('%s','%s',%08x,%d)\n"), name, mode, mask, index); zf = zfile_fopenx2 (name, mode, mask, index); + //write_log (_T("=%p\n"), zf); return zf; } @@ -1017,7 +1717,11 @@ struct zfile *zfile_dup (struct zfile *zf) return NULL; if (zf->archiveparent) checkarchiveparent (zf); - if (zf->data) { + if (zf->userdata) + return NULL; + if (!zf->data && zf->dataseek) { + nzf = zfile_create (zf); + } else if (zf->data) { nzf = zfile_create (zf); nzf->data = xmalloc (uae_u8, zf->size); memcpy (nzf->data, zf->data, zf->size); @@ -1117,6 +1821,16 @@ struct zfile *zfile_fopen_parent (struct zfile *z, const TCHAR *name, uae_u64 of return l; } +struct zfile *zfile_fopen_load_zfile (struct zfile *f) +{ + struct zfile *l = zfile_fopen_empty (f, f->name, f->size); + if (!l) + return NULL; + zfile_fseek (f, 0, SEEK_SET); + zfile_fread (l->data, f->size, 1, f); + return l; +} + struct zfile *zfile_fopen_data (const TCHAR *name, uae_u64 size, const uae_u8 *data) { struct zfile *l; @@ -1171,14 +1885,16 @@ uae_s64 zfile_size (struct zfile *z) uae_s64 zfile_ftell (struct zfile *z) { - if (z->data || z->parent) + if (z->data || z->dataseek || z->parent) return z->seek; return _ftelli64 (z->f); } uae_s64 zfile_fseek (struct zfile *z, uae_s64 offset, int mode) { - if (z->data || (z->parent && z->useparent)) { + if (z->zfileseek) + return z->zfileseek (z, offset, mode); + if (z->data || z->dataseek || (z->parent && z->useparent)) { int ret = 0; switch (mode) { @@ -1209,6 +1925,8 @@ uae_s64 zfile_fseek (struct zfile *z, uae_s64 offset, int mode) size_t zfile_fread (void *b, size_t l1, size_t l2, struct zfile *z) { + if (z->zfileread) + return z->zfileread (b, l1, l2, z); if (z->data) { if (z->datasize < z->size && z->seek + l1 * l2 > z->datasize) { if (z->archiveparent) { @@ -1251,14 +1969,16 @@ size_t zfile_fread (void *b, size_t l1, size_t l2, struct zfile *z) return fread (b, l1, l2, z->f); } -size_t zfile_fwrite (void *b, size_t l1, size_t l2, struct zfile *z) +size_t zfile_fwrite (const void *b, size_t l1, size_t l2, struct zfile *z) { if (z->archiveparent) return 0; + if (z->zfilewrite) + return z->zfilewrite (b, l1, l2, z); if (z->parent && z->useparent) return 0; if (z->data) { - int off = z->seek + l1 * l2; + uae_s64 off = z->seek + l1 * l2; if (z->allocsize == 0) { write_log (_T("zfile_fwrite(data,%s) but allocsize=0!\n"), z->name); return 0; @@ -1283,9 +2003,13 @@ size_t zfile_fwrite (void *b, size_t l1, size_t l2, struct zfile *z) return fwrite (b, l1, l2, z->f); } -size_t zfile_fputs (struct zfile *z, TCHAR *s) +size_t zfile_fputs (struct zfile *z, const TCHAR *s) { - return zfile_fwrite (s, strlen (s), 1, z); + char *s2 = ua (s); + size_t t; + t = zfile_fwrite (s2, strlen (s2), 1, z); + xfree (s2); + return t; } char *zfile_fgetsa(char *s, int size, struct zfile *z) @@ -1316,7 +2040,42 @@ char *zfile_fgetsa(char *s, int size, struct zfile *z) TCHAR *zfile_fgets (TCHAR *s, int size, struct zfile *z) { - return zfile_fgetsa(s, size, z); + checkarchiveparent (z); + if (z->data) { + char s2[MAX_DPATH]; + char *p = s2; + int i; + for (i = 0; i < size - 1; i++) { + if (z->seek == z->size) { + if (i == 0) + return NULL; + break; + } + *p = z->data[z->seek++]; + if (*p == 0 && i == 0) + return NULL; + if (*p == '\n' || *p == 0) { + p++; + break; + } + p++; + } + *p = 0; + if (size > strlen (s2) + 1) + size = strlen (s2) + 1; + au_copy (s, size, s2); + return s + size; + } else { + char s2[MAX_DPATH]; + char *s1; + s1 = fgets (s2, size, z->f); + if (!s1) + return NULL; + if (size > strlen (s2) + 1) + size = strlen (s2) + 1; + au_copy (s, size, s2); + return s + size; + } } int zfile_putc (int c, struct zfile *z) @@ -1511,6 +2270,9 @@ static struct znode *znode_alloc(struct znode *parent, const TCHAR *name) recurparent (fullpath, parent, FALSE); _tcscat (fullpath, FSDB_DIR_SEPARATOR_S); _tcscat (fullpath, tmpname); +#ifdef ZFILE_DEBUG + write_log (_T("znode_alloc vol='%s' parent='%s' name='%s'\n"), parent->volume->root.name, parent->name, name); +#endif zn->fullname = my_strdup(fullpath); zn->name = my_strdup(tmpname); zn->volume = parent->volume; @@ -1595,6 +2357,9 @@ static struct zvolume *zvolume_alloc_2 (const TCHAR *name, struct zfile *z, unsi } root->name = my_strdup (name + i); root->fullname = my_strdup(name); +#ifdef ZFILE_DEBUG + write_log (_T("created zvolume: '%s' (%s)\n"), root->name, root->fullname); +#endif if (volname) zv->volumename = my_strdup (volname); if (z) { @@ -1656,14 +2421,28 @@ static struct zvolume *zfile_fopen_archive_ext (struct znode *parent, struct zfi if (ext != NULL) { ext++; if (flags & ZFD_ARCHIVE) { +#ifdef A_LHA if (strcasecmp (ext, _T("lha")) == 0 || strcasecmp (ext, _T("lzh")) == 0) zv = archive_directory_lha (zf); +#endif +#ifdef A_ZIP if (strcasecmp (ext, _T("zip")) == 0) zv = archive_directory_zip (zf); +#endif +#ifdef A_7Z if (strcasecmp (ext, _T("7z")) == 0) zv = archive_directory_7z (zf); +#endif +#ifdef A_LZX if (strcasecmp (ext, _T("lzx")) == 0) zv = archive_directory_lzx (zf); +#endif +#ifdef A_RAR + if (strcasecmp (ext, _T("rar")) == 0) + zv = archive_directory_rar (zf); +#endif + if (strcasecmp (ext, _T("tar")) == 0) + zv = archive_directory_tar (zf); } if (flags & ZFD_ADF) { if (strcasecmp (ext, _T("adf")) == 0 && !memcmp (header, "DOS", 3)) @@ -1671,7 +2450,10 @@ static struct zvolume *zfile_fopen_archive_ext (struct znode *parent, struct zfi } if (flags & ZFD_HD) { if (strcasecmp (ext, _T("hdf")) == 0) { - zv = archive_directory_adf (parent, zf); + if (!memcmp (header, "RDSK", 4)) + zv = archive_directory_rdb (zf); + else + zv = archive_directory_adf (parent, zf); } } } @@ -1688,17 +2470,33 @@ static struct zvolume *zfile_fopen_archive_data (struct znode *parent, struct zf zfile_fread (header, sizeof (header), 1, zf); zfile_fseek (zf, 0, SEEK_SET); if (flags & ZFD_ARCHIVE) { +#ifdef A_ZIP if (header[0] == 'P' && header[1] == 'K') zv = archive_directory_zip (zf); +#endif +#ifdef A_RAR + if (header[0] == 'R' && header[1] == 'a' && header[2] == 'r' && header[3] == '!') + zv = archive_directory_rar (zf); +#endif +#ifdef A_LZX if (header[0] == 'L' && header[1] == 'Z' && header[2] == 'X') zv = archive_directory_lzx (zf); +#endif +#ifdef A_LHA if (header[2] == '-' && header[3] == 'l' && header[4] == 'h' && header[6] == '-') zv = archive_directory_lha (zf); +#endif } if (flags & ZFD_ADF) { if (header[0] == 'D' && header[1] == 'O' && header[2] == 'S' && (header[3] >= 0 && header[3] <= 7)) zv = archive_directory_adf (parent, zf); } + if (flags & ZFD_HD) { + if (header[0] == 'R' && header[1] == 'D' && header[2] == 'S' && header[3] == 'K') + zv = archive_directory_rdb (zf); + if (isfat (header)) + zv = archive_directory_fat (zf); + } return zv; } @@ -1717,7 +2515,8 @@ static void zfile_fopen_archive_recurse2 (struct zvolume *zv, struct znode *zn, zvnew = zvolume_alloc_empty (zv, tmp); zvnew->parentz = zn; zai.name = tmp; - zai.t = zn->mtime; + zai.tv.tv_sec = zn->mtime.tv_sec; + zai.tv.tv_usec = zn->mtime.tv_usec; zai.comment = zv->volumename; if (zn->flags < 0) zai.flags = zn->flags; @@ -1767,16 +2566,48 @@ static struct zvolume *prepare_recursive_volume (struct zvolume *zv, const TCHAR struct zvolume *zvnew = NULL; int done = 0; - zf = (struct zfile *) zfile_open_archive (path, 0); +#ifdef ZFILE_DEBUG + write_log (_T("unpacking '%s'\n"), path); +#endif + zf = zfile_open_archive (path, 0); if (!zf) goto end; zvnew = zfile_fopen_archive_ext (zv->parentz, zf, flags); if (!zvnew && !(flags & ZFD_NORECURSE)) { +#if 1 zvnew = archive_directory_plain (zf); if (zvnew) { zfile_fopen_archive_recurse (zvnew, flags); done = 1; } +#else + int rc; + int index; + struct zfile *zf2, *zf3; + TCHAR oldname[MAX_DPATH]; + _tcscpy (oldname, zf->name); + index = 0; + for (;;) { + zf3 = zfile_dup (zf); + if (!zf3) + break; + zf2 = zuncompress (&zv->root, zf3, 0, ZFD_ALL, &rc, index); + if (zf2) { + zvnew = archive_directory_plain (zf2); + if (zvnew) { + zvnew->parent = zv->parent; + zfile_fopen_archive_recurse (zvnew); + done = 1; + } + } else { + zfile_fclose (zf3); + if (rc <= 0) + break; + } + index++; + break; // TODO + } +#endif } else if (zvnew) { zvnew->parent = zv->parent; zfile_fopen_archive_recurse (zvnew, flags); @@ -1820,6 +2651,9 @@ static struct znode *get_znode (struct zvolume *zv, const TCHAR *ppath, int recu TCHAR newpath[MAX_DPATH]; newpath[0] = 0; recurparent (newpath, zn, recurse); +#ifdef ZFILE_DEBUG + write_log (_T("'%s'\n"), newpath); +#endif zvdeep = prepare_recursive_volume (zvdeep, newpath, ZFD_ALL); if (!zvdeep) { write_log (_T("failed to unpack '%s'\n"), newpath); @@ -1867,7 +2701,8 @@ struct znode *znode_adddir(struct znode *parent, const TCHAR *name, struct zarch if (zn) return zn; zn = znode_alloc_child(parent, name); - zn->mtime = zai->t; + zn->mtime.tv_sec = zai->tv.tv_sec; + zn->mtime.tv_usec = zai->tv.tv_usec; zn->type = ZNODE_DIR; if (zai->comment) zn->comment = my_strdup (zai->comment); @@ -1925,7 +2760,8 @@ struct znode *zvolume_addfile_abs(struct zvolume *zv, struct zarchive_info *zai) zn = znode_alloc_child(zn2, p2); zn->size = zai->size; zn->type = ZNODE_FILE; - zn->mtime = zai->t; + zn->mtime.tv_sec = zai->tv.tv_sec; + zn->mtime.tv_usec = zai->tv.tv_usec; if (zai->comment) zn->comment = my_strdup(zai->comment); zn->flags = zai->flags; @@ -1935,6 +2771,46 @@ struct znode *zvolume_addfile_abs(struct zvolume *zv, struct zarchive_info *zai) return zn; } +struct zvolume *zfile_fopen_directory (const TCHAR *dirname) +{ + struct zvolume *zv = NULL; + struct my_opendir_s *dir; + TCHAR fname[MAX_DPATH]; + + dir = my_opendir (dirname); + if (!dir) + return NULL; + zv = zvolume_alloc_nofile (dirname, ArchiveFormatDIR, NULL, NULL); + while (my_readdir (dir, fname)) { + TCHAR fullname[MAX_DPATH]; + struct mystat statbuf; + struct zarchive_info zai = { 0 }; + if (!_tcscmp (fname, _T(".")) || !_tcscmp (fname, _T(".."))) + continue; + _tcscpy (fullname, dirname); + _tcscat (fullname, FSDB_DIR_SEPARATOR_S); + _tcscat (fullname, fname); + if (!my_stat (fullname, &statbuf)) + continue; + zai.name = fname; + zai.size = statbuf.size; + zai.tv.tv_sec = statbuf.mtime.tv_sec; + zai.tv.tv_usec = statbuf.mtime.tv_usec; + if (statbuf.mode & FILEFLAG_DIR) { + zvolume_adddir_abs (zv, &zai); + } else { + struct znode *zn; + zn = zvolume_addfile_abs (zv, &zai); + //zfile_fopen_archive_recurse2 (zv, zn); + } + } + my_closedir (dir); + // zfile_fopen_archive_recurse (zv); + if (zv) + zvolume_addtolist (zv); + return zv; +} + struct zvolume *zfile_fopen_archive (const TCHAR *filename, int flags) { struct zvolume *zv = NULL; @@ -1977,6 +2853,58 @@ struct zvolume *zfile_fopen_archive (const TCHAR *filename) return zfile_fopen_archive (filename, ZFD_ALL); } +struct zvolume *zfile_fopen_archive_root (const TCHAR *filename, int flags) +{ + TCHAR path[MAX_DPATH], *p1, *p2, *lastp; + struct zvolume *zv = NULL; + //int last = 0; + int num, i; + + if (my_existsdir (filename)) + return zfile_fopen_directory (filename); + + num = 1; + lastp = NULL; + for (;;) { + _tcscpy (path, filename); + p1 = p2 = path; + for (i = 0; i < num; i++) { + while (*p1 != FSDB_DIR_SEPARATOR && *p1 != 0) + p1++; + if (*p1 == 0 && p1 == lastp) + return NULL; + if (i + 1 < num) + p1++; + } + *p1 = 0; + lastp = p1; + if (my_existsfile (p2)) + return zfile_fopen_archive (p2, flags); + num++; + } + +#if 0 + while (!last) { + while (*p1 != FSDB_DIR_SEPARATOR && *p1 != 0) + p1++; + if (*p1 == 0) + last = 1; + *p1 = 0; + if (!zv) { + zv = zfile_fopen_archive (p2); + if (!zv) + return NULL; + } else { + struct znode *zn = get_znode (zv, p2); + if (!zn) + return NULL; + } + p2 = p1 + 1; + } + return zv; +#endif +} + void zfile_fclose_archive(struct zvolume *zv) { struct znode *zn; @@ -2109,7 +3037,7 @@ int zfile_readdir_archive (struct zdirectory *zd, TCHAR *out, bool fullpath) return zd->cnt; if (fullpath) { _tcscpy (out, zd->parentpath); - _tcscat (out, _T("\\")); + _tcscat (out, FSDB_DIR_SEPARATOR_S); } _tcscat (out, zd->filenames[zd->offset]); zd->offset++; @@ -2157,17 +3085,17 @@ int zfile_fs_usage_archive(const TCHAR *path, const TCHAR *disk, struct fs_usage return 0; } -int zfile_stat_archive (const TCHAR *path, struct _stat64 *s) +int zfile_stat_archive (const TCHAR *path, struct mystat *s) { struct zvolume *zv = get_zvolume(path); struct znode *zn = get_znode (zv, path, TRUE); - memset (s, 0, sizeof (struct _stat64)); + memset (s, 0, sizeof (struct mystat)); if (!zn) return 0; - s->st_mode = zn->type == ZNODE_FILE ? 0 : FILEFLAG_DIR; - s->st_size = zn->size; - s->st_mtime = zn->mtime; + s->size = zn->size; + s->mtime.tv_sec = zn->mtime.tv_sec; + s->mtime.tv_usec = zn->mtime.tv_usec; return 1; } @@ -2254,3 +3182,28 @@ int zfile_convertimage (const TCHAR *src, const TCHAR *dst) } return ret; } + +#ifdef _CONSOLE +static TCHAR *zerror; +#define WRITE_LOG_BUF_SIZE 4096 +void zfile_seterror (const TCHAR *format, ...) +{ + int count; + if (!zerror) { + TCHAR buffer[WRITE_LOG_BUF_SIZE]; + va_list parms; + va_start (parms, format); + count = _vsntprintf (buffer, WRITE_LOG_BUF_SIZE - 1, format, parms); + zerror = my_strdup (buffer); + va_end (parms); + } +} +TCHAR *zfile_geterror (void) +{ + return zerror; +} +#else +void zfile_seterror (const TCHAR *format, ...) +{ +} +#endif diff --git a/src/zfile_archive.cpp b/src/zfile_archive.cpp index 31ae1147..93bbf35e 100644 --- a/src/zfile_archive.cpp +++ b/src/zfile_archive.cpp @@ -9,6 +9,11 @@ #include "sysconfig.h" #include "sysdeps.h" +#ifdef _WIN32 +#include +#include "win32.h" +#endif + #include "options.h" #include "zfile.h" #include "archivers/zip/unzip.h" @@ -19,6 +24,10 @@ #include +#define unpack_log write_log +#undef unpack_log +#define unpack_log + static time_t fromdostime(uae_u32 dd) { struct tm tm; @@ -42,25 +51,51 @@ static struct zvolume *getzvolume (struct znode *parent, struct zfile *zf, unsig switch (id) { +#ifdef A_ZIP case ArchiveFormatZIP: zv = archive_directory_zip (zf); break; +#endif +#ifdef A_7Z case ArchiveFormat7Zip: zv = archive_directory_7z (zf); break; +#endif +#ifdef A_RAR + case ArchiveFormatRAR: + zv = archive_directory_rar (zf); + break; +#endif +#ifdef A_LHA case ArchiveFormatLHA: zv = archive_directory_lha (zf); break; +#endif +#ifdef A_LZX case ArchiveFormatLZX: zv = archive_directory_lzx (zf); break; +#endif case ArchiveFormatPLAIN: zv = archive_directory_plain (zf); break; case ArchiveFormatADF: zv = archive_directory_adf (parent, zf); break; + case ArchiveFormatRDB: + zv = archive_directory_rdb (zf); + break; + case ArchiveFormatTAR: + zv = archive_directory_tar (zf); + break; + case ArchiveFormatFAT: + zv = archive_directory_fat (zf); + break; } +#ifdef ARCHIVEACCESS + if (!zv) + zv = archive_directory_arcacc (zf, id); +#endif return zv; } @@ -105,8 +140,10 @@ struct zfile *archive_access_select (struct znode *parent, struct zfile *zf, uns diskimg = zfile_is_diskimage (zn->fullname); if (isok) { if (tmphist[0]) { +#ifndef _CONSOLE if (diskimg >= 0&& canhistory) DISK_history_add (tmphist, -1, diskimg, 1); +#endif tmphist[0] = 0; first = 0; } @@ -115,8 +152,10 @@ struct zfile *archive_access_select (struct znode *parent, struct zfile *zf, uns _tcscpy (tmphist, zn->fullname); } else { _tcscpy (tmphist, zn->fullname); +#ifndef _CONSOLE if (diskimg >= 0&& canhistory) DISK_history_add (tmphist, -1, diskimg, 1); +#endif tmphist[0] = 0; } select = 0; @@ -163,9 +202,11 @@ struct zfile *archive_access_select (struct znode *parent, struct zfile *zf, uns zipcnt++; zn = zn->next; } +#ifndef _CONSOLE diskimg = zfile_is_diskimage (zfile_getname (zf)); if (diskimg >= 0 && first && tmphist[0] && canhistory) DISK_history_add (zfile_getname (zf), -1, diskimg, 1); +#endif zfile_fclose_archive (zv); if (z) { zfile_fclose(zf); @@ -180,6 +221,16 @@ struct zfile *archive_access_select (struct znode *parent, struct zfile *zf, uns return zf; } +struct zfile *archive_access_arcacc_select (struct zfile *zf, unsigned int id, int *retcode) +{ + if (zfile_needwrite (zf)) { + if (retcode) + *retcode = -1; + return NULL; + } + return zf; +} + void archive_access_scan (struct zfile *zf, zfile_callback zc, void *user, unsigned int id) { struct zvolume *zv; @@ -209,7 +260,85 @@ void archive_access_scan (struct zfile *zf, zfile_callback zc, void *user, unsig zfile_fclose_archive (zv); } +/* TAR */ + +static void archive_close_tar (void *handle) +{ +} + +struct zvolume *archive_directory_tar (struct zfile *z) +{ + struct zvolume *zv; + struct znode *zn; + + _tzset (); + zv = zvolume_alloc (z, ArchiveFormatTAR, NULL, NULL); + for (;;) { + uae_u8 block[512]; + char name[MAX_DPATH]; + int ustar = 0; + struct zarchive_info zai; + int valid = 1; + uae_u64 size; + + if (zfile_fread (block, 512, 1, z) != 1) + break; + if (block[0] == 0) + break; + + if (!memcmp (block + 257, "ustar ", 8)) + ustar = 1; + name[0] = 0; + if (ustar) + strcpy (name, (char*)block + 345); + strcat (name, (char*)block); + + if (name[0] == 0) + valid = 0; + if (block[156] != '0') + valid = 0; + if (ustar && (block[256] != 0 && block[256] != '0')) + valid = 0; + + size = _strtoui64 ((char*)block + 124, NULL, 8); + + if (valid) { + memset (&zai, 0, sizeof zai); + zai.name = au (name); + zai.size = size; + zai.tv.tv_sec = _strtoui64 ((char*)block + 136, NULL, 8); + zai.tv.tv_sec += _timezone; + if (_daylight) + zai.tv.tv_sec -= 1 * 60 * 60; + if (zai.name[_tcslen (zai.name) - 1] == '/') { + zn = zvolume_adddir_abs (zv, &zai); + } else { + zn = zvolume_addfile_abs (zv, &zai); + if (zn) + zn->offset = zfile_ftell (z); + } + xfree (zai.name); + } + zfile_fseek (z, (size + 511) & ~511, SEEK_CUR); + } + zv->method = ArchiveFormatTAR; + return zv; +} + +struct zfile *archive_access_tar (struct znode *zn) +{ +#if 0 + struct zfile *zf = zfile_fopen_empty (zn->volume->archive, zn->fullname, zn->size); + zfile_fseek (zn->volume->archive, zn->offset, SEEK_SET); + zfile_fwrite (zf->data, zn->size, 1, zn->volume->archive); + return zf; +#else + return zfile_fopen_parent (zn->volume->archive, zn->fullname, zn->offset, zn->size); +#endif +} + /* ZIP */ +#ifdef A_ZIP static void archive_close_zip (void *handle) { @@ -229,19 +358,26 @@ struct zvolume *archive_directory_zip (struct zfile *z) return 0; zv = zvolume_alloc(z, ArchiveFormatZIP, NULL, NULL); for (;;) { - char filename_inzip[MAX_DPATH]; + char filename_inzip2[MAX_DPATH]; TCHAR c; struct zarchive_info zai; time_t t; unsigned int dd; - err = unzGetCurrentFileInfo (uz, &file_info, filename_inzip, sizeof (filename_inzip), NULL, 0, NULL, 0); + TCHAR *filename_inzip; + + err = unzGetCurrentFileInfo (uz, &file_info, filename_inzip2, sizeof (filename_inzip2), NULL, 0, NULL, 0); if (err != UNZ_OK) return 0; + if (file_info.flag & (1 << 11)) { // UTF-8 encoded + filename_inzip = utf8u (filename_inzip2); + } else { + filename_inzip = au (filename_inzip2); + } dd = file_info.dosDate; t = fromdostime(dd); memset(&zai, 0, sizeof zai); zai.name = filename_inzip; - zai.t = t; + zai.tv.tv_sec = t; zai.flags = -1; c = filename_inzip[_tcslen(filename_inzip) - 1]; if (c != '/' && c != '\\') { @@ -255,6 +391,7 @@ struct zvolume *archive_directory_zip (struct zfile *z) filename_inzip[_tcslen (filename_inzip) - 1] = 0; zvolume_adddir_abs(zv, &zai); } + xfree (filename_inzip); err = unzGoToNextFile (uz); if (err != UNZ_OK) break; @@ -286,14 +423,14 @@ static struct zfile *archive_do_zip (struct znode *zn, struct zfile *z, int flag if (tmp[i] == '\\') tmp[i] = '/'; } - s = my_strdup (tmp); + s = ua (tmp); if (unzLocateFile (uz, s, 1) != UNZ_OK) { xfree (s); for (i = 0; tmp[i]; i++) { if (tmp[i] == '/') tmp[i] = '\\'; } - s = my_strdup (tmp); + s = ua (tmp); if (unzLocateFile (uz, s, 1) != UNZ_OK) { xfree (s); goto error; @@ -308,16 +445,22 @@ static struct zfile *archive_do_zip (struct znode *zn, struct zfile *z, int flag if (z) { int err = -1; if (!(flags & FILE_DELAYEDOPEN) || z->size <= PEEK_BYTES) { + unpack_log (_T("ZIP: unpacking %s, flags=%d\n"), name, flags); err = unzReadCurrentFile (uz, z->data, z->datasize); + unpack_log (_T("ZIP: unpacked, code=%d\n"), err); } else { z->archiveparent = zfile_dup (zn->volume->archive); if (z->archiveparent) { + unpack_log (_T("ZIP: delayed open '%s'\n"), name); xfree (z->archiveparent->name); z->archiveparent->name = my_strdup (tmp); z->datasize = PEEK_BYTES; err = unzReadCurrentFile (uz, z->data, z->datasize); + unpack_log (_T("ZIP: unpacked, code=%d\n"), err); } else { + unpack_log (_T("ZIP: unpacking %s (failed DELAYEDOPEN)\n"), name); err = unzReadCurrentFile (uz, z->data, z->datasize); + unpack_log (_T("ZIP: unpacked, code=%d\n"), err); } } } @@ -337,7 +480,9 @@ static struct zfile *archive_unpack_zip (struct zfile *zf) { return archive_do_zip (NULL, zf, 0); } +#endif +#ifdef A_7Z /* 7Z */ #include "archivers/7z/Types.h" @@ -404,10 +549,11 @@ struct SevenZContext UInt32 blockIndex; }; -static void archive_close_7z (struct SevenZContext *ctx) +static void archive_close_7z (void *ctx) { - SzArEx_Free (&ctx->db, &allocImp); - allocImp.Free (&allocImp, ctx->outBuffer); + struct SevenZContext *ctx7 = (struct SevenZContext*)ctx; + SzArEx_Free (&ctx7->db, &allocImp); + allocImp.Free (&allocImp, ctx7->outBuffer); xfree(ctx); } @@ -448,14 +594,13 @@ struct zvolume *archive_directory_7z (struct zfile *z) zai.name = name; zai.flags = -1; zai.size = f->Size; - zai.t = 0; if (f->MTimeDefined) { uae_u64 t = (((uae_u64)f->MTime.High) << 32) | f->MTime.Low; if (t >= EPOCH_DIFF) { - zai.t = (t - EPOCH_DIFF) / RATE_DIFF; - zai.t -= _timezone; + zai.tv.tv_sec = (t - EPOCH_DIFF) / RATE_DIFF; + zai.tv.tv_sec -= _timezone; if (_daylight) - zai.t += 1 * 60 * 60; + zai.tv.tv_sec += 1 * 60 * 60; } } if (!f->IsDir) { @@ -467,7 +612,7 @@ struct zvolume *archive_directory_7z (struct zfile *z) return zv; } -static struct zfile *archive_access_7z (struct znode *zn) +struct zfile *archive_access_7z (struct znode *zn) { SRes res; struct zvolume *zv = zn->volume; @@ -476,19 +621,378 @@ static struct zfile *archive_access_7z (struct znode *zn) size_t outSizeProcessed; struct SevenZContext *ctx; + z = zfile_fopen_empty (NULL, zn->fullname, zn->size); + if (!z) + return NULL; ctx = (struct SevenZContext *) zv->handle; res = SzAr_Extract (&ctx->db, &ctx->lookStream.s, zn->offset, &ctx->blockIndex, &ctx->outBuffer, &ctx->outBufferSize, &offset, &outSizeProcessed, &allocImp, &allocTempImp); if (res == SZ_OK) { - z = zfile_fopen_empty (NULL, zn->fullname, zn->size); zfile_fwrite (ctx->outBuffer + offset, zn->size, 1, z); } else { write_log(_T("7Z: SzExtract %s returned %d\n"), zn->fullname, res); + zfile_fclose (z); + z = NULL; } return z; } +#endif + +/* RAR */ +#ifdef A_RAR + +/* copy and paste job? you are only imagining it! */ +static struct zfile *rarunpackzf; /* stupid unrar.dll */ +#include +typedef HANDLE (_stdcall* RAROPENARCHIVEEX)(struct RAROpenArchiveDataEx*); +static RAROPENARCHIVEEX pRAROpenArchiveEx; +typedef int (_stdcall* RARREADHEADEREX)(HANDLE,struct RARHeaderDataEx*); +static RARREADHEADEREX pRARReadHeaderEx; +typedef int (_stdcall* RARPROCESSFILE)(HANDLE,int,char*,char*); +static RARPROCESSFILE pRARProcessFile; +typedef int (_stdcall* RARCLOSEARCHIVE)(HANDLE); +static RARCLOSEARCHIVE pRARCloseArchive; +typedef void (_stdcall* RARSETCALLBACK)(HANDLE,UNRARCALLBACK,LONG); +static RARSETCALLBACK pRARSetCallback; +typedef int (_stdcall* RARGETDLLVERSION)(void); +static RARGETDLLVERSION pRARGetDllVersion; + +static int canrar (void) +{ + static int israr; + + if (israr == 0) { + israr = -1; +#ifdef _WIN32 + { + HMODULE rarlib; + + rarlib = WIN32_LoadLibrary (_T("unrar.dll")); + if (rarlib) { + TCHAR tmp[MAX_DPATH]; + tmp[0] = 0; + GetModuleFileName (rarlib, tmp, sizeof tmp / sizeof (TCHAR)); + pRAROpenArchiveEx = (RAROPENARCHIVEEX)GetProcAddress (rarlib, "RAROpenArchiveEx"); + pRARReadHeaderEx = (RARREADHEADEREX)GetProcAddress (rarlib, "RARReadHeaderEx"); + pRARProcessFile = (RARPROCESSFILE)GetProcAddress (rarlib, "RARProcessFile"); + pRARCloseArchive = (RARCLOSEARCHIVE)GetProcAddress (rarlib, "RARCloseArchive"); + pRARSetCallback = (RARSETCALLBACK)GetProcAddress (rarlib, "RARSetCallback"); + pRARGetDllVersion = (RARGETDLLVERSION)GetProcAddress (rarlib, "RARGetDllVersion"); + if (pRAROpenArchiveEx && pRARReadHeaderEx && pRARProcessFile && pRARCloseArchive && pRARSetCallback) { + int version = -1; + israr = 1; + if (pRARGetDllVersion) + version = pRARGetDllVersion (); + write_log (_T("%s version %08X detected\n"), tmp, version); + if (version < 4) { + write_log (_T("Too old unrar.dll, must be at least version 4\n")); + israr = -1; + } + + } + } + } +#endif + } + return israr < 0 ? 0 : 1; +} + +static int CALLBACK RARCallbackProc (UINT msg,LONG UserData,LONG P1,LONG P2) +{ + if (msg == UCM_PROCESSDATA) { + zfile_fwrite ((uae_u8*)P1, 1, P2, rarunpackzf); + return 0; + } + return -1; +} + +struct RARContext +{ + struct RAROpenArchiveDataEx OpenArchiveData; + struct RARHeaderDataEx HeaderData; + HANDLE hArcData; +}; + +static void archive_close_rar (void *ctx) +{ + struct RARContext* rc = (struct RARContext*)ctx; + xfree (rc); +} + +struct zvolume *archive_directory_rar (struct zfile *z) +{ + struct zvolume *zv; + struct RARContext *rc; + struct zfile *zftmp; + int cnt; + + if (!canrar ()) + return archive_directory_arcacc (z, ArchiveFormatRAR); + if (z->data) + /* wtf? stupid unrar.dll only accept filename as an input.. */ + return archive_directory_arcacc (z, ArchiveFormatRAR); + rc = xcalloc (struct RARContext, 1); + zv = zvolume_alloc (z, ArchiveFormatRAR, rc, NULL); + rc->OpenArchiveData.ArcNameW = z->name; + rc->OpenArchiveData.OpenMode = RAR_OM_LIST; + rc->hArcData = pRAROpenArchiveEx (&rc->OpenArchiveData); + if (rc->OpenArchiveData.OpenResult != 0) { + zfile_fclose_archive (zv); + return archive_directory_arcacc (z, ArchiveFormatRAR); + } + pRARSetCallback (rc->hArcData, RARCallbackProc, 0); + cnt = 0; + while (pRARReadHeaderEx (rc->hArcData, &rc->HeaderData) == 0) { + struct zarchive_info zai; + struct znode *zn; + memset (&zai, 0, sizeof zai); + zai.name = rc->HeaderData.FileNameW; + zai.size = rc->HeaderData.UnpSize; + zai.flags = -1; + zai.tv.tv_sec = fromdostime (rc->HeaderData.FileTime); + zn = zvolume_addfile_abs (zv, &zai); + zn->offset = cnt++; + pRARProcessFile (rc->hArcData, RAR_SKIP, NULL, NULL); + } + pRARCloseArchive (rc->hArcData); + zftmp = zfile_fopen_empty (z, z->name, 0); + zv->archive = zftmp; + zv->method = ArchiveFormatRAR; + return zv; +} + +static struct zfile *archive_access_rar (struct znode *zn) +{ + struct RARContext *rc = (struct RARContext*)zn->volume->handle; + int i; + struct zfile *zf = NULL; + + if (zn->volume->method != ArchiveFormatRAR) + return archive_access_arcacc (zn); + rc->OpenArchiveData.OpenMode = RAR_OM_EXTRACT; + rc->hArcData = pRAROpenArchiveEx (&rc->OpenArchiveData); + if (rc->OpenArchiveData.OpenResult != 0) + return NULL; + pRARSetCallback (rc->hArcData, RARCallbackProc, 0); + for (i = 0; i <= zn->offset; i++) { + if (pRARReadHeaderEx (rc->hArcData, &rc->HeaderData)) + return NULL; + if (i < zn->offset) { + if (pRARProcessFile (rc->hArcData, RAR_SKIP, NULL, NULL)) + goto end; + } + } + zf = zfile_fopen_empty (zn->volume->archive, zn->fullname, zn->size); + if (zf) { + rarunpackzf = zf; + if (pRARProcessFile (rc->hArcData, RAR_TEST, NULL, NULL)) { + zfile_fclose (zf); + zf = NULL; + } + } +end: + pRARCloseArchive(rc->hArcData); + return zf; +} +#endif + + +/* ArchiveAccess */ + + +#if defined(ARCHIVEACCESS) + +struct aaFILETIME +{ + uae_u32 dwLowDateTime; + uae_u32 dwHighDateTime; +}; +typedef void* aaHandle; +// This struct contains file information from an archive. The caller may store +// this information for accessing this file after calls to findFirst, findNext +#define FileInArchiveInfoStringSize 1024 +struct aaFileInArchiveInfo { + int ArchiveHandle; // handle for Archive/class pointer + uae_u64 CompressedFileSize; + uae_u64 UncompressedFileSize; + uae_u32 attributes; + int IsDir; + struct aaFILETIME LastWriteTime; + char path[FileInArchiveInfoStringSize]; +}; + +typedef HRESULT (__stdcall *aaReadCallback)(int StreamID, uae_u64 offset, uae_u32 count, void* buf, uae_u32 *processedSize); +typedef HRESULT (__stdcall *aaWriteCallback)(int StreamID, uae_u64 offset, uae_u32 count, const void *buf, uae_u32 *processedSize); +typedef aaHandle (__stdcall *aapOpenArchive)(aaReadCallback function, int StreamID, uae_u64 FileSize, int ArchiveType, int *result, TCHAR *password); +typedef int (__stdcall *aapGetFileCount)(aaHandle ArchiveHandle); +typedef int (__stdcall *aapGetFileInfo)(aaHandle ArchiveHandle, int FileNum, struct aaFileInArchiveInfo *FileInfo); +typedef int (__stdcall *aapExtract)(aaHandle ArchiveHandle, int FileNum, int StreamID, aaWriteCallback WriteFunc, uae_u64 *written); +typedef int (__stdcall *aapCloseArchive)(aaHandle ArchiveHandle); + +static aapOpenArchive aaOpenArchive; +static aapGetFileCount aaGetFileCount; +static aapGetFileInfo aaGetFileInfo; +static aapExtract aaExtract; +static aapCloseArchive aaCloseArchive; + +#ifdef _WIN32 +static HMODULE arcacc_mod; + +static void arcacc_free (void) +{ + if (arcacc_mod) + FreeLibrary (arcacc_mod); + arcacc_mod = NULL; +} + +static int arcacc_init (struct zfile *zf) +{ + if (arcacc_mod) + return 1; + arcacc_mod = WIN32_LoadLibrary (_T("archiveaccess.dll")); + if (!arcacc_mod) { + write_log (_T("failed to open archiveaccess.dll ('%s')\n"), zfile_getname (zf)); + return 0; + } + aaOpenArchive = (aapOpenArchive) GetProcAddress (arcacc_mod, "aaOpenArchive"); + aaGetFileCount = (aapGetFileCount) GetProcAddress (arcacc_mod, "aaGetFileCount"); + aaGetFileInfo = (aapGetFileInfo) GetProcAddress (arcacc_mod, "aaGetFileInfo"); + aaExtract = (aapExtract) GetProcAddress (arcacc_mod, "aaExtract"); + aaCloseArchive = (aapCloseArchive) GetProcAddress (arcacc_mod, "aaCloseArchive"); + if (!aaOpenArchive || !aaGetFileCount || !aaGetFileInfo || !aaExtract || !aaCloseArchive) { + write_log (_T("Missing functions in archiveaccess.dll. Old version?\n")); + arcacc_free (); + return 0; + } + return 1; +} +#endif + +#define ARCACC_STACKSIZE 10 +static struct zfile *arcacc_stack[ARCACC_STACKSIZE]; +static int arcacc_stackptr = -1; + +static int arcacc_push (struct zfile *f) +{ + if (arcacc_stackptr == ARCACC_STACKSIZE - 1) + return -1; + arcacc_stackptr++; + arcacc_stack[arcacc_stackptr] = f; + return arcacc_stackptr; +} +static void arcacc_pop (void) +{ + arcacc_stackptr--; +} + +static HRESULT __stdcall readCallback (int StreamID, uae_u64 offset, uae_u32 count, void *buf, uae_u32 *processedSize) +{ + struct zfile *f = arcacc_stack[StreamID]; + int ret; + + zfile_fseek (f, (long)offset, SEEK_SET); + ret = zfile_fread (buf, 1, count, f); + if (processedSize) + *processedSize = ret; + return 0; +} +static HRESULT __stdcall writeCallback (int StreamID, uae_u64 offset, uae_u32 count, const void *buf, uae_u32 *processedSize) +{ + struct zfile *f = arcacc_stack[StreamID]; + int ret; + + ret = zfile_fwrite ((void*)buf, 1, count, f); + if (processedSize) + *processedSize = ret; + if (ret != count) + return -1; + return 0; +} + +struct zvolume *archive_directory_arcacc (struct zfile *z, unsigned int id) +{ + aaHandle ah; + int id_r, status; + int fc, f; + struct zvolume *zv; + int skipsize = 0; + + if (!arcacc_init (z)) + return NULL; + zv = zvolume_alloc (z, ArchiveFormatAA, NULL, NULL); + id_r = arcacc_push (z); + ah = aaOpenArchive (readCallback, id_r, zv->archivesize, id, &status, NULL); + if (!status) { + zv->handle = ah; + fc = aaGetFileCount (ah); + for (f = 0; f < fc; f++) { + struct aaFileInArchiveInfo fi; + TCHAR *name; + struct znode *zn; + struct zarchive_info zai; + + memset (&fi, 0, sizeof (fi)); + aaGetFileInfo (ah, f, &fi); + if (fi.IsDir) + continue; + + name = au (fi.path); + memset (&zai, 0, sizeof zai); + zai.name = name; + zai.flags = -1; + zai.size = (unsigned int)fi.UncompressedFileSize; + zn = zvolume_addfile_abs (zv, &zai); + xfree (name); + zn->offset = f; + zn->method = id; + + if (id == ArchiveFormat7Zip) { + if (fi.CompressedFileSize) + skipsize = 0; + skipsize += (int)fi.UncompressedFileSize; + } + } + aaCloseArchive (ah); + } + arcacc_pop (); + zv->method = ArchiveFormatAA; + return zv; +} + + +static struct zfile *archive_access_arcacc (struct znode *zn) +{ + struct zfile *zf; + struct zfile *z = zn->volume->archive; + int status, id_r, id_w; + aaHandle ah; + int ok = 0; + + id_r = arcacc_push (z); + ah = aaOpenArchive (readCallback, id_r, zn->volume->archivesize, zn->method, &status, NULL); + if (!status) { + int err; + uae_u64 written = 0; + struct aaFileInArchiveInfo fi; + memset (&fi, 0, sizeof (fi)); + aaGetFileInfo (ah, zn->offset, &fi); + zf = zfile_fopen_empty (z, zn->fullname, zn->size); + id_w = arcacc_push (zf); + err = aaExtract(ah, zn->offset, id_w, writeCallback, &written); + if (zf->seek == fi.UncompressedFileSize) + ok = 1; + arcacc_pop(); + } + aaCloseArchive(ah); + arcacc_pop(); + if (ok) + return zf; + zfile_fclose(zf); + return NULL; +} +#endif /* plain single file */ @@ -499,6 +1003,8 @@ static struct znode *addfile (struct zvolume *zv, struct zfile *zf, const TCHAR struct zfile *z; z = zfile_fopen_empty (zf, path, size); + if (!z) + return NULL; zfile_fwrite(data, size, 1, z); memset(&zai, 0, sizeof zai); zai.name = my_strdup (path); @@ -535,10 +1041,12 @@ struct zvolume *archive_directory_plain (struct zfile *z) zfile_fseek(z, 0, SEEK_SET); zn = zvolume_addfile_abs(zv, &zai); if (!memcmp (id, exeheader, sizeof id)) { - char *data = xmalloc(char, 1 + _tcslen(zai.name) + 1 + 1 + 1); - sprintf (data, "\"%s\"\n", zai.name); + char *an = ua (zai.name); + char *data = xmalloc (char, 1 + strlen (an) + 1 + 1 + 1); + sprintf (data, "\"%s\"\n", an); zn = addfile (zv, z, _T("s/startup-sequence"), (uae_u8*)data, strlen (data)); xfree(data); + xfree (an); } index = 0; for (;;) { @@ -629,7 +1137,7 @@ static TCHAR *getBSTR (uae_u8 *bstr) for (i = 0; i < n; i++) buf[i] = *bstr++; buf[i] = 0; - return my_strdup((char *)buf); + return au (buf); } static uae_u32 gl (struct adfhandle *adf, int off) @@ -722,7 +1230,7 @@ static void recurseadf (struct znode *zn, int root, TCHAR *name) size = 0; zai.size = size; zai.flags = gl (adf, bs - 48 * 4); - zai.t = put_time (gl (adf, bs - 23 * 4), gl (adf, bs - 22 * 4),gl (adf, bs - 21 * 4)); + amiga_to_timeval (&zai.tv, gl (adf, bs - 23 * 4), gl (adf, bs - 22 * 4),gl (adf, bs - 21 * 4)); if (secondary == -3) { struct znode *znnew = zvolume_addfile_abs (zv, &zai); znnew->offset = block; @@ -762,7 +1270,7 @@ static void recursesfs (struct znode *zn, int root, TCHAR *name, int sfs2) memset (&zai, 0, sizeof zai); zai.flags = glx (p + 8) ^ 0x0f; s = p + (sfs2 ? 27 : 25); - fname = my_strdup ((char *)s); + fname = au ((char*)s); i = 0; while (*s) { s++; @@ -771,7 +1279,7 @@ static void recursesfs (struct znode *zn, int root, TCHAR *name, int sfs2) s++; i++; if (*s) - zai.comment = my_strdup ((char *)s); + zai.comment = au ((char*)s); while (*s) { s++; i++; @@ -790,9 +1298,9 @@ static void recursesfs (struct znode *zn, int root, TCHAR *name, int sfs2) _tcscat (name2, fname); zai.name = name2; if (sfs2) - zai.t = glx (p + 22) - diff2; + zai.tv.tv_sec = glx (p + 22) - diff2; else - zai.t = glx (p + 20) - diff; + zai.tv.tv_sec = glx (p + 20) - diff; if (p[sfs2 ? 26 : 24] & 0x80) { // dir struct znode *znnew = zvolume_adddir_abs (zv, &zai); int newblock = glx (p + 16); @@ -1126,35 +1634,475 @@ static void archive_close_adf (void *v) xfree (adf); } +static int rl (uae_u8 *p) +{ + return (p[0] << 24) | (p[1] << 16) | (p[2] << 8) | (p[3]); +} +static TCHAR *tochar (uae_u8 *s, int len) +{ + int i, j; + uae_char tmp[256]; + j = 0; + for (i = 0; i < len; i++) { + uae_char c = *s++; + if (c >= 0 && c <= 9) { + tmp[j++] = FSDB_DIR_SEPARATOR; + tmp[j++] = '0' + c; + } else if (c < ' ' || c > 'z') { + tmp[j++] = '.'; + } else { + tmp[j++] = c; + } + tmp[j] = 0; + } + return au (tmp); +} + +struct zvolume *archive_directory_rdb (struct zfile *z) +{ + uae_u8 buf[512] = { 0 }; + int partnum, bs; + TCHAR *devname; + struct zvolume *zv; + struct zarchive_info zai; + uae_u8 *p; + struct znode *zn; + + zv = zvolume_alloc (z, ArchiveFormatRDB, NULL, NULL); + + zfile_fseek (z, 0, SEEK_SET); + zfile_fread (buf, 1, 512, z); + + partnum = 0; + for (;;) { + int partblock; + TCHAR tmp[MAX_DPATH]; + int surf, spt, spb, lowcyl, highcyl, reserved; + int size, block, blocksize, rootblock; + TCHAR comment[81], *dos; + + if (partnum == 0) + partblock = rl (buf + 28); + else + partblock = rl (buf + 4 * 4); + partnum++; + if (partblock <= 0) + break; + zfile_fseek (z, partblock * 512, SEEK_SET); + zfile_fread (buf, 1, 512, z); + if (memcmp (buf, "PART", 4)) + break; + + p = buf + 128 - 16; + surf = rl (p + 28); + spb = rl (p + 32); + spt = rl (p + 36); + reserved = rl (p + 40); + lowcyl = rl (p + 52); + highcyl = rl (p + 56); + blocksize = rl (p + 20) * 4 * spb; + block = lowcyl * surf * spt; + + size = (highcyl - lowcyl + 1) * surf * spt; + size *= blocksize; + + dos = tochar (buf + 192, 4); + + if (!memcmp (dos, _T("DOS"), 3)) + rootblock = ((size / blocksize) - 1 + 2) / 2; + else + rootblock = 0; + + devname = getBSTR (buf + 36); + _stprintf (tmp, _T("%s.hdf"), devname); + memset (&zai, 0, sizeof zai); + _stprintf (comment, _T("FS=%s LO=%d HI=%d HEADS=%d SPT=%d RES=%d BLOCK=%d ROOT=%d"), + dos, lowcyl, highcyl, surf, spt, reserved, blocksize, rootblock); + zai.comment = comment; + xfree (dos); + zai.name = tmp; + zai.size = size; + zai.flags = -1; + zn = zvolume_addfile_abs (zv, &zai); + zn->offset = partblock; + zn->offset2 = blocksize; // abuse of offset2.. + } + + zfile_fseek (z, 0, SEEK_SET); + p = buf; + zfile_fread (buf, 1, 512, z); + zai.name = _T("rdb_dump.dat"); + bs = rl (p + 16); + zai.size = rl (p + 140) * bs; + zai.comment = NULL; + zn = zvolume_addfile_abs (zv, &zai); + zn->offset = 0; + + zv->method = ArchiveFormatRDB; + return zv; +} + +static struct zfile *archive_access_rdb (struct znode *zn) +{ + struct zfile *z = zn->volume->archive; + struct zfile *zf; + uae_u8 buf[512] = { 0 }; + int surf, spb, spt, lowcyl, highcyl; + int size, block, blocksize; + uae_u8 *p; + + if (zn->offset) { + zfile_fseek (z, zn->offset * 512, SEEK_SET); + zfile_fread (buf, 1, 512, z); + + p = buf + 128 - 16; + surf = rl (p + 28); + spb = rl (p + 32); + spt = rl (p + 36); + lowcyl = rl (p + 52); + highcyl = rl (p + 56); + blocksize = rl (p + 20) * 4; + block = lowcyl * surf * spt; + + size = (highcyl - lowcyl + 1) * surf * spt; + size *= blocksize; + } else { + zfile_fseek (z, 0, SEEK_SET); + zfile_fread (buf, 1, 512, z); + p = buf; + blocksize = rl (p + 16); + block = 0; + size = zn->size; + } + + zf = zfile_fopen_parent (z, zn->fullname, block * blocksize, size); + return zf; +} + +int isfat (uae_u8 *p) +{ + int i, b; + + if ((p[0x15] & 0xf0) != 0xf0) + return 0; + if (p[0x0b] != 0x00 || p[0x0c] != 0x02) + return 0; + b = 0; + for (i = 0; i < 8; i++) { + if (p[0x0d] & (1 << i)) + b++; + } + if (b != 1) + return 0; + if (p[0x0f] != 0) + return 0; + if (p[0x0e] > 8 || p[0x0e] == 0) + return 0; + if (p[0x10] == 0 || p[0x10] > 8) + return 0; + b = (p[0x12] << 8) | p[0x11]; + if (b > 8192 || b <= 0) + return 0; + b = p[0x16] | (p[0x17] << 8); + if (b == 0 || b > 8192) + return 0; + return 1; +} + +/* +* The epoch of FAT timestamp is 1980. +* : bits : value +* date: 0 - 4: day (1 - 31) +* date: 5 - 8: month (1 - 12) +* date: 9 - 15: year (0 - 127) from 1980 +* time: 0 - 4: sec (0 - 29) 2sec counts +* time: 5 - 10: min (0 - 59) +* time: 11 - 15: hour (0 - 23) +*/ +#define SECS_PER_MIN 60 +#define SECS_PER_HOUR (60 * 60) +#define SECS_PER_DAY (SECS_PER_HOUR * 24) +#define UNIX_SECS_1980 315532800L +#if BITS_PER_LONG == 64 +#define UNIX_SECS_2108 4354819200L +#endif +/* days between 1.1.70 and 1.1.80 (2 leap days) */ +#define DAYS_DELTA (365 * 10 + 2) +/* 120 (2100 - 1980) isn't leap year */ +#define YEAR_2100 120 +#define IS_LEAP_YEAR(y) (!((y) & 3) && (y) != YEAR_2100) + +/* Linear day numbers of the respective 1sts in non-leap years. */ +static time_t days_in_year[] = { + /* Jan Feb Mar Apr May Jun Jul Aug Sep Oct Nov Dec */ + 0, 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334, 0, 0, 0, +}; + +/* Convert a FAT time/date pair to a UNIX date (seconds since 1 1 70). */ +static time_t fat_time_fat2unix (uae_u16 time, uae_u16 date, int fat12) +{ + time_t second, day, leap_day, month, year; + + if (0 && fat12) { + year = date & 0x7f; + month = (date >> 7) & 0x0f; + day = (date >> 11); + } else { + year = date >> 9; + month = max(1, (date >> 5) & 0xf); + day = max(1, date & 0x1f) - 1; + } + + leap_day = (year + 3) / 4; + if (year > YEAR_2100) /* 2100 isn't leap year */ + leap_day--; + if (IS_LEAP_YEAR(year) && month > 2) + leap_day++; + + second = (time & 0x1f) << 1; + second += ((time >> 5) & 0x3f) * SECS_PER_MIN; + second += (time >> 11) * SECS_PER_HOUR; + second += (year * 365 + leap_day + + days_in_year[month] + day + + DAYS_DELTA) * SECS_PER_DAY; + return second; +} + +static int getcluster (struct zfile *z, int cluster, int fatstart, int fatbits) +{ + uae_u32 fat = 0; + uae_u8 p[4]; + int offset = cluster * fatbits; + zfile_fseek (z, fatstart * 512 + offset / 8, SEEK_SET); + if (fatbits == 12) { + zfile_fread (p, 2, 1, z); + if ((offset & 4)) + fat = ((p[0] & 0xf0) >> 4) | (p[1] << 4); + else + fat = (p[0]) | ((p[1] & 0x0f) << 8); + if (fat >= 0xff0) + return -1; + } else if (fatbits == 16) { + zfile_fread (p, 2, 1, z); + fat = p[0] | (p[1] << 8); + if (fat >= 0xfff0) + return -1; + } else if (fatbits == 32) { + zfile_fread (p, 4, 1, z); + fat = p[0] | (p[1] << 8) | (p[2] << 16) | (p[3] << 24); + fat &= ~0x0fffffff; + if (fat >= 0x0ffffff0) + return -1; + } + return fat; +} + +static void fatdirectory (struct zfile *z, struct zvolume *zv, TCHAR *name, int startblock, int entries, int sectorspercluster, int fatstart, int dataregion, int fatbits) +{ + struct zarchive_info zai; + struct znode *znnew; + int i, j; + + for (i = 0; i < entries; i++) { + TCHAR name2[MAX_DPATH], *fname; + uae_s64 size; + uae_u8 fatname[16]; + uae_u8 buf[32]; + int attr, cnt, ext; + int startcluster; + + memset (buf, 0, sizeof buf); + memset (&zai, 0, sizeof zai); + zfile_fseek (z, startblock * 512 + i * 32, SEEK_SET); + zfile_fread (buf, 32, 1, z); + if (buf[0] == 0) + break; + if (buf[0] == 0xe5) + continue; + if (buf[0] == 0x05) + buf[0] = 0xe5; + size = buf[0x1c] | (buf[0x1d] << 8) | (buf[0x1e] << 16) | (buf[0x1f] << 24); + attr = buf[0x0b]; + startcluster = buf[0x1a] | (buf[0x1b] << 8); + if ((attr & (0x4 | 0x2)) == 0x06) // system+hidden + continue; + if (attr & 8) // disk name + continue; + if (attr & 1) // read-only + zai.flags |= 1 << 3; + if (!(attr & 32)) // archive + zai.flags |= 1 << 4; + + cnt = 0; + ext = 0; + for (j = 0; j < 8 && buf[j] != 0x20 && buf[j] != 0; j++) + fatname[cnt++] = buf[j]; + for (j = 0; j < 3 && buf[8 + j] != 0x20 && buf[8 + j] != 0; j++) { + if (ext == 0) + fatname[cnt++] = '.'; + ext = 1; + fatname[cnt++] = buf[8 + j]; + } + fatname[cnt] = 0; + + fname = au ((char*)fatname); + name2[0] = 0; + if (name[0]) { + TCHAR sep[] = { FSDB_DIR_SEPARATOR, 0 }; + _tcscpy (name2, name); + _tcscat (name2, sep); + } + _tcscat (name2, fname); + + zai.name = name2; + zai.tv.tv_sec = fat_time_fat2unix (buf[0x16] | (buf[0x17] << 8), buf[0x18] | (buf[0x19] << 8), 1); + if (attr & (16 | 8)) { + int nextblock, cluster; + nextblock = dataregion + (startcluster - 2) * sectorspercluster; + cluster = getcluster (z, startcluster, fatstart, fatbits); + if ((cluster < 0 || cluster >= 3) && nextblock != startblock) { + znnew = zvolume_adddir_abs (zv, &zai); + fatdirectory (z, zv, name2, nextblock, sectorspercluster * 512 / 32, sectorspercluster, fatstart, dataregion, fatbits); + while (cluster >= 3) { + nextblock = dataregion + (cluster - 2) * sectorspercluster; + fatdirectory (z, zv, name2, nextblock, sectorspercluster * 512 / 32, sectorspercluster, fatstart, dataregion, fatbits); + cluster = getcluster (z, cluster, fatstart, fatbits); + } + } + } else { + zai.size = size; + znnew = zvolume_addfile_abs (zv, &zai); + znnew->offset = startcluster; + } + + xfree (fname); + } +} + +struct zvolume *archive_directory_fat (struct zfile *z) +{ + uae_u8 buf[512] = { 0 }; + int fatbits = 12; + struct zvolume *zv; + int rootdir, reserved, sectorspercluster; + int numfats, sectorsperfat, rootentries; + int dataregion; + + zfile_fseek (z, 0, SEEK_SET); + zfile_fread (buf, 1, 512, z); + + if (!isfat (buf)) + return NULL; + reserved = buf[0x0e] | (buf[0x0f] << 8); + numfats = buf[0x10]; + sectorsperfat = buf[0x16] | (buf[0x17] << 8); + rootentries = buf[0x11] | (buf[0x12] << 8); + sectorspercluster = buf[0x0d]; + rootdir = reserved + numfats * sectorsperfat; + dataregion = rootdir + rootentries * 32 / 512; + + zv = zvolume_alloc (z, ArchiveFormatFAT, NULL, NULL); + fatdirectory (z, zv, _T(""), rootdir, rootentries, sectorspercluster, reserved, dataregion, fatbits); + zv->method = ArchiveFormatFAT; + return zv; +} + +static struct zfile *archive_access_fat (struct znode *zn) +{ + uae_u8 buf[512] = { 0 }; + int fatbits = 12; + int size = zn->size; + struct zfile *sz, *dz; + int rootdir, reserved, sectorspercluster; + int numfats, sectorsperfat, rootentries; + int dataregion; + int offset, cluster; + + sz = zn->volume->archive; + + zfile_fseek (sz, 0, SEEK_SET); + zfile_fread (buf, 1, 512, sz); + + if (!isfat (buf)) + return NULL; + reserved = buf[0x0e] | (buf[0x0f] << 8); + numfats = buf[0x10]; + sectorsperfat = buf[0x16] | (buf[0x17] << 8); + rootentries = buf[0x11] | (buf[0x12] << 8); + sectorspercluster = buf[0x0d]; + rootdir = reserved + numfats * sectorsperfat; + dataregion = rootdir + rootentries * 32 / 512; + + dz = zfile_fopen_empty (sz, zn->fullname, size); + if (!dz) + return NULL; + + offset = 0; + cluster = zn->offset; + while (size && cluster >= 2) { + int left = size > sectorspercluster * 512 ? sectorspercluster * 512 : size; + int sector = dataregion + (cluster - 2) * sectorspercluster; + zfile_fseek (sz, sector * 512, SEEK_SET); + zfile_fread (dz->data + offset, 1, left, sz); + size -= left; + offset += left; + cluster = getcluster (sz, cluster, reserved, fatbits); + } + + return dz; +} + void archive_access_close (void *handle, unsigned int id) { switch (id) { +#ifdef A_ZIP case ArchiveFormatZIP: archive_close_zip(handle); break; +#endif +#ifdef A_7Z case ArchiveFormat7Zip: - archive_close_7z((struct SevenZContext *)handle); + archive_close_7z(handle); break; +#endif +#ifdef A_RAR + case ArchiveFormatRAR: + archive_close_rar (handle); + break; +#endif +#ifdef A_LHA case ArchiveFormatLHA: break; +#endif case ArchiveFormatADF: archive_close_adf (handle); break; + case ArchiveFormatTAR: + archive_close_tar (handle); + break; } } +static struct zfile *archive_access_dir (struct znode *zn) +{ + return zfile_fopen (zn->fullname, _T("rb"), 0); +} + struct zfile *archive_unpackzfile (struct zfile *zf) { struct zfile *zout = NULL; if (!zf->archiveparent) return NULL; + unpack_log (_T("delayed unpack '%s'\n"), zf->name); zf->datasize = zf->size; switch (zf->archiveid) { +#ifdef A_ZIP case ArchiveFormatZIP: zout = archive_unpack_zip (zf); break; +#endif } zfile_fclose (zf->archiveparent); zf->archiveparent = NULL; @@ -1167,24 +2115,49 @@ struct zfile *archive_getzfile (struct znode *zn, unsigned int id, int flags) struct zfile *zf = NULL; switch (id) { +#ifdef A_ZIP case ArchiveFormatZIP: zf = archive_access_zip (zn, flags); break; +#endif +#ifdef A_7Z case ArchiveFormat7Zip: zf = archive_access_7z (zn); break; +#endif +#ifdef A_RAR + case ArchiveFormatRAR: + zf = archive_access_rar (zn); + break; +#endif +#ifdef A_LHA case ArchiveFormatLHA: zf = archive_access_lha (zn); break; +#endif +#ifdef A_LZX case ArchiveFormatLZX: zf = archive_access_lzx (zn); break; +#endif case ArchiveFormatPLAIN: zf = archive_access_plain (zn); break; case ArchiveFormatADF: zf = archive_access_adf (zn); + break; + case ArchiveFormatRDB: + zf = archive_access_rdb (zn); break; + case ArchiveFormatFAT: + zf = archive_access_fat (zn); + break; + case ArchiveFormatDIR: + zf = archive_access_dir (zn); + break; + case ArchiveFormatTAR: + zf = archive_access_tar (zn); + break; } if (zf) zf->archiveid = id;