Align with latest TomB version 1.0.2 released in 27-oct

src/jit/compemu.h

@@ -0,0 +1,432 @@
+/*
+ * compiler/compemu.h - Public interface and definitions
+ *
+ * Copyright (c) 2001-2004 Milan Jurik of ARAnyM dev team (see AUTHORS)
+ * 
+ * Inspired by Christian Bauer's Basilisk II
+ *
+ * This file is part of the ARAnyM project which builds a new and powerful
+ * TOS/FreeMiNT compatible virtual machine running on almost any hardware.
+ *
+ * JIT compiler m68k -> IA-32 and AMD64
+ *
+ * Original 68040 JIT compiler for UAE, copyright 2000-2002 Bernd Meyer
+ * Adaptation for Basilisk II and improvements, copyright 2000-2004 Gwenole Beauchesne
+ * Portions related to CPU detection come from linux/arch/i386/kernel/setup.c
+ *
+ * ARAnyM is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * ARAnyM is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with ARAnyM; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+typedef uae_u32 uintptr;
+
+#define panicbug printf
+
+/* (gb) When on, this option can save save up to 30% compilation time
+ *  when many lazy flushes occur (e.g. apps in MacOS 8.x).
+ */
+#define USE_SEPARATE_BIA 1
+
+/* Use chain of checksum_info_t to compute the block checksum */
+#define USE_CHECKSUM_INFO 1
+
+/* Use code inlining, aka follow-up of constant jumps */
+#define USE_INLINING 1
+
+/* Inlining requires the chained checksuming information */
+#if USE_INLINING
+#undef  USE_CHECKSUM_INFO
+#define USE_CHECKSUM_INFO 1
+#endif
+
+/* Flags for Bernie during development/debugging. Should go away eventually */
+#define DISTRUST_CONSISTENT_MEM 0
+#define TAGMASK 0x000fffff
+#define TAGSIZE (TAGMASK+1)
+#define MAXRUN 1024
+
+extern uae_u8* start_pc_p;
+extern uae_u32 start_pc;
+
+#define cacheline(x) (((uae_u32)x)&TAGMASK)
+
+typedef struct {
+  uae_u16* location;
+  uae_u8  cycles;
+  uae_u8  specmem;
+  uae_u8  dummy2;
+  uae_u8  dummy3;
+} cpu_history;
+
+struct blockinfo_t;
+
+typedef union {
+    cpuop_func* handler;
+    struct blockinfo_t* bi;
+} cacheline;
+
+extern signed long pissoff;
+
+#define USE_ALIAS 1
+#define USE_F_ALIAS 1
+#define USE_OFFSET 0
+#define COMP_DEBUG 0
+
+#if COMP_DEBUG
+#define Dif(x) if (x)
+#else
+#define Dif(x) if (0)
+#endif
+
+#define SCALE 2
+#define MAXCYCLES (1000 * CYCLE_UNIT)
+
+#define BYTES_PER_INST 10240  /* paranoid ;-) */
+#if defined(CPU_arm)
+#define LONGEST_68K_INST 256 /* The number of bytes the longest possible
+			       68k instruction takes */
+#else
+#define LONGEST_68K_INST 16 /* The number of bytes the longest possible
+			       68k instruction takes */
+#endif
+#define MAX_CHECKSUM_LEN 2048 /* The maximum size we calculate checksums
+				 for. Anything larger will be flushed
+				 unconditionally even with SOFT_FLUSH */
+#define MAX_HOLD_BI 3  /* One for the current block, and up to two
+			  for jump targets */
+
+#define INDIVIDUAL_INST 0
+#if 1
+// gb-- my format from readcpu.cpp is not the same
+#define FLAG_X    0x0010
+#define FLAG_N    0x0008
+#define FLAG_Z    0x0004
+#define FLAG_V    0x0002
+#define FLAG_C    0x0001
+#else
+#define FLAG_C    0x0010
+#define FLAG_V    0x0008
+#define FLAG_Z    0x0004
+#define FLAG_N    0x0002
+#define FLAG_X    0x0001
+#endif
+#define FLAG_CZNV (FLAG_C | FLAG_Z | FLAG_N | FLAG_V)
+#define FLAG_ZNV  (FLAG_Z | FLAG_N | FLAG_V)
+
+#define KILLTHERAT 1  /* Set to 1 to avoid some partial_rat_stalls */
+
+#if defined(CPU_arm)
+#define USE_DATA_BUFFER
+#define ALIGN_NOT_NEEDED
+# define N_REGS 13  /* really 16, but 13 to 15 are SP, LR, PC */
+#else
+#define N_REGS 8  /* really only 7, but they are numbered 0,1,2,3,5,6,7 */
+#endif
+#define N_FREGS 6 /* That leaves us two positions on the stack to play with */
+
+/* Functions exposed to newcpu, or to what was moved from newcpu.c to
+ * compemu_support.c */
+extern void compiler_init(void);
+extern void compiler_exit(void);
+extern void init_comp(void);
+extern void flush(int save_regs);
+extern void small_flush(int save_regs);
+extern void set_target(uae_u8* t);
+extern uae_u8* get_target(void);
+extern void freescratch(void);
+extern void build_comp(void);
+extern void set_cache_state(int enabled);
+extern int get_cache_state(void);
+extern uae_u32 get_jitted_size(void);
+#ifdef JIT
+extern void (*flush_icache)(int n);
+#endif
+extern void alloc_cache(void);
+extern void compile_block(cpu_history* pc_hist, int blocklen, int totcyles);
+extern int check_for_cache_miss(void);
+
+#define scaled_cycles(x) (currprefs.m68k_speed==-1?(((x)/SCALE)?(((x)/SCALE<MAXCYCLES?((x)/SCALE):MAXCYCLES)):1):(x))
+
+extern uae_u32 needed_flags;
+extern cacheline cache_tags[];
+extern uae_u8* comp_pc_p;
+extern void* pushall_call_handler;
+
+#define VREGS 32
+#ifdef USE_JIT_FPU
+#define VFREGS 16
+#endif
+
+#define INMEM 1
+#define CLEAN 2
+#define DIRTY 3
+#define UNDEF 4
+#define ISCONST 5
+
+typedef struct {
+  uae_u32* mem;
+  uae_u32 val;
+  uae_u8 status;
+  uae_s8 realreg; /* gb-- realreg can hold -1 */
+  uae_u8 realind; /* The index in the holds[] array */
+  uae_u8 needflush;
+  uae_u8 validsize;
+  uae_u8 dirtysize;
+  uae_u8 dummy;
+} reg_status;
+
+#ifdef USE_JIT_FPU
+typedef struct {
+  uae_u32* mem;
+  double val;
+  uae_u8 status;
+  uae_s8 realreg; /* gb-- realreg can hold -1 */
+  uae_u8 realind;
+  uae_u8 needflush;
+} freg_status;
+#endif
+
+typedef struct {
+    uae_u8 use_flags;
+    uae_u8 set_flags;
+    uae_u8 is_addx;
+	  uae_u8 cflow;
+} op_properties;
+
+extern op_properties prop[65536];
+
+STATIC_INLINE int end_block(uae_u16 opcode)
+{
+	return (prop[opcode].cflow & fl_end_block);
+}
+
+#define PC_P 16
+#define FLAGX 17
+#define FLAGTMP 18
+#define NEXT_HANDLER 19
+#define S1 20
+#define S2 21
+#define S3 22
+#define S4 23
+#define S5 24
+#define S6 25
+#define S7 26
+#define S8 27
+#define S9 28
+#define S10 29
+#define S11 30
+#define S12 31
+
+#define FP_RESULT 8
+#define FS1 9
+#define FS2 10
+#define FS3 11
+
+typedef struct {
+  uae_u32 touched;
+  uae_s8 holds[VREGS];
+  uae_u8 nholds;
+  uae_u8 canbyte;
+  uae_u8 canword;
+  uae_u8 locked;
+} n_status;
+
+#ifdef USE_JIT_FPU
+typedef struct {
+  uae_u32 touched;
+  uae_s8 holds[VFREGS];
+  uae_u8 nholds;
+  uae_u8 locked;
+} fn_status;
+#endif
+
+/* For flag handling */
+#define NADA 1
+#define TRASH 2
+#define VALID 3
+
+/* needflush values */
+#define NF_SCRATCH   0
+#define NF_TOMEM     1
+#define NF_HANDLER   2
+
+typedef struct {
+    /* Integer part */
+    reg_status state[VREGS];
+    n_status   nat[N_REGS];
+    uae_u32 flags_on_stack;
+    uae_u32 flags_in_flags;
+    uae_u32 flags_are_important;
+#ifdef USE_JIT_FPU
+    /* FPU part */
+    freg_status fate[VFREGS];
+    fn_status   fat[N_FREGS];
+#endif
+} bigstate;
+
+typedef struct {
+    /* Integer part */
+  uae_s8 virt[VREGS];
+  uae_s8 nat[N_REGS];
+} smallstate;
+
+extern bigstate live;
+extern int touchcnt;
+
+
+#define IMM uae_s32
+#define RR1 uae_u32
+#define RR2 uae_u32
+#define RR4 uae_u32
+#define W1  uae_u32
+#define W2  uae_u32
+#define W4  uae_u32
+#define RW1 uae_u32
+#define RW2 uae_u32
+#define RW4 uae_u32
+#define MEMR uae_u32
+#define MEMW uae_u32
+#define MEMRW uae_u32
+
+#define FW   uae_u32
+#define FR   uae_u32
+#define FRW  uae_u32
+
+#define MIDFUNC(nargs,func,args) void func args
+#define MENDFUNC(nargs,func,args)
+#define COMPCALL(func) func
+
+#define LOWFUNC(flags,mem,nargs,func,args) STATIC_INLINE void func args
+#define LENDFUNC(flags,mem,nargs,func,args)
+
+/* What we expose to the outside */
+#define DECLARE_MIDFUNC(func) extern void func
+
+#if defined(CPU_arm)
+#include "compemu_midfunc_arm.h"
+#else
+#include "compemu_midfunc_x86.h"
+#endif
+
+#undef DECLARE_MIDFUNC
+
+extern int failure;
+#define FAIL(x) do { failure|=x; } while (0)
+
+/* Convenience functions exposed to gencomp */
+extern uae_u32 m68k_pc_offset;
+extern void readbyte(int address, int dest, int tmp);
+extern void readword(int address, int dest, int tmp);
+extern void readlong(int address, int dest, int tmp);
+extern void writebyte(int address, int source, int tmp);
+extern void writeword(int address, int source, int tmp);
+extern void writelong(int address, int source, int tmp);
+extern void writelong_clobber(int address, int source, int tmp);
+extern void get_n_addr(int address, int dest, int tmp);
+extern void get_n_addr_jmp(int address, int dest, int tmp);
+extern void calc_disp_ea_020(int base, uae_u32 dp, int target, int tmp);
+/* Set native Z flag only if register is zero */
+extern void set_zero(int r, int tmp);
+extern int kill_rodent(int r);
+#define SYNC_PC_OFFSET 100
+extern void sync_m68k_pc(void);
+extern uae_u32 get_const(int r);
+extern int  is_const(int r);
+extern void register_branch(uae_u32 not_taken, uae_u32 taken, uae_u8 cond);
+
+#define comp_get_ibyte(o) do_get_mem_byte((uae_u8 *)(comp_pc_p + (o) + 1))
+#define comp_get_iword(o) do_get_mem_word((uae_u16 *)(comp_pc_p + (o)))
+#define comp_get_ilong(o) do_get_mem_long((uae_u32 *)(comp_pc_p + (o)))
+
+/* Preferences handling */
+int check_prefs_changed_comp (void);
+
+struct blockinfo_t;
+
+typedef struct dep_t {
+  uae_u32*            jmp_off;
+  struct blockinfo_t* target;
+  struct blockinfo_t* source;
+  struct dep_t**      prev_p;
+  struct dep_t*       next;
+} dependency;
+
+typedef struct checksum_info_t {
+  uae_u8 *start_p;
+  uae_u32 length;
+  struct checksum_info_t *next;
+} checksum_info;
+
+typedef struct blockinfo_t {
+    uae_s32 count;
+    cpuop_func* direct_handler_to_use;
+    cpuop_func* handler_to_use;
+    /* The direct handler does not check for the correct address */
+
+    cpuop_func* handler;
+    cpuop_func* direct_handler;
+
+    cpuop_func* direct_pen;
+    cpuop_func* direct_pcc;
+
+    uae_u8* pc_p;
+
+    uae_u32 c1;
+    uae_u32 c2;
+#if USE_CHECKSUM_INFO
+    checksum_info *csi;
+#else
+    uae_u32 len;
+    uae_u32 min_pcp;
+#endif
+
+    struct blockinfo_t* next_same_cl;
+    struct blockinfo_t** prev_same_cl_p;
+    struct blockinfo_t* next;
+    struct blockinfo_t** prev_p;
+
+    uae_u8 optlevel;
+    uae_u8 needed_flags;
+    uae_u8 status;
+    uae_u8 havestate;
+
+    dependency  dep[2];  /* Holds things we depend on */
+    dependency* deplist; /* List of things that depend on this */
+    smallstate  env;
+
+#ifdef JIT_DEBUG
+	/* (gb) size of the compiled block (direct handler) */
+	uae_u32 direct_handler_size;
+#endif
+} blockinfo;
+
+#define BI_INVALID 0
+#define BI_ACTIVE 1
+#define BI_NEED_RECOMP 2
+#define BI_NEED_CHECK 3
+#define BI_CHECKING 4
+#define BI_COMPILING 5
+#define BI_FINALIZING 6
+
+void execute_normal(void);
+void exec_nostats(void);
+void do_nothing(void);
+
+void comp_fdbcc_opp (uae_u32 opcode, uae_u16 extra);
+void comp_fscc_opp (uae_u32 opcode, uae_u16 extra);
+void comp_ftrapcc_opp (uae_u32 opcode, uaecptr oldpc);
+void comp_fbcc_opp (uae_u32 opcode);
+void comp_fsave_opp (uae_u32 opcode);
+void comp_frestore_opp (uae_u32 opcode);
+void comp_fpp_opp (uae_u32 opcode, uae_u16 extra);

src/jit/compemu_fpp.cpp

@@ -0,0 +1,106 @@
+/*
+  * UAE - The Un*x Amiga Emulator
+  *
+  * MC68881 emulation
+  *
+  * Copyright 1996 Herman ten Brugge
+  * Adapted for JIT compilation (c) Bernd Meyer, 2000
+  * Modified 2005 Peter Keunecke
+ */
+
+#include <math.h>
+
+#include "sysconfig.h"
+#include "sysdeps.h"
+
+#include "options.h"
+#include "memory.h"
+#include "custom.h"
+#include "newcpu.h"
+#include "ersatz.h"
+#include "compemu.h"
+
+#if defined(JIT)
+uae_u32 temp_fp[] = {0,0,0};  /* To convert between FP and <EA> */
+
+/* 128 words, indexed through the low byte of the 68k fpu control word */
+static const uae_u16 x86_fpucw[]={
+    0x137f, 0x137f, 0x137f, 0x137f, 0x137f, 0x137f, 0x137f, 0x137f, /* E-RN */
+    0x1f7f, 0x1f7f, 0x1f7f, 0x1f7f, 0x1f7f, 0x1f7f, 0x1f7f, 0x1f7f, /* E-RZ */
+    0x177f, 0x177f, 0x177f, 0x177f, 0x177f, 0x177f, 0x177f, 0x177f, /* E-RD */
+    0x1b7f, 0x1b7f, 0x1b7f, 0x1b7f, 0x1b7f, 0x1b7f, 0x1b7f, 0x1b7f, /* E-RU */
+
+    0x107f, 0x107f, 0x107f, 0x107f, 0x107f, 0x107f, 0x107f, 0x107f, /* S-RN */
+    0x1c7f, 0x1c7f, 0x1c7f, 0x1c7f, 0x1c7f, 0x1c7f, 0x1c7f, 0x1c7f, /* S-RZ */
+    0x147f, 0x147f, 0x147f, 0x147f, 0x147f, 0x147f, 0x147f, 0x147f, /* S-RD */
+    0x187f, 0x187f, 0x187f, 0x187f, 0x187f, 0x187f, 0x187f, 0x187f, /* S-RU */
+
+    0x127f, 0x127f, 0x127f, 0x127f, 0x127f, 0x127f, 0x127f, 0x127f, /* D-RN */
+    0x1e7f, 0x1e7f, 0x1e7f, 0x1e7f, 0x1e7f, 0x1e7f, 0x1e7f, 0x1e7f, /* D-RZ */
+    0x167f, 0x167f, 0x167f, 0x167f, 0x167f, 0x167f, 0x167f, 0x167f, /* D-RD */
+    0x1a7f, 0x1a7f, 0x1a7f, 0x1a7f, 0x1a7f, 0x1a7f, 0x1a7f, 0x1a7f, /* D-RU */
+
+    0x137f, 0x137f, 0x137f, 0x137f, 0x137f, 0x137f, 0x137f, 0x137f, /* ?-RN */
+    0x1f7f, 0x1f7f, 0x1f7f, 0x1f7f, 0x1f7f, 0x1f7f, 0x1f7f, 0x1f7f, /* ?-RZ */
+    0x177f, 0x177f, 0x177f, 0x177f, 0x177f, 0x177f, 0x177f, 0x177f, /* ?-RD */
+    0x1b7f, 0x1b7f, 0x1b7f, 0x1b7f, 0x1b7f, 0x1b7f, 0x1b7f, 0x1b7f  /* ?-RU */
+};
+static const int sz1[8] = { 4, 4, 12, 12, 2, 8, 1, 0 };
+static const int sz2[8] = { 4, 4, 12, 12, 2, 8, 2, 0 };
+
+/* return the required floating point precision or -1 for failure, 0=E, 1=S, 2=D */
+STATIC_INLINE int comp_fp_get (uae_u32 opcode, uae_u16 extra, int treg)
+{
+  printf("comp_fp_get not yet implemented\n");
+  return -1;
+}
+
+/* return of -1 means failure, >=0 means OK */
+STATIC_INLINE int comp_fp_put (uae_u32 opcode, uae_u16 extra)
+{
+  printf("comp_fp_put not yet implemented\n");
+  return -1;
+}
+
+/* return -1 for failure, or register number for success */
+STATIC_INLINE int comp_fp_adr (uae_u32 opcode)
+{
+  printf("comp_fp_adr not yet implemented\n");
+  return -1;
+}
+
+void comp_fdbcc_opp (uae_u32 opcode, uae_u16 extra)
+{
+  printf("comp_fdbcc_opp not yet implemented\n");
+}
+
+void comp_fscc_opp (uae_u32 opcode, uae_u16 extra)
+{
+  printf("comp_fscc_opp not yet implemented\n");
+}
+
+void comp_ftrapcc_opp (uae_u32 opcode, uaecptr oldpc)
+{
+  printf("comp_ftrapcc_opp not yet implemented\n");
+}
+
+void comp_fbcc_opp (uae_u32 opcode)
+{
+  printf("comp_fbcc_opp not yet implemented\n");
+}
+
+void comp_fsave_opp (uae_u32 opcode)
+{
+  printf("comp_fsave_opp not yet implemented\n");
+}
+
+void comp_frestore_opp (uae_u32 opcode)
+{
+  printf("comp_frestore_opp not yet implemented\n");
+}
+
+void comp_fpp_opp (uae_u32 opcode, uae_u16 extra)
+{
+  printf("comp_fpp_opp not yet implemented\n");
+}
+#endif

src/jit/compemu_midfunc_arm.h

@@ -0,0 +1,190 @@
+/*
+ *  compiler/compemu_midfunc_arm.h - Native MIDFUNCS for ARM
+ *
+ * Copyright (c) 2014 Jens Heitmann of ARAnyM dev team (see AUTHORS)
+ *
+ * Inspired by Christian Bauer's Basilisk II
+ *
+ *  Original 68040 JIT compiler for UAE, copyright 2000-2002 Bernd Meyer
+ *
+ *  Adaptation for Basilisk II and improvements, copyright 2000-2002
+ *    Gwenole Beauchesne
+ *
+ *  Basilisk II (C) 1997-2002 Christian Bauer
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ *  Note:
+ *  	File is included by compemu.h
+ *
+ */
+
+// Arm optimized midfunc
+DECLARE_MIDFUNC(arm_ADD_l(RW4 d, RR4 s));
+DECLARE_MIDFUNC(arm_ADD_l_ri(RW4 d, IMM i));
+DECLARE_MIDFUNC(arm_ADD_l_ri8(RW4 d, IMM i));
+DECLARE_MIDFUNC(arm_SUB_l_ri8(RW4 d, IMM i));
+DECLARE_MIDFUNC(arm_AND_b(RW1 d, RR1 s));
+DECLARE_MIDFUNC(arm_AND_w(RW2 d, RR2 s));
+DECLARE_MIDFUNC(arm_AND_l(RW4 d, RR4 s));
+DECLARE_MIDFUNC(arm_AND_l_ri8(RW4 d, IMM i));
+DECLARE_MIDFUNC(arm_EOR_b(RW1 d, RR1 s));
+DECLARE_MIDFUNC(arm_EOR_l(RW4 d, RR4 s));
+DECLARE_MIDFUNC(arm_EOR_w(RW2 d, RR2 s));
+DECLARE_MIDFUNC(arm_ORR_b(RW1 d, RR1 s));
+DECLARE_MIDFUNC(arm_ORR_l(RW4 d, RR4 s));
+DECLARE_MIDFUNC(arm_ORR_w(RW2 d, RR2 s));
+DECLARE_MIDFUNC(arm_ROR_l_ri8(RW4 r, IMM i));
+
+// Emulated midfunc
+DECLARE_MIDFUNC(bt_l_ri(RR4 r, IMM i));
+DECLARE_MIDFUNC(bt_l_rr(RR4 r, RR4 b));
+DECLARE_MIDFUNC(btc_l_rr(RW4 r, RR4 b));
+DECLARE_MIDFUNC(bts_l_rr(RW4 r, RR4 b));
+DECLARE_MIDFUNC(btr_l_rr(RW4 r, RR4 b));
+DECLARE_MIDFUNC(mov_l_rm(W4 d, IMM s));
+DECLARE_MIDFUNC(mov_l_rm_indexed(W4 d, IMM base, RR4 index, IMM factor));
+DECLARE_MIDFUNC(mov_l_mi(IMM d, IMM s));
+DECLARE_MIDFUNC(mov_w_mi(IMM d, IMM s));
+DECLARE_MIDFUNC(mov_b_mi(IMM d, IMM s));
+DECLARE_MIDFUNC(rol_b_ri(RW1 r, IMM i));
+DECLARE_MIDFUNC(rol_w_ri(RW2 r, IMM i));
+DECLARE_MIDFUNC(rol_l_rr(RW4 d, RR1 r));
+DECLARE_MIDFUNC(rol_w_rr(RW2 d, RR1 r));
+DECLARE_MIDFUNC(rol_b_rr(RW1 d, RR1 r));
+DECLARE_MIDFUNC(shll_l_rr(RW4 d, RR1 r));
+DECLARE_MIDFUNC(shll_w_rr(RW2 d, RR1 r));
+DECLARE_MIDFUNC(shll_b_rr(RW1 d, RR1 r));
+DECLARE_MIDFUNC(ror_b_ri(RR1 r, IMM i));
+DECLARE_MIDFUNC(ror_w_ri(RR2 r, IMM i));
+DECLARE_MIDFUNC(ror_l_ri(RR4 r, IMM i));
+DECLARE_MIDFUNC(ror_l_rr(RR4 d, RR1 r));
+DECLARE_MIDFUNC(ror_w_rr(RR2 d, RR1 r));
+DECLARE_MIDFUNC(ror_b_rr(RR1 d, RR1 r));
+DECLARE_MIDFUNC(shrl_l_rr(RW4 d, RR1 r));
+DECLARE_MIDFUNC(shrl_w_rr(RW2 d, RR1 r));
+DECLARE_MIDFUNC(shrl_b_rr(RW1 d, RR1 r));
+DECLARE_MIDFUNC(shra_l_rr(RW4 d, RR1 r));
+DECLARE_MIDFUNC(shra_w_rr(RW2 d, RR1 r));
+DECLARE_MIDFUNC(shra_b_rr(RW1 d, RR1 r));
+DECLARE_MIDFUNC(shll_l_ri(RW4 r, IMM i));
+DECLARE_MIDFUNC(shll_w_ri(RW2 r, IMM i));
+DECLARE_MIDFUNC(shll_b_ri(RW1 r, IMM i));
+DECLARE_MIDFUNC(shrl_l_ri(RW4 r, IMM i));
+DECLARE_MIDFUNC(shrl_w_ri(RW2 r, IMM i));
+DECLARE_MIDFUNC(shrl_b_ri(RW1 r, IMM i));
+DECLARE_MIDFUNC(shra_l_ri(RW4 r, IMM i));
+DECLARE_MIDFUNC(shra_w_ri(RW2 r, IMM i));
+DECLARE_MIDFUNC(shra_b_ri(RW1 r, IMM i));
+DECLARE_MIDFUNC(setcc(W1 d, IMM cc));
+DECLARE_MIDFUNC(setcc_m(IMM d, IMM cc));
+DECLARE_MIDFUNC(cmov_l_rr(RW4 d, RR4 s, IMM cc));
+DECLARE_MIDFUNC(bsf_l_rr(W4 d, RR4 s));
+DECLARE_MIDFUNC(pop_l(W4 d));
+DECLARE_MIDFUNC(push_l(RR4 s));
+DECLARE_MIDFUNC(sign_extend_16_rr(W4 d, RR2 s));
+DECLARE_MIDFUNC(sign_extend_8_rr(W4 d, RR1 s));
+DECLARE_MIDFUNC(zero_extend_16_rr(W4 d, RR2 s));
+DECLARE_MIDFUNC(zero_extend_8_rr(W4 d, RR1 s));
+DECLARE_MIDFUNC(imul_64_32(RW4 d, RW4 s));
+DECLARE_MIDFUNC(mul_64_32(RW4 d, RW4 s));
+DECLARE_MIDFUNC(imul_32_32(RW4 d, RR4 s));
+DECLARE_MIDFUNC(mov_b_rr(W1 d, RR1 s));
+DECLARE_MIDFUNC(mov_w_rr(W2 d, RR2 s));
+DECLARE_MIDFUNC(mov_l_rR(W4 d, RR4 s, IMM offset));
+DECLARE_MIDFUNC(mov_w_rR(W2 d, RR4 s, IMM offset));
+DECLARE_MIDFUNC(mov_l_brR(W4 d, RR4 s, IMM offset));
+DECLARE_MIDFUNC(mov_w_brR(W2 d, RR4 s, IMM offset));
+DECLARE_MIDFUNC(mov_b_brR(W1 d, RR4 s, IMM offset));
+DECLARE_MIDFUNC(mov_l_brR24(W4 d, RR4 s, IMM offset));
+DECLARE_MIDFUNC(mov_w_brR24(W2 d, RR4 s, IMM offset));
+DECLARE_MIDFUNC(mov_b_brR24(W1 d, RR4 s, IMM offset));
+DECLARE_MIDFUNC(mov_l_Ri(RR4 d, IMM i, IMM offset));
+DECLARE_MIDFUNC(mov_w_Ri(RR4 d, IMM i, IMM offset));
+DECLARE_MIDFUNC(mov_l_Rr(RR4 d, RR4 s, IMM offset));
+DECLARE_MIDFUNC(mov_w_Rr(RR4 d, RR2 s, IMM offset));
+DECLARE_MIDFUNC(lea_l_brr(W4 d, RR4 s, IMM offset));
+DECLARE_MIDFUNC(lea_l_brr24(W4 d, RR4 s, IMM offset));
+DECLARE_MIDFUNC(lea_l_brr_indexed(W4 d, RR4 s, RR4 index, IMM factor, IMM offset));
+DECLARE_MIDFUNC(lea_l_rr_indexed(W4 d, RR4 s, RR4 index, IMM factor));
+DECLARE_MIDFUNC(mov_l_bRr(RR4 d, RR4 s, IMM offset));
+DECLARE_MIDFUNC(mov_w_bRr(RR4 d, RR2 s, IMM offset));
+DECLARE_MIDFUNC(mov_b_bRr(RR4 d, RR1 s, IMM offset));
+DECLARE_MIDFUNC(mov_l_bRr24(RR4 d, RR4 s, IMM offset));
+DECLARE_MIDFUNC(mov_w_bRr24(RR4 d, RR2 s, IMM offset));
+DECLARE_MIDFUNC(mov_b_bRr24(RR4 d, RR1 s, IMM offset));
+DECLARE_MIDFUNC(mid_bswap_32(RW4 r));
+DECLARE_MIDFUNC(mid_bswap_16(RW2 r));
+DECLARE_MIDFUNC(mov_l_rr(W4 d, RR4 s));
+DECLARE_MIDFUNC(mov_l_mr(IMM d, RR4 s));
+DECLARE_MIDFUNC(mov_w_mr(IMM d, RR2 s));
+DECLARE_MIDFUNC(mov_w_rm(W2 d, IMM s));
+DECLARE_MIDFUNC(mov_b_mr(IMM d, RR1 s));
+DECLARE_MIDFUNC(mov_b_rm(W1 d, IMM s));
+DECLARE_MIDFUNC(mov_l_ri(W4 d, IMM s));
+DECLARE_MIDFUNC(mov_w_ri(W2 d, IMM s));
+DECLARE_MIDFUNC(mov_b_ri(W1 d, IMM s));
+DECLARE_MIDFUNC(test_l_ri(RR4 d, IMM i));
+DECLARE_MIDFUNC(test_l_rr(RR4 d, RR4 s));
+DECLARE_MIDFUNC(test_w_rr(RR2 d, RR2 s));
+DECLARE_MIDFUNC(test_b_rr(RR1 d, RR1 s));
+DECLARE_MIDFUNC(and_l_ri(RW4 d, IMM i));
+DECLARE_MIDFUNC(and_l(RW4 d, RR4 s));
+DECLARE_MIDFUNC(and_w(RW2 d, RR2 s));
+DECLARE_MIDFUNC(and_b(RW1 d, RR1 s));
+DECLARE_MIDFUNC(or_l_ri(RW4 d, IMM i));
+DECLARE_MIDFUNC(or_l(RW4 d, RR4 s));
+DECLARE_MIDFUNC(or_w(RW2 d, RR2 s));
+DECLARE_MIDFUNC(or_b(RW1 d, RR1 s));
+DECLARE_MIDFUNC(adc_l(RW4 d, RR4 s));
+DECLARE_MIDFUNC(adc_w(RW2 d, RR2 s));
+DECLARE_MIDFUNC(adc_b(RW1 d, RR1 s));
+DECLARE_MIDFUNC(add_l(RW4 d, RR4 s));
+DECLARE_MIDFUNC(add_w(RW2 d, RR2 s));
+DECLARE_MIDFUNC(add_b(RW1 d, RR1 s));
+DECLARE_MIDFUNC(sub_l_ri(RW4 d, IMM i));
+DECLARE_MIDFUNC(sub_w_ri(RW2 d, IMM i));
+DECLARE_MIDFUNC(sub_b_ri(RW1 d, IMM i));
+DECLARE_MIDFUNC(add_l_ri(RW4 d, IMM i));
+DECLARE_MIDFUNC(add_w_ri(RW2 d, IMM i));
+DECLARE_MIDFUNC(add_b_ri(RW1 d, IMM i));
+DECLARE_MIDFUNC(sbb_l(RW4 d, RR4 s));
+DECLARE_MIDFUNC(sbb_w(RW2 d, RR2 s));
+DECLARE_MIDFUNC(sbb_b(RW1 d, RR1 s));
+DECLARE_MIDFUNC(sub_l(RW4 d, RR4 s));
+DECLARE_MIDFUNC(sub_w(RW2 d, RR2 s));
+DECLARE_MIDFUNC(sub_b(RW1 d, RR1 s));
+DECLARE_MIDFUNC(cmp_l(RR4 d, RR4 s));
+DECLARE_MIDFUNC(cmp_w(RR2 d, RR2 s));
+DECLARE_MIDFUNC(cmp_b(RR1 d, RR1 s));
+DECLARE_MIDFUNC(xor_l(RW4 d, RR4 s));
+DECLARE_MIDFUNC(xor_w(RW2 d, RR2 s));
+DECLARE_MIDFUNC(xor_b(RW1 d, RR1 s));
+DECLARE_MIDFUNC(call_r_02(RR4 r, RR4 in1, RR4 in2, IMM isize1, IMM isize2));
+DECLARE_MIDFUNC(call_r_11(W4 out1, RR4 r, RR4 in1, IMM osize, IMM isize));
+DECLARE_MIDFUNC(live_flags(void));
+DECLARE_MIDFUNC(dont_care_flags(void));
+DECLARE_MIDFUNC(duplicate_carry(void));
+DECLARE_MIDFUNC(restore_carry(void));
+DECLARE_MIDFUNC(start_needflags(void));
+DECLARE_MIDFUNC(end_needflags(void));
+DECLARE_MIDFUNC(make_flags_live(void));
+DECLARE_MIDFUNC(forget_about(W4 r));
+
+DECLARE_MIDFUNC(f_forget_about(FW r));
+
+
+
+