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WIP - merge from Pandora's port

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Dimitris Panokostas 2017-09-18 10:41:47 +02:00
parent 546562cff3
commit a2850730e0
309 changed files with 239342 additions and 114388 deletions
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209
src/machdep/m68k.h
View file

@ -2,7 +2,7 @@
* m68k.h - machine dependent bits
*
* Copyright (c) 2001-2004 Milan Jurik of ARAnyM dev team (see AUTHORS)
*
*
* Inspired by Christian Bauer's Basilisk II
*
* This file is part of the ARAnyM project which builds a new and powerful
@ -31,14 +31,14 @@
* Copyright 2004-2005 Richard Drummond
*/
#pragma once
#if (defined(CPU_i386) && defined(X86_ASSEMBLY)) || (defined(CPU_x86_64) && defined(X86_64_ASSEMBLY))
/*
* Machine dependent structure for holding the 68k CCR flags
*/
struct flag_struct
{
#ifndef REGS_DEFINED
/*
* Machine dependent structure for holding the 68k CCR flags
*/
struct flag_struct {
unsigned int cznv;
unsigned int x;
};
@ -70,6 +70,8 @@ struct flag_struct
#define FLAGVAL_V (1 << FLAGBIT_V)
#define FLAGVAL_X (1 << FLAGBIT_X)
#else /* REGS_DEFINED */
#define SET_ZFLG(y) (regs.ccrflags.cznv = (regs.ccrflags.cznv & ~FLAGVAL_Z) | (((y) ? 1 : 0) << FLAGBIT_Z))
#define SET_CFLG(y) (regs.ccrflags.cznv = (regs.ccrflags.cznv & ~FLAGVAL_C) | (((y) ? 1 : 0) << FLAGBIT_C))
#define SET_VFLG(y) (regs.ccrflags.cznv = (regs.ccrflags.cznv & ~FLAGVAL_V) | (((y) ? 1 : 0) << FLAGBIT_V))
@ -93,59 +95,43 @@ struct flag_struct
/*
* Test CCR condition
*/
STATIC_INLINE int cctrue (struct flag_struct &flags, int cc)
STATIC_INLINE int cctrue (int cc)
{
uae_u32 cznv = flags.cznv;
uae_u32 cznv = regs.ccrflags.cznv;
switch (cc)
{
case 0:
return 1; /* T */
case 1:
return 0; /* F */
case 2:
return (cznv & (FLAGVAL_C | FLAGVAL_Z)) == 0; /* !CFLG && !ZFLG HI */
case 3:
return (cznv & (FLAGVAL_C | FLAGVAL_Z)) != 0; /* CFLG || ZFLG LS */
case 4:
return (cznv & FLAGVAL_C) == 0; /* !CFLG CC */
case 5:
return (cznv & FLAGVAL_C) != 0; /* CFLG CS */
case 6:
return (cznv & FLAGVAL_Z) == 0; /* !ZFLG NE */
case 7:
return (cznv & FLAGVAL_Z) != 0; /* ZFLG EQ */
case 8:
return (cznv & FLAGVAL_V) == 0; /* !VFLG VC */
case 9:
return (cznv & FLAGVAL_V) != 0; /* VFLG VS */
case 10:
return (cznv & FLAGVAL_N) == 0; /* !NFLG PL */
case 11:
return (cznv & FLAGVAL_N) != 0; /* NFLG MI */
case 12:
return (((cznv << (FLAGBIT_N - FLAGBIT_V)) ^ cznv) & FLAGVAL_N) == 0; /* NFLG == VFLG GE */
case 13:
return (((cznv << (FLAGBIT_N - FLAGBIT_V)) ^ cznv) & FLAGVAL_N) != 0; /* NFLG != VFLG LT */
case 14:
cznv &= (FLAGVAL_N | FLAGVAL_Z | FLAGVAL_V); /* ZFLG && (NFLG == VFLG) GT */
return (((cznv << (FLAGBIT_N - FLAGBIT_V)) ^ cznv) & (FLAGVAL_N | FLAGVAL_Z)) == 0;
case 15:
cznv &= (FLAGVAL_N | FLAGVAL_Z | FLAGVAL_V); /* ZFLG && (NFLG != VFLG) LE */
return (((cznv << (FLAGBIT_N - FLAGBIT_V)) ^ cznv) & (FLAGVAL_N | FLAGVAL_Z)) != 0;
switch (cc) {
case 0: return 1; /* T */
case 1: return 0; /* F */
case 2: return (cznv & (FLAGVAL_C | FLAGVAL_Z)) == 0; /* !CFLG && !ZFLG HI */
case 3: return (cznv & (FLAGVAL_C | FLAGVAL_Z)) != 0; /* CFLG || ZFLG LS */
case 4: return (cznv & FLAGVAL_C) == 0; /* !CFLG CC */
case 5: return (cznv & FLAGVAL_C) != 0; /* CFLG CS */
case 6: return (cznv & FLAGVAL_Z) == 0; /* !ZFLG NE */
case 7: return (cznv & FLAGVAL_Z) != 0; /* ZFLG EQ */
case 8: return (cznv & FLAGVAL_V) == 0; /* !VFLG VC */
case 9: return (cznv & FLAGVAL_V) != 0; /* VFLG VS */
case 10: return (cznv & FLAGVAL_N) == 0; /* !NFLG PL */
case 11: return (cznv & FLAGVAL_N) != 0; /* NFLG MI */
case 12: return (((cznv << (FLAGBIT_N - FLAGBIT_V)) ^ cznv) & FLAGVAL_N) == 0; /* NFLG == VFLG GE */
case 13: return (((cznv << (FLAGBIT_N - FLAGBIT_V)) ^ cznv) & FLAGVAL_N) != 0; /* NFLG != VFLG LT */
case 14: cznv &= (FLAGVAL_N | FLAGVAL_Z | FLAGVAL_V); /* ZFLG && (NFLG == VFLG) GT */
return (((cznv << (FLAGBIT_N - FLAGBIT_V)) ^ cznv) & (FLAGVAL_N | FLAGVAL_Z)) == 0;
case 15: cznv &= (FLAGVAL_N | FLAGVAL_Z | FLAGVAL_V); /* ZFLG && (NFLG != VFLG) LE */
return (((cznv << (FLAGBIT_N - FLAGBIT_V)) ^ cznv) & (FLAGVAL_N | FLAGVAL_Z)) != 0;
}
return 0;
}
#endif /* REGS_DEFINED */
#elif defined(CPU_arm) && defined(ARMV6_ASSEMBLY)
struct flag_struct
{
uae_u32 nzcv;
uae_u32 x;
};
#ifndef REGS_DEFINED
extern struct flag_struct regflags;
struct flag_struct {
uae_u32 nzcv;
uae_u32 x;
};
#define FLAGVAL_Q 0x08000000
#define FLAGVAL_V 0x10000000
@ -153,6 +139,8 @@ extern struct flag_struct regflags;
#define FLAGVAL_Z 0x40000000
#define FLAGVAL_N 0x80000000
#else /* REGS_DEFINED */
#define SET_NFLG(y) (regs.ccrflags.nzcv = (regs.ccrflags.nzcv & ~0x80000000) | (((y) ? 1 : 0) << 31))
#define SET_ZFLG(y) (regs.ccrflags.nzcv = (regs.ccrflags.nzcv & ~0x40000000) | (((y) ? 1 : 0) << 30))
#define SET_CFLG(y) (regs.ccrflags.nzcv = (regs.ccrflags.nzcv & ~0x20000000) | (((y) ? 1 : 0) << 29))
@ -173,60 +161,50 @@ extern struct flag_struct regflags;
#define COPY_CARRY() (regs.ccrflags.x = ((regs.ccrflags.nzcv >> 29) & 1))
STATIC_INLINE int cctrue(struct flag_struct &flags, int cc)
STATIC_INLINE int cctrue(int cc)
{
unsigned int nzcv = flags.nzcv;
switch(cc)
{
case 0:
return 1; /* T */
case 1:
return 0; /* F */
case 2:
return (nzcv & 0x60000000) == 0; /* !GET_CFLG && !GET_ZFLG; HI */
case 3:
return (nzcv & 0x60000000) != 0; /* GET_CFLG || GET_ZFLG; LS */
case 4:
return (nzcv & 0x20000000) == 0; /* !GET_CFLG; CC */
case 5:
return (nzcv & 0x20000000) != 0; /* GET_CFLG; CS */
case 6:
return (nzcv & 0x40000000) == 0; /* !GET_ZFLG; NE */
case 7:
return (nzcv & 0x40000000) != 0; /* GET_ZFLG; EQ */
case 8:
return (nzcv & 0x10000000) == 0; /* !GET_VFLG; VC */
case 9:
return (nzcv & 0x10000000) != 0; /* GET_VFLG; VS */
case 10:
return (nzcv & 0x80000000) == 0; /* !GET_NFLG; PL */
case 11:
return (nzcv & 0x80000000) != 0; /* GET_NFLG; MI */
case 12:
return (((nzcv << 3) ^ nzcv) & 0x80000000) == 0; /* GET_NFLG == GET_VFLG; GE */
case 13:
return (((nzcv << 3) ^ nzcv) & 0x80000000) != 0; /* GET_NFLG != GET_VFLG; LT */
case 14:
unsigned int nzcv = regs.ccrflags.nzcv;
switch(cc){
case 0: return 1; /* T */
case 1: return 0; /* F */
case 2: return (nzcv & 0x60000000) == 0; /* !GET_CFLG && !GET_ZFLG; HI */
case 3: return (nzcv & 0x60000000) != 0; /* GET_CFLG || GET_ZFLG; LS */
case 4: return (nzcv & 0x20000000) == 0; /* !GET_CFLG; CC */
case 5: return (nzcv & 0x20000000) != 0; /* GET_CFLG; CS */
case 6: return (nzcv & 0x40000000) == 0; /* !GET_ZFLG; NE */
case 7: return (nzcv & 0x40000000) != 0; /* GET_ZFLG; EQ */
case 8: return (nzcv & 0x10000000) == 0; /* !GET_VFLG; VC */
case 9: return (nzcv & 0x10000000) != 0; /* GET_VFLG; VS */
case 10:return (nzcv & 0x80000000) == 0; /* !GET_NFLG; PL */
case 11:return (nzcv & 0x80000000) != 0; /* GET_NFLG; MI */
case 12:return (((nzcv << 3) ^ nzcv) & 0x80000000) == 0; /* GET_NFLG == GET_VFLG; GE */
case 13:return (((nzcv << 3) ^ nzcv) & 0x80000000) != 0; /* GET_NFLG != GET_VFLG; LT */
case 14:
nzcv &= 0xd0000000;
return (((nzcv << 3) ^ nzcv) & 0xc0000000) == 0; /* !GET_ZFLG && (GET_NFLG == GET_VFLG); GT */
case 15:
case 15:
nzcv &= 0xd0000000;
return (((nzcv << 3) ^ nzcv) & 0xc0000000) != 0; /* GET_ZFLG || (GET_NFLG != GET_VFLG); LE */
}
return 0;
}
#endif /* REGS_DEFINED */
#else
struct flag_struct
{
#ifndef REGS_DEFINED
struct flag_struct {
unsigned int c;
unsigned int z;
unsigned int n;
unsigned int v;
unsigned int v;
unsigned int x;
};
#else /* REGS_DEFINED */
#define ZFLG (regs.ccrflags.z)
#define NFLG (regs.ccrflags.n)
#define CFLG (regs.ccrflags.c)
@ -254,44 +232,29 @@ struct flag_struct
#define COPY_CARRY() (regs.ccrflags.x = regs.ccrflags.c)
STATIC_INLINE int cctrue(struct flag_struct &flags, const int cc)
STATIC_INLINE int cctrue(const int cc)
{
switch(cc)
{
case 0:
return 1; /* T */
case 1:
return 0; /* F */
case 2:
return !CFLG && !ZFLG; /* HI */
case 3:
return CFLG || ZFLG; /* LS */
case 4:
return !CFLG; /* CC */
case 5:
return CFLG; /* CS */
case 6:
return !ZFLG; /* NE */
case 7:
return ZFLG; /* EQ */
case 8:
return !VFLG; /* VC */
case 9:
return VFLG; /* VS */
case 10:
return !NFLG; /* PL */
case 11:
return NFLG; /* MI */
case 12:
return NFLG == VFLG; /* GE */
case 13:
return NFLG != VFLG; /* LT */
case 14:
return !ZFLG && (NFLG == VFLG); /* GT */
case 15:
return ZFLG || (NFLG != VFLG); /* LE */
switch(cc){
case 0: return 1; /* T */
case 1: return 0; /* F */
case 2: return !CFLG && !ZFLG; /* HI */
case 3: return CFLG || ZFLG; /* LS */
case 4: return !CFLG; /* CC */
case 5: return CFLG; /* CS */
case 6: return !ZFLG; /* NE */
case 7: return ZFLG; /* EQ */
case 8: return !VFLG; /* VC */
case 9: return VFLG; /* VS */
case 10:return !NFLG; /* PL */
case 11:return NFLG; /* MI */
case 12:return NFLG == VFLG; /* GE */
case 13:return NFLG != VFLG; /* LT */
case 14:return !ZFLG && (NFLG == VFLG); /* GT */
case 15:return ZFLG || (NFLG != VFLG); /* LE */
}
return 0;
}
#endif /* REGS_DEFINED */
#endif

132
src/machdep/maccess.h
View file

@ -1,98 +1,100 @@
/*
* UAE - The Un*x Amiga Emulator
*
* Memory access functions
*
* Copyright 1996 Bernd Schmidt
*/
/*
* UAE - The Un*x Amiga Emulator
*
* Memory access functions
*
* Copyright 1996 Bernd Schmidt
*/
#ifndef MACCESS_UAE_H
#define MACCESS_UAE_H
#define ALIGN_POINTER_TO32(p) ((~(unsigned long)(p)) & 3)
#ifdef ARMV6_ASSEMBLY
STATIC_INLINE uae_u32 do_get_mem_long(uae_u32 *a)
{
uae_u32 v;
__asm__ (
"ldr %[v], [%[a]] \n\t"
"rev %[v], %[v] \n\t"
: [v] "=r" (v) : [a] "r" (a) );
return v;
}
#else
STATIC_INLINE uae_u32 do_get_mem_long(uae_u32 *a)
{
uae_u8 *b = (uae_u8 *)a;
return (*b << 24) | (*(b + 1) << 16) | (*(b + 2) << 8) | (*(b + 3));
}
#endif
#ifdef ARMV6_ASSEMBLY
STATIC_INLINE uae_u16 do_get_mem_word(uae_u16 *a)
STATIC_INLINE uae_u16 do_get_mem_word(uae_u16 *_GCCRES_ a)
{
uae_u16 v;
__asm__ (
"ldrh %[v], [%[a]] \n\t"
"rev16 %[v], %[v] \n\t"
: [v] "=r" (v) : [a] "r" (a) );
return v;
uae_u16 v;
__asm__ (
"ldrh %[v], [%[a]] \n\t"
"rev16 %[v], %[v] \n\t"
: [v] "=r" (v) : [a] "r" (a) );
return v;
}
#else
STATIC_INLINE uae_u16 do_get_mem_word(uae_u16 *a)
STATIC_INLINE uae_u16 do_get_mem_word(uae_u16 *_GCCRES_ a)
{
uae_u8 *b = (uae_u8 *)a;
return (*b << 8) | (*(b+1));
}
#endif
STATIC_INLINE uae_u8 do_get_mem_byte(uae_u8 *a)
#ifdef ARMV6_ASSEMBLY
STATIC_INLINE uae_u32 do_get_mem_long(uae_u32 *a)
{
uae_u32 v;
__asm__ (
"ldr %[v], [%[a]] \n\t"
"rev %[v], %[v] \n\t"
: [v] "=r" (v) : [a] "r" (a) );
return v;
}
#else
STATIC_INLINE uae_u32 do_get_mem_long(uae_u32 *_GCCRES_ a)
{
uae_u8 *b = (uae_u8 *)a;
return (*b << 24) | (*(b+1) << 16) | (*(b+2) << 8) | (*(b+3));
}
#endif
STATIC_INLINE uae_u8 do_get_mem_byte(uae_u8 *_GCCRES_ a)
{
return *a;
}
#ifdef ARMV6_ASSEMBLY
STATIC_INLINE void do_put_mem_long(uae_u32 *a, uae_u32 v)
STATIC_INLINE void do_put_mem_word(uae_u16 *_GCCRES_ a, uae_u16 v)
{
__asm__ (
"rev r2, %[v] \n\t"
"str r2, [%[a]] \n\t"
: : [v] "r" (v), [a] "r" (a) : "r2", "memory" );
__asm__ (
"rev16 r2, %[v] \n\t"
"strh r2, [%[a]] \n\t"
: : [v] "r" (v), [a] "r" (a) : "r2", "memory" );
}
#else
STATIC_INLINE void do_put_mem_long(uae_u32 *a, uae_u32 v)
STATIC_INLINE void do_put_mem_word(uae_u16 *_GCCRES_ a, uae_u16 v)
{
uae_u8 *b = (uae_u8 *)a;
*b = v >> 8;
*(b+1) = v;
}
#endif
#ifdef ARMV6_ASSEMBLY
STATIC_INLINE void do_put_mem_long(uae_u32 *_GCCRES_ a, uae_u32 v)
{
__asm__ (
"rev r2, %[v] \n\t"
"str r2, [%[a]] \n\t"
: : [v] "r" (v), [a] "r" (a) : "r2", "memory" );
}
#else
STATIC_INLINE void do_put_mem_long(uae_u32 *_GCCRES_ a, uae_u32 v)
{
uae_u8 *b = (uae_u8 *)a;
*b = v >> 24;
*(b+1) = v >> 16;
*(b+1) = v >> 16;
*(b+2) = v >> 8;
*(b+3) = v;
}
#endif
#ifdef ARMV6_ASSEMBLY
STATIC_INLINE void do_put_mem_word(uae_u16 *a, uae_u16 v)
{
__asm__ (
"rev16 r2, %[v] \n\t"
"strh r2, [%[a]] \n\t"
: : [v] "r" (v), [a] "r" (a) : "r2", "memory" );
}
#else
STATIC_INLINE void do_put_mem_word(uae_u16 *a, uae_u16 v)
{
uae_u8 *b = (uae_u8 *)a;
*b = v >> 8;
*(b + 1) = v;
}
#endif
STATIC_INLINE void do_put_mem_byte(uae_u8 *a, uae_u8 v)
STATIC_INLINE void do_put_mem_byte(uae_u8 *_GCCRES_ a, uae_u8 v)
{
*a = v;
}
@ -100,4 +102,8 @@ STATIC_INLINE void do_put_mem_byte(uae_u8 *a, uae_u8 v)
#define call_mem_get_func(func, addr) ((*func)(addr))
#define call_mem_put_func(func, addr, v) ((*func)(addr, v))
#undef MD_HAVE_MEM_1_FUNCS
#define ALIGN_POINTER_TO32(p) ((~(unsigned long)(p)) & 3)
#endif

2
src/machdep/support.cpp
View file

@ -25,7 +25,7 @@ int machdep_init (void)
// Initialize timebase
g_uae_epoch = read_processor_time();
syncbase = 1000000; // Microseconds
return 1;
}