Merged SDL1 and SDL2 projects
This commit is contained in:
Dimitris Panokostas
parent
0f52c165e6
commit
cebfc8f823
155 changed files with 42610 additions and 67600 deletions
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@ -1,27 +1,3 @@
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/*
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* newcpu.h - CPU emulation
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*
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* Copyright (c) 2009 ARAnyM dev team (see AUTHORS)
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*
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* Inspired by Christian Bauer's Basilisk II
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*
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* This file is part of the ARAnyM project which builds a new and powerful
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* TOS/FreeMiNT compatible virtual machine running on almost any hardware.
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*
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* ARAnyM is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* ARAnyM is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with ARAnyM; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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/*
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* UAE - The Un*x Amiga Emulator
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*
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@ -30,13 +6,13 @@
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* Copyright 1995 Bernd Schmidt
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*/
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#ifndef _NEWCPU_H
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#define _NEWCPU_H
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#ifndef UAE_NEWCPU_H
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#define UAE_NEWCPU_H
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#include "uae/types.h"
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#include "readcpu.h"
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#include "machdep/m68k.h"
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#include "include/memory.h"
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#include "events.h"
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#include <softfloat/softfloat.h>
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extern const int areg_byteinc[];
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extern const int imm8_table[];
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@ -55,8 +31,11 @@ typedef uae_u32 REGPARAM3 cpuop_func (uae_u32) REGPARAM;
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typedef void REGPARAM3 cpuop_func_ce (uae_u32) REGPARAM;
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struct cputbl {
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cpuop_func *handler;
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uae_u16 opcode;
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cpuop_func *handler;
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uae_u16 opcode;
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uae_s8 length;
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uae_s8 disp020[2];
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uae_u8 branch;
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};
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#ifdef JIT
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@ -71,20 +50,19 @@ typedef uae_u32 REGPARAM3 compop_func (uae_u32) REGPARAM;
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#define COMP_OPCODE_USES_FPU 0x0020
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struct comptbl {
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compop_func *handler;
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compop_func *handler;
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uae_u32 specific;
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uae_u32 opcode;
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uae_u32 opcode;
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};
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#endif
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extern uae_u32 REGPARAM3 op_illg (uae_u32) REGPARAM;
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extern void REGPARAM3 op_unimpl (uae_u16) REGPARAM;
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typedef uae_u8 flagtype;
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#ifdef FPUEMU
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#if USE_LONG_DOUBLE
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#ifdef USE_LONG_DOUBLE
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typedef long double fptype;
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#define LDPTR tbyte ptr
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#else
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@ -95,12 +73,8 @@ typedef double fptype;
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typedef struct
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{
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floatx80 fpx;
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fptype fp;
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#ifdef USE_SOFT_LONG_DOUBLE
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bool fpx;
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uae_u32 fpm;
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uae_u64 fpe;
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#endif
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} fpdata;
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struct regstruct
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@ -111,15 +85,12 @@ struct regstruct
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uae_u32 pc;
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uae_u8 *pc_p;
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uae_u8 *pc_oldp;
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uae_u16 opcode;
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uae_u32 instruction_pc;
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uae_u16 irc, ir, db;
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uae_u16 irc, ir, db;
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volatile uae_atomic spcflags;
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uae_u32 last_prefetch;
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uae_u32 chipset_latch_rw;
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uae_u32 chipset_latch_read;
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uae_u32 chipset_latch_write;
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uaecptr usp, isp, msp;
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uae_u16 sr;
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flagtype t1;
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@ -128,40 +99,38 @@ struct regstruct
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flagtype m;
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flagtype x;
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flagtype stopped;
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int halted;
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int exception;
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int halted;
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int intmask;
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int ipl, ipl_pin;
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uae_u32 vbr,sfc,dfc;
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#ifdef FPUEMU
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fpdata fp[8];
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fpdata fp_result;
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uae_u32 fp_result_status;
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uae_u32 fpcr,fpsr, fpiar;
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uae_u32 fpu_state;
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uae_u32 fpu_exp_state;
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fpdata exp_src1, exp_src2;
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uae_u32 exp_pack[3];
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uae_u16 exp_opcode, exp_extra, exp_type;
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uae_u16 fp_opword;
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uaecptr fp_ea;
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uae_u32 fp_exp_pend, fp_unimp_pend;
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bool fpu_exp_pre;
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bool fp_unimp_ins;
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bool fp_exception;
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bool fp_branch;
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#endif
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#ifndef CPUEMU_68000_ONLY
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uae_u32 cacr, caar;
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uae_u32 itt0, itt1, dtt0, dtt1;
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uae_u32 tcr, mmusr, urp, srp, buscr;
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#endif
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uae_u32 pcr;
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uae_u32 address_space_mask;
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uae_u8 panic;
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uae_u32 panic_pc, panic_addr;
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uae_s32 pissoff;
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};
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extern struct regstruct regs;
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#define REGS_DEFINED
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#include "machdep/m68k.h"
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#include "events.h"
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STATIC_INLINE uae_u32 munge24(uae_u32 x)
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@ -170,26 +139,40 @@ STATIC_INLINE uae_u32 munge24(uae_u32 x)
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}
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extern int cpu_cycles;
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extern bool m68k_pc_indirect;
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extern int m68k_pc_indirect;
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STATIC_INLINE void set_special_exter(uae_u32 x)
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STATIC_INLINE void set_special (uae_u32 x)
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{
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regs.spcflags |= x;
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}
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STATIC_INLINE void set_special(uae_u32 x)
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{
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regs.spcflags |= x;
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cycles_do_special();
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atomic_or(®s.spcflags, x);
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cycles_do_special();
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}
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STATIC_INLINE void unset_special (uae_u32 x)
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{
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regs.spcflags &= ~x;
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atomic_and(®s.spcflags, ~x);
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}
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#define m68k_dreg(r,num) ((r).regs[(num)])
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#define m68k_areg(r,num) (((r).regs + 8)[(num)])
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extern uae_u32(*x_get_byte)(uaecptr addr);
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extern uae_u32(*x_get_word)(uaecptr addr);
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extern uae_u32(*x_get_long)(uaecptr addr);
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extern void(*x_put_byte)(uaecptr addr, uae_u32 v);
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extern void(*x_put_word)(uaecptr addr, uae_u32 v);
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extern void(*x_put_long)(uaecptr addr, uae_u32 v);
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extern uae_u32(*x_get_iword)(int);
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#define x_cp_get_byte x_get_byte
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#define x_cp_get_word x_get_word
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#define x_cp_get_long x_get_long
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#define x_cp_put_byte x_put_byte
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#define x_cp_put_word x_put_word
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#define x_cp_put_long x_put_long
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#define x_cp_next_iword() next_diword()
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#define x_cp_next_ilong() next_dilong()
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#define x_cp_get_disp_ea_020(base,idx) _get_disp_ea_020(base)
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/* direct (regs.pc_p) access */
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@ -198,7 +181,6 @@ STATIC_INLINE void m68k_setpc (uaecptr newpc)
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regs.pc_p = regs.pc_oldp = get_real_address (newpc);
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regs.instruction_pc = regs.pc = newpc;
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}
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STATIC_INLINE uaecptr m68k_getpc (void)
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{
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return (uaecptr)(regs.pc + ((uae_u8*)regs.pc_p - (uae_u8*)regs.pc_oldp));
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@ -208,7 +190,10 @@ STATIC_INLINE uaecptr m68k_getpc (void)
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#define m68k_incpc(o) ((regs).pc_p += (o))
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#define get_dibyte(o) do_get_mem_byte((uae_u8 *)((regs).pc_p + (o) + 1))
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#define get_diword(o) do_get_mem_word((uae_u16 *)((regs).pc_p + (o)))
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STATIC_INLINE uae_u32 get_diword(int o)
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{
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return do_get_mem_word((uae_u16 *)((regs).pc_p + (o)));
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}
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#define get_dilong(o) do_get_mem_long((uae_u32 *)((regs).pc_p + (o)))
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STATIC_INLINE uae_u32 next_diword (void)
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@ -230,8 +215,6 @@ STATIC_INLINE void m68k_do_bsr (uaecptr oldpc, uae_s32 offset)
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put_long(m68k_areg(regs, 7), oldpc);
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m68k_incpc (offset);
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}
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STATIC_INLINE void m68k_do_rts (void)
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{
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uae_u32 newpc = get_long (m68k_areg (regs, 7));
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@ -248,6 +231,11 @@ STATIC_INLINE uaecptr m68k_getpci(void)
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}
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#define m68k_incpci(o) (regs.pc += (o))
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STATIC_INLINE uae_u32 get_iiword(int o)
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{
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return get_wordi(m68k_getpci() + (o));
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}
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STATIC_INLINE void m68k_do_bsri(uaecptr oldpc, uae_s32 offset)
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{
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m68k_areg(regs, 7) -= 4;
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@ -265,7 +253,7 @@ STATIC_INLINE void m68k_do_rtsi(void)
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STATIC_INLINE void m68k_incpc_normal(int o)
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{
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if (m68k_pc_indirect)
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if (m68k_pc_indirect > 0)
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m68k_incpci(o);
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else
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m68k_incpc(o);
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@ -273,29 +261,15 @@ STATIC_INLINE void m68k_incpc_normal(int o)
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STATIC_INLINE void m68k_setpc_normal(uaecptr pc)
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{
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if (m68k_pc_indirect) {
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if (m68k_pc_indirect > 0) {
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regs.pc_p = regs.pc_oldp = 0;
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m68k_setpci(pc);
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}
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else {
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} else {
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m68k_setpc(pc);
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}
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}
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#define x_get_word get_word
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#define x_get_long get_long
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#define x_put_word put_word
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#define x_put_long put_long
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#define x_cp_put_long put_long
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#define x_cp_put_word put_word
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#define x_cp_put_byte put_byte
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#define x_cp_get_long get_long
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#define x_cp_get_word get_word
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#define x_cp_get_byte get_byte
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#define x_cp_next_iword() next_diword()
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#define x_cp_next_ilong() next_dilong()
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#define x_cp_get_disp_ea_020(base,idx) _get_disp_ea_020(base)
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extern void check_t0_trace(void);
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#define x_do_cycles(c) do_cycles(c)
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@ -313,7 +287,10 @@ extern int get_cpu_model(void);
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extern void set_cpu_caches (bool flush);
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extern void REGPARAM3 MakeSR (void) REGPARAM;
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extern void REGPARAM3 MakeFromSR (void) REGPARAM;
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extern void REGPARAM3 MakeFromSR_T0(void) REGPARAM;
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extern void REGPARAM3 Exception (int) REGPARAM;
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extern void REGPARAM3 Exception_cpu(int) REGPARAM;
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extern void NMI (void);
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extern void doint (void);
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extern void dump_counts (void);
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extern int m68k_move2c (int, uae_u32 *);
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@ -324,7 +301,9 @@ extern void init_m68k (void);
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extern void m68k_go (int);
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extern int getDivu68kCycles(uae_u32 dividend, uae_u16 divisor);
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extern int getDivs68kCycles(uae_s32 dividend, uae_s16 divisor);
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extern void divbyzero_special (bool issigned, uae_s32 dst);
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extern void protect_roms (bool);
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extern bool is_hardreset(void);
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STATIC_INLINE int bitset_count16(uae_u16 data)
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{
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@ -342,7 +321,7 @@ STATIC_INLINE int bitset_count16(uae_u16 data)
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}
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extern void mmu_op (uae_u32, uae_u32);
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extern void mmu_op30 (uaecptr, uae_u32, uae_u16, uaecptr);
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extern bool mmu_op30 (uaecptr, uae_u32, uae_u16, uaecptr);
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extern void fpuop_arithmetic(uae_u32, uae_u16);
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extern void fpuop_dbcc(uae_u32, uae_u16);
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@ -351,15 +330,17 @@ extern void fpuop_trapcc(uae_u32, uaecptr, uae_u16);
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extern void fpuop_bcc(uae_u32, uaecptr, uae_u32);
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extern void fpuop_save(uae_u32);
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extern void fpuop_restore(uae_u32);
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extern uae_u32 fpp_get_fpsr (void);
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extern void fpu_reset (void);
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extern bool fpu_get_constant(fpdata *fp, int cr);
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extern int fpp_cond(int condition);
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extern void exception3 (uae_u32 opcode, uaecptr addr);
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extern void exception3_read(uae_u32 opcode, uaecptr addr);
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extern void exception3_write(uae_u32 opcode, uaecptr addr);
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extern void exception3_notinstruction(uae_u32 opcode, uaecptr addr);
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extern void exception3i (uae_u32 opcode, uaecptr addr);
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extern void exception3b (uae_u32 opcode, uaecptr addr, bool w, bool i, uaecptr pc);
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extern void exception2 (uaecptr addr);
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extern void exception2_fake (uaecptr addr);
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extern void exception2 (uaecptr addr, bool read, int size, uae_u32 fc);
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extern void cpureset (void);
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extern void cpu_halt (int id);
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@ -369,27 +350,45 @@ extern void fill_prefetch (void);
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/* 68040 */
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extern const struct cputbl op_smalltbl_1_ff[];
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extern const struct cputbl op_smalltbl_41_ff[];
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/* 68030 */
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extern const struct cputbl op_smalltbl_2_ff[];
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extern const struct cputbl op_smalltbl_42_ff[];
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/* 68020 */
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extern const struct cputbl op_smalltbl_3_ff[];
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extern const struct cputbl op_smalltbl_43_ff[];
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/* 68010 */
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extern const struct cputbl op_smalltbl_4_ff[];
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extern const struct cputbl op_smalltbl_44_ff[];
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extern const struct cputbl op_smalltbl_11_ff[]; // prefetch
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/* 68000 */
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extern const struct cputbl op_smalltbl_5_ff[];
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extern const struct cputbl op_smalltbl_45_ff[];
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extern const struct cputbl op_smalltbl_12_ff[]; // prefetch
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extern cpuop_func *cpufunctbl[65536] ASM_SYM_FOR_FUNC ("cpufunctbl");
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#ifdef JIT
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extern void (*flush_icache)(uaecptr, int);
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extern void flush_icache(int);
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extern void flush_icache_hard(int);
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extern void compemu_reset(void);
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extern bool check_prefs_changed_comp (void);
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#else
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#define flush_icache(uaecptr, int) do {} while (0)
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#define flush_icache(int) do {} while (0)
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#define flush_icache_hard(int) do {} while (0)
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#endif
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bool check_prefs_changed_comp (bool);
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extern int movec_illg (int regno);
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#endif /* _NEWCPU_H */
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#define CPU_HALT_BUS_ERROR_DOUBLE_FAULT 1
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#define CPU_HALT_DOUBLE_FAULT 2
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#define CPU_HALT_OPCODE_FETCH_FROM_NON_EXISTING_ADDRESS 3
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#define CPU_HALT_ALL_CPUS_STOPPED 5
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#define CPU_HALT_FAKE_DMA 6
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#define CPU_HALT_AUTOCONFIG_CONFLICT 7
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#define CPU_HALT_PCI_CONFLICT 8
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#define CPU_HALT_CPU_STUCK 9
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#define CPU_HALT_SSP_IN_NON_EXISTING_ADDRESS 10
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#define CPU_HALT_INVALID_START_ADDRESS 11
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#endif /* UAE_NEWCPU_H */
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