379 lines
9 KiB
C
379 lines
9 KiB
C
/*
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* newcpu.h - CPU emulation
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*
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* Copyright (c) 2009 ARAnyM dev team (see AUTHORS)
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*
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* Inspired by Christian Bauer's Basilisk II
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*
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* This file is part of the ARAnyM project which builds a new and powerful
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* TOS/FreeMiNT compatible virtual machine running on almost any hardware.
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*
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* ARAnyM is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* ARAnyM is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with ARAnyM; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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/*
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* UAE - The Un*x Amiga Emulator
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*
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* MC68000 emulation
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*
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* Copyright 1995 Bernd Schmidt
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*/
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#ifndef _NEWCPU_H
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#define _NEWCPU_H
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#include "readcpu.h"
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#include "machdep/m68k.h"
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#include "memory.h"
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extern const int areg_byteinc[];
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extern const int imm8_table[];
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extern int movem_index1[256];
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extern int movem_index2[256];
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extern int movem_next[256];
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#ifdef FPUEMU
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extern int fpp_movem_index1[256];
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extern int fpp_movem_index2[256];
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extern int fpp_movem_next[256];
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#endif
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typedef uae_u32 REGPARAM3 cpuop_func (uae_u32) REGPARAM;
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typedef void REGPARAM3 cpuop_func_ce (uae_u32) REGPARAM;
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struct cputbl {
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cpuop_func *handler;
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uae_u16 opcode;
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};
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#ifdef JIT
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typedef uae_u32 REGPARAM3 compop_func (uae_u32) REGPARAM;
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struct comptbl {
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compop_func *handler;
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uae_u32 specific;
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uae_u32 opcode;
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};
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#endif
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extern uae_u32 REGPARAM3 op_illg (uae_u32) REGPARAM;
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extern void REGPARAM3 op_unimpl (uae_u16) REGPARAM;
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typedef uae_u8 flagtype;
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#ifdef FPUEMU
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#if USE_LONG_DOUBLE
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typedef long double fptype;
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#define LDPTR tbyte ptr
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#else
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typedef double fptype;
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#define LDPTR qword ptr
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#endif
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#endif
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typedef struct
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{
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fptype fp;
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#ifdef USE_SOFT_LONG_DOUBLE
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bool fpx;
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uae_u32 fpm;
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uae_u64 fpe;
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#endif
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} fpdata;
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struct regstruct
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{
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uae_u32 regs[16];
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struct flag_struct ccrflags;
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uae_u32 pc;
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uae_u8 *pc_p;
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uae_u8 *pc_oldp;
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uae_u32 instruction_pc;
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uae_u16 irc, ir;
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uae_u32 spcflags;
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uaecptr usp, isp, msp;
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uae_u16 sr;
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flagtype t1;
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flagtype t0;
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flagtype s;
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flagtype m;
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flagtype x;
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flagtype stopped;
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int halted;
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int intmask;
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uae_u32 vbr,sfc,dfc;
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#ifdef FPUEMU
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fpdata fp[8];
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fpdata fp_result;
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uae_u32 fp_result_status;
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uae_u32 fpcr,fpsr, fpiar;
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uae_u32 fpu_state;
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uae_u32 fpu_exp_state;
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fpdata exp_src1, exp_src2;
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uae_u32 exp_pack[3];
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uae_u16 exp_opcode, exp_extra, exp_type;
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bool fp_exception;
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#endif
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#ifndef CPUEMU_68000_ONLY
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uae_u32 cacr, caar;
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uae_u32 itt0, itt1, dtt0, dtt1;
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uae_u32 tcr, mmusr, urp, srp, buscr;
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#endif
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uae_u32 pcr;
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uae_u32 address_space_mask;
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uae_u8 panic;
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uae_u32 panic_pc, panic_addr;
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signed long pissoff;
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};
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extern unsigned long nextevent, is_syncline, currcycle;
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extern struct regstruct regs;
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#include "events.h"
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STATIC_INLINE uae_u32 munge24(uae_u32 x)
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{
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return x & regs.address_space_mask;
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}
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extern int cpu_cycles;
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extern bool m68k_pc_indirect;
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STATIC_INLINE void set_special (uae_u32 x)
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{
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regs.spcflags |= x;
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cycles_do_special();
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}
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STATIC_INLINE void unset_special (uae_u32 x)
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{
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regs.spcflags &= ~x;
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}
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#define m68k_dreg(r,num) ((r).regs[(num)])
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#define m68k_areg(r,num) (((r).regs + 8)[(num)])
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/* direct (regs.pc_p) access */
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STATIC_INLINE void m68k_setpc (uaecptr newpc)
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{
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regs.pc_p = regs.pc_oldp = get_real_address (newpc);
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regs.instruction_pc = regs.pc = newpc;
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}
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STATIC_INLINE uaecptr m68k_getpc (void)
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{
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return (uaecptr)(regs.pc + ((uae_u8*)regs.pc_p - (uae_u8*)regs.pc_oldp));
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}
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#define M68K_GETPC m68k_getpc()
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#define m68k_incpc(o) ((regs).pc_p += (o))
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#define get_dibyte(o) do_get_mem_byte((uae_u8 *)((regs).pc_p + (o) + 1))
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#define get_diword(o) do_get_mem_word((uae_u16 *)((regs).pc_p + (o)))
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#define get_dilong(o) do_get_mem_long((uae_u32 *)((regs).pc_p + (o)))
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STATIC_INLINE uae_u32 next_diword (void)
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{
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uae_u32 r = do_get_mem_word((uae_u16 *)((regs).pc_p));
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m68k_incpc (2);
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return r;
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}
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STATIC_INLINE uae_u32 next_dilong (void)
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{
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uae_u32 r = do_get_mem_long((uae_u32 *)((regs).pc_p));
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m68k_incpc (4);
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return r;
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}
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STATIC_INLINE void m68k_do_bsr (uaecptr oldpc, uae_s32 offset)
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{
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m68k_areg(regs, 7) -= 4;
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put_long(m68k_areg(regs, 7), oldpc);
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m68k_incpc (offset);
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}
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STATIC_INLINE void m68k_do_rts (void)
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{
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uae_u32 newpc = get_long (m68k_areg (regs, 7));
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m68k_setpc (newpc);
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m68k_areg(regs, 7) += 4;
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}
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/* indirect (regs.pc) access */
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#define m68k_setpci(newpc) (regs.instruction_pc = regs.pc = newpc)
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STATIC_INLINE uaecptr m68k_getpci(void)
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{
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return regs.pc;
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}
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#define m68k_incpci(o) (regs.pc += (o))
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STATIC_INLINE void m68k_do_bsri(uaecptr oldpc, uae_s32 offset)
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{
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m68k_areg(regs, 7) -= 4;
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put_long(m68k_areg(regs, 7), oldpc);
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m68k_incpci(offset);
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}
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STATIC_INLINE void m68k_do_rtsi(void)
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{
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uae_u32 newpc = get_long(m68k_areg(regs, 7));
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m68k_setpci(newpc);
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m68k_areg(regs, 7) += 4;
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}
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/* common access */
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STATIC_INLINE void m68k_incpc_normal(int o)
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{
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if (m68k_pc_indirect)
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m68k_incpci(o);
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else
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m68k_incpc(o);
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}
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STATIC_INLINE void m68k_setpc_normal(uaecptr pc)
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{
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if (m68k_pc_indirect) {
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regs.pc_p = regs.pc_oldp = 0;
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m68k_setpci(pc);
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}
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else {
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m68k_setpc(pc);
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}
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}
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#define x_get_word get_word
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#define x_get_long get_long
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#define x_put_word put_word
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#define x_put_long put_long
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#define x_cp_put_long put_long
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#define x_cp_put_word put_word
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#define x_cp_put_byte put_byte
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#define x_cp_get_long get_long
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#define x_cp_get_word get_word
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#define x_cp_get_byte get_byte
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#define x_cp_next_iword() next_diword()
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#define x_cp_next_ilong() next_dilong()
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#define x_cp_get_disp_ea_020(base,idx) _get_disp_ea_020(base)
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#define x_do_cycles(c) do_cycles(c)
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extern void m68k_setstopped (void);
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extern void m68k_resumestopped (void);
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#define get_disp_ea_020(base,idx) _get_disp_ea_020(base)
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extern uae_u32 REGPARAM3 _get_disp_ea_020 (uae_u32 base) REGPARAM;
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extern uae_u32 REGPARAM3 get_bitfield (uae_u32 src, uae_u32 bdata[2], uae_s32 offset, int width) REGPARAM;
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extern void REGPARAM3 put_bitfield (uae_u32 dst, uae_u32 bdata[2], uae_u32 val, uae_s32 offset, int width) REGPARAM;
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extern int get_cpu_model(void);
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extern void set_cpu_caches (bool flush);
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extern void REGPARAM3 MakeSR (void) REGPARAM;
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extern void REGPARAM3 MakeFromSR (void) REGPARAM;
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extern void REGPARAM3 Exception (int) REGPARAM;
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extern void doint (void);
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extern void dump_counts (void);
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extern int m68k_move2c (int, uae_u32 *);
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extern int m68k_movec2 (int, uae_u32 *);
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extern void m68k_divl (uae_u32, uae_u32, uae_u16);
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extern void m68k_mull (uae_u32, uae_u32, uae_u16);
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extern void init_m68k (void);
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extern void m68k_go (int);
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extern int getDivu68kCycles(uae_u32 dividend, uae_u16 divisor);
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extern int getDivs68kCycles(uae_s32 dividend, uae_s16 divisor);
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extern void protect_roms (bool);
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STATIC_INLINE int bitset_count16(uae_u16 data)
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{
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unsigned int const MASK1 = 0x5555;
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unsigned int const MASK2 = 0x3333;
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unsigned int const MASK4 = 0x0f0f;
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unsigned int const MASK6 = 0x003f;
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unsigned int const w = (data & MASK1) + ((data >> 1) & MASK1);
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unsigned int const x = (w & MASK2) + ((w >> 2) & MASK2);
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unsigned int const y = ((x + (x >> 4)) & MASK4);
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unsigned int const z = (y + (y >> 8)) & MASK6;
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return z;
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}
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extern void mmu_op (uae_u32, uae_u32);
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extern void mmu_op30 (uaecptr, uae_u32, uae_u16, uaecptr);
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extern void fpuop_arithmetic(uae_u32, uae_u16);
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extern void fpuop_dbcc(uae_u32, uae_u16);
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extern void fpuop_scc(uae_u32, uae_u16);
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extern void fpuop_trapcc(uae_u32, uaecptr, uae_u16);
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extern void fpuop_bcc(uae_u32, uaecptr, uae_u32);
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extern void fpuop_save(uae_u32);
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extern void fpuop_restore(uae_u32);
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extern void fpu_reset (void);
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extern bool fpu_get_constant(fpdata *fp, int cr);
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extern int fpp_cond(int condition);
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extern void exception3 (uae_u32 opcode, uaecptr addr);
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extern void exception3i (uae_u32 opcode, uaecptr addr);
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extern void exception3b (uae_u32 opcode, uaecptr addr, bool w, bool i, uaecptr pc);
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extern void exception2 (uaecptr addr);
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extern void exception2_fake (uaecptr addr);
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extern void cpureset (void);
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extern void cpu_halt (int id);
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extern void fill_prefetch (void);
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#define CPU_OP_NAME(a) op ## a
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/* 68040 */
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extern const struct cputbl op_smalltbl_1_ff[];
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/* 68030 */
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extern const struct cputbl op_smalltbl_2_ff[];
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/* 68020 */
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extern const struct cputbl op_smalltbl_3_ff[];
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/* 68010 */
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extern const struct cputbl op_smalltbl_4_ff[];
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extern const struct cputbl op_smalltbl_11_ff[]; // prefetch
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/* 68000 */
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extern const struct cputbl op_smalltbl_5_ff[];
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extern const struct cputbl op_smalltbl_12_ff[]; // prefetch
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extern cpuop_func *cpufunctbl[65536] ASM_SYM_FOR_FUNC ("cpufunctbl");
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#ifdef JIT
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extern void (*flush_icache)(uaecptr, int);
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extern void compemu_reset(void);
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extern bool check_prefs_changed_comp (void);
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#else
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#define flush_icache(uaecptr, int) do {} while (0)
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#endif
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extern int movec_illg (int regno);
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#endif /* _NEWCPU_H */
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