Added 68000 cycle-exact mode #780
- Added HWInfo panel - Added floppy disk Info dialog - Added support for VHD Dynamic hardfiles #749
This commit is contained in:
Dimitris Panokostas
parent
1524db0c22
commit
4069d4a918
72 changed files with 447698 additions and 157099 deletions
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@ -171,6 +171,7 @@ LOCAL_SRC_FILES := src/archivers/7z/BraIA64.c \
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src/osdep/gui/SelectorEntry.cpp \
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src/osdep/gui/ShowHelp.cpp \
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src/osdep/gui/ShowMessage.cpp \
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src/osdep/gui/ShowDiskInfo.cpp \
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src/osdep/gui/SelectFolder.cpp \
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src/osdep/gui/SelectFile.cpp \
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src/osdep/gui/CreateFilesysHardfile.cpp \
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@ -188,6 +189,7 @@ LOCAL_SRC_FILES := src/archivers/7z/BraIA64.c \
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src/osdep/gui/PanelFloppy.cpp \
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src/osdep/gui/PanelHD.cpp \
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src/osdep/gui/PanelRTG.cpp \
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src/osdep/gui/PanelHWInfo.cpp \
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src/osdep/gui/PanelInput.cpp \
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src/osdep/gui/PanelDisplay.cpp \
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src/osdep/gui/PanelSound.cpp \
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@ -212,6 +214,7 @@ LOCAL_SRC_FILES += src/newcpu.cpp \
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src/cpuemu_0.cpp \
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src/cpuemu_4.cpp \
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src/cpuemu_11.cpp \
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src/cpuemu_13.cpp \
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src/cpuemu_40.cpp \
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src/cpuemu_44.cpp \
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src/jit/compemu.cpp \
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@ -63,20 +63,20 @@ set(SRC_FILES
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src/cd32_fmv.cpp
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src/cd32_fmv_genlock.cpp
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src/cdrom.cpp
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src/cdtv.cpp
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src/cdtvcr.cpp
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src/cdtv.cpp
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src/cdtvcr.cpp
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src/cfgfile.cpp
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src/cia.cpp
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src/consolehook.cpp
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src/consolehook.cpp
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src/crc32.cpp
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src/custom.cpp
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src/def_icons.cpp
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src/def_icons.cpp
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src/devices.cpp
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src/disk.cpp
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src/diskutil.cpp
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src/dlopen.cpp
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src/dlopen.cpp
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src/drawing.cpp
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src/driveclick.cpp
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src/driveclick.cpp
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src/events.cpp
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src/expansion.cpp
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src/fdi2raw.cpp
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@ -93,7 +93,7 @@ set(SRC_FILES
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src/ide.cpp
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src/ini.cpp
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src/inputdevice.cpp
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src/isofs.cpp
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src/isofs.cpp
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src/keybuf.cpp
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src/main.cpp
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src/memory.cpp
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@ -101,15 +101,15 @@ set(SRC_FILES
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src/rommgr.cpp
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src/rtc.cpp
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src/savestate.cpp
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src/scp.cpp
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src/scp.cpp
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src/scsi.cpp
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src/scsiemul.cpp
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src/scsiemul.cpp
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src/scsitape.cpp
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src/statusline.cpp
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src/tabletlibrary.cpp
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src/tinyxml2.cpp
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src/tabletlibrary.cpp
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src/tinyxml2.cpp
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src/traps.cpp
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src/uaeexe.cpp
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src/uaeexe.cpp
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src/uaelib.cpp
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src/uaenative.cpp
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src/uaeresource.cpp
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@ -166,7 +166,7 @@ set(SRC_FILES
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src/osdep/cda_play.cpp
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src/osdep/charset.cpp
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src/osdep/fsdb_host.cpp
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src/osdep/clipboard.cpp
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src/osdep/clipboard.cpp
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src/osdep/amiberry_hardfile.cpp
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src/osdep/keyboard.cpp
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src/osdep/mp3decoder.cpp
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@ -181,12 +181,13 @@ set(SRC_FILES
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src/osdep/amiberry_mem.cpp
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src/osdep/amiberry_whdbooter.cpp
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src/osdep/sigsegv_handler.cpp
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src/osdep/retroarch.cpp
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src/osdep/retroarch.cpp
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src/sounddep/sound.cpp
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src/threaddep/threading.cpp
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src/osdep/gui/SelectorEntry.cpp
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src/osdep/gui/ShowHelp.cpp
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src/osdep/gui/ShowMessage.cpp
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src/osdep/gui/ShowDiskInfo.cpp
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src/osdep/gui/SelectFolder.cpp
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src/osdep/gui/SelectFile.cpp
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src/osdep/gui/CreateFilesysHardfile.cpp
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@ -204,11 +205,12 @@ set(SRC_FILES
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src/osdep/gui/PanelFloppy.cpp
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src/osdep/gui/PanelHD.cpp
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src/osdep/gui/PanelRTG.cpp
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src/osdep/gui/PanelHWInfo.cpp
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src/osdep/gui/PanelInput.cpp
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src/osdep/gui/PanelDisplay.cpp
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src/osdep/gui/PanelSound.cpp
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src/osdep/gui/PanelMisc.cpp
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src/osdep/gui/PanelPrio.cpp
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src/osdep/gui/PanelPrio.cpp
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src/osdep/gui/PanelSavestate.cpp
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src/osdep/gui/main_window.cpp
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src/osdep/gui/Navigation.cpp
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@ -220,6 +222,7 @@ set(SRC_FILES
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src/cpuemu_0.cpp
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src/cpuemu_4.cpp
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src/cpuemu_11.cpp
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src/cpuemu_13.cpp
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src/cpuemu_40.cpp
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src/cpuemu_44.cpp
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src/jit/compemu.cpp
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@ -143,6 +143,7 @@ add_executable(amiberry
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src/osdep/gui/SelectorEntry.cpp
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src/osdep/gui/ShowHelp.cpp
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src/osdep/gui/ShowMessage.cpp
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src/osdep/gui/ShowDiskInfo.cpp
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src/osdep/gui/SelectFolder.cpp
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src/osdep/gui/SelectFile.cpp
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src/osdep/gui/CreateFilesysHardfile.cpp
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@ -160,6 +161,7 @@ add_executable(amiberry
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src/osdep/gui/PanelFloppy.cpp
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src/osdep/gui/PanelHD.cpp
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src/osdep/gui/PanelRTG.cpp
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src/osdep/gui/PanelHWInfo.cpp
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src/osdep/gui/PanelInput.cpp
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src/osdep/gui/PanelDisplay.cpp
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src/osdep/gui/PanelSound.cpp
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@ -176,6 +178,7 @@ add_executable(amiberry
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src/cpuemu_0.cpp
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src/cpuemu_4.cpp
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src/cpuemu_11.cpp
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src/cpuemu_13.cpp
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src/cpuemu_40.cpp
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src/cpuemu_44.cpp
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src/jit/compemu.cpp
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3
Makefile
3
Makefile
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@ -416,6 +416,7 @@ OBJS = \
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src/osdep/gui/SelectorEntry.o \
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src/osdep/gui/ShowHelp.o \
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src/osdep/gui/ShowMessage.o \
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src/osdep/gui/ShowDiskInfo.o \
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src/osdep/gui/SelectFolder.o \
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src/osdep/gui/SelectFile.o \
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src/osdep/gui/CreateFilesysHardfile.o \
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@ -433,6 +434,7 @@ OBJS = \
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src/osdep/gui/PanelFloppy.o \
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src/osdep/gui/PanelHD.o \
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src/osdep/gui/PanelRTG.o \
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src/osdep/gui/PanelHWInfo.o \
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src/osdep/gui/PanelInput.o \
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src/osdep/gui/PanelDisplay.o \
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src/osdep/gui/PanelSound.o \
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@ -469,6 +471,7 @@ OBJS += src/newcpu.o \
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src/cpuemu_0.o \
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src/cpuemu_4.o \
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src/cpuemu_11.o \
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src/cpuemu_13.o \
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src/cpuemu_40.o \
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src/cpuemu_44.o \
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src/jit/compemu.o \
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@ -472,6 +472,7 @@
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<ClCompile Include="..\src\cpuemu_11.cpp">
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<DeploymentContent>false</DeploymentContent>
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</ClCompile>
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<ClCompile Include="..\src\cpuemu_13.cpp" />
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<ClCompile Include="..\src\cpuemu_4.cpp">
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<DeploymentContent>false</DeploymentContent>
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</ClCompile>
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@ -596,6 +597,7 @@
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<ClCompile Include="..\src\osdep\gui\PanelDisplay.cpp" />
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<ClCompile Include="..\src\osdep\gui\PanelFloppy.cpp" />
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<ClCompile Include="..\src\osdep\gui\PanelHD.cpp" />
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<ClCompile Include="..\src\osdep\gui\PanelHWInfo.cpp" />
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<ClCompile Include="..\src\osdep\gui\PanelInput.cpp" />
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<ClCompile Include="..\src\osdep\gui\PanelMisc.cpp" />
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<ClCompile Include="..\src\osdep\gui\PanelPaths.cpp" />
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@ -609,6 +611,7 @@
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<ClCompile Include="..\src\osdep\gui\SelectFile.cpp" />
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<ClCompile Include="..\src\osdep\gui\SelectFolder.cpp" />
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<ClCompile Include="..\src\osdep\gui\SelectorEntry.cpp" />
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<ClCompile Include="..\src\osdep\gui\ShowDiskInfo.cpp" />
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<ClCompile Include="..\src\osdep\gui\ShowHelp.cpp" />
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<ClCompile Include="..\src\osdep\gui\ShowMessage.cpp" />
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<ClCompile Include="..\src\osdep\amiberry_hardfile.cpp" />
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@ -898,6 +901,14 @@
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<ClInclude Include="..\src\sounddep\sound.h" />
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<ClInclude Include="..\src\threaddep\thread.h" />
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</ItemGroup>
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<ItemGroup>
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<Xml Include="..\abr\brainfile.xml">
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<DeploymentContent>true</DeploymentContent>
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</Xml>
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<Xml Include="..\abr\catlist.xml">
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<DeploymentContent>true</DeploymentContent>
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</Xml>
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</ItemGroup>
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<ItemDefinitionGroup Condition="'$(Configuration)|$(Platform)'=='Debug|ARM'">
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<RemotePostBuildEvent>
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<Command>cp ~/projects/Amiberry-Debug/amiberry ~/projects/amiberry/Amiberry-Debug</Command>
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@ -106,6 +106,9 @@
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<Filter Include="external\libguisan\src\widgets">
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<UniqueIdentifier>{7e937be4-82dd-473a-8771-4297ecb71d9f}</UniqueIdentifier>
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</Filter>
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<Filter Include="abr">
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<UniqueIdentifier>{0237defb-6fd3-462b-9161-eef347184a72}</UniqueIdentifier>
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</Filter>
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</ItemGroup>
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<ItemGroup>
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<Text Include="..\conf\dir.txt">
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@ -990,6 +993,15 @@
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<ClCompile Include="..\src\osdep\gui\PanelRTG.cpp">
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<Filter>src\osdep\gui</Filter>
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</ClCompile>
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<ClCompile Include="..\src\cpuemu_13.cpp">
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<Filter>src</Filter>
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</ClCompile>
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<ClCompile Include="..\src\osdep\gui\PanelHWInfo.cpp">
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<Filter>src\osdep\gui</Filter>
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</ClCompile>
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<ClCompile Include="..\src\osdep\gui\ShowDiskInfo.cpp">
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<Filter>src\osdep\gui</Filter>
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</ClCompile>
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</ItemGroup>
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<ItemGroup>
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<ClInclude Include="..\src\archivers\7z\7zBuf.h">
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@ -1683,4 +1695,12 @@
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<Filter>src\include</Filter>
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</ClInclude>
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</ItemGroup>
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<ItemGroup>
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<Xml Include="..\abr\brainfile.xml">
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<Filter>abr</Filter>
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</Xml>
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<Xml Include="..\abr\catlist.xml">
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<Filter>abr</Filter>
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</Xml>
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</ItemGroup>
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</Project>
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@ -67,7 +67,7 @@
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<RemoteDebuggerWorkingDirectory>~/projects/amiberry</RemoteDebuggerWorkingDirectory>
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<DebuggerFlavor>LinuxDebugger</DebuggerFlavor>
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<PreLaunchCommand>export DISPLAY=:0.0</PreLaunchCommand>
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<RemoteTarget>402471865;pi400 (username=, port=22, authentication=Password)</RemoteTarget>
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<RemoteTarget>-18943540;argon (username=, port=22, authentication=Password)</RemoteTarget>
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</PropertyGroup>
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<PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Release-DMX|ARM64'">
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<RemoteDebuggerCommand>~/projects/amiberry/Amiberry-Release</RemoteDebuggerCommand>
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@ -267,6 +267,7 @@
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<ClCompile Include="..\..\src\cpudefs.cpp" />
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<ClCompile Include="..\..\src\cpuemu_0.cpp" />
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<ClCompile Include="..\..\src\cpuemu_11.cpp" />
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<ClCompile Include="..\..\src\cpuemu_13.cpp" />
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<ClCompile Include="..\..\src\cpuemu_4.cpp" />
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<ClCompile Include="..\..\src\cpuemu_40.cpp" />
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<ClCompile Include="..\..\src\cpuemu_44.cpp" />
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@ -336,6 +337,7 @@
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<ClCompile Include="..\..\src\osdep\gui\PanelDisplay.cpp" />
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<ClCompile Include="..\..\src\osdep\gui\PanelFloppy.cpp" />
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<ClCompile Include="..\..\src\osdep\gui\PanelHD.cpp" />
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<ClCompile Include="..\..\src\osdep\gui\PanelHWInfo.cpp" />
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<ClCompile Include="..\..\src\osdep\gui\PanelInput.cpp" />
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<ClCompile Include="..\..\src\osdep\gui\PanelMisc.cpp" />
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<ClCompile Include="..\..\src\osdep\gui\PanelPaths.cpp" />
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@ -349,6 +351,7 @@
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<ClCompile Include="..\..\src\osdep\gui\SelectFile.cpp" />
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<ClCompile Include="..\..\src\osdep\gui\SelectFolder.cpp" />
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<ClCompile Include="..\..\src\osdep\gui\SelectorEntry.cpp" />
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<ClCompile Include="..\..\src\osdep\gui\ShowDiskInfo.cpp" />
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<ClCompile Include="..\..\src\osdep\gui\ShowHelp.cpp" />
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<ClCompile Include="..\..\src\osdep\gui\ShowMessage.cpp" />
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<ClCompile Include="..\..\src\osdep\keyboard.cpp" />
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@ -682,6 +682,15 @@
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<ClCompile Include="..\..\src\osdep\gui\PanelRTG.cpp">
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<Filter>Source files\osdep\gui</Filter>
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</ClCompile>
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<ClCompile Include="..\..\src\osdep\gui\PanelHWInfo.cpp">
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<Filter>Source files\osdep\gui</Filter>
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</ClCompile>
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<ClCompile Include="..\..\src\osdep\gui\ShowDiskInfo.cpp">
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<Filter>Source files\osdep\gui</Filter>
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</ClCompile>
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<ClCompile Include="..\..\src\cpuemu_13.cpp">
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<Filter>Source files</Filter>
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</ClCompile>
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</ItemGroup>
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<ItemGroup>
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<ClInclude Include="..\..\src\threaddep\thread.h">
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19472
abr/brainfile.xml
Normal file
19472
abr/brainfile.xml
Normal file
File diff suppressed because it is too large
Load diff
79
abr/catlist.xml
Normal file
79
abr/catlist.xml
Normal file
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@ -0,0 +1,79 @@
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<?xml version="1.0" encoding="utf-8" standalone="yes"?>
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<Categories>
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<Category>
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<Name>Standard</Name>
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<abbrev>s</abbrev>
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<Colour>Black</Colour>
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</Category>
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<Category>
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<Name>Utility</Name>
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<abbrev>u</abbrev>
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<Colour>Blue</Colour>
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</Category>
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<Category>
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<Name>Virus</Name>
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<abbrev>v</abbrev>
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<Colour>Red</Colour>
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</Category>
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<Category>
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<Name>Boot Game</Name>
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<abbrev>g</abbrev>
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<Colour>Green</Colour>
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</Category>
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<Category>
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<Name>Boot loader</Name>
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<abbrev>bl</abbrev>
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<Colour>Orange</Colour>
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</Category>
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||||
<Category>
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||||
<Name>Logo</Name>
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||||
<abbrev>l</abbrev>
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||||
<Colour>DarkBlue</Colour>
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||||
</Category>
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||||
<Category>
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||||
<Name>Bootintro</Name>
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<abbrev>i</abbrev>
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<Colour>Brown</Colour>
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</Category>
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<Category>
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||||
<Name>Copy protection</Name>
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<abbrev>p</abbrev>
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||||
<Colour>YellowGreen</Colour>
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||||
</Category>
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||||
<Category>
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||||
<Name>X-Copy Bootblock</Name>
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||||
<abbrev>xc</abbrev>
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||||
<Colour>Purple</Colour>
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</Category>
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<Category>
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<Name>Scroller</Name>
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||||
<abbrev>sc</abbrev>
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||||
<Colour>Fuchsia</Colour>
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</Category>
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||||
<Category>
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||||
<Name>Boot Menu</Name>
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||||
<abbrev>bm</abbrev>
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||||
<Colour>Lime</Colour>
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||||
</Category>
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||||
<Category>
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||||
<Name>RAM Switch</Name>
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||||
<abbrev>rs</abbrev>
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||||
<Colour>Aqua</Colour>
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</Category>
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||||
<Category>
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||||
<Name>Virus Free Message</Name>
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||||
<abbrev>vfm</abbrev>
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||||
<Colour>Fuchsia</Colour>
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||||
</Category>
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<Category>
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||||
<Name>Demoscene</Name>
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<abbrev>ds</abbrev>
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||||
<Colour>Brown</Colour>
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</Category>
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<Category>
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<Name>Game</Name>
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<abbrev>ga</abbrev>
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||||
<Colour>Green</Colour>
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</Category>
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||||
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</Categories>
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@ -1564,43 +1564,17 @@ static void audio_state_channel2 (int nr, bool perfin)
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if (!chan_ena && old_dma) {
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// DMA switched off, state=2/3 and "too fast CPU": set flag
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||||
cdp->dmaofftime_active = true;
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cdp->dmaofftime_cpu_cnt = regs.instruction_cnt;
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||||
cdp->dmaofftime_pc = M68K_GETPC;
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}
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// check if CPU executed at least 60 instructions (if JIT is off), there are stupid code that
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||||
// disable audio DMA, then set new sample, then re-enable without actually wanting to start
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||||
// new sample immediately.
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||||
if (cdp->dmaofftime_active && !old_dma && chan_ena) {
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||||
static int warned = 100;
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||||
// We are still in state=2/3 and program is going to re-enable
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||||
// DMA. Force state to zero to prevent CPU timed DMA wait
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||||
// routines in common tracker players to lose notes.
|
||||
if (usehacks() && (currprefs.cachesize || (regs.instruction_cnt - cdp->dmaofftime_cpu_cnt) >= 60)) {
|
||||
if (warned >= 0) {
|
||||
warned--;
|
||||
write_log(_T("Audio %d DMA wait hack: ENABLED. OFF=%08x, ON=%08x\n"), nr, cdp->dmaofftime_pc, M68K_GETPC);
|
||||
}
|
||||
#if DEBUG_AUDIO_HACK > 0
|
||||
if (debugchannel(nr))
|
||||
write_log(_T("%d: INSTADMAOFF\n"), nr, M68K_GETPC);
|
||||
#endif
|
||||
newsample(nr, (cdp->dat2 >> 0) & 0xff);
|
||||
zerostate(nr);
|
||||
} else {
|
||||
if (warned >= 0) {
|
||||
warned--;
|
||||
write_log(_T("Audio %d DMA wait hack: DISABLED. OFF=%08x, ON=%08x\n"), nr, cdp->dmaofftime_pc, M68K_GETPC);
|
||||
}
|
||||
}
|
||||
cdp->dmaofftime_active = false;
|
||||
}
|
||||
}
|
||||
|
||||
#if DEBUG_AUDIO > 0
|
||||
if (debugchannel (nr) && old_dma != chan_ena) {
|
||||
write_log (_T("%d:DMA=%d IRQ=%d PC=%08x\n"), nr, chan_ena, isirq (nr) ? 1 : 0, M68K_GETPC);
|
||||
}
|
||||
#endif
|
||||
switch (cdp->state)
|
||||
{
|
||||
case 0:
|
||||
|
|
@ -1616,27 +1590,14 @@ static void audio_state_channel2 (int nr, bool perfin)
|
|||
if (cdp->wlen > 2)
|
||||
cdp->ptx_tofetch = true;
|
||||
cdp->dsr = true;
|
||||
#if TEST_AUDIO > 0
|
||||
cdp->have_dat = false;
|
||||
#endif
|
||||
#if DEBUG_AUDIO > 0
|
||||
if (debugchannel (nr)) {
|
||||
write_log (_T("%d:0>1: LEN=%d PC=%08x\n"), nr, cdp->wlen, M68K_GETPC);
|
||||
}
|
||||
#endif
|
||||
} else if (cdp->dat_written && !isirq (nr)) {
|
||||
cdp->state = 2;
|
||||
setirq (nr, 0);
|
||||
loaddat (nr);
|
||||
if (usehacks() && cdp->per < 10 * CYCLE_UNIT) {
|
||||
static int warned = 100;
|
||||
// make sure audio.device AUDxDAT startup returns to idle state before DMA is enabled
|
||||
newsample (nr, (cdp->dat2 >> 0) & 0xff);
|
||||
zerostate (nr);
|
||||
if (warned > 0) {
|
||||
write_log(_T("AUD%d: forced idle state PER=%d PC=%08x\n"), nr, cdp->per, M68K_GETPC);
|
||||
warned--;
|
||||
}
|
||||
} else {
|
||||
cdp->pbufldl = true;
|
||||
audio_state_channel2 (nr, false);
|
||||
|
|
|
|||
|
|
@ -73,12 +73,12 @@ static int blit_cyclecounter, blit_waitcyclecounter;
|
|||
static int blit_maxcyclecounter, blit_slowdown, blit_totalcyclecounter;
|
||||
static int blit_misscyclecounter;
|
||||
|
||||
//#ifdef CPUEMU_13
|
||||
#ifdef CPUEMU_13
|
||||
extern uae_u8 cycle_line[256];
|
||||
static int blitter_cyclecounter;
|
||||
static int blitter_hcounter;
|
||||
static int blitter_vcounter;
|
||||
//#endif
|
||||
#endif
|
||||
|
||||
static long blit_firstline_cycles;
|
||||
static long blit_first_cycle;
|
||||
|
|
@ -850,7 +850,7 @@ void blitter_handler (uae_u32 data)
|
|||
blitter_doit();
|
||||
}
|
||||
|
||||
//#ifdef CPUEMU_13
|
||||
#ifdef CPUEMU_13
|
||||
|
||||
static void blit_bltset(int con)
|
||||
{
|
||||
|
|
@ -1371,9 +1371,9 @@ end:
|
|||
|
||||
return written;
|
||||
}
|
||||
//#else
|
||||
//void decide_blitter (int hpos) { }
|
||||
//#endif
|
||||
#else
|
||||
void decide_blitter (int hpos) { }
|
||||
#endif
|
||||
|
||||
static void blitter_force_finish(bool state)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -8255,8 +8255,8 @@ static void set_68020_compa (struct uae_prefs *p, int compa, int cd32)
|
|||
p->blitter_cycle_exact = 1;
|
||||
p->m68k_speed = 0;
|
||||
if ((p->cpu_model == 68020 || p->cpu_model == 68030) && p->cachesize == 0) {
|
||||
p->cpu_cycle_exact = 1;
|
||||
p->cpu_memory_cycle_exact = 1;
|
||||
//p->cpu_cycle_exact = 1;
|
||||
//p->cpu_memory_cycle_exact = 1;
|
||||
if (p->cpu_model == 68020)
|
||||
p->cpu_clock_multiplier = 4 << 8;
|
||||
else
|
||||
|
|
@ -8267,7 +8267,7 @@ static void set_68020_compa (struct uae_prefs *p, int compa, int cd32)
|
|||
p->blitter_cycle_exact = 1;
|
||||
p->m68k_speed = 0;
|
||||
if ((p->cpu_model == 68020 || p->cpu_model == 68030) && p->cachesize == 0) {
|
||||
p->cpu_memory_cycle_exact = 1;
|
||||
//p->cpu_memory_cycle_exact = 1;
|
||||
if (p->cpu_model == 68020)
|
||||
p->cpu_clock_multiplier = 4 << 8;
|
||||
else
|
||||
|
|
@ -8309,7 +8309,7 @@ static void set_68000_compa (struct uae_prefs *p, int compa)
|
|||
switch (compa)
|
||||
{
|
||||
case 0:
|
||||
p->cpu_cycle_exact = p->cpu_memory_cycle_exact = p->blitter_cycle_exact = 1;
|
||||
//p->cpu_cycle_exact = p->cpu_memory_cycle_exact = p->blitter_cycle_exact = 1;
|
||||
break;
|
||||
case 1:
|
||||
break;
|
||||
|
|
|
|||
454
src/cpudefs.cpp
454
src/cpudefs.cpp
|
|
@ -3,457 +3,457 @@
|
|||
#include "readcpu.h"
|
||||
struct instr_def defs68k[] = {
|
||||
/* ORSR.B */
|
||||
{0x003C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{0,0},{0,0},{0,0},{0,0},{0,0}}, 0, 16,_T("ORSR.B #1"), 0, 0, 0, 0},
|
||||
{0x003C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{0,0},{0,0},{0,0},{0,0},{0,0}},0x00,0x10,_T("ORSR.B #1"), 0, 0, 0, 0},
|
||||
/* ORSR.W */
|
||||
{0x007C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,2,{{0,0},{0,0},{0,0},{0,0},{0,0}}, 4, 16,_T("ORSR.W #1"), 0, 0, 0, 0},
|
||||
{0x007C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,2,{{0,0},{0,0},{0,0},{0,0},{0,0}},0x04,0x10,_T("ORSR.W #1"), 0, 0, 0, 0},
|
||||
/* CHK2.z */
|
||||
{0x00C0, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xF9C0,2,5,0,{{1,1},{1,5},{1,0},{1,5},{1,0}}, 4, 17,_T("CHK2.z #1,s[!Dreg,Areg,Aipi,Apdi,Immd]"), 0, 0, 0, 0},
|
||||
{0x00C0, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xF9C0,2,5,0,{{1,1},{1,5},{1,0},{1,5},{1,0}},0x04,0x11,_T("CHK2.z #1,s[!Dreg,Areg,Aipi,Apdi,Immd]"), 0, 0, 0, 0},
|
||||
/* OR.z */
|
||||
{0x0000, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("OR.z #z,d[Dreg]"), 2, 0, 2, 3},
|
||||
{0x0000, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("OR.z #z,d[Dreg]"), 2, 0, 2, 3},
|
||||
/* OR.z */
|
||||
{0x0000, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("OR.z #z,d[!Areg,Dreg]"), 0, 1, 3, 3},
|
||||
{0x0000, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("OR.z #z,d[!Areg,Dreg]"), 0, 1, 3, 3},
|
||||
/* ANDSR.B */
|
||||
{0x023C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{0,0},{0,0},{0,0},{0,0},{0,0}}, 0, 16,_T("ANDSR.B #1"), 0, 0, 0, 0},
|
||||
{0x023C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{0,0},{0,0},{0,0},{0,0},{0,0}},0x00,0x10,_T("ANDSR.B #1"), 0, 0, 0, 0},
|
||||
/* ANDSR.W */
|
||||
{0x027C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,2,{{0,0},{0,0},{0,0},{0,0},{0,0}}, 4, 16,_T("ANDSR.W #1"), 0, 0, 0, 0},
|
||||
{0x027C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,2,{{0,0},{0,0},{0,0},{0,0},{0,0}},0x04,0x10,_T("ANDSR.W #1"), 0, 0, 0, 0},
|
||||
/* AND.z */
|
||||
{0x0200, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("AND.z #z,d[Dreg]"), 2, 0, 2, 3},
|
||||
{0x0200, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("AND.z #z,d[Dreg]"), 2, 0, 2, 3},
|
||||
/* AND.z */
|
||||
{0x0200, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("AND.z #z,d[!Areg,Dreg]"), 0, 1, 3, 3},
|
||||
{0x0200, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("AND.z #z,d[!Areg,Dreg]"), 0, 1, 3, 3},
|
||||
/* SUB.z */
|
||||
{0x0400, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("SUB.z #z,d[Dreg]"), 2, 0, 2, 3},
|
||||
{0x0400, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("SUB.z #z,d[Dreg]"), 2, 0, 2, 3},
|
||||
/* SUB.z */
|
||||
{0x0400, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("SUB.z #z,d[!Areg,Dreg]"), 0, 1, 3, 3},
|
||||
{0x0400, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("SUB.z #z,d[!Areg,Dreg]"), 0, 1, 3, 3},
|
||||
/* ADD.z */
|
||||
{0x0600, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("ADD.z #z,d[Dreg]"), 2, 0, 2, 3},
|
||||
{0x0600, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("ADD.z #z,d[Dreg]"), 2, 0, 2, 3},
|
||||
/* ADD.z */
|
||||
{0x0600, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("ADD.z #z,d[!Areg,Dreg]"), 0, 1, 3, 3},
|
||||
{0x0600, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("ADD.z #z,d[!Areg,Dreg]"), 0, 1, 3, 3},
|
||||
/* CALLM */
|
||||
{0x06C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,3,0,{{0,1},{0,1},{0,1},{0,1},{0,1}}, 0, 16,_T("CALLM s[!Dreg,Areg,Aipi,Apdi,Immd]"), 0, 0, 0, 0},
|
||||
{0x06C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,3,0,{{0,1},{0,1},{0,1},{0,1},{0,1}},0x00,0x10,_T("CALLM s[!Dreg,Areg,Aipi,Apdi,Immd]"), 0, 0, 0, 0},
|
||||
/* RTM */
|
||||
{0x06C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,3,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 3, 16,_T("RTM s[Dreg,Areg]"), 0, 0, 0, 0},
|
||||
{0x06C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,3,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x03,0x10,_T("RTM s[Dreg,Areg]"), 0, 0, 0, 0},
|
||||
/* BTST */
|
||||
{0x0800, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 17,_T("BTST #1,s[Dreg]"), 4, 0, 4, 0},
|
||||
{0x0800, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x11,_T("BTST #1,s[Dreg]"), 4, 0, 4, 0},
|
||||
/* BTST */
|
||||
{0x0800, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 17,_T("BTST #1,s[!Areg,Dreg,Immd]"), 0, 0, 4, 3},
|
||||
{0x0800, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x11,_T("BTST #1,s[!Areg,Dreg,Immd]"), 0, 0, 4, 3},
|
||||
/* BCHG */
|
||||
{0x0840, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 19,_T("BCHG #1,s[Dreg]"), 6, 0, 6, 0},
|
||||
{0x0840, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x13,_T("BCHG #1,s[Dreg]"), 6, 0, 6, 0},
|
||||
/* BCHG */
|
||||
{0x0840, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 19,_T("BCHG #1,s[!Areg,Dreg,Immd,PC8r,PC16]"), 0, 0, 6, 3},
|
||||
{0x0840, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x13,_T("BCHG #1,s[!Areg,Dreg,Immd,PC8r,PC16]"), 0, 0, 6, 3},
|
||||
/* BCLR */
|
||||
{0x0880, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 19,_T("BCLR #1,s[Dreg]"), 6, 0, 6, 0},
|
||||
{0x0880, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x13,_T("BCLR #1,s[Dreg]"), 6, 0, 6, 0},
|
||||
/* BCLR */
|
||||
{0x0880, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 19,_T("BCLR #1,s[!Areg,Dreg,Immd,PC8r,PC16]"), 0, 0, 6, 3},
|
||||
{0x0880, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x13,_T("BCLR #1,s[!Areg,Dreg,Immd,PC8r,PC16]"), 0, 0, 6, 3},
|
||||
/* BSET */
|
||||
{0x08C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 19,_T("BSET #1,s[Dreg]"), 6, 0, 6, 0},
|
||||
{0x08C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x13,_T("BSET #1,s[Dreg]"), 6, 0, 6, 0},
|
||||
/* BSET */
|
||||
{0x08C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 19,_T("BSET #1,s[!Areg,Dreg,Immd,PC8r,PC16]"), 0, 0, 6, 3},
|
||||
{0x08C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x13,_T("BSET #1,s[!Areg,Dreg,Immd,PC8r,PC16]"), 0, 0, 6, 3},
|
||||
/* EORSR.B */
|
||||
{0x0A3C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{0,0},{0,0},{0,0},{0,0},{0,0}}, 0, 16,_T("EORSR.B #1"), 0, 0, 0, 0},
|
||||
{0x0A3C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{0,0},{0,0},{0,0},{0,0},{0,0}},0x00,0x10,_T("EORSR.B #1"), 0, 0, 0, 0},
|
||||
/* EORSR.W */
|
||||
{0x0A7C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,2,{{0,0},{0,0},{0,0},{0,0},{0,0}}, 4, 16,_T("EORSR.W #1"), 0, 0, 0, 0},
|
||||
{0x0A7C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,2,{{0,0},{0,0},{0,0},{0,0},{0,0}},0x04,0x10,_T("EORSR.W #1"), 0, 0, 0, 0},
|
||||
/* EOR.z */
|
||||
{0x0A00, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("EOR.z #z,d[Dreg]"), 2, 0, 2, 3},
|
||||
{0x0A00, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("EOR.z #z,d[Dreg]"), 2, 0, 2, 3},
|
||||
/* EOR.z */
|
||||
{0x0A00, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("EOR.z #z,d[!Areg,Dreg]"), 0, 1, 3, 3},
|
||||
{0x0A00, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("EOR.z #z,d[!Areg,Dreg]"), 0, 1, 3, 3},
|
||||
/* CMP.z */
|
||||
{0x0C00, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 17,_T("CMP.z #z,s[Dreg]"), 2, 0, 2, 3},
|
||||
{0x0C00, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x11,_T("CMP.z #z,s[Dreg]"), 2, 0, 2, 3},
|
||||
/* CMP.z */
|
||||
{0x0C00, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 17,_T("CMP.z #z,s[!Areg,Dreg,Immd,PC8r,PC16]"), 0, 0, 2, 3},
|
||||
{0x0C00, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x11,_T("CMP.z #z,s[!Areg,Dreg,Immd,PC8r,PC16]"), 0, 0, 2, 3},
|
||||
/* CMP.z */
|
||||
{0x0C00, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,2,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 17,_T("CMP.z #z,s[PC8r,PC16]"), 0, 0, 2, 3},
|
||||
{0x0C00, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,2,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x11,_T("CMP.z #z,s[PC8r,PC16]"), 0, 0, 2, 3},
|
||||
/* CAS.B */
|
||||
{0x0AC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("CAS.B #1,s[!Dreg,Areg,Immd,PC8r,PC16]"), 0, 0, 0, 0},
|
||||
{0x0AC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("CAS.B #1,s[!Dreg,Areg,Immd,PC8r,PC16]"), 0, 0, 0, 0},
|
||||
/* CAS.W */
|
||||
{0x0CC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("CAS.W #1,s[!Dreg,Areg,Immd,PC8r,PC16]"), 0, 0, 0, 0},
|
||||
{0x0CC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("CAS.W #1,s[!Dreg,Areg,Immd,PC8r,PC16]"), 0, 0, 0, 0},
|
||||
/* CAS2.W */
|
||||
{0x0CFC, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,2,5,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 16,_T("CAS2.W #2"), 0, 0, 0, 0},
|
||||
{0x0CFC, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,2,5,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x10,_T("CAS2.W #2"), 0, 0, 0, 0},
|
||||
/* MOVES.z */
|
||||
{0x0E00, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,2,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 19,_T("MOVES.z #1,s[!Dreg,Areg,Immd,PC8r,PC16]"), 0, 0, 0, 0},
|
||||
{0x0E00, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,1,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x13,_T("MOVES.z #1,s[!Dreg,Areg,Immd,PC8r,PC16]"), 0, 0, 0, 0},
|
||||
/* CAS.L */
|
||||
{0x0EC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("CAS.L #1,s[!Dreg,Areg,Immd,PC8r,PC16]"), 0, 0, 0, 0},
|
||||
{0x0EC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("CAS.L #1,s[!Dreg,Areg,Immd,PC8r,PC16]"), 0, 0, 0, 0},
|
||||
/* CAS2.L */
|
||||
{0x0EFC, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,2,5,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 16,_T("CAS2.L #2"), 0, 0, 0, 0},
|
||||
{0x0EFC, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,2,5,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x10,_T("CAS2.L #2"), 0, 0, 0, 0},
|
||||
/* MVPMR.W */
|
||||
{0x0100, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,5,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MVPMR.W d[Areg-Ad16],Dr"), 0, 0, 0, 0},
|
||||
{0x0100, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,5,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x12,_T("MVPMR.W d[Areg-Ad16],Dr"), 0, 0, 0, 0},
|
||||
/* MVPMR.L */
|
||||
{0x0140, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,5,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MVPMR.L d[Areg-Ad16],Dr"), 0, 0, 0, 0},
|
||||
{0x0140, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,5,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x12,_T("MVPMR.L d[Areg-Ad16],Dr"), 0, 0, 0, 0},
|
||||
/* MVPRM.W */
|
||||
{0x0180, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,5,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MVPRM.W Dr,d[Areg-Ad16]"), 0, 0, 0, 0},
|
||||
{0x0180, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,5,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x12,_T("MVPRM.W Dr,d[Areg-Ad16]"), 0, 0, 0, 0},
|
||||
/* MVPRM.L */
|
||||
{0x01C0, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,5,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MVPRM.L Dr,d[Areg-Ad16]"), 0, 0, 0, 0},
|
||||
{0x01C0, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,5,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x12,_T("MVPRM.L Dr,d[Areg-Ad16]"), 0, 0, 0, 0},
|
||||
/* BTST */
|
||||
{0x0100, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 17,_T("BTST Dr,s[Dreg]"), 4, 0, 4, 0},
|
||||
{0x0100, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x11,_T("BTST Dr,s[Dreg]"), 4, 0, 4, 0},
|
||||
/* BTST */
|
||||
{0x0100, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 17,_T("BTST Dr,s[!Areg,Dreg]"), 0, 0, 4, 1},
|
||||
{0x0100, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x11,_T("BTST Dr,s[!Areg,Dreg]"), 0, 0, 4, 1},
|
||||
/* BCHG */
|
||||
{0x0140, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 19,_T("BCHG Dr,s[Dreg]"), 6, 0, 6, 0},
|
||||
{0x0140, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x13,_T("BCHG Dr,s[Dreg]"), 6, 0, 6, 0},
|
||||
/* BCHG */
|
||||
{0x0140, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 19,_T("BCHG Dr,s[!Areg,Dreg,Immd,PC8r,PC16]"), 0, 0, 6, 1},
|
||||
{0x0140, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x13,_T("BCHG Dr,s[!Areg,Dreg,Immd,PC8r,PC16]"), 0, 0, 6, 1},
|
||||
/* BCLR */
|
||||
{0x0180, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 19,_T("BCLR Dr,s[Dreg]"), 6, 0, 6, 0},
|
||||
{0x0180, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x13,_T("BCLR Dr,s[Dreg]"), 6, 0, 6, 0},
|
||||
/* BCLR */
|
||||
{0x0180, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 19,_T("BCLR Dr,s[!Areg,Dreg,Immd,PC8r,PC16]"), 0, 0, 6, 1},
|
||||
{0x0180, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x13,_T("BCLR Dr,s[!Areg,Dreg,Immd,PC8r,PC16]"), 0, 0, 6, 1},
|
||||
/* BSET */
|
||||
{0x01C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 19,_T("BSET Dr,s[Dreg]"), 6, 0, 6, 0},
|
||||
{0x01C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x13,_T("BSET Dr,s[Dreg]"), 6, 0, 6, 0},
|
||||
/* BSET */
|
||||
{0x01C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}}, 0, 19,_T("BSET Dr,s[!Areg,Dreg,Immd,PC8r,PC16]"), 0, 0, 6, 1},
|
||||
{0x01C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,0},{1,1},{1,1}},0x00,0x13,_T("BSET Dr,s[!Areg,Dreg,Immd,PC8r,PC16]"), 0, 0, 6, 1},
|
||||
/* MOVE.B */
|
||||
{0x1000,12,{14,14,14,13,13,13,11,11,11,12,12,12, 0, 0, 0, 0},0xF000,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 18,_T("MOVE.B s,d[!Areg]"), 0, 0, 0, 0},
|
||||
{0x1000,12,{14,14,14,13,13,13,11,11,11,12,12,12, 0, 0, 0, 0},0xF000,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x12,_T("MOVE.B s,d[!Areg]"), 0, 0, 0, 0},
|
||||
/* MOVEA.W */
|
||||
{0x3000,12,{14,14,14,13,13,13,11,11,11,12,12,12, 0, 0, 0, 0},0xF000,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MOVEA.W s,d[Areg]"), 0, 0, 0, 0},
|
||||
{0x3000,12,{14,14,14,13,13,13,11,11,11,12,12,12, 0, 0, 0, 0},0xF000,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x12,_T("MOVEA.W s,d[Areg]"), 0, 0, 0, 0},
|
||||
/* MOVE.W */
|
||||
{0x3000,12,{14,14,14,13,13,13,11,11,11,12,12,12, 0, 0, 0, 0},0xF000,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 18,_T("MOVE.W s,d[!Areg]"), 0, 0, 0, 0},
|
||||
{0x3000,12,{14,14,14,13,13,13,11,11,11,12,12,12, 0, 0, 0, 0},0xF000,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x12,_T("MOVE.W s,d[!Areg]"), 0, 0, 0, 0},
|
||||
/* MOVEA.L */
|
||||
{0x2000,12,{14,14,14,13,13,13,11,11,11,12,12,12, 0, 0, 0, 0},0xF000,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MOVEA.L s,d[Areg]"), 0, 0, 0, 0},
|
||||
{0x2000,12,{14,14,14,13,13,13,11,11,11,12,12,12, 0, 0, 0, 0},0xF000,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x12,_T("MOVEA.L s,d[Areg]"), 0, 0, 0, 0},
|
||||
/* MOVE.L */
|
||||
{0x2000,12,{14,14,14,13,13,13,11,11,11,12,12,12, 0, 0, 0, 0},0xF000,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 18,_T("MOVE.L s,d[!Areg]"), 0, 0, 0, 0},
|
||||
{0x2000,12,{14,14,14,13,13,13,11,11,11,12,12,12, 0, 0, 0, 0},0xF000,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x12,_T("MOVE.L s,d[!Areg]"), 0, 0, 0, 0},
|
||||
/* NEGX.z */
|
||||
{0x4000, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{0,0},{1,0},{0,0},{1,0},{1,0}}, 0, 48,_T("NEGX.z d[Dreg]"), 2, 0, 2, 0},
|
||||
{0x4000, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{0,0},{1,0},{0,0},{1,0},{1,0}},0x00,0x30,_T("NEGX.z d[Dreg]"), 2, 0, 2, 0},
|
||||
/* NEGX.z */
|
||||
{0x4000, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{0,0},{1,0},{0,0},{1,0},{1,0}}, 0, 48,_T("NEGX.z d[!Areg,Dreg]"), 0, 1, 3, 1},
|
||||
{0x4000, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{0,0},{1,0},{0,0},{1,0},{1,0}},0x00,0x30,_T("NEGX.z d[!Areg,Dreg]"), 0, 1, 3, 1},
|
||||
/* MVSR2.W */
|
||||
{0x40C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,1,{{0,1},{0,1},{0,1},{0,1},{0,1}}, 4, 16,_T("MVSR2.W d[Dreg]"), 2, 0, 4, 0},
|
||||
{0x40C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,1,{{0,1},{0,1},{0,1},{0,1},{0,1}},0x04,0x10,_T("MVSR2.W d[Dreg]"), 2, 0, 4, 0},
|
||||
/* MVSR2.W */
|
||||
{0x40C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,1,{{0,1},{0,1},{0,1},{0,1},{0,1}}, 4, 16,_T("MVSR2.W d[!Areg,Dreg]"), 2, 0, 4, 2},
|
||||
{0x40C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,1,{{0,1},{0,1},{0,1},{0,1},{0,1}},0x04,0x10,_T("MVSR2.W d[!Areg,Dreg]"), 2, 0, 4, 2},
|
||||
/* CLR.z */
|
||||
{0x4200, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,2},{1,3},{1,2},{1,2}}, 0, 32,_T("CLR.z d[Dreg]"), 2, 0, 2, 0},
|
||||
{0x4200, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,2},{1,3},{1,2},{1,2}},0x00,0x20,_T("CLR.z d[Dreg]"), 2, 0, 2, 0},
|
||||
/* CLR.z */
|
||||
{0x4200, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,2},{1,3},{1,2},{1,2}}, 0, 32,_T("CLR.z d[!Areg,Dreg]"), 0, 1, 3, 2},
|
||||
{0x4200, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,2},{1,3},{1,2},{1,2}},0x00,0x20,_T("CLR.z d[!Areg,Dreg]"), 0, 1, 3, 2},
|
||||
/* MVSR2.B */
|
||||
{0x42C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,1,0,0,{{0,1},{0,1},{0,1},{0,1},{0,1}}, 0, 16,_T("MVSR2.B d[Dreg]"), 2, 0, 4, 0},
|
||||
{0x42C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,1,0,0,{{0,1},{0,1},{0,1},{0,1},{0,1}},0x00,0x10,_T("MVSR2.B d[Dreg]"), 2, 0, 4, 0},
|
||||
/* MVSR2.B */
|
||||
{0x42C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,1,0,0,{{0,1},{0,1},{0,1},{0,1},{0,1}}, 0, 16,_T("MVSR2.B d[!Areg,Dreg]"), 2, 0, 4, 2},
|
||||
{0x42C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,1,0,0,{{0,1},{0,1},{0,1},{0,1},{0,1}},0x00,0x10,_T("MVSR2.B d[!Areg,Dreg]"), 2, 0, 4, 2},
|
||||
/* NEG.z */
|
||||
{0x4400, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 48,_T("NEG.z d[Dreg]"), 2, 0, 2, 0},
|
||||
{0x4400, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x30,_T("NEG.z d[Dreg]"), 2, 0, 2, 0},
|
||||
/* NEG.z */
|
||||
{0x4400, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 48,_T("NEG.z d[!Areg,Dreg]"), 0, 1, 3, 1},
|
||||
{0x4400, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x30,_T("NEG.z d[!Areg,Dreg]"), 0, 1, 3, 1},
|
||||
/* MV2SR.B */
|
||||
{0x44C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 16,_T("MV2SR.B s[Dreg]"), 4, 0, 4, 0},
|
||||
{0x44C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x10,_T("MV2SR.B s[Dreg]"), 4, 0, 4, 0},
|
||||
/* MV2SR.B */
|
||||
{0x44C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 16,_T("MV2SR.B s[!Areg,Dreg]"), 0, 0, 4, 1},
|
||||
{0x44C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x10,_T("MV2SR.B s[!Areg,Dreg]"), 0, 0, 4, 1},
|
||||
/* NOT.z */
|
||||
{0x4600, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 48,_T("NOT.z d[Dreg]"), 2, 0, 2, 0},
|
||||
{0x4600, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x30,_T("NOT.z d[Dreg]"), 2, 0, 2, 0},
|
||||
/* NOT.z */
|
||||
{0x4600, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 48,_T("NOT.z d[!Areg,Dreg]"), 0, 1, 3, 1},
|
||||
{0x4600, 8,{17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x30,_T("NOT.z d[!Areg,Dreg]"), 0, 1, 3, 1},
|
||||
/* MV2SR.W */
|
||||
{0x46C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,2,{{0,0},{0,0},{0,0},{0,0},{0,0}}, 4, 16,_T("MV2SR.W s[!Areg]"), 0, 0, 8, 1},
|
||||
{0x46C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,2,{{0,0},{0,0},{0,0},{0,0},{0,0}},0x04,0x10,_T("MV2SR.W s[!Areg]"), 0, 0, 8, 1},
|
||||
/* LINK.L */
|
||||
{0x4808, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 49,_T("LINK.L Ar,#2"), 2, 0, 6, 0},
|
||||
{0x4808, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x31,_T("LINK.L Ar,#2"), 2, 0, 6, 0},
|
||||
/* NBCD.B */
|
||||
{0x4800, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{0,0},{1,5},{0,0},{1,5},{1,0}}, 0, 48,_T("NBCD.B d[!Areg]"), 0, 0, 6, 0},
|
||||
{0x4800, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{0,0},{1,5},{0,0},{1,5},{1,0}},0x00,0x30,_T("NBCD.B d[!Areg]"), 0, 0, 6, 0},
|
||||
/* BKPT */
|
||||
{0x4848, 3,{ 9, 9, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 16,_T("BKPT #k"), 0, 0, 0, 0},
|
||||
{0x4848, 3,{ 9, 9, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,1,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x10,_T("BKPT #k"), 0, 0, 0, 0},
|
||||
/* SWAP.W */
|
||||
{0x4840, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 48,_T("SWAP.W s[Dreg]"), 4, 0, 4, 0},
|
||||
{0x4840, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x30,_T("SWAP.W s[Dreg]"), 4, 0, 4, 0},
|
||||
/* PEA.L */
|
||||
{0x4840, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 0,_T("PEA.L s[!Dreg,Areg,Aipi,Apdi,Immd]"), 0, 2, 4, 2},
|
||||
{0x4840, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x00,_T("PEA.L s[!Dreg,Areg,Aipi,Apdi,Immd]"), 0, 2, 4, 2},
|
||||
/* EXT.W */
|
||||
{0x4880, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 48,_T("EXT.W d[Dreg]"), 4, 0, 4, 0},
|
||||
{0x4880, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x30,_T("EXT.W d[Dreg]"), 4, 0, 4, 0},
|
||||
/* MVMLE.W */
|
||||
{0x4880, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 2,_T("MVMLE.W #1,d[!Dreg,Areg,Aipi]"), 0, 0, 0, 0},
|
||||
{0x4880, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x02,_T("MVMLE.W #1,d[!Dreg,Areg,Aipi]"), 0, 0, 0, 0},
|
||||
/* EXT.L */
|
||||
{0x48C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 48,_T("EXT.L d[Dreg]"), 4, 0, 4, 0},
|
||||
{0x48C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x30,_T("EXT.L d[Dreg]"), 4, 0, 4, 0},
|
||||
/* MVMLE.L */
|
||||
{0x48C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 2,_T("MVMLE.L #1,d[!Dreg,Areg,Aipi]"), 0, 0, 0, 0},
|
||||
{0x48C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x02,_T("MVMLE.L #1,d[!Dreg,Areg,Aipi]"), 0, 0, 0, 0},
|
||||
/* EXT.B */
|
||||
{0x49C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 48,_T("EXT.B d[Dreg]"), 4, 0, 4, 0},
|
||||
{0x49C0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x30,_T("EXT.B d[Dreg]"), 4, 0, 4, 0},
|
||||
/* TST.z */
|
||||
{0x4A00, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 16,_T("TST.z s[Dreg]"), 0, 0, 2, 0},
|
||||
{0x4A00, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x10,_T("TST.z s[Dreg]"), 0, 0, 2, 0},
|
||||
/* TST.z */
|
||||
{0x4A00, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 16,_T("TST.z s[!Areg,Dreg,PC16,PC8r,Immd]"), 0, 0, 2, 1},
|
||||
{0x4A00, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x10,_T("TST.z s[!Areg,Dreg,PC16,PC8r,Immd]"), 0, 0, 2, 1},
|
||||
/* TST.z */
|
||||
{0x4A00, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 16,_T("TST.z s[Areg,PC16,PC8r,Immd]"), 0, 0, 2, 1},
|
||||
{0x4A00, 8,{17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x10,_T("TST.z s[Areg,PC16,PC8r,Immd]"), 0, 0, 2, 1},
|
||||
/* TAS.B */
|
||||
{0x4AC0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 48,_T("TAS.B d[Dreg]"), 0, 0, 2, 0},
|
||||
{0x4AC0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x30,_T("TAS.B d[Dreg]"), 0, 0, 2, 0},
|
||||
/* TAS.B */
|
||||
{0x4AC0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 48,_T("TAS.B d[!Areg,Dreg]"), 0, 0, 2, 1},
|
||||
{0x4AC0, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x30,_T("TAS.B d[!Areg,Dreg]"), 0, 0, 2, 1},
|
||||
/* ILLEGAL */
|
||||
{0x4AFC, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("ILLEGAL"), 0, 0, 0, 0},
|
||||
{0x4AFC, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x00,_T("ILLEGAL"), 0, 0, 0, 0},
|
||||
/* MULL.L */
|
||||
{0x4C00, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("MULL.L #1,s[!Areg]"), 2, 0,30, 3},
|
||||
{0x4C00, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("MULL.L #1,s[!Areg]"), 2, 0,30, 3},
|
||||
/* DIVL.L */
|
||||
{0x4C40, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,0},{1,2}}, 4, 19,_T("DIVL.L #1,s[!Areg]"), 0, 0,50, 3},
|
||||
{0x4C40, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,0},{1,2}},0x04,0x13,_T("DIVL.L #1,s[!Areg]"), 0, 0,50, 3},
|
||||
/* MVMEL.W */
|
||||
{0x4C80, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 1,_T("MVMEL.W #1,s[!Dreg,Areg,Apdi,Immd]"), 0, 0, 0, 0},
|
||||
{0x4C80, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x01,_T("MVMEL.W #1,s[!Dreg,Areg,Apdi,Immd]"), 0, 0, 0, 0},
|
||||
/* MVMEL.L */
|
||||
{0x4CC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 1,_T("MVMEL.L #1,s[!Dreg,Areg,Apdi,Immd]"), 0, 0, 0, 0},
|
||||
{0x4CC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x01,_T("MVMEL.L #1,s[!Dreg,Areg,Apdi,Immd]"), 0, 0, 0, 0},
|
||||
/* TRAP */
|
||||
{0x4E40, 4,{ 8, 8, 8, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF0,0,0,0,{{0,1},{0,1},{0,1},{0,1},{0,1}}, 0, 16,_T("TRAP #J"), 0, 0, 0, 0},
|
||||
{0x4E40, 4,{ 8, 8, 8, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF0,0,0,0,{{0,1},{0,1},{0,1},{0,1},{0,1}},0x00,0x10,_T("TRAP #J"), 0, 0, 0, 0},
|
||||
/* LINK.W */
|
||||
{0x4E50, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 49,_T("LINK.W Ar,#1"), 0, 0, 4, 0},
|
||||
{0x4E50, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x31,_T("LINK.W Ar,#1"), 0, 0, 4, 0},
|
||||
/* UNLK.L */
|
||||
{0x4E58, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 48,_T("UNLK.L Ar"), 0, 0, 5, 0},
|
||||
{0x4E58, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x30,_T("UNLK.L Ar"), 0, 0, 5, 0},
|
||||
/* MVR2USP.L */
|
||||
{0x4E60, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,0,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 16,_T("MVR2USP.L Ar"), 4, 0, 4, 0},
|
||||
{0x4E60, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,0,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x10,_T("MVR2USP.L Ar"), 4, 0, 4, 0},
|
||||
/* MVUSP2R.L */
|
||||
{0x4E68, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,0,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 32,_T("MVUSP2R.L Ar"), 4, 0, 4, 0},
|
||||
{0x4E68, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,0,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x20,_T("MVUSP2R.L Ar"), 4, 0, 4, 0},
|
||||
/* RESET */
|
||||
{0x4E70, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("RESET"), 0, 0,518, 0},
|
||||
{0x4E70, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x00,_T("RESET"), 0, 0,518, 0},
|
||||
/* NOP */
|
||||
{0x4E71, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 0,_T("NOP"), 0, 0, 2, 0},
|
||||
{0x4E71, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x00,_T("NOP"), 0, 0, 2, 0},
|
||||
/* STOP */
|
||||
{0x4E72, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,2,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 4, 16,_T("STOP #1"), 0, 0, 8, 0},
|
||||
{0x4E72, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,2,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x04,0x10,_T("STOP #1"), 0, 0, 8, 0},
|
||||
/* RTE */
|
||||
{0x4E73, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,2,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 7, 0,_T("RTE"), 1, 9,18, 0},
|
||||
{0x4E73, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,2,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x07,0x00,_T("RTE"), 1, 9,18, 0},
|
||||
/* RTD */
|
||||
{0x4E74, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,1,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 3, 16,_T("RTD #1"), 2, 0,10, 0},
|
||||
{0x4E74, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,1,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x03,0x10,_T("RTD #1"), 2, 0,10, 0},
|
||||
/* RTS */
|
||||
{0x4E75, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 3, 0,_T("RTS"), 1, 0, 9, 0},
|
||||
{0x4E75, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x03,0x00,_T("RTS"), 1, 0, 9, 0},
|
||||
/* TRAPV */
|
||||
{0x4E76, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{0,1},{0,1},{0,1},{0,1},{0,1}}, 4, 0,_T("TRAPV"), 0, 0, 0, 0},
|
||||
{0x4E76, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{0,1},{0,1},{0,1},{0,1},{0,1}},0x04,0x00,_T("TRAPV"), 0, 0, 0, 0},
|
||||
/* RTR */
|
||||
{0x4E77, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 3, 0,_T("RTR"), 1, 0,12, 0},
|
||||
{0x4E77, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x03,0x00,_T("RTR"), 1, 0,12, 0},
|
||||
/* MOVEC2 */
|
||||
{0x4E7A, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,1,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 16,_T("MOVEC2 #1"), 6, 0, 6, 0},
|
||||
{0x4E7A, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,1,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x10,_T("MOVEC2 #1"), 6, 0, 6, 0},
|
||||
/* MOVE2C */
|
||||
{0x4E7B, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,1,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 16,_T("MOVE2C #1"), 6, 0, 6, 0},
|
||||
{0x4E7B, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,1,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x10,_T("MOVE2C #1"), 6, 0, 6, 0},
|
||||
/* JSR.L */
|
||||
{0x4E80, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{4,6},{4,6},{4,6},{4,6},{4,6}}, 2, 128,_T("JSR.L s[!Dreg,Areg,Aipi,Apdi,Immd]"), 0, 0, 4, 5},
|
||||
{0x4E80, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{4,6},{4,6},{4,6},{4,6},{4,6}},0x02,0x80,_T("JSR.L s[!Dreg,Areg,Aipi,Apdi,Immd]"), 0, 0, 4, 5},
|
||||
/* CHK.L */
|
||||
{0x4100, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,2,0,0,{{1,1},{1,0},{1,5},{1,5},{1,5}}, 4, 17,_T("CHK.L s[!Areg],Dr"), 0, 0, 0, 0},
|
||||
{0x4100, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,2,0,0,{{1,1},{1,0},{1,5},{1,5},{1,5}},0x04,0x11,_T("CHK.L s[!Areg],Dr"), 0, 0, 0, 0},
|
||||
/* CHK.W */
|
||||
{0x4180, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,5},{1,5},{1,5}}, 4, 17,_T("CHK.W s[!Areg],Dr"), 0, 0, 0, 0},
|
||||
{0x4180, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,5},{1,5},{1,5}},0x04,0x11,_T("CHK.W s[!Areg],Dr"), 0, 0, 0, 0},
|
||||
/* JMP.L */
|
||||
{0x4EC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{4,6},{4,6},{4,6},{4,6},{4,6}}, 2, 128,_T("JMP.L s[!Dreg,Areg,Aipi,Apdi,Immd]"), 4, 0, 4, 5},
|
||||
{0x4EC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,0,0,0,{{4,6},{4,6},{4,6},{4,6},{4,6}},0x02,0x80,_T("JMP.L s[!Dreg,Areg,Aipi,Apdi,Immd]"), 4, 0, 4, 5},
|
||||
/* LEA.L */
|
||||
{0x41C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 2,_T("LEA.L s[!Dreg,Areg,Aipi,Apdi,Immd],Ar"), 2, 0, 2, 2},
|
||||
{0x41C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x02,_T("LEA.L s[!Dreg,Areg,Aipi,Apdi,Immd],Ar"), 2, 0, 2, 2},
|
||||
/* ADDA.W */
|
||||
{0x5040, 9,{ 7, 7, 7,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 19,_T("ADDA.W #j,d[Areg]"), 2, 0, 2, 0},
|
||||
{0x5040, 9,{ 7, 7, 7,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x13,_T("ADDA.W #j,d[Areg]"), 2, 0, 2, 0},
|
||||
/* ADDA.L */
|
||||
{0x5080, 9,{ 7, 7, 7,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 19,_T("ADDA.L #j,d[Areg]"), 2, 0, 2, 0},
|
||||
{0x5080, 9,{ 7, 7, 7,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x13,_T("ADDA.L #j,d[Areg]"), 2, 0, 2, 0},
|
||||
/* ADD.z */
|
||||
{0x5000,11,{ 7, 7, 7,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("ADD.z #j,d[Dreg]"), 2, 0, 2, 0},
|
||||
{0x5000,11,{ 7, 7, 7,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("ADD.z #j,d[Dreg]"), 2, 0, 2, 0},
|
||||
/* ADD.z */
|
||||
{0x5000,11,{ 7, 7, 7,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("ADD.z #j,d[!Areg,Dreg]"), 0, 1, 3, 1},
|
||||
{0x5000,11,{ 7, 7, 7,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("ADD.z #j,d[!Areg,Dreg]"), 0, 1, 3, 1},
|
||||
/* SUBA.W */
|
||||
{0x5140, 9,{ 7, 7, 7,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 19,_T("SUBA.W #j,d[Areg]"), 2, 0, 2, 0},
|
||||
{0x5140, 9,{ 7, 7, 7,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x13,_T("SUBA.W #j,d[Areg]"), 2, 0, 2, 0},
|
||||
/* SUBA.L */
|
||||
{0x5180, 9,{ 7, 7, 7,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 19,_T("SUBA.L #j,d[Areg]"), 2, 0, 2, 0},
|
||||
{0x5180, 9,{ 7, 7, 7,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x13,_T("SUBA.L #j,d[Areg]"), 2, 0, 2, 0},
|
||||
/* SUB.z */
|
||||
{0x5100,11,{ 7, 7, 7,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("SUB.z #j,d[Dreg]"), 2, 0, 2, 0},
|
||||
{0x5100,11,{ 7, 7, 7,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("SUB.z #j,d[Dreg]"), 2, 0, 2, 0},
|
||||
/* SUB.z */
|
||||
{0x5100,11,{ 7, 7, 7,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("SUB.z #j,d[!Areg,Dreg]"), 0, 1, 3, 1},
|
||||
{0x5100,11,{ 7, 7, 7,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("SUB.z #j,d[!Areg,Dreg]"), 0, 1, 3, 1},
|
||||
/* DBcc.W */
|
||||
{0x50C8, 7,{ 2, 2, 2, 2,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xF0F8,0,0,0,{{1,1},{2,1},{2,1},{2,1},{2,1}}, 1, 49,_T("DBcc.W Dr,#1"),-1, 0, 0, 0},
|
||||
{0x50C8, 7,{ 2, 2, 2, 2,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xF0F8,0,0,0,{{1,1},{2,1},{2,1},{2,1},{2,1}},0x01,0x31,_T("DBcc.W Dr,#1"),-1, 0, 0, 0},
|
||||
/* Scc.B */
|
||||
{0x50C0,10,{ 2, 2, 2, 2,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0},0xF0C0,0,0,0,{{1,1},{2,1},{2,1},{2,1},{2,1}}, 0, 32,_T("Scc.B d[Dreg]"), 0, 0, 2, 0},
|
||||
{0x50C0,10,{ 2, 2, 2, 2,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0},0xF0C0,0,0,0,{{1,1},{2,1},{2,1},{2,1},{2,1}},0x00,0x20,_T("Scc.B d[Dreg]"), 0, 0, 2, 0},
|
||||
/* Scc.B */
|
||||
{0x50C0,10,{ 2, 2, 2, 2,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0},0xF0C0,0,0,0,{{1,1},{2,1},{2,1},{2,1},{2,1}}, 0, 32,_T("Scc.B d[!Areg,Dreg]"), 0, 0, 2, 2},
|
||||
{0x50C0,10,{ 2, 2, 2, 2,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0},0xF0C0,0,0,0,{{1,1},{2,1},{2,1},{2,1},{2,1}},0x00,0x20,_T("Scc.B d[!Areg,Dreg]"), 0, 0, 2, 2},
|
||||
/* TRAPcc */
|
||||
{0x50FA, 4,{ 2, 2, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xF0FF,2,0,0,{{1,1},{3,1},{3,1},{3,1},{3,1}}, 4, 16,_T("TRAPcc #1"), 0, 0, 0, 0},
|
||||
{0x50FA, 4,{ 2, 2, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xF0FF,2,0,0,{{1,1},{3,1},{3,1},{3,1},{3,1}},0x04,0x10,_T("TRAPcc #1"), 0, 0, 0, 0},
|
||||
/* TRAPcc */
|
||||
{0x50FB, 4,{ 2, 2, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xF0FF,2,0,0,{{1,1},{3,1},{3,1},{3,1},{3,1}}, 4, 16,_T("TRAPcc #2"), 0, 0, 0, 0},
|
||||
{0x50FB, 4,{ 2, 2, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xF0FF,2,0,0,{{1,1},{3,1},{3,1},{3,1},{3,1}},0x04,0x10,_T("TRAPcc #2"), 0, 0, 0, 0},
|
||||
/* TRAPcc */
|
||||
{0x50FC, 4,{ 2, 2, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xF0FF,2,0,0,{{1,1},{3,1},{3,1},{3,1},{3,1}}, 4, 0,_T("TRAPcc"), 0, 0, 0, 0},
|
||||
{0x50FC, 4,{ 2, 2, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xF0FF,2,0,0,{{1,1},{3,1},{3,1},{3,1},{3,1}},0x04,0x00,_T("TRAPcc"), 0, 0, 0, 0},
|
||||
/* BSR.W */
|
||||
{0x6100, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{4,6},{4,6},{4,6},{4,6},{4,6}}, 1, 64,_T("BSR.W #1"), 2, 0, 6, 0},
|
||||
{0x6100, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{4,6},{4,6},{4,6},{4,6},{4,6}},0x01,0x40,_T("BSR.W #1"), 2, 0, 6, 0},
|
||||
/* BSR.B */
|
||||
{0x6100, 8,{ 6, 6, 6, 6, 6, 6, 6, 6, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{4,6},{4,6},{4,6},{4,6},{4,6}}, 1, 64,_T("BSR.B #i"), 2, 0, 6, 0},
|
||||
{0x6100, 8,{ 6, 6, 6, 6, 6, 6, 6, 6, 0, 0, 0, 0, 0, 0, 0, 0},0xFF00,0,0,0,{{4,6},{4,6},{4,6},{4,6},{4,6}},0x01,0x40,_T("BSR.B #i"), 2, 0, 6, 0},
|
||||
/* BSR.L */
|
||||
{0x61FF, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{4,6},{4,6},{4,6},{4,6},{4,6}}, 1, 64,_T("BSR.L #2"), 2, 0, 6, 0},
|
||||
{0x61FF, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,0,0,0,{{4,6},{4,6},{4,6},{4,6},{4,6}},0x01,0x40,_T("BSR.L #2"), 2, 0, 6, 0},
|
||||
/* Bcc.W */
|
||||
{0x6000, 4,{ 3, 3, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xF0FF,0,0,0,{{1,1},{2,1},{2,1},{2,1},{2,1}}, 1, 64,_T("Bcc.W #1"),-1, 0, 0, 0},
|
||||
{0x6000, 4,{ 3, 3, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xF0FF,0,0,0,{{1,1},{2,1},{2,1},{2,1},{2,1}},0x01,0x40,_T("Bcc.W #1"),-1, 0, 0, 0},
|
||||
/* Bcc.B */
|
||||
{0x6000,12,{ 3, 3, 3, 3, 6, 6, 6, 6, 6, 6, 6, 6, 0, 0, 0, 0},0xF000,0,0,0,{{1,1},{2,1},{2,1},{2,1},{2,1}}, 1, 64,_T("Bcc.B #i"),-1, 0, 0, 0},
|
||||
{0x6000,12,{ 3, 3, 3, 3, 6, 6, 6, 6, 6, 6, 6, 6, 0, 0, 0, 0},0xF000,0,0,0,{{1,1},{2,1},{2,1},{2,1},{2,1}},0x01,0x40,_T("Bcc.B #i"),-1, 0, 0, 0},
|
||||
/* Bcc.L */
|
||||
{0x60FF, 4,{ 3, 3, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xF0FF,0,0,0,{{1,1},{2,1},{2,1},{2,1},{2,1}}, 1, 64,_T("Bcc.L #2"),-1, 0, 0, 0},
|
||||
{0x60FF, 4,{ 3, 3, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xF0FF,0,0,0,{{1,1},{2,1},{2,1},{2,1},{2,1}},0x01,0x40,_T("Bcc.L #2"),-1, 0, 0, 0},
|
||||
/* MOVE.L */
|
||||
{0x7000,11,{15,15,15, 5, 5, 5, 5, 5, 5, 5, 5, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 18,_T("MOVE.L #i,Dr"), 0, 0, 0, 0},
|
||||
{0x7000,11,{15,15,15, 5, 5, 5, 5, 5, 5, 5, 5, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x12,_T("MOVE.L #i,Dr"), 0, 0, 0, 0},
|
||||
/* OR.z */
|
||||
{0x8000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("OR.z s[Dreg],Dr"), 2, 0, 2, 0},
|
||||
{0x8000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("OR.z s[Dreg],Dr"), 2, 0, 2, 0},
|
||||
/* OR.z */
|
||||
{0x8000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("OR.z s[!Areg,Dreg],Dr"), 0, 0, 2, 1},
|
||||
{0x8000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("OR.z s[!Areg,Dreg],Dr"), 0, 0, 2, 1},
|
||||
/* DIVU.W */
|
||||
{0x80C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,2}}, 4, 19,_T("DIVU.W s[Dreg],Dr"), 2, 0,20, 0},
|
||||
{0x80C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,2}},0x04,0x13,_T("DIVU.W s[Dreg],Dr"), 2, 0,20, 0},
|
||||
/* DIVU.W */
|
||||
{0x80C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,2}}, 4, 19,_T("DIVU.W s[!Areg,Dreg],Dr"), 0, 0,20, 1},
|
||||
{0x80C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,2}},0x04,0x13,_T("DIVU.W s[!Areg,Dreg],Dr"), 0, 0,20, 1},
|
||||
/* SBCD.B */
|
||||
{0x8100, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{0,0},{1,4},{0,0},{1,4},{1,0}}, 0, 19,_T("SBCD.B d[Dreg],Dr"), 0, 0, 4, 0},
|
||||
{0x8100, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{0,0},{1,5},{0,0},{1,5},{1,0}},0x00,0x13,_T("SBCD.B d[Dreg],Dr"), 0, 0, 4, 0},
|
||||
/* SBCD.B */
|
||||
{0x8100, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{0,0},{1,4},{0,0},{1,4},{1,0}}, 0, 19,_T("SBCD.B d[Areg-Apdi],Arp"), 2, 1,13, 0},
|
||||
{0x8100, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{0,0},{1,5},{0,0},{1,5},{1,0}},0x00,0x13,_T("SBCD.B d[Areg-Apdi],Arp"), 2, 1,13, 0},
|
||||
/* OR.z */
|
||||
{0x8100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("OR.z Dr,d[!Areg,Dreg]"), 0, 1, 3, 1},
|
||||
{0x8100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("OR.z Dr,d[!Areg,Dreg]"), 0, 1, 3, 1},
|
||||
/* PACK */
|
||||
{0x8140, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("PACK d[Dreg],Dr"), 6, 0, 6, 0},
|
||||
{0x8140, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x12,_T("PACK d[Dreg],Dr"), 6, 0, 6, 0},
|
||||
/* PACK */
|
||||
{0x8140, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("PACK d[Areg-Apdi],Arp"), 2, 1,11, 0},
|
||||
{0x8140, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x12,_T("PACK d[Areg-Apdi],Arp"), 2, 1,11, 0},
|
||||
/* UNPK */
|
||||
{0x8180, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("UNPK d[Dreg],Dr"), 8, 0, 8, 0},
|
||||
{0x8180, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x12,_T("UNPK d[Dreg],Dr"), 8, 0, 8, 0},
|
||||
/* UNPK */
|
||||
{0x8180, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("UNPK d[Areg-Apdi],Arp"), 2, 1,11, 0},
|
||||
{0x8180, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x12,_T("UNPK d[Areg-Apdi],Arp"), 2, 1,11, 0},
|
||||
/* DIVS.W */
|
||||
{0x81C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,2}}, 4, 19,_T("DIVS.W s[Dreg],Dr"), 2, 0,20, 0},
|
||||
{0x81C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,2}},0x04,0x13,_T("DIVS.W s[Dreg],Dr"), 2, 0,20, 0},
|
||||
/* DIVS.W */
|
||||
{0x81C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,2}}, 4, 19,_T("DIVS.W s[!Areg,Dreg],Dr"), 0, 0,20, 1},
|
||||
{0x81C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,2}},0x04,0x13,_T("DIVS.W s[!Areg,Dreg],Dr"), 0, 0,20, 1},
|
||||
/* SUB.z */
|
||||
{0x9000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("SUB.z s[Areg,Dreg],Dr"), 2, 0, 2, 0},
|
||||
{0x9000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("SUB.z s[Areg,Dreg],Dr"), 2, 0, 2, 0},
|
||||
/* SUB.z */
|
||||
{0x9000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("SUB.z s[!Areg,Dreg],Dr"), 0, 0, 2, 1},
|
||||
{0x9000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("SUB.z s[!Areg,Dreg],Dr"), 0, 0, 2, 1},
|
||||
/* SUBA.W */
|
||||
{0x90C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 19,_T("SUBA.W s[Areg,Dreg],Ar"), 4, 0, 4, 0},
|
||||
{0x90C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x13,_T("SUBA.W s[Areg,Dreg],Ar"), 4, 0, 4, 0},
|
||||
/* SUBA.W */
|
||||
{0x90C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 19,_T("SUBA.W s[!Areg,Dreg],Ar"), 0, 0, 4, 1},
|
||||
{0x90C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x13,_T("SUBA.W s[!Areg,Dreg],Ar"), 0, 0, 4, 1},
|
||||
/* SUBX.z */
|
||||
{0x9100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{0,0},{1,0},{0,0},{1,0},{1,0}}, 0, 19,_T("SUBX.z d[Dreg],Dr"), 2, 0, 2, 0},
|
||||
{0x9100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{0,0},{1,0},{0,0},{1,0},{1,0}},0x00,0x13,_T("SUBX.z d[Dreg],Dr"), 2, 0, 2, 0},
|
||||
/* SUBX.z */
|
||||
{0x9100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{0,0},{1,0},{0,0},{1,0},{1,0}}, 0, 19,_T("SUBX.z d[Areg-Apdi],Arp"), 2, 1, 9, 0},
|
||||
{0x9100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{0,0},{1,0},{0,0},{1,0},{1,0}},0x00,0x13,_T("SUBX.z d[Areg-Apdi],Arp"), 2, 1, 9, 0},
|
||||
/* SUB.z */
|
||||
{0x9100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("SUB.z Dr,d[!Areg,Dreg]"), 0, 1, 3, 1},
|
||||
{0x9100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("SUB.z Dr,d[!Areg,Dreg]"), 0, 1, 3, 1},
|
||||
/* SUBA.L */
|
||||
{0x91C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 19,_T("SUBA.L s[Areg,Dreg],Ar"), 2, 0, 2, 0},
|
||||
{0x91C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x13,_T("SUBA.L s[Areg,Dreg],Ar"), 2, 0, 2, 0},
|
||||
/* SUBA.L */
|
||||
{0x91C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 19,_T("SUBA.L s[!Areg,Dreg],Ar"), 0, 0, 2, 1},
|
||||
{0x91C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x13,_T("SUBA.L s[!Areg,Dreg],Ar"), 0, 0, 2, 1},
|
||||
/* CMP.z */
|
||||
{0xB000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 17,_T("CMP.z s[Areg,Dreg],Dr"), 2, 0, 2, 0},
|
||||
{0xB000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x11,_T("CMP.z s[Areg,Dreg],Dr"), 2, 0, 2, 0},
|
||||
/* CMP.z */
|
||||
{0xB000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 17,_T("CMP.z s[!Areg,Dreg],Dr"), 0, 0, 2, 1},
|
||||
{0xB000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x11,_T("CMP.z s[!Areg,Dreg],Dr"), 0, 0, 2, 1},
|
||||
/* CMPA.W */
|
||||
{0xB0C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 17,_T("CMPA.W s[Areg,Dreg],Ar"), 4, 0, 4, 0},
|
||||
{0xB0C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x11,_T("CMPA.W s[Areg,Dreg],Ar"), 4, 0, 4, 0},
|
||||
/* CMPA.W */
|
||||
{0xB0C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 17,_T("CMPA.W s[!Areg,Dreg],Ar"), 0, 0, 4, 1},
|
||||
{0xB0C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x11,_T("CMPA.W s[!Areg,Dreg],Ar"), 0, 0, 4, 1},
|
||||
/* CMPA.L */
|
||||
{0xB1C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 17,_T("CMPA.L s[Areg,Dreg],Ar"), 4, 0, 4, 0},
|
||||
{0xB1C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x11,_T("CMPA.L s[Areg,Dreg],Ar"), 4, 0, 4, 0},
|
||||
/* CMPA.L */
|
||||
{0xB1C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 17,_T("CMPA.L s[!Areg,Dreg],Ar"), 0, 0, 4, 1},
|
||||
{0xB1C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x11,_T("CMPA.L s[!Areg,Dreg],Ar"), 0, 0, 4, 1},
|
||||
/* CMPM.z */
|
||||
{0xB100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}}, 0, 17,_T("CMPM.z d[Areg-Aipi],ArP"), 0, 0, 8, 0},
|
||||
{0xB100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,0},{1,0}},0x00,0x11,_T("CMPM.z d[Areg-Aipi],ArP"), 0, 0, 8, 0},
|
||||
/* EOR.z */
|
||||
{0xB100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("EOR.z Dr,d[Dreg]"), 2, 0, 2, 0},
|
||||
{0xB100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("EOR.z Dr,d[Dreg]"), 2, 0, 2, 0},
|
||||
/* EOR.z */
|
||||
{0xB100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("EOR.z Dr,d[!Areg,Dreg]"), 0, 1, 3, 1},
|
||||
{0xB100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("EOR.z Dr,d[!Areg,Dreg]"), 0, 1, 3, 1},
|
||||
/* AND.z */
|
||||
{0xC000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("AND.z s[Dreg],Dr"), 2, 0, 2, 1},
|
||||
{0xC000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("AND.z s[Dreg],Dr"), 2, 0, 2, 1},
|
||||
/* AND.z */
|
||||
{0xC000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("AND.z s[!Areg,Dreg],Dr"), 0, 1, 3, 1},
|
||||
{0xC000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("AND.z s[!Areg,Dreg],Dr"), 0, 1, 3, 1},
|
||||
/* MULU.W */
|
||||
{0xC0C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("MULU.W s[!Areg],Dr"), 2, 0,12, 1},
|
||||
{0xC0C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("MULU.W s[!Areg],Dr"), 2, 0,12, 1},
|
||||
/* ABCD.B */
|
||||
{0xC100, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{0,0},{1,4},{0,0},{1,4},{1,0}}, 0, 19,_T("ABCD.B d[Dreg],Dr"), 0, 0, 4, 0},
|
||||
{0xC100, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{0,0},{1,5},{0,0},{1,5},{1,0}},0x00,0x13,_T("ABCD.B d[Dreg],Dr"), 0, 0, 4, 0},
|
||||
/* ABCD.B */
|
||||
{0xC100, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{0,0},{1,4},{0,0},{1,4},{1,0}}, 0, 19,_T("ABCD.B d[Areg-Apdi],Arp"), 2, 1,13, 0},
|
||||
{0xC100, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{0,0},{1,5},{0,0},{1,5},{1,0}},0x00,0x13,_T("ABCD.B d[Areg-Apdi],Arp"), 2, 1,13, 0},
|
||||
/* AND.z */
|
||||
{0xC100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("AND.z Dr,d[!Areg,Dreg]"), 0, 1, 3, 1},
|
||||
{0xC100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("AND.z Dr,d[!Areg,Dreg]"), 0, 1, 3, 1},
|
||||
/* EXG.L */
|
||||
{0xC140, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 51,_T("EXG.L Dr,d[Dreg]"), 4, 0, 4, 0},
|
||||
{0xC140, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x33,_T("EXG.L Dr,d[Dreg]"), 4, 0, 4, 0},
|
||||
/* EXG.L */
|
||||
{0xC140, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 51,_T("EXG.L Ar,d[Areg]"), 4, 0, 4, 0},
|
||||
{0xC140, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x33,_T("EXG.L Ar,d[Areg]"), 4, 0, 4, 0},
|
||||
/* EXG.L */
|
||||
{0xC180, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 51,_T("EXG.L Dr,d[Areg]"), 4, 0, 4, 0},
|
||||
{0xC180, 9,{15,15,15,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x33,_T("EXG.L Dr,d[Areg]"), 4, 0, 4, 0},
|
||||
/* MULS.W */
|
||||
{0xC1C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("MULS.W s[!Areg],Dr"), 2, 0,12, 1},
|
||||
{0xC1C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("MULS.W s[!Areg],Dr"), 2, 0,12, 1},
|
||||
/* ADD.z */
|
||||
{0xD000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("ADD.z s[Areg,Dreg],Dr"), 2, 0, 2, 0},
|
||||
{0xD000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("ADD.z s[Areg,Dreg],Dr"), 2, 0, 2, 0},
|
||||
/* ADD.z */
|
||||
{0xD000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("ADD.z s[!Areg,Dreg],Dr"), 0, 0, 2, 1},
|
||||
{0xD000,11,{15,15,15,17,17,11,11,11,12,12,12, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("ADD.z s[!Areg,Dreg],Dr"), 0, 0, 2, 1},
|
||||
/* ADDA.W */
|
||||
{0xD0C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 19,_T("ADDA.W s[Areg,Dreg],Ar"), 0, 0, 4, 0},
|
||||
{0xD0C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x13,_T("ADDA.W s[Areg,Dreg],Ar"), 0, 0, 4, 0},
|
||||
/* ADDA.W */
|
||||
{0xD0C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 19,_T("ADDA.W s[!Areg,Dreg],Ar"), 4, 0, 4, 1},
|
||||
{0xD0C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x13,_T("ADDA.W s[!Areg,Dreg],Ar"), 4, 0, 4, 1},
|
||||
/* ADDX.z */
|
||||
{0xD100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{0,0},{1,0},{0,0},{1,0},{1,0}}, 0, 19,_T("ADDX.z d[Dreg],Dr"), 2, 0, 2, 0},
|
||||
{0xD100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{0,0},{1,0},{0,0},{1,0},{1,0}},0x00,0x13,_T("ADDX.z d[Dreg],Dr"), 2, 0, 2, 0},
|
||||
/* ADDX.z */
|
||||
{0xD100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{0,0},{1,0},{0,0},{1,0},{1,0}}, 0, 19,_T("ADDX.z d[Areg-Apdi],Arp"), 2, 1, 9, 0},
|
||||
{0xD100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{0,0},{1,0},{0,0},{1,0},{1,0}},0x00,0x13,_T("ADDX.z d[Areg-Apdi],Arp"), 2, 1, 9, 0},
|
||||
/* ADD.z */
|
||||
{0xD100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("ADD.z Dr,d[!Areg,Dreg]"), 0, 1, 3, 1},
|
||||
{0xD100,11,{15,15,15,17,17,13,13,13,14,14,14, 0, 0, 0, 0, 0},0xF100,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("ADD.z Dr,d[!Areg,Dreg]"), 0, 1, 3, 1},
|
||||
/* ADDA.L */
|
||||
{0xD1C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 19,_T("ADDA.L s[Areg,Dreg],Ar"), 2, 0, 2, 0},
|
||||
{0xD1C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x13,_T("ADDA.L s[Areg,Dreg],Ar"), 2, 0, 2, 0},
|
||||
/* ADDA.L */
|
||||
{0xD1C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 19,_T("ADDA.L s[!Areg,Dreg],Ar"), 0, 0, 2, 1},
|
||||
{0xD1C0, 9,{15,15,15,11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0},0xF1C0,0,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x13,_T("ADDA.L s[!Areg,Dreg],Ar"), 0, 0, 2, 1},
|
||||
/* ASf.z */
|
||||
{0xE000, 9,{ 7, 7, 7, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("ASf.z #j,DR"), 2, 0, 6, 0},
|
||||
{0xE000, 9,{ 7, 7, 7, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("ASf.z #j,DR"), 2, 0, 6, 0},
|
||||
/* LSf.z */
|
||||
{0xE008, 9,{ 7, 7, 7, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{1,0},{1,0},{1,0},{1,2},{1,0}}, 0, 19,_T("LSf.z #j,DR"), 4, 0, 4, 0},
|
||||
{0xE008, 9,{ 7, 7, 7, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{1,0},{1,0},{1,0},{1,2},{1,0}},0x00,0x13,_T("LSf.z #j,DR"), 4, 0, 4, 0},
|
||||
/* ROXf.z */
|
||||
{0xE010, 9,{ 7, 7, 7, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{0,0},{1,0},{1,0},{1,2},{1,0}}, 0, 19,_T("ROXf.z #j,DR"),10, 0,12, 0},
|
||||
{0xE010, 9,{ 7, 7, 7, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{0,0},{1,0},{1,0},{1,2},{1,0}},0x00,0x13,_T("ROXf.z #j,DR"),10, 0,12, 0},
|
||||
/* ROf.z */
|
||||
{0xE018, 9,{ 7, 7, 7, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,0}}, 0, 19,_T("ROf.z #j,DR"), 4, 0, 6, 0},
|
||||
{0xE018, 9,{ 7, 7, 7, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,0}},0x00,0x13,_T("ROf.z #j,DR"), 4, 0, 6, 0},
|
||||
/* ASf.z */
|
||||
{0xE020, 9,{15,15,15, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{0,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("ASf.z Dr,DR"), 4, 0, 6, 0},
|
||||
{0xE020, 9,{15,15,15, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{0,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("ASf.z Dr,DR"), 4, 0, 6, 0},
|
||||
/* LSf.z */
|
||||
{0xE028, 9,{15,15,15, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{0,0},{1,0},{1,0},{1,2},{1,0}}, 0, 19,_T("LSf.z Dr,DR"), 6, 0, 6, 0},
|
||||
{0xE028, 9,{15,15,15, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{0,0},{1,0},{1,0},{1,2},{1,0}},0x00,0x13,_T("LSf.z Dr,DR"), 6, 0, 6, 0},
|
||||
/* ROXf.z */
|
||||
{0xE030, 9,{15,15,15, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{0,0},{1,0},{1,0},{1,2},{1,0}}, 0, 19,_T("ROXf.z Dr,DR"),10, 0,12, 0},
|
||||
{0xE030, 9,{15,15,15, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{0,0},{1,0},{1,0},{1,2},{1,0}},0x00,0x13,_T("ROXf.z Dr,DR"),10, 0,12, 0},
|
||||
/* ROf.z */
|
||||
{0xE038, 9,{15,15,15, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,0}}, 0, 19,_T("ROf.z Dr,DR"), 6, 0, 8, 0},
|
||||
{0xE038, 9,{15,15,15, 4,17,17,16,16,16, 0, 0, 0, 0, 0, 0, 0},0xF038,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,0}},0x00,0x13,_T("ROf.z Dr,DR"), 6, 0, 8, 0},
|
||||
/* ASfW.W */
|
||||
{0xE0C0, 7,{ 4,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFEC0,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}}, 0, 19,_T("ASfW.W d[!Dreg,Areg]"), 0, 0, 4, 1},
|
||||
{0xE0C0, 7,{ 4,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFEC0,0,0,0,{{1,0},{1,0},{1,0},{1,0},{1,0}},0x00,0x13,_T("ASfW.W d[!Dreg,Areg]"), 0, 0, 4, 1},
|
||||
/* LSfW.W */
|
||||
{0xE2C0, 7,{ 4,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFEC0,0,0,0,{{1,0},{1,0},{1,0},{1,2},{1,0}}, 0, 19,_T("LSfW.W d[!Dreg,Areg]"), 0, 0, 4, 1},
|
||||
{0xE2C0, 7,{ 4,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFEC0,0,0,0,{{1,0},{1,0},{1,0},{1,2},{1,0}},0x00,0x13,_T("LSfW.W d[!Dreg,Areg]"), 0, 0, 4, 1},
|
||||
/* ROXfW.W */
|
||||
{0xE4C0, 7,{ 4,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFEC0,0,0,0,{{0,0},{1,0},{1,0},{1,2},{1,0}}, 0, 19,_T("ROXfW.W d[!Dreg,Areg]"), 0, 0, 4, 1},
|
||||
{0xE4C0, 7,{ 4,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFEC0,0,0,0,{{0,0},{1,0},{1,0},{1,2},{1,0}},0x00,0x13,_T("ROXfW.W d[!Dreg,Areg]"), 0, 0, 4, 1},
|
||||
/* ROfW.W */
|
||||
{0xE6C0, 7,{ 4,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFEC0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,0}}, 0, 19,_T("ROfW.W d[!Dreg,Areg]"), 0, 0, 6, 1},
|
||||
{0xE6C0, 7,{ 4,13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFEC0,0,0,0,{{1,1},{1,0},{1,0},{1,2},{1,0}},0x00,0x13,_T("ROfW.W d[!Dreg,Areg]"), 0, 0, 6, 1},
|
||||
/* BFTST */
|
||||
{0xE8C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 17,_T("BFTST #1,s[!Areg,Apdi,Aipi,Immd]"), 0, 0, 0, 0},
|
||||
{0xE8C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x11,_T("BFTST #1,s[!Areg,Apdi,Aipi,Immd]"), 0, 0, 0, 0},
|
||||
/* BFEXTU */
|
||||
{0xE9C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 17,_T("BFEXTU #1,s[!Areg,Apdi,Aipi,Immd]"), 0, 0, 0, 0},
|
||||
{0xE9C0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x11,_T("BFEXTU #1,s[!Areg,Apdi,Aipi,Immd]"), 0, 0, 0, 0},
|
||||
/* BFCHG */
|
||||
{0xEAC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("BFCHG #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16]"), 0, 0, 0, 0},
|
||||
{0xEAC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("BFCHG #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16]"), 0, 0, 0, 0},
|
||||
/* BFEXTS */
|
||||
{0xEBC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 17,_T("BFEXTS #1,s[!Areg,Apdi,Aipi,Immd]"), 0, 0, 0, 0},
|
||||
{0xEBC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x11,_T("BFEXTS #1,s[!Areg,Apdi,Aipi,Immd]"), 0, 0, 0, 0},
|
||||
/* BFCLR */
|
||||
{0xECC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("BFCLR #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16]"), 0, 0, 0, 0},
|
||||
{0xECC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("BFCLR #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16]"), 0, 0, 0, 0},
|
||||
/* BFFFO */
|
||||
{0xEDC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 17,_T("BFFFO #1,s[!Areg,Apdi,Aipi,Immd]"), 0, 0, 0, 0},
|
||||
{0xEDC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x11,_T("BFFFO #1,s[!Areg,Apdi,Aipi,Immd]"), 0, 0, 0, 0},
|
||||
/* BFSET */
|
||||
{0xEEC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("BFSET #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16]"), 0, 0, 0, 0},
|
||||
{0xEEC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("BFSET #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16]"), 0, 0, 0, 0},
|
||||
/* BFINS */
|
||||
{0xEFC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}}, 0, 19,_T("BFINS #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16]"), 0, 0, 0, 0},
|
||||
{0xEFC0, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,0},{1,0},{1,2},{1,2}},0x00,0x13,_T("BFINS #1,s[!Areg,Apdi,Aipi,Immd,PC8r,PC16]"), 0, 0, 0, 0},
|
||||
/* FPP */
|
||||
{0xF200, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 17,_T("FPP #1,s"), 0, 0, 0, 0},
|
||||
{0xF200, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x11,_T("FPP #1,s"), 0, 0, 0, 0},
|
||||
/* FDBcc */
|
||||
{0xF240, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 1, 17,_T("FDBcc #1,s[Areg-Dreg]"), 0, 0, 0, 0},
|
||||
{0xF240, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x01,0x11,_T("FDBcc #1,s[Areg-Dreg]"), 0, 0, 0, 0},
|
||||
/* FScc */
|
||||
{0xF240, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 17,_T("FScc #1,s[!Areg,Immd,PC8r,PC16]"), 0, 0, 0, 0},
|
||||
{0xF240, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x11,_T("FScc #1,s[!Areg,Immd,PC8r,PC16]"), 0, 0, 0, 0},
|
||||
/* FTRAPcc */
|
||||
{0xF27A, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 16,_T("FTRAPcc #1"), 0, 0, 0, 0},
|
||||
{0xF27A, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x10,_T("FTRAPcc #1"), 0, 0, 0, 0},
|
||||
/* FTRAPcc */
|
||||
{0xF27B, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 16,_T("FTRAPcc #2"), 0, 0, 0, 0},
|
||||
{0xF27B, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x10,_T("FTRAPcc #2"), 0, 0, 0, 0},
|
||||
/* FTRAPcc */
|
||||
{0xF27C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("FTRAPcc"), 0, 0, 0, 0},
|
||||
{0xF27C, 0,{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFFF,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x00,_T("FTRAPcc"), 0, 0, 0, 0},
|
||||
/* FBcc */
|
||||
{0xF280, 6,{10,10,10,10,10,10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 1, 17,_T("FBcc #K,#1"), 0, 0, 0, 0},
|
||||
{0xF280, 6,{10,10,10,10,10,10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x01,0x11,_T("FBcc #K,#1"), 0, 0, 0, 0},
|
||||
/* FBcc */
|
||||
{0xF2C0, 6,{10,10,10,10,10,10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 1, 17,_T("FBcc #K,#2"), 0, 0, 0, 0},
|
||||
{0xF2C0, 6,{10,10,10,10,10,10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x01,0x11,_T("FBcc #K,#2"), 0, 0, 0, 0},
|
||||
/* FSAVE */
|
||||
{0xF300, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 32,_T("FSAVE s[!Dreg,Areg,Aipi,Immd,PC8r,PC16]"), 0, 0, 0, 0},
|
||||
{0xF300, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x20,_T("FSAVE s[!Dreg,Areg,Aipi,Immd,PC8r,PC16]"), 0, 0, 0, 0},
|
||||
/* FRESTORE */
|
||||
{0xF340, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 16,_T("FRESTORE s[!Dreg,Areg,Apdi,Immd]"), 0, 0, 0, 0},
|
||||
{0xF340, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,2,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x10,_T("FRESTORE s[!Dreg,Areg,Apdi,Immd]"), 0, 0, 0, 0},
|
||||
/* MMUOP030 */
|
||||
{0xF000, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,3,4,2,{{3,5},{3,5},{3,5},{3,5},{3,5}}, 4, 17,_T("MMUOP030 s[Dreg,Areg,Apdi,Aipi,Aind,Ad16,Ad8r,absl,absw],#1"), 0, 0, 0, 0},
|
||||
{0xF000, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,3,4,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x11,_T("MMUOP030 s[Dreg,Areg,Apdi,Aipi,Aind,Ad16,Ad8r,absl,absw],#1"), 0, 0, 0, 0},
|
||||
/* CINVL */
|
||||
{0xF408, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 2,_T("CINVL #p,Ar"), 0, 0, 0, 0},
|
||||
{0xF408, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x02,_T("CINVL #p,Ar"), 0, 0, 0, 0},
|
||||
/* CINVP */
|
||||
{0xF410, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 2,_T("CINVP #p,Ar"), 0, 0, 0, 0},
|
||||
{0xF410, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x02,_T("CINVP #p,Ar"), 0, 0, 0, 0},
|
||||
/* CINVA */
|
||||
{0xF418, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("CINVA #p"), 0, 0, 0, 0},
|
||||
{0xF418, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x00,_T("CINVA #p"), 0, 0, 0, 0},
|
||||
/* CPUSHL */
|
||||
{0xF428, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 2,_T("CPUSHL #p,Ar"), 0, 0, 0, 0},
|
||||
{0xF428, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x02,_T("CPUSHL #p,Ar"), 0, 0, 0, 0},
|
||||
/* CPUSHP */
|
||||
{0xF430, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 2,_T("CPUSHP #p,Ar"), 0, 0, 0, 0},
|
||||
{0xF430, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x02,_T("CPUSHP #p,Ar"), 0, 0, 0, 0},
|
||||
/* CPUSHA */
|
||||
{0xF438, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("CPUSHA #p"), 0, 0, 0, 0},
|
||||
{0xF438, 5,{19,19,15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFF38,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x00,_T("CPUSHA #p"), 0, 0, 0, 0},
|
||||
/* PFLUSHN */
|
||||
{0xF500, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("PFLUSHN Ara"), 0, 0, 0, 0},
|
||||
{0xF500, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x00,_T("PFLUSHN Ara"), 0, 0, 0, 0},
|
||||
/* PFLUSH */
|
||||
{0xF508, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("PFLUSH Ara"), 0, 0, 0, 0},
|
||||
{0xF508, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x00,_T("PFLUSH Ara"), 0, 0, 0, 0},
|
||||
/* PFLUSHAN */
|
||||
{0xF510, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("PFLUSHAN Ara"), 0, 0, 0, 0},
|
||||
{0xF510, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x00,_T("PFLUSHAN Ara"), 0, 0, 0, 0},
|
||||
/* PFLUSHA */
|
||||
{0xF518, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("PFLUSHA Ara"), 0, 0, 0, 0},
|
||||
{0xF518, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,0,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x00,_T("PFLUSHA Ara"), 0, 0, 0, 0},
|
||||
/* PTESTW */
|
||||
{0xF548, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,5,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("PTESTW Ara"), 0, 0, 0, 0},
|
||||
{0xF548, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,5,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x00,_T("PTESTW Ara"), 0, 0, 0, 0},
|
||||
/* PTESTR */
|
||||
{0xF568, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,5,2,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 4, 0,_T("PTESTR Ara"), 0, 0, 0, 0},
|
||||
{0xF568, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,5,2,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x04,0x00,_T("PTESTR Ara"), 0, 0, 0, 0},
|
||||
/* MOVE16 */
|
||||
{0xF620, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MOVE16 ArP,AxP"), 0, 0, 0, 0},
|
||||
{0xF620, 3,{15,15,15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFF8,4,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x12,_T("MOVE16 ArP,AxP"), 0, 0, 0, 0},
|
||||
/* MOVE16 */
|
||||
{0xF600, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,4,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MOVE16 s[Dreg-Aipi],Al"), 0, 0, 0, 0},
|
||||
{0xF600, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,4,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x12,_T("MOVE16 s[Dreg-Aipi],Al"), 0, 0, 0, 0},
|
||||
/* MOVE16 */
|
||||
{0xF600, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,4,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MOVE16 Al,d[Areg-Aipi]"), 0, 0, 0, 0},
|
||||
{0xF600, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,4,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x12,_T("MOVE16 Al,d[Areg-Aipi]"), 0, 0, 0, 0},
|
||||
/* MOVE16 */
|
||||
{0xF600, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,4,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MOVE16 s[Aind],Al"), 0, 0, 0, 0},
|
||||
{0xF600, 6,{11,11,11,12,12,12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,4,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x12,_T("MOVE16 s[Aind],Al"), 0, 0, 0, 0},
|
||||
/* MOVE16 */
|
||||
{0xF600, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,4,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}}, 0, 18,_T("MOVE16 Al,d[Aipi-Aind]"), 0, 0, 0, 0}};
|
||||
{0xF600, 6,{13,13,13,14,14,14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},0xFFC0,4,0,0,{{1,1},{1,1},{1,1},{1,1},{1,1}},0x00,0x12,_T("MOVE16 Al,d[Aipi-Aind]"), 0, 0, 0, 0}};
|
||||
int n_defs68k = 227;
|
||||
|
|
|
|||
51730
src/cpuemu_0.cpp
51730
src/cpuemu_0.cpp
File diff suppressed because it is too large
Load diff
173009
src/cpuemu_11.cpp
173009
src/cpuemu_11.cpp
File diff suppressed because it is too large
Load diff
155277
src/cpuemu_13.cpp
Normal file
155277
src/cpuemu_13.cpp
Normal file
File diff suppressed because it is too large
Load diff
42909
src/cpuemu_4.cpp
42909
src/cpuemu_4.cpp
File diff suppressed because it is too large
Load diff
52099
src/cpuemu_40.cpp
52099
src/cpuemu_40.cpp
File diff suppressed because it is too large
Load diff
43083
src/cpuemu_44.cpp
43083
src/cpuemu_44.cpp
File diff suppressed because it is too large
Load diff
51370
src/cpustbl.cpp
51370
src/cpustbl.cpp
File diff suppressed because it is too large
Load diff
201
src/custom.cpp
201
src/custom.cpp
|
|
@ -273,9 +273,9 @@ static int sprite_width, sprres;
|
|||
static int sprite_sprctlmask;
|
||||
int sprite_buffer_res;
|
||||
|
||||
//#ifdef CPUEMU_13
|
||||
#ifdef CPUEMU_13
|
||||
uae_u8 cycle_line[256 + 1];
|
||||
//#endif
|
||||
#endif
|
||||
|
||||
static bool bpl1dat_written, bpl1dat_written_at_least_once;
|
||||
static bool bpldmawasactive;
|
||||
|
|
@ -547,9 +547,9 @@ STATIC_INLINE void setclr (uae_u16 *p, uae_u16 val)
|
|||
|
||||
STATIC_INLINE void alloc_cycle (int hpos, int type)
|
||||
{
|
||||
//#ifdef CPUEMU_13
|
||||
#ifdef CPUEMU_13
|
||||
cycle_line[hpos] = type;
|
||||
//#endif
|
||||
#endif
|
||||
}
|
||||
STATIC_INLINE void alloc_cycle_maybe (int hpos, int type)
|
||||
{
|
||||
|
|
@ -9961,11 +9961,11 @@ void vsync_event_done(void)
|
|||
static void hsync_handler_post (bool onvsync)
|
||||
{
|
||||
last_copper_hpos = 0;
|
||||
//#ifdef CPUEMU_13
|
||||
#ifdef CPUEMU_13
|
||||
if (currprefs.cpu_memory_cycle_exact || currprefs.blitter_cycle_exact) {
|
||||
memset (cycle_line, 0, sizeof cycle_line);
|
||||
}
|
||||
//#endif
|
||||
#endif
|
||||
|
||||
// genlock active:
|
||||
// vertical: interlaced = toggles every other field, non-interlaced = both fields (normal)
|
||||
|
|
@ -12117,20 +12117,13 @@ static int dma_cycle(uaecptr addr, uae_u16 v, int *mode)
|
|||
if (blt_info.blit_main || blt_info.blit_finald) {
|
||||
if (blt_info.blit_main && !blitpri && blt_info.nasty_cnt >= BLIT_NASTY_CPU_STEAL_CYCLE_COUNT && (cycle_line[hpos_old] & CYCLE_MASK) == 0 && !bpldma) {
|
||||
alloc_cycle (hpos_old, CYCLE_CPUNASTY);
|
||||
if (debug_dma && blt_info.nasty_cnt >= BLIT_NASTY_CPU_STEAL_CYCLE_COUNT) {
|
||||
record_dma_event(DMA_EVENT_CPUBLITTERSTOLEN, hpos_old, vpos);
|
||||
}
|
||||
break;
|
||||
}
|
||||
#if 0
|
||||
decide_blitter(hpos);
|
||||
#else
|
||||
// CPU write must be done at the same time with blitter idle cycles
|
||||
if (decide_blitter_maybe_write(hpos, addr, v)) {
|
||||
// inform caller that write was already done
|
||||
*mode = -2;
|
||||
}
|
||||
#endif
|
||||
// copper may have been waiting for the blitter
|
||||
sync_copper (hpos);
|
||||
}
|
||||
|
|
@ -12138,9 +12131,6 @@ static int dma_cycle(uaecptr addr, uae_u16 v, int *mode)
|
|||
alloc_cycle (hpos_old, CYCLE_CPU);
|
||||
break;
|
||||
}
|
||||
if (debug_dma && !blitpri && blt_info.nasty_cnt >= BLIT_NASTY_CPU_STEAL_CYCLE_COUNT) {
|
||||
record_dma_event(DMA_EVENT_CPUBLITTERSTEAL, hpos_old, vpos);
|
||||
}
|
||||
|
||||
blt_info.nasty_cnt++;
|
||||
do_cycles (1 * CYCLE_UNIT);
|
||||
|
|
@ -12150,19 +12140,6 @@ static int dma_cycle(uaecptr addr, uae_u16 v, int *mode)
|
|||
return hpos_old;
|
||||
}
|
||||
|
||||
static void sync_ce020 (void)
|
||||
{
|
||||
unsigned long c;
|
||||
int extra;
|
||||
|
||||
c = get_cycles ();
|
||||
extra = c & (CYCLE_UNIT - 1);
|
||||
if (extra) {
|
||||
extra = CYCLE_UNIT - extra;
|
||||
do_cycles (extra);
|
||||
}
|
||||
}
|
||||
|
||||
#define SETIFCHIP \
|
||||
if (addr < 0xd80000) \
|
||||
last_custom_value1 = v;
|
||||
|
|
@ -12175,20 +12152,6 @@ uae_u32 wait_cpu_cycle_read (uaecptr addr, int mode)
|
|||
hpos = dma_cycle(0xffffffff, 0xffff, NULL);
|
||||
x_do_cycles_pre (CYCLE_UNIT);
|
||||
|
||||
#ifdef DEBUGGER
|
||||
if (debug_dma) {
|
||||
int reg = 0x1000;
|
||||
if (mode < 0)
|
||||
reg |= 4;
|
||||
else if (mode > 0)
|
||||
reg |= 2;
|
||||
else
|
||||
reg |= 1;
|
||||
record_dma_read(reg, addr, hpos, vpos, DMARECORD_CPU, mode == -2 || mode == 2 ? 0 : 1);
|
||||
}
|
||||
peekdma_data.mask = 0;
|
||||
#endif
|
||||
|
||||
switch(mode)
|
||||
{
|
||||
case -1:
|
||||
|
|
@ -12208,68 +12171,9 @@ uae_u32 wait_cpu_cycle_read (uaecptr addr, int mode)
|
|||
break;
|
||||
}
|
||||
|
||||
#ifdef DEBUGGER
|
||||
if (debug_dma) {
|
||||
record_dma_read_value(v);
|
||||
}
|
||||
#endif
|
||||
|
||||
x_do_cycles_post (CYCLE_UNIT, v);
|
||||
|
||||
regs.chipset_latch_rw = regs.chipset_latch_read = v;
|
||||
SETIFCHIP
|
||||
return v;
|
||||
}
|
||||
|
||||
uae_u32 wait_cpu_cycle_read_ce020 (uaecptr addr, int mode)
|
||||
{
|
||||
uae_u32 v = 0;
|
||||
int hpos;
|
||||
|
||||
sync_ce020 ();
|
||||
hpos = dma_cycle(0xffffffff, 0xffff, NULL);
|
||||
x_do_cycles_pre (CYCLE_UNIT);
|
||||
|
||||
#ifdef DEBUGGER
|
||||
if (debug_dma) {
|
||||
int reg = 0x1000;
|
||||
if (mode < 0)
|
||||
reg |= 4;
|
||||
else if (mode > 0)
|
||||
reg |= 2;
|
||||
else
|
||||
reg |= 1;
|
||||
record_dma_read(reg, addr, hpos, vpos, DMARECORD_CPU, mode == -2 || mode == 2 ? 0 : 1);
|
||||
}
|
||||
peekdma_data.mask = 0;
|
||||
#endif
|
||||
switch (mode) {
|
||||
case -1:
|
||||
v = get_long(addr);
|
||||
break;
|
||||
case -2:
|
||||
v = get_longi(addr);
|
||||
break;
|
||||
case 1:
|
||||
v = get_word(addr);
|
||||
break;
|
||||
case 2:
|
||||
v = get_wordi(addr);
|
||||
break;
|
||||
case 0:
|
||||
v = get_byte(addr);
|
||||
break;
|
||||
}
|
||||
|
||||
#ifdef DEBUGGER
|
||||
if (debug_dma) {
|
||||
record_dma_read_value(v);
|
||||
}
|
||||
#endif
|
||||
|
||||
x_do_cycles_post (CYCLE_UNIT, v);
|
||||
|
||||
regs.chipset_latch_rw = regs.chipset_latch_read = v;
|
||||
regs.chipset_latch_rw = v;
|
||||
SETIFCHIP
|
||||
return v;
|
||||
}
|
||||
|
|
@ -12281,20 +12185,6 @@ void wait_cpu_cycle_write (uaecptr addr, int mode, uae_u32 v)
|
|||
hpos = dma_cycle(addr, v, &mode);
|
||||
x_do_cycles_pre (CYCLE_UNIT);
|
||||
|
||||
#ifdef DEBUGGER
|
||||
if (debug_dma) {
|
||||
int reg = 0x1100;
|
||||
if (mode < 0)
|
||||
reg |= 4;
|
||||
else if (mode > 0)
|
||||
reg |= 2;
|
||||
else
|
||||
reg |= 1;
|
||||
record_dma_write(reg, v, addr, hpos, vpos, DMARECORD_CPU, 1);
|
||||
}
|
||||
peekdma_data.mask = 0;
|
||||
#endif
|
||||
|
||||
if (mode > -2) {
|
||||
if (mode < 0)
|
||||
put_long(addr, v);
|
||||
|
|
@ -12306,44 +12196,7 @@ void wait_cpu_cycle_write (uaecptr addr, int mode, uae_u32 v)
|
|||
|
||||
x_do_cycles_post (CYCLE_UNIT, v);
|
||||
|
||||
regs.chipset_latch_rw = regs.chipset_latch_write = v;
|
||||
SETIFCHIP
|
||||
}
|
||||
|
||||
void wait_cpu_cycle_write_ce020 (uaecptr addr, int mode, uae_u32 v)
|
||||
{
|
||||
int hpos;
|
||||
|
||||
sync_ce020 ();
|
||||
hpos = dma_cycle(0xffffffff, 0xffff, NULL);
|
||||
x_do_cycles_pre (CYCLE_UNIT);
|
||||
|
||||
#ifdef DEBUGGER
|
||||
if (debug_dma) {
|
||||
int reg = 0x1100;
|
||||
if (mode < 0)
|
||||
reg |= 4;
|
||||
else if (mode > 0)
|
||||
reg |= 2;
|
||||
else
|
||||
reg |= 1;
|
||||
record_dma_write(reg, v, addr, hpos, vpos, DMARECORD_CPU, 1);
|
||||
}
|
||||
peekdma_data.mask = 0;
|
||||
#endif
|
||||
|
||||
if (mode < 0)
|
||||
put_long (addr, v);
|
||||
else if (mode > 0)
|
||||
put_word (addr, v);
|
||||
else if (mode == 0)
|
||||
put_byte (addr, v);
|
||||
|
||||
// chipset buffer latches the write, CPU does
|
||||
// not need to wait for the chipset cycle to finish.
|
||||
x_do_cycles_post (cpucycleunit, v);
|
||||
|
||||
regs.chipset_latch_rw = regs.chipset_latch_write = v;
|
||||
regs.chipset_latch_rw = v;
|
||||
SETIFCHIP
|
||||
}
|
||||
|
||||
|
|
@ -12364,45 +12217,9 @@ void do_cycles_ce (unsigned long cycles)
|
|||
extra_cycle = cycles;
|
||||
}
|
||||
|
||||
void do_cycles_ce020 (unsigned long cycles)
|
||||
{
|
||||
unsigned long c;
|
||||
int extra;
|
||||
|
||||
if (!cycles)
|
||||
return;
|
||||
c = get_cycles ();
|
||||
extra = c & (CYCLE_UNIT - 1);
|
||||
if (extra) {
|
||||
extra = CYCLE_UNIT - extra;
|
||||
if (extra >= cycles) {
|
||||
do_cycles (cycles);
|
||||
return;
|
||||
}
|
||||
do_cycles (extra);
|
||||
cycles -= extra;
|
||||
}
|
||||
c = cycles;
|
||||
while (c) {
|
||||
int hpos = current_hpos () + 1;
|
||||
decide_line (hpos);
|
||||
sync_copper (hpos);
|
||||
decide_fetch_ce (hpos);
|
||||
if (blt_info.blit_main || blt_info.blit_finald)
|
||||
decide_blitter (hpos);
|
||||
if (c < CYCLE_UNIT)
|
||||
break;
|
||||
do_cycles (1 * CYCLE_UNIT);
|
||||
c -= CYCLE_UNIT;
|
||||
}
|
||||
if (c > 0)
|
||||
do_cycles (c);
|
||||
}
|
||||
|
||||
|
||||
bool is_cycle_ce(uaecptr addr)
|
||||
{
|
||||
addrbank *ab = get_mem_bank_real(addr);
|
||||
addrbank *ab = &get_mem_bank(addr);
|
||||
if (!ab || (ab->flags & ABFLAG_CHIPRAM) || ab == &custom_bank) {
|
||||
int hpos = current_hpos();
|
||||
return (cycle_line[hpos] & CYCLE_MASK) != 0;
|
||||
|
|
|
|||
|
|
@ -306,7 +306,6 @@ void do_leave_program (void)
|
|||
inputdevice_close ();
|
||||
DISK_free ();
|
||||
close_sound ();
|
||||
dump_counts ();
|
||||
#ifdef SERIAL_PORT
|
||||
serial_exit ();
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -251,7 +251,7 @@ static bool event_check_vsync(void)
|
|||
return false;
|
||||
}
|
||||
|
||||
void do_cycles_cpu_fastest(uae_u32 cycles_to_add)
|
||||
void do_cycles_cpu_fastest(unsigned long cycles_to_add)
|
||||
{
|
||||
if (!currprefs.cpu_thread) {
|
||||
if ((pissoff -= cycles_to_add) >= 0)
|
||||
|
|
@ -288,7 +288,7 @@ void do_cycles_cpu_fastest(uae_u32 cycles_to_add)
|
|||
currcycle += cycles_to_add;
|
||||
}
|
||||
|
||||
void do_cycles_cpu_norm(uae_u32 cycles_to_add)
|
||||
void do_cycles_cpu_norm(unsigned long cycles_to_add)
|
||||
{
|
||||
while ((nextevent - currcycle) <= cycles_to_add)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -403,7 +403,7 @@ static void expamem_init_clear2 (void)
|
|||
static addrbank *expamem_init_last (void)
|
||||
{
|
||||
expamem_init_clear2 ();
|
||||
write_log (_T("Memory map after autoconfig:\n"));
|
||||
//write_log (_T("Memory map after autoconfig:\n"));
|
||||
//memory_map_dump ();
|
||||
return NULL;
|
||||
}
|
||||
|
|
|
|||
902
src/fpp.cpp
902
src/fpp.cpp
File diff suppressed because it is too large
Load diff
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* UAE - The Un*x Amiga Emulator
|
||||
*
|
||||
* MC68881/68882/68040/68060 FPU emulation
|
||||
* MC68881/68882/68040 FPU emulation
|
||||
*
|
||||
* Copyright 1996 Herman ten Brugge
|
||||
* Modified 2005 Peter Keunecke
|
||||
|
|
@ -14,10 +14,6 @@
|
|||
|
||||
#define __USE_ISOC9X /* We might be able to pick up a NaN */
|
||||
|
||||
#include <math.h>
|
||||
#include <float.h>
|
||||
#include <fenv.h>
|
||||
|
||||
#define USE_HOST_ROUNDING 1
|
||||
|
||||
static uae_u32 dhex_nan[] ={0xffffffff, 0x7fffffff};
|
||||
|
|
@ -129,23 +125,13 @@ static uae_u32 fpp_from_single(fpdata *fpd)
|
|||
|
||||
static void fpp_to_double(fpdata *fpd, uae_u32 wrd1, uae_u32 wrd2)
|
||||
{
|
||||
#ifdef WORDS_BIGENDIAN
|
||||
((uae_u32*)&(fpd->fp))[0] = wrd1;
|
||||
((uae_u32*)&(fpd->fp))[1] = wrd2;
|
||||
#else
|
||||
((uae_u32*)&(fpd->fp))[1] = wrd1;
|
||||
((uae_u32*)&(fpd->fp))[0] = wrd2;
|
||||
#endif
|
||||
}
|
||||
static void fpp_from_double(fpdata *fpd, uae_u32 *wrd1, uae_u32 *wrd2)
|
||||
{
|
||||
#ifdef WORDS_BIGENDIAN
|
||||
*wrd1 = ((uae_u32*)&(fpd->fp))[0];
|
||||
*wrd2 = ((uae_u32*)&(fpd->fp))[1];
|
||||
#else
|
||||
*wrd1 = ((uae_u32*)&(fpd->fp))[1];
|
||||
*wrd2 = ((uae_u32*)&(fpd->fp))[0];
|
||||
#endif
|
||||
}
|
||||
void fpp_to_exten(fpdata *fpd, uae_u32 wrd1, uae_u32 wrd2, uae_u32 wrd3)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -951,7 +951,7 @@ static uae_u64 vhd_write (struct hardfiledata *hfd, void *v, uae_u64 offset, uae
|
|||
return written;
|
||||
}
|
||||
|
||||
#ifndef AMIBERRY
|
||||
|
||||
int vhd_create (const TCHAR *name, uae_u64 size, uae_u32 dostype)
|
||||
{
|
||||
struct hardfiledata hfd;
|
||||
|
|
@ -1086,7 +1086,6 @@ end:
|
|||
zfile_fclose (zf);
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int hdf_read2 (struct hardfiledata *hfd, void *buffer, uae_u64 offset, int len)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -842,7 +842,7 @@ static void process_rw_command (struct ide_hdf *ide)
|
|||
static void process_packet_command (struct ide_hdf *ide)
|
||||
{
|
||||
setbsy (ide);
|
||||
write_comm_pipe_u32 (&ide->its->requests, ide->num | 0x100, 1);
|
||||
write_comm_pipe_u32 (&ide->its->requests, ide->num | 0x8000, 1);
|
||||
}
|
||||
|
||||
static void atapi_data_done (struct ide_hdf *ide)
|
||||
|
|
@ -1566,8 +1566,8 @@ static int ide_thread (void *idedata)
|
|||
struct ide_hdf *ide;
|
||||
if (its->state == 0 || unit == 0xfffffff)
|
||||
break;
|
||||
ide = its->idetable[unit & 0xff];
|
||||
if (unit & 0x100)
|
||||
ide = its->idetable[unit & 0x7fff];
|
||||
if (unit & 0x8000)
|
||||
do_process_packet_command (ide);
|
||||
else
|
||||
do_process_rw_command (ide);
|
||||
|
|
|
|||
|
|
@ -340,29 +340,33 @@ STATIC_INLINE void m68k_do_rts_ce030 (void)
|
|||
STATIC_INLINE uae_u32 get_word_000_prefetch(int o)
|
||||
{
|
||||
uae_u32 v = regs.irc;
|
||||
regs.irc = regs.ird = get_wordi (m68k_getpci () + o);
|
||||
regs.irc = regs.read_buffer = regs.db = get_wordi (m68k_getpci () + o);
|
||||
return v;
|
||||
}
|
||||
STATIC_INLINE uae_u32 get_byte_000(uaecptr addr)
|
||||
{
|
||||
uae_u32 v = get_byte (addr);
|
||||
regs.ird = (v << 8) | v;
|
||||
regs.db = (v << 8) | v;
|
||||
regs.read_buffer = v;
|
||||
return v;
|
||||
}
|
||||
STATIC_INLINE uae_u32 get_word_000(uaecptr addr)
|
||||
{
|
||||
uae_u32 v = get_word (addr);
|
||||
regs.ird = v;
|
||||
regs.db = v;
|
||||
regs.read_buffer = v;
|
||||
return v;
|
||||
}
|
||||
STATIC_INLINE void put_byte_000(uaecptr addr, uae_u32 v)
|
||||
{
|
||||
regs.ird = (v << 8) | v;
|
||||
regs.db = (v << 8) | v;
|
||||
regs.write_buffer = v;
|
||||
put_byte (addr, v);
|
||||
}
|
||||
STATIC_INLINE void put_word_000(uaecptr addr, uae_u32 v)
|
||||
{
|
||||
regs.ird = v;
|
||||
regs.db = v;
|
||||
regs.write_buffer = v;
|
||||
put_word (addr, v);
|
||||
}
|
||||
#endif
|
||||
|
|
@ -373,11 +377,11 @@ STATIC_INLINE void do_cycles_ce000_internal(int clocks)
|
|||
{
|
||||
if (currprefs.m68k_speed < 0)
|
||||
return;
|
||||
x_do_cycles (clocks * cpucycleunit);
|
||||
x_do_cycles (clocks * CYCLE_UNIT / 2);
|
||||
}
|
||||
STATIC_INLINE void do_cycles_ce000 (int clocks)
|
||||
{
|
||||
x_do_cycles (clocks * cpucycleunit);
|
||||
x_do_cycles (clocks * CYCLE_UNIT / 2);
|
||||
}
|
||||
|
||||
STATIC_INLINE void ipl_fetch (void)
|
||||
|
|
|
|||
8775
src/include/cputbl.h
8775
src/include/cputbl.h
File diff suppressed because it is too large
Load diff
|
|
@ -13,6 +13,7 @@
|
|||
#define UAE_EVENTS_H
|
||||
|
||||
#include "uae/types.h"
|
||||
|
||||
#include "machdep/rpt.h"
|
||||
|
||||
extern frame_time_t vsyncmintime, vsyncmintimepre;
|
||||
|
|
@ -23,22 +24,26 @@ extern unsigned long int vsync_cycles;
|
|||
extern unsigned long start_cycles;
|
||||
extern int event2_count;
|
||||
extern bool event_wait;
|
||||
extern int speedup_timelimit;
|
||||
|
||||
extern void compute_vsynctime (void);
|
||||
extern void init_eventtab (void);
|
||||
extern void do_cycles_ce (unsigned long cycles);
|
||||
extern void do_cycles_ce020 (unsigned long cycles);
|
||||
extern void events_schedule (void);
|
||||
extern void do_cycles_slow (unsigned long cycles_to_add);
|
||||
extern void events_reset_syncline(void);
|
||||
|
||||
extern bool is_cycle_ce(uaecptr);
|
||||
|
||||
extern unsigned long currcycle, nextevent;
|
||||
extern int is_syncline, is_syncline_end;
|
||||
typedef void (*evfunc)(void);
|
||||
typedef void (*evfunc2)(uae_u32);
|
||||
|
||||
typedef void (*do_cycles_func)(uae_u32);
|
||||
typedef void (*do_cycles_func)(unsigned long);
|
||||
extern do_cycles_func do_cycles;
|
||||
void do_cycles_cpu_fastest(uae_u32 cycles_to_add);
|
||||
void do_cycles_cpu_norm(uae_u32 cycles_to_add);
|
||||
void do_cycles_cpu_fastest(unsigned long cycles_to_add);
|
||||
void do_cycles_cpu_norm(unsigned long cycles_to_add);
|
||||
|
||||
typedef unsigned long int evt;
|
||||
|
||||
|
|
|
|||
|
|
@ -3,17 +3,11 @@
|
|||
|
||||
#include "uae/types.h"
|
||||
|
||||
struct m68k_exception
|
||||
{
|
||||
struct m68k_exception {
|
||||
int prb;
|
||||
|
||||
explicit m68k_exception(int exc) : prb(exc)
|
||||
{
|
||||
}
|
||||
|
||||
explicit operator int() const { return prb; }
|
||||
m68k_exception (int exc) : prb (exc) {}
|
||||
operator int() { return prb; }
|
||||
};
|
||||
|
||||
#define TRY(var) try
|
||||
#define CATCH(var) catch(m68k_exception var)
|
||||
#define THROW(n) throw m68k_exception(n)
|
||||
|
|
|
|||
|
|
@ -12,7 +12,6 @@
|
|||
#include "uae/types.h"
|
||||
#include "readcpu.h"
|
||||
#include "machdep/m68k.h"
|
||||
#include "events.h"
|
||||
|
||||
extern const int areg_byteinc[];
|
||||
extern const int imm8_table[];
|
||||
|
|
@ -21,16 +20,17 @@ extern int movem_index1[256];
|
|||
extern int movem_index2[256];
|
||||
extern int movem_next[256];
|
||||
|
||||
typedef uae_u32 REGPARAM3 cpuop_func(uae_u32) REGPARAM;
|
||||
typedef void REGPARAM3 cpuop_func_ce(uae_u32) REGPARAM;
|
||||
extern int hardware_bus_error;
|
||||
|
||||
struct cputbl
|
||||
{
|
||||
cpuop_func* handler;
|
||||
typedef uae_u32 REGPARAM3 cpuop_func (uae_u32) REGPARAM;
|
||||
typedef void REGPARAM3 cpuop_func_ce (uae_u32) REGPARAM;
|
||||
|
||||
struct cputbl {
|
||||
cpuop_func *handler_ff;
|
||||
uae_u16 opcode;
|
||||
uae_s8 length;
|
||||
uae_s8 disp020[2];
|
||||
uae_u8 branch;
|
||||
uae_s8 branch;
|
||||
};
|
||||
|
||||
#ifdef JIT
|
||||
|
|
@ -45,15 +45,14 @@ typedef uae_u32 REGPARAM3 compop_func (uae_u32) REGPARAM;
|
|||
#define COMP_OPCODE_ISCJUMP 0x0010
|
||||
#define COMP_OPCODE_USES_FPU 0x0020
|
||||
|
||||
struct comptbl
|
||||
{
|
||||
compop_func* handler;
|
||||
struct comptbl {
|
||||
compop_func *handler;
|
||||
uae_u32 specific;
|
||||
uae_u32 opcode;
|
||||
};
|
||||
#endif
|
||||
|
||||
extern uae_u32 REGPARAM3 op_illg(uae_u32) REGPARAM;
|
||||
extern uae_u32 REGPARAM3 op_illg (uae_u32) REGPARAM;
|
||||
|
||||
typedef uae_u8 flagtype;
|
||||
|
||||
|
|
@ -62,49 +61,11 @@ typedef uae_u8 flagtype;
|
|||
typedef double fptype;
|
||||
#endif
|
||||
|
||||
#define MAX68020CYCLES 4
|
||||
|
||||
#define CPU_PIPELINE_MAX 4
|
||||
#define CPU000_MEM_CYCLE 4
|
||||
#define CPU000_CLOCK_MULT 2
|
||||
#define CPU020_MEM_CYCLE 3
|
||||
#define CPU020_CLOCK_MULT 4
|
||||
|
||||
#define CACHELINES020 64
|
||||
struct cache020
|
||||
{
|
||||
uae_u32 data;
|
||||
uae_u32 tag;
|
||||
bool valid;
|
||||
};
|
||||
|
||||
#define CACHELINES030 16
|
||||
struct cache030
|
||||
{
|
||||
uae_u32 data[4];
|
||||
bool valid[4];
|
||||
uae_u32 tag;
|
||||
uae_u8 fc;
|
||||
};
|
||||
|
||||
#define CACHESETS040 64
|
||||
#define CACHESETS060 128
|
||||
#define CACHELINES040 4
|
||||
struct cache040
|
||||
{
|
||||
uae_u32 data[CACHELINES040][4];
|
||||
bool dirty[CACHELINES040][4];
|
||||
bool gdirty[CACHELINES040];
|
||||
bool valid[CACHELINES040];
|
||||
uae_u32 tag[CACHELINES040];
|
||||
};
|
||||
|
||||
struct mmufixup
|
||||
{
|
||||
int reg;
|
||||
uae_u32 value;
|
||||
};
|
||||
|
||||
extern struct mmufixup mmufixup[1];
|
||||
|
||||
typedef struct
|
||||
|
|
@ -127,16 +88,12 @@ struct regstruct
|
|||
uae_u8 *pc_oldp;
|
||||
uae_u16 opcode;
|
||||
uae_u32 instruction_pc;
|
||||
uae_u32 trace_pc;
|
||||
|
||||
uae_u16 irc, ir, ird;
|
||||
uae_u16 irc, ir;
|
||||
volatile uae_atomic spcflags;
|
||||
uae_u32 last_prefetch;
|
||||
uae_u32 chipset_latch_rw;
|
||||
uae_u32 chipset_latch_read;
|
||||
uae_u32 chipset_latch_write;
|
||||
uae_u16 db, write_buffer, read_buffer;
|
||||
int loop_mode;
|
||||
int instruction_cnt;
|
||||
|
||||
uaecptr usp, isp, msp;
|
||||
uae_u16 sr;
|
||||
|
|
@ -163,6 +120,7 @@ struct regstruct
|
|||
uae_u32 fpu_exp_state;
|
||||
uae_u16 fp_opword;
|
||||
uaecptr fp_ea;
|
||||
bool fp_ea_set;
|
||||
uae_u32 fp_exp_pend, fp_unimp_pend;
|
||||
bool fpu_exp_pre;
|
||||
bool fp_unimp_ins;
|
||||
|
|
@ -171,7 +129,7 @@ struct regstruct
|
|||
#endif
|
||||
uae_u32 cacr, caar;
|
||||
uae_u32 itt0, itt1, dtt0, dtt1;
|
||||
uae_u32 tcr, mmusr, urp, srp, buscr;
|
||||
uae_u32 tcr, mmusr, urp, srp;
|
||||
uae_u32 mmu_fault_addr;
|
||||
|
||||
uae_u32 pcr;
|
||||
|
|
@ -194,11 +152,38 @@ struct regstruct
|
|||
|
||||
extern struct regstruct regs;
|
||||
|
||||
#define MAX_CPUTRACESIZE 128
|
||||
struct cputracememory
|
||||
{
|
||||
uae_u32 addr;
|
||||
uae_u32 data;
|
||||
int mode;
|
||||
};
|
||||
|
||||
struct cputracestruct
|
||||
{
|
||||
uae_u32 regs[16];
|
||||
uae_u32 usp, isp, pc;
|
||||
uae_u16 ir, irc, sr, opcode;
|
||||
int intmask, stopped, state;
|
||||
|
||||
uae_u32 msp, vbr;
|
||||
uae_u32 cacr, caar;
|
||||
uae_u16 read_buffer, write_buffer;
|
||||
|
||||
uae_u32 startcycles;
|
||||
int needendcycles;
|
||||
int memoryoffset;
|
||||
int cyclecounter, cyclecounter_pre, cyclecounter_post;
|
||||
int readcounter, writecounter;
|
||||
struct cputracememory ctm[MAX_CPUTRACESIZE];
|
||||
};
|
||||
|
||||
#define REGS_DEFINED
|
||||
#include "machdep/m68k.h"
|
||||
#include "events.h"
|
||||
|
||||
STATIC_INLINE uae_u32 munge24(uae_u32 x)
|
||||
STATIC_INLINE uae_u32 munge24 (uae_u32 x)
|
||||
{
|
||||
return x & regs.address_space_mask;
|
||||
}
|
||||
|
|
@ -212,14 +197,13 @@ STATIC_INLINE void set_special_exter(uae_u32 x)
|
|||
{
|
||||
atomic_or(®s.spcflags, x);
|
||||
}
|
||||
|
||||
STATIC_INLINE void set_special(uae_u32 x)
|
||||
STATIC_INLINE void set_special (uae_u32 x)
|
||||
{
|
||||
atomic_or(®s.spcflags, x);
|
||||
cycles_do_special();
|
||||
cycles_do_special ();
|
||||
}
|
||||
|
||||
STATIC_INLINE void unset_special(uae_u32 x)
|
||||
STATIC_INLINE void unset_special (uae_u32 x)
|
||||
{
|
||||
atomic_and(®s.spcflags, ~x);
|
||||
}
|
||||
|
|
@ -227,23 +211,26 @@ STATIC_INLINE void unset_special(uae_u32 x)
|
|||
#define m68k_dreg(r,num) ((r).regs[(num)])
|
||||
#define m68k_areg(r,num) (((r).regs + 8)[(num)])
|
||||
|
||||
extern uae_u32 (*x_get_byte)(uaecptr addr);
|
||||
extern uae_u32 (*x_get_word)(uaecptr addr);
|
||||
extern uae_u32 (*x_get_long)(uaecptr addr);
|
||||
extern void (*x_put_byte)(uaecptr addr, uae_u32 v);
|
||||
extern void (*x_put_word)(uaecptr addr, uae_u32 v);
|
||||
extern void (*x_put_long)(uaecptr addr, uae_u32 v);
|
||||
extern uae_u32(*x_get_byte)(uaecptr addr);
|
||||
extern uae_u32(*x_get_word)(uaecptr addr);
|
||||
extern uae_u32(*x_get_long)(uaecptr addr);
|
||||
extern void(*x_put_byte)(uaecptr addr, uae_u32 v);
|
||||
extern void(*x_put_word)(uaecptr addr, uae_u32 v);
|
||||
extern void(*x_put_long)(uaecptr addr, uae_u32 v);
|
||||
extern uae_u32(*x_next_iword)(void);
|
||||
extern uae_u32(*x_next_ilong)(void);
|
||||
extern uae_u32(*x_get_iword)(int);
|
||||
|
||||
#define x_cp_get_byte x_get_byte
|
||||
#define x_cp_get_word x_get_word
|
||||
#define x_cp_get_long x_get_long
|
||||
#define x_cp_put_byte x_put_byte
|
||||
#define x_cp_put_word x_put_word
|
||||
#define x_cp_put_long x_put_long
|
||||
#define x_cp_next_iword() next_diword()
|
||||
#define x_cp_next_ilong() next_dilong()
|
||||
extern uae_u32(*x_cp_get_byte)(uaecptr addr);
|
||||
extern uae_u32(*x_cp_get_word)(uaecptr addr);
|
||||
extern uae_u32(*x_cp_get_long)(uaecptr addr);
|
||||
extern void(*x_cp_put_byte)(uaecptr addr, uae_u32 v);
|
||||
extern void(*x_cp_put_word)(uaecptr addr, uae_u32 v);
|
||||
extern void(*x_cp_put_long)(uaecptr addr, uae_u32 v);
|
||||
extern uae_u32(*x_cp_next_iword)(void);
|
||||
extern uae_u32(*x_cp_next_ilong)(void);
|
||||
|
||||
#define x_cp_get_disp_ea_020(base) _get_disp_ea_020(base)
|
||||
#define x_cp_get_disp_ea_020(base) x_get_disp_ea_020(base)
|
||||
|
||||
/* direct (regs.pc_p) access */
|
||||
|
||||
|
|
@ -252,18 +239,15 @@ STATIC_INLINE void m68k_setpc(uaecptr newpc)
|
|||
regs.pc_p = regs.pc_oldp = get_real_address(newpc);
|
||||
regs.instruction_pc = regs.pc = newpc;
|
||||
}
|
||||
|
||||
STATIC_INLINE void m68k_setpc_j(uaecptr newpc)
|
||||
{
|
||||
regs.pc_p = regs.pc_oldp = get_real_address(newpc);
|
||||
regs.pc = newpc;
|
||||
}
|
||||
|
||||
STATIC_INLINE uaecptr m68k_getpc(void)
|
||||
{
|
||||
return static_cast<uaecptr>(regs.pc + (static_cast<uae_u8*>(regs.pc_p) - static_cast<uae_u8*>(regs.pc_oldp)));
|
||||
return (uaecptr)(regs.pc + ((uae_u8*)regs.pc_p - (uae_u8*)regs.pc_oldp));
|
||||
}
|
||||
|
||||
#define M68K_GETPC m68k_getpc()
|
||||
STATIC_INLINE void m68k_incpc(int o)
|
||||
{
|
||||
|
|
@ -272,29 +256,25 @@ STATIC_INLINE void m68k_incpc(int o)
|
|||
|
||||
STATIC_INLINE uae_u32 get_dibyte(int o)
|
||||
{
|
||||
return do_get_mem_byte(static_cast<uae_u8*>((regs).pc_p + (o) + 1));
|
||||
return do_get_mem_byte((uae_u8 *)((regs).pc_p + (o) + 1));
|
||||
}
|
||||
|
||||
STATIC_INLINE uae_u32 get_diword(int o)
|
||||
{
|
||||
return do_get_mem_word((uae_u16*)((regs).pc_p + (o)));
|
||||
return do_get_mem_word((uae_u16 *)((regs).pc_p + (o)));
|
||||
}
|
||||
|
||||
STATIC_INLINE uae_u32 get_dilong(int o)
|
||||
{
|
||||
return do_get_mem_long((uae_u32*)((regs).pc_p + (o)));
|
||||
return do_get_mem_long((uae_u32 *)((regs).pc_p + (o)));
|
||||
}
|
||||
|
||||
STATIC_INLINE uae_u32 next_diword(void)
|
||||
{
|
||||
uae_u32 r = do_get_mem_word((uae_u16*)((regs).pc_p));
|
||||
uae_u32 r = do_get_mem_word((uae_u16 *)((regs).pc_p));
|
||||
m68k_incpc(2);
|
||||
return r;
|
||||
}
|
||||
|
||||
STATIC_INLINE uae_u32 next_dilong(void)
|
||||
{
|
||||
uae_u32 r = do_get_mem_long((uae_u32*)((regs).pc_p));
|
||||
uae_u32 r = do_get_mem_long((uae_u32 *)((regs).pc_p));
|
||||
m68k_incpc(4);
|
||||
return r;
|
||||
}
|
||||
|
|
@ -305,7 +285,6 @@ STATIC_INLINE void m68k_do_bsr(uaecptr oldpc, uae_s32 offset)
|
|||
put_long(m68k_areg(regs, 7), oldpc);
|
||||
m68k_incpc(offset);
|
||||
}
|
||||
|
||||
STATIC_INLINE void m68k_do_rts(void)
|
||||
{
|
||||
uae_u32 newpc = get_long(m68k_areg(regs, 7));
|
||||
|
|
@ -319,22 +298,41 @@ STATIC_INLINE void m68k_setpci(uaecptr newpc)
|
|||
{
|
||||
regs.instruction_pc = regs.pc = newpc;
|
||||
}
|
||||
|
||||
STATIC_INLINE void m68k_setpci_j(uaecptr newpc)
|
||||
{
|
||||
regs.pc = newpc;
|
||||
}
|
||||
|
||||
STATIC_INLINE uaecptr m68k_getpci(void)
|
||||
{
|
||||
return regs.pc;
|
||||
}
|
||||
|
||||
STATIC_INLINE void m68k_incpci(int o)
|
||||
{
|
||||
regs.pc += o;
|
||||
}
|
||||
|
||||
STATIC_INLINE uae_u32 get_iiword(int o)
|
||||
{
|
||||
return get_wordi(m68k_getpci() + (o));
|
||||
}
|
||||
STATIC_INLINE uae_u32 get_iilong(int o)
|
||||
{
|
||||
return get_longi(m68k_getpci () + (o));
|
||||
}
|
||||
|
||||
STATIC_INLINE uae_u32 next_iiword (void)
|
||||
{
|
||||
uae_u32 r = get_iiword (0);
|
||||
m68k_incpci (2);
|
||||
return r;
|
||||
}
|
||||
STATIC_INLINE uae_u32 next_iilong (void)
|
||||
{
|
||||
uae_u32 r = get_iilong(0);
|
||||
m68k_incpci (4);
|
||||
return r;
|
||||
}
|
||||
|
||||
/* common access */
|
||||
|
||||
STATIC_INLINE void m68k_incpc_normal(int o)
|
||||
|
|
@ -347,63 +345,67 @@ STATIC_INLINE void m68k_incpc_normal(int o)
|
|||
|
||||
STATIC_INLINE void m68k_setpc_normal(uaecptr pc)
|
||||
{
|
||||
if (m68k_pc_indirect > 0)
|
||||
{
|
||||
regs.pc_p = regs.pc_oldp = nullptr;
|
||||
if (m68k_pc_indirect > 0) {
|
||||
regs.pc_p = regs.pc_oldp = 0;
|
||||
m68k_setpci(pc);
|
||||
}
|
||||
else
|
||||
{
|
||||
} else {
|
||||
m68k_setpc(pc);
|
||||
}
|
||||
}
|
||||
|
||||
extern void check_t0_trace(void);
|
||||
|
||||
#define x_do_cycles(c) do_cycles(c)
|
||||
|
||||
extern void m68k_setstopped(void);
|
||||
extern void m68k_resumestopped(void);
|
||||
extern void (*x_do_cycles)(unsigned long);
|
||||
extern void (*x_do_cycles_pre)(unsigned long);
|
||||
extern void (*x_do_cycles_post)(unsigned long, uae_u32);
|
||||
|
||||
extern uae_u32 REGPARAM3 x_get_disp_ea_020 (uae_u32 base) REGPARAM;
|
||||
|
||||
extern void m68k_setstopped (void);
|
||||
extern void m68k_resumestopped (void);
|
||||
extern void m68k_cancel_idle(void);
|
||||
|
||||
#define get_disp_ea_020(base) _get_disp_ea_020(base)
|
||||
extern uae_u32 REGPARAM3 _get_disp_ea_020(uae_u32 base) REGPARAM;
|
||||
extern uae_u32 REGPARAM3 get_disp_ea_020 (uae_u32 base) REGPARAM;
|
||||
extern uae_u32 REGPARAM3 get_bitfield (uae_u32 src, uae_u32 bdata[2], uae_s32 offset, int width) REGPARAM;
|
||||
extern void REGPARAM3 put_bitfield (uae_u32 dst, uae_u32 bdata[2], uae_u32 val, uae_s32 offset, int width) REGPARAM;
|
||||
|
||||
extern uae_u32 REGPARAM3 get_bitfield(uae_u32 src, uae_u32 bdata[2], uae_s32 offset, int width) REGPARAM;
|
||||
extern void REGPARAM3 put_bitfield(uae_u32 dst, uae_u32 bdata[2], uae_u32 val, uae_s32 offset, int width) REGPARAM;
|
||||
extern int get_cpu_model(void);
|
||||
extern int get_cpu_model (void);
|
||||
|
||||
extern void set_cpu_caches(bool flush);
|
||||
extern void set_cpu_caches (bool flush);
|
||||
extern void flush_cpu_caches_040(uae_u16 opcode);
|
||||
extern void REGPARAM3 MakeSR(void) REGPARAM;
|
||||
extern void REGPARAM3 MakeSR (void) REGPARAM;
|
||||
extern void REGPARAM3 MakeFromSR(void) REGPARAM;
|
||||
extern void REGPARAM3 MakeFromSR_T0(void) REGPARAM;
|
||||
extern void REGPARAM3 Exception(int) REGPARAM;
|
||||
extern void REGPARAM3 Exception (int) REGPARAM;
|
||||
extern void REGPARAM3 Exception_cpu(int) REGPARAM;
|
||||
extern void NMI(void);
|
||||
extern void doint(void);
|
||||
extern void dump_counts(void);
|
||||
extern int m68k_move2c(int, uae_u32*);
|
||||
extern int m68k_movec2(int, uae_u32*);
|
||||
extern bool m68k_divl (uae_u32, uae_u32, uae_u16);
|
||||
extern bool m68k_mull (uae_u32, uae_u32, uae_u16);
|
||||
extern void init_m68k(void);
|
||||
extern void m68k_go(int);
|
||||
extern int getDivu68kCycles(uae_u32 dividend, uae_u16 divisor);
|
||||
extern int getDivs68kCycles(uae_s32 dividend, uae_s16 divisor);
|
||||
extern void REGPARAM3 Exception_cpu_oldpc(int, uaecptr) REGPARAM;
|
||||
extern void NMI (void);
|
||||
extern void NMI_delayed (void);
|
||||
extern void prepare_interrupt (uae_u32);
|
||||
extern void doint (void);
|
||||
extern int m68k_move2c (int, uae_u32 *);
|
||||
extern int m68k_movec2 (int, uae_u32 *);
|
||||
extern int m68k_divl (uae_u32, uae_u32, uae_u16, uaecptr);
|
||||
extern int m68k_mull (uae_u32, uae_u32, uae_u16);
|
||||
extern void init_m68k (void);
|
||||
extern void m68k_go (int);
|
||||
extern int getMulu68kCycles(uae_u16 src);
|
||||
extern int getMuls68kCycles(uae_u16 src);
|
||||
extern int getDivu68kCycles (uae_u32 dividend, uae_u16 divisor);
|
||||
extern int getDivs68kCycles (uae_s32 dividend, uae_s16 divisor);
|
||||
extern void divbyzero_special(bool issigned, uae_s32 dst);
|
||||
extern void setdivuflags(uae_u32 dividend, uae_u16 divisor);
|
||||
extern void setdivsflags(uae_s32 dividend, uae_s16 divisor);
|
||||
extern void setchkundefinedflags(uae_s32 src, uae_s32 dst, int size);
|
||||
extern void setchk2undefinedflags(uae_s32 lower, uae_s32 upper, uae_s32 val, int size);
|
||||
extern void protect_roms(bool);
|
||||
extern void unprotect_maprom(void);
|
||||
extern void protect_roms (bool);
|
||||
extern void unprotect_maprom (void);
|
||||
extern bool is_hardreset(void);
|
||||
extern bool is_keyboardreset(void);
|
||||
extern void Exception_build_stack_frame_common(uae_u32 oldpc, uae_u32 currpc, int nr);
|
||||
extern void Exception_build_stack_frame(uae_u32 oldpc, uae_u32 currpc, uae_u32 ssw, int nr, int format);
|
||||
extern void Exception_build_68000_address_error_stack_frame(uae_u16 mode, uae_u16 opcode, uaecptr fault_addr,
|
||||
uaecptr pc);
|
||||
extern void Exception_build_68000_address_error_stack_frame(uae_u16 mode, uae_u16 opcode, uaecptr fault_addr, uaecptr pc);
|
||||
extern uae_u32 exception_pc(int nr);
|
||||
extern void cpu_restore_fixup(void);
|
||||
extern bool privileged_copro_instruction(uae_u16 opcode);
|
||||
|
|
@ -414,24 +416,11 @@ void ccr_68000_long_move_ae_LN(uae_s32 src);
|
|||
void ccr_68000_long_move_ae_HNZ(uae_s32 src);
|
||||
void ccr_68000_long_move_ae_normal(uae_s32 src);
|
||||
void ccr_68000_word_move_ae_normal(uae_s16 src);
|
||||
void dreg_68000_long_replace_low(int reg, uae_u16 v);
|
||||
void areg_68000_long_replace_low(int reg, uae_u16 v);
|
||||
|
||||
STATIC_INLINE int bitset_count16(uae_u16 data)
|
||||
{
|
||||
unsigned int const MASK1 = 0x5555;
|
||||
unsigned int const MASK2 = 0x3333;
|
||||
unsigned int const MASK4 = 0x0f0f;
|
||||
unsigned int const MASK6 = 0x003f;
|
||||
|
||||
unsigned int const w = (data & MASK1) + ((data >> 1) & MASK1);
|
||||
unsigned int const x = (w & MASK2) + ((w >> 2) & MASK2);
|
||||
unsigned int const y = ((x + (x >> 4)) & MASK4);
|
||||
unsigned int const z = (y + (y >> 8)) & MASK6;
|
||||
|
||||
return z;
|
||||
}
|
||||
|
||||
extern void mmu_op(uae_u32, uae_u32);
|
||||
extern bool mmu_op30(uaecptr, uae_u32, uae_u16, uaecptr);
|
||||
extern void mmu_op (uae_u32, uae_u32);
|
||||
extern bool mmu_op30 (uaecptr, uae_u32, uae_u16, uaecptr);
|
||||
|
||||
extern void fpuop_arithmetic(uae_u32, uae_u16);
|
||||
extern void fpuop_dbcc(uae_u32, uae_u16);
|
||||
|
|
@ -440,41 +429,54 @@ extern void fpuop_trapcc(uae_u32, uaecptr, uae_u16);
|
|||
extern void fpuop_bcc(uae_u32, uaecptr, uae_u32);
|
||||
extern void fpuop_save(uae_u32);
|
||||
extern void fpuop_restore(uae_u32);
|
||||
extern void fpu_reset(void);
|
||||
extern void fpu_reset (void);
|
||||
|
||||
extern void exception3_read(uae_u32 opcode, uaecptr addr, int size, int fc);
|
||||
extern void exception3_write(uae_u32 opcode, uaecptr addr, int size, uae_u32 val, int fc);
|
||||
extern void exception3i(uae_u32 opcode, uaecptr addr);
|
||||
extern void exception3b(uae_u32 opcode, uaecptr addr, bool w, bool i, uaecptr pc);
|
||||
extern void exception2(uaecptr addr, bool read, int size, uae_u32 fc);
|
||||
extern void exception2_setup(uaecptr addr, bool read, int size, uae_u32 fc);
|
||||
extern void cpureset(void);
|
||||
extern void cpu_halt(int id);
|
||||
extern void exception3_read_access(uae_u32 opcode, uaecptr addr, int size, int fc);
|
||||
extern void exception3_read_access2(uae_u32 opcode, uaecptr addr, int size, int fc);
|
||||
extern void exception3_write_access(uae_u32 opcode, uaecptr addr, int size, uae_u32 val, int fc);
|
||||
extern void exception3_read_prefetch(uae_u32 opcode, uaecptr addr);
|
||||
extern void exception3_read_prefetch_68040bug(uae_u32 opcode, uaecptr addr, uae_u16 secondarysr);
|
||||
extern void exception3_read_prefetch_only(uae_u32 opcode, uaecptr addr);
|
||||
extern void hardware_exception2(uaecptr addr, uae_u32 v, bool read, bool ins, int size);
|
||||
extern void exception2_setup(uae_u32 opcode, uaecptr addr, bool read, int size, uae_u32 fc);
|
||||
extern void exception2_read(uae_u32 opcode, uaecptr addr, int size, int fc);
|
||||
extern void exception2_write(uae_u32 opcode, uaecptr addr, int size, uae_u32 val, int fc);
|
||||
extern void exception2_fetch_opcode(uae_u32 opcode, int offset, int pcoffset);
|
||||
extern void exception2_fetch(uae_u32 opcode, int offset, int pcoffset);
|
||||
extern void m68k_reset (void);
|
||||
extern void cpureset (void);
|
||||
extern void cpu_halt (int id);
|
||||
extern int cpu_sleep_millis(int ms);
|
||||
extern void cpu_change(int newmodel);
|
||||
extern void cpu_fallback(int mode);
|
||||
|
||||
extern void fill_prefetch(void);
|
||||
extern void fill_prefetch (void);
|
||||
|
||||
#define CPU_OP_NAME(a) op ## a
|
||||
|
||||
/* 68040 */
|
||||
extern const struct cputbl op_smalltbl_1_ff[];
|
||||
extern const struct cputbl op_smalltbl_41_ff[];
|
||||
extern const struct cputbl op_smalltbl_1[];
|
||||
extern const struct cputbl op_smalltbl_41[];
|
||||
/* 68030 */
|
||||
extern const struct cputbl op_smalltbl_2_ff[];
|
||||
extern const struct cputbl op_smalltbl_42_ff[];
|
||||
extern const struct cputbl op_smalltbl_2[];
|
||||
extern const struct cputbl op_smalltbl_42[];
|
||||
/* 68020 */
|
||||
extern const struct cputbl op_smalltbl_3_ff[];
|
||||
extern const struct cputbl op_smalltbl_43_ff[];
|
||||
extern const struct cputbl op_smalltbl_3[];
|
||||
extern const struct cputbl op_smalltbl_43[];
|
||||
/* 68010 */
|
||||
extern const struct cputbl op_smalltbl_4_ff[];
|
||||
extern const struct cputbl op_smalltbl_44_ff[];
|
||||
extern const struct cputbl op_smalltbl_11_ff[]; // prefetch
|
||||
extern const struct cputbl op_smalltbl_4[];
|
||||
extern const struct cputbl op_smalltbl_44[];
|
||||
extern const struct cputbl op_smalltbl_11[]; // prefetch
|
||||
extern const struct cputbl op_smalltbl_13[]; // CE
|
||||
/* 68000 */
|
||||
extern const struct cputbl op_smalltbl_5_ff[];
|
||||
extern const struct cputbl op_smalltbl_45_ff[];
|
||||
extern const struct cputbl op_smalltbl_12_ff[]; // prefetch
|
||||
extern const struct cputbl op_smalltbl_5[];
|
||||
extern const struct cputbl op_smalltbl_45[];
|
||||
extern const struct cputbl op_smalltbl_12[]; // prefetch
|
||||
extern const struct cputbl op_smalltbl_14[]; // CE
|
||||
|
||||
extern cpuop_func* cpufunctbl[65536] ASM_SYM_FOR_FUNC("cpufunctbl");
|
||||
extern cpuop_func *cpufunctbl[65536] ASM_SYM_FOR_FUNC ("cpufunctbl");
|
||||
|
||||
#ifdef JIT
|
||||
extern void flush_icache(int);
|
||||
|
|
@ -484,7 +486,11 @@ extern void compemu_reset(void);
|
|||
#define flush_icache(int) do {} while (0)
|
||||
#define flush_icache_hard(int) do {} while (0)
|
||||
#endif
|
||||
bool check_prefs_changed_comp(bool);
|
||||
bool check_prefs_changed_comp (bool);
|
||||
|
||||
extern bool is_cpu_tracer (void);
|
||||
extern bool set_cpu_tracer (bool force);
|
||||
extern bool can_cpu_tracer (void);
|
||||
|
||||
#define CPU_HALT_PPC_ONLY -1
|
||||
#define CPU_HALT_BUS_ERROR_DOUBLE_FAULT 1
|
||||
|
|
|
|||
|
|
@ -1065,6 +1065,33 @@ extern struct uae_prefs currprefs, changed_prefs;
|
|||
extern int machdep_init(void);
|
||||
extern void machdep_free(void);
|
||||
|
||||
struct fsvdlg_vals
|
||||
{
|
||||
struct uaedev_config_info ci;
|
||||
int rdb;
|
||||
};
|
||||
|
||||
struct hfdlg_vals
|
||||
{
|
||||
struct uaedev_config_info ci;
|
||||
bool original;
|
||||
uae_u64 size;
|
||||
uae_u32 dostype;
|
||||
int forcedcylinders;
|
||||
bool rdb;
|
||||
};
|
||||
extern struct fsvdlg_vals current_fsvdlg;
|
||||
extern struct hfdlg_vals current_hfdlg;
|
||||
|
||||
extern void hardfile_testrdb (struct hfdlg_vals *hdf);
|
||||
extern void default_fsvdlg (struct fsvdlg_vals *f);
|
||||
extern void default_hfdlg (struct hfdlg_vals *f);
|
||||
STATIC_INLINE bool is_hdf_rdb (void)
|
||||
{
|
||||
return current_hfdlg.ci.sectors == 0 && current_hfdlg.ci.surfaces == 0 && current_hfdlg.ci.reserved == 0;
|
||||
}
|
||||
extern void updatehdfinfo (bool force, bool defaults);
|
||||
|
||||
#ifdef AMIBERRY
|
||||
struct amiberry_customised_layout
|
||||
{
|
||||
|
|
|
|||
|
|
@ -3,21 +3,21 @@
|
|||
|
||||
#include "uae/types.h"
|
||||
|
||||
#define TD_PADX 4
|
||||
#define TD_PADX 0
|
||||
#define TD_PADY 2
|
||||
#define TD_WIDTH 30
|
||||
#define TD_LED_WIDTH 24
|
||||
#define TD_LED_HEIGHT 4
|
||||
#define TD_DEFAULT_WIDTH 28
|
||||
#define TD_DEFAULT_LED_WIDTH 24
|
||||
#define TD_DEFAULT_LED_HEIGHT 4
|
||||
|
||||
#define TD_RIGHT 1
|
||||
#define TD_BOTTOM 2
|
||||
|
||||
static int td_pos = (TD_RIGHT | TD_BOTTOM);
|
||||
|
||||
#define TD_NUM_WIDTH 7
|
||||
#define TD_NUM_HEIGHT 7
|
||||
#define TD_DEFAULT_NUM_WIDTH 7
|
||||
#define TD_DEFAULT_NUM_HEIGHT 7
|
||||
|
||||
#define TD_TOTAL_HEIGHT (TD_PADY * 2 + TD_NUM_HEIGHT)
|
||||
#define TD_TOTAL_HEIGHT (TD_PADY * 2 + TD_DEFAULT_NUM_HEIGHT)
|
||||
|
||||
#define NUMBERS_NUM 20
|
||||
|
||||
|
|
|
|||
|
|
@ -87,7 +87,10 @@ extern void fetch_inputfilepath (TCHAR *out, int size);
|
|||
extern void get_data_path (TCHAR *out, int size);
|
||||
extern void get_rom_path (TCHAR *out, int size);
|
||||
//extern uae_u32 uaerand (void);
|
||||
#define uaerand() ((uae_u32)rand())
|
||||
STATIC_INLINE uae_u32 uaerand(void)
|
||||
{
|
||||
return rand();
|
||||
}
|
||||
extern uae_u32 uaesrand (uae_u32 seed);
|
||||
extern uae_u32 uaerandgetseed (void);
|
||||
|
||||
|
|
|
|||
|
|
@ -7501,6 +7501,9 @@ uae_u32 REGPARAM2 op_2190_0_comp_ff(uae_u32 opcode)
|
|||
if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc();
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef PART_3
|
||||
/* MOVE.L (An)+,(d8,An,Xn) */
|
||||
uae_u32 REGPARAM2 op_2198_0_comp_ff(uae_u32 opcode)
|
||||
{
|
||||
|
|
@ -7522,9 +7525,6 @@ uae_u32 REGPARAM2 op_2198_0_comp_ff(uae_u32 opcode)
|
|||
if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc();
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef PART_3
|
||||
/* MOVE.L -(An),(d8,An,Xn) */
|
||||
uae_u32 REGPARAM2 op_21a0_0_comp_ff(uae_u32 opcode)
|
||||
{
|
||||
|
|
@ -11177,6 +11177,9 @@ uae_u32 REGPARAM2 op_42b9_0_comp_ff(uae_u32 opcode)
|
|||
if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc();
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef PART_4
|
||||
/* NEG.B Dn */
|
||||
uae_u32 REGPARAM2 op_4400_0_comp_ff(uae_u32 opcode)
|
||||
{
|
||||
|
|
@ -11191,9 +11194,6 @@ uae_u32 REGPARAM2 op_4400_0_comp_ff(uae_u32 opcode)
|
|||
if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc();
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef PART_4
|
||||
/* NEG.B (An) */
|
||||
uae_u32 REGPARAM2 op_4410_0_comp_ff(uae_u32 opcode)
|
||||
{
|
||||
|
|
@ -15205,6 +15205,9 @@ uae_u32 REGPARAM2 op_5090_0_comp_ff(uae_u32 opcode)
|
|||
if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc();
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef PART_5
|
||||
/* ADDQ.L #<data>,(An)+ */
|
||||
uae_u32 REGPARAM2 op_5098_0_comp_ff(uae_u32 opcode)
|
||||
{
|
||||
|
|
@ -15249,9 +15252,6 @@ uae_u32 REGPARAM2 op_50a0_0_comp_ff(uae_u32 opcode)
|
|||
if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc();
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef PART_5
|
||||
/* ADDQ.L #<data>,(d16,An) */
|
||||
uae_u32 REGPARAM2 op_50a8_0_comp_ff(uae_u32 opcode)
|
||||
{
|
||||
|
|
@ -18363,6 +18363,9 @@ uae_u32 REGPARAM2 op_62ff_0_comp_ff(uae_u32 opcode)
|
|||
if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc();
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef PART_6
|
||||
/* Bcc.W #<data>.W */
|
||||
uae_u32 REGPARAM2 op_6300_0_comp_ff(uae_u32 opcode)
|
||||
{
|
||||
|
|
@ -18408,9 +18411,6 @@ uae_u32 REGPARAM2 op_6301_0_comp_ff(uae_u32 opcode)
|
|||
if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc();
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef PART_6
|
||||
/* Bcc.L #<data>.L */
|
||||
uae_u32 REGPARAM2 op_63ff_0_comp_ff(uae_u32 opcode)
|
||||
{
|
||||
|
|
@ -22937,6 +22937,9 @@ uae_u32 REGPARAM2 op_b090_0_comp_ff(uae_u32 opcode)
|
|||
if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc();
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef PART_7
|
||||
/* CMP.L (An)+,Dn */
|
||||
uae_u32 REGPARAM2 op_b098_0_comp_ff(uae_u32 opcode)
|
||||
{
|
||||
|
|
@ -22977,9 +22980,6 @@ uae_u32 REGPARAM2 op_b0a0_0_comp_ff(uae_u32 opcode)
|
|||
if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc();
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef PART_7
|
||||
/* CMP.L (d16,An),Dn */
|
||||
uae_u32 REGPARAM2 op_b0a8_0_comp_ff(uae_u32 opcode)
|
||||
{
|
||||
|
|
@ -27317,6 +27317,9 @@ if (!(needed_flags & FLAG_CZNV)) dont_care_flags();
|
|||
if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc();
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef PART_8
|
||||
/* ROXR.B Dn,Dn */
|
||||
uae_u32 REGPARAM2 op_e030_0_comp_ff(uae_u32 opcode)
|
||||
{
|
||||
|
|
@ -27366,9 +27369,6 @@ uae_u32 REGPARAM2 op_e040_0_comp_ff(uae_u32 opcode)
|
|||
if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc();
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef PART_8
|
||||
/* LSRQ.W #<data>,Dn */
|
||||
uae_u32 REGPARAM2 op_e048_0_comp_ff(uae_u32 opcode)
|
||||
{
|
||||
|
|
@ -36415,6 +36415,9 @@ uae_u32 REGPARAM2 op_2190_0_comp_nf(uae_u32 opcode)
|
|||
if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc();
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef PART_3
|
||||
/* MOVE.L (An)+,(d8,An,Xn) */
|
||||
uae_u32 REGPARAM2 op_2198_0_comp_nf(uae_u32 opcode)
|
||||
{
|
||||
|
|
@ -36434,9 +36437,6 @@ uae_u32 REGPARAM2 op_2198_0_comp_nf(uae_u32 opcode)
|
|||
if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc();
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef PART_3
|
||||
/* MOVE.L -(An),(d8,An,Xn) */
|
||||
uae_u32 REGPARAM2 op_21a0_0_comp_nf(uae_u32 opcode)
|
||||
{
|
||||
|
|
@ -39749,6 +39749,9 @@ uae_u32 REGPARAM2 op_42b9_0_comp_nf(uae_u32 opcode)
|
|||
if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc();
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef PART_4
|
||||
/* NEG.B Dn */
|
||||
uae_u32 REGPARAM2 op_4400_0_comp_nf(uae_u32 opcode)
|
||||
{
|
||||
|
|
@ -39761,9 +39764,6 @@ uae_u32 REGPARAM2 op_4400_0_comp_nf(uae_u32 opcode)
|
|||
if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc();
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef PART_4
|
||||
/* NEG.B (An) */
|
||||
uae_u32 REGPARAM2 op_4410_0_comp_nf(uae_u32 opcode)
|
||||
{
|
||||
|
|
@ -43572,6 +43572,9 @@ uae_u32 REGPARAM2 op_5090_0_comp_nf(uae_u32 opcode)
|
|||
if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc();
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef PART_5
|
||||
/* ADDQ.L #<data>,(An)+ */
|
||||
uae_u32 REGPARAM2 op_5098_0_comp_nf(uae_u32 opcode)
|
||||
{
|
||||
|
|
@ -43612,9 +43615,6 @@ uae_u32 REGPARAM2 op_50a0_0_comp_nf(uae_u32 opcode)
|
|||
if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc();
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef PART_5
|
||||
/* ADDQ.L #<data>,(d16,An) */
|
||||
uae_u32 REGPARAM2 op_50a8_0_comp_nf(uae_u32 opcode)
|
||||
{
|
||||
|
|
@ -46670,6 +46670,9 @@ uae_u32 REGPARAM2 op_62ff_0_comp_nf(uae_u32 opcode)
|
|||
if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc();
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef PART_6
|
||||
/* Bcc.W #<data>.W */
|
||||
uae_u32 REGPARAM2 op_6300_0_comp_nf(uae_u32 opcode)
|
||||
{
|
||||
|
|
@ -46715,9 +46718,6 @@ uae_u32 REGPARAM2 op_6301_0_comp_nf(uae_u32 opcode)
|
|||
if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc();
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef PART_6
|
||||
/* Bcc.L #<data>.L */
|
||||
uae_u32 REGPARAM2 op_63ff_0_comp_nf(uae_u32 opcode)
|
||||
{
|
||||
|
|
@ -50985,6 +50985,9 @@ uae_u32 REGPARAM2 op_b090_0_comp_nf(uae_u32 opcode)
|
|||
if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc();
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef PART_7
|
||||
/* CMP.L (An)+,Dn */
|
||||
uae_u32 REGPARAM2 op_b098_0_comp_nf(uae_u32 opcode)
|
||||
{
|
||||
|
|
@ -51021,9 +51024,6 @@ uae_u32 REGPARAM2 op_b0a0_0_comp_nf(uae_u32 opcode)
|
|||
if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc();
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef PART_7
|
||||
/* CMP.L (d16,An),Dn */
|
||||
uae_u32 REGPARAM2 op_b0a8_0_comp_nf(uae_u32 opcode)
|
||||
{
|
||||
|
|
@ -55052,6 +55052,9 @@ uae_u32 REGPARAM2 op_e028_0_comp_nf(uae_u32 opcode)
|
|||
if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc();
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef PART_8
|
||||
/* ROXR.B Dn,Dn */
|
||||
uae_u32 REGPARAM2 op_e030_0_comp_nf(uae_u32 opcode)
|
||||
{
|
||||
|
|
@ -55096,9 +55099,6 @@ uae_u32 REGPARAM2 op_e040_0_comp_nf(uae_u32 opcode)
|
|||
if (m68k_pc_offset>SYNC_PC_OFFSET) sync_m68k_pc();
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef PART_8
|
||||
/* LSRQ.W #<data>,Dn */
|
||||
uae_u32 REGPARAM2 op_e048_0_comp_nf(uae_u32 opcode)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -186,6 +186,7 @@ STATIC_INLINE int end_block(uae_u16 opcode)
|
|||
return (prop[opcode].cflow & fl_end_block);
|
||||
}
|
||||
|
||||
#define SP_REG 15
|
||||
#define PC_P 16
|
||||
#define FLAGX 17
|
||||
#define FLAGTMP 18
|
||||
|
|
@ -364,11 +365,7 @@ typedef struct blockinfo_t {
|
|||
#define BI_COMPILING 5
|
||||
#define BI_FINALIZING 6
|
||||
|
||||
#if defined(CPU_arm) && !defined(ARMV6T2) && !defined(CPU_AARCH64)
|
||||
const int POPALLSPACE_SIZE = 2048; /* That should be enough space */
|
||||
#else
|
||||
const int POPALLSPACE_SIZE = 512; /* That should be enough space */
|
||||
#endif
|
||||
extern const int POPALLSPACE_SIZE;
|
||||
|
||||
void execute_normal(void);
|
||||
void exec_nostats(void);
|
||||
|
|
@ -377,6 +374,9 @@ void execute_exception(uae_u32 cycles);
|
|||
|
||||
typedef fptype fpu_register;
|
||||
|
||||
/* Flags for Bernie during development/debugging. Should go away eventually */
|
||||
#define DISTRUST_CONSISTENT_MEM 0
|
||||
|
||||
void jit_abort(const TCHAR *format,...);
|
||||
|
||||
#endif /* COMPEMU_H */
|
||||
|
|
|
|||
|
|
@ -129,7 +129,8 @@ static int branch_cc;
|
|||
uae_u8* current_compile_p = NULL;
|
||||
static uae_u8* max_compile_start;
|
||||
uae_u8* compiled_code = NULL;
|
||||
uae_u8 *popallspace = NULL;
|
||||
const int POPALLSPACE_SIZE = 2048; /* That should be enough space */
|
||||
uae_u8* popallspace = NULL;
|
||||
|
||||
void* pushall_call_handler = NULL;
|
||||
static void* popall_execute_normal = NULL;
|
||||
|
|
@ -176,6 +177,9 @@ static uae_u8 *cache_alloc (int size)
|
|||
|
||||
#endif
|
||||
|
||||
extern const struct comptbl op_smalltbl_0_comp_nf[];
|
||||
extern const struct comptbl op_smalltbl_0_comp_ff[];
|
||||
|
||||
static bigstate live;
|
||||
|
||||
static int writereg(int r);
|
||||
|
|
@ -911,18 +915,15 @@ static int alloc_reg_hinted(int r, int willclobber, int hint)
|
|||
compemu_raw_mov_l_ri(bestreg, live.state[r].val);
|
||||
live.state[r].val = 0;
|
||||
set_status(r, DIRTY);
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
do_load_reg(bestreg, r);
|
||||
set_status(r, CLEAN);
|
||||
}
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
live.state[r].val = 0;
|
||||
set_status(r, CLEAN);
|
||||
}
|
||||
}
|
||||
else { /* this is the easiest way, but not optimal. */
|
||||
} else { /* this is the easiest way, but not optimal. */
|
||||
live.state[r].val = 0;
|
||||
set_status(r, DIRTY);
|
||||
}
|
||||
|
|
@ -1011,8 +1012,7 @@ STATIC_INLINE int readreg_general(int r, int spec)
|
|||
|
||||
if (isinreg(r)) {
|
||||
answer = live.state[r].realreg;
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
/* the value is in memory to start with */
|
||||
answer = alloc_reg_hinted(r, 0, spec);
|
||||
}
|
||||
|
|
@ -1053,8 +1053,7 @@ static int writereg(int r)
|
|||
make_exclusive(r, 0);
|
||||
if (isinreg(r)) {
|
||||
answer = live.state[r].realreg;
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
/* the value is in memory to start with */
|
||||
answer = alloc_reg_hinted(r, 1, -1);
|
||||
}
|
||||
|
|
@ -1077,8 +1076,7 @@ static int rmw(int r)
|
|||
|
||||
if (isinreg(r)) {
|
||||
answer = live.state[r].realreg;
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
/* the value is in memory to start with */
|
||||
answer = alloc_reg_hinted(r, 0, -1);
|
||||
}
|
||||
|
|
@ -1161,8 +1159,7 @@ static int f_alloc_reg(int r, int willclobber)
|
|||
compemu_raw_fmov_rm(bestreg, (uintptr)live.fate[r].mem);
|
||||
live.fate[r].status = CLEAN;
|
||||
}
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
live.fate[r].status = DIRTY;
|
||||
}
|
||||
live.fate[r].realreg = bestreg;
|
||||
|
|
@ -1182,8 +1179,7 @@ STATIC_INLINE int f_readreg(int r)
|
|||
|
||||
if (f_isinreg(r)) {
|
||||
answer = live.fate[r].realreg;
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
/* the value is in memory to start with */
|
||||
answer = f_alloc_reg(r, 0);
|
||||
}
|
||||
|
|
@ -1197,8 +1193,7 @@ STATIC_INLINE int f_writereg(int r)
|
|||
|
||||
if (f_isinreg(r)) {
|
||||
answer = live.fate[r].realreg;
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
answer = f_alloc_reg(r, 1);
|
||||
}
|
||||
live.fate[r].status = DIRTY;
|
||||
|
|
@ -1211,8 +1206,7 @@ STATIC_INLINE int f_rmw(int r)
|
|||
|
||||
if (f_isinreg(r)) {
|
||||
n = live.fate[r].realreg;
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
n = f_alloc_reg(r, 0);
|
||||
}
|
||||
live.fate[r].status = DIRTY;
|
||||
|
|
@ -1317,6 +1311,8 @@ void compiler_exit(void)
|
|||
jit_log(_T("%03d: %04x %10u %s\n"), i, opcode_nums[i], count, lookup->name);
|
||||
}
|
||||
#endif
|
||||
|
||||
exit_table68k();
|
||||
}
|
||||
|
||||
static void init_comp(void)
|
||||
|
|
@ -1340,8 +1336,7 @@ static void init_comp(void)
|
|||
if (i < 16) { /* First 16 registers map to 68k registers */
|
||||
live.state[i].mem = ®s.regs[i];
|
||||
set_status(i, INMEM);
|
||||
}
|
||||
else if (i >= S1) {
|
||||
} else if (i >= S1) {
|
||||
live.state[i].mem = ®s.scratchregs[i - S1];
|
||||
}
|
||||
}
|
||||
|
|
@ -1364,13 +1359,11 @@ static void init_comp(void)
|
|||
live.fate[i].mem = (uae_u32*)(®s.fp[i].fp);
|
||||
live.fate[i].needflush = NF_TOMEM;
|
||||
live.fate[i].status = INMEM;
|
||||
}
|
||||
else if (i == FP_RESULT) {
|
||||
} else if (i == FP_RESULT) {
|
||||
live.fate[i].mem = (uae_u32*)(®s.fp_result.fp);
|
||||
live.fate[i].needflush = NF_TOMEM;
|
||||
live.fate[i].status = INMEM;
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
live.fate[i].mem = (uae_u32*)(®s.scratchfregs[i - 8]);
|
||||
}
|
||||
}
|
||||
|
|
@ -1564,8 +1557,7 @@ static void writemem_real(int address, int source, int size)
|
|||
case 2: jnf_MEM_WRITE24_OFF_w(address, source); break;
|
||||
case 4: jnf_MEM_WRITE24_OFF_l(address, source); break;
|
||||
}
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
switch (size) {
|
||||
case 1: jnf_MEM_WRITE_OFF_b(address, source); break;
|
||||
case 2: jnf_MEM_WRITE_OFF_w(address, source); break;
|
||||
|
|
@ -1635,8 +1627,7 @@ static void readmem_real(int address, int dest, int size)
|
|||
case 2: jnf_MEM_READ24_OFF_w(dest, address); break;
|
||||
case 4: jnf_MEM_READ24_OFF_l(dest, address); break;
|
||||
}
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
switch (size) {
|
||||
case 1: jnf_MEM_READ_OFF_b(dest, address); break;
|
||||
case 2: jnf_MEM_READ_OFF_w(dest, address); break;
|
||||
|
|
@ -1732,8 +1723,7 @@ void calc_disp_ea_020(int base, uae_u32 dp, int target)
|
|||
if ((dp & 0x4) == 0) { /* add regd *before* the get_long */
|
||||
if (!ignorereg) {
|
||||
disp_ea20_target_mov(target, reg, regd_shift, ((dp & 0x800) == 0));
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
mov_l_ri(target, 0);
|
||||
}
|
||||
|
||||
|
|
@ -1743,13 +1733,11 @@ void calc_disp_ea_020(int base, uae_u32 dp, int target)
|
|||
arm_ADD_l_ri(target, addbase);
|
||||
if (dp & 0x03)
|
||||
readlong(target, target);
|
||||
}
|
||||
else { /* do the getlong first, then add regd */
|
||||
} else { /* do the getlong first, then add regd */
|
||||
if (!ignorebase) {
|
||||
mov_l_rr(target, base);
|
||||
arm_ADD_l_ri(target, addbase);
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
mov_l_ri(target, addbase);
|
||||
}
|
||||
if (dp & 0x03)
|
||||
|
|
@ -1760,13 +1748,11 @@ void calc_disp_ea_020(int base, uae_u32 dp, int target)
|
|||
}
|
||||
}
|
||||
arm_ADD_l_ri(target, outer);
|
||||
}
|
||||
else { /* 68000 version */
|
||||
} else { /* 68000 version */
|
||||
if ((dp & 0x800) == 0) { /* Sign extend */
|
||||
sign_extend_16_rr(target, reg);
|
||||
lea_l_brr_indexed(target, base, target, 1 << regd_shift, (uae_s8)dp);
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
lea_l_brr_indexed(target, base, reg, 1 << regd_shift, (uae_s8)dp);
|
||||
}
|
||||
}
|
||||
|
|
@ -1906,8 +1892,7 @@ STATIC_INLINE int block_check_checksum(blockinfo* bi)
|
|||
add_to_active(bi);
|
||||
raise_in_cl_list(bi);
|
||||
bi->status = BI_ACTIVE;
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
/* This block actually changed. We need to invalidate it,
|
||||
and set it up to be recompiled */
|
||||
invalidate_block(bi);
|
||||
|
|
@ -2109,6 +2094,9 @@ void build_comp(void)
|
|||
unsigned long opcode;
|
||||
const struct comptbl* tbl = op_smalltbl_0_comp_ff;
|
||||
const struct comptbl* nftbl = op_smalltbl_0_comp_nf;
|
||||
unsigned int cpu_level = (currprefs.cpu_model - 68000) / 10;
|
||||
if (cpu_level > 4)
|
||||
cpu_level--;
|
||||
|
||||
#ifdef PROFILE_UNTRANSLATED_INSNS
|
||||
regs.raw_cputbl_count = raw_cputbl_count;
|
||||
|
|
@ -2118,14 +2106,14 @@ void build_comp(void)
|
|||
|
||||
for (opcode = 0; opcode < 65536; opcode++) {
|
||||
reset_compop(opcode);
|
||||
prop[opcode].use_flags = 0x1f;
|
||||
prop[opcode].set_flags = 0x1f;
|
||||
prop[opcode].use_flags = FLAG_ALL;
|
||||
prop[opcode].set_flags = FLAG_ALL;
|
||||
prop[opcode].cflow = fl_jump | fl_trap; // ILLEGAL instructions do trap
|
||||
}
|
||||
|
||||
for (i = 0; tbl[i].opcode < 65536; i++) {
|
||||
int cflow = table68k[tbl[i].opcode].cflow;
|
||||
if (follow_const_jumps && (tbl[i].specific & 16))
|
||||
if (follow_const_jumps && (tbl[i].specific & COMP_OPCODE_ISCJUMP))
|
||||
cflow = fl_const_jump;
|
||||
else
|
||||
cflow &= ~fl_const_jump;
|
||||
|
|
@ -2139,7 +2127,7 @@ void build_comp(void)
|
|||
}
|
||||
|
||||
for (i = 0; nftbl[i].opcode < 65536; i++) {
|
||||
int uses_fpu = tbl[i].specific & COMP_OPCODE_USES_FPU;
|
||||
bool uses_fpu = (tbl[i].specific & COMP_OPCODE_USES_FPU) != 0;
|
||||
if (uses_fpu && avoid_fpu)
|
||||
nfcompfunctbl[nftbl[i].opcode] = NULL;
|
||||
else
|
||||
|
|
@ -2151,19 +2139,16 @@ void build_comp(void)
|
|||
compop_func* nff;
|
||||
int isaddx, cflow;
|
||||
|
||||
int cpu_level = (currprefs.cpu_model - 68000) / 10;
|
||||
if (cpu_level > 4)
|
||||
cpu_level--;
|
||||
if (table68k[opcode].mnemo == i_ILLG || table68k[opcode].clev > cpu_level)
|
||||
continue;
|
||||
|
||||
if (table68k[opcode].handler != -1) {
|
||||
f = compfunctbl[table68k[opcode].handler];
|
||||
nff = nfcompfunctbl[table68k[opcode].handler];
|
||||
cflow = prop[table68k[opcode].handler].cflow;
|
||||
isaddx = prop[table68k[opcode].handler].is_addx;
|
||||
prop[opcode].cflow = cflow;
|
||||
prop[opcode].is_addx = isaddx;
|
||||
cflow = prop[table68k[opcode].handler].cflow;
|
||||
prop[opcode].cflow = cflow;
|
||||
compfunctbl[opcode] = f;
|
||||
nfcompfunctbl[opcode] = nff;
|
||||
}
|
||||
|
|
@ -2254,8 +2239,7 @@ void flush_icache(int n)
|
|||
bi->handler_to_use = (cpuop_func*)popall_execute_normal;
|
||||
set_dhtu(bi, bi->direct_pen);
|
||||
bi->status = BI_INVALID;
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
if (bi == cache_tags[cl + 1].bi)
|
||||
cache_tags[cl].handler = (cpuop_func*)popall_check_checksum;
|
||||
bi->handler_to_use = (cpuop_func*)popall_check_checksum;
|
||||
|
|
@ -2323,7 +2307,7 @@ void compile_block(cpu_history* pc_hist, int blocklen, int totcycles)
|
|||
free_checksum_info_chain(bi->csi);
|
||||
bi->csi = NULL;
|
||||
|
||||
liveflags[blocklen] = 0x1f; /* All flags needed afterwards */
|
||||
liveflags[blocklen] = FLAG_ALL; /* All flags needed afterwards */
|
||||
i = blocklen;
|
||||
while (i--) {
|
||||
uae_u16* currpcp = pc_hist[i].location;
|
||||
|
|
@ -2369,8 +2353,7 @@ void compile_block(cpu_history* pc_hist, int blocklen, int totcycles)
|
|||
if (optlev == 0) { /* No need to actually translate */
|
||||
/* Execute normally without keeping stats */
|
||||
compemu_raw_exec_nostats((uintptr)pc_hist[0].location);
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
next_pc_p = 0;
|
||||
taken_pc_p = 0;
|
||||
branch_cc = 0; // Only to be initialized. Will be set together with next_pc_p
|
||||
|
|
@ -2392,8 +2375,7 @@ void compile_block(cpu_history* pc_hist, int blocklen, int totcycles)
|
|||
if (!needed_flags) {
|
||||
cputbl = cpufunctbl;
|
||||
comptbl = nfcompfunctbl;
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
cputbl = cpufunctbl;
|
||||
comptbl = compfunctbl;
|
||||
}
|
||||
|
|
@ -2435,8 +2417,7 @@ void compile_block(cpu_history* pc_hist, int blocklen, int totcycles)
|
|||
#endif
|
||||
compemu_raw_maybe_do_nothing(scaled_cycles(totcycles));
|
||||
}
|
||||
}
|
||||
else if (may_raise_exception) {
|
||||
} else if (may_raise_exception) {
|
||||
#if defined(CPU_arm) && !defined(ARMV6T2) && !defined(CPU_AARCH64)
|
||||
data_check_end(8, 64);
|
||||
#endif
|
||||
|
|
@ -2493,8 +2474,7 @@ void compile_block(cpu_history* pc_hist, int blocklen, int totcycles)
|
|||
tba = compemu_raw_endblock_pc_isconst(scaled_cycles(totcycles), t2);
|
||||
write_jmp_target(tba, get_handler(t2));
|
||||
create_jmpdep(bi, 1, tba, t2);
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
if (was_comp) {
|
||||
flush(1);
|
||||
}
|
||||
|
|
@ -2506,8 +2486,7 @@ void compile_block(cpu_history* pc_hist, int blocklen, int totcycles)
|
|||
#endif
|
||||
r = live.state[PC_P].realreg;
|
||||
compemu_raw_endblock_pc_inreg(r, scaled_cycles(totcycles));
|
||||
}
|
||||
else if (was_comp && isconst(PC_P)) {
|
||||
} else if (was_comp && isconst(PC_P)) {
|
||||
uintptr v = live.state[PC_P].val;
|
||||
uae_u32* tba;
|
||||
blockinfo* tbi;
|
||||
|
|
@ -2521,8 +2500,7 @@ void compile_block(cpu_history* pc_hist, int blocklen, int totcycles)
|
|||
tba = compemu_raw_endblock_pc_isconst(scaled_cycles(totcycles), v);
|
||||
write_jmp_target(tba, get_handler(v));
|
||||
create_jmpdep(bi, 0, tba, v);
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
r = REG_PC_TMP;
|
||||
compemu_raw_mov_l_rm(r, (uintptr)®s.pc_p);
|
||||
#if defined(CPU_arm) && !defined(ARMV6T2) && !defined(CPU_AARCH64)
|
||||
|
|
@ -2539,8 +2517,7 @@ void compile_block(cpu_history* pc_hist, int blocklen, int totcycles)
|
|||
free_checksum_info_chain(bi->csi);
|
||||
bi->csi = NULL;
|
||||
add_to_dormant(bi);
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
calc_checksum(bi, &(bi->c1), &(bi->c2));
|
||||
add_to_active(bi);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1869,14 +1869,11 @@ extern const struct comptbl op_smalltbl_0_comp_ff[] = {
|
|||
{ NULL, 0x00000001, 62744 }, /* PFLUSHA */
|
||||
{ NULL, 0x00000001, 62792 }, /* PTESTW */
|
||||
{ NULL, 0x00000001, 62824 }, /* PTESTR */
|
||||
{ NULL, 0x00000001, 62856 }, /* PLPAW */
|
||||
{ NULL, 0x00000001, 62920 }, /* PLPAR */
|
||||
{ op_f600_0_comp_ff, 0x00000002, 62976 }, /* MOVE16 */
|
||||
{ op_f608_0_comp_ff, 0x00000002, 62984 }, /* MOVE16 */
|
||||
{ op_f610_0_comp_ff, 0x00000002, 62992 }, /* MOVE16 */
|
||||
{ op_f618_0_comp_ff, 0x00000002, 63000 }, /* MOVE16 */
|
||||
{ op_f620_0_comp_ff, 0x00000002, 63008 }, /* MOVE16 */
|
||||
{ NULL, 0x00000001, 63488 }, /* LPSTOP */
|
||||
{ 0, 0,65536 }};
|
||||
extern const struct comptbl op_smalltbl_0_comp_nf[] = {
|
||||
{ op_0_0_comp_nf, 0x00000002, 0 }, /* OR */
|
||||
|
|
@ -3741,13 +3738,10 @@ extern const struct comptbl op_smalltbl_0_comp_nf[] = {
|
|||
{ NULL, 0x00000001, 62744 }, /* PFLUSHA */
|
||||
{ NULL, 0x00000001, 62792 }, /* PTESTW */
|
||||
{ NULL, 0x00000001, 62824 }, /* PTESTR */
|
||||
{ NULL, 0x00000001, 62856 }, /* PLPAW */
|
||||
{ NULL, 0x00000001, 62920 }, /* PLPAR */
|
||||
{ op_f600_0_comp_nf, 0x00000002, 62976 }, /* MOVE16 */
|
||||
{ op_f608_0_comp_nf, 0x00000002, 62984 }, /* MOVE16 */
|
||||
{ op_f610_0_comp_nf, 0x00000002, 62992 }, /* MOVE16 */
|
||||
{ op_f618_0_comp_nf, 0x00000002, 63000 }, /* MOVE16 */
|
||||
{ op_f620_0_comp_nf, 0x00000002, 63008 }, /* MOVE16 */
|
||||
{ NULL, 0x00000001, 63488 }, /* LPSTOP */
|
||||
{ 0, 0,65536 }};
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -300,6 +300,11 @@ void fixup_cpu (struct uae_prefs *p)
|
|||
p->cpu_data_cache = false;
|
||||
error_log(_T("Data cache emulation requires Indirect UAE Boot ROM."));
|
||||
}
|
||||
|
||||
if (p->cpu_memory_cycle_exact && p->fast_copper != 0) {
|
||||
p->fast_copper = 0;
|
||||
error_log(_T("Cycle-exact mode not compatible with fast copper."));
|
||||
}
|
||||
}
|
||||
|
||||
void fixup_prefs (struct uae_prefs *p, bool userconfig)
|
||||
|
|
|
|||
|
|
@ -289,7 +289,7 @@ void dummy_put (uaecptr addr, int size, uae_u32 val)
|
|||
if (gary_timeout)
|
||||
gary_wait(addr, size, true);
|
||||
if (gary_toenb && currprefs.mmu_model)
|
||||
exception2(addr, true, size, regs.s ? 4 : 0);
|
||||
hardware_exception2(addr, val, false, false, size);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -380,7 +380,7 @@ uae_u32 dummy_get (uaecptr addr, int size, bool inst, uae_u32 defvalue)
|
|||
if (gary_timeout)
|
||||
gary_wait(addr, size, false);
|
||||
if (gary_toenb)
|
||||
exception2(addr, false, size, (regs.s ? 4 : 0) | (inst ? 0 : 1));
|
||||
hardware_exception2(addr, 0, true, false, size);
|
||||
return v;
|
||||
}
|
||||
|
||||
|
|
@ -541,7 +541,7 @@ static uae_u8 *REGPARAM3 chipmem_xlate (uaecptr addr) REGPARAM;
|
|||
static void ce2_timeout (void)
|
||||
{
|
||||
#ifdef CPUEMU_13
|
||||
wait_cpu_cycle_read(0, -1);
|
||||
wait_cpu_cycle_read (0, -1);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
@ -1124,7 +1124,7 @@ uae_u8 *REGPARAM2 default_xlate (uaecptr addr)
|
|||
//memory_map_dump ();
|
||||
}
|
||||
if (gary_toenb && (gary_nonrange(addr) || (size > 1 && gary_nonrange(addr + size - 1)))) {
|
||||
exception2(addr, false, size, regs.s ? 4 : 0);
|
||||
hardware_exception2(addr, 0, true, true, size);
|
||||
} else {
|
||||
cpu_halt(CPU_HALT_OPCODE_FETCH_FROM_NON_EXISTING_ADDRESS);
|
||||
}
|
||||
|
|
|
|||
2988
src/newcpu.cpp
2988
src/newcpu.cpp
File diff suppressed because it is too large
Load diff
|
|
@ -1,72 +1,23 @@
|
|||
|
||||
|
||||
#include "sysconfig.h"
|
||||
#include "sysdeps.h"
|
||||
|
||||
#include "options.h"
|
||||
#include "memory.h"
|
||||
#include "newcpu.h"
|
||||
#include "cpummu.h"
|
||||
#include "cpummu030.h"
|
||||
#include "cpu_prefetch.h"
|
||||
|
||||
int get_cpu_model(void)
|
||||
{
|
||||
return currprefs.cpu_model;
|
||||
}
|
||||
|
||||
void val_move2c2 (int regno, uae_u32 val)
|
||||
{
|
||||
switch (regno) {
|
||||
case 0: regs.sfc = val; break;
|
||||
case 1: regs.dfc = val; break;
|
||||
case 2: regs.cacr = val; break;
|
||||
case 3: regs.tcr = val; break;
|
||||
case 4: regs.itt0 = val; break;
|
||||
case 5: regs.itt1 = val; break;
|
||||
case 6: regs.dtt0 = val; break;
|
||||
case 7: regs.dtt1 = val; break;
|
||||
case 8: regs.buscr = val; break;
|
||||
case 0x800: regs.usp = val; break;
|
||||
case 0x801: regs.vbr = val; break;
|
||||
case 0x802: regs.caar = val; break;
|
||||
case 0x803: regs.msp = val; break;
|
||||
case 0x804: regs.isp = val; break;
|
||||
case 0x805: regs.mmusr = val; break;
|
||||
case 0x806: regs.urp = val; break;
|
||||
case 0x807: regs.srp = val; break;
|
||||
case 0x808: regs.pcr = val; break;
|
||||
}
|
||||
}
|
||||
|
||||
uae_u32 val_move2c (int regno)
|
||||
{
|
||||
switch (regno) {
|
||||
case 0: return regs.sfc;
|
||||
case 1: return regs.dfc;
|
||||
case 2: return regs.cacr;
|
||||
case 3: return regs.tcr;
|
||||
case 4: return regs.itt0;
|
||||
case 5: return regs.itt1;
|
||||
case 6: return regs.dtt0;
|
||||
case 7: return regs.dtt1;
|
||||
case 8: return regs.buscr;
|
||||
case 0x800: return regs.usp;
|
||||
case 0x801: return regs.vbr;
|
||||
case 0x802: return regs.caar;
|
||||
case 0x803: return regs.msp;
|
||||
case 0x804: return regs.isp;
|
||||
case 0x805: return regs.mmusr;
|
||||
case 0x806: return regs.urp;
|
||||
case 0x807: return regs.srp;
|
||||
case 0x808: return regs.pcr;
|
||||
default: return 0;
|
||||
}
|
||||
}
|
||||
|
||||
static int movec_illg(int regno)
|
||||
static int movec_illg (int regno)
|
||||
{
|
||||
int regno2 = regno & 0x7ff;
|
||||
|
||||
if (currprefs.cpu_model == 68010) {
|
||||
if (currprefs.cpu_model == 68010) {
|
||||
if (regno2 < 2)
|
||||
return 0;
|
||||
return 1;
|
||||
|
|
@ -95,7 +46,7 @@ static int movec_illg(int regno)
|
|||
int m68k_move2c (int regno, uae_u32 *regp)
|
||||
{
|
||||
if (movec_illg(regno)) {
|
||||
if (!regs.s) {
|
||||
if (currprefs.cpu_model < 68060 && !regs.s) {
|
||||
Exception(8);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -110,22 +61,22 @@ int m68k_move2c (int regno, uae_u32 *regp)
|
|||
case 0: regs.sfc = *regp & 7; break;
|
||||
case 1: regs.dfc = *regp & 7; break;
|
||||
case 2:
|
||||
{
|
||||
uae_u32 cacr_mask = 0;
|
||||
if (currprefs.cpu_model == 68020)
|
||||
cacr_mask = 0x0000000f;
|
||||
else if (currprefs.cpu_model == 68030)
|
||||
cacr_mask = 0x00003f1f;
|
||||
else if (currprefs.cpu_model == 68040)
|
||||
cacr_mask = 0x80008000;
|
||||
regs.cacr = *regp & cacr_mask;
|
||||
set_cpu_caches(false);
|
||||
}
|
||||
break;
|
||||
{
|
||||
uae_u32 cacr_mask = 0;
|
||||
if (currprefs.cpu_model == 68020)
|
||||
cacr_mask = 0x0000000f;
|
||||
else if (currprefs.cpu_model == 68030)
|
||||
cacr_mask = 0x00003f1f;
|
||||
else if (currprefs.cpu_model == 68040)
|
||||
cacr_mask = 0x80008000;
|
||||
regs.cacr = *regp & cacr_mask;
|
||||
set_cpu_caches (false);
|
||||
}
|
||||
break;
|
||||
/* 68040 only */
|
||||
case 3:
|
||||
regs.tcr = *regp & 0xc000;
|
||||
break;
|
||||
regs.tcr = *regp & 0xc000;
|
||||
break;
|
||||
|
||||
case 4: regs.itt0 = *regp & 0xffffe364; break;
|
||||
case 5: regs.itt1 = *regp & 0xffffe364; break;
|
||||
|
|
@ -135,11 +86,11 @@ int m68k_move2c (int regno, uae_u32 *regp)
|
|||
case 0x800: regs.usp = *regp; break;
|
||||
case 0x801: regs.vbr = *regp; break;
|
||||
case 0x802: regs.caar = *regp; break;
|
||||
case 0x803: regs.msp = *regp; if (regs.m == 1) m68k_areg(regs, 7) = regs.msp; break;
|
||||
case 0x804: regs.isp = *regp; if (regs.m == 0) m68k_areg(regs, 7) = regs.isp; break;
|
||||
case 0x803: regs.msp = *regp; if (regs.m == 1) m68k_areg (regs, 7) = regs.msp; break;
|
||||
case 0x804: regs.isp = *regp; if (regs.m == 0) m68k_areg (regs, 7) = regs.isp; break;
|
||||
/* 68040 only */
|
||||
case 0x805: regs.mmusr = *regp; break;
|
||||
/* 68040 stores all bits */
|
||||
/* 68040 stores all bits */
|
||||
case 0x806: regs.urp = *regp & 0xffffffff; break;
|
||||
case 0x807: regs.srp = *regp & 0xffffffff; break;
|
||||
default:
|
||||
|
|
@ -153,7 +104,7 @@ int m68k_move2c (int regno, uae_u32 *regp)
|
|||
int m68k_movec2 (int regno, uae_u32 *regp)
|
||||
{
|
||||
if (movec_illg(regno)) {
|
||||
if (!regs.s) {
|
||||
if (currprefs.cpu_model < 68060 && !regs.s) {
|
||||
Exception(8);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -168,30 +119,30 @@ int m68k_movec2 (int regno, uae_u32 *regp)
|
|||
case 0: *regp = regs.sfc; break;
|
||||
case 1: *regp = regs.dfc; break;
|
||||
case 2:
|
||||
{
|
||||
uae_u32 v = regs.cacr;
|
||||
uae_u32 cacr_mask = 0;
|
||||
if (currprefs.cpu_model == 68020)
|
||||
cacr_mask = 0x00000003;
|
||||
else if (currprefs.cpu_model == 68030)
|
||||
cacr_mask = 0x00003313;
|
||||
else if (currprefs.cpu_model == 68040)
|
||||
cacr_mask = 0x80008000;
|
||||
*regp = v & cacr_mask;
|
||||
}
|
||||
break;
|
||||
{
|
||||
uae_u32 v = regs.cacr;
|
||||
uae_u32 cacr_mask = 0;
|
||||
if (currprefs.cpu_model == 68020)
|
||||
cacr_mask = 0x00000003;
|
||||
else if (currprefs.cpu_model == 68030)
|
||||
cacr_mask = 0x00003313;
|
||||
else if (currprefs.cpu_model == 68040)
|
||||
cacr_mask = 0x80008000;
|
||||
*regp = v & cacr_mask;
|
||||
}
|
||||
break;
|
||||
case 3: *regp = regs.tcr; break;
|
||||
case 4: *regp = regs.itt0; break;
|
||||
case 5: *regp = regs.itt1; break;
|
||||
case 6: *regp = regs.dtt0; break;
|
||||
case 7: *regp = regs.dtt1; break;
|
||||
case 8: *regp = regs.buscr; break;
|
||||
case 8: *regp = 0; break;
|
||||
|
||||
case 0x800: *regp = regs.usp; break;
|
||||
case 0x801: *regp = regs.vbr; break;
|
||||
case 0x802: *regp = regs.caar; break;
|
||||
case 0x803: *regp = regs.m == 1 ? m68k_areg(regs, 7) : regs.msp; break;
|
||||
case 0x804: *regp = regs.m == 0 ? m68k_areg(regs, 7) : regs.isp; break;
|
||||
case 0x803: *regp = regs.m == 1 ? m68k_areg (regs, 7) : regs.msp; break;
|
||||
case 0x804: *regp = regs.m == 0 ? m68k_areg (regs, 7) : regs.isp; break;
|
||||
case 0x805: *regp = regs.mmusr; break;
|
||||
case 0x806: *regp = regs.urp; break;
|
||||
case 0x807: *regp = regs.srp; break;
|
||||
|
|
@ -286,9 +237,9 @@ void REGPARAM2 put_bitfield (uae_u32 dst, uae_u32 bdata[2], uae_u32 val, uae_s32
|
|||
}
|
||||
}
|
||||
|
||||
uae_u32 REGPARAM2 _get_disp_ea_020(uae_u32 base)
|
||||
uae_u32 REGPARAM2 get_disp_ea_020 (uae_u32 base)
|
||||
{
|
||||
uae_u16 dp = next_diword();
|
||||
uae_u16 dp = next_diword ();
|
||||
int reg = (dp >> 12) & 15;
|
||||
uae_s32 regd = regs.regs[reg];
|
||||
if ((dp & 0x800) == 0)
|
||||
|
|
@ -300,29 +251,84 @@ uae_u32 REGPARAM2 _get_disp_ea_020(uae_u32 base)
|
|||
if (dp & 0x40) regd = 0;
|
||||
|
||||
if ((dp & 0x30) == 0x20)
|
||||
base += (uae_s32)(uae_s16)next_diword();
|
||||
base += (uae_s32)(uae_s16) next_diword ();
|
||||
if ((dp & 0x30) == 0x30)
|
||||
base += next_dilong();
|
||||
base += next_dilong ();
|
||||
|
||||
if ((dp & 0x3) == 0x2)
|
||||
outer = (uae_s32)(uae_s16)next_diword();
|
||||
outer = (uae_s32)(uae_s16) next_diword ();
|
||||
if ((dp & 0x3) == 0x3)
|
||||
outer = next_dilong();
|
||||
outer = next_dilong ();
|
||||
|
||||
if ((dp & 0x4) == 0)
|
||||
base += regd;
|
||||
if (dp & 0x3)
|
||||
base = get_long(base);
|
||||
base = get_long (base);
|
||||
if (dp & 0x4)
|
||||
base += regd;
|
||||
|
||||
return base + outer;
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
return base + (uae_s32)((uae_s8)dp) + regd;
|
||||
}
|
||||
}
|
||||
|
||||
uae_u32 REGPARAM2 x_get_disp_ea_020 (uae_u32 base)
|
||||
{
|
||||
uae_u16 dp = x_next_iword ();
|
||||
int reg = (dp >> 12) & 15;
|
||||
int cycles = 0;
|
||||
uae_u32 v;
|
||||
|
||||
uae_s32 regd = regs.regs[reg];
|
||||
if ((dp & 0x800) == 0)
|
||||
regd = (uae_s32)(uae_s16)regd;
|
||||
regd <<= (dp >> 9) & 3;
|
||||
if (dp & 0x100) {
|
||||
|
||||
uae_s32 outer = 0;
|
||||
if (dp & 0x80)
|
||||
base = 0;
|
||||
if (dp & 0x40)
|
||||
regd = 0;
|
||||
|
||||
if ((dp & 0x30) == 0x20) {
|
||||
base += (uae_s32)(uae_s16) x_next_iword ();
|
||||
cycles++;
|
||||
}
|
||||
if ((dp & 0x30) == 0x30) {
|
||||
base += x_next_ilong ();
|
||||
cycles++;
|
||||
}
|
||||
|
||||
if ((dp & 0x3) == 0x2) {
|
||||
outer = (uae_s32)(uae_s16) x_next_iword ();
|
||||
cycles++;
|
||||
}
|
||||
if ((dp & 0x3) == 0x3) {
|
||||
outer = x_next_ilong ();
|
||||
cycles++;
|
||||
}
|
||||
|
||||
if ((dp & 0x4) == 0) {
|
||||
base += regd;
|
||||
cycles++;
|
||||
}
|
||||
if (dp & 0x3) {
|
||||
base = x_get_long (base);
|
||||
cycles++;
|
||||
}
|
||||
if (dp & 0x4) {
|
||||
base += regd;
|
||||
cycles++;
|
||||
}
|
||||
v = base + outer;
|
||||
} else {
|
||||
v = base + (uae_s32)((uae_s8)dp) + regd;
|
||||
}
|
||||
return v;
|
||||
}
|
||||
|
||||
int getMulu68kCycles(uae_u16 src)
|
||||
{
|
||||
int cycles = 0;
|
||||
|
|
@ -358,6 +364,7 @@ int getMuls68kCycles(uae_u16 src)
|
|||
return cycles;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Compute exact number of CPU cycles taken
|
||||
* by DIVU and DIVS on a 68000 processor.
|
||||
|
|
@ -572,7 +579,7 @@ void divbyzero_special (bool issigned, uae_s32 dst)
|
|||
SET_VFLG(1);
|
||||
}
|
||||
} else if (currprefs.cpu_model == 68040) {
|
||||
SET_CFLG (0);
|
||||
SET_CFLG(0);
|
||||
} else {
|
||||
// 68000/010
|
||||
CLEAR_CZNV ();
|
||||
|
|
@ -870,7 +877,7 @@ static void divul_overflow(uae_u16 extra, uae_s64 a)
|
|||
}
|
||||
}
|
||||
|
||||
static void divsl_divbyzero(uae_u16 extra, uae_s64 a)
|
||||
static void divsl_divbyzero(uae_u16 extra, uae_s64 a, uaecptr oldpc)
|
||||
{
|
||||
if (currprefs.cpu_model >= 68040) {
|
||||
SET_CFLG(0);
|
||||
|
|
@ -879,10 +886,10 @@ static void divsl_divbyzero(uae_u16 extra, uae_s64 a)
|
|||
SET_ZFLG(1);
|
||||
SET_CFLG(0);
|
||||
}
|
||||
Exception_cpu(5);
|
||||
Exception_cpu_oldpc(5, oldpc);
|
||||
}
|
||||
|
||||
static void divul_divbyzero(uae_u16 extra, uae_s64 a)
|
||||
static void divul_divbyzero(uae_u16 extra, uae_s64 a, uaecptr oldpc)
|
||||
{
|
||||
if (currprefs.cpu_model >= 68040) {
|
||||
SET_CFLG(0);
|
||||
|
|
@ -894,10 +901,10 @@ static void divul_divbyzero(uae_u16 extra, uae_s64 a)
|
|||
SET_VFLG(1);
|
||||
SET_CFLG(0);
|
||||
}
|
||||
Exception_cpu(5);
|
||||
Exception_cpu_oldpc(5, oldpc);
|
||||
}
|
||||
|
||||
bool m68k_divl(uae_u32 opcode, uae_u32 src, uae_u16 extra)
|
||||
int m68k_divl(uae_u32 opcode, uae_u32 src, uae_u16 extra, uaecptr oldpc)
|
||||
{
|
||||
if (extra & 0x800) {
|
||||
/* signed variant */
|
||||
|
|
@ -906,12 +913,12 @@ bool m68k_divl(uae_u32 opcode, uae_u32 src, uae_u16 extra)
|
|||
|
||||
if (extra & 0x400) {
|
||||
a &= 0xffffffffu;
|
||||
a |= (uae_s64)m68k_dreg(regs, extra & 7) << 32;
|
||||
a |= (uae_s64)m68k_dreg (regs, extra & 7) << 32;
|
||||
}
|
||||
|
||||
if (src == 0) {
|
||||
divsl_divbyzero(extra, a);
|
||||
return false;
|
||||
divsl_divbyzero(extra, a, oldpc);
|
||||
return 0;
|
||||
}
|
||||
|
||||
if ((uae_u64)a == 0x8000000000000000UL && src == ~0u) {
|
||||
|
|
@ -944,8 +951,8 @@ bool m68k_divl(uae_u32 opcode, uae_u32 src, uae_u16 extra)
|
|||
}
|
||||
|
||||
if (src == 0) {
|
||||
divul_divbyzero(extra, a);
|
||||
return false;
|
||||
divul_divbyzero(extra, a, oldpc);
|
||||
return 0;
|
||||
}
|
||||
|
||||
rem = a % (uae_u64)src;
|
||||
|
|
@ -961,10 +968,10 @@ bool m68k_divl(uae_u32 opcode, uae_u32 src, uae_u16 extra)
|
|||
m68k_dreg (regs, (extra >> 12) & 7) = (uae_u32)quot;
|
||||
}
|
||||
}
|
||||
return true;
|
||||
return 1;
|
||||
}
|
||||
|
||||
bool m68k_mull(uae_u32 opcode, uae_u32 src, uae_u16 extra)
|
||||
int m68k_mull (uae_u32 opcode, uae_u32 src, uae_u16 extra)
|
||||
{
|
||||
if (extra & 0x800) {
|
||||
/* signed */
|
||||
|
|
@ -1027,7 +1034,7 @@ bool m68k_mull(uae_u32 opcode, uae_u32 src, uae_u16 extra)
|
|||
SET_NFLG(b < 0);
|
||||
}
|
||||
}
|
||||
return true;
|
||||
return 1;
|
||||
}
|
||||
|
||||
uae_u32 exception_pc(int nr)
|
||||
|
|
@ -1035,7 +1042,7 @@ uae_u32 exception_pc(int nr)
|
|||
// bus error, address error, illegal instruction, privilege violation, a-line, f-line
|
||||
if (nr == 2 || nr == 3 || nr == 4 || nr == 8 || nr == 10 || nr == 11)
|
||||
return regs.instruction_pc;
|
||||
return m68k_getpc ();
|
||||
return m68k_getpc();
|
||||
}
|
||||
|
||||
void Exception_build_stack_frame(uae_u32 oldpc, uae_u32 currpc, uae_u32 ssw, int nr, int format)
|
||||
|
|
@ -1138,7 +1145,7 @@ void Exception_build_stack_frame(uae_u32 oldpc, uae_u32 currpc, uae_u32 ssw, int
|
|||
m68k_areg(regs, 7) -= 4;
|
||||
x_put_long(m68k_areg(regs, 7), 0);
|
||||
}
|
||||
while (i < MAX_MMU030_ACCESS) {
|
||||
while (i < 9) {
|
||||
uae_u32 v = 0;
|
||||
m68k_areg(regs, 7) -= 4;
|
||||
x_put_long(m68k_areg(regs, 7), v);
|
||||
|
|
@ -1159,8 +1166,11 @@ void Exception_build_stack_frame(uae_u32 oldpc, uae_u32 currpc, uae_u32 ssw, int
|
|||
x_put_long(m68k_areg(regs, 7), regs.mmu_fault_addr);
|
||||
// 2xinternal
|
||||
{
|
||||
uae_u32 ps = 0;
|
||||
ps |= (7 << 8);
|
||||
ps |= (7 << 11);
|
||||
m68k_areg(regs, 7) -= 4;
|
||||
x_put_long(m68k_areg(regs, 7), 0);
|
||||
x_put_long(m68k_areg(regs, 7), ps);
|
||||
}
|
||||
// stage b address
|
||||
m68k_areg(regs, 7) -= 4;
|
||||
|
|
@ -1173,25 +1183,31 @@ void Exception_build_stack_frame(uae_u32 oldpc, uae_u32 currpc, uae_u32 ssw, int
|
|||
// short bus cycle fault stack frame (68020, 68030)
|
||||
// used when instruction's last write causes bus fault
|
||||
m68k_areg(regs, 7) -= 4;
|
||||
x_put_long(m68k_areg(regs, 7), 0);
|
||||
if (format == 0xb) {
|
||||
x_put_long(m68k_areg(regs, 7), 0); // 28 0x1c
|
||||
} else {
|
||||
uae_u32 ps = 0;
|
||||
ps |= (7 << 8);
|
||||
ps |= (7 << 11);
|
||||
x_put_long(m68k_areg(regs, 7), ps); // 28 0x1c
|
||||
}
|
||||
m68k_areg(regs, 7) -= 4;
|
||||
// Data output buffer = value that was going to be written
|
||||
x_put_long(m68k_areg(regs, 7), 0);
|
||||
x_put_long(m68k_areg(regs, 7), 0); // 24 0x18
|
||||
m68k_areg(regs, 7) -= 4;
|
||||
if (format == 0xb) {
|
||||
x_put_long(m68k_areg(regs, 7), 0); // Internal register (opcode storage)
|
||||
}
|
||||
else {
|
||||
x_put_long(m68k_areg(regs, 7), regs.irc); // Internal register (opcode storage)
|
||||
x_put_long(m68k_areg(regs, 7), 0); // Internal register (opcode storage) 20 0x14
|
||||
} else {
|
||||
x_put_long(m68k_areg(regs, 7), regs.irc); // Internal register (opcode storage) 20 0x14
|
||||
}
|
||||
m68k_areg(regs, 7) -= 4;
|
||||
x_put_long(m68k_areg(regs, 7), regs.mmu_fault_addr); // data cycle fault address
|
||||
x_put_long(m68k_areg(regs, 7), regs.mmu_fault_addr); // data cycle fault address 16 0x10
|
||||
m68k_areg(regs, 7) -= 2;
|
||||
x_put_word(m68k_areg(regs, 7), 0); // Instr. pipe stage B
|
||||
x_put_word(m68k_areg(regs, 7), 0); // Instr. pipe stage B 14 0x0e
|
||||
m68k_areg(regs, 7) -= 2;
|
||||
x_put_word(m68k_areg(regs, 7), 0); // Instr. pipe stage C
|
||||
x_put_word(m68k_areg(regs, 7), 0); // Instr. pipe stage C 12 0x0c
|
||||
m68k_areg(regs, 7) -= 2;
|
||||
x_put_word(m68k_areg(regs, 7), ssw);
|
||||
x_put_word(m68k_areg(regs, 7), ssw); // 10 0x0a
|
||||
m68k_areg(regs, 7) -= 2;
|
||||
x_put_word(m68k_areg(regs, 7), 0);
|
||||
break;
|
||||
|
|
@ -1210,32 +1226,28 @@ void Exception_build_stack_frame(uae_u32 oldpc, uae_u32 currpc, uae_u32 ssw, int
|
|||
void Exception_build_stack_frame_common(uae_u32 oldpc, uae_u32 currpc, int nr)
|
||||
{
|
||||
if (nr == 5 || nr == 6 || nr == 7 || nr == 9) {
|
||||
if (nr == 9)
|
||||
oldpc = regs.trace_pc;
|
||||
if (currprefs.cpu_model <= 68010)
|
||||
Exception_build_stack_frame(oldpc, currpc, 0, nr, 0x0);
|
||||
else
|
||||
Exception_build_stack_frame(oldpc, currpc, 0, nr, 0x2);
|
||||
}
|
||||
else if (nr == 60 || nr == 61) {
|
||||
} else if (nr == 60 || nr == 61) {
|
||||
Exception_build_stack_frame(oldpc, regs.instruction_pc, 0, nr, 0x0);
|
||||
}
|
||||
else if (nr >= 48 && nr <= 55) {
|
||||
} else if (nr >= 48 && nr <= 55) {
|
||||
if (regs.fpu_exp_pre) {
|
||||
Exception_build_stack_frame(oldpc, regs.instruction_pc, 0, nr, 0x0);
|
||||
}
|
||||
else { /* post-instruction */
|
||||
} else { /* post-instruction */
|
||||
Exception_build_stack_frame(oldpc, currpc, 0, nr, 0x3);
|
||||
}
|
||||
}
|
||||
else if (nr == 11 && regs.fp_unimp_ins) {
|
||||
} else if (nr == 11 && regs.fp_unimp_ins) {
|
||||
regs.fp_unimp_ins = false;
|
||||
if (currprefs.cpu_model == 68040 && currprefs.fpu_model == 0) {
|
||||
Exception_build_stack_frame(regs.fp_ea, currpc, regs.instruction_pc, nr, 0x4);
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
Exception_build_stack_frame(regs.fp_ea, currpc, 0, nr, 0x2);
|
||||
}
|
||||
}
|
||||
else {
|
||||
} else {
|
||||
Exception_build_stack_frame(oldpc, currpc, 0, nr, 0x0);
|
||||
}
|
||||
}
|
||||
|
|
@ -1252,14 +1264,6 @@ void Exception_build_68000_address_error_stack_frame(uae_u16 mode, uae_u16 opcod
|
|||
x_put_long(m68k_areg(regs, 7) + 10, pc);
|
||||
}
|
||||
|
||||
void cpu_restore_fixup(void)
|
||||
{
|
||||
if (mmufixup[0].reg >= 0) {
|
||||
m68k_areg(regs, mmufixup[0].reg & 15) = mmufixup[0].value;
|
||||
mmufixup[0].reg = -1;
|
||||
}
|
||||
}
|
||||
|
||||
// Low word: Clear + Z and N
|
||||
void ccr_68000_long_move_ae_LZN(uae_s32 src)
|
||||
{
|
||||
|
|
@ -1317,6 +1321,7 @@ void areg_68000_long_replace_low(int reg, uae_u16 v)
|
|||
}
|
||||
|
||||
// Change F-line to privilege violation if missing co-pro
|
||||
// 68040 always return F-line
|
||||
bool privileged_copro_instruction(uae_u16 opcode)
|
||||
{
|
||||
if (currprefs.cpu_model >= 68020 && !regs.s) {
|
||||
|
|
@ -1331,8 +1336,7 @@ bool privileged_copro_instruction(uae_u16 opcode)
|
|||
if (currprefs.cpu_model < 68040 || (currprefs.cpu_model >= 68040 && id == 1))
|
||||
return true;
|
||||
}
|
||||
}
|
||||
else if ((opcode & 0xf1c0) == 0xf140) {
|
||||
} else if ((opcode & 0xf1c0) == 0xf140) {
|
||||
// cpRESTORE
|
||||
// check if valid EA
|
||||
if (mode == 2 || mode == 3 || (mode >= 5 && mode <= 6) || (mode == 7 && reg <= 3)) {
|
||||
|
|
@ -1346,7 +1350,7 @@ bool privileged_copro_instruction(uae_u16 opcode)
|
|||
|
||||
bool generates_group1_exception(uae_u16 opcode)
|
||||
{
|
||||
struct instr* table = &table68k[opcode];
|
||||
struct instr *table = &table68k[opcode];
|
||||
// illegal/a-line/f-line?
|
||||
if (table->mnemo == i_ILLG)
|
||||
return true;
|
||||
|
|
|
|||
|
|
@ -157,7 +157,7 @@ copy_screen_16bit_to_32bit:
|
|||
// copy_screen_32bit_to_16bit
|
||||
//
|
||||
// x0: uae_u8 *dst - Format (bits): rrrr rggg gggb bbbb
|
||||
// x1: uae_u8 *src - Format (bytes) in memory abgr
|
||||
// x1: uae_u8 *src - Format (bytes) in memory bgra
|
||||
// x2: int bytes
|
||||
//
|
||||
// void copy_screen_32bit_to_16bit(uae_u8 *dst, uae_u8 *src, int bytes);
|
||||
|
|
@ -168,14 +168,13 @@ copy_screen_32bit_to_16bit:
|
|||
ld2r {v0.4S-v1.4S}, [x3]
|
||||
copy_screen_32bit_to_16bit_loop:
|
||||
ld1 {v3.4S}, [x1], #16
|
||||
rev64 v3.16B, v3.16B
|
||||
ushr v4.4S, v3.4S, #16
|
||||
ushr v5.4S, v3.4S, #13
|
||||
ushr v3.4S, v3.4S, #11
|
||||
rev32 v3.16B, v3.16B
|
||||
ushr v4.4S, v3.4S, #8
|
||||
ushr v5.4S, v3.4S, #5
|
||||
ushr v3.4S, v3.4S, #3
|
||||
bit v3.16B, v4.16B, v0.16B
|
||||
bit v3.16B, v5.16B, v1.16B
|
||||
xtn v3.4H, v3.4S
|
||||
rev32 v3.4H, v3.4H
|
||||
subs w2, w2, #16
|
||||
st1 {v3.4H}, [x0], #8
|
||||
bne copy_screen_32bit_to_16bit_loop
|
||||
|
|
@ -186,7 +185,7 @@ copy_screen_32bit_to_16bit_loop:
|
|||
// copy_screen_32bit_to_32bit
|
||||
//
|
||||
// r0: uae_u8 *dst - Format (bytes): in memory argb
|
||||
// r1: uae_u8 *src - Format (bytes): in memory abgr
|
||||
// r1: uae_u8 *src - Format (bytes): in memory bgra
|
||||
// r2: int bytes
|
||||
//
|
||||
// void copy_screen_32bit_to_32bit(uae_u8 *dst, uae_u8 *src, int bytes);
|
||||
|
|
@ -196,7 +195,6 @@ copy_screen_32bit_to_32bit:
|
|||
ld1 {v3.4S}, [x1], #16
|
||||
subs w2, w2, #16
|
||||
rev32 v3.16B, v3.16B
|
||||
ushr v3.4S, v3.4S, #8
|
||||
st1 {v3.4S}, [x0], #16
|
||||
bne copy_screen_32bit_to_32bit
|
||||
ret
|
||||
|
|
|
|||
|
|
@ -1927,6 +1927,15 @@ void target_default_options(struct uae_prefs* p, int type)
|
|||
p->whdbootprefs.buttonwait = amiberry_options.default_whd_buttonwait;
|
||||
p->whdbootprefs.showsplash = amiberry_options.default_whd_showsplash;
|
||||
p->whdbootprefs.configdelay = amiberry_options.default_whd_configdelay;
|
||||
|
||||
// Disable Cycle-Exact modes that are not yet implemented
|
||||
if (changed_prefs.cpu_cycle_exact || changed_prefs.cpu_memory_cycle_exact)
|
||||
{
|
||||
if (changed_prefs.cpu_model > 68010)
|
||||
{
|
||||
changed_prefs.cpu_cycle_exact = changed_prefs.cpu_memory_cycle_exact = false;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static const TCHAR* scsimode[] = { _T("SCSIEMU"), _T("SPTI"), _T("SPTI+SCSISCAN"), NULL };
|
||||
|
|
@ -3025,9 +3034,11 @@ bool get_plugin_path(TCHAR* out, int len, const TCHAR* path)
|
|||
out[len - 1] = '\0';
|
||||
}
|
||||
else {
|
||||
write_log("\n-----------------> STUB: get_plugin_path, "
|
||||
"size: %d, path: %s\n", len, path);
|
||||
out[0] = '\0';
|
||||
strncpy(out, start_path_data, len - 1);
|
||||
strncat(out, "/", len - 1);
|
||||
strncat(out, path, len - 1);
|
||||
strncat(out, "/", len - 1);
|
||||
return my_existsfile(out);
|
||||
}
|
||||
return TRUE;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@
|
|||
#include "audio.h"
|
||||
#include "sounddep/sound.h"
|
||||
#include "savestate.h"
|
||||
#include "filesys.h"
|
||||
#include "blkdev.h"
|
||||
#include "memory.h"
|
||||
#include "amiberry_gfx.h"
|
||||
|
|
@ -829,29 +830,60 @@ int tweakbootpri(int bp, int ab, int dnm)
|
|||
return bp;
|
||||
}
|
||||
|
||||
struct fsvdlg_vals current_fsvdlg;
|
||||
struct hfdlg_vals current_hfdlg;
|
||||
|
||||
bool hardfile_testrdb(const TCHAR* filename)
|
||||
void hardfile_testrdb (struct hfdlg_vals* hdf)
|
||||
{
|
||||
auto isrdb = false;
|
||||
auto* f = zfile_fopen(filename, _T("rb"), ZFD_NORMAL);
|
||||
uae_u8 tmp[8];
|
||||
uae_u8 id[512];
|
||||
struct hardfiledata hfd{};
|
||||
|
||||
if (!f)
|
||||
return false;
|
||||
for (auto i = 0; i < 16; i++)
|
||||
{
|
||||
zfile_fseek(f, i * 512, SEEK_SET);
|
||||
memset(tmp, 0, sizeof tmp);
|
||||
zfile_fread(tmp, 1, sizeof tmp, f);
|
||||
if (!memcmp(tmp, "RDSK\0\0\0", 7) || !memcmp(tmp, "DRKS\0\0", 6) || (tmp[0] == 0x53 && tmp[1] == 0x10 && tmp[2] == 0x9b && tmp[3] == 0x13 && tmp[4] == 0 && tmp[5] == 0))
|
||||
{
|
||||
// RDSK or ADIDE "encoded" RDSK
|
||||
isrdb = true;
|
||||
break;
|
||||
memset(id, 0, sizeof id);
|
||||
memset(&hfd, 0, sizeof hfd);
|
||||
hfd.ci.readonly = true;
|
||||
hfd.ci.blocksize = 512;
|
||||
if (hdf_open(&hfd, hdf->ci.rootdir) > 0) {
|
||||
for (auto i = 0; i < 16; i++) {
|
||||
hdf_read_rdb(&hfd, id, i * 512, 512);
|
||||
auto babe = id[0] == 0xBA && id[1] == 0xBE; // A2090
|
||||
if (!memcmp(id, "RDSK\0\0\0", 7) || !memcmp(id, "CDSK\0\0\0", 7) || !memcmp(id, "DRKS\0\0", 6) ||
|
||||
(id[0] == 0x53 && id[1] == 0x10 && id[2] == 0x9b && id[3] == 0x13 && id[4] == 0 && id[5] == 0) || babe) {
|
||||
// RDSK or ADIDE "encoded" RDSK
|
||||
auto blocksize = 512;
|
||||
if (!babe)
|
||||
blocksize = (id[16] << 24) | (id[17] << 16) | (id[18] << 8) | (id[19] << 0);
|
||||
hdf->ci.cyls = hdf->ci.highcyl = hdf->forcedcylinders = 0;
|
||||
hdf->ci.sectors = 0;
|
||||
hdf->ci.surfaces = 0;
|
||||
hdf->ci.reserved = 0;
|
||||
hdf->ci.bootpri = 0;
|
||||
hdf->ci.devname[0] = 0;
|
||||
if (blocksize >= 512)
|
||||
hdf->ci.blocksize = blocksize;
|
||||
break;
|
||||
}
|
||||
}
|
||||
hdf_close(&hfd);
|
||||
}
|
||||
zfile_fclose(f);
|
||||
return isrdb;
|
||||
}
|
||||
|
||||
void default_fsvdlg(struct fsvdlg_vals* f)
|
||||
{
|
||||
memset(f, 0, sizeof(struct fsvdlg_vals));
|
||||
f->ci.type = UAEDEV_DIR;
|
||||
}
|
||||
|
||||
void default_hfdlg(struct hfdlg_vals* f)
|
||||
{
|
||||
auto ctrl = f->ci.controller_type;
|
||||
auto unit = f->ci.controller_unit;
|
||||
memset(f, 0, sizeof(struct hfdlg_vals));
|
||||
uci_set_defaults(&f->ci, false);
|
||||
f->original = true;
|
||||
f->ci.type = UAEDEV_HDF;
|
||||
f->ci.controller_type = ctrl;
|
||||
f->ci.controller_unit = unit;
|
||||
f->ci.unit_feature_level = 1;
|
||||
}
|
||||
|
||||
bool isguiactive(void)
|
||||
|
|
|
|||
|
|
@ -649,6 +649,11 @@ int hdf_resize_target(struct hardfiledata* hfd, uae_u64 newsize)
|
|||
return 1;
|
||||
}
|
||||
|
||||
int get_guid_target(uae_u8* out)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int num_drives;
|
||||
|
||||
static int hdf_init2(int force)
|
||||
|
|
|
|||
|
|
@ -493,6 +493,7 @@ bool mapped_malloc(addrbank* ab)
|
|||
// fill end of ram with ILLEGAL to catch direct PC falling out of RAM.
|
||||
put_long_host(ab->baseaddr + ab->reserved_size, 0x4afc4afc);
|
||||
}
|
||||
ab->startaccessmask = ab->start & ab->mask;
|
||||
ab->allocated_size = ab->reserved_size;
|
||||
write_log("mapped_malloc(): 0x%08x - 0x%08x (0x%08x - 0x%08x) -> %s (%s)\n",
|
||||
ab->baseaddr - regs.natmem_offset, ab->baseaddr - regs.natmem_offset + ab->allocated_size,
|
||||
|
|
|
|||
|
|
@ -167,10 +167,10 @@ stmdb sp!, {r4-r6, lr}
|
|||
copy_screen_32bit_to_16bit_loop:
|
||||
ldr r3, [r1], #4
|
||||
rev r3, r3
|
||||
lsr r4, r3, #27
|
||||
lsr r5, r3, #18
|
||||
lsr r4, r3, #19
|
||||
lsr r5, r3, #10
|
||||
and r5, r5, #63
|
||||
lsr r6, r3, #11
|
||||
lsr r6, r3, #3
|
||||
and r6, r6, #31
|
||||
orr r6, r6, r5, lsl #5
|
||||
orr r6, r6, r4, lsl #11
|
||||
|
|
@ -192,9 +192,8 @@ ldmia sp!, {r4-r6, pc}
|
|||
@----------------------------------------------------------------
|
||||
copy_screen_32bit_to_32bit:
|
||||
ldr r3, [r1], #4
|
||||
rev r3, r3
|
||||
lsr r3, r3, #8
|
||||
subs r2, r2, #4
|
||||
rev r3, r3
|
||||
str r3, [r0], #4
|
||||
bne copy_screen_32bit_to_32bit
|
||||
bx lr
|
||||
|
|
|
|||
|
|
@ -22,7 +22,7 @@
|
|||
#define DIALOG_WIDTH 620
|
||||
#define DIALOG_HEIGHT 202
|
||||
|
||||
static const char *harddisk_filter[] = {".hdf", "\0"};
|
||||
static const char *harddisk_filter[] = { ".hdf", ".vhd", "\0" };
|
||||
|
||||
static bool dialogResult = false;
|
||||
static bool dialogFinished = false;
|
||||
|
|
@ -41,6 +41,7 @@ static gcn::TextField *txtPath;
|
|||
static gcn::Button *cmdPath;
|
||||
static gcn::Label *lblSize;
|
||||
static gcn::TextField *txtSize;
|
||||
static gcn::CheckBox* chkDynamic;
|
||||
|
||||
class CreateFilesysHardfileActionListener : public gcn::ActionListener
|
||||
{
|
||||
|
|
@ -128,6 +129,9 @@ static void InitCreateFilesysHardfile()
|
|||
txtSize = new gcn::TextField();
|
||||
txtSize->setSize(60, TEXTFIELD_HEIGHT);
|
||||
|
||||
chkDynamic = new gcn::CheckBox("Dynamic VHD", true);
|
||||
chkDynamic->setId("chkDynamic");
|
||||
|
||||
lblPath = new gcn::Label("Path:");
|
||||
lblPath->setAlignment(gcn::Graphics::RIGHT);
|
||||
txtPath = new gcn::TextField();
|
||||
|
|
@ -163,6 +167,7 @@ static void InitCreateFilesysHardfile()
|
|||
|
||||
wndCreateFilesysHardfile->add(lblSize, lblDevice->getX(), posY);
|
||||
wndCreateFilesysHardfile->add(txtSize, txtDevice->getX(), posY);
|
||||
wndCreateFilesysHardfile->add(chkDynamic, txtSize->getX() + txtSize->getWidth() + DISTANCE_NEXT_X, posY);
|
||||
|
||||
wndCreateFilesysHardfile->add(cmdOK);
|
||||
wndCreateFilesysHardfile->add(cmdCancel);
|
||||
|
|
@ -188,6 +193,7 @@ static void ExitCreateFilesysHardfile()
|
|||
delete cmdPath;
|
||||
delete lblSize;
|
||||
delete txtSize;
|
||||
delete chkDynamic;
|
||||
|
||||
delete cmdOK;
|
||||
delete cmdCancel;
|
||||
|
|
@ -437,6 +443,7 @@ bool CreateFilesysHardfile()
|
|||
|
||||
txtBootPri->setText("0");
|
||||
txtSize->setText("100");
|
||||
chkDynamic->setSelected(false);
|
||||
|
||||
// Prepare the screen once
|
||||
uae_gui->logic();
|
||||
|
|
@ -459,24 +466,38 @@ bool CreateFilesysHardfile()
|
|||
|
||||
const auto bp = tweakbootpri(atoi(txtBootPri->getText().c_str()), 1, 0);
|
||||
|
||||
auto* const newFile = fopen(txtPath->getText().c_str(), "wbe");
|
||||
if (!newFile)
|
||||
{
|
||||
write_log("Unable to create new file.");
|
||||
ExitCreateFilesysHardfile();
|
||||
return false;
|
||||
char init_path[MAX_DPATH];
|
||||
_tcsncpy(init_path, txtPath->getText().c_str(), MAX_DPATH - 1);
|
||||
if (chkDynamic->isSelected()) {
|
||||
if (_tcslen(init_path) > 4 && !_tcsicmp(init_path + _tcslen(init_path) - 4, _T(".hdf")))
|
||||
_tcscpy(init_path + _tcslen(init_path) - 4, _T(".vhd"));
|
||||
const bool result = vhd_create(init_path, size * 1024 * 1024, 0);
|
||||
if (!result) {
|
||||
ShowMessage("Create Hardfile", "Unable to create new VHD file.", "", "Ok", "");
|
||||
ExitCreateFilesysHardfile();
|
||||
return false;
|
||||
}
|
||||
}
|
||||
if (_fseeki64(newFile, size * 1024 * 1024 - 1, SEEK_SET) == 0)
|
||||
{
|
||||
fwrite(&zero, 1, 1, newFile);
|
||||
fclose(newFile);
|
||||
}
|
||||
else
|
||||
{
|
||||
write_log("Unable to create new file size.");
|
||||
fclose(newFile);
|
||||
ExitCreateFilesysHardfile();
|
||||
return false;
|
||||
else {
|
||||
FILE* newFile = fopen(init_path, "wb");
|
||||
if (!newFile)
|
||||
{
|
||||
ShowMessage("Create Hardfile", "Unable to create new file.", "", "Ok", "");
|
||||
ExitCreateFilesysHardfile();
|
||||
return false;
|
||||
}
|
||||
if (_fseeki64(newFile, size * 1024 * 1024 - 1, SEEK_SET) == 0)
|
||||
{
|
||||
fwrite(&zero, 1, 1, newFile);
|
||||
fclose(newFile);
|
||||
}
|
||||
else
|
||||
{
|
||||
fclose(newFile);
|
||||
ShowMessage("Create Hardfile", "Unable to create new file size.", "", "Ok", "");
|
||||
ExitCreateFilesysHardfile();
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
struct uaedev_config_info ci
|
||||
|
|
@ -485,7 +506,7 @@ bool CreateFilesysHardfile()
|
|||
|
||||
uci_set_defaults(&ci, false);
|
||||
strncpy(ci.devname, const_cast<char *>(txtDevice->getText().c_str()), MAX_DPATH);
|
||||
strncpy(ci.rootdir, const_cast<char *>(txtPath->getText().c_str()), MAX_DPATH);
|
||||
strncpy(ci.rootdir, const_cast<char *>(init_path), MAX_DPATH);
|
||||
ci.type = UAEDEV_HDF;
|
||||
ci.surfaces = (size / 1024) + 1;
|
||||
ci.bootpri = bp;
|
||||
|
|
|
|||
|
|
@ -24,7 +24,7 @@
|
|||
#define DIALOG_WIDTH 620
|
||||
#define DIALOG_HEIGHT 280
|
||||
|
||||
static const char *harddisk_filter[] = {".hdf", ".hdz", ".lha", "zip", "\0"};
|
||||
static const char *harddisk_filter[] = {".hdf", ".hdz", ".lha", "zip", ".vhd", "\0"};
|
||||
|
||||
struct controller_map
|
||||
{
|
||||
|
|
@ -65,20 +65,107 @@ static gcn::Label *lblController;
|
|||
static gcn::DropDown *cboController;
|
||||
static gcn::DropDown *cboUnit;
|
||||
|
||||
static void check_rdb(const TCHAR *filename)
|
||||
static void sethd(void)
|
||||
{
|
||||
const auto isrdb = hardfile_testrdb(filename);
|
||||
if (isrdb)
|
||||
{
|
||||
txtSectors->setText("0");
|
||||
txtSurfaces->setText("0");
|
||||
txtReserved->setText("0");
|
||||
txtBootPri->setText("0");
|
||||
bool rdb = is_hdf_rdb();
|
||||
bool enablegeo = !rdb;
|
||||
txtSectors->setEnabled(enablegeo);
|
||||
txtSurfaces->setEnabled(enablegeo);
|
||||
txtReserved->setEnabled(enablegeo);
|
||||
txtBlocksize->setEnabled(enablegeo);
|
||||
}
|
||||
|
||||
static void sethardfile(void)
|
||||
{
|
||||
std::string strdevname, strroot;
|
||||
char tmp[32];
|
||||
auto ide = current_hfdlg.ci.controller_type >= HD_CONTROLLER_TYPE_IDE_FIRST && current_hfdlg.ci.controller_type <= HD_CONTROLLER_TYPE_IDE_LAST;
|
||||
auto rdb = is_hdf_rdb();
|
||||
auto disables = !rdb || (rdb && current_hfdlg.ci.controller_type == HD_CONTROLLER_TYPE_UAE);
|
||||
|
||||
sethd();
|
||||
if (!disables)
|
||||
current_hfdlg.ci.bootpri = 0;
|
||||
strroot.assign(current_hfdlg.ci.rootdir);
|
||||
txtPath->setText(strroot);
|
||||
strdevname.assign(current_hfdlg.ci.devname);
|
||||
txtDevice->setText(strdevname);
|
||||
snprintf(tmp, sizeof(tmp) - 1, "%d", rdb ? current_hfdlg.ci.psecs : current_hfdlg.ci.sectors);
|
||||
txtSectors->setText(tmp);
|
||||
snprintf(tmp, sizeof(tmp) - 1, "%d", rdb ? current_hfdlg.ci.pheads : current_hfdlg.ci.surfaces);
|
||||
txtSurfaces->setText(tmp);
|
||||
snprintf(tmp, sizeof(tmp) - 1, "%d", rdb ? current_hfdlg.ci.pcyls : current_hfdlg.ci.reserved);
|
||||
txtReserved->setText(tmp);
|
||||
snprintf(tmp, sizeof(tmp) - 1, "%d", current_hfdlg.ci.blocksize);
|
||||
txtBlocksize->setText(tmp);
|
||||
snprintf(tmp, sizeof(tmp) - 1, "%d", current_hfdlg.ci.bootpri);
|
||||
txtBootPri->setText(tmp);
|
||||
chkReadWrite->setSelected(!current_hfdlg.ci.readonly);
|
||||
chkAutoboot->setSelected(ISAUTOBOOT(¤t_hfdlg.ci));
|
||||
chkAutoboot->setEnabled(disables);
|
||||
|
||||
auto selIndex = 0;
|
||||
for (auto i = 0; i < 2; ++i) {
|
||||
if (controller[i].type == current_hfdlg.ci.controller_type)
|
||||
selIndex = i;
|
||||
}
|
||||
cboController->setSelected(selIndex);
|
||||
cboUnit->setSelected(current_hfdlg.ci.controller_unit);
|
||||
}
|
||||
|
||||
void updatehdfinfo(bool force, bool defaults)
|
||||
{
|
||||
uae_u8 id[512] = { 0 };
|
||||
uae_u32 i;
|
||||
|
||||
uae_u64 bsize = 0;
|
||||
if (force) {
|
||||
auto gotrdb = false;
|
||||
auto blocksize = 512;
|
||||
struct hardfiledata hfd{};
|
||||
memset(id, 0, sizeof id);
|
||||
memset(&hfd, 0, sizeof hfd);
|
||||
hfd.ci.readonly = true;
|
||||
hfd.ci.blocksize = blocksize;
|
||||
current_hfdlg.size = 0;
|
||||
current_hfdlg.dostype = 0;
|
||||
if (hdf_open(&hfd, current_hfdlg.ci.rootdir) > 0) {
|
||||
for (i = 0; i < 16; i++) {
|
||||
hdf_read(&hfd, id, i * 512, 512);
|
||||
bsize = hfd.virtsize;
|
||||
current_hfdlg.size = hfd.virtsize;
|
||||
if (!memcmp(id, "RDSK", 4) || !memcmp(id, "CDSK", 4)) {
|
||||
blocksize = (id[16] << 24) | (id[17] << 16) | (id[18] << 8) | (id[19] << 0);
|
||||
gotrdb = true;
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (i == 16) {
|
||||
hdf_read(&hfd, id, 0, 512);
|
||||
current_hfdlg.dostype = (id[0] << 24) | (id[1] << 16) | (id[2] << 8) | (id[3] << 0);
|
||||
}
|
||||
}
|
||||
if (defaults) {
|
||||
if (blocksize > 512) {
|
||||
hfd.ci.blocksize = blocksize;
|
||||
}
|
||||
}
|
||||
if (current_hfdlg.ci.controller_type >= HD_CONTROLLER_TYPE_IDE_FIRST && current_hfdlg.ci.controller_type <= HD_CONTROLLER_TYPE_IDE_LAST) {
|
||||
getchspgeometry(bsize, ¤t_hfdlg.ci.pcyls, ¤t_hfdlg.ci.pheads, ¤t_hfdlg.ci.psecs, true);
|
||||
}
|
||||
else {
|
||||
getchspgeometry(bsize, ¤t_hfdlg.ci.pcyls, ¤t_hfdlg.ci.pheads, ¤t_hfdlg.ci.psecs, false);
|
||||
}
|
||||
if (defaults && !gotrdb) {
|
||||
gethdfgeometry(bsize, ¤t_hfdlg.ci);
|
||||
}
|
||||
hdf_close(&hfd);
|
||||
}
|
||||
|
||||
if (current_hfdlg.ci.controller_type >= HD_CONTROLLER_TYPE_IDE_FIRST && current_hfdlg.ci.controller_type <= HD_CONTROLLER_TYPE_IDE_LAST) {
|
||||
if (current_hfdlg.ci.unit_feature_level == HD_LEVEL_ATA_1 && bsize >= 4 * (uae_u64)0x40000000)
|
||||
current_hfdlg.ci.unit_feature_level = HD_LEVEL_ATA_2;
|
||||
}
|
||||
txtSectors->setEnabled(!isrdb);
|
||||
txtSurfaces->setEnabled(!isrdb);
|
||||
txtReserved->setEnabled(!isrdb);
|
||||
txtBootPri->setEnabled(!isrdb);
|
||||
}
|
||||
|
||||
class ControllerListModel : public gcn::ListModel
|
||||
|
|
@ -138,7 +225,17 @@ public:
|
|||
{
|
||||
txtPath->setText(tmp);
|
||||
fileSelected = true;
|
||||
check_rdb(tmp);
|
||||
default_hfdlg(¤t_hfdlg);
|
||||
CreateDefaultDevicename(current_hfdlg.ci.devname);
|
||||
_tcscpy(current_hfdlg.ci.rootdir, tmp);
|
||||
// Set RDB mode if IDE or SCSI
|
||||
if (current_hfdlg.ci.controller_type > 0) {
|
||||
current_hfdlg.ci.sectors = current_hfdlg.ci.reserved = current_hfdlg.ci.surfaces = 0;
|
||||
}
|
||||
hardfile_testrdb(¤t_hfdlg);
|
||||
updatehdfinfo(true, true);
|
||||
updatehdfinfo(false, false);
|
||||
sethardfile();
|
||||
}
|
||||
wndEditFilesysHardfile->requestModalFocus();
|
||||
cmdPath->requestFocus();
|
||||
|
|
@ -155,6 +252,28 @@ public:
|
|||
cboUnit->setEnabled(true);
|
||||
break;
|
||||
}
|
||||
current_hfdlg.ci.controller_type = controller[cboController->getSelected()].type;
|
||||
sethardfile();
|
||||
|
||||
}
|
||||
else if (actionEvent.getSource() == cboUnit) {
|
||||
current_hfdlg.ci.controller_unit = cboUnit->getSelected();
|
||||
|
||||
}
|
||||
else if (actionEvent.getSource() == chkReadWrite) {
|
||||
current_hfdlg.ci.readonly = !chkReadWrite->isSelected();
|
||||
|
||||
}
|
||||
else if (actionEvent.getSource() == chkAutoboot) {
|
||||
char tmp[32];
|
||||
if (chkAutoboot->isSelected()) {
|
||||
current_hfdlg.ci.bootpri = 0;
|
||||
}
|
||||
else {
|
||||
current_hfdlg.ci.bootpri = BOOTPRI_NOAUTOBOOT;
|
||||
}
|
||||
snprintf(tmp, sizeof(tmp) - 1, "%d", current_hfdlg.ci.bootpri);
|
||||
txtBootPri->setText(tmp);
|
||||
}
|
||||
else
|
||||
{
|
||||
|
|
@ -179,11 +298,72 @@ public:
|
|||
|
||||
static FilesysHardfileActionListener *filesysHardfileActionListener;
|
||||
|
||||
class FilesysHardfileFocusListener : public gcn::FocusListener
|
||||
{
|
||||
public:
|
||||
void focusGained(const gcn::Event& event)
|
||||
{
|
||||
}
|
||||
|
||||
void focusLost(const gcn::Event& event)
|
||||
{
|
||||
int v;
|
||||
int* p;
|
||||
if (event.getSource() == txtDevice) {
|
||||
strncpy(current_hfdlg.ci.devname, (char*)txtDevice->getText().c_str(), MAX_DPATH - 1);
|
||||
|
||||
}
|
||||
else if (event.getSource() == txtBootPri) {
|
||||
current_hfdlg.ci.bootpri = atoi(txtBootPri->getText().c_str());
|
||||
if (current_hfdlg.ci.bootpri < -127)
|
||||
current_hfdlg.ci.bootpri = -127;
|
||||
if (current_hfdlg.ci.bootpri > 127)
|
||||
current_hfdlg.ci.bootpri = 127;
|
||||
|
||||
}
|
||||
else if (event.getSource() == txtSurfaces) {
|
||||
p = ¤t_hfdlg.ci.surfaces;
|
||||
v = *p;
|
||||
*p = atoi(txtSurfaces->getText().c_str());
|
||||
if (v != *p) {
|
||||
updatehdfinfo(true, false);
|
||||
}
|
||||
|
||||
}
|
||||
else if (event.getSource() == txtReserved) {
|
||||
p = ¤t_hfdlg.ci.reserved;
|
||||
v = *p;
|
||||
*p = atoi(txtReserved->getText().c_str());
|
||||
if (v != *p) {
|
||||
updatehdfinfo(true, false);
|
||||
}
|
||||
|
||||
}
|
||||
else if (event.getSource() == txtSectors) {
|
||||
p = ¤t_hfdlg.ci.sectors;
|
||||
v = *p;
|
||||
*p = atoi(txtSectors->getText().c_str());
|
||||
if (v != *p) {
|
||||
updatehdfinfo(true, false);
|
||||
}
|
||||
|
||||
}
|
||||
else if (event.getSource() == txtBlocksize) {
|
||||
v = current_hfdlg.ci.blocksize;
|
||||
current_hfdlg.ci.blocksize = atoi(txtBlocksize->getText().c_str());
|
||||
if (v != current_hfdlg.ci.blocksize)
|
||||
updatehdfinfo(true, false);
|
||||
}
|
||||
}
|
||||
};
|
||||
static FilesysHardfileFocusListener* filesysHardfileFocusListener;
|
||||
|
||||
|
||||
static void InitEditFilesysHardfile()
|
||||
{
|
||||
for (auto i = 0; expansionroms[i].name; i++)
|
||||
{
|
||||
const auto erc = &expansionroms[i];
|
||||
const auto* const erc = &expansionroms[i];
|
||||
if (erc->deviceflags & EXPANSIONTYPE_IDE)
|
||||
{
|
||||
for (auto j = 0; controller[j].type >= 0; ++j)
|
||||
|
|
@ -205,6 +385,7 @@ static void InitEditFilesysHardfile()
|
|||
wndEditFilesysHardfile->setTitleBarHeight(TITLEBAR_HEIGHT);
|
||||
|
||||
filesysHardfileActionListener = new FilesysHardfileActionListener();
|
||||
filesysHardfileFocusListener = new FilesysHardfileFocusListener();
|
||||
|
||||
cmdOK = new gcn::Button("Ok");
|
||||
cmdOK->setSize(BUTTON_WIDTH, BUTTON_HEIGHT);
|
||||
|
|
@ -227,37 +408,53 @@ static void InitEditFilesysHardfile()
|
|||
txtDevice = new gcn::TextField();
|
||||
txtDevice->setSize(60, TEXTFIELD_HEIGHT);
|
||||
|
||||
txtDevice->addFocusListener(filesysHardfileFocusListener);
|
||||
|
||||
chkReadWrite = new gcn::CheckBox("Read/Write", true);
|
||||
chkReadWrite->setId("hdfRW");
|
||||
|
||||
chkReadWrite->addActionListener(filesysHardfileActionListener);
|
||||
|
||||
chkAutoboot = new gcn::CheckBox("Bootable", true);
|
||||
chkAutoboot->setId("hdfAutoboot");
|
||||
|
||||
chkAutoboot->addActionListener(filesysHardfileActionListener);
|
||||
|
||||
lblBootPri = new gcn::Label("Boot priority:");
|
||||
lblBootPri->setAlignment(gcn::Graphics::RIGHT);
|
||||
txtBootPri = new gcn::TextField();
|
||||
txtBootPri->setSize(40, TEXTFIELD_HEIGHT);
|
||||
|
||||
txtBootPri->addFocusListener(filesysHardfileFocusListener);
|
||||
|
||||
lblSurfaces = new gcn::Label("Surfaces:");
|
||||
lblSurfaces->setAlignment(gcn::Graphics::RIGHT);
|
||||
txtSurfaces = new gcn::TextField();
|
||||
txtSurfaces->setSize(40, TEXTFIELD_HEIGHT);
|
||||
|
||||
txtSurfaces->addFocusListener(filesysHardfileFocusListener);
|
||||
|
||||
lblReserved = new gcn::Label("Reserved:");
|
||||
lblReserved->setAlignment(gcn::Graphics::RIGHT);
|
||||
txtReserved = new gcn::TextField();
|
||||
txtReserved->setSize(40, TEXTFIELD_HEIGHT);
|
||||
|
||||
txtReserved->addFocusListener(filesysHardfileFocusListener);
|
||||
|
||||
lblSectors = new gcn::Label("Sectors:");
|
||||
lblSectors->setAlignment(gcn::Graphics::RIGHT);
|
||||
txtSectors = new gcn::TextField();
|
||||
txtSectors->setSize(40, TEXTFIELD_HEIGHT);
|
||||
|
||||
txtSectors->addFocusListener(filesysHardfileFocusListener);
|
||||
|
||||
lblBlocksize = new gcn::Label("Blocksize:");
|
||||
lblBlocksize->setAlignment(gcn::Graphics::RIGHT);
|
||||
txtBlocksize = new gcn::TextField();
|
||||
txtBlocksize->setSize(40, TEXTFIELD_HEIGHT);
|
||||
|
||||
txtBlocksize->addFocusListener(filesysHardfileFocusListener);
|
||||
|
||||
lblPath = new gcn::Label("Path:");
|
||||
lblPath->setAlignment(gcn::Graphics::RIGHT);
|
||||
txtPath = new gcn::TextField();
|
||||
|
|
@ -282,6 +479,8 @@ static void InitEditFilesysHardfile()
|
|||
cboUnit->setBaseColor(gui_baseCol);
|
||||
cboUnit->setId("hdfUnit");
|
||||
|
||||
cboUnit->addActionListener(filesysHardfileActionListener);
|
||||
|
||||
int posY = DISTANCE_BORDER;
|
||||
int posX = DISTANCE_BORDER;
|
||||
|
||||
|
|
@ -361,6 +560,7 @@ static void ExitEditFilesysHardfile()
|
|||
delete cmdOK;
|
||||
delete cmdCancel;
|
||||
delete filesysHardfileActionListener;
|
||||
delete filesysHardfileFocusListener;
|
||||
|
||||
delete wndEditFilesysHardfile;
|
||||
}
|
||||
|
|
@ -369,6 +569,9 @@ static void EditFilesysHardfileLoop()
|
|||
{
|
||||
//FocusBugWorkaround(wndEditFilesysHardfile);
|
||||
|
||||
char lastActiveWidget[128];
|
||||
strcpy(lastActiveWidget, "");
|
||||
|
||||
int got_event = 0;
|
||||
SDL_Event event;
|
||||
SDL_Event touch_event;
|
||||
|
|
@ -603,56 +806,22 @@ bool EditFilesysHardfile(const int unit_no)
|
|||
if (unit_no >= 0)
|
||||
{
|
||||
uci = &changed_prefs.mountconfig[unit_no];
|
||||
const auto ci = &uci->ci;
|
||||
get_filesys_unitconfig(&changed_prefs, unit_no, &mi);
|
||||
|
||||
strdevname.assign(ci->devname);
|
||||
txtDevice->setText(strdevname);
|
||||
strroot.assign(ci->rootdir);
|
||||
txtPath->setText(strroot);
|
||||
current_hfdlg.forcedcylinders = uci->ci.highcyl;
|
||||
memcpy(¤t_hfdlg.ci, uci, sizeof(struct uaedev_config_info));
|
||||
fileSelected = true;
|
||||
|
||||
chkReadWrite->setSelected(!ci->readonly);
|
||||
chkAutoboot->setSelected(ci->bootpri != BOOTPRI_NOAUTOBOOT);
|
||||
snprintf(tmp, sizeof tmp, "%d", ci->bootpri >= -127 ? ci->bootpri : -127);
|
||||
txtBootPri->setText(tmp);
|
||||
snprintf(tmp, sizeof tmp, "%d", ci->surfaces);
|
||||
txtSurfaces->setText(tmp);
|
||||
snprintf(tmp, sizeof tmp, "%d", ci->reserved);
|
||||
txtReserved->setText(tmp);
|
||||
snprintf(tmp, sizeof tmp, "%d", ci->sectors);
|
||||
txtSectors->setText(tmp);
|
||||
snprintf(tmp, sizeof tmp, "%d", ci->blocksize);
|
||||
txtBlocksize->setText(tmp);
|
||||
auto selIndex = 0;
|
||||
for (auto i = 0; i < 2; ++i)
|
||||
{
|
||||
if (controller[i].type == ci->controller_type)
|
||||
selIndex = i;
|
||||
}
|
||||
cboController->setSelected(selIndex);
|
||||
cboUnit->setSelected(ci->controller_unit);
|
||||
|
||||
check_rdb(strroot.c_str());
|
||||
}
|
||||
else
|
||||
{
|
||||
CreateDefaultDevicename(tmp);
|
||||
txtDevice->setText(tmp);
|
||||
strroot.assign(current_dir);
|
||||
txtPath->setText(strroot);
|
||||
default_hfdlg(¤t_hfdlg);
|
||||
CreateDefaultDevicename(current_hfdlg.ci.devname);
|
||||
fileSelected = false;
|
||||
|
||||
chkReadWrite->setSelected(true);
|
||||
txtBootPri->setText("0");
|
||||
txtSurfaces->setText("1");
|
||||
txtReserved->setText("2");
|
||||
txtSectors->setText("32");
|
||||
txtBlocksize->setText("512");
|
||||
cboController->setSelected(0);
|
||||
cboUnit->setSelected(0);
|
||||
}
|
||||
|
||||
updatehdfinfo(true, false);
|
||||
sethardfile();
|
||||
|
||||
// Prepare the screen once
|
||||
uae_gui->logic();
|
||||
SDL_RenderClear(sdl_renderer);
|
||||
|
|
@ -668,32 +837,12 @@ bool EditFilesysHardfile(const int unit_no)
|
|||
|
||||
if (dialogResult)
|
||||
{
|
||||
struct uaedev_config_info ci
|
||||
{
|
||||
};
|
||||
const auto bp = tweakbootpri(atoi(txtBootPri->getText().c_str()), chkAutoboot->isSelected() ? 1 : 0, 0);
|
||||
extract_path(const_cast<char *>(txtPath->getText().c_str()), current_dir);
|
||||
|
||||
uci_set_defaults(&ci, false);
|
||||
strncpy(ci.devname, const_cast<char *>(txtDevice->getText().c_str()), MAX_DPATH);
|
||||
strncpy(ci.rootdir, const_cast<char *>(txtPath->getText().c_str()), MAX_DPATH);
|
||||
ci.type = UAEDEV_HDF;
|
||||
ci.controller_type = controller[cboController->getSelected()].type;
|
||||
ci.controller_type_unit = 0;
|
||||
ci.controller_unit = cboUnit->getSelected();
|
||||
ci.unit_feature_level = 1;
|
||||
ci.unit_special_flags = 0;
|
||||
ci.readonly = !chkReadWrite->isSelected();
|
||||
ci.sectors = atoi(txtSectors->getText().c_str());
|
||||
ci.surfaces = atoi(txtSurfaces->getText().c_str());
|
||||
ci.reserved = atoi(txtReserved->getText().c_str());
|
||||
ci.blocksize = atoi(txtBlocksize->getText().c_str());
|
||||
ci.bootpri = bp;
|
||||
ci.physical_geometry = hardfile_testrdb(ci.rootdir);
|
||||
|
||||
struct uaedev_config_info ci{};
|
||||
memcpy(&ci, ¤t_hfdlg.ci, sizeof(struct uaedev_config_info));
|
||||
uci = add_filesys_config(&changed_prefs, unit_no, &ci);
|
||||
if (uci)
|
||||
{
|
||||
if (uci) {
|
||||
auto* const hfd = get_hardfile_data(uci->configoffset);
|
||||
if (hfd)
|
||||
hardfile_media_change(hfd, &ci, true, false);
|
||||
|
|
|
|||
|
|
@ -59,10 +59,25 @@ public:
|
|||
{
|
||||
txtPath->setText(tmp);
|
||||
txtVolume->setText(volName);
|
||||
default_fsvdlg(¤t_fsvdlg);
|
||||
CreateDefaultDevicename(current_fsvdlg.ci.devname);
|
||||
_tcscpy(current_fsvdlg.ci.volname, current_fsvdlg.ci.devname);
|
||||
_tcscpy(current_fsvdlg.ci.rootdir, tmp);
|
||||
}
|
||||
wndEditFilesysVirtual->requestModalFocus();
|
||||
cmdPath->requestFocus();
|
||||
}
|
||||
else if (actionEvent.getSource() == chkAutoboot) {
|
||||
char tmp[32];
|
||||
if (chkAutoboot->isSelected()) {
|
||||
current_fsvdlg.ci.bootpri = 0;
|
||||
}
|
||||
else {
|
||||
current_fsvdlg.ci.bootpri = BOOTPRI_NOAUTOBOOT;
|
||||
}
|
||||
snprintf(tmp, sizeof(tmp) - 1, "%d", current_fsvdlg.ci.bootpri);
|
||||
txtBootPri->setText(tmp);
|
||||
}
|
||||
else
|
||||
{
|
||||
if (actionEvent.getSource() == cmdOK)
|
||||
|
|
@ -140,6 +155,7 @@ static void InitEditFilesysVirtual()
|
|||
|
||||
chkAutoboot = new gcn::CheckBox("Bootable", true);
|
||||
chkAutoboot->setId("virtAutoboot");
|
||||
chkAutoboot->addActionListener(filesysVirtualActionListener);
|
||||
|
||||
lblBootPri = new gcn::Label("Boot priority:");
|
||||
lblBootPri->setAlignment(gcn::Graphics::RIGHT);
|
||||
|
|
@ -444,31 +460,26 @@ bool EditFilesysVirtual(const int unit_no)
|
|||
if (unit_no >= 0)
|
||||
{
|
||||
uci = &changed_prefs.mountconfig[unit_no];
|
||||
const auto ci = &uci->ci;
|
||||
get_filesys_unitconfig(&changed_prefs, unit_no, &mi);
|
||||
|
||||
strdevname.assign(ci->devname);
|
||||
txtDevice->setText(strdevname);
|
||||
strvolname.assign(ci->volname);
|
||||
txtVolume->setText(strvolname);
|
||||
strroot.assign(ci->rootdir);
|
||||
txtPath->setText(strroot);
|
||||
chkReadWrite->setSelected(!ci->readonly);
|
||||
chkAutoboot->setSelected(ci->bootpri != BOOTPRI_NOAUTOBOOT);
|
||||
snprintf(tmp, 32, "%d", ci->bootpri >= -127 ? ci->bootpri : -127);
|
||||
txtBootPri->setText(tmp);
|
||||
memcpy(¤t_fsvdlg.ci, uci, sizeof(struct uaedev_config_info));
|
||||
}
|
||||
else
|
||||
{
|
||||
CreateDefaultDevicename(tmp);
|
||||
txtDevice->setText(tmp);
|
||||
txtVolume->setText(tmp);
|
||||
strroot.assign(current_dir);
|
||||
txtPath->setText(strroot);
|
||||
chkReadWrite->setSelected(true);
|
||||
txtBootPri->setText("0");
|
||||
default_fsvdlg(¤t_fsvdlg);
|
||||
CreateDefaultDevicename(current_fsvdlg.ci.devname);
|
||||
_tcscpy(current_fsvdlg.ci.volname, current_fsvdlg.ci.devname);
|
||||
}
|
||||
|
||||
strdevname.assign(current_fsvdlg.ci.devname);
|
||||
txtDevice->setText(strdevname);
|
||||
strvolname.assign(current_fsvdlg.ci.volname);
|
||||
txtVolume->setText(strvolname);
|
||||
strroot.assign(current_fsvdlg.ci.rootdir);
|
||||
txtPath->setText(strroot);
|
||||
chkReadWrite->setSelected(!current_fsvdlg.ci.readonly);
|
||||
chkAutoboot->setSelected(current_fsvdlg.ci.bootpri != BOOTPRI_NOAUTOBOOT);
|
||||
snprintf(tmp, sizeof(tmp) - 1, "%d", current_fsvdlg.ci.bootpri >= -127 ? current_fsvdlg.ci.bootpri : -127);
|
||||
txtBootPri->setText(tmp);
|
||||
|
||||
// Prepare the screen once
|
||||
uae_gui->logic();
|
||||
SDL_RenderClear(sdl_renderer);
|
||||
|
|
@ -485,17 +496,13 @@ bool EditFilesysVirtual(const int unit_no)
|
|||
if (dialogResult)
|
||||
{
|
||||
struct uaedev_config_info ci{};
|
||||
const auto bp = tweakbootpri(atoi(txtBootPri->getText().c_str()), chkAutoboot->isSelected() ? 1 : 0, 0);
|
||||
extract_path(const_cast<char *>(txtPath->getText().c_str()), current_dir);
|
||||
|
||||
uci_set_defaults(&ci, false);
|
||||
strncpy(ci.devname, const_cast<char *>(txtDevice->getText().c_str()), MAX_DPATH);
|
||||
strncpy(ci.volname, const_cast<char *>(txtVolume->getText().c_str()), MAX_DPATH);
|
||||
strncpy(ci.rootdir, const_cast<char *>(txtPath->getText().c_str()), MAX_DPATH);
|
||||
ci.type = UAEDEV_DIR;
|
||||
ci.readonly = !chkReadWrite->isSelected();
|
||||
ci.bootpri = bp;
|
||||
|
||||
strncpy(current_fsvdlg.ci.devname, (char*)txtDevice->getText().c_str(), MAX_DPATH - 1);
|
||||
strncpy(current_fsvdlg.ci.volname, (char*)txtVolume->getText().c_str(), MAX_DPATH - 1);
|
||||
current_fsvdlg.ci.readonly = !chkReadWrite->isSelected();
|
||||
current_fsvdlg.ci.bootpri = tweakbootpri(atoi(txtBootPri->getText().c_str()), chkAutoboot->isSelected() ? 1 : 0, 0);
|
||||
|
||||
memcpy(&ci, ¤t_fsvdlg.ci, sizeof(struct uaedev_config_info));
|
||||
uci = add_filesys_config(&changed_prefs, unit_no, &ci);
|
||||
if (uci)
|
||||
{
|
||||
|
|
@ -504,6 +511,8 @@ bool EditFilesysVirtual(const int unit_no)
|
|||
else if (uci->configoffset >= 0)
|
||||
filesys_eject(uci->configoffset);
|
||||
}
|
||||
|
||||
extract_path((char*)txtPath->getText().c_str(), current_dir);
|
||||
}
|
||||
|
||||
ExitEditFilesysVirtual();
|
||||
|
|
|
|||
|
|
@ -29,8 +29,9 @@ static NavigationMap navMap[] =
|
|||
{"RAM", "Chipmem", "Chipmem", "ROM", "Floppy drives"},
|
||||
{"Floppy drives", "cmdSel0", "DF0:", "RAM", "Hard drives/CD"},
|
||||
{"Hard drives/CD", "cmdCreateHDF", "cmdAddDir", "Floppy drives", "RTG board"},
|
||||
{"RTG board", "cboBoard", "cboBoard", "Hard drives/CD", "Display"},
|
||||
{"Display", "cboScreenmode", "cboScreenmode", "RTG board", "Sound"},
|
||||
{"RTG board", "cboBoard", "cboBoard", "Hard drives/CD", "Hardware info"},
|
||||
{"Hardware info", "", "", "RTG board", "Display"},
|
||||
{"Display", "cboScreenmode", "cboScreenmode", "Hardware info", "Sound"},
|
||||
{"Sound", "sndDisable", "sndDisable", "Display", "Input"},
|
||||
{"Input", "cboPort0mode", "cboPort0", "Sound", "Custom controls"},
|
||||
{"Custom controls", "Right Trigger", "0: Mouse", "Input", "Miscellaneous"},
|
||||
|
|
@ -115,8 +116,9 @@ static NavigationMap navMap[] =
|
|||
{"7 Mhz", "FPUnone", "CPU and FPU", "sldCpuIdle", "14 Mhz"},
|
||||
{"14 Mhz", "FPUnone", "CPU and FPU", "7 Mhz", "25 Mhz"},
|
||||
{"25 Mhz", "FPUnone", "CPU and FPU", "14 Mhz", "Fastest"},
|
||||
{"Fastest", "FPUnone", "CPU and FPU", "25 Mhz", "sldCpuIdle"},
|
||||
{"sldCpuIdle", "", "", "Fastest", "7 Mhz"},
|
||||
{"Fastest", "FPUnone", "CPU and FPU", "25 Mhz", "chkCPUCycleExact"},
|
||||
{"chkCPUCycleExact", "FPUnone", "CPU and FPU", "Fastest", "sldCpuIdle"},
|
||||
{"sldCpuIdle", "", "", "chkCPUCycleExact", "7 Mhz"},
|
||||
|
||||
// PanelChipset
|
||||
{ "optOCS", "Chipset", "optAGA", "CollFull", "optECSAgnus" },
|
||||
|
|
@ -159,27 +161,31 @@ static NavigationMap navMap[] =
|
|||
//PanelFloppy
|
||||
{"DF0:", "Floppy drives", "cboType0", "SaveForDisk", "cboDisk0"},
|
||||
{"cboType0", "DF0:", "chkWP0", "SaveForDisk", "cboDisk0"},
|
||||
{"chkWP0", "cboType0", "cmdEject0", "SaveForDisk", "cboDisk0" },
|
||||
{"chkWP0", "cboType0", "cmdInfo0", "SaveForDisk", "cboDisk0" },
|
||||
{"cmdInfo0", "chkWP0", "cmdEject0", "SaveForDisk", "cboDisk0"},
|
||||
{"cmdEject0", "chkWP0", "cmdSel0", "CreateHD", "cboDisk0"},
|
||||
{"cmdSel0", "cmdEject0", "Floppy drives", "CreateHD", "cboDisk0"},
|
||||
{"cboDisk0", "Floppy drives", "Floppy drives", "DF0:", "LoadDiskCfg"},
|
||||
{"LoadDiskCfg", "Floppy drives", "Floppy drives", "cboDisk0", "DF1:"},
|
||||
{"DF1:", "Floppy drives", "cboType1", "LoadDiskCfg", "cboDisk1"},
|
||||
{"cboType1", "DF1:", "chkWP1", "LoadDiskCfg", "cboDisk1"},
|
||||
{"chkWP1", "cboType1", "cmdEject1", "SaveForDisk", "cboDisk1" },
|
||||
{"cmdEject1", "chkWP1", "cmdSel1", "LoadDiskCfg", "cboDisk1"},
|
||||
{"chkWP1", "cboType1", "cmdInfo1", "LoadDiskCfg", "cboDisk1" },
|
||||
{"cmdInfo1", "chkWP1", "cmdEject1", "LoadDiskCfg", "cboDisk1" },
|
||||
{"cmdEject1", "cmdInfo1", "cmdSel1", "LoadDiskCfg", "cboDisk1"},
|
||||
{"cmdSel1", "cmdEject1", "Floppy drives", "LoadDiskCfg", "cboDisk1"},
|
||||
{"cboDisk1", "Floppy drives", "Floppy drives", "DF1:", "DF2:"},
|
||||
{"DF2:", "Floppy drives", "cboType2", "cboDisk1", "cboDisk2"},
|
||||
{"cboType2", "DF2:", "chkWP2", "cboDisk1", "cboDisk2"},
|
||||
{"chkWP2", "cboType2", "cmdEject2", "SaveForDisk", "cboDisk2" },
|
||||
{"cmdEject2", "chkWP2", "cmdSel2", "cboDisk1", "cboDisk2"},
|
||||
{"chkWP2", "cboType2", "cmdInfo2", "cboDisk1", "cboDisk2" },
|
||||
{"cmdInfo2", "chkWP2", "cmdEject2", "cboDisk1", "cboDisk2" },
|
||||
{"cmdEject2", "cmdInfo2", "cmdSel2", "cboDisk1", "cboDisk2"},
|
||||
{"cmdSel2", "cmdEject2", "Floppy drives", "cboDisk1", "cboDisk2"},
|
||||
{"cboDisk2", "Floppy drives", "Floppy drives", "DF2:", "DF3:"},
|
||||
{"DF3:", "Floppy drives", "cboType3", "cboDisk2", "cboDisk3"},
|
||||
{"cboType3", "DF3:", "chkWP3", "cboDisk2", "cboDisk3"},
|
||||
{"chkWP3", "cboType3", "cmdEject3", "SaveForDisk", "cboDisk3" },
|
||||
{"cmdEject3", "chkWP3", "cmdSel3", "cboDisk2", "cboDisk3"},
|
||||
{"chkWP3", "cboType3", "cmdInfo3", "cboDisk2", "cboDisk3" },
|
||||
{"cmdInfo3", "chkWP3", "cmdEject3", "cboDisk2", "cboDisk3" },
|
||||
{"cmdEject3", "cmdInfo3", "cmdSel3", "cboDisk2", "cboDisk3"},
|
||||
{"cmdSel3", "cmdEject3", "Floppy drives", "cboDisk2", "cboDisk3"},
|
||||
{"cboDisk3", "Floppy drives", "Floppy drives", "DF3:", "DriveSpeed"},
|
||||
{"DriveSpeed", "", "", "cboDisk3", "CreateDD"},
|
||||
|
|
|
|||
|
|
@ -33,6 +33,7 @@ static gcn::RadioButton* opt25Mhz;
|
|||
static gcn::RadioButton* optFastest;
|
||||
static gcn::Label* lblCpuIdle;
|
||||
static gcn::Slider* sldCpuIdle;
|
||||
static gcn::CheckBox* chkCPUCycleExact;
|
||||
|
||||
class CPUButtonActionListener : public gcn::ActionListener
|
||||
{
|
||||
|
|
@ -64,6 +65,10 @@ public:
|
|||
changed_prefs.cpu_model = 68020;
|
||||
if (changed_prefs.fpu_model == 68040)
|
||||
changed_prefs.fpu_model = 68881;
|
||||
|
||||
changed_prefs.cpu_cycle_exact = false;
|
||||
changed_prefs.blitter_cycle_exact = false;
|
||||
changed_prefs.cpu_memory_cycle_exact = false;
|
||||
}
|
||||
else if (actionEvent.getSource() == optCPU68030)
|
||||
{
|
||||
|
|
@ -71,15 +76,22 @@ public:
|
|||
if (changed_prefs.fpu_model == 68040)
|
||||
changed_prefs.fpu_model = 68881;
|
||||
changed_prefs.address_space_24 = false;
|
||||
changed_prefs.cpu_cycle_exact = false;
|
||||
changed_prefs.blitter_cycle_exact = false;
|
||||
changed_prefs.cpu_memory_cycle_exact = false;
|
||||
}
|
||||
else if (actionEvent.getSource() == optCPU68040)
|
||||
{
|
||||
changed_prefs.cpu_model = 68040;
|
||||
changed_prefs.fpu_model = 68040;
|
||||
changed_prefs.address_space_24 = false;
|
||||
changed_prefs.cpu_cycle_exact = false;
|
||||
changed_prefs.blitter_cycle_exact = false;
|
||||
changed_prefs.cpu_memory_cycle_exact = false;
|
||||
}
|
||||
RefreshPanelCPU();
|
||||
RefreshPanelRAM();
|
||||
RefreshPanelChipset();
|
||||
}
|
||||
};
|
||||
|
||||
|
|
@ -127,6 +139,20 @@ public:
|
|||
changed_prefs.m68k_speed = M68K_SPEED_25MHZ_CYCLES;
|
||||
else if (actionEvent.getSource() == optFastest)
|
||||
changed_prefs.m68k_speed = -1;
|
||||
else if (actionEvent.getSource() == chkCPUCycleExact) {
|
||||
if (chkCPUCycleExact->isSelected()) {
|
||||
changed_prefs.cpu_cycle_exact = true;
|
||||
changed_prefs.blitter_cycle_exact = true;
|
||||
changed_prefs.cpu_memory_cycle_exact = true;
|
||||
changed_prefs.cachesize = 0;
|
||||
}
|
||||
else {
|
||||
changed_prefs.cpu_cycle_exact = false;
|
||||
changed_prefs.blitter_cycle_exact = false;
|
||||
changed_prefs.cpu_memory_cycle_exact = false;
|
||||
}
|
||||
RefreshPanelChipset();
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
|
|
@ -322,7 +348,7 @@ void InitPanelCPU(const struct _ConfigCategory& category)
|
|||
grpFPU->add(chkFPUstrict, 10, 140);
|
||||
grpFPU->add(chkFPUJIT, 10, 170);
|
||||
grpFPU->setMovable(false);
|
||||
grpFPU->setSize(175, 225);
|
||||
grpFPU->setSize(175, 285);
|
||||
grpFPU->setTitleBarHeight(TITLEBAR_HEIGHT);
|
||||
grpFPU->setBaseColor(gui_baseCol);
|
||||
|
||||
|
|
@ -346,6 +372,10 @@ void InitPanelCPU(const struct _ConfigCategory& category)
|
|||
optFastest->setId("Fastest");
|
||||
optFastest->addActionListener(cpuSpeedButtonActionListener);
|
||||
|
||||
chkCPUCycleExact = new gcn::CheckBox("Cycle exact", true);
|
||||
chkCPUCycleExact->setId("chkCPUCycleExact");
|
||||
chkCPUCycleExact->addActionListener(cpuSpeedButtonActionListener);
|
||||
|
||||
lblCpuIdle = new gcn::Label("CPU Idle");
|
||||
sldCpuIdle = new gcn::Slider(0, 10);
|
||||
sldCpuIdle->setSize(70, SLIDER_HEIGHT);
|
||||
|
|
@ -361,10 +391,11 @@ void InitPanelCPU(const struct _ConfigCategory& category)
|
|||
grpCPUSpeed->add(opt14Mhz, 10, 40);
|
||||
grpCPUSpeed->add(opt25Mhz, 10, 70);
|
||||
grpCPUSpeed->add(optFastest, 10, 100);
|
||||
grpCPUSpeed->add(lblCpuIdle, 10, 160);
|
||||
grpCPUSpeed->add(sldCpuIdle, lblCpuIdle->getWidth() + 20, 160);
|
||||
grpCPUSpeed->add(chkCPUCycleExact, 10, 160);
|
||||
grpCPUSpeed->add(lblCpuIdle, 10, 190);
|
||||
grpCPUSpeed->add(sldCpuIdle, lblCpuIdle->getWidth() + 20, 190);
|
||||
grpCPUSpeed->setMovable(false);
|
||||
grpCPUSpeed->setSize(175, 225);
|
||||
grpCPUSpeed->setSize(175, 285);
|
||||
grpCPUSpeed->setTitleBarHeight(TITLEBAR_HEIGHT);
|
||||
grpCPUSpeed->setBaseColor(gui_baseCol);
|
||||
|
||||
|
|
@ -406,6 +437,7 @@ void ExitPanelCPU()
|
|||
delete optFastest;
|
||||
delete lblCpuIdle;
|
||||
delete sldCpuIdle;
|
||||
delete chkCPUCycleExact;
|
||||
delete cpuIdleActionListener;
|
||||
|
||||
delete grpCPUSpeed;
|
||||
|
|
@ -428,8 +460,13 @@ void RefreshPanelCPU()
|
|||
|
||||
chk24Bit->setSelected(changed_prefs.address_space_24);
|
||||
chk24Bit->setEnabled(changed_prefs.cpu_model == 68020 && changed_prefs.cachesize == 0);
|
||||
|
||||
chkCPUCompatible->setSelected(changed_prefs.cpu_compatible > 0);
|
||||
chkCPUCompatible->setEnabled(changed_prefs.cachesize == 0);
|
||||
|
||||
chkCPUCycleExact->setSelected(changed_prefs.cpu_cycle_exact > 0);
|
||||
chkCPUCycleExact->setEnabled(changed_prefs.cpu_model <= 68010);
|
||||
|
||||
chkJIT->setEnabled(changed_prefs.cpu_model >= 68020);
|
||||
chkJIT->setSelected(changed_prefs.cachesize > 0);
|
||||
|
||||
|
|
@ -492,6 +529,7 @@ bool HelpPanelCPU(std::vector<std::string>& helptext)
|
|||
helptext.emplace_back("Use 7MHz for A500 or 14MHz for A1200 speed. Fastest Possible will give only the minimum time");
|
||||
helptext.emplace_back("to the Chipset, using as much as possible for the CPU, which might result in dropping");
|
||||
helptext.emplace_back("frames also.");
|
||||
helptext.emplace_back("\"Cycle exact\" emulates 68000 and chipset cycle accurate. This is very slow and only required in few situations.");
|
||||
helptext.emplace_back(" ");
|
||||
helptext.emplace_back("You can use the CPU Idle slider to set how much the CPU emulation should sleep when idle.");
|
||||
helptext.emplace_back("This is useful to keep the system temperature down.");
|
||||
|
|
|
|||
|
|
@ -185,7 +185,7 @@ public:
|
|||
changed_prefs.cachesize = 0;
|
||||
}
|
||||
}
|
||||
|
||||
RefreshPanelCPU();
|
||||
RefreshPanelQuickstart();
|
||||
}
|
||||
};
|
||||
|
|
@ -460,6 +460,8 @@ void RefreshPanelChipset()
|
|||
chkNTSC->setSelected(changed_prefs.ntscmode);
|
||||
chkCycleExact->setSelected(changed_prefs.cpu_cycle_exact);
|
||||
chkMemoryCycleExact->setSelected(changed_prefs.cpu_memory_cycle_exact);
|
||||
chkCycleExact->setEnabled(changed_prefs.cpu_model <= 68010);
|
||||
chkMemoryCycleExact->setEnabled(changed_prefs.cpu_model <= 68010);
|
||||
|
||||
if (changed_prefs.immediate_blits)
|
||||
optBlitImmed->setSelected(true);
|
||||
|
|
|
|||
|
|
@ -85,6 +85,64 @@ public:
|
|||
|
||||
static DiskfileListModel diskfileList;
|
||||
|
||||
static void DisplayDiskInfo(int num)
|
||||
{
|
||||
struct diskinfo di{};
|
||||
char tmp1[MAX_DPATH];
|
||||
std::vector<std::string> infotext;
|
||||
char title[MAX_DPATH];
|
||||
char nameonly[MAX_DPATH];
|
||||
char linebuffer[512];
|
||||
|
||||
DISK_examine_image(&changed_prefs, num, &di, true);
|
||||
DISK_validate_filename(&changed_prefs, changed_prefs.floppyslots[num].df, tmp1, 0, NULL, NULL, NULL);
|
||||
extract_filename(tmp1, nameonly);
|
||||
snprintf(title, MAX_DPATH - 1, "Info for %s", nameonly);
|
||||
|
||||
snprintf(linebuffer, sizeof(linebuffer) - 1, "Disk readable: %s", di.unreadable ? _T("No") : _T("Yes"));
|
||||
infotext.push_back(linebuffer);
|
||||
snprintf(linebuffer, sizeof(linebuffer) - 1, "Disk CRC32: %08X", di.imagecrc32);
|
||||
infotext.push_back(linebuffer);
|
||||
snprintf(linebuffer, sizeof(linebuffer) - 1, "Boot block CRC32: %08X", di.bootblockcrc32);
|
||||
infotext.push_back(linebuffer);
|
||||
snprintf(linebuffer, sizeof(linebuffer) - 1, "Boot block checksum valid: %s", di.bb_crc_valid ? _T("Yes") : _T("No"));
|
||||
infotext.push_back(linebuffer);
|
||||
snprintf(linebuffer, sizeof(linebuffer) - 1, "Boot block type: %s", di.bootblocktype == 0 ? _T("Custom") : (di.bootblocktype == 1 ? _T("Standard 1.x") : _T("Standard 2.x+")));
|
||||
infotext.push_back(linebuffer);
|
||||
if (di.diskname[0]) {
|
||||
snprintf(linebuffer, sizeof(linebuffer) - 1, "Label: '%s'", di.diskname);
|
||||
infotext.push_back(linebuffer);
|
||||
}
|
||||
infotext.push_back("");
|
||||
|
||||
if (di.bootblockinfo[0]) {
|
||||
infotext.push_back("Amiga Bootblock Reader database detected:");
|
||||
snprintf(linebuffer, sizeof(linebuffer) - 1, "Name: '%s'", di.bootblockinfo);
|
||||
infotext.push_back(linebuffer);
|
||||
if (di.bootblockclass[0]) {
|
||||
snprintf(linebuffer, sizeof(linebuffer) - 1, "Class: '%s'", di.bootblockclass);
|
||||
infotext.push_back(linebuffer);
|
||||
}
|
||||
infotext.push_back("");
|
||||
}
|
||||
|
||||
int w = 16;
|
||||
for (int i = 0; i < 1024; i += w) {
|
||||
for (int j = 0; j < w; j++) {
|
||||
uae_u8 b = di.bootblock[i + j];
|
||||
sprintf(linebuffer + j * 3, _T("%02X "), b);
|
||||
if (b >= 32 && b < 127)
|
||||
linebuffer[w * 3 + 1 + j] = (char)b;
|
||||
else
|
||||
linebuffer[w * 3 + 1 + j] = '.';
|
||||
}
|
||||
linebuffer[w * 3] = ' ';
|
||||
linebuffer[w * 3 + 1 + w] = 0;
|
||||
infotext.push_back(linebuffer);
|
||||
}
|
||||
|
||||
ShowDiskInfo(title, infotext);
|
||||
}
|
||||
|
||||
class DriveTypeActionListener : public gcn::ActionListener
|
||||
{
|
||||
|
|
@ -167,8 +225,8 @@ public:
|
|||
//---------------------------------------
|
||||
// Show info about current disk-image
|
||||
//---------------------------------------
|
||||
//if (changed_prefs.floppyslots[i].dfxtype != DRV_NONE && strlen(changed_prefs.floppyslots[i].df) > 0)
|
||||
//ToDo: Show info dialog
|
||||
if (changed_prefs.floppyslots[i].dfxtype != DRV_NONE && strlen(changed_prefs.floppyslots[i].df) > 0)
|
||||
DisplayDiskInfo(i);
|
||||
}
|
||||
else if (actionEvent.getSource() == cmdDFxEject[i])
|
||||
{
|
||||
|
|
@ -402,6 +460,8 @@ void InitPanelFloppy(const struct _ConfigCategory& category)
|
|||
cmdDFxInfo[i] = new gcn::Button("?");
|
||||
cmdDFxInfo[i]->setSize(SMALL_BUTTON_WIDTH, SMALL_BUTTON_HEIGHT);
|
||||
cmdDFxInfo[i]->setBaseColor(gui_baseCol);
|
||||
snprintf(tmp, 20, "cmdInfo%d", i);
|
||||
cmdDFxInfo[i]->setId(tmp);
|
||||
cmdDFxInfo[i]->addActionListener(dfxButtonActionListener);
|
||||
|
||||
cmdDFxEject[i] = new gcn::Button("Eject");
|
||||
|
|
@ -470,9 +530,9 @@ void InitPanelFloppy(const struct _ConfigCategory& category)
|
|||
category.panel->add(cboDFxType[i], posX, posY);
|
||||
posX += cboDFxType[i]->getWidth() + DISTANCE_NEXT_X * 2;
|
||||
category.panel->add(chkDFxWriteProtect[i], posX, posY);
|
||||
posX += 3 + chkDFxWriteProtect[i]->getWidth() + 7 * DISTANCE_NEXT_X;
|
||||
//category.panel->add(cmdDFxInfo[i], posX, posY); //TODO disabled?
|
||||
//posX += cmdDFxInfo[i]->getWidth() + DISTANCE_NEXT_X;
|
||||
posX += 3 + chkDFxWriteProtect[i]->getWidth() + 4 * DISTANCE_NEXT_X;
|
||||
category.panel->add(cmdDFxInfo[i], posX, posY);
|
||||
posX += cmdDFxInfo[i]->getWidth() + DISTANCE_NEXT_X;
|
||||
category.panel->add(cmdDFxEject[i], posX, posY);
|
||||
posX += cmdDFxEject[i]->getWidth() + DISTANCE_NEXT_X;
|
||||
category.panel->add(cmdDFxSelect[i], posX, posY);
|
||||
|
|
@ -611,6 +671,7 @@ bool HelpPanelFloppy(std::vector<std::string>& helptext)
|
|||
helptext.emplace_back("on the host filesystem.");
|
||||
helptext.emplace_back("The button \"...\" opens a dialog to select the required disk file.");
|
||||
helptext.emplace_back("With the dropdown control, you can select one of the disks you recently used.");
|
||||
helptext.emplace_back("Details of the current floppy can be displayed with \"?\".");
|
||||
helptext.emplace_back(" ");
|
||||
helptext.emplace_back("You can reduce the loading time for lot of games by increasing the floppy drive");
|
||||
helptext.emplace_back("emulation speed. A few games will not load with higher drive speed and you have");
|
||||
|
|
|
|||
185
src/osdep/gui/PanelHWInfo.cpp
Normal file
185
src/osdep/gui/PanelHWInfo.cpp
Normal file
|
|
@ -0,0 +1,185 @@
|
|||
#include <guisan.hpp>
|
||||
#include <SDL_ttf.h>
|
||||
#include <guisan/sdl.hpp>
|
||||
#include <guisan/sdl/sdltruetypefont.hpp>
|
||||
#include "SelectorEntry.hpp"
|
||||
|
||||
#include "sysconfig.h"
|
||||
#include "sysdeps.h"
|
||||
#include "config.h"
|
||||
#include "options.h"
|
||||
#include "include/memory.h"
|
||||
#include "uae.h"
|
||||
#include "autoconf.h"
|
||||
#include "filesys.h"
|
||||
#include "blkdev.h"
|
||||
#include "gui_handling.h"
|
||||
|
||||
#define MAX_INFOS 10
|
||||
|
||||
enum { COL_TYPE, COL_NAME, COL_START, COL_SIZE, COL_ID, COL_COUNT };
|
||||
|
||||
static const char* column_caption[] =
|
||||
{
|
||||
"Type",
|
||||
"Name",
|
||||
"Start",
|
||||
"Size",
|
||||
"ID"
|
||||
};
|
||||
static const int COLUMN_SIZE[] =
|
||||
{
|
||||
40, // Type
|
||||
292, // Name
|
||||
80, // Start
|
||||
80, // Size
|
||||
90 // ID
|
||||
};
|
||||
|
||||
static gcn::Label* lblList[COL_COUNT];
|
||||
static gcn::Container* listEntry[MAX_INFOS];
|
||||
static gcn::TextField* listCells[MAX_INFOS][COL_COUNT];
|
||||
|
||||
void RefreshPanelHWInfo(void)
|
||||
{
|
||||
int row, col;
|
||||
uaecptr highest_expamem = 0;
|
||||
|
||||
expansion_generate_autoconfig_info(&changed_prefs);
|
||||
|
||||
row = 0;
|
||||
for (;;)
|
||||
{
|
||||
TCHAR tmp[200];
|
||||
struct autoconfig_info* aci = expansion_get_autoconfig_data(&changed_prefs, row);
|
||||
if (aci)
|
||||
{
|
||||
if (aci->zorro == 3 && aci->size != 0 && aci->start + aci->size > highest_expamem)
|
||||
highest_expamem = aci->start + aci->size;
|
||||
}
|
||||
if (!aci && highest_expamem <= Z3BASE_UAE)
|
||||
break;
|
||||
|
||||
if (aci && aci->zorro >= 1 && aci->zorro <= 3)
|
||||
_stprintf(tmp, _T("Z%d"), aci->zorro);
|
||||
else
|
||||
_tcscpy(tmp, _T("-"));
|
||||
listCells[row][COL_TYPE]->setText(tmp);
|
||||
|
||||
tmp[0] = 0;
|
||||
if (aci)
|
||||
_tcscat(tmp, aci->name);
|
||||
listCells[row][COL_NAME]->setText(tmp);
|
||||
|
||||
if (aci)
|
||||
{
|
||||
if (aci->start != 0xffffffff)
|
||||
_stprintf(tmp, _T("0x%08x"), aci->start);
|
||||
else
|
||||
_tcscpy(tmp, _T("-"));
|
||||
listCells[row][COL_START]->setText(tmp);
|
||||
if (aci->size != 0)
|
||||
_stprintf(tmp, _T("0x%08x"), aci->size);
|
||||
else
|
||||
_tcscpy(tmp, _T("-"));
|
||||
listCells[row][COL_SIZE]->setText(tmp);
|
||||
if (aci->autoconfig_bytes[0] != 0xff)
|
||||
_stprintf(tmp, _T("0x%04x/0x%02x"),
|
||||
(aci->autoconfig_bytes[4] << 8) | aci->autoconfig_bytes[5], aci->autoconfig_bytes[1]);
|
||||
else
|
||||
_tcscpy(tmp, _T("-"));
|
||||
listCells[row][COL_ID]->setText(tmp);
|
||||
}
|
||||
else
|
||||
{
|
||||
_stprintf(tmp, _T("0x%08x"), highest_expamem);
|
||||
listCells[row][COL_START]->setText(tmp);
|
||||
listCells[row][COL_SIZE]->setText("");
|
||||
listCells[row][COL_ID]->setText("");
|
||||
}
|
||||
row++;
|
||||
if (!aci)
|
||||
break;
|
||||
}
|
||||
|
||||
for (; row < MAX_INFOS; ++row)
|
||||
{
|
||||
for (col = 0; col < COL_COUNT; ++col)
|
||||
listCells[row][col]->setText("");
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void InitPanelHWInfo(const struct _ConfigCategory& category)
|
||||
{
|
||||
int row, col;
|
||||
int posX;
|
||||
int posY = DISTANCE_BORDER;
|
||||
|
||||
for (col = 0; col < COL_COUNT; ++col)
|
||||
lblList[col] = new gcn::Label(column_caption[col]);
|
||||
|
||||
for (row = 0; row < MAX_INFOS; ++row)
|
||||
{
|
||||
listEntry[row] = new gcn::Container();
|
||||
listEntry[row]->setSize(category.panel->getWidth() - 2 * DISTANCE_BORDER, TEXTFIELD_HEIGHT + 4);
|
||||
listEntry[row]->setBaseColor(gui_baseCol);
|
||||
listEntry[row]->setBorderSize(0);
|
||||
|
||||
for (col = 0; col < COL_COUNT; ++col)
|
||||
{
|
||||
listCells[row][col] = new gcn::TextField();
|
||||
listCells[row][col]->setSize(COLUMN_SIZE[col] - 8, TEXTFIELD_HEIGHT);
|
||||
listCells[row][col]->setEnabled(false);
|
||||
listCells[row][col]->setBackgroundColor(colTextboxBackground);
|
||||
//if (col == COL_START || col == COL_SIZE || col == COL_ID)
|
||||
// listCells[row][col]->setFont(gui_fixedfontsmall);
|
||||
}
|
||||
}
|
||||
|
||||
posX = DISTANCE_BORDER;
|
||||
for (col = 0; col < COL_COUNT; ++col)
|
||||
{
|
||||
category.panel->add(lblList[col], posX, posY);
|
||||
posX += COLUMN_SIZE[col];
|
||||
}
|
||||
posY += lblList[0]->getHeight() + 2;
|
||||
|
||||
for (row = 0; row < MAX_INFOS; ++row)
|
||||
{
|
||||
posX = 0;
|
||||
for (col = 0; col < COL_COUNT; ++col)
|
||||
{
|
||||
listEntry[row]->add(listCells[row][col], posX, 2);
|
||||
posX += COLUMN_SIZE[col];
|
||||
}
|
||||
category.panel->add(listEntry[row], DISTANCE_BORDER, posY);
|
||||
posY += listEntry[row]->getHeight() + 4;
|
||||
}
|
||||
|
||||
RefreshPanelHWInfo();
|
||||
}
|
||||
|
||||
|
||||
void ExitPanelHWInfo()
|
||||
{
|
||||
int col;
|
||||
|
||||
for (col = 0; col < COL_COUNT; ++col)
|
||||
delete lblList[col];
|
||||
|
||||
for (auto row = 0; row < MAX_INFOS; ++row)
|
||||
{
|
||||
for (col = 0; col < COL_COUNT; ++col)
|
||||
delete listCells[row][col];
|
||||
delete listEntry[row];
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
bool HelpPanelHWInfo(std::vector<std::string>& helptext)
|
||||
{
|
||||
helptext.clear();
|
||||
helptext.push_back("This panel shows the information about the configured hardware.");
|
||||
return true;
|
||||
}
|
||||
269
src/osdep/gui/ShowDiskInfo.cpp
Normal file
269
src/osdep/gui/ShowDiskInfo.cpp
Normal file
|
|
@ -0,0 +1,269 @@
|
|||
#include <algorithm>
|
||||
#include <guisan.hpp>
|
||||
#include <SDL_ttf.h>
|
||||
#include <guisan/sdl.hpp>
|
||||
#include <guisan/sdl/sdltruetypefont.hpp>
|
||||
#include <iostream>
|
||||
#include <sstream>
|
||||
|
||||
#include "SelectorEntry.hpp"
|
||||
|
||||
#include "sysconfig.h"
|
||||
#include "sysdeps.h"
|
||||
#include "config.h"
|
||||
#include "gui_handling.h"
|
||||
#include "amiberry_input.h"
|
||||
|
||||
#define DIALOG_WIDTH 600
|
||||
#define DIALOG_HEIGHT 460
|
||||
|
||||
static bool dialog_finished = false;
|
||||
|
||||
static gcn::Window* wndShowDiskInfo;
|
||||
static gcn::Button* cmdOK;
|
||||
static gcn::ListBox* lstInfo;
|
||||
static gcn::ScrollArea* scrAreaInfo;
|
||||
|
||||
class InfoListModel : public gcn::ListModel
|
||||
{
|
||||
std::vector<std::string> lines;
|
||||
|
||||
public:
|
||||
InfoListModel(const std::vector<std::string>& helptext)
|
||||
{
|
||||
lines = helptext;
|
||||
}
|
||||
|
||||
int getNumberOfElements() override
|
||||
{
|
||||
return lines.size();
|
||||
}
|
||||
|
||||
std::string getElementAt(const int i) override
|
||||
{
|
||||
if (i >= 0 && i < lines.size())
|
||||
return lines[i];
|
||||
return "";
|
||||
}
|
||||
};
|
||||
|
||||
static InfoListModel* infoList;
|
||||
|
||||
class ShowDiskInfoActionListener : public gcn::ActionListener
|
||||
{
|
||||
public:
|
||||
void action(const gcn::ActionEvent& actionEvent) override
|
||||
{
|
||||
dialog_finished = true;
|
||||
}
|
||||
};
|
||||
|
||||
static ShowDiskInfoActionListener* showDiskInfoActionListener;
|
||||
|
||||
|
||||
static void InitShowDiskInfo(const std::vector<std::string>& infotext)
|
||||
{
|
||||
wndShowDiskInfo = new gcn::Window("DiskInfo");
|
||||
wndShowDiskInfo->setSize(DIALOG_WIDTH, DIALOG_HEIGHT);
|
||||
wndShowDiskInfo->setPosition((GUI_WIDTH - DIALOG_WIDTH) / 2, (GUI_HEIGHT - DIALOG_HEIGHT) / 2);
|
||||
wndShowDiskInfo->setBaseColor(gui_baseCol);
|
||||
wndShowDiskInfo->setTitleBarHeight(TITLEBAR_HEIGHT);
|
||||
|
||||
showDiskInfoActionListener = new ShowDiskInfoActionListener();
|
||||
|
||||
infoList = new InfoListModel(infotext);
|
||||
|
||||
lstInfo = new gcn::ListBox(infoList);
|
||||
lstInfo->setSize(DIALOG_WIDTH - 2 * DISTANCE_BORDER - 4 - 20,
|
||||
DIALOG_HEIGHT - 3 * DISTANCE_BORDER - BUTTON_HEIGHT - DISTANCE_NEXT_Y - 10);
|
||||
lstInfo->setPosition(DISTANCE_BORDER, DISTANCE_BORDER);
|
||||
lstInfo->setBaseColor(gui_baseCol);
|
||||
lstInfo->setBackgroundColor(gui_baseCol);
|
||||
lstInfo->setWrappingEnabled(true);
|
||||
|
||||
scrAreaInfo = new gcn::ScrollArea(lstInfo);
|
||||
scrAreaInfo->setBorderSize(1);
|
||||
scrAreaInfo->setPosition(DISTANCE_BORDER, 10 + TEXTFIELD_HEIGHT + 10);
|
||||
scrAreaInfo->setSize(DIALOG_WIDTH - 2 * DISTANCE_BORDER - 4,
|
||||
DIALOG_HEIGHT - 3 * DISTANCE_BORDER - BUTTON_HEIGHT - DISTANCE_NEXT_Y - 10);
|
||||
scrAreaInfo->setScrollbarWidth(20);
|
||||
scrAreaInfo->setBaseColor(gui_baseCol);
|
||||
scrAreaInfo->setBackgroundColor(gui_baseCol);
|
||||
|
||||
cmdOK = new gcn::Button("Ok");
|
||||
cmdOK->setSize(BUTTON_WIDTH, BUTTON_HEIGHT);
|
||||
cmdOK->setPosition(DIALOG_WIDTH - DISTANCE_BORDER - BUTTON_WIDTH,
|
||||
DIALOG_HEIGHT - 2 * DISTANCE_BORDER - BUTTON_HEIGHT - 10);
|
||||
cmdOK->setBaseColor(gui_baseCol);
|
||||
cmdOK->addActionListener(showDiskInfoActionListener);
|
||||
|
||||
wndShowDiskInfo->add(scrAreaInfo, DISTANCE_BORDER, DISTANCE_BORDER);
|
||||
wndShowDiskInfo->add(cmdOK);
|
||||
|
||||
gui_top->add(wndShowDiskInfo);
|
||||
|
||||
cmdOK->requestFocus();
|
||||
wndShowDiskInfo->requestModalFocus();
|
||||
}
|
||||
|
||||
|
||||
static void ExitShowDiskInfo(void)
|
||||
{
|
||||
wndShowDiskInfo->releaseModalFocus();
|
||||
gui_top->remove(wndShowDiskInfo);
|
||||
|
||||
delete lstInfo;
|
||||
delete scrAreaInfo;
|
||||
delete cmdOK;
|
||||
|
||||
delete infoList;
|
||||
delete showDiskInfoActionListener;
|
||||
|
||||
delete wndShowDiskInfo;
|
||||
}
|
||||
|
||||
|
||||
static void ShowDiskInfoLoop(void)
|
||||
{
|
||||
auto got_event = 0;
|
||||
SDL_Event event;
|
||||
SDL_Event touch_event;
|
||||
struct didata* did = &di_joystick[0];
|
||||
|
||||
while (SDL_PollEvent(&event))
|
||||
{
|
||||
switch (event.type)
|
||||
{
|
||||
case SDL_KEYDOWN:
|
||||
got_event = 1;
|
||||
switch (event.key.keysym.sym)
|
||||
{
|
||||
case VK_ESCAPE:
|
||||
dialog_finished = true;
|
||||
break;
|
||||
|
||||
case VK_Blue:
|
||||
case VK_Green:
|
||||
case SDLK_RETURN:
|
||||
event.key.keysym.sym = SDLK_RETURN;
|
||||
gui_input->pushInput(event); // Fire key down
|
||||
event.type = SDL_KEYUP; // and the key up
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
case SDL_JOYBUTTONDOWN:
|
||||
if (gui_joystick)
|
||||
{
|
||||
got_event = 1;
|
||||
if (SDL_JoystickGetButton(gui_joystick, did->mapping.button[SDL_CONTROLLER_BUTTON_A]) ||
|
||||
SDL_JoystickGetButton(gui_joystick, did->mapping.button[SDL_CONTROLLER_BUTTON_B]))
|
||||
{
|
||||
PushFakeKey(SDLK_RETURN);
|
||||
break;
|
||||
}
|
||||
if (SDL_JoystickGetButton(gui_joystick, did->mapping.button[SDL_CONTROLLER_BUTTON_X]) ||
|
||||
SDL_JoystickGetButton(gui_joystick, did->mapping.button[SDL_CONTROLLER_BUTTON_Y]) ||
|
||||
SDL_JoystickGetButton(gui_joystick, did->mapping.button[SDL_CONTROLLER_BUTTON_START]))
|
||||
{
|
||||
dialog_finished = true;
|
||||
break;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case SDL_FINGERDOWN:
|
||||
got_event = 1;
|
||||
memcpy(&touch_event, &event, sizeof event);
|
||||
touch_event.type = SDL_MOUSEBUTTONDOWN;
|
||||
touch_event.button.which = 0;
|
||||
touch_event.button.button = SDL_BUTTON_LEFT;
|
||||
touch_event.button.state = SDL_PRESSED;
|
||||
touch_event.button.x = gui_graphics->getTarget()->w * event.tfinger.x;
|
||||
touch_event.button.y = gui_graphics->getTarget()->h * event.tfinger.y;
|
||||
gui_input->pushInput(touch_event);
|
||||
break;
|
||||
|
||||
case SDL_FINGERUP:
|
||||
got_event = 1;
|
||||
memcpy(&touch_event, &event, sizeof event);
|
||||
touch_event.type = SDL_MOUSEBUTTONUP;
|
||||
touch_event.button.which = 0;
|
||||
touch_event.button.button = SDL_BUTTON_LEFT;
|
||||
touch_event.button.state = SDL_RELEASED;
|
||||
touch_event.button.x = gui_graphics->getTarget()->w * event.tfinger.x;
|
||||
touch_event.button.y = gui_graphics->getTarget()->h * event.tfinger.y;
|
||||
gui_input->pushInput(touch_event);
|
||||
break;
|
||||
|
||||
case SDL_FINGERMOTION:
|
||||
got_event = 1;
|
||||
memcpy(&touch_event, &event, sizeof event);
|
||||
touch_event.type = SDL_MOUSEMOTION;
|
||||
touch_event.motion.which = 0;
|
||||
touch_event.motion.state = 0;
|
||||
touch_event.motion.x = gui_graphics->getTarget()->w * event.tfinger.x;
|
||||
touch_event.motion.y = gui_graphics->getTarget()->h * event.tfinger.y;
|
||||
gui_input->pushInput(touch_event);
|
||||
break;
|
||||
|
||||
case SDL_KEYUP:
|
||||
case SDL_JOYBUTTONUP:
|
||||
case SDL_MOUSEBUTTONDOWN:
|
||||
case SDL_MOUSEBUTTONUP:
|
||||
case SDL_MOUSEMOTION:
|
||||
case SDL_MOUSEWHEEL:
|
||||
got_event = 1;
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
//-------------------------------------------------
|
||||
// Send event to guisan-controls
|
||||
//-------------------------------------------------
|
||||
#ifdef ANDROID
|
||||
androidsdl_event(event, gui_input);
|
||||
#else
|
||||
gui_input->pushInput(event);
|
||||
#endif
|
||||
}
|
||||
|
||||
if (got_event)
|
||||
{
|
||||
// Now we let the Gui object perform its logic.
|
||||
uae_gui->logic();
|
||||
SDL_RenderClear(sdl_renderer);
|
||||
// Now we let the Gui object draw itself.
|
||||
uae_gui->draw();
|
||||
// Finally we update the screen.
|
||||
update_gui_screen();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void ShowDiskInfo(const char* title, const std::vector<std::string>& text)
|
||||
{
|
||||
dialog_finished = false;
|
||||
|
||||
InitShowDiskInfo(text);
|
||||
|
||||
wndShowDiskInfo->setCaption(title);
|
||||
cmdOK->setCaption("Ok");
|
||||
|
||||
// Prepare the screen once
|
||||
uae_gui->logic();
|
||||
SDL_RenderClear(sdl_renderer);
|
||||
uae_gui->draw();
|
||||
update_gui_screen();
|
||||
|
||||
while (!dialog_finished)
|
||||
{
|
||||
const auto start = SDL_GetPerformanceCounter();
|
||||
ShowDiskInfoLoop();
|
||||
cap_fps(start);
|
||||
}
|
||||
|
||||
ExitShowDiskInfo();
|
||||
}
|
||||
|
|
@ -20,7 +20,7 @@
|
|||
#endif
|
||||
|
||||
#define DIALOG_WIDTH 760
|
||||
#define DIALOG_HEIGHT 420
|
||||
#define DIALOG_HEIGHT 440
|
||||
|
||||
static bool dialog_finished = false;
|
||||
|
||||
|
|
|
|||
|
|
@ -225,6 +225,11 @@ void ExitPanelRTG(void);
|
|||
void RefreshPanelRTG(void);
|
||||
bool HelpPanelRTG(std::vector<std::string>& helptext);
|
||||
|
||||
void InitPanelHWInfo(const struct _ConfigCategory& category);
|
||||
void ExitPanelHWInfo();
|
||||
void RefreshPanelHWInfo();
|
||||
bool HelpPanelHWInfo(std::vector<std::string>& helptext);
|
||||
|
||||
void InitPanelDisplay(const struct _ConfigCategory& category);
|
||||
void ExitPanelDisplay(void);
|
||||
void RefreshPanelDisplay(void);
|
||||
|
|
@ -280,6 +285,7 @@ bool EditFilesysVirtual(int unit_no);
|
|||
bool EditFilesysHardfile(int unit_no);
|
||||
bool CreateFilesysHardfile(void);
|
||||
void ShowHelp(const char* title, const std::vector<std::string>& text);
|
||||
void ShowDiskInfo(const char* title, const std::vector<std::string>& text);
|
||||
|
||||
bool LoadConfigByName(const char* name);
|
||||
ConfigFileInfo* SearchConfigInList(const char* name);
|
||||
|
|
|
|||
|
|
@ -46,49 +46,41 @@ void target_startup_msg(const TCHAR* title, const TCHAR* msg)
|
|||
}
|
||||
|
||||
ConfigCategory categories[] = {
|
||||
{
|
||||
"About", "data/amigainfo.ico", nullptr, nullptr, InitPanelAbout, ExitPanelAbout, RefreshPanelAbout,
|
||||
{"About", "data/amigainfo.ico", nullptr, nullptr, InitPanelAbout, ExitPanelAbout, RefreshPanelAbout,
|
||||
HelpPanelAbout
|
||||
},
|
||||
{"Paths", "data/paths.ico", nullptr, nullptr, InitPanelPaths, ExitPanelPaths, RefreshPanelPaths, HelpPanelPaths},
|
||||
{
|
||||
"Quickstart", "data/quickstart.ico", nullptr, nullptr, InitPanelQuickstart, ExitPanelQuickstart,
|
||||
{"Quickstart", "data/quickstart.ico", nullptr, nullptr, InitPanelQuickstart, ExitPanelQuickstart,
|
||||
RefreshPanelQuickstart, HelpPanelQuickstart
|
||||
},
|
||||
{
|
||||
"Configurations", "data/file.ico", nullptr, nullptr, InitPanelConfig, ExitPanelConfig, RefreshPanelConfig,
|
||||
{"Configurations", "data/file.ico", nullptr, nullptr, InitPanelConfig, ExitPanelConfig, RefreshPanelConfig,
|
||||
HelpPanelConfig
|
||||
},
|
||||
{"CPU and FPU", "data/cpu.ico", nullptr, nullptr, InitPanelCPU, ExitPanelCPU, RefreshPanelCPU, HelpPanelCPU},
|
||||
{
|
||||
"Chipset", "data/cpu.ico", nullptr, nullptr, InitPanelChipset, ExitPanelChipset, RefreshPanelChipset,
|
||||
{"Chipset", "data/cpu.ico", nullptr, nullptr, InitPanelChipset, ExitPanelChipset, RefreshPanelChipset,
|
||||
HelpPanelChipset
|
||||
},
|
||||
{"ROM", "data/chip.ico", nullptr, nullptr, InitPanelROM, ExitPanelROM, RefreshPanelROM, HelpPanelROM},
|
||||
{"RAM", "data/chip.ico", nullptr, nullptr, InitPanelRAM, ExitPanelRAM, RefreshPanelRAM, HelpPanelRAM},
|
||||
{
|
||||
"Floppy drives", "data/35floppy.ico", nullptr, nullptr, InitPanelFloppy, ExitPanelFloppy, RefreshPanelFloppy,
|
||||
{"Floppy drives", "data/35floppy.ico", nullptr, nullptr, InitPanelFloppy, ExitPanelFloppy, RefreshPanelFloppy,
|
||||
HelpPanelFloppy
|
||||
},
|
||||
{"Hard drives/CD", "data/drive.ico", nullptr, nullptr, InitPanelHD, ExitPanelHD, RefreshPanelHD, HelpPanelHD},
|
||||
{
|
||||
"RTG board", "data/expansion.ico", nullptr, nullptr, InitPanelRTG, ExitPanelRTG,
|
||||
{"RTG board", "data/expansion.ico", nullptr, nullptr, InitPanelRTG, ExitPanelRTG,
|
||||
RefreshPanelRTG, HelpPanelRTG
|
||||
},
|
||||
{
|
||||
"Display", "data/screen.ico", nullptr, nullptr, InitPanelDisplay, ExitPanelDisplay, RefreshPanelDisplay,
|
||||
{"Hardware info", "data/expansion.ico", nullptr, nullptr, InitPanelHWInfo, ExitPanelHWInfo, RefreshPanelHWInfo, HelpPanelHWInfo},
|
||||
{"Display", "data/screen.ico", nullptr, nullptr, InitPanelDisplay, ExitPanelDisplay, RefreshPanelDisplay,
|
||||
HelpPanelDisplay
|
||||
},
|
||||
{"Sound", "data/sound.ico", nullptr, nullptr, InitPanelSound, ExitPanelSound, RefreshPanelSound, HelpPanelSound},
|
||||
{"Input", "data/joystick.ico", nullptr, nullptr, InitPanelInput, ExitPanelInput, RefreshPanelInput, HelpPanelInput},
|
||||
{
|
||||
"Custom controls", "data/controller.png", nullptr, nullptr, InitPanelCustom, ExitPanelCustom,
|
||||
{"Custom controls", "data/controller.png", nullptr, nullptr, InitPanelCustom, ExitPanelCustom,
|
||||
RefreshPanelCustom, HelpPanelCustom
|
||||
},
|
||||
{"Miscellaneous", "data/misc.ico", nullptr, nullptr, InitPanelMisc, ExitPanelMisc, RefreshPanelMisc, HelpPanelMisc},
|
||||
{ "Priority", "data/misc.ico", nullptr, nullptr, InitPanelPrio, ExitPanelPrio, RefreshPanelPrio, HelpPanelPrio},
|
||||
{
|
||||
"Savestates", "data/savestate.png", nullptr, nullptr, InitPanelSavestate, ExitPanelSavestate,
|
||||
{"Savestates", "data/savestate.png", nullptr, nullptr, InitPanelSavestate, ExitPanelSavestate,
|
||||
RefreshPanelSavestate, HelpPanelSavestate
|
||||
},
|
||||
#ifdef ANDROID
|
||||
|
|
@ -109,6 +101,8 @@ enum
|
|||
PANEL_RAM,
|
||||
PANEL_FLOPPY,
|
||||
PANEL_HD,
|
||||
PANEL_RTG,
|
||||
PANEL_HWINFO,
|
||||
PANEL_DISPLAY,
|
||||
PANEL_SOUND,
|
||||
PANEL_INPUT,
|
||||
|
|
|
|||
|
|
@ -171,7 +171,7 @@ copy_screen_16bit_to_32bit_loop:
|
|||
@ copy_screen_32bit_to_16bit
|
||||
@
|
||||
@ r0: uae_u8 *dst - Format (bits): rrrr rggg gggb bbbb
|
||||
@ r1: uae_u8 *src - Format (bytes) in memory rgba
|
||||
@ r1: uae_u8 *src - Format (bytes) in memory bgra
|
||||
@ r2: int bytes
|
||||
@
|
||||
@ void copy_screen_32bit_to_16bit(uae_u8 *dst, uae_u8 *src, int bytes);
|
||||
|
|
@ -182,15 +182,15 @@ copy_screen_32bit_to_16bit:
|
|||
vld4.8 {d18-d21}, [r1]!
|
||||
vld4.8 {d22-d25}, [r1]!
|
||||
vswp d19, d22
|
||||
vswp d21, d24 @ -> q9=r, q10=b, q11=g, q12=a
|
||||
vsri.i8 q9, q11, #5 @ q9: rrrr rggg
|
||||
vshr.u8 q8, q10, #3 @ q8: 000b bbbb
|
||||
vshr.u8 q11, q11, #2 @ q11: 00gg gggg
|
||||
vsli.i8 q8, q11, #5 @ q8: gggb bbbb
|
||||
vswp d17, d18
|
||||
vswp d21, d24
|
||||
vsri.i8 q11, q10, #5
|
||||
vshr.u8 q8, q10, #2
|
||||
vshr.u8 q10, q12, #3
|
||||
vsli.i8 q10, q8, #5
|
||||
vswp d21, d22
|
||||
subs r2, r2, #64 @ processd 4 (bytes per pixel) * 16 (pixel)
|
||||
vst2.8 {d16-d17}, [r0]!
|
||||
vst2.8 {d18-d19}, [r0]!
|
||||
vst2.8 {d20-d21}, [r0]!
|
||||
vst2.8 {d22-d23}, [r0]!
|
||||
bne copy_screen_32bit_to_16bit
|
||||
bx lr
|
||||
|
||||
|
|
@ -198,8 +198,8 @@ copy_screen_32bit_to_16bit:
|
|||
@----------------------------------------------------------------
|
||||
@ copy_screen_32bit_to_32bit
|
||||
@
|
||||
@ r0: uae_u8 *dst - Format (bytes): in memory rgba
|
||||
@ r1: uae_u8 *src - Format (bytes): in memory rgba
|
||||
@ r0: uae_u8 *dst - Format (bytes): in memory argb
|
||||
@ r1: uae_u8 *src - Format (bytes): in memory bgra
|
||||
@ r2: int bytes
|
||||
@
|
||||
@ void copy_screen_32bit_to_32bit(uae_u8 *dst, uae_u8 *src, int bytes);
|
||||
|
|
@ -207,11 +207,9 @@ copy_screen_32bit_to_16bit:
|
|||
@----------------------------------------------------------------
|
||||
copy_screen_32bit_to_32bit:
|
||||
vld1.64 {d18-d19}, [r1]!
|
||||
vrev32.8 d18, d18
|
||||
vshr.u32 d18, d18, #8
|
||||
vrev32.8 d19, d19
|
||||
vshr.u32 d19, d19, #8
|
||||
subs r2, r2, #16
|
||||
vrev32.8 d18, d18
|
||||
vrev32.8 d19, d19
|
||||
vst1.64 {d18-d19}, [r0]!
|
||||
bne copy_screen_32bit_to_32bit
|
||||
bx lr
|
||||
|
|
|
|||
|
|
@ -4857,7 +4857,7 @@ static void copyall (int monid, uae_u8 *src, uae_u8 *dst, int pwidth, int pheigh
|
|||
for (auto y = 0; y < pheight; y++)
|
||||
{
|
||||
if (y == vidinfo->splitypos) {
|
||||
src = gfxmem_banks[0]->start + regs.natmem_offset;
|
||||
src = gfxmem_banks[monid]->start + regs.natmem_offset;
|
||||
}
|
||||
memcpy(dst, src, w);
|
||||
dst += dstbytesperrow;
|
||||
|
|
|
|||
|
|
@ -503,13 +503,13 @@ static int handle_exception(unsigned long* pregs, long fault_addr)
|
|||
|
||||
#ifdef JIT
|
||||
for (;;) {
|
||||
// We analyse only exceptions from JIT
|
||||
// We analyze only exceptions from JIT
|
||||
if (currprefs.cachesize == 0) {
|
||||
output_log(_T("JIT not in use.\n"));
|
||||
break;
|
||||
}
|
||||
|
||||
// Did the error happens in compiled code?
|
||||
// Did the error happen in compiled code?
|
||||
if ((uae_u8*)fault_pc >= compiled_code && (uae_u8*)fault_pc < current_compile_p)
|
||||
output_log(_T("Error in compiled code.\n"));
|
||||
else if ((uae_u8*)fault_pc >= popallspace && (uae_u8*)fault_pc < popallspace + POPALLSPACE_SIZE)
|
||||
|
|
|
|||
|
|
@ -46,7 +46,7 @@
|
|||
/* #define FULLMMU */ /* Aranym 68040 MMU */
|
||||
#define CPUEMU_0 /* generic 680x0 emulation */
|
||||
#define CPUEMU_11 /* 68000/68010 prefetch emulation */
|
||||
/* #define CPUEMU_13 */ /* 68000/68010 cycle-exact cpu&blitter */
|
||||
#define CPUEMU_13 /* 68000/68010 cycle-exact cpu&blitter */
|
||||
/* #define CPUEMU_20 */ /* 68020 prefetch */
|
||||
/* #define CPUEMU_21 */ /* 68020 "cycle-exact" + blitter */
|
||||
/* #define CPUEMU_22 */ /* 68030 prefetch */
|
||||
|
|
|
|||
|
|
@ -24,8 +24,8 @@
|
|||
#define GETBDM(x) (((x) - (((x) / 10000) * 10000)) / 100)
|
||||
#define GETBDD(x) ((x) % 100)
|
||||
|
||||
#define AMIBERRYVERSION _T("Amiberry BETA (2021-03-03)")
|
||||
#define AMIBERRYDATE MAKEBD(2021, 3, 3)
|
||||
#define AMIBERRYVERSION _T("Amiberry BETA (2021-03-13)")
|
||||
#define AMIBERRYDATE MAKEBD(2021, 3, 13)
|
||||
|
||||
#define IHF_WINDOWHIDDEN 6
|
||||
|
||||
|
|
|
|||
|
|
@ -151,8 +151,6 @@ struct mnemolookup lookuptab[] = {
|
|||
{ i_PTESTW, _T("PTESTW"), NULL, 0 },
|
||||
|
||||
{ i_LPSTOP, _T("LPSTOP"), NULL, 0 },
|
||||
{ i_HALT, _T("HALT"), NULL, 0 },
|
||||
{ i_PULSE, _T("PULSE"), NULL, 0 },
|
||||
{ i_ILLG, _T(""), NULL, 0 },
|
||||
};
|
||||
|
||||
|
|
@ -269,7 +267,7 @@ out2:
|
|||
int mnp = 0;
|
||||
int bitno = 0;
|
||||
int unsized = 1;
|
||||
TCHAR mnemonic[10];
|
||||
TCHAR mnemonic[64];
|
||||
int mnemo;
|
||||
|
||||
wordsizes sz = sz_long;
|
||||
|
|
@ -312,6 +310,9 @@ out2:
|
|||
if (bitcnt[bitI] && (bitval[bitI] == 0x00 || bitval[bitI] == 0xff))
|
||||
continue;
|
||||
|
||||
if (bitcnt[bitE] && (bitval[bitE] == 0x00))
|
||||
continue;
|
||||
|
||||
/* bitI and bitC get copied to biti and bitc */
|
||||
if (bitcnt[bitI]) {
|
||||
bitval[biti] = bitval[bitI]; bitpos[biti] = bitpos[bitI];
|
||||
|
|
@ -389,6 +390,9 @@ out2:
|
|||
case 'a': srcmode = Aind; pos++; break;
|
||||
}
|
||||
break;
|
||||
case 'L':
|
||||
srcmode = absl;
|
||||
break;
|
||||
case '#':
|
||||
switch (opcstr[pos++]) {
|
||||
case 'z': srcmode = imm; break;
|
||||
|
|
@ -435,7 +439,7 @@ out2:
|
|||
}
|
||||
break;
|
||||
case 'E': srcmode = immi; srcreg = bitval[bitE];
|
||||
if (CPU_EMU_SIZE < 5) { // gb-- what is CPU_EMU_SIZE used for ??
|
||||
if (CPU_EMU_SIZE < 5) {
|
||||
/* 1..255 */
|
||||
srcgather = 1;
|
||||
srctype = 6;
|
||||
|
|
@ -443,7 +447,7 @@ out2:
|
|||
}
|
||||
break;
|
||||
case 'p': srcmode = immi; srcreg = bitval[bitK];
|
||||
if (CPU_EMU_SIZE < 5) { // gb-- what is CPU_EMU_SIZE used for ??
|
||||
if (CPU_EMU_SIZE < 5) {
|
||||
/* 0..3 */
|
||||
srcgather = 1;
|
||||
srctype = 7;
|
||||
|
|
@ -586,11 +590,16 @@ out2:
|
|||
case 'x': destreg = 0; dstgather = 0; dstpos = 0; break;
|
||||
default: abort();
|
||||
}
|
||||
if (destmode != absl && (dstpos < 0 || dstpos >= 32))
|
||||
abort ();
|
||||
switch (opcstr[pos]) {
|
||||
case 'p': destmode = Apdi; pos++; break;
|
||||
case 'P': destmode = Aipi; pos++; break;
|
||||
}
|
||||
break;
|
||||
case 'L':
|
||||
destmode = absl;
|
||||
break;
|
||||
case '#':
|
||||
switch (opcstr[pos++]) {
|
||||
case 'z': destmode = imm; break;
|
||||
|
|
@ -714,11 +723,6 @@ out2:
|
|||
|
||||
if (destmode == Areg && sz == sz_byte)
|
||||
goto nomatch;
|
||||
#if 0
|
||||
if (sz == sz_byte && (destmode == Aipi || destmode == Apdi)) {
|
||||
dstgather = 0;
|
||||
}
|
||||
#endif
|
||||
endofline:
|
||||
/* now, we have a match */
|
||||
if (table68k[opc].mnemo != i_ILLG)
|
||||
|
|
@ -772,13 +776,6 @@ endofline:
|
|||
table68k[opc].clocks = id.clocks;
|
||||
table68k[opc].fetchmode = id.fetchmode;
|
||||
|
||||
#if 0
|
||||
for (i = 0; i < 5; i++) {
|
||||
table68k[opc].flaginfo[i].flagset = id.flaginfo[i].flagset;
|
||||
table68k[opc].flaginfo[i].flaguse = id.flaginfo[i].flaguse;
|
||||
}
|
||||
#endif
|
||||
|
||||
// Fix flags used information for Scc, Bcc, TRAPcc, DBcc instructions
|
||||
if (table68k[opc].mnemo == i_Scc
|
||||
|| table68k[opc].mnemo == i_Bcc
|
||||
|
|
@ -822,8 +819,6 @@ endofline:
|
|||
}
|
||||
}
|
||||
|
||||
static int imismatch;
|
||||
|
||||
static void handle_merges (long int opcode)
|
||||
{
|
||||
uae_u16 smsk;
|
||||
|
|
@ -879,20 +874,20 @@ static void handle_merges (long int opcode)
|
|||
|| table68k[code].suse != table68k[opcode].suse
|
||||
|| table68k[code].duse != table68k[opcode].duse)
|
||||
{
|
||||
imismatch++; continue;
|
||||
continue;
|
||||
}
|
||||
if (table68k[opcode].suse
|
||||
&& (table68k[opcode].spos != table68k[code].spos
|
||||
|| table68k[opcode].smode != table68k[code].smode
|
||||
|| table68k[opcode].stype != table68k[code].stype))
|
||||
{
|
||||
imismatch++; continue;
|
||||
continue;
|
||||
}
|
||||
if (table68k[opcode].duse
|
||||
&& (table68k[opcode].dpos != table68k[code].dpos
|
||||
|| table68k[opcode].dmode != table68k[code].dmode))
|
||||
{
|
||||
imismatch++; continue;
|
||||
continue;
|
||||
}
|
||||
|
||||
if (code != opcode)
|
||||
|
|
@ -905,7 +900,6 @@ void do_merges (void)
|
|||
{
|
||||
long int opcode;
|
||||
int nr = 0;
|
||||
imismatch = 0;
|
||||
for (opcode = 0; opcode < 65536; opcode++) {
|
||||
if (table68k[opcode].handler != -1 || table68k[opcode].mnemo == i_ILLG)
|
||||
continue;
|
||||
|
|
@ -915,49 +909,6 @@ void do_merges (void)
|
|||
nr_cpuop_funcs = nr;
|
||||
}
|
||||
|
||||
int get_no_mismatches (void)
|
||||
{
|
||||
return imismatch;
|
||||
}
|
||||
|
||||
static int isreg(amodes mode)
|
||||
{
|
||||
if (mode == Dreg || mode == Areg)
|
||||
return 1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
bool opcode_loop_mode(uae_u16 opcode)
|
||||
{
|
||||
struct instr *c = &table68k[opcode];
|
||||
bool loopmode = false;
|
||||
int i;
|
||||
for (i = 0; lookuptab[i].name[0]; i++) {
|
||||
if (c->mnemo == lookuptab[i].mnemo)
|
||||
break;
|
||||
}
|
||||
if (lookuptab[i].flags & MNEMOFLAG_LOOPMODE) {
|
||||
// Source is Dn,An,(An),(An)+,-(An)
|
||||
// Destination is Dn,An,(An),(An)+,-(An)
|
||||
// Both source and destination must not be Dn or An.
|
||||
// RMW instruction must not be Dn or An
|
||||
if (((isreg(c->smode) || c->smode == Aind || c->smode == Apdi || c->smode == Aipi)) &&
|
||||
((!c->duse && !isreg(c->smode)) || (c->duse && (isreg(c->dmode) || c->dmode == Aind || c->dmode == Apdi || c->dmode == Aipi))) &&
|
||||
(!c->duse || (isreg(c->smode) && !isreg(c->dmode)) || (!isreg(c->smode) && isreg(c->dmode)) || (!isreg(c->smode) && !isreg(c->dmode)))) {
|
||||
loopmode = true;
|
||||
}
|
||||
if (c->mnemo == i_MOVE || c->mnemo == i_MOVEA) {
|
||||
// move x,reg: not supported
|
||||
if (isreg(c->dmode))
|
||||
loopmode = false;
|
||||
// move reg,-(an): not supported
|
||||
if (isreg(c->smode) && c->dmode == Apdi)
|
||||
loopmode = false;
|
||||
}
|
||||
}
|
||||
return loopmode;
|
||||
}
|
||||
|
||||
void init_table68k(void)
|
||||
{
|
||||
int i;
|
||||
|
|
|
|||
|
|
@ -68,8 +68,8 @@ STATIC_INLINE uae_u32 ledcolor(uae_u32 c, uae_u32 *rc, uae_u32 *gc, uae_u32 *bc,
|
|||
|
||||
static void write_tdnumber(uae_u8 *buf, int bpp, int x, int y, int num, uae_u32 c1, uae_u32 c2)
|
||||
{
|
||||
const char* numptr = numbers + num * TD_NUM_WIDTH + NUMBERS_NUM * TD_NUM_WIDTH * y;
|
||||
for (int j = 0; j < TD_NUM_WIDTH; j++)
|
||||
const char* numptr = numbers + num * TD_DEFAULT_NUM_WIDTH + NUMBERS_NUM * TD_DEFAULT_NUM_WIDTH * y;
|
||||
for (int j = 0; j < TD_DEFAULT_NUM_WIDTH; j++)
|
||||
{
|
||||
if (*numptr == 'x')
|
||||
putpixel(buf, nullptr, bpp, x + j, c1, 1);
|
||||
|
|
@ -128,7 +128,7 @@ void draw_status_line_single(int monid, uae_u8 *buf, int bpp, int y, int totalwi
|
|||
c2 = ledcolor (0x00000000, rc, gc, bc, alpha);
|
||||
|
||||
if (td_pos & TD_RIGHT)
|
||||
x_start = totalwidth - TD_PADX - VISIBLE_LEDS * TD_WIDTH;
|
||||
x_start = totalwidth - TD_PADX - VISIBLE_LEDS * TD_DEFAULT_WIDTH;
|
||||
else
|
||||
x_start = TD_PADX;
|
||||
|
||||
|
|
@ -340,27 +340,27 @@ void draw_status_line_single(int monid, uae_u8 *buf, int bpp, int y, int totalwi
|
|||
border = 1;
|
||||
}
|
||||
|
||||
x = x_start + pos * TD_WIDTH;
|
||||
x = x_start + pos * TD_DEFAULT_WIDTH;
|
||||
if (!border)
|
||||
putpixel(buf, NULL, bpp, x - 1, cb, 0);
|
||||
for (j = 0; j < TD_LED_WIDTH; j++)
|
||||
for (j = 0; j < TD_DEFAULT_LED_WIDTH; j++)
|
||||
putpixel(buf, NULL, bpp, x + j, c, 0);
|
||||
if (!border)
|
||||
putpixel(buf, NULL, bpp, x + j, cb, 0);
|
||||
|
||||
if (y >= TD_PADY && y - TD_PADY < TD_NUM_HEIGHT) {
|
||||
if (y >= TD_PADY && y - TD_PADY < TD_DEFAULT_NUM_HEIGHT) {
|
||||
if (num3 >= 0) {
|
||||
x += (TD_LED_WIDTH - am * TD_NUM_WIDTH) / 2;
|
||||
x += (TD_DEFAULT_LED_WIDTH - am * TD_DEFAULT_NUM_WIDTH) / 2;
|
||||
if (num1 > 0) {
|
||||
write_tdnumber(buf, bpp, x, y - TD_PADY, num1, pen_rgb, c2);
|
||||
x += TD_NUM_WIDTH;
|
||||
x += TD_DEFAULT_NUM_WIDTH;
|
||||
}
|
||||
if (num2 >= 0) {
|
||||
write_tdnumber(buf, bpp, x, y - TD_PADY, num2, pen_rgb, c2);
|
||||
x += TD_NUM_WIDTH;
|
||||
x += TD_DEFAULT_NUM_WIDTH;
|
||||
}
|
||||
write_tdnumber(buf, bpp, x, y - TD_PADY, num3, pen_rgb, c2);
|
||||
x += TD_NUM_WIDTH;
|
||||
x += TD_DEFAULT_NUM_WIDTH;
|
||||
if (num4 > 0)
|
||||
write_tdnumber(buf, bpp, x, y - TD_PADY, num4, pen_rgb, c2);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -304,10 +304,11 @@ static int trap_thread (void *arg)
|
|||
uae_sem_post (&context->switch_to_emu_sem);
|
||||
|
||||
/* Good bye, cruel world... */
|
||||
|
||||
/* dummy return value */
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Set up extended trap context and call handler function
|
||||
*/
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue