Centralize handling of memory exceptions a bit
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parent
efc3f4f5e4
commit
8461ea19b1
6 changed files with 54 additions and 52 deletions
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@ -26,17 +26,7 @@
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#include "Core/MIPS/MIPS.h"
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namespace Memory
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{
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// =================================
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// From Memmap.cpp
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// ----------------
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// Read and write shortcuts
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// GetPointer must always return an address in the bottom 32 bits of address space, so that 64-bit
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// programs don't have problems directly addressing any part of memory.
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namespace Memory {
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u8 *GetPointer(const u32 address) {
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if ((address & 0x3E000000) == 0x08000000) {
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@ -52,16 +42,12 @@ u8 *GetPointer(const u32 address) {
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// More RAM (remasters, etc.)
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return GetPointerUnchecked(address);
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} else {
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ERROR_LOG(MEMMAP, "Unknown GetPointer %08x PC %08x LR %08x", address, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]);
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static bool reported = false;
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if (!reported) {
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Reporting::ReportMessage("Unknown GetPointer %08x PC %08x LR %08x", address, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]);
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reported = true;
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}
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if (!g_Config.bIgnoreBadMemAccess) {
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Core_EnableStepping(true);
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host->SetDebugMode(true);
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}
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Core_MemoryException(address, currentMIPS->pc, MemoryExceptionType::WRITE_BLOCK);
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return nullptr;
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}
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}
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@ -86,21 +72,12 @@ inline void ReadFromHardware(T &var, const u32 address) {
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// More RAM (remasters, etc.)
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var = *((const T*)GetPointerUnchecked(address));
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} else {
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// In jit, we only flush PC when bIgnoreBadMemAccess is off.
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if (g_Config.iCpuCore == (int)CPUCore::JIT && g_Config.bIgnoreBadMemAccess) {
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WARN_LOG(MEMMAP, "ReadFromHardware: Invalid address %08x", address);
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} else {
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WARN_LOG(MEMMAP, "ReadFromHardware: Invalid address %08x PC %08x LR %08x", address, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]);
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}
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static bool reported = false;
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if (!reported) {
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Reporting::ReportMessage("ReadFromHardware: Invalid address %08x near PC %08x LR %08x", address, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]);
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reported = true;
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}
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if (!g_Config.bIgnoreBadMemAccess) {
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Core_EnableStepping(true);
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host->SetDebugMode(true);
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}
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Core_MemoryException(address, currentMIPS->pc, MemoryExceptionType::READ_WORD);
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var = 0;
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}
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}
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@ -122,21 +99,12 @@ inline void WriteToHardware(u32 address, const T data) {
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// More RAM (remasters, etc.)
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*(T*)GetPointerUnchecked(address) = data;
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} else {
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// In jit, we only flush PC when bIgnoreBadMemAccess is off.
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if (g_Config.iCpuCore == (int)CPUCore::JIT && g_Config.bIgnoreBadMemAccess) {
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WARN_LOG(MEMMAP, "WriteToHardware: Invalid address %08x", address);
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} else {
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WARN_LOG(MEMMAP, "WriteToHardware: Invalid address %08x PC %08x LR %08x", address, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]);
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}
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static bool reported = false;
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if (!reported) {
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Reporting::ReportMessage("WriteToHardware: Invalid address %08x near PC %08x LR %08x", address, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]);
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reported = true;
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}
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if (!g_Config.bIgnoreBadMemAccess) {
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Core_EnableStepping(true);
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host->SetDebugMode(true);
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}
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Core_MemoryException(address, currentMIPS->pc, MemoryExceptionType::WRITE_WORD);
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}
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}
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