diff --git a/CMakeLists.txt b/CMakeLists.txt
index c8a8be25f..341513c47 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -9,14 +9,6 @@ add_definitions(-DPPSSPP)
 # None of these platforms support Vulkan yet.
 add_definitions(-DNO_VULKAN)
 
-if(CMAKE_SIZEOF_VOID_P EQUAL 8)
-	set(_ARCH_64 1)
-	add_definitions(-D_ARCH_64=1)
-else()
-	set(_ARCH_32 1)
-	add_definitions(-D_ARCH_32=1)
-endif()
-
 # Detect CPU from CMAKE configuration. Toolchains should set this up
 if(CMAKE_SYSTEM_PROCESSOR)
 	if(${CMAKE_SYSTEM_PROCESSOR} MATCHES "^arm")
@@ -55,14 +47,6 @@ if(${CMAKE_SYSTEM_NAME} MATCHES "Android")
     set(ANDROID ON)
 endif()
 
-if (X86 AND NOT MIPS)
-	if(_ARCH_64)
-		add_definitions(-D_M_X64)
-	else()
-		add_definitions(-D_M_IX86)
-	endif()
-endif()
-
 if(NOT DEFINED HEADLESS)
 	set(HEADLESS OFF)
 endif()
@@ -123,13 +107,6 @@ endif()
 # Needed for Globals.h
 include_directories("${CMAKE_SOURCE_DIR}")
 
-if(ARM)
-	add_definitions(-DARM)
-endif()
-if(MIPS)
-	add_definitions(-DMIPS)
-endif()
-
 if(USING_EGL)
 	add_definitions(-DUSING_EGL)
 endif()
@@ -172,6 +149,13 @@ if(NOT MSVC)
 	set(CMAKE_C_FLAGS_RELEASE "${CMAKE_C_FLAGS_RELEASE} -O3 -D_NDEBUG")
 	set(CMAKE_C_FLAGS_RELWITHDEBINFO "${CMAKE_C_FLAGS_RELWITHDEBINFO} -O2 -g -D_NDEBUG")
 
+    #TODO: Remove this and include the file properly everywhere it makes sense
+    # First step is too use the macros everywhere
+    # Second step is to remove the compatibility defines
+    # Third step is to include the file
+    # Fourth step is to remove that line!
+    add_compile_options(-include ${CMAKE_CURRENT_SOURCE_DIR}/ppsspp_config.h)
+
 	# Disable some warnings
 	add_definitions(-Wno-multichar)
 	add_definitions(-fno-strict-aliasing)
@@ -1036,74 +1020,72 @@ set(CoreExtra ${CoreExtra}
 	Core/MIPS/IR/IRRegCache.h
 	)
 
-if(ARM)
-	set(CoreExtra ${CoreExtra}
-		Core/MIPS/ARM/ArmAsm.cpp
-		Core/MIPS/ARM/ArmCompALU.cpp
-		Core/MIPS/ARM/ArmCompBranch.cpp
-		Core/MIPS/ARM/ArmCompFPU.cpp
-		Core/MIPS/ARM/ArmCompLoadStore.cpp
-		Core/MIPS/ARM/ArmCompVFPU.cpp
-		Core/MIPS/ARM/ArmCompVFPUNEON.cpp
-		Core/MIPS/ARM/ArmCompVFPUNEONUtil.cpp
-		Core/MIPS/ARM/ArmCompReplace.cpp
-		Core/MIPS/ARM/ArmJit.cpp
-		Core/MIPS/ARM/ArmJit.h
-		Core/MIPS/ARM/ArmRegCache.cpp
-		Core/MIPS/ARM/ArmRegCache.h
-		Core/MIPS/ARM/ArmRegCacheFPU.cpp
-		Core/MIPS/ARM/ArmRegCacheFPU.h
-		GPU/Common/VertexDecoderArm.cpp
-		ext/disarm.cpp)
-elseif(ARM64)
-  set(CoreExtra ${CoreExtra}
-		Core/MIPS/ARM64/Arm64Asm.cpp
-		Core/MIPS/ARM64/Arm64CompALU.cpp
-		Core/MIPS/ARM64/Arm64CompBranch.cpp
-		Core/MIPS/ARM64/Arm64CompFPU.cpp
-		Core/MIPS/ARM64/Arm64CompLoadStore.cpp
-		Core/MIPS/ARM64/Arm64CompVFPU.cpp
-		Core/MIPS/ARM64/Arm64CompReplace.cpp
-		Core/MIPS/ARM64/Arm64Jit.cpp
-		Core/MIPS/ARM64/Arm64Jit.h
-		Core/MIPS/ARM64/Arm64RegCache.cpp
-		Core/MIPS/ARM64/Arm64RegCache.h
-		Core/MIPS/ARM64/Arm64RegCacheFPU.cpp
-		Core/MIPS/ARM64/Arm64RegCacheFPU.h
-		GPU/Common/VertexDecoderArm.cpp
-		Core/Util/DisArm64.cpp)
-elseif(X86)
-	set(CoreExtra ${CoreExtra}
-		Core/MIPS/x86/Asm.cpp
-		Core/MIPS/x86/CompALU.cpp
-		Core/MIPS/x86/CompBranch.cpp
-		Core/MIPS/x86/CompFPU.cpp
-		Core/MIPS/x86/CompLoadStore.cpp
-		Core/MIPS/x86/CompVFPU.cpp
-		Core/MIPS/x86/CompReplace.cpp
-		Core/MIPS/x86/Jit.cpp
-		Core/MIPS/x86/Jit.h
-		Core/MIPS/x86/JitSafeMem.cpp
-		Core/MIPS/x86/JitSafeMem.h
-		Core/MIPS/x86/RegCache.cpp
-		Core/MIPS/x86/RegCache.h
-		Core/MIPS/x86/RegCacheFPU.cpp
-		Core/MIPS/x86/RegCacheFPU.h
-		GPU/Common/VertexDecoderX86.cpp
-		ext/disarm.cpp)
-elseif(MIPS)
-	set(CoreExtra ${CoreExtra}
-		Core/MIPS/MIPS/MipsJit.cpp
-		Core/MIPS/MIPS/MipsJit.h
-		GPU/Common/VertexDecoderFake.cpp
-		ext/disarm.cpp)
-else()
-	set(CoreExtra ${CoreExtra}
-		Core/MIPS/fake/FakeJit.cpp
-		Core/MIPS/fake/FakeJit.h
-		GPU/Common/VertexDecoderFake.cpp
-		ext/disarm.cpp)
-endif()
+list(APPEND CoreExtra
+	Core/MIPS/ARM/ArmAsm.cpp
+	Core/MIPS/ARM/ArmCompALU.cpp
+	Core/MIPS/ARM/ArmCompBranch.cpp
+	Core/MIPS/ARM/ArmCompFPU.cpp
+	Core/MIPS/ARM/ArmCompLoadStore.cpp
+	Core/MIPS/ARM/ArmCompVFPU.cpp
+	Core/MIPS/ARM/ArmCompVFPUNEON.cpp
+	Core/MIPS/ARM/ArmCompVFPUNEONUtil.cpp
+	Core/MIPS/ARM/ArmCompReplace.cpp
+	Core/MIPS/ARM/ArmJit.cpp
+	Core/MIPS/ARM/ArmJit.h
+	Core/MIPS/ARM/ArmRegCache.cpp
+	Core/MIPS/ARM/ArmRegCache.h
+	Core/MIPS/ARM/ArmRegCacheFPU.cpp
+	Core/MIPS/ARM/ArmRegCacheFPU.h
+	GPU/Common/VertexDecoderArm.cpp
+)
+
+list(APPEND CoreExtra
+	Core/MIPS/ARM64/Arm64Asm.cpp
+	Core/MIPS/ARM64/Arm64CompALU.cpp
+	Core/MIPS/ARM64/Arm64CompBranch.cpp
+	Core/MIPS/ARM64/Arm64CompFPU.cpp
+	Core/MIPS/ARM64/Arm64CompLoadStore.cpp
+	Core/MIPS/ARM64/Arm64CompVFPU.cpp
+	Core/MIPS/ARM64/Arm64CompReplace.cpp
+	Core/MIPS/ARM64/Arm64Jit.cpp
+	Core/MIPS/ARM64/Arm64Jit.h
+	Core/MIPS/ARM64/Arm64RegCache.cpp
+	Core/MIPS/ARM64/Arm64RegCache.h
+	Core/MIPS/ARM64/Arm64RegCacheFPU.cpp
+	Core/MIPS/ARM64/Arm64RegCacheFPU.h
+	GPU/Common/VertexDecoderArm64.cpp
+	Core/Util/DisArm64.cpp)
+
+list(APPEND CoreExtra
+	Core/MIPS/x86/Asm.cpp
+	Core/MIPS/x86/CompALU.cpp
+	Core/MIPS/x86/CompBranch.cpp
+	Core/MIPS/x86/CompFPU.cpp
+	Core/MIPS/x86/CompLoadStore.cpp
+	Core/MIPS/x86/CompVFPU.cpp
+	Core/MIPS/x86/CompReplace.cpp
+	Core/MIPS/x86/Jit.cpp
+	Core/MIPS/x86/Jit.h
+	Core/MIPS/x86/JitSafeMem.cpp
+	Core/MIPS/x86/JitSafeMem.h
+	Core/MIPS/x86/RegCache.cpp
+	Core/MIPS/x86/RegCache.h
+	Core/MIPS/x86/RegCacheFPU.cpp
+	Core/MIPS/x86/RegCacheFPU.h
+	GPU/Common/VertexDecoderX86.cpp
+)
+
+list(APPEND CoreExtra
+	Core/MIPS/MIPS/MipsJit.cpp
+	Core/MIPS/MIPS/MipsJit.h
+	GPU/Common/VertexDecoderFake.cpp
+)
+
+#list(APPEND CoreExtra
+#	Core/MIPS/fake/FakeJit.cpp
+#	Core/MIPS/fake/FakeJit.h
+#	GPU/Common/VertexDecoderFake.cpp
+#)
 
 if (NOT MOBILE_DEVICE)
 	set(CoreExtra ${CoreExtra}
@@ -1506,7 +1488,9 @@ add_library(${CoreLibName} ${CoreLinkType}
 	${CORE_NEON}
 	${GPU_SOURCES}
 	Globals.h
-	git-version.cpp)
+	git-version.cpp
+    ext/disarm.cpp
+)
 target_link_libraries(${CoreLibName} Common native kirk cityhash sfmt19937 xbrz xxhash
 	${CoreExtraLibs} ${GLEW_LIBRARIES} ${OPENGL_LIBRARIES} ${X11_LIBRARIES} ${CMAKE_DL_LIBS})
 setup_target_project(${CoreLibName} Core)
diff --git a/Common/ArmCPUDetect.cpp b/Common/ArmCPUDetect.cpp
index 8a723fb41..c6de1abdb 100644
--- a/Common/ArmCPUDetect.cpp
+++ b/Common/ArmCPUDetect.cpp
@@ -15,7 +15,8 @@
 // Official SVN repository and contact information can be found at
 // http://code.google.com/p/dolphin-emu/
 
-#if defined(__arm__) || defined(__aarch64__)
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(ARM) || PPSSPP_ARCH(ARM64)
 
 #include <ctype.h>
 #include "Common.h"
@@ -24,7 +25,7 @@
 #include "FileUtil.h"
 
 // Only Linux platforms have /proc/cpuinfo
-#if defined(__linux__)
+#if PPSSPP_PLATFORM(LINUX)
 const char procfile[] = "/proc/cpuinfo";
 // https://www.kernel.org/doc/Documentation/ABI/testing/sysfs-devices-system-cpu
 const char syscpupresentfile[] = "/sys/devices/system/cpu/present";
@@ -184,7 +185,7 @@ void CPUInfo::Detect()
 {
 	// Set some defaults here
 	HTT = false;
-#ifdef ARM64
+#if PPSSPP_ARCH(ARM64)
 	OS64bit = true;
 	CPU64bit = true;
 	Mode64bit = true;
@@ -196,10 +197,10 @@ void CPUInfo::Detect()
 	vendor = VENDOR_ARM;
 
 	// Get the information about the CPU 
-#if !defined(__linux__)
+#if !PPSSPP_PLATFORM(LINUX)
 	bool isVFP3 = false;
 	bool isVFP4 = false;
-#ifdef IOS
+#if PPSSPP_PLATFORM(IOS)
 	isVFP3 = true;
 	// Check for swift arch (VFP4)
 #ifdef __ARM_ARCH_7S__
@@ -207,7 +208,7 @@ void CPUInfo::Detect()
 #endif
 	strcpy(brand_string, "Apple A");
 	num_cores = 2;
-#else
+#else // !PPSSPP_PLATFORM(IOS)
 	strcpy(brand_string, "Unknown");
 	num_cores = 1;
 #endif
@@ -228,7 +229,7 @@ void CPUInfo::Detect()
 	bIDIVt = isVFP4;
 	bFP = false;
 	bASIMD = false;
-#else // __linux__
+#else // PPSSPP_PLATFORM(LINUX)
 	strncpy(cpu_string, GetCPUString().c_str(), sizeof(cpu_string));
 	strncpy(brand_string, GetCPUBrandString().c_str(), sizeof(brand_string));
 
@@ -254,7 +255,7 @@ void CPUInfo::Detect()
 	bASIMD = CheckCPUFeature("asimd");
 	num_cores = GetCoreCount();
 #endif
-#ifdef ARM64
+#if PPSSPP_ARCH(ARM64)
 	// Whether the above detection failed or not, on ARM64 we do have ASIMD/NEON.
 	bNEON = true;
 	bASIMD = true;
@@ -287,4 +288,4 @@ std::string CPUInfo::Summarize()
 	return sum;
 }
 
-#endif // defined(__arm__) || defined(__aarch64__)
+#endif // PPSSPP_ARCH(ARM) || PPSSPP_ARCH(ARM64)
diff --git a/Common/ArmEmitter.cpp b/Common/ArmEmitter.cpp
index ebf536877..024eea1a7 100644
--- a/Common/ArmEmitter.cpp
+++ b/Common/ArmEmitter.cpp
@@ -268,7 +268,7 @@ bool ARMXEmitter::TryANDI2R(ARMReg rd, ARMReg rs, u32 val)
 		}
 		return true;
 	} else {
-#ifdef HAVE_ARMV7
+#if PPSSPP_ARCH(ARMV7)
 		// Check if we have a single pattern of sequential bits.
 		int seq = -1;
 		for (int i = 0; i < 32; ++i) {
@@ -300,7 +300,7 @@ bool ARMXEmitter::TryANDI2R(ARMReg rd, ARMReg rs, u32 val)
 		}
 
 		// The worst case is 4 (e.g. 0x55555555.)
-#ifdef HAVE_ARMV7
+#if PPSSPP_ARCH(ARMV7)
 		if (ops > 3) {
 			return false;
 		}
@@ -401,7 +401,7 @@ bool ARMXEmitter::TryORI2R(ARMReg rd, ARMReg rs, u32 val)
 		bool inversed;
 		if (TryMakeOperand2_AllowInverse(val, op2, &inversed) && ops >= 3) {
 			return false;
-#ifdef HAVE_ARMV7
+#if PPSSPP_ARCH(ARMV7)
 		} else if (ops > 3) {
 			return false;
 #endif
@@ -488,7 +488,7 @@ void ARMXEmitter::MOVI2R(ARMReg reg, u32 val, bool optimize)
 	Operand2 op2;
 	bool inverse;
 
-#ifdef HAVE_ARMV7
+#if PPSSPP_ARCH(ARMV7)
 	// Unused
 	if (!optimize)
 	{
@@ -502,7 +502,7 @@ void ARMXEmitter::MOVI2R(ARMReg reg, u32 val, bool optimize)
 	if (TryMakeOperand2_AllowInverse(val, op2, &inverse)) {
 		inverse ? MVN(reg, op2) : MOV(reg, op2);
 	} else {
-#ifdef HAVE_ARMV7
+#if PPSSPP_ARCH(ARMV7)
 		// Use MOVW+MOVT for ARMv7+
 		MOVW(reg, val & 0xFFFF);
 		if(val & 0xFFFF0000)
diff --git a/Common/CPUDetect.h b/Common/CPUDetect.h
index 51cbcd1b0..123912e35 100644
--- a/Common/CPUDetect.h
+++ b/Common/CPUDetect.h
@@ -18,11 +18,7 @@
 // Detect the cpu, so we'll know which optimizations to use
 #pragma once
 
-// Every architecture has its own define. This needs to be added to.
-#if defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7S__)
-#define HAVE_ARMV7 1
-#endif
-
+#include "ppsspp_config.h"
 #include <string>
 
 enum CPUVendor {
diff --git a/Common/ColorConv.cpp b/Common/ColorConv.cpp
index 9dcd1876f..84fdb27f3 100644
--- a/Common/ColorConv.cpp
+++ b/Common/ColorConv.cpp
@@ -643,7 +643,7 @@ Convert16bppTo16bppFunc ConvertRGB565ToBGR565 = &ConvertRGB565ToBGR565Basic;
 #endif
 
 void SetupColorConv() {
-#if defined(HAVE_ARMV7) && !defined(ARM64)
+#if PPSSPP_ARCH(ARMV7) && PPSSPP_ARCH(ARM_NEON)
 	if (cpu_info.bNEON) {
 		ConvertRGBA4444ToABGR4444 = &ConvertRGBA4444ToABGR4444NEON;
 		ConvertRGBA5551ToABGR1555 = &ConvertRGBA5551ToABGR1555NEON;
diff --git a/Common/ColorConvNEON.cpp b/Common/ColorConvNEON.cpp
index aa007e16e..e40e20c42 100644
--- a/Common/ColorConvNEON.cpp
+++ b/Common/ColorConvNEON.cpp
@@ -15,7 +15,8 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
-#if defined(__arm__) || defined(__aarch64__)
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(ARM) || PPSSPP_ARCH(ARM64)
 
 #include <arm_neon.h>
 #include "ColorConvNEON.h"
@@ -108,4 +109,4 @@ void ConvertRGB565ToBGR565NEON(u16 *dst, const u16 *src, const u32 numPixels) {
 	}
 }
 
-#endif // defined(__arm__) || defined(__aarch64__)
+#endif // PPSSPP_ARCH(ARM) || PPSSPP_ARCH(ARM64)
diff --git a/Common/Common.h b/Common/Common.h
index 86db93e11..f93a71c46 100644
--- a/Common/Common.h
+++ b/Common/Common.h
@@ -27,12 +27,6 @@
 #pragma warning (disable:4100)
 #endif
 
-#ifdef __arm__
-#if !defined(ARM)
-#define ARM
-#endif
-#endif
-
 // Force enable logging in the right modes. For some reason, something had changed
 // so that debugfast no longer logged.
 #if defined(_DEBUG) || defined(DEBUGFAST)
diff --git a/Common/CommonTypes.h b/Common/CommonTypes.h
index bc67c19ac..efd76ad76 100644
--- a/Common/CommonTypes.h
+++ b/Common/CommonTypes.h
@@ -22,12 +22,6 @@
 
 #pragma once
 
-#ifdef __arm__
-#if !defined(ARM)
-#define ARM
-#endif
-#endif
-
 struct u24_be {
 	unsigned char value[3]; 
 
diff --git a/Common/Log.h b/Common/Log.h
index ee658b8b0..15e07abf2 100644
--- a/Common/Log.h
+++ b/Common/Log.h
@@ -19,12 +19,6 @@
 
 #include "MsgHandler.h"
 
-#ifdef __arm__
-#if !defined(ARM)
-#define ARM
-#endif
-#endif
-
 #define	NOTICE_LEVEL  1  // VERY important information that is NOT errors. Like startup and debugprintfs from the game itself.
 #define	ERROR_LEVEL   2  // Important errors.
 #define	WARNING_LEVEL 3  // Something is suspicious.
diff --git a/Common/MipsCPUDetect.cpp b/Common/MipsCPUDetect.cpp
index 827605ba1..184174159 100644
--- a/Common/MipsCPUDetect.cpp
+++ b/Common/MipsCPUDetect.cpp
@@ -158,7 +158,7 @@ void CPUInfo::Detect()
 {
 	// Set some defaults here
 	HTT = false;
-#ifdef _ARCH_64
+#ifdef PPSSPP_ARCH(MIPS64)
 	OS64bit = true;
 	CPU64bit = true;
 	Mode64bit = true;
diff --git a/Common/x64Emitter.h b/Common/x64Emitter.h
index cd7647813..056500775 100644
--- a/Common/x64Emitter.h
+++ b/Common/x64Emitter.h
@@ -18,14 +18,12 @@
 #ifndef _DOLPHIN_INTEL_CODEGEN_
 #define _DOLPHIN_INTEL_CODEGEN_
 
+#include "ppsspp_config.h"
+
 #include "Common.h"
 #include "CodeBlock.h"
 
-#if defined(_M_X64) && !defined(_ARCH_64)
-#define _ARCH_64
-#endif
-
-#ifdef _ARCH_64
+#if PPSSPP_ARCH(64BIT)
 #define PTRBITS 64
 #else
 #define PTRBITS 32
@@ -275,6 +273,12 @@ inline OpArg Imm8 (u8 imm)  {return OpArg(imm, SCALE_IMM8);}
 inline OpArg Imm16(u16 imm) {return OpArg(imm, SCALE_IMM16);} //rarely used
 inline OpArg Imm32(u32 imm) {return OpArg(imm, SCALE_IMM32);}
 inline OpArg Imm64(u64 imm) {return OpArg(imm, SCALE_IMM64);}
+
+template<int N> OpArg ImmPtrTpl(const void *imm);
+template<> inline OpArg ImmPtrTpl<8>(const void *imm) {return Imm64((u64)imm);}
+template<> inline OpArg ImmPtrTpl<4>(const void *imm) {return Imm32((u32)(uintptr_t)imm);}
+inline OpArg ImmPtr(const void* imm) {return ImmPtrTpl<sizeof(void*)>(imm);}
+
 inline OpArg UImmAuto(u32 imm) {
 	return OpArg(imm, imm >= 128 ? SCALE_IMM32 : SCALE_IMM8);
 }
@@ -282,15 +286,8 @@ inline OpArg SImmAuto(s32 imm) {
 	return OpArg(imm, (imm >= 128 || imm < -128) ? SCALE_IMM32 : SCALE_IMM8);
 }
 
-#ifdef _ARCH_64
-inline OpArg ImmPtr(const void* imm) {return Imm64((u64)imm);}
-#else
-inline OpArg ImmPtr(const void* imm) {return Imm32((u32)imm);}
-#endif
-
-inline u32 PtrOffset(const void* ptr, const void* base)
-{
-#ifdef _ARCH_64
+template<int N> u32 PtrOffsetTpl(const void* ptr, const void* base);
+template<> inline u32 PtrOffsetTpl<8>(const void *ptr, const void* base) {
 	s64 distance = (s64)ptr-(s64)base;
 	if (distance >= 0x80000000LL ||
 	    distance < -0x80000000LL)
@@ -300,9 +297,12 @@ inline u32 PtrOffset(const void* ptr, const void* base)
 	}
 
 	return (u32)distance;
-#else
-	return (u32)ptr-(u32)base;
-#endif
+}
+template<> inline u32 PtrOffsetTpl<4>(const void *ptr, const void* base) {
+	return (u32)(uintptr_t)ptr-(u32)(uintptr_t)base;
+}
+inline u32 PtrOffset(const void* ptr, const void* base) {
+    return PtrOffsetTpl<sizeof(void*)>(ptr, base);
 }
 
 //usage: int a[]; ARRAY_OFFSET(a,10)
diff --git a/Core/MIPS/ARM/ArmAsm.cpp b/Core/MIPS/ARM/ArmAsm.cpp
index 3d871bf52..e53f93048 100644
--- a/Core/MIPS/ARM/ArmAsm.cpp
+++ b/Core/MIPS/ARM/ArmAsm.cpp
@@ -15,6 +15,8 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(ARM)
 
 #include "Core/MemMap.h"
 #include "Core/MIPS/MIPS.h"
@@ -190,7 +192,7 @@ void ArmJit::GenerateFixedCode() {
 		// IMPORTANT - We jump on negative, not carry!!!
 		FixupBranch bailCoreState = B_CC(CC_MI);
 
-		MOVI2R(R0, (u32)&coreState);
+		MOVI2R(R0, (u32)(uintptr_t)&coreState);
 		LDR(R0, R0);
 		CMP(R0, 0);
 		FixupBranch badCoreState = B_CC(CC_NEQ);
@@ -231,7 +233,7 @@ void ArmJit::GenerateFixedCode() {
 				// LDR(R0, R9, R0); here, replacing the next instructions.
 #ifdef IOS
 				// On iOS, R9 (JITBASEREG) is volatile.  We have to reload it.
-				MOVI2R(JITBASEREG, (u32)GetBasePtr());
+				MOVI2R(JITBASEREG, (u32)(uintptr_t)GetBasePtr());
 #endif
 				ADD(R0, R0, JITBASEREG);
 				B(R0);
@@ -249,7 +251,7 @@ void ArmJit::GenerateFixedCode() {
 		SetJumpTarget(bail);
 		SetJumpTarget(bailCoreState);
 
-		MOVI2R(R0, (u32)&coreState);
+		MOVI2R(R0, (u32)(uintptr_t)&coreState);
 		LDR(R0, R0);
 		CMP(R0, 0);
 		B_CC(CC_EQ, outerLoop);
@@ -287,3 +289,5 @@ void ArmJit::GenerateFixedCode() {
 }
 
 }  // namespace MIPSComp
+
+#endif // PPSSPP_ARCH(ARM)
diff --git a/Core/MIPS/ARM/ArmCompALU.cpp b/Core/MIPS/ARM/ArmCompALU.cpp
index f7f84bc63..13788a5d9 100644
--- a/Core/MIPS/ARM/ArmCompALU.cpp
+++ b/Core/MIPS/ARM/ArmCompALU.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(ARM)
+
 #include <algorithm>
 #include "Core/MIPS/MIPS.h"
 #include "Core/MIPS/MIPSCodeUtils.h"
@@ -547,7 +550,7 @@ namespace MIPSComp
 			}
 
 			gpr.MapDirtyIn(rt, rs);
-#ifdef HAVE_ARMV7
+#if PPSSPP_ARCH(ARMV7)
 			UBFX(gpr.R(rt), gpr.R(rs), pos, size);
 #else
 			MOV(gpr.R(rt), Operand2(gpr.R(rs), ST_LSR, pos));
@@ -573,7 +576,7 @@ namespace MIPSComp
 					}
 				} else {
 					gpr.MapDirtyIn(rt, rs, false);
-#ifdef HAVE_ARMV7
+#if PPSSPP_ARCH(ARMV7)
 					BFI(gpr.R(rt), gpr.R(rs), pos, size - pos);
 #else
 					ANDI2R(SCRATCHREG1, gpr.R(rs), sourcemask, SCRATCHREG2);
@@ -627,7 +630,7 @@ namespace MIPSComp
 				return;
 			}
 
-#ifdef HAVE_ARMV7
+#if PPSSPP_ARCH(ARMV7)
 			gpr.MapDirtyIn(rd, rt);
 			RBIT(gpr.R(rd), gpr.R(rt));
 #else
@@ -882,3 +885,5 @@ namespace MIPSComp
 	}
 
 }
+
+#endif // PPSSPP_ARCH(ARM)
diff --git a/Core/MIPS/ARM/ArmCompBranch.cpp b/Core/MIPS/ARM/ArmCompBranch.cpp
index a10552a99..e6d990fd4 100644
--- a/Core/MIPS/ARM/ArmCompBranch.cpp
+++ b/Core/MIPS/ARM/ArmCompBranch.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(ARM)
+
 #include "profiler/profiler.h"
 
 #include "Core/Reporting.h"
@@ -642,3 +645,5 @@ void ArmJit::Comp_Break(MIPSOpcode op)
 }
 
 }   // namespace Mipscomp
+
+#endif // PPSSPP_ARCH(ARM)
diff --git a/Core/MIPS/ARM/ArmCompFPU.cpp b/Core/MIPS/ARM/ArmCompFPU.cpp
index babf9bf5c..475cf7fdb 100644
--- a/Core/MIPS/ARM/ArmCompFPU.cpp
+++ b/Core/MIPS/ARM/ArmCompFPU.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(ARM)
+
 #include "Core/Config.h"
 #include "Core/MemMap.h"
 #include "Core/MIPS/MIPS.h"
@@ -381,7 +384,7 @@ void ArmJit::Comp_mxc1(MIPSOpcode op)
 			} else {
 				gpr.MapDirtyIn(rt, MIPS_REG_FPCOND);
 				LDR(gpr.R(rt), CTXREG, offsetof(MIPSState, fcr31));
-#ifdef HAVE_ARMV7
+#if PPSSPP_ARCH(ARMV7)
 				BFI(gpr.R(rt), gpr.R(MIPS_REG_FPCOND), 23, 1);
 #else
 				AND(SCRATCHREG1, gpr.R(MIPS_REG_FPCOND), Operand2(1)); // Just in case
@@ -424,7 +427,7 @@ void ArmJit::Comp_mxc1(MIPSOpcode op)
 			// TODO: Technically, should mask by 0x0181FFFF.  Maybe just put all of FCR31 in the reg?
 			STR(gpr.R(rt), CTXREG, offsetof(MIPSState, fcr31));
 			if (!wasImm) {
-#ifdef HAVE_ARMV7
+#if PPSSPP_ARCH(ARMV7)
 				UBFX(gpr.R(MIPS_REG_FPCOND), gpr.R(rt), 23, 1);
 #else
 				MOV(SCRATCHREG1, Operand2(gpr.R(rt), ST_LSR, 23));
@@ -441,3 +444,5 @@ void ArmJit::Comp_mxc1(MIPSOpcode op)
 }
 
 }	// namespace MIPSComp
+
+#endif // PPSSPP_ARCH(ARM)
diff --git a/Core/MIPS/ARM/ArmCompLoadStore.cpp b/Core/MIPS/ARM/ArmCompLoadStore.cpp
index f9d8c0bca..cd072f1ac 100644
--- a/Core/MIPS/ARM/ArmCompLoadStore.cpp
+++ b/Core/MIPS/ARM/ArmCompLoadStore.cpp
@@ -36,6 +36,8 @@
 // Also, if we kept track of the likely register content of a cached register,
 // (pointer or data), we could avoid many BIC instructions.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(ARM)
 
 #include "Core/MemMap.h"
 #include "Core/Config.h"
@@ -427,3 +429,5 @@ namespace MIPSComp
 		}
 	}
 }
+
+#endif // PPSSPP_ARCH(ARM)
diff --git a/Core/MIPS/ARM/ArmCompReplace.cpp b/Core/MIPS/ARM/ArmCompReplace.cpp
index 3860fcd89..dbe49cd25 100644
--- a/Core/MIPS/ARM/ArmCompReplace.cpp
+++ b/Core/MIPS/ARM/ArmCompReplace.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(ARM)
+
 #include "Common/CPUDetect.h"
 #include "Core/MemMap.h"
 #include "Core/MIPS/JitCommon/JitCommon.h"
@@ -29,4 +32,6 @@ int ArmJit::Replace_fabsf() {
 	return 4;  // Number of instructions in the MIPS function
 }
 
-}
\ No newline at end of file
+}
+
+#endif // PPSSPP_ARCH(ARM)
diff --git a/Core/MIPS/ARM/ArmCompVFPU.cpp b/Core/MIPS/ARM/ArmCompVFPU.cpp
index 4e2f98c3a..7e4093f94 100644
--- a/Core/MIPS/ARM/ArmCompVFPU.cpp
+++ b/Core/MIPS/ARM/ArmCompVFPU.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(ARM)
+
 #include <cmath>
 #include "math/math_util.h"
 
@@ -2323,3 +2326,5 @@ namespace MIPSComp
 		DISABLE;
 	}
 }
+
+#endif // PPSSPP_ARCH(ARM)
diff --git a/Core/MIPS/ARM/ArmCompVFPUNEON.cpp b/Core/MIPS/ARM/ArmCompVFPUNEON.cpp
index e40c4d8ca..48e2f0fbd 100644
--- a/Core/MIPS/ARM/ArmCompVFPUNEON.cpp
+++ b/Core/MIPS/ARM/ArmCompVFPUNEON.cpp
@@ -25,7 +25,8 @@
 // are below Q8 (D16, S32) using regular VFP instructions but really not sure
 // if it's worth it.
 
-
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(ARM)
 
 #include <cmath>
 
@@ -1451,4 +1452,6 @@ void ArmJit::CompNEON_Vbfy(MIPSOpcode op) {
 }
 
 }
-// namespace MIPSComp
\ No newline at end of file
+// namespace MIPSComp
+
+#endif // PPSSPP_ARCH(ARM)
diff --git a/Core/MIPS/ARM/ArmCompVFPUNEONUtil.cpp b/Core/MIPS/ARM/ArmCompVFPUNEONUtil.cpp
index 8efa3181d..546c791a4 100644
--- a/Core/MIPS/ARM/ArmCompVFPUNEONUtil.cpp
+++ b/Core/MIPS/ARM/ArmCompVFPUNEONUtil.cpp
@@ -25,6 +25,9 @@
 // are below Q8 (D16, S32) using regular VFP instructions but really not sure
 // if it's worth it.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(ARM)
+
 #include <cmath>
 
 #include "base/logging.h"
@@ -414,4 +417,6 @@ void ArmJit::NEONTranspose4x4(ARMReg cols[4]) {
 	VSWP(D_1(cols[1]), D_0(cols[3]));
 }
 
-}  // namespace MIPSComp
\ No newline at end of file
+}  // namespace MIPSComp
+
+#endif // PPSSPP_ARCH(ARM)
diff --git a/Core/MIPS/ARM/ArmJit.cpp b/Core/MIPS/ARM/ArmJit.cpp
index dc005ed69..e89aa3bf9 100644
--- a/Core/MIPS/ARM/ArmJit.cpp
+++ b/Core/MIPS/ARM/ArmJit.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(ARM)
+
 #include "base/logging.h"
 #include "profiler/profiler.h"
 #include "Common/ChunkFile.h"
@@ -317,7 +320,7 @@ const u8 *ArmJit::DoJit(u32 em_address, JitBlock *b)
 	
 		js.compilerPC += 4;
 		js.numInstructions++;
-#ifndef HAVE_ARMV7
+#if !PPSSPP_ARCH(ARMV7)
 		if ((GetCodePtr() - b->checkedEntry - partialFlushOffset) > 3200)
 		{
 			// We need to prematurely flush as we are out of range
@@ -705,3 +708,5 @@ MIPSOpcode ArmJit::GetOriginalOp(MIPSOpcode op) {
 }
 
 }  // namespace
+
+#endif // PPSSPP_ARCH(ARM)
diff --git a/Core/MIPS/ARM/ArmRegCache.cpp b/Core/MIPS/ARM/ArmRegCache.cpp
index c7c7df15e..8431caadf 100644
--- a/Core/MIPS/ARM/ArmRegCache.cpp
+++ b/Core/MIPS/ARM/ArmRegCache.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(ARM)
+
 #include "Core/MemMap.h"
 #include "Core/MIPS/ARM/ArmRegCache.h"
 #include "Core/MIPS/ARM/ArmJit.h"
@@ -632,3 +635,4 @@ ARMReg ArmRegCache::RPtr(MIPSGPReg mipsReg) {
 	}
 }
 
+#endif // PPSSPP_ARCH(ARM)
diff --git a/Core/MIPS/ARM64/Arm64Asm.cpp b/Core/MIPS/ARM64/Arm64Asm.cpp
index 2b6c091cd..291e73e78 100644
--- a/Core/MIPS/ARM64/Arm64Asm.cpp
+++ b/Core/MIPS/ARM64/Arm64Asm.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(ARM64)
+
 #include "base/logging.h"
 
 #include "Core/MemMap.h"
@@ -324,3 +327,5 @@ void Arm64Jit::GenerateFixedCode(const JitOptions &jo) {
 }
 
 }  // namespace MIPSComp
+
+#endif // PPSSPP_ARCH(ARM64)
diff --git a/Core/MIPS/ARM64/Arm64CompALU.cpp b/Core/MIPS/ARM64/Arm64CompALU.cpp
index 9c9fff882..094686050 100644
--- a/Core/MIPS/ARM64/Arm64CompALU.cpp
+++ b/Core/MIPS/ARM64/Arm64CompALU.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(ARM64)
+
 #include <algorithm>
 
 #include "Core/MIPS/MIPS.h"
@@ -721,3 +724,5 @@ void Arm64Jit::Comp_MulDivType(MIPSOpcode op) {
 }
 
 }
+
+#endif // PPSSPP_ARCH(ARM64)
diff --git a/Core/MIPS/ARM64/Arm64CompBranch.cpp b/Core/MIPS/ARM64/Arm64CompBranch.cpp
index 5e4f1f10d..0692e88f5 100644
--- a/Core/MIPS/ARM64/Arm64CompBranch.cpp
+++ b/Core/MIPS/ARM64/Arm64CompBranch.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(ARM64)
+
 #include "profiler/profiler.h"
 
 #include "Core/Reporting.h"
@@ -622,3 +625,5 @@ void Arm64Jit::Comp_Break(MIPSOpcode op)
 }
 
 }   // namespace Mipscomp
+
+#endif // PPSSPP_ARCH(ARM64)
diff --git a/Core/MIPS/ARM64/Arm64CompFPU.cpp b/Core/MIPS/ARM64/Arm64CompFPU.cpp
index d34f8333c..bab68ca30 100644
--- a/Core/MIPS/ARM64/Arm64CompFPU.cpp
+++ b/Core/MIPS/ARM64/Arm64CompFPU.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(ARM64)
+
 #include "Core/Config.h"
 #include "Core/MemMap.h"
 #include "Core/MIPS/MIPS.h"
@@ -400,3 +403,5 @@ void Arm64Jit::Comp_mxc1(MIPSOpcode op)
 }
 
 }	// namespace MIPSComp
+
+#endif // PPSSPP_ARCH(ARM64)
diff --git a/Core/MIPS/ARM64/Arm64CompLoadStore.cpp b/Core/MIPS/ARM64/Arm64CompLoadStore.cpp
index 8e7e3f45c..9925129b4 100644
--- a/Core/MIPS/ARM64/Arm64CompLoadStore.cpp
+++ b/Core/MIPS/ARM64/Arm64CompLoadStore.cpp
@@ -36,6 +36,8 @@
 // Also, if we kept track of the likely register content of a cached register,
 // (pointer or data), we could avoid many BIC instructions.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(ARM64)
 
 #include "Core/MemMap.h"
 #include "Core/Config.h"
@@ -468,3 +470,5 @@ namespace MIPSComp {
 		}
 	}
 }
+
+#endif // PPSSPP_ARCH(ARM64)
diff --git a/Core/MIPS/ARM64/Arm64CompReplace.cpp b/Core/MIPS/ARM64/Arm64CompReplace.cpp
index d44beb7d9..937e2f5b6 100644
--- a/Core/MIPS/ARM64/Arm64CompReplace.cpp
+++ b/Core/MIPS/ARM64/Arm64CompReplace.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(ARM64)
+
 #include "Common/CPUDetect.h"
 #include "Core/MemMap.h"
 #include "Core/MIPS/JitCommon/JitCommon.h"
@@ -29,4 +32,6 @@ int Arm64Jit::Replace_fabsf() {
 	return 4;  // Number of instructions in the MIPS function
 }
 
-}
\ No newline at end of file
+}
+
+#endif // PPSSPP_ARCH(ARM64)
diff --git a/Core/MIPS/ARM64/Arm64CompVFPU.cpp b/Core/MIPS/ARM64/Arm64CompVFPU.cpp
index 3cd5f03d7..964be5560 100644
--- a/Core/MIPS/ARM64/Arm64CompVFPU.cpp
+++ b/Core/MIPS/ARM64/Arm64CompVFPU.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(ARM64)
+
 #include <cmath>
 #include "math/math_util.h"
 
@@ -1977,3 +1980,5 @@ namespace MIPSComp {
 		DISABLE;
 	}
 }
+
+#endif // PPSSPP_ARCH(ARM64)
diff --git a/Core/MIPS/ARM64/Arm64Jit.cpp b/Core/MIPS/ARM64/Arm64Jit.cpp
index 3bbbb388d..4184ca83d 100644
--- a/Core/MIPS/ARM64/Arm64Jit.cpp
+++ b/Core/MIPS/ARM64/Arm64Jit.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(ARM64)
+
 #include "base/logging.h"
 #include "profiler/profiler.h"
 #include "Common/ChunkFile.h"
@@ -663,3 +666,5 @@ MIPSOpcode Arm64Jit::GetOriginalOp(MIPSOpcode op) {
 }
 
 }  // namespace
+
+#endif // PPSSPP_ARCH(ARM64)
diff --git a/Core/MIPS/ARM64/Arm64RegCache.cpp b/Core/MIPS/ARM64/Arm64RegCache.cpp
index 5739e56d5..53d07ec05 100644
--- a/Core/MIPS/ARM64/Arm64RegCache.cpp
+++ b/Core/MIPS/ARM64/Arm64RegCache.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(ARM64)
+
 #include "base/logging.h"
 #include "Core/MemMap.h"
 #include "Core/MIPS/ARM64/Arm64RegCache.h"
@@ -802,3 +805,5 @@ ARM64Reg Arm64RegCache::RPtr(MIPSGPReg mipsReg) {
 		return INVALID_REG;  // BAAAD
 	}
 }
+
+#endif // PPSSPP_ARCH(ARM64)
diff --git a/Core/MIPS/ARM64/Arm64RegCacheFPU.cpp b/Core/MIPS/ARM64/Arm64RegCacheFPU.cpp
index 24be12854..7f5980c39 100644
--- a/Core/MIPS/ARM64/Arm64RegCacheFPU.cpp
+++ b/Core/MIPS/ARM64/Arm64RegCacheFPU.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(ARM64)
+
 #include <cstring>
 
 #include "base/logging.h"
@@ -526,3 +529,5 @@ ARM64Reg Arm64RegCacheFPU::R(int mipsReg) {
 		return INVALID_REG;  // BAAAD
 	}
 }
+
+#endif // PPSSPP_ARCH(ARM64)
diff --git a/Core/MIPS/JitCommon/JitCommon.cpp b/Core/MIPS/JitCommon/JitCommon.cpp
index 0a1acd822..c3764fce5 100644
--- a/Core/MIPS/JitCommon/JitCommon.cpp
+++ b/Core/MIPS/JitCommon/JitCommon.cpp
@@ -28,13 +28,13 @@
 #include "Core/MIPS/JitCommon/JitState.h"
 #include "Core/MIPS/IR/IRJit.h"
 
-#if defined(ARM)
+#if PPSSPP_ARCH(ARM)
 #include "../ARM/ArmJit.h"
-#elif defined(ARM64)
+#elif PPSSPP_ARCH(ARM64)
 #include "../ARM64/Arm64Jit.h"
-#elif defined(_M_IX86) || defined(_M_X64)
+#elif PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
 #include "../x86/Jit.h"
-#elif defined(MIPS)
+#elif PPSSPP_ARCH(MIPS)
 #include "../MIPS/MipsJit.h"
 #else
 #include "../fake/FakeJit.h"
@@ -47,13 +47,13 @@ namespace MIPSComp {
 	}
 
 	JitInterface *CreateNativeJit(MIPSState *mips) {
-#if defined(ARM)
+#if PPSSPP_ARCH(ARM)
 		return new MIPSComp::ArmJit(mips);
-#elif defined(ARM64)
+#elif PPSSPP_ARCH(ARM64)
 		return new MIPSComp::Arm64Jit(mips);
-#elif defined(_M_IX86) || defined(_M_X64)
+#elif PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
 		return new MIPSComp::Jit(mips);
-#elif defined(MIPS)
+#elif PPSSPP_ARCH(MIPS)
 		return new MIPSComp::MipsJit(mips);
 #else
 		return new MIPSComp::FakeJit(mips);
@@ -61,11 +61,11 @@ namespace MIPSComp {
 	}
 
 }
-#if (defined(_M_IX86) || defined(_M_X64)) && defined(_WIN32)
+#if PPSSPP_PLATFORM(WINDOWS)
 #define DISASM_ALL 1
 #endif
 
-#if defined(ARM) || defined(DISASM_ALL)
+#if PPSSPP_ARCH(ARM) || defined(DISASM_ALL)
 // We compile this for x86 as well because it may be useful when developing the ARM JIT on a PC.
 std::vector<std::string> DisassembleArm2(const u8 *data, int size) {
 	std::vector<std::string> lines;
@@ -114,7 +114,7 @@ std::string AddAddress(const std::string &buf, uint64_t addr) {
 	return std::string(buf2) + " " + buf;
 }
 
-#if defined(ARM64) || defined(DISASM_ALL)
+#if PPSSPP_ARCH(ARM64) || defined(DISASM_ALL)
 
 static bool Arm64SymbolCallback(char *buffer, int bufsize, uint8_t *address) {
 	if (MIPSComp::jit) {
@@ -173,7 +173,7 @@ std::vector<std::string> DisassembleArm64(const u8 *data, int size) {
 }
 #endif
 
-#if defined(_M_IX86) || defined(_M_X64)
+#if PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
 
 const char *ppsspp_resolver(struct ud*,
 	uint64_t addr,
@@ -220,11 +220,7 @@ std::vector<std::string> DisassembleX86(const u8 *data, int size) {
 	std::vector<std::string> lines;
 	ud_t ud_obj;
 	ud_init(&ud_obj);
-#ifdef _M_X64
-	ud_set_mode(&ud_obj, 64);
-#else
-	ud_set_mode(&ud_obj, 32);
-#endif
+	ud_set_mode(&ud_obj, sizeof(void*) * 8);
 	ud_set_pc(&ud_obj, (intptr_t)data);
 	ud_set_vendor(&ud_obj, UD_VENDOR_ANY);
 	ud_set_syntax(&ud_obj, UD_SYN_INTEL);
diff --git a/Core/MIPS/MIPS/MipsJit.cpp b/Core/MIPS/MIPS/MipsJit.cpp
index 915200418..88b859409 100644
--- a/Core/MIPS/MIPS/MipsJit.cpp
+++ b/Core/MIPS/MIPS/MipsJit.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(MIPS)
+
 #include "base/logging.h"
 #include "profiler/profiler.h"
 #include "Common/ChunkFile.h"
@@ -358,3 +361,5 @@ void MipsJit::WriteSyscallExit()
 // mov dreg, [eax+offreg]
 	
 }
+
+#endif // PPSSPP_ARCH(MIPS)
diff --git a/Core/MIPS/x86/Asm.cpp b/Core/MIPS/x86/Asm.cpp
index 4793c2b72..f98b38dca 100644
--- a/Core/MIPS/x86/Asm.cpp
+++ b/Core/MIPS/x86/Asm.cpp
@@ -15,6 +15,9 @@
 // Official SVN repository and contact information can be found at
 // http://code.google.com/p/dolphin-emu/
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
+
 #include "math/math_util.h"
 
 #include "ABI.h"
@@ -223,4 +226,6 @@ void Jit::GenerateFixedCode(JitOptions &jo) {
 	EndWrite();
 }
 
-}  // namespace
\ No newline at end of file
+}  // namespace
+
+#endif // PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
diff --git a/Core/MIPS/x86/CompALU.cpp b/Core/MIPS/x86/CompALU.cpp
index f4b33c71d..6019d82d7 100644
--- a/Core/MIPS/x86/CompALU.cpp
+++ b/Core/MIPS/x86/CompALU.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
+
 #include "Core/MIPS/MIPSCodeUtils.h"
 #include "Core/MIPS/x86/Jit.h"
 #include "Core/MIPS/x86/RegCache.h"
@@ -1123,4 +1126,6 @@ namespace MIPSComp
 			DISABLE;
 		}
 	}
-}
+} 
+
+#endif // PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
diff --git a/Core/MIPS/x86/CompBranch.cpp b/Core/MIPS/x86/CompBranch.cpp
index 246b2f7aa..e388eefa2 100644
--- a/Core/MIPS/x86/CompBranch.cpp
+++ b/Core/MIPS/x86/CompBranch.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
+
 #include "profiler/profiler.h"
 
 #include "Core/Reporting.h"
@@ -805,3 +808,5 @@ void Jit::Comp_Break(MIPSOpcode op)
 }
 
 }	 // namespace Mipscomp
+
+#endif // PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
diff --git a/Core/MIPS/x86/CompFPU.cpp b/Core/MIPS/x86/CompFPU.cpp
index e90452afe..0bd6366cf 100644
--- a/Core/MIPS/x86/CompFPU.cpp
+++ b/Core/MIPS/x86/CompFPU.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
+
 #include "Core/Config.h"
 #include "Core/MemMap.h"
 #include "Common/Common.h"
@@ -451,3 +454,5 @@ void Jit::Comp_mxc1(MIPSOpcode op) {
 }
 
 }	// namespace MIPSComp
+
+#endif // PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
diff --git a/Core/MIPS/x86/CompLoadStore.cpp b/Core/MIPS/x86/CompLoadStore.cpp
index fbbf4b090..45a94e218 100644
--- a/Core/MIPS/x86/CompLoadStore.cpp
+++ b/Core/MIPS/x86/CompLoadStore.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
+
 #include "Core/MemMap.h"
 #include "Core/MIPS/MIPSAnalyst.h"
 #include "Core/Config.h"
@@ -402,3 +405,5 @@ namespace MIPSComp {
 		DISABLE;
 	}
 }
+
+#endif // PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
diff --git a/Core/MIPS/x86/CompReplace.cpp b/Core/MIPS/x86/CompReplace.cpp
index b6ac76a43..27a22d123 100644
--- a/Core/MIPS/x86/CompReplace.cpp
+++ b/Core/MIPS/x86/CompReplace.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
+
 #include "Core/MemMap.h"
 #include "Core/MIPS/JitCommon/JitCommon.h"
 #include "Core/MIPS/x86/RegCache.h"
@@ -35,3 +38,5 @@ int Jit::Replace_fabsf() {
 }
 
 }
+
+#endif // PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
diff --git a/Core/MIPS/x86/CompVFPU.cpp b/Core/MIPS/x86/CompVFPU.cpp
index a4b60e26c..2db740a9f 100644
--- a/Core/MIPS/x86/CompVFPU.cpp
+++ b/Core/MIPS/x86/CompVFPU.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
+
 #include <cmath>
 #include <limits>
 #include <xmmintrin.h>
@@ -3543,3 +3546,5 @@ void Jit::Comp_ColorConv(MIPSOpcode op) {
 
 }
 }
+
+#endif // PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
diff --git a/Core/MIPS/x86/IRToX86.cpp b/Core/MIPS/x86/IRToX86.cpp
index 7b36504d7..f543025cd 100644
--- a/Core/MIPS/x86/IRToX86.cpp
+++ b/Core/MIPS/x86/IRToX86.cpp
@@ -1,3 +1,6 @@
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
+
 #include "Core/MIPS/x86/IRToX86.h"
 
 namespace MIPSComp {
@@ -291,4 +294,6 @@ void IRToX86::ConvertIRToNative(const IRInst *instructions, int count, const u32
 	}
 
 
-}  // namespace
\ No newline at end of file
+}  // namespace
+
+#endif // PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
diff --git a/Core/MIPS/x86/Jit.cpp b/Core/MIPS/x86/Jit.cpp
index 19bf30b2a..9e087bfd8 100644
--- a/Core/MIPS/x86/Jit.cpp
+++ b/Core/MIPS/x86/Jit.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
+
 #include <algorithm>
 #include <iterator>
 
@@ -860,3 +863,5 @@ MIPSOpcode Jit::GetOriginalOp(MIPSOpcode op) {
 }
 
 } // namespace
+
+#endif // PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
diff --git a/Core/MIPS/x86/Jit.h b/Core/MIPS/x86/Jit.h
index 6e3a10d86..51e8791d9 100644
--- a/Core/MIPS/x86/Jit.h
+++ b/Core/MIPS/x86/Jit.h
@@ -21,10 +21,6 @@
 #include "Common/Thunk.h"
 #include "Common/x64Emitter.h"
 
-#if defined(ARM)
-#error DO NOT BUILD X86 JIT ON ARM
-#endif
-
 #include "Common/x64Emitter.h"
 #include "Core/MIPS/JitCommon/JitBlockCache.h"
 #include "Core/MIPS/JitCommon/JitState.h"
diff --git a/Core/MIPS/x86/JitSafeMem.cpp b/Core/MIPS/x86/JitSafeMem.cpp
index afc604c62..95f74ad35 100644
--- a/Core/MIPS/x86/JitSafeMem.cpp
+++ b/Core/MIPS/x86/JitSafeMem.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
+
 #include "Core/Config.h"
 #include "Core/Debugger/Breakpoints.h"
 #include "Core/MemMap.h"
@@ -529,3 +532,5 @@ void JitSafeMemFuncs::StartDirectAccess() {
 }
 
 };
+
+#endif // PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
diff --git a/Core/MIPS/x86/RegCache.cpp b/Core/MIPS/x86/RegCache.cpp
index 5a48b290f..453c367dd 100644
--- a/Core/MIPS/x86/RegCache.cpp
+++ b/Core/MIPS/x86/RegCache.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
+
 #include <cstring>
 
 #include "Common/x64Emitter.h"
@@ -441,3 +444,5 @@ void GPRRegCache::RestoreState(const GPRRegCacheState& state) {
 	memcpy(regs, state.regs, sizeof(regs));
 	memcpy(xregs, state.xregs, sizeof(xregs));
 }
+
+#endif // PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
diff --git a/Core/MIPS/x86/RegCacheFPU.cpp b/Core/MIPS/x86/RegCacheFPU.cpp
index 60b32031d..771501154 100644
--- a/Core/MIPS/x86/RegCacheFPU.cpp
+++ b/Core/MIPS/x86/RegCacheFPU.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
+
 #include <cstring>
 #include <xmmintrin.h>
 
@@ -1101,3 +1104,5 @@ void FPURegCache::RestoreState(const FPURegCacheState& state) {
 	memcpy(xregs, state.xregs, sizeof(xregs));
 	pendingFlush = true;
 }
+
+#endif // PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
diff --git a/Core/MemMap.cpp b/Core/MemMap.cpp
index 2e81ddd3b..92a25c6d8 100644
--- a/Core/MemMap.cpp
+++ b/Core/MemMap.cpp
@@ -17,6 +17,7 @@
 
 #include <algorithm>
 
+#include "ppsspp_config.h"
 #include "base/mutex.h"
 #include "Common/Common.h"
 #include "Common/MemoryUtil.h"
@@ -118,7 +119,7 @@ static MemoryView views[] =
 static const int num_views = sizeof(views) / sizeof(MemoryView);
 
 inline static bool CanIgnoreView(const MemoryView &view) {
-#ifdef _ARCH_32
+#if PPSSPP_ARCH(32BIT)
 	// Basically, 32-bit platforms can ignore views that are masked out anyway.
 	return (view.flags & MV_MIRROR_PREVIOUS) && (view.virtual_address & ~MEMVIEW32_MASK) != 0;
 #else
@@ -175,7 +176,7 @@ static bool Memory_TryBase(u32 flags) {
 			if (!*view.out_ptr_low)
 				goto bail;
 		}
-#if defined(_ARCH_64)
+#if PPSSPP_ARCH(64BIT)
 		*view.out_ptr = (u8*)g_arena.CreateView(
 			position, view.size, base + view.virtual_address);
 #else
diff --git a/Core/MemMap.h b/Core/MemMap.h
index cc65de36f..85648cf8a 100644
--- a/Core/MemMap.h
+++ b/Core/MemMap.h
@@ -17,6 +17,8 @@
 
 #pragma once
 
+#include "ppsspp_config.h"
+
 #include <cstring>
 #ifndef offsetof
 #include <stddef.h>
@@ -27,10 +29,6 @@
 #include "Common/CommonTypes.h"
 #include "Core/Opcode.h"
 
-#if defined(_M_IX86) && !defined(_ARCH_32)
-#error Make sure _ARCH_32 is defined correctly.
-#endif
-
 // PPSSPP is very aggressive about trying to do memory accesses directly, for speed.
 // This can be a problem when debugging though, as stray memory reads and writes will
 // crash the whole emulator.
@@ -94,7 +92,7 @@ enum
 
 	SCRATCHPAD_SIZE = 0x00004000,
 
-#ifdef _ARCH_32
+#if PPSSPP_ARCH(32BIT)
 	// This wraparound should work for PSP too.
 	MEMVIEW32_MASK  = 0x3FFFFFFF,
 #endif
@@ -160,7 +158,7 @@ u64 Read_U64(const u32 _Address);
 #endif
 
 inline u8* GetPointerUnchecked(const u32 address) {
-#ifdef _ARCH_32
+#if PPSSPP_ARCH(32BIT)
 	return (u8 *)(base + (address & MEMVIEW32_MASK));
 #else
 	return (u8 *)(base + address);
@@ -178,7 +176,7 @@ void WriteUnchecked_U32(const u32 _Data, const u32 _Address);
 #else
 
 inline u32 ReadUnchecked_U32(const u32 address) {
-#ifdef _ARCH_32
+#if PPSSPP_ARCH(32BIT)
 	return *(u32_le *)(base + (address & MEMVIEW32_MASK));
 #else
 	return *(u32_le *)(base + address);
@@ -186,7 +184,7 @@ inline u32 ReadUnchecked_U32(const u32 address) {
 }
 
 inline float ReadUnchecked_Float(const u32 address) {
-#ifdef _ARCH_32
+#if PPSSPP_ARCH(32BIT)
 	return *(float *)(base + (address & MEMVIEW32_MASK));
 #else
 	return *(float *)(base + address);
@@ -194,7 +192,7 @@ inline float ReadUnchecked_Float(const u32 address) {
 }
 
 inline u16 ReadUnchecked_U16(const u32 address) {
-#ifdef _ARCH_32
+#if PPSSPP_ARCH(32BIT)
 	return *(u16_le *)(base + (address & MEMVIEW32_MASK));
 #else
 	return *(u16_le *)(base + address);
@@ -202,7 +200,7 @@ inline u16 ReadUnchecked_U16(const u32 address) {
 }
 
 inline u8 ReadUnchecked_U8(const u32 address) {
-#ifdef _ARCH_32
+#if PPSSPP_ARCH(32BIT)
 	return (*(u8 *)(base + (address & MEMVIEW32_MASK))); 
 #else
 	return (*(u8 *)(base + address));
@@ -210,7 +208,7 @@ inline u8 ReadUnchecked_U8(const u32 address) {
 }
 
 inline void WriteUnchecked_U32(u32 data, u32 address) {
-#ifdef _ARCH_32
+#if PPSSPP_ARCH(32BIT)
 	*(u32_le *)(base + (address & MEMVIEW32_MASK)) = data;
 #else
 	*(u32_le *)(base + address) = data;
@@ -218,7 +216,7 @@ inline void WriteUnchecked_U32(u32 data, u32 address) {
 }
 
 inline void WriteUnchecked_Float(float data, u32 address) {
-#ifdef _ARCH_32
+#if PPSSPP_ARCH(32BIT)
 	*(float *)(base + (address & MEMVIEW32_MASK)) = data;
 #else
 	*(float *)(base + address) = data;
@@ -226,7 +224,7 @@ inline void WriteUnchecked_Float(float data, u32 address) {
 }
 
 inline void WriteUnchecked_U16(u16 data, u32 address) {
-#ifdef _ARCH_32
+#if PPSSPP_ARCH(32BIT)
 	*(u16_le *)(base + (address & MEMVIEW32_MASK)) = data;
 #else
 	*(u16_le *)(base + address) = data;
@@ -234,7 +232,7 @@ inline void WriteUnchecked_U16(u16 data, u32 address) {
 }
 
 inline void WriteUnchecked_U8(u8 data, u32 address) {
-#ifdef _ARCH_32
+#if PPSSPP_ARCH(32BIT)
 	(*(u8 *)(base + (address & MEMVIEW32_MASK))) = data;
 #else
 	(*(u8 *)(base + address)) = data;
@@ -341,7 +339,7 @@ struct PSPPointer
 
 	inline T &operator*() const
 	{
-#ifdef _ARCH_32
+#if PPSSPP_ARCH(32BIT)
 		return *(T *)(Memory::base + (ptr & Memory::MEMVIEW32_MASK));
 #else
 		return *(T *)(Memory::base + ptr);
@@ -350,7 +348,7 @@ struct PSPPointer
 
 	inline T &operator[](int i) const
 	{
-#ifdef _ARCH_32
+#if PPSSPP_ARCH(32BIT)
 		return *((T *)(Memory::base + (ptr & Memory::MEMVIEW32_MASK)) + i);
 #else
 		return *((T *)(Memory::base + ptr) + i);
@@ -359,7 +357,7 @@ struct PSPPointer
 
 	inline T *operator->() const
 	{
-#ifdef _ARCH_32
+#if PPSSPP_ARCH(32BIT)
 		return (T *)(Memory::base + (ptr & Memory::MEMVIEW32_MASK));
 #else
 		return (T *)(Memory::base + ptr);
@@ -428,7 +426,7 @@ struct PSPPointer
 
 	inline operator T*()
 	{
-#ifdef _ARCH_32
+#if PPSSPP_ARCH(32BIT)
 		return (T *)(Memory::base + (ptr & Memory::MEMVIEW32_MASK));
 #else
 		return (T *)(Memory::base + ptr);
@@ -437,7 +435,7 @@ struct PSPPointer
 
 	inline operator const T*() const
 	{
-#ifdef _ARCH_32
+#if PPSSPP_ARCH(32BIT)
 		return (const T *)(Memory::base + (ptr & Memory::MEMVIEW32_MASK));
 #else
 		return (const T *)(Memory::base + ptr);
diff --git a/Core/Util/AudioFormat.cpp b/Core/Util/AudioFormat.cpp
index 302de64e0..3d67c331e 100644
--- a/Core/Util/AudioFormat.cpp
+++ b/Core/Util/AudioFormat.cpp
@@ -16,6 +16,7 @@
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
 #include "Common/Common.h"
+#include "Common/CPUDetect.h"
 #include "Core/Util/AudioFormat.h"
 #include "Core/Util/AudioFormatNEON.h"
 #include "Globals.h"
@@ -94,7 +95,7 @@ AdjustVolumeBlockFunc AdjustVolumeBlock = &AdjustVolumeBlockStandard;
 
 // This has to be done after CPUDetect has done its magic.
 void SetupAudioFormats() {
-#ifdef HAVE_ARMV7
+#if PPSSPP_ARCH(ARMV7) && PPSSPP_ARCH(ARM_NEON)
 	if (cpu_info.bNEON) {
 		AdjustVolumeBlock = &AdjustVolumeBlockNEON;
 	}
diff --git a/Core/Util/AudioFormat.h b/Core/Util/AudioFormat.h
index 077fadbeb..4f23dcf07 100644
--- a/Core/Util/AudioFormat.h
+++ b/Core/Util/AudioFormat.h
@@ -17,11 +17,12 @@
 
 #pragma once
 
+#include "ppsspp_config.h"
 #include "Common/Common.h"
 #include "Globals.h"
 
 static inline s16 ApplySampleVolume(s16 sample, int vol) {
-#ifdef ARM
+#if PPSSPP_ARCH(ARM)
 	register int r;
 	asm volatile("smulwb %0, %1, %2\n\t" \
 	             "ssat %0, #16, %0" \
diff --git a/Core/Util/AudioFormatNEON.cpp b/Core/Util/AudioFormatNEON.cpp
index 3dd73dee6..0cb2a3e14 100644
--- a/Core/Util/AudioFormatNEON.cpp
+++ b/Core/Util/AudioFormatNEON.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(ARM_NEON)
+
 #include <arm_neon.h>
 #include "Common/Common.h"
 #include "Core/Util/AudioFormat.h"
@@ -56,4 +59,6 @@ void AdjustVolumeBlockNEON(s16 *out, s16 *in, size_t size, int leftVol, int righ
 		out[i] = ApplySampleVolume(in[i], leftVol);
 		out[i + 1] = ApplySampleVolume(in[i + 1], rightVol);
 	}
-}
\ No newline at end of file
+}
+
+#endif // PPSSPP_ARCH(ARM_NEON)
diff --git a/GPU/Common/SplineCommon.cpp b/GPU/Common/SplineCommon.cpp
index a35224be5..7443bebaf 100644
--- a/GPU/Common/SplineCommon.cpp
+++ b/GPU/Common/SplineCommon.cpp
@@ -21,6 +21,7 @@
 #include "profiler/profiler.h"
 
 #include "Common/CPUDetect.h"
+#include "Common/MemoryUtil.h"
 #include "Core/Config.h"
 
 #include "GPU/Common/SplineCommon.h"
diff --git a/GPU/Common/TextureDecoder.cpp b/GPU/Common/TextureDecoder.cpp
index bb0afee36..6d2326ada 100644
--- a/GPU/Common/TextureDecoder.cpp
+++ b/GPU/Common/TextureDecoder.cpp
@@ -152,7 +152,7 @@ u32 QuickTexHashNonSSE(const void *checkp, u32 size) {
 }
 
 static u32 QuickTexHashBasic(const void *checkp, u32 size) {
-#if defined(ARM) && defined(__GNUC__)
+#if PPSSPP_ARCH(ARM) && defined(__GNUC__)
 	__builtin_prefetch(checkp, 0, 0);
 
 	u32 check;
@@ -299,7 +299,7 @@ void DoUnswizzleTex16Basic(const u8 *texptr, u32 *ydestp, int bxc, int byc, u32
 }
 
 #ifndef _M_SSE
-#ifndef ARM64
+#if !PPSSPP_ARCH(ARM64)
 QuickTexHashFunc DoQuickTexHash = &QuickTexHashBasic;
 QuickTexHashFunc StableQuickTexHash = &QuickTexHashNonSSE;
 UnswizzleTex16Func DoUnswizzleTex16 = &DoUnswizzleTex16Basic;
@@ -310,12 +310,12 @@ ReliableHash64Func DoReliableHash64 = &XXH64;
 
 // This has to be done after CPUDetect has done its magic.
 void SetupTextureDecoder() {
-#ifdef HAVE_ARMV7
+#if PPSSPP_ARCH(ARM)
 	if (cpu_info.bNEON) {
 		DoQuickTexHash = &QuickTexHashNEON;
 		StableQuickTexHash = &QuickTexHashNEON;
 		DoUnswizzleTex16 = &DoUnswizzleTex16NEON;
-#ifndef IOS
+#if !PPSSPP_PLATFORM(IOS)
 		// Not sure if this is safe on iOS, it's had issues with xxhash.
 		DoReliableHash32 = &ReliableHash32NEON;
 #endif
@@ -614,7 +614,7 @@ CheckAlphaResult CheckAlphaRGBA8888Basic(const u32 *pixelData, int stride, int w
 	if ((w & 3) == 0 && (stride & 3) == 0) {
 #ifdef _M_SSE
 		return CheckAlphaRGBA8888SSE2(pixelData, stride, w, h);
-#elif (defined(ARM) && defined(HAVE_ARMV7)) || defined(ARM64)
+#elif PPSSPP_ARCH(ARMV7) || PPSSPP_ARCH(ARM64)
 		if (cpu_info.bNEON) {
 			return CheckAlphaRGBA8888NEON(pixelData, stride, w, h);
 		}
@@ -648,7 +648,7 @@ CheckAlphaResult CheckAlphaABGR4444Basic(const u32 *pixelData, int stride, int w
 	if ((w & 7) == 0 && (stride & 7) == 0) {
 #ifdef _M_SSE
 		return CheckAlphaABGR4444SSE2(pixelData, stride, w, h);
-#elif (defined(ARM) && defined(HAVE_ARMV7)) || defined(ARM64)
+#elif PPSSPP_ARCH(ARMV7) || PPSSPP_ARCH(ARM64)
 		if (cpu_info.bNEON) {
 			return CheckAlphaABGR4444NEON(pixelData, stride, w, h);
 		}
@@ -685,7 +685,7 @@ CheckAlphaResult CheckAlphaABGR1555Basic(const u32 *pixelData, int stride, int w
 	if ((w & 7) == 0 && (stride & 7) == 0) {
 #ifdef _M_SSE
 		return CheckAlphaABGR1555SSE2(pixelData, stride, w, h);
-#elif (defined(ARM) && defined(HAVE_ARMV7)) || defined(ARM64)
+#elif PPSSPP_ARCH(ARMV7) || PPSSPP_ARCH(ARM64)
 		if (cpu_info.bNEON) {
 			return CheckAlphaABGR1555NEON(pixelData, stride, w, h);
 		}
diff --git a/GPU/Common/TextureDecoderNEON.cpp b/GPU/Common/TextureDecoderNEON.cpp
index ed0b43a02..d407d7ee5 100644
--- a/GPU/Common/TextureDecoderNEON.cpp
+++ b/GPU/Common/TextureDecoderNEON.cpp
@@ -15,15 +15,14 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(ARM_NEON)
+
 #include <arm_neon.h>
 
 #include "GPU/GPUState.h"
 #include "GPU/Common/TextureDecoder.h"
 
-#if !defined(ARM) && !defined(ARM64)
-#error Should not be compiled on non-ARM.
-#endif
-
 static const u16 MEMORY_ALIGNED16(QuickTexHashInitial[8]) = {0xc00bU, 0x9bd9U, 0x4b73U, 0xb651U, 0x4d9bU, 0x4309U, 0x0083U, 0x0001U};
 
 u32 QuickTexHashNEON(const void *checkp, u32 size) {
@@ -367,3 +366,5 @@ CheckAlphaResult CheckAlphaABGR1555NEON(const u32 *pixelData, int stride, int w,
 
 	return CHECKALPHA_FULL;
 }
+
+#endif
diff --git a/GPU/Common/VertexDecoderArm.cpp b/GPU/Common/VertexDecoderArm.cpp
index 5ba525c5a..7d7cd9977 100644
--- a/GPU/Common/VertexDecoderArm.cpp
+++ b/GPU/Common/VertexDecoderArm.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(ARM)
+
 // This allows highlighting to work.  Yay.
 #ifdef __INTELLISENSE__
 #define ARM
@@ -1608,3 +1611,5 @@ bool VertexDecoderJitCache::CompileStep(const VertexDecoder &dec, int step) {
 	}
 	return false;
 }
+
+#endif // PPSSPP_ARCH(ARM)
diff --git a/GPU/Common/VertexDecoderArm64.cpp b/GPU/Common/VertexDecoderArm64.cpp
index 83e305b78..4ac1a734d 100644
--- a/GPU/Common/VertexDecoderArm64.cpp
+++ b/GPU/Common/VertexDecoderArm64.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(ARM64)
+
 // This allows highlighting to work.  Yay.
 #ifdef __INTELLISENSE__
 #define ARM64
@@ -783,3 +786,5 @@ void VertexDecoderJitCache::Jit_WriteMatrixMul(int outOff, bool pos) {
 	}
 	fp.STUR(128, accNEON, dstReg, outOff);
 }
+
+#endif // PPSSPP_ARCH(ARM64)
diff --git a/GPU/Common/VertexDecoderCommon.cpp b/GPU/Common/VertexDecoderCommon.cpp
index 3fbd1e97e..bfae07fbf 100644
--- a/GPU/Common/VertexDecoderCommon.cpp
+++ b/GPU/Common/VertexDecoderCommon.cpp
@@ -1403,7 +1403,7 @@ std::string VertexDecoder::GetString(DebugShaderStringType stringType) {
 }
 
 VertexDecoderJitCache::VertexDecoderJitCache()
-#ifdef ARM64
+#if PPSSPP_ARCH(ARM64)
  : fp(this)
 #endif
 {
diff --git a/GPU/Common/VertexDecoderCommon.h b/GPU/Common/VertexDecoderCommon.h
index 6163951ec..57060f1fc 100644
--- a/GPU/Common/VertexDecoderCommon.h
+++ b/GPU/Common/VertexDecoderCommon.h
@@ -18,19 +18,20 @@
 #pragma once
 
 #include <cstring>
+#include "ppsspp_config.h"
 #include "base/basictypes.h"
 #include "Common/Log.h"
 #include "Common/CommonTypes.h"
 #include "Core/Reporting.h"
 #include "GPU/ge_constants.h"
 #include "GPU/Common/ShaderCommon.h"
-#ifdef ARM
+#if PPSSPP_ARCH(ARM)
 #include "Common/ArmEmitter.h"
-#elif defined(ARM64)
+#elif PPSSPP_ARCH(ARM64)
 #include "Common/Arm64Emitter.h"
-#elif defined(_M_IX86) || defined(_M_X64)
+#elif PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
 #include "Common/x64Emitter.h"
-#elif defined(MIPS)
+#elif PPSSPP_ARCH(MIPS)
 #include "Common/MipsEmitter.h"
 #else
 #include "Common/FakeEmitter.h"
@@ -602,13 +603,13 @@ public:
 // that's it!
 
 
-#ifdef ARM
+#if PPSSPP_ARCH(ARM)
 class VertexDecoderJitCache : public ArmGen::ARMXCodeBlock {
-#elif defined(ARM64)
+#elif PPSSPP_ARCH(ARM64)
 class VertexDecoderJitCache : public Arm64Gen::ARM64CodeBlock {
-#elif defined(_M_IX86) || defined(_M_X64)
+#elif PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
 class VertexDecoderJitCache : public Gen::XCodeBlock {
-#elif defined(MIPS)
+#elif PPSSPP_ARCH(MIPS)
 class VertexDecoderJitCache : public MIPSGen::MIPSCodeBlock {
 #else
 class VertexDecoderJitCache : public FakeGen::FakeXCodeBlock {
@@ -707,7 +708,7 @@ private:
 	void Jit_AnyFloatMorph(int srcoff, int dstoff);
 
 	const VertexDecoder *dec_;
-#ifdef ARM64
+#if PPSSPP_ARCH(ARM64)
 	Arm64Gen::ARM64FloatEmitter fp;
 #endif
 };
diff --git a/GPU/Common/VertexDecoderFake.cpp b/GPU/Common/VertexDecoderFake.cpp
index 5e04a02a2..1619b2ba0 100644
--- a/GPU/Common/VertexDecoderFake.cpp
+++ b/GPU/Common/VertexDecoderFake.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+//TODO: Doesn't build, FIXME!
+#if 0
+
 #include "base/logging.h"
 #include "Common/CPUDetect.h"
 #include "Core/Config.h"
@@ -270,3 +273,4 @@ bool VertexDecoderJitCache::CompileStep(const VertexDecoder &dec, int step) {
 	return false;
 }
 
+#endif
diff --git a/GPU/Common/VertexDecoderX86.cpp b/GPU/Common/VertexDecoderX86.cpp
index 8afaaa80f..0ba4a81c7 100644
--- a/GPU/Common/VertexDecoderX86.cpp
+++ b/GPU/Common/VertexDecoderX86.cpp
@@ -15,6 +15,9 @@
 // Official git repository and contact information can be found at
 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
 
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
+
 #include <emmintrin.h>
 
 #include "Common/CPUDetect.h"
@@ -1626,3 +1629,5 @@ bool VertexDecoderJitCache::CompileStep(const VertexDecoder &dec, int step) {
 	}
 	return false;
 }
+
+#endif // PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
diff --git a/Globals.h b/Globals.h
index 356744660..23c61a3d3 100644
--- a/Globals.h
+++ b/Globals.h
@@ -23,6 +23,7 @@
 #include <string>
 #include <utility>
 
+#include "ppsspp_config.h"
 #include "Log.h"
 
 #include "CommonTypes.h"
@@ -31,7 +32,7 @@
 #define IS_BIG_ENDIAN (*(const u16 *)"\0\xff" < 0x100)
 
 static inline u8 clamp_u8(int i) {
-#ifdef ARM
+#if PPSSPP_ARCH(ARM)
 	asm("usat %0, #8, %1" : "=r"(i) : "r"(i));
 #else
 	if (i > 255)
@@ -43,7 +44,7 @@ static inline u8 clamp_u8(int i) {
 }
 
 static inline s16 clamp_s16(int i) {
-#ifdef ARM
+#if PPSSPP_ARCH(ARM)
 	asm("ssat %0, #16, %1" : "=r"(i) : "r"(i));
 #else
 	if (i > 32767)
diff --git a/UI/DevScreens.cpp b/UI/DevScreens.cpp
index 267b54fd9..326217687 100644
--- a/UI/DevScreens.cpp
+++ b/UI/DevScreens.cpp
@@ -298,15 +298,15 @@ void LogLevelScreen::OnCompleted(DialogResult result) {
 }
 
 const char *GetCompilerABI() {
-#ifdef HAVE_ARMV7
+#if PPSSPP_ARCH(ARMV7)
 	return "armeabi-v7a";
-#elif defined(ARM)
+#elif PPSSPP_ARCH(ARM)
 	return "armeabi";
-#elif defined(ARM64)
+#elif PPSSPP_ARCH(ARM64)
 	return "arm64";
-#elif defined(_M_IX86)
+#elif PPSSPP_ARCH(X86)
 	return "x86";
-#elif defined(_M_X64)
+#elif PPSSPP_ARCH(AMD64)
 	return "x86-64";
 #else
 	return "other";
diff --git a/cmake/Toolchains/ios.cmake b/cmake/Toolchains/ios.cmake
index 66a34186d..aec662343 100644
--- a/cmake/Toolchains/ios.cmake
+++ b/cmake/Toolchains/ios.cmake
@@ -14,7 +14,6 @@ set(MOBILE_DEVICE ON)
 set(USING_GLES2 ON)
 set(IPHONEOS_DEPLOYMENT_TARGET 6.0)
 add_definitions(
-  -DIOS
   -DGL_ETC1_RGB8_OES=0
   -U__STRICT_ANSI__
 )
diff --git a/cmake/Toolchains/raspberry.armv6.cmake b/cmake/Toolchains/raspberry.armv6.cmake
index dfa54f958..8b05f08e7 100644
--- a/cmake/Toolchains/raspberry.armv6.cmake
+++ b/cmake/Toolchains/raspberry.armv6.cmake
@@ -13,7 +13,7 @@ link_directories(
 )
 
 add_definitions(
-  -DRPI
+  -DPPSSPP_PLATFORM_RPI=1
 )
 
 set(ARCH_FLAGS "-mfpu=vfp -march=armv6j -mfloat-abi=hard")
diff --git a/cmake/Toolchains/raspberry.armv7.cmake b/cmake/Toolchains/raspberry.armv7.cmake
index c3f9143cd..761782947 100644
--- a/cmake/Toolchains/raspberry.armv7.cmake
+++ b/cmake/Toolchains/raspberry.armv7.cmake
@@ -13,7 +13,7 @@ link_directories(
 )
 
 add_definitions(
-  -DRPI
+  -DPPSSPP_PLATFORM_RPI=1
   -U__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
 )
 
diff --git a/ext/native/base/PCMain.cpp b/ext/native/base/PCMain.cpp
index 3ab48be81..544e5df56 100644
--- a/ext/native/base/PCMain.cpp
+++ b/ext/native/base/PCMain.cpp
@@ -22,7 +22,7 @@
 SDLJoystick *joystick = NULL;
 #endif
 
-#ifdef RPI
+#if PPSSPP_PLATFORM(RPI)
 #include <bcm_host.h>
 #endif
 
@@ -410,7 +410,7 @@ void ToggleFullScreenIfFlagSet() {
 #undef main
 #endif
 int main(int argc, char *argv[]) {
-#ifdef RPI
+#if PPSSPP_PLATFORM(RPI)
 	bcm_host_init();
 #endif
 	putenv((char*)"SDL_VIDEO_CENTERED=1");
@@ -924,7 +924,7 @@ int main(int argc, char *argv[]) {
 	SDL_GL_DeleteContext(glContext);
 	SDL_Quit();
 	net::Shutdown();
-#ifdef RPI
+#if PPSSPP_PLATFORM(RPI)
 	bcm_host_deinit();
 #endif
 
diff --git a/ext/native/base/basictypes.h b/ext/native/base/basictypes.h
index 3b3499179..de6d86e3f 100644
--- a/ext/native/base/basictypes.h
+++ b/ext/native/base/basictypes.h
@@ -51,22 +51,8 @@ inline uint8_t swap8(uint8_t _data) {return _data;}
 inline uint16_t swap16(uint16_t _data) {return _byteswap_ushort(_data);}
 inline uint32_t swap32(uint32_t _data) {return _byteswap_ulong (_data);}
 inline uint64_t swap64(uint64_t _data) {return _byteswap_uint64(_data);}
-#elif defined(ARM)
-inline uint16_t swap16 (uint16_t _data) { uint32_t data = _data; __asm__ ("rev16 %0, %1\n" : "=l" (data) : "l" (data)); return (uint16_t)data;} 
-inline uint32_t swap32 (uint32_t _data) {__asm__ ("rev %0, %1\n" : "=l" (_data) : "l" (_data)); return _data;}
-inline uint64_t swap64(uint64_t _data) {return ((uint64_t)swap32(_data) << 32) | swap32(_data >> 32);}
-#elif __linux__ && !defined(__ANDROID__)
-#include <byteswap.h>
-inline uint16_t swap16(uint16_t _data) {return bswap_16(_data);}
-inline uint32_t swap32(uint32_t _data) {return bswap_32(_data);}
-inline uint64_t swap64(uint64_t _data) {return bswap_64(_data);}
-#elif defined(__DragonFly__) || defined(__FreeBSD__)
-#include <sys/endian.h>
-inline uint16_t swap16(uint16_t _data) {return bswap16(_data);}
-inline uint32_t swap32(uint32_t _data) {return bswap32(_data);}
-inline uint64_t swap64(uint64_t _data) {return bswap64(_data);}
 #elif defined(__GNUC__)
-inline uint16_t swap16(uint16_t _data) {return (_data >> 8) | (_data << 8);}
+inline uint16_t swap16(uint16_t _data) {return __builtin_bswap16(_data);}
 inline uint32_t swap32(uint32_t _data) {return __builtin_bswap32(_data);}
 inline uint64_t swap64(uint64_t _data) {return __builtin_bswap64(_data);}
 #else
diff --git a/ext/native/math/fast/fast_matrix_neon.S b/ext/native/math/fast/fast_matrix_neon.S
index 3b5d93084..813b78847 100644
--- a/ext/native/math/fast/fast_matrix_neon.S
+++ b/ext/native/math/fast/fast_matrix_neon.S
@@ -1,3 +1,6 @@
+#include "ppsspp_config.h"
+#if PPSSPP_ARCH(ARM) && PPSSPP_ARCH(ARM_NEON)
+
 	.syntax unified		// Allow both ARM and Thumb-2 instructions
 	.text
 	.align 2		// Align the function code to a 4-byte (2^n) word boundary.
@@ -48,3 +51,4 @@ fast_matrix_mul_4x4_neon:
     vst1.32     {d28-d31}, [r0]!            @ store second eight elements of result
 	bx lr
 
+#endif
diff --git a/ppsspp_config.h b/ppsspp_config.h
new file mode 100644
index 000000000..3825a622b
--- /dev/null
+++ b/ppsspp_config.h
@@ -0,0 +1,103 @@
+#pragma once
+
+// This file is included by C, C++ and ASM files
+// So do not output any token!
+
+#define PPSSPP_ARCH(PPSSPP_FEATURE) (PPSSPP_ARCH_##PPSSPP_FEATURE)
+#define PPSSPP_PLATFORM(PPSSPP_FEATURE) (PPSSPP_PLATFORM_##PPSSPP_FEATURE)
+
+// ARCH defines
+#if defined(_M_IX86) || defined(__i386__)
+    #define PPSSPP_ARCH_X86 1
+    #define PPSSPP_ARCH_32BIT 1
+    //TODO: Remove this compat define
+    #ifndef _M_IX86
+        #define _M_IX86 600
+    #endif
+#endif
+
+#if defined(_M_X64) || defined(__amd64__) || defined(__x86_64__)
+    #define PPSSPP_ARCH_AMD64 1
+    #define PPSSPP_ARCH_64BIT 1
+    //TODO: Remove this compat define
+    #ifndef _M_X64
+        #define _M_X64 1
+    #endif
+#endif
+
+#if defined(__arm__)
+    #define PPSSPP_ARCH_ARM 1
+    #define PPSSPP_ARCH_32BIT 1
+
+    #if defined(__ARM_ARCH_7__) || \
+      defined(__ARM_ARCH_7A__) || \
+      defined(__ARM_ARCH_7S__)
+        #define PPSSPP_ARCH_ARMV7 1
+    #endif
+
+    #if defined(__ARM_ARCH_7S__)
+        #define PPSSPP_ARCH_ARMV7S 1
+    #endif
+
+    #if defined(__ARM_NEON) || defined(__ARM_NEON__)
+        #define PPSSPP_ARCH_ARM_NEON 1
+    #endif
+
+    //TODO: Remove this compat define
+    #ifndef ARM
+        #define ARM 1
+    #endif
+#endif
+
+#if defined(__aarch64__)
+    #define PPSSPP_ARCH_ARM64 1
+    #define PPSSPP_ARCH_64BIT 1
+    #define PPSSPP_ARCH_ARM_NEON 1
+    //TODO: Remove this compat define
+    #ifndef ARM64
+        #define ARM64 1
+    #endif
+#endif
+
+#if defined(__mips64__)
+    #define PPSSPP_ARCH_MIPS64 1
+    #define PPSSPP_ARCH_64BIT 1
+#elif defined(__mips__)
+    #define PPSSPP_ARCH_MIPS 1
+    #define PPSSPP_ARCH_32BIT 1
+    //TODO: Remove this compat define
+    #ifndef MIPS
+        #define MIPS 1
+    #endif
+#endif
+
+
+// PLATFORM defines
+#if defined(_WIN32)
+    // Covers both 32 and 64bit Windows
+    #define PPSSPP_PLATFORM_WINDOWS 1
+#elif defined(__APPLE__)
+    #include <TargetConditionals.h>
+    #if TARGET_IPHONE_SIMULATOR
+        #define PPSSPP_PLATFORM_IOS 1
+        #define PPSSPP_PLATFORM_IOS_SIMULATOR 1
+        //TODO: Remove this compat define
+        #ifndef IOS
+            #define IOS 1
+        #endif
+    #elif TARGET_OS_IPHONE
+        #define PPSSPP_PLATFORM_IOS 1
+        //TODO: Remove this compat define
+        #ifndef IOS
+            #define IOS 1
+        #endif
+    #elif TARGET_OS_MAC
+        #define PPSSPP_PLATFORM_MAC 1
+    #else
+        #error "Unknown Apple platform"
+    #endif
+#elif defined(__ANDROID__)
+    #define PPSSPP_PLATFORM_ANDROID 1
+#elif defined(__linux__)
+    #define PPSSPP_PLATFORM_LINUX 1
+#endif