308 lines
7 KiB
C++
308 lines
7 KiB
C++
// Copyright (c) 2017- PPSSPP Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0 or later versions.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official git repository and contact information can be found at
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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
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#include "ppsspp_config.h"
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#if PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
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#include <emmintrin.h>
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#include "Common/x64Emitter.h"
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#include "GPU/Software/Sampler.h"
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#include "GPU/ge_constants.h"
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using namespace Gen;
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namespace Sampler {
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#ifdef _WIN32
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static const X64Reg resultReg = RAX;
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static const X64Reg tempReg1 = R10;
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static const X64Reg tempReg2 = R11;
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static const X64Reg uReg = RCX;
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static const X64Reg vReg = RDX;
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static const X64Reg srcReg = R8;
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static const X64Reg bufwReg = R9;
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// TODO: levelReg on stack
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#else
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static const X64Reg resultReg = RAX;
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static const X64Reg tempReg1 = R9;
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static const X64Reg tempReg2 = R10;
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static const X64Reg uReg = RDI;
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static const X64Reg vReg = RSI
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static const X64Reg srcReg = RDX;
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static const X64Reg bufwReg = RCX;
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static const X64Reg levelReg = R8;
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#endif
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NearestFunc SamplerJitCache::Compile(const SamplerID &id) {
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BeginWrite();
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const u8 *start = this->AlignCode16();
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SUB(PTRBITS, R(ESP), Imm8(64));
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MOVUPS(MDisp(ESP, 0), XMM4);
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MOVUPS(MDisp(ESP, 16), XMM5);
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MOVUPS(MDisp(ESP, 32), XMM6);
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MOVUPS(MDisp(ESP, 48), XMM7);
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// Early exit on !srcPtr.
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CMP(PTRBITS, R(srcReg), Imm32(0));
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FixupBranch nonZeroSrc = J_CC(CC_NZ);
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XOR(32, R(RAX), R(RAX));
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FixupBranch zeroSrc = J(true);
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SetJumpTarget(nonZeroSrc);
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if (!Jit_ReadTextureFormat(id)) {
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EndWrite();
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SetCodePtr(const_cast<u8 *>(start));
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return nullptr;
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}
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SetJumpTarget(zeroSrc);
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MOVUPS(XMM4, MDisp(ESP, 0));
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MOVUPS(XMM5, MDisp(ESP, 16));
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MOVUPS(XMM6, MDisp(ESP, 32));
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MOVUPS(XMM7, MDisp(ESP, 48));
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ADD(PTRBITS, R(ESP), Imm8(64));
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RET();
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EndWrite();
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return (NearestFunc)start;
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}
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bool SamplerJitCache::Jit_ReadTextureFormat(const SamplerID &id) {
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GETextureFormat fmt = (GETextureFormat)id.texfmt;
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bool success = true;
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switch (fmt) {
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case GE_TFMT_5650:
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success = Jit_GetTexData(id, 16);
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if (success)
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success = Jit_Decode5650();
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break;
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case GE_TFMT_5551:
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success = Jit_GetTexData(id, 16);
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if (success)
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success = Jit_Decode5551();
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break;
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case GE_TFMT_4444:
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success = Jit_GetTexData(id, 16);
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if (success)
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success = Jit_Decode4444();
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break;
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case GE_TFMT_8888:
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success = Jit_GetTexData(id, 32);
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break;
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case GE_TFMT_CLUT32:
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success = Jit_GetTexData(id, 32);
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if (success)
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success = Jit_TransformClutIndex(id);
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if (success)
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success = Jit_ReadClutColor(id);
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break;
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case GE_TFMT_CLUT16:
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success = Jit_GetTexData(id, 16);
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if (success)
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success = Jit_TransformClutIndex(id);
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if (success)
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success = Jit_ReadClutColor(id);
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break;
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case GE_TFMT_CLUT8:
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success = Jit_GetTexData(id, 16);
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if (success)
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success = Jit_TransformClutIndex(id);
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if (success)
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success = Jit_ReadClutColor(id);
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break;
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case GE_TFMT_CLUT4:
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success = Jit_GetTexData(id, 16);
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if (success)
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success = Jit_TransformClutIndex(id);
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if (success)
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success = Jit_ReadClutColor(id);
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break;
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default:
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success = false;
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}
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return success;
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}
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bool SamplerJitCache::Jit_GetTexData(const SamplerID &id, int bitsPerTexel) {
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if (id.swizzle) {
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return Jit_GetTexDataSwizzled(id, bitsPerTexel);
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}
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// srcReg might be EDX, so let's copy that before we multiply.
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switch (bitsPerTexel) {
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case 32:
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case 16:
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case 8:
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LEA(64, tempReg1, MComplex(srcReg, uReg, bitsPerTexel / 8, 0));
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break;
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case 4: {
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XOR(32, R(tempReg2), R(tempReg2));
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SHR(32, R(uReg), Imm8(1));
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FixupBranch skip = J_CC(CC_NC);
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// Track whether we shifted a 1 off or not.
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MOV(32, R(tempReg2), Imm32(4));
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SetJumpTarget(skip);
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LEA(64, tempReg1, MRegSum(srcReg, uReg));
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break;
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}
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default:
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return false;
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}
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MOV(32, R(EAX), R(vReg));
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MUL(32, R(bufwReg));
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switch (bitsPerTexel) {
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case 32:
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case 16:
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case 8:
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MOV(bitsPerTexel, R(resultReg), MComplex(tempReg1, RAX, bitsPerTexel / 8, 0));
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break;
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case 4: {
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SHR(32, R(RAX), Imm8(1));
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MOV(8, R(resultReg), MRegSum(tempReg1, RAX));
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// RCX is now free.
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MOV(8, R(RCX), R(tempReg2));
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SHR(8, R(resultReg), R(RCX));
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// Zero out any bits not shifted off.
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AND(32, R(resultReg), Imm32(0x0000000F));
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break;
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}
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default:
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return false;
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}
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return true;
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}
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bool SamplerJitCache::Jit_GetTexDataSwizzled(const SamplerID &id, int bitsPerTexel) {
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LEA(32, tempReg1, MScaled(vReg, SCALE_4, 0));
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AND(32, R(tempReg1), Imm32(31));
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if (bitsPerTexel != 4) {
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AND(32, R(vReg), Imm32(~7));
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}
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MOV(32, R(tempReg2), R(uReg));
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MOV(32, R(resultReg), R(uReg));
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switch (bitsPerTexel) {
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case 32:
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SHR(32, R(resultReg), Imm8(2));
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break;
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case 16:
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SHR(32, R(vReg), Imm8(1));
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SHR(32, R(tempReg2), Imm8(1));
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SHR(32, R(resultReg), Imm8(3));
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break;
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case 8:
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SHR(32, R(vReg), Imm8(2));
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SHR(32, R(tempReg2), Imm8(2));
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SHR(32, R(resultReg), Imm8(4));
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break;
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case 4:
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SHR(32, R(vReg), Imm8(3));
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SHR(32, R(tempReg2), Imm8(3));
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SHR(32, R(resultReg), Imm8(5));
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break;
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default:
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return false;
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}
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AND(32, R(tempReg2), Imm32(3));
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SHL(32, R(resultReg), Imm8(5));
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ADD(32, R(tempReg1), R(tempReg2));
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ADD(32, R(tempReg1), R(resultReg));
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// We may clobber srcReg in the MUL, so let's grab it now.
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LEA(64, tempReg1, MComplex(srcReg, tempReg1, SCALE_4, 0));
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LEA(32, EAX, MScaled(bufwReg, SCALE_4, 0));
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MUL(32, R(vReg));
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switch (bitsPerTexel) {
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case 32:
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MOV(bitsPerTexel, R(resultReg), MRegSum(tempReg1, EAX));
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break;
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case 16:
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AND(32, R(uReg), Imm32(1));
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// Multiply by two by just adding twice.
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ADD(32, R(EAX), R(uReg));
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ADD(32, R(EAX), R(uReg));
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MOV(bitsPerTexel, R(resultReg), MRegSum(tempReg1, EAX));
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break;
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case 8:
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AND(32, R(uReg), Imm32(3));
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ADD(32, R(EAX), R(uReg));
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MOV(bitsPerTexel, R(resultReg), MRegSum(tempReg1, EAX));
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break;
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case 4: {
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AND(32, R(uReg), Imm32(7));
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SHR(32, R(uReg), Imm8(1));
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// Note: LEA/MOV do not affect flags (unlike ADD.) uReg may be RCX.
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LEA(64, tempReg1, MRegSum(tempReg1, uReg));
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MOV(8, R(resultReg), MRegSum(tempReg1, EAX));
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FixupBranch skipNonZero = J_CC(CC_NC);
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SHR(32, R(resultReg), Imm32(4));
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SetJumpTarget(skipNonZero);
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// Zero out the rest.
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AND(32, R(resultReg), Imm32(0x0000000F));
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break;
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}
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default:
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return false;
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}
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return true;
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}
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bool SamplerJitCache::Jit_Decode5650() {
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return false;
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}
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bool SamplerJitCache::Jit_Decode5551() {
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return false;
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}
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bool SamplerJitCache::Jit_Decode4444() {
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return false;
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}
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bool SamplerJitCache::Jit_TransformClutIndex(const SamplerID &id) {
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return false;
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}
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bool SamplerJitCache::Jit_ReadClutColor(const SamplerID &id) {
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return false;
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}
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};
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#endif
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