lscpu: Add loongarch testcase
Signed-off-by: Xi Ruoyao <xry111@xry111.site>
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2 changed files with 37 additions and 0 deletions
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tests/expected/lscpu/lscpu-loongarch-loongson_3a5000_hv
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37
tests/expected/lscpu/lscpu-loongarch-loongson_3a5000_hv
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CPU op-mode(s): 32-bit, 64-bit
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Address sizes: 48 bits physical, 48 bits virtual
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Byte Order: Little Endian
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CPU(s): 4
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On-line CPU(s) list: 0-3
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Model name: Loongson-3A5000-HV
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CPU family: Loongson-64bit
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Model: 0x11
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Thread(s) per core: 1
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Core(s) per socket: 4
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Socket(s): 1
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BogoMIPS: 5000.00
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Flags: cpucfg lam ual fpu lsx lasx complex crypto lvz
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L1d cache: 256 KiB (4 instances)
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L1i cache: 256 KiB (4 instances)
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L2 cache: 1 MiB (4 instances)
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L3 cache: 16 MiB (1 instance)
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NUMA node(s): 1
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NUMA node0 CPU(s): 0-3
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# The following is the parsable format, which can be fed to other
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# programs. Each different item in every column has an unique ID
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# starting usually from zero.
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# CPU,Core,Socket,Node,,L1d,L1i,L2,L3
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0,0,0,0,,0,0,0,0
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1,1,0,0,,1,1,1,0
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2,2,0,0,,2,2,2,0
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3,3,0,0,,3,3,3,0
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# The following is the parsable format, which can be fed to other
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# programs. Each different item in every column has an unique ID
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# starting usually from zero.
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# CPU,Core,Socket,Node,,L1d,L1i,L2,L3
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0,0,0,0,,0,0,0,0
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1,1,0,0,,1,1,1,0
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2,2,0,0,,2,2,2,0
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3,3,0,0,,3,3,3,0
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BIN
tests/ts/lscpu/dumps/loongarch-loongson_3a5000_hv.tar.gz
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BIN
tests/ts/lscpu/dumps/loongarch-loongson_3a5000_hv.tar.gz
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