Implemented ROXL and DIVL for JIT

This commit is contained in:
Dimitris Panokostas 2018-02-16 14:29:48 +01:00
parent ddad4770e7
commit 2ed5859e5b
13 changed files with 1750 additions and 140 deletions

View file

@ -864,17 +864,17 @@ extern const struct comptbl op_smalltbl_0_comp_ff[] = {
{ op_4c3a_0_comp_ff, 0x00000002, 19514 }, /* MULL */
{ op_4c3b_0_comp_ff, 0x00000002, 19515 }, /* MULL */
{ op_4c3c_0_comp_ff, 0x00000002, 19516 }, /* MULL */
{ NULL, 0x00000001, 19520 }, /* DIVL */
{ NULL, 0x00000001, 19536 }, /* DIVL */
{ NULL, 0x00000001, 19544 }, /* DIVL */
{ NULL, 0x00000001, 19552 }, /* DIVL */
{ NULL, 0x00000001, 19560 }, /* DIVL */
{ NULL, 0x00000001, 19568 }, /* DIVL */
{ NULL, 0x00000001, 19576 }, /* DIVL */
{ NULL, 0x00000001, 19577 }, /* DIVL */
{ NULL, 0x00000001, 19578 }, /* DIVL */
{ NULL, 0x00000001, 19579 }, /* DIVL */
{ NULL, 0x00000001, 19580 }, /* DIVL */
{ op_4c40_0_comp_ff, 0x00000002, 19520 }, /* DIVL */
{ op_4c50_0_comp_ff, 0x00000002, 19536 }, /* DIVL */
{ op_4c58_0_comp_ff, 0x00000002, 19544 }, /* DIVL */
{ op_4c60_0_comp_ff, 0x00000002, 19552 }, /* DIVL */
{ op_4c68_0_comp_ff, 0x00000002, 19560 }, /* DIVL */
{ op_4c70_0_comp_ff, 0x00000002, 19568 }, /* DIVL */
{ op_4c78_0_comp_ff, 0x00000002, 19576 }, /* DIVL */
{ op_4c79_0_comp_ff, 0x00000002, 19577 }, /* DIVL */
{ op_4c7a_0_comp_ff, 0x00000002, 19578 }, /* DIVL */
{ op_4c7b_0_comp_ff, 0x00000002, 19579 }, /* DIVL */
{ op_4c7c_0_comp_ff, 0x00000002, 19580 }, /* DIVL */
{ op_4c90_0_comp_ff, 0x00000002, 19600 }, /* MVMEL */
{ op_4c98_0_comp_ff, 0x00000002, 19608 }, /* MVMEL */
{ op_4ca8_0_comp_ff, 0x00000002, 19624 }, /* MVMEL */
@ -1667,27 +1667,27 @@ extern const struct comptbl op_smalltbl_0_comp_ff[] = {
{ op_e0f9_0_comp_ff, 0x00000002, 57593 }, /* ASRW */
{ op_e100_0_comp_ff, 0x00000000, 57600 }, /* ASL */
{ op_e108_0_comp_ff, 0x00000000, 57608 }, /* LSL */
{ NULL, 0x00000008, 57616 }, /* ROXL */
{ op_e110_0_comp_ff, 0x00000008, 57616 }, /* ROXL */
{ op_e118_0_comp_ff, 0x00000000, 57624 }, /* ROL */
{ op_e120_0_comp_ff, 0x00000000, 57632 }, /* ASL */
{ op_e128_0_comp_ff, 0x00000000, 57640 }, /* LSL */
{ NULL, 0x00000008, 57648 }, /* ROXL */
{ op_e130_0_comp_ff, 0x00000008, 57648 }, /* ROXL */
{ op_e138_0_comp_ff, 0x00000000, 57656 }, /* ROL */
{ op_e140_0_comp_ff, 0x00000000, 57664 }, /* ASL */
{ op_e148_0_comp_ff, 0x00000000, 57672 }, /* LSL */
{ NULL, 0x00000008, 57680 }, /* ROXL */
{ op_e150_0_comp_ff, 0x00000008, 57680 }, /* ROXL */
{ op_e158_0_comp_ff, 0x00000000, 57688 }, /* ROL */
{ op_e160_0_comp_ff, 0x00000000, 57696 }, /* ASL */
{ op_e168_0_comp_ff, 0x00000000, 57704 }, /* LSL */
{ NULL, 0x00000008, 57712 }, /* ROXL */
{ op_e170_0_comp_ff, 0x00000008, 57712 }, /* ROXL */
{ op_e178_0_comp_ff, 0x00000000, 57720 }, /* ROL */
{ op_e180_0_comp_ff, 0x00000000, 57728 }, /* ASL */
{ op_e188_0_comp_ff, 0x00000000, 57736 }, /* LSL */
{ NULL, 0x00000008, 57744 }, /* ROXL */
{ op_e190_0_comp_ff, 0x00000008, 57744 }, /* ROXL */
{ op_e198_0_comp_ff, 0x00000000, 57752 }, /* ROL */
{ op_e1a0_0_comp_ff, 0x00000000, 57760 }, /* ASL */
{ op_e1a8_0_comp_ff, 0x00000000, 57768 }, /* LSL */
{ NULL, 0x00000008, 57776 }, /* ROXL */
{ op_e1b0_0_comp_ff, 0x00000008, 57776 }, /* ROXL */
{ op_e1b8_0_comp_ff, 0x00000000, 57784 }, /* ROL */
{ op_e1d0_0_comp_ff, 0x00000000, 57808 }, /* ASLW */
{ op_e1d8_0_comp_ff, 0x00000000, 57816 }, /* ASLW */
@ -2736,17 +2736,17 @@ extern const struct comptbl op_smalltbl_0_comp_nf[] = {
{ op_4c3a_0_comp_nf, 0x00000002, 19514 }, /* MULL */
{ op_4c3b_0_comp_nf, 0x00000002, 19515 }, /* MULL */
{ op_4c3c_0_comp_nf, 0x00000002, 19516 }, /* MULL */
{ NULL, 0x00000001, 19520 }, /* DIVL */
{ NULL, 0x00000001, 19536 }, /* DIVL */
{ NULL, 0x00000001, 19544 }, /* DIVL */
{ NULL, 0x00000001, 19552 }, /* DIVL */
{ NULL, 0x00000001, 19560 }, /* DIVL */
{ NULL, 0x00000001, 19568 }, /* DIVL */
{ NULL, 0x00000001, 19576 }, /* DIVL */
{ NULL, 0x00000001, 19577 }, /* DIVL */
{ NULL, 0x00000001, 19578 }, /* DIVL */
{ NULL, 0x00000001, 19579 }, /* DIVL */
{ NULL, 0x00000001, 19580 }, /* DIVL */
{ op_4c40_0_comp_nf, 0x00000002, 19520 }, /* DIVL */
{ op_4c50_0_comp_nf, 0x00000002, 19536 }, /* DIVL */
{ op_4c58_0_comp_nf, 0x00000002, 19544 }, /* DIVL */
{ op_4c60_0_comp_nf, 0x00000002, 19552 }, /* DIVL */
{ op_4c68_0_comp_nf, 0x00000002, 19560 }, /* DIVL */
{ op_4c70_0_comp_nf, 0x00000002, 19568 }, /* DIVL */
{ op_4c78_0_comp_nf, 0x00000002, 19576 }, /* DIVL */
{ op_4c79_0_comp_nf, 0x00000002, 19577 }, /* DIVL */
{ op_4c7a_0_comp_nf, 0x00000002, 19578 }, /* DIVL */
{ op_4c7b_0_comp_nf, 0x00000002, 19579 }, /* DIVL */
{ op_4c7c_0_comp_nf, 0x00000002, 19580 }, /* DIVL */
{ op_4c90_0_comp_nf, 0x00000002, 19600 }, /* MVMEL */
{ op_4c98_0_comp_nf, 0x00000002, 19608 }, /* MVMEL */
{ op_4ca8_0_comp_nf, 0x00000002, 19624 }, /* MVMEL */
@ -3539,27 +3539,27 @@ extern const struct comptbl op_smalltbl_0_comp_nf[] = {
{ op_e0f9_0_comp_nf, 0x00000002, 57593 }, /* ASRW */
{ op_e100_0_comp_nf, 0x00000000, 57600 }, /* ASL */
{ op_e108_0_comp_nf, 0x00000000, 57608 }, /* LSL */
{ NULL, 0x00000008, 57616 }, /* ROXL */
{ op_e110_0_comp_nf, 0x00000008, 57616 }, /* ROXL */
{ op_e118_0_comp_nf, 0x00000000, 57624 }, /* ROL */
{ op_e120_0_comp_nf, 0x00000000, 57632 }, /* ASL */
{ op_e128_0_comp_nf, 0x00000000, 57640 }, /* LSL */
{ NULL, 0x00000008, 57648 }, /* ROXL */
{ op_e130_0_comp_nf, 0x00000008, 57648 }, /* ROXL */
{ op_e138_0_comp_nf, 0x00000000, 57656 }, /* ROL */
{ op_e140_0_comp_nf, 0x00000000, 57664 }, /* ASL */
{ op_e148_0_comp_nf, 0x00000000, 57672 }, /* LSL */
{ NULL, 0x00000008, 57680 }, /* ROXL */
{ op_e150_0_comp_nf, 0x00000008, 57680 }, /* ROXL */
{ op_e158_0_comp_nf, 0x00000000, 57688 }, /* ROL */
{ op_e160_0_comp_nf, 0x00000000, 57696 }, /* ASL */
{ op_e168_0_comp_nf, 0x00000000, 57704 }, /* LSL */
{ NULL, 0x00000008, 57712 }, /* ROXL */
{ op_e170_0_comp_nf, 0x00000008, 57712 }, /* ROXL */
{ op_e178_0_comp_nf, 0x00000000, 57720 }, /* ROL */
{ op_e180_0_comp_nf, 0x00000000, 57728 }, /* ASL */
{ op_e188_0_comp_nf, 0x00000000, 57736 }, /* LSL */
{ NULL, 0x00000008, 57744 }, /* ROXL */
{ op_e190_0_comp_nf, 0x00000008, 57744 }, /* ROXL */
{ op_e198_0_comp_nf, 0x00000000, 57752 }, /* ROL */
{ op_e1a0_0_comp_nf, 0x00000000, 57760 }, /* ASL */
{ op_e1a8_0_comp_nf, 0x00000000, 57768 }, /* LSL */
{ NULL, 0x00000008, 57776 }, /* ROXL */
{ op_e1b0_0_comp_nf, 0x00000008, 57776 }, /* ROXL */
{ op_e1b8_0_comp_nf, 0x00000000, 57784 }, /* ROL */
{ op_e1d0_0_comp_nf, 0x00000000, 57808 }, /* ASLW */
{ op_e1d8_0_comp_nf, 0x00000000, 57816 }, /* ASLW */