Merge latest TomB version as of 22 August 2016
This commit is contained in:
Chips
parent
2d3da3d49e
commit
975a634a38
147 changed files with 16789 additions and 10817 deletions
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@ -103,17 +103,19 @@ uae_u8 call_saved[]={0,0,0,0, 1,1,1,1, 1,1,1,1, 0,1,1,1};
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- Special registers (such like the stack pointer) should not be "preserved"
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by pushing, even though they are "saved" across function calls
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*/
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static const uae_u8 need_to_preserve[]={0,0,0,0, 1,1,1,1, 1,1,1,1, 0,0,0,0};
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/* Without save and restore R12, we sometimes get seg faults when entering gui...
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Don't understand why. */
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static const uae_u8 need_to_preserve[]={0,0,0,0, 1,1,1,1, 1,1,1,1, 1,0,0,0};
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static const uae_u32 PRESERVE_MASK = ((1<<R4_INDEX)|(1<<R5_INDEX)|(1<<R6_INDEX)|(1<<R7_INDEX)|(1<<R8_INDEX)|(1<<R9_INDEX)
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|(1<<R10_INDEX)|(1<<R11_INDEX));
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|(1<<R10_INDEX)|(1<<R11_INDEX)|(1<<R12_INDEX));
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#include "codegen_arm.h"
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static inline void UNSIGNED8_IMM_2_REG(W4 r, IMM v) {
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STATIC_INLINE void UNSIGNED8_IMM_2_REG(W4 r, IMM v) {
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MOV_ri8(r, (uae_u8) v);
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}
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static inline void SIGNED8_IMM_2_REG(W4 r, IMM v) {
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STATIC_INLINE void SIGNED8_IMM_2_REG(W4 r, IMM v) {
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if (v & 0x80) {
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MVN_ri8(r, (uae_u8) ~v);
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} else {
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@ -121,7 +123,7 @@ static inline void SIGNED8_IMM_2_REG(W4 r, IMM v) {
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}
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}
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static inline void UNSIGNED16_IMM_2_REG(W4 r, IMM v) {
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STATIC_INLINE void UNSIGNED16_IMM_2_REG(W4 r, IMM v) {
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#ifdef ARMV6T2
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MOVW_ri16(r, v);
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#else
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@ -130,7 +132,7 @@ static inline void UNSIGNED16_IMM_2_REG(W4 r, IMM v) {
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#endif
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}
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static inline void SIGNED16_IMM_2_REG(W4 r, IMM v) {
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STATIC_INLINE void SIGNED16_IMM_2_REG(W4 r, IMM v) {
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#ifdef ARMV6T2
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MOVW_ri16(r, v);
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SXTH_rr(r, r);
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@ -140,19 +142,19 @@ static inline void SIGNED16_IMM_2_REG(W4 r, IMM v) {
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#endif
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}
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static inline void UNSIGNED8_REG_2_REG(W4 d, RR4 s) {
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STATIC_INLINE void UNSIGNED8_REG_2_REG(W4 d, RR4 s) {
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UXTB_rr(d, s);
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}
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static inline void SIGNED8_REG_2_REG(W4 d, RR4 s) {
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STATIC_INLINE void SIGNED8_REG_2_REG(W4 d, RR4 s) {
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SXTB_rr(d, s);
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}
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static inline void UNSIGNED16_REG_2_REG(W4 d, RR4 s) {
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STATIC_INLINE void UNSIGNED16_REG_2_REG(W4 d, RR4 s) {
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UXTH_rr(d, s);
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}
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static inline void SIGNED16_REG_2_REG(W4 d, RR4 s) {
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STATIC_INLINE void SIGNED16_REG_2_REG(W4 d, RR4 s) {
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SXTH_rr(d, s);
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}
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@ -378,7 +380,7 @@ LOWFUNC(WRITE,NONE,2,raw_sub_w_ri,(RW2 d, IMM i))
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LENDFUNC(WRITE,NONE,2,raw_sub_w_ri,(RW2 d, IMM i))
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static inline void raw_dec_sp(int off)
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STATIC_INLINE void raw_dec_sp(int off)
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{
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if (off) {
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if(CHECK32(off)) {
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@ -393,7 +395,7 @@ static inline void raw_dec_sp(int off)
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}
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}
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static inline void raw_inc_sp(int off)
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STATIC_INLINE void raw_inc_sp(int off)
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{
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if (off) {
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if(CHECK32(off)) {
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@ -408,20 +410,20 @@ static inline void raw_inc_sp(int off)
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}
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}
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static inline void raw_push_regs_to_preserve(void) {
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STATIC_INLINE void raw_push_regs_to_preserve(void) {
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PUSH_REGS(PRESERVE_MASK);
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}
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static inline void raw_pop_preserved_regs(void) {
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STATIC_INLINE void raw_pop_preserved_regs(void) {
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POP_REGS(PRESERVE_MASK);
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}
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static inline void raw_load_flagx(uae_u32 t, uae_u32 r)
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STATIC_INLINE void raw_load_flagx(uae_u32 t, uae_u32 r)
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{
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LDR_rRI(t, R_REGSTRUCT, 17 * 4); // X flag are next to 8 Dregs, 8 Aregs and CPSR in struct regstruct
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}
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static inline void raw_flags_evicted(int r)
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STATIC_INLINE void raw_flags_evicted(int r)
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{
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live.state[FLAGTMP].status = INMEM;
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live.state[FLAGTMP].realreg = -1;
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@ -433,22 +435,22 @@ static inline void raw_flags_evicted(int r)
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live.nat[r].nholds = 0;
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}
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static inline void raw_flags_init(void) {
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STATIC_INLINE void raw_flags_init(void) {
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}
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static inline void raw_flags_to_reg(int r)
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STATIC_INLINE void raw_flags_to_reg(int r)
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{
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MRS_CPSR(r);
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STR_rRI(r, R_REGSTRUCT, 16 * 4); // Flags are next to 8 Dregs and 8 Aregs in struct regstruct
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raw_flags_evicted(r);
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}
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static inline void raw_reg_to_flags(int r)
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STATIC_INLINE void raw_reg_to_flags(int r)
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{
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MSR_CPSRf_r(r);
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}
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static inline void raw_load_flagreg(uae_u32 t, uae_u32 r)
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STATIC_INLINE void raw_load_flagreg(uae_u32 t, uae_u32 r)
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{
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LDR_rRI(t, R_REGSTRUCT, 16 * 4); // Flags are next to 8 Dregs and 8 Aregs in struct regstruct
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}
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@ -460,12 +462,12 @@ static inline void raw_load_flagreg(uae_u32 t, uae_u32 r)
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#define FLAG_NREG1 -1
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#define FLAG_NREG3 -1
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static inline void raw_fflags_into_flags(int r)
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STATIC_INLINE void raw_fflags_into_flags(int r)
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{
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jit_unimplemented("raw_fflags_into_flags %x", r);
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}
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static inline void raw_fp_init(void)
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STATIC_INLINE void raw_fp_init(void)
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{
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#ifdef USE_JIT_FPU
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int i;
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@ -477,7 +479,7 @@ static inline void raw_fp_init(void)
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}
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// Verify
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static inline void raw_fp_cleanup_drop(void)
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STATIC_INLINE void raw_fp_cleanup_drop(void)
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{
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#ifdef USE_JIT_FPU
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D(panicbug("raw_fp_cleanup_drop"));
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@ -516,13 +518,13 @@ LOWFUNC(NONE,NONE,2,raw_fmov_rr,(FW d, FR s))
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}
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LENDFUNC(NONE,NONE,2,raw_fmov_rr,(FW d, FR s))
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static inline void raw_emit_nop_filler(int nbytes)
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STATIC_INLINE void raw_emit_nop_filler(int nbytes)
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{
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nbytes >>= 2;
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while(nbytes--) { NOP(); }
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}
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static inline void raw_emit_nop(void)
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STATIC_INLINE void raw_emit_nop(void)
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{
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NOP();
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}
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@ -872,7 +874,7 @@ LOWFUNC(WRITE,NONE,2,compemu_raw_test_l_rr,(RR4 d, RR4 s))
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}
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LENDFUNC(WRITE,NONE,2,compemu_raw_test_l_rr,(RR4 d, RR4 s))
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static inline void compemu_raw_call(uae_u32 t)
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STATIC_INLINE void compemu_raw_call(uae_u32 t)
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{
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#ifdef ARMV6T2
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MOVW_ri16(REG_WORK1, t);
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@ -886,14 +888,14 @@ static inline void compemu_raw_call(uae_u32 t)
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POP(RLR_INDEX);
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}
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static inline void compemu_raw_call_r(RR4 r)
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STATIC_INLINE void compemu_raw_call_r(RR4 r)
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{
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PUSH(RLR_INDEX);
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BLX_r(r);
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POP(RLR_INDEX);
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}
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static inline void compemu_raw_jcc_l_oponly(int cc)
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STATIC_INLINE void compemu_raw_jcc_l_oponly(int cc)
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{
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switch (cc) {
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case 9: // LS
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@ -920,7 +922,7 @@ static inline void compemu_raw_jcc_l_oponly(int cc)
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// emit of target will be done by caller
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}
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static inline void compemu_raw_jl(uae_u32 t)
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STATIC_INLINE void compemu_raw_jl(uae_u32 t)
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{
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#ifdef ARMV6T2
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MOVW_ri16(REG_WORK1, t);
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@ -932,13 +934,13 @@ static inline void compemu_raw_jl(uae_u32 t)
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#endif
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}
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static inline void compemu_raw_jmp(uae_u32 t)
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STATIC_INLINE void compemu_raw_jmp(uae_u32 t)
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{
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LDR_rRI(RPC_INDEX, RPC_INDEX, -4);
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emit_long(t);
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}
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static inline void compemu_raw_jmp_m_indexed(uae_u32 base, uae_u32 r, uae_u32 m)
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STATIC_INLINE void compemu_raw_jmp_m_indexed(uae_u32 base, uae_u32 r, uae_u32 m)
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{
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int shft;
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switch(m) {
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@ -954,12 +956,12 @@ static inline void compemu_raw_jmp_m_indexed(uae_u32 base, uae_u32 r, uae_u32 m)
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emit_long(base);
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}
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static inline void compemu_raw_jmp_r(RR4 r)
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STATIC_INLINE void compemu_raw_jmp_r(RR4 r)
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{
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BX_r(r);
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}
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static inline void compemu_raw_jnz(uae_u32 t)
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STATIC_INLINE void compemu_raw_jnz(uae_u32 t)
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{
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#ifdef ARMV6T2
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BEQ_i(1);
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@ -971,12 +973,12 @@ static inline void compemu_raw_jnz(uae_u32 t)
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#endif
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}
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static inline void compemu_raw_jz_b_oponly(void)
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STATIC_INLINE void compemu_raw_jz_b_oponly(void)
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{
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BEQ_i(0); // Real distance set by caller
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}
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static inline void compemu_raw_branch(IMM d)
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STATIC_INLINE void compemu_raw_branch(IMM d)
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{
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B_i((d >> 2) - 1);
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}
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6384
src/jit/compemu.cpp
6384
src/jit/compemu.cpp
File diff suppressed because it is too large
Load diff
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@ -463,7 +463,7 @@ MENDFUNC(2,arm_SUB_l_ri8,(RW4 d, IMM i))
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// Other
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static inline void flush_cpu_icache(void *start, void *stop)
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STATIC_INLINE void flush_cpu_icache(void *start, void *stop)
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{
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register void *_beg __asm ("a1") = start;
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register void *_end __asm ("a2") = stop;
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@ -480,11 +480,11 @@ static inline void flush_cpu_icache(void *start, void *stop)
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#endif
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}
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static inline void write_jmp_target(uae_u32* jmpaddr, cpuop_func* a) {
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STATIC_INLINE void write_jmp_target(uae_u32* jmpaddr, cpuop_func* a) {
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*(jmpaddr) = (uae_u32)a;
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flush_cpu_icache((void *)jmpaddr, (void *)&jmpaddr[1]);
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}
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static inline void emit_jmp_target(uae_u32 a) {
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STATIC_INLINE void emit_jmp_target(uae_u32 a) {
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emit_long((uae_u32)a);
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}
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@ -606,20 +606,20 @@ static HardBlockAllocator<blockinfo> BlockInfoAllocator;
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static HardBlockAllocator<checksum_info> ChecksumInfoAllocator;
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#endif
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static inline checksum_info *alloc_checksum_info(void)
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STATIC_INLINE checksum_info *alloc_checksum_info(void)
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{
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checksum_info *csi = ChecksumInfoAllocator.acquire();
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csi->next = NULL;
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return csi;
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}
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static inline void free_checksum_info(checksum_info *csi)
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STATIC_INLINE void free_checksum_info(checksum_info *csi)
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{
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csi->next = NULL;
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ChecksumInfoAllocator.release(csi);
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}
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static inline void free_checksum_info_chain(checksum_info *csi)
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STATIC_INLINE void free_checksum_info_chain(checksum_info *csi)
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{
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while (csi != NULL) {
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checksum_info *csi2 = csi->next;
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@ -628,7 +628,7 @@ static inline void free_checksum_info_chain(checksum_info *csi)
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}
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}
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static inline blockinfo *alloc_blockinfo(void)
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STATIC_INLINE blockinfo *alloc_blockinfo(void)
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{
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blockinfo *bi = BlockInfoAllocator.acquire();
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#if USE_CHECKSUM_INFO
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@ -637,7 +637,7 @@ static inline blockinfo *alloc_blockinfo(void)
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return bi;
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}
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static inline void free_blockinfo(blockinfo *bi)
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STATIC_INLINE void free_blockinfo(blockinfo *bi)
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{
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#if USE_CHECKSUM_INFO
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free_checksum_info_chain(bi->csi);
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@ -736,7 +736,7 @@ static uae_u32 data_buffers_used = 0;
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static uae_s32 data_natmem_pos = 0;
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static inline void compemu_raw_branch(IMM d);
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STATIC_INLINE void compemu_raw_branch(IMM d);
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STATIC_INLINE void data_check_end(uae_s32 n, uae_s32 codesize)
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{
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@ -2746,7 +2746,7 @@ void compemu_reset(void)
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}
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// OPCODE is in big endian format, use cft_map() beforehand, if needed.
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static inline void reset_compop(int opcode)
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STATIC_INLINE void reset_compop(int opcode)
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{
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compfunctbl[opcode] = NULL;
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nfcompfunctbl[opcode] = NULL;
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@ -2771,7 +2771,7 @@ void build_comp(void)
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for (opcode = 0; opcode < 65536; opcode++) {
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reset_compop(opcode);
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#ifdef NOFLAGS_SUPPORT
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nfcpufunctbl[opcode] = op_illg;
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nfcpufunctbl[opcode] = _op_illg;
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#endif
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prop[opcode].use_flags = 0x1f;
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prop[opcode].set_flags = 0x1f;
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@ -2920,7 +2920,7 @@ static void flush_icache_hard(uaecptr ptr, int n)
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#endif
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current_compile_p = compiled_code;
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set_special(regs, 0); /* To get out of compiled code */
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set_special(0); /* To get out of compiled code */
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}
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@ -2970,7 +2970,7 @@ STATIC_INLINE void flush_icache_lazy(uaecptr ptr, int n)
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int failure;
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static inline unsigned int get_opcode_cft_map(unsigned int f)
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STATIC_INLINE unsigned int get_opcode_cft_map(unsigned int f)
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{
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return ((f >> 8) & 255) | ((f & 255) << 8);
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}
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@ -1796,7 +1796,11 @@ extern const struct comptbl op_smalltbl_0_comp_ff[] = {
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{ NULL, 0x00000000, 61424 }, /* BFINS */
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{ NULL, 0x00000000, 61432 }, /* BFINS */
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{ NULL, 0x00000000, 61433 }, /* BFINS */
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{ NULL, 0x00000001, 61440 }, /* MMUOP030 */
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{ NULL, 0x00000001, 61448 }, /* MMUOP030 */
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{ NULL, 0x00000001, 61456 }, /* MMUOP030 */
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{ NULL, 0x00000001, 61464 }, /* MMUOP030 */
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{ NULL, 0x00000001, 61472 }, /* MMUOP030 */
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{ NULL, 0x00000001, 61480 }, /* MMUOP030 */
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{ NULL, 0x00000001, 61488 }, /* MMUOP030 */
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{ NULL, 0x00000001, 61496 }, /* MMUOP030 */
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@ -3665,7 +3669,11 @@ extern const struct comptbl op_smalltbl_0_comp_nf[] = {
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{ NULL, 0x00000000, 61424 }, /* BFINS */
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{ NULL, 0x00000000, 61432 }, /* BFINS */
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{ NULL, 0x00000000, 61433 }, /* BFINS */
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{ NULL, 0x00000001, 61440 }, /* MMUOP030 */
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{ NULL, 0x00000001, 61448 }, /* MMUOP030 */
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{ NULL, 0x00000001, 61456 }, /* MMUOP030 */
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{ NULL, 0x00000001, 61464 }, /* MMUOP030 */
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{ NULL, 0x00000001, 61472 }, /* MMUOP030 */
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{ NULL, 0x00000001, 61480 }, /* MMUOP030 */
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{ NULL, 0x00000001, 61488 }, /* MMUOP030 */
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{ NULL, 0x00000001, 61496 }, /* MMUOP030 */
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@ -270,7 +270,7 @@ finish_braces(void)
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close_brace();
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}
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static inline void gen_update_next_handler(void)
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static __inline__ void gen_update_next_handler(void)
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{
|
||||
return; /* Can anything clever be done here? */
|
||||
}
|
||||
|
|
@ -3021,11 +3021,11 @@ generate_one_opcode(int rp, int noflags)
|
|||
if (noflags) {
|
||||
fprintf(stblfile, "{ op_%lx_%d_comp_nf, 0x%08x, %ld }, /* %s */\n", opcode, postfix, flags, opcode, name);
|
||||
fprintf(headerfile, "extern compop_func op_%lx_%d_comp_nf;\n", opcode, postfix);
|
||||
printf("unsigned long REGPARAM2 op_%lx_%d_comp_nf(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, name);
|
||||
printf("uae_u32 REGPARAM2 op_%lx_%d_comp_nf(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, name);
|
||||
} else {
|
||||
fprintf(stblfile, "{ op_%lx_%d_comp_ff, 0x%08x, %ld }, /* %s */\n", opcode, postfix, flags, opcode, name);
|
||||
fprintf(headerfile, "extern compop_func op_%lx_%d_comp_ff;\n", opcode, postfix);
|
||||
printf("unsigned long REGPARAM2 op_%lx_%d_comp_ff(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, name);
|
||||
printf("uae_u32 REGPARAM2 op_%lx_%d_comp_ff(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, name);
|
||||
}
|
||||
com_flush();
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue