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121 commits

Author SHA1 Message Date
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b9de1a44df jit: Reduce some include pollution. 
Usually no need for all of MIPSAnalyst.
 2022-10-27 23:26:44 -07:00
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5d60fa0d0d Common: Maintain C++11 support in sign extend. 2021-01-31 08:44:02 -08:00
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1b00da2f3a Common: Sign extend w/func not chained casts. 
Should be clearer to read and easier to get right.
 2021-01-31 01:25:52 -08:00
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d3c06266c5 jit: Fix conditional disable flags. 2021-01-09 11:50:32 -08:00
Henrik Rydgård
4d3ec20082 ByteSwap.h results in a file name collision on some systems with byteswap.h. Fix this by merging it into BitSet.h. 2020-09-30 00:09:13 +02:00
Henrik Rydgård
5e976ff842 Buildfixes 2020-09-29 19:33:18 +02:00
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419c1fbd73 Jit: Respect flags for jit types and features. 
Left some free space for more.
 2019-02-03 14:57:08 -08:00
Florent Castelli
8c3552de74 cmake: Detect features at compile time 
Instead of relying on manually passed down flags from CMake,
we now have ppsspp_config.h file to create the platform defines for us.
This improves support for multiplatform builds (such as iOS).
 2016-10-19 12:31:19 +02:00
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2d3df5c621 armjit: Handle divide by zero more accurately. 
Turns out, some games may depend on this behavior.
 2016-05-19 00:07:41 -07:00
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a05ae2a0a6 Correct divide by zero HI/LO values a bit. 
Interpreter is now correct, but it's probably not all that important to
get right in jit.
 2016-05-14 19:23:50 -07:00
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9262ddfc13 Avoid any possible shifts by 32. 2015-07-19 13:25:50 -07:00
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db3dffb44d arm64: Oops, fix flushing zero from an armreg. 2015-07-05 11:57:18 -07:00
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66adc4e695 jit: Normalize CONDITIONAL_DISABLE formatting. 2015-07-02 20:31:37 -07:00
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0a5b1c030b arm64: Implement ext and ins. 2015-06-28 08:45:17 -07:00
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7ce5841f30 jit: Avoid mfhi/mflo to $0. 2015-04-07 18:25:28 -07:00
Henrik Rydgard
25ec85551f ARM64: Implement FP compares, misc 2015-04-06 18:13:22 +02:00
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19b92a3e68 Typo. 2015-01-19 09:41:35 -08:00
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cdddd4b59c Fix an undefined bit shift. 
Shouldn't have mattered anyway, but maybe this can crash some ARM chip or
something...
 2015-01-19 08:40:10 -08:00
Henrik Rydgard
05a8e2e35d Some work towards being able to build two JITs together 
This will be useful for testing/debugging, but not there yet.
 2014-12-13 21:13:54 +01:00
Henrik Rydgard
51d55bd645 Namespacing cleanup (it's bad to do "using namespace" in a header) 2014-12-07 14:44:15 +01:00
Henrik Rydgard
4457dca4c9 Rename the ARM Jit class to ArmJit 2014-12-07 14:25:22 +01:00
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5a89c17cf0 armjit: Allow R1 in regalloc, use LR as temp. 
LR should be safe, although it may make stack traces not work within jit,
they don't really tend to work anyway.
 2014-03-28 18:38:38 -07:00
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b53143bb33 Revert "armjit: Skip an AND for rotate shifts." 
This reverts commit ab2dd54ade.

Even though the docs say it's safe but apparently not always.
 2014-03-22 15:54:48 -07:00
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ab2dd54ade armjit: Skip an AND for rotate shifts. 2014-03-15 00:49:18 -07:00
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bed9c82d0a armjit: Try to use nearby immediates in slti/u. 2014-03-14 19:26:52 -07:00
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e783627947 armjit: Use our I2R funcs on reg/reg math too. 
When one is a known immediate.  This should catch more cases, like:

ori v0, $0, 0xFFFF
and v1, v1, v0
 2014-03-14 19:15:43 -07:00
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8e979da0f9 armjit: Use our I2R arm optimizations. 
Should help cases of ori and andi most, but also addiu.  They will all try
to use an optimized immediate (from another nearby value) if possible.
 2014-03-14 19:15:43 -07:00
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c229232236 armjit: Specifically optimize check for negative. 2014-03-14 19:15:39 -07:00
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628390f3fa armjit: Tiny optimization for cast to short. 
See these sometimes in code, skip the load of R0 when we can.
 2014-03-14 19:15:39 -07:00
Henrik Rydgard
23e57b71e0 Revert "Shave one instruction off slti and slt on ARM." 
This reverts commit 04742e00fc.
 2013-11-30 16:06:16 +01:00
Henrik Rydgard
04742e00fc Shave one instruction off slti and slt on ARM. 2013-11-30 15:53:21 +01:00
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dffa35ef2f When ins is used with a zero argument, don't OR. 
Seems it's used effectively to mask out bits with rs=zero.  Makes sense...
 2013-11-29 09:17:12 -08:00
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c50ab6d6aa armjit: Fix divu when divisor is a constant 1. 
Fixes #4539 and #4520.
 2013-11-19 13:24:15 -08:00
Henrik Rydgard
4e0520131a Tiny optimization 2013-11-15 20:32:23 +01:00
Henrik Rydgard
d17a5fefea ARM: Fix divide by 0 in software divide used on CPUs without HW divide. 2013-11-15 20:24:20 +01:00
Sacha
20e8a81268 Switch to compile-time ARMV7 define. 2013-11-15 11:20:39 +10:00
Henrik Rydgard
9a14d33372 Disable software divide that appears to be buggy, see #4539 2013-11-14 17:25:02 +01:00
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ca7b2b554b armjit: fix major typo breaking mult/multu. 2013-11-10 21:54:44 -08:00
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7e46ee0b0f armjit: Replace MOVI2R with using the regcache. 
So that it can optimize the value with existing imms.

Not actually optimizing yet.
 2013-11-10 15:50:45 -08:00
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285ec1fad5 armjit: Implement mult/multu for immediates. 
Uncommon, but may reduce instructions a bit.
 2013-11-10 14:38:09 -08:00
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9bec82873c armjit: inline byteswaps of imm values. 2013-11-10 14:38:08 -08:00
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06c8cb9174 armjit: Do shifts with imms as much as possible. 
This may even make an imm operand2 safe that wasn't before.
 2013-11-10 14:38:08 -08:00
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a3a061a69f armjit: Optimize a division by a power of two. 
These really happen.
 2013-11-09 08:43:53 -08:00
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1776c85882 armjit: Implement a software divide for divu. 
It's not actually that much code.
 2013-11-09 08:43:52 -08:00
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b2a240d105 armjit: Implement msub/msubu. 2013-11-09 08:43:52 -08:00
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cb3bb73148 armjit: Improve GPR typesafety. 2013-11-09 08:24:15 -08:00
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945b8bf5c5 armjit: optimize reverse subtract, avoid temp imms. 
If we have a non-op2 imm, get rid of it asap.  If we have a op2 friendly
imm, keep it.
 2013-11-09 08:18:43 -08:00
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415f22ecac armjit: Preserve imms on min/max as well. 2013-11-09 08:18:43 -08:00
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5d46a82f43 armjit: Use a MOV for add/or with 0. 
Might skip the ALU, so might be faster.
 2013-11-08 11:41:57 -08:00
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b8e126e7ce armjit: Preserve imms in slt/sltu as possible. 2013-11-08 11:41:57 -08:00