Commit graph

51 commits

Author SHA1 Message Date
Henrik Rydgård
584e94f01e ARM32: Remove a lot of non-NEON fallback paths 2022-04-13 11:44:55 +02:00
Unknown W. Brackets
cae0815095 jit: Avoid using mips identifier directly.
Apparently this gets defined on mips systems.
2021-02-26 07:24:58 -08:00
Unknown W. Brackets
f32f89dd90 Global: Remove some unused variables. 2021-02-15 11:59:45 -08:00
Henrik Rydgård
6f1915110f Remove base/logging from UI and more 2020-08-15 19:08:54 +02:00
Henrik Rydgård
c5e0b799d9 Remove category from _assert_msg_ functions. We don't filter these by category anyway.
Fixes the inconsistency where we _assert_ didn't take a category but
_assert_msg_ did.
2020-07-19 20:33:25 +02:00
Unknown W. Brackets
b4137b2403 armjit: Fix avoidLoad handling for fpu regs. 2019-06-02 22:03:26 -07:00
Unknown W. Brackets
e55198f7e7 Correct some initialization order warnings.
Also, another missing init with IRBlocks.
2016-08-05 10:46:11 -07:00
Henrik Rydgård
d014d420db Unify JitOptions across the backends.
This is required to make ExtractIR not a member of the various backends.
2015-04-12 11:41:26 -07:00
Unknown W. Brackets
dcf54ec8a0 armjit: Burn less hard without a quad mapping. 2015-01-17 18:48:50 -08:00
Unknown W. Brackets
c0a04cbf7e armjit: Fix first temp vreg offset.
Wonder what havoc this could've caused....
2015-01-17 18:21:04 -08:00
Unknown W. Brackets
cb50075cf9 armjit: Correct NEON/non-VFPU reg allocation order.
This fixes vh2f, which unbreaks games like Dissidia 012 and others.
2014-12-22 21:27:27 -08:00
Unknown W. Brackets
9a41dec0ff Fix some type comparison warnings. 2014-12-14 17:35:20 -08:00
Henrik Rydgard
05a8e2e35d Some work towards being able to build two JITs together
This will be useful for testing/debugging, but not there yet.
2014-12-13 21:13:54 +01:00
Henrik Rydgard
50bb3e1e05 Minor fixes 2014-12-08 00:18:13 +01:00
Henrik Rydgard
d98bde8e50 Merge the RegCache changes from the old neon-vfpu branch 2014-12-06 12:26:58 +01:00
Unknown W. Brackets
f6f943de63 jit: MAP_NOINIT should always mean MAP_DIRTY. 2014-11-29 00:14:08 -08:00
Unknown W. Brackets
3001866d18 Skip flushing FPU/VFPU regs if none were allocated.
They're not used as often, so this usually saves time.  About 1% during
tests.
2014-03-30 00:42:25 -07:00
Unknown W. Brackets
5a89c17cf0 armjit: Allow R1 in regalloc, use LR as temp.
LR should be safe, although it may make stack traces not work within jit,
they don't really tend to work anyway.
2014-03-28 18:38:38 -07:00
Henrik Rydgard
c80510fb3b MemMap should not be included in MIPS.h. 2014-03-15 10:45:39 +01:00
Henrik Rydgard
7ae9c26b6a Enable the new vreg flushing mechanism on ARM.
Reduce logspam seen in a couple games.
2014-03-12 10:15:09 +01:00
Henrik Rydgard
ea6fb9337c Second attempt at flushing multiple VFPU regs using VSTMIA.
Also disabled, but seems to work, just needs testing.

Much better code this time and works for VFPU regs not just FPU regs.
2014-03-11 21:55:17 +01:00
Henrik Rydgard
adadf11890 An attempt to combine FPU regcache writebacks with VSTMIA. Disabled due to bugs. 2014-03-11 11:03:51 +01:00
Sacha
90b5097d45 Travis: add Blackberry. Improve Blackberry out-of-box compile. 2013-11-29 00:18:41 +10:00
Henrik Rydgard
55500d4bb6 Reorder VFPU registers in memory so that we can flush and reload them in bulk more often.
Doesn't actually do that yet, that's for the NEON branch.
2013-11-28 13:27:51 +01:00
Henrik Rydgard
f650b23c90 ARM: Add NEON widening and narrowing moves, and float/int convert.
Experiment a little in the vertex decoder.
2013-11-24 13:30:28 +01:00
Henrik Rydgard
9f5402ce54 Use hardware half-to-float on ARM when available. 2013-11-17 14:17:13 +01:00
Henrik Rydgard
d1c012d75e ARM: Open up all 32 accessible VFP registers if NEON is available. 2013-11-09 20:18:20 +01:00
Henrik Rydgard
8c88dff5a4 More log categories, use them (and existing ones). Improve log config. 2013-09-07 22:02:55 +02:00
Henrik Rydgard
324cde5a79 Let's actually use the log category mechanism. A first step. 2013-09-07 21:19:21 +02:00
Henrik Rydgard
201282f28c JIT: Implement vf2i (truncate mode only) 2013-08-06 19:08:15 +02:00
Henrik Rydgard
2f0cdc6988 ARMJIT: disable vi2f, it seems buggy. preliminary disabled impl of vcrsp.t. 2013-08-06 11:10:26 +02:00
Henrik Rydgard
3303a71796 Oops 2013-07-31 11:25:35 +02:00
Henrik Rydgard
9bf8bfbed4 armjit clamp: Clamp negative 0 to positive 0. 2013-07-31 11:22:04 +02:00
Henrik Rydgard
51596b636a Fix numerous ARM JIT bugs. Activate vmtvc and vscl, and vadd/vmul/vdiv/vsub for real this time. 2013-07-31 10:34:58 +02:00
Henrik Rydgard
ebcdd637ee ARMJit bugfixes, enable vmul, vadd, vdiv, vsub.
Prefixes disabled until I can fix clamping.
2013-07-31 00:12:43 +02:00
Henrik Rydgard
ee215cc316 ARMJIT: Fix eatprefix, add DirtyInInV mapping, misc stuff 2013-07-30 18:15:48 +02:00
Henrik Rydgard
d8294f025f More VFPU stuff (nothing new activated) 2013-07-30 01:09:11 +02:00
Sacha
580ce69897 Buildfix for non-Windows. 2013-07-29 00:52:01 +10:00
Sacha
056ae5db44 Buildfix for Qt. 2013-07-29 00:26:36 +10:00
Henrik Rydgard
8feeaf2e7a Jit: Implement vidt in both, plus translate a couple easy ones to ARM. 2013-07-28 16:14:21 +02:00
Henrik Rydgard
59644ad59b Jit: Implement VMMUL for ARM, optimize the x86 implementation. Also add VCST. 2013-07-28 12:14:35 +02:00
Sacha
104a3a316b Revert extra regs allocation. Causes some crashes with ffmpeg. 2013-06-10 00:29:08 +10:00
Sacha
637d75f47d Unlock the other 16 regs that are available for NEON. 2013-06-09 23:15:59 +10:00
Henrik Rydgard
5a09885a59 Port over much of unknown's vfpu jit work to arm. Untested. 2013-02-20 00:04:21 +01:00
Henrik Rydgard
b8abb77eee More armjit-fpu work - dot product working for example. Add some non working DISABLEd stuff too. 2013-02-16 09:27:48 +01:00
Henrik Rydgard
23cddab1d7 Some mostly disabled armjit VFPU stuff. 2013-02-15 22:38:39 +01:00
Henrik Rydgard
ba1171f15d Couple more armjit-fpu instructions. Turn down logging a bit. 2013-02-11 23:39:30 +01:00
Henrik Rydgard
4bdb2045a7 Armjit-FPU: Fix lots of bugs, impl some stuff. Still nothing working. 2013-02-11 23:10:11 +01:00
Henrik Rydgard
f75d14d3b5 ARM FPU jit work 2013-02-10 15:53:56 +01:00
Henrik Rydgard
021736c533 Initial FPU regcache 2013-02-09 18:18:32 +01:00