Henrik Rydgård
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584e94f01e
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ARM32: Remove a lot of non-NEON fallback paths
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2022-04-13 11:44:55 +02:00 |
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Unknown W. Brackets
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cae0815095
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jit: Avoid using mips identifier directly.
Apparently this gets defined on mips systems.
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2021-02-26 07:24:58 -08:00 |
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Unknown W. Brackets
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f32f89dd90
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Global: Remove some unused variables.
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2021-02-15 11:59:45 -08:00 |
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Henrik Rydgård
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6f1915110f
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Remove base/logging from UI and more
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2020-08-15 19:08:54 +02:00 |
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Henrik Rydgård
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c5e0b799d9
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Remove category from _assert_msg_ functions. We don't filter these by category anyway.
Fixes the inconsistency where we _assert_ didn't take a category but
_assert_msg_ did.
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2020-07-19 20:33:25 +02:00 |
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Unknown W. Brackets
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b4137b2403
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armjit: Fix avoidLoad handling for fpu regs.
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2019-06-02 22:03:26 -07:00 |
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Unknown W. Brackets
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e55198f7e7
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Correct some initialization order warnings.
Also, another missing init with IRBlocks.
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2016-08-05 10:46:11 -07:00 |
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Henrik Rydgård
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d014d420db
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Unify JitOptions across the backends.
This is required to make ExtractIR not a member of the various backends.
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2015-04-12 11:41:26 -07:00 |
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Unknown W. Brackets
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dcf54ec8a0
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armjit: Burn less hard without a quad mapping.
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2015-01-17 18:48:50 -08:00 |
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Unknown W. Brackets
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c0a04cbf7e
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armjit: Fix first temp vreg offset.
Wonder what havoc this could've caused....
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2015-01-17 18:21:04 -08:00 |
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Unknown W. Brackets
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cb50075cf9
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armjit: Correct NEON/non-VFPU reg allocation order.
This fixes vh2f, which unbreaks games like Dissidia 012 and others.
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2014-12-22 21:27:27 -08:00 |
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Unknown W. Brackets
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9a41dec0ff
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Fix some type comparison warnings.
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2014-12-14 17:35:20 -08:00 |
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Henrik Rydgard
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05a8e2e35d
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Some work towards being able to build two JITs together
This will be useful for testing/debugging, but not there yet.
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2014-12-13 21:13:54 +01:00 |
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Henrik Rydgard
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50bb3e1e05
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Minor fixes
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2014-12-08 00:18:13 +01:00 |
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Henrik Rydgard
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d98bde8e50
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Merge the RegCache changes from the old neon-vfpu branch
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2014-12-06 12:26:58 +01:00 |
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Unknown W. Brackets
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f6f943de63
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jit: MAP_NOINIT should always mean MAP_DIRTY.
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2014-11-29 00:14:08 -08:00 |
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Unknown W. Brackets
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3001866d18
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Skip flushing FPU/VFPU regs if none were allocated.
They're not used as often, so this usually saves time. About 1% during
tests.
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2014-03-30 00:42:25 -07:00 |
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Unknown W. Brackets
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5a89c17cf0
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armjit: Allow R1 in regalloc, use LR as temp.
LR should be safe, although it may make stack traces not work within jit,
they don't really tend to work anyway.
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2014-03-28 18:38:38 -07:00 |
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Henrik Rydgard
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c80510fb3b
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MemMap should not be included in MIPS.h.
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2014-03-15 10:45:39 +01:00 |
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Henrik Rydgard
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7ae9c26b6a
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Enable the new vreg flushing mechanism on ARM.
Reduce logspam seen in a couple games.
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2014-03-12 10:15:09 +01:00 |
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Henrik Rydgard
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ea6fb9337c
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Second attempt at flushing multiple VFPU regs using VSTMIA.
Also disabled, but seems to work, just needs testing.
Much better code this time and works for VFPU regs not just FPU regs.
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2014-03-11 21:55:17 +01:00 |
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Henrik Rydgard
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adadf11890
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An attempt to combine FPU regcache writebacks with VSTMIA. Disabled due to bugs.
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2014-03-11 11:03:51 +01:00 |
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Sacha
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90b5097d45
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Travis: add Blackberry. Improve Blackberry out-of-box compile.
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2013-11-29 00:18:41 +10:00 |
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Henrik Rydgard
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55500d4bb6
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Reorder VFPU registers in memory so that we can flush and reload them in bulk more often.
Doesn't actually do that yet, that's for the NEON branch.
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2013-11-28 13:27:51 +01:00 |
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Henrik Rydgard
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f650b23c90
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ARM: Add NEON widening and narrowing moves, and float/int convert.
Experiment a little in the vertex decoder.
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2013-11-24 13:30:28 +01:00 |
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Henrik Rydgard
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9f5402ce54
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Use hardware half-to-float on ARM when available.
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2013-11-17 14:17:13 +01:00 |
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Henrik Rydgard
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d1c012d75e
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ARM: Open up all 32 accessible VFP registers if NEON is available.
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2013-11-09 20:18:20 +01:00 |
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Henrik Rydgard
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8c88dff5a4
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More log categories, use them (and existing ones). Improve log config.
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2013-09-07 22:02:55 +02:00 |
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Henrik Rydgard
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324cde5a79
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Let's actually use the log category mechanism. A first step.
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2013-09-07 21:19:21 +02:00 |
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Henrik Rydgard
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201282f28c
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JIT: Implement vf2i (truncate mode only)
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2013-08-06 19:08:15 +02:00 |
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Henrik Rydgard
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2f0cdc6988
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ARMJIT: disable vi2f, it seems buggy. preliminary disabled impl of vcrsp.t.
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2013-08-06 11:10:26 +02:00 |
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Henrik Rydgard
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3303a71796
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Oops
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2013-07-31 11:25:35 +02:00 |
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Henrik Rydgard
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9bf8bfbed4
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armjit clamp: Clamp negative 0 to positive 0.
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2013-07-31 11:22:04 +02:00 |
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Henrik Rydgard
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51596b636a
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Fix numerous ARM JIT bugs. Activate vmtvc and vscl, and vadd/vmul/vdiv/vsub for real this time.
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2013-07-31 10:34:58 +02:00 |
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Henrik Rydgard
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ebcdd637ee
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ARMJit bugfixes, enable vmul, vadd, vdiv, vsub.
Prefixes disabled until I can fix clamping.
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2013-07-31 00:12:43 +02:00 |
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Henrik Rydgard
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ee215cc316
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ARMJIT: Fix eatprefix, add DirtyInInV mapping, misc stuff
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2013-07-30 18:15:48 +02:00 |
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Henrik Rydgard
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d8294f025f
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More VFPU stuff (nothing new activated)
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2013-07-30 01:09:11 +02:00 |
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Sacha
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580ce69897
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Buildfix for non-Windows.
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2013-07-29 00:52:01 +10:00 |
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Sacha
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056ae5db44
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Buildfix for Qt.
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2013-07-29 00:26:36 +10:00 |
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Henrik Rydgard
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8feeaf2e7a
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Jit: Implement vidt in both, plus translate a couple easy ones to ARM.
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2013-07-28 16:14:21 +02:00 |
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Henrik Rydgard
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59644ad59b
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Jit: Implement VMMUL for ARM, optimize the x86 implementation. Also add VCST.
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2013-07-28 12:14:35 +02:00 |
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Sacha
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104a3a316b
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Revert extra regs allocation. Causes some crashes with ffmpeg.
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2013-06-10 00:29:08 +10:00 |
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Sacha
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637d75f47d
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Unlock the other 16 regs that are available for NEON.
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2013-06-09 23:15:59 +10:00 |
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Henrik Rydgard
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5a09885a59
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Port over much of unknown's vfpu jit work to arm. Untested.
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2013-02-20 00:04:21 +01:00 |
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Henrik Rydgard
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b8abb77eee
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More armjit-fpu work - dot product working for example. Add some non working DISABLEd stuff too.
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2013-02-16 09:27:48 +01:00 |
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Henrik Rydgard
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23cddab1d7
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Some mostly disabled armjit VFPU stuff.
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2013-02-15 22:38:39 +01:00 |
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Henrik Rydgard
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ba1171f15d
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Couple more armjit-fpu instructions. Turn down logging a bit.
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2013-02-11 23:39:30 +01:00 |
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Henrik Rydgard
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4bdb2045a7
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Armjit-FPU: Fix lots of bugs, impl some stuff. Still nothing working.
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2013-02-11 23:10:11 +01:00 |
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Henrik Rydgard
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f75d14d3b5
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ARM FPU jit work
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2013-02-10 15:53:56 +01:00 |
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Henrik Rydgard
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021736c533
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Initial FPU regcache
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2013-02-09 18:18:32 +01:00 |
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